ColdFire: MCF5329 Update and cleanup
Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 6a7e052..d3b1605 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -47,25 +47,23 @@
#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
-#define DEFAULT_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF | \
- CFG_CMD_FLASH | \
- CFG_CMD_I2C | \
- (CFG_CMD_LOADB | CFG_CMD_LOADS) | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO \
- )
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
#ifdef NANDFLASH_SIZE
-# define CONFIG_COMMANDS (DEFAULT_COMMANDS | CFG_CMD_NAND)
-#else
-# define CONFIG_COMMANDS (DEFAULT_COMMANDS)
+# define CONFIG_CMD_NAND
#endif
#define CFG_UNIFY_CACHE
@@ -108,9 +106,9 @@
#define CFG_I2C_OFFSET 0x58000
#define CFG_IMMR CFG_MBAR
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
+#define CONFIG_UDP_CHECKSUM
+
#ifdef CONFIG_MCFFEC
# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
# define CONFIG_IPADDR 192.162.1.2
@@ -137,7 +135,7 @@
#define CFG_PROMPT "-> "
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#ifdef CONFIG_CMD_KGDB
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -154,7 +152,7 @@
#define CFG_MBAR 0xFC000000
-#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000)
+#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000)
/*
* Low Level Configuration Settings
@@ -168,7 +166,7 @@
#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
#define CFG_INIT_RAM_CTRL 0x221
#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 0x10)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
/*-----------------------------------------------------------------------
@@ -198,7 +196,7 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
/*-----------------------------------------------------------------------
* FLASH organization
@@ -214,20 +212,19 @@
#endif
#ifdef NANDFLASH_SIZE
-# define CFG_MAX_NAND_DEVICE 1
-# define CFG_NAND_BASE (CFG_CS2_BASE << 16)
-# define CFG_NAND_SIZE 1
-# define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
-# define NAND_MAX_CHIPS 1
-# define NAND_ALLOW_ERASE_ALL 1
-# define CONFIG_JFFS2_NAND 1
-# define CONFIG_JFFS2_DEV "nand0"
-# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1)
-# define CONFIG_JFFS2_PART_OFFSET 0x00000000
+# define CFG_MAX_NAND_DEVICE 1
+# define CFG_NAND_BASE (CFG_CS2_BASE << 16)
+# define CFG_NAND_SIZE 1
+# define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+# define NAND_MAX_CHIPS 1
+# define NAND_ALLOW_ERASE_ALL 1
+# define CONFIG_JFFS2_NAND 1
+# define CONFIG_JFFS2_DEV "nand0"
+# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1)
+# define CONFIG_JFFS2_PART_OFFSET 0x00000000
#endif
-#define CFG_FLASH_BASE 0
-#define CFG_FLASH0_BASE (CFG_CS0_BASE << 16)
+#define CFG_FLASH_BASE (CFG_CS0_BASE << 16)
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
@@ -267,6 +264,4 @@
#define CFG_CS2_CTRL 0x00001f60
#endif
-#define CONFIG_UDP_CHECKSUM
-
#endif /* _M5329EVB_H */