Finish converting CONFIG_SYS_CACHELINE_SIZE to Kconfig
We move the SYS_CACHE_SHIFT_N options from arch/arm/Kconfig to
arch/Kconfig, and introduce SYS_CACHE_SHIFT_4 to provide a size of 16.
Introduce select statements for other architectures based on current
usage. For MIPS, we take the existing arch-specific symbol and migrate
to the generic symbol. This lets us remove a little bit of otherwise
unused code.
Cc: Alexey Brodkin <alexey.brodkin@synopsys.com>
Cc: Anup Patel <anup.patel@wdc.com>
Cc: Atish Patra <atish.patra@wdc.com>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Leo <ycliang@andestech.com>
Cc: Palmer Dabbelt <palmer@dabbelt.com>
Cc: Paul Walmsley <paul.walmsley@sifive.com>
Cc: Sean Anderson <seanga2@gmail.com>
Cc: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: Sean Anderson <seanga2@gmail.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 6b1f10d..fa221f1 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -22,7 +22,7 @@
select DYNAMIC_IO_PORT_BASE
select MIPS_CM
select MIPS_INSERT_BOOT_CONFIG
- select MIPS_L1_CACHE_SHIFT_6
+ select SYS_CACHE_SHIFT_6
select MIPS_L2_CACHE
select OF_CONTROL
select OF_ISA_BUS
@@ -132,7 +132,7 @@
select DM
select DM_SERIAL
select MIPS_CM
- select MIPS_L1_CACHE_SHIFT_6
+ select SYS_CACHE_SHIFT_6
select MIPS_L2_CACHE
select OF_BOARD_SETUP
select OF_CONTROL
@@ -153,7 +153,7 @@
select DM_ETH
select DM_GPIO
select DM_SERIAL
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select OF_CONTROL
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
@@ -566,26 +566,6 @@
so if you know the cache configuration for your system at compile
time it would be beneficial to configure it.
-config MIPS_L1_CACHE_SHIFT_4
- bool
-
-config MIPS_L1_CACHE_SHIFT_5
- bool
-
-config MIPS_L1_CACHE_SHIFT_6
- bool
-
-config MIPS_L1_CACHE_SHIFT_7
- bool
-
-config MIPS_L1_CACHE_SHIFT
- int
- default "7" if MIPS_L1_CACHE_SHIFT_7
- default "6" if MIPS_L1_CACHE_SHIFT_6
- default "5" if MIPS_L1_CACHE_SHIFT_5
- default "4" if MIPS_L1_CACHE_SHIFT_4
- default "5"
-
config MIPS_L2_CACHE
bool
help
diff --git a/arch/mips/include/asm/cache.h b/arch/mips/include/asm/cache.h
index 00696e6..d3e8a8c 100644
--- a/arch/mips/include/asm/cache.h
+++ b/arch/mips/include/asm/cache.h
@@ -6,17 +6,7 @@
#ifndef __MIPS_CACHE_H__
#define __MIPS_CACHE_H__
-#define L1_CACHE_SHIFT CONFIG_MIPS_L1_CACHE_SHIFT
-#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
-
-#define ARCH_DMA_MINALIGN (L1_CACHE_BYTES)
-
-/*
- * CONFIG_SYS_CACHELINE_SIZE is still used in various drivers primarily for
- * DMA buffer alignment. Satisfy those drivers by providing it as a synonym
- * of ARCH_DMA_MINALIGN for now.
- */
-#define CONFIG_SYS_CACHELINE_SIZE ARCH_DMA_MINALIGN
+#define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE
#ifndef __ASSEMBLY__
/**
diff --git a/arch/mips/mach-bmips/Kconfig b/arch/mips/mach-bmips/Kconfig
index b259a93..01d919f 100644
--- a/arch/mips/mach-bmips/Kconfig
+++ b/arch/mips/mach-bmips/Kconfig
@@ -21,7 +21,7 @@
config SOC_BMIPS_BCM3380
bool "BMIPS BCM3380 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -31,7 +31,7 @@
config SOC_BMIPS_BCM6318
bool "BMIPS BCM6318 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -41,7 +41,7 @@
config SOC_BMIPS_BCM6328
bool "BMIPS BCM6328 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -51,7 +51,7 @@
config SOC_BMIPS_BCM6338
bool "BMIPS BCM6338 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -61,7 +61,7 @@
config SOC_BMIPS_BCM6348
bool "BMIPS BCM6348 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -71,7 +71,7 @@
config SOC_BMIPS_BCM6358
bool "BMIPS BCM6358 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -81,7 +81,7 @@
config SOC_BMIPS_BCM6368
bool "BMIPS BCM6368 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -91,7 +91,7 @@
config SOC_BMIPS_BCM6362
bool "BMIPS BCM6362 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -101,7 +101,7 @@
config SOC_BMIPS_BCM63268
bool "BMIPS BCM63268 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
@@ -112,7 +112,7 @@
config SOC_BMIPS_BCM6838
bool "BMIPS BCM6838 family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select MIPS_TUNE_4KC
select SUPPORTS_BIG_ENDIAN
select SUPPORTS_CPU_MIPS32_R1
diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig
index 8756cadb..747988a 100644
--- a/arch/mips/mach-mtmips/Kconfig
+++ b/arch/mips/mach-mtmips/Kconfig
@@ -39,7 +39,7 @@
config SOC_MT7620
bool "MT7620"
- select MIPS_L1_CACHE_SHIFT_5
+ select SYS_CACHE_SHIFT_5
select SYS_MIPS_CACHE_INIT_RAM_LOAD
select PINCTRL_MT7620
select MT7620_SERIAL
@@ -54,7 +54,7 @@
config SOC_MT7628
bool "MT7628"
- select MIPS_L1_CACHE_SHIFT_5
+ select SYS_CACHE_SHIFT_5
select MIPS_INIT_STACK_IN_SRAM
select MIPS_SRAM_INIT
select SYS_MIPS_CACHE_INIT_RAM_LOAD
diff --git a/arch/mips/mach-pic32/Kconfig b/arch/mips/mach-pic32/Kconfig
index 5f13bf1..2afa972 100644
--- a/arch/mips/mach-pic32/Kconfig
+++ b/arch/mips/mach-pic32/Kconfig
@@ -9,7 +9,7 @@
config SOC_PIC32MZDA
bool "Microchip PIC32MZ[DA] family"
- select MIPS_L1_CACHE_SHIFT_4
+ select SYS_CACHE_SHIFT_4
select ROM_EXCEPTION_VECTORS
select SUPPORTS_CPU_MIPS32_R1
select SUPPORTS_CPU_MIPS32_R2