commit ad1158c50e0ec2f00cbe7da8f092fdc32638c2c5
author Marek Vasut <marex@denx.de> Thu Sep 21 20:44:17 2023 +0200
committer Stefano Babic <sbabic@denx.de> Mon Oct 16 16:25:10 2023 +0200
tree 02374f08d19626c71184a90729a5a44a3d646b3b
parent b13eaf3bb4e64fff117210821b3cf2f106de8ae2

arm64: dts: imx8mp: Switch to DT overlays for i.MX8MP DHCOM SoM

Add DT overlays to support additional DH i.MX8MP DHCOM SoM 660-100
population options with 1x or 2x RMII PHY mounted on PDK2 or PDK3
carrier boards.

Use SPL DTO support to apply matching SoM specific DTO to cater
for the SoM differences. Remove ad-hoc patching of control DT from
fdtdec_board_setup().

Signed-off-by: Marek Vasut <marex@denx.de>

arch/arm/dts/Makefile

diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 60e9271..50bdb29 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -1064,6 +1064,9 @@
 	imx8mq-phanbell.dtb \
 	imx8mp-beacon-kit.dtb \
 	imx8mp-data-modul-edm-sbc.dtb \
+	imx8mp-dhcom-som-overlay-eth1xfast.dtbo \
+	imx8mp-dhcom-som-overlay-eth2xfast.dtbo \
+	imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo \
 	imx8mp-dhcom-pdk2.dtb \
 	imx8mp-dhcom-pdk3.dtb \
 	imx8mp-evk.dtb \

arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts

diff --git a/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts b/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts
new file mode 100644
index 0000000..3b39777
--- /dev/null
+++ b/arch/arm/dts/imx8mp-dhcom-pdk-overlay-eth2xfast.dts
@@ -0,0 +1,10 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023 Marek Vasut <marex@denx.de>
+ */
+/dts-v1/;
+/plugin/;
+
+&ethphypdk {	/* Micrel KSZ9131RNXI */
+	status = "disabled";
+};

arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts

diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts
new file mode 100644
index 0000000..bb5a2b6
--- /dev/null
+++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth1xfast.dts
@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023 Marek Vasut <marex@denx.de>
+ */
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/clock/imx8mp-clock.h>
+
+&eqos {	/* First ethernet */
+	pinctrl-0 = <&pinctrl_eqos_rmii>;
+	phy-handle = <&ethphy0f>;
+	phy-mode = "rmii";
+
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+				 <&clk IMX8MP_SYS_PLL2_100M>,
+				 <&clk IMX8MP_SYS_PLL2_50M>;
+	assigned-clock-rates = <0>, <100000000>, <50000000>;
+};
+
+&ethphy0g {	/* Micrel KSZ9131RNXI */
+	status = "disabled";
+};
+
+&ethphy0f {	/* SMSC LAN8740Ai */
+	status = "okay";
+};
+
+&fec {	/* Second ethernet -- HS connector not populated on 1x RMII PHY SoM */
+	status = "disabled";
+};
+
+/* No WiFi/BT chipset on this SoM variant. */
+
+&uart2 {
+	bluetooth {
+		status = "disabled";
+	};
+};
+
+&usdhc1 {
+	status = "disabled";
+};

arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts

diff --git a/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts
new file mode 100644
index 0000000..82dadce
--- /dev/null
+++ b/arch/arm/dts/imx8mp-dhcom-som-overlay-eth2xfast.dts
@@ -0,0 +1,24 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+/*
+ * Copyright (C) 2023 Marek Vasut <marex@denx.de>
+ */
+#include "imx8mp-dhcom-som-overlay-eth1xfast.dts"
+
+/* Dual RMII 100/Full Fast ethernet on this SoM variant. */
+
+&fec {	/* Second ethernet */
+	pinctrl-0 = <&pinctrl_fec_rmii>;
+	phy-handle = <&ethphy1f>;
+	phy-mode = "rmii";
+	status = "okay";
+
+	assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_266M>,
+				 <&clk IMX8MP_SYS_PLL2_100M>,
+				 <&clk IMX8MP_SYS_PLL2_50M>,
+				 <&clk IMX8MP_SYS_PLL2_50M>;
+	assigned-clock-rates = <0>, <100000000>, <50000000>, <0>;
+};
+
+&ethphy1f {	/* SMSC LAN8740Ai */
+	status = "okay";
+};

arch/arm/dts/imx8mp-dhcom-u-boot.dtsi

diff --git a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
index 59d31ee..00e1db6 100644
--- a/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/imx8mp-dhcom-u-boot.dtsi
@@ -133,3 +133,52 @@
 &wdog1 {
 	bootph-pre-ram;
 };
+
+&binman {
+	itb {
+		fit {
+			images {
+				fdt-dto-imx8mp-dhcom-som-overlay-eth1xfast {
+					description = "imx8mp-dhcom-som-overlay-eth1xfast";
+					type = "flat_dt";
+					compression = "none";
+
+					blob-ext {
+						filename = "imx8mp-dhcom-som-overlay-eth1xfast.dtbo";
+					};
+				};
+
+				fdt-dto-imx8mp-dhcom-som-overlay-eth2xfast {
+					description = "imx8mp-dhcom-som-overlay-eth2xfast";
+					type = "flat_dt";
+					compression = "none";
+
+					blob-ext {
+						filename = "imx8mp-dhcom-som-overlay-eth2xfast.dtbo";
+					};
+				};
+
+				fdt-dto-imx8mp-dhcom-pdk-overlay-eth2xfast {
+					description = "imx8mp-dhcom-pdk-overlay-eth2xfast";
+					type = "flat_dt";
+					compression = "none";
+
+					blob-ext {
+						filename = "imx8mp-dhcom-pdk-overlay-eth2xfast.dtbo";
+					};
+				};
+			};
+
+			configurations {
+				default = "@config-DEFAULT-SEQ";
+
+				@config-SEQ {
+					fdt = "fdt-1",
+					      "fdt-dto-imx8mp-dhcom-som-overlay-eth1xfast",
+					      "fdt-dto-imx8mp-dhcom-som-overlay-eth2xfast",
+					      "fdt-dto-imx8mp-dhcom-pdk-overlay-eth2xfast";
+				};
+			};
+		};
+	};
+};