Restructure POST directory to support of other CPUs, boards, etc.
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index 35b2315..3ab050f 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -168,8 +168,8 @@
 static void program_mode(unsigned long *dimm_populated,
 			 unsigned char *iic0_dimm_addr,
 			 unsigned long num_dimm_banks,
-                         ddr_cas_id_t *selected_cas,
-                         int *write_recovery);
+			 ddr_cas_id_t *selected_cas,
+			 int *write_recovery);
 static void program_tr(unsigned long *dimm_populated,
 		       unsigned char *iic0_dimm_addr,
 		       unsigned long num_dimm_banks);
@@ -185,7 +185,7 @@
 static void program_initplr(unsigned long *dimm_populated,
 			    unsigned char *iic0_dimm_addr,
 			    unsigned long num_dimm_banks,
-                            ddr_cas_id_t selected_cas,
+			    ddr_cas_id_t selected_cas,
 			    int write_recovery);
 static unsigned long is_ecc_enabled(void);
 static void program_ecc(unsigned long *dimm_populated,
@@ -1149,7 +1149,7 @@
 static void program_initplr(unsigned long *dimm_populated,
 			    unsigned char *iic0_dimm_addr,
 			    unsigned long num_dimm_banks,
-                            ddr_cas_id_t selected_cas,
+			    ddr_cas_id_t selected_cas,
 			    int write_recovery)
 {
 	u32 cas = 0;
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index 24b30df..6b2c170 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -1916,43 +1916,43 @@
 /*----------------------------------------------------------------------------+
 | dcbz_area.
 +----------------------------------------------------------------------------*/
-        function_prolog(dcbz_area)
-        rlwinm. r5,r4,0,27,31
-        rlwinm  r5,r4,27,5,31
-        beq     ..d_ra2
-        addi    r5,r5,0x0001
+	function_prolog(dcbz_area)
+	rlwinm. r5,r4,0,27,31
+	rlwinm  r5,r4,27,5,31
+	beq     ..d_ra2
+	addi    r5,r5,0x0001
 ..d_ra2:mtctr   r5
 ..d_ag2:dcbz    r0,r3
-        addi    r3,r3,32
-        bdnz    ..d_ag2
-        sync
-        blr
-        function_epilog(dcbz_area)
+	addi    r3,r3,32
+	bdnz    ..d_ag2
+	sync
+	blr
+	function_epilog(dcbz_area)
 
 /*----------------------------------------------------------------------------+
 | dflush.  Assume 32K at vector address is cachable.
 +----------------------------------------------------------------------------*/
-        function_prolog(dflush)
-        mfmsr   r9
-        rlwinm  r8,r9,0,15,13
-        rlwinm  r8,r8,0,17,15
-        mtmsr   r8
-        addi    r3,r0,0x0000
-        mtspr   dvlim,r3
-        mfspr   r3,ivpr
-        addi    r4,r0,1024
-        mtctr   r4
+	function_prolog(dflush)
+	mfmsr   r9
+	rlwinm  r8,r9,0,15,13
+	rlwinm  r8,r8,0,17,15
+	mtmsr   r8
+	addi    r3,r0,0x0000
+	mtspr   dvlim,r3
+	mfspr   r3,ivpr
+	addi    r4,r0,1024
+	mtctr   r4
 ..dflush_loop:
-        lwz     r6,0x0(r3)
-        addi    r3,r3,32
-        bdnz    ..dflush_loop
-        addi    r3,r3,-32
-        mtctr   r4
+	lwz     r6,0x0(r3)
+	addi    r3,r3,32
+	bdnz    ..dflush_loop
+	addi    r3,r3,-32
+	mtctr   r4
 ..ag:   dcbf    r0,r3
-        addi    r3,r3,-32
-        bdnz    ..ag
-        sync
-        mtmsr   r9
-        blr
-        function_epilog(dflush)
+	addi    r3,r3,-32
+	bdnz    ..ag
+	sync
+	mtmsr   r9
+	blr
+	function_epilog(dflush)
 #endif /* CONFIG_440 */