commit | ad72e7622bd587dc798fbac0351b558fb18caa97 | [log] [tgz] |
---|---|---|
author | Michal Simek <michal.simek@xilinx.com> | Thu Apr 14 14:15:49 2016 +0200 |
committer | Heiko Schocher <hs@denx.de> | Tue May 17 08:28:49 2016 +0200 |
tree | ac5d0eada6cd66d544a48e73e19fcc942cd65adc | |
parent | 6150be9094bb155022da3843b56e6314edf54305 [diff] |
i2c: cdns: Support different bus speeds 400kHz is maximum freq which can be used on Xilinx ZynqMP. Support it with standard divider calculator. Input freq is hardcoded to 100MHz input freq till we have clock driver which can provide this information for exact configuration. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Heiko Schocher <hs@denx.de>