commit ada9318252f51c2626e9837c623f9812b0308dea
author Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Tue Mar 03 15:11:17 2009 +0900
committer Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Thu Mar 12 23:58:30 2009 +0900
tree be5eac4da7830944db7daf1b42028ac94fe0b9d7
parent 06b18163b57e6b0349b0c299222d50e7b1e41e50

sh: Add support 32-Bit Extended Address Mode to sh7785lcr

We can built 'make sh7785lcr_32bit_config'. And add new command "pmb"
for this mode. This command changes PMB for using 512MB system memory.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>

include/configs/sh7785lcr.h

diff --git a/include/configs/sh7785lcr.h b/include/configs/sh7785lcr.h
index 94c8d6b..21c3f70 100644
--- a/include/configs/sh7785lcr.h
+++ b/include/configs/sh7785lcr.h
@@ -61,11 +61,20 @@
 #undef	CONFIG_SHOW_BOOT_PROGRESS
 
 /* MEMORY */
+#if defined(CONFIG_SH_32BIT)
+#define SH7785LCR_SDRAM_PHYS_BASE	(0x48000000)
+#define SH7785LCR_SDRAM_BASE		(0x88000000)
+#define SH7785LCR_SDRAM_SIZE		(384 * 1024 * 1024)
+#define SH7785LCR_FLASH_BASE_1		(0xa0000000)
+#define SH7785LCR_FLASH_BANK_SIZE	(64 * 1024 * 1024)
+#define SH7785LCR_USB_BASE		(0xa6000000)
+#else
 #define SH7785LCR_SDRAM_BASE		(0x08000000)
 #define SH7785LCR_SDRAM_SIZE		(128 * 1024 * 1024)
 #define SH7785LCR_FLASH_BASE_1		(0xa0000000)
 #define SH7785LCR_FLASH_BANK_SIZE	(64 * 1024 * 1024)
 #define SH7785LCR_USB_BASE		(0xb4000000)
+#endif
 
 #define CONFIG_SYS_LONGHELP
 #define CONFIG_SYS_PROMPT		"=> "
@@ -133,9 +142,15 @@
 #define CONFIG_PCI
 #define CONFIG_SH4_PCI
 #define CONFIG_SH7780_PCI
+#if defined(CONFIG_SH_32BIT)
+#define CONFIG_SH7780_PCI_LSR	0x1ff00001
+#define CONFIG_SH7780_PCI_LAR	0x5f000000
+#define CONFIG_SH7780_PCI_BAR	0x5f000000
+#else
 #define CONFIG_SH7780_PCI_LSR	0x07f00001
 #define CONFIG_SH7780_PCI_LAR	CONFIG_SYS_SDRAM_SIZE
 #define CONFIG_SH7780_PCI_BAR	CONFIG_SYS_SDRAM_SIZE
+#endif
 #define CONFIG_PCI_PNP
 #define CONFIG_PCI_SCAN_SHOW	1
 
@@ -147,8 +162,12 @@
 #define CONFIG_PCI_IO_PHYS	CONFIG_PCI_IO_BUS
 #define CONFIG_PCI_IO_SIZE	0x00200000	/* Size of IO window */
 
-#define CONFIG_PCI_SYS_BUS	CONFIG_SYS_SDRAM_BASE
+#if defined(CONFIG_SH_32BIT)
+#define CONFIG_PCI_SYS_PHYS	SH7785LCR_SDRAM_PHYS_BASE
+#else
 #define CONFIG_PCI_SYS_PHYS	CONFIG_SYS_SDRAM_BASE
+#endif
+#define CONFIG_PCI_SYS_BUS	CONFIG_SYS_SDRAM_BASE
 #define CONFIG_PCI_SYS_SIZE	CONFIG_SYS_SDRAM_SIZE
 
 /* Network device (RTL8169) support */