Amazon Kindle Fire (first generation) codename kc1 support
The Amazon Kindle Fire (first generation) codename kc1 is a tablet that was
released by Amazon back in 2011.
It is using an OMAP4430 SoC GP version, which allows running U-Boot and the
U-Boot SPL from the ground up.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
diff --git a/board/amazon/kc1/Kconfig b/board/amazon/kc1/Kconfig
new file mode 100644
index 0000000..1b46a8f
--- /dev/null
+++ b/board/amazon/kc1/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_KC1
+
+config SYS_BOARD
+ default "kc1"
+
+config SYS_VENDOR
+ default "amazon"
+
+config SYS_CONFIG_NAME
+ default "kc1"
+
+endif
diff --git a/board/amazon/kc1/MAINTAINERS b/board/amazon/kc1/MAINTAINERS
new file mode 100644
index 0000000..7e596d9
--- /dev/null
+++ b/board/amazon/kc1/MAINTAINERS
@@ -0,0 +1,6 @@
+KC1 BOARD
+M: Paul Kocialkowski <contact@paulk.fr>
+S: Maintained
+F: board/amazon/kc1/
+F: include/configs/kc1.h
+F: configs/kc1_defconfig
diff --git a/board/amazon/kc1/Makefile b/board/amazon/kc1/Makefile
new file mode 100644
index 0000000..59c8347
--- /dev/null
+++ b/board/amazon/kc1/Makefile
@@ -0,0 +1,9 @@
+#
+# Amazon Kindle Fire (first generation) codename kc1 config
+#
+# Copyright (C) 2016 Paul Kocialkowski <contact@paulk.fr>
+#
+# SPDX-License-Identifier: GPL-2.0+
+#
+
+obj-y := kc1.o
diff --git a/board/amazon/kc1/kc1.c b/board/amazon/kc1/kc1.c
new file mode 100644
index 0000000..a189bb2
--- /dev/null
+++ b/board/amazon/kc1/kc1.c
@@ -0,0 +1,109 @@
+/*
+ * Amazon Kindle Fire (first generation) codename kc1 config
+ *
+ * Copyright (C) 2016 Paul Kocialkowski <contact@paulk.fr>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/arch/sys_proto.h>
+#include <asm/arch/mmc_host_def.h>
+#include <asm/gpio.h>
+#include <asm/emif.h>
+#include <twl6030.h>
+#include "kc1.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const struct omap_sysinfo sysinfo = {
+ .board_string = "kc1"
+};
+
+void set_muxconf_regs(void)
+{
+ do_set_mux((*ctrl)->control_padconf_core_base, core_padconf_array,
+ sizeof(core_padconf_array) / sizeof(struct pad_conf_entry));
+}
+
+struct lpddr2_device_details *emif_get_device_details(u32 emif_nr, u8 cs,
+ struct lpddr2_device_details *lpddr2_dev_details)
+{
+ if (cs == CS1)
+ return NULL;
+
+ *lpddr2_dev_details = elpida_2G_S4_details;
+
+ return lpddr2_dev_details;
+}
+
+void emif_get_device_timings(u32 emif_nr,
+ const struct lpddr2_device_timings **cs0_device_timings,
+ const struct lpddr2_device_timings **cs1_device_timings)
+{
+ *cs0_device_timings = &elpida_2G_S4_timings;
+ *cs1_device_timings = NULL;
+}
+
+int board_init(void)
+{
+ /* GPMC init */
+ gpmc_init();
+
+ /* MACH number */
+ gd->bd->bi_arch_number = MACH_TYPE_OMAP_4430SDP;
+
+ /* ATAGs location */
+ gd->bd->bi_boot_params = OMAP44XX_DRAM_ADDR_SPACE_START + 0x100;
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ /* Serial number */
+
+ omap_die_id_serial();
+
+ return 0;
+}
+
+u32 get_board_rev(void)
+{
+ u32 value = 0;
+
+ gpio_request(KC1_GPIO_MBID0, "MBID0");
+ gpio_request(KC1_GPIO_MBID1, "MBID1");
+ gpio_request(KC1_GPIO_MBID2, "MBID2");
+ gpio_request(KC1_GPIO_MBID3, "MBID3");
+
+ gpio_direction_input(KC1_GPIO_MBID0);
+ gpio_direction_input(KC1_GPIO_MBID1);
+ gpio_direction_input(KC1_GPIO_MBID2);
+ gpio_direction_input(KC1_GPIO_MBID3);
+
+ value |= (gpio_get_value(KC1_GPIO_MBID0) << 0);
+ value |= (gpio_get_value(KC1_GPIO_MBID1) << 1);
+ value |= (gpio_get_value(KC1_GPIO_MBID2) << 2);
+ value |= (gpio_get_value(KC1_GPIO_MBID3) << 3);
+
+ return value;
+}
+
+void get_board_serial(struct tag_serialnr *serialnr)
+{
+ omap_die_id_get_board_serial(serialnr);
+}
+
+#ifndef CONFIG_SPL_BUILD
+int board_mmc_init(bd_t *bis)
+{
+ return omap_mmc_init(1, 0, 0, -1, -1);
+}
+#endif
+
+void board_mmc_power_init(void)
+{
+ twl6030_power_mmc_init(1);
+}
diff --git a/board/amazon/kc1/kc1.h b/board/amazon/kc1/kc1.h
new file mode 100644
index 0000000..886bd38
--- /dev/null
+++ b/board/amazon/kc1/kc1.h
@@ -0,0 +1,92 @@
+/*
+ * Amazon Kindle Fire (first generation) codename kc1 config
+ *
+ * Copyright (C) 2016 Paul Kocialkowski <contact@paulk.fr>
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef _KC1_H_
+#define _KC1_H_
+
+#include <asm/arch/mux_omap4.h>
+
+#define KC1_GPIO_MBID1 173
+#define KC1_GPIO_MBID0 174
+#define KC1_GPIO_MBID3 177
+#define KC1_GPIO_MBID2 178
+
+const struct pad_conf_entry core_padconf_array[] = {
+ /* GPMC */
+ { GPMC_AD0, (IEN | PTU | M1) }, /* sdmmc2_dat0 */
+ { GPMC_AD1, (IEN | PTU | M1) }, /* sdmmc2_dat1 */
+ { GPMC_AD2, (IEN | PTU | M1) }, /* sdmmc2_dat2 */
+ { GPMC_AD3, (IEN | PTU | M1) }, /* sdmmc2_dat3 */
+ { GPMC_AD4, (IEN | PTU | M1) }, /* sdmmc2_dat4 */
+ { GPMC_AD5, (IEN | PTU | M1) }, /* sdmmc2_dat5 */
+ { GPMC_AD6, (IEN | PTU | M1) }, /* sdmmc2_dat6 */
+ { GPMC_AD7, (IEN | PTU | M1) }, /* sdmmc2_dat7 */
+ { GPMC_NOE, (IEN | PTU | M1) }, /* sdmmc2_clk */
+ { GPMC_NWE, (IEN | PTU | M1) }, /* sdmmc2_cmd */
+ /* CAM */
+ { CAM_SHUTTER, (IDIS | DIS | M7) }, /* safe_mode */
+ { CAM_STROBE, (IDIS | DIS | M7) }, /* safe_mode */
+ { CAM_GLOBALRESET, (IDIS | DIS | M7) }, /* safe_mode */
+ /* HDQ */
+ { HDQ_SIO, (IDIS | DIS | M7) }, /* safe_mode */
+ /* I2C1 */
+ { I2C1_SCL, (IEN | PTU | M0) }, /* i2c1_scl */
+ { I2C1_SDA, (IEN | PTU | M0) }, /* i2c1_sda */
+ /* I2C2 */
+ { I2C2_SCL, (IEN | PTU | M0) }, /* i2c2_scl */
+ { I2C2_SDA, (IEN | PTU | M0) }, /* i2c2_sda */
+ /* I2C3 */
+ { I2C3_SCL, (IEN | PTU | M0) }, /* i2c3_scl */
+ { I2C3_SDA, (IEN | PTU | M0) }, /* i2c3_sda */
+ /* I2C4 */
+ { I2C4_SCL, (IEN | PTU | M0) }, /* i2c4_scl */
+ { I2C4_SDA, (IEN | PTU | M0) }, /* i2c4_sda */
+ /* MCSPI1 */
+ { MCSPI1_CLK, (IDIS | DIS | M7) }, /* safe_mode */
+ { MCSPI1_SOMI, (IDIS | DIS | M7) }, /* safe_mode */
+ { MCSPI1_SIMO, (IDIS | DIS | M7) }, /* safe_mode */
+ { MCSPI1_CS0, (IDIS | DIS | M7) }, /* safe_mode */
+ { MCSPI1_CS1, (IDIS | DIS | M7) }, /* safe_mode */
+ { MCSPI1_CS2, (IDIS | DIS | M7) }, /* safe_mode */
+ { MCSPI1_CS3, (IDIS | DIS | M7) }, /* safe_mode */
+ /* UART3 */
+ { UART3_CTS_RCTX, (IDIS | DIS | M7) }, /* safe_mode */
+ { UART3_RTS_SD, (IDIS | DIS | M7) }, /* safe_mode */
+ { UART3_RX_IRRX, (IEN | DIS | M0) }, /* uart3_rx_irrx */
+ { UART3_TX_IRTX, (IDIS | DIS | M0) }, /* uart3_tx_irtx */
+ /* SDMMC5 */
+ { SDMMC5_CLK, (IEN | PTU | M0) }, /* sdmmc5_clk */
+ { SDMMC5_CMD, (IEN | PTU | M0) }, /* sdmmc5_cmd */
+ { SDMMC5_DAT0, (IEN | PTU | M0) }, /* sdmmc5_dat0 */
+ { SDMMC5_DAT1, (IEN | PTU | M0) }, /* sdmmc5_dat1 */
+ { SDMMC5_DAT2, (IEN | PTU | M0) }, /* sdmmc5_dat2 */
+ { SDMMC5_DAT3, (IEN | PTU | M0) }, /* sdmmc5_dat3 */
+ /* MCSPI4 */
+ { MCSPI4_CLK, (IEN | DIS | M0) }, /* mcspi4_clk */
+ { MCSPI4_SIMO, (IEN | DIS | M0) }, /* mcspi4_simo */
+ { MCSPI4_SOMI, (IEN | DIS | M0) }, /* mcspi4_somi */
+ { MCSPI4_CS0, (IEN | PTD | M0) }, /* mcspi4_cs0 */
+ /* UART4 */
+ { UART4_RX, (IDIS | DIS | M4) }, /* gpio_155 */
+ { UART4_TX, (IDIS | DIS | M7) }, /* safe_mode */
+ /* UNIPRO */
+ { UNIPRO_TX0, (IDIS | DIS | M7) }, /* safe_mode */
+ { UNIPRO_TY0, (IDIS | DIS | M7) }, /* safe_mode */
+ { UNIPRO_TX1, (IEN | DIS | M3) }, /* gpio_173 */
+ { UNIPRO_TY1, (IEN | DIS | M3) }, /* gpio_174 */
+ { UNIPRO_TX2, (IDIS | DIS | M7) }, /* safe_mode */
+ { UNIPRO_TY2, (IDIS | DIS | M7) }, /* safe_mode */
+ { UNIPRO_RX0, (IEN | DIS | M3) }, /* gpio_175 */
+ { UNIPRO_RY0, (IEN | DIS | M3) }, /* gpio_176 */
+ { UNIPRO_RX1, (IEN | DIS | M3) }, /* gpio_177 */
+ { UNIPRO_RY1, (IEN | DIS | M3) }, /* gpio_178 */
+ { UNIPRO_RX2, (IDIS | DIS | M7) }, /* safe_mode */
+ { UNIPRO_RY2, (IDIS | DIS | M7) }, /* safe_mode */
+};
+
+#endif