commit | aef654a2ed386d8bd53053383f6bf15ba016a79c | [log] [tgz] |
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author | Laurentiu Tudor <laurentiu.tudor@nxp.com> | Tue Jul 30 17:29:57 2019 +0300 |
committer | Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> | Thu Aug 22 09:07:36 2019 +0530 |
tree | 7dcfb1c5f8418120183dba9542a29eb74cb5f9e8 | |
parent | 08f9bc9f4332e13a4ba4705d84d62e41a45b3fbe [diff] |
armv8: fsl-layerscape: make icid setup endianness aware The current implementation assumes that the registers holding the ICIDs are universally big endian. That's no longer the case on newer platforms so update the code to take into account the endianness of each register. Signed-off-by: Laurentiu Tudor <laurentiu.tudor@nxp.com> Reviewed-by: Horia Geantă <horia.geanta@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>