arm: clean cache management
unify arm cache management except for non standard cache as ARM7TDMI
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
diff --git a/include/configs/B2.h b/include/configs/B2.h
index 01b65c5..35fad5c 100644
--- a/include/configs/B2.h
+++ b/include/configs/B2.h
@@ -38,6 +38,7 @@
#define CONFIG_B2 1 /* on an B2 Board */
#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
+#define CONFIG_SYS_NO_CP15_CACHE
#define CONFIG_S3C44B0_CLOCK_SPEED 75 /* we have a 75Mhz S3C44B0*/
diff --git a/include/configs/assabet.h b/include/configs/assabet.h
index a6c442b..8c5b84c 100644
--- a/include/configs/assabet.h
+++ b/include/configs/assabet.h
@@ -37,6 +37,8 @@
#define CONFIG_ASSABET 1 /* on an Intel Assabet Board */
#undef CONFIG_USE_IRQ
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index 751e03c..82d1401 100644
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -41,6 +41,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index 850d93b..75c5f9b 100644
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -37,6 +37,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index d9f85f0..ed18450 100644
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -42,6 +42,10 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* for timer/console/ethernet */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Hardware drivers
*/
diff --git a/include/configs/delta.h b/include/configs/delta.h
index f5508b7..bacbd90 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -39,6 +39,9 @@
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h
index 8f615bd..b6cfc67 100644
--- a/include/configs/dnp1110.h
+++ b/include/configs/dnp1110.h
@@ -42,6 +42,8 @@
#define CONFIG_DNP1110 1 /* on an DNP/1110 Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Size of malloc() pool
diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h
index ffc9408..0f415d9 100644
--- a/include/configs/evb4510.h
+++ b/include/configs/evb4510.h
@@ -43,6 +43,7 @@
#define CONFIG_ARM_THUMB 1 /* this is an ARM7TDMI */
#define CONFIG_S3C4510B 1 /* it's a S3C4510B chip */
#define CONFIG_EVB4510 1 /* on an EVB4510 Board */
+#define CONFIG_SYS_NO_CP15_CACHE
#define CONFIG_USE_IRQ
#define CONFIG_STACKSIZE_IRQ (4*1024)
diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h
index 77d4578..b2fbca2 100644
--- a/include/configs/gcplus.h
+++ b/include/configs/gcplus.h
@@ -49,6 +49,8 @@
#define CONFIG_GCPLUS 1 /* on an ADS GCPlus Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
#define CONFIG_SETUP_MEMORY_TAGS 1
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 895998a..69654c7 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -39,6 +39,10 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* for timer/console/ethernet */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Hardware drivers
*/
diff --git a/include/configs/lart.h b/include/configs/lart.h
index e34ec22..5d6d460 100644
--- a/include/configs/lart.h
+++ b/include/configs/lart.h
@@ -35,6 +35,8 @@
#define CONFIG_LART 1 /* on an LART Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Size of malloc() pool
diff --git a/include/configs/logodl.h b/include/configs/logodl.h
index 9afa800..889a9a3 100644
--- a/include/configs/logodl.h
+++ b/include/configs/logodl.h
@@ -39,6 +39,10 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
/* for timer/console/ethernet */
+
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Hardware drivers
*/
diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index a4b430b..2cf9c02 100644
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -46,6 +46,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h
index ab9ea4f..ed873fa 100644
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -42,6 +42,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index 5e2e7cf..7485f72 100644
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -68,6 +68,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/
diff --git a/include/configs/shannon.h b/include/configs/shannon.h
index c8b0b16..13cc5ff 100644
--- a/include/configs/shannon.h
+++ b/include/configs/shannon.h
@@ -44,6 +44,8 @@
#define CONFIG_SHANNON 1 /* on an SHANNON/TuxScreen Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Size of malloc() pool
diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
index c2744b5..4917318 100644
--- a/include/configs/trizepsiv.h
+++ b/include/configs/trizepsiv.h
@@ -47,6 +47,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
#define RTC
/*
diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h
index e74303d..197ac0b 100644
--- a/include/configs/wepep250.h
+++ b/include/configs/wepep250.h
@@ -27,6 +27,8 @@
#define CONFIG_WEPEP250 1 /* config for wepep250 board */
#undef CONFIG_USE_IRQ /* don't need use IRQ/FIQ */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
/*
* Select serial console configuration
diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 086ca69..1632d29 100644
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -49,6 +49,9 @@
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* select serial console configuration
*/
diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 922eb2c..c8bdf31 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -36,6 +36,9 @@
#define CONFIG_XM250 1 /* on a MicroSys XM250 Board */
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool; this lives below the uppermost 128 KiB which are
* used for the RAM copy of the uboot code
diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index cad414c..7e2abbf 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -35,6 +35,9 @@
#define CONFIG_DOS_PARTITION 1
#define BOARD_LATE_INIT 1
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_CPUSPEED 0x161 /* set core clock to 400/200/100 MHz */
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 064740d..217636a 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -47,6 +47,9 @@
#undef CONFIG_SKIP_RELOCATE_UBOOT
#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+/* we will never enable dcache, because we have to setup MMU first */
+#define CONFIG_SYS_NO_DCACHE
+
/*
* Size of malloc() pool
*/