stm32mp1: ram: remove tuning support
Remove the DDR interactive command tuning, as the support of a predefined
DDR PHY tuning is removed for STM32MP1 driver in SPL and in TF-A
and the result of this tuning will be never used.
Moreover this SW tuning procedure can failed on some hardware
configuration (to many BIST errors and no convergence); it will be no
more supported in the next delivery of the DDR utilities included in
the CubeMX tool of STMicroelectronics.
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
diff --git a/drivers/ram/stm32mp1/stm32mp1_ddr.c b/drivers/ram/stm32mp1/stm32mp1_ddr.c
index 9d08660..4d78aa5 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ddr.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ddr.c
@@ -557,7 +557,7 @@
(u32)&phy->pgsr, pgsr, ret);
}
-void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir)
+static void stm32mp1_ddrphy_init(struct stm32mp1_ddrphy *phy, u32 pir)
{
pir |= DDRPHYC_PIR_INIT;
writel(pir, &phy->pir);
@@ -626,7 +626,7 @@
log_debug("[0x%08x] stat = 0x%08x\n", (u32)&priv->ctl->stat, stat);
}
-void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl)
+static void stm32mp1_refresh_disable(struct stm32mp1_ddrctl *ctl)
{
start_sw_done(ctl);
/* quasi-dynamic register update*/
@@ -637,8 +637,8 @@
wait_sw_done_ack(ctl);
}
-void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl,
- u32 rfshctl3, u32 pwrctl)
+static void stm32mp1_refresh_restore(struct stm32mp1_ddrctl *ctl,
+ u32 rfshctl3, u32 pwrctl)
{
start_sw_done(ctl);
if (!(rfshctl3 & DDRCTRL_RFSHCTL3_DIS_AUTO_REFRESH))