| commit | d7a1ff40d6006c818c9e74d3e13bec008638349f | [log] [tgz] |
|---|---|---|
| author | Chee Hong Ang <chee.hong.ang@intel.com> | Wed Aug 05 21:15:56 2020 +0800 |
| committer | Ley Foon Tan <ley.foon.tan@intel.com> | Fri Oct 09 17:53:11 2020 +0800 |
| tree | 01943c384986475e7094c52f6faa50494990e0ca | |
| parent | 289ebe077a18462d38628a9cc2213c9e010216de [diff] |
arm: socfpga: soc64: Add SDM triggered warm reset bit mask Include SDM triggered warm reset bit (BIT1) in Reset Manager's stat register when checking for HPS warm reset status. Refactor the warm reset mask macro for clarity purpose. Signed-off-by: Chee Hong Ang <chee.hong.ang@intel.com> Reviewed-by: Ley Foon Tan <ley.foon.tan@intel.com>