mx7ulp_evk: Update LPDDR3 script
Update LPDDR3 script with the changes below:
-Update the precharge command to CMD=01 at the DDR initialization phase
-remove unimplemented registers
Write data bit delay --refer to the DDR_TRIM bits in
IOMUXC1_DDR_SW_PAD_CTL_PAD_DDRn
Test:
One EVK board passes overnight stress test.
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
diff --git a/board/freescale/mx7ulp_evk/imximage.cfg b/board/freescale/mx7ulp_evk/imximage.cfg
index 78df69f..e7d87be 100644
--- a/board/freescale/mx7ulp_evk/imximage.cfg
+++ b/board/freescale/mx7ulp_evk/imximage.cfg
@@ -88,11 +88,6 @@
DATA 4 0x40AB0824 0x33333333
DATA 4 0x40AB0828 0x33333333
-DATA 4 0x40AB082C 0xf3333333
-DATA 4 0x40AB0830 0xf3333333
-DATA 4 0x40AB0834 0xf3333333
-DATA 4 0x40AB0838 0xf3333333
-
DATA 4 0x40AB08C0 0x24922492
DATA 4 0x40AB08B8 0x00000800
@@ -107,8 +102,8 @@
DATA 4 0x40AB0040 0x0000003F
DATA 4 0x40AB0000 0xC3190000
-DATA 4 0x40AB001C 0x00008050
-DATA 4 0x40AB001C 0x00008058
+DATA 4 0x40AB001C 0x00008010
+DATA 4 0x40AB001C 0x00008018
DATA 4 0x40AB001C 0x003F8030
DATA 4 0x40AB001C 0x003F8038
DATA 4 0x40AB001C 0xFF0A8030
diff --git a/board/freescale/mx7ulp_evk/plugin.S b/board/freescale/mx7ulp_evk/plugin.S
index 802ae5f..73636c6 100644
--- a/board/freescale/mx7ulp_evk/plugin.S
+++ b/board/freescale/mx7ulp_evk/plugin.S
@@ -115,15 +115,6 @@
ldr r1, =0x33333333
str r1, [r0, #0x828]
- ldr r1, =0xf3333333
- str r1, [r0, #0x82c]
- ldr r1, =0xf3333333
- str r1, [r0, #0x830]
- ldr r1, =0xf3333333
- str r1, [r0, #0x834]
- ldr r1, =0xf3333333
- str r1, [r0, #0x838]
-
ldr r1, =0x24922492
str r1, [r0, #0x8c0]
ldr r1, =0x00000800
@@ -151,9 +142,9 @@
ldr r1, =0xC3190000
str r1, [r0, #0x0]
- ldr r1, =0x00008050
+ ldr r1, =0x00008010
str r1, [r0, #0x1c]
- ldr r1, =0x00008058
+ ldr r1, =0x00008018
str r1, [r0, #0x1c]
ldr r1, =0x003F8030
str r1, [r0, #0x1c]