| commit | b5369c5813aa407139fc137ccbd0944190f15ebc | [log] [tgz] |
|---|---|---|
| author | Bin Meng <bmeng.cn@gmail.com> | Wed Sep 26 06:55:17 2018 -0700 |
| committer | Andes <uboot@andestech.com> | Wed Oct 03 17:48:14 2018 +0800 |
| tree | a344c53febb288b4e740dce7cc70c3efa91580fc | |
| parent | ed49ba4dcccb21cee1c32427cf5bbf09521cd8dd [diff] |
riscv: Make start.S available for all targets Currently start.S is inside arch/riscv/cpu/ax25/, but it can be common for all RISC-V targets. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de>