Merge git://www.denx.de/git/u-boot
Conflicts:
CREDITS
diff --git a/CHANGELOG b/CHANGELOG
index 184e941..82b3145 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -1,3 +1,6674 @@
+commit 135e19bc2773ebca487e9a8371f67e1ba202313a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 18 21:36:35 2007 +0200
+
+ Avoid compiler warning.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8a783a65851bc7421ab69f442261215e21b8891a
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Sep 18 12:24:57 2007 -0600
+
+ Bugfix: remove embedded null (\0) from CFG_BOOTFILE macro in TQM8540_config
+
+ /bin/bash and /bin/dash (which /bin/sh is linked to on ubuntu) handle embedded
+ nulls in a string differently. For example, the following statement:
+ echo "this is a string\0" > afile
+ Will produce the following with /bin/bash:
+ "this is a string\0"
+ But with /bin/dash, will produce:
+ "this is a string
+
+ Bug fixed by moving the embedded null out of the makefile and into the
+ config header. Also renamed the macro to avoid usage colision with the same
+ macro used by other board ports.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f8d3ca7b6fa322ac57e8e831f07dbeea039a9f35
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Sep 18 17:40:27 2007 +0200
+
+ MCC200: fix build warning
+
+ The MCC200 board config file includes version.h for some customer-
+ specific setting, which causes warnings with "make depend"; build
+ version.h before depend.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 67c31036acaaaa992fc346cc89db0909a7e733c4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 16 17:10:04 2007 +0200
+
+ TQM8xx[LM]: Fix broken environment alignment.
+
+ With recent toolchains, the environment sectors were no longer aligned to
+ sector boundaries. The reason was a combination of two bugs:
+
+ 1) common/environment.c assumed that CONFIG_TQM8xxL would be defined
+ for all TQM8xxL and TQM8xxM boards. But "include/common.h", where
+ this gets defined, is not included here (and cannot be included
+ without causing lots of problems).
+
+ Added a new #define CFG_USE_PPCENV for all boards which really
+ want to put the environment is a ".ppcenv" section.
+
+ 2) The linker scripts just include environment.o, silently assuming
+ that the objects in that file are really in the order in which
+ they are coded in the C file, i. e. "environment" first, then
+ "redundand_environment", and "env_size" last. However, current
+ toolchains (GCC-4.x) reorder the objects, causing the environment
+ data not to start on a flash sector boundary:
+
+ Instead of: we got:
+
+ 40008000 T environment 40008000 T env_size
+ 4000c000 T redundand_environment 40008004 T redundand_environment
+ 40010000 T env_size 4000c004 T environment
+
+ Note: this patch fixes just the first part, and cures the alignment
+ problem by making sure that "env_size" gets placed correctly. However,
+ we still have a potential issue because primary and redundant
+ environment sectors are actually swapped, i. e. we have now:
+
+ 40008000 T redundand_environment
+ 4000c000 T environment
+ 40010000 T env_size
+
+ This shall be fixed in the next version.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit eb6da8050797c204c9d010548424186c7ce32fc1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 16 02:39:35 2007 +0200
+
+ TQM8xx/FPS8xx: adjust flash partitions for 2.6 ARCH=powerpc kernels
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit cd2d1602c54cc6957bdef3872272a4b264893960
+Author: urwithsughosh@gmail.com <urwithsughosh@gmail.com>
+Date: Mon Sep 10 14:54:56 2007 -0400
+
+ Typo fix in tsec.c
+
+ Fixup for the break statement in wrong place.
+
+ [Patch by urwithsughosh@gmail.com]
+ Acked-by: Andy Fleming <afleming@freescale.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5bd7fe9aeb76906371f40b8fd07613f10922e3e7
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Tue Sep 11 17:04:00 2007 +0200
+
+ Fix do_div() usage in nand process output
+
+ Fix usage of do_div() in nand erase|read|write process output.
+
+ The last patch to nand_util.c introduced do_div() instead of libgcc's
+ implementation. But do_div() returns the quotient in its first
+ macro parameter and not as result.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit c750d2e6692a000a82f29de7bf24e3dc21239161
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Wed Sep 12 12:36:53 2007 +0200
+
+ NAND: Add CFG_NAND_QUIET option
+
+ This config option sets the default for the progress information
+ output behavior that can also be configured through the 'quiet'
+ environment variable.
+
+ The legacy NAND code does not print the current progress info
+ on the console. So this option is for backward compatibility for
+ units that are in the field and where setting the quiet variable
+ is not an option. With CFG_NAND_QUIET set to '1' the console
+ progress info is turned off. This can still be overwritten
+ through the environment variable.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit dcb88630290d2bcd803386dd4c2be73142994c4f
+Author: Liew Tsi Chung-r5aahp <Tsi-chung.Liew@freescale.com>
+Date: Thu Sep 13 16:06:05 2007 -0700
+
+ ColdFire: fix build error becasue of bad type of mii_init()
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 314d5b6ce52a4ed19dd295d1364e246c5e605017
+Author: Liew Tsi Chung-r5aahp <Tsi-chung.Liew@freescale.com>
+Date: Thu Sep 13 16:04:05 2007 -0700
+
+ ColdFire: Fix build error caused by pixis.c
+
+ Moved the #include <asm/cache.h> inside the #ifdef CONFIG_FSL_PIXIS.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit e21659e30660a1377c42af135a6114efe39801d9
+Author: Sam Sparks <SSparks@twacs.com>
+Date: Fri Sep 14 11:14:42 2007 -0600
+
+ Update MPC8349ITX*_config to place config.tmp in right place.
+
+ MPC834ITX*_config does not store config.tmp at the correct locatation,
+ causing MPC8349ITXGP to have the wrong TEXT_BASE.
+
+ Signed-off-by: Sam Sparks <SSparks@twacs.com>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 1218abf1b5817a39a82399b4b928b00750575bda
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Sep 15 20:48:41 2007 +0200
+
+ Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as global
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 66b3f24d665be678a9dbb125b1e84185400f63b5
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Sat Sep 15 11:55:42 2007 +0200
+
+ Make DECLARE_GLOBAL_DATA_PTR global for DaVinci
+
+ As discussed in [1], DECLARE_GLOBAL_DATA_PTR has to be global and not
+ function local.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+ [1] http://article.gmane.org/gmane.comp.boot-loaders.u-boot/31805
+
+commit 6e7b7b6ea1b6d04dbe96242eb6a0c1c664c98e8c
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Thu Sep 13 18:21:48 2007 +0200
+
+ cm5200: Fix a typo introduced by afaac86fe2948ac84cd9a12bbed883b3c683e7d9
+
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+
+commit f34024d4a328e6edd906456da98d2c537155c4f7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Sep 12 00:48:57 2007 +0200
+
+ Fix memory corruption problem on STX GP3 SSA Board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 38ad82da0c1180ecdeb212a8f4245e945bcc546e
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Sep 11 15:42:11 2007 +0200
+
+ [GP3SSA] Add define CONFIG_MPC85XX_PCI2 in config file to allow u-boot to
+ scan on second pci bus.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 6c2f4f388e8181655ea8b69343ea00b68aa6e8d0
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Sep 11 12:57:52 2007 +0200
+
+ [ppc4xx] Individual handling of sdram.c for bamboo_nand build
+
+ Bamboo has a file sdram.c which needs special treatment when building in
+ separate directory. It has to be linked to build directory otherwise it is
+ not seen.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 38c1ef728d19950414a8ab1ccfc53767848fa346
+Author: Sean MCGOOGAN <sean.mcgoogan@st.com>
+Date: Mon Sep 10 16:55:59 2007 +0100
+
+ Allocate CPU Architecture Code for STMicroelectronics' ST200.
+
+ Signed-off-by: Sean McGoogan <Sean.McGoogan@st.com>
+ ---------------------------------------------------
+
+commit 754bac48156f8958d8f6a53a51eda88ab5758929
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Sep 10 20:42:31 2007 +0200
+
+ Update version to match current state.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 7a888d6b3c32a126dbb504ef146bb4c26574ca7b
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Mon Sep 10 17:39:08 2007 +0200
+
+ [MPC512x] Streamline frame handling in the FEC driver
+
+ - convert frame size settings to be derived from a single base
+ - set frame size to the recommended default value
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit e251e00d0db4b36d1d2b7e38fec43a7296b529a2
+Author: Kyungmin Park <kmpark@infradead.org>
+Date: Mon Sep 10 11:34:00 2007 +0900
+
+ Remove compiler warning: target CPU does not support interworking
+
+ Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
+
+commit 1d9e31e04911a6bb7cc66dd91132c699101c32e2
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Sep 9 21:21:33 2007 +0200
+
+ Fix compile error in spc1920 config.
+
+ Signed-off-by: Markus Klotzbücher <mk@denx.de>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a7d7eca791a37f452c9da10fef4b31dd7aa9a622
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Fri Sep 7 09:25:07 2007 -0600
+
+ Bugfix: make bootm+libfdt compile on boards with no flash
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 6efc1fc0b63e55f94c5bc61d8dd23c918e3bc778
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 18:35:37 2007 +0200
+
+ [PPC440SPe] PCIe environment settings for Katmai and Yucca
+
+ - 'pciconfighost' is set by default in order to be able to scan bridges
+ behind the primary host/PCIe
+
+ - 'pciscandelay' env variable is recognized to allow for user-controlled
+ delay before the PCIe bus enumeration; some peripheral devices require a
+ significant delay before they can be scanned (e.g. LSI8408E); without the
+ delay they are not detected
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 7f1913938984ef6c6a46cb53e003719196d9c5de
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 18:20:23 2007 +0200
+
+ [PPC440SPe] Improve PCIe configuration space access
+
+ - correct configuration space mapping
+ - correct bus numbering
+ - better access to config space
+
+ Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the
+ first device on the first bus. We now allow to configure up to 16 buses;
+ also, scanning for devices behind the PCIe-PCIe bridge is supported, so
+ peripheral devices farther in hierarchy can be identified.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 15ee4734e4e08003d73d9ead3ca80e2a0672e427
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 17:46:18 2007 +0200
+
+ [PPC440SPe] Convert machine check exceptions handling
+
+ Convert using fixup mechanism to suppressing MCK for the duration of config
+ read/write transaction: while fixups work fine with the case of a precise
+ exception, we identified a major drawback with this approach when there's
+ an imprecise case. In this scenario there is the following race condition:
+ the fixup is (by design) set to catch the instruction following the one
+ actually causing the exception; if an interrupt (e.g. decrementer) happens
+ between those two instructions, the ISR code is executed before the fixup
+ handler the machine check is no longer protected by the fixup handler as it
+ appears as within the ISR code. In consequence the fixup approach is being
+ phased out and replaced with explicit suppressing of MCK during a PCIe
+ config read/write cycle.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit ff7640c9ead8806b5d827f2b29f9cb2632add729
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Sep 7 17:43:36 2007 +0200
+
+ Fix typo in MAKEALL script.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 08e2e5fcd2e06670b62e1680a3934c0e55c72810
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Sep 7 17:09:21 2007 +0200
+
+ [MPC512x] Proper handling of larger frames in the FEC driver
+
+ When frame larger than local RX buffer is received, it is split and handled
+ by two buffer descriptors. Prior to this patch the FEC driver discarded
+ contents of a buffer descriptor without the 'LAST' bit set, so the first
+ part of the frame was lost in case of larger frames. This fix allows to
+ safely combine the two pieces into the whole frame.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+
+commit 8d17979d0359492a822a0a409d26e3a3549b4cd4
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Fri Sep 7 17:05:36 2007 +0200
+
+ [MPC512x] Correct fixup relocation
+
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit a89cbbd27a60e6740772000fd0688ffba1c2576a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Sep 7 01:21:25 2007 +0200
+
+ Update CHANGELOG, minor coding style cleanup.
+
+commit 5e5803e119de3bebd76fc9a57baac0b5aeccc8a3
+Author: stefano babic <sbabic@denx.de>
+Date: Thu Aug 30 23:01:49 2007 +0200
+
+ PXA270: Added support for TrizepsIV board.
+
+ This patch add support for the Trizeps IV module (520Mhz).
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 80172c6181c912fbb34ea3ba0c22b232b419b47f
+Author: stefano babic <sbabic@denx.de>
+Date: Thu Aug 30 22:57:04 2007 +0200
+
+ PXA270: Add support for multiple serial ports.
+
+ This patch adds support for multiple serial ports to the PXA target.
+ FFUART, BTUART and STUART are supported.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 28bb3f72c687ac6b2eb076b01dd21a5fd657d45e
+Author: stefano babic <sbabic@denx.de>
+Date: Thu Aug 30 22:48:47 2007 +0200
+
+ PXA270: fix compile issue (invalid lvalue)
+
+ Code is broken for PXA270 due to "invalid lvalue in assignment".
+
+ This patch fix it in pxa-regs.h
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 1d2ca446e1a731df420206d04fe278c27ea6b8e8
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Thu Aug 30 18:19:05 2007 +0800
+
+ Add BUILD_DIR support for bios emulator.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit b4d8a55145442f136982634862341a3e02002bda
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Fri Aug 31 14:41:51 2007 +0900
+
+ [MIPS] Remove inline asm string functions
+
+ Stop using inline string functions on MIPS as other ARCHs do so,
+ since the optimized inline asm versions are not small.
+
+ This change is triggered by a following MIPS build error:
+ common/libcommon.a(exports.o)(.text+0xdc): In function `jumptable_init':
+ common/exports.c:32: undefined reference to `strcmp'
+ make: *** [u-boot] Error 1
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 8ea2c4e54833deaebc24c3ca6b7f21353c25b0f5
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Fri Aug 31 14:41:45 2007 +0900
+
+ [MIPS] Update asm string header
+
+ This patches contains several bugfixes and cleanups in the latest upstream:
+
+ - Don't include linux/config.h
+ - Remove buggy inline version of memscan.
+ - Merge with Linux 2.6.11-rc3.
+ - Fix undefined reference to strcpy in binfmt_misc caused by gcc 3.4.
+ - Goodbye mips64. 31704 lines of code bite the dust.
+ - Replace extern inline with static inline.
+ - Fix return value of strncpy.
+ - Remove a bunch more "$1" clobbers.
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 5b729fb3bd98f49855d6bfc657c3fbae95f2adc2
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue Sep 4 17:31:22 2007 +0200
+
+ Fix do_bootm_linux() so that multi-file images with FDT blob boot.
+
+ Fix incorrect blob address calculation in do_bootm_linux() that prevents
+ booting the kernel from a multi-file image (kernel + initrd + blob).
+
+ Also, make minor updates to the U-Boot's output and to the coding style.
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 041a2554ad619e80dce520c1a33210affcb6a3f2
+Author: Gary Jennejohn <gary.jennejohn@freenet.de>
+Date: Fri Aug 31 14:29:04 2007 +0200
+
+ Add support for Sil680 IDE controller.
+
+ o add drivers/sil680.c to support the Sil680 IDE-controller.
+ o drivers/Makefile: add sil680.o.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+
+commit e79021223bc339df655e360645a52c457a74b067
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Thu Sep 6 09:47:40 2007 -0600
+
+ bootm/fdt: Only process the fdt if an fdt address was provided
+
+ Boards with CONFIG_OF_LIBFDT enabled are not able to boot old-style
+ kernels using the board info structure (instead of passing a device tree)
+ This change allows the old style booting to be used if the fdt argument
+ was not passed to 'bootm'.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+ Acked-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit cf2817a84c2e9bea2c5dfc084bce2f2d2563ac43
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Thu Sep 6 09:46:23 2007 -0600
+
+ Migrate 5xxx boards from CONFIG_OF_FLAT_TREE to CONFIG_OF_LIBFDT
+
+ Affects boards: icecube (lite5200), jupiter, motionpro, tqm5200
+
+ Tested on: lite5200b
+
+ Note: the fixup functions have not been moved to a common place. This
+ patch is targeted for immediate merging as in solves a build issue, but
+ the final name/location of the fixups is still subject to debate. I
+ propose to merge this now, and move the fixups in the next merge window
+ to be usable by all targets.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 41bb76e941929f54a73206fb132f7a4c275543a3
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Thu Sep 6 09:46:17 2007 -0600
+
+ libfdt: add convenience function fdt_find_and_setprop()
+
+ Given the path to a node, fdt_find_and_setprop() allows a property value
+ to be set directly.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 56a9270521baaa00e12639a978302a67f61ef060
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 30 16:18:18 2007 -0500
+
+ Fix ULI RTC support on MPC8544 DS
+
+ The RTC on the M1575 ULI chipset requires a dummy read before
+ we are able to talk to the RTC. We accomplish this by adding a
+ second memory region to the PHB the ULI is on and read from it.
+
+ The second region is added to maintain compatiabilty with Linux's
+ view of the PCI memory map.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit f75e89e9b5714db2b0e80074071dfbdd6f59488a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Aug 30 01:58:48 2007 -0500
+
+ ft_board_setup update 85xx/86xx of pci/pcie bus-range property.
+
+ pcie is now differentiated from pci. Add 8641 bus-range updates.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 81b73dec16fd1227369a191e725e10044a9d56b8
+Author: Gary Jennejohn <garyj@denx.de>
+Date: Fri Aug 31 15:21:46 2007 +0200
+
+ ppc4xx: (Re-)Enable CONFIG_PCI_PNP on AMCC 440EPx Sequoia
+
+ The 440EPx has a problem when the PCI_CACHE_LINE_SIZE register is
+ set to non-zero, because it doesn't support MRM (memory-read-
+ multiple) correctly. We now added the possibility to configure
+ this register in the board config file, so that the default value
+ of 8 can be overridden.
+
+ Here the details of this patch:
+
+ o drivers_pci_auto.c: introduce CFG_PCI_CACHE_LINE_SIZE to allow
+ board-specific settings. As an example the sequoia board requires 0.
+ Idea from Stefan Roese <sr@denx.de>.
+ o board/amcc/sequoia/init.S: add a TLB mapping at 0xE8000000 for the
+ PCI IO-space. Obtained from Stefan Roese <sr@denx.de>.
+ o include/configs/sequoia.h: turn CONFIG_PCI_PNP back on and set
+ CFG_PCI_CACHE_LINE_SIZE to 0.
+
+ Signed-off-by: Gary Jennejohn <garyj@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 60174746c668b309378a91488dded898e9553eae
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Aug 31 10:01:51 2007 +0200
+
+ Fix TFTP OACK code for short packets.
+
+ The old code had a loop limit overflow bug which caused a semi-
+ infinite loop for small packets, because in "i<len-8", "i" was signed,
+ but "len" was unsigned, and "len-8" became a huge number for small
+ values of "len".
+
+ This is a workaround which replaces broken commit 8f1bc284.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit ff13ac8c7bbebb238e339592de765c546dba1073
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 30 14:42:15 2007 +0200
+
+ Backout commit 8f1bc284 as it causes TFTP to fail.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 1900fbf255acba8b94fb442a16408ea85a1d46a6
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Aug 30 02:26:17 2007 -0500
+
+ Revert "Fix MPC8544DS PCIe3 scsi."
+
+ This reverts commit 9468e680.
+ Commit 16e23c3f5da removing allocation of PCSRBAR is sufficient.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 8f1bc28408ded213418d9bc0780c7d8fb8a03774
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Wed Aug 29 18:26:24 2007 -0600
+
+ tftp: don't implicity trust the format of recevied packets
+
+ The TFTP OACK code trusts that the incoming packet is formated as
+ ASCII text and can be processed by string functions. It also has a
+ loop limit overflow bug where if the packet length is less than 8, it
+ ends up looping over *all* of memory to find the 'blksize' string.
+
+ This patch solves the problem by forcing the packet to be null
+ terminated and using strstr() to search for the sub string.
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 2602a5c40ae37ab965a4e240854fdaffb51328a4
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 29 09:06:05 2007 -0500
+
+ sbc8641: remove unused OF_FLAT_TREE_MAX_SIZE
+
+ this had slipped through the cracks, since the sbc board was added
+ after I wrote the original patch to remove all these symbols, and
+ before it was merged.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit c5bded3c88e48ae648a75d357dc81a8255fa81f1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 29 14:05:30 2007 +0200
+
+ Add mii_init() prototype
+
+ to get rid of a *lot* of compiler warnings.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 2d1f23aa1e74e4a8f8ffa67f246eb98c522dfd7f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 29 13:35:03 2007 +0200
+
+ Disable network support on cmi_mpc5xx board
+
+ ..because it caused compiler errors and there seems to be no
+ board maintainer to take care of this.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 9468e6804b7e25b0f6f52e53f47bce3175400a16
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Mon Aug 20 09:44:00 2007 -0500
+
+ Fix MPC8544DS PCIe3 scsi.
+
+ <ed.swarthout@freescale.com>
+
+ The problem is pciauto_setup_device() getting called from fsl_pci_init.c
+ is allocating memory space it doesn't need.
+
+ Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 4bf4abb8a4e9955556b120a1aafa30c03e74032a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Aug 21 09:38:59 2007 -0500
+
+ 8548cds fixes
+
+ Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the
+ correct consoledev needed for linux boot.
+ Standardize on fdt{file,addr} var to hold dtb file name.
+
+ Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 7a1ac419fa0d2d23ddd08bd61d16896a9f33c933
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Thu Aug 23 15:20:54 2007 -0400
+
+ Enable L2 cache for MPC8568MDS board
+
+ The L2 cache size is 512KB for 8568, print out the correct informaiton.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 94c47fdaf14cb29fa3fb4d4da2efdd96c803b46b
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Wed Aug 22 17:54:49 2007 +0800
+
+ Remove the bios emulator binary files from MAI board
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 7608d75f9c87c9eb5b3a43219d0506d3e979a13f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Aug 21 17:00:17 2007 -0500
+
+ support board vendor-common makefiles
+
+ if a board/$(VENDOR)/common/Makefile exists, build it.
+
+ also add the first such case, board/freescale/common/Makefile, to
+ handle building board-shared EEPROM, PIXIS, and MDS-PIB code, as
+ dictated by board configuration.
+
+ thusly get rid of alternate build dir errors such as:
+
+ FATAL: can't create /work/wd/tmp/u-boot-ppc/board/freescale/mpc8360emds/../common/pq-mds-pib.o: No such file or directory
+
+ by putting the common/ mkdir command in its proper place (the common
+ Makefile). Common bits from existing individual board Makefiles have
+ been removed.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit ef8f20752712dc1cdbd86f47e3bd6e35f81c83fd
+Author: stefano babic <sbabic@denx.de>
+Date: Tue Aug 21 15:52:33 2007 +0200
+
+ Fix: TFTP is not working on little endian systems
+
+ TFTP does not work anymore after multicast tftp
+ patch was applied on little endian systems.
+ This patch fix it.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 5f470948570526e9186f053a3003da7719604e90
+Author: stefano babic <sbabic@denx.de>
+Date: Tue Aug 21 15:50:33 2007 +0200
+
+ Fix MAC address setting in DM9000 driver.
+
+ The logic to check if there is a correct MAC address in the DM9000
+ EEPROM, added in the last patch, is wrong. Now the MAC address is
+ always taken from the environment, even if a suitable MAC is present
+ in the EEPROM.
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit 4a8527ef086ec7c89f40674ef024ae6f988a614a
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Tue Aug 21 12:40:34 2007 +0200
+
+ MPC5xxx: fix some compiler warnings in USB code
+
+ Fix the following warnings:
+ - usb.c:xx: warning: function declaration isn't a prototype
+ - usb_ohci.c:xxx: warning: passing argument 1 of '__fswab32' makes integer
+ from pointer wihtout a cast
+
+ Signed-off-by: Martin Krause <martin.krase@tqs.de>
+
+commit 16e23c3f5dab6937f5109365416808c7f15c122b
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Mon Aug 20 23:55:33 2007 -0500
+
+ fsl_pci_init - Remove self PCSRBAR allocation
+
+ CPU physical address space was being wasted by allocating a
+ PCSRBAR PCI inbound region to it's memory space.
+
+ As a rule, PCSRBAR should be left alone since it does not affect
+ transactions from self and other masters may have changed it.
+
+ Signed-off-by: Ed Swarthout <ed.swarthout@freescale.com>
+
+commit 0e700ce03a23bb1921149bc77008ace7103d5289
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Mon Aug 20 13:56:47 2007 +0200
+
+ Fix compiler warning in include/s3c2410.h
+
+ This patch fixes the "type qualifiers ignored on fuction return tpye"
+ warning for include/s3c2410.h
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit 9bb8b209ed2058a5756ecbeb544c067e44a42aea
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Mon Aug 20 07:09:05 2007 +0200
+
+ Fix compilation error for omap2420h4_config.
+
+ omap2420h4 switched to cfi, so remove old (already disabled) flash.c
+ and flash_probe() calls in env_flash.c.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+commit 3bb342fc85d79dbb6b8c2039e7cdcddc82b8d90f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Aug 10 14:34:14 2007 -0500
+
+ fdt: remove unused OF_FLAT_TREE_MAX_SIZE references
+
+ and make some minor corrections to the FDT part of the README.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6af2eeb1e99c2dcc584d4c5ab7fcae30a325f4de
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Aug 29 01:32:05 2007 +0200
+
+ Minor coding style cleanup.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a861558c65f65f1cf1302f3a35e9db7686b9e1a3
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Tue Aug 28 17:40:33 2007 +0200
+
+ [UC101] Fix: if no CF in the board, U-Boot resets sometimes.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit f98984cb194bb34dbe1db9429d3b51133af30d07
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Tue Aug 28 17:39:14 2007 +0200
+
+ IDE: - make ide_inb () and ide_outb () "weak", so boards can
+ define there own I/O functions.
+ (Needed for the pcs440ep board).
+ - The default I/O Functions are again 8 Bit accesses.
+ - Added CONFIG_CMD_IDE for the pcs440ep Board.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 9c02defc29b57945b600714cf61ddfd02b02fb14
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Sat Aug 25 05:07:16 2007 +0200
+
+ POST: limit memory test area to not touch global data anymore
+
+ As experienced on lwmon5, on some boards the POST memory test can
+ corrupt the global data buffer (bd). This patch fixes this issue
+ by checking and limiting this area.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 75e1a84d483e36be10e206e539b028c4889e1158
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 24 15:41:42 2007 +0200
+
+ ppc4xx: Add RTC POST test to lwmon5 board configuration
+
+ Since this RTC POST test is taking quite a while to complete
+ it's only initiated upon special keypress same as the complete
+ memory POST.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d7bfa620037a6d2210159387571bdf93aa32c162
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 24 15:19:10 2007 +0200
+
+ ppc4xx: Change GPIO signal for watchdog triggering on lwmon5
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c25dd8fc25e9ca3695db996a257d9ba4dab414db
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 23 11:02:37 2007 +0200
+
+ ppc4xx: Add support for 2nd I2C EEPROM on lwmon5 board
+
+ This patch adds support for the 2nd EEPROM (AT24C128) on the lwmon5
+ board. Now the "eeprom" command can be used to read/write from/to this
+ device. Additionally a new command was added "eepromwp" to en-/disable
+ the write-protect of this 2nd EEPROM.
+
+ The 1st EEPROM is not affected by this write-protect command.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c64fb30e4c5976007d56fc1789c7a0666082b536
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Aug 22 08:56:09 2007 +0200
+
+ ppc4xx: Remove unused option CFG_INIT_RAM_OCM
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3ad63878737a5a2b1e60825bf0a7d601d7a695e7
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 21 16:27:57 2007 +0200
+
+ ppc4xx: Add matrix kbd support to lwmon5 board (440EPx based)
+
+ This patch adds support for the matrix keyboard on the lwmon5 board.
+ Since the implementation in the dsPCI is kind of compatible with the
+ "old" lwmon board, most of the code is copied from the lwmon
+ board directory.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3e66c078003607a7d1d214c15a5f262bc1b4032f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 19 10:27:34 2007 +0200
+
+ Fix some build errors.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 05675735ef77dc23b5e0eb782bad1ff477b55e86
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Aug 18 22:00:38 2007 +0200
+
+ Update CHANGELOG.
+
+commit 79f240f7ecc0506b43ac50d1ea405ff6540d4d57
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:52:39 2007 -0500
+
+ lib_ppc: make board_add_ram_info weak
+
+ platforms wishing to display RAM diagnostics in addition to size,
+ can do so, on one line, in their own board_add_ram_info()
+ implementation.
+
+ this consequently eliminates CONFIG_ADD_RAM_INFO.
+
+ Thanks to Stefan for the hint.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 815b5bd5b18569917c3e04b9757511e6ed23b9f6
+Author: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+Date: Fri Aug 17 12:43:44 2007 +0900
+
+ PCI_READ_VIA_DWORD_OP: Fix *val uninitialized bug
+
+ This patch has been sent on:
+ - 6 Jun 2007
+
+ Many users of PCI config read routines tend to ignore the function
+ ret value, and are only concerned about the contents of *val. Based
+ on this, pci_hose_read_config_{byte,word}_via_dword should initialize
+ the *val on dword read error.
+
+ Without this fix, for example, we'll go on scanning bus with vendor or
+ header_type uninitialized. This brings many unnecessary config trials.
+
+ Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+
+commit 26667b7fa05a8bf2fc65fb9f3230b02b1a10c367
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Aug 18 14:37:52 2007 +0200
+
+ ColdFire: Fix some remaining problems with CFG_CMD_
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8280f6a1c43247616b68224675188e5ccd124650
+Author: Stefan Roese <sr@denx.de>
+Date: Sat Aug 18 14:33:02 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 4a442d3186b31893b4f77c6e82f63c4517a5224b
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 19:23:50 2007 -0500
+
+ ColdFire: Add M5235EVB Platform for MCF523x
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 4cc1cd5941827a04cf5c51a07fcc42e8945894aa
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Aug 17 09:30:00 2007 -0500
+
+ mpc83xx: fix typo in DDR2 programming
+
+ introduced in the implement board_add_ram_info patch as I was cleaning out the
+ magic numbers. sorry.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e58fe95784d2514fc9c21028dc59f2b319a35d80
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:53:09 2007 -0500
+
+ mpc83xx: move freescale boards to boards/freescale
+
+ includes build fixes.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5aa4ad8d8e7e9468219990c7875d5fdc9e962f47
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:52:59 2007 -0500
+
+ mpc83xx: suppress unused variable 'val8' warning
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit bbea46f76f767b919070b4829bf34c86bd223248
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu Aug 16 22:52:48 2007 -0500
+
+ mpc83xx: implement board_add_ram_info
+
+ add board_add_ram_info, to make memory diagnostic output more
+ consistent. u-boot banner output now looks like:
+
+ DRAM: 256 MB (DDR1, 64-bit, ECC on)
+
+ and for boards with SDRAM on the local bus, a line such as this is
+ added:
+
+ SDRAM: 64 MB (local bus)
+
+ also replaced some magic numbers with their equivalent define names.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 14778585d1389d86d5846efec29e5fce892680ce
+Author: Tony Li <tony.li@freescale.com>
+Date: Fri Aug 17 10:35:59 2007 +0800
+
+ mpc83xx: Split PIB init code from pci.c and add Qoc3 ATM card support
+
+ The patch split the PIB init code from pci.c to a single file board/freescale/common/pq-mds-pib.c
+ And add Qoc3 ATM card support for MPC8360EMDS and MPC832XEMDS board.
+
+ Signed-off-by Tony Li <tony.li@freescale.com>
+
+commit 8ae158cd87a4a25722b27835261b6ff0fa2aa6a7
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 15:05:11 2007 -0500
+
+ ColdFire: Add M54455EVB for MCF5445x
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a1436a842654a8d3927d082a8ae9ee0a10da62d7
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 13:20:50 2007 -0500
+
+ ColdFire: Add M5253EVBE platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a605aacd8324094199402816cc6d9124aba57b8d
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Aug 16 05:04:31 2007 -0500
+
+ ColdFire: Add M5249EVB platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit f28e1bd9daa6de5eb33ae4822bda6b008ccb4e9e
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 20:32:06 2007 -0500
+
+ ColdFire: Update Freescale MCF52x2 platforms
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 870470dbf6f4bb9864e0d97aeedbc17c167c6d1c
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:55:10 2007 -0500
+
+ ColdFire: Update EB+MCF-EV123 platform
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit aa93d859d9b1fcd8eea52d51b06e86c38f72111b
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:46:38 2007 -0500
+
+ ColdFire: update TASREG platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a9505510bf56a9b5558248dd8b73ec9d9a1556a2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:45:51 2007 -0500
+
+ ColdFire: update r5200 platform for MCF52x2
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 6cfd3c7bc813fb317ab7c0781f0d1874b1c0877c
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:43:20 2007 -0500
+
+ ColdFire: idmr platform MCF52x2 update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 6706424d0bb851fb52af00cd1c3301e91ee7f2b0
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:41:06 2007 -0500
+
+ ColdFire: cobra5272 platform for MCF52x2 update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 56115665b4a64c10c01440c57749b265e0908fa4
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:38:15 2007 -0500
+
+ ColdFire: MCF52x2 Header files update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 83ec20bc4380eebddfde45da6e3a69a92d4db21d
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 19:21:21 2007 -0500
+
+ ColdFire: MCF52x2 update
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit f52e78304dcc0ac459c0ea1fa5be275c7d1642cf
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 18:46:11 2007 -0500
+
+ ColdFire: MCF5329 update cache
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 7171977fb8fd77cfb6676953fa9a05789c450513
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 15:40:20 2007 -0500
+
+ ColdFire: MCF5329 header file clean up
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit ab77bc547ba561c25ea34457ed17aa0b2f7c2723
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Wed Aug 15 15:39:17 2007 -0500
+
+ ColdFire: MCF5329 Update and cleanup
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 10327dc5541f947c0cf7e31fef86c4706169607a
+Author: Andy Fleming <afleming@freescale.com>
+Date: Thu Aug 16 16:35:02 2007 -0500
+
+ Add CONFIG_HAS_ETH0 to all boards with TSEC
+
+ The 85xx code now relies on CONFIG_HAS_ETH0 to determine whether
+ to update TSEC1's device-tree node, so we need to add it
+ to all the boards with TSECs. Do this for 83xx and 86xx, too,
+ since they will eventually do something similar.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit d64ee908a1b525e5bb2b4cbeb5c449ad6a469666
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 16 15:05:04 2007 -0500
+
+ Update MPC8544 DS PCI memory map
+
+ The PCIe bus that the ULI M1575 is connected to has no possible way of
+ needing more than the fixed amount of IO & Memory space needed by the ULI.
+
+ So make it use far less IO & memory space and have it use the shared LAW. This
+ free's up a LAW for PCIe1 IO space. Also reduce the amount of IO space needed
+ by each bus.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit ea5877e31ed63ade948fd1293895ec23fe01472e
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Thu Aug 16 11:01:21 2007 -0500
+
+ Fix up some fdt issues on 8544DS
+
+ It looks like we had a merge issue that duplicated a bit of code
+ in ft_board_setup. Also, we need to set CONFIG_HAS_ETH0 to get
+ the MAC address properly set in the device tree on boot for TSEC1
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 07bc20560cb9d3d186cca268c05c82762e8c55ad
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Thu Aug 16 15:16:03 2007 +0200
+
+ PPC4xx:HCU4/5 cleanup
+
+ Minor cleanups to confirm to the u-boot coding style.
+ Some german expressions -> english.
+ HCU5 enforces a unique IP adress for a given slot in the rack.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 1e6b07c64967c1eb2cd84faa4c32bf2a769bc8eb
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Thu Aug 16 15:16:02 2007 +0200
+
+ PPC4xx:HCU4/5 cleanup ecc/sdram init
+
+ Make ecc initialisation robust, as DDR2-ECC errors may be generated
+ while zeroing the RAM.
+
+ Return 16 bytes (a cacheline) less than the available memory, as the
+ board and/or PPC440EPx might have problems accessing the last bytes.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit d35b508a55508535b6e8445b718585d27df733d3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:29:56 2007 -0500
+
+ fdt: suppress unused variable 'bd' warning
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 82bd9ee77490588d4da785d75829ca63d0176baf
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:06:50 2007 -0500
+
+ Fix warnings from of_data copy fix
+
+ Forgot to cast of_flat_tree to ulong.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 7613afda77d5eec0f47d303025b0c661b70e4c73
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:44 2007 -0500
+
+ Don't wait for disconnected TSECs
+
+ The TSEC driver's PHY code waits a long time for autonegotiation to
+ complete, even if the link is down. The PHY knows the link is
+ down or up before autonegotiation completes, so we can short-circuit
+ the process if the link is down.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit b96c83d4ae475a70ef2635cd0e748174c44c8601
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:34 2007 -0500
+
+ Fix numerous bugs in the 8568 UEC support
+
+ Actually, fixed a large bug in the UEC for *all* platforms.
+ How did this ever work?
+
+ uec_init() did not follow the spec for eth_init(), and returned
+ 0 on success. Switch it to return the link like tsec_init()
+ (and 0 on error)
+
+ The immap for the 8568 was defined based on MPC8568, rather than
+ CONFIG_MPC8568
+
+ CONFIG_QE was off
+
+ CONFIG_ETHPRIME was set to "Freescale GETH". Now is "FSL UEC0"
+
+ Fixed a comment about the ranges for CONFIG_ETHPRIME if TSEC_ENET is
+ enabled
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 3a79013e2adda53332dfd0b511066a805e929a9d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:25 2007 -0500
+
+ Define tsec flag values in config files
+
+ The tsec_info structure and array has a "flags" field for each
+ ethernet controller. This field is the only reason there are
+ settings. Switch to defining TSECn_FLAGS for each controller
+ in the config header, and we can greatly simplify the array, and
+ also simplify the addition of future boards.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit ec7238229507e7f47533a611ea8c53319d234cf3
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 20:03:13 2007 -0500
+
+ Add support for building all boards with a TSEC
+
+ Changes to the TSEC driver affect almost all 83xx, 85xx, and 86xx boards.
+ Now we can do a MAKEALL test on all of them!
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 10aaf716cb0dc6614df54ef78bed5144afd23ef8
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed Aug 15 17:30:56 2007 -0500
+
+ Fix of_data copying for CONFIG_OF_FLAT_TREE-using boards
+
+ The fix, "Fix where the #ifdef CFG_BOOTMAPSZ is placed"
+ neglected to *also* put the code inside the similar #ifdef
+ for CONFIG_OF_FLAT_TREE.
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 78f9fef7f406078c8bf7191e665a73f795157746
+Author: Scott Wood <scottwood@freescale.com>
+Date: Wed Aug 15 15:46:46 2007 -0500
+
+ mpc885ads: Don't define CONFIG_BZIP2.
+
+ bzip2 requires a significant chunk of malloc space, and there isn't
+ enough room on mpc885ads (with only 8MB RAM) for both bzip2's malloc area
+ and a downloaded image at 0x400000.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 002275a3ed8b114885f6702d6d544d0780dfe689
+Author: Michal Simek <Monstr@seznam.cz>
+Date: Thu Aug 16 08:54:10 2007 +0200
+
+ Bios emulator - fix microblaze toolchain problem
+
+ microblaze CPU have problem with bios_emulator code.
+ Microblaze toolchain doesn't support PRAGMA PACK.
+
+ Signed-off-by: Michal Simek <monstr@monstr.eu>
+
+commit a5a38f4fd7e5366d706ff6a985f9b6715ddbc98b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 16 11:51:04 2007 +0200
+
+ Minor Coding Style fix; Update CHANGELOG file.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8fb6e80c06849e3013ac5c9350d8ed9e52967991
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 11:21:49 2007 +0200
+
+ ppc4xx: Remove #warning in esd auto_update.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2d78074d2e806edc380c1464eb9e5df335ece65e
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 22 17:32:28 2007 +0200
+
+ ppc7xx: Update CPCI750 board
+
+ This small CPCI750 update extends the board specific command
+ "show_config" to display the Marvell strapping registers and
+ extends the PCI IDE controller.
+
+ Signed-off-by: Reinhard Arlt <reinhard.arlt@esd-electronics.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9de469bd960cc1870bb40d6672ed42726b8b50d7
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 10:18:33 2007 +0200
+
+ ppc4xx: Only enable POST FPU test on Sequoia and not Rainier
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6da0c5bd4a53e40eb4f7eb72a4c051ecabad783c
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 09:54:51 2007 +0200
+
+ Add missing rainier (PPC440GRx) target to MAKEALL and MAINTAINERs files
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 02ba7022f62bb75908296c58c63866e1d294b69a
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 16 09:52:29 2007 +0200
+
+ ppc4xx: Update Sequoia/Rainier bootstrap command
+
+ As suggested by David Mitchell, here an update for the Sequoia/Rainier
+ bootstrap command.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 35cc4e4823668e8745854899cfaedd4489beb0ef
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:39 2007 -0500
+
+ mpc83xx: enable libfdt by default on freescale boards
+
+ this enables libfdt code by default for the
+ freescale mpc8313erdb, mpc832xemds, mpc8349emds,
+ mpc8349itx and gp boards.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 3fde9e8b22cfbd7af489214758f9839a206576cb
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:33 2007 -0500
+
+ mpc83xx: migrate remaining freescale boards to libfdt
+
+ this adds libfdt support code for the freescale
+ mpc8313erdb, mpc832xemds, mpc8349emds, mpc8349itx,
+ and gp boards.
+
+ Boards remain compatible with OF_FLAT_TREE.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 6a16e0dfcc4119b46adb1dce2d6c8fb3c5d108e1
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:26 2007 -0500
+
+ mpc83xx: move common /memory node update mechanism to cpu.c
+
+ also adds common prototypes to include/common.h.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8f9e0e9f339aee4ce31a338d5f27356eb5457f85
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:19 2007 -0500
+
+ mpc83xx: remaining 8360 libfdt fixes
+
+ PCI clocks and QE frequencies weren't being updated, and the core clock
+ was being updated incorrectly. This patch also adds a /memory node if
+ it doesn't already exist prior to update.
+
+ plus some cosmetic trimming to single line comments.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit f4b2ac5ed9aaff9920d487bff8a59696c083a524
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:12 2007 -0500
+
+ mpc83xx: fix UEC2->1 typo in libfdt setup code
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 19fa1c35368484d4ed10ddce8a7793c21862e3a3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Aug 15 22:30:05 2007 -0500
+
+ mpc83xx: add MAINTAINER and MAKEALL entries for the mpc8323erdb
+
+ and reorder the existing 83xx maintainers alpha.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 30b52df9e906bf0e465916c2c6bb5192b438e0b8
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Aug 15 11:55:35 2007 -0500
+
+ 86xx: Fix lingering CFG_CMD_* references in sbc8641d.h
+
+ Remove a leftover in net/tftp.c while we're at it.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 4ce917742b1e48faa9bf9a9757545e56fb4cfe44
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Aug 15 12:20:40 2007 -0500
+
+ Move the MPC8641HPCN board under board/freescale.
+
+ Minor path corrections needed to ensure buildability.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8662577fe36fdb6a44b55b998d9daac6392a736a
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed Aug 15 11:46:22 2007 -0500
+
+ 86xx: Fix lingering CFG_CMD_* references in sbc8641d.h
+
+ Remove a leftover in net/tftp.c while we're at it.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 210f463c71917b7a4495c2103c228b9c179ae64d
+Author: Jerry Van Baren <gvb.uboot@gmail.com>
+Date: Wed Aug 15 11:13:15 2007 -0400
+
+ Fix where the #ifdef CFG_BOOTMAPSZ is placed.
+
+ Commit 073e1b509980cefe6f53c2d7fbbcd135df1e3924 "Fix initrd/dtb
+ interaction" put the new code outside of the #if defined(CONFIG_OF_LIBFDT)
+ when it should have gone inside of the conditional. As a result, it
+ broke non-LIBFDT board builds.
+
+ Also added a missing "not." to the comment.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 0e19209767194a97cec6d93dba9e64d1da8d548e
+Author: Niklaus Giger <niklaus.giger@netstal.com>
+Date: Wed Aug 15 12:14:23 2007 +0200
+
+ PPC4xx:HCU4/5-Board fix compile warning
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 594e79838ce5078a90d0c27abb2b2d61d5f8e8a7
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Aug 14 14:06:45 2007 -0500
+
+ Fix malloc size error in ahci_init_one.
+
+ Typically this causes scsi init to corrupt the
+ devlist and break the coninfo command.
+ Fix a compiler size warning.
+
+ Signed-off-by: Jason Jin <jason.jin@freescale.com>
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit b361acd64fd2525c081b9b288b0804efe209c0e9
+Author: ksi@koi8.net <ksi@koi8.net>
+Date: Tue Aug 14 10:02:16 2007 -0700
+
+ TI DaVinci - fix unsupported %hhx format
+
+ Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
+
+commit f01dbb5424a81453c81190dd30e945891466f621
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 14 18:42:36 2007 +0200
+
+ Coding style cleanup. Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 073e1b509980cefe6f53c2d7fbbcd135df1e3924
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 10:32:59 2007 -0500
+
+ Fix initrd/dtb interaction
+
+ The original code would wrongly relocate the blob to be right before
+ the initrd if it existed. The blob *must* be within CFG_BOOTMAPSZ,
+ if it is defined. So we make two changes:
+
+ 1) flag the blob for relocation whenever its address is above BOOTMAPSZ
+
+ 2) If the blob is being relocated, relocate it before kbd, not initrd
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit e54b970173769307a116bd34028b6d0c2eea2a4e
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 15:40:00 2007 +0100
+
+ Supply spi interface in at45.c
+
+commit 4ce846ec59f36b85d6644a769690ad3feb667575
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 15:12:01 2007 +0200
+
+ POST: Fix merge problem
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 429d9571f60631ae8a2fe12b11be4c75b0c2b37c
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 15:03:17 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 779e975117a75e91fcebe226a63104dbfb924ab1
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 14:44:41 2007 +0200
+
+ ppc4xx: Add initial Zeus (PPC405EP) board support
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c5a172a5fd636c12467429e3f7910e53773979c6
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 14:41:55 2007 +0200
+
+ POST: Add option for external ethernet loopback test
+
+ When CFG_POST_ETHER_EXT_LOOPBACK is defined, the ethernet POST
+ is not done using an internal loopback connection, but by assuming
+ that an external loopback connector is plugged into the board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit eb2b4010ae426245172988804ee8d9193fb41038
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Aug 14 14:39:44 2007 +0200
+
+ POST: Add ppc405 support to cache and UART POST
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0c42f36f15074bd9808a7dbd7ef611fad9bf537c
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:46:32 2007 +0100
+
+ Replace lost end of at45.c.
+
+commit 65d7ada64557e76094b4fd3bad30a0f18f5fb2b2
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:30:06 2007 +0100
+
+ Update Makefiles for merged and split at45.c.
+
+commit 3454cece2db57cb9eb7087995f7e73066a163f71
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:21:06 2007 +0100
+
+ Delete the merged files.
+
+commit dcbfd2e5649f97aa04fbbc6ea2b008aa4486e225
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:14:05 2007 +0100
+
+ Add the files.
+
+commit d4fc6012fd0a5c211b825691f44b06f8032c0551
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Tue Aug 14 10:10:52 2007 +0100
+
+ Add MACH_TYPE records for several AT91 boards.
+ Merge to two at45.c files into a common file, split to at45.c and spi.c
+ Fix spelling error in DM9161 PHY Support.
+ Initialize at91rm9200 board (and set LED).
+ Add PIO control for at91rm9200dk LEDs and Mux.
+ Change dataflash partition boundaries to be compatible with Linux 2.6.
+
+ Signed-off-by: Peter Pearse <peter.pearse@arm.com>
+ Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
+
+commit 4ef35e53c693556c54b0c22d6f873de87bade253
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 14 09:54:46 2007 +0200
+
+ Coding style cleanup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 85eb5caf6b906f7ec5b54814e8c7c74f55986bb7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 14 09:47:27 2007 +0200
+
+ Coding style cleanup; rebuild CHANGELOG
+
+commit 7f3f2bd2dc08e0b05e185662ca2e2d283757104a
+Author: Randy Vinson <rvinson@linuxbox.(none)>
+Date: Tue Feb 27 19:42:22 2007 -0700
+
+ 85xxCDS: Add make targets for legacy systems.
+
+ The PCI ID select values on the Arcadia main board differ depending
+ on the version of the hardware. The standard configuration supports
+ Rev 3.1. The legacy target supports Rev 2.x.
+
+ Signed-off-by Randy Vinson <rvinson@mvista.com>
+
+commit e41094c7e38177c755fbd9b182018069614f080d
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 01:50:09 2007 -0500
+
+ 85xxCDS: Enable the VIA PCI-to-ISA bridge.
+
+ Author: Randy Vinson <rvinson@linuxbox.(none)>
+
+ Enable the PCI-to-ISA bridge in the VIA Southbridge located on the
+ Arcadia main board.
+
+ Signed-off-by: Randy Vinson <rvinson@mvista.com>
+ Signed-off-by: York Sun <yorksun@freescale.com>
+
+commit da9d4610d76e52c4d20a8f3d8433439a7fcf5b71
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 00:14:25 2007 -0500
+
+ Add support for UEC to 8568
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit c59e4091ffe0148398b9e9ff14a019ea038b7432
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Jun 19 14:18:34 2007 -0400
+
+ Add PCI support for MPC8568MDS board
+
+ This patch is against u-boot-mpc85xx.git of www.denx.com
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+ Signed-off-by: Ebony Zhu <ebony.zhu@freescale.com>
+
+commit d111d6382c99fdea08c2312eeeae8786945e189a
+Author: Haiying Wang <Haiying.Wang@freescale.com>
+Date: Tue Jun 19 14:18:32 2007 -0400
+
+ Empirically set cpo and clk_adjust for mpc85xx DDR2 support
+
+ This patch is against u-boot-mpc85xx.git of www.denx.com
+
+ Setting cpo to 0x9 for frequencies higher than 333MHz is verified on
+ both MPC8548CDS board and MPC8568MDS board, especially for supporting
+ 533MHz DDR2.
+
+ Setting clk_adjust to 0x6(3/4 late cycle) for MPC8568MDS board is for
+ DDR2 on all current board versions especially ver 1.92 or later to bring
+ up.
+
+ Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
+
+commit 3db0bef59eab1155801618cef5c481e97553b597
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Tue Aug 7 18:07:27 2007 -0500
+
+ Use an absolute address when jumping out of 4k boot page
+
+ On e500 when we leave the 4k boot page we should use an absolute address since
+ we don't know where the board code may want us to be really running at.
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 39980c610c9a4c381907c9e1d1b9c0e1c0dca57a
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Aug 13 14:49:59 2007 -0500
+
+ MPC85xx BA bits not set for 3-bit bank address DIMM
+
+ The current implementation does not set the number of bank address bits
+ (BA) in the processor. The default assumes 2 logical bank bits. This
+ works fine for a DIMM that uses devices with 4 internal banks (SPD
+ byte17 = 0x4) but needs to be set appropriately for a DIMM that uses
+ devices with 8 internal banks (SPD byte17 = 0x8).
+
+ Signed-off-by: Greg Davis <DavisG@embeddedplanet.com>
+
+commit 6c543597bb4b1ecf5d8589f7abb0f39929fb7fd1
+Author: Andy Fleming <afleming@freescale.com>
+Date: Mon Aug 13 14:38:06 2007 -0500
+
+ Fix minor 85xx warnings
+
+ Some patches had inserted warnings into the build:
+ * mpc8560ads declared data without using it
+ * cpu_init declared ecm and immap without using it in all CONFIGs
+ * MPC8548CDS.h had its default filenames changed so that they contained
+ "\m" in the paths. Made the defaults not Windows-specific (or
+ anything-specific)
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit f2cff6b104f82b993bef6086ce0c97159bbe1add
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:52 2007 -0500
+
+ 8548cds PCIE support.
+
+ Make the early L1 cache stack region guarded to prevent speculative
+ fetches outside the locked range.
+
+ Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions.
+ init.S whitespace cleanup.
+
+ Allow TEXT_BASE value to be specified on command line. This allows it
+ to be set to 0xfffc0000 which cuts the uboot binary in half.
+
+ Clear and enable lbc and ecm errors.
+
+ Update last_busno in device-tree for pci and pcie.
+
+ Remove load of obsolete cpu/mpc85xx/pci.0
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 837f1ba05cfb248aba5ab8e1fb1bfeefa07d5962
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:51 2007 -0500
+
+ 8544ds PCIE support
+
+ PCI1 LAW mapping should use CFG_PCI1_MEM_PHY and not _BASE address.
+
+ Enable LBC and ECM errors and clear error registers.
+
+ Add tftpflash env var to get uboot from tftp server and flash it.
+
+ Add pci/pcie convenience env vars to display register space:
+ "run pcie3regs" to see all pcie3 ccsr registers
+ "run pcie3cfg" to see all cfg registers
+ Whitespace cleanup and MPC8544DS.h
+
+ Enable CONFIG_INTERRUPTS.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 61a21e980a7b9188424d04f1c265fdc5c21c7e85
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 01:34:21 2007 -0500
+
+ 85xx start.S cleanup and exception support
+
+ From: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+ Support external interrupts from platform to eliminate system hangs.
+ Define CONFIG_INTERRUPTS board configure option to enable.
+ Enable ecm, ddr, lbc, and pci/pcie error interrupts in PIC.
+
+ Remove extra cpu initialization redundant with hardware initialization.
+ Whitespace cleanup.
+
+ Define and use _START_OFFSET consistent with other processors using
+ ppc_asm.tmpl
+
+ Move additional code from .text to boot page to make room for
+ exception vectors at start of image.
+
+ Handle Machine Check, External and Critical exceptions.
+
+ Fix e500 machine check error determination in traps.c
+
+ TEXT_BASE can now be 0xfffc_0000 - which cuts binary image in half.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 7bd30fc4a6475b41d6679ae3aafc9fa505260c47
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Aug 14 01:33:18 2007 -0500
+
+ Add MPC8544DS README
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 40c7f9b0de4e300370adfc704128fa0f79a143b6
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:48 2007 -0500
+
+ 85xx allow debugger to configure ddr.
+
+ Only check for mpc8548 rev 1 when compiled for 8548.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 29372ff38c5baab7d0e3a8c14fe11fa194a38704
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:47 2007 -0500
+
+ mpc85xx L2 cache reporting and SRAM relocation option.
+
+ Allow debugger to override flash cs0/cs1 settings to enable alternate
+ boot regions
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 41f0f8fb1ab92f0cba7d329de90070f822f8299f
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:46 2007 -0500
+
+ e500 needs ppc_asm.tmp MCK_EXCEPTION
+
+ Always define MCK_EXCEPTION macro - so e500 can use it too.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 53a5c424bf8655b7b4e2c305a441963259a26a81
+Author: David Updegraff <dave@cray.com>
+Date: Mon Jun 11 10:41:07 2007 -0500
+
+ multicast tftp: RFC2090
+
+ Implemented IETF RFC2090, Multicast TFTP. Initial implementation
+ on Realtek RTL8139 and Freescale TSEC.
+
+ Signed-off-by: David Updegraff <dave@cray.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 5d110f0aa69f065ee386ec1840dfee1e8cc46bc1
+Author: Wilson Callan <wcallan@savantav.com>
+Date: Sat Jul 28 10:56:13 2007 -0400
+
+ New CONFIG_BOOTP_SERVERIP option
+
+ Added CONFIG_BOOTP_SERVERIP to allow the tftp server to be different
+ from the bootp server
+
+ Signed-off-by: Wilson Callan <wcallan@savantav.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 50cca8b976ec74069860208c36e64ce8f4d5e4c1
+Author: Mike Rapoport <mike@compulab.co.il>
+Date: Sun Aug 12 08:48:27 2007 +0300
+
+ Add ability to take MAC address from the environment to DM9000 driver
+
+ Signed-off-by: Mike Rapoport <mike@compulab.co.il>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit be5d72d10d47609326226225181e301fb9a33b58
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 13 21:57:53 2007 +0200
+
+ Minor coding style cleanup. Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit cca34967cbd13ff6bd352be29e3f1cc88ab24c05
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Sat Aug 11 06:54:58 2007 -0500
+
+ Modify SBC8641D to use new Freescale PCI routines
+
+ PCI-Express sockets 1 and 2 verified working with Intel Pro/1000 PT
+ adapter.
+
+ Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+ Signde-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a08458303e7f9db67f296980036d3292c35cb45c
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Fri Jun 29 18:38:51 2007 +0200
+
+ atmel_mci: Fix data timeout value
+
+ Calculate the data timeout based on values from the CSD instead of
+ just using a hardcoded DTOR value. This is a backport of a similar fix
+ in BSP 2.0, with one additional fix: the DTOCYC value is rounded up
+ instead of down.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 0ba8eed28b575626b17e0a7882f923b83e0d7584
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Mon Aug 13 17:22:31 2007 +0200
+
+ AVR32: Include <div64.h> instead of <asm/div64.h>
+
+ include/asm-avr32/div64.h was recently moved to include/div64.h, but
+ cpu/at32ap/interrupts.c wasn't properly updated (an earlier version of
+ the patch was merged perhaps?)
+
+ This patch updates cpu/at32ap/interrupts.c so that the avr32 port
+ compiles again.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit f0d1246ed7cb5a88522244c596d7ae7e6f161283
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed Jun 27 13:34:26 2007 +0200
+
+ atmel_mci: Use 512 byte blocksize if possible
+
+ Instead of always using the largest blocksize the card supports, check
+ if it can support smaller block sizes and use 512 bytes if possible.
+ Most cards do support this, and other parts of u-boot seem to have
+ trouble with block sizes different from 512 bytes.
+
+ Also enable underrun/overrun protection.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+ Acked-by: Hans-Christian Egtvedt <hcegtvedt@atmel.com>
+
+commit 273db7e1bdd1937e32f1d4507321bb721ebd3118
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Aug 13 09:05:33 2007 +0200
+
+ ppc4xx: Fix problem in PLL clock calculation
+
+ This patch was originall provided by David Mitchell <dmitchell@amcc.com>
+ and fixes a bug in the PLL clock calculation.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9986bc3e40e899bea372a99a2bca4071bdf2e24b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 21:34:50 2007 +0200
+
+ Update CHANGELOG
+
+commit 77d19a8bf3b0b1e401cb9f23c81e2ef419705c1a
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 21:34:34 2007 +0200
+
+ Minor alignment of output, 2nd try.
+ Also update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6b309f22a724fad8418e811751a0741b893419cf
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 20:35:49 2007 +0200
+
+ Minor alignment of output
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6f6d7b9c8559e241e8d232621542b8b59699b07b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 18:28:18 2007 +0200
+
+ Cleanup output on ADS5121 board
+
+ Signed-off-by: Wolfgang Denk
+
+commit a4d2636f2a859245ed3a401f26189da2dfda4ceb
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 15:11:38 2007 +0200
+
+ Adapt board configuration and fix kernel crash on MCC200 board.
+
+ The update procedure was modified to turn off the USB subsystem
+ before exit for MCC200 and TRAB. This is necessary as otherwise the
+ USB controller continues to write periodically to system memory!
+
+ MCC200-specific notes:
+ - the patch disables the magic key check for MCC200
+ - the patch contains the configuration changes made
+ for the new revision of the board.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit e27f3a6efb9db5a533223b05c629ff4ac8d921bf
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 14:47:54 2007 +0200
+
+ Adjust default configuration of ADS5121 board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit afaac86fe2948ac84cd9a12bbed883b3c683e7d9
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sun Aug 12 14:27:39 2007 +0200
+
+ Clean up some remaining CFG_CMD_ -> CONFIG_CMD_ issues.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5fe6be6208dda852c3564e384bd78d75784dea3e
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue Aug 7 21:14:22 2007 -0400
+
+ Improve error print messages.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 99dffca3b7590a16a00bc475c860b67b2a3f1462
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jul 17 13:57:04 2007 -0500
+
+ fdt: allow for builds that don't want env and bd_t nodes
+
+ protect fdt_env and fdt_bd_t invocations, fix codingstyle while in the
+ area.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 91148bf7aeba142d6f348805db7625db7da64d6f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Tue Jul 17 13:56:53 2007 -0500
+
+ fdt: do board setup based on fdt address specified on bootm line
+
+ The last fdt patch to bootm did board setup based on the address
+ specified by a prior fdt address command invocation. The bootm
+ code, as its call to fdt_chosen does, should use the fdt specified
+ by the user on the bootm command. Note this restores full
+ functionality for the 8360's existing default boot environment
+ values, e.g. 'run nfsboot' (i.e. no having to 'fdt addr $fdtaddr'
+ before booting a kernel).
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e125a2ffc209dd34794e326c7175658253beadf3
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue Jul 10 20:40:39 2007 -0400
+
+ Call ft_board_setup() from the bootm command.
+
+ In the patch titled "Create new fdt boardsetup command..." I removed the
+ call to ft_board_setup() from the routine fdt_chosen(), but I forgot
+ to add a direct call back into cmd_bootm.c
+
+ This fixes the oversight by adding the direct call to the bootm command.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit fd61e55dd8cb52ce3ff91b3917af26e24b6b0845
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Mon Jun 25 23:25:28 2007 -0400
+
+ Create new fdt boardsetup command, fix bug parsing [] form of set values.
+
+ Previously ft_board_setup() was called by fdt_chosen() which was not
+ really correctly structured. This splits ft_board_setup() out by creating
+ a new fdt boardsetup command.
+
+ Fix a bug when parsing fdt set command values which have the square
+ bracket form [00 11 22 33] - the length was updated incorrectly in when
+ parsing that form.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 6f35ded9e85493595e0eb66a82b502a95326d049
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Mon Jun 25 20:55:58 2007 -0400
+
+ Tighten up the error messages.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit c45874b05aae897a6c29d1a97d4bb708fca2756c
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Mon Jun 25 19:52:23 2007 -0400
+
+ Asthetic improvements: error messages and line lengths.
+
+ Tighten up the error messages, split overlength lines.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 35ec398f16e17df600edc1b38c1e9e62c15c9aa1
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Fri May 25 22:08:57 2007 -0400
+
+ Fix fdt_chosen() to call ft_board_setup(), clean up long lines.
+
+ The fdt_chosen() function was adding/seting some properties ad-hoc
+ improperly and duplicated (poorly) what was done in ft_board_setup()
+
+ Clean up long lines (setting properties, printing errors).
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 06e19a07701c968f15d72c083b5872a1a11c7b01
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Mon May 21 23:27:16 2007 -0400
+
+ For fdt_find_node_by_path(), handle the root path properly.
+
+ Also removes the special case root path detection in cmd_fdt.c since it
+ is no longer necessary.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 9675ee7208ab965d13ea8d8262d77ac4160ef549
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Thu May 17 23:54:36 2007 -0400
+
+ Add fdt_find_node_by_type() and fdt_find_compatible_node() to LIBFDT
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 1a861169bc3758f9de3aead62b058736c6891246
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Wed Jun 6 22:47:58 2007 -0400
+
+ Replace fdt_node_offset() with fdt_find_node_by_path().
+
+ The new name matches more closely the kernel's name, which is also
+ a much better description.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit addd8ce83078c25f0eca5f23adbdfc64ca50a243
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Wed May 16 22:39:59 2007 -0400
+
+ Fix cmd_fdt line lengths, refactor code.
+
+ Break lines that were greater than 80 characters in length.
+ Move the fdt print and property parsing code to separate static functions
+ to reduce coding clutter in the fdt_cmd handling body.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 25114033ab21788810c48ba4df103b649da1223b
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat May 12 09:47:25 2007 -0400
+
+ FDT command improvements.
+
+ Fix "fdt set" so that it will create a non-existing property.
+ Add "fdt mknode" to create nodes.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 38eb508e8e811e2e57628f445de3a24a23c7d804
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Sat May 12 09:45:46 2007 -0400
+
+ Reorganize and fix problems (returns) in the bootm command.
+
+ Do *NOT* return after the "point of no return" has been passed.
+ If something goes wrong, the board must be reset after that point.
+ Move the "Transferring control to Linux" debug message back to where it
+ belongs: just before transferring control to linux.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 89c8757d8f213c47709bdc4efe0695263a6080a6
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Tue May 8 21:27:35 2007 -0400
+
+ Fix bugs in the CONFIG_OF_LIBFDT
+
+ Stupid coding mistakes (identified by Timur Tabi, thanks).
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 6be07cc1ca458278c85ecdbf1a0536cff4c701ec
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Wed Apr 25 22:47:15 2007 -0400
+
+ Improve fdt move length handling.
+
+ Make the length parameter optional: if not specified, do the move using
+ the current size unchanged.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit bb930e76fea6cf89ca2d98e2f7c7a6043d79327d
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Wed Apr 25 22:23:36 2007 -0400
+
+ Minor code clean up.
+
+ Declare the variable fdt properly as extern.
+ Call the "set_fn" function pointer the "short way" without the full
+ dereferencing syntax.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit ba24e2ac3bdb5c489f3c787e7542b6474c4d65c6
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Wed Apr 25 21:24:27 2007 -0400
+
+ Improve error messages, more informative.
+
+ Print more than the raw libfdt error message strings. This is especially
+ useful for cluing in the user when the bootm command aborts due to
+ blob problems.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 8096b3b8f772c1894ddeda9dbceff6a8826473a4
+Author: Gerald Van Baren <vanbaren@cideas.com>
+Date: Fri Apr 20 22:46:53 2007 -0400
+
+ libfdt: Conditionally compile based on CONFIG_OF_LIBFDT
+
+ This is the way u-boot reduces configured-out code. At Wolfgang
+ Grandegger and Wolfgang Denk's request, make libfdt conform.
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+
+commit 923efd286411ed052d9e074f59f8986d6081061c
+Author: Bruce Adler <bruce.adler@ccpu.com>
+Date: Fri Aug 10 14:54:47 2007 -0700
+
+ add image size and descriptors for Spartan 3E FPGA chips
+
+ Spartan 3E image sizes taken from Table 1-4 in Xilinx UG332 (v1.1)
+
+ Signed-off by: Bruce Adler <bruce.adler@ccpu.com>
+
+commit fb56579ffe7ef3275b7036bb7b924e5a0d32bd70
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Aug 10 15:34:48 2007 -0500
+
+ make MAKEALL more immune to merge conflicts
+
+ ..by placing board entries one per line, as suggested by jdl.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 2628114ec564f969f34b5f7105fbd168cb8c9c3f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Fri Aug 10 13:28:25 2007 -0500
+
+ README: Remove outdated cpu type, board type, and NAME_config lists
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 49bb59912d21aacb507eb81fd21fb7af650c706c
+Author: Dave Liu <r63238@freescale.com>
+Date: Fri Aug 10 15:48:59 2007 +0800
+
+ mpc83xx: Suppress the warning 'burstlen'
+
+ suppress the warning 'burstlen' of spd_sdram.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit c646bba6465a45c60746d4cc1602cd06c1960f2d
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Thu Aug 9 15:11:03 2007 -0500
+
+ Add support for SBC8641D. Config files.
+
+ Add support for Wind River's SBC8641D reference board.
+
+ Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8ac273271d57321f90505c7a51cdb1ef2113b628
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Thu Aug 9 15:10:53 2007 -0500
+
+ Add support for SBC8641D. Board files.
+
+ Add support for Wind River's SBC8641D reference board.
+
+ Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+ Acked-by: Wolfgang Denk <wd@denx.de>
+ Acked-by: Jon Loeliger <jdl@freescale.com>
+
+commit c2c0ab4aff86622b837a48a0e560351f9afafb95
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 10 20:34:58 2007 +0200
+
+ Conding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c74b2108e31fe09bd1c5d291c3cf360510d4f13e
+Author: Sergey Kubushyn <ksi@koi8.net>
+Date: Fri Aug 10 20:26:18 2007 +0200
+
+ [ARM] TI DaVinci support, hopefully final
+
+ Add support for the following DaVinci boards:
+ - DV_EVM
+ - SCHMOOGIE
+ - SONATA
+
+ Changes:
+
+ - Split into separate board directories
+ - Removed changes to MTD_DEBUG (or whatever it's called)
+ - New CONFIG_CMD party line followed
+ - Some cosmetic fixes, cleanup etc.
+ - Patches against the latest U-Boot tree as of now.
+ - Fixed CONFIG_CMD_NET in net files.
+ - Fixed CONFIG_CMD_EEPROM for schmoogie.
+ - Made sure it compiles and works (forceenv() link problem) on SCHMOOGIE and
+ DV_EVM. Can't check if it works on SONATA, don't have a board any more,
+ but it at least compiles.
+
+ Here is an excerpt from session log on SCHMOOGIE...
+
+ U-Boot 1.2.0-g6c33c785-dirty (Aug 7 2007 - 13:07:17)
+
+ DRAM: 128 MB
+ NAND: 128 MiB
+ In: serial
+ Out: serial
+ Err: serial
+ ARM Clock : 297MHz
+ DDR Clock : 162MHz
+ ETH PHY : DP83848 @ 0x01
+ U-Boot > iprobe
+ Valid chip addresses: 1B 38 3A 3D 3F 50 5D 6F
+ U-Boot > ping 192.168.253.10
+ host 192.168.253.10 is alive
+ U-Boot >
+
+ Signed-off-by: Sergey Kubushyn <ksi@koi8.net>
+ Acked-by: Dirk Behme <dirk.behme@gmail.com>
+ Acked-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 2e4d94f1e3c2961428967a33b6ff2520568391b3
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:45 2007 -0500
+
+ fsl_pci_init cleanup.
+
+ Do not enable normal errors created during probe (master abort, perr,
+ and pcie Invalid Configuration access).
+
+ Add CONFIG_PCI_NOSCAN board option to prevent bus scan.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit 936b3e69b667c3eb9a61ece4e78647d3fce9fc2a
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Fri Jul 27 01:50:44 2007 -0500
+
+ pciauto_setup_device bars_num fix
+
+ Passing bars_num=0 to pciauto_setup_device should assign no bars.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Acked-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
+ Acked-by: Andy Fleming <afleming@freescale.com>
+
+commit cf0b185e58ca0aec8ae2b2a8804ec0ef58ee21d4
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Aug 6 17:39:44 2007 -0500
+
+ 8641hpcn: Do correct sized pointer math.
+
+ When I rebased Ed's patch and cleaned up a few compilation
+ problems, I apparently rebased my brain on crack first.
+ Fix that by doing (char *) sized pointer math as needed.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit cfc7a7f5bb3273c9951173c788001d45118f141f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Aug 2 14:42:20 2007 -0500
+
+ cpu/86xx fixes.
+
+ Remove rev 1 fixes.
+ Always set PICGCR_MODE.
+ Enable machine check and provide board config option
+ to set and handle SoC error interrupts.
+
+ Include MSSSR0 in error message.
+
+ Isolate a RAMBOOT bit of code with #ifdef CFG_RAMBOOT.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 35d22f957a85a22bb3cd1ad084fa5404620d1c42
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 10 10:42:25 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3a6d56c20989fe27360afe743bd2a7ad4d76e48f
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Aug 2 17:42:08 2007 +0200
+
+ Make use of generic 64bit division in nand_util.c
+
+ Use generic 64bit division in nand_util.c. This makes nand_util.c
+ independent of any toolchain 64bit division.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+commit f7c086e94e8ce9aad7268af97f73aa6884686f27
+Author: Dirk Behme <dirk.behme@googlemail.com>
+Date: Thu Aug 2 17:41:14 2007 +0200
+
+ Move 64bit division from avr32 to generic lib
+
+ Move the 64bit division from lib_avr32 to lib_generic. With this, all
+ boards can do_div/__div64_32 if needed, not only avr one. Code is put
+ to lib_generic, so no larger memory footprint if not used. No code
+ modifications. Thanks for proposal by Håvard Skinnemoen.
+
+ Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
+
+commit 157cda4d0c3d592ccbb19bbfc07d9251894f0894
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:31:22 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU5 files
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 6e5de26c6e7580faf16e87745cd488b92b492d0c
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:30:33 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU4 files
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit e8397fc78c9394d71de233a4d810fbc9047e4c76
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:38:26 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: common files
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit ac982ea5a4f2f993efcf52dca122f5a59df047d8
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:28:44 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: make related
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 137fdd9f474ecb853efdace5200576308c67f18d
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:28:03 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU5 config
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 714bc55b35b6f6a65cc8740a3842a543e88cdef2
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:27:15 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: HCU4 config
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 1894dd381124bdbfbdae7cf3a6ca52a8eb1f4421
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:25:31 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: READMEs
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 641cca9569ce351ddb287fd3343d8b1dcb591db4
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Fri Jul 27 11:37:40 2007 +0200
+
+ Add PPC4xx-HCU4 and HCU5 boards: Infrastructure
+
+ This series of patches adds support for 2 boards from Netstal Maschinen.
+
+ The HCU4 has a PPC405Gpr and
+ the HCU5 has a PPC440EPX.
+
+ The HCU4 has a somehow complicated flash setup, as the booteprom is
+ only 8 bits and the CFI 16 bits wide, which makes it impossible to use a more
+ elegant solution.
+
+ The HCU5 has only a booteprom as the whole code will be downloaded from a
+ different board which has HD, CD-ROM, etc and where all code is stored.
+
+ This is my third try. I incorporated all suggestions made by Wolfgang and Stefan.
+ Thanks them a lot.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@netstal.com>
+
+commit 3e4c90c6233618fc1806e63fde68df5f3d6a0171
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Aug 10 08:42:55 2007 +0200
+
+ ppc4xx: Update lwmon5 POST configuration
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 29cb25da56afe18cf5e7072a92a9d98ea8af1fd4
+Author: Yuri Tikhonov <yur@emcraft.com>
+Date: Fri Aug 10 08:25:22 2007 +0200
+
+ POST: Add ppc4xx UART POST support without external uart clock (lwmon5)
+
+ The patch adds support for UART POST on ppc44x-based boards with no
+ external serial clocks installed.
+
+ Signed-off-by: Yuri Tikhonov <yur@emcraft.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 99c2fdab91bc633e46fb41dbaa629f87ccf6e00f
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Aug 6 18:18:34 2007 -0500
+
+ mpc83xx: fix ITX[GP] O=builddir builds
+
+ make: *** No rule to make target `/work/wd/tmp/board/mpc8349itx/u-boot.lds', needed by `/work/wd/tmp/u-boot'. Stop.
+
+ Both the ITX and ITX-GP fail when you use "make O=<some dir> ..." or
+ "BUILD_DIR=<some dir> ./MAKEALL ..."
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 47e8bc846759e037b8af0e5f9c9f9cfa7a1050c3
+Author: Dave Liu <r63238@freescale.com>
+Date: Wed Aug 1 15:00:59 2007 +0800
+
+ mpc83xx: Correct the README for DDR ECC
+
+ Update the README for DDR ECC, change the name
+ to README.mpc83xx.ddrecc.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit daab8c67d2defef73dc26ab07f0c3afd1b05d019
+Author: Dave Liu <r63238@freescale.com>
+Date: Wed Aug 1 15:00:15 2007 +0800
+
+ mpc83xx: Consolidate the ECC support of 83xx
+
+ Remove the duplicated source code of ecc command on the <board>.c,
+ for reused, move these code to cpu/mpc83xx directory.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 036575c544cf1b69654d8fb334bda69c6ff3da36
+Author: Dave Liu <r63238@freescale.com>
+Date: Sat Aug 4 13:37:39 2007 +0800
+
+ mpc83xx: Correct the burst length for DDR2 with 32 bits
+
+ The burst length should be 4 for DDR2 with 32 bits bus
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+
+commit 1c274c4e05b6dc9b24edc8aa618b02f607ee6eed
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Jul 25 19:25:33 2007 -0500
+
+ mpc83xx: add support for the MPC8323E RDB
+
+ MPC8323E based board with 64MB fixed SDRAM, 16MB flash,
+ five 10/100 ethernet ports connected via an ICPlus IP175C
+ switch, one PCI slot, and serial. Features not supported
+ in this patch are SD card interface, 2 USB ports, and the
+ two phone ports.
+
+ Signed-off-by: Michael Barkowski <michael.barkowski@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 343d91009d55fc5b3ff8cc940597af6c6aa1d359
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Jul 25 19:25:28 2007 -0500
+
+ mpc83xx: fixup generic pci for libfdt
+
+ add libfdt support to the generic 83xx pci code
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit f57ac7a7b37109245b69db80839ebee26179966a
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Jul 25 19:25:22 2007 -0500
+
+ mpc83xx: fix 8360 and cpu functions to update fdt being passed
+
+ ..and not the global fdt. Rename local fdt vars to blob so as not to
+ be confused with the global var with the same three-letter name.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8be404459a6b7395415a57bb35e8377e3b2b5acb
+Author: Jerry Van Baren <gvb.uboot@gmail.com>
+Date: Wed Jul 4 21:34:24 2007 -0400
+
+ mpc83xx: Fix errors when CONFIG_OF_LIBFDT is enabled
+
+ Several node strings were not correct (trailing slashes and properties
+ in the strings)
+ Added setting of the timebase-frequency.
+ Improved error messages and use debug() instead of printf().
+
+ Signed-off-by: Gerald Van Baren <vanbaren@cideas.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 26d02c9bbac1751c5e19294f000100b48d43a920
+Author: Jerry Van Baren <gvb.uboot@gmail.com>
+Date: Wed Jul 4 21:27:30 2007 -0400
+
+ mpc83xx: Replace fdt_node_offset() with fdt_find_node_by_path().
+
+ The new name matches more closely the kernel's name, which is also
+ a much better description.
+
+ These are the mpc83xx changes made necessary by the function name change.
+
+ Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
+ Acked-by: Gerald Van Baren <vanbaren@cideas.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 9be39a67c9f8fef7107f5df09d673005f04d0963
+Author: Dave Liu <daveliu@freescale.com>
+Date: Mon Jun 25 10:41:56 2007 +0800
+
+ mpc83xx: Add support for the display of reset status
+
+ 83xx processor family has many reset sources, such as
+ power on reset, software hard reset, software soft reset,
+ JTAG, bus monitor, software watchdog, check stop reset,
+ external hard reset, external software reset.
+ sometimes, to figure out the fault of system, we need to
+ know the cause of reset early before the prompt of
+ u-boot present.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit ff9658d7049bf8c8e8e0a05dbe5e9f7e91aa5a5d
+Author: Dave Liu <daveliu@freescale.com>
+Date: Mon Jun 25 10:41:04 2007 +0800
+
+ mpc83xx: Fix the align bug of SDMA buffer
+
+ According to the latest user manual, the SDMA temporary
+ buffer base address must be 4KB aligned.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 66dc2c2dc51f8b88bb8e231bc80cd92eae1d6476
+Author: Dave Liu <daveliu@freescale.com>
+Date: Mon Jun 25 13:21:12 2007 +0800
+
+ mpc83xx: Revise the MPC8360EMDS readme doc
+
+ When the rev2.x silicon mount on the MPC8360EMDS baord,
+ and if you are using the u-boot version after the commit
+ 3fc0bd159103b536e1c54c6f4457a09b3aba66ca.
+ to make the ethernet interface usable, we have to setup
+ the jumpers correctly.
+
+ Signed-off-by: Dave Liu <daveliu@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit e739bc95797aac4fefc4c75b55c7c78e59d3ea9c
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Jul 3 13:46:32 2007 -0500
+
+ FSL I2C driver programs the two I2C busses differently
+
+ The i2c_init() function in fsl_i2c.c programs the two I2C busses differently.
+ The second I2C bus has its slave address programmed incorrectly and is
+ missing a 5-us delay.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit df33f6b4d6d63693dd9200808b242de1b86cb8e8
+Author: Timur Tabi <timur@freescale.com>
+Date: Tue Jul 3 13:04:34 2007 -0500
+
+ Update SCCR programming in cpu_init_f() to support all 83xx processors
+
+ Update the cpu_init_f() function in cpu/mpc83xx/cpu_init.c to program the
+ bitfields for all 83xx processors. The code to update some bitfields was
+ compiled only on some processors. Now, the bitfields are programmed as long
+ as the corresponding CFG_SCCR option is defined in the board header file.
+ This means that the board header file should not define any CFG_SCCR macros
+ for bitfields that don't exist on that processor, otherwise the SCCR will be
+ programmed incorrectly.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 9546266999f0b9b51372636614211b88d90f0f25
+Author: Martin Krause <martin.krause@tqs.de>
+Date: Fri Jun 22 13:04:22 2007 +0200
+
+ TQM834x: cleanup configuraton
+
+ Remove irritating #undef DEBUG
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 5d497e6bf0f5bf63729b4a47b3fd786d3c77a1bc
+Author: david.saada <David.Saada@ecitele.com>
+Date: Mon Jun 18 09:09:53 2007 -0700
+
+ MPC83xx: Fix makefile to generate config.h file in the build directory
+
+ MPC83xx: Fix the Makefile config sections to generate the include/config.h
+ file in the build directory instead of the source directory.
+
+ Signed-off-by: David Saada <david.saada@ecitele.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 1ded0242e437259366792d52b7e9d1e1931d8fa5
+Author: Lee Nipper <Lee.Nipper@freescale.com>
+Date: Thu Jun 14 20:07:33 2007 -0500
+
+ mpc83xx: Add support for 8360 silicon revision 2.1
+
+ This change adds 8360 silicon revision 2.1 support to u-boot.
+
+ Signed-off-by: Lee Nipper <lee.nipper@freescale.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit a22806469a8f2b69c829f4fd5361fdebd0cb01b4
+Author: Kumar Gala <galak@kernel.crashing.org>
+Date: Wed Aug 8 04:14:28 2007 -0500
+
+ Treat ppc64 host as ppc
+
+ Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
+
+commit 0dc4279b08ff82472bec2e2c90858602459febe8
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Wed Aug 8 09:01:46 2007 +0800
+
+ Minor fix for bios emulator makefile
+
+ Add $(obj) to LIB avoiding objects be built in the source dir
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit ce981dc857adfc8036ca2f6d5d5a06c2a8aa77d6
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Wed Aug 8 08:33:11 2007 +0800
+
+ Add CONFIG_BIOSEMU define to guard all the bios emulator code
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+ This patch fix the compile issue on the board that did not enable the bios emulator
+
+commit ed8106433522f2ea8933e9808346860d061d7731
+Author: Zach Sadecki <Zach.Sadecki@ripcode.com>
+Date: Tue Jul 31 12:27:25 2007 -0500
+
+ tsec: fix multiple PHY support
+
+ The change entitled "Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx"
+ broke multiple PHY support in tsec.c. This fixes it.
+
+ Signed-off-by: Zach Sadecki <Zach.Sadecki@ripcode.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit dcb84b7208ade0bbebbeb56bec9c2c64f8b2eede
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Thu Aug 9 09:08:18 2007 -0500
+
+ tsec: Allow Ten Bit Interface address to be configurable
+
+ Allow the address of the Ten Bit Interface (TBI) to be changed in the
+ event of a conflict with another device.
+
+ Signed-off by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+
+commit 3ba4c2d68f6541db4677b4aea12071f56e6ff6e6
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Aug 8 09:54:26 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a41de1f0d373e09c782dea558385a06247111ba5
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 05:15:18 2007 -0500
+
+ Port enabled for I2C signals and chipselects port configuration.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 1a33ce65a4c51a69190dd8c408f9e1c62a66e94f
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 04:31:18 2007 -0500
+
+ Added NAND support
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit eaf9e447beb3e498818ef8ad0b8c1597cd506149
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 04:11:20 2007 -0500
+
+ Added I2C support
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 99c03c175d2689093176facf17c58ce2cb320001
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:58:52 2007 -0500
+
+ Changed CFG_CLK to gd->bus_clk for CFG_TIMER_PRESCALER. Added DECLARE_GLOBAL_DATA_PTR for time.c
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 8d1d66af54d305de29d0bbf4aa8c9e6375f7f731
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:55:21 2007 -0500
+
+ Added uart_gpio_conf() in serial_init(), seperated uart port configuration from cpu_init() to uart_gpio_conf()
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 6fde84a44b7e575ea80fe0e2d5be3b6f73d1e630
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:43:30 2007 -0500
+
+ Moved sync() from board file to include/asm-m68k/io.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 9e737d8476e7d6a596d16caaf6a3853a9a1190a2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:30:44 2007 -0500
+
+ Declared attributes of void __mii_init(void) as an alias for int mii_init(void)
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 9998bd37ead85e93953559720710d3b0685c81e6
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Sun Aug 5 03:19:10 2007 -0500
+
+ Renamed CONFIG_MCFSERIAL to CONFIG_MCFUART
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 7c4c3722a38d40b0cf537ddae72b04f4088b190c
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Tue Aug 7 16:17:06 2007 +0800
+
+ Add CONFIG_BIOSEMU define to guard all the bios emulator code
+
+ This patch fix the compile issue on the board that did not enable the bios emulator
+
+commit bf1060ea4f9eaa7e7d164a70a7d6f28939882053
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Aug 7 16:02:13 2007 +0200
+
+ Fix missing brace error in fs/fat/fat.c
+ [pointed out by Roderik Wildenburg]
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 6c33c78557ca6f8da68c01ce33e278695197d3f4
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 6 23:21:05 2007 +0200
+
+ Fixed typo in README (pointed out by Martin Jost).
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 537223afa61f64480df31ce440a9cb386df4a814
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Aug 6 21:10:17 2007 +0200
+
+ ppc4xx: Update AMCC Bamboo README doc/README.bamboo
+
+ As suggested by Eugene O'Brien <Eugene.O'Brien@advantechamt.com>,
+ here an updated Bamboo README.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9c7e4b06214db61bb21f1bcbe57c97519669baae
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 6 02:17:36 2007 +0200
+
+ Coding style cleanup. Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 221838cc7eb178370ff62aa05920a582e12ac322
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Tue Jul 10 09:03:22 2007 +0800
+
+ Remove the bios emulator from MAI board.
+
+ The bios emulator in the MAI board can not pass compile
+ and have a lot of crap in it. remove it and will have a
+ clean and small bios emulator in the drivers directory
+ which can be uesed for every board.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 5618332409bb96f4448d1712899369fc80c0b489
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Jul 13 12:14:59 2007 +0800
+
+ Fix some compile issues for MAI board.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 0f460a1ee148b648ee242c3157650287d4296260
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Jul 13 12:14:58 2007 +0800
+
+ Configurations for ATI video card BIOS emulator
+
+ This patch add definition of the BIOS emulator and the ATI framebuffer
+ driver for MPC8641HPCN board.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
+
+commit ece92f85053b8df613edcf05b26a416cbc3d629c
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Jul 6 08:34:56 2007 +0800
+
+ This is a BIOS emulator, porting from SciTech for u-boot, mainly for
+ ATI video card BIOS. and can be used for x86 code emulation by some
+ modifications.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 5072188acabde3178fac7f5a597150e6e74fd40c
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Fri Jul 6 08:33:33 2007 +0800
+
+ This is a framebuffer driver for ATI video card, can work for PCI9200,
+ X300, X700, X800 ATI video cards.
+
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 5728be389e65fd47f34b33c2596271eb4db751ae
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon Aug 6 01:01:49 2007 +0200
+
+ Coding style cleanup. Update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 8092fef4c29b395958bb649647da7e3775731517
+Author: Martin Krause <Martin.Krause@tqs.de>
+Date: Tue Dec 12 14:26:01 2006 +0100
+
+ Add functions to list of exported functions
+
+ Additionally export the following fuctions (to make trab_config build again):
+ - simple_strtol()
+ - strcmp()
+
+ Also bump the ABI version to reflect this change
+
+ Signed-off-by: Martin Krause <martin.krause@tqs.de>
+
+commit 63cec5814fab5d2b1c86982327433807a5ac0249
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Thu Aug 2 14:09:49 2007 -0500
+
+ Make MPC8641's PCI/PCI-E driver a common driver for many FSL parts.
+
+ All of the PCI/PCI-Express driver and initialization code that
+ was in the MPC8641HPCN port has now been moved into the common
+ drivers/fsl_pci_init.c. In a subsequent patch, this will be
+ utilized by the 85xx ports as well.
+
+ Common PCI-E IMMAP register blocks for FSL 85xx/86xx are added.
+
+ Also enable the second PCI-Express controller on 8641
+ by getting its BATS and CFG_ setup right.
+
+ Fixed a u16 vendor compiler warning in AHCI driver too.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 86b116b1b1e165ca4840daefed36d2e3b8460173
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Fri Aug 3 12:08:16 2007 +0200
+
+ cm1_qp1 -> cm5200: single U-Boot image for modules from the cm5200 family.
+
+ Add the ability for modules from the Schindler cm5200 family to use a
+ single U-Boot image:
+ - rename cm1_qp1 to cm5200
+ - add run-time module detection
+ - parametrize SDRAM configuration according to the module we are running on
+
+ Few minor, board-specific fixes included in this patch:
+ - better MAC address handling
+ - updated default environment ('update' command uses +{filesize} now)
+ - improved error messages in the auto-update code
+ - allow booting U-Boot from RAM (CFG_RAMBOOT)
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c7e717ebc2b044d7a71062552c9dc0f54ea9b779
+Author: Andy Fleming <afleming@freescale.com>
+Date: Fri Aug 3 04:05:25 2007 -0500
+
+ Add Marvell 1149 PHY support to the TSEC
+
+commit b1b54e352028ed370c3aa95d6fdeb9d64c5d2f86
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 2 21:27:46 2007 +0200
+
+ Coding style cleanup, update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 63e22764d2f8653f68888c667eb65b3996b52680
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 2 10:11:18 2007 +0200
+
+ Minor cleanup of <board>_nand build rules.
+
+commit 9ca8d79de096c65b9b9c867259b3ff4685f775ef
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Aug 2 08:33:56 2007 +0200
+
+ ppc4xx: Code cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit c92409812206ac67a7fa7aae298539a9c3804a46
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Tue Jul 31 18:51:48 2007 +0200
+
+ [ppc440SPe] Graceful recovery from machine check during PCIe configuration
+
+ During config transactions on the PCIe bus an attempt to scan for a
+ non-existent device can lead to a machine check exception with certain
+ peripheral devices. In order to avoid crashing in such scenarios the
+ instrumented versions of the config cycle read routines are introduced, so
+ the exceptions fixups framework can gracefully recover.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Acked-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit dec99558b9ea75a37940d07f41a3565a50b54ad1
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Tue Jul 31 18:19:54 2007 +0200
+
+ [ppc4xx] Separate settings for PCIe bus numbering on 440SPe rev.A
+
+ This brings back separate settings for PCIe bus numbers depending on chip
+ revision, which got eliminated in 2b393b0f0af8402ef43b25c1968bfd29714ddffa
+ commit. 440SPe rev. A does NOT work properly with the same settings as for
+ the rev. B (no devices are seen on the bus during enumeration).
+
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit cdd917a43da6fa7fc8f54a3cc9f420ce5ecf3197
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Aug 2 00:48:45 2007 +0200
+
+ Fix build errors and warnings / code cleanup.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d2f68006627eda6cb6c7f364bddf621dbfd2fc68
+Author: Eugene OBrien <eugene.obrien@advantechamt.com>
+Date: Tue Jul 31 10:24:56 2007 +0200
+
+ ppc4xx: Update AMCC Bamboo 440EP support
+
+ Changed storage type of cfg_simulate_spd_eeprom to const
+ Changed storage type of gpio_tab to stack storage
+ (Cannot access global data declarations in .bss until afer code relocation)
+
+ Improved SDRAM tests to catch problems where data is not uniquely addressable
+ (e.g. incorrectly programmed SDRAM row or columns)
+
+ Added CONFIG_PROG_SDRAM_TLB to support Bamboo SIMM/DIMM modules
+ Fixed AM29LV320DT (OpCode Flash) sector map
+
+ Signed-off-by: Eugene OBrien <eugene.obrien@advantechamt.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ea9f6bce383cc9fbcdee28b5836109b1a6dba574
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 31 08:37:01 2007 +0200
+
+ ppc4xx: Update 440EPx lwmon5 board support
+
+ - Clear ECC status regs after ECC POST test
+ - Set dcbz for ECC generation with caches enabled as default
+ - Code cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 27a528fb41433c4c1e2b5d6bd3fd8d78606fc724
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 30 11:04:57 2007 +0200
+
+ ppc4xx: Only print ECC related info when the error bis are set
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e36220a4baf1f188ba60f17e9d0f043069b1362a
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Fri Jul 27 16:44:31 2007 +0200
+
+ new FPGA image for PLU405 board
+
+ new FPGA image for PLU405 board with improved CompactFlash timing
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 8993e54b6f397973794f3d6f47d3b3c0c98dd4f6
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Fri Jul 27 14:43:59 2007 +0200
+
+ [ADS5121] Support for the ADS5121 board
+
+ The following MPC5121e subsystems are supported:
+
+ - low-level CPU init
+ - NOR Boot Flash (common CFI driver)
+ - DDR SDRAM
+ - FEC
+ - I2C
+ - Watchdog
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+
+commit 1863cfb7b100ba0ee3401799457a01dc058745f8
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Fri Jul 27 14:22:04 2007 +0200
+
+ [PPC] Remove unused MSR_USER definition
+
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit d4024bb72dd81695ec099b2199eda0d27c623e62
+Author: John Otken <john@softadvances.com>
+Date: Thu Jul 26 17:49:11 2007 +0200
+
+ ppc4xx: Add support for AMCC 405EP Taihu board
+
+ Signed-off-by: John Otken <john@softadvances.com>
+
+commit b66091de6c7390620312c2501db23d8391e7cabb
+Author: Anatolij Gustschin <agust@denx.de>
+Date: Thu Jul 26 15:08:01 2007 +0200
+
+ ppc4xx: lwmon5: Update Lime initialization
+
+ Change Lime SDRAM initialization to now support 100MHz and
+ 133MHz (if enabled). Also the framebuffer is initialized to
+ display a blue rectangle with a white border.
+
+ Signed-off-by: Anatolij Gustschin <agust@denx.de>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9f24a808f17fc0f37b7fb4805f734741335caecc
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 24 09:52:52 2007 +0200
+
+ ppc4xx: lwmon5: Support for 128 MByte NOR FLASH added
+
+ The used Intel NOR FLASH chips have internally two dies, and are now
+ treated as two seperate chips.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit aedf5bde179ecfbd0a96130d18996a96518b785f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jul 24 07:20:09 2007 +0200
+
+ ppc4xx: Fix lwmon5 interrupt controller setup (polarity, trigger...)
+
+ As suggested by Hakan Eryigit, here an updated setup for the lwmon5
+ interrupt controller.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a71d96eac8130b53a91f93cd10c70fca0db18d52
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 20 15:03:44 2007 +0200
+
+ ppc4xx: Fix bug with default GPIO output value
+
+ As spotted by Matthias Fuchs, the default output values for all GPIO1
+ outputs were not setup correctly. This patch fixes this issue.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 531e3e8b831f357056448fa573137d5fb37000fd
+Author: Pavel Kolesnikov <concord@emcraft.com>
+Date: Fri Jul 20 15:03:03 2007 +0200
+
+ POST: Add ECC POST for the lwmon5 board
+
+ This patch adds ECC Post test for the Lwmon5 board based
+ on PPC440EPx to U-Boot.
+
+ Signed-off-by: Pavel Kolesnikov <concord@emcraft.com>
+ Acked-by: Yuri Tikhonov <yur@emcraft.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit cc3023b9f95d7ac959a764471a65001062aecf41
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Thu Jul 19 17:12:28 2007 +0200
+
+ Fix breakage of 8xx boards from recent commit.
+
+ This patch fixes the negative consequences for 8xx of the recent
+ "ppc4xx: Clean up 440 exceptions handling" commit.
+
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+
+commit c883f6ea32dce91f07670b3aafecf6c99b1e5341
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 13:11:12 2007 +0200
+
+ Coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8848ec858f74ed6dab06fb6d5ddc933e0a1328bf
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 10:02:12 2007 +0200
+
+ ppc4xx: Code cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 2a49fc17d09020e7ebd9536694d99d20e419fcb8
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 10:01:38 2007 +0200
+
+ ppc4xx: AMCC Luan uses the new boardspecific DDR2 controller setup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df3f17422aeb03fb81a7ac8c78d2b05d05aa4cf9
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 10:00:43 2007 +0200
+
+ ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.c
+
+ The new boardspecific DDR2 controller configuration is used for the Yucca
+ board. Now the Yucca board with 440SPe Rev. A chips is also supported.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6ed14addf97c8cd8f531e9ae7b2d3e222fffd53e
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 09:57:00 2007 +0200
+
+ ppc4xx: Add new weak functions to support boardspecific DDR2 configuration
+
+ The new "weak" functions ddr_wrdtr() and ddr_clktr() are added to better
+ support non default, boardspecific DDR(2) controller configuration.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5743a9207a370b90f09b20ebd61167c806b937f3
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 16 08:53:51 2007 +0200
+
+ ppc4xx: Add remove_tlb() function to remove a mem area from TLB setup
+
+ The new function remove_tlb() can be used to remove the TLB's used to
+ map a specific memory region. This is especially useful for the DDR(2)
+ setup routines which configure the SDRAM area temporarily as a cached
+ area (for speedup on auto-calibration and ECC generation) and later
+ need this area uncached for normal usage.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3a6cab844cf74f76639d795e0be8717e02c86af7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat Jul 14 22:51:02 2007 +0200
+
+ Update CHANGELOG
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 011595307731a7a67a7445d107c279d031e8ab97
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Sat Jul 14 01:06:58 2007 +0200
+
+ [PCS440EP] - fix compile error, if BUILD_DIR is used
+
+commit fad63407154f46246ce80d53a9c669a44362ac67
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jul 13 09:54:17 2007 +0200
+
+ make show_boot_progress () weak.
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 907902472391b6ca1876ec300687562ecaf459b1
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jul 13 08:26:05 2007 +0200
+
+ [PCS440EP] - The DIAG LEDs are now blinking, if an error occur
+ - fix compile error, if BUILD_DIR is used
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit a2e1c7098cf9574386b0c96841dfc8ea5cc93578
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jul 12 16:32:08 2007 +0200
+
+ ppc4xx: Change receive buffer handling in the 4xx emac driver
+
+ This change fixes a bug in the receive buffer handling, that
+ could lead to problems upon high network traffic (broadcasts...).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 239f05ee4dd4cfe0b50f251b533dcebe9e67c360
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 12 01:45:34 2007 +0200
+
+ Update CHANGELOG, minor coding style cleanup.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 5a56af3b522ba47fb33a3fee84d23bf1e5429654
+Author: Andy Fleming <afleming@freescale.com>
+Date: Fri Jun 8 16:41:18 2007 -0500
+
+ Remove erroneous errata code from Marvel 88E1111S driver
+
+ The Marvel 88E1111S driver for the TSEC was copied from the
+ 88E1101 driver, and included a fix for an erratum which does not
+ exist on that part. Now it is removed
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 982efcf23fd03647e01e2fbe28a7a36239156cc0
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue Jun 5 16:38:44 2007 -0500
+
+ From: eran liberty <eran.liberty@gmail.com>
+
+ adds the reset register to 85xx immap
+
+ Signed-off-by: Eran Liberty <eran.liberty@gmail.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit d3ec0d943a045bdb99e159e7bbc77430e09f11d7
+Author: Andy Fleming <afleming@freescale.com>
+Date: Thu May 10 17:50:01 2007 -0500
+
+ Polished the 85xx ADS config files
+
+ Made the boot commands use device trees by default.
+ Also moved the ramdisk to 1000000 (I think the previous address
+ was getting overridden during boot).
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit bfb37b32d1b0b03f18077dba49cc66a6e76fa038
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed May 9 11:03:32 2007 -0500
+
+ 8544ds: Fix Makefile after moving pixis to board/freescale.
+
+ The OBJTREE != SRCTREE build scenario was broken.
+ This fixes it.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2a3cee43c3b71fa5b8d91db19f05067865290f3e
+Author: Andy Fleming <afleming@freescale.com>
+Date: Wed May 9 00:54:20 2007 -0500
+
+ tsec: Fix PHY code to match first driver
+
+ Jarrold Wen noticed that the generic PHY code always matches
+ under the current implementation. Change it so the first match
+ wins, and *only* unknown PHYs trigger the generic driver
+
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit ccc091aac61a38cd998d575d92f7232e256d6312
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue May 8 17:27:43 2007 -0500
+
+ Add support for CPM device tree configuration to 8560 ADS
+
+ * Adds code to modify CPM frequencies
+ * Cleans up the config file to #define TSEC and (for now) #undef FCC
+ * Adds the MII command for all 8560 ADS configurations
+ * Updates config file to provide convenience commands for booting
+ with a device tree
+
+ Signed-off-by: Vitaly Bordug <vbordug@ru.mvista.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 7507d56ccaf7aae1c474342a9a5540165cd7e9d9
+Author: Andy Fleming <afleming@freescale.com>
+Date: Tue May 8 17:23:02 2007 -0500
+
+ Fix Marvell 88e1145 PHY init code
+
+ Fix a bug in the Marvell 88e1145 PHY init code in the TSEC driver
+ where the reset was being done after the errata code instead of
+ before.
+
+ Signed-off-by: Haiying Wang <haiying.wang@freescale.com>
+ Signed-off-by: Andy Fleming <afleming@freescale.com>
+
+commit 5dc210dec5bace98a50b6ba905347890091a9bb0
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Jul 11 14:52:16 2007 -0500
+
+ Add simple agent/end-point configuration in PCI AutoConfig for PCI_CLASS_PROCESSOR_POWERPC.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit e8b85f3ba4cd8930e0a2fea2100c815d64201765
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Jul 11 14:52:08 2007 -0500
+
+ pciauto setup bridge
+
+ The P2P bridge bus numbers programmed into the device are relative to
+ hose->first_busno.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 571f49fa717004ca4268b4e24057efc7bf9f987b
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Jul 11 14:52:01 2007 -0500
+
+ Support PCIe extended config registers
+
+ FSL PCIe block has extended cfg registers in the 100 and 400 range.
+ For example, to read the LTSSM register: pci display <busn>.0 404 1
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit ba5feb12581bb2912ce301e4866b71f846e9fc07
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Jul 11 14:51:48 2007 -0500
+
+ Minor improvements to drivers/pci_auto.c
+
+ - Make pciauto_{pre,post}scan_setup_bridge non-static
+ - Added physical address display in debug messages.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 40e81addab7bb74d20ddf681ce9babc880a828ee
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Wed Jul 11 14:51:35 2007 -0500
+
+ Start pci hose scan from hose->current_busno.
+
+ Ensure hose->current_busno is not less than first_busno. This fixes
+ broken board code which leaves current_busno=0 when first_busno is
+ greater than 0 for the cases with multiple controllers.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+
+commit 3865b1fb7843a08ad49a6319a36415752276ff48
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jul 11 12:13:53 2007 +0200
+
+ Fix some compile problems introduced by the latest CFG_CMD_xxx cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit fa1df308926a6f70e3504c57514ef27ac31fd13a
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Wed Jul 11 20:11:07 2007 +0200
+
+ CM1.QP1: Support for the Schindler CM1.QP1 board.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 96e1d75be8193ca79e4215a368bf9d7f2362450f
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Wed Jul 11 18:39:11 2007 +0200
+
+ [PCS440EP] - Show on the DIAG LEDs, if the SHA1 check failed
+ - now the Flash ST M29W040B is supported (not tested)
+ - fix the "led" command
+ - fix compile error, if BUILD_DIR is used
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit e9514751cfa5cce61ea699fa0d3eb37898a5eeb5
+Author: Stefan Roese <sr@denx.de>
+Date: Sun Jul 8 13:44:27 2007 +0200
+
+ Fix malloc problem introduced with the relocation fixup for the PPC platform
+
+ The relocation fixup didn't handle the malloc pointer initialization
+ correctly. This patch fixes this problem. Tested successfully on 4xx.
+ The relocation fixup patches for 4xx will follow soon.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0dca874db62718e41253659e60f3a1de7eb418ce
+Author: TsiChung <tcliew@Goku.(none)>
+Date: Tue Jul 10 15:45:43 2007 -0500
+
+ Cache update and added CFG_UNIFY_CACHE
+
+ Enabled cache in cpu_init_f() for faster flash to mem allocation. Updated cache handling in start.S. Applied cache invalidate in fec_send() and fec_recv(). Added CFG_UNIFY_CACHE for CF V3 only.
+
+ Signed-off-by: TsiChung <tcliew@Goku.(none)>
+
+commit 52b017604a8f4d4a795880ef6e7861d7f2f1b005
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:36:16 2007 -0500
+
+ Update header file. Include dtimer_intr_setup(). Changed timer divider to global define.
+
+ Include immap.h and timer.h. Moved dtimer interrupt setup to dtimer_intr_setup() from cpu/mcf532x/interrupts.c. Changed (CFG_CLK /1000000) -1 << 8 to CFG_TIMER_PRESCALER
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 5cdc07c7ef8f08ea55d3c47ed9221d91aa6d5fac
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:31:25 2007 -0500
+
+ Update header files
+
+ Include immap.h and renamed mcfrtc.h to rtc.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2870e98ac8e5553e9187b12a47e5f46babb53990
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:29:21 2007 -0500
+
+ Add mcffec_initialize()
+
+ Added mcffec_initialize() in eth_initialize()
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 45a25bfd0c52f8a3fa137216bc94d32f90bedc5d
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:27:40 2007 -0500
+
+ Update header file and clean up
+
+ Include immap.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 0cee9c66318602c856a899ae5fa7579ccba6443a
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:23:15 2007 -0500
+
+ New uart structure and defines
+
+ Seperated from mcfuart.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit a90e79de8d99e9c9d69d60bfff9f24c337165900
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:22:31 2007 -0500
+
+ New timer structure and defines
+
+ Seperated from mcftimer.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit e04acb2eba4782489417240eff76e20e176aec10
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:21:09 2007 -0500
+
+ Rename mcfrtc to rtc
+
+ Since it is already in m68k folder, un-necessary to pad mcf. Replaced immap_5329.h and m5329.h to immap.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2bd806fe4fc23958b8f78778199e7a6e3f8f6ad5
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:17:36 2007 -0500
+
+ Rename mcfserial.c. Update include header
+
+ Renamed mcfserial.c to mcfuart.c. Modified Makefile for mcfuart.o from mcfserial.o. Replace immap_5329.h and m5329.h to immap.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit f2208fbc2eb9de3f4285bfaa021c6ebae16c9b0e
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:13:58 2007 -0500
+
+ Header file update, clean up and cache handling
+
+ Replaced immap_5329.h and m5329.h with immap.h. Included cache_invalid.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2e3f25ae9082daa9f5d181db45dfbc2e52ce0f97
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:10:40 2007 -0500
+
+ Create interrupts.c and modify Makefile
+
+ interrupt_init() and dtimer_intr_setup() are placed in interrupts.c. Added interrupts.o to Makefile
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit ddd104f1ed655eda50c06ba636237a83ed943f34
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:06:55 2007 -0500
+
+ Enable Icache
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit b9bf3de377b2bae70c983c9b97feae914999e735
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:05:31 2007 -0500
+
+ Update header file and some clean up
+
+ Replaced immap_5329.h and m5329.h with immap.h. Removed whitespaces.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 84a015b52ec820a5ae173717d78516de731c89c2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:03:28 2007 -0500
+
+ Update header file and enable icache
+
+ Replaced immap_5329.h and m5329.h with immap.h. Enabled icache_enable() in cpu_init_r().
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 7a17e759c7a8b58e910daf54df611e94fc8ca074
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 23:01:22 2007 -0500
+
+ Update header file and removed interrupt_init()
+
+ Replace immap_5329.h and m5329.h with immap.h. Removed interrupt_init() and placed it in interrupts.c
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 3b635492c95bd0d6e08f93f699821cba1f602a64
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:57:46 2007 -0500
+
+ Update for flash.o and mii.o
+
+ Removed flash.o and added mii.o
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit c5ded275d839e4ff79f41718d50a835d989f57bc
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:56:19 2007 -0500
+
+ MII functions calls.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 427c814104560e29bda14955c67703245aaaa5b4
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:54:42 2007 -0500
+
+ Removed MII functions and replaced immap_5329.h and m5329.h with immap.h.
+
+ The removed MII routines will be placed in mii.c.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 01a793fda09c63df5a496f09dc1c7cb26e6751a2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:51:05 2007 -0500
+
+ Duplicate code
+
+ There is a Common Flash Interface Driver existed. To use the CFI driver, define CFG_FLASH_CFI in configuration file.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2744354a8437b8f78db178e30660215688bff570
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:46:38 2007 -0500
+
+ Seperate old structure defines and new structure defines
+
+ Removed new uart structure and defines to uart.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 2bd58608dbcff8890ca9a0c59e861ac24f8bb230
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:45:01 2007 -0500
+
+ Seperate old structure defines and new structure defines
+
+ New timer structure and defines will move to new timer.h
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 8cd5cd6de4ff92e03978338ed7aeb3ce7b7b9784
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:42:23 2007 -0500
+
+ Clean up
+
+ Removed whitespace
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 514871f565dd8bd1121e4a3ac1665a790e20b8f2
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:41:24 2007 -0500
+
+ Clean up
+
+ Replaced whitespace with tabs
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit 48dbfeabc7afffe30609a4489f10c22cb67ef7dd
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:39:07 2007 -0500
+
+ Create new header file and move peripherals base address from configs file to new header file.
+
+ Create new header file to include immap_5xxx.h and m5xxx.h and to share among drivers without update in driver file each processor is added. Moved peripherals base address and defines from configs file to immap.h.
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit be296e31c4411f96d9cb3d2afc8fcb006867abfa
+Author: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+Date: Thu Jul 5 22:24:58 2007 -0500
+
+ Revert file mode
+
+ Changed MAKEALL file mode to executable, removed executable file mode from Makefile
+
+ Signed-off-by: TsiChungLiew <Tsi-Chung.Liew@freescale.com>
+
+commit b3aff0cb9ecf236d7e8c93761dd1dadf6837a582
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 11:19:50 2007 -0500
+
+ disk/ doc/ lib_*/ and tools/: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit ddb5d86f0215bcb6c293510c50eb050e92883b7a
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 11:13:21 2007 -0500
+
+ drivers/: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit f40a7f3e3888b42a43674b099e5470022c8c544c
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 11:07:56 2007 -0500
+
+ fs/: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 610f2e9c28a9c101e09fa1b78143cf5f00ed1593
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 11:05:02 2007 -0500
+
+ net/: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 902531788376046da212afd1661cffb62f3daa1c
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 11:02:44 2007 -0500
+
+ common/: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit d39b57415838c73fb0a37eca84de3c68ba990586
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 10:48:22 2007 -0500
+
+ board/[j-z]*: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 77a318545d57aefa844752465b94c7e09a3f26d0
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 10:39:10 2007 -0500
+
+ board/[A-Za-i]*: Remove lingering references to CFG_CMD_* symbols.
+
+ Fixed some broken instances of "#ifdef CMD_CFG_IDE" too.
+ Those always evaluated TRUE, and thus were always compiled
+ even when IDE really wasn't defined/wanted.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 068b60a0eb7e73b243ca55399f2a7df76e2c3f3d
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 10:27:39 2007 -0500
+
+ cpu/ rtc/ include/: Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 079a136c3588814784561d6e4856970ee82d6e2a
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 10:12:10 2007 -0500
+
+ include/configs/[p-z]* + misc: Cleanup BOOTP and lingering CFG_CMD_*.
+
+ Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
+ used to be included but CONFIG_BOOTP_MASK was not defined.
+
+ Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 7f5c01577400c74cc5bac74f41dd0d3c79df623c
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 09:38:02 2007 -0500
+
+ include/configs/[g-o]*: Cleanup BOOTP and lingering CFG_CMD_*.
+
+ Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
+ used to be included but CONFIG_BOOTP_MASK was not defined.
+
+ Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 80ff4f99b84b64edca3fd10da365ec1493be1c95
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 09:29:01 2007 -0500
+
+ include/configs/[a-e]*: Cleanup BOOTP and lingering CFG_CMD_*.
+
+ Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
+ used to be included but CONFIG_BOOTP_MASK was not defined.
+
+ Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a1aa0bb502e25fd598b5e0ccdfb2c174921d714a
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 09:22:23 2007 -0500
+
+ include/configs/[P-Z]*: Cleanup BOOTP and lingering CFG_CMD_*.
+
+ Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
+ used to be included but CONFIG_BOOTP_MASK was not defined.
+
+ Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 659e2f6736232a08acca8785c206e2b4d9cd07d7
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 09:10:49 2007 -0500
+
+ include/configs/[J-O]*: Cleanup BOOTP and lingering CFG_CMD_*.
+
+ Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
+ used to be included but CONFIG_BOOTP_MASK was not defined.
+
+ Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 11799434c5ff15a612577bb1ad1f4ea1a0595e4b
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Tue Jul 10 09:02:57 2007 -0500
+
+ include/configs/[A-I]*: Cleanup BOOTP and lingering CFG_CMD_*.
+
+ Explicitly add in default CONFIG_BOOTP_* options where cmd_confdefs.h
+ used to be included but CONFIG_BOOTP_MASK was not defined.
+
+ Remove lingering references to CFG_CMD_* symbols.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 1fe80d79c5c4e52d3410a7ab4b8515da095cdab3
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 22:08:34 2007 -0500
+
+ Finally retire cmd_confdefs.h and CONFIG_BOOTP_MASK!
+
+ All of the choices for CONFIG_BOOTP_ are now documented in
+ the README file. You must now individually select exactly
+ the set that you want using a series of
+ #define CONFIG_BOOTP_<x>
+ statements in the board port config files now.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit d3b8c1a743dcd31625c99e6a44590f207eb00028
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 21:57:31 2007 -0500
+
+ include/configs/[m-z]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_MASK.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2fd90ce575b02d189cbf443c85309bcd001aa393
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 21:48:26 2007 -0500
+
+ include/configs/[a-m]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_MASK.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 37d4bb70586659dedef1658ce1bed071be098aec
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 21:38:02 2007 -0500
+
+ include/configs/[T-Z]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_MASK.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 18225e8dd1950bd6dbf35011e436db7f474c187d
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 21:31:24 2007 -0500
+
+ include/configs/[P-S]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_MASK.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 7be044e4ea644b0ef1c486dadc1a4c2665b4374d
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 21:24:19 2007 -0500
+
+ include/configs/[H-N]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_MASK.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 5d2ebe1b3ef0055c661bb1a0d252bf252380069f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 21:16:53 2007 -0500
+
+ include/configs/[A-G]*: Directly use CONFIG_BOOTP_* symbols rather than CONFIG_BOOTP_MASK.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit f55f7f8d83f36021ab1f0e3d738f5d8c8083a7e3
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 19:12:30 2007 -0500
+
+ Retire CONFIG_COMMANDS finally.
+ Strip old CFG_CMD_* symbols out.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b5501f7d720fed99ab0b42c83f5dea52868ce007
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 19:10:03 2007 -0500
+
+ Update README.* to reference new CONFIG_CMD_* names now.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 4431283c7e6d54ae180d466e51bf2d97471a0ad9
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 19:06:00 2007 -0500
+
+ cpu/m*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 3a1ed1e1f922c419bb71f7df4949d783ade369fa
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:57:22 2007 -0500
+
+ cpu/[7a-ln-z]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit ab3abcbabd840928fb1eb5122118ca466b5e5013
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:45:16 2007 -0500
+
+ board/[q-z]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 3fe00109a5f12de55b6e25b1f98dfc24bc9090c9
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:38:39 2007 -0500
+
+ board/[m-p]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit c508a4cefd8a953fc64957650506a035e6e3d9d1
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:31:28 2007 -0500
+
+ board/[f-l]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b9307262f8a9f3b5c9e15a6067eadc17407146f6
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:24:55 2007 -0500
+
+ board/[d-e]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit fcec2eb93e126400009729328e797f12bc94f1fd
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:19:09 2007 -0500
+
+ board/[A-Za-c]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a593814f2be0c9cdc3133cd550b167b8a988328f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:10:50 2007 -0500
+
+ rtc/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 67350568f9d46e66c21829f3513b3db0caeb948b
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:05:38 2007 -0500
+
+ lib_{arm,avr32,blackfin,generic,i386}/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 7def6b34f910f08d7ef0a14646da067719237ca2
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 18:02:11 2007 -0500
+
+ lib_{m68k,microblaze,mips,ppc}/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit dd60d1223b99a88a7216f3e041fe40634ad4c2bb
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:56:50 2007 -0500
+
+ fs/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit c91898bbc505aff3e12a807af88e76da18efb7ee
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:46:09 2007 -0500
+
+ tools/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 643d1ab23960950b52e0a2803c2d3ea4c558fa01
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:45:14 2007 -0500
+
+ net/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit cb51c0bf88f95a1bca68324b0126f8eed8b43273
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:39:42 2007 -0500
+
+ drivers/[n-z]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 07d38a17e964aec4c7827f0ee9a583bc8cc1ad6b
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:30:01 2007 -0500
+
+ drivers/[a-m]*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit cde5c64d17cf4834aa7b5c373f288bc7dad27b29
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:22:37 2007 -0500
+
+ disk/: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 639221c76c88215bd55af83ad174fc30d1940f8f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Mon Jul 9 17:15:49 2007 -0500
+
+ include/: Remove obsolete references to CONFIG_COMMANDS
+ Mostly removed from comments here.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 4ef218f6fdf8d747f4589da5252b004e7d2c2876
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue Jul 10 00:01:28 2007 +0200
+
+ Coding style cleanup; update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit c8603cfbd4573379a6076c9c208545ba2bbf019a
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jul 9 11:00:24 2007 +0200
+
+ Small coding style cleanup
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 0f92c7e7c9a62755b1457d3c46f93c8c1f6c19fc
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Jul 9 10:10:08 2007 +0200
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ Remove unused CFG_NAND_LEGACY define
+
+ These boards to not have NAND.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit bd84ee4c2020c3a6861f4bb2e7ea0fb49f82e803
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Jul 9 10:10:06 2007 +0200
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ -cleanup
+ -use correct io accessors (in/out_be32())
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit e09f7ab5749c345f924da272bea0521a73af5b11
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Mon Jul 9 10:10:04 2007 +0200
+
+ Migrate esd 405EP boards to new NAND subsystem
+
+ This patch prepares the migration from the legacy NAND driver
+ to U-Boot's new NAND subsystem for esd boards.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit c3517f919d0f61650cf3027fd4faf0f631142f6c
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 18:10:08 2007 -0500
+
+ common/* non-cmd*: Remove obsolete references to CONFIG_COMMANDS
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit fd9bcaa35be64fe41a4223fdb6ecdbad52470b39
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 18:05:39 2007 -0500
+
+ common/cmd_[p-x]*: Remove obsolete references to CONFIG_COMMANDS.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit c76fe47425afc7d5d670ff0539823c85d65d9c42
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 18:02:23 2007 -0500
+
+ common/cmd_[i-n]*: Remove obsolete references to CONFIG_COMMANDS.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit baa26db4113679b80970ff447d91cc10217742a6
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 17:51:39 2007 -0500
+
+ common/cmd_[af]*: Remove obsolete references to CONFIG_COMMANDS.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit af075ee96e52dda7b6bca6c937588aeaaec5f2cd
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 17:02:01 2007 -0500
+
+ Clear up confusion over the CMD_POST and POST_DIAG mess.
+
+ For some reason, CONFIG_POST permeated as CONFIG_CMD_POST_DIAG
+ when it really means just CONFIG_CMD_DIAG. There is no CMD_POST.
+ Clear this mess up some.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b3631487105a57ab7cbadfc26efbaf9676275018
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 15:45:08 2007 -0500
+
+ Remove references to the old cmd_confdefs.h include file.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a22d4da95e20049b4daa1c2a022f61e8a72f2fb6
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 15:42:59 2007 -0500
+
+ include/configs: Catch some CONFIG_CMD_* conversion stragglers.
+
+ Use new CONFIG_CMD_* in lwmon5.h board config file.
+ Fix CONFIG_CMD_* typo braindamage in omap1510inn.h
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a5562901661bd428f7e5feb333f796372cb81019
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 15:31:57 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various [TUVWZYZ]* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit fe7f782d5b8c64a0195c68c31a0a11d4f641355e
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 15:02:44 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various S* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit e9a0f8f15c11f337967aa0600ad6e8af33037f50
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 15:12:40 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various R* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 12aa9fd23d724bd6ab88e1baa0db35133a27303f
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 14:55:07 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various Q* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit acf0269779422f3e147d2ddfb499c9f6ff10ad5e
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 14:49:44 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various P* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit e18a1061a8630cb67995fdf99afd3fb50d1b187d
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 14:21:43 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various [NO]* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8353e139bfad9059c54f5b2421f1a3090e15a2e2
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 14:14:17 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various M* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 348f258f24253433e4a2302a0bbceb6740a67246
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 13:46:18 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various [IJKL]* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 6c4f4da9bfc9f9403f54fce678ed0364b7c86a6a
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sun Jul 8 10:09:35 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various H* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 60a0876b5106b34220e459c208bbf648073306c0
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sat Jul 7 21:04:26 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various F* and G* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit dcaa71562826a2466e894c868d132509dcda8444
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sat Jul 7 20:56:05 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various E* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 3c3227f3c737502311b25b72084573901cbbf17d
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Sat Jul 7 20:40:43 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various D* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 49cf7e8ee7ef943fdfe866ce28410b0bfbf6a26c
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Jul 5 19:52:35 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various C* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit de8b2a6e33298dcdb10bdda48db25e53c3089eba
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Jul 5 19:32:07 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various B* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 498ff9a228485bd4b9f23d066bada268f9add1dd
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Thu Jul 5 19:13:52 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various A* named board config files.
+
+ Since ADS860.h includes "board/fads/fads.h" with ramifications
+ on the CONFIG_COMMAND treatment, it too has to be adjusted to
+ exclude already configured commands in this same commit.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 10e038932f22ee80ebd53de312531e70e6590a2f
+Author: Thomas Knobloch <knobloch@siemens.com>
+Date: Fri Jul 6 14:58:39 2007 +0200
+
+ [NAND] Bad block skipping for command nboot
+
+ The old implementation of command nboot does not support reading the image from
+ NAND flash with skipping of bad blocks. The patch implements a new version of
+ the nboot command: by calling nboot.jffs2 from the u-boot command line the
+ command will load the image from NAND flash with respect to bad blocks (by using
+ nand_read_opts()). This is similar to e.g. the NAND read command: "nand
+ read.jffs2 ...".
+
+ Signed-off-by: Thomas Knobloch <knobloch@siemens.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 334043f601a90ac53e5ecc846fbb73a1ef38cb1f
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 6 12:26:51 2007 +0200
+
+ ppc4xx: Update lwmon5 default environment
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5d187430a055d62f17ca84d75e7245439d1f7e75
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 6 11:48:24 2007 +0200
+
+ ppc4xx: Update lwmon5 board
+
+ Add unlock=yes environment variable to default variables to unlock
+ the CFI flash by default.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6b0a174a1e6f55e1f5a1fbb223cdad7645a4646e
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jul 6 09:45:47 2007 +0200
+
+ Fix problem with get/setdcr commands introduced by cfg patches
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f1152f8c28db4a22087c21c618a3f7baa48e9a4f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jul 6 02:50:19 2007 +0200
+
+ Code cleanup and default config update for STC GP3 SSA board.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit e4dbe1b215f5c6c462e76909d240bd96472b84de
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 5 17:56:27 2007 +0200
+
+ Fixing some typos etc. introduced mainly by cfg patches.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit b6b4684546809f89c8bac72863ca49b5fd8ac0cd
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu Jul 5 11:12:16 2007 +0200
+
+ Minor coding style cleanup. Update CHANGELOG.
+
+commit dca3b3d6d6396b67e5e84af53452164923c73443
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:46 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various [v-z]* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 6c18eb9804b525f3e4f3bb3d014dd69a200d9fa7
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:38 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various t* and u* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 46da1e96b7db14f4fcd2c92544e7c0862024bc76
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:30 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various s* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 90cc3eb6d2be856d9ddd81436de9cf343bc6b5c8
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:23 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various q* and r* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 26a34560d56a9df5bc2ae23525d9229736134757
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:17 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various p* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a5cb23092a7d31490a33d4ec871468b63babfa3c
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:13 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various o* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 929a2bfd142737003a8fc32e1b86e1f2c1850257
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:07 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various n* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 5dc11a511960d490f7f01ffd746edfe6277f99b0
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:33:01 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various m* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 9bbb1c0820c1fbd3811ab6ee4ba0f6c6f76b27e4
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:57 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various l* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit bc234c129fa04fb9fa33530930e5cbc6084cd47a
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:51 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various j* and k* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 1d2c6bc491969f8d8fb34c8e30e8bea7a2af9c31
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:32 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various i* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 48d5d102a2f2e619c92050b9aedbb69689185bc0
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:25 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various h* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 72eb0efaed7048afcc61fc6f0085c49394b5dc36
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:19 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various g* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 1bec3d3002d3bbbae6f2468a0f7376db1120d33e
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:10 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various e* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit ab999ba1b31ebe78dd16374394a55d7c6e5aa6e4
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:32:03 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various d* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 37e4f24b87fa255ae456d193b7cd23c18dd1d56b
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:31:56 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various c* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit ba2351f9d1e841bd00ea6dad1e3c16d0259ad264
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:31:49 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various b* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 0b361c916617aff79e647b40f0e43361e0bbaccf
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:31:42 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various a* named board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b730cda82e362df6a22f4c59c0a9b97e885b1014
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:31:35 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in mpc5xx board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit d794cfefead5fc177cf4f41164e80382e9c9484a
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:31:15 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in various 5200 board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit ef0df52ab49eea4a30c15087fd27d54c1d946f2c
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:31:07 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in STx board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 866e3089bfc826bb4dc74637f8aad87a3bab79fc
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:30:58 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in sbc* board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2694690e285acaa34922f55f4b5ae030da60c55a
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:30:50 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in TQM board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 1cc4c458329765b58e584a19821e796b3c10e976
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:30:28 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in 82xx board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 8ea5499afdaba0acf60923dd99001c399d4a7c8e
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jul 4 22:30:06 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in 83xx board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b44896215a09c60fa40cae906f7ed207bbc2c492
+Author: Sergei Poselenov <sposelenov@emcraft.com>
+Date: Thu Jul 5 08:17:37 2007 +0200
+
+ Merged POST framework with the current TOT.
+
+ Signed-off-by: Sergei Poselenov <sposelenov@emcraft.com>
+
+commit b24629fa377214d63bb40d1360e354b6d3e4af56
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jun 13 13:23:15 2007 -0500
+
+ mpc86xx: Remove old CFG_CMD_* references.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 46175d9764da129bb4fd341cd2554dc7d55f5b2a
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jun 13 13:22:54 2007 -0500
+
+ Add MPC8568MDS to MAKEALL 85xx target.
+
+ It was missing from the original port submission.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 2835e518c969e5124ba1174eef3e8375e12fa7d5
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jun 13 13:22:08 2007 -0500
+
+ include/configs: Use new CONFIG_CMD_* in 85xx board config files.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 56b304ac2091689506088a9ae67f63fd6300cf16
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Wed Jun 13 13:21:37 2007 -0500
+
+ Fix #if typo in CONFIG_CMD_* changes.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit f780b83316d9af1f61d71cc88b1917b387b9b995
+Author: Niklaus Giger <niklausgiger@gmx.ch>
+Date: Wed Jun 27 18:11:38 2007 +0200
+
+ resubmit: ppc4xx: Remove sequoia/sequioa.h. Cleanup ppc440.h for PPC440EPX
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
+
+commit 04e6c38b766eaa2f3287561563c9e215e0c3a0d4
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jul 4 10:06:30 2007 +0200
+
+ ppc4xx: Update lwmon5 board
+
+ - Add optional ECC generation routine to preserve existing
+ RAM values. This is needed for the Linux log-buffer support
+ - Add optional DDR2 setup with CL=4
+ - GPIO50 not used anymore
+ - Lime register setup added
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6810a34677dbc446334f5e451f1682426dd33b49
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:17:28 2007 -0600
+
+ Fix Makefile to use $(MKCONFIG) macro for all board ports
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 90b1b2d69b9396ff2f01165ebc16c9a594eb5926
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:17:28 2007 -0600
+
+ Fix Makefile to use $(MKCONFIG) macro for all board ports
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 057004f4a4863554d56cc56268bfa7c7d9738e27
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:49 2007 -0600
+
+ Correct fixup relocation for mpc83xx
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 5af61b2f4b838a05f79be274f3e5a66edd2d9c96
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:44 2007 -0600
+
+ Correct fixup relocation for mpc8260
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f3a52fe05923935db86985daf9438e2f70ac39aa
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:39 2007 -0600
+
+ Correct fixup relocation for mpc824x
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit a85dd254c0577fca13627c46e93fc2ad4c4f1f00
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:34 2007 -0600
+
+ Correct fixup relocation for mpc8220
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 6f7576b20ecf0d040c3ac3b032b5cbc860e38a90
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:29 2007 -0600
+
+ Correct fixup relocation for MPC5xxx
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 3649cd99ba815b6601868735765602f00ef3692b
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:24 2007 -0600
+
+ Correct relocation fixup for mpc5xx
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f82b3b6304b620ef7e28bfaa1ea887a2ad2fa325
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:19 2007 -0600
+
+ Don't set gd->reloc_off if relocation of .fixup works correctly
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit e1a6144c32dc7de73bcdd33995de0148cbd0bd28
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:14 2007 -0600
+
+ Remove obsolete mpc83xx linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 17e32fc3908bf7089d3f16fc82a1c3ae674dd65b
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:09 2007 -0600
+
+ Consolidate mpc8260 linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit af7d38b393690d7eeaf418ac85a1e831a50d5fd0
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:34:04 2007 -0600
+
+ Remove obsolete mpc824x linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f94a3aecebc40ca0939c7d66d010009cf51be9e2
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:59 2007 -0600
+
+ Remove obsolete mpc824x linker scripts (3 of 4)
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit a71c084f3ac7fedf144537db2b2da47323068833
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:53 2007 -0600
+
+ Remove obsolete mpc824x linker scripts (2 of 4)
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit f670a15468d1365241d40022b9408e1004181f5e
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:48 2007 -0600
+
+ Remove obsolete mpc824x linker scripts (1 of 4)
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 09555bd45a04c0e54f172528d21bc18896550d28
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:43 2007 -0600
+
+ Remove obsolete mpc8220 linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 5efb992f046e51225c93d52f80fecbe433abd789
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:38 2007 -0600
+
+ Remove obsolete mpc5xxx linker scripts (3 of 3)
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 07c13dfef65b31647e69d8b61daa1eec598add1a
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:33 2007 -0600
+
+ Remove obsolete mpc5xxx linker scripts (2 of 3)
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit b4f67513a624ce85866c66c575bd2d9d7977d7f0
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:28 2007 -0600
+
+ Remove obsolete mpc5xxx linker scripts (1 of 3)
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit b7d8e05f8675249b5f208aa73babeed384a4519d
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:23 2007 -0600
+
+ Remove obsolete mpc5xx linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 416a0b6d40f6eba3a2fc547253c16bda28d922f7
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:18 2007 -0600
+
+ Consolidate mpc83xx linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 5fc59175b92883ed5d2666a04e6bc49e70a4a365
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:13 2007 -0600
+
+ Consolidate mpc8260 linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 737f9eb02d7335df2b3e4d7a4d3348784d1da207
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:08 2007 -0600
+
+ Consolidate mpc824x linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 9c757b789a59a855db57b448dd825329c4e9c4a0
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:33:03 2007 -0600
+
+ Consolidate mpc8220 linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit d181c9a15cd41863fe24840d17848429f27d3c8c
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:32:58 2007 -0600
+
+ Consolidate mpc5xxx linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 287ac924adb7291bebe5086652a362a30ab28b13
+Author: Grant Likely <grant.likely@secretlab.ca>
+Date: Tue Jul 3 00:32:53 2007 -0600
+
+ Consolidate mpc5xx linker scripts
+
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 52b8704d0245e589f86d462e9ec25aeb7ecbbbdd
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jul 4 00:43:53 2007 +0200
+
+ Fix a few file permission problems.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 78e0cf2de7be7f1eaeeb622eb61fd50e4d5e205c
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jul 4 00:38:38 2007 +0200
+
+ Minor coding style cleanup. Rebuild CHANGELOG file.
+
+commit 2f9c19e496acb6bb50d9299e1aab377625d48c38
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:44 2007 -0500
+
+ configs/ mpc86xx: Rewrite command line options using new CONFIG_CMD-* style.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 602ad3b33d9ceef83dbab46be68646d645d637ee
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:39 2007 -0500
+
+ README: Rewrite command line config to use CONFIG_CMD_* names.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 72a074cec68e5bad60d63206c050974e08afd804
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:34 2007 -0500
+
+ include/ non-config: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 5fcf543e0b6628c76ff48705b1b0566bfd11507b
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:28 2007 -0500
+
+ tools/ : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 9107ebe0d352420895ab69b715697bdebc8caf50
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:23 2007 -0500
+
+ board/[k-z]*: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 5e378003d592ea828ec69d6defcd4de79096dd5c
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:19 2007 -0500
+
+ board/[Ma-i]*: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 737184114ec9c9e0ab94d6713536126073bd2472
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:15 2007 -0500
+
+ cpu/ non-mpc*: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit f48070fe5fe440dfb5ee5268c920de70e48ea327
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:08 2007 -0500
+
+ cpu/mpc*/ : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 0c505db0a0dc1f670b13ce3b4d3fbf1ec5b3cbd2
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:03:03 2007 -0500
+
+ lib_*/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 73f032021ec5f13cda8faa4e34b6de80960eb86f
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:58 2007 -0500
+
+ lib_ppc/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 98b79003c21c2578206003256de4e781d6b36ca8
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:53 2007 -0500
+
+ rtc/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 6e2115acb6a892d53a6881bf253ae41d3df39156
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:49 2007 -0500
+
+ net/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 45cdb9b72c94655c7308b464a2666057c0b286e0
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:34 2007 -0500
+
+ disk/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 4e109ae98294a5ca7ff848b7652c7bfd4023a94a
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:20 2007 -0500
+
+ fs/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit d5be43de93ff905c465e509d45a3164ef48d26e7
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:10 2007 -0500
+
+ drivers/: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit b453960d4fdb87b3970d96119b90df2ed024fc4a
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:02:05 2007 -0500
+
+ common/ non-cmd: Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 65c450b47a62659d522cfa8f4fa1e4e5c60dccd0
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:01:54 2007 -0500
+
+ common/cmd_[i-z]* : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit a76adc8142c1d956385a109e0b70f9319ede4d66
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:01:43 2007 -0500
+
+ common/cmd_[a-f]* : Augment CONFIG_COMMANDS tests with defined(CONFIG_CMD_*).
+
+ This is a compatibility step that allows both the older form
+ and the new form to co-exist for a while until the older can
+ be removed entirely.
+
+ All transformations are of the form:
+ Before:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+ After:
+ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit ec63b10b61fd68238d4c15c1cd04c0b38228e2c1
+Author: Jon Loeliger <jdl@jdl.com>
+Date: Mon Jun 11 19:01:34 2007 -0500
+
+ Introduce initial versions of new Command Config files.
+
+ Derive three new files from cmd_confdefs.h:
+ config_bootp.h - Has BOOTP related config options, not commands
+ config_cmd_all.h - Has a CONFIG_CMD_* definition for every command
+ config_cmd_default.h - Has a CONFIG_CMD_* definition for default cmds.
+
+ For now, include "config_bootp.h" for compatability until all
+ users of it directly include it properly.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 1f2a05898658900dc5717761e27abf2052e67e13
+Author: Mushtaq Khan <mushtaqk_921@yahoo.co.in>
+Date: Sat Jun 30 18:50:48 2007 +0200
+
+ Fix S-ATA support.
+
+ Signed-off-by: mushtaq khan <mushtaqk_921@yahoo.co.in>
+
+commit a5d71e290f3673269be8eefb4ec44f53412f9461
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Mon Jun 25 19:11:37 2007 +0200
+
+ [PCS440EP] get rid of CONFIG_PPC4xx_USE_SPD_DDR_INIT_HANG
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit a1bd6200eccd3a02040a955d5f43d3ee1fc9f93b
+Author: Niklaus Giger <niklaus.giger@nestal.com>
+Date: Mon Jun 25 17:03:13 2007 +0200
+
+ ppc4xx: PPC440EPx Emit DDR0 registers on machine check interrupt
+
+ This patch prints the DDR status registers upon machine check
+ interrupt on the 440EPx/GRx. This can be useful especially when
+ ECC support is enabled.
+
+ I added some small changes to the original patch from Niklaus to
+ make it compile clean.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 807018fb7faceb429ce0cb47baa2073746b33a4e
+Author: Niklaus Giger <niklaus.giger@nestal.com>
+Date: Mon Jun 25 16:50:55 2007 +0200
+
+ ppc4xx: Fix O=buildir builds
+
+ This patch fixes the problem to assemble cpu/ppc4xx/start.S
+ experienced last week where building failed having specified
+ O=../build.sequoia.
+
+ Signed-off-by: Niklaus Giger <niklaus.giger@nestal.com>
+
+commit 466fff1a7bb5fe764a06450626f6098219f446b8
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Jun 25 15:57:39 2007 +0200
+
+ ppc4xx: Add pci_pre_init() for 405 boards
+
+ This patch removes the CFG_PCI_PRE_INIT option completely, since
+ it's not needed anymore with the patch from Matthias Fuchs with
+ the "weak" pci_pre_init() implementation.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6f35c53166213c24a5a0e2390ed861136ff73870
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Sun Jun 24 17:41:21 2007 +0200
+
+ ppc4xx: Maintenance patch for esd's CPCI405 derivats
+
+ -add pci_pre_init() for pci interrupt fixup code
+ -disable phy sleep mode via reset_phy() function
+ -use correct io accessors
+ -cleanup
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 5a1c9ff0c44305b57cb4d8f9369bba90bcf0e1f8
+Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+Date: Sun Jun 24 17:23:41 2007 +0200
+
+ ppc4xx: Add pci_pre_init() for 405 boards
+
+ This patch adds support for calling a plattform dependant
+ pci_pre_init() function for 405 boards. This can be used to
+ move the current pci_405gp_fixup_irq() function into the
+ board code.
+
+ This patch also makes the CFG_PCI_PRE_INIT define obsolete.
+ A default function with 'weak' attribute is used when
+ a board specific pci_pre_init() is not implemented.
+
+ Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
+
+commit 1636d1c8529c006d106287cfbc20cd0a246fe1cb
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jun 22 23:59:00 2007 +0200
+
+ Coding stylke cleanup; rebuild CHANGELOG
+
+commit 2dc64451b4c08ffd619372abfdc2506a2e2363b9
+Author: Igor Lisitsin <igor@emcraft.com>
+Date: Wed Apr 18 14:55:19 2007 +0400
+
+ Adapt log buffer code to support Linux 2.6
+
+ A new environment variable, "logversion", selects the log buffer
+ behaviour. If it is not set or set to a value other than 2, then the
+ old, Linux 2.4.4, behaviour is selected.
+
+ Signed-off-by: Igor Lisitsin <igor@emcraft.com>
+ --
+
+commit a11e06965ec91270c51853407ff1261d3c740386
+Author: Igor Lisitsin <igor@emcraft.com>
+Date: Wed Mar 28 19:06:19 2007 +0400
+
+ Extend POST support for PPC440
+
+ Added memory, CPU, UART, I2C and SPR POST tests for PPC440.
+
+ Signed-off-by: Igor Lisitsin <igor@emcraft.com>
+ --
+
+commit 566a494f592ae3b3c0785d90d4e1ba45574880c4
+Author: Heiko Schocher <hs@pollux.denx.de>
+Date: Fri Jun 22 19:11:54 2007 +0200
+
+ [PCS440EP] upgrade the PCS440EP board:
+ - Show on the Status LEDs, some States of the board.
+ - Get the MAC addresses from the EEProm
+ - use PREBOOT
+ - use the CF on the board.
+ - check the U-Boot image in the Flash with a SHA1
+ checksum.
+ - use dynamic TLB entries generation for the SDRAM
+
+ Signed-off-by: Heiko Schocher <hs@denx.de>
+
+commit 3a1f5c81b0b9557817a789bece839905581c2205
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 22 16:58:40 2007 +0200
+
+ ppc4xx: Fix problem with extended program_tlb() funtion
+
+ The recently extended program_tlb() function had a problem when
+ multiple TLB's had to be setup (for example with 512MB of SDRAM). The
+ virtual address was not incremented. This patch fixes this issue
+ and is tested on Katmai with 512MB SDRAM.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 02032e8f14751a1a751b09240a4f1cf9f8a2077f
+Author: Rafal Jaworowski <raj@semihalf.com>
+Date: Fri Jun 22 14:58:04 2007 +0200
+
+ [ppc] Fix build breakage for all non-4xx PowerPC variants.
+
+ - adapt to the more generic EXCEPTION_PROLOG and CRIT_EXCEPTION macros
+ - minor 4xx cleanup
+
+commit d677b32855f577ae2690dcd64a172cdd706e0ffc
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Fri Jun 22 10:34:12 2007 +0200
+
+ [patch] add nand_init() prototype to nand.h
+
+ since nand_init() is expected to be called by other parts of u-boot, there
+ should be a prototype for it in nand.h
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 83b4cfa3d629dff0264366263c5e94d9a50ad80b
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jun 20 18:14:24 2007 +0200
+
+ Coding style cleanup. Refresh CHANGELOG.
+
+commit b3f9ec86e388207fd03dcdf7b145b9ed080bf024
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 19 17:22:44 2007 +0200
+
+ ppc4xx: Add bootstrap command for AMCC Sequoia (440EPx) eval board
+
+ This patch adds a board command to configure the I2C bootstrap EEPROM
+ values. Right now 533 and 667MHz are supported for booting either via NOR
+ or NAND FLASH. Here the usage:
+
+ => bootstrap 533 nor ;to configure the board for 533MHz NOR booting
+ => bootstrap 667 nand ;to configure the board for 667MHz NNAND booting
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit df8a24cdd30151505cf57bbee5289e91bf53bd1b
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 19 16:42:31 2007 +0200
+
+ [ppc4xx] Fix problem with NAND booting on AMCC Acadia
+
+ The latest changes showed a problem with the location of the NAND-SPL
+ image in the OCM and the init-data area (incl. cache). This patch
+ fixes this problem.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 86ba99e34194394052d24c04dc40d1263d29a26f
+Author: Stefan Roese <sr@denx.de>
+Date: Tue Jun 19 16:40:58 2007 +0200
+
+ [ppc4xx] Change board/amcc/acadia/cpr.c to pll.c
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 8e585f02f82c17cc66cd229dbf0fd3066bbbf658
+Author: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+Date: Mon Jun 18 13:50:13 2007 -0500
+
+ Added M5329AFEE and M5329BFEE Platforms
+
+ Added board/freescale/m5329evb, cpu/mcf532x, drivers/net,
+ drivers/serial, immap_5329.h, m5329.h, mcfrtc.h,
+ include/configs/M5329EVB.h, lib_m68k/interrupts.c, and
+ rtc/mcfrtc.c
+
+ Modified CREDITS, MAKEFILE, Makefile, README, common/cmd_bdinfo.c,
+ common/cmd_mii.c, include/asm-m68k/byteorder.h, include/asm-m68k/fec.h,
+ include/asm-m68k/io.h, include/asm-m68k/mcftimer.h,
+ include/asm-m68k/mcfuart.h, include/asm-m68k/ptrace.h,
+ include/asm-m68k/u-boot.h, lib_m68k/Makefile, lib_m68k/board.c,
+ lib_m68k/time.c, net/eth.c and rtc/Makefile
+
+ Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+commit e73846b7cf1e29ae635bf9bb5570269663df2ee5
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 15 11:33:41 2007 +0200
+
+ [ppc4xx] Change lwmon5 port to work with recent 440 exception rework
+
+ Now CONFIG_440 has to be defined in all PPC440 board config files.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit efa35cf12d914d4caba942acd5a6c45f217de302
+Author: Grzegorz Bernacki <gjb@semihalf.com>
+Date: Fri Jun 15 11:19:28 2007 +0200
+
+ ppc4xx: Clean up 440 exceptions handling
+
+ - Introduced dedicated switches for building 440 and 405 images required
+ for 440-specific machine instructions like 'rfmci' etc.
+
+ - Exception vectors moved to the proper location (_start moved away from
+ the critical exception handler space, which it occupied)
+
+ - CriticalInput now serviced (with default handler)
+
+ - MachineCheck properly serviced (added a dedicated handler and return
+ subroutine)
+
+ - Overall cleanup of exceptions declared with STD_EXCEPTION macro (unused,
+ unhandled and those not relevant for 4xx were eliminated)
+
+ - Eliminated Linux leftovers, removed dead code
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Signed-off-by: Rafal Jaworowski <raj@semihalf.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit b765ffb773f5a3cd5aa94ec76b6a05276b8cd5b2
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 15 08:18:01 2007 +0200
+
+ [ppc4xx] Add initial lwmon5 board support
+
+ This patch adds initial support for the Liebherr lwmon5 board euqipped
+ with an AMCC 440EPx PowerPC.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 85f737376d5ff3d5f0d45a8b657686326d175307
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 15 07:39:43 2007 +0200
+
+ [ppc4xx] Extend 44x GPIO setup with default output state
+
+ The board config array CFG_440_GPIO_TABLE for the ppc440 GPIO setup
+ is extended with the default GPIO output state (level).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit dbca208518e5e7f01a6420588d1cd6e60db74c2b
+Author: Stefan Roese <sr@denx.de>
+Date: Thu Jun 14 11:14:32 2007 +0200
+
+ [ppc4xx] Extend program_tlb() with virtual & physical addresses
+
+ Now program_tlb() allows to program a TLB (or multiple) with
+ different virtual and physical addresses. With this change, now one
+ physical region (e.g. SDRAM) can be mapped 2 times, once with caches
+ diabled and once with caches enabled.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9912121f7ed804ea58fd62f3f230b5dcfc357d88
+Author: Detlev Zundel <dzu@denx.de>
+Date: Wed May 23 19:02:41 2007 +0200
+
+ Change 'repeatable' attribute of some commands to sensible values.
+
+ Most prominently this changes 'erase' to be non-repeatable.
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 5afb202093f6a001797db92cf695b93a70ea9ab4
+Author: Detlev Zundel <dzu@denx.de>
+Date: Wed May 23 18:47:48 2007 +0200
+
+ Fix 'run' not to continue after interrupted command
+
+ Signed-off-by: Detlev Zundel <dzu@denx.de>
+
+commit 9b7464a2c88614e1061f509c48930a3d240d1a35
+Author: Jason Jin <Jason.jin@freescale.com>
+Date: Mon Jun 11 15:14:24 2007 +0200
+
+ USB: This patch fix readl in ohci swap reg access.
+
+ Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+
+commit 8f8416fada9faf94b9a92f21fe6000643cb521d5
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Fri Jun 8 14:52:22 2007 +0200
+
+ TQM5200: Add Flat Device Tree support, update default env. accordingly.
+
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 9045f33c023f698660a2e45d1b2194c0711abebc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Fri Jun 8 10:24:58 2007 +0200
+
+ Fix config problems on SC3 board; make ide_reset_timeout work.
+
+commit fba3fb0449b8a54542aed1e729de76e7f5a2ff1b
+Author: Benoît Monin <bmonin@adeneo.eu>
+Date: Fri Jun 8 09:55:24 2007 +0200
+
+ [PATCH] fix gpio setting when using CFG_440_GPIO_TABLE
+
+ Set the correct value in GPIOx_TCR when configuring the gpio
+ with CFG_440_GPIO_TABLE.
+
+ Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit f539edc076cfe52bff919dd512ba8d7af0e22092
+Author: Vadim Bendebury <vbendeb@google.com>
+Date: Thu May 24 15:52:25 2007 -0700
+
+ cosmetic changes to bcm570x driver
+
+ This is a cosmetic only changes submission.
+ It affects files relevant to bcm570x driver.
+ the commands used to generate this change was
+
+ cd drivers
+ Lindent -pcs -l80 bcm570x.c bcm570x_lm.h bcm570x_mm.h tigon3.c tigon3.h
+
+ The BMW target (the only one using this chip so far) builds cleanly, the
+ `before and after' generated object files for drivers/bcm570x.c and
+ drivers/tigon3.o are identical as reported by objdump -d
+
+ Signed-off-by: Vadim Bendebury <vbendeb@google.com>
+ Signed-off-by: Ben Warren <bwarren@qstreams.com>
+
+commit 725671ccd2cd04c9ebc50c9e5a94dd8cbade66b7
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed Jun 6 16:26:56 2007 +0200
+
+ Coding Style cleanup; generate new CHANGELOG file.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 19d763c35e0b5568eaf0b8adbf7a68ccfe7fa243
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Jun 6 11:49:44 2007 +0200
+
+ TRAB, USB: update trab board configuration for use of generic ohci driver
+
+commit dace45acd1c1357daa9322099d07c9a9e08b0024
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Jun 6 11:49:43 2007 +0200
+
+ USB: ohci fixes and cleanup for ppc4xx and yosemite board.
+
+commit 72657570b61635c74fa0c3f0e9e7d0671a9d08df
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Jun 6 11:49:43 2007 +0200
+
+ USB: ohci fixes and cleanup for mpc5xxx and IceCube board config
+
+commit fc43be478f2aa37ce38acd85355038866e4162af
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Jun 6 11:49:35 2007 +0200
+
+ USB/OHCI: endianness cleanup in the generic ohci driver
+
+commit c440bfe6d6d92d66478a7e84402b31f48413617b
+Author: Stefan Roese <sr@denx.de>
+Date: Wed Jun 6 11:42:13 2007 +0200
+
+ ppc4xx: Add NAND booting support for AMCC Acadia (405EZ) eval board
+
+ This patch adds NAND booting support for the AMCC Acadia eval board.
+
+ Please make sure to configure jumper J7 to position 2-3 when booting
+ from NOR, and to position 1-2 when booting for NAND.
+
+ I also added a board command to configure the I2C bootstrap EEPROM
+ values. Right now only 267MHz is support for booting either via NOR
+ or NAND FLASH. Here the usage:
+
+ => bootstrap 267 nor ;to configure the board for 267MHz NOR booting
+ => bootstrap 267 nand ;to configure the board for 267MHz NNAND booting
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 18135125f909948b85d1d6881ab4ac0efb4a1c58
+Author: Rodolfo Giometti <giometti@linux.it>
+Date: Wed Jun 6 10:08:14 2007 +0200
+
+ Files include/linux/byteorder/{big,little}_endian.h define
+ __BIG_ENDIAN and __LITTLE_ENDIAN.
+
+ Signed-off-by: Rodolfo Giometti <giometti@linux.it>
+
+commit a81d1c0b85b13e9d45f2d87de96a51a6e0ef0f82
+Author: Zhang Wei <wei.zhang@freescale.com>
+Date: Wed Jun 6 10:08:14 2007 +0200
+
+ Add USB PCI-OHCI, USB keyboard and event poll support to the
+ MPC8641HPCN board config file.
+
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
+
+commit 4dae14ce8fbdf380017dc54f172218e7d2acc889
+Author: Zhang Wei <wei.zhang@freescale.com>
+Date: Wed Jun 6 10:08:14 2007 +0200
+
+ USB PCI-OHCI, interrupt pipe and usb event poll support
+
+ This patch added USB PCI-OHCI chips support, interrupt pipe support
+ and usb event poll support. For supporting the USB interrupt pipe, the
+ globe urb_priv is moved to purb in ed struct. Now, we can process
+ several urbs at one time. The interrupt pipe support codes are ported
+ from Linux kernel 2.4.
+
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com>
+
+commit fdcfaa1b02268b2899e374b35adf936c911a47eb
+Author: Zhang Wei <wei.zhang@freescale.com>
+Date: Wed Jun 6 10:08:13 2007 +0200
+
+ USB event poll support
+
+ This patch adds USB event poll support, which could be used in usbkbd
+ and other usb devices driver when the asynchronous interrupt
+ processing is supported.
+
+ Signed-off-by: Zhang Wei <wei.zhang@freescale.com
+
+commit 9a1d00fa47c1e05e3fdb60b33213af4e18d4c18e
+Author: Rodolfo Giometti <giometti@linux.it>
+Date: Wed Jun 6 10:08:12 2007 +0200
+
+ ISP116x: delay for crappy USB keys
+
+ Using some (very) slow USB keys cause the USB host controller buffers
+ are not ready to be read by the CPU so we need an extra delay before
+ reading the USB storage data.
+
+ Signed-off-by: Rodolfo Giometti <giometti@linux.it>
+
+commit 09444143670c9c2243cb7aba9f70b3713d33bed1
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Wed Jun 6 10:08:12 2007 +0200
+
+ Change duplicate usb_cpu_init_fail to usb_board_init_fail
+
+ Thanks to Liew Tsi Chung <Tsi-chung.Liew@freescale.com> for pointing
+ this out.
+
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
+commit 32922cdc470fdfd39bea0c1c4f582d3fb340421e
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue Jun 5 12:30:52 2007 -0500
+
+ mpc8641 image size cleanup
+
+ e600 does not have a bootpg restriction.
+ Move the version string to beginning of image at fff00000.
+ Resetvec.S is not needed.
+ Update flash copy instructions.
+ Add tftpflash env variable
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit e3cbe1f93c5722f8ebbad468e30c069a2b511097
+Author: Benoît Monin <bmonin@adeneo.eu>
+Date: Mon Jun 4 08:36:05 2007 +0200
+
+ [PATCH] Fix ppc4xx bootstrap letter displayed on startup
+
+ The attached patch is mainly cosmetic, allowing u-boot to
+ display the correct bootstrap option letter according to the
+ datasheets.
+
+ The original patch was extended with 405EZ support by Stefan
+ Roese.
+
+ Signed-off-by: Benoit Monin <bmonin@adeneo.eu>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5b1313fb2758ffce8b624457f777d8cc6709608d
+Author: Nikita V. Youshchenko <yoush@debian.org>
+Date: Wed May 23 12:45:19 2007 +0400
+
+ fix compilation problem for mpc8349itx CFG_RAMBOOT
+
+ Current include/configs/MPC8349ITX.h does contain some support for building
+ image that will be started from memory (without putting in into flash).
+ It could be triggered by building with TEXT_BASE set to a low value.
+
+ However, this support is incomplete: using of low TEXT_BASE causes
+ defining configuration macros in inconsistent way, which later leads
+ to compilation errors. In particular. flash support is being disabled,
+ but then flash structures get referenced.
+
+ This patch fixes this, making it possible to build with low TEXT_BASE.
+
+ Signed-Off-By: Nikita Youshchenko <yoush@debian.org>
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 8a364f0970de49949d635e60accf463c6443ef8c
+Author: Nikita V. Youshchenko <yoush@debian.org>
+Date: Wed May 23 12:45:25 2007 +0400
+
+ add missing 'console' var to default mpc8349itx config
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 18d156eb37c90fadc8ec7a81a3b89176161f85b7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 16:18:17 2007 +0200
+
+ ppc4xx: Add missing file for Bamboo NAND booting support
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 155a96478a0881e6da96cbbbcf34952d6a3b1b4b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:58:19 2007 +0200
+
+ ppc4xx: Undo Sequoia patch for dynamic EBC speed support of 83MHz
+
+ This patch undoes the patch by Jeff Mann with commit-id ada4697d. As
+ suggested by AMCC it is not recommended to dynamically change the EBC
+ speed after bootup. So we undo this change to be on the safe side.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 9d9096043e8f713d4bf1743d32e1459e6a11644b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:29:04 2007 +0200
+
+ ppc4xx: Update Sequoia NAND booting support with ECC
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit cf959c7d6687567c308e366e9581e1a5aff5cc5b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:27:11 2007 +0200
+
+ ppc4xx: Add NAND booting support for AMCC Bamboo (440EP) eval board
+
+ This patch adds NAND booting support for the AMCC Bamboo eval board.
+ Since the NAND-SPL boot image is limited to 4kbytes, this version
+ only supports the onboard 64MBytes of DDR. The DIMM modules can't be
+ supported, since the setup code for I2C DIMM autodetection and
+ configuration is too big for this NAND bootloader.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 42be56f53c8b107868e6125c8524ae84293e95a7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:23:04 2007 +0200
+
+ NAND: Add ECC support to NAND booting support in nand_spl/nand_boot.c
+
+ The U-Boot NAND booting support is now extended to support ECC
+ upon loading of the NAND U-Boot image.
+
+ Tested on AMCC Sequoia (440EPx) and Bamboo (440EP).
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit a471db07fbb65a841ffc9f4f112562b945230f98
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:19:29 2007 +0200
+
+ ppc4xx: Prepare Bamboo port for NAND booting support
+
+ This patch updates the "normal" Bamboo NOR booting port, so
+ that it is compatible with the coming soon NAND booting
+ Bamboo port.
+
+ It also enables the 2nd NAND flash on the Bamboo.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 53ad02103fb8be4138a9937a8ab91fcdff7b4987
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:16:58 2007 +0200
+
+ ppc4xx: Update in_be32() functions and friends to latest Linux version
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 91da09cfbce0c1de05d6d84aa8363d666fa7ea3c
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:15:12 2007 +0200
+
+ NAND: Add hardware ECC support to the PPC4xx NAND driver ndfc.c
+
+ This patch adds hardware ECC support to the NDFC driver. It also
+ changes the register access from using the "simple" in32/out32
+ functions to the in_be32/out_be32 functions, which make sure
+ that the access is correctly synced. This is the only recommended
+ access to SoC registers in the current Linux kernel.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 17b5e862287cca76f19dcf8b741e61a7d06617f2
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:12:15 2007 +0200
+
+ NAND: Update nand_ecc.c to latest Linux version
+
+ This patch updates the nand_ecc code to the latest Linux version.
+ The main reason for this is the more compact code. This makes
+ it possible to include the ECC code into the NAND bootloader
+ image (NAND_SPL) for PPC4xx.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d2d432760d2199d0e8558fdd9d1789b8131abcf7
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 15:09:50 2007 +0200
+
+ ppc4xx: 44x DDR driver code cleanup and small fix for Bamboo
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit e4bbed2803a2ad0521c7362f5d3e065f99abaedc
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 13:45:24 2007 +0200
+
+ ppc4xx: Change Luan config file to support ECC
+
+ With the updated 44x DDR2 driver the Luan board now supports
+ ECC generation and checking.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7187db73491c8de0fb56efb5e5134ba5ec443089
+Author: Stefan Roese <sr@denx.de>
+Date: Fri Jun 1 13:45:00 2007 +0200
+
+ ppc4xx: Update 44x_spd_ddr2 code (440SP/440SPe)
+
+ Add config option for 180 degree advance clock control as needed
+ for the AMCC Luan eval board.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit ee1529838abbfaa35f14e3ffbeaaba693159475f
+Author: Wolfgang Denk <wd@denx.de>
+Date: Thu May 31 17:20:09 2007 +0200
+
+ Add support for STX GP3SSA (stxssa) Board with 4 MiB flash.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 7049288fb1f16f1b317140226cdebd07bd416395
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:26:46 2007 +0200
+
+ Motion-PRO: Code cleanup, fix of a typo in OF_STDOUT_PATH.
+
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 4520fd4d2c450da49637216aa0e53739b61c60ac
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:06:36 2007 +0200
+
+ Motion-PRO: Add support for redundant environment.
+
+ Enable redundant environment, add a MTD partition for it; also add env.
+ variable command for passing MTD partitions to the kernel command line.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit a26eabeec31746f06d309103690892805696e344
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:05:11 2007 +0200
+
+ Motion-PRO: Change maximum console buffer size from 256 to 1024 bytes.
+
+ Allow passing longer command line to the kernel - useful especially
+ for passing MTD partition layout.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 9160b96f71483a116de81c68985e8ee306d36764
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:04:18 2007 +0200
+
+ Fix: Add missing NULL termination in strings expanded by macros parser.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 630ec84aef7228fc1dbfb38dec78541403a786cd
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 17:03:37 2007 +0200
+
+ Motion-PRO: Update EEPROM's page write bits and write delay.
+
+ Change EEPROM configuration according to the datasheet: "The 24C01A and 24C02A
+ have a page write capability of two bytes", and "This device offers fast (1ms)
+ byte write". Add 3ms of extra delay.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c00125e07c1ebc125bab40e1e18bceed8be0c162
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:58:45 2007 +0200
+
+ MPC5XXX, Motion-PRO: Fix PHY initialization problem.
+
+ After being reset in mpc5xxx_fec_init_phy(), PHY goes into FX mode, in which
+ networking does not function. This commit switches PHY to TX mode by clearing
+ the FX_SEL bit of Mode Control Register. It also reverses commit
+ 008861a2f3ef2c062744d733787c7e530a1b8761, i.e., a temporary workaround.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 93b78f534a6e708b4cf1a4ffb4d8438c67a007db
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:57:15 2007 +0200
+
+ Motion-PRO: Add support for the temperature sensor.
+
+ Signed-off-by: Piotr Kruszynski <ppk@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c75e639630cc132dc19cd1ecda5922c0db0bfbba
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:55:23 2007 +0200
+
+ Motion-PRO: Add displaying of CPLD revision information during boot.
+
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit c99512d6bd3973f01ca2fc4896d829b46e68f150
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:53:43 2007 +0200
+
+ MPC5xxx: Change names of defines related to IPB and PCI clocks.
+
+ Both CFG_PCISPEED_66 and CFG_IPBSPEED_133 are misnamed, as defining
+ them does not cause PCI or IPB clocks to run at the specified speed.
+ Instead, they configure divisors used to calculate said clocks. This
+ patch renames the defines according to their real function.
+
+ Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit a11c0b85dc3664bb3c1e781137118730c8f619ab
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Sun May 27 16:51:48 2007 +0200
+
+ Motion-PRO: Add LED support.
+
+ Signed-off-by: Jan Wrobel <wrr@semihalf.com>
+ Signed-off-by: Marian Balakowicz <m8@semihalf.com>
+ Acked-by: Bartlomiej Sieka <tur@semihalf.com>
+
+commit 7ebb4479b07ff294eb4d76e420753a0349f7c93b
+Author: Ulf Samuelsson <ulf@atmel.com>
+Date: Thu May 24 12:12:47 2007 +0200
+
+ [PATCH][NAND] Define the Vendor Id for Micron NAND Flash
+
+ Signed-off-by: Ulf Samuelsson <ulf@atmel.com>
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit d756894722c888d09a9fa1df8323753772d3dcce
+Author: Stefan Roese <sr@denx.de>
+Date: Thu May 24 09:49:00 2007 +0200
+
+ ppc4xx: Fix small 405EZ OCM initilization bug in start.S
+
+ As pointed out by Bruce Adler <bruce.adler@acm.org> this patch
+ fixes a small bug in the 405EZ OCM initialization. Thanks for
+ spotting.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 5d4a179013d59a76446462e1eb0a969fba63eb81
+Author: Stefan Roese <sr@denx.de>
+Date: Thu May 24 08:22:09 2007 +0200
+
+ ppc4xx: Update AMCC Acadia support for board revision 1.1
+
+ This patch updates the Acadia (405EZ) support for the new 1.1 board
+ revision. It also adds support for NAND FLASH via the 4xx NDFC.
+
+ Please note that the jumper J7 must be in position 2-3 for this
+ NAND support. Position 1-2 is for NAND booting only. NAND booting
+ support will follow later.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 822d55365bb557e084d0e33625a6dedcc866110b
+Author: Jon Loeliger <jdl@freescale.com>
+Date: Wed May 23 14:09:46 2007 -0500
+
+ Add LIST_86xx MAKEALL target for PowerPC builds.
+
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit 9f0077abd69f7a7c756a915b961037302be3e6f2
+Author: Stefan Roese <sr@denx.de>
+Date: Tue May 22 12:48:09 2007 +0200
+
+ ppc4xx: Use do { ... } while (0) for CPR & SDR access macros
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 6f3dfc139a838b0841c151efe00ad47db2366e79
+Author: Stefan Roese <sr@denx.de>
+Date: Tue May 22 12:46:10 2007 +0200
+
+ ppc4xx: Add 405 support to 4xx NAND driver ndfc.c
+
+ This patch adds support for 405 PPC's to the 4xx NAND driver
+ ndfc.c. This is in preparation for the new AMCC 405EZ.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 10603d76767426be803dadd4fb688b97eb69481c
+Author: Stefan Roese <sr@denx.de>
+Date: Mon May 21 07:41:22 2007 +0200
+
+ ppc4xx: Fix problem in 405EZ OCM initialization
+
+ As spotted by Bruce Adler this patch fixes an initialization problem
+ for the 405EZ OCM.
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 3e3b956906eba9e4ad7931581ecedaad10eccce8
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Fri May 18 16:47:03 2007 +0100
+
+ Reduce line lengths to 80 characters max.
+
+commit 93ef45c9ddfdd9fc17c4e74bd8e2f2456580eb72
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Fri May 18 14:34:07 2007 +0100
+
+ Makefile permissions
+
+commit 1443a31457d68f7e8f0b9403e9832ec1e79dc59d
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Fri May 18 14:33:11 2007 +0100
+
+ Makefile permissions
+
+commit 255a3577c848706441daee0174543efe205a77f8
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed May 16 16:52:19 2007 -0500
+
+ Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx
+
+ For all practical u-boot purposes, TSECs don't differ throughout the
+ mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 70124c2602ae2d4c5d3dba05b482d91548242de8
+Author: Stefano Babic <sbabic@denx.de>
+Date: Wed May 16 14:49:12 2007 +0200
+
+ Fix compile problem cause my Microblaze merge
+
+ Signed-off-by: Stefano Babic <sbabic@denx.de>
+
+commit ada4697d0230d6da552867777f98a67ec3ba2579
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Wed May 16 13:23:10 2007 +0200
+
+ [PATCH] Run new sequoia boards with an EBC speed of 83MHz
+
+ Because the Sequoia board does not boot with an EBC faster than 66MHz,
+ the clock divider are changed after the initial boot process.
+
+ This allows for maximum clocking speeds to be achieved on newer boards.
+ Sequoia boards with 666.66 MHz processors require that the EBC divider
+ be set to 3 in order to start the initial boot process at a slower EBC
+ speed. After the initial boot process, the divider can be set back to 2,
+ which will cause the boards to run at 83.333MHz. This is backward
+ compatible with boards with 533.33 MHz processors, as these boards will
+ already be set with an EBC divider of 2.
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+
+commit a7676ea7732f3c596805079fed7e5c9fac652cfc
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 16 01:16:53 2007 +0200
+
+ Minor Coding Style cleanup, update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit d62f64cc23a940eafe712c776b3249e4160753d1
+Author: Wolfgang Denk <wd@denx.de>
+Date: Wed May 16 00:13:33 2007 +0200
+
+ Coding Style Cleanup, new CHANGELOG
+
+commit 3162eb836903c8b247fdc7470dd39bfa6996f495
+Author: Wolfgang Denk <wd@denx.de>
+Date: Tue May 15 23:38:05 2007 +0200
+
+ Minor coding style cleanup.
+
+commit 66d9dbec1cc27d6398ee6cf84639dbe14971251e
+Author: mushtaq khan <mushtaq_k@procsys.com>
+Date: Fri Apr 20 14:23:02 2007 +0530
+
+ Add driver for S-ATA-controller on Intel processors with South
+ Bridge, ICH-5, ICH-6 and ICH-7.
+
+ Implementation:
+
+ 1. Code is divided in to two files. All functions, which are
+ controller specific are kept in "drivers/ata_piix.c" file and
+ functions, which are not controller specific, are kept in
+ "common/cmd_sata.c" file.
+
+ 2. Reading and Writing from the S-ATA drive is done using PIO method.
+
+ 3. Driver can be configured for 48-bit addressing by defining macro
+ CONFIG_LBA48, if this macro is not defined driver uses the 28-bit
+ addressing.
+
+ 4. S-ATA read function is hooked to the File system, commands like
+ ext2ls and ext2load file can be used. This has been tested.
+
+ 5. U-Boot command "SATA_init" is added, which initializes the S-ATA
+ controller and identifies the S-ATA drives connected to it.
+
+ 6. U-Boot command "sata" is added, which is used to read/write, print
+ partition table and get info about the drives present. This I have
+ implemented in same way as "ide" command is implemented in U-Boot.
+
+ 7. This driver is for S-ATA in native mode.
+
+ 8. This driver does not support the Native command queuing and
+ Hot-plugging.
+
+ Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
+
+commit 644e6fb4eb8be90ea04ba34b643a8bf019d680e0
+Author: mushtaq khan <mushtaq_k@procsys.com>
+Date: Mon Apr 30 15:57:22 2007 +0530
+
+ Fixes bug clearing the bss section for i386
+
+ Hi,
+ There is a bug in the code of clearing the bss section for processor
+ i386.(File: cpu/i386/start.S)
+ In the code, bss_start addr (starting addr of bss section) is put into
+ the register %eax, but the code which clears the bss section refers to
+ the addr pointed by %edi.
+
+ This patch fixes this bug by putting bss_start into %edi register.
+
+ Signed-off-by: Mushtaq Khan <mushtaq_k@procsys.com>
+
+commit c3243cf7b490057277d61acffe4ad0946f9eb4a4
+Author: Joe Hamman <joe.hamman@embeddedspecialties.com>
+Date: Mon Apr 30 16:47:28 2007 -0500
+
+ Add support for BCM5464 Quad Phy
+
+ Added support for Broadcom's BCM5464 Quad Phy
+
+ Signed-off-by: Joe Hamman <joe.hamman@embeddedspecialties.com>
+
+commit 1b305bdc754c8468e1d5d858f5dcf8a7a0a4bb7a
+Author: Zang Roy-r61911 <tie-fei.zang@freescale.com>
+Date: Wed May 9 08:10:57 2007 +0800
+
+ Search the exception table with linear algorithm
+
+ Search the exception table with linear algorithm instead of
+ bisecting algorithm.
+ Because the exception table might be unsorted.
+
+ Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+
+commit 5dfaa50eb819686bfba1927e8c5b8a70a4d65fd3
+Author: Aubrey.Li <aubrey.adi@gmail.com>
+Date: Mon May 14 11:47:35 2007 +0800
+
+ Fix compilation issues on MACOSX
+
+ Singed-off-by: Marc Hoffman <Marc.Hoffman@analog.com>
+ Signed-off-by: Aubrey Li <aubrey.adi@gmail.com>
+
+commit 56fd7162985c412317bbf763a225fba23c64fd31
+Author: Stephen Williams <steve@icarus.com>
+Date: Tue May 15 07:55:42 2007 -0700
+
+ Fix for compile of JSE target
+
+ The attached patch fixes the compile of the JSE board in the
+ denx git as of 14 may 2007. It is an extremely simple patch,
+ it just adds the missing define of CFG_SYSTEMACE_WIDTH.
+
+ Fix to compile JSE against 20070514 git of u-boot
+
+commit 61936667e86a250ae12fd2dc189d3588f0a59e0b
+Author: Stefan Roese <sr@denx.de>
+Date: Fri May 11 12:01:49 2007 +0200
+
+ ppc4xx: Add mtcpr/mfcpr access macros
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 343c48bd84606c4025c8a7c7263fda465d6e284c
+Author: Stefan Roese <sr@denx.de>
+Date: Fri May 11 12:01:06 2007 +0200
+
+ ppc4xx: Set bd->bi_pci_busfreq on 440EPx/GRx too
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 7d98ba770a7eaefa29ce927f31a0956df85bf650
+Author: Piotr Kruszynski <ppk@semihalf.com>
+Date: Thu May 10 16:55:52 2007 +0200
+
+ [Motion-PRO] Add MTD and JFFS2 support, also add default partition
+ definition.
+
+commit 65fb6a676e821f9570a2a376dc204bf611ce5f81
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:42:44 2007 +0100
+
+ Add the board directory for SMN42
+
+commit 160131bf965785419626df6c388729fe0b597992
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:41:58 2007 +0100
+
+ Add the files for the SMN42 board
+
+commit 5c6d2b5a500f8c49670de8910150b78a41f781fc
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:40:34 2007 +0100
+
+ Remove the deleted files for the SMN42 patch
+
+commit b0d8f5bf0d215adc9424cb228b2484dbf07f7761
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 11:37:56 2007 +0100
+
+ New board SMN42 branch
+
+commit 29f3be0caf0799ca6b89dfd9824c15619a50000f
+Author: Peter Pearse <peter.pearse@arm.com>
+Date: Wed May 9 10:24:38 2007 +0100
+
+ Makefile permissions
+
+commit b84289b595731e8851df46e893845cc1322c9b9b
+Author: Ed Swarthout <Ed.Swarthout@freescale.com>
+Date: Tue May 8 14:17:07 2007 -0500
+
+ 8641hpcn: Fix Makefile after moving pixis to board/freescale.
+
+ The OBJTREE != SRCTREE build scenario was broken.
+ This fixes it.
+
+ Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
+ Signed-off-by: Jon Loeliger <jdl@freescale.com>
+
+commit e69f66c6ebe82bbbd1da766bc4eda40ec7ee5af1
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue May 8 15:57:43 2007 +0200
+
+ add: reading special purpose registers
+
+commit 1a50f164beb065f360fbddb76029607d6b099698
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue May 8 14:52:52 2007 +0200
+
+ add: Microblaze V5 exception handling
+
+commit ab874d5047e5d30dbc1e517ff26083efffa98ecb
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue May 8 14:39:11 2007 +0200
+
+ add: FSL control read and write
+
+commit de1de02a7cbf05e6b63e0d8ffc624f12493f6ba3
+Author: Piotr Kruszynski <ppk@semihalf.com>
+Date: Tue May 8 13:05:44 2007 +0200
+
+ [Motion-PRO] Add support for I2C, EEPROM and RTC.
+
+commit fa5c2ba123b1bf88455bfc21db5e786ca045029d
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue May 8 10:23:56 2007 +0200
+
+ [Motion-PRO] Add ATA support. Add CF-booting commands to the default
+ environment.
+
+commit 06241d50a3ab1b20a0b08baeeaffcaa23ae4b839
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue May 8 09:39:12 2007 +0200
+
+ [Motion-PRO] Change IPB clock frequency from 50MHz to 100MHz. This
+ eliminates networking problems in Linux (timeouts).
+
+commit 1f1369c34b629be94702684d41d3fddf0f6193e7
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Tue May 8 09:21:57 2007 +0200
+
+ [Motion-PRO] Enable Flat Device Tree support and modify default environment
+ to allow booting of FDT-expecting kernels.
+
+commit fb05f6da35ea1c15c553abe6f23f656bf18dc5db
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 23:58:31 2007 +0200
+
+ new: USE_MSR_INTR support
+
+commit 008861a2f3ef2c062744d733787c7e530a1b8761
+Author: Bartlomiej Sieka <tur@semihalf.com>
+Date: Mon May 7 22:36:15 2007 +0200
+
+ [MPC5xxx] There are networking problems on the Motion-PRO board with
+ current PHY initalization code (tftp timeouts all the time). This commit
+ temporarily disables PHY initalization sequence to make the networking
+ operational, until a fix is found.
+
+commit abca901869c3760b6c5fecb825db6c1d91a78a93
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon May 7 22:10:36 2007 +0200
+
+ Get rid of duplicated file (see include/configs/sbc8560.h instead)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit 207b7b2c9d9752e0f6478c30c29b7087f6e6cbb6
+Author: Wolfgang Denk <wd@denx.de>
+Date: Mon May 7 22:07:08 2007 +0200
+
+ Get rid of duplicated file (see doc/README.SBC8560 instead)
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
+commit a7bac7e9b57ba948051beb19ec5be3a75ce75383
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:43:10 2007 +0200
+
+ fix: read and write MSR - repair number of parameters
+
+commit 193b4a3bb3acaddf798da8de0da05d94ba8774ee
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Mon May 7 19:42:49 2007 +0200
+
+ [PATCH] ppc4xx: Fix CONFIG_SYS_CLK_FREQ definition in Sequoia config file
+
+ A '3' got cut off in the formatting of the last patch to automatically
+ change the clock speed of the system clock on sequoia board.
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 19bf1fbad7f19d5a120be9b1daf136e052fcab39
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:33:51 2007 +0200
+
+ new: fsl interrupt support
+ FSL_Has_data is connected to INTC.
+
+commit 792032baa7d625e34c981ab6df521911bd8dc861
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:30:12 2007 +0200
+
+ fix: interrupt handler
+ remove asm code
+
+commit f3f001a341ef185d0f13841be5b5dc3395aacc31
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:25:08 2007 +0200
+
+ fix: remove asm code
+
+commit fb7c2dbef02c9f6f8d7b04ec4c2bfb91418b9c01
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 19:12:43 2007 +0200
+
+ fix: clean interrupt
+
+commit 42efed6130c8fcf7da881385b5427065d2801757
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 17:22:25 2007 +0200
+
+ fix: interrupt handler for multiple sources
+
+commit 48fbd3a4cdabbebc1debd7eed73c00c2caf914f6
+Author: Michal Simek <monstr@monstr.eu>
+Date: Mon May 7 17:11:09 2007 +0200
+
+ new: add writing to msr register
+
+commit 3a619dd7bed03e8b4d22a3911f90fd12af5376c2
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon May 7 16:43:56 2007 +0200
+
+ Fix an ancient CHANGELOG conflict
+
+commit ac4cd59d59c9bf3f89cb7a344abf8184d678f562
+Author: Timur Tabi <timur@freescale.com>
+Date: Sat May 5 08:12:30 2007 +0200
+
+ 5xxx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, ftp_cpu_setup()
+ should write the MAC address to mac-address and local-mac-address, if they
+ exist.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit a9d87e2707dcb249f6bb7f7ff7e00acd8cda9fd2
+Author: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+Date: Sun Apr 29 14:01:54 2007 +0200
+
+ [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
+
+ MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
+ message. Use PVR to distinguish between the two variants, and print proper CPU
+ information.
+
+ Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 4ec5bd55ed1ffa91a774af298769621f4fbb18c1
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Wed Apr 25 16:01:26 2007 +0200
+
+ [PATCH] simplify silent console
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit b7598a43f2b421a713d8135e98a42c37d9eb9df0
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Mon Apr 23 15:30:39 2007 +0200
+
+ [PATCH] Avoid assigning PCI resources from zero address
+
+ If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
+ core complains and IDE drivers fails to work. Also, assigning zero to a BAR
+ was illegal according to PCI 2.1 (the later revisions seem to have excluded the
+ sentence about "0" being considered an invalid address) -- so, use a reasonable
+ starting value of 0x1000 (that's what the most Linux archs are using).
+
+ Alternatively, one might have fixed the calls to pci_set_region() individually
+ (some code even seems to have taken care of this issue) but that would have
+ been a lot more work. :-)
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 9ffd451afeb08e5be7ddae680487ec962b2bca25
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Mon Apr 23 14:00:11 2007 +0200
+
+ [patch] setenv(...) can delete environmentalvariables
+
+ update setenv() function so that entering a NULL value for the
+ variable's value will delete the environmental variable
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit ebd0a0ae05a44769c4e27458ad4e9f3438250443
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Apr 23 13:54:24 2007 +0200
+
+ [patch] use unsigned char in smc91111 driver for mac
+
+ the v_mac variable in the smc91111 driver is declared as a signed char ...
+ this causes problems when one of the bytes in the MAC is "signed" like 0xE0
+ because when it gets printed out, you get a display like:
+ 0xFFFFFFE0 and that's no good
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit ffc50f9bb194343c6303517a517708457a5eb6b8
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat May 5 18:54:42 2007 +0200
+
+ new: FSL and MSR support #2
+
+commit f7e2e0eb0668136305f78bb9c21be79b48a34247
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat May 5 18:27:16 2007 +0200
+
+ new: FSL and MSR support
+
+commit 2f15278c2eb911c668b4fe562130b78cf554d139
+Author: Wolfgang Denk <wd@denx.de>
+Date: Sat May 5 18:23:11 2007 +0200
+
+ Coding stylke cleanup; update CHANGELOG.
+
+ Signed-off-by: Wolfgang Denk <wd@denx.de>
+
commit 885ec89b648a899a2f32393fd3ffd9f7234c4402
Author: Wolfgang Denk <wd@denx.de>
Date: Sat May 5 18:05:02 2007 +0200
@@ -39,6 +6710,20 @@
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 2f550ab976405300f5b07bf2890800840d0aa05f
+Author: Timur Tabi <timur@freescale.com>
+Date: Sat May 5 08:12:30 2007 +0200
+
+ 5xxx: write MAC address to mac-address and local-mac-address
+
+ Some device trees have a mac-address property, some have local-mac-address,
+ and some have both. To support all of these device trees, ftp_cpu_setup()
+ should write the MAC address to mac-address and local-mac-address, if they
+ exist.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-by: Grant Likely <grant.likely@secretlab.ca>
+
commit a79886590593ba1d667c840caa4940c61639f18f
Author: Thomas Knobloch <knobloch@siemens.com>
Date: Sat May 5 07:04:42 2007 +0200
@@ -67,6 +6752,14 @@
Signed-off-by: Wolfgang Denk <wd@denx.de>
+commit 068aab660bc3912b930be5540e6b3f3fd6ad3c96
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Thu May 3 19:43:52 2007 -0500
+
+ mpc83xx: fix trivial error in MAKEALL
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
commit c64a89d6ce8584b9fc64f4e85da9ecac3cfc2c2a
Author: Wolfgang Denk <wd@denx.de>
Date: Thu May 3 16:34:41 2007 +0200
@@ -94,6 +6787,30 @@
Signed-off-by Dan Malek, <dan@embeddedalley.com>
+commit f2134f8e9eb006bdcd729e89f309c07b2fa45180
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed May 2 13:31:53 2007 +0200
+
+ macb: Don't restart autonegotiation if we already have link
+
+ Rework macb_phy_init so that it doesn't attempt to re-negotiate if the
+ link is already up.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
+commit 04fcb5d38bc90779cd9a710d60702075986f0e29
+Author: Haavard Skinnemoen <hskinnemoen@atmel.com>
+Date: Wed May 2 13:22:38 2007 +0200
+
+ macb: Introduce a few barriers when dealing with DMA descriptors
+
+ There were a few theoretical possibilities that the compiler might
+ optimize away DMA descriptor reads and/or writes and thus cause
+ synchronization problems with the hardware. Insert barriers where
+ we depend on reads/writes actually hitting memory.
+
+ Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
+
commit ffa621a0d12a1ccd81c936c567f8917a213787a8
Author: Andy Fleming <afleming@freescale.com>
Date: Sat Feb 24 01:08:13 2007 -0600
@@ -148,6 +6865,33 @@
Signed-off-by: James Yang <James.Yang@freescale.com>
Signed-off-by: Jon Loeliger <jdl@freescale.com>
+commit f64702b7fc8f8df39d31add770df6e372f9e9ce3
+Author: Timur Tabi <timur@freescale.com>
+Date: Mon Apr 30 13:59:50 2007 -0500
+
+ Fix memory initialization on MPC8349E-mITX
+
+ Define CFG_DDR_SDRAM_CLK_CNTL for the MPC8349E-mITX and MPC8349E-mITX-GP.
+ This allows ddr->sdram_clk_cntl to be properly initialized. This is necessary
+ on some ITX boards, notably those with a revision 3.1 CPU.
+
+ Also change spd_sdram() in cpu/mpc83xx/spd_sdram.c to not write anything into
+ ddr->sdram_clk_cntl if CFG_DDR_SDRAM_CLK_CNTL is not defined.
+
+ Signed-off-by: Timur Tabi <timur@freescale.com>
+ Acked-by: Michael Benedict <MBenedict@twacs.com>
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
+commit 54b2d434ae9d01787936f34fe1759cf3d7624ae3
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Mon Apr 30 15:26:21 2007 -0500
+
+ mpc83xx: replace elaborate boottime verbosity with 'clocks' command
+
+ and fix CPU: to align with Board: display text.
+
+ Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
+
commit c1ab82669d9525998c34e802a12cad662723f22a
Author: James Yang <James.Yang@freescale.com>
Date: Fri Mar 16 13:02:53 2007 -0500
@@ -167,6 +6911,41 @@
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 864aa6a6a466fcb92bf32b1d7dba79cd709b52c9
+Author: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+Date: Sun Apr 29 14:01:54 2007 +0200
+
+ [PATCH] Use PVR to distinguish MPC5200B from MPC5200 in boot message
+
+ MPC5200B systems are incorrectly reported as MPC5200 in U-Boot start-up
+ message. Use PVR to distinguish between the two variants, and print proper CPU
+ information.
+
+ Signed-off-by: Grzegorz Wianecki <grzegorz.wianecki@gmail.com>
+ Signed-off-by: Bartlomiej Sieka <tur@semihalf.com>
+ Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
+
+commit 5c5d3242935cf3543af01142627494434834cf98
+Author: Kim Phillips <kim.phillips@freescale.com>
+Date: Wed Apr 25 12:34:38 2007 -0500
+
+ mpc83xx: minor fixups for 8313rdb introduction
+
+commit ada4d40091f6ed4a4f0040e08d20db21967e4a67
+Author: Ladislav Michl <ladis@linux-mips.org>
+Date: Wed Apr 25 16:01:26 2007 +0200
+
+ [PATCH] simplify silent console
+
+ Signed-off-by: Ladislav Michl <ladis@linux-mips.org>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 144876a380f5756f57412caf74c1d6dc201dd796
+Author: Michal Simek <monstr@monstr.eu>
+Date: Tue Apr 24 23:01:02 2007 +0200
+
+ [PATCH] MTD partition support, JFFS2 support
+
commit 37ed6cdd4159195bfad68d8a237f6adda8f482cb
Author: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Date: Tue Apr 24 14:03:45 2007 +0200
@@ -392,6 +7171,134 @@
board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
+commit 96b8a05432f346f36493535c85320b70ec9c7c1b
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:54:15 2007 -0500
+
+ mpc83xx: Add MPC8313ERDB support.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 49ea3b6eafe606285ae4d5c378026153dde53200
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:21 2007 -0500
+
+ mpc83xx: Add generic PCI setup code.
+
+ Board code can now request the generic setup code rather than having to
+ copy-and-paste it for themselves. Boards should be converted to use this
+ once they're tested with it.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 7c98e5193e93df6b9b651851d54b638a61ebb0ea
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:19 2007 -0500
+
+ mpc83xx: Add 831x support to speed.c.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 0f253283a32d91e06844d7f87f9b33f4f4fbce8f
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:18 2007 -0500
+
+ mpc83xx: Add 831x support to global_data.h
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 95e7ef897e54591e615fc1b458b74c286fe1fb06
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:16 2007 -0500
+
+ mpc83xx: Change PVR_83xx to PVR_E300C1-3, and update checkcpu().
+
+ Rather than misleadingly define PVR_83xx as the specific type of 83xx
+ being built for, the PVR of each core revision is defined. checkcpu() now
+ prints the core that it detects, rather than aborting if it doesn't find
+ what it thinks it wants.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit a35b0c4950d84cf9e3a9e32b916135956d1ac636
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:34:15 2007 -0500
+
+ mpc83xx: Recognize SPR values for MPC8311 and MPC8313.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit d87c57b201b4572d16f1b642998faa00c9912b16
+Author: Scott Wood <scottwood@freescale.com>
+Date: Mon Apr 16 14:31:55 2007 -0500
+
+ mpc83xx: Add register definitions for MPC831x.
+
+ Signed-off-by: Scott Wood <scottwood@freescale.com>
+
+commit 7fc4c71a143be8666d70803fb25ae60379c95622
+Author: Stefan Roese <sr@denx.de>
+Date: Mon Apr 23 15:39:59 2007 +0200
+
+ Fix file mode
+
+ Signed-off-by: Stefan Roese <sr@denx.de>
+
+commit 38257988abfe74d459ca2ad748b109ca04e4efe1
+Author: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+Date: Mon Apr 23 15:30:39 2007 +0200
+
+ [PATCH] Avoid assigning PCI resources from zero address
+
+ If a PCI IDE card happens to get a zero address assigned to it, the Linux IDE
+ core complains and IDE drivers fails to work. Also, assigning zero to a BAR
+ was illegal according to PCI 2.1 (the later revisions seem to have excluded the
+ sentence about "0" being considered an invalid address) -- so, use a reasonable
+ starting value of 0x1000 (that's what the most Linux archs are using).
+
+ Alternatively, one might have fixed the calls to pci_set_region() individually
+ (some code even seems to have taken care of this issue) but that would have
+ been a lot more work. :-)
+
+ Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit afb903a2eb9436baa9270ccc0c27082d86497d89
+Author: Jeffrey Mann <mannj@embeddedplanet.com>
+Date: Mon Apr 23 14:00:11 2007 +0200
+
+ [patch] setenv(...) can delete environmentalvariables
+
+ update setenv() function so that entering a NULL value for the
+ variable's value will delete the environmental variable
+
+ Signed-off-by: Jeffrey Mann <mannj@embeddedplanet.com>
+ Acked-by: Stefan Roese <sr@denx.de>
+
+commit 36f104e5caa747d568eff26b369565af57c2ffa6
+Author: Mike Frysinger <vapier@gentoo.org>
+Date: Mon Apr 23 13:54:24 2007 +0200
+
+ [patch] use unsigned char in smc91111 driver for mac
+
+ the v_mac variable in the smc91111 driver is declared as a signed char ...
+ this causes problems when one of the bytes in the MAC is "signed" like 0xE0
+ because when it gets printed out, you get a display like:
+ 0xFFFFFFE0 and that's no good
+
+ Signed-off-by: Mike Frysinger <vapier@gentoo.org>
+
+commit d98c0885ad617fccf21e7c26ef8cb728fbfb2459
+Author: Rodolfo Giometti <giometti@enneenne.com>
+Date: Mon Apr 23 13:10:52 2007 +0200
+
+ USB: (Another) delay for crappy USB keys.
+
+ Some USB keys are slow in giving back an answer when the Root HUB
+ enables power lines.
+
+ Signed-off-by: Rodolfo Giometti <giometti@linux.it>
+
commit 323bfa8f436dc3bc57187c9b1488bc3146ff1522
Author: Stefan Roese <sr@denx.de>
Date: Mon Apr 23 12:00:22 2007 +0200
@@ -400,6 +7307,24 @@
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 32556443840f127170e4baa8bdd5b567039f6c36
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat Apr 21 21:07:22 2007 +0200
+
+ [PATCH] SystemACE support for Microblaze
+
+commit 0643631aa1036cd746bf5d15f5a34bc7bc01ea4f
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat Apr 21 21:02:40 2007 +0200
+
+ 16bit read/write little endian
+
+commit 9d1d6a34d26c5933bc097ce73c9348f95573cdd4
+Author: Michal Simek <monstr@monstr.eu>
+Date: Sat Apr 21 20:53:31 2007 +0200
+
+ Change ML401 parameters - Xilinx BSP
+
commit 2e343b9a57f32e1bd08c35c9976910333fb4e13d
Author: Ed Swarthout <Ed.Swarthout@freescale.com>
Date: Wed Feb 28 05:37:29 2007 -0600
@@ -882,6 +7807,18 @@
Signed-of-by: Greg Lopp <lopp@pobox.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
+commit 6fbf261f8df294e589cfadebebe5468e3c0f29e9
+Author: Xie Xiaobo <r63061@freescale.com>
+Date: Fri Mar 9 19:08:25 2007 +0800
+
+ Fix two bugs for MPC83xx DDR2 controller SPD Init
+
+ There are a few bugs in the cpu/mpc83xx/spd_sdram.c
+ the first bug is that the picos_to_clk routine introduces a huge
+ rounding error in 83xx.
+ the second bug is that the mode register write recovery field is
+ tWR-1, not tWR >> 1.
+
commit 2ad3aba01d37b72e7c957b07e102fccd64fe6d13
Author: Jeffrey Mann <mannj@embeddedplanet.com>
Date: Thu Apr 12 14:15:59 2007 +0200
@@ -1027,6 +7964,22 @@
Minor cleanup.
+commit 822af351ad2babc7d99033361a5fcacd30f6bc78
+Author: Rodolfo Giometti <giometti@enneenne.com>
+Date: Tue Apr 3 14:27:18 2007 +0200
+
+ Support for the Philips ISP116x HCD (Host Controller Driver)
+
+ Signed-off-by: Rodolfo Giometti <giometti@enneenne.com>
+
+commit edf5851be6c17c031d4f71dd5b0a12040b7c50c8
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue Apr 3 14:27:08 2007 +0200
+
+ USB: cleanup monahans usb support. Remove dead code.
+
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
commit a65c5768e5537530bd1780af3d3fddc3113a163c
Author: Stefan Roese <sr@denx.de>
Date: Mon Apr 2 10:09:30 2007 +0200
@@ -1196,6 +8149,23 @@
PATCH: Resolve GPL license problem
+commit ae00bb4b2944dc64a485ed72a19754b11af7c223
+Author: Rodolfo Giometti <giometti@enneenne.com>
+Date: Mon Mar 26 12:03:36 2007 +0200
+
+ PXA: pxa27x USB OHCI support
+
+ Signed-off-by: Rodolfo Giometti <giometti@linux.it>
+
+commit ae79f60677c208326535647dcbd5c3ec40dbcb0b
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon Mar 26 11:21:05 2007 +0200
+
+ USB: remove the S3C24X0_merge #define, which was introduced while
+ merging OHCI drivers.
+
+ Signed-off-by: Markus Klotzbuecher <mk@denx.de>
+
commit 1798049522f594013aea29457d46794298c6ae15
Author: Michal Simek <root@monstr.eu>
Date: Mon Mar 26 01:39:07 2007 +0200
@@ -3321,6 +10291,34 @@
Signed-off-by: Stefan Roese <sr@denx.de>
+commit 58b485776698c3d71ec5a215e392123b4c15afa3
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon Nov 27 11:51:21 2006 +0100
+
+ Add a small README with information on the generic ohci driver.
+
+commit ae3b770e4eae8e98b6e9e29662e18c47fdf0171f
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon Nov 27 11:46:46 2006 +0100
+
+ Fix some endianness issues related to the generic ohci driver
+
+commit 7b59b3c7a8ce2e4b567abf99c1cd667bf35b9418
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon Nov 27 11:44:58 2006 +0100
+
+ Introduced the configuration option CONFIG_USB_OHCI_NEW in order to be able
+ to choose between the old and the generic OHCI drivers.
+
+commit 53e336e9ffc51035bdc4e5867631b3378761b4df
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon Nov 27 11:43:09 2006 +0100
+
+ Modified the mpc5xxx and the ppc4xx cpu to use the generic OHCI driver
+ and adapted board configs TQM5200 and yosemite accordingly. This commit
+ also makes the maximum number of root hub ports configurable
+ (CFG_USB_OHCI_MAX_ROOT_PORTS).
+
commit 78d620ebb5871d252270dedfad60c6568993b780
Author: Wolfgang Denk <wd@atlas.denx.de>
Date: Thu Nov 23 22:58:58 2006 +0100
@@ -5078,6 +12076,12 @@
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
+commit 99d70e3a47affb9bae041a2caece7cd516e213b3
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Mon Jun 26 11:06:00 2006 +0200
+
+ More code cleanup
+
commit 684623ce92c5fd32e7db2d6e016945a67c5ffaba
Author: Jon Loeliger <jdl@freescale.com>
Date: Thu Jun 22 08:51:46 2006 -0500
@@ -5102,6 +12106,28 @@
Signed-off-by: Jon Loeliger <jdl@freescale.com>
+commit 386eda022473394ad8f36b86f2bdc9b4cb816291
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Jun 14 18:14:56 2006 +0200
+
+ Code cleanup
+
+commit 16c8d5e76ae0f78f39a60608574adfe0feb9cc70
+Author: Wolfgang Denk <wd@pollux.denx.de>
+Date: Wed Jun 14 17:45:53 2006 +0200
+
+ Various USB related patches
+ - Add support for mpc8xx USB device.
+ - Add support for Common Device Class - Abstract Control Model USB console.
+ - Add support for flow control in USB slave devices.
+ - Add support for switching between gserial and cdc_acm using environment.
+ - Minor changes to usbdcore_omap1510.c usbdcore_omap1510.h
+ - Update usbcore slightly to ease host enumeration.
+ - Fix non-portable endian problems in usbdcore and usbdcore_ep0.
+ - Add AdderUSB_config as a defconfig to enable usage of the USB console
+ by default with the Adder87x U-Boot port.
+ Patches by Bryan O'Donoghue <bodonoghue@codehermit.ie>, 29 May 2006
+
commit 8ecc971618f56029ad99d3516f8b297a6ed58971
Author: Jon Loeliger <jdl@jdl.com>
Date: Wed Jun 7 10:53:55 2006 -0500
@@ -5180,6 +12206,12 @@
Signed-off-by: Jon Loeliger <jdl@freescale.com>
+commit ddf83a2fcef1a670c45fc585119dcc1fe062c4a9
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue May 30 16:56:14 2006 +0200
+
+ Support generic OHCI support for the s3c24x0 cpu.
+
commit 38cee12dcfcc257371c901c7e13e58ecab0a35d8
Author: Haiying Wang <Haiying.Wang@freescale.com>
Date: Tue May 30 09:10:32 2006 -0500
@@ -5229,6 +12261,29 @@
Signed-off-by: Jon Loeliger <jdl@jdl.com>
+commit 301f1aa384d0edcae6a22fd9adb933ad71695ecc
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue May 23 13:38:35 2006 +0200
+
+ Changed the mp2usb (at91rm9200) board to use the generic OHCI driver. Some
+ fixes to the latter.
+
+commit 24e37645e7378b20fa8f20e2996c8fb8e90c70c9
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Tue May 23 10:33:11 2006 +0200
+
+ More cleanup for the delta board and the generic usb_ohci driver. Added
+ CFG_USB_BOARD_INIT and CFG_USB_CPU_INIT for enabling board and cpu specific
+ initialization and cleanup hooks respectively.
+
+commit 3e326ece9eba8184f5d48aa4fb87760a8f6f0f10
+Author: Markus Klotzbuecher <mk@denx.de>
+Date: Mon May 22 16:33:54 2006 +0200
+
+ This patch adds USB storage support for the delta board. This is the first
+ board to make use of a generic OHCI driver, that calls hooks for board
+ dependant initialization.
+
commit 14e37081ff3cac7ebe6e93836523429853b6b292
Author: Jon Loeliger <jdl@jdl.com>
Date: Fri May 19 13:28:39 2006 -0500
diff --git a/CHANGELOG-before-U-Boot-1.1.5 b/CHANGELOG-before-U-Boot-1.1.5
index 727a7b6..2404148 100644
--- a/CHANGELOG-before-U-Boot-1.1.5
+++ b/CHANGELOG-before-U-Boot-1.1.5
@@ -438,6 +438,20 @@
* Call serial_initialize() before first debug() is used.
+* Code cleanup
+
+* Various USB related patches
+ - Add support for mpc8xx USB device.
+ - Add support for Common Device Class - Abstract Control Model USB console.
+ - Add support for flow control in USB slave devices.
+ - Add support for switching between gserial and cdc_acm using environment.
+ - Minor changes to usbdcore_omap1510.c usbdcore_omap1510.h
+ - Update usbcore slightly to ease host enumeration.
+ - Fix non-portable endian problems in usbdcore and usbdcore_ep0.
+ - Add AdderUSB_config as a defconfig to enable usage of the USB console
+ by default with the Adder87x U-Boot port.
+ Patch by Bryan O'Donoghue <bodonoghue@codehermit.ie>, 29 May 2006
+
* Cleanup trab board for GCC-4.x
* VoiceBlue update: use new MTD flash partitioning methods, use more
diff --git a/CREDITS b/CREDITS
index e94372d..13150ae 100644
--- a/CREDITS
+++ b/CREDITS
@@ -117,7 +117,7 @@
E: ADharankar@ATTBI.Com
D: threads / scheduler example code
-N: Kári Davíðsson
+N: K?ri Dav??sson
E: kd@flaga.is
D: FLAGA DM Support
@@ -143,10 +143,15 @@
D: Port for the ModNET50 Board, NET+50 CPU Port
W: http://www.imms.de
-N: Daniel Engström
+N: Daniel Engstr?m
E: daniel@omicron.se
D: x86 port, Support for sc520_cdp board
+N: Hayden Fraser
+E: Hayden.Fraser@freescale.com
+D: Support for ColdFire MCF5253
+W: www.freescale.com
+
N: Dr. Wolfgang Grandegger
E: wg@denx.de
D: Support for Interphase 4539 T1/E1/J1 PMC, PN62, CCM, SCM boards
@@ -160,6 +165,11 @@
E: ThomasF@hyperion-entertainment.com
D: Support for AmigaOne
+N: Niklaus Giger
+E: niklaus.giger@netstal.com
+D: Support for HCU(x) boards
+W: www.netstal.com
+
N: Paul Gortmaker
E: paul.gortmaker@windriver.com
D: Support for WRS SBC8347/8349 boards
@@ -252,6 +262,10 @@
D: Support for Adder-II MPC852T evaluation board
W: http://www.forcecomputers.com
+N: Sergey Kubushyn
+E: ksi@koi8.net
+D: Support for various TI DaVinci based boards.
+
N: Bernhard Kuhn
E: bkuhn@metrowerks.com
D Support for Coldfire CPU; Support for Motorola M5272C3 and M5282EVB boards
@@ -274,6 +288,11 @@
D: Support for LEOX boards, DS164x RTC
W: http://www.leox.org
+N: TsiChung Liew
+E: Tsi-Chung.Liew@freescale.com
+D: Support for ColdFire MCF523x, MCF532x, MCF5445x
+W: www.freescale.com
+
N: Leif Lindholm
E: leif.lindholm@i3micro.com
D: Support for AMD dbau1550 board.
@@ -288,6 +307,11 @@
E: lo@routefree.com
D: Support for DOS partitions
+N: James MacAulay
+E: james.macaulay@amirix.com
+D: Suppport for Amirix AP1000
+W: www.amirix.com
+
N: Dan Malek
E: dan@embeddedalley.com
D: FADSROM, the grandfather of all of this
@@ -310,7 +334,7 @@
E: frank.morauf@salzbrenner.com
D: Support for Embedded Planet RPX Super Board
-N: David Müller
+N: David M?ller
E: d.mueller@elsoft.ch
D: Support for Samsung ARM920T SMDK2410 eval board
@@ -363,8 +387,9 @@
W: http://www.windriver.com
N: Stefan Roese
-E: stefan.roese@esd-electronics.com
-D: AMCC PPC401/403/405GP Support; Windows environment support
+E: sr@denx.de
+D: AMCC PPC4xx Support
+W: http://www.denx.de
N: Erwin Rol
E: erwin@muffin.org
@@ -398,6 +423,11 @@
E: art@videon-central.com
D: Support for NetSilicon NS7520
+N: Michal Simek
+E: monstr@monstr.eu
+D: Support for Microblaze, ML401, XUPV2P board
+W: www.monstr.eu
+
N: Yasushi Shoji
E: yashi@atmark-techno.com
D: Support for Xilinx MicroBlaze, for Atmark Techno SUZAKU FPGA board
@@ -411,6 +441,11 @@
D: Port to B2 board
W: www.dave-tech.it
+N: Timur Tabi
+E: timur@freescale.com
+D: Support for MPC8349E-mITX
+W: www.freescale.com
+
N: Rob Taylor
E: robt@flyingpig.com
D: Port to MBX860T and Sandpoint8240
@@ -465,22 +500,7 @@
D: Overall improvements on StrongARM, ARM720TDMI; Support for Tuxscreen; initial PCMCIA support for ARM
W: www.elinos.com
-N: James MacAulay
-E: james.macaulay@amirix.com
-D: Suppport for Amirix AP1000
-W: www.amirix.com
-
-N: Timur Tabi
-E: timur@freescale.com
-D: Support for MPC8349E-mITX
-W: www.freescale.com
-
-N: Michal Simek
-E: monstr@monstr.eu
-D: Support for Microblaze, ML401, XUPV2P board
-W: www.monstr.eu
-
N: Nobuhiro Iwamatsu
E: iwamatsu@nigauri.org
-D: Support for SuperH, MS7750SE01 , MS7780SE03 board
-W: www.nigauri.org
+D: Support for SuperH, MS7750SE01 and MS7722SE01 boards.
+W: http://www.nigauri.org/~iwamatsu/
diff --git a/MAINTAINERS b/MAINTAINERS
index 2eaef17..b8c1fdc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -42,6 +42,10 @@
Rattler MPC8248
ZPC1900 MPC8265
+Michael Barkowski <michael.barkowski@freescale.com>
+
+ MPC8323ERDB MPC8323
+
Jerry Van Baren <gerald.vanbaren@smiths-aerospace.com>
sacsng MPC8260
@@ -158,7 +162,12 @@
VOH405 PPC405EP
VOM405 PPC405EP
WUH405 PPC405EP
- CMS700 PPC405EP
+ CMS700 PPC405EP
+
+Niklaus Giger <niklaus.giger@netstal.com>
+
+ HCU4 PPC405GPr
+ HCU5 PPC440EPx
Frank Gottschling <fgottschling@eltec.de>
@@ -179,6 +188,10 @@
MVS1 MPC823
+Joe Hamman <joe.hamman@embeddedspecialties.com>
+
+ sbc8641d MPC8641D
+
Klaus Heydeck <heydeck@kieback-peter.de>
KUP4K MPC855
@@ -208,6 +221,10 @@
ELPT860 MPC860T
+Dave Liu <daveliu@freescale.com>
+
+ MPC8360EMDS MPC8360
+
Nye Liu <nyet@zumanetworks.com>
ZUMA MPC7xx_74xx
@@ -248,6 +265,7 @@
John Otken <jotken@softadvances.com>
luan PPC440SP
+ taihu PPC405EP
Keith Outwater <Keith_Outwater@mvis.com>
@@ -263,6 +281,10 @@
MIP405 PPC4xx
PIP405 PPC4xx
+Kim Phillips <kim.phillips@freescale.com>
+
+ MPC8349EMDS MPC8349
+
Daniel Poirot <dan.poirot@windriver.com>
sbc8240 MPC8240
@@ -282,15 +304,18 @@
bunbinga PPC405EP
ebony PPC440GP
katmai PPC440SPe
+ lwmon5 PPC440EPx
ocotea PPC440GX
p3p440 PPC440GP
pcs440ep PPC440EP
+ rainier PPC440GRx
sequoia PPC440EPx
sycamore PPC405GPr
taishan PPC440GX
walnut PPC405GP
yellowstone PPC440GR
yosemite PPC440EP
+ zeus PPC405EP
P3M750 PPC750FX/GX/GL
@@ -308,6 +333,11 @@
ML2 PPC4xx
+Timur Tabi <timur@freescale.com>
+
+ MPC8349E-mITX MPC8349
+ MPC8349E-mITX-GP MPC8349
+
Erik Theisen <etheisen@mindspring.com>
W7OLMC PPC4xx
@@ -340,19 +370,6 @@
svm_sc8xx MPC8xx
-Timur Tabi <timur@freescale.com>
-
- MPC8349E-mITX MPC8349
- MPC8349E-mITX-GP MPC8349
-
-Kim Phillips <kim.phillips@freescale.com>
-
- MPC8349EMDS MPC8349
-
-Dave Liu <daveliu@freescale.com>
-
- MPC8360EMDS MPC8360
-
-------------------------------------------------------------------------
Unknown / orphaned boards:
@@ -443,6 +460,12 @@
omap1610h2 ARM926EJS
+Sergey Kubushyn <ksi@koi8.net>
+
+ DV-EVM ARM926EJS
+ SONATA ARM926EJS
+ SCHMOOGIE ARM926EJS
+
Prakash Kumar <prakash@embedx.com>
cerf250 xscale
@@ -588,6 +611,16 @@
r5200 mcf52x2
+TsiChung Liew <Tsi-Chung.Liew@freescale.com>
+
+ M5235EVB mcf52x2
+ M5329EVB mcf532x
+ M54455EVB mcf5445x
+
+Hayden Fraser <Hayden.Fraser@freescale.com>
+
+ M5253EVBE mcf52x2
+
#########################################################################
# AVR32 Systems: #
# #
diff --git a/MAKEALL b/MAKEALL
index d7cd8d7..2597d1f 100755
--- a/MAKEALL
+++ b/MAKEALL
@@ -26,114 +26,287 @@
## MPC5xx Systems
#########################################################################
-LIST_5xx=" \
- cmi_mpc5xx \
+LIST_5xx=" \
+ cmi_mpc5xx \
"
#########################################################################
## MPC5xxx Systems
#########################################################################
-LIST_5xxx=" \
- BC3450 cpci5200 EVAL5200 fo300 \
- icecube_5100 icecube_5200 lite5200b mcc200 \
- mecp5200 motionpro o2dnt pf5200 \
- PM520 TB5200 Total5100 Total5200 \
- Total5200_Rev2 TQM5200 TQM5200_B TQM5200S \
- v38b \
+LIST_5xxx=" \
+ BC3450 \
+ cm5200 \
+ cpci5200 \
+ EVAL5200 \
+ fo300 \
+ icecube_5100 \
+ icecube_5200 \
+ lite5200b \
+ mcc200 \
+ mecp5200 \
+ motionpro \
+ o2dnt \
+ pf5200 \
+ PM520 \
+ TB5200 \
+ Total5100 \
+ Total5200 \
+ Total5200_Rev2 \
+ TQM5200 \
+ TQM5200_B \
+ TQM5200S \
+ v38b \
+"
+
+#########################################################################
+## MPC512x Systems
+#########################################################################
+
+LIST_512x=" \
+ ads5121 \
"
#########################################################################
## MPC8xx Systems
#########################################################################
-LIST_8xx=" \
- Adder87x GENIETV MBX860T R360MPI \
- AdderII GTH MHPC RBC823 \
- ADS860 hermes MPC86xADS rmu \
- AMX860 IAD210 MPC885ADS RPXClassic \
- c2mon ICU862_100MHz MVS1 RPXlite \
- CCM IP860 NETPHONE RPXlite_DW \
- cogent_mpc8xx IVML24 NETTA RRvision \
- ELPT860 IVML24_128 NETTA2 SM850 \
- EP88x IVML24_256 NETTA_ISDN spc1920 \
- ESTEEM192E IVMS8 NETVIA SPD823TS \
- ETX094 IVMS8_128 NETVIA_V2 svm_sc8xx \
- FADS823 IVMS8_256 NX823 SXNI855T \
- FADS850SAR KUP4K pcu_e TOP860 \
- FADS860T KUP4X QS823 TQM823L \
- FLAGADM LANTEC QS850 TQM823L_LCD \
- FPS850L lwmon QS860T TQM850L \
- GEN860T MBX quantum TQM855L \
- GEN860T_SC TQM860L \
- TQM885D \
- uc100 \
- v37 \
+LIST_8xx=" \
+ Adder87x \
+ AdderII \
+ ADS860 \
+ AMX860 \
+ c2mon \
+ CCM \
+ cogent_mpc8xx \
+ ELPT860 \
+ EP88x \
+ ESTEEM192E \
+ ETX094 \
+ FADS823 \
+ FADS850SAR \
+ FADS860T \
+ FLAGADM \
+ FPS850L \
+ GEN860T \
+ GEN860T_SC \
+ GENIETV \
+ GTH \
+ hermes \
+ IAD210 \
+ ICU862_100MHz \
+ IP860 \
+ IVML24 \
+ IVML24_128 \
+ IVML24_256 \
+ IVMS8 \
+ IVMS8_128 \
+ IVMS8_256 \
+ KUP4K \
+ KUP4X \
+ LANTEC \
+ lwmon \
+ MBX \
+ MBX860T \
+ MHPC \
+ MPC86xADS \
+ MPC885ADS \
+ MVS1 \
+ NETPHONE \
+ NETTA \
+ NETTA2 \
+ NETTA_ISDN \
+ NETVIA \
+ NETVIA_V2 \
+ NX823 \
+ pcu_e \
+ QS823 \
+ QS850 \
+ QS860T \
+ quantum \
+ R360MPI \
+ RBC823 \
+ rmu \
+ RPXClassic \
+ RPXlite \
+ RPXlite_DW \
+ RRvision \
+ SM850 \
+ spc1920 \
+ SPD823TS \
+ svm_sc8xx \
+ SXNI855T \
+ TOP860 \
+ TQM823L \
+ TQM823L_LCD \
+ TQM850L \
+ TQM855L \
+ TQM860L \
+ TQM885D \
+ uc100 \
+ v37 \
"
#########################################################################
## PPC4xx Systems
#########################################################################
-LIST_4xx=" \
- acadia ADCIOP alpr AP1000 \
- AR405 ASH405 bamboo bubinga \
- CANBT CMS700 CPCI2DP CPCI405 \
- CPCI4052 CPCI405AB CPCI405DT CPCI440 \
- CPCIISER4 CRAYL1 csb272 csb472 \
- DASA_SIM DP405 DU405 ebony \
- ERIC EXBITGEN G2000 HH405 \
- HUB405 JSE KAREF katmai \
- luan METROBOX MIP405 MIP405T \
- ML2 ml300 ocotea OCRTC \
- ORSG p3p440 PCI405 pcs440ep \
- PIP405 PLU405 PMC405 PPChameleonEVB \
- sbc405 sc3 sequoia sequoia_nand \
- taishan VOH405 VOM405 W7OLMC \
- W7OLMG walnut WUH405 XPEDITE1K \
- yellowstone yosemite yucca \
+LIST_4xx=" \
+ acadia \
+ acadia_nand \
+ ADCIOP \
+ alpr \
+ AP1000 \
+ AR405 \
+ ASH405 \
+ bamboo \
+ bamboo_nand \
+ bubinga \
+ CANBT \
+ CMS700 \
+ CPCI2DP \
+ CPCI405 \
+ CPCI4052 \
+ CPCI405AB \
+ CPCI405DT \
+ CPCI440 \
+ CPCIISER4 \
+ CRAYL1 \
+ csb272 \
+ csb472 \
+ DASA_SIM \
+ DP405 \
+ DU405 \
+ ebony \
+ ERIC \
+ EXBITGEN \
+ G2000 \
+ hcu4 \
+ hcu5 \
+ HH405 \
+ HUB405 \
+ JSE \
+ KAREF \
+ katmai \
+ luan \
+ lwmon5 \
+ METROBOX \
+ MIP405 \
+ MIP405T \
+ ML2 \
+ ml300 \
+ ocotea \
+ OCRTC \
+ ORSG \
+ p3p440 \
+ PCI405 \
+ pcs440ep \
+ PIP405 \
+ PLU405 \
+ PMC405 \
+ PPChameleonEVB \
+ rainier \
+ sbc405 \
+ sc3 \
+ sequoia \
+ sequoia_nand \
+ taihu \
+ taishan \
+ VOH405 \
+ VOM405 \
+ W7OLMC \
+ W7OLMG \
+ walnut \
+ WUH405 \
+ XPEDITE1K \
+ yellowstone \
+ yosemite \
+ yucca \
+ zeus \
"
#########################################################################
## MPC8220 Systems
#########################################################################
-LIST_8220=" \
- Alaska8220 Yukon8220 \
+LIST_8220=" \
+ Alaska8220 \
+ Yukon8220 \
"
#########################################################################
## MPC824x Systems
#########################################################################
-LIST_824x=" \
- A3000 barco BMW CPC45 \
- CU824 debris eXalion HIDDEN_DRAGON \
- MOUSSE MUSENKI MVBLUE \
- OXC PN62 Sandpoint8240 Sandpoint8245 \
- sbc8240 SL8245 utx8245 \
+LIST_824x=" \
+ A3000 \
+ barco \
+ BMW \
+ CPC45 \
+ CU824 \
+ debris \
+ eXalion \
+ HIDDEN_DRAGON \
+ MOUSSE \
+ MUSENKI \
+ MVBLUE \
+ OXC \
+ PN62 \
+ Sandpoint8240 \
+ Sandpoint8245 \
+ sbc8240 \
+ SL8245 \
+ utx8245 \
"
#########################################################################
## MPC8260 Systems (includes 8250, 8255 etc.)
#########################################################################
-LIST_8260=" \
- atc cogent_mpc8260 CPU86 CPU87 \
- ep8248 ep8260 ep82xxm gw8260 \
- hymod IPHASE4539 ISPAN MPC8260ADS \
- MPC8266ADS MPC8272ADS PM826 PM828 \
- ppmc8260 Rattler8248 RPXsuper rsdproto \
- sacsng sbc8260 SCM TQM8260_AC \
- TQM8260_AD TQM8260_AE ZPC1900 \
+LIST_8260=" \
+ atc \
+ cogent_mpc8260 \
+ CPU86 \
+ CPU87 \
+ ep8248 \
+ ep8260 \
+ ep82xxm \
+ gw8260 \
+ hymod \
+ IPHASE4539 \
+ ISPAN \
+ MPC8260ADS \
+ MPC8266ADS \
+ MPC8272ADS \
+ PM826 \
+ PM828 \
+ ppmc8260 \
+ Rattler8248 \
+ RPXsuper \
+ rsdproto \
+ sacsng \
+ sbc8260 \
+ SCM \
+ TQM8260_AC \
+ TQM8260_AD \
+ TQM8260_AE \
+ ZPC1900 \
"
#########################################################################
## MPC83xx Systems (includes 8349, etc.)
#########################################################################
-LIST_83xx=" \
- MPC832XEMDS MPC8349EMDS MPC8349ITX MPC8349ITXGP \
- MPC8360EMDS sbc8349 TQM834x \
+LIST_83xx=" \
+ MPC8313ERDB_33 \
+ MPC8313ERDB_66 \
+ MPC8323ERDB \
+ MPC832XEMDS \
+ MPC8349EMDS \
+ MPC8349ITX \
+ MPC8349ITXGP \
+ MPC8360EMDS \
+ sbc8349 \
+ TQM834x \
"
@@ -141,114 +314,233 @@
## MPC85xx Systems (includes 8540, 8560 etc.)
#########################################################################
-LIST_85xx=" \
- MPC8540ADS MPC8540EVAL MPC8541CDS MPC8544DS \
- MPC8548CDS MPC8555CDS MPC8560ADS PM854 \
- PM856 sbc8540 sbc8560 stxgp3 \
- stxssa TQM8540 TQM8541 TQM8555 \
- TQM8560 \
+LIST_85xx=" \
+ MPC8540ADS \
+ MPC8540EVAL \
+ MPC8541CDS \
+ MPC8544DS \
+ MPC8548CDS \
+ MPC8555CDS \
+ MPC8560ADS \
+ MPC8568MDS \
+ PM854 \
+ PM856 \
+ sbc8540 \
+ sbc8560 \
+ stxgp3 \
+ stxssa \
+ TQM8540 \
+ TQM8541 \
+ TQM8555 \
+ TQM8560 \
+"
+
+#########################################################################
+## MPC86xx Systems
+#########################################################################
+
+LIST_86xx=" \
+ MPC8641HPCN \
+ sbc8641d \
"
#########################################################################
## 74xx/7xx Systems
#########################################################################
-LIST_74xx=" \
- DB64360 DB64460 EVB64260 P3G4 \
- p3m7448 PCIPPC2 PCIPPC6 ZUMA \
- mpc7448hpc2
+LIST_74xx=" \
+ DB64360 \
+ DB64460 \
+ EVB64260 \
+ mpc7448hpc2 \
+ P3G4 \
+ p3m7448 \
+ PCIPPC2 \
+ PCIPPC6 \
+ ZUMA \
"
-LIST_7xx=" \
- BAB7xx CPCI750 ELPPC p3m750 \
- ppmc7xx \
+LIST_TSEC=" \
+ ${LIST_85xx} \
+ ${LIST_86xx} \
+ ${LIST_83xx} \
"
-LIST_ppc="${LIST_5xx} ${LIST_5xxx} \
- ${LIST_8xx} \
- ${LIST_8220} ${LIST_824x} ${LIST_8260} \
- ${LIST_83xx} \
- ${LIST_85xx} \
- ${LIST_4xx} \
- ${LIST_74xx} ${LIST_7xx}"
+LIST_7xx=" \
+ BAB7xx \
+ CPCI750 \
+ ELPPC \
+ p3m750 \
+ ppmc7xx \
+"
+
+LIST_ppc=" \
+ ${LIST_5xx} \
+ ${LIST_5xxx} \
+ ${LIST_8xx} \
+ ${LIST_8220} \
+ ${LIST_824x} \
+ ${LIST_8260} \
+ ${LIST_83xx} \
+ ${LIST_85xx} \
+ ${LIST_86xx} \
+ ${LIST_4xx} \
+ ${LIST_74xx} \
+ ${LIST_7xx} \
+"
#########################################################################
## StrongARM Systems
#########################################################################
-LIST_SA="assabet dnp1110 gcplus lart shannon"
+LIST_SA=" \
+ assabet \
+ dnp1110 \
+ gcplus \
+ lart \
+ shannon \
+"
#########################################################################
## ARM7 Systems
#########################################################################
-LIST_ARM7=" \
- armadillo B2 ep7312 evb4510 \
- impa7 integratorap ap7 ap720t \
- lpc2292sodimm modnet50 \
+LIST_ARM7=" \
+ ap7 \
+ ap720t \
+ armadillo \
+ B2 \
+ ep7312 \
+ evb4510 \
+ impa7 \
+ integratorap \
+ lpc2292sodimm \
+ modnet50 \
+ SMN42 \
"
#########################################################################
## ARM9 Systems
#########################################################################
-LIST_ARM9=" \
- at91rm9200dk cmc_pu2 \
- ap920t ap922_XA10 ap926ejs ap946es \
- ap966 cp920t cp922_XA10 cp926ejs \
- cp946es cp966 lpd7a400 mp2usb \
- mx1ads mx1fs2 netstar omap1510inn \
- omap1610h2 omap1610inn omap730p2 sbc2410x \
- scb9328 smdk2400 smdk2410 trab \
- VCMA9 versatile versatileab versatilepb \
- voiceblue \
+LIST_ARM9=" \
+ at91rm9200dk \
+ cmc_pu2 \
+ ap920t \
+ ap922_XA10 \
+ ap926ejs \
+ ap946es \
+ ap966 \
+ cp920t \
+ cp922_XA10 \
+ cp926ejs \
+ cp946es \
+ cp966 \
+ lpd7a400 \
+ mp2usb \
+ mx1ads \
+ mx1fs2 \
+ netstar \
+ omap1510inn \
+ omap1610h2 \
+ omap1610inn \
+ omap730p2 \
+ sbc2410x \
+ scb9328 \
+ smdk2400 \
+ smdk2410 \
+ trab \
+ VCMA9 \
+ versatile \
+ versatileab \
+ versatilepb \
+ voiceblue \
+ davinci_dvevm \
+ davinci_schmoogie \
+ davinci_sonata \
"
#########################################################################
## ARM10 Systems
#########################################################################
-LIST_ARM10=" \
- integratorcp cp1026 \
+LIST_ARM10=" \
+ integratorcp \
+ cp1026 \
"
#########################################################################
## ARM11 Systems
#########################################################################
-LIST_ARM11=" \
- cp1136 omap2420h4 \
+LIST_ARM11=" \
+ cp1136 \
+ omap2420h4 \
"
#########################################################################
## Xscale Systems
#########################################################################
-LIST_pxa=" \
- adsvix cerf250 cradle csb226 \
- delta innokom lubbock pleb2 \
- pxa255_idp wepep250 xaeniax xm250 \
- xsengine zylonite \
+LIST_pxa=" \
+ adsvix \
+ cerf250 \
+ cradle \
+ csb226 \
+ delta \
+ innokom \
+ lubbock \
+ pleb2 \
+ pxa255_idp \
+ wepep250 \
+ xaeniax \
+ xm250 \
+ xsengine \
+ zylonite \
"
-LIST_ixp="ixdp425 ixdpg425 pdnb3 scpu"
+LIST_ixp=" \
+ ixdp425 \
+ ixdpg425 \
+ pdnb3 \
+ scpu \
+"
-LIST_arm=" \
- ${LIST_SA} \
- ${LIST_ARM7} ${LIST_ARM9} ${LIST_ARM10} ${LIST_ARM11} \
- ${LIST_pxa} ${LIST_ixp} \
+LIST_arm=" \
+ ${LIST_SA} \
+ ${LIST_ARM7} \
+ ${LIST_ARM9} \
+ ${LIST_ARM10} \
+ ${LIST_ARM11} \
+ ${LIST_pxa} \
+ ${LIST_ixp} \
"
#########################################################################
## MIPS Systems (default = big endian)
#########################################################################
-LIST_mips4kc="incaip"
+LIST_mips4kc=" \
+ incaip \
+"
-LIST_mips5kc="purple"
+LIST_mips5kc=" \
+ purple \
+"
-LIST_au1xx0="dbau1000 dbau1100 dbau1500 dbau1550 dbau1550_el gth2"
+LIST_au1xx0=" \
+ dbau1000 \
+ dbau1100 \
+ dbau1500 \
+ dbau1550 \
+ dbau1550_el \
+ gth2 \
+"
-LIST_mips="${LIST_mips4kc} ${LIST_mips5kc} ${LIST_au1xx0}"
+LIST_mips=" \
+ ${LIST_mips4kc} \
+ ${LIST_mips5kc} \
+ ${LIST_au1xx0} \
+"
#########################################################################
## MIPS Systems (little endian)
@@ -258,36 +550,55 @@
LIST_mips5kc_el=""
-LIST_au1xx0_el="dbau1550_el"
+LIST_au1xx0_el=" \
+ dbau1550_el \
+"
-LIST_mips_el="${LIST_mips4kc_el} ${LIST_mips5kc_el} ${LIST_au1xx0_el}"
+LIST_mips_el=" \
+ ${LIST_mips4kc_el} \
+ ${LIST_mips5kc_el} \
+ ${LIST_au1xx0_el} \
+"
#########################################################################
## i386 Systems
#########################################################################
-LIST_I486="sc520_cdp sc520_spunk sc520_spunk_rel"
+LIST_I486=" \
+ sc520_cdp \
+ sc520_spunk \
+ sc520_spunk_rel \
+"
-LIST_x86="${LIST_I486}"
+LIST_x86=" \
+ ${LIST_I486} \
+"
#########################################################################
## NIOS Systems
#########################################################################
-LIST_nios=" \
- ADNPESC1 ADNPESC1_base_32 \
- ADNPESC1_DNPEVA2_base_32 \
- DK1C20 DK1C20_standard_32 \
- DK1S10 DK1S10_standard_32 DK1S10_mtx_ldk_20 \
+LIST_nios=" \
+ ADNPESC1 \
+ ADNPESC1_base_32 \
+ ADNPESC1_DNPEVA2_base_32\
+ DK1C20 \
+ DK1C20_standard_32 \
+ DK1S10 \
+ DK1S10_standard_32 \
+ DK1S10_mtx_ldk_20 \
"
#########################################################################
## Nios-II Systems
#########################################################################
-LIST_nios2=" \
- EP1C20 EP1S10 EP1S40 \
- PCI5441 PK1C20 \
+LIST_nios2=" \
+ EP1C20 \
+ EP1S10 \
+ EP1S40 \
+ PCI5441 \
+ PK1C20 \
"
#########################################################################
@@ -295,31 +606,49 @@
#########################################################################
LIST_microblaze=" \
- suzaku ml401 xupv2p
+ suzaku \
+ ml401 \
+ xupv2p \
"
#########################################################################
## ColdFire Systems
#########################################################################
-LIST_coldfire=" \
- cobra5272 EB+MCF-EV123 EB+MCF-EV123_internal \
- idmr M5271EVB M5272C3 M5282EVB \
- TASREG r5200 M5271EVB \
+LIST_coldfire=" \
+ cobra5272 \
+ EB+MCF-EV123 \
+ EB+MCF-EV123_internal \
+ idmr \
+ M5235EVB \
+ M5249EVB \
+ M5253EVB \
+ M5271EVB \
+ M5272C3 \
+ M5282EVB \
+ M5329EVB \
+ M54455EVB \
+ r5200 \
+ TASREG \
"
#########################################################################
## AVR32 Systems
#########################################################################
-LIST_avr32="atstk1002"
+LIST_avr32=" \
+ atstk1002 \
+"
#########################################################################
## Blackfin Systems
#########################################################################
-LIST_blackfin=" \
- bf533-ezkit bf533-stamp bf537-stamp bf561-ezkit \
+LIST_blackfin=" \
+ bf533-ezkit \
+ bf533-stamp \
+ bf537-stamp \
+ bf561-ezkit \
"
#-----------------------------------------------------------------------
@@ -355,8 +684,8 @@
microblaze| \
mips|mips_el| \
nios|nios2| \
- ppc|5xx|5xxx|8xx|8220|824x|8260|83xx|85xx|4xx|7xx|74xx| \
- x86|I486)
+ ppc|5xx|5xxx|512x|8xx|8220|824x|8260|83xx|85xx|86xx|4xx|7xx|74xx| \
+ x86|I486|TSEC)
for target in `eval echo '$LIST_'${arg}`
do
build_target ${target}
diff --git a/Makefile b/Makefile
index 6001d1d..9ae11e2 100644
--- a/Makefile
+++ b/Makefile
@@ -22,9 +22,9 @@
#
VERSION = 1
-PATCHLEVEL = 2
+PATCHLEVEL = 3
SUBLEVEL = 0
-EXTRAVERSION =
+EXTRAVERSION = -rc2
U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION)
VERSION_FILE = $(obj)include/version_autogenerated.h
@@ -34,6 +34,7 @@
-e s/arm.*/arm/ \
-e s/sa110/arm/ \
-e s/powerpc/ppc/ \
+ -e s/ppc64/ppc/ \
-e s/macppc/ppc/)
HOSTOS := $(shell uname -s | tr '[:upper:]' '[:lower:]' | \
@@ -122,7 +123,7 @@
CROSS_COMPILE =
else
ifeq ($(ARCH),ppc)
-CROSS_COMPILE = powerpc-linux-
+CROSS_COMPILE = ppc_8xx-
endif
ifeq ($(ARCH),arm)
CROSS_COMPILE = arm-linux-
@@ -176,9 +177,6 @@
ifeq ($(CPU),mpc85xx)
OBJS += cpu/$(CPU)/resetvec.o
endif
-ifeq ($(CPU),mpc86xx)
-OBJS += cpu/$(CPU)/resetvec.o
-endif
ifeq ($(CPU),bf533)
OBJS += cpu/$(CPU)/start1.o cpu/$(CPU)/interrupt.o cpu/$(CPU)/cache.o
OBJS += cpu/$(CPU)/flush.o cpu/$(CPU)/init_sdram.o
@@ -195,6 +193,8 @@
OBJS := $(addprefix $(obj),$(OBJS))
LIBS = lib_generic/libgeneric.a
+LIBS += $(shell if [ -f board/$(VENDOR)/common/Makefile ]; then echo \
+ "board/$(VENDOR)/common/lib$(VENDOR).a"; fi)
LIBS += board/$(BOARDDIR)/lib$(BOARD).a
LIBS += cpu/$(CPU)/lib$(CPU).a
ifdef SOC
@@ -211,15 +211,23 @@
LIBS += rtc/librtc.a
LIBS += dtt/libdtt.a
LIBS += drivers/libdrivers.a
+LIBS += drivers/bios_emulator/libatibiosemu.a
LIBS += drivers/nand/libnand.a
LIBS += drivers/nand_legacy/libnand_legacy.a
+LIBS += drivers/net/libnet.a
ifeq ($(CPU),mpc83xx)
LIBS += drivers/qe/qe.a
endif
+ifeq ($(CPU),mpc85xx)
+LIBS += drivers/qe/qe.a
+endif
+LIBS += drivers/serial/libserial.a
LIBS += drivers/sk98lin/libsk98lin.a
LIBS += post/libpost.a post/drivers/libpostdrivers.a
LIBS += $(shell if [ -d post/lib_$(ARCH) ]; then echo \
"post/lib_$(ARCH)/libpost$(ARCH).a"; fi)
+LIBS += $(shell if [ -d post/lib_$(ARCH)/fpu ]; then echo \
+ "post/lib_$(ARCH)/fpu/libpost$(ARCH)fpu.a"; fi)
LIBS += $(shell if [ -d post/cpu/$(CPU) ]; then echo \
"post/cpu/$(CPU)/libpost$(CPU).a"; fi)
LIBS += $(shell if [ -d post/board/$(BOARDDIR) ]; then echo \
@@ -251,7 +259,7 @@
#########################################################################
#########################################################################
-ALL = $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND)
+ALL += $(obj)u-boot.srec $(obj)u-boot.bin $(obj)System.map $(U_BOOT_NAND)
all: $(ALL)
@@ -271,6 +279,9 @@
sed -e 's/"[ ]*$$/ for $(BOARD) board"/') \
-d $< $@
+$(obj)u-boot.sha1: $(obj)u-boot.bin
+ $(obj)tools/ubsha1 $(obj)u-boot.bin
+
$(obj)u-boot.dis: $(obj)u-boot
$(OBJDUMP) -d $< > $@
@@ -311,7 +322,7 @@
env:
$(MAKE) -C tools/env all || exit 1
-depend dep:
+depend dep: version
for dir in $(SUBDIRS) ; do $(MAKE) -C $$dir _depend ; done
tags ctags:
@@ -430,7 +441,7 @@
@$(MKCONFIG) jupiter ppc mpc5xxx jupiter
v38b_config: unconfig
- @./mkconfig -a v38b ppc mpc5xxx v38b
+ @$(MKCONFIG) -a v38b ppc mpc5xxx v38b
inka4x0_config: unconfig
@$(MKCONFIG) inka4x0 ppc mpc5xxx inka4x0
@@ -533,6 +544,9 @@
smmaco4_config: unconfig
@$(MKCONFIG) -a smmaco4 ppc mpc5xxx tqm5200
+cm5200_config: unconfig
+ @./mkconfig -a cm5200 ppc mpc5xxx cm5200
+
spieval_config: unconfig
@$(MKCONFIG) -a spieval ppc mpc5xxx tqm5200
@@ -635,6 +649,13 @@
#########################################################################
+## MPC512x Systems
+#########################################################################
+ads5121_config: unconfig
+ @$(MKCONFIG) ads5121 ppc mpc512x ads5121
+
+
+#########################################################################
## MPC8xx Systems
#########################################################################
@@ -647,6 +668,9 @@
@echo "#define CONFIG_MPC852T" > $(obj)include/config.h)
@$(MKCONFIG) -a Adder ppc mpc8xx adder
+AdderUSB_config: unconfig
+ @./mkconfig -a AdderUSB ppc mpc8xx adder
+
ADS860_config \
FADS823_config \
FADS850SAR_config \
@@ -1020,11 +1044,19 @@
acadia_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx acadia amcc
+acadia_nand_config: unconfig
+ @mkdir -p $(obj)include $(obj)board/amcc/acadia
+ @mkdir -p $(obj)nand_spl/board/amcc/acadia
+ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a acadia ppc ppc4xx acadia amcc
+ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/acadia/config.tmp
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
ADCIOP_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx adciop esd
alpr_config: unconfig
- @./mkconfig $(@:_config=) ppc ppc4xx alpr prodrive
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx alpr prodrive
AP1000_config:unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx ap1000 amirix
@@ -1041,6 +1073,14 @@
bamboo_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx bamboo amcc
+bamboo_nand_config: unconfig
+ @mkdir -p $(obj)include $(obj)board/amcc/bamboo
+ @mkdir -p $(obj)nand_spl/board/amcc/bamboo
+ @echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
+ @$(MKCONFIG) -n $@ -a bamboo ppc ppc4xx bamboo amcc
+ @echo "TEXT_BASE = 0x01000000" > $(obj)board/amcc/bamboo/config.tmp
+ @echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
+
bubinga_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx bubinga amcc
@@ -1109,6 +1149,12 @@
G2000_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx g2000
+hcu4_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu4 netstal
+
+hcu5_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx hcu5 netstal
+
HH405_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx hh405 esd
@@ -1127,6 +1173,9 @@
luan_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx luan amcc
+lwmon5_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx lwmon5
+
METROBOX_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx metrobox sandburst
@@ -1213,9 +1262,8 @@
sequoia_nand_config \
rainier_nand_config: unconfig
- @mkdir -p $(obj)include
- @mkdir -p $(obj)nand_spl
- @mkdir -p $(obj)board/amcc/sequoia
+ @mkdir -p $(obj)include $(obj)board/amcc/sequoia
+ @mkdir -p $(obj)nand_spl/board/amcc/sequoia
@echo "#define CONFIG_NAND_U_BOOT" > $(obj)include/config.h
@echo "#define CONFIG_$$(echo $(subst ,,$(@:_config=)) | \
tr '[:lower:]' '[:upper:]')" >> $(obj)include/config.h
@@ -1224,7 +1272,10 @@
@echo "CONFIG_NAND_U_BOOT = y" >> $(obj)include/config.mk
sc3_config:unconfig
- @./mkconfig $(@:_config=) ppc ppc4xx sc3
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx sc3
+
+taihu_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx taihu amcc
taishan_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx taishan amcc
@@ -1263,6 +1314,9 @@
yucca_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc ppc4xx yucca amcc
+zeus_config: unconfig
+ @$(MKCONFIG) $(@:_config=) ppc ppc4xx zeus
+
#########################################################################
## MPC8220 Systems
#########################################################################
@@ -1390,7 +1444,7 @@
@$(MKCONFIG) $(@:_config=) ppc mpc8260 ep8260
ep82xxm_config: unconfig
- @./mkconfig $(@:_config=) ppc mpc8260 ep82xxm
+ @$(MKCONFIG) $(@:_config=) ppc mpc8260 ep82xxm
gw8260_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc8260 gw8260
@@ -1590,6 +1644,31 @@
## Coldfire
#########################################################################
+M5235EVB_config \
+M5235EVB_Flash16_config \
+M5235EVB_Flash32_config: unconfig
+ @case "$@" in \
+ M5235EVB_config) FLASH=16;; \
+ M5235EVB_Flash16_config) FLASH=16;; \
+ M5235EVB_Flash32_config) FLASH=32;; \
+ esac; \
+ >include/config.h ; \
+ if [ "$${FLASH}" != "16" ] ; then \
+ echo "#define NORFLASH_PS32BIT 1" >> include/config.h ; \
+ echo "TEXT_BASE = 0xFFC00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
+ cp $(obj)board/freescale/m5235evb/u-boot.32 $(obj)board/freescale/m5235evb/u-boot.lds ; \
+ else \
+ echo "TEXT_BASE = 0xFFE00000" > $(obj)board/freescale/m5235evb/config.tmp ; \
+ cp $(obj)board/freescale/m5235evb/u-boot.16 $(obj)board/freescale/m5235evb/u-boot.lds ; \
+ fi
+ @$(MKCONFIG) -a M5235EVB m68k mcf523x m5235evb freescale
+
+M5249EVB_config : unconfig
+ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5249evb freescale
+
+M5253EVBE_config : unconfig
+ @$(MKCONFIG) $(@:_config=) m68k mcf52x2 m5253evbe freescale
+
cobra5272_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 cobra5272
@@ -1625,74 +1704,133 @@
r5200_config : unconfig
@$(MKCONFIG) $(@:_config=) m68k mcf52x2 r5200
+M5329AFEE_config \
+M5329BFEE_config : unconfig
+ @case "$@" in \
+ M5329AFEE_config) NAND=0;; \
+ M5329BFEE_config) NAND=16;; \
+ esac; \
+ >include/config.h ; \
+ if [ "$${NAND}" != "0" ] ; then \
+ echo "#define NANDFLASH_SIZE $${NAND}" > $(obj)include/config.h ; \
+ fi
+ @$(MKCONFIG) -a M5329EVB m68k mcf532x m5329evb freescale
+
+M54455EVB_config \
+M54455EVB_atmel_config \
+M54455EVB_intel_config \
+M54455EVB_a33_config \
+M54455EVB_a66_config \
+M54455EVB_i33_config \
+M54455EVB_i66_config : unconfig
+ @case "$@" in \
+ M54455EVB_config) FLASH=ATMEL; FREQ=33333333;; \
+ M54455EVB_atmel_config) FLASH=ATMEL; FREQ=33333333;; \
+ M54455EVB_intel_config) FLASH=INTEL; FREQ=33333333;; \
+ M54455EVB_a33_config) FLASH=ATMEL; FREQ=33333333;; \
+ M54455EVB_a66_config) FLASH=ATMEL; FREQ=66666666;; \
+ M54455EVB_i33_config) FLASH=INTEL; FREQ=33333333;; \
+ M54455EVB_i66_config) FLASH=INTEL; FREQ=66666666;; \
+ esac; \
+ >include/config.h ; \
+ if [ "$${FLASH}" == "INTEL" ] ; then \
+ echo "#undef CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
+ echo "... with INTEL boot..." ; \
+ else \
+ echo "#define CFG_ATMEL_BOOT" >> $(obj)include/config.h ; \
+ echo "... with ATMEL boot..." ; \
+ fi; \
+ echo "#define CFG_INPUT_CLKSRC $${FREQ}" >> $(obj)include/config.h ; \
+ echo "... with $${FREQ}Hz input clock"
+ @$(MKCONFIG) -a M54455EVB m68k mcf5445x m54455evb freescale
+
#########################################################################
## MPC83xx Systems
#########################################################################
+MPC8313ERDB_33_config \
+MPC8313ERDB_66_config: unconfig
+ @mkdir -p $(obj)include
+ @echo "" >$(obj)include/config.h ; \
+ if [ "$(findstring _33_,$@)" ] ; then \
+ echo -n "...33M ..." ; \
+ echo "#define CFG_33MHZ" >>$(obj)include/config.h ; \
+ fi ; \
+ if [ "$(findstring _66_,$@)" ] ; then \
+ echo -n "...66M..." ; \
+ echo "#define CFG_66MHZ" >>$(obj)include/config.h ; \
+ fi ;
+ @$(MKCONFIG) -a MPC8313ERDB ppc mpc83xx mpc8313erdb freescale
+
+MPC8323ERDB_config: unconfig
+ @$(MKCONFIG) -a MPC8323ERDB ppc mpc83xx mpc8323erdb freescale
+
MPC832XEMDS_config \
MPC832XEMDS_HOST_33_config \
MPC832XEMDS_HOST_66_config \
MPC832XEMDS_SLAVE_config: unconfig
- @echo "" >include/config.h ; \
+ @mkdir -p $(obj)include
+ @echo "" >$(obj)include/config.h ; \
if [ "$(findstring _HOST_,$@)" ] ; then \
echo -n "... PCI HOST " ; \
- echo "#define CONFIG_PCI" >>include/config.h ; \
+ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _SLAVE_,$@)" ] ; then \
echo "...PCI SLAVE 66M" ; \
- echo "#define CONFIG_PCI" >>include/config.h ; \
- echo "#define CONFIG_PCISLAVE" >>include/config.h ; \
+ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _33_,$@)" ] ; then \
echo -n "...33M ..." ; \
- echo "#define PCI_33M" >>include/config.h ; \
+ echo "#define PCI_33M" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
echo -n "...66M..." ; \
- echo "#define PCI_66M" >>include/config.h ; \
+ echo "#define PCI_66M" >>$(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds
+ @$(MKCONFIG) -a MPC832XEMDS ppc mpc83xx mpc832xemds freescale
MPC8349EMDS_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349emds
+ @$(MKCONFIG) $(@:_config=) ppc mpc83xx mpc8349emds freescale
MPC8349ITX_config \
MPC8349ITX_LOWBOOT_config \
MPC8349ITXGP_config: unconfig
@mkdir -p $(obj)include
- @mkdir -p $(obj)board/mpc8349itx
+ @mkdir -p $(obj)board/freescale/mpc8349itx
@echo "#define CONFIG_$(subst _LOWBOOT,,$(@:_config=))" >> $(obj)include/config.h
@if [ "$(findstring GP,$@)" ] ; then \
- echo "TEXT_BASE = 0xFE000000" >$(obj)board/mpc8349itx/config.tmp ; \
+ echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
fi
@if [ "$(findstring LOWBOOT,$@)" ] ; then \
- echo "TEXT_BASE = 0xFE000000" >$(obj)board/mpc8349itx/config.tmp ; \
+ echo "TEXT_BASE = 0xFE000000" >$(obj)board/freescale/mpc8349itx/config.tmp ; \
fi
- @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx
+ @$(MKCONFIG) -a -n $(@:_config=) MPC8349ITX ppc mpc83xx mpc8349itx freescale
MPC8360EMDS_config \
MPC8360EMDS_HOST_33_config \
MPC8360EMDS_HOST_66_config \
MPC8360EMDS_SLAVE_config: unconfig
- @echo "" >include/config.h ; \
+ @mkdir -p $(obj)include
+ @echo "" >$(obj)include/config.h ; \
if [ "$(findstring _HOST_,$@)" ] ; then \
echo -n "... PCI HOST " ; \
- echo "#define CONFIG_PCI" >>include/config.h ; \
+ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _SLAVE_,$@)" ] ; then \
echo "...PCI SLAVE 66M" ; \
- echo "#define CONFIG_PCI" >>include/config.h ; \
- echo "#define CONFIG_PCISLAVE" >>include/config.h ; \
+ echo "#define CONFIG_PCI" >>$(obj)include/config.h ; \
+ echo "#define CONFIG_PCISLAVE" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _33_,$@)" ] ; then \
echo -n "...33M ..." ; \
- echo "#define PCI_33M" >>include/config.h ; \
+ echo "#define PCI_33M" >>$(obj)include/config.h ; \
fi ; \
if [ "$(findstring _66_,$@)" ] ; then \
echo -n "...66M..." ; \
- echo "#define PCI_66M" >>include/config.h ; \
+ echo "#define PCI_66M" >>$(obj)include/config.h ; \
fi ;
- @$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds
+ @$(MKCONFIG) -a MPC8360EMDS ppc mpc83xx mpc8360emds freescale
sbc8349_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc83xx sbc8349
@@ -1716,10 +1854,10 @@
@mkdir -p $(obj)include
@echo "" >$(obj)include/config.h ; \
if [ "$(findstring _33_,$@)" ] ; then \
- echo -n "... 33 MHz PCI" ; \
+ echo "... 33 MHz PCI" ; \
else \
echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \
- echo -n "... 66 MHz PCI" ; \
+ echo "... 66 MHz PCI" ; \
fi ; \
if [ "$(findstring _slave_,$@)" ] ; then \
echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \
@@ -1732,17 +1870,38 @@
MPC8560ADS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8560ads
+MPC8541CDS_legacy_config \
MPC8541CDS_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8541cds cds
+ @mkdir -p $(obj)include
+ @echo "" >$(obj)include/config.h ; \
+ if [ "$(findstring _legacy_,$@)" ] ; then \
+ echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
+ echo "... legacy" ; \
+ fi
+ @$(MKCONFIG) -a MPC8541CDS ppc mpc85xx mpc8541cds cds
MPC8544DS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8544ds freescale
+MPC8548CDS_legacy_config \
MPC8548CDS_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8548cds cds
+ @mkdir -p $(obj)include
+ @echo "" >$(obj)include/config.h ; \
+ if [ "$(findstring _legacy_,$@)" ] ; then \
+ echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
+ echo "... legacy" ; \
+ fi
+ @$(MKCONFIG) -a MPC8548CDS ppc mpc85xx mpc8548cds cds
+MPC8555CDS_legacy_config \
MPC8555CDS_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8555cds cds
+ @mkdir -p $(obj)include
+ @echo "" >$(obj)include/config.h ; \
+ if [ "$(findstring _legacy_,$@)" ] ; then \
+ echo "#define CONFIG_LEGACY" >>$(obj)include/config.h ; \
+ echo "... legacy" ; \
+ fi
+ @$(MKCONFIG) -a MPC8555CDS ppc mpc85xx mpc8555cds cds
MPC8568MDS_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx mpc8568mds
@@ -1782,8 +1941,16 @@
stxgp3_config: unconfig
@$(MKCONFIG) $(@:_config=) ppc mpc85xx stxgp3
-stxssa_config: unconfig
- @$(MKCONFIG) $(@:_config=) ppc mpc85xx stxssa
+stxssa_config \
+stxssa_4M_config: unconfig
+ @mkdir -p $(obj)include
+ @if [ "$(findstring _4M_,$@)" ] ; then \
+ echo "#define CONFIG_STXSSA_4M" >>$(obj)include/config.h ; \
+ echo "... with 4 MiB flash memory" ; \
+ else \
+ >$(obj)include/config.h ; \
+ fi
+ @$(MKCONFIG) -a stxssa ppc mpc85xx stxssa
TQM8540_config \
TQM8541_config \
@@ -1797,7 +1964,7 @@
echo "#define CONFIG_TQM$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_HOSTNAME tqm$${CTYPE}">>$(obj)include/config.h; \
echo "#define CONFIG_BOARDNAME \"TQM$${CTYPE}\"">>$(obj)include/config.h; \
- echo "#define CFG_BOOTFILE \"bootfile=/tftpboot/tqm$${CTYPE}/uImage\0\"">>$(obj)include/config.h
+ echo "#define CFG_BOOTFILE_PATH \"/tftpboot/tqm$${CTYPE}/uImage\"">>$(obj)include/config.h
@$(MKCONFIG) -a TQM85xx ppc mpc85xx tqm85xx
#########################################################################
@@ -1805,8 +1972,10 @@
#########################################################################
MPC8641HPCN_config: unconfig
- @./mkconfig $(@:_config=) ppc mpc86xx mpc8641hpcn
+ @$(MKCONFIG) $(@:_config=) ppc mpc86xx mpc8641hpcn freescale
+sbc8641d_config: unconfig
+ @./mkconfig $(@:_config=) ppc mpc86xx sbc8641d
#########################################################################
## 74xx/7xx Systems
@@ -1962,6 +2131,15 @@
omap5912osk_config : unconfig
@$(MKCONFIG) $(@:_config=) arm arm926ejs omap5912osk NULL omap
+davinci_dvevm_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs dv-evm davinci davinci
+
+davinci_schmoogie_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs schmoogie davinci davinci
+
+davinci_sonata_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm926ejs sonata davinci davinci
+
omap1610inn_config \
omap1610inn_cs0boot_config \
omap1610inn_cs3boot_config \
@@ -1972,13 +2150,13 @@
omap1610h2_cs_autoboot_config: unconfig
@mkdir -p $(obj)include
@if [ "$(findstring _cs0boot_, $@)" ] ; then \
- echo "#define CONFIG_CS0_BOOT" >> .$(obj)/include/config.h ; \
+ echo "#define CONFIG_CS0_BOOT" >> .$(obj)include/config.h ; \
echo "... configured for CS0 boot"; \
elif [ "$(findstring _cs_autoboot_, $@)" ] ; then \
- echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)./include/config.h ; \
+ echo "#define CONFIG_CS_AUTOBOOT" >> $(obj)include/config.h ; \
echo "... configured for CS_AUTO boot"; \
else \
- echo "#define CONFIG_CS3_BOOT" >> $(obj)./include/config.h ; \
+ echo "#define CONFIG_CS3_BOOT" >> $(obj)include/config.h ; \
echo "... configured for CS3 boot"; \
fi;
@$(MKCONFIG) -a $(call xtract_omap1610xxx,$@) arm arm926ejs omap1610inn NULL omap
@@ -2103,7 +2281,10 @@
@$(MKCONFIG) $(@:_config=) arm arm720t evb4510
lpc2292sodimm_config: unconfig
- @$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm
+ @$(MKCONFIG) $(@:_config=) arm arm720t lpc2292sodimm NULL lpc2292
+
+SMN42_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm arm720t SMN42 siemens lpc2292
#########################################################################
## XScale Systems
@@ -2144,17 +2325,21 @@
pdnb3_config \
scpu_config: unconfig
+ @mkdir -p $(obj)include
@if [ "$(findstring scpu_,$@)" ] ; then \
- echo "#define CONFIG_SCPU" >>include/config.h ; \
+ echo "#define CONFIG_SCPU" >>$(obj)include/config.h ; \
echo "... on SCPU board variant" ; \
else \
- >include/config.h ; \
+ >$(obj)include/config.h ; \
fi
@$(MKCONFIG) -a pdnb3 arm ixp pdnb3 prodrive
pxa255_idp_config: unconfig
@$(MKCONFIG) $(@:_config=) arm pxa pxa255_idp
+trizepsiv_config : unconfig
+ @$(MKCONFIG) $(@:_config=) arm pxa trizepsiv
+
wepep250_config : unconfig
@$(MKCONFIG) $(@:_config=) arm pxa wepep250
@@ -2370,14 +2555,16 @@
@$(MKCONFIG) -a $(@:_config=) microblaze microblaze suzaku AtmarkTechno
ml401_config: unconfig
- @ >include/config.h
- @echo "#define CONFIG_ML401 1" >> include/config.h
- @./mkconfig -a $(@:_config=) microblaze microblaze ml401 xilinx
+ @mkdir -p $(obj)include
+ @ >$(obj)include/config.h
+ @echo "#define CONFIG_ML401 1" >> $(obj)include/config.h
+ @$(MKCONFIG) -a $(@:_config=) microblaze microblaze ml401 xilinx
xupv2p_config: unconfig
- @ >include/config.h
- @echo "#define CONFIG_XUPV2P 1" >> include/config.h
- @./mkconfig -a $(@:_config=) microblaze microblaze xupv2p xilinx
+ @mkdir -p $(obj)include
+ @ >$(obj)include/config.h
+ @echo "#define CONFIG_XUPV2P 1" >> $(obj)include/config.h
+ @$(MKCONFIG) -a $(@:_config=) microblaze microblaze xupv2p xilinx
#########################################################################
## Blackfin
@@ -2402,7 +2589,7 @@
#########################################################################
atstk1002_config : unconfig
- @./mkconfig $(@:_config=) avr32 at32ap atstk1000 atmel at32ap7000
+ @$(MKCONFIG) $(@:_config=) avr32 at32ap atstk1000 atmel at32ap7000
#########################################################################
#########################################################################
@@ -2431,7 +2618,7 @@
$(obj)examples/smc91111_eeprom $(obj)examples/interrupt \
$(obj)examples/test_burst
rm -f $(obj)tools/img2srec $(obj)tools/mkimage $(obj)tools/envcrc \
- $(obj)tools/gen_eth_addr
+ $(obj)tools/gen_eth_addr $(obj)tools/ubsha1
rm -f $(obj)tools/mpc86x_clk $(obj)tools/ncb
rm -f $(obj)tools/easylogo/easylogo $(obj)tools/bmp_logo
rm -f $(obj)tools/gdb/astest $(obj)tools/gdb/gdbcont $(obj)tools/gdb/gdbsend
@@ -2454,7 +2641,7 @@
rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS $(obj)include/version_autogenerated.h
rm -fr $(obj)*.*~
rm -f $(obj)u-boot $(obj)u-boot.map $(obj)u-boot.hex $(ALL)
- rm -f $(obj)tools/crc32.c $(obj)tools/environment.c $(obj)tools/env/crc32.c
+ rm -f $(obj)tools/crc32.c $(obj)tools/environment.c $(obj)tools/env/crc32.c $(obj)tools/sha1.c
rm -f $(obj)tools/inca-swap-bytes $(obj)cpu/mpc824x/bedbug_603e.c
rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm
[ ! -d $(OBJTREE)/nand_spl ] || find $(obj)nand_spl -lname "*" -print | xargs rm -f
diff --git a/README b/README
index 90ef2c2..09eb76f 100644
--- a/README
+++ b/README
@@ -136,6 +136,8 @@
- i386 Files specific to i386 CPUs
- ixp Files specific to Intel XScale IXP CPUs
- mcf52x2 Files specific to Freescale ColdFire MCF52x2 CPUs
+ - mcf532x Files specific to Freescale ColdFire MCF5329 CPUs
+ - mcf5445x Files specific to Freescale ColdFire MCF5445x CPUs
- mips Files specific to MIPS CPUs
- mpc5xx Files specific to Freescale MPC5xx CPUs
- mpc5xxx Files specific to Freescale MPC5xxx CPUs
@@ -228,113 +230,9 @@
The following options need to be configured:
-- CPU Type: Define exactly one of
+- CPU Type: Define exactly one, e.g. CONFIG_MPC85XX.
- PowerPC based CPUs:
- -------------------
- CONFIG_MPC823, CONFIG_MPC850, CONFIG_MPC855, CONFIG_MPC860
- or CONFIG_MPC5xx
- or CONFIG_MPC8220
- or CONFIG_MPC824X, CONFIG_MPC8260
- or CONFIG_MPC85xx
- or CONFIG_IOP480
- or CONFIG_405GP
- or CONFIG_405EP
- or CONFIG_440
- or CONFIG_MPC74xx
- or CONFIG_750FX
-
- ARM based CPUs:
- ---------------
- CONFIG_SA1110
- CONFIG_ARM7
- CONFIG_PXA250
- CONFIG_CPU_MONAHANS
-
- MicroBlaze based CPUs:
- ----------------------
- CONFIG_MICROBLAZE
-
- Nios-2 based CPUs:
- ----------------------
- CONFIG_NIOS2
-
- AVR32 based CPUs:
- ----------------------
- CONFIG_AT32AP
-
-- Board Type: Define exactly one of
-
- PowerPC based boards:
- ---------------------
-
- CONFIG_ADCIOP CONFIG_FPS860L CONFIG_OXC
- CONFIG_ADS860 CONFIG_GEN860T CONFIG_PCI405
- CONFIG_AMX860 CONFIG_GENIETV CONFIG_PCIPPC2
- CONFIG_AP1000 CONFIG_GTH CONFIG_PCIPPC6
- CONFIG_AR405 CONFIG_gw8260 CONFIG_pcu_e
- CONFIG_BAB7xx CONFIG_hermes CONFIG_PIP405
- CONFIG_BC3450 CONFIG_hymod CONFIG_PM826
- CONFIG_c2mon CONFIG_IAD210 CONFIG_ppmc8260
- CONFIG_CANBT CONFIG_ICU862 CONFIG_QS823
- CONFIG_CCM CONFIG_IP860 CONFIG_QS850
- CONFIG_CMI CONFIG_IPHASE4539 CONFIG_QS860T
- CONFIG_cogent_mpc8260 CONFIG_IVML24 CONFIG_RBC823
- CONFIG_cogent_mpc8xx CONFIG_IVML24_128 CONFIG_RPXClassic
- CONFIG_CPCI405 CONFIG_IVML24_256 CONFIG_RPXlite
- CONFIG_CPCI4052 CONFIG_IVMS8 CONFIG_RPXsuper
- CONFIG_CPCIISER4 CONFIG_IVMS8_128 CONFIG_rsdproto
- CONFIG_CPU86 CONFIG_IVMS8_256 CONFIG_sacsng
- CONFIG_CRAYL1 CONFIG_JSE CONFIG_Sandpoint8240
- CONFIG_CSB272 CONFIG_LANTEC CONFIG_Sandpoint8245
- CONFIG_CU824 CONFIG_LITE5200B CONFIG_sbc8260
- CONFIG_DASA_SIM CONFIG_lwmon CONFIG_sbc8560
- CONFIG_DB64360 CONFIG_MBX CONFIG_SM850
- CONFIG_DB64460 CONFIG_MBX860T CONFIG_SPD823TS
- CONFIG_DU405 CONFIG_MHPC CONFIG_STXGP3
- CONFIG_DUET_ADS CONFIG_MIP405 CONFIG_SXNI855T
- CONFIG_EBONY CONFIG_MOUSSE CONFIG_TQM823L
- CONFIG_ELPPC CONFIG_MPC8260ADS CONFIG_TQM8260
- CONFIG_ELPT860 CONFIG_MPC8540ADS CONFIG_TQM850L
- CONFIG_ep8260 CONFIG_MPC8540EVAL CONFIG_TQM855L
- CONFIG_ERIC CONFIG_MPC8560ADS CONFIG_TQM860L
- CONFIG_ESTEEM192E CONFIG_MUSENKI CONFIG_TTTech
- CONFIG_ETX094 CONFIG_MVS1 CONFIG_UTX8245
- CONFIG_EVB64260 CONFIG_NETPHONE CONFIG_V37
- CONFIG_FADS823 CONFIG_NETTA CONFIG_W7OLMC
- CONFIG_FADS850SAR CONFIG_NETVIA CONFIG_W7OLMG
- CONFIG_FADS860T CONFIG_NX823 CONFIG_WALNUT
- CONFIG_FLAGADM CONFIG_OCRTC CONFIG_ZPC1900
- CONFIG_FPS850L CONFIG_ORSG CONFIG_ZUMA
-
- ARM based boards:
- -----------------
-
- CONFIG_ARMADILLO, CONFIG_AT91RM9200DK, CONFIG_CERF250,
- CONFIG_CSB637, CONFIG_DELTA, CONFIG_DNP1110,
- CONFIG_EP7312, CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE,
- CONFIG_IMPA7, CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610,
- CONFIG_KB9202, CONFIG_LART, CONFIG_LPD7A400,
- CONFIG_LUBBOCK, CONFIG_OSK_OMAP5912, CONFIG_OMAP2420H4,
- CONFIG_PLEB2, CONFIG_SHANNON, CONFIG_P2_OMAP730,
- CONFIG_SMDK2400, CONFIG_SMDK2410, CONFIG_TRAB,
- CONFIG_VCMA9
-
- MicroBlaze based boards:
- ------------------------
-
- CONFIG_SUZAKU
-
- Nios-2 based boards:
- ------------------------
-
- CONFIG_PCI5441 CONFIG_PK1C20
- CONFIG_EP1C20 CONFIG_EP1S10 CONFIG_EP1S40
-
- AVR32 based boards:
- -------------------
-
- CONFIG_ATSTK1000
+- Board Type: Define exactly one, e.g. CONFIG_MPC8540ADS.
- CPU Daughterboard Type: (if CONFIG_ATSTK1000 is defined)
Define exactly one of
@@ -440,7 +338,7 @@
CONFIG_OF_LIBFDT
* New libfdt-based support
* Adds the "fdt" command
- * The bootm command does _not_ modify the fdt
+ * The bootm command automatically updates the fdt
CONFIG_OF_FLAT_TREE
* Deprecated, see CONFIG_OF_LIBFDT
@@ -449,15 +347,13 @@
* The environment variable "disable_of", when set,
disables this functionality.
- CONFIG_OF_FLAT_TREE_MAX_SIZE
-
- The maximum size of the constructed OF tree.
-
OF_CPU - The proper name of the cpus node.
OF_SOC - The proper name of the soc node.
OF_TBCLK - The timebase frequency.
OF_STDOUT_PATH - The path to the console device
+ boards with QUICC Engines require OF_QE to set UCC mac addresses
+
CONFIG_OF_HAS_BD_T
* CONFIG_OF_LIBFDT - enables the "fdt bd_t" command
@@ -467,7 +363,7 @@
CONFIG_OF_HAS_UBOOT_ENV
- * CONFIG_OF_LIBFDT - enables the "fdt bd_t" command
+ * CONFIG_OF_LIBFDT - enables the "fdt env" command
* CONFIG_OF_FLAT_TREE - The resulting flat device tree
will have a copy of u-boot's environment variables
@@ -541,7 +437,7 @@
CFG_CONSOLE_BLINK_COUNT blink interval (cf. i8042.c)
CONFIG_CONSOLE_TIME display time/date info in
upper right corner
- (requires CFG_CMD_DATE)
+ (requires CONFIG_CMD_DATE)
CONFIG_VIDEO_LOGO display Linux logo in
upper left corner
CONFIG_VIDEO_BMP_LOGO use bmp_logo.h instead of
@@ -645,102 +541,96 @@
time on others. This setting #define's the initial
value of the "loads_echo" environment variable.
-- Kgdb Serial Baudrate: (if CFG_CMD_KGDB is defined)
+- Kgdb Serial Baudrate: (if CONFIG_CMD_KGDB is defined)
CONFIG_KGDB_BAUDRATE
Select one of the baudrates listed in
CFG_BAUDRATE_TABLE, see below.
- Monitor Functions:
- CONFIG_COMMANDS
- Most monitor functions can be selected (or
- de-selected) by adjusting the definition of
- CONFIG_COMMANDS; to select individual functions,
- #define CONFIG_COMMANDS by "OR"ing any of the
- following values:
+ Monitor commands can be included or excluded
+ from the build by using the #include files
+ "config_cmd_all.h" and #undef'ing unwanted
+ commands, or using "config_cmd_default.h"
+ and augmenting with additional #define's
+ for wanted commands.
- #define enables commands:
- -------------------------
- CFG_CMD_ASKENV * ask for env variable
- CFG_CMD_AUTOSCRIPT Autoscript Support
- CFG_CMD_BDI bdinfo
- CFG_CMD_BEDBUG * Include BedBug Debugger
- CFG_CMD_BMP * BMP support
- CFG_CMD_BSP * Board specific commands
- CFG_CMD_BOOTD bootd
- CFG_CMD_CACHE * icache, dcache
- CFG_CMD_CONSOLE coninfo
- CFG_CMD_DATE * support for RTC, date/time...
- CFG_CMD_DHCP * DHCP support
- CFG_CMD_DIAG * Diagnostics
- CFG_CMD_DOC * Disk-On-Chip Support
- CFG_CMD_DTT * Digital Therm and Thermostat
- CFG_CMD_ECHO echo arguments
- CFG_CMD_EEPROM * EEPROM read/write support
- CFG_CMD_ELF * bootelf, bootvx
- CFG_CMD_ENV saveenv
- CFG_CMD_FDC * Floppy Disk Support
- CFG_CMD_FAT * FAT partition support
- CFG_CMD_FDOS * Dos diskette Support
- CFG_CMD_FLASH flinfo, erase, protect
- CFG_CMD_FPGA FPGA device initialization support
- CFG_CMD_HWFLOW * RTS/CTS hw flow control
- CFG_CMD_I2C * I2C serial bus support
- CFG_CMD_IDE * IDE harddisk support
- CFG_CMD_IMI iminfo
- CFG_CMD_IMLS List all found images
- CFG_CMD_IMMAP * IMMR dump support
- CFG_CMD_IRQ * irqinfo
- CFG_CMD_ITEST Integer/string test of 2 values
- CFG_CMD_JFFS2 * JFFS2 Support
- CFG_CMD_KGDB * kgdb
- CFG_CMD_LOADB loadb
- CFG_CMD_LOADS loads
- CFG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
- loop, loopw, mtest
- CFG_CMD_MISC Misc functions like sleep etc
- CFG_CMD_MMC * MMC memory mapped support
- CFG_CMD_MII * MII utility commands
- CFG_CMD_NAND * NAND support
- CFG_CMD_NET bootp, tftpboot, rarpboot
- CFG_CMD_PCI * pciinfo
- CFG_CMD_PCMCIA * PCMCIA support
- CFG_CMD_PING * send ICMP ECHO_REQUEST to network host
- CFG_CMD_PORTIO * Port I/O
- CFG_CMD_REGINFO * Register dump
- CFG_CMD_RUN run command in env variable
- CFG_CMD_SAVES * save S record dump
- CFG_CMD_SCSI * SCSI Support
- CFG_CMD_SDRAM * print SDRAM configuration information
- (requires CFG_CMD_I2C)
- CFG_CMD_SETGETDCR Support for DCR Register access (4xx only)
- CFG_CMD_SPI * SPI serial bus support
- CFG_CMD_USB * USB support
- CFG_CMD_VFD * VFD support (TRAB)
- CFG_CMD_BSP * Board SPecific functions
- CFG_CMD_CDP * Cisco Discover Protocol support
- -----------------------------------------------
- CFG_CMD_ALL all
+ The default command configuration includes all commands
+ except those marked below with a "*".
- CONFIG_CMD_DFL Default configuration; at the moment
- this is includes all commands, except
- the ones marked with "*" in the list
- above.
+ CONFIG_CMD_ASKENV * ask for env variable
+ CONFIG_CMD_AUTOSCRIPT Autoscript Support
+ CONFIG_CMD_BDI bdinfo
+ CONFIG_CMD_BEDBUG * Include BedBug Debugger
+ CONFIG_CMD_BMP * BMP support
+ CONFIG_CMD_BSP * Board specific commands
+ CONFIG_CMD_BOOTD bootd
+ CONFIG_CMD_CACHE * icache, dcache
+ CONFIG_CMD_CONSOLE coninfo
+ CONFIG_CMD_DATE * support for RTC, date/time...
+ CONFIG_CMD_DHCP * DHCP support
+ CONFIG_CMD_DIAG * Diagnostics
+ CONFIG_CMD_DOC * Disk-On-Chip Support
+ CONFIG_CMD_DTT * Digital Therm and Thermostat
+ CONFIG_CMD_ECHO echo arguments
+ CONFIG_CMD_EEPROM * EEPROM read/write support
+ CONFIG_CMD_ELF * bootelf, bootvx
+ CONFIG_CMD_ENV saveenv
+ CONFIG_CMD_FDC * Floppy Disk Support
+ CONFIG_CMD_FAT * FAT partition support
+ CONFIG_CMD_FDOS * Dos diskette Support
+ CONFIG_CMD_FLASH flinfo, erase, protect
+ CONFIG_CMD_FPGA FPGA device initialization support
+ CONFIG_CMD_HWFLOW * RTS/CTS hw flow control
+ CONFIG_CMD_I2C * I2C serial bus support
+ CONFIG_CMD_IDE * IDE harddisk support
+ CONFIG_CMD_IMI iminfo
+ CONFIG_CMD_IMLS List all found images
+ CONFIG_CMD_IMMAP * IMMR dump support
+ CONFIG_CMD_IRQ * irqinfo
+ CONFIG_CMD_ITEST Integer/string test of 2 values
+ CONFIG_CMD_JFFS2 * JFFS2 Support
+ CONFIG_CMD_KGDB * kgdb
+ CONFIG_CMD_LOADB loadb
+ CONFIG_CMD_LOADS loads
+ CONFIG_CMD_MEMORY md, mm, nm, mw, cp, cmp, crc, base,
+ loop, loopw, mtest
+ CONFIG_CMD_MISC Misc functions like sleep etc
+ CONFIG_CMD_MMC * MMC memory mapped support
+ CONFIG_CMD_MII * MII utility commands
+ CONFIG_CMD_NAND * NAND support
+ CONFIG_CMD_NET bootp, tftpboot, rarpboot
+ CONFIG_CMD_PCI * pciinfo
+ CONFIG_CMD_PCMCIA * PCMCIA support
+ CONFIG_CMD_PING * send ICMP ECHO_REQUEST to network
+ host
+ CONFIG_CMD_PORTIO * Port I/O
+ CONFIG_CMD_REGINFO * Register dump
+ CONFIG_CMD_RUN run command in env variable
+ CONFIG_CMD_SAVES * save S record dump
+ CONFIG_CMD_SCSI * SCSI Support
+ CONFIG_CMD_SDRAM * print SDRAM configuration information
+ (requires CONFIG_CMD_I2C)
+ CONFIG_CMD_SETGETDCR Support for DCR Register access
+ (4xx only)
+ CONFIG_CMD_SPI * SPI serial bus support
+ CONFIG_CMD_USB * USB support
+ CONFIG_CMD_VFD * VFD support (TRAB)
+ CONFIG_CMD_BSP * Board SPecific functions
+ CONFIG_CMD_CDP * Cisco Discover Protocol support
+ CONFIG_CMD_FSL * Microblaze FSL support
- If you don't define CONFIG_COMMANDS it defaults to
- CONFIG_CMD_DFL in include/cmd_confdefs.h. A board can
- override the default settings in the respective
- include file.
EXAMPLE: If you want all functions except of network
support you can write:
- #define CONFIG_COMMANDS (CFG_CMD_ALL & ~CFG_CMD_NET)
+ #include "config_cmd_all.h"
+ #undef CONFIG_CMD_NET
Other Commands:
fdt (flattened device tree) command: CONFIG_OF_LIBFDT
Note: Don't enable the "icache" and "dcache" commands
- (configuration option CFG_CMD_CACHE) unless you know
+ (configuration option CONFIG_CMD_CACHE) unless you know
what you (and your U-Boot users) are doing. Data
cache cannot be enabled on systems like the 8xx or
8260 (where accesses to the IMMR region must be
@@ -768,7 +658,7 @@
- Real-Time Clock:
- When CFG_CMD_DATE is selected, the type of the RTC
+ When CONFIG_CMD_DATE is selected, the type of the RTC
has to be selected, too. Define exactly one of the
following options:
@@ -789,14 +679,14 @@
When CONFIG_TIMESTAMP is selected, the timestamp
(date and time) of an image is printed by image
commands like bootm or iminfo. This option is
- automatically enabled when you select CFG_CMD_DATE .
+ automatically enabled when you select CONFIG_CMD_DATE .
- Partition Support:
CONFIG_MAC_PARTITION and/or CONFIG_DOS_PARTITION
and/or CONFIG_ISO_PARTITION
- If IDE or SCSI support is enabled (CFG_CMD_IDE or
- CFG_CMD_SCSI) you must configure support for at least
+ If IDE or SCSI support is enabled (CONFIG_CMD_IDE or
+ CONFIG_CMD_SCSI) you must configure support for at least
one partition type as well.
- IDE Reset method:
@@ -899,6 +789,71 @@
CONFIG_USB_CONFIG
for differential drivers: 0x00001000
for single ended drivers: 0x00005000
+ CFG_USB_EVENT_POLL
+ May be defined to allow interrupt polling
+ instead of using asynchronous interrupts
+
+- USB Device:
+ Define the below if you wish to use the USB console.
+ Once firmware is rebuilt from a serial console issue the
+ command "setenv stdin usbtty; setenv stdout usbtty" and
+ attach your usb cable. The Unix command "dmesg" should print
+ it has found a new device. The environment variable usbtty
+ can be set to gserial or cdc_acm to enable your device to
+ appear to a USB host as a Linux gserial device or a
+ Common Device Class Abstract Control Model serial device.
+ If you select usbtty = gserial you should be able to enumerate
+ a Linux host by
+ # modprobe usbserial vendor=0xVendorID product=0xProductID
+ else if using cdc_acm, simply setting the environment
+ variable usbtty to be cdc_acm should suffice. The following
+ might be defined in YourBoardName.h
+
+ CONFIG_USB_DEVICE
+ Define this to build a UDC device
+
+ CONFIG_USB_TTY
+ Define this to have a tty type of device available to
+ talk to the UDC device
+
+ CFG_CONSOLE_IS_IN_ENV
+ Define this if you want stdin, stdout &/or stderr to
+ be set to usbtty.
+
+ mpc8xx:
+ CFG_USB_EXTC_CLK 0xBLAH
+ Derive USB clock from external clock "blah"
+ - CFG_USB_EXTC_CLK 0x02
+
+ CFG_USB_BRG_CLK 0xBLAH
+ Derive USB clock from brgclk
+ - CFG_USB_BRG_CLK 0x04
+
+ If you have a USB-IF assigned VendorID then you may wish to
+ define your own vendor specific values either in BoardName.h
+ or directly in usbd_vendor_info.h. If you don't define
+ CONFIG_USBD_MANUFACTURER, CONFIG_USBD_PRODUCT_NAME,
+ CONFIG_USBD_VENDORID and CONFIG_USBD_PRODUCTID, then U-Boot
+ should pretend to be a Linux device to it's target host.
+
+ CONFIG_USBD_MANUFACTURER
+ Define this string as the name of your company for
+ - CONFIG_USBD_MANUFACTURER "my company"
+
+ CONFIG_USBD_PRODUCT_NAME
+ Define this string as the name of your product
+ - CONFIG_USBD_PRODUCT_NAME "acme usb device"
+
+ CONFIG_USBD_VENDORID
+ Define this as your assigned Vendor ID from the USB
+ Implementors Forum. This *must* be a genuine Vendor ID
+ to avoid polluting the USB namespace.
+ - CONFIG_USBD_VENDORID 0xFFFF
+
+ CONFIG_USBD_PRODUCTID
+ Define this as the unique Product ID
+ for your device
+ - CONFIG_USBD_PRODUCTID 0xFFFF
- MMC Support:
@@ -906,8 +861,8 @@
enable this define CONFIG_MMC. The MMC can be
accessed from the boot prompt by mapping the device
to physical memory similar to flash. Command line is
- enabled with CFG_CMD_MMC. The MMC driver also works with
- the FAT fs. This is enabled with CFG_CMD_FAT.
+ enabled with CONFIG_CMD_MMC. The MMC driver also works with
+ the FAT fs. This is enabled with CONFIG_CMD_FAT.
- Journaling Flash filesystem support:
CONFIG_JFFS2_NAND, CONFIG_JFFS2_NAND_OFF, CONFIG_JFFS2_NAND_SIZE,
@@ -1111,6 +1066,16 @@
Defines a default value for theIP address of a TFTP
server to contact when using the "tftboot" command.
+- Multicast TFTP Mode:
+ CONFIG_MCAST_TFTP
+
+ Defines whether you want to support multicast TFTP as per
+ rfc-2090; for example to work with atftp. Lets lots of targets
+ tftp down the same boot image concurrently. Note: the ethernet
+ driver in use must provide a function: mcast() to join/leave a
+ multicast group.
+
+ CONFIG_BOOTP_RANDOM_DELAY
- BOOTP Recovery Mode:
CONFIG_BOOTP_RANDOM_DELAY
@@ -1122,7 +1087,7 @@
boot, thus flooding the BOOTP server. Defining
CONFIG_BOOTP_RANDOM_DELAY causes a random delay to be
inserted before sending out BOOTP requests. The
- following delays are insterted then:
+ following delays are inserted then:
1st BOOTP request: delay 0 ... 1 sec
2nd BOOTP request: delay 0 ... 2 sec
@@ -1131,10 +1096,24 @@
BOOTP requests: delay 0 ... 8 sec
- DHCP Advanced Options:
- CONFIG_BOOTP_MASK
+ You can fine tune the DHCP functionality by defining
+ CONFIG_BOOTP_* symbols:
- You can fine tune the DHCP functionality by adding
- these flags to the CONFIG_BOOTP_MASK define:
+ CONFIG_BOOTP_SUBNETMASK
+ CONFIG_BOOTP_GATEWAY
+ CONFIG_BOOTP_HOSTNAME
+ CONFIG_BOOTP_NISDOMAIN
+ CONFIG_BOOTP_BOOTPATH
+ CONFIG_BOOTP_BOOTFILESIZE
+ CONFIG_BOOTP_DNS
+ CONFIG_BOOTP_DNS2
+ CONFIG_BOOTP_SEND_HOSTNAME
+ CONFIG_BOOTP_NTPSERVER
+ CONFIG_BOOTP_TIMEOFFSET
+ CONFIG_BOOTP_VENDOREX
+
+ CONFIG_BOOTP_SERVERIP - TFTP server will be the serverip
+ environment variable, not the BOOTP server.
CONFIG_BOOTP_DNS2 - If a DHCP client requests the DNS
serverip from a DHCP server, it is possible that more
@@ -1143,15 +1122,14 @@
serverip will be stored in the additional environment
variable "dnsip2". The first DNS serverip is always
stored in the variable "dnsip", when CONFIG_BOOTP_DNS
- is added to the CONFIG_BOOTP_MASK.
+ is defined.
CONFIG_BOOTP_SEND_HOSTNAME - Some DHCP servers are capable
to do a dynamic update of a DNS server. To do this, they
need the hostname of the DHCP requester.
- If CONFIG_BOOP_SEND_HOSTNAME is added to the
- CONFIG_BOOTP_MASK, the content of the "hostname"
- environment variable is passed as option 12 to
- the DHCP server.
+ If CONFIG_BOOTP_SEND_HOSTNAME is defined, the content
+ of the "hostname" environment variable is passed as
+ option 12 to the DHCP server.
- CDP Options:
CONFIG_CDP_DEVICE_ID
@@ -1219,7 +1197,7 @@
include the appropriate I2C driver for the selected cpu.
This will allow you to use i2c commands at the u-boot
- command line (as long as you set CFG_CMD_I2C in
+ command line (as long as you set CONFIG_CMD_I2C in
CONFIG_COMMANDS) and communicate with i2c based realtime
clock chips. See common/cmd_i2c.c for a description of the
command line interface.
@@ -1698,28 +1676,69 @@
-31 post/post.c POST test failed, detected by post_output_backlog()
-32 post/post.c POST test failed, detected by post_run_single()
- -1 common/cmd_doc.c Bad usage of "doc" command
- -1 common/cmd_doc.c No boot device
- -1 common/cmd_doc.c Unknown Chip ID on boot device
- -1 common/cmd_doc.c Read Error on boot device
- -1 common/cmd_doc.c Image header has bad magic number
+ 34 common/cmd_doc.c before loading a Image from a DOC device
+ -35 common/cmd_doc.c Bad usage of "doc" command
+ 35 common/cmd_doc.c correct usage of "doc" command
+ -36 common/cmd_doc.c No boot device
+ 36 common/cmd_doc.c correct boot device
+ -37 common/cmd_doc.c Unknown Chip ID on boot device
+ 37 common/cmd_doc.c correct chip ID found, device available
+ -38 common/cmd_doc.c Read Error on boot device
+ 38 common/cmd_doc.c reading Image header from DOC device OK
+ -39 common/cmd_doc.c Image header has bad magic number
+ 39 common/cmd_doc.c Image header has correct magic number
+ -40 common/cmd_doc.c Error reading Image from DOC device
+ 40 common/cmd_doc.c Image header has correct magic number
+ 41 common/cmd_ide.c before loading a Image from a IDE device
+ -42 common/cmd_ide.c Bad usage of "ide" command
+ 42 common/cmd_ide.c correct usage of "ide" command
+ -43 common/cmd_ide.c No boot device
+ 43 common/cmd_ide.c boot device found
+ -44 common/cmd_ide.c Device not available
+ 44 common/cmd_ide.c Device available
+ -45 common/cmd_ide.c wrong partition selected
+ 45 common/cmd_ide.c partition selected
+ -46 common/cmd_ide.c Unknown partition table
+ 46 common/cmd_ide.c valid partition table found
+ -47 common/cmd_ide.c Invalid partition type
+ 47 common/cmd_ide.c correct partition type
+ -48 common/cmd_ide.c Error reading Image Header on boot device
+ 48 common/cmd_ide.c reading Image Header from IDE device OK
+ -49 common/cmd_ide.c Image header has bad magic number
+ 49 common/cmd_ide.c Image header has correct magic number
+ -50 common/cmd_ide.c Image header has bad checksum
+ 50 common/cmd_ide.c Image header has correct checksum
+ -51 common/cmd_ide.c Error reading Image from IDE device
+ 51 common/cmd_ide.c reading Image from IDE device OK
+ 52 common/cmd_nand.c before loading a Image from a NAND device
+ -53 common/cmd_nand.c Bad usage of "nand" command
+ 53 common/cmd_nand.c correct usage of "nand" command
+ -54 common/cmd_nand.c No boot device
+ 54 common/cmd_nand.c boot device found
+ -55 common/cmd_nand.c Unknown Chip ID on boot device
+ 55 common/cmd_nand.c correct chip ID found, device available
+ -56 common/cmd_nand.c Error reading Image Header on boot device
+ 56 common/cmd_nand.c reading Image Header from NAND device OK
+ -57 common/cmd_nand.c Image header has bad magic number
+ 57 common/cmd_nand.c Image header has correct magic number
+ -58 common/cmd_nand.c Error reading Image from NAND device
+ 58 common/cmd_nand.c reading Image from NAND device OK
- -1 common/cmd_ide.c Bad usage of "ide" command
- -1 common/cmd_ide.c No boot device
- -1 common/cmd_ide.c Unknown boot device
- -1 common/cmd_ide.c Unknown partition table
- -1 common/cmd_ide.c Invalid partition type
- -1 common/cmd_ide.c Read Error on boot device
- -1 common/cmd_ide.c Image header has bad magic number
+ -60 common/env_common.c Environment has a bad CRC, using default
- -1 common/cmd_nand.c Bad usage of "nand" command
- -1 common/cmd_nand.c No boot device
- -1 common/cmd_nand.c Unknown Chip ID on boot device
- -1 common/cmd_nand.c Read Error on boot device
- -1 common/cmd_nand.c Image header has bad magic number
+ 64 net/eth.c starting with Ethernetconfiguration.
+ -64 net/eth.c no Ethernet found.
+ 65 net/eth.c Ethernet found.
- -1 common/env_common.c Environment has a bad CRC, using default
-
+ -80 common/cmd_net.c usage wrong
+ 80 common/cmd_net.c before calling NetLoop()
+ -81 common/cmd_net.c some error in NetLoop() occured
+ 81 common/cmd_net.c NetLoop() back without error
+ -82 common/cmd_net.c size == 0 (File with size 0 loaded)
+ 82 common/cmd_net.c trying automatic boot
+ 83 common/cmd_net.c running autoscript
+ -83 common/cmd_net.c some error in automatic boot or autoscript
+ 84 common/cmd_net.c end without errors
Modem Support:
--------------
@@ -2327,7 +2346,7 @@
- CONFIG_LOOPW
Add the "loopw" memory command. This only takes effect if
- the memory commands are activated globally (CFG_CMD_MEM).
+ the memory commands are activated globally (CONFIG_CMD_MEM).
- CONFIG_MX_CYCLIC
Add the "mdc" and "mwc" memory commands. These are cyclic
@@ -2341,7 +2360,7 @@
This command will write 12345678 to address 100 all 10 ms.
This only takes effect if the memory commands are activated
- globally (CFG_CMD_MEM).
+ globally (CONFIG_CMD_MEM).
- CONFIG_SKIP_LOWLEVEL_INIT
- CONFIG_SKIP_RELOCATE_UBOOT
@@ -2381,34 +2400,7 @@
make NAME_config
where "NAME_config" is the name of one of the existing
-configurations; the following names are supported:
-
- ADCIOP_config FPS860L_config omap730p2_config
- ADS860_config GEN860T_config pcu_e_config
- Alaska8220_config
- AR405_config GENIETV_config PIP405_config
- at91rm9200dk_config GTH_config QS823_config
- CANBT_config hermes_config QS850_config
- cmi_mpc5xx_config hymod_config QS860T_config
- cogent_common_config IP860_config RPXlite_config
- cogent_mpc8260_config IVML24_config RPXlite_DW_config
- cogent_mpc8xx_config IVMS8_config RPXsuper_config
- CPCI405_config JSE_config rsdproto_config
- CPCIISER4_config LANTEC_config Sandpoint8240_config
- csb272_config lwmon_config sbc8260_config
- CU824_config MBX860T_config sbc8560_33_config
- DUET_ADS_config MBX_config sbc8560_66_config
- EBONY_config mpc7448hpc2_config SM850_config
- ELPT860_config MPC8260ADS_config SPD823TS_config
- ESTEEM192E_config MPC8540ADS_config stxgp3_config
- ETX094_config MPC8540EVAL_config SXNI855T_config
- FADS823_config NMPC8560ADS_config TQM823L_config
- FADS850SAR_config NETVIA_config TQM850L_config
- FADS860T_config omap1510inn_config TQM855L_config
- FPS850L_config omap1610h2_config TQM860L_config
- omap1610inn_config walnut_config
- omap5912osk_config Yukon8220_config
- omap2420h4_config ZPC1900_config
+configurations; see the main Makefile for supported names.
Note: for some board special configuration names may exist; check if
additional information is available from the board vendor; for
diff --git a/board/BuS/EB+MCF-EV123/Makefile b/board/BuS/EB+MCF-EV123/Makefile
index ed3ac07..ceeffa7 100644
--- a/board/BuS/EB+MCF-EV123/Makefile
+++ b/board/BuS/EB+MCF-EV123/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o cfm_flash.o flash.o VCxK.o
+COBJS = $(BOARD).o cfm_flash.o flash.o VCxK.o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/BuS/EB+MCF-EV123/mii.c b/board/BuS/EB+MCF-EV123/mii.c
new file mode 100644
index 0000000..ebd3ed9
--- /dev/null
+++ b/board/BuS/EB+MCF-EV123/mii.c
@@ -0,0 +1,304 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ if (setclear) {
+ MCFGPIO_PASPAR |= 0x0F00;
+ MCFGPIO_PEHLPAR = CFG_PEHLPAR;
+ } else {
+ MCFGPIO_PASPAR &= 0xF0FF;
+ MCFGPIO_PEHLPAR &= ~CFG_PEHLPAR;
+ }
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_AMD79C874VC 0x0022561B /* AMD 79C874 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_AMD79C874VC "AMD79C874VC"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ strcpy(info->phy_name,
+ STR_ID_AMD79C874VC);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ printf(STR_ID_AMD79C874VC);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+int mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
index 40f41c7..b472176 100644
--- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
+++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c
@@ -30,49 +30,49 @@
#include "memio.h"
#include "via686.h"
-__asm(" .globl send_kb \n
- send_kb: \n
- lis r9, 0xfe00 \n
- \n
- li r4, 0x10 # retries \n
- mtctr r4 \n
- \n
- idle: \n
- lbz r4, 0x64(r9) \n
- andi. r4, r4, 0x02 \n
- bne idle \n
- \n
- ready: \n
- stb r3, 0x60(r9) \n
- \n
- check: \n
- lbz r4, 0x64(r9) \n
- andi. r4, r4, 0x01 \n
- beq check \n
- \n
- lbz r4, 0x60(r9) \n
- cmpwi r4, 0xfa \n
- beq done \n
- \n
- bdnz idle \n
- \n
- li r3, 0 \n
- blr \n
- \n
- done: \n
- li r3, 1 \n
- blr \n
- \n
- .globl test_kb \n
- test_kb: \n
- mflr r10 \n
- li r3, 0xed \n
- bl send_kb \n
- li r3, 0x01 \n
- bl send_kb \n
- mtlr r10 \n
- blr \n
-");
+__asm__(" .globl send_kb \n "
+ "send_kb: \n "
+ " lis r9, 0xfe00 \n "
+ " \n "
+ " li r4, 0x10 # retries \n "
+ " mtctr r4 \n "
+ " \n "
+ "idle: \n "
+ " lbz r4, 0x64(r9) \n "
+ " andi. r4, r4, 0x02 \n "
+ " bne idle \n "
+
+ "ready: \n "
+ " stb r3, 0x60(r9) \n "
+ " \n "
+ "check: \n "
+ " lbz r4, 0x64(r9) \n "
+ " andi. r4, r4, 0x01 \n "
+ " beq check \n "
+ " \n "
+ " lbz r4, 0x60(r9) \n "
+ " cmpwi r4, 0xfa \n "
+ " beq done \n "
+
+ " bdnz idle \n "
+
+ " li r3, 0 \n "
+ " blr \n "
+
+ "done: \n "
+ " li r3, 1 \n "
+ " blr \n "
+
+ ".globl test_kb \n "
+ "test_kb: \n "
+ " mflr r10 \n "
+ " li r3, 0xed \n "
+ " bl send_kb \n "
+ " li r3, 0x01 \n "
+ " bl send_kb \n "
+ " mtlr r10 \n "
+ " blr "
+);
int checkboard (void)
diff --git a/board/MAI/AmigaOneG3SE/cmd_boota.c b/board/MAI/AmigaOneG3SE/cmd_boota.c
index 143bba2..40c951d 100644
--- a/board/MAI/AmigaOneG3SE/cmd_boota.c
+++ b/board/MAI/AmigaOneG3SE/cmd_boota.c
@@ -119,7 +119,7 @@
return 0;
}
-#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_AMIGAONEG3SE) && defined(CONFIG_CMD_BSP)
U_BOOT_CMD(
boota, 3, 1, do_boota,
"boota - boot an Amiga kernel\n",
diff --git a/board/MAI/AmigaOneG3SE/video.c b/board/MAI/AmigaOneG3SE/video.c
index f6327f7..fc27c68 100644
--- a/board/MAI/AmigaOneG3SE/video.c
+++ b/board/MAI/AmigaOneG3SE/video.c
@@ -56,6 +56,7 @@
int video_cols(void);
char *prompt_string = "=>";
+unsigned char video_get_attr(void);
void video_set_color(unsigned char attr)
{
diff --git a/board/MAI/bios_emulator/bios.c b/board/MAI/bios_emulator/bios.c
deleted file mode 100644
index d51eb64..0000000
--- a/board/MAI/bios_emulator/bios.c
+++ /dev/null
@@ -1,335 +0,0 @@
-/*
- * Mostly done after the Scitech Bios emulation
- * Written by Hans-Jörg Frieden
- * Hyperion Entertainment
- */
-#include "x86emu.h"
-#include "glue.h"
-
-#undef DEBUG
-#ifdef DEBUG
-#define PRINTF(fmt, args...) printf(fmt, ## args)
-#else
-#define PRINTF(fmt, args...)
-#endif
-
-#define BIOS_SEG 0xFFF0
-#define PCIBIOS_SUCCESSFUL 0
-#define PCIBIOS_DEVICE_NOT_FOUND 0x86
-
-typedef unsigned char UBYTE;
-typedef unsigned short UWORD;
-typedef unsigned long ULONG;
-
-typedef char BYTE;
-typedef short WORT;
-typedef long LONG;
-
-static inline UBYTE read_byte(volatile UBYTE* from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UBYTE)x;
-}
-
-static inline void write_byte(volatile UBYTE *to, int x)
-{
- asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline UWORD read_word_little(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m" (*from));
- return (UWORD)x;
-}
-
-static inline UWORD read_word_big(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UWORD)x;
-}
-
-static inline void write_word_little(volatile UWORD *to, int x)
-{
- asm volatile ("sthbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_word_big(volatile UWORD *to, int x)
-{
- asm volatile ("sth %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline ULONG read_long_little(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m"(*from));
- return (ULONG)x;
-}
-
-static inline ULONG read_long_big(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (ULONG)x;
-}
-
-static inline void write_long_little(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stwbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_long_big(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stw %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-#define port_to_mem(from) (0xFE000000|(from))
-#define in_byte(from) read_byte( (UBYTE *)port_to_mem(from))
-#define in_word(from) read_word_little((UWORD *)port_to_mem(from))
-#define in_long(from) read_long_little((ULONG *)port_to_mem(from))
-#define out_byte(to, val) write_byte((UBYTE *)port_to_mem(to), val)
-#define out_word(to, val) write_word_little((UWORD *)port_to_mem(to), val)
-#define out_long(to, val) write_long_little((ULONG *)port_to_mem(to), val)
-
-static void X86API undefined_intr(int intno)
-{
- extern u16 A1_rdw(u32 addr);
- if (A1_rdw(intno * 4 + 2) == BIOS_SEG)
- {
- PRINTF("Undefined interrupt %xh called AX = %xh, BX = %xh, CX = %xh, DX = %xh\n",
- intno, M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
- X86EMU_halt_sys();
- }
- else
- {
- PRINTF("Calling interrupt %xh, AL=%xh, AH=%xh\n", intno, M.x86.R_AL, M.x86.R_AH);
- X86EMU_prepareForInt(intno);
- }
-}
-
-static void X86API int42(int intno);
-static void X86API int15(int intno);
-
-static void X86API int10(int intno)
-{
- if (A1_rdw(intno*4+2) == BIOS_SEG)
- int42(intno);
- else
- {
- PRINTF("int10: branching to %04X:%04X, AL=%xh, AH=%xh\n", A1_rdw(intno*4+2), A1_rdw(intno*4),
- M.x86.R_AL, M.x86.R_AH);
- X86EMU_prepareForInt(intno);
- }
-}
-
-static void X86API int1A(int intno)
-{
- int device;
-
- switch(M.x86.R_AX)
- {
- case 0xB101: /* PCI Bios Present? */
- M.x86.R_AL = 0x00;
- M.x86.R_EDX = 0x20494350;
- M.x86.R_BX = 0x0210;
- M.x86.R_CL = 3;
- CLEAR_FLAG(F_CF);
- break;
- case 0xB102: /* Find device */
- device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI);
- if (device != -1)
- {
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- M.x86.R_BH = mypci_bus(device);
- M.x86.R_BL = mypci_devfn(device);
- }
- else
- {
- M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- break;
- case 0xB103: /* Find PCI class code */
- M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND;
- /*printf("Find by class not yet implmented"); */
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- break;
- case 0xB108: /* read config byte */
- M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CL); */
- break;
- case 0xB109: /* read config word */
- M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CX); */
- break;
- case 0xB10A: /* read config dword */
- M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_ECX); */
- break;
- case 0xB10B: /* write config byte */
- mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CL); */
- break;
- case 0xB10C: /* write config word */
- mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_CX); */
- break;
- case 0xB10D: /* write config dword */
- mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX);
- M.x86.R_AH = PCIBIOS_SUCCESSFUL;
- CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF);
- /*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */
- /* M.x86.R_ECX); */
- break;
- default:
- PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX);
-
- }
-}
-
-void bios_init(void)
-{
- int i;
- X86EMU_intrFuncs bios_intr_tab[256];
-
- for (i=0; i<256; i++)
- {
- write_long_little(M.mem_base+i*4, BIOS_SEG<<16);
- bios_intr_tab[i] = undefined_intr;
- }
-
- bios_intr_tab[0x10] = int10;
- bios_intr_tab[0x1A] = int1A;
- bios_intr_tab[0x42] = int42;
- bios_intr_tab[0x15] = int15;
-
- bios_intr_tab[0x6D] = int42;
-
- X86EMU_setupIntrFuncs(bios_intr_tab);
- video_init();
-}
-
-unsigned char setup_40x25[] =
-{
- 0x38, 0x28, 0x2d, 0x0a, 0x1f, 6, 0x19,
- 0x1c, 2, 7, 6, 7, 0, 0, 0, 0
-};
-
-unsigned char setup_80x25[] =
-{
- 0x71, 0x50, 0x5a, 0x0a, 0x1f, 6, 0x19,
- 0x1c, 2, 7, 6, 7, 0, 0, 0, 0
-};
-
-unsigned char setup_graphics[] =
-{
- 0x38, 0x28, 0x20, 0x0a, 0x7f, 6, 0x64,
- 0x70, 2, 1, 6, 7, 0, 0, 0, 0
-};
-
-unsigned char setup_bw[] =
-{
- 0x61, 0x50, 0x52, 0x0f, 0x19, 6, 0x19,
- 0x19, 2, 0x0d, 0x0b, 0x0c, 0, 0, 0, 0
-};
-
-unsigned char * setup_modes[] =
-{
- setup_40x25, /* mode 0: 40x25 bw text */
- setup_40x25, /* mode 1: 40x25 col text */
- setup_80x25, /* mode 2: 80x25 bw text */
- setup_80x25, /* mode 3: 80x25 col text */
- setup_graphics, /* mode 4: 320x200 col graphics */
- setup_graphics, /* mode 5: 320x200 bw graphics */
- setup_graphics, /* mode 6: 640x200 bw graphics */
- setup_bw /* mode 7: 80x25 mono text */
-};
-
-unsigned int setup_cols[] =
-{
- 40, 40, 80, 80, 40, 40, 80, 80
-};
-
-unsigned char setup_modesets[] =
-{
- 0x2C, 0x28, 0x2D, 0x29, 0x2A, 0x2E, 0x1E, 0x29
-};
-
-unsigned int setup_bufsize[] =
-{
- 2048, 2048, 4096, 2096, 16384, 16384, 16384, 4096
-};
-
-void bios_set_mode(int mode)
-{
- int i;
- unsigned char mode_set = setup_modesets[mode]; /* Control register value */
- unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */
-
- /* Switch video off */
- out_byte(0x3D8, mode_set & 0x37);
-
- /* Set up parameters at 3D4h */
- for (i=0; i<16; i++)
- {
- out_byte(0x3D4, (unsigned char)i);
- out_byte(0x3D5, *setup_regs);
- setup_regs++;
- }
-
- /* Enable video */
- out_byte(0x3D8, mode_set);
-
- /* Set overscan */
- if (mode == 6) out_byte(0x3D9, 0x3F);
- else out_byte(0x3D9, 0x30);
-}
-
-static void bios_print_string(void)
-{
- extern void video_bios_print_string(char *string, int x, int y, int attr, int count);
- char *s = (char *)(M.x86.R_ES<<4) + M.x86.R_BP;
- int attr;
- if (M.x86.R_AL & 0x02) attr = - 1;
- else attr = M.x86.R_BL;
- video_bios_print_string(s, M.x86.R_DH, M.x86.R_DL, attr, M.x86.R_CX);
-}
-
-static void X86API int42(int intno)
-{
- switch (M.x86.R_AH)
- {
- case 0x00:
- bios_set_mode(M.x86.R_AL);
- break;
- case 0x13:
- bios_print_string();
- break;
- default:
- PRINTF("Warning: VIDEO BIOS interrupt %xh unimplemented function %xh, AL = %xh\n",
- intno, M.x86.R_AH, M.x86.R_AL);
- }
-}
-
-static void X86API int15(int intno)
-{
- PRINTF("Called interrupt 15h: AX = %xh, BX = %xh, CX = %xh, DX = %xh\n",
- M.x86.R_AX, M.x86.R_BX, M.x86.R_CX, M.x86.R_DX);
-}
diff --git a/board/MAI/bios_emulator/glue.c b/board/MAI/bios_emulator/glue.c
deleted file mode 100644
index b380f0d..0000000
--- a/board/MAI/bios_emulator/glue.c
+++ /dev/null
@@ -1,515 +0,0 @@
-#include <common.h>
-#include <pci.h>
-#include <74xx_7xx.h>
-
-
-#ifdef DEBUG
-#undef DEBUG
-#endif
-
-#ifdef DEBUG
-#define PRINTF(format, args...) _printf(format , ## args)
-#else
-#define PRINTF(format, argc...)
-#endif
-
-static pci_dev_t to_pci(int bus, int devfn)
-{
- return PCI_BDF(bus, (devfn>>3), devfn&3);
-}
-
-int mypci_find_device(int vendor, int product, int index)
-{
- return pci_find_device(vendor, product, index);
-}
-
-int mypci_bus(int device)
-{
- return PCI_BUS(device);
-}
-
-int mypci_devfn(int device)
-{
- return (PCI_DEV(device)<<3) | PCI_FUNC(device);
-}
-
-
-#define mypci_read_func(type, size) \
-type mypci_read_cfg_##size##(int bus, int devfn, int offset) \
-{ \
- type c; \
- pci_read_config_##size##(to_pci(bus, devfn), offset, &c); \
- return c; \
-}
-
-#define mypci_write_func(type, size) \
-void mypci_write_cfg_##size##(int bus, int devfn, int offset, int value) \
-{ \
- pci_write_config_##size##(to_pci(bus, devfn), offset, value); \
-}
-
-mypci_read_func(u8,byte);
-mypci_read_func(u16,word);
-
-mypci_write_func(u8,byte);
-mypci_write_func(u16,word);
-
-u32 mypci_read_cfg_long(int bus, int devfn, int offset)
-{
- u32 c;
- pci_read_config_dword(to_pci(bus, devfn), offset, &c);
- return c;
-}
-
-void mypci_write_cfg_long(int bus, int devfn, int offset, int value)
-{
- pci_write_config_dword(to_pci(bus, devfn), offset, value);
-}
-
-void _printf(const char *fmt, ...)
-{
- va_list args;
- char buf[CFG_PBSIZE];
-
- va_start(args, fmt);
- (void)vsprintf(buf, fmt, args);
- va_end(args);
-
- printf(buf);
-}
-
-char *_getenv(char *name)
-{
- return getenv(name);
-}
-
-unsigned long get_bar_size(pci_dev_t dev, int offset)
-{
- u32 bar_back, bar_value;
-
- /* Save old BAR value */
- pci_read_config_dword(dev, offset, &bar_back);
-
- /* Write all 1's. */
- pci_write_config_dword(dev, offset, ~0);
-
- /* Now read back the relevant bits */
- pci_read_config_dword(dev, offset, &bar_value);
-
- /* Restore original value */
- pci_write_config_dword(dev, offset, bar_back);
-
- if (bar_value == 0) return 0xFFFFFFFF; /* This BAR is disabled */
-
- if ((bar_value & PCI_BASE_ADDRESS_SPACE) == PCI_BASE_ADDRESS_SPACE_MEMORY)
- {
- /* This is a memory space BAR. Mask it out so we get the size of it */
- return ~(bar_value & PCI_BASE_ADDRESS_MEM_MASK) + 1;
- }
-
- /* Not suitable */
- return 0xFFFFFFFF;
-}
-
-void enable_compatibility_hole(void)
-{
- u8 cfg;
- pci_dev_t art = PCI_BDF(0,0,0);
-
- pci_read_config_byte(art, 0x54, &cfg);
- /* cfg |= 0x08; */
- cfg |= 0x20;
- pci_write_config_byte(art, 0x54, cfg);
-}
-
-void disable_compatibility_hole(void)
-{
- u8 cfg;
- pci_dev_t art = PCI_BDF(0,0,0);
-
- pci_read_config_byte(art, 0x54, &cfg);
- /* cfg &= ~0x08; */
- cfg &= ~0x20;
- pci_write_config_byte(art, 0x54, cfg);
-}
-
-void map_rom(pci_dev_t dev, u32 address)
-{
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, address|PCI_ROM_ADDRESS_ENABLE);
-}
-
-void unmap_rom(pci_dev_t dev)
-{
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
-}
-
-void bat_map(u8 batnum, u32 address, u32 length)
-{
- u32 temp = address;
- address &= 0xFFFE0000;
- temp &= 0x0001FFFF;
- length = (length - 1 ) >> 17;
- length <<= 2;
-
- switch (batnum)
- {
- case 0:
- __asm volatile ("mtdbatu 0, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 0, %0" : : "r" (address | 0x22));
- break;
- case 1:
- __asm volatile ("mtdbatu 1, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 1, %0" : : "r" (address | 0x22));
- break;
- case 2:
- __asm volatile ("mtdbatu 2, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 2, %0" : : "r" (address | 0x22));
- break;
- case 3:
- __asm volatile ("mtdbatu 3, %0" : : "r" (address | length | 3));
- __asm volatile ("mtdbatl 3, %0" : : "r" (address | 0x22));
- break;
- }
-}
-
-int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size);
-
-int attempt_map_rom(pci_dev_t dev, void *copy_address)
-{
- u32 rom_size = 0;
- u32 rom_address = 0;
- u32 bar_size = 0;
- u32 bar_backup = 0;
- int i,j;
- void *image = 0;
- u32 image_size = 0;
- int did_correct = 0;
- u32 prefetch_addr = 0;
- u32 prefetch_size = 0;
- u32 prefetch_idx = 0;
-
- /* Get the size of the expansion rom */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0xFFFFFFFF);
- pci_read_config_dword(dev, PCI_ROM_ADDRESS, &rom_size);
- if ((rom_size & 0x01) == 0)
- {
- PRINTF("No ROM\n");
- return 0;
- }
-
- rom_size &= 0xFFFFF800;
- rom_size = (~rom_size)+1;
-
- PRINTF("ROM Size is %dK\n", rom_size/1024);
-
- /*
- * Try to find a place for the ROM. We always attempt to use
- * one of the card's bases for this, as this will be in any
- * bridge's resource range as well as being free of conflicts
- * with other cards. In a graphics card it is very unlikely
- * that there won't be any base address that is large enough to
- * hold the rom.
- *
- * FIXME: To work around this, theoretically the largest base
- * could be used if none is found in the loop below.
- */
-
- for (i = PCI_BASE_ADDRESS_0; i <= PCI_BASE_ADDRESS_5; i += 4)
- {
- bar_size = get_bar_size(dev, i);
- PRINTF("PCI_BASE_ADDRESS_%d is %dK large\n",
- (i - PCI_BASE_ADDRESS_0)/4,
- bar_size/1024);
- if (bar_size != 0xFFFFFFFF && bar_size >= rom_size)
- {
- PRINTF("Found a match for rom size\n");
- pci_read_config_dword(dev, i, &rom_address);
- rom_address &= 0xFFFFFFF0;
- if (rom_address != 0 && rom_address != 0xFFFFFFF0) break;
- }
- }
-
- if (rom_address == 0 || rom_address == 0xFFFFFFF0)
- {
- PRINTF("No suitable rom address found\n");
- return 0;
- }
-
- /* Disable the BAR */
- pci_read_config_dword(dev, i, &bar_backup);
- pci_write_config_dword(dev, i, 0);
-
- /* Map ROM */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, rom_address | PCI_ROM_ADDRESS_ENABLE);
-
- /* Copy the rom to a place in the emulator space */
- PRINTF("Claiming BAT 2\n");
- bat_map(2, rom_address, rom_size);
- /* show_bat_mapping(); */
-
- if (0 == find_image(rom_address, rom_size, &image, &image_size))
- {
- PRINTF("No x86 BIOS image found\n");
- return 0;
- }
-
- PRINTF("Copying %ld bytes from 0x%lx to 0x%lx\n", (long)image_size, (long)image, (long)copy_address);
-
- /* memcpy(copy_address, rom_address, rom_size); */
- {
- unsigned char *from = (unsigned char *)image; /* rom_address; */
- unsigned char *to = (unsigned char *)copy_address;
- for (j=0; j<image_size /*rom_size*/; j++)
- {
- *to++ = *from++;
- }
- }
-
- PRINTF("Copy is done\n");
-
- /* Unmap the ROM and restore the BAR */
- pci_write_config_dword(dev, PCI_ROM_ADDRESS, 0);
- pci_write_config_dword(dev, i, bar_backup);
-
- /* FIXME: Shouldn't be needed anymore*/
- /* bat_map(2, 0x80000000, 256*1024*1024);
- show_bat_mapping(); */
-
- /*
- * Since most cards can probably only do 16 bit IO addressing, we
- * correct their IO base into an appropriate value.
- * This should do for most.
- */
- for (i = PCI_BASE_ADDRESS_0; i <= PCI_BASE_ADDRESS_5; i += 4)
- {
- unsigned long value;
- pci_read_config_dword(dev, i, &value);
- if (value & 0x01) /* IO */
- {
- did_correct = 1;
- pci_write_config_dword(dev, i, 0x1001);
- break;
- }
-
- if (value & PCI_BASE_ADDRESS_MEM_PREFETCH)
- {
- prefetch_idx = i;
- prefetch_addr = value & PCI_BASE_ADDRESS_MEM_MASK;
- prefetch_size = get_bar_size(dev, i);
- }
- }
-
- if (1) /* did_correct) */
- {
- extern pci_dev_t pci_find_bridge_for_bus(struct pci_controller *hose, int busnr);
- int busnr = PCI_BUS(dev);
- if (busnr)
- {
- pci_dev_t bridge;
- PRINTF("Need to correct bridge device for IO range change\n");
- bridge = pci_find_bridge_for_bus(NULL, busnr);
- if (bridge == PCI_ANY_ID)
- {
- PRINTF("Didn't find bridge. Hope that's OK\n");
- }
- else
- {
- /*
- * Set upper I/O base/limit to 0
- */
- pci_write_config_byte(bridge, 0x30, 0x00);
- pci_write_config_byte(bridge, 0x31, 0x00);
- pci_write_config_byte(bridge, 0x32, 0x00);
- pci_write_config_byte(bridge, 0x33, 0x00);
- if (did_correct)
- {
- /*
- * set lower I/O base to 1000
- * That is, bits 0:3 are set to 0001 by default.
- * bits 7:4 contain I/O address bits 15:12
- * all others are assumed 0.
- */
- pci_write_config_byte(bridge, 0x1C, 0x11);
- /*
- * Set lower I/O limit to 1FFF
- * That is, bits 0:3 are reserved and always 0000
- * Bits 7:4 contain I/O address bits 15:12
- * All others are assumed F.
- */
- pci_write_config_byte(bridge, 0x1D, 0x10);
- pci_write_config_byte(bridge, 0x0D, 0x20);
- PRINTF("Corrected bridge resource range of bridge at %02x:%02x:%02x\n",
- PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
-
- }
- else
- {
- /*
- * This card doesn't have I/O, we disable I/O forwarding
- */
- pci_write_config_byte(bridge, 0x1C, 0x11);
- pci_write_config_byte(bridge, 0x1D, 0x00);
- pci_write_config_byte(bridge, PCI_INTERRUPT_LINE, 0);
- pci_write_config_byte(bridge, PCI_INTERRUPT_PIN, 0);
- pci_write_config_dword(bridge, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_IO);
- PRINTF("Disabled bridge resource range of bridge at %02x:%02x:%02x\n",
- PCI_BUS(bridge), PCI_DEV(bridge), PCI_FUNC(bridge));
-
- }
- }
- /*
- * Correct the prefetchable memory base, which is not set correctly by
- * the U-Boot autoconfig stuff
- */
- if (prefetch_idx)
- {
-/* PRINTF("Setting prefetchable range to %x, %x (%x and %x)\n", */
-/* prefetch_addr, prefetch_addr+prefetch_size, */
-/* prefetch_addr>>16, (prefetch_addr+prefetch_size)>>16); */
-/* pci_write_config_word(bridge, PCI_PREF_MEMORY_BASE, (prefetch_addr>>16)); */
-/* pci_write_config_word(bridge, PCI_PREF_MEMORY_LIMIT, (prefetch_addr+prefetch_size)>>16); */
- }
-
- pci_write_config_word(bridge, PCI_PREF_MEMORY_BASE, 0x1000);
- pci_write_config_word(bridge, PCI_PREF_MEMORY_LIMIT, 0x0000);
-
- pci_write_config_byte(bridge, 0xD0, 0x0A);
- pci_write_config_byte(bridge, 0xD3, 0x04);
-
- /*
- * Set the interrupt pin to 0
- */
-#if 0
- pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 0);
- pci_write_config_byte(dev, PCI_INTERRUPT_PIN, 0);
-#endif
- pci_write_config_byte(bridge, PCI_INTERRUPT_LINE, 0);
- pci_write_config_byte(bridge, PCI_INTERRUPT_PIN, 0);
-
- }
- }
-
- /* Finally, enable the card's IO and memory response */
- pci_write_config_dword(dev, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_IO);
- pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 0);
- pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0);
-
- return 1;
-}
-
-int find_image(u32 rom_address, u32 rom_size, void **image, u32 *image_size)
-{
- int i = 0;
- unsigned char *rom = (unsigned char *)rom_address;
- /* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */
-
- for (;;)
- {
- unsigned short pci_data_offset = *(rom+0x18) + 256 * *(rom+0x19);
- unsigned short pci_image_length = (*(rom+pci_data_offset+0x10) + 256 * *(rom+pci_data_offset+0x11)) * 512;
- unsigned char pci_image_type = *(rom+pci_data_offset+0x14);
- if (*rom != 0x55 || *(rom+1) != 0xAA)
- {
- PRINTF("Invalid header this is\n");
- return 0;
- }
- PRINTF("Image %i: Type %d (%s)\n", i++, pci_image_type,
- pci_image_type==0 ? "x86" :
- pci_image_type==1 ? "OpenFirmware" :
- "Unknown");
- if (pci_image_type == 0)
- {
- *image = rom;
- *image_size = pci_image_length;
- return 1;
- }
-
- if (*(rom+pci_data_offset+0x15) & 0x80)
- {
- PRINTF("LAST image encountered, no image found\n");
- return 0;
- }
-
- rom += pci_image_length;
- }
-}
-
-void show_bat_mapping(void)
-{
- u32 dbat0u, dbat0l, ibat0u, ibat0l;
- u32 dbat1u, dbat1l, ibat1u, ibat1l;
- u32 dbat2u, dbat2l, ibat2u, ibat2l;
- u32 dbat3u, dbat3l, ibat3u, ibat3l;
- u32 msr, hid0, l2cr_reg;
-
- __asm volatile ("mfdbatu %0,0" : "=r" (dbat0u));
- __asm volatile ("mfdbatl %0,0" : "=r" (dbat0l));
- __asm volatile ("mfibatu %0,0" : "=r" (ibat0u));
- __asm volatile ("mfibatl %0,0" : "=r" (ibat0l));
-
- __asm volatile ("mfdbatu %0,1" : "=r" (dbat1u));
- __asm volatile ("mfdbatl %0,1" : "=r" (dbat1l));
- __asm volatile ("mfibatu %0,1" : "=r" (ibat1u));
- __asm volatile ("mfibatl %0,1" : "=r" (ibat1l));
-
- __asm volatile ("mfdbatu %0,2" : "=r" (dbat2u));
- __asm volatile ("mfdbatl %0,2" : "=r" (dbat2l));
- __asm volatile ("mfibatu %0,2" : "=r" (ibat2u));
- __asm volatile ("mfibatl %0,2" : "=r" (ibat2l));
-
- __asm volatile ("mfdbatu %0,3" : "=r" (dbat3u));
- __asm volatile ("mfdbatl %0,3" : "=r" (dbat3l));
- __asm volatile ("mfibatu %0,3" : "=r" (ibat3u));
- __asm volatile ("mfibatl %0,3" : "=r" (ibat3l));
-
- __asm volatile ("mfmsr %0" : "=r" (msr));
- __asm volatile ("mfspr %0,1008": "=r" (hid0));
- __asm volatile ("mfspr %0,1017": "=r" (l2cr_reg));
-
- printf("dbat0u: %08x dbat0l: %08x ibat0u: %08x ibat0l: %08x\n",
- dbat0u, dbat0l, ibat0u, ibat0l);
- printf("dbat1u: %08x dbat1l: %08x ibat1u: %08x ibat1l: %08x\n",
- dbat1u, dbat1l, ibat1u, ibat1l);
- printf("dbat2u: %08x dbat2l: %08x ibat2u: %08x ibat2l: %08x\n",
- dbat2u, dbat2l, ibat2u, ibat2l);
- printf("dbat3u: %08x dbat3l: %08x ibat3u: %08x ibat3l: %08x\n",
- dbat3u, dbat3l, ibat3u, ibat3l);
-
- printf("\nMSR: %08x HID0: %08x L2CR: %08x \n", msr,hid0, l2cr_reg);
-}
-
-
-void remove_init_data(void)
-{
- char *s;
-
- /* Invalidate and disable data cache */
- invalidate_l1_data_cache();
- dcache_disable();
-
- s = getenv("x86_cache");
-
- if (!s)
- {
- icache_enable();
- dcache_enable();
- }
- else if (s)
- {
- if (strcmp(s, "dcache")==0)
- {
- dcache_enable();
- }
- else if (strcmp(s, "icache") == 0)
- {
- icache_enable();
- }
- else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0)
- {
- dcache_enable();
- icache_enable();
- }
- }
-
- /* show_bat_mapping();*/
-}
diff --git a/board/MAI/bios_emulator/glue.h b/board/MAI/bios_emulator/glue.h
deleted file mode 100644
index 585efe1..0000000
--- a/board/MAI/bios_emulator/glue.h
+++ /dev/null
@@ -1,57 +0,0 @@
-#ifndef GLUE_H
-#define GLUE_H
-
-typedef unsigned int pci_dev_t;
-
-int mypci_find_device(int vendor, int product, int index);
-int mypci_bus(int device);
-int mypci_devfn(int device);
-unsigned long get_bar_size(pci_dev_t dev, int offset);
-
-u8 mypci_read_cfg_byte(int bus, int devfn, int offset);
-u16 mypci_read_cfg_word(int bus, int devfn, int offset);
-u32 mypci_read_cfg_long(int bus, int devfn, int offset);
-
-void mypci_write_cfg_byte(int bus, int devfn, int offset, u8 value);
-void mypci_write_cfg_word(int bus, int devfn, int offset, u16 value);
-void mypci_write_cfg_long(int bus, int devfn, int offset, u32 value);
-
-void _printf(const char *fmt, ...);
-char *_getenv(char *name);
-
-void *malloc(size_t size);
-void memset(void *addr, int value, size_t size);
-void memcpy(void *to, void *from, size_t numbytes);
-int strcmp(char *, char *);
-
-void enable_compatibility_hole(void);
-void disable_compatibility_hole(void);
-
-void map_rom(pci_dev_t dev, unsigned long address);
-void unmap_rom(pci_dev_t dev);
-int attempt_map_rom(pci_dev_t dev, void *copy_address);
-
-#define PCI_BASE_ADDRESS_SPACE 0x01 /* 0 = memory, 1 = I/O */
-#define PCI_BASE_ADDRESS_SPACE_IO 0x01
-#define PCI_BASE_ADDRESS_SPACE_MEMORY 0x00
-#define PCI_BASE_ADDRESS_MEM_MASK (~0x0fUL)
-
-#define PCI_BASE_ADDRESS_0 0x10 /* 32 bits */
-#define PCI_BASE_ADDRESS_1 0x14 /* 32 bits [htype 0,1 only] */
-#define PCI_BASE_ADDRESS_2 0x18 /* 32 bits [htype 0 only] */
-#define PCI_BASE_ADDRESS_3 0x1c /* 32 bits */
-#define PCI_BASE_ADDRESS_4 0x20 /* 32 bits */
-#define PCI_BASE_ADDRESS_5 0x24 /* 32 bits */
-#define PCI_BUS(d) (((d) >> 16) & 0xff)
-#define PCI_DEV(d) (((d) >> 11) & 0x1f)
-#define PCI_FUNC(d) (((d) >> 8) & 0x7)
-#define PCI_BDF(b,d,f) ((b) << 16 | (d) << 11 | (f) << 8)
-
-#define PCI_ANY_ID (~0)
-#define PCI_ROM_ADDRESS 0x30 /* Bits 31..11 are address, 10..1 reserved */
-#define PCI_ROM_ADDRESS_ENABLE 0x01
-
-#define OFF(addr) ((addr) & 0xFFFF)
-#define SEG(addr) (((addr)>>4) &0xF000)
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/dmake b/board/MAI/bios_emulator/scitech/bin-linux/glibc/dmake
deleted file mode 100755
index 4d6ccb3..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/dmake
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_cp b/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_cp
deleted file mode 100755
index d372949..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_cp
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_echo b/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_echo
deleted file mode 100755
index 6f65d41..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_echo
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_rm b/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_rm
deleted file mode 100755
index 7de5030..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/k_rm
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/makedep b/board/MAI/bios_emulator/scitech/bin-linux/glibc/makedep
deleted file mode 100755
index 5451b22..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/makedep
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/nasm b/board/MAI/bios_emulator/scitech/bin-linux/glibc/nasm
deleted file mode 100755
index fbd3352..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/nasm
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/ndisasm b/board/MAI/bios_emulator/scitech/bin-linux/glibc/ndisasm
deleted file mode 100755
index dd14a7a..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/ndisasm
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/glibc/trans b/board/MAI/bios_emulator/scitech/bin-linux/glibc/trans
deleted file mode 100755
index a1aea4f..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/glibc/trans
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/dmake b/board/MAI/bios_emulator/scitech/bin-linux/libc/dmake
deleted file mode 100755
index f198f29..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/libc/dmake
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/nasm b/board/MAI/bios_emulator/scitech/bin-linux/libc/nasm
deleted file mode 100755
index e312a0b..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/libc/nasm
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/ndisasm b/board/MAI/bios_emulator/scitech/bin-linux/libc/ndisasm
deleted file mode 100755
index 9fe81a3..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/libc/ndisasm
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin-linux/libc/trans b/board/MAI/bios_emulator/scitech/bin-linux/libc/trans
deleted file mode 100755
index e536c04..0000000
--- a/board/MAI/bios_emulator/scitech/bin-linux/libc/trans
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/bin/bc31-d16.bat b/board/MAI/bios_emulator/scitech/bin/bc31-d16.bat
deleted file mode 100755
index 776d138..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc31-d16.bat
+++ /dev/null
@@ -1,28 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 3.1.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BC3;%BC3_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BC3;%BC3_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC3_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC3.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_SNAP=
-PATH %SCITECH_BIN%;%BC3_PATH%\BIN;%DEFPATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC3_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC3_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC3_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 3.1 DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-c32.bat b/board/MAI/bios_emulator/scitech/bin/bc45-c32.bat
deleted file mode 100755
index d2939f4..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-c32.bat
+++ /dev/null
@@ -1,37 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-d16.bat b/board/MAI/bios_emulator/scitech/bin/bc45-d16.bat
deleted file mode 100755
index 246517d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-d16.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 16 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 4.5 16 bit DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-d32.bat b/board/MAI/bios_emulator/scitech/bin/bc45-d32.bat
deleted file mode 100755
index cbb2c79..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-d32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit DOS compilation configuration set up (DPMI32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-snp.bat b/board/MAI/bios_emulator/scitech/bin/bc45-snp.bat
deleted file mode 100755
index 14d7c05..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-snp.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=1
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 Snap compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-tnt.bat b/board/MAI/bios_emulator/scitech/bin/bc45-tnt.bat
deleted file mode 100755
index 50bd3cb..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-tnt.bat
+++ /dev/null
@@ -1,46 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC4;%BC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC4;%BC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=1
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit DOS compilation configuration set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-vxd.bat b/board/MAI/bios_emulator/scitech/bin/bc45-vxd.bat
deleted file mode 100755
index 4b59fa4..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-vxd.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows VxD mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\VXD\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\VXD\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=1
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32-bit VxD compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-w16.bat b/board/MAI/bios_emulator/scitech/bin/bc45-w16.bat
deleted file mode 100755
index 4d799b4..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-w16.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 16 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 4.5 16 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc45-w32.bat b/board/MAI/bios_emulator/scitech/bin/bc45-w32.bat
deleted file mode 100755
index a6c199f..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc45-w32.bat
+++ /dev/null
@@ -1,37 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 4.5 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC4;%BC4_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC4_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_BC5=
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC4
-PATH %SCITECH_BIN%;%BC4_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC4_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC4_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 4.5 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-c32.bat b/board/MAI/bios_emulator/scitech/bin/bc50-c32.bat
deleted file mode 100755
index 6a0fde2..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-c32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BC5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-d16.bat b/board/MAI/bios_emulator/scitech/bin/bc50-d16.bat
deleted file mode 100755
index 23b5038..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-d16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 16 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 5.0 16 bit DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-d32.bat b/board/MAI/bios_emulator/scitech/bin/bc50-d32.bat
deleted file mode 100755
index 0521f93..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-d32.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit DOS compilation configuration set up (DPMI32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-smx.bat b/board/MAI/bios_emulator/scitech/bin/bc50-smx.bat
deleted file mode 100755
index e3241ff..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-smx.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SMX32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SMX32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=1
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit SMX compilation configuration set up (SMX32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-snp.bat b/board/MAI/bios_emulator/scitech/bin/bc50-snp.bat
deleted file mode 100755
index ab3acd2..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=1
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 Snap compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-tnt.bat b/board/MAI/bios_emulator/scitech/bin/bc50-tnt.bat
deleted file mode 100755
index 4dcc372..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-tnt.bat
+++ /dev/null
@@ -1,48 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BC5;%BC5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BC5;%BC5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit DOS compilation configuration set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-vxd.bat b/board/MAI/bios_emulator/scitech/bin/bc50-vxd.bat
deleted file mode 100755
index 2356911..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-vxd.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\VXD\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\VXD\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=1
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows (VxD) compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-w16.bat b/board/MAI/bios_emulator/scitech/bin/bc50-w16.bat
deleted file mode 100755
index cd79d86..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-w16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
- @echo off
-REM Setup for compiling with Borland C++ 5.0 in 16 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ 5.0 16 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-w32.bat b/board/MAI/bios_emulator/scitech/bin/bc50-w32.bat
deleted file mode 100755
index 8b8cec9..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-w32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BC5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bc50-x11.bat b/board/MAI/bios_emulator/scitech/bin/bc50-x11.bat
deleted file mode 100755
index ebfeb2e..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bc50-x11.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BC5;%BC5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BC5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BC5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BC5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BC5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-c32.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-c32.bat
deleted file mode 100755
index 6e09428..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-c32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BCB5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-d16.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-d16.bat
deleted file mode 100755
index aa13e7d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-d16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 16 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ Builder 5.0 16 bit DOS compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-d32.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-d32.bat
deleted file mode 100755
index d0017d4..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-d32.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit DOS compilation configuration set up (DPMI32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-smx.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-smx.bat
deleted file mode 100755
index 2b969a9..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-smx.bat
+++ /dev/null
@@ -1,35 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SMX32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SMX32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=1
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit SMX compilation configuration set up (SMX32).
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-snp.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-snp.bat
deleted file mode 100755
index d7b8ff2..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=1
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 Snap compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-tnt.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-tnt.bat
deleted file mode 100755
index 1de3601..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-tnt.bat
+++ /dev/null
@@ -1,48 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\BCB5;%BCB5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\BCB5;%BCB5_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_DPMI16=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_TNT=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%BC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit DOS compilation configuration set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-vxd.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-vxd.bat
deleted file mode 100755
index 28de58c..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-vxd.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\VXD\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\VXD\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_VXD=1
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows (VxD) compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-w16.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-w16.bat
deleted file mode 100755
index c30d004..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-w16.bat
+++ /dev/null
@@ -1,34 +0,0 @@
- @echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 16 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC16.MK
-SET USE_DPMI16=
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_VXD=
-SET USE_BC5=1
-SET USE_SMX32=
-SET USE_SMX16=
-SET WIN32_GUI=
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\turboc.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink.cfg
-
-echo Borland C++ Builder 5.0 16 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-w32.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-w32.bat
deleted file mode 100755
index 18760e1..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-w32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET C_INCLUDE=%BCB5_PATH%\INCLUDE
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto createfiles
-call win32sdk.bat borland
-
-:createfiles
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/bcb5-x11.bat b/board/MAI/bios_emulator/scitech/bin/bcb5-x11.bat
deleted file mode 100755
index 198c1a2..0000000
--- a/board/MAI/bios_emulator/scitech/bin/bcb5-x11.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Borland C++ Builder 5.0 in 32 bit Windows mode.
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\BCB5;%BCB5_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%BCB5_PATH%\INCLUDE;
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\BC32.MK
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_VXD=
-SET USE_TNT=
-SET USE_SMX32=
-SET USE_SMX16=
-SET USE_BC5=1
-SET WIN32_GUI=1
-SET USE_SNAP=
-SET BC_LIBBASE=BC5
-PATH %SCITECH_BIN%;%BCB5_PATH%\BIN;%DEFPATH%%BC5_CD_PATH%
-
-REM: Create Borland compile/link configuration scripts
-echo -I%INCLUDE% > %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% >> %BCB5_PATH%\BIN\bcc32.cfg
-echo -L%LIB% > %BCB5_PATH%\BIN\tlink32.cfg
-
-echo Borland C++ Builder 5.0 32 bit Windows compilation configuration set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/build b/board/MAI/bios_emulator/scitech/bin/build
deleted file mode 100755
index ff1973d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/build
+++ /dev/null
@@ -1,22 +0,0 @@
-#! /bin/sh
-
-if [ $# -lt 1 ] || ( [ "$1" != gcc-linux ] && [ "$1" != qnx4 ] ) ; then
- echo Usage: $0 compiler_name [DMAKE commands]
- echo
- echo Current compilers:
- echo " gcc-linux - GNU C/C++ 2.7 or higher, 32 bit"
- echo " qnx4 - Watcom C/C++ 10.6 or higher, 32 bit"
- exit 1
-fi
-
-unset DBG OPT OPT_SIZE BUILD_DLL IMPORT_DLL FPU CHECKS BETA
-. ${1}.sh
-
-shift
-dmake $* && exit 0
-
-echo *************************************************
-echo * An error occurred while building the library. *
-echo *************************************************
-exit 1
-
diff --git a/board/MAI/bios_emulator/scitech/bin/build.bat b/board/MAI/bios_emulator/scitech/bin/build.bat
deleted file mode 100755
index ee29093..0000000
--- a/board/MAI/bios_emulator/scitech/bin/build.bat
+++ /dev/null
@@ -1,4 +0,0 @@
-@echo off
-rem Disable checked build and build release code
-set CHECKED=
-call build_it.bat %1 %2 %3 %4 %5 %6 %7 %8 %9
diff --git a/board/MAI/bios_emulator/scitech/bin/build_db.bat b/board/MAI/bios_emulator/scitech/bin/build_db.bat
deleted file mode 100755
index 2b32529..0000000
--- a/board/MAI/bios_emulator/scitech/bin/build_db.bat
+++ /dev/null
@@ -1,4 +0,0 @@
-@echo off
-rem Enable checked build and build debug code
-set CHECKED=1
-call build_it.bat %1 %2 %3 %4 %5 %6 %7 %8 %9
diff --git a/board/MAI/bios_emulator/scitech/bin/build_it.bat b/board/MAI/bios_emulator/scitech/bin/build_it.bat
deleted file mode 100755
index 5a619b4..0000000
--- a/board/MAI/bios_emulator/scitech/bin/build_it.bat
+++ /dev/null
@@ -1,432 +0,0 @@
-@echo off
-rem Generic batch file to build a version of the library. This batch file
-rem assumes that the correct batch files exist to setup the appropriate
-rem compilation environments, and that the DMAKE.EXE program is available
-rem somewhere on the path.
-rem
-rem Builds as release or debug depending on the value of the CHECKED
-rem environment variable.
-
-rem Unset all environment variables that change the compile process
-set DBG=
-set OPT=
-set OPT_SIZE=
-set BUILD_DLL=
-set IMPORT_DLL=
-set FPU=
-set CHECKS=
-set BETA=
-
-if %1==bc31-d16 goto bc31-d16
-if %1==bc45-d16 goto bc45-d16
-if %1==bc45-d32 goto bc45-d32
-if %1==bc45-tnt goto bc45-tnt
-if %1==bc45-w16 goto bc45-w16
-if %1==bc45-w32 goto bc45-w32
-if %1==bc45-c32 goto bc45-c32
-if %1==bc45-vxd goto bc45-vxd
-if %1==bc45-snp goto bc45-snp
-if %1==bc50-d16 goto bc50-d16
-if %1==bc50-d32 goto bc50-d32
-if %1==bc50-tnt goto bc50-tnt
-if %1==bc50-w16 goto bc50-w16
-if %1==bc50-w32 goto bc50-w32
-if %1==bc50-c32 goto bc50-c32
-if %1==bc50-vxd goto bc50-vxd
-if %1==bc50-snp goto bc50-snp
-if %1==gcc2-d32 goto gcc2-d32
-if %1==gcc2-w32 goto gcc2-w32
-if %1==gcc2-c32 goto gcc2-c32
-if %1==gcc2-linux goto gcc2-linux
-if %1==vc40-d16 goto vc40-d16
-if %1==vc40-tnt goto vc40-tnt
-if %1==vc40-w16 goto vc40-w16
-if %1==vc40-w32 goto vc40-w32
-if %1==vc40-c32 goto vc40-c32
-if %1==vc40-drv9x goto vc40-drv9x
-if %1==vc40-drvnt goto vc40-drvnt
-if %1==vc40-rtt goto vc40-rtt
-if %1==vc40-snp goto vc40-snp
-if %1==vc50-d16 goto vc50-d16
-if %1==vc50-tnt goto vc50-tnt
-if %1==vc50-w16 goto vc50-w16
-if %1==vc50-w32 goto vc50-w32
-if %1==vc50-c32 goto vc50-c32
-if %1==vc50-drv9x goto vc50-drv9x
-if %1==vc50-drvnt goto vc50-drvnt
-if %1==vc50-rtt goto vc50-rtt
-if %1==vc50-snp goto vc50-snp
-if %1==vc60-d16 goto vc60-d16
-if %1==vc60-tnt goto vc60-tnt
-if %1==vc60-w16 goto vc60-w16
-if %1==vc60-w32 goto vc60-w32
-if %1==vc60-c32 goto vc60-c32
-if %1==vc60-drv9x goto vc60-drv9x
-if %1==vc60-drvnt goto vc60-drvnt
-if %1==vc60-drvw2k goto vc60-drvw2k
-if %1==vc60-rtt goto vc60-rtt
-if %1==vc60-snp goto vc60-snp
-if %1==wc10ad16 goto wc10ad16
-if %1==wc10ad32 goto wc10ad32
-if %1==wc10atnt goto wc10atnt
-if %1==wc10aw16 goto wc10aw16
-if %1==wc10aw32 goto wc10aw32
-if %1==wc10ac32 goto wc10ac32
-if %1==wc10ao32 goto wc10ao32
-if %1==wc10ap32 goto wc10ap32
-if %1==wc10asnp goto wc10asnp
-if %1==wc10-d16 goto wc10-d16
-if %1==wc10-d32 goto wc10-d32
-if %1==wc10-tnt goto wc10-tnt
-if %1==wc10-w16 goto wc10-w16
-if %1==wc10-w32 goto wc10-w32
-if %1==wc10-c32 goto wc10-c32
-if %1==wc10-o32 goto wc10-o32
-if %1==wc10-p32 goto wc10-p32
-if %1==wc10-snp goto wc10-snp
-if %1==wc11-d16 goto wc11-d16
-if %1==wc11-d32 goto wc11-d32
-if %1==wc11-tnt goto wc11-tnt
-if %1==wc11-w16 goto wc11-w16
-if %1==wc11-w32 goto wc11-w32
-if %1==wc11-c32 goto wc11-c32
-if %1==wc11-o32 goto wc11-o32
-if %1==wc11-p32 goto wc11-p32
-if %1==wc11-snp goto wc11-snp
-
-echo Usage: BUILD 'compiler_name' [DMAKE commands]
-echo.
-echo Where 'compiler_name' is of the form comp-os, where
-echo 'comp' defines the compiler and 'os' defines the OS environment.
-echo For instance 'bc50-w32' is for Borland C++ 5.0 for Win32.
-echo The value of 'comp' can be any of the following:
-echo.
-echo bc45 - Borland C++ 4.5x
-echo bc50 - Borland C++ 5.x
-echo vc40 - Visual C++ 4.x
-echo vc50 - Visual C++ 5.x
-echo vc60 - Visual C++ 6.x
-echo wc10 - Watcom C++ 10.6
-echo wc11 - Watcom C++ 11.0
-echo gcc2 - GNU C/C++ 2.9x
-echo.
-echo The value of 'os' can be one of the following:
-echo.
-echo d16 - 16-bit DOS
-echo d32 - 32-bit DOS
-echo w16 - 16-bit Windows GUI mode
-echo c32 - 32-bit Windows console mode
-echo w32 - 32-bit Windows GUI mode
-echo o16 - 16-bit OS/2 console mode
-echo o32 - 32-bit OS/2 console mode
-echo p32 - 32-bit OS/2 Presentation Manager
-echo snp - 32-bit SciTech Snap application
-echo linux - 32-bit Linux application
-goto end
-
-rem -------------------------------------------------------------------------
-rem Setup for the specified compiler
-
-:bc31-d16
-call bc31-d16.bat
-goto compileit
-
-:bc45-d16
-call bc45-d16.bat
-goto compileit
-
-:bc45-d32
-call bc45-d32.bat
-goto compileit
-
-:bc45-tnt
-call bc45-tnt.bat
-goto compileit
-
-:bc45-w16
-call bc45-w16.bat
-goto compileit
-
-:bc45-w32
-call bc45-w32.bat
-goto compileit
-
-:bc45-c32
-call bc45-c32.bat
-goto compileit
-
-:bc45-vxd
-call bc45-vxd.bat
-goto compileit
-
-:bc50-d16
-call bc50-d16.bat
-goto compileit
-
-:bc50-d32
-call bc50-d32.bat
-goto compileit
-
-:bc50-tnt
-call bc50-tnt.bat
-goto compileit
-
-:bc50-w16
-call bc50-w16.bat
-goto compileit
-
-:bc50-w32
-call bc50-w32.bat
-goto compileit
-
-:bc50-c32
-call bc50-c32.bat
-goto compileit
-
-:bc50-vxd
-call bc50-vxd.bat
-goto compileit
-
-:gcc2-d32
-call gcc2-d32.bat
-goto compileit
-
-:gcc2-w32
-call gcc2-w32.bat
-goto compileit
-
-:gcc2-c32
-call gcc2-c32.bat
-goto compileit
-
-:gcc2-linux
-call gcc2-linux.bat
-goto compileit
-
-:sc70-d16
-call sc70-d16.bat
-goto compileit
-
-:sc70-w16
-call sc70-w16.bat
-goto compileit
-
-:sc70-tnt
-call sc70-tnt.bat
-goto compileit
-
-:sc70-w32
-call sc70-w32.bat
-goto compileit
-
-:sc70-c32
-call sc70-c32.bat
-goto compileit
-
-:vc40-d16
-call vc40-d16.bat
-goto compileit
-
-:vc40-tnt
-call vc40-tnt.bat
-goto compileit
-
-:vc40-w16
-call vc40-w16.bat
-goto compileit
-
-:vc40-w32
-call vc40-w32.bat
-goto compileit
-
-:vc40-c32
-call vc40-c32.bat
-goto compileit
-
-:vc40-drv9x
-call vc40-drv9x.bat
-goto compileit
-
-:vc40-drvnt
-call vc40-drvnt.bat
-goto compileit
-
-:vc40-rtt
-call vc40-rtt.bat
-goto compileit
-
-:vc50-d16
-call vc50-d16.bat
-goto compileit
-
-:vc50-tnt
-call vc50-tnt.bat
-goto compileit
-
-:vc50-w16
-call vc50-w16.bat
-goto compileit
-
-:vc50-w32
-call vc50-w32.bat
-goto compileit
-
-:vc50-c32
-call vc50-c32.bat
-goto compileit
-
-:vc50-drv9x
-call vc50-drv9x.bat
-goto compileit
-
-:vc50-drvnt
-call vc50-drvnt.bat
-goto compileit
-
-:vc50-rtt
-call vc50-rtt.bat
-goto compileit
-
-:vc60-d16
-call vc60-d16.bat
-goto compileit
-
-:vc60-tnt
-call vc60-tnt.bat
-goto compileit
-
-:vc60-w16
-call vc60-w16.bat
-goto compileit
-
-:vc60-w32
-call vc60-w32.bat
-goto compileit
-
-:vc60-c32
-call vc60-c32.bat
-goto compileit
-
-:vc60-drv9x
-call vc60-drv9x.bat
-goto compileit
-
-:vc60-drvnt
-call vc60-drvnt.bat
-goto compileit
-
-:vc60-drvw2k
-call vc60-drvw2k.bat
-goto compileit
-
-:vc60-rtt
-call vc60-rtt.bat
-goto compileit
-
-:wc10ad16
-call wc10ad16.bat
-goto compileit
-
-:wc10ad32
-call wc10ad32.bat
-goto compileit
-
-:wc10atnt
-call wc10atnt.bat
-goto compileit
-
-:wc10aw16
-call wc10aw16.bat
-goto compileit
-
-:wc10aw32
-call wc10aw32.bat
-goto compileit
-
-:wc10ac32
-call wc10ac32.bat
-goto compileit
-
-:wc10ao32
-call wc10ao32.bat
-goto compileit
-
-:wc10ap32
-call wc10ap32.bat
-goto compileit
-
-:wc10-d16
-call wc10-d16.bat
-goto compileit
-
-:wc10-d32
-call wc10-d32.bat
-goto compileit
-
-:wc10-tnt
-call wc10-tnt.bat
-goto compileit
-
-:wc10-w16
-call wc10-w16.bat
-goto compileit
-
-:wc10-w32
-call wc10-w32.bat
-goto compileit
-
-:wc10-c32
-call wc10-c32.bat
-goto compileit
-
-:wc10-o32
-call wc10-o32.bat
-goto compileit
-
-:wc10-p32
-call wc10-p32.bat
-goto compileit
-
-:wc11-d16
-call wc11-d16.bat
-goto compileit
-
-:wc11-d32
-call wc11-d32.bat
-goto compileit
-
-:wc11-tnt
-call wc11-tnt.bat
-goto compileit
-
-:wc11-w16
-call wc11-w16.bat
-goto compileit
-
-:wc11-w32
-call wc11-w32.bat
-goto compileit
-
-:wc11-c32
-call wc11-c32.bat
-goto compileit
-
-:wc11-o32
-call wc11-o32.bat
-goto compileit
-
-:wc11-p32
-call wc11-p32.bat
-goto compileit
-
-:compileit
-k_rm -f *.lib *.a
-dmake %2 %3 %4 %5 %6 %7 %8 %9
-if errorlevel 1 goto errorend
-goto end
-
-:errorend
-echo *************************************************
-echo * An error occurred while building the library. *
-echo *************************************************
-:end
diff --git a/board/MAI/bios_emulator/scitech/bin/cddrv.bat b/board/MAI/bios_emulator/scitech/bin/cddrv.bat
deleted file mode 100755
index b64f4d7..0000000
--- a/board/MAI/bios_emulator/scitech/bin/cddrv.bat
+++ /dev/null
@@ -1,6 +0,0 @@
-@echo off
-%1
-cd %3
-%4 %5 %6 %7 %8 %9
-%2
-
diff --git a/board/MAI/bios_emulator/scitech/bin/cdit b/board/MAI/bios_emulator/scitech/bin/cdit
deleted file mode 100755
index b22023d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/cdit
+++ /dev/null
@@ -1,10 +0,0 @@
-#! /bin/sh
-
-cd $1
-PROG=$2
-shift 2
-rm -f *.lib *.a
-$PROG $*
-RET=$?
-cd ..
-exit $RET
diff --git a/board/MAI/bios_emulator/scitech/bin/cdit.bat b/board/MAI/bios_emulator/scitech/bin/cdit.bat
deleted file mode 100755
index 950b648..0000000
--- a/board/MAI/bios_emulator/scitech/bin/cdit.bat
+++ /dev/null
@@ -1,5 +0,0 @@
-@echo off
-cd %1
-k_rm -f *.lib *.a
-shift 1
-%1 %2 %3 %4 %5 %6 %7 %8 %9
diff --git a/board/MAI/bios_emulator/scitech/bin/djgpp.env b/board/MAI/bios_emulator/scitech/bin/djgpp.env
deleted file mode 100644
index 5a2c3d8..0000000
--- a/board/MAI/bios_emulator/scitech/bin/djgpp.env
+++ /dev/null
@@ -1,46 +0,0 @@
-#= Don't edit this line unless you move djgpp.env outside
-#= of the djgpp installation directory. If you do move
-#= it, set DJDIR to the directory you installed DJGPP in.
-#=
-DJDIR=%:/>DJGPP%
-
-+USER=dosuser
-+TMPDIR=%DJDIR%/tmp
-+EMU387=%DJDIR%/bin/emu387.dxe
-+LFN=y
-
-[bison]
-BISON_HAIRY=%DJDIR%/lib/bison.hai
-BISON_SIMPLE=%DJDIR%/lib/bison.sim
-
-[cpp]
-CPLUS_INCLUDE_PATH=%/>;CPLUS_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/lang/cxx;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-C_INCLUDE_PATH=%/>;C_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-OBJCPLUS_INCLUDE_PATH=%/>;OBJCPLUS_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-OBJC_INCLUDE_PATH=%/>;OBJC_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-
-[gcc]
-COMPILER_PATH=%/>;COMPILER_PATH%%DJDIR%/bin
-LIBRARY_PATH=%/>;LIBRARY_PATH%%DJDIR%/lib;%DJDIR%/contrib/grx20/lib;%SCITECH%/lib/release/dos32/dj2
-
-[info]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-INFO_COLORS=0x1f.0x31
-
-[emacs]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-
-[less]
-LESSBINFMT=*k<%X>
-LESSCHARDEF=8bcccbcc12bc5b95.b127.b
-LESS=%LESS% -h5$y5$Dd2.0$Du14.0$Ds4.7$Dk9.0$
-
-[locate]
-+LOCATE_PATH=%DJDIR%/lib/locatedb.dat
-
-[ls]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[dir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[vdir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
diff --git a/board/MAI/bios_emulator/scitech/bin/djgpp_db.env b/board/MAI/bios_emulator/scitech/bin/djgpp_db.env
deleted file mode 100644
index 9b792c9..0000000
--- a/board/MAI/bios_emulator/scitech/bin/djgpp_db.env
+++ /dev/null
@@ -1,46 +0,0 @@
-#= Don't edit this line unless you move djgpp.env outside
-#= of the djgpp installation directory. If you do move
-#= it, set DJDIR to the directory you installed DJGPP in.
-#=
-DJDIR=%:/>DJGPP%
-
-+USER=dosuser
-+TMPDIR=%DJDIR%/tmp
-+EMU387=%DJDIR%/bin/emu387.dxe
-+LFN=y
-
-[bison]
-BISON_HAIRY=%DJDIR%/lib/bison.hai
-BISON_SIMPLE=%DJDIR%/lib/bison.sim
-
-[cpp]
-CPLUS_INCLUDE_PATH=%/>;CPLUS_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/lang/cxx;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-C_INCLUDE_PATH=%/>;C_INCLUDE_PATH%include;%SCITECH%/include;%PRIVATE%/include;.;%DJDIR%/include;%DJDIR%/contrib/grx20/include
-OBJCPLUS_INCLUDE_PATH=%/>;OBJCPLUS_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-OBJC_INCLUDE_PATH=%/>;OBJC_INCLUDE_PATH%%DJDIR%/include;%DJDIR%/lang/objc
-
-[gcc]
-COMPILER_PATH=%/>;COMPILER_PATH%%DJDIR%/bin
-LIBRARY_PATH=%/>;LIBRARY_PATH%%DJDIR%/lib;%DJDIR%/contrib/grx20/lib;%SCITECH%/lib/debug/dos32/dj2
-
-[info]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-INFO_COLORS=0x1f.0x31
-
-[emacs]
-INFOPATH=%/>;INFOPATH%%DJDIR%/info;%DJDIR%/gnu/emacs/info
-
-[less]
-LESSBINFMT=*k<%X>
-LESSCHARDEF=8bcccbcc12bc5b95.b127.b
-LESS=%LESS% -h5$y5$Dd2.0$Du14.0$Ds4.7$Dk9.0$
-
-[locate]
-+LOCATE_PATH=%DJDIR%/lib/locatedb.dat
-
-[ls]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[dir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
-[vdir]
-+LS_COLORS=no=00:fi=00:di=36:lb=37;07:cd=40;33;01:ex=32:*.cmd=32:*.tar=01;31:*.tgz=01;31:*.arj=01;31:*.taz=01;31:*.lzh=01;31:*.zip=01;31:*.z=01;31:*.Z=01;31:*.gz=01;31:*.deb=01;31:*.jpg=01;34:*.gif=01;34:*.bmp=01;34:*.ppm=01;34:*.tga=01;34:*.xbm=01;34:*.xpm=01;34:*.tif=01;34:*.mpg=01;37:*.avi=01;37:*.gl=01;37:*.dl=01;37:*~=08:*.bak=08:
diff --git a/board/MAI/bios_emulator/scitech/bin/findint3.bat b/board/MAI/bios_emulator/scitech/bin/findint3.bat
deleted file mode 100755
index 2e1506c..0000000
--- a/board/MAI/bios_emulator/scitech/bin/findint3.bat
+++ /dev/null
@@ -1 +0,0 @@
-perl c:\scitech\src\perl\findint3.per
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc-beos.sh b/board/MAI/bios_emulator/scitech/bin/gcc-beos.sh
deleted file mode 100755
index 61ffd93..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc-beos.sh
+++ /dev/null
@@ -1,16 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with GCC/G++ for BeOS
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/gcc_beos.mk
-export INCLUDE="-Iinclude -I$SCITECH/include -I$PRIVATE/include"
-export USE_X11=0
-export USE_BEOS=1
-
-echo GCC BeOS console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc-freebsd.sh b/board/MAI/bios_emulator/scitech/bin/gcc-freebsd.sh
deleted file mode 100755
index 3816a5d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc-freebsd.sh
+++ /dev/null
@@ -1,16 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with GCC/G++ for FreeBSD
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/gcc_freebsd.mk
-export INCLUDE="-Iinclude -I$SCITECH/include -I$PRIVATE/include"
-export USE_X11=1
-export USE_FREEBSD=1
-
-echo GCC FreeBSD console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc-linux.sh b/board/MAI/bios_emulator/scitech/bin/gcc-linux.sh
deleted file mode 100755
index 27a4c49..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc-linux.sh
+++ /dev/null
@@ -1,19 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with GCC/G++ for Linux
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/gcc_linux.mk
-export INCLUDE="include;$SCITECH/include;$PRIVATE/include"
-export USE_LINUX=1
-
-if [ "x$LIBC" = x ]; then
- echo "GCC Linux console compilation environment set up (glib)"
-else
- echo "GCC Linux console compilation environment set up (libc5)"
-fi
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-c32.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-c32.bat
deleted file mode 100755
index 13c4783..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-c32.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup for compiling with GNU C compiler
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\win32\gcc2
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\win32\gcc2
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set INCLUDE=include;%SCITECH%\include;%PRIVATE%\include
-set MAKESTARTUP=%SCITECH%\makedefs\gcc_win32.mk
-set MAKE_MODE=
-set USE_WIN16=
-set USE_WIN32=1
-set WIN32_GUI=
-set USE_SNAP=
-set GCC_LIBBASE=gcc2
-PATH %SCITECH_BIN%;%GCC2_PATH%\NATIVE\BIN;%DEFPATH%
-
-echo GCC 2.9.x 32-bit Win32 console compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-dos.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-dos.bat
deleted file mode 100755
index 97cb8bd..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-dos.bat
+++ /dev/null
@@ -1,28 +0,0 @@
-@echo off
-REM Setup for compiling with DJGPP 2.02
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\dos32\dj2
-%SCITECH%\bin-dos\k_cp %SCITECH%\BIN\DJGPP.ENV %DJ_PATH%\DJGPP.ENV
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\dos32\dj2
-%SCITECH%\bin-dos\k_cp %SCITECH%\BIN\DJGPP_DB.ENV %DJ_PATH%\DJGPP.ENV
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set DJGPP=%DJ_PATH%\DJGPP.ENV
-set INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%DJ_PATH%\INCLUDE;
-set MAKESTARTUP=%SCITECH%\MAKEDEFS\DJ32.MK
-set USE_WIN16=
-set USE_WIN32=
-set WIN32_GUI=
-set USE_SNAP=
-set DJ_LIBBASE=dj2
-PATH %SCITECH_BIN%;%DJ_PATH%\BIN;%DEFPATH%
-
-echo DJGPP 2.02 32-bit DOS compilation environment set up (DPMI).
-
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-linux.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-linux.bat
deleted file mode 100755
index ceb2ab8..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-linux.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup for compiling with GNU C cross-compiler
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\win32\gcc2
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\win32\gcc2
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set INCLUDE=include;%SCITECH%\include;%PRIVATE%\include
-set MAKESTARTUP=%SCITECH%\MAKEDEFS\gcc_linux.mk
-set MAKE_MODE=UNIX
-set USE_WIN16=
-set USE_WIN32=
-set WIN32_GUI=
-set USE_SNAP=
-set GCC_LIBBASE=gcc2
-PATH %SCITECH_BIN%;%GCC2_PATH%\cross-linux\i386-redhat-linux\BIN;%DEFPATH%
-
-echo GCC 2.9.x 32-bit Linux console cross compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/gcc2-w32.bat b/board/MAI/bios_emulator/scitech/bin/gcc2-w32.bat
deleted file mode 100755
index bdb31aa..0000000
--- a/board/MAI/bios_emulator/scitech/bin/gcc2-w32.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup for compiling with GNU C compiler
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\release\win32\gcc2
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\debug\win32\gcc2
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set INCLUDE=include;%SCITECH%\include;%PRIVATE%\include
-set MAKESTARTUP=%SCITECH%\makedefs\gcc_win32.mk
-set MAKE_MODE=
-set USE_WIN16=
-set USE_WIN32=1
-set WIN32_GUI=1
-set USE_SNAP=
-set GCC_LIBBASE=gcc2
-PATH %SCITECH_BIN%;%GCC2_PATH%\NATIVE\BIN;%DEFPATH%
-
-echo GCC 2.9.x 32-bit Win32 GUI compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/makelib.bat b/board/MAI/bios_emulator/scitech/bin/makelib.bat
deleted file mode 100755
index 6316734..0000000
--- a/board/MAI/bios_emulator/scitech/bin/makelib.bat
+++ /dev/null
@@ -1,97 +0,0 @@
-call wc11-d32.bat
-
-cd c:\private\src\license
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\pm
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\console
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\nucleus
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\zlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd c:\private\src\graphics\ref2d
-dmake clean
-dmake depend
-dmake -u install
-cd c:\private\src\drvlib
-dmake clean
-dmake depend
-dmake -u install
-
-call wc11-w32.bat
-
-cd c:\private\src\license
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\pm
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\console
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\nucleus
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\zlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd c:\private\src\graphics\ref2d
-dmake clean
-dmake depend
-dmake -u install
-cd c:\private\src\drvlib
-dmake clean
-dmake depend
-dmake -u install
-
-call wc10-d32.bat
-
-cd c:\private\src\license
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\pm
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\console
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\nucleus
-dmake clean
-dmake depend
-dmake -u install
-cd c:\scitech\src\zlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd c:\private\src\graphics\ref2d
-dmake clean
-dmake depend
-dmake -u install
-cd c:\private\src\drvlib
-dmake clean
-dmake depend
-dmake -u install
-
-cd \private\src\graphics\drivers
diff --git a/board/MAI/bios_emulator/scitech/bin/meltobjs.sh b/board/MAI/bios_emulator/scitech/bin/meltobjs.sh
deleted file mode 100755
index fd1804b..0000000
--- a/board/MAI/bios_emulator/scitech/bin/meltobjs.sh
+++ /dev/null
@@ -1,23 +0,0 @@
-#! /bin/sh
-#
-# This script generates a single object file from a set of libraries (*.a files)
-# Usage: meltobjs.sh target.o library1.a library2.a ...
-#
-# (C) SciTech Software, Inc. 1998
-#
-
-TMPDIR=/tmp/melt$$
-TARGET=$1
-TARGETDIR=$PWD
-shift
-mkdir $TMPDIR
-
-cd $TMPDIR
-
-for a in $*
-do
- ar x $a
-done
-ld -r -o $TARGETDIR/$TARGET *.o
-
-rm -fr $TMPDIR
\ No newline at end of file
diff --git a/board/MAI/bios_emulator/scitech/bin/ntddk.bat b/board/MAI/bios_emulator/scitech/bin/ntddk.bat
deleted file mode 100755
index 07c0d78..0000000
--- a/board/MAI/bios_emulator/scitech/bin/ntddk.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM: Set up environment variables for Microsoft Windows NT DDK development.
-REM: Note that we have hard coded this for Windows NT i386 development.
-
-SET USE_NTDRV=1
-SET USE_W2KDRV=
-SET BASEDIR=%NT_DDKROOT%
-SET PATH=%BASEDIR%\bin;%PATH%
-SET NTMAKEENV=%BASEDIR%\inc
-SET BUILD_MAKE_PROGRAM=nmake.exe
-SET BUILD_DEFAULT=-ei -nmake -i
-SET BUILD_DEFAULT_TARGETS=-386
-SET _OBJ_DIR=obj
-SET NEW_CRTS=1
-SET _NTROOT=%BASEDIR%
-SET INCLUDE=%BASEDIR%\inc;%INCLUDE%
-
-if .%CHECKED%==.1 goto checked
-
-REM: set up an NT free build environment
-SET DDKBUILDENV=free
-SET C_DEFINES=-D_IDWBUILD
-SET NTDBGFILES=1
-SET NTDEBUG=
-SET NTDEBUGTYPE=
-SET MSC_OPTIMIZATION=
-set LIB=%BASEDIR%\lib\i386\free;%SCITECH_LIB%\LIB\RELEASE\NTDRV\VC6;%MSVCDir%\LIB;.
-
-goto done
-
-:checked
-
-REM: set up an NT checked build environment
-SET DDKBUILDENV=checked
-SET C_DEFINES=-D_IDWBUILD -DRDRDBG -DSRVDBG
-SET NTDBGFILES=
-SET NTDEBUG=ntsd
-SET NTDEBUGTYPE=both
-SET MSC_OPTIMIZATION=/Od /Oi
-set LIB=%BASEDIR%\lib\i386\free;%SCITECH_LIB%\LIB\DEBUG\NTDRV\VC6;%MSVCDir%\LIB;.
-
-:done
diff --git a/board/MAI/bios_emulator/scitech/bin/qnx4.sh b/board/MAI/bios_emulator/scitech/bin/qnx4.sh
deleted file mode 100755
index 843c4d9..0000000
--- a/board/MAI/bios_emulator/scitech/bin/qnx4.sh
+++ /dev/null
@@ -1,18 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with Watcom C/C++ for QNX4
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/qnx4.mk
-export INCLUDE="-I$SCITECH/include -I$PRIVATE/include -I/usr/include"
-export USE_QNX=1
-export USE_QNX4=1
-export WC_LIBBASE=wc10
-
-echo Qnx 4 console compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/qnxnto.sh b/board/MAI/bios_emulator/scitech/bin/qnxnto.sh
deleted file mode 100755
index c114f9e..0000000
--- a/board/MAI/bios_emulator/scitech/bin/qnxnto.sh
+++ /dev/null
@@ -1,21 +0,0 @@
-#! /bin/sh
-
-# Setup for compiling with Watcom C/C++ for QNX Neutrino
-
-if [ "$CHECKED" = "1" ]; then
- echo Checked debug build enabled.
-else
- echo Release build enabled.
-fi
-
-if [ X$GCC_PATH = "X" ]; then
- export GCC_PATH=/usr/gcc/bin
-fi
-
-export MAKESTARTUP=$SCITECH/makedefs/qnxnto.mk
-export INCLUDE="-I$SCITECH/include -I$PRIVATE/include -I/usr/nto/include"
-export USE_BIOS=1 # VBIOS lib is tiny under Neutrino, always include it
-export USE_QNX=1
-export USE_QNXNTO=1
-
-echo Qnx Neutrino console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-beos.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-beos.sh
deleted file mode 100755
index 0a272d6..0000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-beos.sh
+++ /dev/null
@@ -1,42 +0,0 @@
-#! /bin/sh
-
-# BeOS VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal BeOS installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export GCC_PATH=/boot/develop/tools/gnupro/bin
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-beos:$PATH
-#if [ "x$LIBC" = x ]; then
-# export PATH=$PATH:$SCITECH/bin-beos/glibc
-#else
-# export PATH=$PATH:$SCITECH/bin-beos/libc
-#fi
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-freebsd.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-freebsd.sh
deleted file mode 100755
index c920748..0000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-freebsd.sh
+++ /dev/null
@@ -1,37 +0,0 @@
-#! /bin/sh
-
-# LINUX VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal Linux installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export GCC_PATH=/usr/bin
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-freebsd:$PATH
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-linux.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-linux.sh
deleted file mode 100755
index 35cbf1d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-linux.sh
+++ /dev/null
@@ -1,43 +0,0 @@
-#! /bin/sh
-
-# LINUX VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal Linux installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export GCC_PATH=/usr/bin
-export TEMP=/tmp TMP=/tmp
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-linux:$PATH
-if [ "x$LIBC" = x ]; then
- export PATH=$SCITECH/bin-linux/glibc:$PATH
-else
- export PATH=$SCITECH/bin-linux/libc:$PATH
-fi
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars-qnx.sh b/board/MAI/bios_emulator/scitech/bin/set-vars-qnx.sh
deleted file mode 100755
index 1d73109..0000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars-qnx.sh
+++ /dev/null
@@ -1,37 +0,0 @@
-#! /bin/sh
-
-# QNX 4 VERSION
-# Set the place where SciTech Software is installed, and where each
-# of the supported compilers is installed. These environment variables
-# are used by the batch files in the SCITECH\BIN directory.
-#
-# Modify the as appropriate for your compiler configuration (you should
-# only need to change things in this batch file).
-#
-# This version is for a normal Linux installation.
-
-# The SCITECH variable points to where batch files, makefile startups,
-# include files and source files will be found when compiling.
-
-export SCITECH=$MGL_ROOT
-
-# The SCITECH_LIB variable points to where the SciTech libraries live
-# for installation and linking. This allows you to have the source and
-# include files on local machines for compiling and have the libraries
-# located on a common network machine (for network builds).
-
-export SCITECH_LIB=$SCITECH
-
-# The PRIVATE variable points to where private source files reside that
-# do not live in the public source tree
-
-export PRIVATE=$HOME/private
-
-# The following define the locations of all the compilers that you may
-# be using. Change them to reflect where you have installed your
-# compilers.
-
-export WC10_PATH=/usr/watcom/10.6/usr
-
-# Add the Scitech bin path to the current PATH
-export PATH=$SCITECH/bin:$SCITECH/bin-qnx:$PATH
diff --git a/board/MAI/bios_emulator/scitech/bin/set-vars.bat b/board/MAI/bios_emulator/scitech/bin/set-vars.bat
deleted file mode 100755
index 2a2101d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/set-vars.bat
+++ /dev/null
@@ -1,110 +0,0 @@
-@echo off
-REM:=========================================================================
-REM: Master batch file to set up all necessary environment variables for
-REM: the SciTech makefile utilities. This batch file should be executed
-REM: *first* before any other batch files when you start a command shell.
-REM: You should not need to modify any batch files except this one to
-REM: configure the makefile utilities.
-REM:=========================================================================
-
-REM: Set the place where SciTech Software is installed, and where each
-REM: of the supported compilers is installed. These environment variables
-REM: are used by the batch files in the SCITECH\BIN directory.
-REM:
-REM: Modify the as appropriate for your compiler configuration (you should
-REM: only need to change things in this batch file).
-REM:
-REM: This version is for a normal MSDOS installation.
-
-REM: The SCITECH variable points to where batch files, makefile startups,
-REM: include files and source files will be found when compiling.
-
-SET SCITECH=c:\scitech
-
-REM: The SCITECH_LIB variable points to where the SciTech libraries live
-REM: for installation and linking. This allows you to have the source and
-REM: include files on local machines for compiling and have the libraries
-REM: located on a common network machine (for network builds).
-
-SET SCITECH_LIB=%SCITECH%
-
-REM: The PRIVATE variable points to where private source files reside that
-REM: do not live in the public source tree
-
-SET PRIVATE=c:\private
-
-REM: The following sets up the path to the SciTech command line utilities
-REM: for the development operating system. We select either DOS hosted
-REM: tools or Win32 hosted tools depending on whether you are running
-REM: on NT or not. Windows 9x users can use the Win32 hosted tools but
-REM: they run slower, but you will have long filenames if you do this.
-
-IF .%OS%==.Windows_NT goto Win32_path
-IF NOT .%WINDIR%==. goto Win32_path
-SET SCITECH_BIN=%SCITECH%\bin;%SCITECH%\bin-dos
-goto path_set
-
-REM: The following sets up the path to the SciTech command line utilities
-REM: for the development operating system. This version uses the Win32
-REM: hosted tools by default, so you can use long filenames.
-
-:Win32_path
-SET SCITECH_BIN=%SCITECH%\bin;%SCITECH%\bin-win32
-
-:path_set
-
-REM: Set the TMP variable for dmake if this is not already set
-
-SET TMP=%SCITECH%
-
-REM: Set the following environment variable to use the Netwide Assembler
-REM: (NASM) provided with the MGL tools to build all assembler modules.
-REM: If you have Turbo Assembler 4.0 or later and you wish to use it,
-REM: you can use it by removing the following line.
-
-SET USE_NASM=1
-
-REM: The following is used to set up DDK directories for device driver
-REM: development. They can safely be ignored unless you are using the
-REM: SciTech makefile utilities to build device drivers.
-
-SET DDKDRIVE=c:
-SET MSSDK=c:\c\win32sdk
-SET W95_DDKROOT=c:\c\95ddk
-SET W98_DDKROOT=c:\c\98ddk
-SET NT_DDKROOT=c:\c\ntddk
-SET W2K_DDKROOT=c:\c\2000ddk
-SET MASM_ROOT=c:\c\masm611
-SET VTOOLSD=c:\c\vtd95
-SET SOFTICE_PATH=c:\c\sint
-
-REM: The following define the locations of all the compilers that you may
-REM: be using. Change them to reflect where you have installed your
-REM: compilers.
-
-SET BC3_PATH=c:\c\bc3
-SET BC4_PATH=c:\c\bc45
-SET BC5_PATH=c:\c\bc50
-SET BCB5_PATH=c:\c\bcb50
-SET VC_PATH=c:\c\msvc
-SET VC4_PATH=c:\c\vc42
-SET VC5_PATH=c:\c\vc50
-SET VC6_PATH=c:\c\vc60
-SET SC70_PATH=c:\c\sc75
-SET WC10A_PATH=c:\c\wc10a
-SET WC10_PATH=c:\c\wc10
-SET WC11_PATH=c:\c\wc11
-SET TNT_PATH=c:\c\tnt
-SET DJ_PATH=c:\c\djgpp
-SET GCC2_PATH=c:\unix\usr
-
-REM: The following define the locations of the IDE and compiler path
-REM: tools for Visual C++. If you do a standard installation, you wont
-REM: need to change this. If however you did a custom install and changed
-REM: the paths to these directory, you will need to modify this to suit.
-
-SET VC5_MSDevDir=%VC5_PATH%\sharedide
-SET VC5_MSVCDir=%VC5_PATH%\vc
-SET VC6_MSDevDir=%VC6_PATH%\common\msdev98
-SET VC6_MSVCDir=%VC6_PATH%\vc98
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-c32.bat b/board/MAI/bios_emulator/scitech/bin/vc40-c32.bat
deleted file mode 100755
index 71f7d8e..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-c32.bat
+++ /dev/null
@@ -1,36 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set C_INCLUDE=%VC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 4.2 32 bit Windows compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-d16.bat b/board/MAI/bios_emulator/scitech/bin/vc40-d16.bat
deleted file mode 100755
index 9817493..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-d16.bat
+++ /dev/null
@@ -1,27 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\VC4;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\VC4;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16 DOS bit compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-drv9x.bat b/board/MAI/bios_emulator/scitech/bin/vc40-drv9x.bat
deleted file mode 100755
index 62e3521..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-drv9x.bat
+++ /dev/null
@@ -1,21 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-REM: First setup for Win32 console development
-call vc40-c32.bat > NUL
-
-REM: Extra stuff to set up for Windows 9x DDK development
-set MASTER_MAKE=1
-set DDKROOT=%W95_DDKROOT%
-set SDKROOT=%MSSDK%
-set C16_ROOT=%VC_PATH%
-set C32_ROOT=%VC4_PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 4.2 Windows 9x driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-drvnt.bat b/board/MAI/bios_emulator/scitech/bin/vc40-drvnt.bat
deleted file mode 100755
index 83b6780..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-drvnt.bat
+++ /dev/null
@@ -1,18 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc40-c32.bat sdk > NUL
-
-REM: Extra stuff to set up for Windows NT DDK development
-SET BASEDIR=%NT_DDKROOT%
-SET PATH=%NT_DDKROOT%\bin;%PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 4.2 Windows NT driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-snp.bat b/board/MAI/bios_emulator/scitech/bin/vc40-snp.bat
deleted file mode 100755
index 7997044..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-snp.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=1
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 4.2 Snap compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-tnt.bat b/board/MAI/bios_emulator/scitech/bin/vc40-tnt.bat
deleted file mode 100755
index b0fc936..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-tnt.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\COFFLIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\COFFLIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_TNT=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-echo Visual C++ 4.2 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-w16.bat b/board/MAI/bios_emulator/scitech/bin/vc40-w16.bat
deleted file mode 100755
index 2849a20..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-w16.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\VC4;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\VC4;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET VC_LIBBASE=VC4
-SET USE_RTTARGET=
-SET USE_SNAP=
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16 bit Windows compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-w32.bat b/board/MAI/bios_emulator/scitech/bin/vc40-w32.bat
deleted file mode 100755
index d93a624..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-w32.bat
+++ /dev/null
@@ -1,37 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC4;%VC4_PATH%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC4_PATH%
-set C_INCLUDE=%VC4_PATH%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 4.2 32 bit Windows compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc40-x11.bat b/board/MAI/bios_emulator/scitech/bin/vc40-x11.bat
deleted file mode 100755
index a420a54..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc40-x11.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 4.2 32 bit edition
-
-SET LIB=%VC4_PATH%\LIB;.
-SET TOOLROOTDIR=%VC4_PATH%
-SET INCLUDE=\xc\include;%VC4_PATH%\INCLUDE
-SET INIT=%VC4_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=VC4
-PATH %SCITECH_BIN%;%VC4_PATH%\BIN;%DEFPATH%
-
-echo Visual C++ 4.2 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-c32.bat b/board/MAI/bios_emulator/scitech/bin/vc50-c32.bat
deleted file mode 100755
index 62d27b9..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-c32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-SET MSDevDir=%VC5_MSDevDir%
-SET MSVCDir=%VC5_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 5.0 32-bit Windows console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-d16.bat b/board/MAI/bios_emulator/scitech/bin/vc50-d16.bat
deleted file mode 100755
index c789c50..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-d16.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\VC5;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\VC5;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-drv9x.bat b/board/MAI/bios_emulator/scitech/bin/vc50-drv9x.bat
deleted file mode 100755
index 27a4a14..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-drv9x.bat
+++ /dev/null
@@ -1,21 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development
-call vc60-c32.bat > NUL
-
-REM: Extra stuff to set up for Windows 9x DDK development
-set MASTER_MAKE=1
-set DDKROOT=%W95_DDKROOT%
-set SDKROOT=%MSSDK%
-set C16_ROOT=%VC_PATH%
-set C32_ROOT=%VC6_PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows 9x driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-drvnt.bat b/board/MAI/bios_emulator/scitech/bin/vc50-drvnt.bat
deleted file mode 100755
index 17b2f25..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-drvnt.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc60-c32.bat sdk > NUL
-
-REM: Now setup stuff for the NT DDK build environment
-call ntddk.bat
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows NT driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-rtt.bat b/board/MAI/bios_emulator/scitech/bin/vc50-rtt.bat
deleted file mode 100755
index afb2fb1..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-rtt.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC5_PATH%\VC
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC5_PATH%\VC\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC5_PATH%\VC
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=1
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC5_PATH%\VC\BIN;%VC5_PATH%\SHAREDIDE\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 5.0 RTTarget-32 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-snp.bat b/board/MAI/bios_emulator/scitech/bin/vc50-snp.bat
deleted file mode 100755
index 22d2e13..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-snp.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off REM Setup environment variables for Visual C++ 5.0 32 bit
-edition
-
-SET MSDevDir=%VC5_MSDevDir%
-SET MSVCDir=%VC5_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=1
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 5.0 Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-tnt.bat b/board/MAI/bios_emulator/scitech/bin/vc50-tnt.bat
deleted file mode 100755
index 6b09199..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-tnt.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\COFFLIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC5;%VC5_PATH%\VC\LIB;%TNT_PATH%\COFFLIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC5_PATH%\VC
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC5_PATH%\VC\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC5_PATH%\VC
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_TNT=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC5_PATH%\VC\BIN;%VC5_PATH%\SHAREDIDE\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-echo Visual C++ 5.0 32-bit compilation environment set up (with TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-w16.bat b/board/MAI/bios_emulator/scitech/bin/vc50-w16.bat
deleted file mode 100755
index 52ab495..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-w16.bat
+++ /dev/null
@@ -1,27 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\VC5;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\VC5;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-w32.bat b/board/MAI/bios_emulator/scitech/bin/vc50-w32.bat
deleted file mode 100755
index 07bc5e5..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-w32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-SET MSDevDir=%VC5_MSDevDir%
-SET MSVCDir=%VC5_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC5;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE;
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 5.0 32-bit Windows console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc50-x11.bat b/board/MAI/bios_emulator/scitech/bin/vc50-x11.bat
deleted file mode 100755
index fe286bd..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc50-x11.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 5.0 32 bit edition
-
-SET LIB=%VC5_PATH%\VC\LIB;.
-SET TOOLROOTDIR=%VC5_PATH%\VC
-SET INCLUDE=\xc\include;%VC5_PATH%\VC\INCLUDE
-SET INIT=%VC5_PATH%\VC
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc5
-PATH %SCITECH_BIN%;%VC5_PATH%\VC\BIN;%VC5_PATH%\SHAREDIDE\BIN;%DEFPATH%
-
-echo Visual C++ 5.0 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-c32.bat b/board/MAI/bios_emulator/scitech/bin/vc60-c32.bat
deleted file mode 100755
index e98417d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-c32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET MSDevDir=%VC6_MSDevDir%
-SET MSVCDir=%VC6_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 6.0 32-bit Windows console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-d16.bat b/board/MAI/bios_emulator/scitech/bin/vc60-d16.bat
deleted file mode 100755
index 10855e0..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-d16.bat
+++ /dev/null
@@ -1,26 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\VC6;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\VC6;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-drv9x.bat b/board/MAI/bios_emulator/scitech/bin/vc60-drv9x.bat
deleted file mode 100755
index 27a4a14..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-drv9x.bat
+++ /dev/null
@@ -1,21 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development
-call vc60-c32.bat > NUL
-
-REM: Extra stuff to set up for Windows 9x DDK development
-set MASTER_MAKE=1
-set DDKROOT=%W95_DDKROOT%
-set SDKROOT=%MSSDK%
-set C16_ROOT=%VC_PATH%
-set C32_ROOT=%VC6_PATH%
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows 9x driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-drvnt.bat b/board/MAI/bios_emulator/scitech/bin/vc60-drvnt.bat
deleted file mode 100755
index 17b2f25..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-drvnt.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc60-c32.bat sdk > NUL
-
-REM: Now setup stuff for the NT DDK build environment
-call ntddk.bat
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows NT driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-drvw2k.bat b/board/MAI/bios_emulator/scitech/bin/vc60-drvw2k.bat
deleted file mode 100755
index f304293..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-drvw2k.bat
+++ /dev/null
@@ -1,17 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-REM: First setup for Win32 console development (with Platform SDK)
-call vc60-c32.bat sdk > NUL
-
-REM: Now setup stuff for the NT DDK build environment
-call w2kddk.bat
-
-if .%CHECKED%==.1 goto checked_build
-echo Release build enabled.
-goto done
-:checked_build
-echo Checked debug build enabled.
-goto done
-:done
-echo Visual C++ 6.0 Windows Windows 2000 driver compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-snp.bat b/board/MAI/bios_emulator/scitech/bin/vc60-snp.bat
deleted file mode 100755
index 5348ef9..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-snp.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET MSDevDir=%VC6_MSDevDir%
-SET MSVCDir=%VC6_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=
-SET WIN32_GUI=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=1
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-echo Visual C++ 6.0 Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-tnt.bat b/board/MAI/bios_emulator/scitech/bin/vc60-tnt.bat
deleted file mode 100755
index 1d8b5e3..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-tnt.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC6;%VC6_PATH%\VC98\LIB;%TNT_PATH%\COFFLIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\VC6;%VC6_PATH%\VC98\LIB;%TNT_PATH%\COFFLIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC6_PATH%\VC98
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC6_PATH%\VC98\INCLUDE;%TNT_PATH%\INCLUDE;
-set INIT=%VC6_PATH%\VC98
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_TNT=
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6 PATH
-%SCITECH_BIN%;%VC6_PATH%\VC98\BIN;%VC6_PATH%\COMMON\MSDEV98\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=
-
-echo Visual C++ 6.0 32-bit compilation environment set up (with TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-w16.bat b/board/MAI/bios_emulator/scitech/bin/vc60-w16.bat
deleted file mode 100755
index 70175c3..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-w16.bat
+++ /dev/null
@@ -1,27 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 1.52c 16 bit edition
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\VC6;%VC_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\VC6;%VC_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%VC_PATH%
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%VC_PATH%\INCLUDE;
-set INIT=%VC_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%VC_PATH%\BIN;%DEFPATH%%VC_CD_PATH%
-
-echo Visual C++ 1.52c 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-w32.bat b/board/MAI/bios_emulator/scitech/bin/vc60-w32.bat
deleted file mode 100755
index 2f8e7ab..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-w32.bat
+++ /dev/null
@@ -1,39 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET MSDevDir=%VC6_MSDevDir%
-SET MSVCDir=%VC6_MSVCDir%
-
-if .%CHECKED%==.1 goto checked_build
-set LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-set LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\VC6;%MSVCDir%\LIB;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-set TOOLROOTDIR=%MSVCDir%
-set C_INCLUDE=%MSVCDir%\INCLUDE;%TNT_PATH%\INCLUDE
-set INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-set INIT=%MSVCDir%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%MSVCDir%\BIN;%MSDevDir%\BIN;%TNT_PATH%\BIN;%DEFPATH%%VC32_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Visual C++ 6.0 32-bit Windows compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/vc60-x11.bat b/board/MAI/bios_emulator/scitech/bin/vc60-x11.bat
deleted file mode 100755
index 57b23d2..0000000
--- a/board/MAI/bios_emulator/scitech/bin/vc60-x11.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM Setup environment variables for Visual C++ 6.0 32 bit edition
-
-SET LIB=%VC6_PATH%\VC98\LIB;.
-SET TOOLROOTDIR=%VC6_PATH%\VC98
-SET INCLUDE=\xc\include;%VC6_PATH%\VC98\INCLUDE;
-SET INIT=%VC6_PATH%\VC98
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\VC32.MK
-SET USE_TNT=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET WIN32_GUI=1
-SET USE_VXD=
-SET USE_NTDRV=
-SET USE_RTTARGET=
-SET USE_SNAP=
-SET VC_LIBBASE=vc6
-PATH %SCITECH_BIN%;%VC6_PATH%\VC98\BIN;%VC6_PATH%\COMMON\MSDEV98\BIN;%DEFPATH%
-
-echo Visual C++ 6.0 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/w2kddk.bat b/board/MAI/bios_emulator/scitech/bin/w2kddk.bat
deleted file mode 100755
index 92858d1..0000000
--- a/board/MAI/bios_emulator/scitech/bin/w2kddk.bat
+++ /dev/null
@@ -1,42 +0,0 @@
-@echo off
-REM: Set up environment variables for Microsoft Windows NT DDK development.
-REM: Note that we have hard coded this for Windows NT i386 development.
-
-SET USE_NTDRV=1
-SET USE_W2KDRV=1
-SET BASEDIR=%W2K_DDKROOT%
-SET PATH=%BASEDIR%\bin;%PATH%
-SET NTMAKEENV=%BASEDIR%\inc
-SET BUILD_MAKE_PROGRAM=nmake.exe
-SET BUILD_DEFAULT=-ei -nmake -i
-SET BUILD_DEFAULT_TARGETS=-386
-SET _OBJ_DIR=obj
-SET NEW_CRTS=1
-SET _NTROOT=%BASEDIR%
-SET INCLUDE=%BASEDIR%\inc;%BASEDIR%\inc\ddk;%INCLUDE%
-
-if .%CHECKED%==.1 goto checked
-
-REM: set up an NT free build environment
-SET DDKBUILDENV=free
-SET C_DEFINES=-D_IDWBUILD
-SET NTDBGFILES=1
-SET NTDEBUG=
-SET NTDEBUGTYPE=
-SET MSC_OPTIMIZATION=
-set LIB=%BASEDIR%\libfre\i386;%SCITECH_LIB%\LIB\RELEASE\W2KDRV\VC6;%MSVCDir%\LIB;.
-
-goto done
-
-:checked
-
-REM: set up an NT checked build environment
-SET DDKBUILDENV=checked
-SET C_DEFINES=-D_IDWBUILD -DRDRDBG -DSRVDBG
-SET NTDBGFILES=
-SET NTDEBUG=ntsd
-SET NTDEBUGTYPE=both
-SET MSC_OPTIMIZATION=/Od /Oi
-set LIB=%BASEDIR%\libchk\i386;%SCITECH_LIB%\LIB\DEBUG\W2KDRV\VC6;%MSVCDir%\LIB;.
-
-:done
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-c32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-c32.bat
deleted file mode 100755
index 2d738f3..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-c32.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\NT;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 Win32 console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-d16.bat b/board/MAI/bios_emulator/scitech/bin/wc10-d16.bat
deleted file mode 100755
index 5c53a90..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-d16.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\WC10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\WC10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\WIN;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-d32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-d32.bat
deleted file mode 100755
index a5c7210..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-d32.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit DOS compilation environment set up (DOS4GW)
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-o16.bat b/board/MAI/bios_emulator/scitech/bin/wc10-o16.bat
deleted file mode 100755
index 579dece..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-o16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 16-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os216\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os216\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc16.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=1
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 16-bit OS/2 compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-o32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-o32.bat
deleted file mode 100755
index 3404b42..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-o32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit OS/2 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-p32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-p32.bat
deleted file mode 100755
index 57057de..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-p32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=1
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit OS/2 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-qnx.bat b/board/MAI/bios_emulator/scitech/bin/wc10-qnx.bat
deleted file mode 100755
index 46f8659..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-qnx.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode (QNX 4)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\QNX4\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\QNX;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\QNX4\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\QNX;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\QH;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=1
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 32-bit QNX compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-snp.bat b/board/MAI/bios_emulator/scitech/bin/wc10-snp.bat
deleted file mode 100755
index 1fde624..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=1
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-tnt.bat b/board/MAI/bios_emulator/scitech/bin/wc10-tnt.bat
deleted file mode 100755
index d12f042..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-tnt.bat
+++ /dev/null
@@ -1,46 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\NT;%TNT_PATH%\INCLUDE
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=1
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=1
-
-echo Watcom C/C++ 10.6 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-w16.bat b/board/MAI/bios_emulator/scitech/bin/wc10-w16.bat
deleted file mode 100755
index e8ba871..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-w16.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 16 bit Windows mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\WC10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\WC10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\WIN;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-w32.bat b/board/MAI/bios_emulator/scitech/bin/wc10-w32.bat
deleted file mode 100755
index 839bdde..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-w32.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10;%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10_PATH%\H;%WC10_PATH%\H\NT;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 Win32 GUI compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10-x11.bat b/board/MAI/bios_emulator/scitech/bin/wc10-x11.bat
deleted file mode 100755
index fc783d8..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10-x11.bat
+++ /dev/null
@@ -1,24 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.6 in 32 bit mode
-
-SET LIB=%WC10_PATH%\LIB386;%WC10_PATH%\LIB386\NT;.
-SET EDPATH=%WC10_PATH%\EDDAT
-SET INCLUDE=%WC10_PATH%\H;%WC10_PATH%\H\NT;
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC10
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.6 X11 compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ac32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ac32.bat
deleted file mode 100755
index 6e0c24d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ac32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\NT;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a Win32 console compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ad16.bat b/board/MAI/bios_emulator/scitech/bin/wc10ad16.bat
deleted file mode 100755
index f9ecb67..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ad16.bat
+++ /dev/null
@@ -1,29 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\WC10A;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\WC10A;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\WIN;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10A_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ad32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ad32.bat
deleted file mode 100755
index d52b79a..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ad32.bat
+++ /dev/null
@@ -1,32 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 32-bit DOS compilation environment set up (DOS4GW)
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ao16.bat b/board/MAI/bios_emulator/scitech/bin/wc10ao16.bat
deleted file mode 100755
index ba7351d..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ao16.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 16-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os216\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os216\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10A_PATH%\h\os2;%WC10A_PATH%\h
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc16.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=1
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=wc10
-SET EDPATH=%WC10A_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 16-bit OS/2 compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ao32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ao32.bat
deleted file mode 100755
index f3caa59..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ao32.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10AA_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10AA_PATH%\h\os2;%WC10AA_PATH%\h
-SET WATCOM=%WC10AA_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10AA_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10AA_PATH%\BINNT;%WC10AA6_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 32-bit OS/2 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10ap32.bat b/board/MAI/bios_emulator/scitech/bin/wc10ap32.bat
deleted file mode 100755
index 8d21c62..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10ap32.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc10;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc10;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC10_PATH%\h\os2;%WC10_PATH%\h
-SET WATCOM=%WC10_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=1
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10_PATH%\BINNT;%WC10_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 32-bit OS/2 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10asnp.bat b/board/MAI/bios_emulator/scitech/bin/wc10asnp.bat
deleted file mode 100755
index 28f857c..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10asnp.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=1
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a Snap compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10atnt.bat b/board/MAI/bios_emulator/scitech/bin/wc10atnt.bat
deleted file mode 100755
index a2b3219..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10atnt.bat
+++ /dev/null
@@ -1,45 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\NT;%TNT_PATH%\INCLUDE
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=1
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=1
-
-echo Watcom C/C++ 10.0a 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10aw16.bat b/board/MAI/bios_emulator/scitech/bin/wc10aw16.bat
deleted file mode 100755
index 94011cc..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10aw16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 16 bit Windows mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\WC10A;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\WC10A;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\WIN;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-SET EDPATH=%WC10A_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a 16-bit Windows compilation environment set up.
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc10aw32.bat b/board/MAI/bios_emulator/scitech/bin/wc10aw32.bat
deleted file mode 100755
index 1e14dbc..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc10aw32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 10.0a in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC10A;%WC10A_PATH%\LIB386;%WC10A_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC10A_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC10A_PATH%\H;%WC10A_PATH%\H\NT;
-SET WATCOM=%WC10A_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET WC_LIBBASE=WC10A
-PATH %SCITECH_BIN%;%WC10A_PATH%\BINNT;%WC10A_PATH%\BINB;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 10.0a Win32 GUI compilation environment set up
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-c32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-c32.bat
deleted file mode 100755
index e753129..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-c32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET C_INCLUDE=%WC11_PATH%\H;%WC11_PATH%\H\NT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Watcom C/C++ 11.0 Win32 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-d16.bat b/board/MAI/bios_emulator/scitech/bin/wc11-d16.bat
deleted file mode 100755
index 4338ada..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-d16.bat
+++ /dev/null
@@ -1,30 +0,0 @@
-@echo off
-REM SETup for compiling with Watcom C/C++ 11.0 in 16 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS16\WC11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS16\WC11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\WIN;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 16-bit DOS compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-d32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-d32.bat
deleted file mode 100755
index e5a54d4..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-d32.bat
+++ /dev/null
@@ -1,33 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode (DOS4GW)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit DOS compilation environment set up (DOS4GW).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-o16.bat b/board/MAI/bios_emulator/scitech/bin/wc11-o16.bat
deleted file mode 100755
index d46754a..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-o16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 16-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os216\wc11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os216\wc11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC11_PATH%\h\os2;%WC11_PATH%\h
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc16.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=1
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 16-bit OS/2 compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-o32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-o32.bat
deleted file mode 100755
index 37f5dc7..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-o32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC11_PATH%\h\os2;%WC11_PATH%\h
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit OS/2 console compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-p32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-p32.bat
deleted file mode 100755
index 348cbbd..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-p32.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32-bit OS/2 mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\lib\release\os232\wc11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\lib\debug\os232\wc11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\eddat
-SET INCLUDE=include;%SCITECH%\include;%PRIVATE%\include;%WC11_PATH%\h\os2;%WC11_PATH%\h
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\makedefs\wc32.mk
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=1
-SET USE_OS2GUI=1
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=wc11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit OS/2 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-qnx.bat b/board/MAI/bios_emulator/scitech/bin/wc11-qnx.bat
deleted file mode 100755
index 1fd60fe..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-qnx.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode (QNX 4)
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\QNX4\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\QNX;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\QNX4\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\QNX;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\QH;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=1
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DJ_PATH%\BIN;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 32-bit QNX compilation environment set up
-
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-snp.bat b/board/MAI/bios_emulator/scitech/bin/wc11-snp.bat
deleted file mode 100755
index 6d2ac57..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-snp.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\SNAP\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\SNAP\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET WIN32_GUI=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=1
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 Snap compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-tnt.bat b/board/MAI/bios_emulator/scitech/bin/wc11-tnt.bat
deleted file mode 100755
index 44dbf24..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-tnt.bat
+++ /dev/null
@@ -1,46 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode with Phar Lap TNT
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\DOS32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\DOS;%TNT_PATH%\LIB;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\NT;%TNT_PATH%\INCLUDE
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=1
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM If you set the following to a 1, a TNT DosStyle app will be created.
-REM Otherwise a TNT NtStyle app will be created. NtStyle apps will *only*
-REM run under real DOS when using our libraries, since we require access
-REM to functions that the Win32 API does not support (such as direct access
-REM to video memory, calling Int 10h BIOS functions etc). DosStyle apps
-REM will however run fine in both DOS and a Win95 DOS box (NT DOS boxes don't
-REM work too well).
-REM
-REM If you are using the RealTime DOS extender, your apps *must* be NtStyle,
-REM and hence will never be able to run under Win95 or WinNT, only DOS.
-
-SET DOSSTYLE=1
-
-echo Watcom C/C++ 11.0 32-bit DOS compilation environment set up (TNT).
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-w16.bat b/board/MAI/bios_emulator/scitech/bin/wc11-w16.bat
deleted file mode 100755
index e65c70e..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-w16.bat
+++ /dev/null
@@ -1,31 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 16 bit Windows mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN16\WC11;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN16\WC11;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\WIN;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC16.MK
-SET USE_WIN16=1
-SET USE_WIN32=
-SET USE_WIN386=
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-SET EDPATH=%WC11_PATH%\EDDAT
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 16-bit Windows compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-w32.bat b/board/MAI/bios_emulator/scitech/bin/wc11-w32.bat
deleted file mode 100755
index 764cdbd..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-w32.bat
+++ /dev/null
@@ -1,40 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET C_INCLUDE=%WC11_PATH%\H;%WC11_PATH%\H\NT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%C_INCLUDE%
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-REM: Enable Win32 SDK if desired (sdk on command line)
-if NOT .%1%==.sdk goto done
-call win32sdk.bat
-
-:done
-echo Watcom C/C++ 11.0 Win32 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/wc11-x11.bat b/board/MAI/bios_emulator/scitech/bin/wc11-x11.bat
deleted file mode 100755
index c2569a3..0000000
--- a/board/MAI/bios_emulator/scitech/bin/wc11-x11.bat
+++ /dev/null
@@ -1,34 +0,0 @@
-@echo off
-REM Setup for compiling with Watcom C/C++ 11.0 in 32 bit mode
-
-if .%CHECKED%==.1 goto checked_build
-SET LIB=%SCITECH_LIB%\LIB\RELEASE\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Release build enabled.
-goto setvars
-
-:checked_build
-SET LIB=%SCITECH_LIB%\LIB\DEBUG\WIN32\WC11;%WC11_PATH%\LIB386;%WC11_PATH%\LIB386\NT;.
-echo Checked debug build enabled.
-goto setvars
-
-:setvars
-SET EDPATH=%WC11_PATH%\EDDAT
-SET INCLUDE=INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%WC11_PATH%\H;%WC11_PATH%\H\NT;
-SET WATCOM=%WC11_PATH%
-SET MAKESTARTUP=%SCITECH%\MAKEDEFS\WC32.MK
-SET USE_TNT=
-SET USE_X32=
-SET USE_X32VM=
-SET USE_WIN16=
-SET USE_WIN32=1
-SET USE_WIN386=
-SET WIN32_GUI=1
-SET USE_OS216=
-SET USE_OS232=
-SET USE_OS2GUI=
-SET USE_SNAP=
-SET USE_QNX4=
-SET WC_LIBBASE=WC11
-PATH %SCITECH_BIN%;%WC11_PATH%\BINNT;%WC11_PATH%\BINW;%DEFPATH%%WC_CD_PATH%
-
-echo Watcom C/C++ 11.0 Win32 GUI compilation environment set up.
diff --git a/board/MAI/bios_emulator/scitech/bin/win32sdk.bat b/board/MAI/bios_emulator/scitech/bin/win32sdk.bat
deleted file mode 100755
index 3c7f017..0000000
--- a/board/MAI/bios_emulator/scitech/bin/win32sdk.bat
+++ /dev/null
@@ -1,20 +0,0 @@
-@echo off
-REM: Set up environment variables for Microsoft Platform SDK development
-REM: Note that we have hard coded this for Windows NT i386 development.
-
-SET MSTOOLS=%MSSDK%
-SET DXSDKROOT=%MSTOOLS%
-SET INETSDK=%MSTOOLS%
-SET BKOFFICE=%MSTOOLS%
-SET BASEMAKE=%BKOFFICE%\INCLUDE\BKOffice.Mak
-SET INCLUDE=.;INCLUDE;%SCITECH%\INCLUDE;%PRIVATE%\INCLUDE;%MSTOOLS%\INCLUDE;%C_INCLUDE%
-if .%1%==.borland goto borland
-SET LIB=%MSTOOLS%\LIB;%LIB%
-goto notborland
-:borland
-SET LIB=%MSTOOLS%\LIB\BORLAND;%LIB%
-:notborland
-SET PATH=%MSTOOLS%\Bin\;%MSTOOLS%\Bin\WinNT;%PATH%
-SET CPU=i386
-
-echo Microsoft Platform SDK support enbabled.
diff --git a/board/MAI/bios_emulator/scitech/include/biosemu.h b/board/MAI/bios_emulator/scitech/include/biosemu.h
deleted file mode 100644
index 82c33a7..0000000
--- a/board/MAI/bios_emulator/scitech/include/biosemu.h
+++ /dev/null
@@ -1,154 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for the real mode x86 BIOS emulator, which is
-* used to warmboot any number of VGA compatible PCI/AGP
-* controllers under any OS, on any processor family that
-* supports PCI. We also allow the user application to call
-* real mode BIOS functions and Int 10h functions (including
-* the VESA BIOS).
-*
-****************************************************************************/
-
-#ifndef __BIOSEMU_H
-#define __BIOSEMU_H
-
-#include "x86emu.h"
-#include "pmapi.h"
-#include "pcilib.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/****************************************************************************
-REMARKS:
-Data structure used to describe the details specific to a particular VGA
-controller. This information is used to allow the VGA controller to be
-swapped on the fly within the BIOS emulator.
-
-HEADER:
-biosemu.h
-
-MEMBERS:
-pciInfo - PCI device information block for the controller
-BIOSImage - Pointer to a read/write copy of the BIOS image
-BIOSImageLen - Length of the BIOS image
-LowMem - Copy of key low memory areas
-****************************************************************************/
-typedef struct {
- PCIDeviceInfo *pciInfo;
- void *BIOSImage;
- ulong BIOSImageLen;
- uchar LowMem[1536];
- } BE_VGAInfo;
-
-/****************************************************************************
-REMARKS:
-Data structure used to describe the details for the BIOS emulator system
-environment as used by the X86 emulator library.
-
-HEADER:
-biosemu.h
-
-MEMBERS:
-vgaInfo - VGA BIOS information structure
-biosmem_base - Base of the BIOS image
-biosmem_limit - Limit of the BIOS image
-busmem_base - Base of the VGA bus memory
-****************************************************************************/
-typedef struct {
- BE_VGAInfo vgaInfo;
- ulong biosmem_base;
- ulong biosmem_limit;
- ulong busmem_base;
- } BE_sysEnv;
-
-/****************************************************************************
-REMARKS:
-Structure defining all the BIOS Emulator API functions as exported from
-the Binary Portable DLL.
-{secret}
-****************************************************************************/
-typedef struct {
- ulong dwSize;
- ibool (PMAPIP BE_init)(u32 debugFlags,int memSize,BE_VGAInfo *info);
- void (PMAPIP BE_setVGA)(BE_VGAInfo *info);
- void (PMAPIP BE_getVGA)(BE_VGAInfo *info);
- void * (PMAPIP BE_mapRealPointer)(uint r_seg,uint r_off);
- void * (PMAPIP BE_getVESABuf)(uint *len,uint *rseg,uint *roff);
- void (PMAPIP BE_callRealMode)(uint seg,uint off,RMREGS *regs,RMSREGS *sregs);
- int (PMAPIP BE_int86)(int intno,RMREGS *in,RMREGS *out);
- int (PMAPIP BE_int86x)(int intno,RMREGS *in,RMREGS *out,RMSREGS *sregs);
- void * reserved1;
- void (PMAPIP BE_exit)(void);
- } BE_exports;
-
-/****************************************************************************
-REMARKS:
-Function pointer type for the Binary Portable DLL initialisation entry point.
-{secret}
-****************************************************************************/
-typedef BE_exports * (PMAPIP BE_initLibrary_t)(PM_imports *PMImp);
-
-#pragma pack()
-
-/*---------------------------- Global variables ---------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* {secret} Global BIOS emulator system environment */
-extern BE_sysEnv _BE_env;
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* BIOS emulator library entry points */
-
-ibool PMAPI BE_init(u32 debugFlags,int memSize,BE_VGAInfo *info);
-void PMAPI BE_setVGA(BE_VGAInfo *info);
-void PMAPI BE_getVGA(BE_VGAInfo *info);
-void PMAPI BE_setDebugFlags(u32 debugFlags);
-void * PMAPI BE_mapRealPointer(uint r_seg,uint r_off);
-void * PMAPI BE_getVESABuf(uint *len,uint *rseg,uint *roff);
-void PMAPI BE_callRealMode(uint seg,uint off,RMREGS *regs,RMSREGS *sregs);
-int PMAPI BE_int86(int intno,RMREGS *in,RMREGS *out);
-int PMAPI BE_int86x(int intno,RMREGS *in,RMREGS *out,RMSREGS *sregs);
-void PMAPI BE_exit(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __BIOSEMU_H */
diff --git a/board/MAI/bios_emulator/scitech/include/event.h b/board/MAI/bios_emulator/scitech/include/event.h
deleted file mode 100644
index beeac87..0000000
--- a/board/MAI/bios_emulator/scitech/include/event.h
+++ /dev/null
@@ -1,696 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file for the SciTech cross platform event library
-*
-****************************************************************************/
-
-#ifndef __EVENT_H
-#define __EVENT_H
-
-#include "scitech.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/* 'C' calling conventions always */
-
-#define EVTAPI _ASMAPI
-#define EVTAPIP _ASMAPIP
-
-/* Event message masks for keyDown events */
-
-#define EVT_ASCIIMASK 0x00FF /* ASCII code of key pressed */
-#define EVT_SCANMASK 0xFF00 /* Scan code of key pressed */
-#define EVT_COUNTMASK 0x7FFF0000L /* Count for KEYREPEAT's */
-
-/* Macros to extract values from the message fields */
-
-#define EVT_asciiCode(m) ( (uchar) (m & EVT_ASCIIMASK) )
-#define EVT_scanCode(m) ( (uchar) ( (m & EVT_SCANMASK) >> 8 ) )
-#define EVT_repeatCount(m) ( (short) ( (m & EVT_COUNTMASK) >> 16 ) )
-
-/****************************************************************************
-REMARKS:
-Defines the set of ASCII codes reported by the event library functions
-in the message field. Use the EVT_asciiCode macro to extract the code
-from the event structure.
-
-HEADER:
-event.h
-****************************************************************************/
-typedef enum {
- ASCII_ctrlA = 0x01,
- ASCII_ctrlB = 0x02,
- ASCII_ctrlC = 0x03,
- ASCII_ctrlD = 0x04,
- ASCII_ctrlE = 0x05,
- ASCII_ctrlF = 0x06,
- ASCII_ctrlG = 0x07,
- ASCII_backspace = 0x08,
- ASCII_ctrlH = 0x08,
- ASCII_tab = 0x09,
- ASCII_ctrlI = 0x09,
- ASCII_ctrlJ = 0x0A,
- ASCII_ctrlK = 0x0B,
- ASCII_ctrlL = 0x0C,
- ASCII_enter = 0x0D,
- ASCII_ctrlM = 0x0D,
- ASCII_ctrlN = 0x0E,
- ASCII_ctrlO = 0x0F,
- ASCII_ctrlP = 0x10,
- ASCII_ctrlQ = 0x11,
- ASCII_ctrlR = 0x12,
- ASCII_ctrlS = 0x13,
- ASCII_ctrlT = 0x14,
- ASCII_ctrlU = 0x15,
- ASCII_ctrlV = 0x16,
- ASCII_ctrlW = 0x17,
- ASCII_ctrlX = 0x18,
- ASCII_ctrlY = 0x19,
- ASCII_ctrlZ = 0x1A,
- ASCII_esc = 0x1B,
- ASCII_space = 0x20,
- ASCII_exclamation = 0x21, /* ! */
- ASCII_quote = 0x22, /* " */
- ASCII_pound = 0x23, /* # */
- ASCII_dollar = 0x24, /* $ */
- ASCII_percent = 0x25, /* % */
- ASCII_ampersand = 0x26, /* & */
- ASCII_apostrophe = 0x27, /* ' */
- ASCII_leftBrace = 0x28, /* ( */
- ASCII_rightBrace = 0x29, /* ) */
- ASCII_times = 0x2A, /* * */
- ASCII_plus = 0x2B, /* + */
- ASCII_comma = 0x2C, /* , */
- ASCII_minus = 0x2D, /* - */
- ASCII_period = 0x2E, /* . */
- ASCII_divide = 0x2F, /* / */
- ASCII_0 = 0x30,
- ASCII_1 = 0x31,
- ASCII_2 = 0x32,
- ASCII_3 = 0x33,
- ASCII_4 = 0x34,
- ASCII_5 = 0x35,
- ASCII_6 = 0x36,
- ASCII_7 = 0x37,
- ASCII_8 = 0x38,
- ASCII_9 = 0x39,
- ASCII_colon = 0x3A, /* : */
- ASCII_semicolon = 0x3B, /* ; */
- ASCII_lessThan = 0x3C, /* < */
- ASCII_equals = 0x3D, /* = */
- ASCII_greaterThan = 0x3E, /* > */
- ASCII_question = 0x3F, /* ? */
- ASCII_at = 0x40, /* @ */
- ASCII_A = 0x41,
- ASCII_B = 0x42,
- ASCII_C = 0x43,
- ASCII_D = 0x44,
- ASCII_E = 0x45,
- ASCII_F = 0x46,
- ASCII_G = 0x47,
- ASCII_H = 0x48,
- ASCII_I = 0x49,
- ASCII_J = 0x4A,
- ASCII_K = 0x4B,
- ASCII_L = 0x4C,
- ASCII_M = 0x4D,
- ASCII_N = 0x4E,
- ASCII_O = 0x4F,
- ASCII_P = 0x50,
- ASCII_Q = 0x51,
- ASCII_R = 0x52,
- ASCII_S = 0x53,
- ASCII_T = 0x54,
- ASCII_U = 0x55,
- ASCII_V = 0x56,
- ASCII_W = 0x57,
- ASCII_X = 0x58,
- ASCII_Y = 0x59,
- ASCII_Z = 0x5A,
- ASCII_leftSquareBrace = 0x5B, /* [ */
- ASCII_backSlash = 0x5C, /* \ */
- ASCII_rightSquareBrace = 0x5D, /* ] */
- ASCII_caret = 0x5E, /* ^ */
- ASCII_underscore = 0x5F, /* _ */
- ASCII_leftApostrophe = 0x60, /* ` */
- ASCII_a = 0x61,
- ASCII_b = 0x62,
- ASCII_c = 0x63,
- ASCII_d = 0x64,
- ASCII_e = 0x65,
- ASCII_f = 0x66,
- ASCII_g = 0x67,
- ASCII_h = 0x68,
- ASCII_i = 0x69,
- ASCII_j = 0x6A,
- ASCII_k = 0x6B,
- ASCII_l = 0x6C,
- ASCII_m = 0x6D,
- ASCII_n = 0x6E,
- ASCII_o = 0x6F,
- ASCII_p = 0x70,
- ASCII_q = 0x71,
- ASCII_r = 0x72,
- ASCII_s = 0x73,
- ASCII_t = 0x74,
- ASCII_u = 0x75,
- ASCII_v = 0x76,
- ASCII_w = 0x77,
- ASCII_x = 0x78,
- ASCII_y = 0x79,
- ASCII_z = 0x7A,
- ASCII_leftCurlyBrace = 0x7B, /* { */
- ASCII_verticalBar = 0x7C, /* | */
- ASCII_rightCurlyBrace = 0x7D, /* } */
- ASCII_tilde = 0x7E /* ~ */
- } EVT_asciiCodesType;
-
-/****************************************************************************
-REMARKS:
-Defines the set of scan codes reported by the event library functions
-in the message field. Use the EVT_scanCode macro to extract the code
-from the event structure. Note that the scan codes reported will be the
-same across all keyboards (assuming the placement of keys on a 101 key US
-keyboard), but the translated ASCII values may be different depending on
-the country code pages in use.
-
-NOTE: Scan codes in the event library are not really hardware scan codes,
- but rather virtual scan codes as generated by a low level keyboard
- interface driver. All virtual codes begin with scan code 0x60 and
- range up from there.
-
-HEADER:
-event.h
-****************************************************************************/
-typedef enum {
- KB_padEnter = 0x60, /* Keypad keys */
- KB_padMinus = 0x4A,
- KB_padPlus = 0x4E,
- KB_padTimes = 0x37,
- KB_padDivide = 0x61,
- KB_padLeft = 0x62,
- KB_padRight = 0x63,
- KB_padUp = 0x64,
- KB_padDown = 0x65,
- KB_padInsert = 0x66,
- KB_padDelete = 0x67,
- KB_padHome = 0x68,
- KB_padEnd = 0x69,
- KB_padPageUp = 0x6A,
- KB_padPageDown = 0x6B,
- KB_padCenter = 0x4C,
- KB_F1 = 0x3B, /* Function keys */
- KB_F2 = 0x3C,
- KB_F3 = 0x3D,
- KB_F4 = 0x3E,
- KB_F5 = 0x3F,
- KB_F6 = 0x40,
- KB_F7 = 0x41,
- KB_F8 = 0x42,
- KB_F9 = 0x43,
- KB_F10 = 0x44,
- KB_F11 = 0x57,
- KB_F12 = 0x58,
- KB_left = 0x4B, /* Cursor control keys */
- KB_right = 0x4D,
- KB_up = 0x48,
- KB_down = 0x50,
- KB_insert = 0x52,
- KB_delete = 0x53,
- KB_home = 0x47,
- KB_end = 0x4F,
- KB_pageUp = 0x49,
- KB_pageDown = 0x51,
- KB_capsLock = 0x3A,
- KB_numLock = 0x45,
- KB_scrollLock = 0x46,
- KB_leftShift = 0x2A,
- KB_rightShift = 0x36,
- KB_leftCtrl = 0x1D,
- KB_rightCtrl = 0x6C,
- KB_leftAlt = 0x38,
- KB_rightAlt = 0x6D,
- KB_leftWindows = 0x5B,
- KB_rightWindows = 0x5C,
- KB_menu = 0x5D,
- KB_sysReq = 0x54,
- KB_esc = 0x01, /* Normal keyboard keys */
- KB_1 = 0x02,
- KB_2 = 0x03,
- KB_3 = 0x04,
- KB_4 = 0x05,
- KB_5 = 0x06,
- KB_6 = 0x07,
- KB_7 = 0x08,
- KB_8 = 0x09,
- KB_9 = 0x0A,
- KB_0 = 0x0B,
- KB_minus = 0x0C,
- KB_equals = 0x0D,
- KB_backSlash = 0x2B,
- KB_backspace = 0x0E,
- KB_tab = 0x0F,
- KB_Q = 0x10,
- KB_W = 0x11,
- KB_E = 0x12,
- KB_R = 0x13,
- KB_T = 0x14,
- KB_Y = 0x15,
- KB_U = 0x16,
- KB_I = 0x17,
- KB_O = 0x18,
- KB_P = 0x19,
- KB_leftSquareBrace = 0x1A,
- KB_rightSquareBrace = 0x1B,
- KB_enter = 0x1C,
- KB_A = 0x1E,
- KB_S = 0x1F,
- KB_D = 0x20,
- KB_F = 0x21,
- KB_G = 0x22,
- KB_H = 0x23,
- KB_J = 0x24,
- KB_K = 0x25,
- KB_L = 0x26,
- KB_semicolon = 0x27,
- KB_apostrophe = 0x28,
- KB_Z = 0x2C,
- KB_X = 0x2D,
- KB_C = 0x2E,
- KB_V = 0x2F,
- KB_B = 0x30,
- KB_N = 0x31,
- KB_M = 0x32,
- KB_comma = 0x33,
- KB_period = 0x34,
- KB_divide = 0x35,
- KB_space = 0x39,
- KB_tilde = 0x29
- } EVT_scanCodesType;
-
-/****************************************************************************
-REMARKS:
-Defines the mask for the joystick axes that are present
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_JOY_AXIS_X1 - Joystick 1, X axis is present
-EVT_JOY_AXIS_Y1 - Joystick 1, Y axis is present
-EVT_JOY_AXIS_X2 - Joystick 2, X axis is present
-EVT_JOY_AXIS_Y2 - Joystick 2, Y axis is present
-EVT_JOY_AXIS_ALL - Mask for all axes
-****************************************************************************/
-typedef enum {
- EVT_JOY_AXIS_X1 = 0x00000001,
- EVT_JOY_AXIS_Y1 = 0x00000002,
- EVT_JOY_AXIS_X2 = 0x00000004,
- EVT_JOY_AXIS_Y2 = 0x00000008,
- EVT_JOY_AXIS_ALL = 0x0000000F
- } EVT_eventJoyAxisType;
-
-/****************************************************************************
-REMARKS:
-Defines the event message masks for joystick events
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_JOY1_BUTTONA - Joystick 1, button A is down
-EVT_JOY1_BUTTONB - Joystick 1, button B is down
-EVT_JOY2_BUTTONA - Joystick 2, button A is down
-EVT_JOY2_BUTTONB - Joystick 2, button B is down
-****************************************************************************/
-typedef enum {
- EVT_JOY1_BUTTONA = 0x00000001,
- EVT_JOY1_BUTTONB = 0x00000002,
- EVT_JOY2_BUTTONA = 0x00000004,
- EVT_JOY2_BUTTONB = 0x00000008
- } EVT_eventJoyMaskType;
-
-/****************************************************************************
-REMARKS:
-Defines the event message masks for mouse events
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_LEFTBMASK - Left button is held down
-EVT_RIGHTBMASK - Right button is held down
-EVT_MIDDLEBMASK - Middle button is held down
-EVT_BOTHBMASK - Both left and right held down together
-EVT_ALLBMASK - All buttons pressed
-EVT_DBLCLICK - Set if mouse down event was a double click
-****************************************************************************/
-typedef enum {
- EVT_LEFTBMASK = 0x00000001,
- EVT_RIGHTBMASK = 0x00000002,
- EVT_MIDDLEBMASK = 0x00000004,
- EVT_BOTHBMASK = 0x00000007,
- EVT_ALLBMASK = 0x00000007,
- EVT_DBLCLICK = 0x00010000
- } EVT_eventMouseMaskType;
-
-/****************************************************************************
-REMARKS:
-Defines the event modifier masks. These are the masks used to extract
-the modifier information from the modifiers field of the event_t structure.
-Note that the values in the modifiers field represent the values of these
-modifier keys at the time the event occurred, not the time you decided
-to process the event.
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_LEFTBUT - Set if left mouse button was down
-EVT_RIGHTBUT - Set if right mouse button was down
-EVT_MIDDLEBUT - Set if the middle button was down
-EVT_RIGHTSHIFT - Set if right shift was down
-EVT_LEFTSHIFT - Set if left shift was down
-EVT_RIGHTCTRL - Set if right ctrl key was down
-EVT_RIGHTALT - Set if right alt key was down
-EVT_LEFTCTRL - Set if left ctrl key was down
-EVT_LEFTALT - Set if left alt key was down
-EVT_SHIFTKEY - Mask for any shift key down
-EVT_CTRLSTATE - Set if ctrl key was down
-EVT_ALTSTATE - Set if alt key was down
-EVT_CAPSLOCK - Caps lock is active
-EVT_NUMLOCK - Num lock is active
-EVT_SCROLLLOCK - Scroll lock is active
-****************************************************************************/
-typedef enum {
- EVT_LEFTBUT = 0x00000001,
- EVT_RIGHTBUT = 0x00000002,
- EVT_MIDDLEBUT = 0x00000004,
- EVT_RIGHTSHIFT = 0x00000008,
- EVT_LEFTSHIFT = 0x00000010,
- EVT_RIGHTCTRL = 0x00000020,
- EVT_RIGHTALT = 0x00000040,
- EVT_LEFTCTRL = 0x00000080,
- EVT_LEFTALT = 0x00000100,
- EVT_SHIFTKEY = 0x00000018,
- EVT_CTRLSTATE = 0x000000A0,
- EVT_ALTSTATE = 0x00000140,
- EVT_SCROLLLOCK = 0x00000200,
- EVT_NUMLOCK = 0x00000400,
- EVT_CAPSLOCK = 0x00000800
- } EVT_eventModMaskType;
-
-/****************************************************************************
-REMARKS:
-Defines the event codes returned in the event_t structures what field. Note
-that these are defined as a set of mutually exlusive bit fields, so you
-can test for multiple event types using the combined event masks defined
-in the EVT_eventMaskType enumeration.
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_NULLEVT - A null event
-EVT_KEYDOWN - Key down event
-EVT_KEYREPEAT - Key repeat event
-EVT_KEYUP - Key up event
-EVT_MOUSEDOWN - Mouse down event
-EVT_MOUSEAUTO - Mouse down autorepeat event
-EVT_MOUSEUP - Mouse up event
-EVT_MOUSEMOVE - Mouse movement event
-EVT_JOYCLICK - Joystick button state change event
-EVT_JOYMOVE - Joystick movement event
-EVT_USEREVT - First user event
-****************************************************************************/
-typedef enum {
- EVT_NULLEVT = 0x00000000,
- EVT_KEYDOWN = 0x00000001,
- EVT_KEYREPEAT = 0x00000002,
- EVT_KEYUP = 0x00000004,
- EVT_MOUSEDOWN = 0x00000008,
- EVT_MOUSEAUTO = 0x00000010,
- EVT_MOUSEUP = 0x00000020,
- EVT_MOUSEMOVE = 0x00000040,
- EVT_JOYCLICK = 0x00000080,
- EVT_JOYMOVE = 0x00000100,
- EVT_USEREVT = 0x00000200
- } EVT_eventType;
-
-/****************************************************************************
-REMARKS:
-Defines the event code masks you can use to test for multiple types of
-events, since the event codes are mutually exlusive bit fields.
-
-HEADER:
-event.h
-
-MEMBERS:
-EVT_KEYEVT - Mask for any key event
-EVT_MOUSEEVT - Mask for any mouse event
-EVT_MOUSECLICK - Mask for any mouse click event
-EVT_JOYEVT - Mask for any joystick event
-EVT_EVERYEVT - Mask for any event
-****************************************************************************/
-typedef enum {
- EVT_KEYEVT = (EVT_KEYDOWN | EVT_KEYREPEAT | EVT_KEYUP),
- EVT_MOUSEEVT = (EVT_MOUSEDOWN | EVT_MOUSEAUTO | EVT_MOUSEUP | EVT_MOUSEMOVE),
- EVT_MOUSECLICK = (EVT_MOUSEDOWN | EVT_MOUSEUP),
- EVT_JOYEVT = (EVT_JOYCLICK | EVT_JOYMOVE),
- EVT_EVERYEVT = 0x7FFFFFFF
- } EVT_eventMaskType;
-
-/****************************************************************************
-REMARKS:
-Structure describing the information contained in an event extracted from
-the event queue.
-
-HEADER:
-event.h
-
-MEMBERS:
-which - Window identifier for message for use by high level window manager
- code (i.e. MegaVision GUI or Windows API).
-what - Type of event that occurred. Will be one of the values defined by
- the EVT_eventType enumeration.
-when - Time that the event occurred in milliseconds since startup
-where_x - X coordinate of the mouse cursor location at the time of the event
- (in screen coordinates). For joystick events this represents
- the position of the first joystick X axis.
-where_y - Y coordinate of the mouse cursor location at the time of the event
- (in screen coordinates). For joystick events this represents
- the position of the first joystick Y axis.
-relative_x - Relative movement of the mouse cursor in the X direction (in
- units of mickeys, or 1/200th of an inch). For joystick events
- this represents the position of the second joystick X axis.
-relative_y - Relative movement of the mouse cursor in the Y direction (in
- units of mickeys, or 1/200th of an inch). For joystick events
- this represents the position of the second joystick Y axis.
-message - Event specific message for the event. For use events this can be
- any user specific information. For keyboard events this contains
- the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and
- the character repeat count in bits 16-30. You can use the
- EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract
- this information from the message field. For mouse events this
- contains information about which button was pressed, and will be a
- combination of the flags defined by the EVT_eventMouseMaskType
- enumeration. For joystick events, this conatins information
- about which buttons were pressed, and will be a combination of
- the flags defined by the EVT_eventJoyMaskType enumeration.
-modifiers - Contains additional information about the state of the keyboard
- shift modifiers (Ctrl, Alt and Shift keys) when the event
- occurred. For mouse events it will also contain the state of
- the mouse buttons. Will be a combination of the values defined
- by the EVT_eventModMaskType enumeration.
-next - Internal use; do not use.
-prev - Internal use; do not use.
-****************************************************************************/
-typedef struct {
- ulong which;
- ulong what;
- ulong when;
- int where_x;
- int where_y;
- int relative_x;
- int relative_y;
- ulong message;
- ulong modifiers;
- int next;
- int prev;
- } event_t;
-
-/****************************************************************************
-REMARKS:
-Structure describing an entry in the code page table. A table of translation
-codes for scan codes to ASCII codes is provided in this table to be used
-by the keyboard event libraries. On some OS'es the keyboard translation is
-handled by the OS, but for DOS and embedded systems you must register a
-different code page translation table if you want to support keyboards
-other than the US English keyboard (the default).
-
-NOTE: Entries in code page tables *must* be in ascending order for the
- scan codes as we do a binary search on the tables for the ASCII
- code equivalents.
-
-HEADER:
-event.h
-
-MEMBERS:
-scanCode - Scan code to translate (really the virtual scan code).
-asciiCode - ASCII code for this scan code.
-****************************************************************************/
-typedef struct {
- uchar scanCode;
- uchar asciiCode;
- } codepage_entry_t;
-
-/****************************************************************************
-REMARKS:
-Structure describing a complete code page translation table. The table
-contains translation tables for normal keys, shifted keys and ctrl keys.
-The Ctrl key always has precedence over the shift table, and the shift
-table is used when the shift key is down or the CAPSLOCK key is down.
-
-HEADER:
-event.h
-
-MEMBERS:
-name - Name of the code page table (ie: "US English")
-normal - Code page for translating normal keys
-normalLen - Length of normal translation table
-caps - Code page for translating keys when CAPSLOCK is down
-capsLen - Length of CAPSLOCK translation table
-shift - Code page for shifted keys (ie: shift key is held down)
-shiftLen - Length of shifted translation table
-shiftCaps - Code page for shifted keys when CAPSLOCK is down
-shiftCapsLen - Length of shifted CAPSLOCK translation table
-ctrl - Code page for ctrl'ed keys (ie: ctrl key is held down)
-ctrlLen - Length of ctrl'ed translation table
-numPad - Code page for NUMLOCK'ed keypad keys
-numPadLen - Length of NUMLOCK'ed translation table
-****************************************************************************/
-typedef struct {
- char name[20];
- codepage_entry_t *normal;
- int normalLen;
- codepage_entry_t *caps;
- int capsLen;
- codepage_entry_t *shift;
- int shiftLen;
- codepage_entry_t *shiftCaps;
- int shiftCapsLen;
- codepage_entry_t *ctrl;
- int ctrlLen;
- codepage_entry_t *numPad;
- int numPadLen;
- } codepage_t;
-
-/* {secret} */
-typedef ibool (EVTAPIP _EVT_userEventFilter)(event_t *evt);
-/* {secret} */
-typedef void (EVTAPIP _EVT_mouseMoveHandler)(int x,int y);
-/* {secret} */
-typedef void (EVTAPIP _EVT_heartBeatCallback)(void *params);
-
-/* Macro to find the size of a static array */
-
-#define EVT_ARR_SIZE(a) (sizeof(a)/sizeof((a)[0]))
-
-#pragma pack()
-
-/*--------------------------- Global variables ----------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Standard code page tables */
-
-extern codepage_t _CP_US_English;
-
-/*------------------------- Function Prototypes ---------------------------*/
-
-/* Public API functions for user applications */
-
-ibool EVTAPI EVT_getNext(event_t *evt,ulong mask);
-ibool EVTAPI EVT_peekNext(event_t *evt,ulong mask);
-ibool EVTAPI EVT_post(ulong which,ulong what,ulong message,ulong modifiers);
-void EVTAPI EVT_flush(ulong mask);
-void EVTAPI EVT_halt(event_t *evt,ulong mask);
-ibool EVTAPI EVT_isKeyDown(uchar scanCode);
-void EVTAPI EVT_setMousePos(int x,int y);
-void EVTAPI EVT_getMousePos(int *x,int *y);
-
-/* Function to enable/disable updating of keyboard LED status indicators */
-
-void EVTAPI EVT_allowLEDS(ibool enable);
-
-/* Function to install a custom keyboard code page. Default is US English */
-
-codepage_t *EVTAPI EVT_getCodePage(void);
-void EVTAPI EVT_setCodePage(codepage_t *page);
-
-/* Functions for fine grained joystick calibration */
-
-void EVTAPI EVT_pollJoystick(void);
-int EVTAPI EVT_joyIsPresent(void);
-void EVTAPI EVT_joySetUpperLeft(void);
-void EVTAPI EVT_joySetLowerRight(void);
-void EVTAPI EVT_joySetCenter(void);
-
-/* Install user supplied event filter callback */
-
-void EVTAPI EVT_setUserEventFilter(_EVT_userEventFilter filter);
-
-/* Install user supplied event heartbeat callback function */
-
-void EVTAPI EVT_setHeartBeatCallback(_EVT_heartBeatCallback callback,void *params);
-void EVTAPI EVT_getHeartBeatCallback(_EVT_heartBeatCallback *callback,void **params);
-
-/* Internal functions to initialise and kill the event manager. MGL
- * applications should never call these functions directly as the MGL
- * libraries do it for you.
- */
-
-/* {secret} */
-void EVTAPI EVT_init(_EVT_mouseMoveHandler mouseMove);
-/* {secret} */
-void EVTAPI EVT_setMouseRange(int xRes,int yRes);
-/* {secret} */
-void EVTAPI EVT_suspend(void);
-/* {secret} */
-void EVTAPI EVT_resume(void);
-/* {secret} */
-void EVTAPI EVT_exit(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif /* __cplusplus */
-
-#endif /* __EVENT_H */
diff --git a/board/MAI/bios_emulator/scitech/include/mtrr.h b/board/MAI/bios_emulator/scitech/include/mtrr.h
deleted file mode 100644
index b29812c..0000000
--- a/board/MAI/bios_emulator/scitech/include/mtrr.h
+++ /dev/null
@@ -1,72 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Include file defining the external ring 0 helper functions
-* needed by the MTRR module. These functions may be included
-* directly for native ring 0 device drivers, or they may
-* be calls down to a ring 0 helper device driver where
-* appropriate (or the entire MTRR module may be located in
-* the device driver if the device driver is 32-bit).
-*
-****************************************************************************/
-
-#ifndef __MTRR_H
-#define __MTRR_H
-
-#include "scitech.h"
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Internal functions (requires ring 0 access or helper functions!) */
-
-void MTRR_init(void);
-int MTRR_enableWriteCombine(ulong base,ulong size,uint type);
-
-/* External assembler helper functions */
-
-ibool _ASMAPI _MTRR_isRing0(void);
-ulong _ASMAPI _MTRR_disableInt(void);
-void _ASMAPI _MTRR_restoreInt(ulong flags);
-ulong _ASMAPI _MTRR_saveCR4(void);
-void _ASMAPI _MTRR_restoreCR4(ulong cr4Val);
-uchar _ASMAPI _MTRR_getCx86(uchar reg);
-void _ASMAPI _MTRR_setCx86(uchar reg,uchar data);
-#ifdef __16BIT__
-void _ASMAPI _MTRR_readMSR(ulong reg, ulong far *eax, ulong far *edx);
-#else
-void _ASMAPI _MTRR_readMSR(ulong reg, ulong *eax, ulong *edx);
-#endif
-void _ASMAPI _MTRR_writeMSR(ulong reg, ulong eax, ulong edx);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __MTRR_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pcilib.h b/board/MAI/bios_emulator/scitech/include/pcilib.h
deleted file mode 100644
index 238f8ef..0000000
--- a/board/MAI/bios_emulator/scitech/include/pcilib.h
+++ /dev/null
@@ -1,413 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file for interface routines to the PCI bus.
-*
-****************************************************************************/
-
-#ifndef __PCILIB_H
-#define __PCILIB_H
-
-#include "scitech.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/* Defines for PCIDeviceInfo.HeaderType */
-
-typedef enum {
- PCI_deviceType = 0x00,
- PCI_bridgeType = 0x01,
- PCI_cardBusBridgeType = 0x02,
- PCI_multiFunctionType = 0x80
- } PCIHeaderTypeFlags;
-
-/* Defines for PCIDeviceInfo.Command */
-
-typedef enum {
- PCI_enableIOSpace = 0x0001,
- PCI_enableMemorySpace = 0x0002,
- PCI_enableBusMaster = 0x0004,
- PCI_enableSpecialCylces = 0x0008,
- PCI_enableWriteAndInvalidate = 0x0010,
- PCI_enableVGACompatiblePalette = 0x0020,
- PCI_enableParity = 0x0040,
- PCI_enableWaitCycle = 0x0080,
- PCI_enableSerr = 0x0100,
- PCI_enableFastBackToBack = 0x0200
- } PCICommandFlags;
-
-/* Defines for PCIDeviceInfo.Status */
-
-typedef enum {
- PCI_statusCapabilitiesList = 0x0010,
- PCI_status66MhzCapable = 0x0020,
- PCI_statusUDFSupported = 0x0040,
- PCI_statusFastBackToBack = 0x0080,
- PCI_statusDataParityDetected = 0x0100,
- PCI_statusDevSel = 0x0600,
- PCI_statusSignaledTargetAbort = 0x0800,
- PCI_statusRecievedTargetAbort = 0x1000,
- PCI_statusRecievedMasterAbort = 0x2000,
- PCI_statusSignaledSystemError = 0x4000,
- PCI_statusDetectedParityError = 0x8000
- } PCIStatusFlags;
-
-/* PCI capability IDs */
-
-typedef enum {
- PCI_capsPowerManagement = 0x01,
- PCI_capsAGP = 0x02,
- PCI_capsMSI = 0x05
- } PCICapsType;
-
-/* PCI AGP rate definitions */
-
-typedef enum {
- PCI_AGPRate1X = 0x1,
- PCI_AGPRate2X = 0x2,
- PCI_AGPRate4X = 0x4
- } PCIAGPRateType;
-
-/* NOTE: We define all bitfield's as uint's, specifically so that the IBM
- * Visual Age C++ compiler does not complain. We need them to be
- * 32-bits wide, and this is the width of an unsigned integer, but
- * we can't use a ulong to make this explicit or we get errors.
- */
-
-/* Structure defining a PCI slot identifier */
-
-typedef union {
- struct {
- uint Zero:2;
- uint Register:6;
- uint Function:3;
- uint Device:5;
- uint Bus:8;
- uint Reserved:7;
- uint Enable:1;
- } p;
- ulong i;
- } PCIslot;
-
-/* Structure defining the regular (type 0) PCI configuration register
- * layout. We use this in a union below so we can describe all types of
- * PCI configuration spaces with a single structure.
- */
-
-typedef struct {
- ulong BaseAddress10;
- ulong BaseAddress14;
- ulong BaseAddress18;
- ulong BaseAddress1C;
- ulong BaseAddress20;
- ulong BaseAddress24;
- ulong CardbusCISPointer;
- ushort SubSystemVendorID;
- ushort SubSystemID;
- ulong ROMBaseAddress;
- uchar CapabilitiesPointer;
- uchar reserved1;
- uchar reserved2;
- uchar reserved3;
- ulong reserved4;
- uchar InterruptLine;
- uchar InterruptPin;
- uchar MinimumGrant;
- uchar MaximumLatency;
-
- /* These are not in the actual config space, but we enumerate them */
- ulong BaseAddress10Len;
- ulong BaseAddress14Len;
- ulong BaseAddress18Len;
- ulong BaseAddress1CLen;
- ulong BaseAddress20Len;
- ulong BaseAddress24Len;
- ulong ROMBaseAddressLen;
- } PCIType0Info;
-
-/* Structure defining PCI to PCI bridge (type 1) PCI configuration register
- * layout. We use this in a union below so we can describe all types of
- * PCI configuration spaces with a single structure.
- */
-
-typedef struct {
- ulong BaseAddress10;
- ulong BaseAddress14;
- uchar PrimaryBusNumber;
- uchar SecondayBusNumber;
- uchar SubordinateBusNumber;
- uchar SecondaryLatencyTimer;
- uchar IOBase;
- uchar IOLimit;
- ushort SecondaryStatus;
- ushort MemoryBase;
- ushort MemoryLimit;
- ushort PrefetchableMemoryBase;
- ushort PrefetchableMemoryLimit;
- ulong PrefetchableBaseHi;
- ulong PrefetchableLimitHi;
- ushort IOBaseHi;
- ushort IOLimitHi;
- uchar CapabilitiesPointer;
- uchar reserved1;
- uchar reserved2;
- uchar reserved3;
- ulong ROMBaseAddress;
- uchar InterruptLine;
- uchar InterruptPin;
- ushort BridgeControl;
- } PCIType1Info;
-
-/* PCI to CardBus bridge (type 2) configuration information */
-typedef struct {
- ulong SocketRegistersBaseAddress;
- uchar CapabilitiesPointer;
- uchar reserved1;
- ushort SecondaryStatus;
- uchar PrimaryBus;
- uchar SecondaryBus;
- uchar SubordinateBus;
- uchar SecondaryLatency;
- struct {
- ulong Base;
- ulong Limit;
- } Range[4];
- uchar InterruptLine;
- uchar InterruptPin;
- ushort BridgeControl;
- } PCIType2Info;
-
-/* Structure defining the PCI configuration space information for a
- * single PCI device on the PCI bus. We enumerate all this information
- * for all PCI devices on the bus.
- */
-
-typedef struct {
- ulong dwSize;
- PCIslot slot;
- ulong mech1;
- ushort VendorID;
- ushort DeviceID;
- ushort Command;
- ushort Status;
- uchar RevID;
- uchar Interface;
- uchar SubClass;
- uchar BaseClass;
- uchar CacheLineSize;
- uchar LatencyTimer;
- uchar HeaderType;
- uchar BIST;
- union {
- PCIType0Info type0;
- PCIType1Info type1;
- PCIType2Info type2;
- } u;
- } PCIDeviceInfo;
-
-/* PCI Capability header structure. All PCI capabilities have the
- * following header.
- *
- * capsID is used to identify the type of the structure as define above.
- *
- * next is the offset in PCI configuration space (0x40-0xFC) of the
- * next capability structure in the list, or 0x00 if there are no more
- * entries.
- */
-
-typedef struct {
- uchar capsID;
- uchar next;
- } PCICapsHeader;
-
-/* Structure defining the PCI AGP status register contents */
-
-typedef struct {
- uint rate:3;
- uint rsvd1:1;
- uint fastWrite:1;
- uint fourGB:1;
- uint rsvd2:3;
- uint sideBandAddressing:1;
- uint rsvd3:14;
- uint requestQueueDepthMaximum:8;
- } PCIAGPStatus;
-
-/* Structure defining the PCI AGP command register contents */
-
-typedef struct {
- uint rate:3;
- uint rsvd1:1;
- uint fastWriteEnable:1;
- uint fourGBEnable:1;
- uint rsvd2:2;
- uint AGPEnable:1;
- uint SBAEnable:1;
- uint rsvd3:14;
- uint requestQueueDepth:8;
- } PCIAGPCommand;
-
-/* AGP Capability structure */
-
-typedef struct {
- PCICapsHeader h;
- ushort majMin;
- PCIAGPStatus AGPStatus;
- PCIAGPCommand AGPCommand;
- } PCIAGPCapability;
-
-/* Structure for obtaining the PCI IRQ routing information */
-
-typedef struct {
- uchar bus;
- uchar device;
- uchar linkA;
- ushort mapA;
- uchar linkB;
- ushort mapB;
- uchar linkC;
- ushort mapC;
- uchar linkD;
- ushort mapD;
- uchar slot;
- uchar reserved;
- } PCIRouteInfo;
-
-typedef struct {
- ushort BufferSize;
- PCIRouteInfo *DataBuffer;
- } PCIRoutingOptionsBuffer;
-
-#define NUM_PCI_REG (sizeof(PCIDeviceInfo) / 4) - 10
-#define PCI_BRIDGE_CLASS 0x06
-#define PCI_HOST_BRIDGE_SUBCLASS 0x00
-#define PCI_EARLY_VGA_CLASS 0x00
-#define PCI_EARLY_VGA_SUBCLASS 0x01
-#define PCI_DISPLAY_CLASS 0x03
-#define PCI_DISPLAY_VGA_SUBCLASS 0x00
-#define PCI_DISPLAY_XGA_SUBCLASS 0x01
-#define PCI_DISPLAY_OTHER_SUBCLASS 0x80
-#define PCI_MM_CLASS 0x04
-#define PCI_AUDIO_SUBCLASS 0x01
-
-/* Macros to detect specific classes of devices */
-
-#define PCI_IS_3DLABS_NONVGA_CLASS(pci) \
- (((pci)->BaseClass == PCI_DISPLAY_CLASS && (pci)->SubClass == PCI_DISPLAY_OTHER_SUBCLASS) \
- && ((pci)->VendorID == 0x3D3D || (pci)->VendorID == 0x104C))
-
-#define PCI_IS_DISPLAY_CLASS(pci) \
- (((pci)->BaseClass == PCI_DISPLAY_CLASS && (pci)->SubClass == PCI_DISPLAY_VGA_SUBCLASS) \
- || ((pci)->BaseClass == PCI_DISPLAY_CLASS && (pci)->SubClass == PCI_DISPLAY_XGA_SUBCLASS) \
- || ((pci)->BaseClass == PCI_EARLY_VGA_CLASS && (pci)->SubClass == PCI_EARLY_VGA_SUBCLASS) \
- || PCI_IS_3DLABS_NONVGA_CLASS(pci))
-
-/* Function codes to pass to PCI_accessReg */
-
-#define PCI_READ_BYTE 0
-#define PCI_READ_WORD 1
-#define PCI_READ_DWORD 2
-#define PCI_WRITE_BYTE 3
-#define PCI_WRITE_WORD 4
-#define PCI_WRITE_DWORD 5
-
-/* Macros to read/write PCI registers. These assume a global PCI array
- * of device information.
- */
-
-#define PCI_readPCIRegB(index,device) \
- PCI_accessReg(index,0,0,&PCI[DeviceIndex[device]])
-
-#define PCI_readPCIRegW(index,device) \
- PCI_accessReg(index,0,1,&PCI[DeviceIndex[device]])
-
-#define PCI_readPCIRegL(index,device) \
- PCI_accessReg(index,0,2,&PCI[DeviceIndex[device]])
-
-#define PCI_writePCIRegB(index,value,device) \
- PCI_accessReg(index,value,3,&PCI[DeviceIndex[device]])
-
-#define PCI_writePCIRegW(index,value,device) \
- PCI_accessReg(index,value,4,&PCI[DeviceIndex[device]])
-
-#define PCI_writePCIRegL(index,value,device) \
- PCI_accessReg(index,value,5,&PCI[DeviceIndex[device]])
-
-#pragma pack()
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Function to determine the number of PCI devices in the system */
-
-int _ASMAPI PCI_getNumDevices(void);
-
-/* Function to enumerate all device on the PCI bus */
-
-int _ASMAPI PCI_enumerate(PCIDeviceInfo info[]);
-
-/* Function to access PCI configuration registers */
-
-ulong _ASMAPI PCI_accessReg(int index,ulong value,int func,PCIDeviceInfo *info);
-
-/* Function to get PCI IRQ routing options for a card */
-
-int _ASMAPI PCI_getIRQRoutingOptions(int numDevices,PCIRouteInfo *buffer);
-
-/* Function to re-route the PCI IRQ setting for a device */
-
-ibool _ASMAPI PCI_setHardwareIRQ(PCIDeviceInfo *info,uint intPin,uint IRQ);
-
-/* Function to generate a special cyle on the specified PCI bus */
-
-void _ASMAPI PCI_generateSpecialCyle(uint bus,ulong specialCycleData);
-
-/* Function to determine the size of a PCI base address register */
-
-ulong _ASMAPI PCI_findBARSize(int bar,PCIDeviceInfo *pci);
-
-/* Function to read a block of PCI configuration space registers */
-
-void _ASMAPI PCI_readRegBlock(PCIDeviceInfo *info,int index,void *dst,int count);
-
-/* Function to write a block of PCI configuration space registers */
-
-void _ASMAPI PCI_writeRegBlock(PCIDeviceInfo *info,int index,void *src,int count);
-
-/* Function to return the 32-bit PCI BIOS entry point */
-
-ulong _ASMAPI PCIBIOS_getEntry(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __PCILIB_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pm_help.h b/board/MAI/bios_emulator/scitech/include/pm_help.h
deleted file mode 100644
index 536a2ba..0000000
--- a/board/MAI/bios_emulator/scitech/include/pm_help.h
+++ /dev/null
@@ -1,166 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32, OS/2
-*
-* Description: Include file for the SciTech Portability Manager 32-bit
-* helper VxD for Windows 9x for and the 16-bit ring 0
-* helper device driver for OS/2.
-*
-* This file documents all the public services used by the
-* SciTech Portability Manager library and SciTech Nucleus
-* loader library.
-*
-****************************************************************************/
-
-#ifndef __PMHELP_H
-#define __PMHELP_H
-
-/* Include version information */
-
-#include "sdd/sddver.h"
-#define PMHELP_Major SDD_RELEASE_MAJOR
-#define PMHELP_Minor SDD_RELEASE_MINOR
-#define PMHELP_VERSION ((PMHELP_Major << 8) | PMHELP_Minor)
-
-#ifdef __OS2__
-
-/****************************************************************************
-* Public OS/2 Support functions
-****************************************************************************/
-
-#include "scitech.h"
-#include "nucleus/graphics.h"
-
-/* Name of device driver */
-
-#define PMHELP_NAME (PSZ)"sddhelp$"
-
-/* Main IOCTL function to talk to device driver */
-
-#define PMHELP_IOCTL 0x0080
-
-/* Macro definition for defining IOCTL function control codes for the SDDHELP
- * device driver for OS/2. Similar to that used for the DOS/Win32 version.
- */
-
-#define PMHELP_CTL_CODE(name,value) \
- PMHELP_##name = value
-
-typedef enum {
- /* Version function used by all drivers */
- PMHELP_CTL_CODE(GETVER ,0x0001),
- PMHELP_CTL_CODE(MAPPHYS ,0x0002),
- PMHELP_CTL_CODE(ALLOCLOCKED ,0x0003),
- PMHELP_CTL_CODE(FREELOCKED ,0x0004),
- PMHELP_CTL_CODE(GETGDT32 ,0x0005),
- PMHELP_CTL_CODE(MALLOCSHARED ,0x0007),
- PMHELP_CTL_CODE(FREESHARED ,0x0008),
- PMHELP_CTL_CODE(MAPTOPROCESS ,0x0009),
- PMHELP_CTL_CODE(FREEPHYS ,0x000A),
- PMHELP_CTL_CODE(FLUSHTLB ,0x000B),
- PMHELP_CTL_CODE(SAVECR4 ,0x000C),
- PMHELP_CTL_CODE(RESTORECR4 ,0x000D),
- PMHELP_CTL_CODE(READMSR ,0x000E),
- PMHELP_CTL_CODE(WRITEMSR ,0x000F),
- PMHELP_CTL_CODE(GETPHYSICALADDR ,0x0010),
- PMHELP_CTL_CODE(GETPHYSICALADDRRANGE ,0x0011),
- PMHELP_CTL_CODE(LOCKPAGES ,0x0012),
- PMHELP_CTL_CODE(UNLOCKPAGES ,0x0013),
- PMHELP_CTL_CODE(GETSHAREDEXP ,0x0042),
- PMHELP_CTL_CODE(SETSHAREDEXP ,0x0043),
- PMHELP_CTL_CODE(GETSTACKSWITCHRTN ,0x0044),
- PMHELP_CTL_CODE(GETBUILDNO ,0x0050),
- } PMHELP_ctlCodes;
-
-#else
-
-/****************************************************************************
-* Public DOS/Windows Support functions
-****************************************************************************/
-
-#ifdef DEVICE_MAIN
-#include <vtoolsc.h>
-#define PMHELP_Init_Order (VDD_INIT_ORDER-1)
-#define RETURN_LONGS(n) *p->dioc_bytesret = (n) * sizeof(ulong)
-#endif /* DEVICE_MAIN */
-#include "scitech.h"
-#include "nucleus/graphics.h"
-
-/* We connect to the SDDHELP.VXD module if it is staticly loaded (as part
- * of SciTech Display Doctor), otherwise we dynamically load the PMHELP.VXD
- * public helper VxD.
- */
-
-#define PMHELP_DeviceID 0x0000
-#define SDDHELP_DeviceID 0x3DF8
-#define VXDLDR_DeviceID 0x0027
-#define SDDHELP_MODULE "SDDHELP"
-#define SDDHELP_NAME "SDDHELP.VXD"
-#define PMHELP_MODULE "PMHELP"
-#define PMHELP_NAME "PMHELP.VXD"
-#define PMHELP_DDBNAME "pmhelp "
-#define SDDHELP_MODULE_PATH "\\\\.\\" SDDHELP_MODULE
-#define PMHELP_MODULE_PATH "\\\\.\\" PMHELP_MODULE
-#define PMHELP_VXD_PATH "\\\\.\\" PMHELP_NAME
-
-/* Macro definition for defining IOCTL function control codes for the PMHELP
- * device drivers for Windows 9x and NT. This macro is basically derived from
- * the CTL_CODE macro in the Windows 2000 DDK, but we hard code it here to
- * avoid having to #include any of the Windows 2000 DDK header files. We also
- * define both a 16-bit and 32-bit version of the control code within the same
- * macro to simplify future additions.
- *
- * Essentially the Win32 macro would normally expand to the following:
- *
- * CTL_CODE(FILE_DEVICE_VIDEO,0x800+value,METHOD_BUFFERED,FILE_ANY_ACCESS)
- */
-
-#define PMHELP_CTL_CODE(name,value) \
- PMHELP_##name = value, \
- PMHELP_##name##32 = ((0x23 << 16) | (0 << 14) | ((0x800+value) << 2) | (0))
-
-typedef enum {
- /* Include all the control codes. We keep them in a separate header
- * file so we can include them in multiple places to make this
- * more versatile.
- */
- #include "pm_wctl.h"
- } PMHELP_ctlCodes;
-
-/* For real mode VxD calls, we put the function number into the high
- * order word of EAX, and a value of 0x4FFF in AX. This allows our
- * VxD handler which is set up to handle Int 10's to recognise a native
- * PMHELP API call from a real mode DOS program.
- */
-
-#ifdef REALMODE
-#define API_NUM(num) (((ulong)(num) << 16) | 0x4FFF)
-#else
-#define API_NUM(num) (num)
-#endif
-
-#endif /* !__OS2__ */
-
-#endif /* __PMHELP_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pm_wctl.h b/board/MAI/bios_emulator/scitech/include/pm_wctl.h
deleted file mode 100644
index 20aa15e..0000000
--- a/board/MAI/bios_emulator/scitech/include/pm_wctl.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32, OS/2
-*
-* Description: Header file to define all the control codes for the DOS
-* and Win32 device driver API's for calling from ring 3
-* into the ring 0 device drivers.
-*
-****************************************************************************/
-
-/* Version function used by all drivers */
-PMHELP_CTL_CODE(GETVER ,0x0000),
-
-/* Functions used by obsolete 16-bit DOS TSR */
-PMHELP_CTL_CODE(RDREGB ,0x0003),
-PMHELP_CTL_CODE(WRREGB ,0x0004),
-PMHELP_CTL_CODE(RDREGW ,0x0005),
-PMHELP_CTL_CODE(WRREGW ,0x0006),
-PMHELP_CTL_CODE(RDREGL ,0x0008),
-PMHELP_CTL_CODE(WRREGL ,0x0009),
-
-/* Functions used by obsolete WinDirect */
-PMHELP_CTL_CODE(MAPPHYS ,0x000F),
-PMHELP_CTL_CODE(GETVESABUF ,0x0013),
-
-/* Functions used by PM library */
-PMHELP_CTL_CODE(DPMIINT86 ,0x0014),
-PMHELP_CTL_CODE(INT86 ,0x0015),
-PMHELP_CTL_CODE(INT86X ,0x0016),
-PMHELP_CTL_CODE(CALLREALMODE ,0x0017),
-PMHELP_CTL_CODE(ALLOCLOCKED ,0x0018),
-PMHELP_CTL_CODE(FREELOCKED ,0x0019),
-PMHELP_CTL_CODE(ENABLELFBCOMB ,0x001A),
-PMHELP_CTL_CODE(GETPHYSICALADDR ,0x001B),
-PMHELP_CTL_CODE(MALLOCSHARED ,0x001D),
-PMHELP_CTL_CODE(FREESHARED ,0x001F),
-PMHELP_CTL_CODE(LOCKDATAPAGES ,0x0020),
-PMHELP_CTL_CODE(UNLOCKDATAPAGES ,0x0021),
-PMHELP_CTL_CODE(LOCKCODEPAGES ,0x0022),
-PMHELP_CTL_CODE(UNLOCKCODEPAGES ,0x0023),
-PMHELP_CTL_CODE(GETCALLGATE ,0x0024),
-PMHELP_CTL_CODE(SETCNTPATH ,0x0025),
-PMHELP_CTL_CODE(GETPDB ,0x0026),
-PMHELP_CTL_CODE(FLUSHTLB ,0x0027),
-PMHELP_CTL_CODE(GETPHYSICALADDRRANGE ,0x0028),
-PMHELP_CTL_CODE(ALLOCPAGE ,0x0029),
-PMHELP_CTL_CODE(FREEPAGE ,0x002A),
-PMHELP_CTL_CODE(ENABLERING3IOPL ,0x002B),
-PMHELP_CTL_CODE(DISABLERING3IOPL ,0x002C),
-PMHELP_CTL_CODE(GASETLOCALPATH ,0x002D),
-PMHELP_CTL_CODE(GAGETEXPORTS ,0x002E),
-PMHELP_CTL_CODE(GATHUNK ,0x002F),
-PMHELP_CTL_CODE(SETNUCLEUSPATH ,0x0030),
diff --git a/board/MAI/bios_emulator/scitech/include/pmapi.h b/board/MAI/bios_emulator/scitech/include/pmapi.h
deleted file mode 100644
index 7ddace7..0000000
--- a/board/MAI/bios_emulator/scitech/include/pmapi.h
+++ /dev/null
@@ -1,1148 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#ifndef __PMAPI_H
-#define __PMAPI_H
-
-#include "scitech.h"
-#include "pcilib.h"
-#include "ztimerc.h"
-#if !defined(__WIN32_VXD__) && !defined(__OS2_VDD__) && !defined(__NT_DRIVER__)
-#include <stdio.h>
-#include <stdlib.h>
-#endif
-
-/*--------------------------- Macros and Typedefs -------------------------*/
-
-/* You will need to define one of the following before you compile this
- * library for it to work correctly with the DOS extender that you are
- * using when compiling for extended DOS:
- *
- * TNT - Phar Lap TNT DOS Extender
- * DOS4GW - Rational DOS/4GW, DOS/4GW Pro, Causeway and PMODE/W
- * DJGPP - DJGPP port of GNU C++
- *
- * If none is specified, we will automatically determine which operating
- * system is being targetted and the following will be defined (provided by
- * scitech.h header file):
- *
- * __MSDOS16__ - Default for 16 bit MSDOS mode
- * __MSDOS32__ - Default for 32 bit MSDOS
- * __WINDOWS16__ - Default for 16 bit Windows
- * __WINDOWS32__ - Default for 32 bit Windows
- *
- * One of the following will be defined automatically for you to select
- * which memory model is in effect:
- *
- * REALMODE - 16 bit real mode (large memory model)
- * PM286 - 16 protected mode (large memory model)
- * PM386 - 32 protected mode (flat memory model)
- */
-
-#if defined(__UNIX__) && !defined(_MAX_PATH)
-#define _MAX_PATH 256
-#endif
-
-#if defined(TNT) || defined(DOSX) || defined(X32VM) || defined(DPMI32) \
- || defined(DOS4GW) || defined(DJGPP) || defined(__WINDOWS32__) \
- || defined(__MSDOS32__) || defined(__UNIX__) || defined(__WIN32_VXD__) \
- || defined(__32BIT__) || defined(__SMX32__) || defined(__RTTARGET__)
-#define PM386
-#elif defined(DPMI16) || defined(__WINDOWS16__)
-#define PM286
-#else
-#define REALMODE
-#endif
-
-#pragma pack(1)
-
-/* Provide the typedefs for the PM_int386 functions, which issue native
- * interrupts in real or protected mode and can pass extended registers
- * around.
- */
-
-struct _PMDWORDREGS {
- ulong eax,ebx,ecx,edx,esi,edi,cflag;
- };
-
-struct _PMWORDREGS {
- ushort ax,ax_hi;
- ushort bx,bx_hi;
- ushort cx,cx_hi;
- ushort dx,dx_hi;
- ushort si,si_hi;
- ushort di,di_hi;
- ushort cflag,cflag_hi;
- };
-
-struct _PMBYTEREGS {
- uchar al, ah; ushort ax_hi;
- uchar bl, bh; ushort bx_hi;
- uchar cl, ch; ushort cx_hi;
- uchar dl, dh; ushort dx_hi;
- };
-
-typedef union {
- struct _PMDWORDREGS e;
- struct _PMWORDREGS x;
- struct _PMBYTEREGS h;
- } PMREGS;
-
-typedef struct {
- ushort es;
- ushort cs;
- ushort ss;
- ushort ds;
- ushort fs;
- ushort gs;
- } PMSREGS;
-
-/* Provide definitions for the real mode register structures passed to
- * the PM_int86() and PM_int86x() routines. Note that we provide our own
- * functions to do this for 16-bit code that calls the PM_int386 functions.
- */
-
-typedef PMREGS RMREGS;
-typedef PMSREGS RMSREGS;
-
-typedef struct {
- long edi;
- long esi;
- long ebp;
- long reserved;
- long ebx;
- long edx;
- long ecx;
- long eax;
- short flags;
- short es,ds,fs,gs,ip,cs,sp,ss;
- } DPMI_regs;
-
-#ifdef __MSDOS__
-/* Register structure passed to PM_VxDCall function */
-typedef struct {
- ulong eax;
- ulong ebx;
- ulong ecx;
- ulong edx;
- ulong esi;
- ulong edi;
- ushort ds,es;
- } VXD_regs;
-#endif
-
-#define PM_MAX_DRIVE 3
-#define PM_MAX_PATH 256
-#define PM_FILE_INVALID (void*)0xFFFFFFFF
-
-/* Structure for generic directory traversal and management. Also the same
- * values are passed to PM_setFileAttr to change the file attributes.
- */
-
-typedef struct {
- ulong dwSize;
- ulong attrib;
- ulong sizeLo;
- ulong sizeHi;
- char name[PM_MAX_PATH];
- } PM_findData;
-
-/* Macro to compute the byte offset of a field in a structure of type type */
-
-#define PM_FIELD_OFFSET(type,field) ((long)&(((type*)0)->field))
-
-/* Marcto to compute the address of the base of the structure given its type,
- * and an address of a field within the structure.
- */
-
-#define PM_CONTAINING_RECORD(address, type, field) \
- ((type*)( \
- (char*)(address) - \
- (char*)(&((type*)0)->field)))
-
-/* Flags stored in the PM_findData structure, and also values passed to
- * PM_setFileAttr to change the file attributes.
- */
-
-#define PM_FILE_NORMAL 0x00000000
-#define PM_FILE_READONLY 0x00000001
-#define PM_FILE_DIRECTORY 0x00000002
-#define PM_FILE_ARCHIVE 0x00000004
-#define PM_FILE_HIDDEN 0x00000008
-#define PM_FILE_SYSTEM 0x00000010
-
-/* Flags returned by the PM_splitpath function */
-
-#define PM_HAS_WILDCARDS 0x01
-#define PM_HAS_EXTENSION 0x02
-#define PM_HAS_FILENAME 0x04
-#define PM_HAS_DIRECTORY 0x08
-#define PM_HAS_DRIVE 0x10
-
-/* Structure passed to the PM_setFileTime functions */
-typedef struct {
- short sec; /* Seconds */
- short min; /* Minutes */
- short hour; /* Hour (0--23) */
- short day; /* Day of month (1--31) */
- short mon; /* Month (0--11) */
- short year; /* Year (calendar year minus 1900) */
- } PM_time;
-
-/* Define a macro for creating physical base addresses from segment:offset */
-
-#define MK_PHYS(s,o) (((ulong)(s) << 4) + (ulong)(o))
-
-/* Define the different types of modes supported. This is a global variable
- * that can be used to determine the type at runtime which will contain
- * one of these values.
- */
-
-typedef enum {
- PM_realMode,
- PM_286,
- PM_386
- } PM_mode_enum;
-
-/* Define types passed to PM_enableWriteCombine */
-
-#define PM_MTRR_UNCACHABLE 0
-#define PM_MTRR_WRCOMB 1
-#define PM_MTRR_WRTHROUGH 4
-#define PM_MTRR_WRPROT 5
-#define PM_MTRR_WRBACK 6
-#define PM_MTRR_MAX 6
-
-/* Error codes returned by PM_enableWriteCombine */
-
-#define PM_MTRR_ERR_OK 0
-#define PM_MTRR_NOT_SUPPORTED -1
-#define PM_MTRR_ERR_PARAMS -2
-#define PM_MTRR_ERR_NOT_4KB_ALIGNED -3
-#define PM_MTRR_ERR_BELOW_1MB -4
-#define PM_MTRR_ERR_NOT_ALIGNED -5
-#define PM_MTRR_ERR_OVERLAP -6
-#define PM_MTRR_ERR_TYPE_MISMATCH -7
-#define PM_MTRR_ERR_NONE_FREE -8
-#define PM_MTRR_ERR_NOWRCOMB -9
-#define PM_MTRR_ERR_NO_OS_SUPPORT -10
-
-/* Values passed to the PM_DMACProgram function */
-
-#define PM_DMA_READ_ONESHOT 0x44 /* One-shot DMA read */
-#define PM_DMA_WRITE_ONESHOT 0x48 /* One-shot DMA write */
-#define PM_DMA_READ_AUTOINIT 0x54 /* Auto-init DMA read */
-#define PM_DMA_WRITE_AUTOINIT 0x58 /* Auto-init DMA write */
-
-/* Flags passed to suspend application callback */
-
-#define PM_DEACTIVATE 1
-#define PM_REACTIVATE 2
-
-/* Return codes that the application can return from the suspend application
- * callback registered with the PM library. See the MGL documentation for
- * more details.
- */
-#define PM_SUSPEND_APP 0
-#define PM_NO_SUSPEND_APP 1
-
-/****************************************************************************
-REMARKS:
-This enumeration defines the type values passed to the PM_agpReservePhysical
-function, to define how the physical memory mapping should be handled.
-
-The PM_agpUncached type indicates that the memory should be allocated as
-uncached memory.
-
-The PM_agpWriteCombine type indicates that write combining should be enabled
-for physical memory mapping. This is used for framebuffer write combing and
-speeds up direct framebuffer writes to the memory.
-
-The PM_agpIntelDCACHE type indicates that memory should come from the Intel
-i81x Display Cache (or DCACHE) memory pool. This flag is specific to the
-Intel i810 and i815 controllers, and should not be passed for any other
-controller type.
-
-HEADER:
-pmapi.h
-
-MEMBERS:
-PM_agpUncached - Indicates that the memory should be uncached
-PM_agpWriteCombine - Indicates that the memory should be write combined
-PM_agpIntelDCACHE - Indicates that the memory should come from DCACHE pool
-****************************************************************************/
-typedef enum {
- PM_agpUncached,
- PM_agpWriteCombine,
- PM_agpIntelDCACHE
- } PM_agpMemoryType;
-
-/* Defines the size of an system memory page */
-
-#define PM_PAGE_SIZE 4096
-
-/* Type definition for a physical memory address */
-
-typedef unsigned long PM_physAddr;
-
-/* Define a bad physical address returned by map physical functions */
-
-#define PM_BAD_PHYS_ADDRESS 0xFFFFFFFF
-
-/* Type definition for the 12-byte lock handle for locking linear memory */
-
-typedef struct {
- ulong h[3];
- } PM_lockHandle;
-
-/* 'C' calling conventions always */
-
-#define PMAPI _ASMAPI
-#define PMAPIP _ASMAPIP
-
-/* Internal typedef to override DPMI_int86 handler */
-
-typedef ibool (PMAPIP DPMI_handler_t)(DPMI_regs *regs);
-void PMAPI DPMI_setInt10Handler(DPMI_handler_t handler);
-
-/* Type definitions for a window handle for console modes */
-
-#if defined(__DRIVER__) || defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-typedef void *PM_HWND; /* Pointer for portable drivers */
-typedef void *PM_MODULE; /* Module handle for portable drivers */
-#elif defined(__WINDOWS__)
-#ifdef DECLARE_HANDLE
-typedef HWND PM_HWND; /* Real window handle */
-typedef HINSTANCE PM_MODULE; /* Win32 DLL handle */
-#else
-typedef void *PM_HWND; /* Place holder if windows.h not included */
-typedef void *PM_MODULE; /* Place holder if windows.h not included */
-#endif
-#elif defined(__USE_X11__)
-typedef struct {
- Window *window;
- Display *display;
- } PM_HWND; /* X11 window handle */
-#elif defined(__OS2__)
-typedef void *PM_HWND;
-typedef void *PM_MODULE;
-#elif defined(__LINUX__)
-typedef int PM_HWND; /* Console id for fullscreen Linux */
-typedef void *PM_MODULE;
-#elif defined(__QNX__)
-typedef int PM_HWND; /* Console id for fullscreen QNX */
-typedef void *PM_MODULE;
-#elif defined(__RTTARGET__)
-typedef int PM_HWND; /* Placeholder for RTTarget-32 */
-typedef void *PM_MODULE;
-#elif defined(__REALDOS__)
-typedef int PM_HWND; /* Placeholder for fullscreen DOS */
-typedef void *PM_MODULE; /* Placeholder for fullscreen DOS */
-#elif defined(__SMX32__)
-typedef int PM_HWND; /* Placeholder for fullscreen SMX */
-typedef void *PM_MODULE;
-#elif defined(__SNAP__)
-typedef void *PM_HWND;
-typedef void *PM_MODULE;
-#else
-#error PM library not ported to this platform yet!
-#endif
-
-/* Type definition for code pointers */
-
-typedef void (*__codePtr)();
-
-/* Type definition for a C based interrupt handler */
-
-typedef void (PMAPIP PM_intHandler)(void);
-typedef ibool (PMAPIP PM_irqHandler)(void);
-
-/* Hardware IRQ handle used to save and restore the hardware IRQ */
-
-typedef void *PM_IRQHandle;
-
-/* Type definition for the fatal cleanup handler */
-
-typedef void (PMAPIP PM_fatalCleanupHandler)(void);
-
-/* Type defifinition for save state callback function */
-
-typedef int (PMAPIP PM_saveState_cb)(int flags);
-
-/* Type definintion for enum write combined callback function */
-
-typedef void (PMAPIP PM_enumWriteCombine_t)(ulong base,ulong length,uint type);
-
-/* Structure defining all the PM API functions as exported to
- * the binary portable DLL's.
- */
-
-typedef struct {
- ulong dwSize;
- int (PMAPIP PM_getModeType)(void);
- void * (PMAPIP PM_getBIOSPointer)(void);
- void * (PMAPIP PM_getA0000Pointer)(void);
- void * (PMAPIP PM_mapPhysicalAddr)(ulong base,ulong limit,ibool isCached);
- void * (PMAPIP PM_mallocShared)(long size);
- void * reserved1;
- void (PMAPIP PM_freeShared)(void *ptr);
- void * (PMAPIP PM_mapToProcess)(void *linear,ulong limit);
- void * (PMAPIP PM_mapRealPointer)(uint r_seg,uint r_off);
- void * (PMAPIP PM_allocRealSeg)(uint size,uint *r_seg,uint *r_off);
- void (PMAPIP PM_freeRealSeg)(void *mem);
- void * (PMAPIP PM_allocLockedMem)(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg);
- void (PMAPIP PM_freeLockedMem)(void *p,uint size,ibool contiguous);
- void (PMAPIP PM_callRealMode)(uint seg,uint off, RMREGS *regs,RMSREGS *sregs);
- int (PMAPIP PM_int86)(int intno, RMREGS *in, RMREGS *out);
- int (PMAPIP PM_int86x)(int intno, RMREGS *in, RMREGS *out,RMSREGS *sregs);
- void (PMAPIP DPMI_int86)(int intno, DPMI_regs *regs);
- void (PMAPIP PM_availableMemory)(ulong *physical,ulong *total);
- void * (PMAPIP PM_getVESABuf)(uint *len,uint *rseg,uint *roff);
- long (PMAPIP PM_getOSType)(void);
- void (PMAPIP PM_fatalError)(const char *msg);
- void (PMAPIP PM_setBankA)(int bank);
- void (PMAPIP PM_setBankAB)(int bank);
- void (PMAPIP PM_setCRTStart)(int x,int y,int waitVRT);
- char * (PMAPIP PM_getCurrentPath)(char *path,int maxLen);
- const char * (PMAPIP PM_getVBEAFPath)(void);
- const char * (PMAPIP PM_getNucleusPath)(void);
- const char * (PMAPIP PM_getNucleusConfigPath)(void);
- const char * (PMAPIP PM_getUniqueID)(void);
- const char * (PMAPIP PM_getMachineName)(void);
- ibool (PMAPIP VF_available)(void);
- void * (PMAPIP VF_init)(ulong baseAddr,int bankSize,int codeLen,void *bankFunc);
- void (PMAPIP VF_exit)(void);
- PM_HWND (PMAPIP PM_openConsole)(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen);
- int (PMAPIP PM_getConsoleStateSize)(void);
- void (PMAPIP PM_saveConsoleState)(void *stateBuf,PM_HWND hwndConsole);
- void (PMAPIP PM_restoreConsoleState)(const void *stateBuf,PM_HWND hwndConsole);
- void (PMAPIP PM_closeConsole)(PM_HWND hwndConsole);
- void (PMAPIP PM_setOSCursorLocation)(int x,int y);
- void (PMAPIP PM_setOSScreenWidth)(int width,int height);
- int (PMAPIP PM_enableWriteCombine)(ulong base,ulong length,uint type);
- void (PMAPIP PM_backslash)(char *filename);
- int (PMAPIP PM_lockDataPages)(void *p,uint len,PM_lockHandle *lockHandle);
- int (PMAPIP PM_unlockDataPages)(void *p,uint len,PM_lockHandle *lockHandle);
- int (PMAPIP PM_lockCodePages)(__codePtr p,uint len,PM_lockHandle *lockHandle);
- int (PMAPIP PM_unlockCodePages)(__codePtr p,uint len,PM_lockHandle *lockHandle);
- ibool (PMAPIP PM_setRealTimeClockHandler)(PM_intHandler ih,int frequency);
- void (PMAPIP PM_setRealTimeClockFrequency)(int frequency);
- void (PMAPIP PM_restoreRealTimeClockHandler)(void);
- ibool (PMAPIP PM_doBIOSPOST)(ushort axVal,ulong BIOSPhysAddr,void *BIOSPtr,ulong BIOSLen);
- char (PMAPIP PM_getBootDrive)(void);
- void (PMAPIP PM_freePhysicalAddr)(void *ptr,ulong limit);
- uchar (PMAPIP PM_inpb)(int port);
- ushort (PMAPIP PM_inpw)(int port);
- ulong (PMAPIP PM_inpd)(int port);
- void (PMAPIP PM_outpb)(int port,uchar val);
- void (PMAPIP PM_outpw)(int port,ushort val);
- void (PMAPIP PM_outpd)(int port,ulong val);
- void * reserved2;
- void (PMAPIP PM_setSuspendAppCallback)(PM_saveState_cb saveState);
- ibool (PMAPIP PM_haveBIOSAccess)(void);
- int (PMAPIP PM_kbhit)(void);
- int (PMAPIP PM_getch)(void);
- ibool (PMAPIP PM_findBPD)(const char *dllname,char *bpdpath);
- ulong (PMAPIP PM_getPhysicalAddr)(void *p);
- void (PMAPIP PM_sleep)(ulong milliseconds);
- int (PMAPIP PM_getCOMPort)(int port);
- int (PMAPIP PM_getLPTPort)(int port);
- PM_MODULE (PMAPIP PM_loadLibrary)(const char *szDLLName);
- void * (PMAPIP PM_getProcAddress)(PM_MODULE hModule,const char *szProcName);
- void (PMAPIP PM_freeLibrary)(PM_MODULE hModule);
- int (PMAPIP PCI_enumerate)(PCIDeviceInfo info[]);
- ulong (PMAPIP PCI_accessReg)(int index,ulong value,int func,PCIDeviceInfo *info);
- ibool (PMAPIP PCI_setHardwareIRQ)(PCIDeviceInfo *info,uint intPin,uint IRQ);
- void (PMAPIP PCI_generateSpecialCyle)(uint bus,ulong specialCycleData);
- void * reserved3;
- ulong (PMAPIP PCIBIOS_getEntry)(void);
- uint (PMAPIP CPU_getProcessorType)(void);
- ibool (PMAPIP CPU_haveMMX)(void);
- ibool (PMAPIP CPU_have3DNow)(void);
- ibool (PMAPIP CPU_haveSSE)(void);
- ibool (PMAPIP CPU_haveRDTSC)(void);
- ulong (PMAPIP CPU_getProcessorSpeed)(ibool accurate);
- void (PMAPIP ZTimerInit)(void);
- void (PMAPIP LZTimerOn)(void);
- ulong (PMAPIP LZTimerLap)(void);
- void (PMAPIP LZTimerOff)(void);
- ulong (PMAPIP LZTimerCount)(void);
- void (PMAPIP LZTimerOnExt)(LZTimerObject *tm);
- ulong (PMAPIP LZTimerLapExt)(LZTimerObject *tm);
- void (PMAPIP LZTimerOffExt)(LZTimerObject *tm);
- ulong (PMAPIP LZTimerCountExt)(LZTimerObject *tm);
- void (PMAPIP ULZTimerOn)(void);
- ulong (PMAPIP ULZTimerLap)(void);
- void (PMAPIP ULZTimerOff)(void);
- ulong (PMAPIP ULZTimerCount)(void);
- ulong (PMAPIP ULZReadTime)(void);
- ulong (PMAPIP ULZElapsedTime)(ulong start,ulong finish);
- void (PMAPIP ULZTimerResolution)(ulong *resolution);
- void * (PMAPIP PM_findFirstFile)(const char *filename,PM_findData *findData);
- ibool (PMAPIP PM_findNextFile)(void *handle,PM_findData *findData);
- void (PMAPIP PM_findClose)(void *handle);
- void (PMAPIP PM_makepath)(char *p,const char *drive,const char *dir,const char *name,const char *ext);
- int (PMAPIP PM_splitpath)(const char *fn,char *drive,char *dir,char *name,char *ext);
- ibool (PMAPIP PM_driveValid)(char drive);
- void (PMAPIP PM_getdcwd)(int drive,char *dir,int len);
- void (PMAPIP PM_setFileAttr)(const char *filename,uint attrib);
- ibool (PMAPIP PM_mkdir)(const char *filename);
- ibool (PMAPIP PM_rmdir)(const char *filename);
- uint (PMAPIP PM_getFileAttr)(const char *filename);
- ibool (PMAPIP PM_getFileTime)(const char *filename,ibool gmtTime,PM_time *time);
- ibool (PMAPIP PM_setFileTime)(const char *filename,ibool gmtTime,PM_time *time);
- char * (PMAPIP CPU_getProcessorName)(void);
- int (PMAPIP PM_getVGAStateSize)(void);
- void (PMAPIP PM_saveVGAState)(void *stateBuf);
- void (PMAPIP PM_restoreVGAState)(const void *stateBuf);
- void (PMAPIP PM_vgaBlankDisplay)(void);
- void (PMAPIP PM_vgaUnblankDisplay)(void);
- void (PMAPIP PM_blockUntilTimeout)(ulong milliseconds);
- void (PMAPIP _PM_add64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_sub64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_mul64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_div64)(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
- void (PMAPIP _PM_shr64)(u32 a_low,s32 a_high,s32 shift,__i64 *result);
- void (PMAPIP _PM_sar64)(u32 a_low,s32 a_high,s32 shift,__i64 *result);
- void (PMAPIP _PM_shl64)(u32 a_low,s32 a_high,s32 shift,__i64 *result);
- void (PMAPIP _PM_neg64)(u32 a_low,s32 a_high,__i64 *result);
- ulong (PMAPIP PCI_findBARSize)(int bar,PCIDeviceInfo *pci);
- void (PMAPIP PCI_readRegBlock)(PCIDeviceInfo *info,int index,void *dst,int count);
- void (PMAPIP PCI_writeRegBlock)(PCIDeviceInfo *info,int index,void *src,int count);
- void (PMAPIP PM_flushTLB)(void);
- void (PMAPIP PM_useLocalMalloc)(void * (*malloc)(size_t size),void * (*calloc)(size_t nelem,size_t size),void * (*realloc)(void *ptr,size_t size),void (*free)(void *p));
- void * (PMAPIP PM_malloc)(size_t size);
- void * (PMAPIP PM_calloc)(size_t nelem,size_t size);
- void * (PMAPIP PM_realloc)(void *ptr,size_t size);
- void (PMAPIP PM_free)(void *p);
- ibool (PMAPIP PM_getPhysicalAddrRange)(void *p,ulong length,ulong *physAddress);
- void * (PMAPIP PM_allocPage)(ibool locked);
- void (PMAPIP PM_freePage)(void *p);
- ulong (PMAPIP PM_agpInit)(void);
- void (PMAPIP PM_agpExit)(void);
- ibool (PMAPIP PM_agpReservePhysical)(ulong numPages,int type,void **physContext,PM_physAddr *physAddr);
- ibool (PMAPIP PM_agpReleasePhysical)(void *physContext);
- ibool (PMAPIP PM_agpCommitPhysical)(void *physContext,ulong numPages,ulong startOffset,PM_physAddr *physAddr);
- ibool (PMAPIP PM_agpFreePhysical)(void *physContext,ulong numPages,ulong startOffset);
- int (PMAPIP PCI_getNumDevices)(void);
- void (PMAPIP PM_setLocalBPDPath)(const char *path);
- void * (PMAPIP PM_loadDirectDraw)(int device);
- void (PMAPIP PM_unloadDirectDraw)(int device);
- PM_HWND (PMAPIP PM_getDirectDrawWindow)(void);
- void (PMAPIP PM_doSuspendApp)(void);
- } PM_imports;
-
-#pragma pack()
-
-/*---------------------------- Global variables ---------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-#ifdef __WIN32_VXD__
-#define VESA_BUF_SIZE 1024
-extern uchar *_PM_rmBufAddr;
-#endif
-
-/* {secret} Pointer to global exports structure.
- * Should not be used by application programs.
- */
-extern PM_imports _VARAPI _PM_imports;
-
-/* {secret} */
-extern void * (*__PM_malloc)(size_t size);
-/* {secret} */
-extern void * (*__PM_calloc)(size_t nelem,size_t size);
-/* {secret} */
-extern void * (*__PM_realloc)(void *ptr,size_t size);
-/* {secret} */
-extern void (*__PM_free)(void *p);
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-/* Routine to initialise the host side PM library. Note used from DLL's */
-
-void PMAPI PM_init(void);
-
-/* Routine to return either PM_realMode, PM_286 or PM_386 */
-
-int PMAPI PM_getModeType(void);
-
-/* Routine to return a selector to the BIOS data area at segment 0x40 */
-
-void * PMAPI PM_getBIOSPointer(void);
-
-/* Routine to return a linear pointer to the VGA frame buffer memory */
-
-void * PMAPI PM_getA0000Pointer(void);
-
-/* Routines to map/free physical memory into the current DS segment. In
- * some environments (32-bit DOS is one), after the mapping has been
- * allocated, it cannot be freed. Hence you should only allocate the
- * mapping once and cache the value for use by other parts of your
- * application. If the mapping cannot be createed, this function will
- * return a NULL pointer.
- *
- * This routine will also work for memory addresses below 1Mb, but the
- * mapped address cannot cross the 1Mb boundary.
- */
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached);
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit);
-
-/* Routine to determine the physical address of a linear address. It is
- * up to the caller to ensure the entire address range for a linear
- * block of memory is page aligned if that is required.
- */
-
-ulong PMAPI PM_getPhysicalAddr(void *p);
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress);
-
-/* Routines for memory allocation. By default these functions use the regular
- * C runtime library malloc/free functions, but you can use the
- * PM_useLocalMalloc function to override the default memory allocator with
- * your own memory allocator. This will ensure that all memory allocation
- * used by SciTech products will use your overridden memory allocator
- * functions.
- *
- * Note that BPD files automatically map the C runtime library
- * malloc/calloc/realloc/free calls from inside the BPD to the PM library
- * versions by default.
- */
-
-void PMAPI PM_useLocalMalloc(void * (*malloc)(size_t size),void * (*calloc)(size_t nelem,size_t size),void * (*realloc)(void *ptr,size_t size),void (*free)(void *p));
-void * PMAPI PM_malloc(size_t size);
-void * PMAPI PM_calloc(size_t nelem,size_t size);
-void * PMAPI PM_realloc(void *ptr,size_t size);
-void PMAPI PM_free(void *p);
-
-/* Routine to allocate a memory block in the global shared region that
- * is common to all tasks and accessible from ring 0 code.
- */
-
-void * PMAPI PM_mallocShared(long size);
-
-/* Routine to free the allocated shared memory block */
-
-void PMAPI PM_freeShared(void *ptr);
-
-/* Attach a previously allocated linear mapping to a new process */
-
-void * PMAPI PM_mapToProcess(void *linear,ulong limit);
-
-/* Macros to extract byte, word and long values from a char pointer */
-
-#define PM_getByte(p) *((volatile uchar*)(p))
-#define PM_getWord(p) *((volatile ushort*)(p))
-#define PM_getLong(p) *((volatile ulong*)(p))
-#define PM_setByte(p,v) PM_getByte(p) = (v)
-#define PM_setWord(p,v) PM_getWord(p) = (v)
-#define PM_setLong(p,v) PM_getLong(p) = (v)
-
-/* Routine for accessing a low 1Mb memory block. You dont need to free this
- * pointer, but in 16 bit protected mode the selector allocated will be
- * re-used the next time this routine is called.
- */
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off);
-
-/* Routine to allocate a block of conventional memory below the 1Mb
- * limit so that it can be accessed from real mode. Ensure that you free
- * the segment when you are done with it.
- *
- * This routine returns a selector and offset to the segment that has been
- * allocated, and also returns the real mode segment and offset which can
- * be passed to real mode routines. Will return 0 if memory could not be
- * allocated.
- *
- * Please note that with some DOS extenders, memory allocated with the
- * following function cannot be freed, hence it will be allocated for the
- * life of your program. Thus if you need to call a bunch of different
- * real-mode routines in your program, allocate a single large buffer at
- * program startup that can be re-used throughout the program execution.
- */
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off);
-void PMAPI PM_freeRealSeg(void *mem);
-
-/* Routine to allocate a block of locked memory, and return both the
- * linear and physical addresses of the memory. You should always
- * allocate locked memory blocks in page sized chunks (ie: 4K on IA32).
- * If the memory is not contiguous, you will need to use the
- * PM_getPhysicalAddr function to get the physical address of linear
- * pages within the memory block (the returned physical address will be
- * for the first address in the memory block only).
- */
-
-void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg);
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous);
-
-/* Routine to allocate and free paged sized blocks of shared memory.
- * Addressable from all processes, but not from a ring 0 context
- * under OS/2. Note that under OS/2 PM_mapSharedPages must be called
- * to map the memory blocks into the shared memory address space
- * of each connecting process.
- */
-
-void * PMAPI PM_allocPage(ibool locked);
-void PMAPI PM_freePage(void *p);
-#ifdef __OS2__
-void PMAPI PM_mapSharedPages(void);
-#endif
-
-/* Routine to return true if we have access to the BIOS on the host OS */
-
-ibool PMAPI PM_haveBIOSAccess(void);
-
-/* Routine to call a real mode assembly language procedure. Register
- * values are passed in and out in the 'regs' and 'sregs' structures. We
- * do not provide any method of copying data from the protected mode stack
- * to the real mode stack, so if you need to pass data to real mode, you will
- * need to write a real mode assembly language hook to recieve the values
- * in registers, and to pass the data through a real mode block allocated
- * with the PM_allocRealSeg() routine.
- */
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *regs,RMSREGS *sregs);
-
-/* Routines to generate real mode interrupts using the same interface that
- * is used by int86() and int86x() in realmode. This routine is need to
- * call certain BIOS and DOS functions that are not supported by some
- * DOS extenders. No translation is done on any of the register values,
- * so they must be correctly set up and translated by the calling program.
- *
- * Normally the DOS extenders will allow you to use the normal int86()
- * function directly and will pass on unhandled calls to real mode to be
- * handled by the real mode handler. However calls to int86x() with real
- * mode segment values to be loaded will cause a GPF if used with the
- * standard int86x(), so you should use these routines if you know you
- * want to call a real mode handler.
- */
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out);
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,RMSREGS *sregs);
-
-/* Routine to generate a real mode interrupt. This is identical to the
- * above function, but takes a DPMI_regs structure for the registers
- * which has a lot more information. It is only available from 32-bit
- * protected mode.
- */
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs);
-
-/* Function to return the amount of available physical and total memory.
- * The results of this function are *only* valid before you have made any
- * calls to malloc() and free(). If you need to keep track of exactly how
- * much memory is currently allocated, you need to call this function to
- * get the total amount of memory available and then keep track of
- * the available memory every time you call malloc() and free().
- */
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total);
-
-/* Return the address of a global VESA real mode transfer buffer for use
- * by applications.
- */
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff);
-
-/* Handle fatal error conditions */
-
-void PMAPI PM_fatalError(const char *msg);
-
-/* Function to set a cleanup error handler called when PM_fatalError
- * is called. This allows us to the console back into a normal state
- * if we get a failure from deep inside a BPD file. This function is
- * not exported to BPD files, and is only used by code compiled for the
- * OS.
- */
-
-void PMAPI PM_setFatalErrorCleanup(PM_fatalCleanupHandler cleanup);
-
-/* Return the OS type flag as defined in <drvlib/os/os.h> */
-
-long PMAPI PM_getOSType(void);
-
-/* Functions to set a VBE bank via an Int 10h */
-
-void PMAPI PM_setBankA(int bank);
-void PMAPI PM_setBankAB(int bank);
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT);
-
-/* Return the current working directory */
-
-char * PMAPI PM_getCurrentPath(char *path,int maxLen);
-
-/* Return paths to the VBE/AF and Nucleus directories */
-
-const char * PMAPI PM_getVBEAFPath(void);
-const char * PMAPI PM_getNucleusPath(void);
-const char * PMAPI PM_getNucleusConfigPath(void);
-
-/* Find the path to a binary portable DLL */
-
-void PMAPI PM_setLocalBPDPath(const char *path);
-ibool PMAPI PM_findBPD(const char *dllname,char *bpdpath);
-
-/* Returns the drive letter of the boot drive for DOS, OS/2 and Windows */
-
-char PMAPI PM_getBootDrive(void);
-
-/* Return a network unique machine identifier as a string */
-
-const char * PMAPI PM_getUniqueID(void);
-
-/* Return the network machine name as a string */
-
-const char * PMAPI PM_getMachineName(void);
-
-/* Functions to install and remove the virtual linear framebuffer
- * emulation code. For unsupported DOS extenders and when running under
- * a DPMI host like Windows or OS/2, this function will return a NULL.
- */
-
-ibool PMAPI VF_available(void);
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc);
-void PMAPI VF_exit(void);
-
-/* Functions to wait for a keypress and read a key for command line
- * environments such as DOS, Win32 console and Unix.
- */
-
-int PMAPI PM_kbhit(void);
-int PMAPI PM_getch(void);
-
-/* Functions to create either a fullscreen or windowed console on the
- * desktop, and to allow the resolution of fullscreen consoles to be
- * changed on the fly without closing the console. For non-windowed
- * environments (such as a Linux or OS/2 fullscreen console), these
- * functions enable console graphics mode and restore console text mode.
- *
- * The suspend application callback is used to allow the application to
- * save the state of the fullscreen console mode to allow temporary
- * switching to another console or back to the regular GUI desktop. It
- * is also called to restore the fullscreen graphics state after the
- * fullscreen console regains the focus.
- *
- * The device parameter allows for the console to be opened on a different
- * display controllers (0 is always the primary controller).
- */
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen);
-int PMAPI PM_getConsoleStateSize(void);
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole);
-void PMAPI PM_setSuspendAppCallback(PM_saveState_cb saveState);
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole);
-void PMAPI PM_closeConsole(PM_HWND hwndConsole);
-
-/* Functions to modify OS console information */
-
-void PMAPI PM_setOSCursorLocation(int x,int y);
-void PMAPI PM_setOSScreenWidth(int width,int height);
-
-/* Function to emable Intel PPro/PII write combining */
-
-int PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type);
-int PMAPI PM_enumWriteCombine(PM_enumWriteCombine_t callback);
-
-/* Function to add a path separator to the end of a filename (if not present) */
-
-void PMAPI PM_backslash(char *filename);
-
-/* Routines to lock and unlock regions of memory under a virtual memory
- * environment. These routines _must_ be used to lock all hardware
- * and mouse interrupt handlers installed, _AND_ any global data that
- * these handler manipulate, so that they will always be present in memory
- * to handle the incoming interrupts.
- *
- * Note that it is important to call the correct routine depending on
- * whether the area being locked is code or data, so that under 32 bit
- * PM we will get the selector value correct.
- */
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lockHandle);
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lockHandle);
-int PMAPI PM_lockCodePages(__codePtr p,uint len,PM_lockHandle *lockHandle);
-int PMAPI PM_unlockCodePages(__codePtr p,uint len,PM_lockHandle *lockHandle);
-
-/* Routines to install and remove Real Time Clock interrupt handlers. The
- * frequency of the real time clock can be changed by calling
- * PM_setRealTimeClockFrequeny, and the value can be any power of 2 value
- * from 2Hz to 8192Hz.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- *
- * NOTE: User space versions of the PM library should fail these functions.
- */
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih,int frequency);
-void PMAPI PM_setRealTimeClockFrequency(int frequency);
-void PMAPI PM_restoreRealTimeClockHandler(void);
-
-/* Routines to install and remove hardware interrupt handlers.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- *
- * NOTE: User space versions of the PM library should fail these functions.
- */
-
-PM_IRQHandle PMAPI PM_setIRQHandler(int IRQ,PM_irqHandler ih);
-void PMAPI PM_restoreIRQHandler(PM_IRQHandle irqHandle);
-
-/* Functions to program DMA using the legacy ISA DMA controller */
-
-void PMAPI PM_DMACEnable(int channel);
-void PMAPI PM_DMACDisable(int channel);
-void PMAPI PM_DMACProgram(int channel,int mode,ulong bufferPhys,int count);
-ulong PMAPI PM_DMACPosition(int channel);
-
-/* Function to post secondary graphics controllers using the BIOS */
-
-ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS,ulong BIOSLen);
-
-/* Function to init the AGP functions and return the AGP aperture size in MB */
-
-ulong PMAPI PM_agpInit(void);
-void PMAPI PM_agpExit(void);
-
-/* Functions to reserve and release physical AGP memory ranges */
-
-ibool PMAPI PM_agpReservePhysical(ulong numPages,int type,void **physContext,PM_physAddr *physAddr);
-ibool PMAPI PM_agpReleasePhysical(void *physContext);
-
-/* Functions to commit and free physical AGP memory ranges */
-
-ibool PMAPI PM_agpCommitPhysical(void *physContext,ulong numPages,ulong startOffset,PM_physAddr *physAddr);
-ibool PMAPI PM_agpFreePhysical(void *physContext,ulong numPages,ulong startOffset);
-
-/* Functions to do I/O port manipulation directly from C code. These
- * functions are portable and will work on any processor architecture
- * to access I/O space registers on PCI devices.
- */
-
-uchar PMAPI PM_inpb(int port);
-ushort PMAPI PM_inpw(int port);
-ulong PMAPI PM_inpd(int port);
-void PMAPI PM_outpb(int port,uchar val);
-void PMAPI PM_outpw(int port,ushort val);
-void PMAPI PM_outpd(int port,ulong val);
-
-/* Functions to determine the I/O port locations for COM and LPT ports.
- * The functions are zero based, so for COM1 or LPT1 pass in a value of 0,
- * for COM2 or LPT2 pass in a value of 1 etc.
- */
-
-int PMAPI PM_getCOMPort(int port);
-int PMAPI PM_getLPTPort(int port);
-
-/* Internal functions that need prototypes */
-
-void PMAPI _PM_getRMvect(int intno, long *realisr);
-void PMAPI _PM_setRMvect(int intno, long realisr);
-void PMAPI _PM_freeMemoryMappings(void);
-
-/* Function to override the default debug log file location */
-
-void PMAPI PM_setDebugLog(const char *logFilePath);
-
-/* Function to put the process to sleep for the specified milliseconds */
-
-void PMAPI PM_sleep(ulong milliseconds);
-
-/* Function to block until 'milliseconds' have passed since last call */
-
-void PMAPI PM_blockUntilTimeout(ulong milliseconds);
-
-/* Functions for directory traversal and management */
-
-void * PMAPI PM_findFirstFile(const char *filename,PM_findData *findData);
-ibool PMAPI PM_findNextFile(void *handle,PM_findData *findData);
-void PMAPI PM_findClose(void *handle);
-void PMAPI PM_makepath(char *p,const char *drive,const char *dir,const char *name,const char *ext);
-int PMAPI PM_splitpath(const char *fn,char *drive,char *dir,char *name,char *ext);
-ibool PMAPI PM_driveValid(char drive);
-void PMAPI PM_getdcwd(int drive,char *dir,int len);
-uint PMAPI PM_getFileAttr(const char *filename);
-void PMAPI PM_setFileAttr(const char *filename,uint attrib);
-ibool PMAPI PM_getFileTime(const char *filename,ibool gmTime,PM_time *time);
-ibool PMAPI PM_setFileTime(const char *filename,ibool gmTime,PM_time *time);
-ibool PMAPI PM_mkdir(const char *filename);
-ibool PMAPI PM_rmdir(const char *filename);
-
-/* Functions to handle loading OS specific shared libraries */
-
-PM_MODULE PMAPI PM_loadLibrary(const char *szDLLName);
-void * PMAPI PM_getProcAddress(PM_MODULE hModule,const char *szProcName);
-void PMAPI PM_freeLibrary(PM_MODULE hModule);
-
-/* Functions and macros for 64-bit arithmetic */
-
-void PMAPI _PM_add64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_sub64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_mul64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_div64(u32 a_low,s32 a_high,u32 b_low,s32 b_high,__i64 *result);
-void PMAPI _PM_shr64(u32 a_low,s32 a_high,s32 shift,__i64 *result);
-void PMAPI _PM_sar64(u32 a_low,s32 a_high,s32 shift,__i64 *result);
-void PMAPI _PM_shl64(u32 a_low,s32 a_high,s32 shift,__i64 *result);
-void PMAPI _PM_neg64(u32 a_low,s32 a_high,__i64 *result);
-#ifdef __NATIVE_INT64__
-#define PM_add64(r,a,b) (r) = (a) + (b)
-#define PM_add64_32(r,a,b) (r) = (a) + (b)
-#define PM_sub64(r,a,b) (r) = (a) - (b)
-#define PM_sub64_32(r,a,b) (r) = (a) - (b)
-#define PM_mul64(r,a,b) (r) = (a) * (b)
-#define PM_mul64_32(r,a,b) (r) = (a) * (b)
-#define PM_div64(r,a,b) (r) = (a) / (b)
-#define PM_div64_32(r,a,b) (r) = (a) / (b)
-#define PM_shr64(r,a,s) (r) = (a) >> (s)
-#define PM_sar64(r,a,s) (r) = ((s64)(a)) >> (s)
-#define PM_shl64(r,a,s) (r) = (u64)(a) << (s)
-#define PM_neg64(r,a,s) (r) = -(a)
-#define PM_not64(r,a,s) (r) = ~(a)
-#define PM_eq64(a,b) (a) == (b)
-#define PM_gt64(a,b) (a) > (b)
-#define PM_lt64(a,b) (a) < (b)
-#define PM_geq64(a,b) (a) >= (b)
-#define PM_leq64(a,b) (a) <= (b)
-#define PM_64to32(a) (u32)(a)
-#define PM_64tos32(a) (s32)(a)
-#define PM_set64(a,b,c) (a) = ((u64)(b) << 32) + (c)
-#define PM_set64_32(a,b) (a) = (b)
-#else
-#define PM_add64(r,a,b) _PM_add64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_add64_32(r,a,b) _PM_add64((a).low,(a).high,b,0,&(r))
-#define PM_sub64(r,a,b) _PM_sub64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_sub64_32(r,a,b) _PM_sub64((a).low,(a).high,b,0,&(r))
-#define PM_mul64(r,a,b) _PM_mul64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_mul64_32(r,a,b) _PM_mul64((a).low,(a).high,b,0,&(r))
-#define PM_div64(r,a,b) _PM_div64((a).low,(a).high,(b).low,(b).high,&(r))
-#define PM_div64_32(r,a,b) _PM_div64((a).low,(a).high,b,0,&(r))
-#define PM_shr64(r,a,s) _PM_shr64((a).low,(a).high,s,&(r))
-#define PM_sar64(r,a,s) _PM_sar64((a).low,(a).high,s,&(r))
-#define PM_shl64(r,a,s) _PM_shl64((a).low,(a).high,s,&(r))
-#define PM_neg64(r,a,s) _PM_neg64((a).low,(a).high,&(r))
-#define PM_not64(r,a,s) (r).low = ~(a).low, (r).high = ~(a).high
-#define PM_eq64(a,b) ((a).low == (b).low && (a).high == (b).high)
-#define PM_gt64(a,b) (((a).high > (b).high) || ((a).high == (b).high && (a).low > (b).low))
-#define PM_lt64(a,b) (((a).high < (b).high) || ((a).high == (b).high && (a).low < (b).low))
-#define PM_geq64(a,b) (PM_eq64(a,b) || PM_gt64(a,b))
-#define PM_leq64(a,b) (PM_eq64(a,b) || PM_lt64(a,b))
-#define PM_64to32(a) (u32)(a.low)
-#define PM_64tos32(a) ((a).high < 0) ? -(a).low : (a).low)
-#define PM_set64(a,b,c) (a).high = (b), (a).low = (c)
-#define PM_set64_32(a,b) (a).high = 0, (a).low = (b)
-#endif
-
-/* Function to enable IOPL access if required */
-
-int PMAPI PM_setIOPL(int iopl);
-
-/* Function to flush the TLB and CPU caches */
-
-void PMAPI PM_flushTLB(void);
-
-/* DOS specific fucntions */
-
-#ifdef __MSDOS__
-uint PMAPI PMHELP_getVersion(void);
-void PMAPI PM_VxDCall(VXD_regs *regs);
-#endif
-
-/* Functions to save and restore the VGA hardware state */
-
-int PMAPI PM_getVGAStateSize(void);
-void PMAPI PM_saveVGAState(void *stateBuf);
-void PMAPI PM_restoreVGAState(const void *stateBuf);
-void PMAPI PM_vgaBlankDisplay(void);
-void PMAPI PM_vgaUnblankDisplay(void);
-
-/* Functions to load and unload DirectDraw libraries. Only used on
- * Windows platforms.
- */
-
-void * PMAPI PM_loadDirectDraw(int device);
-void PMAPI PM_unloadDirectDraw(int device);
-PM_HWND PMAPI PM_getDirectDrawWindow(void);
-void PMAPI PM_doSuspendApp(void);
-
-/* Functions to install, start, stop and remove NT services. Valid only
- * for Win32 apps running on Windows NT.
- */
-
-#ifdef __WINDOWS32__
-ulong PMAPI PM_installService(const char *szDriverName,const char *szServiceName,const char *szLoadGroup,ulong dwServiceType);
-ulong PMAPI PM_startService(const char *szServiceName);
-ulong PMAPI PM_stopService(const char *szServiceName);
-ulong PMAPI PM_removeService(const char *szServiceName);
-#endif
-
-/* Routines to generate native interrupts (ie: protected mode interrupts
- * for protected mode apps) using an interface the same as that use by
- * int86() and int86x() in realmode. These routines are required because
- * many 32 bit compilers use different register structures and different
- * functions causing major portability headaches. Thus we provide our
- * own and solve it all in one fell swoop, and we also get a routine to
- * put stuff into 32 bit registers from real mode ;-)
- */
-
-void PMAPI PM_segread(PMSREGS *sregs);
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out);
-int PMAPI PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs);
-
-/* Call the X86 emulator or the real BIOS in our test harness */
-
-#if defined(TEST_HARNESS) && !defined(PMLIB)
-#define PM_mapRealPointer(r_seg,r_off) _PM_imports.PM_mapRealPointer(r_seg,r_off)
-#define PM_getVESABuf(len,rseg,roff) _PM_imports.PM_getVESABuf(len,rseg,roff)
-#define PM_callRealMode(seg,off,regs,sregs) _PM_imports.PM_callRealMode(seg,off,regs,sregs)
-#define PM_int86(intno,in,out) _PM_imports.PM_int86(intno,in,out)
-#define PM_int86x(intno,in,out,sregs) _PM_imports.PM_int86x(intno,in,out,sregs)
-#endif
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-/* Include OS extensions for interrupt handling */
-
-#if defined(__REALDOS__) || defined(__SMX32__)
-#include "pmint.h"
-#endif
-
-#endif /* __PMAPI_H */
diff --git a/board/MAI/bios_emulator/scitech/include/pmimp.h b/board/MAI/bios_emulator/scitech/include/pmimp.h
deleted file mode 100644
index 817f5e6..0000000
--- a/board/MAI/bios_emulator/scitech/include/pmimp.h
+++ /dev/null
@@ -1,193 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file declaring all the PM imports structure for the
-* current version of the PM library. Included in all code
-* that needs to pass the PM imports to BPD files.
-*
-****************************************************************************/
-
-PM_imports _VARAPI _PM_imports = {
- sizeof(PM_imports),
- PM_getModeType,
- PM_getBIOSPointer,
- PM_getA0000Pointer,
- PM_mapPhysicalAddr,
- PM_mallocShared,
- NULL,
- PM_freeShared,
- PM_mapToProcess,
- PM_mapRealPointer,
- PM_allocRealSeg,
- PM_freeRealSeg,
- PM_allocLockedMem,
- PM_freeLockedMem,
- PM_callRealMode,
- PM_int86,
- PM_int86x,
- DPMI_int86,
- PM_availableMemory,
- PM_getVESABuf,
- PM_getOSType,
- PM_fatalError,
- PM_setBankA,
- PM_setBankAB,
- PM_setCRTStart,
- PM_getCurrentPath,
- PM_getVBEAFPath,
- PM_getNucleusPath,
- PM_getNucleusConfigPath,
- PM_getUniqueID,
- PM_getMachineName,
- VF_available,
- VF_init,
- VF_exit,
- PM_openConsole,
- PM_getConsoleStateSize,
- PM_saveConsoleState,
- PM_restoreConsoleState,
- PM_closeConsole,
- PM_setOSCursorLocation,
- PM_setOSScreenWidth,
- PM_enableWriteCombine,
- PM_backslash,
- PM_lockDataPages,
- PM_unlockDataPages,
- PM_lockCodePages,
- PM_unlockCodePages,
- PM_setRealTimeClockHandler,
- PM_setRealTimeClockFrequency,
- PM_restoreRealTimeClockHandler,
- PM_doBIOSPOST,
- PM_getBootDrive,
- PM_freePhysicalAddr,
- PM_inpb,
- PM_inpw,
- PM_inpd,
- PM_outpb,
- PM_outpw,
- PM_outpd,
- NULL,
- PM_setSuspendAppCallback,
- PM_haveBIOSAccess,
- PM_kbhit,
- PM_getch,
- PM_findBPD,
- PM_getPhysicalAddr,
- PM_sleep,
- PM_getCOMPort,
- PM_getLPTPort,
- PM_loadLibrary,
- PM_getProcAddress,
- PM_freeLibrary,
- PCI_enumerate,
- PCI_accessReg,
- PCI_setHardwareIRQ,
- PCI_generateSpecialCyle,
- NULL,
- PCIBIOS_getEntry,
- CPU_getProcessorType,
- CPU_haveMMX,
- CPU_have3DNow,
- CPU_haveSSE,
- CPU_haveRDTSC,
- CPU_getProcessorSpeed,
- ZTimerInit,
- LZTimerOn,
- LZTimerLap,
- LZTimerOff,
- LZTimerCount,
- LZTimerOnExt,
- LZTimerLapExt,
- LZTimerOffExt,
- LZTimerCountExt,
- ULZTimerOn,
- ULZTimerLap,
- ULZTimerOff,
- ULZTimerCount,
- ULZReadTime,
- ULZElapsedTime,
- ULZTimerResolution,
- PM_findFirstFile,
- PM_findNextFile,
- PM_findClose,
- PM_makepath,
- PM_splitpath,
- PM_driveValid,
- PM_getdcwd,
- PM_setFileAttr,
- PM_mkdir,
- PM_rmdir,
- PM_getFileAttr,
- PM_getFileTime,
- PM_setFileTime,
- CPU_getProcessorName,
- PM_getVGAStateSize,
- PM_saveVGAState,
- PM_restoreVGAState,
- PM_vgaBlankDisplay,
- PM_vgaUnblankDisplay,
- PM_blockUntilTimeout,
- _PM_add64,
- _PM_sub64,
- _PM_mul64,
- _PM_div64,
- _PM_shr64,
- _PM_sar64,
- _PM_shl64,
- _PM_neg64,
- PCI_findBARSize,
- PCI_readRegBlock,
- PCI_writeRegBlock,
- PM_flushTLB,
- PM_useLocalMalloc,
- PM_malloc,
- PM_calloc,
- PM_realloc,
- PM_free,
- PM_getPhysicalAddrRange,
- PM_allocPage,
- PM_freePage,
- PM_agpInit,
- PM_agpExit,
- PM_agpReservePhysical,
- PM_agpReleasePhysical,
- PM_agpCommitPhysical,
- PM_agpFreePhysical,
- PCI_getNumDevices,
- PM_setLocalBPDPath,
-#ifdef __WINDOWS32__
- PM_loadDirectDraw,
- PM_unloadDirectDraw,
- PM_getDirectDrawWindow,
- PM_doSuspendApp,
-#else
- NULL,
- NULL,
- NULL,
- NULL,
-#endif
- };
diff --git a/board/MAI/bios_emulator/scitech/include/pmint.h b/board/MAI/bios_emulator/scitech/include/pmint.h
deleted file mode 100644
index 7d76dad..0000000
--- a/board/MAI/bios_emulator/scitech/include/pmint.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Real mode and 16/32 bit Protected Mode
-*
-* Description: Header file for the interrupt handling extensions to the OS
-* Portability Manager Library. These extensions includes
-* simplified interrupt handling, allowing all common interrupt
-* handlers to be hooked and handled directly with normal C
-* functions, both in 16 bit and 32 bit modes. Note however that
-* simplified handling does not mean slow performance! All low
-* level interrupt handling is done efficiently in assembler
-* for speed (well actually necessary to insulate the
-* application from the lack of far pointers in 32 bit PM). The
-* interrupt handlers currently supported are:
-*
-* Mouse (0x33 callback)
-* Timer Tick (0x8)
-* Keyboard (0x9 and 0x15)
-* Control C/Break (0x23/0x1B)
-* Critical Error (0x24)
-*
-****************************************************************************/
-
-#ifndef __PMINT_H
-#define __PMINT_H
-
-/*--------------------------- Macros and Typedefs -------------------------*/
-
-#ifdef __SMX32__
-/* PC interrupts (Ensure consistent with pme.inc) */
-#define PM_IRQ0 0x40
-#define PM_IRQ1 (PM_IRQ0+1)
-#define PM_IRQ6 (PM_IRQ0+6)
-#define PM_IRQ14 (PM_IRQ0+14)
-#endif
-
-/* Define the different types of interrupt handlers that we support */
-
-typedef uint (PMAPIP PM_criticalHandler)(uint axValue,uint diValue);
-typedef void (PMAPIP PM_breakHandler)(uint breakHit);
-typedef short (PMAPIP PM_key15Handler)(short scanCode);
-typedef void (PMAPIP PM_mouseHandler)(uint event, uint butstate,int x,int y,int mickeyX,int mickeyY);
-
-/* Create a type for representing far pointers in both 16 and 32 bit
- * protected mode.
- */
-
-#ifdef PM386
-typedef struct {
- long off;
- short sel;
- } PMFARPTR;
-#define PMNULL {0,0}
-#else
-typedef void *PMFARPTR;
-#define PMNULL NULL
-#endif
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Routine to load save default data segment selector value into a code
- * segment variable, and another to load the value into the DS register.
- */
-
-void PMAPI PM_loadDS(void);
-void PMAPI PM_saveDS(void);
-
-/* Routine to install a mouse interrupt handling routine. The
- * mouse handler routine is a normal C function, and the PM library
- * will take care of passing the correct parameters to the function,
- * and switching to a local stack.
- *
- * Note that you _must_ lock the memory containing the mouse interrupt
- * handler with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- */
-
-int PMAPI PM_setMouseHandler(int mask,PM_mouseHandler mh);
-void PMAPI PM_restoreMouseHandler(void);
-
-/* Routine to reset the mouse driver, and re-install the current
- * mouse interrupt handler if one was currently installed (since the
- * mouse reset will automatically remove this handler.
- */
-
-void PMAPI PM_resetMouseDriver(int hardReset);
-
-/* Routine to reset the mouse driver, and re-install the current
- * mouse interrupt handler if one was currently installed (since the
- * mouse reset will automatically remove this handler.
- */
-
-void PMAPI PM_resetMouseDriver(int hardReset);
-
-/* Routines to install and remove timer interrupt handlers.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- */
-
-void PMAPI PM_setTimerHandler(PM_intHandler ih);
-void PMAPI PM_chainPrevTimer(void);
-void PMAPI PM_restoreTimerHandler(void);
-
-/* Routines to install and keyboard interrupt handlers.
- *
- * Note that you _must_ lock the memory containing the interrupt
- * handlers with the PM_lockPages() function otherwise you may encounter
- * problems in virtual memory environments.
- */
-
-void PMAPI PM_setKeyHandler(PM_intHandler ih);
-void PMAPI PM_chainPrevKey(void);
-void PMAPI PM_restoreKeyHandler(void);
-
-/* Routines to hook and unhook the alternate Int 15h keyboard intercept
- * callout routine. Your event handler will need to return the following:
- *
- * scanCode - Let the BIOS process scan code (chains to previous handler)
- * 0 - You have processed the scan code so flush from BIOS
- *
- * Note that this is not available under all DOS extenders, but does
- * work under real mode, DOS4GW and X32-VM. It does not work under the
- * PowerPack 32 bit DOS extenders. If you figure out how to do it let us know!
- */
-
-void PMAPI PM_setKey15Handler(PM_key15Handler ih);
-void PMAPI PM_restoreKey15Handler(void);
-
-/* Routines to install and remove the control c/break interrupt handlers.
- * Interrupt handling is performed by the PM/Pro library, and you can call
- * the supplied routines to test the status of the Ctrl-C and Ctrl-Break
- * flags. If you pass the value TRUE for 'clearFlag' to these routines,
- * the internal flags will be reset in order to catch another Ctrl-C or
- * Ctrl-Break interrupt.
- */
-
-void PMAPI PM_installBreakHandler(void);
-int PMAPI PM_ctrlCHit(int clearFlag);
-int PMAPI PM_ctrlBreakHit(int clearFlag);
-void PMAPI PM_restoreBreakHandler(void);
-
-/* Routine to install an alternate break handler that will call your
- * code directly. This is not available under all DOS extenders, but does
- * work under real mode, DOS4GW and X32-VM. It does not work under the
- * PowerPack 32 bit DOS extenders. If you figure out how to do it let us know!
- *
- * Note that you should either install one or the other, but not both!
- */
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh);
-
-/* Routines to install and remove the critical error handler. The interrupt
- * is handled by the PM/Pro library, and the operation will always be failed.
- * You can check the status of the critical error handler with the
- * appropriate function. If you pass the value TRUE for 'clearFlag', the
- * internal flag will be reset ready to catch another critical error.
- */
-
-void PMAPI PM_installCriticalHandler(void);
-int PMAPI PM_criticalError(int *axValue, int *diValue, int clearFlag);
-void PMAPI PM_restoreCriticalHandler(void);
-
-/* Routine to install an alternate critical handler that will call your
- * code directly. This is not available under all DOS extenders, but does
- * work under real mode, DOS4GW and X32-VM. It does not work under the
- * PowerPack 32 bit DOS extenders. If you figure out how to do it let us know!
- *
- * Note that you should either install one or the other, but not both!
- */
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler);
-
-/* Functions to manage protected mode only interrupt handlers */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr);
-void PMAPI PM_setPMvect(int intno, PM_intHandler ih);
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __PMINT_H */
diff --git a/board/MAI/bios_emulator/scitech/include/scitech.h b/board/MAI/bios_emulator/scitech/include/scitech.h
deleted file mode 100644
index 8d5eee9..0000000
--- a/board/MAI/bios_emulator/scitech/include/scitech.h
+++ /dev/null
@@ -1,712 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: General header file for operating system portable code.
-*
-****************************************************************************/
-
-#ifndef __SCITECH_H
-#define __SCITECH_H
-
-/* We have the following defines to identify the compilation environment:
- *
- * __16BIT__ Compiling for 16 bit code (any environment)
- * __32BIT__ Compiling for 32 bit code (any environment)
- * __MSDOS__ Compiling for MS-DOS (includes __WINDOWS16__, __WIN386__)
- * __REALDOS__ Compiling for MS-DOS (excludes __WINDOWS16__)
- * __MSDOS16__ Compiling for 16 bit MS-DOS
- * __MSDOS32__ Compiling for 32 bit MS-DOS
- * __WINDOWS__ Compiling for Windows
- * __WINDOWS16__ Compiling for 16 bit Windows (__MSDOS__ also defined)
- * __WINDOWS32__ Compiling for 32 bit Windows
- * __WIN32_VXD__ Compiling for a 32-bit C based VxD
- * __NT_DRIVER__ Compiling for a 32-bit C based NT device driver
- * __OS2__ Compiling for OS/2
- * __OS2_16__ Compiling for 16 bit OS/2
- * __OS2_32__ Compiling for 32 bit OS/2
- * __UNIX__ Compiling for Unix
- * __QNX__ Compiling for the QNX realtime OS (Unix compatible)
- * __LINUX__ Compiling for the Linux OS (Unix compatible)
- * __FREEBSD__ Compiling for the FreeBSD OS (Unix compatible)
- * __BEOS__ Compiling for the BeOS (Unix compatible)
- * __SMX32__ Compiling for the SMX 32-bit Real Time OS
- * __ENEA_OSE__ Compiling for the OSE embedded OS
- * __RTTARGET__ Compiling for the RTTarget 32-bit embedded OS
- * __MACOS__ Compiling for the MacOS platform (PowerPC)
- * __DRIVER__ Compiling for a 32-bit binary compatible driver
- * __CONSOLE__ Compiling for a fullscreen OS console mode
- * __SNAP__ Compiling as a Snap executeable or dynamic library
- *
- * __INTEL__ Compiling for Intel CPU's
- * __ALPHA__ Compiling for DEC Alpha CPU's
- * __MIPS__ Compiling for MIPS CPU's
- * __PPC__ Compiling for PowerPC CPU's
- * __MC68K__ Compiling for Motorola 680x0
- *
- * __BIG_ENDIAN__ Compiling for a big endian processor
- *
- */
-
-#ifdef __SC__
-#if __INTSIZE == 4
-#define __SC386__
-#endif
-#endif
-
-/* Determine some things that are compiler specific */
-
-#ifdef __GNUC__
-#ifdef __cplusplus
-/* G++ currently fucks this up! */
-#define __cdecl
-#define __stdcall
-#else
-#undef __cdecl
-#undef __stdcall
-#define __cdecl __attribute__ ((cdecl))
-#define __stdcall __attribute__ ((stdcall))
-#endif
-#define __FLAT__ /* GCC is always 32 bit flat model */
-#define __HAS_BOOL__ /* Latest GNU C++ has ibool type */
-#define __HAS_LONG_LONG__ /* GNU C supports long long type */
-#include <stdio.h> /* Bring in for definition of NULL */
-#endif
-
-#ifdef __BORLANDC__
-#if (__BORLANDC__ >= 0x500) || defined(CLASSLIB_DEFS_H)
-#define __HAS_BOOL__ /* Borland C++ 5.0 defines ibool type */
-#endif
-#if (__BORLANDC__ >= 0x502) && !defined(VTOOLSD) && !defined(__SMX32__)
-#define __HAS_INT64__ /* Borland C++ 5.02 supports __int64 type */
-#endif
-#endif
-
-#if defined(_MSC_VER) && !defined(__SC__) && !defined(VTOOLSD) && !defined(__SMX32__)
-#define __HAS_INT64__ /* Visual C++ supports __int64 type */
-#endif
-
-#if defined(__WATCOMC__) && (__WATCOMC__ >= 1100) && !defined(VTOOLSD) && !defined(__SMX32__)
-#define __HAS_INT64__ /* Watcom C++ 11.0 supports __int64 type */
-#endif
-
-/*---------------------------------------------------------------------------
- * Determine the compile time environment. This must be done for each
- * supported platform so that we can determine at compile time the target
- * environment, hopefully without requiring #define's from the user.
- *-------------------------------------------------------------------------*/
-
-/* 32-bit binary compatible driver. Compiled as Win32, but as OS neutral */
-#ifdef __DRIVER__
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#undef __WINDOWS__
-#undef _WIN32
-#undef __WIN32__
-#undef __NT__
-
-/* 32-bit Snap exe or dll. Compiled as Win32, but as OS neutral */
-#elif defined(__SNAP__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#undef __WINDOWS__
-#undef _WIN32
-#undef __WIN32__
-#undef __NT__
-
-/* 32-bit Windows VxD compile environment */
-#elif defined(__vtoolsd_h_) || defined(VTOOLSD)
-#include <vtoolsc.h>
-#define __WIN32_VXD__
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#define _MAX_PATH 256
-#undef __WINDOWS32__
-
-/* 32-bit Windows NT driver compile environment: TODO!! */
-#elif defined(__NT_DRIVER__)
-#include "ntdriver.h"
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#define _MAX_PATH 256
-#undef __WINDOWS32__
-
-/* 32-bit SMX compile environment */
-#elif defined(__SMX32__)
-#ifndef __MSDOS__
-#define __MSDOS__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 32-bit Enea OSE environment */
-#elif defined(__ENEA_OSE__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 32-bit RTTarget-32 environment */
-#elif defined(__RTTARGET__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 32-bit extended DOS compile environment */
-#elif defined(__MSDOS__) || defined(__MSDOS32__) || defined(__DOS__) || defined(__DPMI32__) || (defined(M_I86) && (!defined(__SC386__) && !defined(M_I386))) || defined(TNT)
-#ifndef __MSDOS__
-#define __MSDOS__
-#endif
-#if defined(__MSDOS32__) || defined(__386__) || defined(__FLAT__) || defined(__NT__) || defined(__SC386__)
-#ifndef __MSDOS32__
-#define __MSDOS32__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __REALDOS__
-#define __REALDOS__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-
-/* 16-bit Windows compile environment */
-#elif (defined(_Windows) || defined(_WINDOWS)) && !defined(__DPMI16__)
-#ifndef __16BIT__
-#define __16BIT__
-#endif
-#ifndef __WINDOWS16__
-#define __WINDOWS16__
-#endif
-#ifndef __WINDOWS__
-#define __WINDOWS__
-#endif
-#ifndef __MSDOS__
-#define __MSDOS__
-#endif
-
-/* 16-bit DOS compile environment */
-#else
-#ifndef __16BIT__
-#define __16BIT__
-#endif
-#ifndef __MSDOS16__
-#define __MSDOS16__
-#endif
-#ifndef __REALDOS__
-#define __REALDOS__
-#endif
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit Windows compile environment */
-#elif defined(WIN32) || defined(_WIN32) || defined(__WIN32__) || defined(__NT__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __WINDOWS32__
-#define __WINDOWS32__
-#endif
-#ifndef _WIN32
-#define _WIN32 /* Microsoft Win32 SDK headers use _WIN32 */
-#endif
-#ifndef WIN32
-#define WIN32 /* OpenGL headers use WIN32 */
-#endif
-#ifndef __WINDOWS__
-#define __WINDOWS__
-#endif
-
-/* 32-bit OS/2 VDD compile environment */
-/* We're assuming (for now) that CL386 must be used */
-#elif defined(MSDOS) && defined(M_I386)
-/* fixes necessary to compile with CL386 */
-#define __cdecl _cdecl
-typedef unsigned int size_t;
-
-#include <mvdm.h>
-
-/* This should probably be somewhere else... */
-/* Inline eligible functions (we have no CRT libs for CL386) */
-#pragma intrinsic (strcpy, strcmp, strlen, strcat)
-#pragma intrinsic (memcmp, memcpy, memset)
-
-#define __OS2_VDD__
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#define CCHMAXPATH 256
-#define _MAX_PATH 256
-#ifndef __OS2__
-#define __OS2__
-#endif
-#ifndef __OS2_32__
-#define __OS2_32__
-#endif
-
-/* 16-bit OS/2 compile environment */
-#elif defined(__OS2_16__)
-#ifndef __OS2__
-#define __OS2__
-#endif
-#ifndef __16BIT__
-#define __16BIT__
-#endif
-#ifndef __OS2_PM__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit OS/2 compile environment */
-#elif defined(__OS2__) || defined(__OS2_32__)
-#ifndef __OS2__
-#define __OS2__
-#endif
-#ifndef __OS2_32__
-#define __OS2_32__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __OS2_PM__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit QNX compile environment */
-#elif defined(__QNX__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-#if !defined(__PHOTON__) && !defined(__X11__)
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit Linux compile environment */
-#elif defined(__LINUX__) || defined(linux)
-#ifndef __LINUX__
-#define __LINUX__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-#ifndef __X11__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit FreeBSD compile environment */
-#elif defined(__FREEBSD__)
-#ifndef __FREEBSD__
-#define __FREEBSD__
-#endif
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-#ifndef __X11__
-#ifndef __CONSOLE__
-#define __CONSOLE__
-#endif
-#endif
-
-/* 32-bit BeOS compile environment */
-#elif defined(__BEOS__)
-#ifndef __32BIT__
-#define __32BIT__
-#endif
-#ifndef __UNIX__
-#define __UNIX__
-#endif
-#ifdef __GNUC__
-#define stricmp strcasecmp
-#endif
-
-/* Unsupported OS! */
-#else
-#error This platform is not currently supported!
-#endif
-
-/* Determine the CPU type that we are compiling for */
-
-#if defined(__M_ALPHA) || defined(__ALPHA_) || defined(__ALPHA) || defined(__alpha)
-#ifndef __ALPHA__
-#define __ALPHA__
-#endif
-#elif defined(__M_PPC) || defined(__POWERC)
-#ifndef __PPC__
-#define __PPC__
-#endif
-#elif defined(__M_MRX000)
-#ifndef __MIPS__
-#define __MIPS__
-#endif
-#else
-#ifndef __INTEL__
-#define __INTEL__ /* Assume Intel if nothing found */
-#endif
-#endif
-
-/* We have the following defines to define the calling conventions for
- * publicly accesible functions:
- *
- * _PUBAPI - Compiler default calling conventions for all public 'C' functions
- * _ASMAPI - Calling conventions for all public assembler functions
- * _VARAPI - Modifiers for variables; Watcom C++ mangles C++ globals
- * _STDCALL - Win32 __stdcall where possible, __cdecl if not supported
- */
-
-#if defined(_MSC_VER) && defined(_WIN32) && !defined(__SC__)
-#define __PASCAL __stdcall
-#else
-#define __PASCAL __pascal
-#endif
-
-#if defined(NO_STDCALL)
-#define _STDCALL __cdecl
-#else
-#define _STDCALL __stdcall
-#endif
-
-#ifdef __WATCOMC__
-#if (__WATCOMC__ >= 1050)
-#define _VARAPI __cdecl
-#else
-#define _VARAPI
-#endif
-#else
-#define _VARAPI
-#endif
-
-#if defined(__IBMC__) || defined(__IBMCPP__)
-#define PTR_DECL_IN_FRONT
-#endif
-
-/* Define the calling conventions for all public functions. For simplicity
- * we define all public functions as __cdecl calling conventions, so that
- * they are the same across all compilers and runtime DLL's.
- */
-
-#define _PUBAPI __cdecl
-#define _ASMAPI __cdecl
-
-/* Determine the syntax for declaring a function pointer with a
- * calling conventions override. Most compilers require the calling
- * convention to be declared in front of the '*', but others require
- * it to be declared after the '*'. We handle both in here depending
- * on what the compiler requires.
- */
-
-#ifdef PTR_DECL_IN_FRONT
-#define _PUBAPIP * _PUBAPI
-#define _ASMAPIP * _ASMAPI
-#else
-#define _PUBAPIP _PUBAPI *
-#define _ASMAPIP _ASMAPI *
-#endif
-
-/* Useful macros */
-
-#define PRIVATE static
-#define PUBLIC
-
-/* This HAS to be 0L for 16-bit real mode code to work!!! */
-
-#ifndef NULL
-# define _NULL 0L
-# define NULL _NULL
-#endif
-
-#ifndef MAX
-# define MAX(a,b) ( ((a) > (b)) ? (a) : (b))
-#endif
-#ifndef MIN
-# define MIN(a,b) ( ((a) < (b)) ? (a) : (b))
-#endif
-#ifndef ABS
-# define ABS(a) ((a) >= 0 ? (a) : -(a))
-#endif
-#ifndef SIGN
-# define SIGN(a) ((a) > 0 ? 1 : -1)
-#endif
-
-/* General typedefs */
-
-#ifndef __GENDEFS
-#define __GENDEFS
-#if defined(__BEOS__)
-#include <SupportDefs.h>
-#else
-#ifdef __LINUX__
-#include <sys/types.h>
-#ifdef __STRICT_ANSI__
-typedef unsigned short ushort;
-typedef unsigned long ulong;
-typedef unsigned int uint;
-#endif
-#ifdef __KERNEL__
-#define __GENDEFS_2
-#endif
-#else
-#if !(defined(__QNXNTO__) && defined(GENERAL_STRUCT))
-typedef unsigned short ushort;
-typedef unsigned long ulong;
-#endif
-typedef unsigned int uint;
-#endif
-typedef unsigned char uchar;
-#endif
-typedef int ibool; /* Integer boolean type */
-#ifdef USE_BOOL /* Only for older code */
-#ifndef __cplusplus
-#define bool ibool /* Standard C */
-#else
-#ifndef __HAS_BOOL__
-#define bool ibool /* Older C++ compilers */
-#endif
-#endif /* __cplusplus */
-#endif /* USE_BOOL */
-#endif /* __GENDEFS */
-
-/* More general typedefs compatible with Linux kernel code */
-
-#ifndef __GENDEFS_2
-#define __GENDEFS_2
-typedef char s8;
-typedef unsigned char u8;
-typedef short s16;
-typedef unsigned short u16;
-#ifdef __16BIT__
-typedef long s32;
-typedef unsigned long u32;
-#else
-typedef int s32;
-typedef unsigned int u32;
-#endif
-typedef struct {
- u32 low;
- s32 high;
- } __i64;
-#ifdef __HAS_LONG_LONG__
-#define __NATIVE_INT64__
-typedef long long s64;
-typedef unsigned long long u64;
-#elif defined(__HAS_INT64__) && !defined(__16BIT__)
-#define __NATIVE_INT64__
-typedef __int64 s64;
-typedef unsigned __int64 u64;
-#else
-typedef __i64 s64;
-typedef __i64 u64;
-#endif
-#endif
-
-/* Boolean truth values */
-
-#undef false
-#undef true
-#undef NO
-#undef YES
-#undef FALSE
-#undef TRUE
-#define false 0
-#define true 1
-#define NO 0
-#define YES 1
-#define FALSE 0
-#define TRUE 1
-
-/* Inline debugger interrupts for Watcom C++ and Borland C++ */
-
-#ifdef __WATCOMC__
-void DebugInt(void);
-#pragma aux DebugInt = \
- "int 3";
-void DebugVxD(void);
-#pragma aux DebugVxD = \
- "int 1";
-#elif defined(__BORLANDC__)
-#define DebugInt() __emit__(0xCC)
-#define DebugVxD() {__emit__(0xCD); __emit__(0x01);}
-#elif defined(_MSC_VER)
-#define DebugInt() _asm int 0x3
-#define DebugVxD() _asm int 0x1
-#elif defined(__GNUC__)
-#define DebugInt() asm volatile ("int $0x3")
-#define DebugVxD() asm volatile ("int $0x1")
-#else
-void _ASMAPI DebugInt(void);
-void _ASMAPI DebugVxD(void);
-#endif
-
-/* Macros to break once and never break again */
-
-#define DebugIntOnce() \
-{ \
- static ibool firstTime = true; \
- if (firstTime) { \
- firstTime = false; \
- DebugInt(); \
- } \
-}
-
-#define DebugVxDOnce() \
-{ \
- static ibool firstTime = true; \
- if (firstTime) { \
- firstTime = false; \
- DebugVxD(); \
- } \
-}
-
-/* Macros for linux string compatibility functions */
-
-#ifdef __LINUX__
-#define stricmp strcasecmp
-#define strnicmp strncasecmp
-#endif
-
-/* Macros for NT driver string compatibility functions */
-
-#ifdef __NT_DRIVER__
-#define stricmp _stricmp
-#define strnicmp _strnicmp
-#endif
-
-/* Get rid of some helaciously annoying Visual C++ warnings! */
-
-#if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__)
-#pragma warning(disable:4761) /* integral size mismatch in argument; conversion supplied */
-#pragma warning(disable:4244) /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */
-#pragma warning(disable:4018) /* '<' : signed/unsigned mismatch */
-#pragma warning(disable:4305) /* 'initializing' : truncation from 'const double' to 'float' */
-#endif
-
-/*---------------------------------------------------------------------------
- * Set of debugging macros used by the libraries. If the debug flag is
- * set, they are turned on depending on the setting of the flag. User code
- * can override the default functions called when a check fails, and the
- * MGL does this so it can restore the system from graphics mode to display
- * an error message. These functions also log information to the
- * scitech.log file in the root directory of the hard drive when problems
- * show up.
- *
- * If you set the value of CHECKED to be 2, it will also enable code to
- * insert hard coded debugger interrupt into the source code at the line of
- * code where the check fail. This is useful if you run the code under a
- * debugger as it will break inside the debugger before exiting with a
- * failure condition.
- *
- * Also for code compiled to run under Windows, we also call the
- * OutputDebugString function to send the message to the system debugger
- * such as Soft-ICE or WDEB386. Hence if you get any non-fatal warnings you
- * will see those on the debugger terminal as well as in the log file.
- *-------------------------------------------------------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-extern void (*_CHK_fail)(int fatal,const char *msg,const char *cond,const char *file,int line);
-void _CHK_defaultFail(int fatal,const char *msg,const char *cond,const char *file,int line);
-
-#ifdef CHECKED
-# define CHK(x) x
-#if CHECKED > 1
-# define CHECK(p) \
- ((p) ? (void)0 : DebugInt(), \
- _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-# define WARN(p) \
- ((p) ? (void)0 : DebugInt(), \
- _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-#else
-# define CHECK(p) \
- ((p) ? (void)0 : \
- _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-# define WARN(p) \
- ((p) ? (void)0 : \
- _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
- #p, __FILE__, __LINE__))
-#endif
-# define LOGFATAL(msg) \
- _CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \
- msg, __FILE__, __LINE__)
-# define LOGWARN(msg) \
- _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \
- msg, __FILE__, __LINE__)
-#else
-# define CHK(x)
-# define CHECK(p) ((void)0)
-# define WARN(p) ((void)0)
-# define LOGFATAL(msg) ((void)0)
-# define LOGWARN(msg) ((void)0)
-#endif
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __SCITECH_H */
diff --git a/board/MAI/bios_emulator/scitech/include/scitech.mac b/board/MAI/bios_emulator/scitech/include/scitech.mac
deleted file mode 100644
index 27a2fc0..0000000
--- a/board/MAI/bios_emulator/scitech/include/scitech.mac
+++ /dev/null
@@ -1,1321 +0,0 @@
-;****************************************************************************
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NetWide Assembler (NASM) or Turbo Assembler (TASM)
-;* Environment: Any Intel Environment
-;*
-;* Description: Macros to provide memory model independant assembly language
-;* module for C programming. Supports the large and flat memory
-;* models.
-;*
-;* The defines that you should use when assembling modules that
-;* use this macro package are:
-;*
-;* __LARGE__ Assemble for 16-bit large model
-;* __FLAT__ Assemble for 32-bit FLAT memory model
-;* __NOU__ No underscore for all external C labels
-;* __NOU_VAR__ No underscore for global variables only
-;*
-;* The default settings are for 16-bit large memory model with
-;* leading underscores for symbol names.
-;*
-;* The main intent of the macro file is to enable programmers
-;* to write _one_ set of source that can be assembled to run
-;* in either 16 bit real and protected modes or 32 bit
-;* protected mode without the need to riddle the code with
-;* 'if flatmodel' style conditional assembly (it is still there
-;* but nicely hidden by a macro layer that enhances the
-;* readability and understandability of the resulting code).
-;*
-;****************************************************************************
-
-; Include the appropriate version in here depending on the assembler. NASM
-; appears to always try and parse code, even if it is in a non-compiling
-; block of a ifdef expression, and hence crashes if we include the TASM
-; macro package in the same header file. Hence we split the macros up into
-; two separate header files.
-
-ifdef __NASM_MAJOR__
-
-;============================================================================
-; Macro package when compiling with NASM.
-;============================================================================
-
-; Turn off underscores for globals if disabled for all externals
-
-%ifdef __NOU__
-%define __NOU_VAR__
-%endif
-
-; Define the __WINDOWS__ symbol if we are compiling for any Windows
-; environment
-
-%ifdef __WINDOWS16__
-%define __WINDOWS__ 1
-%endif
-%ifdef __WINDOWS32__
-%define __WINDOWS__ 1
-%define __WINDOWS32_386__ 1
-%endif
-
-; Macros for accessing 'generic' registers
-
-%ifdef __FLAT__
-%idefine _ax eax
-%idefine _bx ebx
-%idefine _cx ecx
-%idefine _dx edx
-%idefine _si esi
-%idefine _di edi
-%idefine _bp ebp
-%idefine _sp esp
-%idefine _es
-%idefine UCHAR BYTE ; Size of a character
-%idefine USHORT WORD ; Size of a short
-%idefine UINT DWORD ; Size of an integer
-%idefine ULONG DWORD ; Size of a long
-%idefine BOOL DWORD ; Size of a boolean
-%idefine DPTR DWORD ; Size of a data pointer
-%idefine FDPTR FWORD ; Size of a far data pointer
-%idefine NDPTR DWORD ; Size of a near data pointer
-%idefine CPTR DWORD ; Size of a code pointer
-%idefine FCPTR FWORD ; Size of a far code pointer
-%idefine NCPTR DWORD ; Size of a near code pointer
-%idefine FPTR NEAR ; Distance for function pointers
-%idefine DUINT dd ; Declare a integer variable
-%idefine intsize 4
-%idefine flatmodel 1
-%else
-%idefine _ax ax
-%idefine _bx bx
-%idefine _cx cx
-%idefine _dx dx
-%idefine _si si
-%idefine _di di
-%idefine _bp bp
-%idefine _sp sp
-%idefine _es es:
-%idefine UCHAR BYTE ; Size of a character
-%idefine USHORT WORD ; Size of a short
-%idefine UINT WORD ; Size of an integer
-%idefine ULONG DWORD ; Size of a long
-%idefine BOOL WORD ; Size of a boolean
-%idefine DPTR DWORD ; Size of a data pointer
-%idefine FDPTR DWORD ; Size of a far data pointer
-%idefine NDPTR WORD ; Size of a near data pointer
-%idefine CPTR DWORD ; Size of a code pointer
-%idefine FCPTR DWORD ; Size of a far code pointer
-%idefine NCPTR WORD ; Size of a near code pointer
-%idefine FPTR FAR ; Distance for function pointers
-%idefine DUINT dw ; Declare a integer variable
-%idefine intsize 2
-%endif
-%idefine invert ~
-%idefine offset
-%idefine use_nasm
-
-; Convert all jumps to near jumps, since NASM does not so this automatically
-
-%idefine jo jo near
-%idefine jno jno near
-%idefine jz jz near
-%idefine jnz jnz near
-%idefine je je near
-%idefine jne jne near
-%idefine jb jb near
-%idefine jbe jbe near
-%idefine ja ja near
-%idefine jae jae near
-%idefine jl jl near
-%idefine jle jle near
-%idefine jg jg near
-%idefine jge jge near
-%idefine jc jc near
-%idefine jnc jnc near
-%idefine js js near
-%idefine jns jns near
-
-%ifdef DOUBLE
-%idefine REAL QWORD
-%idefine DREAL dq
-%else
-%idefine REAL DWORD
-%idefine DREAL dd
-%endif
-
-; Boolean truth values (same as those in debug.h)
-
-%idefine False 0
-%idefine True 1
-%idefine No 0
-%idefine Yes 1
-%idefine Yes 1
-
-; Macro to be invoked at the start of all modules to set up segments for
-; later use. Does nothing for NASM.
-
-%imacro header 1
-%endmacro
-
-; Macro to begin a data segment
-
-%imacro begdataseg 1
-%ifdef __GNUC__
-segment .data public class=DATA use32 flat
-%else
-%ifdef flatmodel
-segment _DATA public align=4 class=DATA use32 flat
-%else
-segment _DATA public align=4 class=DATA use16
-%endif
-%endif
-%endmacro
-
-; Macro to end a data segment
-
-%imacro enddataseg 1
-%endmacro
-
-; Macro to begin a code segment
-
-%imacro begcodeseg 1
-%ifdef __PIC__
-%ifdef __LINUX__
- extern _GLOBAL_OFFSET_TABLE_
-%else
- extern __GLOBAL_OFFSET_TABLE_
-%endif
-%endif
-%ifdef __GNUC__
-segment .text public class=CODE use32 flat
-%else
-%ifdef flatmodel
-segment _TEXT public align=16 class=CODE use32 flat
-%else
-segment %1_TEXT public align=16 class=CODE use16
-%endif
-%endif
-%endmacro
-
-; Macro to begin a near code segment
-
-%imacro begcodeseg_near 0
-%ifdef __GNUC__
-segment .text public class=CODE use32 flat
-%else
-%ifdef flatmodel
-segment _TEXT public align=16 class=CODE use32 flat
-%else
-segment _TEXT public align=16 class=CODE use16
-%endif
-%endif
-%endmacro
-
-; Macro to end a code segment
-
-%imacro endcodeseg 1
-%endmacro
-
-; Macro to end a near code segment
-
-%imacro endcodeseg_near 0
-%endmacro
-
-; Macro for an extern C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cextern 2
-%ifdef __NOU_VAR__
-extern %1
-%else
-extern _%1
-%define %1 _%1
-%endif
-%endmacro
-
-%imacro cexternfunc 2
-%ifdef __NOU__
-extern %1
-%else
-extern _%1
-%define %1 _%1
-%endif
-%endmacro
-
-; Macro for a public C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cpublic 1
-%ifdef __NOU_VAR__
-global %1
-%1:
-%else
-global _%1
-_%1:
-%define %1 _%1
-%endif
-%endmacro
-
-; Macro for an global C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cglobal 1
-%ifdef __NOU_VAR__
-global %1
-%else
-global _%1
-%define %1 _%1
-%endif
-%endmacro
-
-; Macro for an global C function symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-%imacro cglobalfunc 1
-%ifdef __PIC__
-global %1:function
-%else
-%ifdef __NOU__
-global %1
-%else
-global _%1
-%define %1 _%1
-%endif
-%endif
-%endmacro
-
-; Macro to start a C callable function. This will be a far function for
-; 16-bit code, and a near function for 32-bit code.
-
-%imacro cprocstatic 1
-%push cproc
-%1:
-%ifdef flatmodel
-%stacksize flat
-%define ret retn
-%else
-%stacksize large
-%define ret retf
-%endif
-%assign %$localsize 0
-%endmacro
-
-%imacro cprocstart 1
-%push cproc
- cglobalfunc %1
-%1:
-%ifdef flatmodel
-%stacksize flat
-%define ret retn
-%else
-%stacksize large
-%define ret retf
-%endif
-%assign %$localsize 0
-%endmacro
-
-; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
-; calling conventions are always _far _pascal for 16 bit DLL's, we actually
-; rename this routine with an extra underscore with 'C' calling conventions
-; and a small DLL stub will be provided by the high level code to call the
-; assembler routine.
-
-%imacro cprocstartdll16 1
-%ifdef __WINDOWS16__
-cprocstart _%1
-%else
-cprocstart %1
-%endif
-%endmacro
-
-; Macro to start a C callable near function.
-
-%imacro cprocnear 1
-%push cproc
- cglobalfunc %1
-%1:
-%define ret retn
-%ifdef flatmodel
-%stacksize flat
-%else
-%stacksize small
-%endif
-%assign %$localsize 0
-%endmacro
-
-; Macro to start a C callable far function.
-
-%imacro cprocfar 1
-%push cproc
- cglobalfunc %1
-%1:
-%define ret retf
-%ifdef flatmodel
-%stacksize flat
-%else
-%stacksize large
-%endif
-%assign %$localsize 0
-%endmacro
-
-; Macro to end a C function
-
-%imacro cprocend 0
-%pop
-%endmacro
-
-; Macros for entering and exiting C callable functions. Note that we must
-; always save and restore the SI and DI registers for C functions, and for
-; 32 bit C functions we also need to save and restore EBX and clear the
-; direction flag.
-
-%imacro enter_c 0
- push _bp
- mov _bp,_sp
-%ifnidn %$localsize,0
- sub _sp,%$localsize
-%endif
-%ifdef flatmodel
- push ebx
-%endif
- push _si
- push _di
-%endmacro
-
-%imacro leave_c 0
- pop _di
- pop _si
-%ifdef flatmodel
- pop ebx
- cld
-%endif
-%ifnidn %$localsize,0
- mov _sp,_bp
-%endif
- pop _bp
-%endmacro
-
-%imacro use_ebx 0
-%ifdef flatmodel
- push ebx
-%endif
-%endmacro
-
-%imacro unuse_ebx 0
-%ifdef flatmodel
- pop ebx
-%endif
-%endmacro
-
-; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
-; be used in assembly routines. This evaluates to nothing in the flat memory
-; model, but is saves and restores DS in the large memory model.
-
-%imacro use_ds 0
-%ifndef flatmodel
- push ds
-%endif
-%endmacro
-
-%imacro unuse_ds 0
-%ifndef flatmodel
- pop ds
-%endif
-%endmacro
-
-%imacro use_es 0
-%ifndef flatmodel
- push es
-%endif
-%endmacro
-
-%imacro unuse_es 0
-%ifndef flatmodel
- pop es
-%endif
-%endmacro
-
-; Macros for loading the address of a data pointer into a segment and
-; index register pair. The %imacro explicitly loads DS or ES in the 16 bit
-; memory model, or it simply loads the offset into the register in the flat
-; memory model since DS and ES always point to all addressable memory. You
-; must use the correct _REG (ie: _BX) %imacros for documentation purposes.
-
-%imacro _lds 2
-%ifdef flatmodel
- mov %1,%2
-%else
- lds %1,%2
-%endif
-%endmacro
-
-%imacro _les 2
-%ifdef flatmodel
- mov %1,%2
-%else
- les %1,%2
-%endif
-%endmacro
-
-; Macros for adding and subtracting a value from registers. Two value are
-; provided, one for 16 bit modes and another for 32 bit modes (the extended
-; register is used in 32 bit modes).
-
-%imacro _add 3
-%ifdef flatmodel
- add e%1, %3
-%else
- add %1, %2
-%endif
-%endmacro
-
-%imacro _sub 3
-%ifdef flatmodel
- sub e%1, %3
-%else
- sub %1, %2
-%endif
-%endmacro
-
-; Macro to clear the high order word for the 32 bit extended registers.
-; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
-; value, and will evaluate to nothing in 16 bit modes.
-
-%imacro clrhi 1
-%ifdef flatmodel
- movzx e%1,%1
-%endif
-%endmacro
-
-%imacro sgnhi 1
-%ifdef flatmodel
- movsx e%1,%1
-%endif
-%endmacro
-
-; Macro to load an extended register with an integer value in either mode
-
-%imacro loadint 2
-%ifdef flatmodel
- mov e%1,%2
-%else
- xor e%1,e%1
- mov %1,%2
-%endif
-%endmacro
-
-; Macros to load and store integer values with string instructions
-
-%imacro LODSINT 0
-%ifdef flatmodel
- lodsd
-%else
- lodsw
-%endif
-%endmacro
-
-%imacro STOSINT 0
-%ifdef flatmodel
- stosd
-%else
- stosw
-%endif
-%endmacro
-
-; Macros to provide resb, resw, resd compatibility with NASM
-
-%imacro dclb 1
-times %1 db 0
-%endmacro
-
-%imacro dclw 1
-times %1 dw 0
-%endmacro
-
-%imacro dcld 1
-times %1 dd 0
-%endmacro
-
-; Macro to get the addres of the GOT for Linux/FreeBSD shared
-; libraries into the EBX register.
-
-%imacro get_GOT 1
- call %%getgot
-%%getgot: pop %1
- add %1,_GLOBAL_OFFSET_TABLE_+$$-%%getgot wrt ..gotpc
-%endmacro
-
-; Macro to get the address of a *local* variable that is global to
-; a single module in a manner that will work correctly when compiled
-; into a Linux shared library. Note that this will *not* work for
-; variables that are defined as global to all modules. For that
-; use the LEA_G macro
-
-%macro LEA_L 2
-%ifdef __PIC__
- get_GOT %1
- lea %1,[%1+%2 wrt ..gotoff]
-%else
- lea %1,[%2]
-%endif
-%endmacro
-
-; Same macro as above but for global variables public to *all*
-; modules.
-
-%macro LEA_G 2
-%ifdef __PIC__
- get_GOT %1
- mov %1,[%1+%2 wrt ..got]
-%else
- lea %1,[%2]
-%endif
-%endmacro
-
-; macros to declare assembler function stubs for function structures
-
-%imacro BEGIN_STUBS_DEF 2
-begdataseg _STUBS
-%ifdef __NOU_VAR__
-extern %1
-%define STUBS_START %1
-%else
-extern _%1
-%define STUBS_START _%1
-%endif
-enddataseg _STUBS
-begcodeseg _STUBS
-%assign off %2
-%endmacro
-
-%imacro DECLARE_STUB 1
-%ifdef __PIC__
- global %1:function
-%1:
- get_GOT eax
- mov eax,[eax+STUBS_START wrt ..got]
- jmp [eax+off]
-%else
-%ifdef __NOU__
- global %1
-%1:
-%else
- global _%1
-_%1:
-%endif
- jmp [DWORD STUBS_START+off]
-%endif
-%assign off off+4
-%endmacro
-
-%imacro SKIP_STUB 1
-%assign off off+4
-%endmacro
-
-%imacro DECLARE_STDCALL 2
-%ifdef STDCALL_MANGLE
- global _%1@%2
-_%1@%2:
-%else
-%ifdef STDCALL_USCORE
- global _%1
-_%1:
-%else
- global %1
-%1:
-%endif
-%endif
- jmp [DWORD STUBS_START+off]
-%assign off off+4
-%endmacro
-
-%imacro END_STUBS_DEF 0
-endcodeseg _STUBS
-%endmacro
-
-; macros to declare assembler import stubs for binary loadable drivers
-
-%imacro BEGIN_IMPORTS_DEF 1
-BEGIN_STUBS_DEF %1,4
-%endmacro
-
-%imacro DECLARE_IMP 2
-DECLARE_STUB %1
-%endmacro
-
-%imacro SKIP_IMP 2
-SKIP_STUB %1
-%endmacro
-
-%imacro SKIP_IMP2 1
-DECLARE_STUB %1
-%endmacro
-
-%imacro SKIP_IMP3 1
-SKIP_STUB %1
-%endmacro
-
-%imacro END_IMPORTS_DEF 0
-END_STUBS_DEF
-%endmacro
-
-else ; __NASM_MAJOR__
-
-;============================================================================
-; Macro package when compiling with TASM.
-;============================================================================
-
-; Turn off underscores for globals if disabled for all externals
-
-ifdef __NOU__
-__NOU_VAR__ = 1
-endif
-
-; Define the __WINDOWS__ symbol if we are compiling for any Windows
-; environment
-
-ifdef __WINDOWS16__
-__WINDOWS__ = 1
-endif
-ifdef __WINDOWS32__
-__WINDOWS__ = 1
-__WINDOWS32_386__ = 1
-endif
-ifdef __WIN386__
-__WINDOWS__ = 1
-__WINDOWS32_386__ = 1
-endif
-ifdef __VXD__
-__WINDOWS__ = 1
-__WINDOWS32_386__ = 1
- MASM
- .386
- NO_SEGMENTS = 1
- include vmm.inc ; IGNORE DEPEND
- include vsegment.inc ; IGNORE DEPEND
- IDEAL
-endif
-
-; Macros for accessing 'generic' registers
-
-ifdef __FLAT__
- _ax EQU eax ; EAX is used for accumulator
- _bx EQU ebx ; EBX is used for accumulator
- _cx EQU ecx ; ECX is used for looping
- _dx EQU edx ; EDX is used for data register
- _si EQU esi ; ESI is the source index register
- _di EQU edi ; EDI is the destination index register
- _bp EQU ebp ; EBP is used for base pointer register
- _sp EQU esp ; ESP is used for stack pointer register
- _es EQU ; ES and DS are the same in 32 bit PM
- typedef UCHAR BYTE ; Size of a character
- typedef USHORT WORD ; Size of a short
- typedef UINT DWORD ; Size of an integer
- typedef ULONG DWORD ; Size of a long
- typedef BOOL DWORD ; Size of a boolean
- typedef DPTR DWORD ; Size of a data pointer
- typedef FDPTR FWORD ; Size of a far data pointer
- typedef NDPTR DWORD ; Size of a near data pointer
- typedef CPTR DWORD ; Size of a code pointer
- typedef FCPTR FWORD ; Size of a far code pointer
- typedef NCPTR DWORD ; Size of a near code pointer
- typedef DUINT DWORD ; Declare a integer variable
- FPTR EQU NEAR ; Distance for function pointers
- intsize = 4 ; Size of an integer
- flatmodel = 1 ; This is a flat memory model
- P386 ; Turn on 386 code generation
- MODEL FLAT ; Set up for 32 bit simplified FLAT model
-else
- _ax EQU ax ; AX is used for accumulator
- _bx EQU bx ; BX is used for accumulator
- _cx EQU cx ; CX is used for looping
- _dx EQU dx ; DX is used for data register
- _si EQU si ; SI is the source index register
- _di EQU di ; DI is the destination index register
- _bp EQU bp ; BP is used for base pointer register
- _sp EQU sp ; SP is used for stack pointer register
- _es EQU es: ; ES is used for segment override
- typedef UCHAR BYTE ; Size of a character
- typedef USHORT WORD ; Size of a short
- typedef UINT WORD ; Size of an integer
- typedef ULONG DWORD ; Size of a long
- typedef BOOL WORD ; Size of a boolean
- typedef DPTR DWORD ; Size of a data pointer
- typedef FDPTR DWORD ; Size of a far data pointer
- typedef NDPTR WORD ; Size of a near data pointer
- typedef CPTR DWORD ; Size of a code pointer
- typedef FCPTR DWORD ; Size of a far code pointer
- typedef NCPTR WORD ; Size of a near code pointer
- typedef DUINT WORD ; Declare a integer variable
- FPTR EQU FAR ; Distance for function pointers
- intsize = 2 ; Size of an integer
- P386 ; Turn on 386 code generation
-endif
- invert EQU not
-
-; Provide a typedef for real floating point numbers
-
-ifdef DOUBLE
-typedef REAL QWORD
-typedef DREAL QWORD
-else
-typedef REAL DWORD
-typedef DREAL DWORD
-endif
-
-; Macros to access the floating point stack registers to convert them
-; from NASM style to TASM style
-
-st0 EQU st(0)
-st1 EQU st(1)
-st2 EQU st(2)
-st3 EQU st(3)
-st4 EQU st(4)
-st5 EQU st(5)
-st6 EQU st(6)
-st7 EQU st(7)
-st8 EQU st(8)
-
-; Boolean truth values (same as those in debug.h)
-
-ifndef __VXD__
-False = 0
-True = 1
-No = 0
-Yes = 1
-Yes = 1
-endif
-
-; Macros for the _DATA data segment. This segment contains initialised data.
-
-MACRO begdataseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_DATA_SEG
- IDEAL
-else
-ifdef flatmodel
- DATASEG
-else
-SEGMENT _DATA DWORD PUBLIC USE16 'DATA'
-endif
-endif
-ENDM
-
-MACRO enddataseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_DATA_ENDS
- IDEAL
-else
-ifndef flatmodel
-ENDS _DATA
-endif
-endif
-ENDM
-
-; Macro for the main code segment.
-
-MACRO begcodeseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_CODE_SEG
- IDEAL
-else
-ifdef flatmodel
- CODESEG
- ASSUME CS:FLAT,DS:FLAT,SS:FLAT
-else
-SEGMENT &name&_TEXT PARA PUBLIC USE16 'CODE'
- ASSUME CS:&name&_TEXT,DS:_DATA
-endif
-endif
-ENDM
-
-; Macro for a near code segment
-
-MACRO begcodeseg_near
-ifdef flatmodel
- CODESEG
- ASSUME CS:FLAT,DS:FLAT,SS:FLAT
-else
-SEGMENT _TEXT PARA PUBLIC USE16 'CODE'
- ASSUME CS:_TEXT,DS:_DATA
-endif
-ENDM
-
-MACRO endcodeseg name
-ifdef __VXD__
- MASM
-VXD_LOCKED_CODE_ENDS
- IDEAL
-else
-ifndef flatmodel
-ENDS &name&_TEXT
-endif
-endif
-ENDM
-
-MACRO endcodeseg_near
-ifndef flatmodel
-ENDS _TEXT
-endif
-ENDM
-
-; Macro to be invoked at the start of all modules to set up segments for
-; later use.
-
-MACRO header name
-begdataseg name
-enddataseg name
-ENDM
-
-; Macro for an extern C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cextern name,size
-ifdef __NOU_VAR__
- EXTRN name:size
-else
- EXTRN _&name&:size
-name EQU _&name&
-endif
-ENDM
-
-MACRO cexternfunc name,size
-ifdef __NOU__
- EXTRN name:size
-else
- EXTRN _&name&:size
-name EQU _&name&
-endif
-ENDM
-
-MACRO stdexternfunc name,num_args,size
-ifdef STDCALL_MANGLE
- EXTRN _&name&@&num_args&:size
-name EQU _&name&@&num_args
-else
- EXTRN name:size
-endif
-ENDM
-
-; Macro for a public C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cpublic name
-ifdef __NOU_VAR__
-name:
- PUBLIC name
-else
-_&name&:
- PUBLIC _&name&
-name EQU _&name&
-endif
-ENDM
-
-; Macro for an global C symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cglobal name
-ifdef __NOU_VAR__
- PUBLIC name
-else
- PUBLIC _&name&
-name EQU _&name&
-endif
-ENDM
-
-; Macro for an global C function symbol. If the C compiler requires leading
-; underscores, then the underscores are added to the symbol names, otherwise
-; they are left off. The symbol name is referenced in the assembler code
-; using the non-underscored symbol name.
-
-MACRO cglobalfunc name
-ifdef __NOU__
- PUBLIC name
-else
- PUBLIC _&name&
-name EQU _&name&
-endif
-ENDM
-
-; Macro to start a C callable function. This will be a far function for
-; 16-bit code, and a near function for 32-bit code.
-
-MACRO cprocstatic name ; Set up model independant private proc
-ifdef flatmodel
-PROC name NEAR
-else
-PROC name FAR
-endif
-LocalSize = 0
-ENDM
-
-MACRO cprocstart name ; Set up model independant proc
-ifdef flatmodel
-ifdef __NOU__
-PROC name NEAR
-else
-PROC _&name& NEAR
-endif
-else
-ifdef __NOU__
-PROC name FAR
-else
-PROC _&name& FAR
-endif
-endif
-LocalSize = 0
- cglobalfunc name
-ENDM
-
-MACRO cprocnear name ; Set up near proc
-ifdef __NOU__
-PROC name NEAR
-else
-PROC _&name& NEAR
-endif
-LocalSize = 0
- cglobalfunc name
-ENDM
-
-MACRO cprocfar name ; Set up far proc
-ifdef __NOU__
-PROC name FAR
-else
-PROC _&name& FAR
-endif
-LocalSize = 0
- cglobalfunc name
-ENDM
-
-MACRO cprocend ; End procedure macro
-ENDP
-ENDM
-
-; This macro sets up a procedure to be exported from a 16 bit DLL. Since the
-; calling conventions are always _far _pascal for 16 bit DLL's, we actually
-; rename this routine with an extra underscore with 'C' calling conventions
-; and a small DLL stub will be provided by the high level code to call the
-; assembler routine.
-
-MACRO cprocstartdll16 name
-ifdef __WINDOWS16__
-cprocstart _&name&
-else
-cprocstart name
-endif
-ENDM
-
-; Macros for entering and exiting C callable functions. Note that we must
-; always save and restore the SI and DI registers for C functions, and for
-; 32 bit C functions we also need to save and restore EBX and clear the
-; direction flag.
-
-MACRO save_c_regs
-ifdef flatmodel
- push ebx
-endif
- push _si
- push _di
-ENDM
-
-MACRO enter_c
- push _bp
- mov _bp,_sp
- IFDIFI <LocalSize>,<0>
- sub _sp,LocalSize
- ENDIF
- save_c_regs
-ENDM
-
-MACRO restore_c_regs
- pop _di
- pop _si
-ifdef flatmodel
- pop ebx
-endif
-ENDM
-
-MACRO leave_c
- restore_c_regs
- cld
- IFDIFI <LocalSize>,<0>
- mov _sp,_bp
- ENDIF
- pop _bp
-ENDM
-
-MACRO use_ebx
-ifdef flatmodel
- push ebx
-endif
-ENDM
-
-MACRO unuse_ebx
-ifdef flatmodel
- pop ebx
-endif
-ENDM
-
-; Macros for saving and restoring the value of DS,ES,FS,GS when it is to
-; be used in assembly routines. This evaluates to nothing in the flat memory
-; model, but is saves and restores DS in the large memory model.
-
-MACRO use_ds
-ifndef flatmodel
- push ds
-endif
-ENDM
-
-MACRO unuse_ds
-ifndef flatmodel
- pop ds
-endif
-ENDM
-
-MACRO use_es
-ifndef flatmodel
- push es
-endif
-ENDM
-
-MACRO unuse_es
-ifndef flatmodel
- pop es
-endif
-ENDM
-
-; Macros for loading the address of a data pointer into a segment and
-; index register pair. The macro explicitly loads DS or ES in the 16 bit
-; memory model, or it simply loads the offset into the register in the flat
-; memory model since DS and ES always point to all addressable memory. You
-; must use the correct _REG (ie: _BX) macros for documentation purposes.
-
-MACRO _lds reg, addr
-ifdef flatmodel
- mov reg,addr
-else
- lds reg,addr
-endif
-ENDM
-
-MACRO _les reg, addr
-ifdef flatmodel
- mov reg,addr
-else
- les reg,addr
-endif
-ENDM
-
-; Macros for adding and subtracting a value from registers. Two value are
-; provided, one for 16 bit modes and another for 32 bit modes (the extended
-; register is used in 32 bit modes).
-
-MACRO _add reg, val16, val32
-ifdef flatmodel
- add e®&, val32
-else
- add reg, val16
-endif
-ENDM
-
-MACRO _sub reg, val16, val32
-ifdef flatmodel
- sub e®&, val32
-else
- sub reg, val16
-endif
-ENDM
-
-; Macro to clear the high order word for the 32 bit extended registers.
-; This is used to convert an unsigned 16 bit value to an unsigned 32 bit
-; value, and will evaluate to nothing in 16 bit modes.
-
-MACRO clrhi reg
-ifdef flatmodel
- movzx e®&,reg
-endif
-ENDM
-
-MACRO sgnhi reg
-ifdef flatmodel
- movsx e®&,reg
-endif
-ENDM
-
-; Macro to load an extended register with an integer value in either mode
-
-MACRO loadint reg,val
-ifdef flatmodel
- mov e®&,val
-else
- xor e®&,e®&
- mov reg,val
-endif
-ENDM
-
-; Macros to load and store integer values with string instructions
-
-MACRO LODSINT
-ifdef flatmodel
- lodsd
-else
- lodsw
-endif
-ENDM
-
-MACRO STOSINT
-ifdef flatmodel
- stosd
-else
- stosw
-endif
-ENDM
-
-; Macros to provide resb, resw, resd compatibility with NASM
-
-MACRO dclb count
-db count dup (0)
-ENDM
-
-MACRO dclw count
-dw count dup (0)
-ENDM
-
-MACRO dcld count
-dd count dup (0)
-ENDM
-
-; Macros to provide resb, resw, resd compatibility with NASM
-
-MACRO resb count
-db count dup (?)
-ENDM
-
-MACRO resw count
-dw count dup (?)
-ENDM
-
-MACRO resd count
-dd count dup (?)
-ENDM
-
-; Macros to declare assembler stubs for function structures
-
-MACRO BEGIN_STUBS_DEF name, firstOffset
-begdataseg _STUBS
-ifdef __NOU_VAR__
- EXTRN name:DWORD
-STUBS_START = name
-else
- EXTRN _&name&:DWORD
-name EQU _&name&
-STUBS_START = _&name
-endif
-enddataseg _STUBS
-begcodeseg _STUBS
-off = firstOffset
-ENDM
-
-MACRO DECLARE_STUB name
-ifdef __NOU__
-name:
- PUBLIC name
-else
-_&name:
- PUBLIC _&name
-endif
- jmp [DWORD STUBS_START+off]
-off = off + 4
-ENDM
-
-MACRO SKIP_STUB name
-off = off + 4
-ENDM
-
-MACRO DECLARE_STDCALL name,num_args
-ifdef STDCALL_MANGLE
-_&name&@&num_args&:
- PUBLIC _&name&@&num_args&
-else
-name:
- PUBLIC name
-endif
- jmp [DWORD STUBS_START+off]
-off = off + 4
-ENDM
-
-MACRO END_STUBS_DEF
-endcodeseg _STUBS
-ENDM
-
-MACRO BEGIN_IMPORTS_DEF name
-BEGIN_STUBS_DEF name,4
-ENDM
-
-ifndef LOCAL_DECLARE_IMP
-MACRO DECLARE_IMP name, numArgs
-DECLARE_STUB name
-ENDM
-
-MACRO SKIP_IMP name
-SKIP_STUB name
-ENDM
-
-MACRO SKIP_IMP2 name, numArgs
-DECLARE_STUB name
-ENDM
-
-MACRO SKIP_IMP3 name
-SKIP_STUB name
-ENDM
-endif
-
-MACRO END_IMPORTS_DEF
-END_STUBS_DEF
-ENDM
-
-MACRO LEA_L reg,name
- lea reg,[name]
-ENDM
-
-MACRO LEA_G reg,name
- lea reg,[name]
-ENDM
-
-endif
-
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu.h b/board/MAI/bios_emulator/scitech/include/x86emu.h
deleted file mode 100644
index 1d87d4e..0000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu.h
+++ /dev/null
@@ -1,194 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for public specific functions.
-* Any application linking against us should only
-* include this header
-*
-****************************************************************************/
-
-#ifndef __X86EMU_X86EMU_H
-#define __X86EMU_X86EMU_H
-
-#ifdef SCITECH
-#include "scitech.h"
-#define X86API _ASMAPI
-#define X86APIP _ASMAPIP
-typedef int X86EMU_pioAddr;
-#else
-#include "x86emu/types.h"
-#define X86API
-#define X86APIP *
-#endif
-#include "x86emu/regs.h"
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/****************************************************************************
-REMARKS:
-Data structure containing ponters to programmed I/O functions used by the
-emulator. This is used so that the user program can hook all programmed
-I/O for the emulator to handled as necessary by the user program. By
-default the emulator contains simple functions that do not do access the
-hardware in any way. To allow the emualtor access the hardware, you will
-need to override the programmed I/O functions using the X86EMU_setupPioFuncs
-function.
-
-HEADER:
-x86emu.h
-
-MEMBERS:
-inb - Function to read a byte from an I/O port
-inw - Function to read a word from an I/O port
-inl - Function to read a dword from an I/O port
-outb - Function to write a byte to an I/O port
-outw - Function to write a word to an I/O port
-outl - Function to write a dword to an I/O port
-****************************************************************************/
-typedef struct {
- u8 (X86APIP inb)(X86EMU_pioAddr addr);
- u16 (X86APIP inw)(X86EMU_pioAddr addr);
- u32 (X86APIP inl)(X86EMU_pioAddr addr);
- void (X86APIP outb)(X86EMU_pioAddr addr, u8 val);
- void (X86APIP outw)(X86EMU_pioAddr addr, u16 val);
- void (X86APIP outl)(X86EMU_pioAddr addr, u32 val);
- } X86EMU_pioFuncs;
-
-/****************************************************************************
-REMARKS:
-Data structure containing ponters to memory access functions used by the
-emulator. This is used so that the user program can hook all memory
-access functions as necessary for the emulator. By default the emulator
-contains simple functions that only access the internal memory of the
-emulator. If you need specialised functions to handle access to different
-types of memory (ie: hardware framebuffer accesses and BIOS memory access
-etc), you will need to override this using the X86EMU_setupMemFuncs
-function.
-
-HEADER:
-x86emu.h
-
-MEMBERS:
-rdb - Function to read a byte from an address
-rdw - Function to read a word from an address
-rdl - Function to read a dword from an address
-wrb - Function to write a byte to an address
-wrw - Function to write a word to an address
-wrl - Function to write a dword to an address
-****************************************************************************/
-typedef struct {
- u8 (X86APIP rdb)(u32 addr);
- u16 (X86APIP rdw)(u32 addr);
- u32 (X86APIP rdl)(u32 addr);
- void (X86APIP wrb)(u32 addr, u8 val);
- void (X86APIP wrw)(u32 addr, u16 val);
- void (X86APIP wrl)(u32 addr, u32 val);
- } X86EMU_memFuncs;
-
-/****************************************************************************
- Here are the default memory read and write
- function in case they are needed as fallbacks.
-***************************************************************************/
-extern u8 X86API rdb(u32 addr);
-extern u16 X86API rdw(u32 addr);
-extern u32 X86API rdl(u32 addr);
-extern void X86API wrb(u32 addr, u8 val);
-extern void X86API wrw(u32 addr, u16 val);
-extern void X86API wrl(u32 addr, u32 val);
-
-#pragma pack()
-
-/*--------------------- type definitions -----------------------------------*/
-
-typedef void (X86APIP X86EMU_intrFuncs)(int num);
-extern X86EMU_intrFuncs _X86EMU_intrTab[256];
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-void X86EMU_setupMemFuncs(X86EMU_memFuncs *funcs);
-void X86EMU_setupPioFuncs(X86EMU_pioFuncs *funcs);
-void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
-void X86EMU_prepareForInt(int num);
-
-/* decode.c */
-
-void X86EMU_exec(void);
-void X86EMU_halt_sys(void);
-
-#ifdef DEBUG
-#define HALT_SYS() \
- printk("halt_sys: file %s, line %d\n", __FILE__, __LINE__), \
- X86EMU_halt_sys()
-#else
-#define HALT_SYS() X86EMU_halt_sys()
-#endif
-
-/* Debug options */
-
-#define DEBUG_DECODE_F 0x0001 /* print decoded instruction */
-#define DEBUG_TRACE_F 0x0002 /* dump regs before/after execution */
-#define DEBUG_STEP_F 0x0004
-#define DEBUG_DISASSEMBLE_F 0x0008
-#define DEBUG_BREAK_F 0x0010
-#define DEBUG_SVC_F 0x0020
-#define DEBUG_SAVE_CS_IP 0x0040
-#define DEBUG_FS_F 0x0080
-#define DEBUG_PROC_F 0x0100
-#define DEBUG_SYSINT_F 0x0200 /* bios system interrupts. */
-#define DEBUG_TRACECALL_F 0x0400
-#define DEBUG_INSTRUMENT_F 0x0800
-#define DEBUG_MEM_TRACE_F 0x1000
-#define DEBUG_IO_TRACE_F 0x2000
-#define DEBUG_TRACECALL_REGS_F 0x4000
-#define DEBUG_DECODE_NOPRINT_F 0x8000
-#define DEBUG_EXIT 0x10000
-#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
-
-void X86EMU_trace_regs(void);
-void X86EMU_trace_xregs(void);
-void X86EMU_dump_memory(u16 seg, u16 off, u32 amt);
-int X86EMU_trace_on(void);
-int X86EMU_trace_off(void);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_X86EMU_H */
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/fpu_regs.h b/board/MAI/bios_emulator/scitech/include/x86emu/fpu_regs.h
deleted file mode 100644
index 777b03c..0000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu/fpu_regs.h
+++ /dev/null
@@ -1,115 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for FPU register definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_FPU_REGS_H
-#define __X86EMU_FPU_REGS_H
-
-#ifdef X86_FPU_SUPPORT
-
-#pragma pack(1)
-
-/* Basic 8087 register can hold any of the following values: */
-
-union x86_fpu_reg_u {
- s8 tenbytes[10];
- double dval;
- float fval;
- s16 sval;
- s32 lval;
- };
-
-struct x86_fpu_reg {
- union x86_fpu_reg_u reg;
- char tag;
- };
-
-/*
- * Since we are not going to worry about the problems of aliasing
- * registers, every time a register is modified, its result type is
- * set in the tag fields for that register. If some operation
- * attempts to access the type in a way inconsistent with its current
- * storage format, then we flag the operation. If common, we'll
- * attempt the conversion.
- */
-
-#define X86_FPU_VALID 0x80
-#define X86_FPU_REGTYP(r) ((r) & 0x7F)
-
-#define X86_FPU_WORD 0x0
-#define X86_FPU_SHORT 0x1
-#define X86_FPU_LONG 0x2
-#define X86_FPU_FLOAT 0x3
-#define X86_FPU_DOUBLE 0x4
-#define X86_FPU_LDBL 0x5
-#define X86_FPU_BSD 0x6
-
-#define X86_FPU_STKTOP 0
-
-struct x86_fpu_registers {
- struct x86_fpu_reg x86_fpu_stack[8];
- int x86_fpu_flags;
- int x86_fpu_config; /* rounding modes, etc. */
- short x86_fpu_tos, x86_fpu_bos;
- };
-
-#pragma pack()
-
-/*
- * There are two versions of the following macro.
- *
- * One version is for opcode D9, for which there are more than 32
- * instructions encoded in the second byte of the opcode.
- *
- * The other version, deals with all the other 7 i87 opcodes, for
- * which there are only 32 strings needed to describe the
- * instructions.
- */
-
-#endif /* X86_FPU_SUPPORT */
-
-#ifdef DEBUG
-# define DECODE_PRINTINSTR32(t,mod,rh,rl) \
- DECODE_PRINTF(t[(mod<<3)+(rh)]);
-# define DECODE_PRINTINSTR256(t,mod,rh,rl) \
- DECODE_PRINTF(t[(mod<<6)+(rh<<3)+(rl)]);
-#else
-# define DECODE_PRINTINSTR32(t,mod,rh,rl)
-# define DECODE_PRINTINSTR256(t,mod,rh,rl)
-#endif
-
-#endif /* __X86EMU_FPU_REGS_H */
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h b/board/MAI/bios_emulator/scitech/include/x86emu/regs.h
deleted file mode 100644
index a12017b..0000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h
+++ /dev/null
@@ -1,331 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for x86 register definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_REGS_H
-#define __X86EMU_REGS_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/*
- * General EAX, EBX, ECX, EDX type registers. Note that for
- * portability, and speed, the issue of byte swapping is not addressed
- * in the registers. All registers are stored in the default format
- * available on the host machine. The only critical issue is that the
- * registers should line up EXACTLY in the same manner as they do in
- * the 386. That is:
- *
- * EAX & 0xff === AL
- * EAX & 0xffff == AX
- *
- * etc. The result is that alot of the calculations can then be
- * done using the native instruction set fully.
- */
-
-#ifdef __BIG_ENDIAN__
-
-typedef struct {
- u32 e_reg;
- } I32_reg_t;
-
-typedef struct {
- u16 filler0, x_reg;
- } I16_reg_t;
-
-typedef struct {
- u8 filler0, filler1, h_reg, l_reg;
- } I8_reg_t;
-
-#else /* !__BIG_ENDIAN__ */
-
-typedef struct {
- u32 e_reg;
- } I32_reg_t;
-
-typedef struct {
- u16 x_reg;
- } I16_reg_t;
-
-typedef struct {
- u8 l_reg, h_reg;
- } I8_reg_t;
-
-#endif /* BIG_ENDIAN */
-
-typedef union {
- I32_reg_t I32_reg;
- I16_reg_t I16_reg;
- I8_reg_t I8_reg;
- } i386_general_register;
-
-struct i386_general_regs {
- i386_general_register A, B, C, D;
- };
-
-typedef struct i386_general_regs Gen_reg_t;
-
-struct i386_special_regs {
- i386_general_register SP, BP, SI, DI, IP;
- u32 FLAGS;
- };
-
-/*
- * Segment registers here represent the 16 bit quantities
- * CS, DS, ES, SS.
- */
-
-struct i386_segment_regs {
- u16 CS, DS, SS, ES, FS, GS;
- };
-
-/* 8 bit registers */
-#define R_AH gen.A.I8_reg.h_reg
-#define R_AL gen.A.I8_reg.l_reg
-#define R_BH gen.B.I8_reg.h_reg
-#define R_BL gen.B.I8_reg.l_reg
-#define R_CH gen.C.I8_reg.h_reg
-#define R_CL gen.C.I8_reg.l_reg
-#define R_DH gen.D.I8_reg.h_reg
-#define R_DL gen.D.I8_reg.l_reg
-
-/* 16 bit registers */
-#define R_AX gen.A.I16_reg.x_reg
-#define R_BX gen.B.I16_reg.x_reg
-#define R_CX gen.C.I16_reg.x_reg
-#define R_DX gen.D.I16_reg.x_reg
-
-/* 32 bit extended registers */
-#define R_EAX gen.A.I32_reg.e_reg
-#define R_EBX gen.B.I32_reg.e_reg
-#define R_ECX gen.C.I32_reg.e_reg
-#define R_EDX gen.D.I32_reg.e_reg
-
-/* special registers */
-#define R_SP spc.SP.I16_reg.x_reg
-#define R_BP spc.BP.I16_reg.x_reg
-#define R_SI spc.SI.I16_reg.x_reg
-#define R_DI spc.DI.I16_reg.x_reg
-#define R_IP spc.IP.I16_reg.x_reg
-#define R_FLG spc.FLAGS
-
-/* special registers */
-#define R_SP spc.SP.I16_reg.x_reg
-#define R_BP spc.BP.I16_reg.x_reg
-#define R_SI spc.SI.I16_reg.x_reg
-#define R_DI spc.DI.I16_reg.x_reg
-#define R_IP spc.IP.I16_reg.x_reg
-#define R_FLG spc.FLAGS
-
-/* special registers */
-#define R_ESP spc.SP.I32_reg.e_reg
-#define R_EBP spc.BP.I32_reg.e_reg
-#define R_ESI spc.SI.I32_reg.e_reg
-#define R_EDI spc.DI.I32_reg.e_reg
-#define R_EIP spc.IP.I32_reg.e_reg
-#define R_EFLG spc.FLAGS
-
-/* segment registers */
-#define R_CS seg.CS
-#define R_DS seg.DS
-#define R_SS seg.SS
-#define R_ES seg.ES
-#define R_FS seg.FS
-#define R_GS seg.GS
-
-/* flag conditions */
-#define FB_CF 0x0001 /* CARRY flag */
-#define FB_PF 0x0004 /* PARITY flag */
-#define FB_AF 0x0010 /* AUX flag */
-#define FB_ZF 0x0040 /* ZERO flag */
-#define FB_SF 0x0080 /* SIGN flag */
-#define FB_TF 0x0100 /* TRAP flag */
-#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
-#define FB_DF 0x0400 /* DIR flag */
-#define FB_OF 0x0800 /* OVERFLOW flag */
-
-/* 80286 and above always have bit#1 set */
-#define F_ALWAYS_ON (0x0002) /* flag bits always on */
-
-/*
- * Define a mask for only those flag bits we will ever pass back
- * (via PUSHF)
- */
-#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
-
-/* following bits masked in to a 16bit quantity */
-
-#define F_CF 0x0001 /* CARRY flag */
-#define F_PF 0x0004 /* PARITY flag */
-#define F_AF 0x0010 /* AUX flag */
-#define F_ZF 0x0040 /* ZERO flag */
-#define F_SF 0x0080 /* SIGN flag */
-#define F_TF 0x0100 /* TRAP flag */
-#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
-#define F_DF 0x0400 /* DIR flag */
-#define F_OF 0x0800 /* OVERFLOW flag */
-
-#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
-#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
-#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
-#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
-#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
-
-#define CONDITIONAL_SET_FLAG(COND,FLAG) \
- if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
-
-#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
-#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
-#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
-
-#define F_ALL_CALC 0xff0000 /* All have been calced */
-
-/*
- * Emulator machine state.
- * Segment usage control.
- */
-#define SYSMODE_SEG_DS_SS 0x00000001
-#define SYSMODE_SEGOVR_CS 0x00000002
-#define SYSMODE_SEGOVR_DS 0x00000004
-#define SYSMODE_SEGOVR_ES 0x00000008
-#define SYSMODE_SEGOVR_FS 0x00000010
-#define SYSMODE_SEGOVR_GS 0x00000020
-#define SYSMODE_SEGOVR_SS 0x00000040
-#define SYSMODE_PREFIX_REPE 0x00000080
-#define SYSMODE_PREFIX_REPNE 0x00000100
-#define SYSMODE_PREFIX_DATA 0x00000200
-#define SYSMODE_PREFIX_ADDR 0x00000400
-#define SYSMODE_INTR_PENDING 0x10000000
-#define SYSMODE_EXTRN_INTR 0x20000000
-#define SYSMODE_HALTED 0x40000000
-
-#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
- SYSMODE_SEGOVR_CS | \
- SYSMODE_SEGOVR_DS | \
- SYSMODE_SEGOVR_ES | \
- SYSMODE_SEGOVR_FS | \
- SYSMODE_SEGOVR_GS | \
- SYSMODE_SEGOVR_SS)
-#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
- SYSMODE_SEGOVR_CS | \
- SYSMODE_SEGOVR_DS | \
- SYSMODE_SEGOVR_ES | \
- SYSMODE_SEGOVR_FS | \
- SYSMODE_SEGOVR_GS | \
- SYSMODE_SEGOVR_SS | \
- SYSMODE_PREFIX_DATA | \
- SYSMODE_PREFIX_ADDR)
-
-#define INTR_SYNCH 0x1
-#define INTR_ASYNCH 0x2
-#define INTR_HALTED 0x4
-
-typedef struct {
- struct i386_general_regs gen;
- struct i386_special_regs spc;
- struct i386_segment_regs seg;
- /*
- * MODE contains information on:
- * REPE prefix 2 bits repe,repne
- * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
- * Delayed flag set 3 bits (zero, signed, parity)
- * reserved 6 bits
- * interrupt # 8 bits instruction raised interrupt
- * BIOS video segregs 4 bits
- * Interrupt Pending 1 bits
- * Extern interrupt 1 bits
- * Halted 1 bits
- */
- long mode;
- u8 intno;
- volatile int intr; /* mask of pending interrupts */
- int debug;
-#ifdef DEBUG
- int check;
- u16 saved_ip;
- u16 saved_cs;
- int enc_pos;
- int enc_str_pos;
- char decode_buf[32]; /* encoded byte stream */
- char decoded_buf[256]; /* disassembled strings */
-#endif
- } X86EMU_regs;
-
-/****************************************************************************
-REMARKS:
-Structure maintaining the emulator machine state.
-
-MEMBERS:
-x86 - X86 registers
-mem_base - Base real mode memory for the emulator
-mem_size - Size of the real mode memory block for the emulator
-****************************************************************************/
-typedef struct {
- X86EMU_regs x86;
- unsigned long mem_base;
- unsigned long mem_size;
- void* private;
- } X86EMU_sysEnv;
-
-#pragma pack()
-
-/*----------------------------- Global Variables --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* Global emulator machine state.
- *
- * We keep it global to avoid pointer dereferences in the code for speed.
- */
-
-extern X86EMU_sysEnv _X86EMU_env;
-#define M _X86EMU_env
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* Function to log information at runtime */
-
-/*void printk(const char *fmt, ...); */
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_REGS_H */
diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/types.h b/board/MAI/bios_emulator/scitech/include/x86emu/types.h
deleted file mode 100644
index 0a17c54..0000000
--- a/board/MAI/bios_emulator/scitech/include/x86emu/types.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for x86 emulator type definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_TYPES_H
-#define __X86EMU_TYPES_H
-
-#include <sys/types.h>
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* Currently only for Linux/32bit */
-#if defined(__GNUC__) && !defined(NO_LONG_LONG)
-#define __HAS_LONG_LONG__
-#endif
-
-typedef unsigned char u8;
-typedef unsigned short u16;
-typedef unsigned int u32;
-#ifdef __HAS_LONG_LONG__
-typedef unsigned long long u64;
-#endif
-
-typedef char s8;
-typedef short s16;
-typedef long s32;
-#ifdef __HAS_LONG_LONG__
-typedef long long s64;
-#endif
-
-/*typedef unsigned int uint;*/
-typedef int sint;
-
-typedef u16 X86EMU_pioAddr;
-
-#endif /* __X86EMU_TYPES_H */
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/glibc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc/readme.txt b/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/debug/linux/gcc/libc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/glibc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc.so/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc/readme.txt b/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc/readme.txt
deleted file mode 100644
index 0d87eff..0000000
--- a/board/MAI/bios_emulator/scitech/lib/release/linux/gcc/libc/readme.txt
+++ /dev/null
@@ -1 +0,0 @@
-This file is just to ensure that the directory is created.
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bc16.mk b/board/MAI/bios_emulator/scitech/makedefs/bc16.mk
deleted file mode 100644
index aa4fe76..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bc16.mk
+++ /dev/null
@@ -1,137 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 4.x 16 bit version. Supports 16 bit DOS,
-# DPMI16 DOS extender and 16 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_WIN16 USE_BC5 BC_LIBBASE USE_WIN95
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc
- CFLAGS := -ml -H=bcc.sym -i60 -d -dc -4 -f287
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /iINCLUDE /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := bclink tlink.exe
- LDFLAGS := -c
- RC := brc
- RCFLAGS :=
-.IF $(USE_BC5)
-.IF $(USE_WIN95)
- WIN_VERSION := -V4.0
-.ENDIF
-.ENDIF
- LIBR := tlib
- LIBFLAGS := /C /P32
- ILIB := implib
- ILIBFLAGS := -c
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- ASFLAGS += /zi
- LIBFLAGS += /P128
-.ELSE
- LDFLAGS += -x
- ASFLAGS += /q
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -O2 -k-
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1 -k-
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# Optionally compile as Win16
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += -WD -Fs- -DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -W -Fs-
-.ENDIF
- DEF_LIBS := import.lib mathwl.lib cwl.lib
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- DEF_LIBS := mathl.lib fp87.lib cl.lib
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-.IF $(USE_DPMI16)
-PMLIB := dpmi16\pm.lib
-.ELSE
-PMLIB := pm.lib
-.END
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(BC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := bc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bc3.mk b/board/MAI/bios_emulator/scitech/makedefs/bc3.mk
deleted file mode 100644
index 133d80e..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bc3.mk
+++ /dev/null
@@ -1,102 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 3.1 version. Supports 16 bit DOS development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc
- CFLAGS := -ml -H=bcc.sym -i60 -d
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := bclink tlink.exe
- LDFLAGS := -c
- LIB := tlib
- LIBFLAGS := /C
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- ASFLAGS += /zi
- LIBFLAGS += /P128
-.ELSE
- LDFLAGS += -x
- ASFLAGS += /q
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -3 -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -3 -O1
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -f287 -DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
- USE_REALDOS := 1
-
-# Define the default libraries to link with
- DEF_LIBS := mathl.lib cl.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\dos16\bc3
-
-# Define which file contains our rules
-
- RULES_MAK := bc3.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bc32.mk b/board/MAI/bios_emulator/scitech/makedefs/bc32.mk
deleted file mode 100644
index 246de1d..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bc32.mk
+++ /dev/null
@@ -1,201 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 4.0 32 bit version. Supports Borland's DOS Power
-# Pack DPMI32 DOS extender, Phar Lap's TNT DOS Extender and
-# 32 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_SMX32 USE_TNT USE_WIN32 USE_BC5 USE_VXD BC_LIBBASE
-.IMPORT .IGNORE : VTOOLSD
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc32
-.IF $(USE_VXD)
- CFLAGS := -4 -i60 -d -w-stu
-.ELSE
- CFLAGS := -4 -H=bcc32.sym -i60 -d -w-stu
-.ENDIF
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /w-res /w-mcp /D__FLAT__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := bclink tlink32.exe
- LDFLAGS := -c
- RC := brc32
-.IF $(USE_BC5)
- WIN_VERSION := -V4.0
- RCFLAGS := -32
-.ELSE
- RCFLAGS := -w32
-.ENDIF
- LIB := tlib
- LIBFLAGS := /C
- ILIB := implib
- ILIBFLAGS := -c
- INTEL_X86 := 1
- NMSYM := $(SOFTICE_PATH)\nmsym.exe
- NMSYMFLAGS := /TRANSLATE:source,package,always /PROMPT /SOURCE:$(SCITECH)\src\pm;$(SCITECH)\src\pm\common;$(SCITECH)\src\pm\win32
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- LIBFLAGS += /P256
-.IF $(USE_NASM)
- ASFLAGS += -F borland -g
-.ELSE
- ASFLAGS += /zi
-.ENDIF
-.ELSE
- LDFLAGS += -x
- LIBFLAGS += /P128
-.IF $(USE_NASM)
- ASFLAGS += -F null
-.ELSE
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally disable nagging warnings if MAX_WARN is not on
-.IF $(MAX_WARN)
-.ELSE
- CFLAGS += -w-aus -w-par -w-hid -w-pia
-.ENDIF
-
-# Optionally turn on optimisations (-5 -O2 breaks BC++ 4.0-4.5 sometimes)
-.IF $(OPT)
- CFLAGS += -5 -O2 -k-
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -O1 -k-
-.END
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Optionally use Phar Lap's TNT DOS Extender, otherwise use the DOS Power Pack
-.IF $(USE_TNT)
- CFLAGS += -D__MSDOS__
- DX_CFLAGS += -DTNT
- DX_ASFLAGS += -dTNT
- LIB_OS = DOS32
- DEF_LIBS := import32.lib cw32.lib dosx32.lib tntapi.lib
-.ELIF $(USE_VXD)
- LDFLAGS += -n -P- -x
- CFLAGS += -RT- -x- -Oi -VC -I$(VTOOLSD)\INCLUDE -DIS_32 -DWANTVXDWRAPS -DVTOOLSD -DWIN40 -DWIN40_OR_LATER -DDEFSEG=1 -zC_LTEXT -zALCODE -zR_LDATA -zTLCODE
- DEF_LIBS := $(VTOOLSD)\lib\cfbc440d.lib $(VTOOLSD)\lib\wr0bc440.lib $(VTOOLSD)\lib\wr1bc440.lib $(VTOOLSD)\lib\wr2bc440.lib $(VTOOLSD)\lib\wr3bc440.lib $(VTOOLSD)\lib\rtbc440d.lib
- DX_ASFLAGS += -d__VXD__ -d__BORLANDC__=1 -I$(VTOOLSD)\INCLUDE -I$(VTOOLSD)\LIB\INCLUDE
- LIB_OS = VXD
-.ELIF $(USE_WIN32)
-.IF $(WIN32_GUI)
-.ELSE
- CFLAGS += -D__CONSOLE__
-.ENDIF
-.IF $(BUILD_DLL)
- CFLAGS += -WD -DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -W -WM
-.ENDIF
-.IF $(USE_BC5)
-.ELSE
- CFLAGS += -D_WIN32
-.ENDIF
- DEF_LIBS := import32.lib cw32mt.lib
- DX_ASFLAGS += -d__WINDOWS32__
- LIB_OS = WIN32
-.ELIF $(USE_SMX32)
- CFLAGS += -D__SMX32__ -DPME32
- DX_CFLAGS +=
- DX_ASFLAGS += -d__SMX32__ -dDPMI32 -dPME32
- USE_REALDOS := 1
- LIB_OS = SMX32
- DEF_LIBS := cw32mt.lib
-.ELSE
- USE_DPMI32 := 1
- CFLAGS += -D__MSDOS__
- DX_CFLAGS += -WX -DDPMI32
- DX_ASFLAGS += -dDPMI32
- USE_REALDOS := 1
- LIB_OS = DOS32
- DEF_LIBS :=
-.END
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(BC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Place to look for PMODE library files
-
-.IF $(USE_TNT)
-PMLIB := $(LIB_BASE)\tnt\pm.lib
-.ELIF $(USE_DPMI32)
-PMLIB := $(LIB_BASE)\dpmi32\pm.lib
-.ELSE
-PMLIB := $(LIB_BASE)\pm.lib
-.END
-
-# Define which file contains our rules
-
- RULES_MAK := bc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/bcos2.mk b/board/MAI/bios_emulator/scitech/makedefs/bcos2.mk
deleted file mode 100644
index 23aeb7c..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/bcos2.mk
+++ /dev/null
@@ -1,137 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Borland C++ 2.0 32-bit OS/2 version.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_OS2GUI BC_LIBBASE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := bcc
- CFLAGS := -w- -4 -H=bcc32.sym -i60 -d
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm
- ASFLAGS := /t /mx /m /D__FLAT__ /D__OS2__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := bclink tlink.exe
- LDFLAGS := -c
- RC := brcc
- RCFLAGS :=
- LIB := tlib
- LIBFLAGS := /C /P32
- ILIB := implib
- ILIBFLAGS := -c
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -v
- LDFLAGS += -v
- LIBFLAGS += /P128
-.IF $(USE_NASM)
- ASFLAGS += -F borland
-.ELSE
- ASFLAGS += /zi
-.ENDIF
-.ELSE
- LDFLAGS += -x
-.IF $(USE_NASM)
- ASFLAGS += -F null
-.ELSE
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -5 -O2 -k-
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -O1 -k-
-.END
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Optionally use Phar Lap's TNT DOS Extender, otherwise use the DOS Power Pack
-.IF $(BUILD_DLL)
- CFLAGS += -sd -sm -DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -sm
-.ENDIF
- DEF_LIBS := os2.lib c2mt.lib
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(BC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Place to look for PMODE library files
-
-.IF $(USE_OS2GUI)
-DEF_LIBS += pm_pm.lib
-.ELSE
-DEF_LIBS += pm.lib
-.ENDIF
-
-# Define which file contains our rules
-
- RULES_MAK := bcos2.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/cl16.mk b/board/MAI/bios_emulator/scitech/makedefs/cl16.mk
deleted file mode 100644
index 0f29a15..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/cl16.mk
+++ /dev/null
@@ -1,132 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft C 6.0 16 bit version. Supports 16 bit
-# OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VC_LIBBASE
-.IMPORT .IGNORE : USE_MASM
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl # C-compiler and flags
- CFLAGS := /w /Gs
- ASFLAGS := /t /mx /m /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELIF $(USE_MASM)
- AS := masm # Assembler and flags
- ASFLAGS := /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- LD := cl # Loader and flags
- LDFLAGS = $(CFLAGS)
- RC := rc # WIndows resource compiler
- RCFLAGS :=
- LIB := lib # Librarian
- LIBFLAGS := /NOI /NOE
- ILIB := implib # Import librarian
- ILIBFLAGS := /noignorecase
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Zi # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Ox
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /FPi87 /DFPU387
- ASFLAGS += /DFPU387 /DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += /DBETA
-.END
-
-# Use a larger stack during linking if requested ???? How the fuck do you
-# specify linker options on the CL command line?????
-
-.IF $(STKSIZE)
-.ENDIF
-
-# Optionally compile for 16 bit Windows
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += /GD /Alfw /DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += /GA /AL
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- CFLAGS += /AL
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := cl16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/cl386.mk b/board/MAI/bios_emulator/scitech/makedefs/cl386.mk
deleted file mode 100644
index 52157f9..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/cl386.mk
+++ /dev/null
@@ -1,120 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft 386 C 6.0 32 bit. Supports 32 bit
-# OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : CL_LIBBASE USE_VDD
-.IMPORT .IGNORE : USE_MASM
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl386 # C-compiler and flags
- # NB: The -Zf flag is ABSOLUTELY NECESSARY to compile IBM's OS/2 headers.
- # It isn't documented anywhere but obviously adds support for 48-bit
- # far pointers (ie. _far is valid in 32-bit code). Great.
- CFLAGS := -G3s -Zf -D__386__
- ASFLAGS := /t /mx /m /oi /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELIF $(USE_MASM)
- AS := masm # Assembler and flags
- ASFLAGS := /t /mx /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- LD := link386 # Linker and flags
- LDFLAGS = $(CFLAGS)
- RC := rc # Windows resource compiler
- RCFLAGS :=
- LIB := lib # Librarian
- LIBFLAGS := /NOI /NOE
- ILIB := implib # Import librarian
- ILIBFLAGS := /noignorecase
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -Zi # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Ox
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /FPi87 /DFPU387
- ASFLAGS += /DFPU387 /DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += /DBETA
-.END
-
-# Use a larger stack during linking if requested ???? How the fuck do you
-# specify linker options on the CL command line?????
-
-.IF $(STKSIZE)
-.ENDIF
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_OS = os232
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(CL_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := cl386.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/common.mk b/board/MAI/bios_emulator/scitech/makedefs/common.mk
deleted file mode 100644
index d337152..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/common.mk
+++ /dev/null
@@ -1,180 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Common makefile targets used by all SciTech Software
-# makefiles. This file includes targets for cleaning the
-# current directory, and maintaining the source files with
-# RCS.
-#
-#############################################################################
-
-# Override global OpenGL includes when compiling against MGL version
-
-.IF $(USE_MGL_OPENGL)
-.IF $(UNIX_HOST)
-CFLAGS += -I$(SCITECH)/include/mglgl
-DEPEND_INC += $(SCITECH)/include/mglgl
-.ELSE
-CFLAGS += -I$(SCITECH)\include\mglgl
-DEPEND_INC += $(SCITECH)\include/mglgl
-.ENDIF
-.ENDIF
-
-# Define where to install all compiled DLL files
-
-.IF $(UNIX_HOST)
-.IF $(CHECKED)
-DLL_DEST := $(SCITECH_LIB)/redist/debug
-.ELSE
-DLL_DEST := $(SCITECH_LIB)/redist/release
-.ENDIF
-.ELSE
-.IF $(CHECKED)
-DLL_DEST := $(SCITECH_LIB)\redist\debug
-.ELSE
-DLL_DEST := $(SCITECH_LIB)\redist\release
-.ENDIF
-.ENDIF
-
-# Target to build the library and DLL file if specified
-
-.IF $(LIBFILE)
-
-lib: $(LIBFILE)
-
-.IF $(DLLFILE)
-
-# Build and install a DLL file, or simply build import library and install
-
-.IF $(BUILD_DLL)
-
-$(DLLFILE): $(OBJECTS)
-$(LIBFILE): $(DLLFILE)
-install: $(LIBFILE) $(DLLFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
- $(INSTALL) $(DLLFILE) $(DLL_DEST)
-.IF $(USE_SOFTICE)
- $(INSTALL) $(DLLFILE:s/.dll/.nms) $(DLL_DEST)
-.ENDIF
-.ELSE
-
-$(LIBFILE): $(DLL_DEST)\$(DLLFILE)
-install: $(LIBFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
-
-.ENDIF
-.ELSE
-
-.IF $(BUILD_DLL)
-
-# Build and install a Unix shared library
-
-$(LIBFILE): $(OBJECTS)
-install: $(LIBFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
- $(INSTALL) $(LIBFILE) $(DLL_DEST)/$(LIBFILE).$(VERSION)
-
-.ELSE
-
-# Build and install a normal library file
-
-.IF $(USE_DLL)
-.ELSE
-$(LIBFILE): $(OBJECTS)
-install: $(LIBFILE)
- $(INSTALL) $(LIBFILE) $(LIB_DEST)$(LIB_EXTENDER)
-.ENDIF
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Build and install a VxD file, including debug information
-
-.IF $(VXDFILE)
-$(VXDFILE:s/.vxd/.dll): $(OBJECTS)
-$(VXDFILE): $(VXDFILE:s/.vxd/.dll)
-install: $(VXDFILE)
- $(INSTALL) $(VXDFILE) $(DLL_DEST)
-.IF $(DBG)
- $(INSTALL) $(VXDFILE:s/.vxd/.nms) $(DLL_DEST)
-.ENDIF
-.ENDIF
-
-# Clean up directory removing all files not needed to make the library.
-
-__CLEAN_FILES := *.obj *.o *.sym *.bak *.tdk *.swp *.map *.err *.csm *.lib *.aps *.nms *.sys
-__CLEAN_FILES += *.~* *.td *.tr *.tr? *.td? *.rws *.res *.exp *.ilk *.pdb *.pch *.a bcc32.*
-__CLEAN_FILES += $(LIBCLEAN)
-__CLEANEXE_FILES := $(__CLEAN_FILES) *$E *.drv *.rex *.dll *.vxd *.nms *.pel *.smf *.so.*
-
-.PHONY clean:
- @$(RM) -f -S $(mktmp $(__CLEAN_FILES:t"\n"))
-
-.PHONY cleanexe:
- @$(RM) -f -S $(mktmp $(__CLEANEXE_FILES:t"\n"))
-
-# Define the source directories to find common files
-
-.IF $(NO_SCITECH_COMMON)
-.ELSE
-.SOURCE: $(SCITECH)/src/common
-.ENDIF
-
-# Create the include file dependencies using the MKUTIL makedep program if
-# the list of dependent object files is defined
-
-.IF $(DEPEND_OBJ)
-depend:
- @$(RM) -f makefile.dep
-.IF $(DEPEND_SRC)
-.IF $(DEPEND_INC)
- @makedep -amakefile.dep -r -s -I@$(mktmp $(DEPEND_INC:s/\/\\)) -S@$(mktmp $(DEPEND_SRC:s/\/\\);$(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ELSE
- @makedep -amakefile.dep -r -s -S@$(mktmp $(DEPEND_SRC:s/\/\\);$(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ENDIF
-.ELSE
-.IF $(DEPEND_INC)
- @makedep -amakefile.dep -r -s -I@$(mktmp $(DEPEND_INC:s/\/\\)) -S@$(mktmp $(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ELSE
- @makedep -amakefile.dep -r -s -S@$(mktmp $(SCITECH)/src/common) @$(mktmp $(DEPEND_OBJ:t"\n")\n)
-.ENDIF
-.ENDIF
- @$(ECHO) Object file dependency information generated.
-.ENDIF
-
-# Set up for compiling Snap executeables and dynamic link libraries
-
-.IF $(USE_SNAP)
-#CFLAGS += -I$(PRIVATE)\include\drvlib -I$(SCITECH)\include\drvlib -D__SNAP__
-CFLAGS += -D__SNAP__
-ASFLAGS += -d__SNAP__
-#EXELIBS += snap$L
-.ENDIF
-
-# Include rule definitions for the compiler
-
-.INCLUDE: "$(SCITECH)/makedefs/rules/$(RULES_MAK)"
-
-# Include file dependencies
-
-.INCLUDE .IGNORE: "makefile.dep"
diff --git a/board/MAI/bios_emulator/scitech/makedefs/emx.mk b/board/MAI/bios_emulator/scitech/makedefs/emx.mk
deleted file mode 100644
index f569790..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/emx.mk
+++ /dev/null
@@ -1,194 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# OS/2 version for EMX/GNU C/C++.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE CRTDLL SHW BETA CHECKED NO_EXCEPT NO_RTTI
-.IMPORT .IGNORE : FULLSCREEN SHOW_ARGS
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
- L := .lib # Libraries
- E := .exe # Executables
- O := .obj # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : EMX_LIBBASE USE_OS232 USE_OS2GUI
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Default commands for compiling, assembling linking and archiving.
- CC := gcc
- CFLAGS := -Zmt -Zomf -Wall -I. -I$(INCLUDE)
- CXX := gcc -x c++ -fno-exceptions -fno-rtti
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -F null -d__FLAT__ -d__NOU__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
- AS := tasm # Assembler and flags
- ASFLAGS := /t /mx /m /oi /D__FLAT__ /D__NOU__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := gcc
- LDXX := gcc -x c++
- LDFLAGS := -L. -Zomf -Zmt
- LIB := emxomfar
- LIBFLAGS := -p32 rcv
-
- YACC := bison -y
- LEX := flex
- SED := sed
-
-# Optionally turn off exceptions and RTTI for C++ code
-.IF $(NO_EXCEPT)
- CXX += -fno-exceptions
-.ENDIF
-.IF $(NO_RTTI)
- CXX += -fno-rtti
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
-.ELSE
-# Without -s, emx always runs LINK386 with the /DEBUG option
- CFLAGS += -s
- LDFLAGS += -s
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O3 -fomit-frame-pointer
-.ELIF $(OPT_SIZE)
- CFLAGS += -Os
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Link against EMX DLLs (CRTDLL=1) or link with static C runtime libraries
-.IF $(CRTDLL)
- LDFLAGS += -Zcrtdll
-.ELSE
- CFLAGS += -Zsys
- LDFLAGS += -Zsys
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__OS2_32__
- CFLAGS += -D__OS2__
- ASFLAGS += -d__OS2__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\OS232\$(EMX_LIBBASE)
- LDFLAGS += -L$(LIB_DEST)
-
-# Build 32-bit OS/2 apps
-.IF $(BUILD_DLL)
- CFLAGS += -Zdll -DBUILD_DLL
- LDFLAGS += -Zdll
- ASFLAGS += -dBUILD_DLL
-.ELSE
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
- LDFLAGS += -Zlinker /PMTYPE:PM
-.ELSE
-.IF $(FULLSCREEN)
- LDFLAGS += -Zlinker /PMTYPE:NOVIO
-.ELSE
- LDFLAGS += -Zlinker /PMTYPE:VIO
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := emx.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_beos.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_beos.mk
deleted file mode 100644
index 0d62fdf..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_beos.mk
+++ /dev/null
@@ -1,161 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# BeOS version for GNU C/C++.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_X11 USE_LINUX
-.IMPORT .IGNORE : USE_EGCS USE_PGCC STATIC_LIBS LIBC
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: BeOS does not require any extenion for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .x # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for BeOS
- USE_BEOS := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := gcc
- CFLAGS := -Wall -I. -Iinclude $(INCLUDE)
- CXX := g++
- AS := nasm
- ASFLAGS := -f elf -d__FLAT__ -iinclude -i$(SCITECH)/include -d__NOU__
- LD := gcc
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rcs
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS)
- LDFLAGS += -static
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
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- CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__BEOS__
- ASFLAGS += -d__BEOS__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
-LIB_DEST := $(LIB_BASE_DIR)/beos/gcc
-LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_beos.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_dos.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_dos.mk
deleted file mode 100644
index 65589c8..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_dos.mk
+++ /dev/null
@@ -1,112 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# DJGPP V2 port of GNU C/C++ to DOS with DPMI only.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Override some file suffix definitions
- L := .a # Libraries
- O := .o # Objects
-
-# Override the file prefix/suffix definitions for library naming.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : DJ_LIBBASE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := gcc # C-compiler and flags
- CFLAGS := -Wall
- AS := nasm
- ASFLAGS := -t -f coff -F null -d__FLAT__ -d__GNUC__ -dSTDCALL_USCORE -iINCLUDE -i$(SCITECH)\INCLUDE
- LD := dj_ld # Loader and flags
- LDFLAGS :=
- LIB := ar # Librarian
- LIBFLAGS := rs
- USE_NASM := 1
- USE_GCC := 1
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# DOS extender dependant flags
- DX_CFLAGS +=
- DX_ASFLAGS += -dDJGPP
- USE_REALDOS := 1
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\DOS32\$(DJ_LIBBASE)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := dj32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_freebsd.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_freebsd.mk
deleted file mode 100644
index 0cb4b85..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_freebsd.mk
+++ /dev/null
@@ -1,174 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Linux version for GNU C/C++.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_X11 USE_FREEBSD
-.IMPORT .IGNORE : USE_EGCS USE_PGCC STATIC_LIBS
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: Linux does not require any extenion for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .x # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for FreeBSD
- USE_LINUX := 1
-
-# Default commands for compiling, assembling linking and archiving.
-.IF $(USE_EGCS)
- CC := egcs
-.ELIF $(USE_PGCC)
- CC := pgcc
-.ELSE
- CC := gcc
-.ENDIF
- CFLAGS := -Wall -I. -Iinclude $(INCLUDE)
- CXX := g++
- AS := nasm
-# TODO: On earlier versions of FreeBSD (<3.0) a.out is used instead of ELF
- ASFLAGS := -f elf -d__FLAT__ -iinclude -i$(SCITECH)/include -d__NOU__
- LD := g++
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rcs
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS)
- LDFLAGS += -static
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__FREEBSD__
- ASFLAGS += -d__FREEBSD__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)/freebsd/gcc
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_freebsd.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
deleted file mode 100644
index 72c4ced..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk
+++ /dev/null
@@ -1,180 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Linux version for GNU C/C++.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)/makedefs/startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : GCC2_LIBBASE
-
-# Override some file suffix definitions
- L := .a # Libraries
- O := .o # Objects
-
-# Override the file prefix/suffix definitions for library naming.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Define that we are compiling for Linux
- USE_LINUX := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := gcc
- CFLAGS := -Wall -I. -Iinclude -I$(SCITECH:s,\,/)/include -I$(PRIVATE:s,\,/)/include
- SHOW_CFLAGS := -c
- CXX := g++
- AS := nasm
- ASFLAGS := -t -f elf -d__FLAT__ -d__GNUC__ -iinclude -i$(SCITECH)/include -d__NOU__
- SHOW_ASFLAGS := -f elf
- LD := gcc
- LDXX := g++
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rcs
- YACC := bison -y
- LEX := flex
- SED := sed
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
- SHOW_CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
- SHOW_CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
- SHOW_CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
- SHOW_CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- SHOW_CFLAGS += -DBETA
- ASFLAGS += -dBETA
- SHOW_ASFLAGS += -dBETA
-.ENDIF
-
-# Disable standard C runtime library
-
-.IF $(NO_RUNTIME)
-CFLAGS += -fno-builtin -nostdinc
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__LINUX__
- ASFLAGS += -d__LINUX__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
-CFLAGS += -DCHECKED=1
-SHOW_CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
-.IF $(LIBC)
- LIB_DEST_SHARED := $(LIB_BASE_DIR)/linux/gcc/libc.so
- LIB_DEST_STATIC := $(LIB_BASE_DIR)/linux/gcc/libc
-.ELSE
- LIB_DEST_SHARED := $(LIB_BASE_DIR)/linux/gcc/glibc.so
- LIB_DEST_STATIC := $(LIB_BASE_DIR)/linux/gcc/glibc
-.ENDIF
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS_ALL)
- LDFLAGS += -static
- STATIC_LIBS := 1
-.ENDIF
-
-# Link to static libraries if requested
-.IF $(STATIC_LIBS)
- LDFLAGS += -L$(LIB_DEST_STATIC)
-.ELSE
- LDFLAGS += -L$(LIB_DEST_SHARED) -L$(LIB_DEST_STATIC)
-.ENDIF
-
-# Optionally enable some dynamic libraries to be built
-.IF $(BUILD_DLL)
-.IF $(VERSIONMAJ)
-.ELSE
- VERSIONMAJ := 5
- VERSIONMIN := 0
-.ENDIF
- VERSION := $(VERSIONMAJ).$(VERSIONMIN)
- LIB := gcc -shared
- LIBFLAGS :=
- L := .so
- CFLAGS += -fPIC
- SHOW_CFLAGS += -fPIC
- ASFLAGS += -D__PIC__
- SHOW_ASFLAGS += -D__PIC__
- LIB_DEST := $(LIB_DEST_SHARED)
-.ELSE
- LIB_DEST := $(LIB_DEST_STATIC)
-.ENDIF
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_linux.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
deleted file mode 100644
index 21ccf97..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk
+++ /dev/null
@@ -1,135 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Cygwin port of GNU C/C++ to Win32.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : GCC2_LIBBASE
-
-# Override some file suffix definitions
- L := .a # Libraries
- O := .o # Objects
-
-# Override the file prefix/suffix definitions for library naming.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := gcc # C-compiler and flags
- CFLAGS := -Wall -I. -Iinclude -I$(SCITECH:s,\,/)/include -I$(PRIVATE:s,\,/)/include
- SHOW_CFLAGS := -c
- CXX := g++
- AS := nasm
- ASFLAGS := -t -f coff -F null -d__FLAT__ -d__GNUC__ -dSTDCALL_USCORE -iINCLUDE -i$(SCITECH)\INCLUDE
- SHOW_ASFLAGS := -f coff
- LD := gcc # Loader and flags
- LDXX := g++
-.IF $(WIN32_GUI)
- LDFLAGS := -L. -mwindows -e _mainCRTStartup
-.ELSE
- LDFLAGS := -L.
-.ENDIF
- RC := windres
- RCFLAGS := -O coff
- LIB := ar # Librarian
- LIBFLAGS := rcs
- YACC := bison -y
- LEX := flex
- SED := sed
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g
- SHOW_CFLAGS += -g
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -O6
- SHOW_CFLAGS += -O6
-.ELIF $(OPT)
- CFLAGS += -O2
- SHOW_CFLAGS += -O2
-.ELIF $(OPT_SIZE)
- CFLAGS += -O1
- SHOW_CFLAGS += -O1
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- SHOW_CFLAGS += -DBETA
- ASFLAGS += -dBETA
- SHOW_ASFLAGS += -dBETA
-.ENDIF
-
-# DOS extender dependant flags
- DX_CFLAGS +=
- DX_ASFLAGS += -dGCC_WIN32
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-SHOW_CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)\WIN32\$(GCC2_LIBBASE)
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := gcc_win32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/hc32.mk b/board/MAI/bios_emulator/scitech/makedefs/hc32.mk
deleted file mode 100644
index f0b065a..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/hc32.mk
+++ /dev/null
@@ -1,113 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Metaware High C/C++ 3.21 32 bit version. Supports Phar Lap's
-# TNT DOS Extender.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := hc386 # C-compiler and flags
- CFLAGS :=
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := hc386
- LDFLAGS = $(CFLAGS)
- LIB := 386lib # TNT 386|lib Librarian
- LIBFLAGS := -TC
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -586 -O
-.ELIF $(OPT_SIZE)
- CFLAGS += -586 -O1
-.ELSE
- CFLAGS += -O0
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# DOS extender dependant flags
- USE_TNT := 1
- USE_REALDOS := 1
- DX_CFLAGS += -DTNT
- DX_ASFLAGS += -DTNT
- LDFLAGS += -LH:\TNT\LIB
-
-# Place to look for PMODE library files
-
-PMLIB := tnt\pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\DOS32\HC
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := hc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/makedefs.prj b/board/MAI/bios_emulator/scitech/makedefs/makedefs.prj
deleted file mode 100644
index edd8809..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/makedefs.prj
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk b/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
deleted file mode 100644
index f583af3..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk
+++ /dev/null
@@ -1,164 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# QNX version for Watcom C.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_QNX USE_QNX4
-.IMPORT .IGNORE : USE_PHOTON USE_X11 USE_BIOS SHOW_ARGS MAX_WARN WC_LIBBASE
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: Qnx does not require any extension for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .exe # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for QNX
- USE_QNX := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := wcc386
- CFLAGS := -I. -Iinclude $(INCLUDE)
- CXX := wpp386
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -dSTDCALL_MANGLE -iinclude -i$(SCITECH)/include
- LD := cc
- LDFLAGS := -L.
- LIB := ar
- LIBFLAGS := rc
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += -w4
-.ELSE
- CFLAGS += -w1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -d2
- LDFLAGS += -g2
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -onatx-5r-fp5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5r-fp5
-.ELIF $(NOOPT)
- CFLAGS += -od-5r
-.END
-
-# Compile flag for whether to build photon or non-photon lib
-.IF $(USE_PHOTON)
- CFLAGS += -D__PHOTON__
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__QNX__ -D__UNIX__
- ASFLAGS += -d__QNX__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
- CFLAGS += -DCHECKED=1
-.ELSE
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)/qnx4/$(WC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := qnx4.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/qnxnto.mk b/board/MAI/bios_emulator/scitech/makedefs/qnxnto.mk
deleted file mode 100644
index 5168ed2..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/qnxnto.mk
+++ /dev/null
@@ -1,157 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# QNX Neutrino version for GNU C/C++
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA CHECKED USE_QNX USE_QNXNTO
-.IMPORT .IGNORE : USE_EGCS USE_PHOTON USE_X11 USE_BIOS
- TMPDIR := $(TEMP)
-
-# Standard file suffix definitions
-#
-# NOTE: Qnx does not require any extension for executeable files, but you
-# can use an extension if you wish. We use the .x extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems. When you install
-# the files to a local bin directory, you will probably want to remove
-# the .x extension.
- L := .a # Libraries
- E := .x # Executables
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := cp
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
-
-# Define that we are compiling for QNX
- USE_QNX := 1
-
-# Default commands for compiling, assembling linking and archiving.
- CC := qcc
- CFLAGS := -Vgcc_ntox86 -I. -Iinclude $(INCLUDE)
- CPPFLAGS := -Vgcc_ntox86 -I. -Iinclude $(INCLUDE)
- CXX := QCC
- AS := nasm
- ASFLAGS := -t -f elf -d__FLAT__ -d__GNUC__ -dSTDCALL_MANGLE -iinclude -i$(SCITECH)/include -d__NOU__
- LD := qcc
- LDFLAGS := -Vgcc_ntox86 -L. -lm
- LIB := ar
- LIBFLAGS := rc
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g2
- LDFLAGS += -g2
-.ELSE
-# NASM does not support debugging information yet
- ASFLAGS +=
-.ENDIF
-
-# Optionally turn on optimisations
-.IF $(OPT_MAX)
- CFLAGS += -Ot
-.ELIF $(OPT)
- CFLAGS += -O
-.ELIF $(OPT_SIZE)
- CFLAGS += -Os
-.ENDIF
-
-# Compile flag for whether to build photon or non-photon lib
-.IF $(USE_PHOTON)
- CFLAGS += -D__PHOTON__
-.ENDIF
-
-# Compile flag for whether to build X11 or non-X11 lib
-.IF $(USE_X11)
- CFLAGS += -D__X11__
-.ENDIF
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.ENDIF
-
-# Target environment dependant flags
- CFLAGS += -D__QNX__ -D__UNIX__
- ASFLAGS += -d__QNX__ -d__UNIX__
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/debug
- CFLAGS += -DCHECKED=1
-.ELSE
- LIB_BASE_DIR := $(SCITECH_LIB)/lib/release
-.ENDIF
-
-# Define where to install library files
- LIB_DEST := $(LIB_BASE_DIR)/qnxnto
- LDFLAGS += -L$(LIB_DEST)
-
-# Place to look for PMODE library files
-
-PMLIB := -lpm
-
-# Define which file contains our rules
-
- RULES_MAK := qnxnto.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bc16.mk
deleted file mode 100644
index 67ae910..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bc16.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $<
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-%$D: ; $(LD) $(mktmp $(LDFLAGS) -C -Twd c0dl.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(EXELIBS)\n$*.def)
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIBR) $(LIBFLAGS) $@ @$(mktmp +$(&:t" &\n+")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -C -Twe $(WIN_VERSION) c0wl.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(EXELIBS)\n$*.def)
-.ELSE
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Tde c0l.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(PMLIB) $(DEF_LIBS) $(EXELIBS))
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bc3.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bc3.mk
deleted file mode 100644
index d4d071c..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bc3.mk
+++ /dev/null
@@ -1,43 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS)) -c $<
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS)) -c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building a library file using response file
-%$L: ;
- @$(RM) $@
- $(LIBR) $(LIBFLAGS) $@ @$(mktmp +$(&:t" &\n+")\n)
-
-# Implicit rule for building an executable file using response file
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Tde c0l.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(EXELIBS))
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bc32.mk
deleted file mode 100644
index e3ce25b..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bc32.mk
+++ /dev/null
@@ -1,151 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-.IF $(USE_VXD)
-
-# Implicit rule generation to build VxD's
-
-%$O: %.c ;
- $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
- @$(VTOOLSD)\bin\segalias.exe -p $(VTOOLSD)\include\default.seg $@
-
-%$O: %$P ;
- $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
- @$(VTOOLSD)\bin\segalias.exe -p $(VTOOLSD)\include\default.seg $@
-
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-
-%$L: ; $(LIB) $(LIBFLAGS) $@ @$(mktmp -+$(?:t" &\n-+")\n)
-
-%.dll: ;
- @$(CP) $(mktmp EXPORTS\n_The_DDB @1) $*.def
- tlink32.exe @$(mktmp $(LDFLAGS) -Tpd $(VTOOLSD:s/\/\\)\lib\icrtbc4.obj+\n$(&:s/\/\\)\n$*.dll\n$*.map\n$(DEF_LIBS:s/\/\\) $(PMLIB:s/\/\\) $(EXELIBS:s/\/\\)\n$*.def)
- @$(RM) -S $(mktmp $*.def)
-
-%.vxd: %.dll ;
- @$(CP) $(mktmp DYNAMIC\nATTRIB ICODE INIT\nATTRIB LCODE LOCKED\nATTRIB PCODE PAGEABLE\nATTRIB SCODE STATIC\nATTRIB DBOCODE DEBUG\nMERGE ICODE INITDAT0 INITDATA) $*.pel
- @$(VTOOLSD)\bin\vxdver.exe $*.vrc $*.res
- @$(VTOOLSD)\bin\pele.exe -d -s $*.smf -c $*.pel -o $@ -k 400 $*.dll
- @$(VTOOLSD)\bin\sethdr.exe -n $* -x $@ -r $*.res
-.IF $(DBG)
- $(NMSYM) /TRANS:source,package /SOURCE:$(VXDSOURCE) $*.smf
-.ENDIF
- @$(RM) -S $(mktmp $*.pel)
-
-.ELSE
-
-# Implicit generation rules for making object files, libraries and exe's
-
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-.IF $(IMPORT_DLL)
-.ELSE
-.IF $(NO_RUNTIME)
-%$D: ; $(LD) $(mktmp $(LDFLAGS) -Tpd -aa $(&:s/\/\\)\n$@\n$*.map\n$(EXELIBS)\n$*.def)
-.ELSE
-%$D: ;
- makedef $(@:b)
- $(LD) $(mktmp $(LDFLAGS) -Tpd -aa c0d32.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS:s/\/\\) $(PMLIB:s/\/\\) $(EXELIBS)\n$*.def)
-.IF $(DBG)
-.IF $(USE_SOFTICE)
- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
- tdstrp32 $@
-.ENDIF
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
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-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
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-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $(LIBFLAGS) $@ @$(mktmp +$(&:t" &\n+")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-
-.IF $(USE_WIN32)
-.IF $(WIN32_GUI)
-%$E: ;
- $(LD) $(mktmp $(LDFLAGS) -Tpe -aa $(WIN_VERSION) c0w32.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS:s/\/\\) $(PMLIB:s/\/\\) $(EXELIBS)\n$*.def)
-.IF $(DBG)
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- tdstrp32 $@
-.ENDIF
-.ENDIF
-.ELSE
-%$E: ;
- $(LD) $(mktmp $(LDFLAGS) -Tpe -ap c0x32.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS:s/\/\\) $(PMLIB:s/\/\\) $(EXELIBS)\n$*.def)
-.IF $(USE_SOFTICE)
- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
- tdstrp32 $@
-.ENDIF
-.ENDIF
-.ELIF $(USE_TNT)
-%$E: ;
- @$(CP) $(mktmp stub 'gotnt.exe') $*.def
- @$(LD) $(mktmp $(LDFLAGS) -Tpe -ap c0x32.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(PMLIB:s/\/\\) $(EXELIBS)\n$*.def)
-.IF $(DOSSTYLE)
- @markphar $@
-.ENDIF
- @$(RM) -S $(mktmp $*.def)
-.ELIF $(USE_SMX32)
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Tpe -ap c0x32.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(PMLIB:s/\/\\) $(EXELIBS)\n$*.def)
-.ELSE
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Tpe -ap c0x32.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS) $(PMLIB:s/\/\\) $(EXELIBS)\n$*.def)
-.END
-
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/bcos2.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/bcos2.mk
deleted file mode 100644
index f473fec..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/bcos2.mk
+++ /dev/null
@@ -1,70 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) -c $(<:s,/,\)
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-%$D: ;
- makedef $(@:b)
- $(LD) $(mktmp $(LDFLAGS) -Tod -aa c02d.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS:s/\/\\) $(EXELIBS)\n$*.def)
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $(LIBFLAGS) $@ @$(mktmp +$(&:t" &\n+")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-
-.IF $(USE_OS2GUI)
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Toe -aa c02.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS:s/\/\\) $(EXELIBS)\n$*.def)
-.ELSE
-%$E: ; $(LD) $(mktmp $(LDFLAGS) -Toe -ap c02.obj+\n$(&:s/\/\\)\n$@\n$*.map\n$(DEF_LIBS:s/\/\\) $(EXELIBS)\n$*.def)
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/cl16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/cl16.mk
deleted file mode 100644
index 6489a3e..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/cl16.mk
+++ /dev/null
@@ -1,67 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$P ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$A ; $(AS) $(ASFLAGS) $< $* NUL NUL
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-#%$D: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS:s/\/\\) -e$@\n$(&:t"\n":s/\/\\)\n$(EXELIBS))
-#%$D: ; $(LD) $(LDFLAGS) /Fe$@ $& $(EXELIBS)
-%$D: ; link @default.rsp
-
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ; $(LIB) /nologo $(LIBFLAGS) $@ @$(mktmp -+$(?:t" &\n-+") &\n,,\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-#%$E: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-.ELSE
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(PMLIB) $(EXELIBS))
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/cl386.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/cl386.mk
deleted file mode 100644
index f50b274..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/cl386.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) -nologo $(CFLAGS) -c $<
-%$O: %$P ; $(CC) -nologo $(CFLAGS) -c $<
-%$O: %$A ; $(AS) $(ASFLAGS) $< $* NUL NUL
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-#%$D: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS:s/\/\\) -e$@\n$(&:t"\n":s/\/\\)\n$(EXELIBS))
-#%$D: ; $(LD) $(LDFLAGS) /Fe$@ $& $(EXELIBS)
-%$D: ; link386 @default.rsp
-
-# Implicit rule for building a device driver using a response file
-%.SYS: ; link386 @default.rsp
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ; $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ; $(LIB) /nologo $(LIBFLAGS) $@ @$(mktmp -+$(?:t" &\n-+") &\n,,\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-#%$E: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-.ELSE
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(PMLIB) $(EXELIBS))
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/dj32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/dj32.mk
deleted file mode 100644
index 9f917bb..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/dj32.mk
+++ /dev/null
@@ -1,47 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\) -c) $(<:s,/,\)
-%$O: %$P ; $(CC) @$(mktmp $(CFLAGS:s/\/\\) -c) $(<:s,/,\)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-
-# Implicit rule for building a library file using response file
-%$L: ; $(LIB) $(LIBFLAGS) $@ @$(mktmp $(&:s/\/\\)\n)
-
-# Implicit rule for building an executable file using response file
-%$E: ; $(LD) $(LDFLAGS) $@ @$(mktmp $(&:s/\/\\) $(EXELIBS) $(PMLIB) -lstdcxx -lm)
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/emx.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/emx.mk
deleted file mode 100644
index 26d223a..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/emx.mk
+++ /dev/null
@@ -1,91 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-# OS/2 version for EMX/GNU C/C++.
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ;
-.IF $(SHOW_ARGS)
- $(CC) -c $(CFLAGS) $(<:s,\,/)
-.ELSE
- @echo $(CC) -c $(<:s,\,/)
- @$(CC) -c $(CFLAGS) $(<:s,\,/)
-.ENDIF
-
-%$O: %$P ;
-.IF $(SHOW_ARGS)
- $(CXX) -c $(CFLAGS) $(<:s,\,/)
-.ELSE
- @echo $(CXX) -c $(<:s,\,/)
- @$(CXX) -c $(CFLAGS) $(<:s,\,/)
-.ENDIF
-
-%$O: %$A ;
-.IF $(USE_NASM)
-.IF $(SHOW_ARGS)
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-.ELSE
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- @$(AS) @$(mktmp -o $@ $(ASFLAGS)) $(<:s,\,/)
-.ENDIF
-.ELSE
-.IF $(SHOW_ARGS)
-
- $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
- @echo $(AS) $(<:s,/,\)
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-%$L: ;
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- $(LIB) $(LIBFLAGS) $@ $(&:s,\,/)
-.ELSE
- @echo $(LIB) $@
- @$(LIB) $(LIBFLAGS) $@ @$(mktmp $(?:t"\n"))
-.ENDIF
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-# Implicit rule for building an executable file using response file
-%$E: ;
-.IF $(SHOW_ARGS)
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-.ELSE
- @echo $(LD) $@
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-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
deleted file mode 100644
index 681b698..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk
+++ /dev/null
@@ -1,47 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CXX) $(CFLAGS) -c $<
-%$O: %$A ; $(AS) $(ASFLAGS) $<
-
-# Implicit rule for building a library file
-%$L: ; $(LIB) $(LIBFLAGS) $@ $&
-
-# Implicit rule for building an executable file
-%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB)
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_freebsd.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_freebsd.mk
deleted file mode 100644
index 9b4d236..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_freebsd.mk
+++ /dev/null
@@ -1,47 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CXX) $(CFLAGS) -c $<
-%$O: %$A ; $(AS) -o $@ $(ASFLAGS) $<
-
-# Implicit rule for building a library file
-%$L: ; $(LIB) $(LIBFLAGS) $@ $&
-
-# Implicit rule for building an executable file
-%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
deleted file mode 100644
index 5f91fe5..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk
+++ /dev/null
@@ -1,93 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-.IF $(USE_CXX_LINKER)
-LD := $(LDXX)
-.ENDIF
-
-# Implicit generation rules for making object files from source files
-%$O: %.c ;
-.IF $(SHOW_ARGS)
- $(CC) -c $(CFLAGS) $<
-.ELSE
- @$(ECHO) $(CC) $(SHOW_CFLAGS) $<
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-.ENDIF
-
-%$O: %$P ;
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-%$E: ;
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
deleted file mode 100644
index 485d166..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk
+++ /dev/null
@@ -1,90 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
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-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
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-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
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-# ========================================================================
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-# Descripton: Rules makefile definitions, which define the rules used to
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-# Implicit generation rules for making object files from source files
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/hc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/hc32.mk
deleted file mode 100644
index 011e9ab..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/hc32.mk
+++ /dev/null
@@ -1,51 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) $(CFLAGS) -c $<
-%$O: %$P ; $(CC) $(CFLAGS) -c $<
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/qnx4.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/qnx4.mk
deleted file mode 100644
index 55dc035..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/qnx4.mk
+++ /dev/null
@@ -1,94 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Whether to link in real VBIOS library, or just the stub library
-
-.IF $(USE_BIOS)
-VBIOSLIB := -lvbios.lib
-.ELSE
-VBIOSLIB := -lvbstubs.lib
-.END
-
-# Require special privledges for Nucleus programs (requires root access)
-
-.IF $(USE_NUCLEUS)
-LDFLAGS += -T1
-.ENDIF
-
-# Implicit generation rules for making object files from source files
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/qnxnto.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/qnxnto.mk
deleted file mode 100644
index c43ad1f..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/qnxnto.mk
+++ /dev/null
@@ -1,55 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
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-# makefile so the generic project makefiles can override
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-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
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-
-# Whether to link in real VBIOS library, or just the stub library
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-.END
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/sc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/sc16.mk
deleted file mode 100644
index b33bcd8..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/sc16.mk
+++ /dev/null
@@ -1,63 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
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-# certain things with macros (such as linking C++ programs
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-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
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-%$O: %$P ; $(CC) $(CFLAGS) -c $<
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-
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/sc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/sc32.mk
deleted file mode 100644
index 2231906..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/sc32.mk
+++ /dev/null
@@ -1,69 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
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-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
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-
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-PMLIB :=
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-
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
deleted file mode 100644
index 1a20319..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk
+++ /dev/null
@@ -1,82 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
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-# Descripton: Rules makefile definitions, which define the rules used to
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-#
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-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
deleted file mode 100644
index 2b41801..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk
+++ /dev/null
@@ -1,79 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
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-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
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- lxlite $@
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-%$E: ;
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diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/vc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/vc16.mk
deleted file mode 100644
index 6ffc270..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/vc16.mk
+++ /dev/null
@@ -1,70 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$P ; $(CC) /nologo $(CFLAGS) /c $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-%$D: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) -e$@\n$(&:t"\n":s/\/\\)\n$(EXELIBS))
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ $?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $@ /nologo $(LIBFLAGS) @$(mktmp +$(&:t" &\n+") &\n,\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-%$E: ; rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-#%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(EXELIBS))
-.ELSE
-%$E: ; $(LD) @$(mktmp $(LDFLAGS) /Fe$@ $(&:s/\/\\) $(PMLIB) $(EXELIBS))
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/vc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/vc32.mk
deleted file mode 100644
index 97f1a0c..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/vc32.mk
+++ /dev/null
@@ -1,122 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Turn on pre-compiled headers as neccessary
-.IF $(PRECOMP_HDR)
- CFLAGS += -YX"$(PRECOMP_HDR)"
-.ENDIF
-
-# Turn on runtime type information as necessary
-.IF $(USE_RTTI)
- CFLAGS += /GR
-.ENDIF
-
-# Turn on C++ exception handling as necessary
-.IF $(USE_CPPEXCEPT)
- CFLAGS += /GX
-.ENDIF
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) /nologo @$(mktmp $(CFLAGS:s/\/\\)) /c $(<:s,/,\)
-%$O: %$P ; $(CC) /nologo @$(mktmp $(CFLAGS:s/\/\\)) /c $(<:s,/,\)
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rules for building NT device drivers
-
-%.sys: ;
- $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.IF $(DBG)
-.IF $(USE_SOFTICE)
- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
-.ENDIF
-.ENDIF
-
-# Implicit rule for building a DLL using a response file
-.IF $(IMPORT_DLL)
-.ELSE
-.IF $(NO_RUNTIME)
-%$D: ; $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.ELSE
-%$D: ;
- makedef -v $*
- $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.IF $(DBG)
-.IF $(USE_SOFTICE)
- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
-.ENDIF
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Implicit rule for building a library file using response file. Note that
-# we use a special .VCD file that contains the EXPORT definitions for the
-# Microsoft compiler, since the LIB utility automatically adds leading
-# underscores to exported functions.
-.IF $(IMPORT_DLL)
-%$L: ;
- makedef -v $(?:b)
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) /DEF:$(?:b).def /OUT:$@
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $(LIBFLAGS) /out:$@ @$(mktmp $(&:t"\n")\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN32)
-%$E: ;
- $(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.IF $(DBG)
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- $(NMSYM) $(NMSYMFLAGS);$(SI_SOURCE) $@
-.ENDIF
-.ENDIF
-.ELSE
-%$E: ;
- @$(LD) /nologo @$(mktmp $(LDFLAGS) /Fe$@ $(&:t"\n"s/\/\\) $(PMLIB) $(EXELIBS) $(DEF_LIBS) $(LDENDFLAGS))
-.IF $(DOSSTYLE)
- @markphar $@
-.ENDIF
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/wc16.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/wc16.mk
deleted file mode 100644
index d1ca917..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/wc16.mk
+++ /dev/null
@@ -1,79 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Implicit generation rules for making object files
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS)) $<
-%$O: %$P ; $(CPP) @$(mktmp $(CFLAGS)) $<
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS)) $(<:s,/,\)
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ +$?
-.ELIF $(IMPORT_DLL)
-%$L: ;
- @$(RM) $@
- $(ILIB) $(ILIBFLAGS) $@ +$?
-.ELSE
-%$L: ;
- @$(RM) $@
- $(LIB) $(LIBFLAGS) $@ @$(mktmp,$*.rsp +$(&:t"\n+":s/\/\\)\n)
-.ENDIF
-
-# Implicit rule for building an executable file using response file
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS windows_dll\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
- @$(RM) -S $(mktmp $*.lnk)
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS windows\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
- @$(RM) -S $(mktmp $*.lnk)
-.ENDIF
-.ELSE
-%$E: ;
- @trimlib $(mktmp OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB) $(EXELIBS:t",")) $*.lnk
- $(LD) $(LDFLAGS) @$*.lnk
- @$(RM) -S $(mktmp $*.lnk)
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
deleted file mode 100644
index 39b8819..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk
+++ /dev/null
@@ -1,264 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Rules makefile definitions, which define the rules used to
-# build targets. We include them here at the end of the
-# makefile so the generic project makefiles can override
-# certain things with macros (such as linking C++ programs
-# differently).
-#
-#############################################################################
-
-# Take out PMLIB if we don't need to link with it
-
-.IF $(NO_PMLIB)
-PMLIB :=
-.ENDIF
-
-# Use a larger stack during linking if requested, or use a default stack
-# of 200k. The usual default stack provided by Watcom C++ is *way* to small
-# for real 32 bit code development. We also need a *huge* stack for OpenGL
-# software rendering also!
-.IF $(USE_QNX4)
- # Not necessary for QNX code.
-.ELSE
-.IF $(STKSIZE)
- LDFLAGS += OP STACK=$(STKSIZE)
-.ELSE
- LDFLAGS += OP STACK=204800
-.ENDIF
-.ENDIF
-
-# Turn on runtime type information as necessary
-.IF $(USE_RTTI)
- CPFLAGS += -xr
-.ENDIF
-
-# Optionally turn on pre-compiled headers
-.IF $(PRECOMP_HDR)
- CFLAGS += -fhq
-.ENDIF
-
-.IF $(USE_QNX)
-# Whether to link in real VBIOS library, or just the stub library
-.IF $(USE_BIOS)
-VBIOSLIB := vbios.lib,
-.ELSE
-VBIOSLIB := vbstubs.lib,
-.END
-# Require special privledges for Nucleus programs (requires root access)
-.IF $(USE_NUCLEUS)
-LDFLAGS += OP PRIV=1
-.ENDIF
-.ENDIF
-
-# Implicit generation rules for making object files
-.IF $(WC_LIBBASE) == WC10A
-%$O: %.c ; $(CC) $(CFLAGS) $(<:s,/,\)
-%$O: %$P ; $(CPP) $(CFLAGS) $(<:s,/,\)
-.ELSE
-%$O: %.c ; $(CC) @$(mktmp $(CFLAGS:s/\/\\)) $(<:s,/,\)
-%$O: %$P ; $(CPP) @$(mktmp $(CPFLAGS:s/\/\\) $(CFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-.IF $(USE_NASM)
-%$O: %$A ; $(AS) @$(mktmp -o $@ $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-%$O: %$A ; $(AS) @$(mktmp $(ASFLAGS:s/\/\\)) $(<:s,/,\)
-.ENDIF
-
-# Implit rule to compile .S assembler files. The first version
-# uses GAS directly and the second uses a pre-processor to
-# produce NASM code.
-
-.IF $(USE_GAS)
-.IF $(WC_LIBBASE) == WC11
-%$O: %$S ; $(GAS) -c @$(mktmp $(GAS_FLAGS:s/\/\\)) $(<:s,/,\)
-.ELSE
-# Black magic to build asm sources with Watcom 10.6 (requires sed)
-%$O: %$S ;
- $(GAS) -c @$(mktmp $(GAS_FLAGS:s/\/\\)) $(<:s,/,\)
- wdisasm \\ -a $(*:s,/,\).o > $(*:s,/,\).lst
- sed -e "s/\.text/_TEXT/; s/\.data/_DATA/; s/\.bss/_BSS/; s/\.386/\.586/; s/lar *ecx,cx/lar ecx,ecx/" $(*:s,/,\).lst > $(*:s,/,\).asm
- wasm \\ $(WFLAGS) -zq -fr=nul -fp3 -fo=$@ $(*:s,/,\).asm
- $(RM) -S $(mktmp $(*:s,/,\).o)
- $(RM) -S $(mktmp $(*:s,/,\).lst)
- $(RM) -S $(mktmp $(*:s,/,\).asm)
-.ENDIF
-.ELSE
-%$O: %$S ;
- @gcpp -DNASM_ASSEMBLER -D__WATCOMC__ -EP $(<:s,/,\) > $(*:s,/,\).asm
- nasm @$(mktmp -f obj -o $@) $(*:s,/,\).asm
- @$(RM) -S $(mktmp $(*:s,/,\).asm)
-.ENDIF
-
-# Special target to build dllstart.asm using Borland TASM
-dllstart.obj: dllstart.asm
- $(DLL_TASM) @$(mktmp /t /mx /m /D__FLAT__ /i$(SCITECH)\INCLUDE /q) $(PRIVATE)\src\common\dllstart.asm
-
-# Implicit rule for building resource files
-%$R: %.rc ; $(RC) $(RCFLAGS) -r $<
-
-# Implicit rule for building a DLL using a response file
-.IF $(IMPORT_DLL)
-.ELSE
-.IF $(USE_OS232)
-%$D: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2 dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELIF $(USE_WIN32)
-%$D: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt_dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELSE
-%$D: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
- wbind $* -d -q -n
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Implicit rule for building a library file using response file
-.IF $(BUILD_DLL)
-%$L: ;
- @$(RM) $@
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-%$L: ;
- @$(RM) $@
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-%$L: ;
- @$(RM) $@
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-.ENDIF
-
-# Implicit rule for building an executable file using response file
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-%$E: ;
- @trimlib $(mktmp OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
- $(LD) $(LDFLAGS) @$*.lnk
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-.ELSE
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-.ELIF $(USE_OS232)
-.IF $(USE_OS2GUI)
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-.ELSE
- @$(RM) -S $(mktmp *.lnk)
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-.IF $(LXLITE)
- lxlite $@
-.ENDIF
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
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-.ELSE
- @$(RM) -S $(mktmp *.lnk)
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-.IF $(LXLITE)
- lxlite $@
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-.ELIF $(USE_SNAP)
-%$E: ;
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-.IF $(WIN32_GUI)
-%$E: ;
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-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk
- rclink $(LD) $(RC) $@ $*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ENDIF
-.ELIF $(USE_WIN386)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
- rclink $(LD) wbind $*.rex $*.lnk
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-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELIF $(USE_TNT)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR dosx32.lib,tntapi.lib,$(PMLIB)$(EXELIBS:t",")) $*.lnk
- $(LD) @$*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.IF $(DOSSTYLE)
- @markphar $@
-.ENDIF
-.ELIF $(USE_QNX4)
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(VBIOSLIB)$(EXELIBS:t",")) $*.lnk
- @+if exist $*.exe attrib -s $*.exe > NUL
- $(LD) @$*.lnk
- @attrib +s $*.exe
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ELSE
-%$E: ;
- @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk
- $(LD) @$*.lnk
-.IF $(LEAVE_LINKFILE)
-.ELSE
- @$(RM) -S $(mktmp *.lnk)
-.ENDIF
-.ENDIF
diff --git a/board/MAI/bios_emulator/scitech/makedefs/sc16.mk b/board/MAI/bios_emulator/scitech/makedefs/sc16.mk
deleted file mode 100644
index 099ad45..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/sc16.mk
+++ /dev/null
@@ -1,128 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Symantec C++ 6.x/7.x 16 bit version. Supports 16 bit DOS
-# and 16 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : SC_LIBBASE
-
-# Default commands for compiling, assembling linking and archiving
- CC := sc # C-compiler and flags
- CFLAGS := -ml -Jm
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := sc # Loader and flags
- LDFLAGS = $(CFLAGS)
- RC := rcc # WIndows resource compiler
- RCFLAGS := # Mark as Win32 compatible resources
- LIB := lib # Librarian
- LIBFLAGS := /N /B
- ILIB := implib # Import librarian
- ILIBFLAGS :=
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -5 -o+all
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -o+space
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -ff -DFPU387
- ASFLAGS += -DFPU387 -DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# User a larger stack if requested
-
-.IF $(STKSIZE)
- LDFLAGS += =$(STKSIZE)
-.ENDIF
-
-# Optionally compile for 16 bit Windows
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += -WD -DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -WA
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(SC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := sc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/sc32.mk b/board/MAI/bios_emulator/scitech/makedefs/sc32.mk
deleted file mode 100644
index 9ca7570..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/sc32.mk
+++ /dev/null
@@ -1,178 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Symantec C++ 6.x/7.x 32 bit version. Supports the DOSX
-# extender, FlashTek X32 and Phar Lap's TNT DOS Extender
-# and 32 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_TNT USE_X32 USE_X32VM SC_LIBBASE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := sc # C-compiler and flags
- CFLAGS := -Jm
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
-.IF $(USE_WIN32)
- ASFLAGS := /t /mx /m /D__FLAT__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ELSE
- ASFLAGS := /t /mx /m /DES_NOT_DS /D__COMM__ /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := sc # Loader and flags
- LD_FLAGS =
- RC := rcc # WIndows resource compiler
- RCFLAGS := -32 # Mark as Win32 compatible resources
- LIB := lib # Librarian
- LIBFLAGS := /N /B
- ILIB := implib # Import librarian
- ILIBFLAGS :=
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -g # Turn on debugging for C compiler (FlashView)
-.IF $(USE_TNT)
- LDFLAGS += -fullsym # Turn on debugging for TNT 386link linker
-.END
-.IF $(USE_X32) or $(USE_X32VM)
- LDFLAGS += -L/map # Turn on debugging for FlashView debugger
-.END
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -5 -o+all
-.ELIF $(OPT_SIZE)
- CFLAGS += -5 -o+space
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += -ff -DFPU387
- ASFLAGS += -DFPU387 -DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# User a larger stack if requested
-
-.IF $(STKSIZE)
- LDFLAGS += =$(STKSIZE)
-.ENDIF
-
-.IF $(USE_TNT) # Use Phar Lap's TNT DOS Extender
- CFLAGS += -mp
- DX_CFLAGS += -DTNT
- ASFLAGS += /D__FLAT__
- DX_ASFLAGS += -DTNT
- LD := 386link
- LDFLAGS += @sc32.dos -exe $@
- LIB_OS = DOS32
-.ELIF $(USE_X32VM) # Use FlashTek X-32VM DOS extender
- CFLAGS += -mx
- DX_CFLAGS += -DX32VM
- ASFLAGS += /D__X386__
- DX_ASFLAGS += -DX32VM
- LD := sc
- LDFLAGS += $(CFLAGS) x32v.lib
- LIB_OS = DOS32
-.ELIF $(USE_X32) # Use FlashTek X-32 DOS extender
- CFLAGS += -mx
- DX_CFLAGS += -DX32VM
- ASFLAGS += /D__X386__
- DX_ASFLAGS += -DX32VM
- LD := sc
- LDFLAGS += $(CFLAGS) x32.lib
- LIB_OS = DOS32
-.ELIF $(USE_WIN32) # Build 32 bit Windows NT app
-.IF $(BUILD_DLL)
- CFLAGS += -WD -mn
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -WA -mn
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS32__
- LIB_OS = WIN32
-.ELSE # Use default Symantec DOSX extender
- USE_DOSX := 1
- USE_REALDOS := 1
- CFLAGS += -mx
- DX_CFLAGS += -DDOSX
- ASFLAGS += /D__X386__
- DX_ASFLAGS += -DDOSX
- LD := sc
- LDFLAGS += $(CFLAGS)
- LIB_OS = DOS32
-.END
-
-# Place to look for PMODE library files
-
-.IF $(USE_TNT)
-PMLIB := tnt\pm.lib
-.ELIF $(USE_X32)
-PMLIB := x32\pm.lib
-.ELSE
-PMLIB := dosx\pm.lib
-.END
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(SC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := sc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/startup.mk b/board/MAI/bios_emulator/scitech/makedefs/startup.mk
deleted file mode 100644
index d8b2ba2..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/startup.mk
+++ /dev/null
@@ -1,161 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Common startup script that defines all variables common to
-# all startup scripts. These define the DMAKE runtime
-# environment and the values are dependant on the version of
-# DMAKE in use.
-#
-#############################################################################
-
-# Disable warnings for macros redefined here that were given
-# on the command line.
-__.SILENT := $(.SILENT)
-.SILENT := yes
-
-# Import enivornment variables that we use common to all compilers
-.IMPORT .IGNORE : TEMP SHELL COMSPEC INCLUDE LIB SCITECH PRIVATE SCITECH_LIB
-.IMPORT .IGNORE : DBG OPT OPT_SIZE SHW BETA USE_WIN32 FPU BUILD_DLL BUILD_FOR_DLL
-.IMPORT .IGNORE : IMPORT_DLL USE_TASMX WIN32_GUI USE_WIN16 USE_NASM CHECKED
-.IMPORT .IGNORE : OS2_SHELL SOFTICE_PATH MAX_WARN USE_SOFTICE USE_TASM32
-.IMPORT .IGNORE : DLL_START_TASM USE_SNAP USE_X11 USE_LINUX STATIC_LIBS LIBC
-.IMPORT .IGNORE : SHOW_ARGS BOOT_STRAP_DMAKE
- TMPDIR := $(TEMP)
-
-# Determine if the host machine is a Windows/DOS or Unix box
-.IF $(COMSPEC)
- WIN32_HOST := 1
-.ELSE
- USE_NASM := 1
- UNIX_HOST := 1
-.ENDIF
-
-# Setup to either user NASM or TASM as the assembler
-.IF $(USE_NASM)
-.ELSE
- USE_TASM := 1
-.ENDIF
-
-.IF $(UNIX_HOST)
-# Standard file suffix definitions
-#
-# NOTE: Linux/Unix does not require any extenion for executeable files, but you
-# can use an extension if you wish. We use the .exe extension for building
-# executeable files so that we can use implicit rules to make the
-# makefiles simpler and more portable between systems (exe also makes it
-# easier for cross-compile/debugging situations). When you install
-# the files to a local bin directory, you will probably want to remove
-# the .exe extension.
- L := .a # Libraries
- E := .exe # Executables for glibc
- O := .o # Objects
- A := .asm # Assembler sources
- S := .s # GNU assembler sources
- P := .cpp # C++ sources
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := -l # Library link prefix (name of library on link command line)
- LE := # Library link suffix (extension of library on link command line)
-
-# We use the Unix shell at all times
- SHELL := /bin/sh
- SHELLFLAGS := -c
-
-.ELSE
-# Standard file DOS/Win/OS2 suffix definitions
- L := .lib # Libraries
-.IF $(USE_SNAP)
- E := .sxe # Snap Executables
- D := .sll # Snap Dynamic Link Library file
-.ELSE
- E := .exe # Executables
- D := .dll # Dynamic Link Library file
-.ENDIF
- O := .obj # Objects
- A := .asm # Assembler sources
- P := .cpp # C++ sources
- R := .res # Compiled resource file
- S := .s # Assyntax.h style assembler
-
-# File prefix/suffix definitions. The following prefixes are defined, and are
-# used primarily to abstract between the Unix style libXX.a naming convention
-# and the DOS/Windows/OS2 naming convention of XX.lib.
- LP := # LP - Library file prefix (name of file on disk)
- LL := # Library link prefix (name of library on link command line)
- LE := .lib # Library link suffix (extension of library on link command line)
-
-# We use the DOS/Win/OS2 style shell at all times
- SHELL := $(COMSPEC)
- GROUPSHELL := $(SHELL)
- SHELLFLAGS := $(SWITCHAR)c
- GROUPFLAGS := $(SHELLFLAGS)
- SHELLMETAS := *"?<>
-.IF $(OS2_SHELL)
- GROUPSUFFIX := .cmd
-.ELSE
- GROUPSUFFIX := .bat
-.ENDIF
- DIRSEPSTR := \\
- DIVFILE = $(TMPFILE:s,/,\)
-
-.ENDIF
-
-# Standard Unix style shell commands. Since these do not exist on
-# regular DOS/Win/OS2 installations we use our own '' versions
-# instead. To boostrtap a new OS you may wish to use the regular
-# unix versions.
-
-.IF $(BOOT_STRAP_DMAKE)
- CP := cp
- MD := mkdir
- RM := rm
- ECHO := echo
-.ELSE
- CP := k_cp
- MD := k_md
- RM := k_rm
- ECHO := k_echo
-.ENDIF
-
-# Definition of $(MAKE) macro for recursive makes.
- MAKE = $(MAKECMD) $(MFLAGS)
-
-# Macro to install a library file
- INSTALL := $(CP)
-
-# DMAKE uses this recipe to remove intermediate targets
-.REMOVE :; $(RM) -f $<
-
-# Turn warnings back to previous setting.
-.SILENT := $(__.SILENT)
-
-# We dont use TABS in our makefiles
-.NOTABS := yes
diff --git a/board/MAI/bios_emulator/scitech/makedefs/va32.mk b/board/MAI/bios_emulator/scitech/makedefs/va32.mk
deleted file mode 100644
index fbca523..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/va32.mk
+++ /dev/null
@@ -1,163 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# IBM VisualAge C++ 3.0 OS/2 32-bit version.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VA_LIBBASE USE_OS232 USE_OS2GUI FULLSCREEN NOOPT MAX_WARN
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := icc
- CPP := icc
- CFLAGS := /Q /G5 /Gl+ /Fi /Si /J- /Ss+ /Sp1 /Gm+ /I.
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -F null -d__FLAT__ -dSTDCALL_MANGLE -d__NOU_VAR__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := ilink
- LDFLAGS = /noi /exepack:2 /packcode /packdata /align:32 /map /noe
- RC := rc
- RCFLAGS := -n -x2
- LIB := ilib
- LIBFLAGS := /nologo
- ILIB := implib
- ILIBFLAGS := /nologo
- IPFC := ipfc
- IPFCFLAGS :=
- IBMCOBJ := 1
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += /W3
-.ELSE
- CFLAGS += /W1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Ti
- LDFLAGS += /DE
-.ELSE
-.IF $(USE_TASM)
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Gfi /O /Oi
-.ELIF $(OPT_SIZE)
- CFLAGS += /Gfi /O /Oc
-.ELIF $(NOOPT)
- CFLAGS += /O-
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Build 32-bit OS/2 apps
-.IF $(BUILD_DLL)
- CFLAGS += /Ge- /DBUILD_DLL
- LDFLAGS += /DLL /NOE
- ASFLAGS += -dBUILD_DLL
-.ELSE
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
- LDFLAGS += /PMTYPE:PM
-.ELSE
-.IF $(FULLSCREEN)
- LDFLAGS += /PMTYPE:NOVIO
-.ELSE
- LDFLAGS += /PMTYPE:VIO
-.ENDIF
-.ENDIF
-.ENDIF
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-
-# Place to look for PMODE library files
-
-.IF $(USE_OS2GUI)
-.IF $(USE_SDDPMDLL)
-#Note: This is OK for now but might need to be changed if the GUI PM library
-# were really different
-PMLIB := sddpmlib.lib
-.ELSE
-PMLIB := pm_pm.lib
-.ENDIF
-.ELSE
-.IF $(USE_SDDPMDLL)
-PMLIB := sddpmlib.lib
-.ELSE
-PMLIB := pm.lib
-.ENDIF
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += /DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VA_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := va32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/va365.mk b/board/MAI/bios_emulator/scitech/makedefs/va365.mk
deleted file mode 100644
index 3a2eccb..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/va365.mk
+++ /dev/null
@@ -1,151 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# IBM VisualAge C++ 3.65 OS/2 32-bit version.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VA_LIBBASE USE_OS232 USE_OS2GUI FULLSCREEN NOOPT MAX_WARN
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := icc
- CPP := icc
- CFLAGS := /Q /G5l /Fi /Si /J- /Ss+ /Sp1 /Gm+ /I.
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -F null -d__FLAT__ -dSTDCALL_MANGLE -d__NOU_VAR__ -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
-.ELSE
- AS := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /DSTDCALL_MANGLE /D__NOU_VAR__ /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := ilink
- LDFLAGS = /noi /exepack /packcode /packdata /align:32 /map /noe
- RC := rc
- RCFLAGS := /nologo
- LIB := ilib
- LIBFLAGS := /nologo
- ILIB := implib
- ILIBFLAGS := /nologo
- IBMCOBJ := 1
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += /W3
-.ELSE
- CFLAGS += /W1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Ti
- LDFLAGS += /DE
-.ELSE
-.IF $(USE_TASM)
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Gfi /O /Oi
-.ELIF $(OPT_SIZE)
- CFLAGS += /Gfi /O /Oc
-.ELIF $(NOOPT)
- CFLAGS += /O-
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-# Build 32-bit OS/2 apps
-.IF $(BUILD_DLL)
- CFLAGS += /Gme- /DBUILD_DLL
- LDFLAGS += /DLL /NOE
- ASFLAGS += -dBUILD_DLL
-.ELSE
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
- LDFLAGS += /PMTYPE:PM
-.ELSE
-.IF $(FULLSCREEN)
- LDFLAGS += /PMTYPE:NOVIO
-.ELSE
- LDFLAGS += /PMTYPE:VIO
-.ENDIF
-.ENDIF
-.ENDIF
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-
-# Place to look for PMODE library files
-
-.IF $(USE_OS2GUI)
-PMLIB := pm_pm.lib
-.ELSE
-PMLIB := pm.lib
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += /DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VA_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := va365.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/vc16.mk b/board/MAI/bios_emulator/scitech/makedefs/vc16.mk
deleted file mode 100644
index 913bf9c..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/vc16.mk
+++ /dev/null
@@ -1,128 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft Visual C++ 1.x 16 bit version. Supports 16 bit
-# DOS and Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : VC_LIBBASE
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl # C-compiler and flags
- CFLAGS := /YX /w /G3 /Gs
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__COMM__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := cl # Loader and flags
- LDFLAGS = $(CFLAGS)
- RC := rc # WIndows resource compiler
- RCFLAGS :=
- LIB := lib # Librarian
- LIBFLAGS := /NOI /NOE
- ILIB := implib # Import librarian
- ILIBFLAGS := /noignorecase
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Yd /Zi # Turn on debugging for C compiler
- ASFLAGS += /zi # Turn on debugging for assembler
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += /Ox
-.END
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /FPi87 /DFPU387
- ASFLAGS += /DFPU387 /DFPU_REG_RTN
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += /DBETA
-.END
-
-# Use a larger stack during linking if requested ???? How the fuck do you
-# specify linker options on the CL command line?????
-
-.IF $(STKSIZE)
-.ENDIF
-
-# Optionally compile for 16 bit Windows
-.IF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += /GD /Alfw /DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += /GA /AL
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- CFLAGS += /AL
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := vc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/vc32.mk b/board/MAI/bios_emulator/scitech/makedefs/vc32.mk
deleted file mode 100644
index 11c9071..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/vc32.mk
+++ /dev/null
@@ -1,226 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Microsoft Visual C++ 2.x 32 bit version. Supports Phar Lap
-# TNT DOS Extender and 32 bit Windows development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : TNT_PATH VC_LIBBASE DOSSTYLE USE_TNT USE_RTTARGET MSVCDIR
-.IMPORT .IGNORE : USE_VXD USE_NTDRV USE_W2KDRV NT_DDKROOT USE_RTTI USE_CPPEXCEPT
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Default commands for compiling, assembling linking and archiving
- CC := cl # C-compiler and flags
- CFLAGS :=
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f win32 -F null -d__FLAT__ -dSTDCALL_MANGLE -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- ASFLAGS := /t /mx /m /D__FLAT__ /DSTDCALL_MANGLE /iINCLUDE /i$(SCITECH)\INCLUDE
-.ENDIF
- LD := cl
-.IF $(USE_WIN32)
- LDFLAGS = $(CFLAGS)
-.IF $(USE_NTDRV)
- LDENDFLAGS = -link /INCREMENTAL:NO /DRIVER /SUBSYSTEM:NATIVE,4.00 /VERSION:4.00 /MACHINE:I386 /NODEFAULTLIB /DEBUGTYPE:CV /PDB:NONE /ALIGN:0x20 /BASE:0x10000 /ENTRY:DriverEntry@8
- #/MERGE:_page=page /MERGE:_text=.text /MERGE:.rdata=.text
-.ELIF $(WIN32_GUI)
- LDENDFLAGS = -link /INCREMENTAL:NO /DEF:$(@:b).def /SUBSYSTEM:WINDOWS /MACHINE:I386 /DEBUGTYPE:CV /PDB:NONE
-.ELSE
- LDENDFLAGS = -link /INCREMENTAL:NO /SUBSYSTEM:CONSOLE /MACHINE:I386 /DEBUGTYPE:CV /PDB:NONE
-.ENDIF
-.ELSE
- LDFLAGS = $(CFLAGS)
- LDENDFLAGS := -link -stub:$(TNT_PATH:s/\/\\)\\bin\\gotnt.exe /PDB:NONE
-.ENDIF
- RC := rc # Watcom resource compiler
- RCFLAGS := # Mark as Win32 compatible resources
- LIB := lib # Librarian
- LIBFLAGS :=
- ILIB := lib # Import librarian
- ILIBFLAGS := /MACHINE:IX86
- INTEL_X86 := 1
- NMSYM := $(SOFTICE_PATH)\nmsym.exe
-.IF $(USE_NTDRV)
- NMSYMFLAGS := /TRANSLATE:source,package,always /PROMPT /SOURCE:$(MSVCDIR)\crt\src\intel;$(SCITECH)\src\pm;$(SCITECH)\src\pm\common;$(SCITECH)\src\pm\ntdrv
-.ELSE
- NMSYMFLAGS := /TRANSLATE:source,package,always /PROMPT /SOURCE:$(SCITECH)\src\pm;$(SCITECH)\src\pm\common;$(SCITECH)\src\pm\win32
-.ENDIF
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += -W3
-.ELSE
- CFLAGS += -W1
-.ENDIF
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += /Yd /Zi # Turn on debugging for C compiler
-.IF $(USE_TASM)
- ASFLAGS += /zi # Turn on debugging for assembler
-.ENDIF
-.ELSE
-.IF $(USE_TASM)
- ASFLAGS += /q # Suppress object records not needed for linking
-.ENDIF
-.END
-
-# Optionally turn on optimisations
-.IF $(VC_LIBBASE) == vc5
-.IF $(OPT)
- CFLAGS += /G6 /O2 /Ox /Oi-
-.ELIF $(OPT_SIZE)
- CFLAGS += /G6 /O1
-.END
-.ELSE
-.IF $(OPT)
- CFLAGS += /G5 /O2 /Ox
-.ELIF $(OPT_SIZE)
- CFLAGS += /G5 /O1
-.END
-.ENDIF
-
-# Optionally turn on direct i387 FPU instructions
-
-.IF $(FPU)
- CFLAGS += /DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += /DBETA
- ASFLAGS += -dBETA
-.END
-
-# Use a larger stack during linking if requested, or use a default stack
-# of 50k. The usual default stack provided by Visual C++ is *way* to small
-# for real 32 bit code development.
-
-.IF $(USE_WIN32)
- # Not necessary for Win32 code.
-.ELSE
-.IF $(STKSIZE)
- LDENDFLAGS += /STACK:$(STKSIZE)
-.ELSE
- LDENDFLAGS += /STACK:51200
-.ENDIF
-.ENDIF
-
-# DOS extender dependant flags
-.IF $(USE_NTDRV) # Build 32 bit Windows NT driver
- CFLAGS += /LD /Zl /Gy /Gz /GF /D__NT_DRIVER__ /D_X86_=1 /Di386=1
-.IF $(DBG)
- CFLAGS += /QIf
-.ENDIF
- ASFLAGS +=
- DEF_LIBS := int64.lib ntoskrnl.lib hal.lib
- DX_ASFLAGS += -d__NT_DRIVER__
-.IF $(USE_W2KDRV) # Build 32 bit Windows 2000 driver
- LIB_OS = W2KDRV
-.ELSE
- LIB_OS = NTDRV
-.ENDIF
-.ELIF $(USE_WIN32) # Build 32 bit Windows NT app
-.IF $(WIN32_GUI)
-.ELSE
- CFLAGS += -D__CONSOLE__
-.ENDIF
-.IF $(BUILD_DLL)
- CFLAGS += /MT /LD /DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.IF $(NO_RUNTIME)
- LDENDFLAGS += /NODEFAULTLIB
- CFLAGS += /Zl
- DEF_LIBS :=
-.ELSE
- DEF_LIBS := kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib ole32.lib oleaut32.lib version.lib winspool.lib uuid.lib odbc32.lib odbccp32.lib wsock32.lib rpcrt4.lib
-.ENDIF
-.ELSE
- CFLAGS += /MT
- DEF_LIBS := kernel32.lib user32.lib gdi32.lib advapi32.lib shell32.lib winmm.lib comdlg32.lib comctl32.lib ole32.lib oleaut32.lib version.lib winspool.lib uuid.lib odbc32.lib odbccp32.lib wsock32.lib rpcrt4.lib
-.ENDIF
- DX_ASFLAGS += -d__WINDOWS32__
- LIB_OS = WIN32
-.ELIF $(USE_RTTARGET)
- CFLAGS += -D__RTTARGET__
- DX_CFLAGS +=
- DX_ASFLAGS += -d__RTTARGET__
- USE_REALDOS :=
- LIB_OS = RTT32
- DEF_LIBS := cw32mt.lib
-.ELSE
- USE_TNT := 1
- USE_REALDOS := 1
- CFLAGS += /MT /D__MSDOS32__
- DX_CFLAGS += -DTNT
- DX_ASFLAGS += -dTNT
- LIB_OS = DOS32
- DEF_LIBS := dosx32.lib tntapi.lib
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += /DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(VC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Place to look for PMODE library files
-
-.IF $(USE_TNT)
-PMLIB := $(LIB_BASE:s/\/\\)\\tnt\\pm.lib
-.ELSE
-PMLIB := $(LIB_BASE:s/\/\\)\\pm.lib
-.ENDIF
-
-# Define which file contains our rules
-
- RULES_MAK := vc32.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/wc16.mk b/board/MAI/bios_emulator/scitech/makedefs/wc16.mk
deleted file mode 100644
index e316f4c..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/wc16.mk
+++ /dev/null
@@ -1,141 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Watcom C++ 10.x 16 bit version. Supports 16-bit DOS,
-# 16-bit Windows development and 16-bit OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : WC_LIBBASE USE_WIN16 USE_OS216 USE_OS2GUI
-
-# Default commands for compiling, assembling linking and archiving
- CC := wcc # C-compiler and flags
- CPP := wpp # C++-compiler and flags
- CFLAGS := -ml-zq-j-w2-s-fh -fhq
-.IF $(USE_TASM32)
- AS := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx # Assembler and flags
-.ELSE
- AS := tasm # Assembler and flags
-.ENDIF
- AS := tasm # Assembler and flags
- ASFLAGS := /t /mx /m /D__LARGE__ /iINCLUDE /i$(SCITECH)\INCLUDE
- LD := wlink # Loader and flags
- LDFLAGS =
- RC := wrc # Watcom resource compiler
- RCFLAGS := /bt=windows
- LIB := wlib # Librarian
- LIBFLAGS := -q
- ILIB := wlib # Import librarian
- ILIBFLAGS := -c
-
-# Optionally turn on debugging information
-.IF $(DBG)
- CFLAGS += -d2 # Turn on debugging for C compiler
- LIBFLAGS += -p=128 # Larger page size for libraries with debug info!
- ASFLAGS += /zi # Turn on debugging for assembler
- LDFLAGS += D A # Turn on debugging for linker
-.ELSE
- ASFLAGS += /q # Suppress object records not needed for linking
-.END
-
-# Optionally turn on optimisations
-.IF $(OPT)
- CFLAGS += -onatx-5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-
-.IF $(FPU)
- CFLAGS += -fpi87-fp5-DFPU387
- ASFLAGS += -DFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -DBETA
-.END
-
-# Use a larger stack during linking if requested
-
-.IF $(STKSIZE)
- LDFLAGS += OP STACK=$(STKSIZE)
-.ENDIF
-
-.IF $(USE_OS216)
-.IF $(BUILD_DLL)
- CFLAGS += -bd-bt=os2-DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -bt=os2
-.ENDIF
- DX_ASFLAGS += -D__OS216__
- LIB_OS = os216
-.ELIF $(USE_WIN16)
-.IF $(BUILD_DLL)
- CFLAGS += -bd-bt=windows-D_WINDOWS-DBUILD_DLL
- ASFLAGS += -DBUILD_DLL
-.ELSE
- CFLAGS += -bt=windows-D_WINDOWS
-.ENDIF
- DX_ASFLAGS += -D__WINDOWS16__
- LIB_OS = WIN16
-.ELSE
- USE_REALDOS := 1
- LIB_OS = DOS16
-.END
-
-# Place to look for PMODE library files
-
-PMLIB := pm.lib,
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(WC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
-# Define which file contains our rules
-
- RULES_MAK := wc16.mk
diff --git a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk b/board/MAI/bios_emulator/scitech/makedefs/wc32.mk
deleted file mode 100644
index e5175ca..0000000
--- a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk
+++ /dev/null
@@ -1,353 +0,0 @@
-#############################################################################
-#
-# SciTech Multi-platform Graphics Library
-#
-# ========================================================================
-#
-# The contents of this file are subject to the SciTech MGL Public
-# License Version 1.0 (the "License"); you may not use this file
-# except in compliance with the License. You may obtain a copy of
-# the License at http://www.scitechsoft.com/mgl-license.txt
-#
-# Software distributed under the License is distributed on an
-# "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-# implied. See the License for the specific language governing
-# rights and limitations under the License.
-#
-# The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-#
-# The Initial Developer of the Original Code is SciTech Software, Inc.
-# All Rights Reserved.
-#
-# ========================================================================
-#
-# Descripton: Generic DMAKE startup makefile definitions file. Assumes
-# that the SCITECH environment variable has been set to point
-# to where all our stuff is installed. You should not need
-# to change anything in this file.
-#
-# Watcom C++ 10.x 32 bit version. Supports Rational's DOS4GW
-# DOS Extender, PMODE/W, Causeway, FlashTek's X32-VM,
-# Phar Lap's TNT DOS Extender, 32-bit Windows development and
-# 32-bit OS/2 development.
-#
-#############################################################################
-
-# Include standard startup script definitions
-.IMPORT: SCITECH
-.INCLUDE: "$(SCITECH)\makedefs\startup.mk"
-
-# Import enivornment variables that we use
-.IMPORT .IGNORE : USE_TNT USE_X32 USE_X32VM USE_PMODEW STKCALL USE_CAUSEWAY
-.IMPORT .IGNORE : USE_WIN386 USE_OS232 USE_OS2GUI WC_LIBBASE NOOPT DOSSTYLE
-.IMPORT .IGNORE : OS2_SHELL USE_CODEVIEW USE_DOS32A USE_QNX4 LEAVE_LINKFILE
-
-# We are compiling for a 32 bit envionment
- _32BIT_ := 1
-
-# Setup special environment for QNX 4 (Unix'ish)
-.IF $(USE_QNX4)
- USE_QNX := 1
- L := .a # Libraries
- LP := lib # LP - Library file prefix (name of file on disk)
- LL := lib # Library link prefix (name of library on link command line)
- LE := .a # Library link suffix (extension of library on link command line)
-.ENDIF
-
-# Default commands for compiling, assembling linking and archiving
- CC := wcc386
- CPP := wpp386
- CFLAGS := -zq-j-s-fpi87
-.IF $(USE_NASM)
- AS := nasm
- ASFLAGS := -t -f obj -d__FLAT__ -dSTDCALL_MANGLE -iINCLUDE -i$(SCITECH)\INCLUDE
-.ELSE
-.IF $(USE_TASM32)
- AS := tasm32
- DLL_TASM := tasm32
-.ELIF $(USE_TASMX)
- AS := tasmx
- DLL_TASM := tasmx
-.ELSE
- AS := tasm
- DLL_TASM := tasm
-.ENDIF
- ASFLAGS := /t /mx /m /w-res /w-mcp /D__FLAT__ /DSTDCALL_MANGLE /iINCLUDE /i$(SCITECH)\INCLUDE
- GAS := gcc
- GAS_FLAGS := -D__WATCOMC__ -D__SW_3S -D__SW_S -U__GNUC__ -UDJGPP -U__unix__ -Wall -I. -I$(SCITECH)\include -x assembler-with-cpp
-.ENDIF
- LD := wlink
- LDFLAGS =
-.IF $(USE_OS232)
- RC := rc
-.ELSE
- RC := wrc
-.ENDIF
-.IF $(USE_WIN32)
- RCFLAGS := -q /bt=nt
-.ELIF $(USE_OS232)
-.IF $(USE_OS2GUI)
- CFLAGS += -D__OS2_PM__
-.ENDIF
-.ELSE
- RCFLAGS := -q
-.ENDIF
- LIB := wlib
- LIBFLAGS := -q
- ILIB := wlib
- ILIBFLAGS := -c
- INTEL_X86 := 1
-
-# Set the compiler warning level
-.IF $(MAX_WARN)
- CFLAGS += -w4
-.ELSE
- CFLAGS += -w1
-.ENDIF
-
-# Optionally turn on debugging information (Codeview format)
-.IF $(DBG)
-.IF $(USE_WIN32)
-.IF $(USE_CODEVIEW)
- CFLAGS += -d2 -hc
- LDFLAGS += D CODEVIEW OPT CVPACK
-.ELSE
- CFLAGS += -d2
- LDFLAGS += D A
-.ENDIF
-.ELSE
- CFLAGS += -d2
- LDFLAGS += D A
-.ENDIF
- LIBFLAGS += -p=768
-.IF $(USE_NASM)
- ASFLAGS += -F borland -g
-.ELSE
-.IF $(USE_TASM32)
- ASFLAGS += /q # TASM32 fucks up Watcom C++ debug info
-.ELIF $(OS2_SHELL)
- ASFLAGS += /q # TASM for OS/2 fucks up Watcom C++ debug info
-.ELSE
- ASFLAGS += /zi
-.ENDIF
-.ENDIF
-.ELSE
-.IF $(USE_NASM)
- ASFLAGS += -F null
-.ELSE
- ASFLAGS += /q
-.ENDIF
-.END
-
-# Optionally turn on optimisations (with or without stack conventions)
-.IF $(STKCALL)
-.IF $(OPT)
- CFLAGS += -onatx-5s-fp5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5s-fp5
-.ELIF $(NOOPT)
- CFLAGS += -od-5s
-.ELSE
- CFLAGS += -3s
-.END
-.ELSE
-.IF $(OPT)
- CFLAGS += -onatx-5r-fp5
-.ELIF $(OPT_SIZE)
- CFLAGS += -onaslmr-5r-fp5
-.ELIF $(NOOPT)
- CFLAGS += -od-5r
-.END
-.END
-
-# Optionally turn on direct i387 FPU instructions optimised for Pentium
-.IF $(FPU)
- CFLAGS += -DFPU387
- ASFLAGS += -dFPU387
-.END
-
-# Optionally compile a beta release version of a product
-.IF $(BETA)
- CFLAGS += -DBETA
- ASFLAGS += -dBETA
-.END
-
-.IF $(USE_TNT) # Use Phar Lap's TNT DOS Extender
- CFLAGS += -bt=nt -DTNT
- ASFLAGS += -dTNT
- LDFLAGS += SYS NT OP STUB=GOTNT.EXE
- LIB_OS = DOS32
-.ELIF $(USE_X32VM) # Use FlashTek X-32VM DOS extender
- CFLAGS += -bt=dos
- LDFLAGS += SYS X32RV
- DX_CFLAGS += -DX32VM
- DX_ASFLAGS += -dX32VM
- LIB_OS = DOS32
-.ELIF $(USE_X32) # Use FlashTek X-32 DOS extender
- CFLAGS += -bt=dos
- LDFLAGS += SYS X32R
- DX_CFLAGS += -DX32VM
- DX_ASFLAGS += -dX32VM
- LIB_OS = DOS32
-.ELIF $(USE_QNX4) # Build QNX 4 app
- CFLAGS += -bt=qnx386
- LDFLAGS += SYS QNX386FLAT OP CASEEXACT OP OFFSET=40k OP STACK=32k
- CFLAGS += -D__QNX__ -D__UNIX__
- ASFLAGS += -d__QNX__ -d__UNIX__
- LIB_OS = QNX4
-.ELIF $(USE_OS232)
-.IF $(BUILD_DLL)
- CFLAGS += -bm-bd-bt=os2-sg-DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bm-bt=os2-sg
-.ENDIF
- DX_ASFLAGS += -d__OS2__
- LIB_OS = os232
-.ELIF $(USE_SNAP) # Build 32 bit Snap app
-.IF $(BUILD_DLL)
- CFLAGS += -bm-bd-bt=nt-DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bm-bt=nt-D_WIN32
-.ENDIF
- LDFLAGS += OP nodefaultlibs
-.IF $(STKCALL)
- DEFLIBS := clib3s.lib,math3s.lib,noemu387.lib,
-.ELSE
- DEFLIBS := clib3r.lib,math3r.lib,noemu387.lib,
-.ENDIF
- LIB_OS = SNAP
-.ELIF $(USE_WIN32) # Build 32 bit Windows NT app
-.IF $(WIN32_GUI)
-.ELSE
- CFLAGS += -D__CONSOLE__
-.ENDIF
-.IF $(BUILD_DLL)
- CFLAGS += -bm-bd-bt=nt-sg-DBUILD_DLL -D_WIN32
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bm-bt=nt-sg-D_WIN32
-.ENDIF
- DX_ASFLAGS += -d__WINDOWS32__
- LIB_OS = WIN32
- DEFLIBS := kernel32.lib,user32.lib,gdi32.lib,advapi32.lib,shell32.lib,winmm.lib,comdlg32.lib,comctl32.lib,ole32.lib,oleaut32.lib,version.lib,winspool.lib,uuid.lib,wsock32.lib,rpcrt4.lib,
-.ELIF $(USE_WIN386) # Build 32 bit Win386 extended app
-.IF $(BUILD_DLL)
- CFLAGS += -bd-bt=windows-DBUILD_DLL
- ASFLAGS += -dBUILD_DLL
-.ELSE
- CFLAGS += -bt=windows
-.ENDIF
- DX_ASFLAGS += -d__WIN386__
- LIB_OS = WIN386
-.ELIF $(USE_PMODEW) # PMODE/W
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS PMODEW
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.ELIF $(USE_CAUSEWAY) # Causeway
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS CAUSEWAY
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.ELIF $(USE_DOS32A) # DOS32/A
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS DOS32A
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.ELSE # Use DOS4GW
- CFLAGS += -bt=dos
- USE_DOS4GW := 1
- USE_REALDOS := 1
- LDFLAGS += SYS DOS4G
- DX_CFLAGS += -DDOS4GW
- DX_ASFLAGS += -dDOS4GW
- LIB_OS = DOS32
-.END
-
-# Disable linking to default C runtime library and PM library
-
-.IF $(NO_RUNTIME)
-LDFLAGS += OP nodefaultlibs
-DEFLIBS :=
-.ELSE
-
-# Place to look for PM library files
-
-.IF $(USE_SNAP) # Build 32 bit Snap app or dll
-PMLIB :=
-.ELIF $(USE_WIN32)
-.IF $(STKCALL)
-PMLIB := spm.lib,
-.ELSE
-PMLIB := pm.lib,
-.ENDIF
-.ELIF $(USE_OS232)
-.IF $(STKCALL)
-.IF $(USE_OS2GUI)
-PMLIB := spm_pm.lib,
-.ELSE
-PMLIB := spm.lib,
-.ENDIF
-.ELSE
-.IF $(USE_OS2GUI)
-PMLIB := pm_pm.lib,
-.ELSE
-PMLIB := pm.lib,
-.ENDIF
-.ENDIF
-.ELIF $(USE_QNX4)
-.IF $(STKCALL)
-PMLIB := libspm.a,
-.ELSE
-PMLIB := libpm.a,
-.ENDIF
-.ELIF $(USE_TNT)
-.IF $(STKCALL)
-PMLIB := tnt\spm.lib,
-.ELSE
-PMLIB := tnt\pm.lib,
-.ENDIF
-.ELIF $(USE_X32)
-.IF $(STKCALL)
-PMLIB := x32\spm.lib,
-.ELSE
-PMLIB := x32\pm.lib,
-.ENDIF
-.ELSE
-.IF $(STKCALL)
-PMLIB := dos4gw\spm.lib,
-.ELSE
-PMLIB := dos4gw\pm.lib,
-.ENDIF
-.ENDIF
-.ENDIF
-
-# Define the base directory for library files
-
-.IF $(CHECKED)
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\debug
-CFLAGS += -DCHECKED=1
-.ELSE
-LIB_BASE_DIR := $(SCITECH_LIB)\lib\release
-.ENDIF
-
-# Define where to install library files
- LIB_BASE := $(LIB_BASE_DIR)\$(LIB_OS)\$(WC_LIBBASE)
- LIB_DEST := $(LIB_BASE)
-
- LDFLAGS += op map
-
-# Define which file contains our rules
-
- RULES_MAK := wc32.mk
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c b/board/MAI/bios_emulator/scitech/src/biosemu/besys.c
deleted file mode 100644
index 1512ce9..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c
+++ /dev/null
@@ -1,408 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes BIOS emulator I/O and memory access
-* functions.
-*
-****************************************************************************/
-
-#include "biosemui.h"
-
-/*------------------------------- Macros ----------------------------------*/
-
-/* Macros to read and write values to x86 bus memory. Replace these as
- * necessary if you need to do something special to access memory over
- * the bus on a particular processor family.
- */
-
-#define readb(base,off) *((u8*)((u32)(base) + (off)))
-#define readw(base,off) *((u16*)((u32)(base) + (off)))
-#define readl(base,off) *((u32*)((u32)(base) + (off)))
-#define writeb(v,base,off) *((u8*)((u32)(base) + (off))) = (v)
-#define writew(v,base,off) *((u16*)((u32)(base) + (off))) = (v)
-#define writel(v,base,off) *((u32*)((u32)(base) + (off))) = (v)
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef DEBUG
-# define DEBUG_MEM() (M.x86.debug & DEBUG_MEM_TRACE_F)
-#else
-# define DEBUG_MEM()
-#endif
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Byte value read from emulator memory.
-
-REMARKS:
-Reads a byte value from the emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-u8 X86API BE_rdb(
- u32 addr)
-{
- u8 val = 0;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
- val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
- val = readb(_BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size - 1) {
-DB( printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
- val = *(u8*)(M.mem_base + addr);
- }
-DB( if (DEBUG_MEM())
- printk("%#08x 1 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Word value read from emulator memory.
-
-REMARKS:
-Reads a word value from the emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-u16 X86API BE_rdw(
- u32 addr)
-{
- u16 val = 0;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xC0000;
- val = ( *(u8*)(_BE_env.biosmem_base + addr) |
- (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8));
- }
- else
-#endif
- val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xA0000;
- val = ( readb(_BE_env.busmem_base, addr) |
- (readb(_BE_env.busmem_base, addr + 1) << 8));
- }
- else
-#endif
- val = readw(_BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size - 2) {
-DB( printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- val = ( *(u8*)(M.mem_base + addr) |
- (*(u8*)(M.mem_base + addr + 1) << 8));
- }
- else
-#endif
- val = *(u16*)(M.mem_base + addr);
- }
-DB( if (DEBUG_MEM())
- printk("%#08x 2 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Long value read from emulator memory.
-
-REMARKS:
-Reads a long value from the emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-u32 X86API BE_rdl(
- u32 addr)
-{
- u32 val = 0;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- addr -= 0xC0000;
- val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) |
- (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) |
- (*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) |
- (*(u8*)(_BE_env.biosmem_base + addr + 3) << 24));
- }
- else
-#endif
- val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- addr -= 0xA0000;
- val = ( readb(_BE_env.busmem_base, addr) |
- (readb(_BE_env.busmem_base, addr + 1) << 8) |
- (readb(_BE_env.busmem_base, addr + 2) << 16) |
- (readb(_BE_env.busmem_base, addr + 3) << 24));
- }
- else
-#endif
- val = readl(_BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size - 4) {
-DB( printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- val = ( *(u8*)(M.mem_base + addr + 0) |
- (*(u8*)(M.mem_base + addr + 1) << 8) |
- (*(u8*)(M.mem_base + addr + 2) << 16) |
- (*(u8*)(M.mem_base + addr + 3) << 24));
- }
- else
-#endif
- val = *(u32*)(M.mem_base + addr);
- }
-DB( if (DEBUG_MEM())
- printk("%#08x 4 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a byte value to emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-void X86API BE_wrb(
- u32 addr,
- u8 val)
-{
-DB( if (DEBUG_MEM())
- printk("%#08x 1 <- %#x\n", addr, val);)
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
- *(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
- writeb(val, _BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size-1) {
-DB( printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
- *(u8*)(M.mem_base + addr) = val;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a word value to emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-void X86API BE_wrw(
- u32 addr,
- u16 val)
-{
-DB( if (DEBUG_MEM())
- printk("%#08x 2 <- %#x\n", addr, val);)
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xC0000;
- *(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff;
- }
- else
-#endif
- *(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val;
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xA0000;
- writeb(val >> 0, _BE_env.busmem_base, addr);
- writeb(val >> 8, _BE_env.busmem_base, addr + 1);
- }
- else
-#endif
- writew(val, _BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size-2) {
-DB( printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- }
- else
-#endif
- *(u16*)(M.mem_base + addr) = val;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a long value to emulator memory. We have three distinct memory
-regions that are handled differently, which this function handles.
-****************************************************************************/
-void X86API BE_wrl(
- u32 addr,
- u32 val)
-{
-DB( if (DEBUG_MEM())
- printk("%#08x 4 <- %#x\n", addr, val);)
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- addr -= 0xC0000;
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
- }
- else
-#endif
- *(u32*)(M.mem_base + addr - 0xC0000) = val;
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- addr -= 0xA0000;
- writeb(val >> 0, _BE_env.busmem_base, addr);
- writeb(val >> 8, _BE_env.busmem_base, addr + 1);
- writeb(val >> 16, _BE_env.busmem_base, addr + 1);
- writeb(val >> 24, _BE_env.busmem_base, addr + 1);
- }
- else
-#endif
- writel(val, _BE_env.busmem_base, addr - 0xA0000);
- }
- else if (addr > M.mem_size-4) {
-DB( printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- else {
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
- }
- else
-#endif
- *(u32*)(M.mem_base + addr) = val;
- }
-}
-
-/* Debug functions to do ISA/PCI bus port I/O */
-
-#ifdef DEBUG
-#define DEBUG_IO() (M.x86.debug & DEBUG_IO_TRACE_F)
-
-u8 X86API BE_inb(int port)
-{
- u8 val = PM_inpb(port);
- if (DEBUG_IO())
- printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- return val;
-}
-
-u16 X86API BE_inw(int port)
-{
- u16 val = PM_inpw(port);
- if (DEBUG_IO())
- printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- return val;
-}
-
-u32 X86API BE_inl(int port)
-{
- u32 val = PM_inpd(port);
- if (DEBUG_IO())
- printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- return val;
-}
-
-void X86API BE_outb(int port, u8 val)
-{
- if (DEBUG_IO())
- printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- PM_outpb(port,val);
-}
-
-void X86API BE_outw(int port, u16 val)
-{
- if (DEBUG_IO())
- printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- PM_outpw(port,val);
-}
-
-void X86API BE_outl(int port, u32 val)
-{
- if (DEBUG_IO())
- printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val);
- PM_outpd(port,val);
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c b/board/MAI/bios_emulator/scitech/src/biosemu/bios.c
deleted file mode 100644
index c0f4a4b..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Module implementing the BIOS specific functions.
-*
-****************************************************************************/
-
-#include "biosemui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-Handler for undefined interrupts.
-****************************************************************************/
-static void X86API undefined_intr(
- int intno)
-{
- if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
- printk("biosEmu: undefined interrupt %xh called!\n",intno);
- else
- X86EMU_prepareForInt(intno);
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-This function handles the default system BIOS Int 10h (the default is stored
-in the Int 42h vector by the system BIOS at bootup). We only need to handle
-a small number of special functions used by the BIOS during POST time.
-****************************************************************************/
-static void X86API int42(
- int intno)
-{
- if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
- if (M.x86.R_AL == 0) {
- /* Enable CPU accesses to video memory */
- PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02);
- return;
- }
- else if (M.x86.R_AL == 1) {
- /* Disable CPU accesses to video memory */
- PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02);
- return;
- }
-#ifdef DEBUG
- else {
- printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL);
- }
-#endif
- }
-#ifdef DEBUG
- else {
- printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
- }
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-This function handles the default system BIOS Int 10h. If the POST code
-has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
-by simply calling the int42 interrupt handler above. Very early in the
-BIOS POST process, the vector gets replaced and we simply let the real
-mode interrupt handler process the interrupt.
-****************************************************************************/
-static void X86API int10(
- int intno)
-{
- if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
- int42(intno);
- else
- X86EMU_prepareForInt(intno);
-}
-
-/* Result codes returned by the PCI BIOS */
-
-#define SUCCESSFUL 0x00
-#define FUNC_NOT_SUPPORT 0x81
-#define BAD_VENDOR_ID 0x83
-#define DEVICE_NOT_FOUND 0x86
-#define BAD_REGISTER_NUMBER 0x87
-#define SET_FAILED 0x88
-#define BUFFER_TOO_SMALL 0x89
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number being serviced
-
-REMARKS:
-This function handles the default Int 1Ah interrupt handler for the real
-mode code, which provides support for the PCI BIOS functions. Since we only
-want to allow the real mode BIOS code *only* see the PCI config space for
-its own device, we only return information for the specific PCI config
-space that we have passed in to the init function. This solves problems
-when using the BIOS to warm boot a secondary adapter when there is an
-identical adapter before it on the bus (some BIOS'es get confused in this
-case).
-****************************************************************************/
-static void X86API int1A(
- unused)
-{
- u16 pciSlot;
-
- /* Fail if no PCI device information has been registered */
- if (!_BE_env.vgaInfo.pciInfo)
- return;
- pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8);
- switch (M.x86.R_AX) {
- case 0xB101: /* PCI bios present? */
- M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
- M.x86.R_EDX = 0x20494350; /* " ICP" */
- M.x86.R_BX = 0x0210; /* Version 2.10 */
- M.x86.R_CL = 0; /* Max bus number in system */
- CLEAR_FLAG(F_CF);
- break;
- case 0xB102: /* Find PCI device */
- M.x86.R_AH = DEVICE_NOT_FOUND;
- if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
- M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
- M.x86.R_SI == 0) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_BX = pciSlot;
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB103: /* Find PCI class code */
- M.x86.R_AH = DEVICE_NOT_FOUND;
- if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
- M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
- (u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_BX = pciSlot;
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB108: /* Read configuration byte */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB109: /* Read configuration word */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10A: /* Read configuration dword */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10B: /* Write configuration byte */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10C: /* Write configuration word */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- case 0xB10D: /* Write configuration dword */
- M.x86.R_AH = BAD_REGISTER_NUMBER;
- if (M.x86.R_BX == pciSlot) {
- M.x86.R_AH = SUCCESSFUL;
- PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo);
- }
- CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
- break;
- default:
- printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the BIOS emulation functions for the specific
-PCI display device. We insulate the real mode BIOS from any other devices
-on the bus, so that it will work correctly thinking that it is the only
-device present on the bus (ie: avoiding any adapters present in from of
-the device we are trying to control).
-****************************************************************************/
-void _BE_bios_init(
- u32 *intrTab)
-{
- int i;
- X86EMU_intrFuncs bios_intr_tab[256];
-
- for (i = 0; i < 256; ++i) {
- intrTab[i] = BIOS_SEG << 16;
- bios_intr_tab[i] = undefined_intr;
- }
- bios_intr_tab[0x10] = int10;
- bios_intr_tab[0x1A] = int1A;
- bios_intr_tab[0x42] = int42;
- X86EMU_setupIntrFuncs(bios_intr_tab);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c b/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
deleted file mode 100644
index 0052709..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c
+++ /dev/null
@@ -1,445 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Module implementing the system specific functions. This
-* module is always compiled and linked in the OS depedent
-* libraries, and never in a binary portable driver.
-*
-****************************************************************************/
-
-#include "biosemui.h"
-#include <string.h>
-#include <stdlib.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-BE_sysEnv _BE_env;
-#ifdef __DRIVER__
-PM_imports _VARAPI _PM_imports;
-#endif
-static X86EMU_memFuncs _BE_mem = {
- BE_rdb,
- BE_rdw,
- BE_rdl,
- BE_wrb,
- BE_wrw,
- BE_wrl,
- };
-#ifdef DEBUG
-static X86EMU_pioFuncs _BE_pio = {
- BE_inb,
- BE_inw,
- BE_inl,
- BE_outb,
- BE_outw,
- BE_outl,
- };
-#else
-static X86EMU_pioFuncs _BE_pio = {
- (void*)PM_inpb,
- (void*)PM_inpw,
- (void*)PM_inpd,
- (void*)PM_outpb,
- (void*)PM_outpw,
- (void*)PM_outpd,
- };
-#endif
-
-/*-------------------------- Implementation -------------------------------*/
-
-#define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
-#define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
-
-/****************************************************************************
-PARAMETERS:
-debugFlags - Flags to enable debugging options (debug builds only)
-memSize - Amount of memory to allocate for real mode machine
-info - Pointer to default VGA device information
-
-REMARKS:
-This functions initialises the BElib, and uses the passed in
-BIOS image as the BIOS that is used and emulated at 0xC0000.
-****************************************************************************/
-ibool PMAPI BE_init(
- u32 debugFlags,
- int memSize,
- BE_VGAInfo *info)
-{
-#ifndef __DRIVER__
- PM_init();
-#endif
- memset(&M,0,sizeof(M));
- if (memSize < 20480)
- PM_fatalError("Emulator requires at least 20Kb of memory!\n");
- if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL)
- PM_fatalError("Out of memory!");
- M.mem_size = memSize;
- _BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true);
- M.x86.debug = debugFlags;
- _BE_bios_init((u32*)info->LowMem);
- X86EMU_setupMemFuncs(&_BE_mem);
- X86EMU_setupPioFuncs(&_BE_pio);
- BE_setVGA(info);
- return true;
-}
-
-/****************************************************************************
-PARAMETERS:
-debugFlags - Flags to enable debugging options (debug builds only)
-
-REMARKS:
-This function allows the application to enable logging and debug flags
-on a function call basis, so we can specifically enable logging only
-for specific functions that are causing problems in debug mode.
-****************************************************************************/
-void PMAPI BE_setDebugFlags(
- u32 debugFlags)
-{
- M.x86.debug = debugFlags;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Pointer to VGA device information to make current
-
-REMARKS:
-This function sets the VGA BIOS functions in the emulator to point to the
-specific VGA BIOS in use. This includes swapping the BIOS interrupt
-vectors, BIOS image and BIOS data area to the new BIOS. This allows the
-real mode BIOS to be swapped without resetting the entire emulator.
-****************************************************************************/
-void PMAPI BE_setVGA(
- BE_VGAInfo *info)
-{
- _BE_env.vgaInfo.pciInfo = info->pciInfo;
- _BE_env.vgaInfo.BIOSImage = info->BIOSImage;
- if (info->BIOSImage) {
- _BE_env.biosmem_base = (ulong)info->BIOSImage;
- _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1;
- }
- else {
- _BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
- _BE_env.biosmem_limit = 0xC7FFF;
- }
- if (*((u32*)info->LowMem) == 0)
- _BE_bios_init((u32*)info->LowMem);
- memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem));
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Pointer to VGA device information to retrieve current
-
-REMARKS:
-This function returns the VGA BIOS functions currently active in the
-emulator, so they can be restored at a later date.
-****************************************************************************/
-void PMAPI BE_getVGA(
- BE_VGAInfo *info)
-{
- info->pciInfo = _BE_env.vgaInfo.pciInfo;
- info->BIOSImage = _BE_env.vgaInfo.BIOSImage;
- memcpy(info->LowMem,(u8*)M.mem_base,sizeof(info->LowMem));
-}
-
-/****************************************************************************
-PARAMETERS:
-r_seg - Segment for pointer to convert
-r_off - Offset for pointer to convert
-
-REMARKS:
-This function maps a real mode pointer in the emulator memory to a protected
-mode pointer that can be used to directly access the memory.
-
-NOTE: The memory is *always* in little endian format, son on non-x86
- systems you will need to do endian translations to access this
- memory.
-****************************************************************************/
-void * PMAPI BE_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- u32 addr = ((u32)r_seg << 4) + r_off;
-
- if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
- return (void*)(_BE_env.biosmem_base + addr - 0xC0000);
- }
- else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
- return (void*)(_BE_env.busmem_base + addr - 0xA0000);
- }
- return (void*)(M.mem_base + addr);
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Return the length of the VESA buffer
-rseg - Place to store VESA buffer segment
-roff - Place to store VESA buffer offset
-
-REMARKS:
-This function returns the address of the VESA transfer buffer in real
-mode emulator memory. The VESA transfer buffer is always 1024 bytes long,
-and located at 15Kb into the start of the real mode memory (16Kb is where
-we put the real mode code we execute for issuing interrupts).
-
-NOTE: The memory is *always* in little endian format, son on non-x86
- systems you will need to do endian translations to access this
- memory.
-****************************************************************************/
-void * PMAPI BE_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- *len = 1024;
- *rseg = SEG(0x03C00);
- *roff = OFF(0x03C00);
- return (void*)(M.mem_base + ((u32)*rseg << 4) + *roff);
-}
-
-/****************************************************************************
-REMARKS:
-Cleans up and exits the emulator.
-****************************************************************************/
-void PMAPI BE_exit(void)
-{
- free((void*)M.mem_base);
- PM_freePhysicalAddr((void*)_BE_env.busmem_base,0x5FFFF);
-}
-
-/****************************************************************************
-PARAMETERS:
-seg - Segment of code to call
-off - Offset of code to call
-regs - Real mode registers to load
-sregs - Real mode segment registers to load
-
-REMARKS:
-This functions calls a real mode far function at the specified address,
-and loads all the x86 registers from the passed in registers structure.
-On exit the registers returned from the call are returned in the same
-structures.
-****************************************************************************/
-void PMAPI BE_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- M.x86.R_EAX = regs->e.eax;
- M.x86.R_EBX = regs->e.ebx;
- M.x86.R_ECX = regs->e.ecx;
- M.x86.R_EDX = regs->e.edx;
- M.x86.R_ESI = regs->e.esi;
- M.x86.R_EDI = regs->e.edi;
- M.x86.R_DS = sregs->ds;
- M.x86.R_ES = sregs->es;
- M.x86.R_FS = sregs->fs;
- M.x86.R_GS = sregs->gs;
- M.x86.R_CS = (u16)seg;
- M.x86.R_IP = (u16)off;
- M.x86.R_SS = SEG(M.mem_size - 1);
- M.x86.R_SP = OFF(M.mem_size - 1);
- X86EMU_exec();
- regs->e.cflag = M.x86.R_EFLG & F_CF;
- regs->e.eax = M.x86.R_EAX;
- regs->e.ebx = M.x86.R_EBX;
- regs->e.ecx = M.x86.R_ECX;
- regs->e.edx = M.x86.R_EDX;
- regs->e.esi = M.x86.R_ESI;
- regs->e.edi = M.x86.R_EDI;
- sregs->ds = M.x86.R_DS;
- sregs->es = M.x86.R_ES;
- sregs->fs = M.x86.R_FS;
- sregs->gs = M.x86.R_GS;
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number to execute
-in - Real mode registers to load
-out - Place to store resulting real mode registers
-
-REMARKS:
-This functions calls a real mode interrupt function at the specified address,
-and loads all the x86 registers from the passed in registers structure.
-On exit the registers returned from the call are returned in out stucture.
-****************************************************************************/
-int PMAPI BE_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- M.x86.R_EAX = in->e.eax;
- M.x86.R_EBX = in->e.ebx;
- M.x86.R_ECX = in->e.ecx;
- M.x86.R_EDX = in->e.edx;
- M.x86.R_ESI = in->e.esi;
- M.x86.R_EDI = in->e.edi;
- ((u8*)M.mem_base)[0x4000] = 0xCD;
- ((u8*)M.mem_base)[0x4001] = (u8)intno;
- ((u8*)M.mem_base)[0x4002] = 0xC3;
- M.x86.R_CS = SEG(0x04000);
- M.x86.R_IP = OFF(0x04000);
- M.x86.R_SS = SEG(M.mem_size - 1);
- M.x86.R_SP = OFF(M.mem_size - 1);
- X86EMU_exec();
- out->e.cflag = M.x86.R_EFLG & F_CF;
- out->e.eax = M.x86.R_EAX;
- out->e.ebx = M.x86.R_EBX;
- out->e.ecx = M.x86.R_ECX;
- out->e.edx = M.x86.R_EDX;
- out->e.esi = M.x86.R_ESI;
- out->e.edi = M.x86.R_EDI;
- return out->x.ax;
-}
-
-/****************************************************************************
-PARAMETERS:
-intno - Interrupt number to execute
-in - Real mode registers to load
-out - Place to store resulting real mode registers
-sregs - Real mode segment registers to load
-
-REMARKS:
-This functions calls a real mode interrupt function at the specified address,
-and loads all the x86 registers from the passed in registers structure.
-On exit the registers returned from the call are returned in out stucture.
-****************************************************************************/
-int PMAPI BE_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- M.x86.R_EAX = in->e.eax;
- M.x86.R_EBX = in->e.ebx;
- M.x86.R_ECX = in->e.ecx;
- M.x86.R_EDX = in->e.edx;
- M.x86.R_ESI = in->e.esi;
- M.x86.R_EDI = in->e.edi;
- M.x86.R_DS = sregs->ds;
- M.x86.R_ES = sregs->es;
- M.x86.R_FS = sregs->fs;
- M.x86.R_GS = sregs->gs;
- ((u8*)M.mem_base)[0x4000] = 0xCD;
- ((u8*)M.mem_base)[0x4001] = (u8)intno;
- ((u8*)M.mem_base)[0x4002] = 0xC3;
- M.x86.R_CS = SEG(0x04000);
- M.x86.R_IP = OFF(0x04000);
- M.x86.R_SS = SEG(M.mem_size - 1);
- M.x86.R_SP = OFF(M.mem_size - 1);
- X86EMU_exec();
- out->e.cflag = M.x86.R_EFLG & F_CF;
- out->e.eax = M.x86.R_EAX;
- out->e.ebx = M.x86.R_EBX;
- out->e.ecx = M.x86.R_ECX;
- out->e.edx = M.x86.R_EDX;
- out->e.esi = M.x86.R_ESI;
- out->e.edi = M.x86.R_EDI;
- sregs->ds = M.x86.R_DS;
- sregs->es = M.x86.R_ES;
- sregs->fs = M.x86.R_FS;
- sregs->gs = M.x86.R_GS;
- return out->x.ax;
-}
-
-#ifdef __DRIVER__
-
-/****************************************************************************
-REMARKS:
-Empty log function for binary portable DLL. The BPD is compiled without
-debug information, so very little is logged anyway so it is simpler this
-way.
-****************************************************************************/
-void printk(const char *msg, ...)
-{
-}
-
-/****************************************************************************
-REMARKS:
-Fatal error handler called when a non-imported function is called by the
-driver. We leave this to a runtime error so that older applications and
-shell drivers will work with newer bpd drivers provided no newer functions
-are required by the driver itself. If they are, the application or shell
-driver needs to be recompiled.
-****************************************************************************/
-static void _PM_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported PM_imports import function called! Please re-compile!\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-beImp - BE library imports
-beImp - Generic emulator imports
-
-RETURNS:
-Pointer to exported function list
-
-REMARKS:
-This function initialises the BIOS emulator library and returns the list of
-loader library exported functions.
-{secret}
-****************************************************************************/
-BE_exports * _CEXPORT BE_initLibrary(
- PM_imports *pmImp)
-{
- static BE_exports _BE_exports = {
- sizeof(BE_exports),
- BE_init,
- BE_setVGA,
- BE_getVGA,
- BE_mapRealPointer,
- BE_getVESABuf,
- BE_callRealMode,
- BE_int86,
- BE_int86x,
- NULL,
- BE_exit,
- };
- int i,max;
- ulong *p;
-
- /* Initialize all default imports to point to fatal error handler */
- /* for upwards compatibility. */
- max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t);
- for (i = 0,p = (ulong*)&_PM_imports; i < max; i++)
- *p++ = (ulong)_PM_fatalErrorHandler;
-
- /* Now copy all our imported functions */
- memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize));
- return &_BE_exports;
-}
-
-#endif /* __DRIVER__ */
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/biosemui.h b/board/MAI/bios_emulator/scitech/src/biosemu/biosemui.h
deleted file mode 100644
index 23edebc..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/biosemui.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Internal header file for the BIOS emulator library.
-*
-****************************************************************************/
-
-#ifndef __BIOSEMUI_H
-#define __BIOSEMUI_H
-
-#include <biosemu.h>
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#ifdef DEBUG
-#define DB(x) x
-#else
-#define DB(x)
-#endif
-
-#define BIOS_SEG 0xfff0
-
-#define M _X86EMU_env
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-/* bios.c */
-
-void _BE_bios_init(u32 *intrTab);
-void _BE_setup_funcs(void);
-
-/* besys.c */
-
-u8 X86API BE_rdb(u32 addr);
-u16 X86API BE_rdw(u32 addr);
-u32 X86API BE_rdl(u32 addr);
-void X86API BE_wrb(u32 addr,u8 val);
-void X86API BE_wrw(u32 addr,u16 val);
-void X86API BE_wrl(u32 addr,u32 val);
-#ifdef DEBUG
-u8 X86API BE_inb(int port);
-u16 X86API BE_inw(int port);
-u32 X86API BE_inl(int port);
-void X86API BE_outb(int port, u8 val);
-void X86API BE_outw(int port, u16 val);
-void X86API BE_outl(int port, u32 val);
-#endif
-
-#endif /* __BIOSEMUI_H */
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/makefile b/board/MAI/bios_emulator/scitech/src/biosemu/makefile
deleted file mode 100644
index 80730b2..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/makefile
+++ /dev/null
@@ -1,99 +0,0 @@
-#############################################################################
-#
-# BIOS emulator and interface
-# to Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Generic makefile for the x86emu library. Requires
-# the SciTech Software makefile definitions package to be
-# installed, which uses the DMAKE make program.
-#
-#############################################################################
-
-.IMPORT .IGNORE: DEBUG
-
-#----------------------------------------------------------------------------
-# Define the lists of object files
-#----------------------------------------------------------------------------
-
-DLL_OBJS = dllstart$O _pm_imp$O
-BIOS_OBJS = biosemu$O bios$O besys$O
-X86_OBJS = sys$O decode$O ops$O ops2$O prim_ops$O fpu$O debug$O
-CFLAGS += -DSCITECH -I$(SCITECH)\src\x86emu
-
-.IF $(BUILD_DLL)
-
-CFLAGS += -I$(PRIVATE)\include\drvlib -I$(SCITECH)\include\drvlib -D__DRIVER__
-ASFLAGS += -d__DRIVER__
-EXELIBS = drvlib$L
-
-.ELSE
-
-.IF $(DEBUG)
-CFLAGS += -DDEBUG
-.ENDIF
-OBJECTS = $(BIOS_OBJS) $(X86_OBJS)
-LIBCLEAN = *.dll *.lib *.a
-LIBFILE = $(LP)biosemu$L
-
-.ENDIF
-
-#----------------------------------------------------------------------------
-# Sample test programs
-#----------------------------------------------------------------------------
-
-all: $(LIBFILE) warmboot$E
-
-warmboot$E: warmboot$O $(LIBFILE)
-
-#----------------------------------------------------------------------------
-# Target to build the Binary Portable DLL target
-#----------------------------------------------------------------------------
-
-biosemu.dll: $(DLL_OBJS) $(BIOS_OBJS) $(X86_OBJS)
-
-#----------------------------------------------------------------------------
-# Target to build all Intel binary drivers
-#----------------------------------------------------------------------------
-
-.PHONY mkdrv:
- @build wc11-w32 biosemu.dll -u BUILD_DLL=1 NO_RUNTIME=1 OPT=1
- @$(CP) biosemu.dll $(PRIVATE)\nucleus\graphics\biosemu.bpd
- @dmake cleanexe
-
-.PHONY db:
- @build wc11-w32 biosemu.dll BUILD_DLL=1 NO_RUNTIME=1 OPT=1
- @$(CP) biosemu.dll $(PRIVATE)\nucleus\graphics\biosemu.bpd
-
-#----------------------------------------------------------------------------
-# Define the list of object files to create dependency information for
-#----------------------------------------------------------------------------
-
-DEPEND_OBJ = warmboot$O $(BIOS_OBJS) $(X86_OBJS) $(DLL_OBJS)
-DEPEND_SRC = $(SCITECH)/src/x86emu;$(PRIVATE)/src/common
-.SOURCE: $(SCITECH)/src/x86emu $(PRIVATE)/src/common
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/makefile.cross b/board/MAI/bios_emulator/scitech/src/biosemu/makefile.cross
deleted file mode 100644
index 9141003..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/makefile.cross
+++ /dev/null
@@ -1,10 +0,0 @@
-CC = ppc-elf32-gcc
-AR = ppc-elf32-ar
-
-CFLAGS = -D__DRIVER__ -I../../include -DDEBUG -I.
-
-BIOS_OBJS = biosemu.o bios.o besys.o
-X86_OBJS = sys.o decode.o ops.o prim_ops.o fpu.o debug.o
-
-libbios.a: $(BIOS_OBJS)
- $(AR) rcs libbios.a $(BIOS_OBJS)
\ No newline at end of file
diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c b/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
deleted file mode 100644
index 98d5fb8..0000000
--- a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c
+++ /dev/null
@@ -1,569 +0,0 @@
-/****************************************************************************
-*
-* BIOS emulator and interface
-* to Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Module to implement warm booting of all PCI/AGP controllers
-* on the bus. We use the x86 real mode emulator to run the
-* BIOS on the primary and secondary controllers to bring
-* the cards up.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#include "biosemu.h"
-#ifndef _MAX_PATH
-#define _MAX_PATH 256
-#endif
-
-/*------------------------- Global Variables ------------------------------*/
-
-static PCIDeviceInfo PCI[MAX_PCI_DEVICES];
-static int NumPCI = -1;
-static int BridgeIndex[MAX_PCI_DEVICES] = {0};
-static int NumBridges;
-static PCIBridgeInfo *AGPBridge = NULL;
-static int DeviceIndex[MAX_PCI_DEVICES] = {0};
-static int NumDevices;
-static u32 debugFlags = 0;
-static BE_VGAInfo VGAInfo[MAX_PCI_DEVICES] = {{0}};
-static ibool useV86 = false;
-static ibool forcePost = false;
-
-/* Length of the BIOS image */
-
-#define MAX_BIOSLEN (64 * 1024L)
-#define FINAL_BIOSLEN (32 * 1024L)
-
-/* Macro to determine if the VGA is enabled and responding */
-
-#define VGA_NOT_ACTIVE() (forcePost || (PM_inpb(0x3CC) == 0xFF) || ((PM_inpb(0x3CC) & 0x2) == 0))
-
-#define ENABLE_DEVICE(device) \
- PCI_writePCIRegB(0x4,PCI[DeviceIndex[device]].Command | 0x7,device)
-
-#define DISABLE_DEVICE(device) \
- PCI_writePCIRegB(0x4,0,device)
-
-/* Macros to enable and disable AGP VGA resources */
-
-#define ENABLE_AGP_VGA() \
- PCI_accessReg(0x3E,AGPBridge->BridgeControl | 0x8,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)
-
-#define DISABLE_AGP_VGA() \
- PCI_accessReg(0x3E,AGPBridge->BridgeControl & ~0x8,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)
-
-#define RESTORE_AGP_VGA() \
- PCI_accessReg(0x3E,AGPBridge->BridgeControl,PCI_WRITE_WORD,(PCIDeviceInfo*)AGPBridge)
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-RETURNS:
-The address to use to map the secondary BIOS (PCI/AGP devices)
-
-REMARKS:
-Searches all the PCI base address registers for the device looking for a
-memory mapping that is large enough to hold our ROM BIOS. We usually end up
-finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
-to map the BIOS for the device into. We use a mapping that is already
-assigned to the device to ensure the memory range will be passed through
-by any PCI->PCI or AGP->PCI bridge that may be present.
-
-NOTE: Usually this function is only used for AGP devices, but it may be
- used for PCI devices that have already been POST'ed and the BIOS
- ROM base address has been zero'ed out.
-****************************************************************************/
-static ulong PCI_findBIOSAddr(
- int device)
-{
- ulong base,size;
- int bar;
-
- for (bar = 0x10; bar <= 0x14; bar++) {
- base = PCI_readPCIRegL(bar,device) & ~0xFF;
- if (!(base & 0x1)) {
- PCI_writePCIRegL(bar,0xFFFFFFFF,device);
- size = PCI_readPCIRegL(bar,device) & ~0xFF;
- size = ~size+1;
- PCI_writePCIRegL(bar,0,device);
- if (size >= MAX_BIOSLEN)
- return base;
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Re-writes the PCI base address registers for the secondary PCI controller
-with the values from our initial PCI bus enumeration. This fixes up the
-values after we have POST'ed the secondary display controller BIOS, which
-may have incorrectly re-programmed the base registers the same as the
-primary display controller (the case for identical S3 cards).
-****************************************************************************/
-static void _PCI_fixupSecondaryBARs(void)
-{
- int i;
-
- for (i = 0; i < NumDevices; i++) {
- PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i);
- PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i);
- PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i);
- PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i);
- PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i);
- PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i);
- }
-}
-
-/****************************************************************************
-RETURNS:
-True if successfully initialised, false if not.
-
-REMARKS:
-This function executes the BIOS POST code on the controller. We assume that
-at this stage the controller has its I/O and memory space enabled and
-that all other controllers are in a disabled state.
-****************************************************************************/
-static void PCI_doBIOSPOST(
- int device,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- /* Determine the value to store in AX for BIOS POST */
- regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8);
- if (useV86) {
- /* Post the BIOS using the PM functions (ie: v86 mode on Linux) */
- if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) {
- /* If the PM function fails, this probably means are we are on */
- /* DOS and can't re-map the real mode 0xC0000 region. In thise */
- /* case if the device is the primary, we can use the real */
- /* BIOS at 0xC0000 directly. */
- if (device == 0)
- PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen);
- }
- }
- else {
- /* Setup the X86 emulator for the VGA BIOS */
- BE_setVGA(&VGAInfo[device]);
-
- /* Execute the BIOS POST code */
- BE_callRealMode(0xC000,0x0003,®s,&sregs);
-
- /* Cleanup and exit */
- BE_getVGA(&VGAInfo[device]);
- }
-}
-
-/****************************************************************************
-RETURNS:
-True if successfully initialised, false if not.
-
-REMARKS:
-Loads and POST's the secondary controllers BIOS, directly from the BIOS
-image we can extract over the PCI bus.
-****************************************************************************/
-static ibool PCI_postControllers(void)
-{
- int device;
- ulong BIOSImageLen,mappedBIOSPhys;
- uchar *mappedBIOS,*copyOfBIOS;
- char filename[_MAX_PATH];
- FILE *f;
-
- /* Disable the primary display controller and AGP VGA pass-through */
- DISABLE_DEVICE(0);
- if (AGPBridge)
- DISABLE_AGP_VGA();
-
- /* Now POST all the secondary controllers */
- for (device = 0; device < NumDevices; device++) {
- /* Skip the device if it is not enabled (probably an ISA device) */
- if (DeviceIndex[device] == -1)
- continue;
-
- /* Enable secondary display controller. If the secondary controller */
- /* is on the AGP bus, then enable VGA resources for the AGP device. */
- ENABLE_DEVICE(device);
- if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus)
- ENABLE_AGP_VGA();
-
- /* Check if the controller has already been POST'ed */
- if (VGA_NOT_ACTIVE()) {
- /* Find a viable place to map the secondary PCI BIOS image and map it */
- printk("Device %d not enabled, so attempting warm boot it\n", device);
-
- /* For AGP devices (and PCI devices that do have the ROM base */
- /* address zero'ed out) we have to map the BIOS to a location */
- /* that is passed by the AGP bridge to the bus. Some AGP devices */
- /* have the ROM base address already set up for us, and some */
- /* do not (we map to one of the existing BAR locations in */
- /* this case). */
- mappedBIOS = NULL;
- if (PCI[DeviceIndex[device]].ROMBaseAddress != 0)
- mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF;
- else
- mappedBIOSPhys = PCI_findBIOSAddr(device);
- printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys);
- mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false);
- PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device);
- BIOSImageLen = mappedBIOS[2] * 512;
- if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL)
- return false;
- memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen);
- PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
-
- /* Allocate memory to store copy of BIOS from secondary controllers */
- VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
- VGAInfo[device].BIOSImage = copyOfBIOS;
- VGAInfo[device].BIOSImageLen = BIOSImageLen;
-
- /* Restore device mappings */
- PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device);
- PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device);
- PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device);
-
- /* Now execute the BIOS POST for the device */
- if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) {
- printk("Executing BIOS POST for controller.\n");
- PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen);
- }
-
- /* Reset the size of the BIOS image to the final size */
- VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
-
- /* Save the BIOS and interrupt vector information to disk */
- sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
- if ((f = fopen(filename,"wb")) != NULL) {
- fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f);
- fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
- fclose(f);
- }
- }
- else {
- /* Allocate memory to store copy of BIOS from secondary controllers */
- if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL)
- return false;
- VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]];
- VGAInfo[device].BIOSImage = copyOfBIOS;
- VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN;
-
- /* Load the BIOS and interrupt vector information from disk */
- sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device);
- if ((f = fopen(filename,"rb")) != NULL) {
- fread(copyOfBIOS,1,FINAL_BIOSLEN,f);
- fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f);
- fclose(f);
- }
- }
-
- /* Fix up all the secondary PCI base address registers */
- /* (restores them all from the values we read previously) */
- _PCI_fixupSecondaryBARs();
-
- /* Disable the secondary controller and AGP VGA pass-through */
- DISABLE_DEVICE(device);
- if (AGPBridge)
- DISABLE_AGP_VGA();
- }
-
- /* Reenable primary display controller and reset AGP bridge control */
- if (AGPBridge)
- RESTORE_AGP_VGA();
- ENABLE_DEVICE(0);
-
- /* Free physical BIOS image mapping */
- PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1);
-
- /* Restore the X86 emulator BIOS info to primary controller */
- if (!useV86)
- BE_setVGA(&VGAInfo[0]);
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Enumerates the PCI bus and dumps the PCI configuration information to the
-log file.
-****************************************************************************/
-static void EnumeratePCI(void)
-{
- int i,index;
- PCIBridgeInfo *info;
-
- printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
- NumPCI, NumDevices);
- for (index = 0; index < NumDevices; index++)
- printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
- printk("\n");
- printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
- PCI[i].slot.p.Bus,
- PCI[i].slot.p.Device,
- PCI[i].slot.p.Function,
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].SubSystemVendorID,
- PCI[i].SubSystemID,
- PCI[i].RevID,
- PCI[i].BaseClass,
- PCI[i].SubClass,
- PCI[i].InterruptLine,
- PCI[i].InterruptPin,
- PCI[i].Command);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%04X:%04X %04X %02X %02X %02X %02X %02X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].Status,
- PCI[i].Interface,
- PCI[i].CacheLineSize,
- PCI[i].LatencyTimer,
- PCI[i].HeaderType,
- PCI[i].BIST);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].BaseAddress10,
- PCI[i].BaseAddress14,
- PCI[i].BaseAddress18,
- PCI[i].BaseAddress1C,
- PCI[i].BaseAddress20,
- PCI[i].BaseAddress24,
- PCI[i].ROMBaseAddress);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
- for (i = 0; i < NumPCI; i++) {
- printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].BaseAddress10Len,
- PCI[i].BaseAddress14Len,
- PCI[i].BaseAddress18Len,
- PCI[i].BaseAddress1CLen,
- PCI[i].BaseAddress20Len,
- PCI[i].BaseAddress24Len,
- PCI[i].ROMBaseAddressLen);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printk("<- %d\n", index);
- else
- printk("\n");
- }
- printk("\n");
- printk("Displaying enumeration of %d bridge devices\n",NumBridges);
- printk("\n");
- printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
- for (i = 0; i < NumBridges; i++) {
- info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]];
- printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
- info->VendorID,
- info->DeviceID,
- info->PrimaryBusNumber,
- info->SecondayBusNumber,
- info->SubordinateBusNumber,
- ((u16)info->IOBase << 8) & 0xF000,
- info->IOLimit ?
- ((u16)info->IOLimit << 8) | 0xFFF : 0,
- ((u32)info->MemoryBase << 16) & 0xFFF00000,
- info->MemoryLimit ?
- ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0,
- ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000,
- info->PrefetchableMemoryLimit ?
- ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
- info->BridgeControl);
- }
- printk("\n");
-}
-
-/****************************************************************************
-RETURNS:
-Number of display devices found.
-
-REMARKS:
-This function enumerates the number of available display devices on the
-PCI bus, and returns the number found.
-****************************************************************************/
-static int PCI_enumerateDevices(void)
-{
- int i,j;
- PCIBridgeInfo *info;
-
- /* If this is the first time we have been called, enumerate all */
- /* devices on the PCI bus. */
- if (NumPCI == -1) {
- for (i = 0; i < MAX_PCI_DEVICES; i++)
- PCI[i].dwSize = sizeof(PCI[i]);
- if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0)
- return -1;
-
- /* Build a list of all PCI bridge devices */
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) {
- if (NumBridges < MAX_PCI_DEVICES)
- BridgeIndex[NumBridges++] = i;
- }
- }
-
- /* Now build a list of all display class devices */
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
- if ((PCI[i].Command & 0x3) == 0x3) {
- DeviceIndex[0] = i;
- }
- else {
- if (NumDevices < MAX_PCI_DEVICES)
- DeviceIndex[NumDevices++] = i;
- }
- if (PCI[i].slot.p.Bus != 0) {
- /* This device is on a different bus than the primary */
- /* PCI bus, so it is probably an AGP device. Find the */
- /* AGP bus device that controls that bus so we can */
- /* control it. */
- for (j = 0; j < NumBridges; j++) {
- info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]];
- if (info->SecondayBusNumber == PCI[i].slot.p.Bus) {
- AGPBridge = info;
- break;
- }
- }
- }
- }
- }
-
- /* Enumerate all PCI and bridge devices to log file */
- EnumeratePCI();
- }
- return NumDevices;
-}
-
-FILE *logfile;
-
-void printk(const char *fmt, ...)
-{
- va_list argptr;
- va_start(argptr, fmt);
- vfprintf(logfile, fmt, argptr);
- fflush(logfile);
- va_end(argptr);
-}
-
-int main(int argc,char *argv[])
-{
- while (argc > 1) {
- if (stricmp(argv[1],"-usev86") == 0) {
- useV86 = true;
- }
- else if (stricmp(argv[1],"-force") == 0) {
- forcePost = true;
- }
-#ifdef DEBUG
- else if (stricmp(argv[1],"-decode") == 0) {
- debugFlags |= DEBUG_DECODE_F;
- }
- else if (stricmp(argv[1],"-iotrace") == 0) {
- debugFlags |= DEBUG_IO_TRACE_F;
- }
-#endif
- else {
- printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n");
- exit(-1);
- }
- argc--;
- argv++;
- }
- if ((logfile = fopen("warmboot.log","w")) == NULL)
- exit(1);
-
- PM_init();
- if (!useV86) {
- /* Initialise the x86 BIOS emulator */
- BE_init(false,debugFlags,65536,&VGAInfo[0]);
- }
-
- /* Enumerate all devices (which POST's them at the same time) */
- if (PCI_enumerateDevices() < 1) {
- printk("No PCI display devices found!\n");
- return -1;
- }
-
- /* Post all the display controller BIOS'es */
- PCI_postControllers();
-
- /* Cleanup and exit the emulator */
- if (!useV86)
- BE_exit();
- fclose(logfile);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/_aa_imp.asm b/board/MAI/bios_emulator/scitech/src/common/_aa_imp.asm
deleted file mode 100644
index 61a9024..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/_aa_imp.asm
+++ /dev/null
@@ -1,51 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Nucleus Audio Architecture
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: TASM 4.0 or NASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Module to implement the import stubs for all the Nucleus
-;* Audio API functions for Intel binary compatible drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-BEGIN_IMPORTS_DEF _AA_exports
-SKIP_IMP AA_status ; Implemented in C code
-SKIP_IMP AA_errorMsg ; Implemented in C code
-SKIP_IMP AA_getDaysLeft ; Implemented in C code
-SKIP_IMP AA_registerLicense ; Implemented in C code
-SKIP_IMP AA_enumerateDevices ; Implemented in C code
-SKIP_IMP AA_loadDriver ; Implemented in C code
-DECLARE_IMP AA_unloadDriver
-DECLARE_IMP AA_saveOptions
-END_IMPORTS_DEF
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/common/_ga_imp.asm b/board/MAI/bios_emulator/scitech/src/common/_ga_imp.asm
deleted file mode 100644
index 5317600..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/_ga_imp.asm
+++ /dev/null
@@ -1,136 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Nucleus Graphics Architecture
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: TASM 4.0 or NASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Module to implement the import stubs for all the Nucleus
-;* Graphics API functions for Intel binary compatible drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-BEGIN_IMPORTS_DEF __GA_exports
-SKIP_IMP GA_status,0 ; Implemented in C code
-SKIP_IMP GA_errorMsg,1 ; Implemented in C code
-SKIP_IMP GA_getDaysLeft,1 ; Implemented in C code
-SKIP_IMP GA_registerLicense,2 ; Implemented in C code
-SKIP_IMP GA_enumerateDevices,1 ; Implemented in C code
-SKIP_IMP GA_loadDriver,2 ; Implemented in C code
-DECLARE_IMP GA_setActiveDevice,1
-SKIP_IMP GA_reserved1,0 ; Implemented in C code
-DECLARE_IMP GA_unloadDriver,1
-DECLARE_IMP REF2D_loadDriver,6
-DECLARE_IMP REF2D_unloadDriver,2
-DECLARE_IMP GA_loadRef2d,5
-DECLARE_IMP GA_unloadRef2d,1
-DECLARE_IMP GA_softStereoInit,1
-DECLARE_IMP GA_softStereoOn,0
-DECLARE_IMP GA_softStereoScheduleFlip,2
-DECLARE_IMP GA_softStereoGetFlipStatus,0
-DECLARE_IMP GA_softStereoWaitTillFlipped,0
-DECLARE_IMP GA_softStereoOff,0
-DECLARE_IMP GA_softStereoExit,0
-DECLARE_IMP GA_saveModeProfile,2
-DECLARE_IMP GA_saveOptions,2
-DECLARE_IMP GA_saveCRTCTimings,1
-DECLARE_IMP GA_restoreCRTCTimings,1
-DECLARE_IMP DDC_init,1
-DECLARE_IMP DDC_readEDID,5
-DECLARE_IMP EDID_parse,3
-DECLARE_IMP MCS_begin,1
-DECLARE_IMP MCS_getCapabilitiesString,2
-DECLARE_IMP MCS_isControlSupported,1
-DECLARE_IMP MCS_enableControl,2
-DECLARE_IMP MCS_getControlMax,2
-DECLARE_IMP MCS_getControlValue,2
-DECLARE_IMP MCS_getControlValues,3
-DECLARE_IMP MCS_setControlValue,2
-DECLARE_IMP MCS_setControlValues,3
-DECLARE_IMP MCS_resetControl,1
-DECLARE_IMP MCS_saveCurrentSettings,0
-DECLARE_IMP MCS_getTimingReport,3
-DECLARE_IMP MCS_getSelfTestReport,3
-DECLARE_IMP MCS_end,0
-SKIP_IMP GA_loadInGUI,1 ; Implemented in C code
-DECLARE_IMP DDC_writeEDID,6
-DECLARE_IMP GA_useDoubleScan,1
-DECLARE_IMP GA_getMaxRefreshRate,4
-DECLARE_IMP GA_computeCRTCTimings,6
-DECLARE_IMP GA_addMode,5
-DECLARE_IMP GA_addRefresh,5
-DECLARE_IMP GA_delMode,5
-DECLARE_IMP N_getLogName,0
-SKIP_IMP2 N_log
-DECLARE_IMP MDBX_getErrCode,0
-DECLARE_IMP MDBX_getErrorMsg,0
-DECLARE_IMP MDBX_open,1
-DECLARE_IMP MDBX_close,0
-DECLARE_IMP MDBX_first,1
-DECLARE_IMP MDBX_last,1
-DECLARE_IMP MDBX_next,1
-DECLARE_IMP MDBX_prev,1
-DECLARE_IMP MDBX_insert,1
-DECLARE_IMP MDBX_update,1
-DECLARE_IMP MDBX_flush,0
-DECLARE_IMP MDBX_importINF,2
-SKIP_IMP GA_getGlobalOptions,2 ; Implemented in C code
-DECLARE_IMP GA_setGlobalOptions,1
-DECLARE_IMP GA_saveGlobalOptions,1
-DECLARE_IMP GA_getInternalName,1
-DECLARE_IMP GA_getNucleusConfigPath,0
-DECLARE_IMP GA_getFakePCIID,0
-SKIP_IMP GA_loadLibrary,3 ; Implemented in C code
-SKIP_IMP GA_isOEMVersion,1 ; Implemented in C code
-DECLARE_IMP GA_isLiteVersion,1
-DECLARE_IMP GA_getDisplaySerialNo,1
-DECLARE_IMP GA_getDisplayUserName,1
-SKIP_IMP GA_getCurrentDriver,1 ; Implemented in C code
-SKIP_IMP GA_getCurrentRef2d,1 ; Implemented in C code
-SKIP_IMP GA_getLicensedDevices,1 ; Implemented in C code
-DECLARE_IMP DDC_initExt,2
-DECLARE_IMP MCS_beginExt,2
-DECLARE_IMP GA_loadRegionMgr,3
-DECLARE_IMP GA_unloadRegionMgr,1
-DECLARE_IMP GA_getProcAddress,2
-DECLARE_IMP GA_enableVBEMode,5
-DECLARE_IMP GA_disableVBEMode,5
-DECLARE_IMP GA_loadModeProfile,2
-DECLARE_IMP GA_getCRTCTimings,4
-DECLARE_IMP GA_setCRTCTimings,4
-DECLARE_IMP GA_setDefaultRefresh,6
-DECLARE_IMP GA_saveMonitorInfo,2
-DECLARE_IMP GA_detectPnPMonitor,3
-SKIP_IMP3 GA_queryFunctions
-SKIP_IMP3 REF2D_queryFunctions
-END_IMPORTS_DEF
-
- END
-
diff --git a/board/MAI/bios_emulator/scitech/src/common/_gatimer.asm b/board/MAI/bios_emulator/scitech/src/common/_gatimer.asm
deleted file mode 100644
index 0194a62..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/_gatimer.asm
+++ /dev/null
@@ -1,248 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Nucleus Graphics Architecture
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: 80386 Assembler, NASM or TASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Assembly support functions for the Nucleus library for
-;* the high resolution timing support functions provided by
-;* the Intel Pentium and compatible processors.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _gatimer
-
-begcodeseg _gatimer
-
-ifdef USE_NASM
-%macro mCPU_ID 0
-db 00Fh,0A2h
-%endmacro
-else
-MACRO mCPU_ID
-db 00Fh,0A2h
-ENDM
-endif
-
-ifdef USE_NASM
-%macro mRDTSC 0
-db 00Fh,031h
-%endmacro
-else
-MACRO mRDTSC
-db 00Fh,031h
-ENDM
-endif
-
-;----------------------------------------------------------------------------
-; bool _GA_haveCPUID(void)
-;----------------------------------------------------------------------------
-; Determines if we have support for the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _GA_haveCPUID
-
- enter_c
- pushfd ; Get original EFLAGS
- pop eax
- mov ecx, eax
- xor eax, 200000h ; Flip ID bit in EFLAGS
- push eax ; Save new EFLAGS value on stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can not toggle ID bit,
- jnz @@1 ; Processor=80486
- mov eax,0 ; We dont have CPUID support
- jmp @@Done
-@@1: mov eax,1 ; We have CPUID support
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _GA_getCPUIDFeatures(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _GA_getCPUIDFeatures
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- mov eax, edx
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _GA_readTimeStamp(GA_largeInteger *time)
-;----------------------------------------------------------------------------
-; Reads the time stamp counter and returns the 64-bit result.
-;----------------------------------------------------------------------------
-cprocstart _GA_readTimeStamp
-
- mRDTSC
- mov ecx,[esp+4] ; Access directly without stack frame
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; N_uint32 GA_TimerDifference(GA_largeInteger *a,GA_largeInteger *b)
-;----------------------------------------------------------------------------
-; Computes the difference between two 64-bit numbers (a-b)
-;----------------------------------------------------------------------------
-cprocstart GA_TimerDifference
-
- ARG a:DPTR, b:DPTR, t:DPTR
-
- enter_c
-
- mov ecx,[a]
- mov eax,[ecx] ; EAX := b.low
- mov ecx,[b]
- sub eax,[ecx]
- mov edx,eax ; EDX := low difference
- mov ecx,[a]
- mov eax,[ecx+4] ; ECX := b.high
- mov ecx,[b]
- sbb eax,[ecx+4] ; EAX := high difference
- mov eax,edx ; Return low part
-
- leave_c
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY_TIMER 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-else
-macro DELAY_TIMER
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-endif
-
-;----------------------------------------------------------------------------
-; void _OS_delay8253(N_uint32 microSeconds);
-;----------------------------------------------------------------------------
-; Delays for the specified number of microseconds, by directly programming
-; the 8253 timer chips.
-;----------------------------------------------------------------------------
-cprocstart _OS_delay8253
-
- ARG microSec:UINT
-
- enter_c
-
-; Start timer 2 counting
-
- mov _ax,[microSec] ; EAX := count in microseconds
- mov ecx,1196
- mul ecx
- mov ecx,1000
- div ecx
- mov ecx,eax ; ECX := count in timer ticks
- in al,61h
- or al,1
- out 61h,al
-
-; Set the timer 2 count to 0 again to start the timing interval.
-
- mov al,10110100b ; set up to load initial (timer 2)
- out 43h,al ; timer count
- DELAY_TIMER
- sub al,al
- out 42h,al ; load count lsb
- DELAY_TIMER
- out 42h,al ; load count msb
- xor di,di ; Allow max 64K loop iterations
-
-@@LoopStart:
- dec di ; This is a guard against the possibility that
- jz @@LoopEnd ; someone eg. stopped the timer behind our back.
- ; After 64K iterations we bail out no matter what
- ; (and hope it wasn't too soon)
- mov al,00000000b ; latch timer 0
- out 43h,al
- DELAY_TIMER
- in al,42h ; least significant byte
- DELAY_TIMER
- mov ah,al
- in al,42h ; most significant byte
- xchg ah,al
- neg ax ; Convert from countdown remaining
- ; to elapsed count
- cmp ax,cx ; Has delay expired?
- jb @@LoopStart ; No, so loop till done
-
-; Stop timer 2 from counting
-@@LoopEnd:
- in al,61H
- and al,0FEh
- out 61H,al
-
-; Some programs have a problem if we change the control port; better change it
-; to something they expect (mode 3 - square wave generator)...
- mov al,0B6h
- out 43h,al
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _gatimer
-
- END
-
diff --git a/board/MAI/bios_emulator/scitech/src/common/_pm_imp.asm b/board/MAI/bios_emulator/scitech/src/common/_pm_imp.asm
deleted file mode 100644
index d4b1179..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/_pm_imp.asm
+++ /dev/null
@@ -1,195 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* Copyright (C) 1991-1998 SciTech Software, Inc.
-;* All rights reserved.
-;*
-;* ======================================================================
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* | |
-;* |This copyrighted computer code contains proprietary technology |
-;* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-;* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-;* | |
-;* |The contents of this file are subject to the SciTech Nucleus |
-;* |License; you may *not* use this file or related software except in |
-;* |compliance with the License. You may obtain a copy of the License |
-;* |at http://www.scitechsoft.com/nucleus-license.txt |
-;* | |
-;* |Software distributed under the License is distributed on an |
-;* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-;* |implied. See the License for the specific language governing |
-;* |rights and limitations under the License. |
-;* | |
-;* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-;* ======================================================================
-;*
-;* Language: TASM 4.0 or NASM
-;* Environment: IBM PC 32 bit Protected Mode.
-;*
-;* Description: Module to implement the import stubs for all the PM
-;* API functions for Intel binary portable drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-BEGIN_IMPORTS_DEF _PM_imports
-DECLARE_IMP PM_getModeType,0
-DECLARE_IMP PM_getBIOSPointer,0
-DECLARE_IMP PM_getA0000Pointer,0
-DECLARE_IMP PM_mapPhysicalAddr,0
-DECLARE_IMP PM_mallocShared,0
-SKIP_IMP _PM_reserved1,0
-DECLARE_IMP PM_freeShared,0
-DECLARE_IMP PM_mapToProcess,0
-DECLARE_IMP PM_mapRealPointer,0
-DECLARE_IMP PM_allocRealSeg,0
-DECLARE_IMP PM_freeRealSeg,0
-DECLARE_IMP PM_allocLockedMem,0
-DECLARE_IMP PM_freeLockedMem,0
-DECLARE_IMP PM_callRealMode,0
-DECLARE_IMP PM_int86,0
-DECLARE_IMP PM_int86x,0
-DECLARE_IMP DPMI_int86,0
-DECLARE_IMP PM_availableMemory,0
-DECLARE_IMP PM_getVESABuf,0
-DECLARE_IMP PM_getOSType,0
-DECLARE_IMP PM_fatalError,0
-DECLARE_IMP PM_setBankA,0
-DECLARE_IMP PM_setBankAB,0
-DECLARE_IMP PM_setCRTStart,0
-DECLARE_IMP PM_getCurrentPat,0
-DECLARE_IMP PM_getVBEAFPath,0
-DECLARE_IMP PM_getNucleusPath,0
-DECLARE_IMP PM_getNucleusConfigPath,0
-DECLARE_IMP PM_getUniqueID,0
-DECLARE_IMP PM_getMachineName,0
-DECLARE_IMP VF_available,0
-DECLARE_IMP VF_init,0
-DECLARE_IMP VF_exit,0
-DECLARE_IMP PM_openConsole,0
-DECLARE_IMP PM_getConsoleStateSize,0
-DECLARE_IMP PM_saveConsoleState,0
-DECLARE_IMP PM_restoreConsoleState,0
-DECLARE_IMP PM_closeConsole,0
-DECLARE_IMP PM_setOSCursorLocation,0
-DECLARE_IMP PM_setOSScreenWidth,0
-DECLARE_IMP PM_enableWriteCombine,0
-DECLARE_IMP PM_backslash,0
-DECLARE_IMP PM_lockDataPages,0
-DECLARE_IMP PM_unlockDataPages,0
-DECLARE_IMP PM_lockCodePages,0
-DECLARE_IMP PM_unlockCodePages,0
-DECLARE_IMP PM_setRealTimeClockHandler,0
-DECLARE_IMP PM_setRealTimeClockFrequency,0
-DECLARE_IMP PM_restoreRealTimeClockHandler,0
-DECLARE_IMP PM_doBIOSPOST,0
-DECLARE_IMP PM_getBootDrive,0
-DECLARE_IMP PM_freePhysicalAddr,0
-DECLARE_IMP PM_inpb,0
-DECLARE_IMP PM_inpw,0
-DECLARE_IMP PM_inpd,0
-DECLARE_IMP PM_outpb,0
-DECLARE_IMP PM_outpw,0
-DECLARE_IMP PM_outpd,0
-SKIP_IMP _PM_reserved2,0
-DECLARE_IMP PM_setSuspendAppCallback,0
-DECLARE_IMP PM_haveBIOSAccess,0
-DECLARE_IMP PM_kbhit,0
-DECLARE_IMP PM_getch,0
-DECLARE_IMP PM_findBPD,0
-DECLARE_IMP PM_getPhysicalAddr,0
-DECLARE_IMP PM_sleep,0
-DECLARE_IMP PM_getCOMPort,0
-DECLARE_IMP PM_getLPTPort,0
-DECLARE_IMP PM_loadLibrary,0
-DECLARE_IMP PM_getProcAddress,0
-DECLARE_IMP PM_freeLibrary,0
-DECLARE_IMP PCI_enumerate,0
-DECLARE_IMP PCI_accessReg,0
-DECLARE_IMP PCI_setHardwareIRQ,0
-DECLARE_IMP PCI_generateSpecialCyle,0
-SKIP_IMP _PM_reserved3,0
-DECLARE_IMP PCIBIOS_getEntry,0
-DECLARE_IMP CPU_getProcessorType,0
-DECLARE_IMP CPU_haveMMX,0
-DECLARE_IMP CPU_have3DNow,0
-DECLARE_IMP CPU_haveSSE,0
-DECLARE_IMP CPU_haveRDTSC,0
-DECLARE_IMP CPU_getProcessorSpeed,0
-DECLARE_IMP ZTimerInit,0
-DECLARE_IMP LZTimerOn,0
-DECLARE_IMP LZTimerLap,0
-DECLARE_IMP LZTimerOff,0
-DECLARE_IMP LZTimerCount,0
-DECLARE_IMP LZTimerOnExt,0
-DECLARE_IMP LZTimerLapExt,0
-DECLARE_IMP LZTimerOffExt,0
-DECLARE_IMP LZTimerCountExt,0
-DECLARE_IMP ULZTimerOn,0
-DECLARE_IMP ULZTimerLap,0
-DECLARE_IMP ULZTimerOff,0
-DECLARE_IMP ULZTimerCount,0
-DECLARE_IMP ULZReadTime,0
-DECLARE_IMP ULZElapsedTime,0
-DECLARE_IMP ULZTimerResolution,0
-DECLARE_IMP PM_findFirstFile,0
-DECLARE_IMP PM_findNextFile,0
-DECLARE_IMP PM_findClose,0
-DECLARE_IMP PM_makepath,0
-DECLARE_IMP PM_splitpath,0
-DECLARE_IMP PM_driveValid,0
-DECLARE_IMP PM_getdcwd,0
-DECLARE_IMP PM_setFileAttr,0
-DECLARE_IMP PM_mkdir,0
-DECLARE_IMP PM_rmdir,0
-DECLARE_IMP PM_getFileAttr,0
-DECLARE_IMP PM_getFileTime,0
-DECLARE_IMP PM_setFileTime,0
-DECLARE_IMP CPU_getProcessorName,0
-DECLARE_IMP PM_getVGAStateSize,0
-DECLARE_IMP PM_saveVGAState,0
-DECLARE_IMP PM_restoreVGAState,0
-DECLARE_IMP PM_vgaBlankDisplay,0
-DECLARE_IMP PM_vgaUnblankDisplay,0
-DECLARE_IMP PM_blockUntilTimeout,0
-DECLARE_IMP _PM_add64,0
-DECLARE_IMP _PM_sub64,0
-DECLARE_IMP _PM_mul64,0
-DECLARE_IMP _PM_div64,0
-DECLARE_IMP _PM_shr64,0
-DECLARE_IMP _PM_sar64,0
-DECLARE_IMP _PM_shl64,0
-DECLARE_IMP _PM_neg64,0
-DECLARE_IMP PCI_findBARSize,0
-DECLARE_IMP PCI_readRegBlock,0
-DECLARE_IMP PCI_writeRegBlock,0
-DECLARE_IMP PM_flushTLB,0
-DECLARE_IMP PM_useLocalMalloc,0
-DECLARE_IMP PM_malloc,0
-DECLARE_IMP PM_calloc,0
-DECLARE_IMP PM_realloc,0
-DECLARE_IMP PM_free,0
-DECLARE_IMP PM_getPhysicalAddrRange,0
-DECLARE_IMP PM_allocPage,0
-DECLARE_IMP PM_freePage,0
-DECLARE_IMP PM_agpInit,0
-DECLARE_IMP PM_agpExit,0
-DECLARE_IMP PM_agpReservePhysical,0
-DECLARE_IMP PM_agpReleasePhysical,0
-DECLARE_IMP PM_agpCommitPhysical,0
-DECLARE_IMP PM_agpFreePhysical,0
-DECLARE_IMP PCI_getNumDevices,0
-DECLARE_IMP PM_setLocalBPDPath,0
-DECLARE_IMP PM_loadDirectDraw,0
-DECLARE_IMP PM_unloadDirectDraw,0
-DECLARE_IMP PM_getDirectDrawWindow,0
-DECLARE_IMP PM_doSuspendApp,0
-END_IMPORTS_DEF
-
- END
-
diff --git a/board/MAI/bios_emulator/scitech/src/common/aabeos.c b/board/MAI/bios_emulator/scitech/src/common/aabeos.c
deleted file mode 100644
index ad5698a..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aabeos.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aados.c b/board/MAI/bios_emulator/scitech/src/common/aados.c
deleted file mode 100644
index 342d2f3..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aados.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: MSDOS
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the MSDOS operating system.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the DOS
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aalib.c b/board/MAI/bios_emulator/scitech/src/common/aalib.c
deleted file mode 100644
index 5003b22..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aalib.c
+++ /dev/null
@@ -1,225 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Audio Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Any 32-bit protected mode environment
-*
-* Description: C module for the Graphics Accelerator Driver API. Uses
-* the SciTech PM library for interfacing with DOS
-* extender specific functions.
-*
-****************************************************************************/
-
-#include "nucleus/audio.h"
-#ifdef __WIN32_VXD__
-#include "sdd/sddhelp.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#endif
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#ifdef TEST_HARNESS
-extern PM_imports _VARAPI _PM_imports;
-#else
-AA_exports _VARAPI _AA_exports;
-static int loaded = false;
-static PE_MODULE *hModBPD = NULL;
-
-#ifdef __DRIVER__
-extern PM_imports _PM_imports;
-#else
-#include "pmimp.h"
-#endif
-
-static N_imports _N_imports = {
- sizeof(N_imports),
- _OS_delay,
- };
-
-#ifdef __DRIVER__
-extern AA_imports _AA_imports;
-#else
-static AA_imports _AA_imports = {
- sizeof(AA_imports),
- };
-#endif
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-#define DLL_NAME "audio.bpd"
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Fatal error handler for non-exported AA_exports.
-****************************************************************************/
-static void _AA_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported Nucleus export function called! Please upgrade your copy of Nucleus!\n");
-}
-
-/****************************************************************************
-REMARKS:
-Loads the Nucleus binary portable DLL into memory and initilises it.
-****************************************************************************/
-static ibool LoadDriver(void)
-{
- AA_initLibrary_t AA_initLibrary;
- AA_exports *aaExp;
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
- int i,max;
- ulong *p;
-
- /* Check if we have already loaded the driver */
- if (loaded)
- return true;
- PM_init();
- _AA_exports.dwSize = sizeof(_AA_exports);
-
- /* Open the BPD file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
- return false;
- if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL)
- return false;
- bpdpath[strlen(bpdpath)-1] = 0;
- if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
- strcpy(bpdpath,PM_getNucleusConfigPath());
- else {
- PM_backslash(bpdpath);
- strcat(bpdpath,"config");
- }
- if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL)
- PM_fatalError("AA_initLibrary failed!\n");
-
- /* Initialize all default imports to point to fatal error handler
- * for upwards compatibility, and copy the exported functions.
- */
- max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t);
- for (i = 0,p = (ulong*)&_AA_exports; i < max; i++)
- *p++ = (ulong)_AA_fatalErrorHandler;
- memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize));
- loaded = true;
- return true;
-}
-
-/* The following are stub entry points that the application calls to
- * initialise the Nucleus loader library, and we use this to load our
- * driver DLL from disk and initialise the library using it.
- */
-
-/* {secret} */
-int NAPI AA_status(void)
-{
- if (!loaded)
- return nDriverNotFound;
- return _AA_exports.AA_status();
-}
-
-/* {secret} */
-const char * NAPI AA_errorMsg(
- N_int32 status)
-{
- if (!loaded)
- return "Unable to load Nucleus device driver!";
- return _AA_exports.AA_errorMsg(status);
-}
-
-/* {secret} */
-int NAPI AA_getDaysLeft(void)
-{
- if (!LoadDriver())
- return -1;
- return _AA_exports.AA_getDaysLeft();
-}
-
-/* {secret} */
-int NAPI AA_registerLicense(uchar *license)
-{
- if (!LoadDriver())
- return 0;
- return _AA_exports.AA_registerLicense(license);
-}
-
-/* {secret} */
-int NAPI AA_enumerateDevices(void)
-{
- if (!LoadDriver())
- return 0;
- return _AA_exports.AA_enumerateDevices();
-}
-
-/* {secret} */
-AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex)
-{
- if (!LoadDriver())
- return NULL;
- return _AA_exports.AA_loadDriver(deviceIndex);
-}
-#endif
-
-typedef struct {
- N_uint32 low;
- N_uint32 high;
- } AA_largeInteger;
-
-void NAPI _OS_delay8253(N_uint32 microSeconds);
-ibool NAPI _GA_haveCPUID(void);
-uint NAPI _GA_getCPUIDFeatures(void);
-void NAPI _GA_readTimeStamp(AA_largeInteger *time);
-#define CPU_HaveRDTSC 0x00000010
-
-/****************************************************************************
-REMARKS:
-This function delays for the specified number of microseconds
-****************************************************************************/
-void NAPI _OS_delay(
- N_uint32 microSeconds)
-{
- static ibool inited = false;
- LZTimerObject tm;
-
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- if (!inited) {
- ZTimerInit();
- inited = true;
- }
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microSeconds)
- ;
- LZTimerOnExt(&tm);
- }
- else
- _OS_delay8253(microSeconds);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aalinux.c b/board/MAI/bios_emulator/scitech/src/common/aalinux.c
deleted file mode 100644
index d3d468e..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aalinux.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aaos2.c b/board/MAI/bios_emulator/scitech/src/common/aaos2.c
deleted file mode 100644
index 0ec8c9f..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aaos2.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: OS/2 32-bit
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the OS/2 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static HFILE hSDDHelp;
-static ulong outLen; /* Must not cross 64Kb boundary! */
-static ulong result; /* Must not cross 64Kb boundary! */
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-This function returns a pointer to the common graphics driver loaded in the
-helper VxD. The memory for the VxD is shared between all processes via
-the VxD, so that the VxD, 16-bit code and 32-bit code all see the same
-state when accessing the graphics binary portable driver.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- /* Initialise the PM library and connect to our runtime DLL's */
- PM_init();
-
- /* Open our helper device driver */
- if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL))
- PM_fatalError("Unable to open SDDHELP$ helper device driver!");
- outLen = sizeof(result);
- DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO,
- NULL, 0, NULL,
- &result, outLen, &outLen);
- DosClose(hSDDHelp);
- if (result) {
- /* We have found the shared Nucleus packet. Because not all processes
- * map to SDDPMI.DLL, we need to ensure that we connect to this
- * DLL so that it gets mapped into our address space (that is
- * where the shared Nucleus packet is located). Simply doing a
- * DosLoadModule on it is enough for this.
- */
- HMODULE hModSDDPMI;
- char buf[80];
- DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
- }
- return (GA_sharedInfo*)result;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- DosTmrQueryTime((QWORD*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c b/board/MAI/bios_emulator/scitech/src/common/aaqnx.c
deleted file mode 100644
index 13531be..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the QNX operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timespec ts;
-
- clock_gettime(CLOCK_REALTIME, &ts);
- value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aartt.c b/board/MAI/bios_emulator/scitech/src/common/aartt.c
deleted file mode 100644
index 1a5a67a..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aartt.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the RTTarget-32 operating system environments.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aasmx.c b/board/MAI/bios_emulator/scitech/src/common/aasmx.c
deleted file mode 100644
index 163060f..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aasmx.c
+++ /dev/null
@@ -1,83 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: smx32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the smx32 platform -- no vxD support.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "nucleus/graphics.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- (void)device;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aavxd.c b/board/MAI/bios_emulator/scitech/src/common/aavxd.c
deleted file mode 100644
index 221b02b..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aavxd.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32 VxD
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 VxD's.
-*
-****************************************************************************/
-
-#include "sdd/sddhelp.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Return the internal shared info structure.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- static GA_sharedInfo shared = {0,-1};
- return &shared;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- VTD_Get_Real_Time(&value->high,&value->low);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/aawin32.c b/board/MAI/bios_emulator/scitech/src/common/aawin32.c
deleted file mode 100644
index 541df4a..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/aawin32.c
+++ /dev/null
@@ -1,264 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#define STRICT
-#define WIN32_LEAN_AND_MEAN
-#include <windows.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-#if GA_MAX_DEVICES > 4
-#error GA_MAX_DEVICES has changed!
-#endif
-
-static ibool haveRDTSC;
-static GA_largeInteger countFreq;
-static GA_loadDriver_t ORG_GA_loadDriver;
-extern HANDLE _PM_hDevice;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Get the current graphics driver imports from the VxD
-
-REMARKS:
-This function returns a pointer to the common graphics driver loaded in the
-helper VxD. The memory for the VxD is shared between all processes via
-the VxD, so that the VxD, 16-bit code and 32-bit code all see the same
-state when accessing the graphics binary portable driver.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[2]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- PM_init();
- inBuf[0] = device;
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL)) {
- return (GA_sharedInfo*)outBuf[0];
- }
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp)
-{
- (void)gaExp;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the software stereo module by either calling
-the Nucleus libraries directly, or calling into the VxD if we are running
-on the shared Nucleus libraries loaded by the Windows VxD.
-****************************************************************************/
-static ibool NAPI _GA_softStereoInit(
- GA_devCtx *dc)
-{
- if (_PM_hDevice) {
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)dc;
- if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL)) {
- return outBuf[0];
- }
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function turns on software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoOn(void)
-{
- if (_PM_hDevice) {
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0,
- NULL, 0, NULL, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function schedules a software stereo mode page flip, either directly
-or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoScheduleFlip(
- N_uint32 leftAddr,
- N_uint32 rightAddr)
-{
- if (_PM_hDevice) {
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)leftAddr;
- inBuf[1] = (ulong)rightAddr;
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function turns off software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static N_int32 NAPI _GA_softStereoGetFlipStatus(void)
-{
- if (_PM_hDevice) {
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL)) {
- return outBuf[0];
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This function turns off software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoWaitTillFlipped(void)
-{
- while (!_GA_softStereoGetFlipStatus())
- ;
-}
-
-/****************************************************************************
-REMARKS:
-This function turns off software stereo mode, either directly or via the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoOff(void)
-{
- if (_PM_hDevice) {
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0,
- NULL, 0, NULL, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function disable the software stereo handler, either directly or via
-the VxD.
-****************************************************************************/
-static void NAPI _GA_softStereoExit(void)
-{
- if (_PM_hDevice) {
- DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0,
- NULL, 0, NULL, NULL);
- }
-}
-
-/****************************************************************************
-REMARKS:
-We hook this function in here so that we can avoid the memory detect and
-other destructive sequences in the drivers if we are loading the driver
-from a Win32 application (our display drivers in contrast load them inside
-the VxD directly, but the control panel applets use this function).
-****************************************************************************/
-static GA_devCtx * NAPI _GA_loadDriver(
- N_int32 deviceIndex,
- N_int32 shared)
-{
- GA_devCtx *dc;
- DWORD inBuf[1];
- DWORD outBuf[1];
- N_int32 totalMemory = 0,oldIOPL;
-
- if (deviceIndex >= GA_MAX_DEVICES)
- PM_fatalError("DeviceIndex too large in GA_loadDriver!");
- PM_init();
- inBuf[0] = deviceIndex;
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32,
- inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL))
- totalMemory = outBuf[0];
- if (totalMemory == 0)
- totalMemory = 8192;
- _GA_exports.GA_forceMemSize(totalMemory,shared);
- oldIOPL = PM_setIOPL(3);
- dc = ORG_GA_loadDriver(deviceIndex,shared);
- PM_setIOPL(oldIOPL);
- return dc;
-}
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
- haveRDTSC = false;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- QueryPerformanceCounter((LARGE_INTEGER*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/agplib.c b/board/MAI/bios_emulator/scitech/src/common/agplib.c
deleted file mode 100644
index 476eedc..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/agplib.c
+++ /dev/null
@@ -1,219 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Any 32-bit protected mode environment
-*
-* Description: C module for the Graphics Accelerator Driver API. Uses
-* the SciTech PM library for interfacing with DOS
-* extender specific functions.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include "nucleus/agp.h"
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#ifndef DEBUG_AGP_DRIVER
-static AGP_exports _AGP_exports;
-static int loaded = false;
-static PE_MODULE *hModBPD = NULL;
-
-static N_imports _N_imports = {
- sizeof(N_imports),
- _OS_delay,
- };
-
-static AGP_imports _AGP_imports = {
- sizeof(AGP_imports),
- };
-#endif
-
-#include "pmimp.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-#define DLL_NAME "agp.bpd"
-
-#ifndef DEBUG_AGP_DRIVER
-/****************************************************************************
-REMARKS:
-Fatal error handler for non-exported GA_exports.
-****************************************************************************/
-static void _AGP_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported AGP export function called! Please upgrade your copy of AGP!\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-shared - True to load the driver into shared memory.
-
-REMARKS:
-Loads the Nucleus binary portable DLL into memory and initilises it.
-****************************************************************************/
-static ibool LoadDriver(void)
-{
- AGP_initLibrary_t AGP_initLibrary;
- AGP_exports *agpExp;
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
- int i,max;
- ulong *p;
-
- /* Check if we have already loaded the driver */
- if (loaded)
- return true;
- PM_init();
-
- /* Open the BPD file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModBPD = PE_loadLibrary(filename,false)) == NULL)
- return false;
- if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL)
- return false;
- bpdpath[strlen(bpdpath)-1] = 0;
- if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
- strcpy(bpdpath,PM_getNucleusConfigPath());
- else {
- PM_backslash(bpdpath);
- strcat(bpdpath,"config");
- }
- if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL)
- PM_fatalError("AGP_initLibrary failed!\n");
- _AGP_exports.dwSize = sizeof(_AGP_exports);
- max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t);
- for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++)
- *p++ = (ulong)_AGP_fatalErrorHandler;
- memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize));
- loaded = true;
- return true;
-}
-
-/* The following are stub entry points that the application calls to
- * initialise the Nucleus loader library, and we use this to load our
- * driver DLL from disk and initialise the library using it.
- */
-
-/* {secret} */
-int NAPI AGP_status(void)
-{
- if (!loaded)
- return nDriverNotFound;
- return _AGP_exports.AGP_status();
-}
-
-/* {secret} */
-const char * NAPI AGP_errorMsg(
- N_int32 status)
-{
- if (!loaded)
- return "Unable to load Nucleus device driver!";
- return _AGP_exports.AGP_errorMsg(status);
-}
-
-/* {secret} */
-AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex)
-{
- if (!LoadDriver())
- return NULL;
- return _AGP_exports.AGP_loadDriver(deviceIndex);
-}
-
-/* {secret} */
-void NAPI AGP_unloadDriver(
- AGP_devCtx *dc)
-{
- if (loaded)
- _AGP_exports.AGP_unloadDriver(dc);
-}
-
-/* {secret} */
-void NAPI AGP_getGlobalOptions(
- AGP_globalOptions *options)
-{
- if (LoadDriver())
- _AGP_exports.AGP_getGlobalOptions(options);
-}
-
-/* {secret} */
-void NAPI AGP_setGlobalOptions(
- AGP_globalOptions *options)
-{
- if (LoadDriver())
- _AGP_exports.AGP_setGlobalOptions(options);
-}
-
-/* {secret} */
-void NAPI AGP_saveGlobalOptions(
- AGP_globalOptions *options)
-{
- if (loaded)
- _AGP_exports.AGP_saveGlobalOptions(options);
-}
-#endif
-
-/* {secret} */
-void NAPI _OS_delay8253(N_uint32 microSeconds);
-
-/****************************************************************************
-REMARKS:
-This function delays for the specified number of microseconds
-****************************************************************************/
-void NAPI _OS_delay(
- N_uint32 microSeconds)
-{
- static ibool inited = false;
- static ibool haveRDTSC;
- LZTimerObject tm;
-
- if (!inited) {
-#ifndef __WIN32_VXD__
- /* This has been causing problems in VxD's for some reason, so for now */
- /* we avoid using it. */
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- ZTimerInit();
- haveRDTSC = true;
- }
- else
-#endif
- haveRDTSC = false;
- inited = true;
- }
- if (haveRDTSC) {
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microSeconds)
- ;
- LZTimerOnExt(&tm);
- }
- else
- _OS_delay8253(microSeconds);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/center.c b/board/MAI/bios_emulator/scitech/src/common/center.c
deleted file mode 100644
index 68e17c2..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/center.c
+++ /dev/null
@@ -1,122 +0,0 @@
-/****************************************************************************
-*
-* Display Doctor Windows Interface Code
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code is a proprietary trade secret of |
-* |SciTech Software, Inc., located at 505 Wall Street, Chico, CA 95928 |
-* |USA (www.scitechsoft.com). ANY UNAUTHORIZED POSSESSION, USE, |
-* |VIEWING, COPYING, MODIFICATION OR DISSEMINATION OF THIS CODE IS |
-* |STRICTLY PROHIBITED BY LAW. Unless you have current, express |
-* |written authorization from SciTech to possess or use this code, you |
-* |may be subject to civil and/or criminal penalties. |
-* | |
-* |If you received this code in error or you would like to report |
-* |improper use, please immediately contact SciTech Software, Inc. at |
-* |530-894-8400. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: C++ 3.0
-* Environment: Win16
-*
-* Description: Dialog driven configuration program for UniVBE and
-* WinDirect Professional products.
-*
-****************************************************************************/
-
-#include "center.h"
-
-/*------------------------------ Implementation ---------------------------*/
-
-void _EXPORT CenterWindow(HWND hWndCenter, HWND parent, BOOL repaint)
-/****************************************************************************
-*
-* Function: CenterWindow
-* Parameters: hWndCenter - Window to center
-* parent - Handle for parent window
-* repaint - true if window should be re-painted
-*
-* Description: Centers the specified window within the bounds of the
-* specified parent window. If the parent window is NULL, then
-* we center it using the Desktop window.
-*
-****************************************************************************/
-{
- HWND hWndParent = (parent ? parent : GetDesktopWindow());
- RECT RectParent;
- RECT RectCenter;
- int CenterX,CenterY,Height,Width;
-
- GetWindowRect(hWndParent, &RectParent);
- GetWindowRect(hWndCenter, &RectCenter);
-
- Width = (RectCenter.right - RectCenter.left);
- Height = (RectCenter.bottom - RectCenter.top);
- CenterX = ((RectParent.right - RectParent.left) - Width) / 2;
- CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2;
-
- if ((CenterX < 0) || (CenterY < 0)) {
- /* The Center Window is smaller than the parent window. */
- if (hWndParent != GetDesktopWindow()) {
- /* If the parent window is not the desktop use the desktop size. */
- CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2;
- CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2;
- }
- CenterX = (CenterX < 0) ? 0: CenterX;
- CenterY = (CenterY < 0) ? 0: CenterY;
- }
- else {
- CenterX += RectParent.left;
- CenterY += RectParent.top;
- }
-
- /* Copy the values into RectCenter */
- RectCenter.left = CenterX;
- RectCenter.right = CenterX + Width;
- RectCenter.top = CenterY;
- RectCenter.bottom = CenterY + Height;
-
- /* Move the window to the new location */
- MoveWindow(hWndCenter, RectCenter.left, RectCenter.top,
- (RectCenter.right - RectCenter.left),
- (RectCenter.bottom - RectCenter.top), repaint);
-}
-
-void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY)
-/****************************************************************************
-*
-* Function: CenterLogo
-* Parameters: hWndLogo - Window to center
-* hWndParent - Handle for parent window
-* CenterY - Top coordinate for logo
-*
-* Description: Centers the specified window within the bounds of the
-* specified parent window in the horizontal direction only.
-*
-****************************************************************************/
-{
- RECT RectParent;
- RECT RectCenter;
- int CenterX,Height,Width;
-
- GetWindowRect(hWndParent, &RectParent);
- GetWindowRect(hWndLogo, &RectCenter);
- Width = (RectCenter.right - RectCenter.left);
- Height = (RectCenter.bottom - RectCenter.top);
- CenterX = ((RectParent.right - RectParent.left) - Width) / 2;
-
- /* Copy the values into RectCenter */
- RectCenter.left = CenterX;
- RectCenter.right = CenterX + Width;
- RectCenter.top = CenterY;
- RectCenter.bottom = CenterY + Height;
-
- /* Move the window to the new location */
- MoveWindow(hWndLogo, RectCenter.left, RectCenter.top,
- (RectCenter.right - RectCenter.left),
- (RectCenter.bottom - RectCenter.top), false);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/cmdline.c b/board/MAI/bios_emulator/scitech/src/common/cmdline.c
deleted file mode 100644
index 531e5e1..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/cmdline.c
+++ /dev/null
@@ -1,428 +0,0 @@
-/****************************************************************************
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: This module contains code to parse the command line,
-* extracting options and parameters in standard System V
-* style.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <string.h>
-#include <ctype.h>
-#include "cmdline.h"
-
-/*------------------------- Global variables ------------------------------*/
-
-int nextargv = 1; /* Index into argv array */
-char *nextchar = NULL; /* Pointer to next character */
-
-/*-------------------------- Implementation -------------------------------*/
-
-#define IS_SWITCH_CHAR(c) ((c) == '-')
-#define IS_NOT_SWITCH_CHAR(c) ((c) != '-')
-
-/****************************************************************************
-DESCRIPTION:
-Parse the command line for specific options
-
-HEADER:
-cmdline.h
-
-PARAMETERS:
-argc - Value passed to program through argc variable
-argv - Pointer to the argv array passed to the program
-format - A string representing the expected format of the command line
-argument - Pointer to optional argument on command line
-
-RETURNS:
-Character code representing the next option parsed from the command line by
-getcmdopt. Returns ALLDONE (-1) when there are no more parameters to be parsed
-on the command line, PARAMETER (-2) when the argument being parsed is a
-parameter and not an option switch and lastly INVALID (-3) if an error
-occured while parsing the command line.
-
-REMARKS:
-Function to parse the command line option switches in UNIX System V style.
-When getcmdopt is called, it returns the character code of the next valid
-option that is parsed from the command line as specified by the Format
-string. The format string should be in the following form:
-
- "abcd:e:f:"
-
-where a,b and c represent single switch style options and the character
-code returned by getcmdopt is the only value returned. Also d, e and f
-represent options that expect arguments immediately after them on the
-command line. The argument that follows the option on the command line is
-returned via a reference in the pointer argument. Thus a valid command line
-for this format string might be:
-
- myprogram -adlines -b -f format infile outfile
-
-where a and b will be returned as single character options with no argument,
-while d is returned with the argument lines and f is returned with the
-argument format.
-
-When getcmdopt returns with PARAMETER (we attempted to parse a paramter, not
-an option), the global variable NextArgv will hold an index in the argv
-array to the argument on the command line AFTER the options, ie in the
-above example the string 'infile'. If the parameter is successfully used,
-NextArgv should be incremented and getcmdopt can be called again to parse any
-more options. Thus you can also have options interspersed throught the
-command line. eg:
-
- myprogram -adlines infile -b outfile -f format
-
-can be made to be a valid form of the above command line.
-****************************************************************************/
-int getcmdopt(
- int argc,
- char **argv,
- char *format,
- char **argument)
-{
- char ch;
- char *formatchar;
-
- if (argc > nextargv) {
- if (nextchar == NULL) {
- nextchar = argv[nextargv]; /* Index next argument */
- if (nextchar == NULL) {
- nextargv++;
- return ALLDONE; /* No more options */
- }
- if (IS_NOT_SWITCH_CHAR(*nextchar)) {
- nextchar = NULL;
- return PARAMETER; /* We have a parameter */
- }
- nextchar++; /* Move past switch operator */
- if (IS_SWITCH_CHAR(*nextchar)) {
- nextchar = NULL;
- return INVALID; /* Ignore rest of line */
- }
- }
- if ((ch = *(nextchar++)) == 0) {
- nextchar = NULL;
- return INVALID; /* No options on line */
- }
-
- if (ch == ':' || (formatchar = strchr(format, ch)) == NULL)
- return INVALID;
-
- if (*(++formatchar) == ':') { /* Expect an argument after option */
- nextargv++;
- if (*nextchar == 0) {
- if (argc <= nextargv)
- return INVALID;
- nextchar = argv[nextargv++];
- }
- *argument = nextchar;
- nextchar = NULL;
- }
- else { /* We have a switch style option */
- if (*nextchar == 0) {
- nextargv++;
- nextchar = NULL;
- }
- *argument = NULL;
- }
- return ch; /* return the option specifier */
- }
- nextchar = NULL;
- nextargv++;
- return ALLDONE; /* no arguments on command line */
-}
-
-/****************************************************************************
-PARAMETERS:
-optarr - Description for the option we are parsing
-argument - String to parse
-
-RETURNS:
-INVALID on error, ALLDONE on success.
-
-REMARKS:
-Parses the argument string depending on the type of argument that is
-expected, filling in the argument for that option. Note that to parse a
-string, we simply return a pointer to argument.
-****************************************************************************/
-static int parse_option(
- Option *optarr,
- char *argument)
-{
- int num_read;
-
- switch ((int)(optarr->type)) {
- case OPT_INTEGER:
- num_read = sscanf(argument,"%d",(int*)optarr->arg);
- break;
- case OPT_HEX:
- num_read = sscanf(argument,"%x",(int*)optarr->arg);
- break;
- case OPT_OCTAL:
- num_read = sscanf(argument,"%o",(int*)optarr->arg);
- break;
- case OPT_UNSIGNED:
- num_read = sscanf(argument,"%u",(uint*)optarr->arg);
- break;
- case OPT_LINTEGER:
- num_read = sscanf(argument,"%ld",(long*)optarr->arg);
- break;
- case OPT_LHEX:
- num_read = sscanf(argument,"%lx",(long*)optarr->arg);
- break;
- case OPT_LOCTAL:
- num_read = sscanf(argument,"%lo",(long*)optarr->arg);
- break;
- case OPT_LUNSIGNED:
- num_read = sscanf(argument,"%lu",(ulong*)optarr->arg);
- break;
- case OPT_FLOAT:
- num_read = sscanf(argument,"%f",(float*)optarr->arg);
- break;
- case OPT_DOUBLE:
- num_read = sscanf(argument,"%lf",(double*)optarr->arg);
- break;
- case OPT_LDOUBLE:
- num_read = sscanf(argument,"%Lf",(long double*)optarr->arg);
- break;
- case OPT_STRING:
- num_read = 1; /* This always works */
- *((char**)optarr->arg) = argument;
- break;
- default:
- return INVALID;
- }
-
- if (num_read == 0)
- return INVALID;
- else
- return ALLDONE;
-}
-
-/****************************************************************************
-HEADER:
-cmdline.h
-
-PARAMETERS:
-argc - Number of arguments on command line
-argv - Array of command line arguments
-num_opt - Number of options in option array
-optarr - Array to specify how to parse the command line
-do_param - Routine to handle a command line parameter
-
-RETURNS:
-ALLDONE, INVALID or HELP
-
-REMARKS:
-Function to parse the command line according to a table of options. This
-routine calls getcmdopt above to parse each individual option and attempts
-to parse each option into a variable of the specified type. The routine
-can parse integers and long integers in either decimal, octal, hexadecimal
-notation, unsigned integers and unsigned longs, strings and option switches.
-Option switches are simply boolean variables that get turned on if the
-switch was parsed.
-
-Parameters are extracted from the command line by calling a user supplied
-routine do_param() to handle each parameter as it is encountered. The
-routine do_param() should accept a pointer to the parameter on the command
-line and an integer representing how many parameters have been encountered
-(ie: 1 if this is the first parameter, 10 if it is the 10th etc), and return
-ALLDONE upon successfully parsing it or INVALID if the parameter was invalid.
-
-We return either ALLDONE if all the options were successfully parsed,
-INVALID if an invalid option was encountered or HELP if any of -h, -H or
--? were present on the command line.
-****************************************************************************/
-int getargs(
- int argc,
- char *argv[],
- int num_opt,
- Option optarr[],
- int (*do_param)(
- char *param,
- int num))
-{
- int i,opt;
- char *argument;
- int param_num = 1;
- char cmdstr[MAXARG*2 + 4];
-
- /* Build the command string from the array of options */
-
- strcpy(cmdstr,"hH?");
- for (i = 0,opt = 3; i < num_opt; i++,opt++) {
- cmdstr[opt] = optarr[i].opt;
- if (optarr[i].type != OPT_SWITCH) {
- cmdstr[++opt] = ':';
- }
- }
- cmdstr[opt] = '\0';
-
- for (;;) {
- opt = getcmdopt(argc,argv,cmdstr,&argument);
- switch (opt) {
- case 'H':
- case 'h':
- case '?':
- return HELP;
- case ALLDONE:
- return ALLDONE;
- case INVALID:
- return INVALID;
- case PARAMETER:
- if (do_param == NULL)
- return INVALID;
- if (do_param(argv[nextargv],param_num) == INVALID)
- return INVALID;
- nextargv++;
- param_num++;
- break;
- default:
-
- /* Search for the option in the option array. We are
- * guaranteed to find it.
- */
-
- for (i = 0; i < num_opt; i++) {
- if (optarr[i].opt == opt)
- break;
- }
- if (optarr[i].type == OPT_SWITCH)
- *((ibool*)optarr[i].arg) = true;
- else {
- if (parse_option(&optarr[i],argument) == INVALID)
- return INVALID;
- }
- break;
- }
- }
-}
-
-/****************************************************************************
-HEADER:
-cmdline.h
-
-PARAMETERS:
-num_opt - Number of options in the table
-optarr - Table of option descriptions
-
-REMARKS:
-Prints the description of each option in a standard format to the standard
-output device. The description for each option is obtained from the table
-of options.
-****************************************************************************/
-void print_desc(
- int num_opt,
- Option optarr[])
-{
- int i;
-
- for (i = 0; i < num_opt; i++) {
- if (optarr[i].type == OPT_SWITCH)
- printf(" -%c %s\n",optarr[i].opt,optarr[i].desc);
- else
- printf(" -%c<arg> %s\n",optarr[i].opt,optarr[i].desc);
- }
-}
-
-/****************************************************************************
-HEADER:
-cmdline.h
-
-PARAMETERS:
-moduleName - Module name for program
-cmdLine - Command line to parse
-pargc - Pointer to 'argc' parameter
-pargv - Pointer to 'argv' parameter
-maxArgc - Maximum argv array index
-
-REMARKS:
-Parses a command line from a single string into the C style 'argc' and
-'argv' format. Most useful for Windows programs where the command line
-is passed in verbatim.
-****************************************************************************/
-int parse_commandline(
- char *moduleName,
- char *cmdLine,
- int *pargc,
- char *argv[],
- int maxArgv)
-{
- static char str[512];
- static char filename[260];
- char *prevWord = NULL;
- ibool inQuote = FALSE;
- ibool noStrip = FALSE;
- int argc;
-
- argc = 0;
- strcpy(filename,moduleName);
- argv[argc++] = filename;
- cmdLine = strncpy(str, cmdLine, sizeof(str)-1);
- while (*cmdLine) {
- switch (*cmdLine) {
- case '"' :
- if (prevWord != NULL) {
- if (inQuote) {
- if (!noStrip)
- *cmdLine = '\0';
- argv [argc++] = prevWord;
- prevWord = NULL;
- }
- else
- noStrip = TRUE;
- }
- inQuote = !inQuote;
- break;
- case ' ' :
- case '\t' :
- if (!inQuote) {
- if (prevWord != NULL) {
- *cmdLine = '\0';
- argv [argc++] = prevWord;
- prevWord = NULL;
- noStrip = FALSE;
- }
- }
- break;
- default :
- if (prevWord == NULL)
- prevWord = cmdLine;
- break;
- }
- if (argc >= maxArgv - 1)
- break;
- cmdLine++;
- }
-
- if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) {
- *cmdLine = '\0';
- argv [argc++] = prevWord;
- }
- argv[argc] = NULL;
-
- /* Return updated parameters */
- return (*pargc = argc);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gabeos.c b/board/MAI/bios_emulator/scitech/src/common/gabeos.c
deleted file mode 100644
index a934bd1..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gabeos.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- /* TODO: We may very well want to provide a system shared library */
- /* that eports the PM functions required by the Nucleus library */
- /* for BeOS here. That will eliminate fatal errors loading new */
- /* drivers on BeOS! */
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gados.c b/board/MAI/bios_emulator/scitech/src/common/gados.c
deleted file mode 100644
index d2be776..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gados.c
+++ /dev/null
@@ -1,135 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: MSDOS
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the MSDOS operating system.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-Nothing to do here for DOS. Basically since DOS has no system wide shared
-library mechanism we are essentially screwed if the binary API changes.
-By default for 32-bit DOS apps the local Nucleus drivers should always be
-used in preference to the system wide Nucleus drivers.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#if !defined(TEST_HARNESS) && !defined(VBETEST)
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the DOS
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/galib.c b/board/MAI/bios_emulator/scitech/src/common/galib.c
deleted file mode 100644
index f2eacc3..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/galib.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Any 32-bit protected mode environment
-*
-* Description: C module for the Graphics Accelerator Driver API. Uses
-* the SciTech PM library for interfacing with DOS
-* extender specific functions.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#include "sdd/sddhelp.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#endif
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#ifndef TEST_HARNESS
-GA_exports _VARAPI __GA_exports;
-static int loaded = false;
-static PE_MODULE *hModBPD = NULL;
-
-static N_imports _N_imports = {
- sizeof(N_imports),
- _OS_delay,
- };
-
-static GA_imports _GA_imports = {
- sizeof(GA_imports),
- GA_getSharedInfo,
- GA_TimerInit,
- GA_TimerRead,
- GA_TimerDifference,
- };
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-#define DLL_NAME "graphics.bpd"
-
-/****************************************************************************
-REMARKS:
-This function is no longer used but we must implement it and return NULL
-for compatibility with older binary drivers.
-****************************************************************************/
-GA_sharedInfo * NAPI GA_getSharedInfo(
- int device)
-{
- return NULL;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Fatal error handler for non-exported GA_exports.
-****************************************************************************/
-static void _GA_fatalErrorHandler(void)
-{
- PM_fatalError("Unsupported Nucleus export function called! Please upgrade your copy of Nucleus!\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-shared - True to load the driver into shared memory.
-
-REMARKS:
-Loads the Nucleus binary portable DLL into memory and initilises it.
-****************************************************************************/
-static ibool LoadDriver(
- ibool shared)
-{
- GA_initLibrary_t GA_initLibrary;
- GA_exports *gaExp;
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
- int i,max;
- ulong *p;
-
- /* Check if we have already loaded the driver */
- if (loaded)
- return true;
- PM_init();
-
- /* First try to see if we can find the system wide shared exports
- * if they are available. Under OS/2 this connects to our global
- * shared Nucleus loader in SDDPMI.DLL.
- */
- __GA_exports.dwSize = sizeof(__GA_exports);
- if (GA_getSharedExports(&__GA_exports,shared))
- return loaded = true;
-
- /* Open the BPD file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL)
- return false;
- if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL)
- return false;
- bpdpath[strlen(bpdpath)-1] = 0;
- if (strcmp(bpdpath,PM_getNucleusPath()) == 0)
- strcpy(bpdpath,PM_getNucleusConfigPath());
- else {
- PM_backslash(bpdpath);
- strcat(bpdpath,"config");
- }
- if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL)
- PM_fatalError("GA_initLibrary failed!\n");
-
- /* Initialize all default imports to point to fatal error handler
- * for upwards compatibility, and copy the exported functions.
- */
- max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t);
- for (i = 0,p = (ulong*)&__GA_exports; i < max; i++)
- *p++ = (ulong)_GA_fatalErrorHandler;
- memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize));
- loaded = true;
- return true;
-}
-
-/* The following are stub entry points that the application calls to
- * initialise the Nucleus loader library, and we use this to load our
- * driver DLL from disk and initialise the library using it.
- */
-
-/* {secret} */
-int NAPI GA_status(void)
-{
- if (!loaded)
- return nDriverNotFound;
- return __GA_exports.GA_status();
-}
-
-/* {secret} */
-const char * NAPI GA_errorMsg(
- N_int32 status)
-{
- if (!loaded)
- return "Unable to load Nucleus device driver!";
- return __GA_exports.GA_errorMsg(status);
-}
-
-/* {secret} */
-int NAPI GA_getDaysLeft(N_int32 shared)
-{
- if (!LoadDriver(shared))
- return -1;
- return __GA_exports.GA_getDaysLeft(shared);
-}
-
-/* {secret} */
-int NAPI GA_registerLicense(uchar *license,N_int32 shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_registerLicense(license,shared);
-}
-
-/* {secret} */
-ibool NAPI GA_loadInGUI(N_int32 shared)
-{
- if (!LoadDriver(shared))
- return false;
- return __GA_exports.GA_loadInGUI(shared);
-}
-
-/* {secret} */
-int NAPI GA_enumerateDevices(N_int32 shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_enumerateDevices(shared);
-}
-
-/* {secret} */
-GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared)
-{
- if (!LoadDriver(shared))
- return NULL;
- return __GA_exports.GA_loadDriver(deviceIndex,shared);
-}
-
-/* {secret} */
-void NAPI GA_getGlobalOptions(
- GA_globalOptions *options,
- ibool shared)
-{
- if (LoadDriver(shared))
- __GA_exports.GA_getGlobalOptions(options,shared);
-}
-
-/* {secret} */
-PE_MODULE * NAPI GA_loadLibrary(
- const char *szBPDName,
- ulong *size,
- ibool shared)
-{
- if (!LoadDriver(shared))
- return NULL;
- return __GA_exports.GA_loadLibrary(szBPDName,size,shared);
-}
-
-/* {secret} */
-GA_devCtx * NAPI GA_getCurrentDriver(
- N_int32 deviceIndex)
-{
- /* Bail for older drivers that didn't export this function! */
- if (!__GA_exports.GA_getCurrentDriver)
- return NULL;
- return __GA_exports.GA_getCurrentDriver(deviceIndex);
-}
-
-/* {secret} */
-REF2D_driver * NAPI GA_getCurrentRef2d(
- N_int32 deviceIndex)
-{
- /* Bail for older drivers that didn't export this function! */
- if (!__GA_exports.GA_getCurrentRef2d)
- return NULL;
- return __GA_exports.GA_getCurrentRef2d(deviceIndex);
-}
-
-/* {secret} */
-int NAPI GA_isOEMVersion(ibool shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_isOEMVersion(shared);
-}
-
-/* {secret} */
-N_uint32 * NAPI GA_getLicensedDevices(ibool shared)
-{
- if (!LoadDriver(shared))
- return 0;
- return __GA_exports.GA_getLicensedDevices(shared);
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/common/galinux.c b/board/MAI/bios_emulator/scitech/src/common/galinux.c
deleted file mode 100644
index 47e4e85..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/galinux.c
+++ /dev/null
@@ -1,148 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Linux operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <sys/time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- /* TODO: We may very well want to provide a system shared library */
- /* that eports the PM functions required by the Nucleus library */
- /* for Linux here. That will eliminate fatal errors loading new */
- /* drivers on Linux! */
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timeval t;
- gettimeofday(&t, NULL);
- value->low = t.tv_sec*1000000 + t.tv_usec;
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c b/board/MAI/bios_emulator/scitech/src/common/gantdrv.c
deleted file mode 100644
index 050f737..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: NT device driver
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the NT device drivers.
-*
-****************************************************************************/
-
-#include "sdd/sddhelp.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- KeQuerySystemTime((LARGE_INTEGER*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gaos2.c b/board/MAI/bios_emulator/scitech/src/common/gaos2.c
deleted file mode 100644
index 26e6503..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gaos2.c
+++ /dev/null
@@ -1,248 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: OS/2 32-bit
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the OS/2 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-
-/*--------------------------- Global variables ----------------------------*/
-
-static ibool haveRDTSC = false;
-static ulong parms[3]; /* Must not cross 64Kb boundary! */
-static ulong result[4]; /* Must not cross 64Kb boundary! */
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-func - Helper device driver function to call
-
-RETURNS:
-First return value from the device driver in parmsOut[0]
-
-REMARKS:
-Function to open our helper device driver, call it and close the file
-handle. Note that we have to open the device driver for every call because
-of two problems:
-
- 1. We cannot open a single file handle in a DLL that is shared amongst
- programs, since every process must have it's own open file handle.
-
- 2. For some reason there appears to be a limit of about 12 open file
- handles on a device driver in the system. Hence when we open more
- than about 12 file handles things start to go very strange.
-
-Hence we simply open the file handle every time that we need to call the
-device driver to work around these problems.
-****************************************************************************/
-static ulong CallSDDHelp(
- int func)
-{
- static ulong inLen; /* Must not cross 64Kb boundary! */
- static ulong outLen; /* Must not cross 64Kb boundary! */
- HFILE hSDDHelp;
-
- /* If this code in here fails, we are screwed! Many of our drivers
- * use this code and don't have a C library, so we simply assume we
- * can't fail here.
- */
- DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL);
- DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
- &parms, inLen = sizeof(parms), &inLen,
- &result, outLen = sizeof(result), &outLen);
- DosClose(hSDDHelp);
- return result[0];
-}
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-For OS/2 we don't need to do anything special because Nucleus is always
-loaded via the shared SDDPMI driver when SDD is loaded so we don't need
-a system wide PM library imports function.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-PARAMETERS:
-gaExp - Place to store the exported functions
-shared - True if connecting to the shared, global Nucleus driver
-
-REMARKS:
-For OS/2 if SDD is loaded we *always* connect to the shared Nucleus functions
-contained within the SDDPMI driver. This allows the Nucleus functions contained
-within this driver to be utilised by all Nucleus apps in the system and
-maintains a consistent state between versions.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- /* In test harness mode, we need to load a local copy of Nucleus */
-#if !defined (TEST_HARNESS) || defined (DEBUG_SDDPMI)
- HMODULE hModSDDPMI;
- char buf[80];
- GA_exports *exp;
-
- /* Initialise the PM library and connect to our runtime DLL's */
- PM_init();
- if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) {
- /* We have found the shared Nucleus exports. Because not all processes
- * map to SDDPMI.DLL, we need to ensure that we connect to this
- * DLL so that it gets mapped into our address space (that is
- * where the shared Nucleus loader code is located). Simply doing a
- * DosLoadModule on it is enough for this.
- */
- DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI);
- exp = (GA_exports*)result[0];
- memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
- return true;
- }
-#endif
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- DosTmrQueryTime((QWORD*)value);
-}
-
-/****************************************************************************
-REMARKS:
-On OS/2, we need special memory allocation functions if we build SDDPMI in
-test harness mode. But if we build GATest etc. in test mode, we want to use
-the normal C runtime functions, so route them back here.
-****************************************************************************/
-
-#if defined (TEST_HARNESS) && !defined (DEBUG_SDDPMI)
-
-/* Undefine these macros first or we'll recurse to hell! */
-#undef malloc
-#undef calloc
-#undef realloc
-#undef free
-
-void *SDDPMI_malloc(size_t size) {
- return malloc(size);
-}
-
-void *SDDPMI_calloc(size_t num, size_t size) {
- return calloc(num, size);
-}
-
-void SDDPMI_free(void *ptr) {
- free(ptr);
-}
-
-void *SDDPMI_realloc(void *ptr, size_t size) {
- return realloc(ptr, size);
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c b/board/MAI/bios_emulator/scitech/src/common/gaqnx.c
deleted file mode 100644
index 525d662..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c
+++ /dev/null
@@ -1,149 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the QNX operating system.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-#include <time.h>
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- /* TODO: We may very well want to provide a system shared library */
- /* that eports the PM functions required by the Nucleus library */
- /* for QNX here. That will eliminate fatal errors loading new */
- /* drivers on QNX! */
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- haveRDTSC = true;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else {
- struct timespec ts;
-
- clock_gettime(CLOCK_REALTIME, &ts);
- value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
- value->high = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gartt.c b/board/MAI/bios_emulator/scitech/src/common/gartt.c
deleted file mode 100644
index 3a41f59..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gartt.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the RTTarget-32 operating system environments.
-*
-****************************************************************************/
-
-#include "nucleus/graphics.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gasmx.c b/board/MAI/bios_emulator/scitech/src/common/gasmx.c
deleted file mode 100644
index ae31941..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gasmx.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: smx32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the smx32 platform -- no vxD support.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "nucleus/graphics.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- _GA_readTimeStamp(value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gavxd.c b/board/MAI/bios_emulator/scitech/src/common/gavxd.c
deleted file mode 100644
index fc8ba8d..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gavxd.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32 VxD
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 VxD's.
-*
-****************************************************************************/
-
-#include "sdd/sddhelp.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-static ibool haveRDTSC;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- PM_setLocalBPDPath(path);
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- return &_PM_imports;
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- (void)gaExp;
- (void)shared;
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- VTD_Get_Real_Time(&value->high,&value->low);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gawin32.c b/board/MAI/bios_emulator/scitech/src/common/gawin32.c
deleted file mode 100644
index 6944334..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gawin32.c
+++ /dev/null
@@ -1,255 +0,0 @@
-/****************************************************************************
-*
-* SciTech Nucleus Graphics Architecture
-*
-* Copyright (C) 1991-1998 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code contains proprietary technology |
-* |owned by SciTech Software, Inc., located at 505 Wall Street, |
-* |Chico, CA 95928 USA (http://www.scitechsoft.com). |
-* | |
-* |The contents of this file are subject to the SciTech Nucleus |
-* |License; you may *not* use this file or related software except in |
-* |compliance with the License. You may obtain a copy of the License |
-* |at http://www.scitechsoft.com/nucleus-license.txt |
-* | |
-* |Software distributed under the License is distributed on an |
-* |"AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or |
-* |implied. See the License for the specific language governing |
-* |rights and limitations under the License. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: OS specific Nucleus Graphics Architecture services for
-* the Win32 operating system environments.
-*
-****************************************************************************/
-
-#include "pm_help.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#define STRICT
-#define WIN32_LEAN_AND_MEAN
-#include <windows.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-#define DLL_NAME "nga_w32.dll"
-
-extern HANDLE _PM_hDevice;
-static HMODULE hModDLL = NULL;
-static ibool useRing0Driver = false;
-static ibool haveRDTSC;
-static GA_largeInteger countFreq;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Loads the shared "nga_w32.dll" library from disk and connects to it. This
-library is *always* located in the same directory as the Nucleus
-graphics.bpd file.
-****************************************************************************/
-static ibool LoadSharedDLL(void)
-{
- char filename[PM_MAX_PATH];
- char bpdpath[PM_MAX_PATH];
-
- /* Check if we have already loaded the DLL */
- if (hModDLL)
- return true;
- PM_init();
-
- /* Open the DLL file */
- if (!PM_findBPD(DLL_NAME,bpdpath))
- return false;
- strcpy(filename,bpdpath);
- strcat(filename,DLL_NAME);
- if ((hModDLL = LoadLibrary(filename)) == NULL)
- return false;
- return true;
-}
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable.
-
-Note that for Win32 we also call into the loaded PMHELP device driver
-as necessary to change the local Nucleus path for system wide Nucleus
-drivers.
-****************************************************************************/
-void NAPI GA_setLocalPath(
- const char *path)
-{
- DWORD inBuf[1];
- DWORD outBuf[1],outCnt;
-
- PM_setLocalBPDPath(path);
- if (_PM_hDevice != INVALID_HANDLE_VALUE) {
- inBuf[0] = (DWORD)path;
- DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32,
- inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL);
- }
-}
-
-/****************************************************************************
-RETURNS:
-Pointer to the system wide PM library imports, or the internal version if none
-
-REMARKS:
-In order to support deploying new Nucleus drivers that may require updated
-PM library functions, we check here to see if there is a system wide version
-of the PM functions available. If so we return those functions for use with
-the system wide Nucleus drivers, otherwise the compiled in version of the PM
-library is used with the application local version of Nucleus.
-****************************************************************************/
-PM_imports * NAPI GA_getSystemPMImports(void)
-{
- PM_imports * pmImp;
- PM_imports * (NAPIP _GA_getSystemPMImports)(void);
-
- if (LoadSharedDLL()) {
- /* Note that Visual C++ build DLL's with only a single underscore in front
- * of the exported name while Watcom C provides two of them. We check for
- * both to allow working with either compiled DLL.
- */
- if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) {
- if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) {
- pmImp = _GA_getSystemPMImports();
- memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize));
- return pmImp;
- }
- }
- }
- return &_PM_imports;
-}
-
-/****************************************************************************
-PARAMETERS:
-gaExp - Place to store the exported functions
-shared - True if connecting to the shared, global Nucleus driver
-
-REMARKS:
-For Win32 if we are connecting to the shared, global Nucleus driver (loaded
-at ring 0) then we need to load a special nga_w32.dll library which contains
-thunks to call down into the Ring 0 device driver as necessary. If we are
-connecting to the application local Nucleus drivers (ie: Nucleus on DirectDraw
-emulation layer) then we do nothing here.
-****************************************************************************/
-ibool NAPI GA_getSharedExports(
- GA_exports *gaExp,
- ibool shared)
-{
- GA_exports * exp;
- GA_exports * (NAPIP _GA_getSystemGAExports)(void);
-
- useRing0Driver = false;
- if (shared) {
- if (!LoadSharedDLL())
- PM_fatalError("Unable to load " DLL_NAME "!");
- if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL)
- if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL)
- PM_fatalError("Unable to load " DLL_NAME "!");
- exp = _GA_getSystemGAExports();
- memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize));
- useRing0Driver = true;
- return true;
- }
- return false;
-}
-
-#ifndef TEST_HARNESS
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI GA_queryFunctions(
- GA_devCtx *dc,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL;
-
- if (useRing0Driver) {
- /* Call the version in nga_w32.dll if it is loaded */
- if (!_GA_queryFunctions) {
- if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL)
- if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL)
- PM_fatalError("Unable to get exports from " DLL_NAME "!");
- }
- return _GA_queryFunctions(dc,id,funcs);
- }
- return __GA_exports.GA_queryFunctions(dc,id,funcs);
-}
-
-/****************************************************************************
-REMARKS:
-Nothing special for this OS
-****************************************************************************/
-ibool NAPI REF2D_queryFunctions(
- REF2D_driver *ref2d,
- N_uint32 id,
- void _FAR_ *funcs)
-{
- static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL;
-
- if (useRing0Driver) {
- /* Call the version in nga_w32.dll if it is loaded */
- if (!_REF2D_queryFunctions) {
- if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL)
- if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL)
- PM_fatalError("Unable to get exports from " DLL_NAME "!");
- }
- return _REF2D_queryFunctions(ref2d,id,funcs);
- }
- return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function initialises the high precision timing functions for the
-Nucleus loader library.
-****************************************************************************/
-ibool NAPI GA_TimerInit(void)
-{
- if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) {
- haveRDTSC = true;
- return true;
- }
- else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) {
- haveRDTSC = false;
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-This function reads the high resolution timer.
-****************************************************************************/
-void NAPI GA_TimerRead(
- GA_largeInteger *value)
-{
- if (haveRDTSC)
- _GA_readTimeStamp(value);
- else
- QueryPerformanceCounter((LARGE_INTEGER*)value);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c b/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
deleted file mode 100644
index 1d547e9..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c
+++ /dev/null
@@ -1,436 +0,0 @@
-/****************************************************************************
-*
-* VESA Generalized Timing Formula (GTF)
-* Version 1.1
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Developed by: SciTech Software, Inc.
-*
-* Language: ANSI C
-* Environment: Any.
-*
-* Description: C module for generating GTF compatible timings given a set
-* of input requirements. Translated from the original GTF
-* 1.14 spreadsheet definition.
-*
-* Compile with #define TESTING to build a command line test
-* program.
-*
-* NOTE: The code in here has been written for clarity and
-* to follow the original GTF spec as closely as
-* possible.
-*
-****************************************************************************/
-
-#include "gtf.h"
-#ifndef __WIN32_VXD__
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <ctype.h>
-#include <math.h>
-#endif
-
-/*------------------------- Global Variables ------------------------------*/
-
-static GTF_constants GC = {
- 1.8, /* Margin size as percentage of display */
- 8, /* Character cell granularity */
- 1, /* Minimum front porch in lines/chars */
- 3, /* Width of V sync in lines */
- 8, /* Width of H sync as percent of total */
- 550, /* Minimum vertical sync + back porch (us) */
- 600, /* Blanking formula gradient */
- 40, /* Blanking formula offset */
- 128, /* Blanking formula scaling factor */
- 20, /* Blanking formula scaling factor weight */
- };
-
-/*-------------------------- Implementation -------------------------------*/
-
-#ifdef __WIN32_VXD__
-/* These functions are not supported in a VxD, so we stub them out so this
- * module will at least compile. Calling the functions in here will do
- * something wierd!
- */
-double sqrt(double x)
-{ return x; }
-
-double floor(double x)
-{ return x; }
-
-double pow(double x,double y)
-{ return x*y; }
-#endif
-
-static double round(double v)
-{
- return floor(v + 0.5);
-}
-
-static void GetInternalConstants(GTF_constants *c)
-/****************************************************************************
-*
-* Function: GetInternalConstants
-* Parameters: c - Place to store the internal constants
-*
-* Description: Calculates the rounded, internal set of GTF constants.
-* These constants are different to the real GTF constants
-* that can be set up for the monitor. The calculations to
-* get these real constants are defined in the 'Work Area'
-* after the constants are defined in the Excel spreadsheet.
-*
-****************************************************************************/
-{
- c->margin = GC.margin;
- c->cellGran = round(GC.cellGran);
- c->minPorch = round(GC.minPorch);
- c->vSyncRqd = round(GC.vSyncRqd);
- c->hSync = GC.hSync;
- c->minVSyncBP = GC.minVSyncBP;
- if (GC.k == 0)
- c->k = 0.001;
- else
- c->k = GC.k;
- c->m = (c->k / 256) * GC.m;
- c->c = (GC.c - GC.j) * (c->k / 256) + GC.j;
- c->j = GC.j;
-}
-
-void GTF_calcTimings(double hPixels,double vLines,double freq,
- int type,ibool wantMargins,ibool wantInterlace,GTF_timings *t)
-/****************************************************************************
-*
-* Function: GTF_calcTimings
-* Parameters: hPixels - X resolution
-* vLines - Y resolution
-* freq - Frequency (Hz, KHz or MHz depending on type)
-* type - 1 - vertical, 2 - horizontal, 3 - dot clock
-* margins - True if margins should be generated
-* interlace - True if interlaced timings to be generated
-* t - Place to store the resulting timings
-*
-* Description: Calculates a set of GTF timing parameters given a specified
-* resolution and vertical frequency. The horizontal frequency
-* and dot clock will be automatically generated by this
-* routines.
-*
-* For interlaced modes the CRTC parameters are calculated for
-* a single field, so will be half what would be used in
-* a non-interlaced mode.
-*
-****************************************************************************/
-{
- double interlace,vFieldRate,hPeriod;
- double topMarginLines,botMarginLines;
- double leftMarginPixels,rightMarginPixels;
- double hPeriodEst,vSyncBP,vBackPorch;
- double vTotalLines,vFieldRateEst;
- double hTotalPixels,hTotalActivePixels,hBlankPixels;
- double idealDutyCycle,hSyncWidth,hSyncBP,hBackPorch;
- double idealHPeriod;
- double vFreq,hFreq,dotClock;
- GTF_constants c;
-
- /* Get rounded GTF constants used for internal calculations */
- GetInternalConstants(&c);
-
- /* Move input parameters into appropriate variables */
- vFreq = hFreq = dotClock = freq;
-
- /* Round pixels to character cell granularity */
- hPixels = round(hPixels / c.cellGran) * c.cellGran;
-
- /* For interlaced mode halve the vertical parameters, and double
- * the required field refresh rate.
- */
- vFieldRate = vFreq;
- interlace = 0;
- if (wantInterlace)
- dotClock *= 2;
-
- /* Determine the lines for margins */
- if (wantMargins) {
- topMarginLines = round(c.margin / 100 * vLines);
- botMarginLines = round(c.margin / 100 * vLines);
- }
- else {
- topMarginLines = 0;
- botMarginLines = 0;
- }
-
- if (type != GTF_lockPF) {
- if (type == GTF_lockVF) {
- /* Estimate the horizontal period */
- hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) /
- (vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000;
-
- /* Find the number of lines in vSync + back porch */
- vSyncBP = round(c.minVSyncBP / hPeriodEst);
- }
- else if (type == GTF_lockHF) {
- /* Find the number of lines in vSync + back porch */
- vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
- }
-
- /* Find the number of lines in the V back porch alone */
- vBackPorch = vSyncBP - c.vSyncRqd;
-
- /* Find the total number of lines in the vertical period */
- vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
- + interlace + c.minPorch;
-
- if (type == GTF_lockVF) {
- /* Estimate the vertical frequency */
- vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines);
-
- /* Find the actual horizontal period */
- hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate;
-
- /* Find the actual vertical field frequency */
- vFieldRate = 1000000 / (hPeriod * vTotalLines);
- }
- else if (type == GTF_lockHF) {
- /* Find the actual vertical field frequency */
- vFieldRate = (hFreq / vTotalLines) * 1000;
- }
- }
-
- /* Find the number of pixels in the left and right margins */
- if (wantMargins) {
- leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
- rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran);
- }
- else {
- leftMarginPixels = 0;
- rightMarginPixels = 0;
- }
-
- /* Find the total number of active pixels in image + margins */
- hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels;
-
- if (type == GTF_lockVF) {
- /* Find the ideal blanking duty cycle */
- idealDutyCycle = c.c - ((c.m * hPeriod) / 1000);
- }
- else if (type == GTF_lockHF) {
- /* Find the ideal blanking duty cycle */
- idealDutyCycle = c.c - (c.m / hFreq);
- }
- else if (type == GTF_lockPF) {
- /* Find ideal horizontal period from blanking duty cycle formula */
- idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) +
- (0.4 * c.m * (hTotalActivePixels + rightMarginPixels +
- leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000;
-
- /* Find the ideal blanking duty cycle */
- idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000);
- }
-
- /* Find the number of pixels in blanking time */
- hBlankPixels = round((hTotalActivePixels * idealDutyCycle) /
- ((100 - idealDutyCycle) * c.cellGran)) * c.cellGran;
-
- /* Find the total number of pixels */
- hTotalPixels = hTotalActivePixels + hBlankPixels;
-
- /* Find the horizontal back porch */
- hBackPorch = round((hBlankPixels / 2) / c.cellGran) * c.cellGran;
-
- /* Find the horizontal sync width */
- hSyncWidth = round(((c.hSync/100) * hTotalPixels) / c.cellGran) * c.cellGran;
-
- /* Find the horizontal sync + back porch */
- hSyncBP = hBackPorch + hSyncWidth;
-
- if (type == GTF_lockPF) {
- /* Find the horizontal frequency */
- hFreq = (dotClock / hTotalPixels) * 1000;
-
- /* Find the number of lines in vSync + back porch */
- vSyncBP = round((c.minVSyncBP * hFreq) / 1000);
-
- /* Find the number of lines in the V back porch alone */
- vBackPorch = vSyncBP - c.vSyncRqd;
-
- /* Find the total number of lines in the vertical period */
- vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP
- + interlace + c.minPorch;
-
- /* Find the actual vertical field frequency */
- vFieldRate = (hFreq / vTotalLines) * 1000;
- }
- else {
- if (type == GTF_lockVF) {
- /* Find the horizontal frequency */
- hFreq = 1000 / hPeriod;
- }
- else if (type == GTF_lockHF) {
- /* Find the horizontal frequency */
- hPeriod = 1000 / hFreq;
- }
-
- /* Find the pixel clock frequency */
- dotClock = hTotalPixels / hPeriod;
- }
-
- /* Return the computed frequencies */
- t->vFreq = vFieldRate;
- t->hFreq = hFreq;
- t->dotClock = dotClock;
-
- /* Determine the vertical timing parameters */
- t->h.hTotal = (int)hTotalPixels;
- t->h.hDisp = (int)hTotalActivePixels;
- t->h.hSyncStart = t->h.hTotal - (int)hSyncBP;
- t->h.hSyncEnd = t->h.hTotal - (int)hBackPorch;
- t->h.hFrontPorch = t->h.hSyncStart - t->h.hDisp;
- t->h.hSyncWidth = (int)hSyncWidth;
- t->h.hBackPorch = (int)hBackPorch;
-
- /* Determine the vertical timing parameters */
- t->v.vTotal = (int)vTotalLines;
- t->v.vDisp = (int)vLines;
- t->v.vSyncStart = t->v.vTotal - (int)vSyncBP;
- t->v.vSyncEnd = t->v.vTotal - (int)vBackPorch;
- t->v.vFrontPorch = t->v.vSyncStart - t->v.vDisp;
- t->v.vSyncWidth = (int)c.vSyncRqd;
- t->v.vBackPorch = (int)vBackPorch;
- if (wantInterlace) {
- /* Halve the timings for interlaced modes */
- t->v.vTotal /= 2;
- t->v.vDisp /= 2;
- t->v.vSyncStart /= 2;
- t->v.vSyncEnd /= 2;
- t->v.vFrontPorch /= 2;
- t->v.vSyncWidth /= 2;
- t->v.vBackPorch /= 2;
- t->dotClock /= 2;
- }
-
- /* Mark as GTF timing using the sync polarities */
- t->interlace = (wantInterlace) ? 'I' : 'N';
- t->hSyncPol = '-';
- t->vSyncPol = '+';
-}
-
-void GTF_getConstants(GTF_constants *constants)
-{ *constants = GC; }
-
-void GTF_setConstants(GTF_constants *constants)
-{ GC = *constants; }
-
-#ifdef TESTING_GTF
-
-void main(int argc,char *argv[])
-{
- FILE *f;
- double xPixels,yPixels,freq;
- ibool interlace;
- GTF_timings t;
-
- if (argc != 5 && argc != 6) {
- printf("Usage: GTFCALC <xPixels> <yPixels> <freq> [[Hz] [KHz] [MHz]] [I]\n");
- printf("\n");
- printf("where <xPixels> is the horizontal resolution of the mode, <yPixels> is the\n");
- printf("vertical resolution of the mode. The <freq> value will be the frequency to\n");
- printf("drive the calculations, and will be either the vertical frequency (in Hz)\n");
- printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n");
- printf("timings for an interlaced mode, add 'I' to the end of the command line.\n");
- printf("\n");
- printf("For example to generate timings for 640x480 at 60Hz vertical:\n");
- printf("\n");
- printf(" GTFCALC 640 480 60 Hz\n");
- printf("\n");
- printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n");
- printf("\n");
- printf(" GTFCALC 640 480 31.5 KHz\n");
- printf("\n");
- printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n");
- printf("\n");
- printf(" GTFCALC 640 480 25.175 MHz\n");
- printf("\n");
- printf("GTFCALC will print a summary of the results found, and dump the CRTC\n");
- printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n");
- exit(1);
- }
-
- /* Get values from command line */
- xPixels = atof(argv[1]);
- yPixels = atof(argv[2]);
- freq = atof(argv[3]);
- interlace = ((argc == 6) && (argv[5][0] == 'I'));
-
- /* Compute the CRTC timings */
- if (toupper(argv[4][0]) == 'H')
- GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t);
- else if (toupper(argv[4][0]) == 'K')
- GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t);
- else if (toupper(argv[4][0]) == 'M')
- GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t);
- else {
- printf("Unknown command line!\n");
- exit(1);
- }
-
- /* Dump summary info to standard output */
- printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]);
- printf("\n");
- printf(" hTotal = %-4d vTotal = %-4d\n",
- t.h.hTotal, t.v.vTotal);
- printf(" hDisp = %-4d vDisp = %-4d\n",
- t.h.hDisp, t.v.vDisp);
- printf(" hSyncStart = %-4d vSyncStart = %-4d\n",
- t.h.hSyncStart, t.v.vSyncStart);
- printf(" hSyncEnd = %-4d vSyncEnd = %-4d\n",
- t.h.hSyncEnd, t.v.vSyncEnd);
- printf(" hFrontPorch = %-4d vFrontPorch = %-4d\n",
- t.h.hFrontPorch, t.v.vFrontPorch);
- printf(" hSyncWidth = %-4d vSyncWidth = %-4d\n",
- t.h.hSyncWidth, t.v.vSyncWidth);
- printf(" hBackPorch = %-4d vBackPorch = %-4d\n",
- t.h.hBackPorch, t.v.vBackPorch);
- printf("\n");
- printf(" Interlaced = %s\n", (t.interlace == 'I') ? "Yes" : "No");
- printf(" H sync pol = %c\n", t.hSyncPol);
- printf(" V sync pol = %c\n", t.vSyncPol);
- printf("\n");
- printf(" Vert freq = %.2f Hz\n", t.vFreq);
- printf(" Horiz freq = %.2f KHz\n", t.hFreq);
- printf(" Dot Clock = %.2f Mhz\n", t.dotClock);
-
- /* Dump to file in format used by SciTech Display Doctor */
- if ((f = fopen("UVCONFIG.CRT","w")) != NULL) {
- fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels);
- fprintf(f, "%d %d %d %d '%c' %s\n",
- t.h.hTotal, t.h.hDisp,
- t.h.hSyncStart, t.h.hSyncEnd,
- t.hSyncPol, (t.interlace == 'I') ? "I" : "NI");
- fprintf(f, "%d %d %d %d '%c'\n",
- t.v.vTotal, t.v.vDisp,
- t.v.vSyncStart, t.v.vSyncEnd,
- t.vSyncPol);
- fprintf(f, "%.2f\n", t.dotClock);
- fclose(f);
- }
-}
-
-#endif /* TESTING */
diff --git a/board/MAI/bios_emulator/scitech/src/common/libcimp.c b/board/MAI/bios_emulator/scitech/src/common/libcimp.c
deleted file mode 100644
index ab73ad5..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/libcimp.c
+++ /dev/null
@@ -1,827 +0,0 @@
-/****************************************************************************
-*
-* SciTech MGL Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module to implement a the OS specific side of the Binary
-* Portable DLL C runtime library. The functions in here
-* are imported into the Binary Portable DLL's to implement
-* OS specific services.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#include "drvlib/peloader.h"
-#include "drvlib/attrib.h"
-#include "drvlib/libc/init.h"
-#define __BUILDING_PE_LOADER__
-#include "drvlib/libc/file.h"
-#if defined(__WIN32_VXD__)
-#include "vxdfile.h"
-#endif
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <malloc.h>
-#include <time.h>
-#include <signal.h>
-#include <fcntl.h>
-#if defined(__GNUC__) || defined(__UNIX__)
-#include <unistd.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#else
-#include <io.h>
-#endif
-#include "drvlib/attrib.h"
-#include "drvlib/libc/init.h"
-#define __BUILDING_PE_LOADER__
-#include "drvlib/libc/file.h"
-#if defined(__WINDOWS__) || defined(TNT) || defined(__RTTARGET__)
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#endif
-#ifdef __MSDOS__
-#include <dos.h>
-#endif
-#ifdef __OS2__
-#define INCL_DOS
-#define INCL_DOSERRORS
-#define INCL_SUB
-#include <os2.h>
-#endif
-#endif
-
-/* No text or binary modes for Unix */
-
-#ifndef O_BINARY
-#define O_BINARY 0
-#define O_TEXT 0
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#define MAX_FILES 16
-static FILE *openHandles[MAX_FILES] = {NULL};
-#endif
-
-/* <stdlib.h> stub functions */
-void _CDECL stub_abort(void);
-int _CDECL stub_atexit(void (*)(void));
-void * _CDECL stub_calloc(size_t _nelem, size_t _size);
-void _CDECL stub_exit(int _status);
-void _CDECL stub_free(void *_ptr);
-char * _CDECL stub_getenv(const char *_name);
-void * _CDECL stub_malloc(size_t _size);
-void * _CDECL stub_realloc(void *_ptr, size_t _size);
-int _CDECL stub_system(const char *_s);
-int _CDECL stub_putenv(const char *_val);
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode);
-int _CDECL stub_access(const char *_path, int _amode);
-int _CDECL stub_close(int _fildes);
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence);
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte);
-int _CDECL stub_unlink(const char *_path);
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte);
-int _CDECL stub_isatty(int _fildes);
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename);
-int _CDECL stub_rename(const char *_old, const char *_new);
-
-/* <time.h> stub functions */
-time_t _CDECL stub_time(time_t *_tod);
-
-/* <signal.h> stub functions */
-int _CDECL stub_raise(int);
-void * _CDECL stub_signal(int, void *);
-
-/* <drvlib/attrib.h> functions */
-#define stub_OS_setfileattr _OS_setfileattr
-#define stub_OS_getcurrentdate _OS_getcurrentdate
-
-LIBC_imports _VARAPI ___imports = {
- sizeof(LIBC_imports),
-
- /* <stdlib.h> exports */
- stub_abort,
- stub_atexit,
- stub_calloc,
- stub_exit,
- stub_free,
- stub_getenv,
- stub_malloc,
- stub_realloc,
- stub_system,
- stub_putenv,
-
- /* <libc/file.h> exports */
- stub_open,
- stub_access,
- stub_close,
- stub_lseek,
- stub_read,
- stub_unlink,
- stub_write,
- stub_isatty,
-
- /* <stdio.h> exports */
- stub_remove,
- stub_rename,
-
- /* <signal.h> functions */
- stub_raise,
- stub_signal,
-
- /* <time.h> exports */
- stub_time,
-
- /* <drvlib/attrib.h> exports */
- stub_OS_setfileattr,
- stub_OS_getcurrentdate,
- };
-
-/*---------------------- Stub function implementation ---------------------*/
-
-/* <stdlib.h> stub functions */
-void _CDECL stub_abort(void)
-{
-#if !defined( __WIN32_VXD__) && !defined(__NT_DRIVER__)
- abort();
-#endif
-}
-
-int _CDECL stub_atexit(void (*func)(void))
-{
-#if !defined( __WIN32_VXD__) && !defined(__NT_DRIVER__)
- return atexit((void(*)(void))func);
-#else
- return -1;
-#endif
-}
-
-void * _CDECL stub_calloc(size_t _nelem, size_t _size)
-{ return __PM_calloc(_nelem,_size); }
-
-void _CDECL stub_exit(int _status)
-{
-#if !defined( __WIN32_VXD__) && !defined(__NT_DRIVER__)
- exit(_status);
-#endif
-}
-
-void _CDECL stub_free(void *_ptr)
-{ __PM_free(_ptr); }
-
-char * _CDECL stub_getenv(const char *_name)
-{
-#if defined( __WIN32_VXD__) || defined(__NT_DRIVER__)
- return NULL;
-#else
- return getenv(_name);
-#endif
-}
-
-void * _CDECL stub_malloc(size_t _size)
-{ return __PM_malloc(_size); }
-
-void * _CDECL stub_realloc(void *_ptr, size_t _size)
-{ return __PM_realloc(_ptr,_size); }
-
-int _CDECL stub_system(const char *_s)
-{
-#if defined(__WINDOWS__) || defined(__WIN32_VXD__) || defined(__NT_DRIVER__) || defined(__SMX32__) || defined(__RTTARGET__)
- (void)_s;
- return -1;
-#else
- return system(_s);
-#endif
-}
-
-int _CDECL stub_putenv(const char *_val)
-{
-#if defined( __WIN32_VXD__) || defined(__NT_DRIVER__)
- return -1;
-#else
- return putenv((char*)_val);
-#endif
-}
-
-time_t _CDECL stub_time(time_t *_tod)
-{
-#if defined( __WIN32_VXD__) || defined(__NT_DRIVER__)
- return 0;
-#else
- return time(_tod);
-#endif
-}
-
-#if defined(__MSDOS__)
-
-#if defined(TNT) && defined(_MSC_VER)
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ SetFileAttributes((LPSTR)filename, (DWORD)attrib); }
-
-#else
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ _dos_setfileattr(filename,attrib); }
-
-#endif
-
-#elif defined(__WIN32_VXD__)
-
-#define USE_LOCAL_FILEIO
-#define USE_LOCAL_GETDATE
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- char mode[10];
- int i;
-
- /* Find an empty file handle to use */
- for (i = 3; i < MAX_FILES; i++) {
- if (!openHandles[i])
- break;
- }
- if (openHandles[i])
- return -1;
-
- /* Find the open flags to use */
- if (_oflag & ___O_TRUNC)
- strcpy(mode,"w");
- else if (_oflag & ___O_CREAT)
- strcpy(mode,"a");
- else
- strcpy(mode,"r");
- if (_oflag & ___O_BINARY)
- strcat(mode,"b");
- if (_oflag & ___O_TEXT)
- strcat(mode,"t");
-
- /* Open the file and store the file handle */
- if ((openHandles[i] = fopen(_path,mode)) == NULL)
- return -1;
- return i;
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{ return -1; }
-
-int _CDECL stub_close(int _fildes)
-{
- if (_fildes >= 3 && openHandles[_fildes]) {
- fclose(openHandles[_fildes]);
- openHandles[_fildes] = NULL;
- }
- return 0;
-}
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{
- if (_fildes >= 3) {
- fseek(openHandles[_fildes],_offset,_whence);
- return ftell(openHandles[_fildes]);
- }
- return 0;
-}
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fread(_buf,1,_nbyte,openHandles[_fildes]);
- return 0;
-}
-
-int _CDECL stub_unlink(const char *_path)
-{
- WORD error;
-
- if (initComplete) {
- if (R0_DeleteFile((char*)_path,0,&error))
- return 0;
- return -1;
- }
- else
- return i_remove(_path);
-}
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
- return _nbyte;
-}
-
-int _CDECL stub_isatty(int _fildes)
-{ return 0; }
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename)
-{ return stub_unlink(_filename); }
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{ return -1; }
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{
- WORD error;
- if (initComplete)
- R0_SetFileAttributes((char*)filename,attrib,&error);
-}
-
-/* Return the current date in days since 1/1/1980 */
-ulong _CDECL _OS_getcurrentdate(void)
-{
- DWORD date;
- VTD_Get_Date_And_Time(&date);
- return date;
-}
-
-#elif defined(__NT_DRIVER__)
-
-#define USE_LOCAL_FILEIO
-#define USE_LOCAL_GETDATE
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- char mode[10];
- int i;
-
- /* Find an empty file handle to use */
- for (i = 3; i < MAX_FILES; i++) {
- if (!openHandles[i])
- break;
- }
- if (openHandles[i])
- return -1;
-
- /* Find the open flags to use */
- if (_oflag & ___O_TRUNC)
- strcpy(mode,"w");
- else if (_oflag & ___O_CREAT)
- strcpy(mode,"a");
- else
- strcpy(mode,"r");
- if (_oflag & ___O_BINARY)
- strcat(mode,"b");
- if (_oflag & ___O_TEXT)
- strcat(mode,"t");
-
- /* Open the file and store the file handle */
- if ((openHandles[i] = fopen(_path,mode)) == NULL)
- return -1;
- return i;
-}
-
-int _CDECL stub_close(int _fildes)
-{
- if (_fildes >= 3 && openHandles[_fildes]) {
- fclose(openHandles[_fildes]);
- openHandles[_fildes] = NULL;
- }
- return 0;
-}
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{
- if (_fildes >= 3) {
- fseek(openHandles[_fildes],_offset,_whence);
- return ftell(openHandles[_fildes]);
- }
- return 0;
-}
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fread(_buf,1,_nbyte,openHandles[_fildes]);
- return 0;
-}
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{
- if (_fildes >= 3)
- return fwrite(_buf,1,_nbyte,openHandles[_fildes]);
- return _nbyte;
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{ return -1; }
-
-int _CDECL stub_isatty(int _fildes)
-{ return 0; }
-
-int _CDECL stub_unlink(const char *_path)
-{
- /* TODO: Implement this! */
- return -1;
-}
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename)
-{ return stub_unlink(_filename); }
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{
- /* TODO: Implement this! */
- return -1;
-}
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{
- uint _attr = 0;
- if (attrib & __A_RDONLY)
- _attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & __A_HIDDEN)
- _attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & __A_SYSTEM)
- _attr |= FILE_ATTRIBUTE_SYSTEM;
- PM_setFileAttr(filename,_attr);
-}
-
-/* Return the current date in days since 1/1/1980 */
-ulong _CDECL _OS_getcurrentdate(void)
-{
- TIME_FIELDS tm;
- _int64 count,count_1_1_1980;
-
- tm.Year = 1980;
- tm.Month = 1;
- tm.Day = 1;
- tm.Hour = 0;
- tm.Minute = 0;
- tm.Second = 0;
- tm.Milliseconds = 0;
- tm.Weekday = 0;
- RtlTimeFieldsToTime(&tm,(PLARGE_INTEGER)&count_1_1_1980);
- KeQuerySystemTime((PLARGE_INTEGER)&count);
- return (ulong)( (count - count_1_1_1980) / ((_int64)24 * (_int64)3600 * (_int64)10000000) );
-}
-
-#elif defined(__WINDOWS32__) || defined(__RTTARGET__)
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ SetFileAttributes((LPSTR)filename, (DWORD)attrib); }
-
-#elif defined(__OS2__)
-
-#define USE_LOCAL_FILEIO
-
-#ifndef W_OK
-#define W_OK 0x02
-#endif
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{
- FILESTATUS3 s;
- if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
- return;
- s.attrFile = attrib;
- DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
-}
-
-/* <libc/file.h> stub functions */
-
-#define BUF_SIZE 4096
-
-/* Note: the implementation of the standard Unix-ish handle-based I/O isn't
- * complete - but that wasn't the intent either. Note also that we
- * don't presently support text file I/O, so all text files end
- * up in Unix format (and are not translated!).
- */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- HFILE handle;
- ULONG error, actiontaken, openflag, openmode;
- char path[PM_MAX_PATH];
-
- /* Determine open flags */
- if (_oflag & ___O_CREAT) {
- if (_oflag & ___O_EXCL)
- openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- else if (_oflag & ___O_TRUNC)
- openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- else
- openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- }
- else if (_oflag & ___O_TRUNC)
- openflag = OPEN_ACTION_REPLACE_IF_EXISTS;
- else
- openflag = OPEN_ACTION_OPEN_IF_EXISTS;
-
- /* Determine open mode flags */
- if (_oflag & ___O_RDONLY)
- openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
- else if (_oflag & ___O_WRONLY)
- openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
- else
- openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL,
- openflag, openmode, NULL) != NO_ERROR)
- return -1;
-
- /* Handle append mode of operation */
- if (_oflag & ___O_APPEND) {
- if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR)
- return -1;
- }
- return handle;
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{
- char path[PM_MAX_PATH];
- FILESTATUS fs;
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR)
- return -1;
- if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY))
- return -1;
- return 0;
-}
-
-int _CDECL stub_close(int _fildes)
-{
- if (DosClose(_fildes) != NO_ERROR)
- return -1;
- return 0;
-}
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{
- ULONG cbActual, origin;
-
- switch (_whence) {
- case SEEK_CUR:
- origin = FILE_CURRENT;
- break;
- case SEEK_END:
- origin = FILE_END;
- break;
- default:
- origin = FILE_BEGIN;
- }
- if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR)
- return -1;
- return cbActual;
-}
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{
- ULONG cbActual = 0,cbRead;
- uchar *p = _buf;
- uchar file_io_buf[BUF_SIZE];
-
- /* We need to perform the physical read in chunks into a
- * a temporary static buffer, since the buffer passed in may be
- * in kernel space and will cause DosRead to bail internally.
- */
- while (_nbyte > BUF_SIZE) {
- if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR)
- return -1;
- cbActual += cbRead;
- memcpy(p,file_io_buf,BUF_SIZE);
- p += BUF_SIZE;
- _nbyte -= BUF_SIZE;
- }
- if (_nbyte) {
- if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR)
- return -1;
- cbActual += cbRead;
- memcpy(p,file_io_buf,_nbyte);
- }
- return cbActual;
-}
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{
- ULONG cbActual = 0,cbWrite;
- uchar *p = (PVOID)_buf;
- uchar file_io_buf[BUF_SIZE];
-
- /* We need to perform the physical write in chunks from a
- * a temporary static buffer, since the buffer passed in may be
- * in kernel space and will cause DosWrite to bail internally.
- */
- while (_nbyte > BUF_SIZE) {
- memcpy(file_io_buf,p,BUF_SIZE);
- if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR)
- return -1;
- cbActual += cbWrite;
- p += BUF_SIZE;
- _nbyte -= BUF_SIZE;
- }
- if (_nbyte) {
- memcpy(file_io_buf,p,_nbyte);
- if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR)
- return -1;
- cbActual += cbWrite;
- }
- return cbActual;
-}
-
-int _CDECL stub_unlink(const char *_path)
-{
- char path[PM_MAX_PATH];
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosDelete(path) != NO_ERROR)
- return -1;
- return 0;
-}
-
-int _CDECL stub_isatty(int _fildes)
-{
- ULONG htype, flags;
-
- if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR)
- return 0;
- return ((htype & 0xFF) == HANDTYPE_DEVICE);
-}
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_path)
-{
- char path[PM_MAX_PATH];
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(path,_path);
- if (DosDelete(path) != NO_ERROR)
- return -1;
- return 0;
-}
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{
- char old[PM_MAX_PATH];
- char new[PM_MAX_PATH];
-
- /* Copy the path to a variable on the stack. We need to do this
- * for OS/2 as when the drivers are loaded into shared kernel
- * memory, we can't pass an address from that memory range to
- * this function.
- */
- strcpy(old,_old);
- strcpy(new,_new);
- if (DosMove(old, new) != NO_ERROR)
- return -1;
- return 0;
-}
-
-#else
-
-void _CDECL _OS_setfileattr(const char *filename,unsigned attrib)
-{ /* Unable to set hidden, system attributes on Unix. */ }
-
-#endif
-
-#ifndef USE_LOCAL_FILEIO
-
-/* <libc/file.h> stub functions */
-int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode)
-{
- int oflag_tab[] = {
- ___O_RDONLY, O_RDONLY,
- ___O_WRONLY, O_WRONLY,
- ___O_RDWR, O_RDWR,
- ___O_BINARY, O_BINARY,
- ___O_TEXT, O_TEXT,
- ___O_CREAT, O_CREAT,
- ___O_EXCL, O_EXCL,
- ___O_TRUNC, O_TRUNC,
- ___O_APPEND, O_APPEND,
- };
- int i,oflag = 0;
-
- /* Translate the oflag's to the OS dependent versions */
- for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) {
- if (_oflag & oflag_tab[i])
- oflag |= oflag_tab[i+1];
- }
- return open(_path,oflag,_mode);
-}
-
-int _CDECL stub_access(const char *_path, int _amode)
-{ return access(_path,_amode); }
-
-int _CDECL stub_close(int _fildes)
-{ return close(_fildes); }
-
-off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence)
-{ return lseek(_fildes,_offset,_whence); }
-
-size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte)
-{ return read(_fildes,_buf,_nbyte); }
-
-int _CDECL stub_unlink(const char *_path)
-{ return unlink(_path); }
-
-size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte)
-{ return write(_fildes,_buf,_nbyte); }
-
-int _CDECL stub_isatty(int _fildes)
-{ return isatty(_fildes); }
-
-/* <stdio.h> stub functions */
-int _CDECL stub_remove(const char *_filename)
-{ return remove(_filename); }
-
-int _CDECL stub_rename(const char *_old, const char *_new)
-{ return rename(_old,_new); }
-
-#endif
-
-#ifndef USE_LOCAL_GETDATE
-
-/* Return the current date in days since 1/1/1980 */
-ulong _CDECL _OS_getcurrentdate(void)
-{
- struct tm refTime;
- refTime.tm_year = 80;
- refTime.tm_mon = 0;
- refTime.tm_mday = 1;
- refTime.tm_hour = 0;
- refTime.tm_min = 0;
- refTime.tm_sec = 0;
- refTime.tm_isdst = -1;
- return (time(NULL) - mktime(&refTime)) / (24 * 3600L);
-}
-
-#endif
-
-int _CDECL stub_raise(int sig)
-{
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__) || defined(__SMX32__)
- return -1;
-#else
- return raise(sig);
-#endif
-}
-
-#ifdef __WINDOWS32__
-typedef void (*__code_ptr)(int);
-#else
-typedef void (*__code_ptr)();
-#endif
-
-void * _CDECL stub_signal(int sig, void *handler)
-{
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__) || defined(__SMX32__)
- return NULL;
-#else
- return (void*)signal(sig,(__code_ptr)handler);
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/makefile b/board/MAI/bios_emulator/scitech/src/common/makefile
deleted file mode 100644
index 5aac038..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/makefile
+++ /dev/null
@@ -1,18 +0,0 @@
-#############################################################################
-#
-# Copyright (C) 1996 SciTech Software.
-# All rights reserved.
-#
-# Descripton: Makefile for UniVBE(tm), UniPOWER(tm), UVBELib(tm) and
-# DPMSLib library files. Requires Borland C++ 4.52 to build
-# some components.
-#
-# $Date: 2002/10/02 15:35:20 $ $Author: hfrieden $
-#
-#############################################################################
-
-CFLAGS += -DTESTING_GTF
-
-gtfcalc$E: gtfcalc$O
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
diff --git a/board/MAI/bios_emulator/scitech/src/common/peloader.c b/board/MAI/bios_emulator/scitech/src/common/peloader.c
deleted file mode 100644
index a134bb0..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/peloader.c
+++ /dev/null
@@ -1,586 +0,0 @@
-/****************************************************************************
-*
-* SciTech MGL Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module to implement a simple Portable Binary DLL loader
-* library. This library can be used to load PE DLL's under
-* any Intel based OS, provided the DLL's do not have any
-* imports in the import table.
-*
-* NOTE: This loader module expects the DLL's to be built with
-* Watcom C++ and may produce unexpected results with
-* DLL's linked by another compiler.
-*
-****************************************************************************/
-
-#include "drvlib/peloader.h"
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "drvlib/libc/init.h"
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#endif
-#include "drvlib/pe.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static int result = PE_ok;
-
-/*------------------------- Implementation --------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-f - Handle to open file to read driver from
-startOffset - Offset to the start of the driver within the file
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function loads a Portable Binary DLL library from disk, relocates
-the code and returns a handle to the loaded library. This function is the
-same as the regular PE_loadLibrary except that it take a handle to an
-open file and an offset within that file for the DLL to load.
-****************************************************************************/
-static int PE_readHeader(
- FILE *f,
- long startOffset,
- FILE_HDR *filehdr,
- OPTIONAL_HDR *opthdr)
-{
- EXE_HDR exehdr;
- ulong offset,signature;
-
- /* Read the EXE header and check for valid header signature */
- result = PE_invalidDLLImage;
- fseek(f, startOffset, SEEK_SET);
- if (fread(&exehdr, 1, sizeof(exehdr), f) != sizeof(exehdr))
- return false;
- if (exehdr.signature != 0x5A4D)
- return false;
-
- /* Now seek to the start of the PE header defined at offset 0x3C
- * in the MS-DOS EXE header, and read the signature and check it.
- */
- fseek(f, startOffset+0x3C, SEEK_SET);
- if (fread(&offset, 1, sizeof(offset), f) != sizeof(offset))
- return false;
- fseek(f, startOffset+offset, SEEK_SET);
- if (fread(&signature, 1, sizeof(signature), f) != sizeof(signature))
- return false;
- if (signature != 0x00004550)
- return false;
-
- /* Now read the PE file header and check that it is correct */
- if (fread(filehdr, 1, sizeof(*filehdr), f) != sizeof(*filehdr))
- return false;
- if (filehdr->Machine != IMAGE_FILE_MACHINE_I386)
- return false;
- if (!(filehdr->Characteristics & IMAGE_FILE_32BIT_MACHINE))
- return false;
- if (!(filehdr->Characteristics & IMAGE_FILE_DLL))
- return false;
- if (fread(opthdr, 1, sizeof(*opthdr), f) != sizeof(*opthdr))
- return false;
- if (opthdr->Magic != 0x10B)
- return false;
-
- /* Success, so return true! */
- return true;
-}
-
-/****************************************************************************
-PARAMETERS:
-f - Handle to open file to read driver from
-startOffset - Offset to the start of the driver within the file
-
-RETURNS:
-Size of the DLL file on disk, or -1 on error
-
-REMARKS:
-This function scans the headers for a Portable Binary DLL to determine the
-length of the DLL file on disk.
-{secret}
-****************************************************************************/
-ulong PEAPI PE_getFileSize(
- FILE *f,
- ulong startOffset)
-{
- FILE_HDR filehdr;
- OPTIONAL_HDR opthdr;
- SECTION_HDR secthdr;
- ulong size;
- int i;
-
- /* Read the PE file headers from disk */
- if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
- return 0xFFFFFFFF;
-
- /* Scan all the section headers summing up the total size */
- size = opthdr.SizeOfHeaders;
- for (i = 0; i < filehdr.NumberOfSections; i++) {
- if (fread(§hdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
- return 0xFFFFFFFF;
- size += secthdr.SizeOfRawData;
- }
- return size;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Loads a Portable Binary DLL into memory from an open file
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-f - Handle to open file to read driver from
-startOffset - Offset to the start of the driver within the file
-size - Place to store the size of the driver loaded
-shared - True to load module into shared memory
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function loads a Portable Binary DLL library from disk, relocates
-the code and returns a handle to the loaded library. This function is the
-same as the regular PE_loadLibrary except that it take a handle to an
-open file and an offset within that file for the DLL to load.
-
-SEE ALSO:
-PE_loadLibrary, PE_getProcAddress, PE_freeLibrary
-****************************************************************************/
-PE_MODULE * PEAPI PE_loadLibraryExt(
- FILE *f,
- ulong startOffset,
- ulong *size,
- ibool shared)
-{
- FILE_HDR filehdr;
- OPTIONAL_HDR opthdr;
- SECTION_HDR secthdr;
- ulong offset,pageOffset;
- ulong text_off,text_addr,text_size;
- ulong data_off,data_addr,data_size,data_end;
- ulong export_off,export_addr,export_size,export_end;
- ulong reloc_off,reloc_size;
- ulong image_size;
- int i,delta,numFixups;
- ushort relocType,*fixup;
- PE_MODULE *hMod = NULL;
- void *reloc = NULL;
- BASE_RELOCATION *baseReloc;
- InitLibC_t InitLibC;
-
- /* Read the PE file headers from disk */
- if (!PE_readHeader(f,startOffset,&filehdr,&opthdr))
- return NULL;
-
- /* Scan all the section headers and find the necessary sections */
- text_off = data_off = reloc_off = export_off = 0;
- text_addr = text_size = 0;
- data_addr = data_size = data_end = 0;
- export_addr = export_size = export_end = 0;
- reloc_size = 0;
- for (i = 0; i < filehdr.NumberOfSections; i++) {
- if (fread(§hdr, 1, sizeof(secthdr), f) != sizeof(secthdr))
- goto Error;
- if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) {
- /* Exports section */
- export_off = secthdr.PointerToRawData;
- export_addr = secthdr.VirtualAddress;
- export_size = secthdr.SizeOfRawData;
- export_end = export_addr + export_size;
- }
- else if (strcmp(secthdr.Name, ".idata") == 0) {
- /* Imports section, ignore */
- }
- else if (strcmp(secthdr.Name, ".reloc") == 0) {
- /* Relocations section */
- reloc_off = secthdr.PointerToRawData;
- reloc_size = secthdr.SizeOfRawData;
- }
- else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) {
- /* Code section */
- text_off = secthdr.PointerToRawData;
- text_addr = secthdr.VirtualAddress;
- text_size = secthdr.SizeOfRawData;
- }
- else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) {
- /* Data section */
- data_off = secthdr.PointerToRawData;
- data_addr = secthdr.VirtualAddress;
- data_size = secthdr.SizeOfRawData;
- data_end = data_addr + data_size;
- }
- }
-
- /* Check to make sure that we have all the sections we need */
- if (!text_off || !data_off || !export_off || !reloc_off) {
- result = PE_invalidDLLImage;
- goto Error;
- }
-
- /* Find the size of the image to load allocate memory for it */
- image_size = MAX(export_end,data_end) - text_addr;
- *size = sizeof(PE_MODULE) + image_size + 4096;
- if (shared)
- hMod = PM_mallocShared(*size);
- else
- hMod = PM_malloc(*size);
- reloc = PM_malloc(reloc_size);
- if (!hMod || !reloc) {
- result = PE_outOfMemory;
- goto Error;
- }
-
- hMod->text = (uchar*)ROUND_4K((ulong)hMod + sizeof(PE_MODULE));
- hMod->data = (uchar*)((ulong)hMod->text + (data_addr - text_addr));
- hMod->export = (uchar*)((ulong)hMod->text + (export_addr - text_addr));
- hMod->textBase = text_addr;
- hMod->dataBase = data_addr;
- hMod->exportBase = export_addr;
- hMod->exportDir = opthdr.DataDirectory[0].RelVirtualAddress - export_addr;
- hMod->shared = shared;
-
- /* Now read the section images from disk */
- result = PE_invalidDLLImage;
- fseek(f, startOffset+text_off, SEEK_SET);
- if (fread(hMod->text, 1, text_size, f) != text_size)
- goto Error;
- fseek(f, startOffset+data_off, SEEK_SET);
- if (fread(hMod->data, 1, data_size, f) != data_size)
- goto Error;
- fseek(f, startOffset+export_off, SEEK_SET);
- if (fread(hMod->export, 1, export_size, f) != export_size)
- goto Error;
- fseek(f, startOffset+reloc_off, SEEK_SET);
- if (fread(reloc, 1, reloc_size, f) != reloc_size)
- goto Error;
-
- /* Now perform relocations on all sections in the image */
- delta = (ulong)hMod->text - opthdr.ImageBase - text_addr;
- baseReloc = (BASE_RELOCATION*)reloc;
- for (;;) {
- /* Check for termination condition */
- if (!baseReloc->PageRVA || !baseReloc->BlockSize)
- break;
-
- /* Do fixups */
- pageOffset = baseReloc->PageRVA - hMod->textBase;
- numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort);
- fixup = (ushort*)(baseReloc + 1);
- for (i = 0; i < numFixups; i++) {
- relocType = *fixup >> 12;
- if (relocType) {
- offset = pageOffset + (*fixup & 0x0FFF);
- *(ulong*)(hMod->text + offset) += delta;
- }
- fixup++;
- }
-
- /* Move to next relocation block */
- baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize);
- }
-
- /* Initialise the C runtime library for the loaded DLL */
- result = PE_unableToInitLibC;
- if ((InitLibC = (InitLibC_t)PE_getProcAddress(hMod,"_InitLibC")) == NULL)
- goto Error;
- if (!InitLibC(&___imports,PM_getOSType()))
- goto Error;
-
- /* Clean up, close the file and return the loaded module handle */
- PM_free(reloc);
- result = PE_ok;
- return hMod;
-
-Error:
- if (shared)
- PM_freeShared(hMod);
- else
- PM_free(hMod);
- PM_free(reloc);
- return NULL;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Loads a Portable Binary DLL into memory
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-szDLLName - Name of the PE DLL library to load
-shared - True to load module into shared memory
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function loads a Portable Binary DLL library from disk, relocates
-the code and returns a handle to the loaded library. This function
-will only work on DLL's that do not have any imports, since we don't
-resolve import dependencies in this function.
-
-SEE ALSO:
-PE_getProcAddress, PE_freeLibrary
-****************************************************************************/
-PE_MODULE * PEAPI PE_loadLibrary(
- const char *szDLLName,
- ibool shared)
-{
- PE_MODULE *hMod;
-
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
- if (!shared) {
- PM_MODULE hInst;
- InitLibC_t InitLibC;
-
- /* For Win32 if are building checked libraries for debugging, we use
- * the real Win32 DLL functions so that we can debug the resulting DLL
- * files with the Win32 debuggers. Note that we can't do this if
- * we need to load the files into a shared memory context.
- */
- if ((hInst = PM_loadLibrary(szDLLName)) == NULL) {
- result = PE_fileNotFound;
- return NULL;
- }
-
- /* Initialise the C runtime library for the loaded DLL */
- result = PE_unableToInitLibC;
- if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL)
- return NULL;
- if (!InitLibC(&___imports,PM_getOSType()))
- return NULL;
-
- /* Allocate the PE_MODULE structure */
- if ((hMod = PM_malloc(sizeof(*hMod))) == NULL)
- return NULL;
- hMod->text = (void*)hInst;
- hMod->shared = -1;
-
- /* DLL loaded successfully so return module handle */
- result = PE_ok;
- return hMod;
- }
- else
-#endif
- {
- FILE *f;
- ulong size;
-
- /* Attempt to open the file on disk */
- if (shared < 0)
- shared = 0;
- if ((f = fopen(szDLLName,"rb")) == NULL) {
- result = PE_fileNotFound;
- return NULL;
- }
- hMod = PE_loadLibraryExt(f,0,&size,shared);
- fclose(f);
- return hMod;
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Loads a Portable Binary DLL into memory
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-szDLLName - Name of the PE DLL library to load
-shared - True to load module into shared memory
-
-RETURNS:
-Handle to loaded PE DLL, or NULL on failure.
-
-REMARKS:
-This function is the same as the regular PE_loadLibrary function, except
-that it looks for the drivers in the MGL_ROOT/drivers directory or a
-/drivers directory relative to the current directory.
-
-SEE ALSO:
-PE_loadLibraryMGL, PE_getProcAddress, PE_freeLibrary
-****************************************************************************/
-PE_MODULE * PEAPI PE_loadLibraryMGL(
- const char *szDLLName,
- ibool shared)
-{
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
- PE_MODULE *hMod;
-#endif
- char path[256] = "";
-
- /* We look in the 'drivers' directory, optionally under the MGL_ROOT
- * environment variable directory.
- */
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
- if (getenv("MGL_ROOT")) {
- strcpy(path,getenv("MGL_ROOT"));
- PM_backslash(path);
- }
- strcat(path,"drivers");
- PM_backslash(path);
- strcat(path,szDLLName);
- if ((hMod = PE_loadLibrary(path,shared)) != NULL)
- return hMod;
-#endif
- strcpy(path,"drivers");
- PM_backslash(path);
- strcat(path,szDLLName);
- return PE_loadLibrary(path,shared);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Gets a function address from a Portable Binary DLL
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-hModule - Handle to a loaded PE DLL library
-szProcName - Name of the function to get the address of
-
-RETURNS:
-Pointer to the function, or NULL on failure.
-
-REMARKS:
-This function searches for the named, exported function in a loaded PE
-DLL library, and returns the address of the function. If the function is
-not found in the library, this function return NULL.
-
-SEE ALSO:
-PE_loadLibrary, PE_freeLibrary
-****************************************************************************/
-void * PEAPI PE_getProcAddress(
- PE_MODULE *hModule,
- const char *szProcName)
-{
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
- if (hModule->shared == -1)
- return (void*)PM_getProcAddress(hModule->text,szProcName);
- else
-#endif
- {
- uint i;
- EXPORT_DIRECTORY *exports;
- ulong funcOffset;
- ulong *AddressTable;
- ulong *NameTable;
- ushort *OrdinalTable;
- char *name;
-
- /* Find the address of the export tables from the export section */
- if (!hModule)
- return NULL;
- exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir);
- AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase);
- NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase);
- OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase);
-
- /* Search the export name table to find the function name */
- for (i = 0; i < exports->NumberOfNamePointers; i++) {
- name = (char*)(hModule->export + NameTable[i] - hModule->exportBase);
- if (strcmp(name,szProcName) == 0)
- break;
- }
- if (i == exports->NumberOfNamePointers)
- return NULL;
- funcOffset = AddressTable[OrdinalTable[i]];
- if (!funcOffset)
- return NULL;
- return (void*)(hModule->text + funcOffset - hModule->textBase);
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Frees a loaded Portable Binary DLL
-
-HEADER:
-peloader.h
-
-PARAMETERS:
-hModule - Handle to a loaded PE DLL library to free
-
-REMARKS:
-This function frees a loaded PE DLL library from memory.
-
-SEE ALSO:
-PE_getProcAddress, PE_loadLibrary
-****************************************************************************/
-void PEAPI PE_freeLibrary(
- PE_MODULE *hModule)
-{
- TerminateLibC_t TerminateLibC;
-
-#if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED)
- if (hModule->shared == -1) {
- /* Run the C runtime library exit code on module unload */
- if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL)
- TerminateLibC();
- PM_freeLibrary(hModule->text);
- PM_free(hModule);
- }
- else
-#endif
- {
- if (hModule) {
- /* Run the C runtime library exit code on module unload */
- if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL)
- TerminateLibC();
- if (hModule->shared)
- PM_freeShared(hModule);
- else
- PM_free(hModule);
- }
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the error code for the last operation
-
-HEADER:
-peloader.h
-
-RETURNS:
-Error code for the last operation.
-
-SEE ALSO:
-PE_getProcAddress, PE_loadLibrary
-****************************************************************************/
-int PEAPI PE_getError(void)
-{
- return result;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/common/vesavbe.c b/board/MAI/bios_emulator/scitech/src/common/vesavbe.c
deleted file mode 100644
index a669e5c..0000000
--- a/board/MAI/bios_emulator/scitech/src/common/vesavbe.c
+++ /dev/null
@@ -1,1214 +0,0 @@
-/****************************************************************************
-*
-* The SuperVGA Kit - UniVBE Software Development Kit
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC Real Mode and 16/32 bit Protected Mode.
-*
-* Description: Module to implement a C callable interface to the standard
-* VESA VBE routines. You should rip out this module and use it
-* directly in your own applications, or you can use the
-* high level SDK functions.
-*
-* MUST be compiled in the LARGE or FLAT models.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include "vesavbe.h"
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-
-/*---------------------------- Global Variables ---------------------------*/
-
-#define VBE_SUCCESS 0x004F
-#define MAX_LIN_PTRS 10
-
-static uint VESABuf_len = 1024;/* Length of the VESABuf buffer */
-static ibool haveRiva128; /* True if we have a Riva128 */
-static VBE_state defState = {0}; /* Default state buffer */
-static VBE_state *state = &defState; /* Pointer to current buffer */
-static int VBE_shared = 0;
-#ifndef REALMODE
-static char localBuf[512]; /* Global PM string translate buf */
-#define MAX_LOCAL_BUF &localBuf[511]
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* static function in WinDirect for passing 32-bit registers to BIOS */
-int PMAPI WD_int386(int intno, RMREGS *in, RMREGS *out);
-
-void VBEAPI VBE_init(void)
-/****************************************************************************
-*
-* Function: VBE_init
-*
-* Description: Initialises the VBE transfer buffer in real mode DC.memory.
-* This routine is called by the VESAVBE module every time
-* it needs to use the transfer buffer, so we simply allocate
-* it once and then return.
-*
-****************************************************************************/
-{
- if (!state->VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL)
- PM_fatalError("VESAVBE.C: Real mode memory allocation failed!");
- }
-}
-
-void * VBEAPI VBE_getRMBuf(uint *len,uint *rseg,uint *roff)
-/****************************************************************************
-*
-* Function: VBE_getRMBuf
-*
-* Description: This function returns the location and length of the real
-* mode memory buffer for calling real mode functions.
-*
-****************************************************************************/
-{
- *len = VESABuf_len;
- *rseg = state->VESABuf_rseg;
- *roff = state->VESABuf_roff;
- return state->VESABuf_ptr;
-}
-
-void VBEAPI VBE_setStateBuffer(VBE_state *s)
-/****************************************************************************
-*
-* Function: VBE_setStateBuffer
-*
-* Description: This functions sets the internal state buffer for the
-* VBE module to the passed in buffer. By default the internal
-* global buffer is used, but you must use separate buffers
-* for each device in a multi-controller environment.
-*
-****************************************************************************/
-{
- state = s;
-}
-
-void VBEAPI VBE_callESDI(RMREGS *regs, void *buffer, int size)
-/****************************************************************************
-*
-* Function: VBE_callESDI
-* Parameters: regs - Registers to load when calling VBE
-* buffer - Buffer to copy VBE info block to
-* size - Size of buffer to fill
-*
-* Description: Calls the VESA VBE and passes in a buffer for the VBE to
-* store information in, which is then copied into the users
-* buffer space. This works in protected mode as the buffer
-* passed to the VESA VBE is allocated in conventional
-* memory, and is then copied into the users memory block.
-*
-****************************************************************************/
-{
- RMSREGS sregs;
-
- if (!state->VESABuf_ptr)
- PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!");
- sregs.es = (ushort)state->VESABuf_rseg;
- regs->x.di = (ushort)state->VESABuf_roff;
- memcpy(state->VESABuf_ptr, buffer, size);
- PM_int86x(0x10, regs, regs, &sregs);
- memcpy(buffer, state->VESABuf_ptr, size);
-}
-
-#ifndef REALMODE
-static char *VBE_copyStrToLocal(char *p,char *realPtr,char *max)
-/****************************************************************************
-*
-* Function: VBE_copyStrToLocal
-* Parameters: p - Flat model buffer to copy to
-* realPtr - Real mode pointer to copy
-* Returns: Pointer to the next byte after string
-*
-* Description: Copies the string from the real mode location pointed to
-* by 'realPtr' into the flat model buffer pointed to by
-* 'p'. We return a pointer to the next byte past the copied
-* string.
-*
-****************************************************************************/
-{
- uchar *v;
-
- v = PM_mapRealPointer((uint)((ulong)realPtr >> 16), (uint)((ulong)realPtr & 0xFFFF));
- while (*v != 0 && p < max)
- *p++ = *v++;
- *p++ = 0;
- return p;
-}
-
-static void VBE_copyShortToLocal(ushort *p,ushort *realPtr)
-/****************************************************************************
-*
-* Function: VBE_copyShortToLocal
-* Parameters: p - Flat model buffer to copy to
-* realPtr - Real mode pointer to copy
-*
-* Description: Copies the mode table from real mode memory to the flat
-* model buffer.
-*
-****************************************************************************/
-{
- ushort *v;
-
- v = PM_mapRealPointer((uint)((ulong)realPtr >> 16),(uint)((ulong)realPtr & 0xFFFF));
- while (*v != 0xFFFF)
- *p++ = *v++;
- *p = 0xFFFF;
-}
-#endif
-
-int VBEAPI VBE_detectEXT(VBE_vgaInfo *vgaInfo,ibool forceUniVBE)
-/****************************************************************************
-*
-* Function: VBE_detect
-* Parameters: vgaInfo - Place to store the VGA information block
-* Returns: VBE version number, or 0 if not detected.
-*
-* Description: Detects if a VESA VBE is out there and functioning
-* correctly. If we detect a VBE interface we return the
-* VGAInfoBlock returned by the VBE and the VBE version number.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F00; /* Get SuperVGA information */
- if (forceUniVBE) {
- regs.x.bx = 0x1234;
- regs.x.cx = 0x4321;
- }
- else {
- regs.x.bx = 0;
- regs.x.cx = 0;
- }
- strncpy(vgaInfo->VESASignature,"VBE2",4);
- VBE_callESDI(®s, vgaInfo, sizeof(*vgaInfo));
- if (regs.x.ax != VBE_SUCCESS)
- return 0;
- if (strncmp(vgaInfo->VESASignature,"VESA",4) != 0)
- return 0;
-
- /* Check for bogus BIOSes that return a VBE version number that is
- * not correct, and fix it up. We also check the OemVendorNamePtr for a
- * valid value, and if it is invalid then we also reset to VBE 1.2.
- */
- if (vgaInfo->VESAVersion >= 0x200 && vgaInfo->OemVendorNamePtr == 0)
- vgaInfo->VESAVersion = 0x102;
-#ifndef REALMODE
- /* Relocate all the indirect information (mode tables, OEM strings
- * etc) from the low 1Mb memory region into a static buffer in
- * our default data segment. We do this to insulate the application
- * from mapping the strings from real mode to protected mode.
- */
- {
- char *p,*p2;
- p2 = VBE_copyStrToLocal(localBuf,vgaInfo->OemStringPtr,MAX_LOCAL_BUF);
- vgaInfo->OemStringPtr = localBuf;
- if (vgaInfo->VESAVersion >= 0x200) {
- p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF);
- vgaInfo->OemVendorNamePtr = p2;
- p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF);
- vgaInfo->OemProductNamePtr = p;
- p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF);
- vgaInfo->OemProductRevPtr = p2;
- VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr);
- vgaInfo->VideoModePtr = (ushort*)p;
- }
- else {
- VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr);
- vgaInfo->VideoModePtr = (ushort*)p2;
- }
- }
-#endif
- state->VBEMemory = vgaInfo->TotalMemory * 64;
-
- /* Check for Riva128 based cards since they have broken triple buffering
- * and stereo support.
- */
- haveRiva128 = false;
- if (vgaInfo->VESAVersion >= 0x300 &&
- (strstr(vgaInfo->OemStringPtr,"NVidia") != NULL ||
- strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) {
- haveRiva128 = true;
- }
-
- /* Check for Matrox G400 cards which claim to be VBE 3.0
- * compliant yet they don't implement the refresh rate control
- * functions.
- */
- if (vgaInfo->VESAVersion >= 0x300 && (strcmp(vgaInfo->OemProductNamePtr,"Matrox G400") == 0))
- vgaInfo->VESAVersion = 0x200;
- return (state->VBEVersion = vgaInfo->VESAVersion);
-}
-
-int VBEAPI VBE_detect(VBE_vgaInfo *vgaInfo)
-/****************************************************************************
-*
-* Function: VBE_detect
-* Parameters: vgaInfo - Place to store the VGA information block
-* Returns: VBE version number, or 0 if not detected.
-*
-* Description: Detects if a VESA VBE is out there and functioning
-* correctly. If we detect a VBE interface we return the
-* VGAInfoBlock returned by the VBE and the VBE version number.
-*
-****************************************************************************/
-{
- return VBE_detectEXT(vgaInfo,false);
-}
-
-ibool VBEAPI VBE_getModeInfo(int mode,VBE_modeInfo *modeInfo)
-/****************************************************************************
-*
-* Function: VBE_getModeInfo
-* Parameters: mode - VBE mode to get information for
-* modeInfo - Place to store VBE mode information
-* Returns: True on success, false if function failed.
-*
-* Description: Obtains information about a specific video mode from the
-* VBE. You should use this function to find the video mode
-* you wish to set, as the new VBE 2.0 mode numbers may be
-* completely arbitrary.
-*
-****************************************************************************/
-{
- RMREGS regs;
- int bits;
-
- regs.x.ax = 0x4F01; /* Get mode information */
- regs.x.cx = (ushort)mode;
- VBE_callESDI(®s, modeInfo, sizeof(*modeInfo));
- if (regs.x.ax != VBE_SUCCESS)
- return false;
- if ((modeInfo->ModeAttributes & vbeMdAvailable) == 0)
- return false;
-
- /* Map out triple buffer and stereo flags for NVidia Riva128
- * chips.
- */
- if (haveRiva128) {
- modeInfo->ModeAttributes &= ~vbeMdTripleBuf;
- modeInfo->ModeAttributes &= ~vbeMdStereo;
- }
-
- /* Support old style RGB definitions for VBE 1.1 BIOSes */
- bits = modeInfo->BitsPerPixel;
- if (modeInfo->MemoryModel == vbeMemPK && bits > 8) {
- modeInfo->MemoryModel = vbeMemRGB;
- switch (bits) {
- case 15:
- modeInfo->RedMaskSize = 5;
- modeInfo->RedFieldPosition = 10;
- modeInfo->GreenMaskSize = 5;
- modeInfo->GreenFieldPosition = 5;
- modeInfo->BlueMaskSize = 5;
- modeInfo->BlueFieldPosition = 0;
- modeInfo->RsvdMaskSize = 1;
- modeInfo->RsvdFieldPosition = 15;
- break;
- case 16:
- modeInfo->RedMaskSize = 5;
- modeInfo->RedFieldPosition = 11;
- modeInfo->GreenMaskSize = 5;
- modeInfo->GreenFieldPosition = 5;
- modeInfo->BlueMaskSize = 5;
- modeInfo->BlueFieldPosition = 0;
- modeInfo->RsvdMaskSize = 0;
- modeInfo->RsvdFieldPosition = 0;
- break;
- case 24:
- modeInfo->RedMaskSize = 8;
- modeInfo->RedFieldPosition = 16;
- modeInfo->GreenMaskSize = 8;
- modeInfo->GreenFieldPosition = 8;
- modeInfo->BlueMaskSize = 8;
- modeInfo->BlueFieldPosition = 0;
- modeInfo->RsvdMaskSize = 0;
- modeInfo->RsvdFieldPosition = 0;
- break;
- }
- }
-
- /* Convert the 32k direct color modes of VBE 1.2+ BIOSes to
- * be recognised as 15 bits per pixel modes.
- */
- if (bits == 16 && modeInfo->RsvdMaskSize == 1)
- modeInfo->BitsPerPixel = 15;
-
- /* Fix up bogus BIOS'es that report incorrect reserved pixel masks
- * for 32K color modes. Quite a number of BIOS'es have this problem,
- * and this affects our OS/2 drivers in VBE fallback mode.
- */
- if (bits == 15 && (modeInfo->RsvdMaskSize != 1 || modeInfo->RsvdFieldPosition != 15)) {
- modeInfo->RsvdMaskSize = 1;
- modeInfo->RsvdFieldPosition = 15;
- }
- return true;
-}
-
-long VBEAPI VBE_getPageSize(VBE_modeInfo *mi)
-/****************************************************************************
-*
-* Function: VBE_getPageSize
-* Parameters: mi - Pointer to mode information block
-* Returns: Caculated page size in bytes rounded to correct boundary
-*
-* Description: Computes the page size in bytes for the specified mode
-* information block, rounded up to the appropriate boundary
-* (8k, 16k, 32k or 64k). Pages >= 64k in size are always
-* rounded to the nearest 64k boundary (so the start of a
-* page is always bank aligned).
-*
-****************************************************************************/
-{
- long size;
-
- size = (long)mi->BytesPerScanLine * (long)mi->YResolution;
- if (mi->BitsPerPixel == 4) {
- /* We have a 16 color video mode, so round up the page size to
- * 8k, 16k, 32k or 64k boundaries depending on how large it is.
- */
-
- size = (size + 0x1FFFL) & 0xFFFFE000L;
- if (size != 0x2000) {
- size = (size + 0x3FFFL) & 0xFFFFC000L;
- if (size != 0x4000) {
- size = (size + 0x7FFFL) & 0xFFFF8000L;
- if (size != 0x8000)
- size = (size + 0xFFFFL) & 0xFFFF0000L;
- }
- }
- }
- else size = (size + 0xFFFFL) & 0xFFFF0000L;
- return size;
-}
-
-ibool VBEAPI VBE_setVideoModeExt(int mode,VBE_CRTCInfo *crtc)
-/****************************************************************************
-*
-* Function: VBE_setVideoModeExt
-* Parameters: mode - SuperVGA video mode to set.
-* Returns: True if the mode was set, false if not.
-*
-* Description: Attempts to set the specified video mode. This version
-* includes support for the VBE/Core 3.0 refresh rate control
-* mechanism.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion < 0x200 && mode < 0x100) {
- /* Some VBE implementations barf terribly if you try to set non-VBE
- * video modes with the VBE set mode call. VBE 2.0 implementations
- * must be able to handle this.
- */
- regs.h.al = (ushort)mode;
- regs.h.ah = 0;
- PM_int86(0x10,®s,®s);
- }
- else {
- if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl))
- return false;
- regs.x.ax = 0x4F02;
- regs.x.bx = (ushort)mode;
- if ((mode & vbeRefreshCtrl) && crtc)
- VBE_callESDI(®s, crtc, sizeof(*crtc));
- else
- PM_int86(0x10,®s,®s);
- if (regs.x.ax != VBE_SUCCESS)
- return false;
- }
- return true;
-}
-
-ibool VBEAPI VBE_setVideoMode(int mode)
-/****************************************************************************
-*
-* Function: VBE_setVideoMode
-* Parameters: mode - SuperVGA video mode to set.
-* Returns: True if the mode was set, false if not.
-*
-* Description: Attempts to set the specified video mode.
-*
-****************************************************************************/
-{
- return VBE_setVideoModeExt(mode,NULL);
-}
-
-int VBEAPI VBE_getVideoMode(void)
-/****************************************************************************
-*
-* Function: VBE_getVideoMode
-* Returns: Current video mode
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F03;
- PM_int86(0x10,®s,®s);
- if (regs.x.ax != VBE_SUCCESS)
- return -1;
- return regs.x.bx;
-}
-
-ibool VBEAPI VBE_setBank(int window,int bank)
-/****************************************************************************
-*
-* Function: VBE_setBank
-* Parameters: window - Window to set
-* bank - Bank number to set window to
-* Returns: True on success, false on failure.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F05;
- regs.h.bh = 0;
- regs.h.bl = window;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-int VBEAPI VBE_getBank(int window)
-/****************************************************************************
-*
-* Function: VBE_setBank
-* Parameters: window - Window to read
-* Returns: Bank number for the window (-1 on failure)
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F05;
- regs.h.bh = 1;
- regs.h.bl = window;
- PM_int86(0x10,®s,®s);
- if (regs.x.ax != VBE_SUCCESS)
- return -1;
- return regs.x.dx;
-}
-
-ibool VBEAPI VBE_setPixelsPerLine(int pixelsPerLine,int *newBytes,
- int *newPixels,int *maxScanlines)
-/****************************************************************************
-*
-* Function: VBE_setPixelsPerLine
-* Parameters: pixelsPerLine - Pixels per scanline
-* newBytes - Storage for bytes per line value set
-* newPixels - Storage for pixels per line value set
-* maxScanLines - Storage for maximum number of scanlines
-* Returns: True on success, false on failure
-*
-* Description: Sets the scanline length for the video mode to the specified
-* number of pixels per scanline. If you need more granularity
-* in TrueColor modes, use the VBE_setBytesPerLine routine
-* (only valid for VBE 2.0).
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 0;
- regs.x.cx = pixelsPerLine;
- PM_int86(0x10,®s,®s);
- *newBytes = regs.x.bx;
- *newPixels = regs.x.cx;
- *maxScanlines = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_setBytesPerLine(int bytesPerLine,int *newBytes,
- int *newPixels,int *maxScanlines)
-/****************************************************************************
-*
-* Function: VBE_setBytesPerLine
-* Parameters: pixelsPerLine - Pixels per scanline
-* newBytes - Storage for bytes per line value set
-* newPixels - Storage for pixels per line value set
-* maxScanLines - Storage for maximum number of scanlines
-* Returns: True on success, false on failure
-*
-* Description: Sets the scanline length for the video mode to the specified
-* number of bytes per scanline (valid for VBE 2.0 only).
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 2;
- regs.x.cx = bytesPerLine;
- PM_int86(0x10,®s,®s);
- *newBytes = regs.x.bx;
- *newPixels = regs.x.cx;
- *maxScanlines = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_getScanlineLength(int *bytesPerLine,int *pixelsPerLine,
- int *maxScanlines)
-/****************************************************************************
-*
-* Function: VBE_getScanlineLength
-* Parameters: bytesPerLine - Storage for bytes per scanline
-* pixelsPerLine - Storage for pixels per scanline
-* maxScanLines - Storage for maximum number of scanlines
-* Returns: True on success, false on failure
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 1;
- PM_int86(0x10,®s,®s);
- *bytesPerLine = regs.x.bx;
- *pixelsPerLine = regs.x.cx;
- *maxScanlines = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_getMaxScanlineLength(int *maxBytes,int *maxPixels)
-/****************************************************************************
-*
-* Function: VBE_getMaxScanlineLength
-* Parameters: maxBytes - Maximum scanline width in bytes
-* maxPixels - Maximum scanline width in pixels
-* Returns: True if successful, false if function failed
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F06;
- regs.h.bl = 3;
- PM_int86(0x10,®s,®s);
- *maxBytes = regs.x.bx;
- *maxPixels = regs.x.cx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_setDisplayStart(int x,int y,ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setDisplayStart
-* Parameters: x,y - Position of the first pixel to display
-* waitVRT - True to wait for retrace, false if not
-* Returns: True if function was successful.
-*
-* Description: Sets the new starting display position to implement
-* hardware scrolling.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F07;
- if (waitVRT)
- regs.x.bx = 0x80;
- else regs.x.bx = 0x00;
- regs.x.cx = x;
- regs.x.dx = y;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_getDisplayStart(int *x,int *y)
-/****************************************************************************
-*
-* Function: VBE_getDisplayStart
-* Parameters: x,y - Place to store starting address value
-* Returns: True if function was successful.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x01;
- PM_int86(0x10,®s,®s);
- *x = regs.x.cx;
- *y = regs.x.dx;
- return regs.x.ax == VBE_SUCCESS;
-}
-
-ibool VBEAPI VBE_setDisplayStartAlt(ulong startAddr,ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setDisplayStartAlt
-* Parameters: startAddr - 32-bit starting address in display memory
-* waitVRT - True to wait for vertical retrace, false if not
-* Returns: True if function was successful, false if not supported.
-*
-* Description: Sets the new starting display position to the specified
-* 32-bit display start address. Note that this function is
-* different the the version above, since it takes a 32-bit
-* byte offset in video memory as the starting address which
-* gives the programmer maximum control over the stat address.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT ? 0x82 : 0x02;
- regs.e.ecx = startAddr;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-int VBEAPI VBE_getDisplayStartStatus(void)
-/****************************************************************************
-*
-* Function: VBE_getDisplayStartStatus
-* Returns: 0 if last flip not occurred, 1 if already flipped
-* -1 if not supported
-*
-* Description: Returns the status of the previous display start request.
-* If this function is supported the programmer can implement
-* hardware triple buffering using this function.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x0004;
- PM_int86(0x10,®s,®s);
- if (regs.x.ax == VBE_SUCCESS)
- return (regs.x.cx != 0);
- }
- return -1;
-}
-
-ibool VBEAPI VBE_enableStereoMode(void)
-/****************************************************************************
-*
-* Function: VBE_enableStereoMode
-* Returns: True if stereo mode enabled, false if not supported.
-*
-* Description: Puts the system into hardware stereo mode for LC shutter
-* glasses, where the display swaps between two display start
-* addresses every vertical retrace.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x0005;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-ibool VBEAPI VBE_disableStereoMode(void)
-/****************************************************************************
-*
-* Function: VBE_disableStereoMode
-* Returns: True if stereo mode disabled, false if not supported.
-*
-* Description: Puts the system back into normal, non-stereo display mode
-* after having stereo mode enabled.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = 0x0006;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-ibool VBEAPI VBE_setStereoDisplayStart(ulong leftAddr,ulong rightAddr,
- ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setStereoDisplayStart
-* Parameters: leftAddr - 32-bit start address for left image
-* rightAddr - 32-bit start address for right image
-* waitVRT - True to wait for vertical retrace, false if not
-* Returns: True if function was successful, false if not supported.
-*
-* Description: Sets the new starting display position to the specified
-* 32-bit display start address. Note that this function is
-* different the the version above, since it takes a 32-bit
-* byte offset in video memory as the starting address which
-* gives the programmer maximum control over the stat address.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT ? 0x83 : 0x03;
- regs.e.ecx = leftAddr;
- regs.e.edx = rightAddr;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
- }
- return false;
-}
-
-ulong VBEAPI VBE_getClosestClock(ushort mode,ulong pixelClock)
-/****************************************************************************
-*
-* Function: VBE_getClosestClock
-* Parameters: mode - VBE mode to be used (include vbeLinearBuffer)
-* pixelClock - Desired pixel clock
-* Returns: Closest pixel clock to desired clock (-1 if not supported)
-*
-* Description: Calls the VBE/Core 3.0 interface to determine the closest
-* pixel clock to the requested value. The BIOS will always
-* search for a pixel clock that is no more than 1% below the
-* requested clock or somewhere higher than the clock. If the
-* clock is higher note that it may well be many Mhz higher
-* that requested and the application will have to check that
-* the returned value is suitable for it's needs. This function
-* returns the actual pixel clock that will be programmed by
-* the hardware.
-*
-* Note that if the pixel clock will be used with a linear
-* framebuffer mode, make sure you pass in the linear
-* framebuffer flag to this function.
-*
-* NOTE: Requires VBE/Core 3.0
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- if (state->VBEVersion >= 0x300) {
- regs.x.ax = 0x4F0B;
- regs.h.bl = 0x00;
- regs.e.ecx = pixelClock;
- regs.x.dx = mode;
- PM_int86(0x10,®s,®s);
- if (regs.x.ax == VBE_SUCCESS)
- return regs.e.ecx;
- }
- return -1;
-}
-
-ibool VBEAPI VBE_setDACWidth(int width)
-/****************************************************************************
-*
-* Function: VBE_setDACWidth
-* Parameters: width - Width to set the DAC to
-* Returns: True on success, false on failure
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F08;
- regs.h.bl = 0x00;
- regs.h.bh = width;
- PM_int86(0x10,®s,®s);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-int VBEAPI VBE_getDACWidth(void)
-/****************************************************************************
-*
-* Function: VBE_getDACWidth
-* Returns: Current width of the palette DAC
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F08;
- regs.h.bl = 0x01;
- PM_int86(0x10,®s,®s);
- if (regs.x.ax != VBE_SUCCESS)
- return -1;
- return regs.h.bh;
-}
-
-ibool VBEAPI VBE_setPalette(int start,int num,VBE_palette *pal,ibool waitVRT)
-/****************************************************************************
-*
-* Function: VBE_setPalette
-* Parameters: start - Starting palette index to program
-* num - Number of palette indexes to program
-* pal - Palette buffer containing values
-* waitVRT - Wait for vertical retrace flag
-* Returns: True on success, false on failure
-*
-* Description: Sets a block of palette registers by calling the VBE 2.0
-* BIOS. This function will fail on VBE 1.2 implementations.
-*
-****************************************************************************/
-{
- RMREGS regs;
-
- regs.x.ax = 0x4F09;
- regs.h.bl = waitVRT ? 0x80 : 0x00;
- regs.x.cx = num;
- regs.x.dx = start;
- VBE_callESDI(®s, pal, sizeof(VBE_palette) * num);
- return regs.x.ax == VBE_SUCCESS;
-}
-
-void * VBEAPI VBE_getBankedPointer(VBE_modeInfo *modeInfo)
-/****************************************************************************
-*
-* Function: VBE_getBankedPointer
-* Parameters: modeInfo - Mode info block for video mode
-* Returns: Selector to the linear framebuffer (0 on failure)
-*
-* Description: Returns a near pointer to the VGA framebuffer area.
-*
-****************************************************************************/
-{
- /* We just map the pointer every time, since the pointer will always
- * be in real mode memory, so we wont actually be mapping any real
- * memory.
- *
- * NOTE: We cannot currently map a near pointer to the banked frame
- * buffer for Watcom Win386, so we create a 16:16 far pointer to
- * the video memory. All the assembler code will render to the
- * video memory by loading the selector rather than using a
- * near pointer.
- */
- ulong seg = (ushort)modeInfo->WinASegment;
- if (seg != 0) {
- if (seg == 0xA000)
- return (void*)PM_getA0000Pointer();
- else
- return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true);
- }
- return NULL;
-}
-
-#ifndef REALMODE
-
-void * VBEAPI VBE_getLinearPointer(VBE_modeInfo *modeInfo)
-/****************************************************************************
-*
-* Function: VBE_getLinearPointer
-* Parameters: modeInfo - Mode info block for video mode
-* Returns: Selector to the linear framebuffer (0 on failure)
-*
-* Description: Returns a near pointer to the linear framebuffer for the video
-* mode.
-*
-****************************************************************************/
-{
- static ulong physPtr[MAX_LIN_PTRS] = {0};
- static void *linPtr[MAX_LIN_PTRS] = {0};
- static int numPtrs = 0;
- int i;
-
- /* Search for an already mapped pointer */
- for (i = 0; i < numPtrs; i++) {
- if (physPtr[i] == modeInfo->PhysBasePtr)
- return linPtr[i];
- }
- if (numPtrs < MAX_LIN_PTRS) {
- physPtr[numPtrs] = modeInfo->PhysBasePtr;
- linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true);
- return linPtr[numPtrs++];
- }
- return NULL;
-}
-
-static void InitPMCode(void)
-/****************************************************************************
-*
-* Function: InitPMCode - 32 bit protected mode version
-*
-* Description: Finds the address of and relocates the protected mode
-* code block from the VBE 2.0 into a local memory block. The
-* memory block is allocated with malloc() and must be freed
-* with VBE_freePMCode() after graphics processing is complete.
-*
-* Note that this buffer _must_ be recopied after each mode set,
-* as the routines will change depending on the underlying
-* video mode.
-*
-****************************************************************************/
-{
- RMREGS regs;
- RMSREGS sregs;
- uchar *code;
- int pmLen;
-
- if (!state->pmInfo && state->VBEVersion >= 0x200) {
- regs.x.ax = 0x4F0A;
- regs.x.bx = 0;
- PM_int86x(0x10,®s,®s,&sregs);
- if (regs.x.ax != VBE_SUCCESS)
- return;
- if (VBE_shared)
- state->pmInfo = PM_mallocShared(regs.x.cx);
- else
- state->pmInfo = PM_malloc(regs.x.cx);
- if (state->pmInfo == NULL)
- return;
- state->pmInfo32 = state->pmInfo;
- pmLen = regs.x.cx;
-
- /* Relocate the block into our local data segment */
- code = PM_mapRealPointer(sregs.es,regs.x.di);
- memcpy(state->pmInfo,code,pmLen);
-
- /* Now do a sanity check on the information we recieve to ensure
- * that is is correct. Some BIOS return totally bogus information
- * in here (Matrox is one)! Under DOS this works OK, but under OS/2
- * we are screwed.
- */
- if (state->pmInfo->setWindow >= pmLen ||
- state->pmInfo->setDisplayStart >= pmLen ||
- state->pmInfo->setPalette >= pmLen ||
- state->pmInfo->IOPrivInfo >= pmLen) {
- if (VBE_shared)
- PM_freeShared(state->pmInfo);
- else
- PM_free(state->pmInfo);
- state->pmInfo32 = state->pmInfo = NULL;
- return;
- }
-
- /* Read the IO priveledge info and determine if we need to
- * pass a selector to MMIO registers to the bank switch code.
- * Since we no longer support selector allocation, we no longer
- * support this mechanism so we disable the protected mode
- * interface in this case.
- */
- if (state->pmInfo->IOPrivInfo && !state->MMIOSel) {
- ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo);
- while (*p != 0xFFFF)
- p++;
- p++;
- if (*p != 0xFFFF)
- VBE_freePMCode();
- }
- }
-}
-
-void * VBEAPI VBE_getSetBank(void)
-/****************************************************************************
-*
-* Function: VBE_getSetBank
-* Returns: Pointer to the 32 VBE 2.0 bit bank switching routine.
-*
-****************************************************************************/
-{
- if (state->VBEVersion >= 0x200) {
- InitPMCode();
- if (state->pmInfo)
- return (uchar*)state->pmInfo + state->pmInfo->setWindow;
- }
- return NULL;
-}
-
-void * VBEAPI VBE_getSetDisplayStart(void)
-/****************************************************************************
-*
-* Function: VBE_getSetDisplayStart
-* Returns: Pointer to the 32 VBE 2.0 bit CRT start address routine.
-*
-****************************************************************************/
-{
- if (state->VBEVersion >= 0x200) {
- InitPMCode();
- if (state->pmInfo)
- return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart;
- }
- return NULL;
-}
-
-void * VBEAPI VBE_getSetPalette(void)
-/****************************************************************************
-*
-* Function: VBE_getSetPalette
-* Returns: Pointer to the 32 VBE 2.0 bit palette programming routine.
-*
-****************************************************************************/
-{
- if (state->VBEVersion >= 0x200) {
- InitPMCode();
- if (state->pmInfo)
- return (uchar*)state->pmInfo + state->pmInfo->setPalette;
- }
- return NULL;
-}
-
-void VBEAPI VBE_freePMCode(void)
-/****************************************************************************
-*
-* Function: VBE_freePMCode
-*
-* Description: This routine frees the protected mode code blocks that
-* we copied from the VBE 2.0 interface. This routine must
-* be after you have finished graphics processing to free up
-* the memory occupied by the routines. This is necessary
-* because the PM info memory block must be re-copied after
-* every video mode set from the VBE 2.0 implementation.
-*
-****************************************************************************/
-{
- if (state->pmInfo) {
- if (VBE_shared)
- PM_freeShared(state->pmInfo);
- else
- PM_free(state->pmInfo);
- state->pmInfo = NULL;
- state->pmInfo32 = NULL;
- }
-}
-
-void VBEAPI VBE_sharePMCode(void)
-/****************************************************************************
-*
-* Function: VBE_sharePMCode
-*
-* Description: Enables internal sharing of the PM code buffer for OS/2.
-*
-****************************************************************************/
-{
- VBE_shared = true;
-}
-
-/* Set of code stubs used to build the final bank switch code */
-
-#define VBE20_adjustOffset 7
-
-static uchar VBE20A_bankFunc32_Start[] = {
- 0x53,0x51, /* push ebx,ecx */
- 0x8B,0xD0, /* mov edx,eax */
- 0x33,0xDB, /* xor ebx,ebx */
- 0xB1,0x00, /* mov cl,0 */
- 0xD2,0xE2, /* shl dl,cl */
- };
-
-static uchar VBE20_bankFunc32_End[] = {
- 0x59,0x5B, /* pop ecx,ebx */
- };
-
-static uchar bankFunc32[100];
-
-#define copy(p,b,a) memcpy(b,a,sizeof(a)); (p) = (b) + sizeof(a)
-
-ibool VBEAPI VBE_getBankFunc32(int *codeLen,void **bankFunc,int dualBanks,
- int bankAdjust)
-/****************************************************************************
-*
-* Function: VBE_getBankFunc32
-* Parameters: codeLen - Place to store length of code
-* bankFunc - Place to store pointer to bank switch code
-* dualBanks - True if dual banks are in effect
-* bankAdjust - Bank shift adjustment factor
-* Returns: True on success, false if not compatible.
-*
-* Description: Creates a local 32 bit bank switch function from the
-* VBE 2.0 bank switch code that is compatible with the
-* virtual flat framebuffer devices (does not have a return
-* instruction at the end and takes the bank number in EAX
-* not EDX). Note that this 32 bit code cannot include int 10h
-* instructions, so we can only do this if we have VBE 2.0
-* or later.
-*
-* Note that we need to know the length of the 32 bit
-* bank switch function, which the standard VBE 2.0 spec
-* does not provide. In order to support this we have
-* extended the VBE 2.0 state->pmInfo structure in UniVBE 5.2 in a
-* way to support this, and we hope that this will become
-* a VBE 2.0 ammendment.
-*
-* Note also that we cannot run the linear framebuffer
-* emulation code with bank switching routines that require
-* a selector to the memory mapped registers passed in ES.
-*
-****************************************************************************/
-{
- int len;
- uchar *code;
- uchar *p;
-
- InitPMCode();
- if (state->VBEVersion >= 0x200 && state->pmInfo32 && !state->MMIOSel) {
- code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow;
- if (state->pmInfo32->extensionSig == VBE20_EXT_SIG)
- len = state->pmInfo32->setWindowLen-1;
- else {
- /* We are running on a system without the UniVBE 5.2 extension.
- * We do as best we can by scanning through the code for the
- * ret function to determine the length. This is not foolproof,
- * but is the best we can do.
- */
- p = code;
- while (*p != 0xC3)
- p++;
- len = p - code;
- }
- if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32))
- PM_fatalError("32-bit bank switch function too long!");
- copy(p,bankFunc32,VBE20A_bankFunc32_Start);
- memcpy(p,code,len);
- p += len;
- copy(p,p,VBE20_bankFunc32_End);
- *codeLen = p - bankFunc32;
- bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust;
- *bankFunc = bankFunc32;
- return true;
- }
- return false;
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c
deleted file mode 100644
index cb3afe2..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c
+++ /dev/null
@@ -1,80 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-#include <OS.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- thread_id thid = find_thread(NULL);
- thread_info tinfo;
- get_thread_info(thid, &tinfo);
- set_thread_priority(thid, B_REAL_TIME_PRIORITY);
- return tinfo.priority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int priority)
-{
- thread_id thid = find_thread(NULL);
- set_thread_priority(thid, priority);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- /* TODO: Return the frequency of the counter in here. You should try to */
- /* normalise this value to be around 100,000 ticks per second. */
- freq->low = 1000000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-
-TODO: Implement this to read the counter. It should be done as a macro
- for accuracy.
-****************************************************************************/
-#define GetCounter(t) { *((bigtime_t*) t) = system_time(); }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/event.c b/board/MAI/bios_emulator/scitech/src/pm/beos/event.c
deleted file mode 100644
index 93c6c0a..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/event.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: BeOS implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under non-DOS systems */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- /* TODO: Implement this for your OS! */
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the application message queue into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- /* TODO: The purpose of this function is to read all keyboard and mouse */
- /* events from the OS specific event queue, translate them and post */
- /* them into the SciTech event queue. */
- /* */
- /* NOTE: There are a couple of important things that this function must */
- /* take care of: */
- /* */
- /* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */
- /* */
- /* 2. Support for reading hardware scan code as well as ASCII */
- /* translated values is required. Games use the scan codes rather */
- /* than ASCII values. Scan codes go into the high order byte of the */
- /* keyboard message field. */
- /* */
- /* 3. Support for at least reading mouse motion data (mickeys) from the */
- /* mouse is required. Using the mickey values, we can then translate */
- /* to mouse cursor coordinates scaled to the range of the current */
- /* graphics display mode. Mouse values are scaled based on the */
- /* global 'rangeX' and 'rangeY'. */
- /* */
- /* 4. Support for a timestamp for the events is required, which is */
- /* defined as the number of milliseconds since some event (usually */
- /* system startup). This is the timestamp when the event occurred */
- /* (ie: at interrupt time) not when it was stuff into the SciTech */
- /* event queue. */
- /* */
- /* 5. Support for mouse double click events. If the OS has a native */
- /* mechanism to determine this, it should be used. Otherwise the */
- /* time stamp information will be used by the generic event code */
- /* to generate double click events. */
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* TODO: Do any OS specific initialisation here */
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: Do any OS specific cleanup in here */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h
deleted file mode 100644
index 043d73e..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-/* This is where you include OS specific headers for the event handling */
-/* library. */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c b/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c
deleted file mode 100644
index 2dcb1b8..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c
+++ /dev/null
@@ -1,539 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/* TODO: Include any BeOS specific headers here! */
-
-/*--------------------------- Global variables ----------------------------*/
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-void PMAPI PM_init(void)
-{
- /* TODO: Do any initialisation in here. This includes getting IOPL */
- /* access for the process calling PM_init. This will get called */
- /* more than once. */
-
- /* TODO: If you support the supplied MTRR register stuff (you need to */
- /* be at ring 0 for this!), you should initialise it in here. */
-
-/* MTRR_init(); */
-}
-
-long PMAPI PM_getOSType(void)
-{ return _OS_BEOS; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- /* TODO: If you are running in a GUI environment without a console, */
- /* this needs to be changed to bring up a fatal error message */
- /* box and terminate the program. */
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- /* No BIOS access for the BeOS */
- return NULL;
-}
-
-int PMAPI PM_kbhit(void)
-{
- /* TODO: This function checks if a key is available to be read. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return true;
-}
-
-int PMAPI PM_getch(void)
-{
- /* TODO: This returns the ASCII code of the key pressed. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return 0xD;
-}
-
-int PMAPI PM_openConsole(void)
-{
- /* TODO: Opens up a fullscreen console for graphics output. If your */
- /* console does not have graphics/text modes, this can be left */
- /* empty. The main purpose of this is to disable console switching */
- /* when in graphics modes if you can switch away from fullscreen */
- /* consoles (if you want to allow switching, this can be done */
- /* elsewhere with a full save/restore state of the graphics mode). */
- return 0;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* TODO: Returns the size of the console state buffer used to save the */
- /* state of the console before going into graphics mode. This is */
- /* used to restore the console back to normal when we are done. */
- return 1;
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
-{
- /* TODO: Saves the state of the console into the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,int console_id)
-{
- /* TODO: Restore the state of the console from the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-void PMAPI PM_closeConsole(int console_id)
-{
- /* TODO: Close the console when we are done, going back to text mode. */
-}
-
-void PM_setOSCursorLocation(int x,int y)
-{
- /* TODO: Set the OS console cursor location to the new value. This is */
- /* generally used for new OS ports (used mostly for DOS). */
-}
-
-void PM_setOSScreenWidth(int width,int height)
-{
- /* TODO: Set the OS console screen width. This is generally unused for */
- /* new OS ports. */
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
-{
- /* TODO: Install a real time clock interrupt handler. Normally this */
- /* will not be supported from most OS'es in user land, so an */
- /* alternative mechanism is needed to enable software stereo. */
- /* Hence leave this unimplemented unless you have a high priority */
- /* mechanism to call the 32-bit callback when the real time clock */
- /* interrupt fires. */
- return false;
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- /* TODO: Set the real time clock interrupt frequency. Used for stereo */
- /* LC shutter glasses when doing software stereo. Usually sets */
- /* the frequency to around 2048 Hz. */
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Restores the real time clock handler. */
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return '/'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return PM_getNucleusConfigPath(); }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- char *env = getenv("NUCLEUS_PATH");
- return env ? env : "/usr/lib/nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{
- /* TODO: Return a unique ID for the machine. If a unique ID is not */
- /* available, return the machine name. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-const char * PMAPI PM_getMachineName(void)
-{
- /* TODO: Return the network machine name for the machine. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* No BIOS access on the BeOS */
- return NULL;
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- /* TODO: This function maps a physical memory address to a linear */
- /* address in the address space of the calling process. */
-
- /* NOTE: This function *must* be able to handle any phsyical base */
- /* address, and hence you will have to handle rounding of */
- /* the physical base address to a page boundary (ie: 4Kb on */
- /* x86 CPU's) to be able to properly map in the memory */
- /* region. */
-
- /* NOTE: If possible the isCached bit should be used to ensure that */
- /* the PCD (Page Cache Disable) and PWT (Page Write Through) */
- /* bits are set to disable caching for a memory mapping used */
- /* for MMIO register access. We also disable caching using */
- /* the MTRR registers for Pentium Pro and later chipsets so if */
- /* MTRR support is enabled for your OS then you can safely ignore */
- /* the isCached flag and always enable caching in the page */
- /* tables. */
- return NULL;
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* TODO: This function will free a physical memory mapping previously */
- /* allocated with PM_mapPhysicalAddr() if at all possible. If */
- /* you can't free physical memory mappings, simply do nothing. */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- /* TODO: This is used to allocate memory that is shared between process */
- /* that all access the common Nucleus drivers via a common display */
- /* driver DLL. If your OS does not support shared memory (or if */
- /* the display driver does not need to allocate shared memory */
- /* for each process address space), this should just call PM_malloc. */
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- /* TODO: Free the shared memory block. This will be called in the context */
- /* of the original calling process that allocated the shared */
- /* memory with PM_mallocShared. Simply call free if you do not */
- /* need this. */
- PM_free(ptr);
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{
- /* TODO: This function is used to map a physical memory mapping */
- /* previously allocated with PM_mapPhysicalAddr into the */
- /* address space of the calling process. If the memory mapping */
- /* allocated by PM_mapPhysicalAddr is global to all processes, */
- /* simply return the pointer. */
- return base;
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- /* No BIOS access on the BeOS */
- return NULL;
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- /* No BIOS access on the BeOS */
- return NULL;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- /* No BIOS access on the BeOS */
-}
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- /* No BIOS access on the BeOS */
- return 0;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- /* No BIOS access on the BeOS */
- return 0;
-}
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- /* TODO: Report the amount of available memory, both the amount of */
- /* physical memory left and the amount of virtual memory left. */
- /* If the OS does not provide these services, report 0's. */
- *physical = *total = 0;
-}
-
-void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg)
-{
- /* TODO: Allocate a block of locked, physical memory of the specified */
- /* size. This is used for bus master operations. If this is not */
- /* supported by the OS, return NULL and bus mastering will not */
- /* be used. */
- return NULL;
-}
-
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
- /* TODO: Free a memory block allocated with PM_allocLockedMem. */
-}
-
-void PMAPI PM_setBankA(int bank)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI PM_setBankAB(int bank)
-{
- /* No BIOS access on the BeOS */
-}
-
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
-{
- /* No BIOS access on the BeOS */
-}
-
-ibool PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type)
-{
- /* TODO: This function should enable Pentium Pro and Pentium II MTRR */
- /* write combining for the passed in physical memory base address */
- /* and length. Normally this is done via calls to an OS specific */
- /* device driver as this can only be done at ring 0. */
- /* */
- /* NOTE: This is a *very* important function to implement! If you do */
- /* not implement, graphics performance on the latest Intel chips */
- /* will be severly impaired. For sample code that can be used */
- /* directly in a ring 0 device driver, see the MSDOS implementation */
- /* which includes assembler code to do this directly (if the */
- /* program is running at ring 0). */
- return false;
-}
-
-ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS)
-{
- /* TODO: This function is used to run the BIOS POST code on a secondary */
- /* controller to initialise it for use. This is not necessary */
- /* for multi-controller operation, but it will make it a lot */
- /* more convenicent for end users (otherwise they have to boot */
- /* the system once with the secondary controller as primary, and */
- /* then boot with both controllers installed). */
- /* */
- /* Even if you don't support full BIOS access, it would be */
- /* adviseable to be able to POST the secondary controllers in the */
- /* system using this function as a minimum requirement. Some */
- /* graphics hardware has registers that contain values that only */
- /* the BIOS knows about, which makes bring up a card from cold */
- /* reset difficult if the BIOS has not POST'ed it. */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-ulong PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- ulong handle,
- PM_findData *findData)
-{
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- ulong handle)
-{
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Set the file attributes for a file */
- (void)filename;
- (void)attrib;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/beos/vflat.c
deleted file mode 100644
index 579ef2c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c
deleted file mode 100644
index a528b73..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void _ZTimerInit(void)
-{
- /* TODO: Do any specific internal initialisation in here */
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void _LZTimerOn(
- LZTimerObject *tm)
-{
- /* TODO: Start the Zen Timer counting. This should be a macro if */
- /* possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong _LZTimerLap(
- LZTimerObject *tm)
-{
- /* TODO: Compute the lap time between the current time and when the */
- /* timer was started. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void _LZTimerOff(
- LZTimerObject *tm)
-{
- /* TODO: Stop the timer counting. Should be a macro if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong _LZTimerCount(
- LZTimerObject *tm)
-{
- /* TODO: Compute the elapsed time and return it. Always microseconds. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong _ULZReadTime(void)
-{
- /* TODO: Read the long period timer from the OS. The resolution of this */
- /* timer should be around 1/20 of a second for timing long */
- /* periods if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong _ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/codepage/us_eng.c b/board/MAI/bios_emulator/scitech/src/pm/codepage/us_eng.c
deleted file mode 100644
index 9aa8714..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/codepage/us_eng.c
+++ /dev/null
@@ -1,285 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Keyboard translation code pages for US English keyboards.
-*
-****************************************************************************/
-
-#include "event.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* This table is used for all normal key translations, and is the fallback
- * table if the key is not found in any of the other translation tables.
- * If the code is not found in this table, the ASCII code is set to 0 to
- * indicate that there is no ASCII code equivalent for this key.
- */
-static codepage_entry_t US_normal[] = {
- {0x01, 0x1B},
- {0x02, '1'},
- {0x03, '2'},
- {0x04, '3'},
- {0x05, '4'},
- {0x06, '5'},
- {0x07, '6'},
- {0x08, '7'},
- {0x09, '8'},
- {0x0A, '9'},
- {0x0B, '0'},
- {0x0C, '-'},
- {0x0D, '='},
- {0x0E, 0x08},
- {0x0F, 0x09},
- {0x10, 'q'},
- {0x11, 'w'},
- {0x12, 'e'},
- {0x13, 'r'},
- {0x14, 't'},
- {0x15, 'y'},
- {0x16, 'u'},
- {0x17, 'i'},
- {0x18, 'o'},
- {0x19, 'p'},
- {0x1A, '['},
- {0x1B, ']'},
- {0x1C, 0x0D},
- {0x1E, 'a'},
- {0x1F, 's'},
- {0x20, 'd'},
- {0x21, 'f'},
- {0x22, 'g'},
- {0x23, 'h'},
- {0x24, 'j'},
- {0x25, 'k'},
- {0x26, 'l'},
- {0x27, ';'},
- {0x28, '\''},
- {0x29, '`'},
- {0x2B, '\\'},
- {0x2C, 'z'},
- {0x2D, 'x'},
- {0x2E, 'c'},
- {0x2F, 'v'},
- {0x30, 'b'},
- {0x31, 'n'},
- {0x32, 'm'},
- {0x33, ','},
- {0x34, '.'},
- {0x35, '/'},
- {0x37, '*'}, /* Keypad */
- {0x39, ' '},
- {0x4A, '-'}, /* Keypad */
- {0x4E, '+'}, /* Keypad */
- {0x60, 0x0D}, /* Keypad */
- {0x61, '/'}, /* Keypad */
- };
-
-/* This table is used for when CAPSLOCK is active and the shift or ctrl
- * keys are not down. If the code is not found in this table, the normal
- * table above is then searched.
- */
-static codepage_entry_t US_caps[] = {
- {0x10, 'Q'},
- {0x11, 'W'},
- {0x12, 'E'},
- {0x13, 'R'},
- {0x14, 'T'},
- {0x15, 'Y'},
- {0x16, 'U'},
- {0x17, 'I'},
- {0x18, 'O'},
- {0x19, 'P'},
- {0x1E, 'A'},
- {0x1F, 'S'},
- {0x20, 'D'},
- {0x21, 'F'},
- {0x22, 'G'},
- {0x23, 'H'},
- {0x24, 'J'},
- {0x25, 'K'},
- {0x26, 'L'},
- {0x2C, 'Z'},
- {0x2D, 'X'},
- {0x2E, 'C'},
- {0x2F, 'V'},
- {0x30, 'B'},
- {0x31, 'N'},
- {0x32, 'M'},
- };
-
-/* This table is used for when shift key is down, but the ctrl key is not
- * down and CAPSLOCK is not active. If the code is not found in this table,
- * the normal table above is then searched.
- */
-static codepage_entry_t US_shift[] = {
- {0x02, '!'},
- {0x03, '@'},
- {0x04, '#'},
- {0x05, '$'},
- {0x06, '%'},
- {0x07, '^'},
- {0x08, '&'},
- {0x09, '*'},
- {0x0A, '('},
- {0x0B, ')'},
- {0x0C, '_'},
- {0x0D, '+'},
- {0x10, 'Q'},
- {0x11, 'W'},
- {0x12, 'E'},
- {0x13, 'R'},
- {0x14, 'T'},
- {0x15, 'Y'},
- {0x16, 'U'},
- {0x17, 'I'},
- {0x18, 'O'},
- {0x19, 'P'},
- {0x1A, '{'},
- {0x1B, '}'},
- {0x1E, 'A'},
- {0x1F, 'S'},
- {0x20, 'D'},
- {0x21, 'F'},
- {0x22, 'G'},
- {0x23, 'H'},
- {0x24, 'J'},
- {0x25, 'K'},
- {0x26, 'L'},
- {0x27, ':'},
- {0x28, '"'},
- {0x29, '~'},
- {0x2B, '|'},
- {0x2C, 'Z'},
- {0x2D, 'X'},
- {0x2E, 'C'},
- {0x2F, 'V'},
- {0x30, 'B'},
- {0x31, 'N'},
- {0x32, 'M'},
- {0x33, '<'},
- {0x34, '>'},
- {0x35, '?'},
- };
-
-/* This table is used for when CAPSLOCK is active and the shift key is
- * down, but the ctrl key is not. If the code is not found in this table,
- * the shift table above is then searched.
- */
-static codepage_entry_t US_shiftCaps[] = {
- {0x10, 'q'},
- {0x11, 'w'},
- {0x12, 'e'},
- {0x13, 'r'},
- {0x14, 't'},
- {0x15, 'y'},
- {0x16, 'u'},
- {0x17, 'i'},
- {0x18, 'o'},
- {0x19, 'p'},
- {0x1E, 'a'},
- {0x1F, 's'},
- {0x20, 'd'},
- {0x21, 'f'},
- {0x22, 'g'},
- {0x23, 'h'},
- {0x24, 'j'},
- {0x25, 'k'},
- {0x26, 'l'},
- {0x2C, 'z'},
- {0x2D, 'x'},
- {0x2E, 'c'},
- {0x2F, 'v'},
- {0x30, 'b'},
- {0x31, 'n'},
- {0x32, 'm'},
- };
-
-/* This table is used for all key translations when the ctrl key is down,
- * regardless of the state of the shift key and CAPSLOCK. If the code is
- * not found in this table, the ASCII code is set to 0 to indicate that
- * there is no ASCII code equivalent for this key.
- */
-static codepage_entry_t US_ctrl[] = {
- {0x01, 0x1B},
- {0x06, 0x1E},
- {0x0C, 0x1F},
- {0x0E, 0x7F},
- {0x10, 0x11},
- {0x11, 0x17},
- {0x12, 0x05},
- {0x13, 0x12},
- {0x14, 0x14},
- {0x15, 0x19},
- {0x16, 0x16},
- {0x17, 0x09},
- {0x18, 0x0F},
- {0x19, 0x10},
- {0x1A, 0x1B},
- {0x1B, 0x1D},
- {0x1C, 0x0A},
- {0x1E, 0x01},
- {0x1F, 0x13},
- {0x20, 0x04},
- {0x21, 0x06},
- {0x22, 0x07},
- {0x23, 0x08},
- {0x24, 0x0A},
- {0x25, 0x0B},
- {0x26, 0x0C},
- {0x2B, 0x1C},
- {0x2C, 0x1A},
- {0x2D, 0x18},
- {0x2E, 0x03},
- {0x2F, 0x16},
- {0x30, 0x02},
- {0x31, 0x0E},
- {0x32, 0x0D},
- {0x39, ' '},
- };
-
-static codepage_entry_t US_numPad[] = {
- {0x4C, '5'},
- {0x62, '4'},
- {0x63, '6'},
- {0x64, '8'},
- {0x65, '2'},
- {0x66, '0'},
- {0x67, '.'},
- {0x68, '7'},
- {0x69, '1'},
- {0x6A, '9'},
- {0x6B, '3'},
- };
-
-codepage_t _CP_US_English = {
- "US English",
- US_normal, EVT_ARR_SIZE(US_normal),
- US_caps, EVT_ARR_SIZE(US_caps),
- US_shift, EVT_ARR_SIZE(US_shift),
- US_shiftCaps, EVT_ARR_SIZE(US_shiftCaps),
- US_ctrl, EVT_ARR_SIZE(US_ctrl),
- US_numPad, EVT_ARR_SIZE(US_numPad),
- };
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common.c b/board/MAI/bios_emulator/scitech/src/pm/common.c
deleted file mode 100644
index d5a8e8f..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common.c
+++ /dev/null
@@ -1,480 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module containing code common to all platforms.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#if defined(__WIN32_VXD__) || defined(__OS2_VDD__) || defined(__NT_DRIVER__)
-#include "sdd/sddhelp.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#endif
-
-/*---------------------------- Global variables ---------------------------*/
-
-/* {secret} */
-long _VARAPI ___drv_os_type = _OS_UNSUPPORTED;
-static char localBPDPath[PM_MAX_PATH] = "";
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-path - Local path to the Nucleus BPD driver files.
-
-REMARKS:
-This function is used by the application program to override the location
-of the Nucleus driver files that are loaded. Normally the loader code
-will look in the system Nucleus directories first, then in the 'drivers'
-directory relative to the current working directory, and finally relative
-to the MGL_ROOT environment variable. By default the local BPD path is
-always set to the current directory if not initialised.
-****************************************************************************/
-void PMAPI PM_setLocalBPDPath(
- const char *path)
-{
- PM_init();
- strncpy(localBPDPath,path,sizeof(localBPDPath));
- localBPDPath[sizeof(localBPDPath)-1] = 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-bpdpath - Place to store the actual path to the file
-cachedpath - Place to store the cached BPD driver path
-trypath - Path to try to find the BPD file in
-subpath - Optional sub path to append to trypath
-dllname - Name of the Binary Portable DLL to load
-
-RETURNS:
-True if found, false if not.
-
-REMARKS:
-Trys the specified path to see if the BPD file can be found or not. If so,
-the path used is returned in bpdpath and cachedpath.
-****************************************************************************/
-static ibool TryPath(
- char *bpdpath,
- char *cachedpath,
- const char *trypath,
- const char *subpath,
- const char *dllname)
-{
- char filename[256];
- FILE *f;
-
- strcpy(bpdpath, trypath);
- PM_backslash(bpdpath);
- strcat(bpdpath,subpath);
- PM_backslash(bpdpath);
- strcpy(filename,bpdpath);
- strcat(filename,dllname);
- if ((f = fopen(filename,"rb")) == NULL)
- return false;
- if (cachedpath)
- strcpy(cachedpath,bpdpath);
- fclose(f);
- return true;
-}
-
-/****************************************************************************
-RETURNS:
-True if local override enabled, false if not.
-
-REMARKS:
-Tests to see if the local override option is enabled, and if so it will
-look for the Nucleus drivers in the local application directories in
-preference to the Nucleus system directories.
-****************************************************************************/
-static ibool GetLocalOverride(void)
-{
- char filename[256];
- FILE *f;
- static ibool local_override = -1;
-
- if (local_override == -1) {
- local_override = false;
- strcpy(filename,PM_getNucleusPath());
- PM_backslash(filename);
- strcat(filename,"graphics.ini");
- if ((f = fopen(filename,"r")) != NULL) {
- while (!feof(f) && fgets(filename,sizeof(filename),f)) {
- if (strnicmp(filename,"uselocal",8) == 0) {
- local_override = ((*(filename+9) - '0') == 1);
- break;
- }
- }
- fclose(f);
- }
- }
- return local_override;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Sets the location of the debug log file.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-dllname - Name of the Binary Portable DLL to load
-bpdpath - Place to store the actual path to the file
-
-RETURNS:
-True if found, false if not.
-
-REMARKS:
-Finds the location of a specific Binary Portable DLL, by searching all
-the standard SciTech Nucleus driver locations.
-****************************************************************************/
-ibool PMAPI PM_findBPD(
- const char *dllname,
- char *bpdpath)
-{
- static char cachedpath[PM_MAX_PATH] = "";
-
- /* On the first call determine the path to the Nucleus drivers */
- if (cachedpath[0] == 0) {
- /* First try in the global system Nucleus driver path if
- * the local override setting is not enabled.
- */
- PM_init();
- if (!GetLocalOverride()) {
- if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
- return true;
- }
-
- /* Next try in the local application directory if available */
- if (localBPDPath[0] != 0) {
- if (TryPath(bpdpath,cachedpath,localBPDPath,"",dllname))
- return true;
- }
- else {
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
- char *mgl_root;
- if ((mgl_root = getenv("MGL_ROOT")) != NULL) {
- if (TryPath(bpdpath,cachedpath,mgl_root,"drivers",dllname))
- return true;
- }
-#endif
- PM_getCurrentPath(bpdpath,PM_MAX_PATH);
- if (TryPath(bpdpath,cachedpath,bpdpath,"drivers",dllname))
- return true;
- }
-
- /* Finally try in the global system path again so that we
- * will still find the drivers in the global system path if
- * the local override option is on, but the application does
- * not have any local override drivers.
- */
- if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname))
- return true;
-
- /* Whoops, we can't find the BPD file! */
- return false;
- }
-
- /* Always try in the previously discovered path */
- return TryPath(bpdpath,NULL,cachedpath,"",dllname);
-}
-
-/****************************************************************************
-REMARKS:
-Copies a string into another, and returns dest + strlen(src).
-****************************************************************************/
-static char *_stpcpy(
- char *_dest,
- const char *_src)
-{
- if (!_dest || !_src)
- return 0;
- while ((*_dest++ = *_src++) != 0)
- ;
- return --_dest;
-}
-
-/****************************************************************************
-REMARKS:
-Copies a string into another, stopping at the maximum length. The string
-is properly terminated (unlike strncpy).
-****************************************************************************/
-static void safe_strncpy(
- char *dst,
- const char *src,
- unsigned maxlen)
-{
- if (dst) {
- if(strlen(src) >= maxlen) {
- strncpy(dst, src, maxlen);
- dst[maxlen] = 0;
- }
- else
- strcpy(dst, src);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Determins if the dot separator is present in the string.
-****************************************************************************/
-static int findDot(
- char *p)
-{
- if (*(p-1) == '.')
- p--;
- switch (*--p) {
- case ':':
- if (*(p-2) != '\0')
- break;
- case '/':
- case '\\':
- case '\0':
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Make a full pathname from split components.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-path - Place to store full path
-drive - Drive component for path
-dir - Directory component for path
-name - Filename component for path
-ext - Extension component for path
-
-REMARKS:
-Function to make a full pathname from split components. Under Unix the
-drive component will usually be empty. If the drive, dir, name, or ext
-parameters are null or empty, they are not inserted in the path string.
-Otherwise, if the drive doesn't end with a colon, one is inserted in the
-path. If the dir doesn't end in a slash, one is inserted in the path.
-If the ext doesn't start with a dot, one is inserted in the path.
-
-The maximum sizes for the path string is given by the constant PM_MAX_PATH,
-which includes space for the null-terminator.
-
-SEE ALSO:
-PM_splitPath
-****************************************************************************/
-void PMAPI PM_makepath(
- char *path,
- const char *drive,
- const char *dir,
- const char *name,
- const char *ext)
-{
- if (drive && *drive) {
- *path++ = *drive;
- *path++ = ':';
- }
- if (dir && *dir) {
- path = _stpcpy(path,dir);
- if (*(path-1) != '\\' && *(path-1) != '/')
-#ifdef __UNIX__
- *path++ = '/';
-#else
- *path++ = '\\';
-#endif
- }
- if (name)
- path = _stpcpy(path,name);
- if (ext && *ext) {
- if (*ext != '.')
- *path++ = '.';
- path = _stpcpy(path,ext);
- }
- *path = 0;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Split a full pathname into components.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-path - Full path to split
-drive - Drive component for path
-dir - Directory component for path
-name - Filename component for path
-ext - Extension component for path
-
-RETURNS:
-Flags indicating what components were parsed.
-
-REMARKS:
-Function to split a full pathmame into separate components in the form
-
- X:\DIR\SUBDIR\NAME.EXT
-
-and splits path into its four components. It then stores those components
-in the strings pointed to by drive, dir, name and ext. (Each component is
-required but can be a NULL, which means the corresponding component will be
-parsed but not stored).
-
-The maximum sizes for these strings are given by the constants PM_MAX_DRIVE
-and PM_MAX_PATH. PM_MAX_DRIVE is always 4, and PM_MAX_PATH is usually at
-least 256 characters. Under Unix the dir, name and ext components may be
-up to the full path in length.
-
-SEE ALSO:
-PM_makePath
-****************************************************************************/
-int PMAPI PM_splitpath(
- const char *path,
- char *drive,
- char *dir,
- char *name,
- char *ext)
-{
- char *p;
- int temp,ret;
- char buf[PM_MAX_PATH+2];
-
- /* Set all string to default value zero */
- ret = 0;
- if (drive) *drive = 0;
- if (dir) *dir = 0;
- if (name) *name = 0;
- if (ext) *ext = 0;
-
- /* Copy filename into template up to PM_MAX_PATH characters */
- p = buf;
- if ((temp = strlen(path)) > PM_MAX_PATH)
- temp = PM_MAX_PATH;
- *p++ = 0;
- strncpy(p, path, temp);
- *(p += temp) = 0;
-
- /* Split the filename and fill corresponding nonzero pointers */
- temp = 0;
- for (;;) {
- switch (*--p) {
- case '.':
- if (!temp && (*(p+1) == '\0'))
- temp = findDot(p);
- if ((!temp) && ((ret & PM_HAS_EXTENSION) == 0)) {
- ret |= PM_HAS_EXTENSION;
- safe_strncpy(ext, p, PM_MAX_PATH - 1);
- *p = 0;
- }
- continue;
- case ':':
- if (p != &buf[2])
- continue;
- case '\0':
- if (temp) {
- if (*++p)
- ret |= PM_HAS_DIRECTORY;
- safe_strncpy(dir, p, PM_MAX_PATH - 1);
- *p-- = 0;
- break;
- }
- case '/':
- case '\\':
- if (!temp) {
- temp++;
- if (*++p)
- ret |= PM_HAS_FILENAME;
- safe_strncpy(name, p, PM_MAX_PATH - 1);
- *p-- = 0;
- if (*p == 0 || (*p == ':' && p == &buf[2]))
- break;
- }
- continue;
- case '*':
- case '?':
- if (!temp)
- ret |= PM_HAS_WILDCARDS;
- default:
- continue;
- }
- break;
- }
- if (*p == ':') {
- if (buf[1])
- ret |= PM_HAS_DRIVE;
- safe_strncpy(drive, &buf[1], PM_MAX_DRIVE - 1);
- }
- return ret;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Block until a specific time has elapsed since the last call
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-milliseconds - Number of milliseconds for delay
-
-REMARKS:
-This function will block the calling thread or process until the specified
-number of milliseconds have passed since the /last/ call to this function.
-The first time this function is called, it will return immediately. On
-subsquent calls it will block until the specified time has elapsed, or it
-will return immediately if the time has already elapsed.
-
-This function is useful to provide constant time functionality in a
-program, such as a frame rate limiter for graphics applications etc.
-
-SEE ALSO:
-PM_sleep
-****************************************************************************/
-void PMAPI PM_blockUntilTimeout(
- ulong milliseconds)
-{
- ulong microseconds = milliseconds * 1000L,msDelay;
- static LZTimerObject tm;
- static ibool firstTime = true;
-
- if (firstTime) {
- firstTime = false;
- LZTimerOnExt(&tm);
- }
- else {
- if ((msDelay = (microseconds - LZTimerLapExt(&tm)) / 1000L) > 0)
- PM_sleep(msDelay);
- while (LZTimerLapExt(&tm) < microseconds)
- ;
- LZTimerOffExt(&tm);
- LZTimerOnExt(&tm);
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_cpuinfo.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_cpuinfo.asm
deleted file mode 100644
index 60ebed7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_cpuinfo.asm
+++ /dev/null
@@ -1,600 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: Intel 32 bit Protected Mode.
-;*
-;* Description: Code to determine the Intel processor type.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-header _cpuinfo
-
-begdataseg _cpuinfo ; Start of data segment
-
-cache_id db "01234567890123456"
-intel_id db "GenuineIntel" ; Intel vendor ID
-cyrix_id db "CyrixInstead" ; Cyrix vendor ID
-amd_id db "AuthenticAMD" ; AMD vendor ID
-idt_id db "CentaurHauls" ; IDT vendor ID
-
-CPU_IDT EQU 01000h ; Flag for IDT processors
-CPU_Cyrix EQU 02000h ; Flag for Cyrix processors
-CPU_AMD EQU 04000h ; Flag for AMD processors
-CPU_Intel EQU 08000h ; Flag for Intel processors
-
-enddataseg _cpuinfo
-
-begcodeseg _cpuinfo ; Start of code segment
-
-ifdef USE_NASM
-%macro mCPU_ID 0
-db 00Fh,0A2h
-%endmacro
-else
-MACRO mCPU_ID
-db 00Fh,0A2h
-ENDM
-endif
-
-ifdef USE_NASM
-%macro mRDTSC 0
-db 00Fh,031h
-%endmacro
-else
-MACRO mRDTSC
-db 00Fh,031h
-ENDM
-endif
-
-;----------------------------------------------------------------------------
-; bool _CPU_check80386(void)
-;----------------------------------------------------------------------------
-; Determines if we have an i386 processor.
-;----------------------------------------------------------------------------
-cprocstart _CPU_check80386
-
- enter_c
-
- xor edx,edx ; EDX = 0, not an 80386
- mov bx, sp
-ifdef USE_NASM
- and sp, ~3
-else
- and sp, not 3
-endif
- pushfd ; Push original EFLAGS
- pop eax ; Get original EFLAGS
- mov ecx, eax ; Save original EFLAGS
- xor eax, 40000h ; Flip AC bit in EFLAGS
- push eax ; Save new EFLAGS value on
- ; stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can't toggle AC bit,
- ; processor=80386
- jnz @@Done ; Jump if not an 80386 processor
- inc edx ; We have an 80386
-
-@@Done: push ecx
- popfd
- mov sp, bx
- mov eax, edx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; bool _CPU_check80486(void)
-;----------------------------------------------------------------------------
-; Determines if we have an i486 processor.
-;----------------------------------------------------------------------------
-cprocstart _CPU_check80486
-
- enter_c
-
-; Distinguish between the i486 and Pentium by the ability to set the ID flag
-; in the EFLAGS register. If the ID flag is set, then we can use the CPUID
-; instruction to determine the final version of the chip. Otherwise we
-; simply have an 80486.
-
-; Distinguish between the i486 and Pentium by the ability to set the ID flag
-; in the EFLAGS register. If the ID flag is set, then we can use the CPUID
-; instruction to determine the final version of the chip. Otherwise we
-; simply have an 80486.
-
- pushfd ; Get original EFLAGS
- pop eax
- mov ecx, eax
- xor eax, 200000h ; Flip ID bit in EFLAGS
- push eax ; Save new EFLAGS value on stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can not toggle ID bit,
- jnz @@1 ; Processor=80486
- mov eax,1 ; We dont have a Pentium
- jmp @@Done
-@@1: mov eax,0 ; We have Pentium or later
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; bool _CPU_checkClone(void)
-;----------------------------------------------------------------------------
-; Checks if the i386 or i486 processor is a clone or genuine Intel.
-;----------------------------------------------------------------------------
-cprocstart _CPU_checkClone
-
- enter_c
-
- mov ax,5555h ; Check to make sure this is a 32-bit processor
- xor dx,dx
- mov cx,2h
- div cx ; Perform Division
- clc
- jnz @@NoClone
- jmp @@Clone
-@@NoClone:
- stc
-@@Clone:
- pushfd
- pop eax ; Get the flags
- and eax,1
- xor eax,1 ; EAX=0 is probably Intel, EAX=1 is a Clone
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; bool _CPU_haveCPUID(void)
-;----------------------------------------------------------------------------
-; Determines if we have support for the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_haveCPUID
-
- enter_c
-
-ifdef flatmodel
- pushfd ; Get original EFLAGS
- pop eax
- mov ecx, eax
- xor eax, 200000h ; Flip ID bit in EFLAGS
- push eax ; Save new EFLAGS value on stack
- popfd ; Replace current EFLAGS value
- pushfd ; Get new EFLAGS
- pop eax ; Store new EFLAGS in EAX
- xor eax, ecx ; Can not toggle ID bit,
- jnz @@1 ; Processor=80486
- mov eax,0 ; We dont have CPUID support
- jmp @@Done
-@@1: mov eax,1 ; We have CPUID support
-else
- mov eax,0 ; CPUID requires 32-bit pmode
-endif
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_checkCPUID(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_checkCPUID
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax,eax ; Assume vendor is unknown
-
-; Check for GenuineIntel processors
-
- LEA_L esi,intel_id
- cmp [DWORD esi], ebx
- jne @@NotIntel
- cmp [DWORD esi+4], edx
- jne @@NotIntel
- cmp [DWORD esi+8], ecx
- jne @@NotIntel
- mov eax,CPU_Intel ; Flag that we have GenuineIntel
- jmp @@FoundVendor
-
-; Check for CyrixInstead processors
-
-@@NotIntel:
- LEA_L esi,cyrix_id
- cmp [DWORD esi], ebx
- jne @@NotCyrix
- cmp [DWORD esi+4], edx
- jne @@NotCyrix
- cmp [DWORD esi+8], ecx
- jne @@NotCyrix
- mov eax,CPU_Cyrix ; Flag that we have CyrixInstead
- jmp @@FoundVendor
-
-; Check for AuthenticAMD processors
-
-@@NotCyrix:
- LEA_L esi,amd_id
- cmp [DWORD esi], ebx
- jne @@NotAMD
- cmp [DWORD esi+4], edx
- jne @@NotAMD
- cmp [DWORD esi+8], ecx
- jne @@NotAMD
- mov eax,CPU_AMD ; Flag that we have AuthenticAMD
- jmp @@FoundVendor
-
-; Check for CentaurHauls processors
-
-@@NotAMD:
- LEA_L esi,idt_id
- cmp [DWORD esi], ebx
- jne @@NotIDT
- cmp [DWORD esi+4], edx
- jne @@NotIDT
- cmp [DWORD esi+8], ecx
- jne @@NotIDT
- mov eax,CPU_IDT ; Flag that we have AuthenticIDT
- jmp @@FoundVendor
-
-@@NotIDT:
-
-@@FoundVendor:
- push eax
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- and eax, 0F00h
- shr eax, 8 ; Isolate family
- and eax, 0Fh
- pop ecx
- or eax,ecx ; Combine in the clone flag
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCPUIDModel(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCPUIDModel
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- and eax, 0F0h
- shr eax, 4 ; Isolate model
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCPUIDStepping(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCPUIDStepping
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- and eax, 00Fh ; Isolate stepping
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCPUIDFeatures(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCPUIDFeatures
-
- enter_c
-
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax, 1 ; Make sure 1 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- xor eax, eax
- inc eax
- mCPU_ID ; Get family/model/stepping/features
- mov eax, edx
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_getCacheSize(void)
-;----------------------------------------------------------------------------
-; Determines the CPU cache size for Intel processors
-;----------------------------------------------------------------------------
-cprocstart _CPU_getCacheSize
-
- enter_c
- xor eax, eax ; Set up for CPUID instruction
- mCPU_ID ; Get and save vendor ID
- cmp eax,2 ; Make sure 2 is valid input for CPUID
- jl @@Fail ; We dont have the CPUID instruction
- mov eax,2
- mCPU_ID ; Get cache descriptors
- LEA_L esi,cache_id ; Get address of cache ID (-fPIC aware)
- shr eax,8
- mov [esi+0],eax
- mov [esi+3],ebx
- mov [esi+7],ecx
- mov [esi+11],edx
- xor eax,eax
- LEA_L esi,cache_id ; Get address of cache ID (-fPIC aware)
- mov edi,15
-@@ScanLoop:
- cmp [BYTE esi],41h
- mov eax,128
- je @@Done
- cmp [BYTE esi],42h
- mov eax,256
- je @@Done
- cmp [BYTE esi],43h
- mov eax,512
- je @@Done
- cmp [BYTE esi],44h
- mov eax,1024
- je @@Done
- cmp [BYTE esi],45h
- mov eax,2048
- je @@Done
- inc esi
- dec edi
- jnz @@ScanLoop
-
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uint _CPU_have3DNow(void)
-;----------------------------------------------------------------------------
-; Determines the CPU type using the CPUID instruction.
-;----------------------------------------------------------------------------
-cprocstart _CPU_have3DNow
-
- enter_c
-
- mov eax,80000000h ; Query for extended functions
- mCPU_ID ; Get extended function limit
- cmp eax,80000001h
- jbe @@Fail ; Nope, we dont have function 800000001h
- mov eax,80000001h ; Setup extended function 800000001h
- mCPU_ID ; and get the information
- test edx,80000000h ; Bit 31 is set if 3DNow! present
- jz @@Fail ; Nope, we dont have 3DNow support
- mov eax,1 ; Yep, we have 3DNow! support!
-@@Done: leave_c
- ret
-
-@@Fail: xor eax,eax
- jmp @@Done
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_quickRDTSC(void)
-;----------------------------------------------------------------------------
-; Reads the time stamp counter and returns the low order 32-bits
-;----------------------------------------------------------------------------
-cprocstart _CPU_quickRDTSC
-
- mRDTSC
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _CPU_runBSFLoop(ulong interations)
-;----------------------------------------------------------------------------
-; Runs a loop of BSF instructions for the specified number of iterations
-;----------------------------------------------------------------------------
-cprocstart _CPU_runBSFLoop
-
- ARG iterations:ULONG
-
- push _bp
- mov _bp,_sp
- push _bx
-
- mov edx,[iterations]
- mov eax,80000000h
- mov ebx,edx
-
- ALIGN 4
-
-@@loop: bsf ecx,eax
- dec ebx
- jnz @@loop
-
- pop _bx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _CPU_readTimeStamp(CPU_largeInteger *time);
-;----------------------------------------------------------------------------
-; Reads the time stamp counter and returns the 64-bit result.
-;----------------------------------------------------------------------------
-cprocstart _CPU_readTimeStamp
-
- mRDTSC
- mov ecx,[esp+4] ; Access directly without stack frame
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_diffTime64(CPU_largeInteger *t1,CPU_largeInteger *t2,CPU_largeInteger *t)
-;----------------------------------------------------------------------------
-; Computes the difference between two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _CPU_diffTime64
-
- ARG t1:DPTR, t2:DPTR, t:DPTR
-
- enter_c
-
- mov ecx,[t2]
- mov eax,[ecx] ; EAX := t2.low
- mov ecx,[t1]
- sub eax,[ecx]
- mov edx,eax ; EDX := low difference
- mov ecx,[t2]
- mov eax,[ecx+4] ; ECX := t2.high
- mov ecx,[t1]
- sbb eax,[ecx+4] ; EAX := high difference
-
- mov ebx,[t] ; Store the result
- mov [ebx],edx ; Store low part
- mov [ebx+4],eax ; Store high part
- mov eax,edx ; Return low part
-ifndef flatmodel
- shld edx,eax,16 ; Return in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_calcMicroSec(CPU_largeInteger *count,ulong freq);
-;----------------------------------------------------------------------------
-; Computes the value in microseconds for the elapsed time with maximum
-; precision. The formula we use is:
-;
-; us = (((diff * 0x100000) / freq) * 1000000) / 0x100000)
-;
-; The power of two multiple before the first divide allows us to scale the
-; 64-bit difference using simple shifts, and then the divide brings the
-; final result into the range to fit into a 32-bit integer.
-;----------------------------------------------------------------------------
-cprocstart _CPU_calcMicroSec
-
- ARG count:DPTR, freq:ULONG
-
- enter_c
-
- mov ecx,[count]
- mov eax,[ecx] ; EAX := low part
- mov edx,[ecx+4] ; EDX := high part
- shld edx,eax,20
- shl eax,20 ; diff * 0x100000
- div [DWORD freq] ; (diff * 0x100000) / freq
- mov ecx,1000000
- xor edx,edx
- mul ecx ; ((diff * 0x100000) / freq) * 1000000)
- shrd eax,edx,20 ; ((diff * 0x100000) / freq) * 1000000) / 0x100000
-ifndef flatmodel
- shld edx,eax,16 ; Return in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _CPU_mulDiv(ulong a,ulong b,ulong c);
-;----------------------------------------------------------------------------
-; Computes the following with 64-bit integer precision:
-;
-; result = (a * b) / c
-;
-;----------------------------------------------------------------------------
-cprocstart _CPU_mulDiv
-
- ARG a:ULONG, b:ULONG, c:ULONG
-
- enter_c
- mov eax,[a]
- imul [ULONG b]
- idiv [ULONG c]
-ifndef flatmodel
- shld edx,eax,16 ; Return in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-endcodeseg _cpuinfo
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_dma.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_dma.asm
deleted file mode 100644
index 2b6e1e8..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_dma.asm
+++ /dev/null
@@ -1,246 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 16/32 bit Ring 0 device driver
-;*
-;* Description: Assembler support routines for ISA DMA controller.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _dma ; Set up memory model
-
-begdataseg _dma ; Start of data segment
-
-cpublic _PM_DMADataStart
-
-; DMA register I/O addresses for channels 0-7 (except 4)
-
-DMAC_page db 087h,083h,081h,082h, -1,08Bh,089h,08Ah
-DMAC_addr db 000h,002h,004h,006h, -1,0C4h,0C8h,0CCh
-DMAC_cnt db 001h,003h,005h,007h, -1,0C6h,0CAh,0CEh
-DMAC_mask db 00Ah,00Ah,00Ah,00Ah, -1,0D4h,0D4h,0D4h
-DMAC_mode db 00Bh,00Bh,00Bh,00Bh, -1,0D6h,0D6h,0D6h
-DMAC_FF db 00Ch,00Ch,00Ch,00Ch, -1,0D8h,0D8h,0D8h
-
-cpublic _PM_DMADataEnd
-
-enddataseg _dma
-
-begcodeseg _dma ; Start of code segment
-
-ifdef flatmodel
-
-cpublic _PM_DMACodeStart
-
-;----------------------------------------------------------------------------
-; void PM_DMACDisable(int channel);
-;----------------------------------------------------------------------------
-; Masks DMA channel, inhibiting DMA transfers
-;----------------------------------------------------------------------------
-cprocstart PM_DMACDisable
-
- ARG channel:UINT
-
- push ebp
- mov ebp,esp
- mov ecx,[channel] ; ECX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
- mov al,cl
- and al,11b
- or al,100b ; AL = (channel & 3) | "set mask bit"
- mov dl,[DMAC_mask+ecx]
- out dx,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_DMACEnable(int channel);
-;----------------------------------------------------------------------------
-; Unmasks DMA channel, enabling DMA transfers
-;----------------------------------------------------------------------------
-cprocstart PM_DMACEnable
-
- ARG channel:UINT
-
- push ebp
- mov ebp,esp
- mov ecx,[channel] ; ECX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
- mov al,cl
- and al,11b ; AL = (channel & 3), "set mask bit"=0
- mov dl,[DMAC_mask+ecx]
- out dx,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_DMACProgram(int channel,int mode,ulong bufferPhys,int count);
-;----------------------------------------------------------------------------
-; Purpose: Program DMA controller to perform transfer from first 16MB
-; based on previously selected mode and channel. DMA transfer may be enabled
-; by subsequent call to PM_DMACEnable.
-;
-; Entry: channel - DMA channel in use (0-7)
-; mode - Selected DMAMODE type for transfer
-; buffer - 32-bit physical address of DMA buffer
-; count - DMA byte count (1-65536 bytes)
-;----------------------------------------------------------------------------
-cprocstart PM_DMACProgram
-
- ARG channel:UINT, mode:UINT, bufferPhys:ULONG, count:UINT
-
- enter_c
- pushfd
- cli ; Disable interrupts
-
-; Mask DMA channel to disable it
-
- mov ebx,[channel] ; EBX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
- mov al,bl
- and al,11b
- or al,100b ; AL = (channel & 3) | "set mask bit"
- mov dl,[DMAC_mask+ebx]
- out dx,al
-
-; Generate IOW to clear FF toggle state
-
- mov al,0
- mov dl,[DMAC_FF+ebx]
- out dx,al
-
-; Compute buffer address to program
-
- mov eax,[bufferPhys] ; AX := DMA address offset
- mov ecx,eax
- shr ecx,16 ; CL := bufferPhys >> 16 (DMA page)
- mov esi,[count] ; ESI = # of bytes to transfer
- cmp ebx,4 ; 16-bit channel?
- jb @@WriteDMAC ; No, program DMAC
- shr eax,1 ; Yes, convert address and count
- shr esi,1 ; to 16-bit, 128K/page format
-
-; Set the DMA address word (bits 0-15)
-
-@@WriteDMAC:
- mov dl,[DMAC_addr+ebx]
- out dx,al
- mov al,ah
- out dx,al
-
-; Set DMA transfer count
-
- mov eax,esi
- dec eax ; ESI = # of bytes to transfer - 1
- mov dl,[DMAC_cnt+ebx]
- out dx,al
- mov al,ah
- out dx,al
-
-; Set DMA page byte (bits 16-23)
-
- mov al,cl
- mov dl,[DMAC_page+ebx]
- out dx,al
-
-; Set the DMA channel mode
-
- mov al,bl
- and al,11b
- or al,[BYTE mode] ; EAX = (channel & 3) | mode
- mov dl,[DMAC_mode+ebx]
- out dx,al
-
- pop eax ; SMP safe interrupt state restore!
- test eax,200h
- jz @@1
- sti
-@@1: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong PMAPI PM_DMACPosition(int channel);
-;----------------------------------------------------------------------------
-; Returns the current position in a dma transfer. Interrupts should be
-; disabled before calling this function.
-;----------------------------------------------------------------------------
-cprocstart PM_DMACPosition
-
- ARG channel:UINT
-
- enter_c
- mov ecx,[channel] ; ECX indexes DMAC register tables
- mov dh,0 ; DH = 0 for DMAC register port access
-
-; Generate IOW to clear FF toggle state
-
- mov al,0
- mov dl,[DMAC_FF+ebx]
- out dx,al
- xor eax,eax
- xor ecx,ecx
-
-; Now read the current position for the channel
-
-@@ReadLoop:
- mov dl,[DMAC_cnt+ebx]
- out dx,al
- in al,dx
- mov cl,al
- in al,dx
- mov ch,al ; ECX := first count read
- in al,dx
- mov ah,al
- in al,dx
- xchg al,ah ; EAX := second count read
- sub ecx,eax
- cmp ecx,40h
- jg @@ReadLoop
- cmp ebx,4 ; 16-bit channel?
- jb @@Exit ; No, we are done
- shl eax,1 ; Yes, adjust to byte address
-
-@@Exit: leave_c
- ret
-
-cprocend
-
-
-cpublic _PM_DMACodeEnd
-
-endif
-
-endcodeseg _dma
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_int64.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_int64.asm
deleted file mode 100644
index fdec1b5..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_int64.asm
+++ /dev/null
@@ -1,309 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: Intel 32 bit Protected Mode.
-;*
-;* Description: Code for 64-bit arhithmetic
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-header _int64
-
-begcodeseg _int64 ; Start of code segment
-
-a_low EQU 04h ; Access a_low directly on stack
-a_high EQU 08h ; Access a_high directly on stack
-b_low EQU 0Ch ; Access b_low directly on stack
-shift EQU 0Ch ; Access shift directly on stack
-result_2 EQU 0Ch ; Access result directly on stack
-b_high EQU 10h ; Access b_high directly on stack
-result_3 EQU 10h ; Access result directly on stack
-result_4 EQU 14h ; Access result directly on stack
-
-;----------------------------------------------------------------------------
-; void _PM_add64(u32 a_low,u32 a_high,u32 b_low,u32 b_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Adds two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_add64
-
- mov eax,[esp+a_low]
- add eax,[esp+b_low]
- mov edx,[esp+a_high]
- adc edx,[esp+b_high]
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_sub64(u32 a_low,u32 a_high,u32 b_low,u32 b_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Subtracts two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_sub64
-
- mov eax,[esp+a_low]
- sub eax,[esp+b_low]
- mov edx,[esp+a_high]
- sbb edx,[esp+b_high]
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_mul64(u32 a_high,u32 a_low,u32 b_high,u32 b_low,__u64 *result);
-;----------------------------------------------------------------------------
-; Multiples two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_mul64
-
- mov eax,[esp+a_high]
- mov ecx,[esp+b_high]
- or ecx,eax
- mov ecx,[esp+b_low]
- jnz @@FullMultiply
- mov eax,[esp+a_low] ; EDX:EAX = b.low * a.low
- mul ecx
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-@@FullMultiply:
- push ebx
- mul ecx ; EDX:EAX = a.high * b.low
- mov ebx,eax
- mov eax,[esp+a_low+4]
- mul [DWORD esp+b_high+4] ; EDX:EAX = b.high * a.low
- add ebx,eax
- mov eax,[esp+a_low+4]
- mul ecx ; EDX:EAX = a.low * b.low
- add edx,ebx
- pop ebx
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_div64(u32 a_low,u32 a_high,u32 b_low,u32 b_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Divides two 64-bit numbers.
-;----------------------------------------------------------------------------
-cprocstart _PM_div64
-
- push edi
- push esi
- push ebx
- xor edi,edi
- mov eax,[esp+a_high+0Ch]
- or eax,eax
- jns @@ANotNeg
-
-; Dividend is negative, so negate it and save result for later
-
- inc edi
- mov edx,[esp+a_low+0Ch]
- neg eax
- neg edx
- sbb eax,0
- mov [esp+a_high+0Ch],eax
- mov [esp+a_low+0Ch],edx
-
-@@ANotNeg:
- mov eax,[esp+b_high+0Ch]
- or eax,eax
- jns @@BNotNeg
-
-; Divisor is negative, so negate it and save result for later
-
- inc edi
- mov edx,[esp+b_low+0Ch]
- neg eax
- neg edx
- sbb eax,0
- mov [esp+b_high+0Ch],eax
- mov [esp+b_low+0Ch],edx
-
-@@BNotNeg:
- or eax,eax
- jnz @@BHighNotZero
-
-; b.high is zero, so handle this faster
-
- mov ecx,[esp+b_low+0Ch]
- mov eax,[esp+a_high+0Ch]
- xor edx,edx
- div ecx
- mov ebx,eax
- mov eax,[esp+a_low+0Ch]
- div ecx
- mov edx,ebx
- jmp @@BHighZero
-
-@@BHighNotZero:
- mov ebx,eax
- mov ecx,[esp+b_low+0Ch]
- mov edx,[esp+a_high+0Ch]
- mov eax,[esp+a_low+0Ch]
-
-; Shift values right until b.high becomes zero
-
-@@ShiftLoop:
- shr ebx,1
- rcr ecx,1
- shr edx,1
- rcr eax,1
- or ebx,ebx
- jnz @@ShiftLoop
-
-; Now complete the divide process
-
- div ecx
- mov esi,eax
- mul [DWORD esp+b_high+0Ch]
- mov ecx,eax
- mov eax,[esp+b_low+0Ch]
- mul esi
- add edx,ecx
- jb @@8
- cmp edx,[esp+a_high+0Ch]
- ja @@8
- jb @@9
- cmp eax,[esp+a_low+0Ch]
- jbe @@9
-@@8: dec esi
-@@9: xor edx,edx
- mov eax,esi
-
-@@BHighZero:
- dec edi
- jnz @@Done
-
-; The result needs to be negated as either a or b was negative
-
- neg edx
- neg eax
- sbb edx,0
-
-@@Done: pop ebx
- pop esi
- pop edi
- mov ecx,[esp+result_4]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_shr64(u32 a_low,s32 a_high,s32 shift,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number right
-;----------------------------------------------------------------------------
-cprocstart _PM_shr64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- mov cl,[esp+shift]
- shrd edx,eax,cl
- mov ecx,[esp+result_3]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_sar64(u32 a_low,s32 a_high,s32 shift,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number right (signed)
-;----------------------------------------------------------------------------
-cprocstart _PM_sar64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- mov cl,[esp+shift]
- sar edx,cl
- rcr eax,cl
- mov ecx,[esp+result_3]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_shl64(u32 a_low,s32 a_high,s32 shift,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number left
-;----------------------------------------------------------------------------
-cprocstart _PM_shl64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- mov cl,[esp+shift]
- shld edx,eax,cl
- mov ecx,[esp+result_3]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; __i64 _PM_neg64(u32 a_low,s32 a_high,__u64 *result);
-;----------------------------------------------------------------------------
-; Shift a 64-bit number left
-;----------------------------------------------------------------------------
-cprocstart _PM_neg64
-
- mov eax,[esp+a_low]
- mov edx,[esp+a_high]
- neg eax
- neg edx
- sbb eax,0
- mov ecx,[esp+result_2]
- mov [ecx],eax
- mov [ecx+4],edx
- ret
-
-cprocend
-
-
-endcodeseg _int64
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_joy.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_joy.asm
deleted file mode 100644
index 0ff1ecf..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_joy.asm
+++ /dev/null
@@ -1,230 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler
-;* Environment: Intel x86, any OS
-;*
-;* Description: Assembly language support routines for reading analogue
-;* joysticks.
-;*
-;****************************************************************************
-
- ideal
-
-include "scitech.mac" ; Memory model macros
-
-ifdef flatmodel
-
-header _joy ; Set up memory model
-
-begcodeseg _joy ; Start of code segment
-
-;----------------------------------------------------------------------------
-; initTimer
-;----------------------------------------------------------------------------
-; Sets up 8253 timer 2 (PC speaker) to start timing, but not produce output.
-;----------------------------------------------------------------------------
-cprocstatic initTimer
-
-; Start timer 2 counting
-
- in al,61h
- and al,0FDh ; Disable speaker output (just in case)
- or al,1
- out 61h,al
-
-; Set the timer 2 count to 0 again to start the timing interval.
-
- mov al,10110100b ; set up to load initial (timer 2)
- out 43h,al ; timer count
- sub al,al
- out 42h,al ; load count lsb
- out 42h,al ; load count msb
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; readTimer2
-;----------------------------------------------------------------------------
-; Reads the number of ticks from the 8253 timer chip using channel 2 (PC
-; speaker). This is non-destructive and does not screw up other libraries.
-;----------------------------------------------------------------------------
-cprocstatic readTimer
-
- xor al,al ; Latch timer 0 command
- out 43h,al ; Latch timer
- in al,42h ; least significant byte
- mov ah,al
- in al,42h ; most significant byte
- xchg ah,al
- and eax,0FFFFh
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; exitTimer
-;----------------------------------------------------------------------------
-; Stops the 8253 timer 2 (PC speaker) counting
-;----------------------------------------------------------------------------
-cprocstatic exitTimer
-
-; Stop timer 2 from counting
-
- push eax
- in al,61h
- and al,0FEh
- out 61h,al
-
-; Some programs have a problem if we change the control port; better change it
-; to something they expect (mode 3 - square wave generator)...
- mov al,0B6h
- out 43h,al
-
- pop eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_readJoyAxis(int jmask,int *axis);
-;----------------------------------------------------------------------------
-; Function to poll the joystick to read the current axis positions.
-;----------------------------------------------------------------------------
-cprocstart _EVT_readJoyAxis
-
- ARG jmask:UINT, axis:DPTR
-
- LOCAL firstTick:UINT, lastTick:UINT, totalTicks:UINT = LocalSize
-
- enter_c
-
- mov ebx,[jmask]
- mov edi,[axis]
- mov ecx,(1193180/100)
- and ebx,01111b ; Mask out supported axes
- mov dx,201h ; DX := joystick I/O port
- call initTimer ; Start timer 2 counting
- call readTimer ; Returns counter in EAX
- mov [lastTick],eax
-
-@@WaitStable:
- in al,dx
- and al,bl ; Wait for the axes in question to be
- jz @@Stable ; done reading...
- call readTimer ; Returns counter in EAX
- xchg eax,[lastTick]
- cmp eax,[lastTick]
- jb @@1
- sub eax,[lastTick]
-@@1: add [totalTicks],eax
- cmp [totalTicks],ecx ; Check for timeout
- jae @@Stable
- jmp @@WaitStable
-
-@@Stable:
- mov al,0FFh
- out dx,al ; Start joystick reading
- call initTimer ; Start timer 2 counting
- call readTimer ; Returns counter in EAX
- mov [firstTick],eax ; Store initial count
- mov [lastTick],eax
- mov [DWORD totalTicks],0
- cli
-
-@@PollLoop:
- in al,dx ; Read Joystick port
- not al
- and al,bl ; Mask off channels we don't want to read
- jnz @@AxisFlipped ; See if any of the channels flipped
- call readTimer ; Returns counter in EAX
- xchg eax,[lastTick]
- cmp eax,[lastTick]
- jb @@2
- sub eax,[lastTick]
-@@2: add [totalTicks],eax
- cmp [totalTicks],ecx ; Check for timeout
- jae @@TimedOut
- jmp @@PollLoop
-
-@@AxisFlipped:
- xor esi,esi
- mov ah,1
- test al,ah
- jnz @@StoreCount ; Joystick 1, X axis flipped
- add esi,4
- mov ah,2
- test al,ah
- jnz @@StoreCount ; Joystick 1, Y axis flipped
- add esi,4
- mov ah,4
- test al,ah
- jnz @@StoreCount ; Joystick 2, X axis flipped
- add esi,4 ; Joystick 2, Y axis flipped
- mov ah,8
-
-@@StoreCount:
- or bh,ah ; Indicate this axis is active
- xor bl,ah ; Unmark the channels that just tripped
- call readTimer ; Returns counter in EAX
- xchg eax,[lastTick]
- cmp eax,[lastTick]
- jb @@3
- sub eax,[lastTick]
-@@3: add [totalTicks],eax
- mov eax,[totalTicks]
- mov [edi+esi],eax ; Record the time this channel flipped
- cmp bl,0 ; If there are more channels to read,
- jne @@PollLoop ; keep looping
-
-@@TimedOut:
- sti
- call exitTimer ; Stop timer 2 counting
- movzx eax,bh ; Return the mask of working axes
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_readJoyButtons(void);
-;----------------------------------------------------------------------------
-; Function to poll the current joystick buttons
-;----------------------------------------------------------------------------
-cprocstart _EVT_readJoyButtons
-
- mov dx,0201h
- in al,dx
- shr al,4
- not al
- and eax,0Fh
- ret
-
-cprocend
-
-endcodeseg _joy
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_mtrr.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_mtrr.asm
deleted file mode 100644
index 1e0a696..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_mtrr.asm
+++ /dev/null
@@ -1,272 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 16/32 bit Ring 0 device driver
-;*
-;* Description: Assembler support routines for the Memory Type Range Register
-;* (MTRR) module.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _mtrr ; Set up memory model
-
-begdataseg _mtrr
-
-ifdef DOS4GW
- cextern _PM_haveCauseWay,UINT
-endif
-
-enddataseg _mtrr
-
-begcodeseg _mtrr ; Start of code segment
-
-P586
-
-;----------------------------------------------------------------------------
-; ibool _MTRR_isRing0(void);
-;----------------------------------------------------------------------------
-; Checks to see if we are running at ring 0. This check is only relevant
-; for 32-bit DOS4GW and compatible programs. If we are not running under
-; DOS4GW, then we simply assume we are a ring 0 device driver.
-;----------------------------------------------------------------------------
-cprocnear _MTRR_isRing0
-
-; Are we running under CauseWay?
-
-ifdef DOS4GW
- enter_c
- mov ax,cs
- and eax,3
- xor eax,3
- jnz @@Exit
-
-; CauseWay runs the apps at ring 3, but implements support for specific
-; ring 0 instructions that we need to get stuff done under real DOS.
-
- mov eax,1
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Exit
-@@Fail: xor eax,eax
-@@Exit: leave_c
- ret
-else
-ifdef __SMX32__
- mov eax,1 ; SMX is ring 0!
- ret
-else
-ifdef __VXD__
- mov eax,1 ; VxD is ring 0!
- ret
-else
-ifdef __NT_DRIVER__
- mov eax,1 ; NT/W2K is ring 0!
- ret
-else
-else
- xor eax,eax ; Assume ring 3 for 32-bit DOS
- ret
-endif
-endif
-endif
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_disableInt
-
- pushfd ; Put flag word on stack
- cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreInt(ulong ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreInt
-
- ARG ps:ULONG
-
- push ebp
- mov ebp,esp ; Set up stack frame
- mov ecx,[ps]
- test ecx,200h ; SMP safe interrupt flag restore!
- jz @@1
- sti
-@@1: pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_saveCR4(void);
-;----------------------------------------------------------------------------
-; Save the value of CR4 and clear the Page Global Enable (bit 7). We also
-; disable and flush the caches.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_saveCR4
-
- enter_c
-
-; Save value of CR4 and clear Page Global Enable (bit 7)
-
- mov ebx,cr4
- mov eax,ebx
- and al,7Fh
- mov cr4,eax
-
-; Disable and flush caches
-
- mov eax,cr0
- or eax,40000000h
- wbinvd
- mov cr0,eax
- wbinvd
-
-; Return value from CR4
-
- mov eax,ebx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreCR4(ulong cr4Val)
-;----------------------------------------------------------------------------
-; Save the value of CR4 and clear the Page Global Enable (bit 7). We also
-; disable and flush the caches.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreCR4
-
- ARG cr4Val:ULONG
-
- enter_c
-
-; Enable caches
-
- mov eax,cr0
- and eax,0BFFFFFFFh
- mov cr0,eax
- mov eax,[cr4Val]
- mov cr4,eax
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_getCx86(uchar reg);
-;----------------------------------------------------------------------------
-; Read a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_getCx86
-
- ARG reg:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- in al,23h
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_setCx86(uchar reg,uchar val);
-;----------------------------------------------------------------------------
-; Write a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_setCx86
-
- ARG reg:UCHAR, val:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- mov al,[val]
- out 23h,al
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_readMSR(uong reg, ulong FAR *eax, ulong FAR *edx);
-;----------------------------------------------------------------------------
-; Writes the specific Machine Status Register used on the newer Intel
-; Pentium Pro and Pentium II motherboards.
-;----------------------------------------------------------------------------
-cprocnear _MTRR_readMSR
-
- ARG reg:ULONG, v_eax:DPTR, v_edx:DPTR
-
- enter_c
- mov ecx,[reg]
- rdmsr
- mov ebx,[v_eax]
- mov [ebx],eax
- mov ebx,[v_edx]
- mov [ebx],edx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_writeMSR(uong reg, ulong eax, ulong edx);
-;----------------------------------------------------------------------------
-; Writes the specific Machine Status Register used on the newer Intel
-; Pentium Pro and Pentium II motherboards.
-;----------------------------------------------------------------------------
-cprocnear _MTRR_writeMSR
-
- ARG reg:ULONG, v_eax:ULONG, v_edx:ULONG
-
- enter_c
- mov ecx,[reg]
- mov eax,[v_eax]
- mov edx,[v_edx]
- wrmsr
- leave_c
- ret
-
-cprocend
-
-endcodeseg _mtrr
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/_pcihelp.asm b/board/MAI/bios_emulator/scitech/src/pm/common/_pcihelp.asm
deleted file mode 100644
index 5b8dbcc..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/_pcihelp.asm
+++ /dev/null
@@ -1,358 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: Any
-;*
-;* Description: Helper assembler functions for PCI access module.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pcilib
-
-begcodeseg _pcilib
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; uchar _ASMAPI _BIOS32_service(
-; ulong service,
-; ulong func,
-; ulong *physBase,
-; ulong *length,
-; ulong *serviceOffset,
-; PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Call the BIOS32 services directory
-;----------------------------------------------------------------------------
-cprocstart _BIOS32_service
-
- ARG service:ULONG, func:ULONG, physBase:DPTR, len:DPTR, off:DPTR, entry:QWORD
-
- enter_c
- mov eax,[service]
- mov ebx,[func]
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
- mov esi,[physBase]
- mov [esi],ebx
- mov esi,[len]
- mov [esi],ecx
- mov esi,[off]
- mov [esi],edx
- leave_c
- ret
-
-cprocend
-
-endif
-
-;----------------------------------------------------------------------------
-; ushort _ASMAPI _PCIBIOS_isPresent(ulong i_eax,ulong *o_edx,ushort *oeax,
-; uchar *o_cl,PCIBIOS_entry entry)
-;----------------------------------------------------------------------------
-; Call the PCI BIOS to determine if it is present.
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_isPresent
-
- ARG i_eax:ULONG, o_edx:DPTR, oeax:DPTR, o_cl:DPTR, entry:QWORD
-
- enter_c
- mov eax,[i_eax]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- _les _si,[o_edx]
- mov [_ES _si],edx
- _les _si,[oeax]
- mov [_ES _si],ax
- _les _si,[o_cl]
- mov [_ES _si],cl
- mov ax,bx
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _PCIBIOS_service(ulong r_eax,ulong r_ebx,ulong r_edi,ulong r_ecx,
-; PCIBIOS_entry entry)
-;----------------------------------------------------------------------------
-; Call the PCI BIOS services, either via the 32-bit protected mode entry
-; point or via the Int 1Ah 16-bit interrupt.
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_service
-
- ARG r_eax:ULONG, r_ebx:ULONG, r_edi:ULONG, r_ecx:ULONG, entry:QWORD
-
- enter_c
- mov eax,[r_eax]
- mov ebx,[r_ebx]
- mov edi,[r_edi]
- mov ecx,[r_ecx]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- mov eax,ecx
-ifndef flatmodel
- shld edx,eax,16 ; Return result in DX:AX
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _PCIBIOS_getRouting(PCIRoutingOptionsBuffer *buf,PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Get the routing options for PCI devices
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_getRouting
-
- ARG buf:DPTR, entry:QWORD
-
- enter_c
- mov eax,0B10Eh
- mov bx,0
- _les _di,[buf]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- movzx eax,ah
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ibool _PCIBIOS_setIRQ(int busDev,int intPin,int IRQ,PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Change the IRQ routing for the PCI device
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_setIRQ
-
- ARG busDev:UINT, intPin:UINT, IRQ:UINT, entry:QWORD
-
- enter_c
- mov eax,0B10Fh
- mov bx,[USHORT busDev]
- mov cl,[BYTE intPin]
- mov ch,[BYTE IRQ]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- mov eax,1
- jnc @@1
- xor eax,eax ; Function failed!
-@@1: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _PCIBIOS_specialCycle(int bus,ulong data,PCIBIOS_entry entry);
-;----------------------------------------------------------------------------
-; Generate a special cycle via the PCI BIOS.
-;----------------------------------------------------------------------------
-cprocstart _PCIBIOS_specialCycle
-
- ARG bus:UINT, data:ULONG, entry:QWORD
-
- enter_c
- mov eax,0B106h
- mov bh,[BYTE bus]
- mov ecx,[data]
-ifdef flatmodel
-ifdef USE_NASM
- call far dword [entry]
-else
- call [FWORD entry]
-endif
-else
- int 1Ah
-endif
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ushort _PCI_getCS(void)
-;----------------------------------------------------------------------------
-cprocstart _PCI_getCS
-
- mov ax,cs
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_inpb(int port)
-;----------------------------------------------------------------------------
-; Reads a byte from the specified port
-;----------------------------------------------------------------------------
-cprocstart PM_inpb
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- xor _ax,_ax
- mov _dx,[port]
- in al,dx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_inpw(int port)
-;----------------------------------------------------------------------------
-; Reads a word from the specified port
-;----------------------------------------------------------------------------
-cprocstart PM_inpw
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- xor _ax,_ax
- mov _dx,[port]
- in ax,dx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong PM_inpd(int port)
-;----------------------------------------------------------------------------
-; Reads a word from the specified port
-;----------------------------------------------------------------------------
-cprocstart PM_inpd
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- in eax,dx
-ifndef flatmodel
- shld edx,eax,16 ; DX:AX = result
-endif
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_outpb(int port,int value)
-;----------------------------------------------------------------------------
-; Write a byte to the specified port.
-;----------------------------------------------------------------------------
-cprocstart PM_outpb
-
- ARG port:UINT, value:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov _ax,[value]
- out dx,al
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_outpw(int port,int value)
-;----------------------------------------------------------------------------
-; Write a word to the specified port.
-;----------------------------------------------------------------------------
-cprocstart PM_outpw
-
- ARG port:UINT, value:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov _ax,[value]
- out dx,ax
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_outpd(int port,ulong value)
-;----------------------------------------------------------------------------
-; Write a word to the specified port.
-;----------------------------------------------------------------------------
-cprocstart PM_outpd
-
- ARG port:UINT, value:ULONG
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov eax,[value]
- out dx,eax
- pop _bp
- ret
-
-cprocend
-
-endcodeseg _pcilib
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/agp.c b/board/MAI/bios_emulator/scitech/src/pm/common/agp.c
deleted file mode 100644
index d53bc88..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/agp.c
+++ /dev/null
@@ -1,189 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Ring 0 device driver
-*
-* Description: Generic module to implement AGP support functions using the
-* SciTech Nucleus AGP support drivers. If the OS provides
-* native AGP support, this module should *NOT* be used. Instead
-* wrappers should be placed around the OS support functions
-* to implement this functionality.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#ifndef REALMODE
-#include "nucleus/agp.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static AGP_devCtx *agp;
-static AGP_driverFuncs driver;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-RETURNS:
-Size of AGP aperture in MB on success, 0 on failure.
-
-REMARKS:
-This function initialises the AGP driver in the system and returns the
-size of the available AGP aperture in megabytes.
-****************************************************************************/
-ulong PMAPI PM_agpInit(void)
-{
- if ((agp = AGP_loadDriver(0)) == NULL)
- return 0;
- driver.dwSize = sizeof(driver);
- if (!agp->QueryFunctions(AGP_GET_DRIVERFUNCS,&driver))
- return 0;
- switch (driver.GetApertureSize()) {
- case agpSize4MB: return 4;
- case agpSize8MB: return 8;
- case agpSize16MB: return 16;
- case agpSize32MB: return 32;
- case agpSize64MB: return 64;
- case agpSize128MB: return 128;
- case agpSize256MB: return 256;
- case agpSize512MB: return 512;
- case agpSize1GB: return 1024;
- case agpSize2GB: return 2048;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This function closes down the loaded AGP driver.
-****************************************************************************/
-void PMAPI PM_agpExit(void)
-{
- AGP_unloadDriver(agp);
-}
-
-/****************************************************************************
-PARAMETERS:
-numPages - Number of memory pages that should be reserved
-type - Type of memory to allocate
-physContext - Returns the physical context handle for the mapping
-physAddr - Returns the physical address for the mapping
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function reserves a range of physical memory addresses on the system
-bus which the AGP controller will respond to. If this function succeeds,
-the AGP controller can respond to the reserved physical address range on
-the bus. However you must first call AGP_commitPhysical to cause this memory
-to actually be committed for use before it can be accessed.
-****************************************************************************/
-ibool PMAPI PM_agpReservePhysical(
- ulong numPages,
- int type,
- void **physContext,
- PM_physAddr *physAddr)
-{
- switch (type) {
- case PM_agpUncached:
- type = agpUncached;
- break;
- case PM_agpWriteCombine:
- type = agpWriteCombine;
- break;
- case PM_agpIntelDCACHE:
- type = agpIntelDCACHE;
- break;
- default:
- return false;
- }
- return driver.ReservePhysical(numPages,type,physContext,physAddr) == nOK;
-}
-
-/****************************************************************************
-PARAMETERS:
-physContext - Physical AGP context to release
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function releases a range of physical memory addresses on the system
-bus which the AGP controller will respond to. All committed memory for
-the physical address range covered by the context will be released.
-****************************************************************************/
-ibool PMAPI PM_agpReleasePhysical(
- void *physContext)
-{
- return driver.ReleasePhysical(physContext) == nOK;
-}
-
-/****************************************************************************
-PARAMETERS:
-physContext - Physical AGP context to commit memory for
-numPages - Number of pages to be committed
-startOffset - Offset in pages into the reserved physical context
-physAddr - Returns the physical address of the committed memory
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function commits into the specified physical context that was previously
-reserved by a call to ReservePhysical. You can use the startOffset and
-numPages parameters to only commit portions of the reserved memory range at
-a time.
-****************************************************************************/
-ibool PMAPI PM_agpCommitPhysical(
- void *physContext,
- ulong numPages,
- ulong startOffset,
- PM_physAddr *physAddr)
-{
- return driver.CommitPhysical(physContext,numPages,startOffset,physAddr) == nOK;
-}
-
-/****************************************************************************
-PARAMETERS:
-physContext - Physical AGP context to free memory for
-numPages - Number of pages to be freed
-startOffset - Offset in pages into the reserved physical context
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function frees memory previously committed by the CommitPhysical
-function. Note that you can free a portion of a memory range that was
-previously committed if you wish.
-****************************************************************************/
-ibool PMAPI PM_agpFreePhysical(
- void *physContext,
- ulong numPages,
- ulong startOffset)
-{
- return driver.FreePhysical(physContext,numPages,startOffset) == nOK;
-}
-
-#endif /* !REALMODE */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c b/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c
deleted file mode 100644
index 36867bd..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c
+++ /dev/null
@@ -1,449 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Direct keyboard event handling module. This module contains
-* code to process raw scan code information, convert it to
-* virtual scan codes and do code page translation to ASCII
-* for different international keyboard layouts.
-*
-****************************************************************************/
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Keyboard scan code to translate
-table - Code page table to search
-count - Number of entries in the code page table
-
-REMARKS:
-This function translates the scan codes from keyboard scan codes to ASCII
-codes using a binary search on the code page table.
-****************************************************************************/
-static uchar translateScan(
- uchar scanCode,
- codepage_entry_t *table,
- int count)
-{
- codepage_entry_t *test;
- int n,pivot,val;
-
- for (n = count; n > 0; ) {
- pivot = n >> 1;
- test = table + pivot;
- val = scanCode - test->scanCode;
- if (val < 0)
- n = pivot;
- else if (val == 0)
- return test->asciiCode;
- else {
- table = test + 1;
- n -= pivot + 1;
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-{secret}
-****************************************************************************/
-void _EVT_maskKeyCode(
- event_t *evt)
-{
- int ascii,scan = EVT_scanCode(evt->message);
-
- evt->message &= ~0xFF;
- if (evt->modifiers & EVT_NUMLOCK) {
- if ((ascii = translateScan(scan,EVT.codePage->numPad,EVT.codePage->numPadLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- if (evt->modifiers & EVT_CTRLSTATE) {
- evt->message |= translateScan(scan,EVT.codePage->ctrl,EVT.codePage->ctrlLen);
- return;
- }
- if (evt->modifiers & EVT_CAPSLOCK) {
- if (evt->modifiers & EVT_SHIFTKEY) {
- if ((ascii = translateScan(scan,EVT.codePage->shiftCaps,EVT.codePage->shiftCapsLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- else {
- if ((ascii = translateScan(scan,EVT.codePage->caps,EVT.codePage->capsLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- }
- if (evt->modifiers & EVT_SHIFTKEY) {
- if ((ascii = translateScan(scan,EVT.codePage->shift,EVT.codePage->shiftLen)) != 0) {
- evt->message |= ascii;
- return;
- }
- }
- evt->message |= translateScan(scan,EVT.codePage->normal,EVT.codePage->normalLen);
-}
-
-/****************************************************************************
-REMARKS:
-Returns true if the key with the specified scan code is being held down.
-****************************************************************************/
-static ibool _EVT_isKeyDown(
- uchar scanCode)
-{
- if (scanCode > 0x7F)
- return false;
- else
- return EVT.keyTable[scanCode] != 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message (ASCII code and scan code)
-
-REMARKS:
-Adds a new keyboard event to the event queue. This routine is called from
-within the keyboard interrupt subroutine!
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time.
-****************************************************************************/
-static void addKeyEvent(
- uint what,
- uint message)
-{
- event_t evt;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record */
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message | 0x10000UL;
- evt.where_x = 0;
- evt.where_y = 0;
- evt.relative_x = 0;
- evt.relative_y = 0;
- evt.modifiers = EVT.keyModifiers;
- if (evt.what == EVT_KEYREPEAT) {
- if (EVT.oldKey != -1)
- EVT.evtq[EVT.oldKey].message += 0x10000UL;
- else {
- EVT.oldKey = EVT.freeHead;
- addEvent(&evt); /* Add to tail of event queue */
- }
- }
- else {
-#ifdef __QNX__
- _EVT_maskKeyCode(&evt);
-#endif
- addEvent(&evt); /* Add to tail of event queue */
- }
- EVT.oldMove = -1;
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function waits for the keyboard controller to set the ready-for-write
-bit.
-****************************************************************************/
-static int kbWaitForWriteReady(void)
-{
- int timeout = 8192;
- while ((timeout > 0) && (PM_inpb(0x64) & 0x02))
- timeout--;
- return (timeout > 0);
-}
-
-/****************************************************************************
-REMARKS:
-This function waits for the keyboard controller to set the ready-for-read
-bit.
-****************************************************************************/
-static int kbWaitForReadReady(void)
-{
- int timeout = 8192;
- while ((timeout > 0) && (!(PM_inpb(0x64) & 0x01)))
- timeout--;
- return (timeout > 0);
-}
-
-/****************************************************************************
-PARAMETERS:
-data - Data to send to the keyboard
-
-REMARKS:
-This function sends a data byte to the keyboard controller.
-****************************************************************************/
-static int kbSendData(
- uchar data)
-{
- int resends = 4;
- int timeout, temp;
-
- do {
- if (!kbWaitForWriteReady())
- return 0;
- PM_outpb(0x60,data);
- timeout = 8192;
- while (--timeout > 0) {
- if (!kbWaitForReadReady())
- return 0;
- temp = PM_inpb(0x60);
- if (temp == 0xFA)
- return 1;
- if (temp == 0xFE)
- break;
- }
- } while ((resends-- > 0) && (timeout > 0));
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-modifiers - Keyboard modifier flags
-
-REMARKS:
-This function re-programs the LED's on the keyboard to the values stored
-in the passed in modifier flags. If the 'allowLEDS' flag is false, this
-function does nothing.
-****************************************************************************/
-static void setLEDS(
- uint modifiers)
-{
- if (EVT.allowLEDS) {
- if (!kbSendData(0xED) || !kbSendData((modifiers>>9) & 7)) {
- kbSendData(0xF4);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Function to process raw scan codes read from the keyboard controller.
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time.
-{secret}
-****************************************************************************/
-void processRawScanCode(
- int scan)
-{
- static int pauseLoop = 0;
- static int extended = 0;
- int what;
-
- if (pauseLoop) {
- /* Skip scan codes until the pause key sequence has been read */
- pauseLoop--;
- }
- else if (scan == 0xE0) {
- /* This signals the start of an extended scan code sequence */
- extended = 1;
- }
- else if (scan == 0xE1) {
- /* The Pause key sends a strange scan code sequence, which is:
- *
- * E1 1D 52 E1 9D D2
- *
- * However there is never any release code nor any auto-repeat for
- * this key. For this reason we simply ignore the key and skip the
- * next 5 scan codes read from the keyboard.
- */
- pauseLoop = 5;
- }
- else {
- /* Process the scan code normally (it may be an extended code
- * however!). Bit 7 means key was released, and bits 0-6 are the
- * scan code.
- */
- what = (scan & 0x80) ? EVT_KEYUP : EVT_KEYDOWN;
- scan &= 0x7F;
- if (extended) {
- extended = 0;
- if (scan == 0x2A || scan == 0x36) {
- /* Ignore these extended scan code sequences. These are
- * used by the keyboard controller to wrap around certain
- * key sequences for the keypad (and when NUMLOCK is down
- * internally).
- */
- return;
- }
-
- /* Convert extended codes for key sequences that we map to
- * virtual scan codes so the user can detect them in their
- * code.
- */
- switch (scan) {
- case KB_leftCtrl: scan = KB_rightCtrl; break;
- case KB_leftAlt: scan = KB_rightAlt; break;
- case KB_divide: scan = KB_padDivide; break;
- case KB_enter: scan = KB_padEnter; break;
- case KB_padTimes: scan = KB_sysReq; break;
- }
- }
- else {
- /* Convert regular scan codes for key sequences that we map to
- * virtual scan codes so the user can detect them in their
- * code.
- */
- switch (scan) {
- case KB_left: scan = KB_padLeft; break;
- case KB_right: scan = KB_padRight; break;
- case KB_up: scan = KB_padUp; break;
- case KB_down: scan = KB_padDown; break;
- case KB_insert: scan = KB_padInsert; break;
- case KB_delete: scan = KB_padDelete; break;
- case KB_home: scan = KB_padHome; break;
- case KB_end: scan = KB_padEnd; break;
- case KB_pageUp: scan = KB_padPageUp; break;
- case KB_pageDown: scan = KB_padPageDown; break;
- }
- }
-
- /* Determine if the key is an UP, DOWN or REPEAT and maintain the
- * up/down status of all keys in our global key array.
- */
- if (what == EVT_KEYDOWN) {
- if (EVT.keyTable[scan])
- what = EVT_KEYREPEAT;
- else
- EVT.keyTable[scan] = scan;
- }
- else {
- EVT.keyTable[scan] = 0;
- }
-
- /* Handle shift key modifiers */
- if (what != EVT_KEYREPEAT) {
- switch (scan) {
- case KB_capsLock:
- if (what == EVT_KEYDOWN)
- EVT.keyModifiers ^= EVT_CAPSLOCK;
- setLEDS(EVT.keyModifiers);
- break;
- case KB_numLock:
- if (what == EVT_KEYDOWN)
- EVT.keyModifiers ^= EVT_NUMLOCK;
- setLEDS(EVT.keyModifiers);
- break;
- case KB_scrollLock:
- if (what == EVT_KEYDOWN)
- EVT.keyModifiers ^= EVT_SCROLLLOCK;
- setLEDS(EVT.keyModifiers);
- break;
- case KB_leftShift:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_LEFTSHIFT;
- else
- EVT.keyModifiers |= EVT_LEFTSHIFT;
- break;
- case KB_rightShift:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_RIGHTSHIFT;
- else
- EVT.keyModifiers |= EVT_RIGHTSHIFT;
- break;
- case KB_leftCtrl:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_LEFTCTRL;
- else
- EVT.keyModifiers |= EVT_LEFTCTRL;
- break;
- case KB_rightCtrl:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_RIGHTCTRL;
- else
- EVT.keyModifiers |= EVT_RIGHTCTRL;
- break;
- case KB_leftAlt:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_LEFTALT;
- else
- EVT.keyModifiers |= EVT_LEFTALT;
- break;
- case KB_rightAlt:
- if (what == EVT_KEYUP)
- EVT.keyModifiers &= ~EVT_RIGHTALT;
- else
- EVT.keyModifiers |= EVT_RIGHTALT;
- break;
-#ifdef SUPPORT_CTRL_ALT_DEL
- case KB_delete:
- if ((EVT.keyModifiers & EVT_CTRLSTATE) && (EVT.keyModifiers & EVT_ALTSTATE))
- Reboot();
- break;
-#endif
- }
- }
-
- /* Add the untranslated key code to the event queue. All
- * translation to ASCII from the key codes occurs when the key
- * is extracted from the queue, saving time in the low level
- * interrupt handler.
- */
- addKeyEvent(what,scan << 8);
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Enables/disables the update of the keyboard LED status indicators.
-
-HEADER:
-event.h
-
-PARAMETERS:
-enable - True to enable, false to disable
-
-REMARKS:
-Enables the update of the keyboard LED status indicators. Sometimes it may
-be convenient in the application to turn off the updating of the LED
-status indicators (such as if a game is using the CAPSLOCK key for some
-function). Passing in a value of FALSE to this function will turn off all
-the LEDS, and stop updating them when the internal status changes (note
-however that internally we still keep track of the toggle key status!).
-****************************************************************************/
-void EVTAPI EVT_allowLEDS(
- ibool enable)
-{
- EVT.allowLEDS = true;
- if (enable)
- setLEDS(EVT.keyModifiers);
- else
- setLEDS(0);
- EVT.allowLEDS = enable;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/malloc.c b/board/MAI/bios_emulator/scitech/src/pm/common/malloc.c
deleted file mode 100644
index 83ef221..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/malloc.c
+++ /dev/null
@@ -1,205 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module for implementing the PM library overrideable memory
-* allocator functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-void * (*__PM_malloc)(size_t size) = malloc;
-void * (*__PM_calloc)(size_t nelem,size_t size) = calloc;
-void * (*__PM_realloc)(void *ptr,size_t size) = realloc;
-void (*__PM_free)(void *p) = free;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Use local memory allocation routines.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-malloc - Pointer to new malloc routine to use
-calloc - Pointer to new caalloc routine to use
-realloc - Pointer to new realloc routine to use
-free - Pointer to new free routine to use
-
-REMARKS:
-Tells the PM library to use a set of user specified memory allocation
-routines instead of using the normal malloc/calloc/realloc/free standard
-C library functions. This is useful if you wish to use a third party
-debugging malloc library or perhaps a set of faster memory allocation
-functions with the PM library, or any apps that use the PM library (such as
-the MGL). Once you have registered your memory allocation routines, all
-calls to PM_malloc, PM_calloc, PM_realloc and PM_free will be revectored to
-your local memory allocation routines.
-
-This is also useful if you need to keep track of just how much physical
-memory your program has been using. You can use the PM_availableMemory
-function to find out how much physical memory is available when the program
-starts, and then you can use your own local memory allocation routines to
-keep track of how much memory has been used and freed.
-
-NOTE: This function should be called right at the start of your application,
- before you initialise any other components or libraries.
-
-NOTE: Code compiled into Binary Portable DLL's and Drivers automatically
- end up calling these functions via the BPD C runtime library.
-
-SEE ALSO:
-PM_malloc, PM_calloc, PM_realloc, PM_free, PM_availableMemory
-****************************************************************************/
-void PMAPI PM_useLocalMalloc(
- void * (*malloc)(size_t size),
- void * (*calloc)(size_t nelem,size_t size),
- void * (*realloc)(void *ptr,size_t size),
- void (*free)(void *p))
-{
- __PM_malloc = malloc;
- __PM_calloc = calloc;
- __PM_realloc = realloc;
- __PM_free = free;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Allocate a block of memory.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-size - Size of block to allocate in bytes
-
-RETURNS:
-Pointer to allocated block, or NULL if out of memory.
-
-REMARKS:
-Allocates a block of memory of length size. If you have changed the memory
-allocation routines with the PM_useLocalMalloc function, then calls to this
-function will actually make calls to the local memory allocation routines
-that you have registered.
-
-SEE ALSO:
-PM_calloc, PM_realloc, PM_free, PM_useLocalMalloc
-****************************************************************************/
-void * PMAPI PM_malloc(
- size_t size)
-{
- return __PM_malloc(size);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Allocate and clear a large memory block.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-nelem - number of contiguous size-byte units to allocate
-size - size of unit in bytes
-
-RETURNS:
-Pointer to allocated memory if successful, NULL if out of memory.
-
-REMARKS:
-Allocates a block of memory of length (size * nelem), and clears the
-allocated area with zeros (0). If you have changed the memory allocation
-routines with the PM_useLocalMalloc function, then calls to this function
-will actually make calls to the local memory allocation routines that you
-have registered.
-
-SEE ALSO:
-PM_malloc, PM_realloc, PM_free, PM_useLocalMalloc
-****************************************************************************/
-void * PMAPI PM_calloc(
- size_t nelem,
- size_t size)
-{
- return __PM_calloc(nelem,size);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Re-allocate a block of memory
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-ptr - Pointer to block to resize
-size - size of unit in bytes
-
-RETURNS:
-Pointer to allocated memory if successful, NULL if out of memory.
-
-REMARKS:
-This function reallocates a block of memory that has been previously been
-allocated to the new of size. The new size may be smaller or larger than
-the original block of memory. If you have changed the memory allocation
-routines with the PM_useLocalMalloc function, then calls to this function
-will actually make calls to the local memory allocation routines that you
-have registered.
-
-SEE ALSO:
-PM_malloc, PM_calloc, PM_free, PM_useLocalMalloc
-****************************************************************************/
-void * PMAPI PM_realloc(
- void *ptr,
- size_t size)
-{
- return __PM_realloc(ptr,size);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Frees a block of memory.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-p - Pointer to memory block to free
-
-REMARKS:
-Frees a block of memory previously allocated with either PM_malloc,
-PM_calloc or PM_realloc.
-
-SEE ALSO:
-PM_malloc, PM_calloc, PM_realloc, PM_useLocalMalloc
-****************************************************************************/
-void PMAPI PM_free(
- void *p)
-{
- __PM_free(p);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c b/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c
deleted file mode 100644
index eed5f45..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c
+++ /dev/null
@@ -1,867 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Heavily based on code copyright (C) Richard Gooch
-*
-* Language: ANSI C
-* Environment: 32-bit Ring 0 device driver
-*
-* Description: Generic Memory Type Range Register (MTRR) functions to
-* manipulate the MTRR registers on supported CPU's. This code
-* *must* run at ring 0, so you can't normally include this
-* code directly in normal applications (the except is DOS4GW
-* apps which run at ring 0 under real DOS). Thus this code
-* will normally be compiled into a ring 0 device driver for
-* the target operating system.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "ztimerc.h"
-#include "mtrr.h"
-
-#ifndef REALMODE
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* Intel pre-defined MTRR registers */
-
-#define NUM_FIXED_RANGES 88
-#define INTEL_cap_MSR 0x0FE
-#define INTEL_defType_MSR 0x2FF
-#define INTEL_fix64K_00000_MSR 0x250
-#define INTEL_fix16K_80000_MSR 0x258
-#define INTEL_fix16K_A0000_MSR 0x259
-#define INTEL_fix4K_C0000_MSR 0x268
-#define INTEL_fix4K_C8000_MSR 0x269
-#define INTEL_fix4K_D0000_MSR 0x26A
-#define INTEL_fix4K_D8000_MSR 0x26B
-#define INTEL_fix4K_E0000_MSR 0x26C
-#define INTEL_fix4K_E8000_MSR 0x26D
-#define INTEL_fix4K_F0000_MSR 0x26E
-#define INTEL_fix4K_F8000_MSR 0x26F
-
-/* Macros to find the address of a paricular MSR register */
-
-#define INTEL_physBase_MSR(reg) (0x200 + 2 * (reg))
-#define INTEL_physMask_MSR(reg) (0x200 + 2 * (reg) + 1)
-
-/* Cyrix CPU configuration register indexes */
-#define CX86_CCR0 0xC0
-#define CX86_CCR1 0xC1
-#define CX86_CCR2 0xC2
-#define CX86_CCR3 0xC3
-#define CX86_CCR4 0xE8
-#define CX86_CCR5 0xE9
-#define CX86_CCR6 0xEA
-#define CX86_DIR0 0xFE
-#define CX86_DIR1 0xFF
-#define CX86_ARR_BASE 0xC4
-#define CX86_RCR_BASE 0xDC
-
-/* Structure to maintain machine state while updating MTRR registers */
-
-typedef struct {
- ulong flags;
- ulong defTypeLo;
- ulong defTypeHi;
- ulong cr4Val;
- ulong ccr3;
- } MTRRContext;
-
-static int numMTRR = -1;
-static int cpuFamily,cpuType,cpuStepping;
-static void (*getMTRR)(uint reg,ulong *base,ulong *size,int *type) = NULL;
-static void (*setMTRR)(uint reg,ulong base,ulong size,int type) = NULL;
-static int (*getFreeRegion)(ulong base,ulong size) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-RETURNS:
-Returns non-zero if we have the write-combining memory type
-****************************************************************************/
-static int MTRR_haveWriteCombine(void)
-{
- ulong config,dummy;
-
- switch (cpuFamily) {
- case CPU_AMD:
- if (cpuType < CPU_AMDAthlon) {
- /* AMD K6-2 stepping 8 and later support the MTRR registers.
- * The earlier K6-2 steppings (300Mhz models) do not
- * support MTRR's.
- */
- if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
- return 0;
- return 1;
- }
- /* Fall through for AMD Athlon which uses P6 style MTRR's */
- case CPU_Intel:
- _MTRR_readMSR(INTEL_cap_MSR,&config,&dummy);
- return (config & (1 << 10));
- case CPU_Cyrix:
- /* Cyrix 6x86 and later support the MTRR registers */
- if (cpuType < CPU_Cyrix6x86)
- return 0;
- return 1;
- }
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-
-RETURNS:
-The index of the region on success, else -1 on error.
-
-REMARKS:
-Generic function to find the location of a free MTRR register to be used
-for creating a new mapping.
-****************************************************************************/
-static int GENERIC_getFreeRegion(
- ulong base,
- ulong size)
-{
- int i,ltype;
- ulong lbase,lsize;
-
- for (i = 0; i < numMTRR; i++) {
- getMTRR(i,&lbase,&lsize,<ype);
- if (lsize < 1)
- return i;
- }
- (void)base;
- (void)size;
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-
-RETURNS:
-The index of the region on success, else -1 on error.
-
-REMARKS:
-Generic function to find the location of a free MTRR register to be used
-for creating a new mapping.
-****************************************************************************/
-static int AMDK6_getFreeRegion(
- ulong base,
- ulong size)
-{
- int i,ltype;
- ulong lbase,lsize;
-
- for (i = 0; i < numMTRR; i++) {
- getMTRR(i,&lbase,&lsize,<ype);
- if (lsize < 1)
- return i;
- }
- (void)base;
- (void)size;
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-
-RETURNS:
-The index of the region on success, else -1 on error.
-
-REMARKS:
-Cyrix specific function to find the location of a free MTRR register to be
-used for creating a new mapping.
-****************************************************************************/
-static int CYRIX_getFreeRegion(
- ulong base,
- ulong size)
-{
- int i,ltype;
- ulong lbase, lsize;
-
- if (size > 0x2000000UL) {
- /* If we are to set up a region >32M then look at ARR7 immediately */
- getMTRR(7,&lbase,&lsize,<ype);
- if (lsize < 1)
- return 7;
- }
- else {
- /* Check ARR0-6 registers */
- for (i = 0; i < 7; i++) {
- getMTRR(i,&lbase,&lsize,<ype);
- if (lsize < 1)
- return i;
- }
- /* Try ARR7 but its size must be at least 256K */
- getMTRR(7,&lbase,&lsize,<ype);
- if ((lsize < 1) && (size >= 0x40000))
- return i;
- }
- (void)base;
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-c - Place to store the machine context across the call
-
-REMARKS:
-Puts the processor into a state where MTRRs can be safely updated
-****************************************************************************/
-static void MTRR_beginUpdate(
- MTRRContext *c)
-{
- c->flags = _MTRR_disableInt();
- if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) {
- switch (cpuFamily) {
- case CPU_Intel:
- case CPU_AMD:
- /* Disable MTRRs, and set the default type to uncached */
- c->cr4Val = _MTRR_saveCR4();
- _MTRR_readMSR(INTEL_defType_MSR,&c->defTypeLo,&c->defTypeHi);
- _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo & 0xF300UL,c->defTypeHi);
- break;
- case CPU_Cyrix:
- c->ccr3 = _MTRR_getCx86(CX86_CCR3);
- _MTRR_setCx86(CX86_CCR3, (uchar)((c->ccr3 & 0x0F) | 0x10));
- break;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-c - Place to restore the machine context from
-
-REMARKS:
-Restores the processor after updating any of the registers
-****************************************************************************/
-static void MTRR_endUpdate(
- MTRRContext *c)
-{
- if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) {
- PM_flushTLB();
- switch (cpuFamily) {
- case CPU_Intel:
- case CPU_AMD:
- _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo,c->defTypeHi);
- _MTRR_restoreCR4(c->cr4Val);
- break;
- case CPU_Cyrix:
- _MTRR_setCx86(CX86_CCR3,(uchar)c->ccr3);
- break;
- }
- }
-
- /* Re-enable interrupts (if enabled previously) */
- _MTRR_restoreInt(c->flags);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to read
-base - Place to store the starting physical base address of the region
-size - Place to store the size in bytes of the region
-type - Place to store the type of the MTRR register
-
-REMARKS:
-Intel specific function to read the value of a specific MTRR register.
-****************************************************************************/
-static void INTEL_getMTRR(
- uint reg,
- ulong *base,
- ulong *size,
- int *type)
-{
- ulong hi,maskLo,baseLo;
-
- _MTRR_readMSR(INTEL_physMask_MSR(reg),&maskLo,&hi);
- if ((maskLo & 0x800) == 0) {
- /* MTRR is disabled, so it is free */
- *base = 0;
- *size = 0;
- *type = 0;
- return;
- }
- _MTRR_readMSR(INTEL_physBase_MSR(reg),&baseLo,&hi);
- maskLo = (maskLo & 0xFFFFF000UL);
- *size = ~(maskLo - 1);
- *base = (baseLo & 0xFFFFF000UL);
- *type = (baseLo & 0xFF);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void INTEL_setMTRR(
- uint reg,
- ulong base,
- ulong size,
- int type)
-{
- MTRRContext c;
-
- MTRR_beginUpdate(&c);
- if (size == 0) {
- /* The invalid bit is kept in the mask, so we simply clear the
- * relevant mask register to disable a range.
- */
- _MTRR_writeMSR(INTEL_physMask_MSR(reg),0,0);
- }
- else {
- _MTRR_writeMSR(INTEL_physBase_MSR(reg),base | type,0);
- _MTRR_writeMSR(INTEL_physMask_MSR(reg),~(size - 1) | 0x800,0);
- }
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-REMARKS:
-Disabled banked write combing for Intel processors. We always disable this
-because it invariably causes problems with older hardware.
-****************************************************************************/
-static void INTEL_disableBankedWriteCombine(void)
-{
- MTRRContext c;
-
- MTRR_beginUpdate(&c);
- _MTRR_writeMSR(INTEL_fix16K_A0000_MSR,0,0);
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void AMD_getMTRR(
- uint reg,
- ulong *base,
- ulong *size,
- int *type)
-{
- ulong low,high;
-
- /* Upper dword is region 1, lower is region 0 */
- _MTRR_readMSR(0xC0000085, &low, &high);
- if (reg == 1)
- low = high;
-
- /* Find the base and type for the region */
- *base = low & 0xFFFE0000;
- *type = 0;
- if (low & 1)
- *type = PM_MTRR_UNCACHABLE;
- if (low & 2)
- *type = PM_MTRR_WRCOMB;
- if ((low & 3) == 0) {
- *size = 0;
- return;
- }
-
- /* This needs a little explaining. The size is stored as an
- * inverted mask of bits of 128K granularity 15 bits long offset
- * 2 bits
- *
- * So to get a size we do invert the mask and add 1 to the lowest
- * mask bit (4 as its 2 bits in). This gives us a size we then shift
- * to turn into 128K blocks
- *
- * eg 111 1111 1111 1100 is 512K
- *
- * invert 000 0000 0000 0011
- * +1 000 0000 0000 0100
- * *128K ...
- */
- low = (~low) & 0x0FFFC;
- *size = (low + 4) << 15;
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void AMD_setMTRR(
- uint reg,
- ulong base,
- ulong size,
- int type)
-{
- ulong low,high,newVal;
- MTRRContext c;
-
- MTRR_beginUpdate(&c);
- _MTRR_readMSR(0xC0000085, &low, &high);
- if (size == 0) {
- /* Clear register to disable */
- if (reg)
- high = 0;
- else
- low = 0;
- }
- else {
- /* Set the register to the base (already shifted for us), the
- * type (off by one) and an inverted bitmask of the size
- * The size is the only odd bit. We are fed say 512K
- * We invert this and we get 111 1111 1111 1011 but
- * if you subtract one and invert you get the desired
- * 111 1111 1111 1100 mask
- */
- newVal = (((~(size-1)) >> 15) & 0x0001FFFC) | base | (type+1);
- if (reg)
- high = newVal;
- else
- low = newVal;
- }
-
- /* The writeback rule is quite specific. See the manual. Its
- * disable local interrupts, write back the cache, set the MTRR
- */
- PM_flushTLB();
- _MTRR_writeMSR(0xC0000085, low, high);
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void CYRIX_getMTRR(
- uint reg,
- ulong *base,
- ulong *size,
- int *type)
-{
- MTRRContext c;
- uchar arr = CX86_ARR_BASE + reg*3;
- uchar rcr,shift;
-
- /* Save flags and disable interrupts */
- MTRR_beginUpdate(&c);
- ((uchar*)base)[3] = _MTRR_getCx86(arr);
- ((uchar*)base)[2] = _MTRR_getCx86((uchar)(arr+1));
- ((uchar*)base)[1] = _MTRR_getCx86((uchar)(arr+2));
- rcr = _MTRR_getCx86((uchar)(CX86_RCR_BASE + reg));
- MTRR_endUpdate(&c);
-
- /* Enable interrupts if it was enabled previously */
- shift = ((uchar*)base)[1] & 0x0f;
- *base &= 0xFFFFF000UL;
-
- /* Power of two, at least 4K on ARR0-ARR6, 256K on ARR7
- * Note: shift==0xF means 4G, this is unsupported.
- */
- if (shift)
- *size = (reg < 7 ? 0x800UL : 0x20000UL) << shift;
- else
- *size = 0;
-
- /* Bit 0 is Cache Enable on ARR7, Cache Disable on ARR0-ARR6 */
- if (reg < 7) {
- switch (rcr) {
- case 1: *type = PM_MTRR_UNCACHABLE; break;
- case 8: *type = PM_MTRR_WRBACK; break;
- case 9: *type = PM_MTRR_WRCOMB; break;
- case 24:
- default: *type = PM_MTRR_WRTHROUGH; break;
- }
- }
- else {
- switch (rcr) {
- case 0: *type = PM_MTRR_UNCACHABLE; break;
- case 8: *type = PM_MTRR_WRCOMB; break;
- case 9: *type = PM_MTRR_WRBACK; break;
- case 25:
- default: *type = PM_MTRR_WRTHROUGH; break;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - MTRR register to set
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-REMARKS:
-Intel specific function to set the value of a specific MTRR register to
-the passed in base, size and type.
-****************************************************************************/
-static void CYRIX_setMTRR(
- uint reg,
- ulong base,
- ulong size,
- int type)
-{
- MTRRContext c;
- uchar arr = CX86_ARR_BASE + reg*3;
- uchar arr_type,arr_size;
-
- /* Count down from 32M (ARR0-ARR6) or from 2G (ARR7) */
- size >>= (reg < 7 ? 12 : 18);
- size &= 0x7FFF; /* Make sure arr_size <= 14 */
- for (arr_size = 0; size; arr_size++, size >>= 1)
- ;
- if (reg < 7) {
- switch (type) {
- case PM_MTRR_UNCACHABLE: arr_type = 1; break;
- case PM_MTRR_WRCOMB: arr_type = 9; break;
- case PM_MTRR_WRTHROUGH: arr_type = 24; break;
- default: arr_type = 8; break;
- }
- }
- else {
- switch (type) {
- case PM_MTRR_UNCACHABLE: arr_type = 0; break;
- case PM_MTRR_WRCOMB: arr_type = 8; break;
- case PM_MTRR_WRTHROUGH: arr_type = 25; break;
- default: arr_type = 9; break;
- }
- }
- MTRR_beginUpdate(&c);
- _MTRR_setCx86((uchar)arr, ((uchar*)&base)[3]);
- _MTRR_setCx86((uchar)(arr+1), ((uchar*)&base)[2]);
- _MTRR_setCx86((uchar)(arr+2), (uchar)((((uchar*)&base)[1]) | arr_size));
- _MTRR_setCx86((uchar)(CX86_RCR_BASE + reg), (uchar)arr_type);
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-REMARKS:
-On Cyrix 6x86(MX) and MII the ARR3 is special: it has connection
-with the SMM (System Management Mode) mode. So we need the following:
-Check whether SMI_LOCK (CCR3 bit 0) is set
- if it is set, ARR3 cannot be changed (it cannot be changed until the
- next processor reset)
- if it is reset, then we can change it, set all the needed bits:
- - disable access to SMM memory through ARR3 range (CCR1 bit 7 reset)
- - disable access to SMM memory (CCR1 bit 2 reset)
- - disable SMM mode (CCR1 bit 1 reset)
- - disable write protection of ARR3 (CCR6 bit 1 reset)
- - (maybe) disable ARR3
-Just to be sure, we enable ARR usage by the processor (CCR5 bit 5 set)
-****************************************************************************/
-static void CYRIX_initARR(void)
-{
- MTRRContext c;
- uchar ccr[7];
- int ccrc[7] = { 0, 0, 0, 0, 0, 0, 0 };
-
- /* Begin updating */
- MTRR_beginUpdate(&c);
-
- /* Save all CCRs locally */
- ccr[0] = _MTRR_getCx86(CX86_CCR0);
- ccr[1] = _MTRR_getCx86(CX86_CCR1);
- ccr[2] = _MTRR_getCx86(CX86_CCR2);
- ccr[3] = (uchar)c.ccr3;
- ccr[4] = _MTRR_getCx86(CX86_CCR4);
- ccr[5] = _MTRR_getCx86(CX86_CCR5);
- ccr[6] = _MTRR_getCx86(CX86_CCR6);
- if (ccr[3] & 1)
- ccrc[3] = 1;
- else {
- /* Disable SMM mode (bit 1), access to SMM memory (bit 2) and
- * access to SMM memory through ARR3 (bit 7).
- */
- if (ccr[6] & 0x02) {
- ccr[6] &= 0xFD;
- ccrc[6] = 1; /* Disable write protection of ARR3. */
- _MTRR_setCx86(CX86_CCR6,ccr[6]);
- }
- }
-
- /* If we changed CCR1 in memory, change it in the processor, too. */
- if (ccrc[1])
- _MTRR_setCx86(CX86_CCR1,ccr[1]);
-
- /* Enable ARR usage by the processor */
- if (!(ccr[5] & 0x20)) {
- ccr[5] |= 0x20;
- ccrc[5] = 1;
- _MTRR_setCx86(CX86_CCR5,ccr[5]);
- }
-
- /* We are finished updating */
- MTRR_endUpdate(&c);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the MTRR module, by detecting the processor type and determining
-if the processor supports the MTRR functionality.
-****************************************************************************/
-void MTRR_init(void)
-{
- int i,cpu,ltype;
- ulong eax,edx,lbase,lsize;
-
- /* Check that we have a compatible CPU */
- if (numMTRR == -1) {
- numMTRR = 0;
- if (!_MTRR_isRing0())
- return;
- cpu = CPU_getProcessorType();
- cpuFamily = cpu & CPU_familyMask;
- cpuType = cpu & CPU_mask;
- cpuStepping = (cpu & CPU_steppingMask) >> CPU_steppingShift;
- switch (cpuFamily) {
- case CPU_Intel:
- /* Intel Pentium Pro and later support the MTRR registers */
- if (cpuType < CPU_PentiumPro)
- return;
- _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
- numMTRR = eax & 0xFF;
- getMTRR = INTEL_getMTRR;
- setMTRR = INTEL_setMTRR;
- getFreeRegion = GENERIC_getFreeRegion;
- INTEL_disableBankedWriteCombine();
- break;
- case CPU_AMD:
- /* AMD K6-2 and later support the MTRR registers */
- if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8))
- return;
- if (cpuType < CPU_AMDAthlon) {
- numMTRR = 2; /* AMD CPU's have 2 MTRR's */
- getMTRR = AMD_getMTRR;
- setMTRR = AMD_setMTRR;
- getFreeRegion = AMDK6_getFreeRegion;
-
- /* For some reason some IBM systems with K6-2 processors
- * have write combined enabled for the system BIOS
- * region from 0xE0000 to 0xFFFFFF. We need *both* MTRR's
- * for our own graphics drivers, so if we detect any
- * regions below the 1Meg boundary, we remove them
- * so we can use this MTRR register ourselves.
- */
- for (i = 0; i < numMTRR; i++) {
- getMTRR(i,&lbase,&lsize,<ype);
- if (lbase < 0x100000)
- setMTRR(i,0,0,0);
- }
- }
- else {
- /* AMD Athlon uses P6 style MTRR's */
- _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx);
- numMTRR = eax & 0xFF;
- getMTRR = INTEL_getMTRR;
- setMTRR = INTEL_setMTRR;
- getFreeRegion = GENERIC_getFreeRegion;
- INTEL_disableBankedWriteCombine();
- }
- break;
- case CPU_Cyrix:
- /* Cyrix 6x86 and later support the MTRR registers */
- if (cpuType < CPU_Cyrix6x86 || cpuType >= CPU_CyrixMediaGX)
- return;
- numMTRR = 8; /* Cyrix CPU's have 8 ARR's */
- getMTRR = CYRIX_getMTRR;
- setMTRR = CYRIX_setMTRR;
- getFreeRegion = CYRIX_getFreeRegion;
- CYRIX_initARR();
- break;
- default:
- return;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int MTRR_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- int i;
- int ltype;
- ulong lbase,lsize,last;
-
- /* Check that we have a CPU that supports MTRR's and type is valid */
- if (numMTRR <= 0) {
- if (!_MTRR_isRing0())
- return PM_MTRR_ERR_NO_OS_SUPPORT;
- return PM_MTRR_NOT_SUPPORTED;
- }
- if (type >= PM_MTRR_MAX)
- return PM_MTRR_ERR_PARAMS;
-
- /* If the type is WC, check that this processor supports it */
- if (!MTRR_haveWriteCombine())
- return PM_MTRR_ERR_NOWRCOMB;
-
- /* Adjust the boundaries depending on the CPU type */
- switch (cpuFamily) {
- case CPU_AMD:
- if (cpuType < CPU_AMDAthlon) {
- /* Apply the K6 block alignment and size rules. In order:
- * o Uncached or gathering only
- * o 128K or bigger block
- * o Power of 2 block
- * o base suitably aligned to the power
- */
- if (type > PM_MTRR_WRCOMB && (size < (1 << 17) || (size & ~(size-1))-size || (base & (size-1))))
- return PM_MTRR_ERR_NOT_ALIGNED;
- break;
- }
- /* Fall through for AMD Athlon which uses P6 style MTRR's */
- case CPU_Intel:
- case CPU_Cyrix:
- if ((base & 0xFFF) || (size & 0xFFF)) {
- /* Base and size must be multiples of 4Kb */
- return PM_MTRR_ERR_NOT_4KB_ALIGNED;
- }
- if (base < 0x100000) {
- /* Base must be >= 1Mb */
- return PM_MTRR_ERR_BELOW_1MB;
- }
-
- /* Check upper bits of base and last are equal and lower bits
- * are 0 for base and 1 for last
- */
- last = base + size - 1;
- for (lbase = base; !(lbase & 1) && (last & 1); lbase = lbase >> 1, last = last >> 1)
- ;
- if (lbase != last) {
- /* Base is not aligned on the correct boundary */
- return PM_MTRR_ERR_NOT_ALIGNED;
- }
- break;
- default:
- return PM_MTRR_NOT_SUPPORTED;
- }
-
- /* Search for existing MTRR */
- for (i = 0; i < numMTRR; ++i) {
- getMTRR(i,&lbase,&lsize,<ype);
- if (lbase == 0 && lsize == 0)
- continue;
- if (base > lbase + (lsize-1))
- continue;
- if ((base < lbase) && (base+size-1 < lbase))
- continue;
-
- /* Check that we don't overlap an existing region */
- if (type != PM_MTRR_UNCACHABLE) {
- if ((base < lbase) || (base+size-1 > lbase+lsize-1))
- return PM_MTRR_ERR_OVERLAP;
- }
- else if (base == lbase && size == lsize) {
- /* The region already exists so leave it alone */
- return PM_MTRR_ERR_OK;
- }
-
- /* New region is enclosed by an existing region, so only allow
- * a new type to be created if we are setting a region to be
- * uncacheable (such as MMIO registers within a framebuffer).
- */
- if (ltype != (int)type) {
- if (type == PM_MTRR_UNCACHABLE)
- continue;
- return PM_MTRR_ERR_TYPE_MISMATCH;
- }
- return PM_MTRR_ERR_OK;
- }
-
- /* Search for an empty MTRR */
- if ((i = getFreeRegion(base,size)) < 0)
- return PM_MTRR_ERR_NONE_FREE;
- setMTRR(i,base,size,type);
- return PM_MTRR_ERR_OK;
-}
-
-/****************************************************************************
-PARAMETERS:
-callback - Function to callback with write combine information
-
-REMARKS:
-Function to enumerate all write combine regions currently enabled for the
-processor.
-****************************************************************************/
-int PMAPI PM_enumWriteCombine(
- PM_enumWriteCombine_t callback)
-{
- int i,ltype;
- ulong lbase,lsize;
-
- /* Check that we have a CPU that supports MTRR's and type is valid */
- if (numMTRR <= 0) {
- if (!_MTRR_isRing0())
- return PM_MTRR_ERR_NO_OS_SUPPORT;
- return PM_MTRR_NOT_SUPPORTED;
- }
-
- /* Enumerate all existing MTRR's */
- for (i = 0; i < numMTRR; ++i) {
- getMTRR(i,&lbase,&lsize,<ype);
- callback(lbase,lsize,ltype);
- }
- return PM_MTRR_ERR_OK;
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c b/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c
deleted file mode 100644
index 1d542fc..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c
+++ /dev/null
@@ -1,747 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module for interfacing to the PCI bus and configuration
-* space registers.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pcilib.h"
-#if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__)
-#include <string.h>
-#endif
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-#pragma pack(1)
-
-/* Length of the memory mapping for the PCI BIOS */
-
-#define BIOS_LIMIT (128 * 1024L - 1)
-
-/* Macros for accessing the PCI BIOS functions from 32-bit protected mode */
-
-#define BIOS32_SIGNATURE (((ulong)'_' << 0) + ((ulong)'3' << 8) + ((ulong)'2' << 16) + ((ulong)'_' << 24))
-#define PCI_SIGNATURE (((ulong)'P' << 0) + ((ulong)'C' << 8) + ((ulong)'I' << 16) + ((ulong)' ' << 24))
-#define PCI_SERVICE (((ulong)'$' << 0) + ((ulong)'P' << 8) + ((ulong)'C' << 16) + ((ulong)'I' << 24))
-#define PCI_BIOS_PRESENT 0xB101
-#define FIND_PCI_DEVICE 0xB102
-#define FIND_PCI_CLASS 0xB103
-#define GENERATE_SPECIAL 0xB106
-#define READ_CONFIG_BYTE 0xB108
-#define READ_CONFIG_WORD 0xB109
-#define READ_CONFIG_DWORD 0xB10A
-#define WRITE_CONFIG_BYTE 0xB10B
-#define WRITE_CONFIG_WORD 0xB10C
-#define WRITE_CONFIG_DWORD 0xB10D
-#define GET_IRQ_ROUTING_OPT 0xB10E
-#define SET_PCI_IRQ 0xB10F
-
-/* This is the standard structure used to identify the entry point to the
- * BIOS32 Service Directory, as documented in PCI 2.1 BIOS Specicition.
- */
-
-typedef union {
- struct {
- ulong signature; /* _32_ */
- ulong entry; /* 32 bit physical address */
- uchar revision; /* Revision level, 0 */
- uchar length; /* Length in paragraphs should be 01 */
- uchar checksum; /* All bytes must add up to zero */
- uchar reserved[5]; /* Must be zero */
- } fields;
- char chars[16];
- } PCI_bios32;
-
-/* Structure for a far pointer to call the PCI BIOS services with */
-
-typedef struct {
- ulong address;
- ushort segment;
- } PCIBIOS_entry;
-
-/* Macros to copy a structure that includes dwSize members */
-
-#define COPY_STRUCTURE(d,s) memcpy(d,s,MIN((s)->dwSize,(d)->dwSize))
-
-#pragma pack()
-
-/*--------------------------- Global variables ----------------------------*/
-
-static uchar *BIOSImage = NULL; /* BIOS image mapping */
-static int PCIBIOSVersion = -1;/* PCI BIOS version */
-static PCIBIOS_entry PCIEntry; /* PCI services entry point */
-static ulong PCIPhysEntry = 0; /* Physical address */
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler helper functions */
-
-uchar _ASMAPI _BIOS32_service(ulong service,ulong function,ulong *physBase,ulong *length,ulong *serviceOffset,PCIBIOS_entry entry);
-ushort _ASMAPI _PCIBIOS_isPresent(ulong i_eax,ulong *o_edx,ushort *o_ax,uchar *o_cl,PCIBIOS_entry entry);
-ulong _ASMAPI _PCIBIOS_service(ulong r_eax,ulong r_ebx,ulong r_edi,ulong r_ecx,PCIBIOS_entry entry);
-int _ASMAPI _PCIBIOS_getRouting(PCIRoutingOptionsBuffer *buf,PCIBIOS_entry entry);
-ibool _ASMAPI _PCIBIOS_setIRQ(int busDev,int intPin,int IRQ,PCIBIOS_entry entry);
-ulong _ASMAPI _PCIBIOS_specialCycle(int bus,ulong data,PCIBIOS_entry entry);
-ushort _ASMAPI _PCI_getCS(void);
-
-/****************************************************************************
-REMARKS:
-This functions returns the physical address of the PCI BIOS entry point.
-****************************************************************************/
-ulong _ASMAPI PCIBIOS_getEntry(void)
-{ return PCIPhysEntry; }
-
-/****************************************************************************
-PARAMETERS:
-hwType - Place to store the PCI hardware access mechanism flags
-lastBus - Place to store the index of the last PCI bus in the system
-
-RETURNS:
-Version number of the PCI BIOS found.
-
-REMARKS:
-This function determines if the PCI BIOS is present in the system, and if
-so returns the information returned by the PCI BIOS detect function.
-****************************************************************************/
-static int PCIBIOS_detect(
- uchar *hwType,
- uchar *lastBus)
-{
- ulong signature;
- ushort stat,version;
-
-#ifndef __16BIT__
- PCIBIOS_entry BIOSEntry = {0};
- uchar *BIOSEnd;
- PCI_bios32 *BIOSDir;
- ulong physBase,length,offset;
-
- /* Bail if we have already detected no BIOS is present */
- if (PCIBIOSVersion == 0)
- return 0;
-
- /* First scan the memory from 0xE0000 to 0xFFFFF looking for the
- * BIOS32 service directory, so we can determine if we can call it
- * from 32-bit protected mode.
- */
- if (PCIBIOSVersion == -1) {
- PCIBIOSVersion = 0;
- BIOSImage = PM_mapPhysicalAddr(0xE0000,BIOS_LIMIT,false);
- if (!BIOSImage)
- return 0;
- BIOSEnd = BIOSImage + 0x20000;
- for (BIOSDir = (PCI_bios32*)BIOSImage; BIOSDir < (PCI_bios32*)BIOSEnd; BIOSDir++) {
- uchar sum;
- int i,length;
-
- if (BIOSDir->fields.signature != BIOS32_SIGNATURE)
- continue;
- length = BIOSDir->fields.length * 16;
- if (!length)
- continue;
- for (sum = i = 0; i < length ; i++)
- sum += BIOSDir->chars[i];
- if (sum != 0)
- continue;
- BIOSEntry.address = (ulong)BIOSImage + (BIOSDir->fields.entry - 0xE0000);
- BIOSEntry.segment = _PCI_getCS();
- break;
- }
-
- /* If we found the BIOS32 directory, call it to get the address of the
- * PCI services.
- */
- if (BIOSEntry.address == 0)
- return 0;
- if (_BIOS32_service(PCI_SERVICE,0,&physBase,&length,&offset,BIOSEntry) != 0)
- return 0;
- PCIPhysEntry = physBase + offset;
- PCIEntry.address = (ulong)BIOSImage + (PCIPhysEntry - 0xE0000);
- PCIEntry.segment = _PCI_getCS();
- }
-#endif
- /* We found the BIOS entry, so now do the version check */
- version = _PCIBIOS_isPresent(PCI_BIOS_PRESENT,&signature,&stat,lastBus,PCIEntry);
- if (version > 0 && ((stat >> 8) == 0) && signature == PCI_SIGNATURE) {
- *hwType = stat & 0xFF;
- return PCIBIOSVersion = version;
- }
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to check against
-index - Index of the current device to check
-
-RETURNS:
-True if the device is a duplicate, false if not.
-
-REMARKS:
-This function goes through the list of all devices preceeding the newly
-found device in the info structure, and checks that the device is not a
-duplicate of a previous device. Some devices incorrectly enumerate
-themselves at different function addresses so we check here to exclude
-those cases.
-****************************************************************************/
-static ibool CheckDuplicate(
- PCIDeviceInfo *info,
- PCIDeviceInfo *prev)
-{
- /* Ignore devices with a vendor ID of 0 */
- if (info->VendorID == 0)
- return true;
-
- /* NOTE: We only check against the current device on
- * the bus to ensure that we do not exclude
- * multiple controllers of the same device ID.
- */
- if (info->slot.p.Bus == prev->slot.p.Bus &&
- info->slot.p.Device == prev->slot.p.Device &&
- info->DeviceID == prev->DeviceID)
- return true;
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-static int PCI_enumerateMech1(
- PCIDeviceInfo info[])
-{
- int bus,device,function,i,numFound = 0;
- ulong *lp,tmp;
- PCIslot slot = {{0,0,0,0,0,0,1}};
- PCIDeviceInfo pci,prev = {0};
-
- /* Try PCI access mechanism 1 */
- PM_outpb(0xCFB,0x01);
- tmp = PM_inpd(0xCF8);
- PM_outpd(0xCF8,slot.i);
- if ((PM_inpd(0xCF8) == slot.i) && (PM_inpd(0xCFC) != 0xFFFFFFFFUL)) {
- /* PCI access mechanism 1 - the preferred mechanism */
- for (bus = 0; bus < 8; bus++) {
- slot.p.Bus = bus;
- for (device = 0; device < 32; device++) {
- slot.p.Device = device;
- for (function = 0; function < 8; function++) {
- slot.p.Function = function;
- slot.p.Register = 0;
- PM_outpd(0xCF8,slot.i);
- if (PM_inpd(0xCFC) != 0xFFFFFFFFUL) {
- memset(&pci,0,sizeof(pci));
- pci.dwSize = sizeof(pci);
- pci.mech1 = 1;
- pci.slot = slot;
- lp = (ulong*)&(pci.VendorID);
- for (i = 0; i < NUM_PCI_REG; i++, lp++) {
- slot.p.Register = i;
- PM_outpd(0xCF8,slot.i);
- *lp = PM_inpd(0xCFC);
- }
- if (!CheckDuplicate(&pci,&prev)) {
- if (info)
- COPY_STRUCTURE(&info[numFound],&pci);
- ++numFound;
- }
- prev = pci;
- }
- }
- }
- }
-
- /* Disable PCI config cycle on exit */
- PM_outpd(0xCF8,0);
- return numFound;
- }
- PM_outpd(0xCF8,tmp);
-
- /* No hardware access mechanism 1 found */
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-static int PCI_enumerateMech2(
- PCIDeviceInfo info[])
-{
- int bus,device,function,i,numFound = 0;
- ushort deviceIO;
- ulong *lp;
- PCIslot slot = {{0,0,0,0,0,0,1}};
- PCIDeviceInfo pci,prev = {0};
-
- /* Try PCI access mechanism 2 */
- PM_outpb(0xCFB,0x00);
- PM_outpb(0xCF8,0x00);
- PM_outpb(0xCFA,0x00);
- if (PM_inpb(0xCF8) == 0x00 && PM_inpb(0xCFB) == 0x00) {
- /* PCI access mechanism 2 - the older mechanism for legacy busses */
- for (bus = 0; bus < 2; bus++) {
- slot.p.Bus = bus;
- PM_outpb(0xCFA,(uchar)bus);
- for (device = 0; device < 16; device++) {
- slot.p.Device = device;
- deviceIO = 0xC000 + (device << 8);
- for (function = 0; function < 8; function++) {
- slot.p.Function = function;
- slot.p.Register = 0;
- PM_outpb(0xCF8,(uchar)((function << 1) | 0x10));
- if (PM_inpd(deviceIO) != 0xFFFFFFFFUL) {
- memset(&pci,0,sizeof(pci));
- pci.dwSize = sizeof(pci);
- pci.mech1 = 0;
- pci.slot = slot;
- lp = (ulong*)&(pci.VendorID);
- for (i = 0; i < NUM_PCI_REG; i++, lp++) {
- slot.p.Register = i;
- *lp = PM_inpd(deviceIO + (i << 2));
- }
- if (!CheckDuplicate(&pci,&prev)) {
- if (info)
- COPY_STRUCTURE(&info[numFound],&pci);
- ++numFound;
- }
- prev = pci;
- }
- }
- }
- }
-
- /* Disable PCI config cycle on exit */
- PM_outpb(0xCF8,0);
- return numFound;
- }
-
- /* No hardware access mechanism 2 found */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-This functions reads a configuration dword via the PCI BIOS.
-****************************************************************************/
-static ulong PCIBIOS_readDWORD(
- int index,
- ulong slot)
-{
- return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,slot >> 8,index,0,PCIEntry);
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-static int PCI_enumerateBIOS(
- PCIDeviceInfo info[])
-{
- uchar hwType,lastBus;
- int bus,device,function,i,numFound = 0;
- ulong *lp;
- PCIslot slot = {{0,0,0,0,0,0,1}};
- PCIDeviceInfo pci,prev = {0};
-
- if (PCIBIOS_detect(&hwType,&lastBus)) {
- /* PCI BIOS access - the ultimate fallback */
- for (bus = 0; bus <= lastBus; bus++) {
- slot.p.Bus = bus;
- for (device = 0; device < 32; device++) {
- slot.p.Device = device;
- for (function = 0; function < 8; function++) {
- slot.p.Function = function;
- if (PCIBIOS_readDWORD(0,slot.i) != 0xFFFFFFFFUL) {
- memset(&pci,0,sizeof(pci));
- pci.dwSize = sizeof(pci);
- pci.mech1 = 2;
- pci.slot = slot;
- lp = (ulong*)&(pci.VendorID);
- for (i = 0; i < NUM_PCI_REG; i++, lp++)
- *lp = PCIBIOS_readDWORD(i << 2,slot.i);
- if (!CheckDuplicate(&pci,&prev)) {
- if (info)
- COPY_STRUCTURE(&info[numFound],&pci);
- ++numFound;
- }
- prev = pci;
- }
- }
- }
- }
- }
-
- /* Return number of devices found */
- return numFound;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-int _ASMAPI PCI_enumerate(
- PCIDeviceInfo info[])
-{
- int numFound;
-
- /* First try via the direct access mechanisms which are faster if we
- * have them (nearly always). The BIOS is used as a fallback, and for
- * stuff we can't do directly.
- */
- if ((numFound = PCI_enumerateMech1(info)) == 0) {
- if ((numFound = PCI_enumerateMech2(info)) == 0) {
- if ((numFound = PCI_enumerateBIOS(info)) == 0)
- return 0;
- }
- }
- return numFound;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - Array of PCIDeviceInfo structures to fill in
-maxDevices - Maximum number of of devices to enumerate into array
-
-RETURNS:
-Number of PCI devices found and enumerated on the PCI bus, 0 if not PCI.
-
-REMARKS:
-Function to enumerate all available devices on the PCI bus into an array
-of configuration information blocks.
-****************************************************************************/
-int _ASMAPI PCI_getNumDevices(void)
-{
- return PCI_enumerate(NULL);
-}
-
-/****************************************************************************
-PARAMETERS:
-bar - Base address to measure
-pci - PCI device to access
-
-RETURNS:
-Size of the PCI base address in bytes
-
-REMARKS:
-This function measures the size of the PCI base address register in bytes,
-by writing all F's to the register, and reading the value back. The size
-of the base address is determines by the bits that are hardwired to zero's.
-****************************************************************************/
-ulong _ASMAPI PCI_findBARSize(
- int bar,
- PCIDeviceInfo *pci)
-{
- ulong base,size = 0;
-
- base = PCI_accessReg(bar,0,PCI_READ_DWORD,pci);
- if (base && !(base & 0x1)) {
- /* For some strange reason some devices don't properly decode
- * their base address registers (Intel PCI/PCI bridges!), and
- * we read completely bogus values. We check for that here
- * and clear out those BAR's.
- *
- * We check for that here because at least the low 12 bits
- * of the address range must be zeros, since the page size
- * on IA32 processors is always 4Kb.
- */
- if ((base & 0xFFF) == 0) {
- PCI_accessReg(bar,0xFFFFFFFF,PCI_WRITE_DWORD,pci);
- size = PCI_accessReg(bar,0,PCI_READ_DWORD,pci) & ~0xFF;
- size = ~size+1;
- PCI_accessReg(bar,base,PCI_WRITE_DWORD,pci);
- }
- }
- pci->slot.p.Register = 0;
- return size;
-}
-
-/****************************************************************************
-PARAMETERS:
-index - DWORD index of the register to access
-value - Value to write to the register for write access
-func - Function to implement
-
-RETURNS:
-The value read from the register for read operations
-
-REMARKS:
-The function code are defined as follows
-
-code - function
-0 - Read BYTE
-1 - Read WORD
-2 - Read DWORD
-3 - Write BYTE
-4 - Write WORD
-5 - Write DWORD
-****************************************************************************/
-ulong _ASMAPI PCI_accessReg(
- int index,
- ulong value,
- int func,
- PCIDeviceInfo *info)
-{
- int iobase;
-
- if (info->mech1 == 2) {
- /* Use PCI BIOS access since we dont have direct hardware access */
- switch (func) {
- case PCI_READ_BYTE:
- return (uchar)_PCIBIOS_service(READ_CONFIG_BYTE,info->slot.i >> 8,index,0,PCIEntry);
- case PCI_READ_WORD:
- return (ushort)_PCIBIOS_service(READ_CONFIG_WORD,info->slot.i >> 8,index,0,PCIEntry);
- case PCI_READ_DWORD:
- return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,info->slot.i >> 8,index,0,PCIEntry);
- case PCI_WRITE_BYTE:
- _PCIBIOS_service(WRITE_CONFIG_BYTE,info->slot.i >> 8,index,value,PCIEntry);
- break;
- case PCI_WRITE_WORD:
- _PCIBIOS_service(WRITE_CONFIG_WORD,info->slot.i >> 8,index,value,PCIEntry);
- break;
- case PCI_WRITE_DWORD:
- _PCIBIOS_service(WRITE_CONFIG_DWORD,info->slot.i >> 8,index,value,PCIEntry);
- break;
- }
- }
- else {
- /* Use direct hardware access mechanisms */
- if (info->mech1) {
- /* PCI access mechanism 1 */
- iobase = 0xCFC + (index & 3);
- info->slot.p.Register = index >> 2;
- PM_outpd(0xCF8,info->slot.i);
- }
- else {
- /* PCI access mechanism 2 */
- PM_outpb(0xCF8,(uchar)((info->slot.p.Function << 1) | 0x10));
- PM_outpb(0xCFA,(uchar)info->slot.p.Bus);
- iobase = 0xC000 + (info->slot.p.Device << 8) + index;
- }
- switch (func) {
- case PCI_READ_BYTE:
- case PCI_READ_WORD:
- case PCI_READ_DWORD: value = PM_inpd(iobase); break;
- case PCI_WRITE_BYTE: PM_outpb(iobase,(uchar)value); break;
- case PCI_WRITE_WORD: PM_outpw(iobase,(ushort)value); break;
- case PCI_WRITE_DWORD: PM_outpd(iobase,(ulong)value); break;
- }
- PM_outpd(0xCF8,0);
- }
- return value;
-}
-
-/****************************************************************************
-PARAMETERS:
-numDevices - Number of devices to query info for
-
-RETURNS:
-0 on success, -1 on error, number of devices to enumerate if numDevices = 0
-
-REMARKS:
-This function reads the PCI routing information. If you pass a value of
-0 for numDevices, this function will return with the number of devices
-needed in the routing buffer that will be filled in by the BIOS.
-****************************************************************************/
-ibool _ASMAPI PCI_getIRQRoutingOptions(
- int numDevices,
- PCIRouteInfo *buffer)
-{
- PCIRoutingOptionsBuffer buf;
- int ret;
-
- if (PCIPhysEntry) {
- buf.BufferSize = numDevices * sizeof(PCIRouteInfo);
- buf.DataBuffer = buffer;
- if ((ret = _PCIBIOS_getRouting(&buf,PCIEntry)) == 0x89)
- return buf.BufferSize / sizeof(PCIRouteInfo);
- if (ret != 0)
- return -1;
- return 0;
- }
-
- /* We currently only support this via the PCI BIOS functions */
- return -1;
-}
-
-/****************************************************************************
-PARAMETERS:
-info - PCI device information for the specified device
-intPin - Value to store in the PCI InterruptPin register
-IRQ - New ISA IRQ to map the PCI interrupt to (0-15)
-
-RETURNS:
-True on success, or false if this function failed.
-
-REMARKS:
-This function changes the PCI IRQ routing for the specified device to the
-desired PCI interrupt and the desired ISA bus compatible IRQ. This function
-may not be supported by the PCI BIOS, in which case this function will
-fail.
-****************************************************************************/
-ibool _ASMAPI PCI_setHardwareIRQ(
- PCIDeviceInfo *info,
- uint intPin,
- uint IRQ)
-{
- if (PCIPhysEntry) {
- if (_PCIBIOS_setIRQ(info->slot.i >> 8,intPin,IRQ,PCIEntry)) {
- info->u.type0.InterruptPin = intPin;
- info->u.type0.InterruptLine = IRQ;
- return true;
- }
- return false;
- }
-
- /* We currently only support this via the PCI BIOS functions */
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-bus - Bus number to generate the special cycle for
-specialCycleData - Data to send for the special cyle
-
-REMARKS:
-This function generates a special cycle on the specified bus using with
-the specified data.
-****************************************************************************/
-void _ASMAPI PCI_generateSpecialCyle(
- uint bus,
- ulong specialCycleData)
-{
- if (PCIPhysEntry)
- _PCIBIOS_specialCycle(bus,specialCycleData,PCIEntry);
- /* We currently only support this via the PCI BIOS functions */
-}
-
-/****************************************************************************
-PARAMETERS:
-info - PCI device information block for device to access
-index - Index of register to start reading from
-dst - Place to store the values read from configuration space
-count - Count of bytes to read from configuration space
-
-REMARKS:
-This function is used to read a block of PCI configuration space registers
-from the configuration space into the passed in data block. This function
-will properly handle reading non-DWORD aligned data from the configuration
-space correctly.
-****************************************************************************/
-void _ASMAPI PCI_readRegBlock(
- PCIDeviceInfo *info,
- int index,
- void *dst,
- int count)
-{
- uchar *pb;
- ulong *pd;
- int i;
- int startCount = (index & 3);
- int middleCount = (count - startCount) >> 2;
- int endCount = count - middleCount * 4 - startCount;
-
- for (i = 0,pb = dst; i < startCount; i++, index++) {
- *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
- }
- for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) {
- *pd++ = (ulong)PCI_accessReg(index,0,PCI_READ_DWORD,info);
- }
- for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) {
- *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info);
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-info - PCI device information block for device to access
-index - Index of register to start reading from
-dst - Place to store the values read from configuration space
-count - Count of bytes to read from configuration space
-
-REMARKS:
-This function is used to write a block of PCI configuration space registers
-to the configuration space from the passed in data block. This function
-will properly handle writing non-DWORD aligned data to the configuration
-space correctly.
-****************************************************************************/
-void _ASMAPI PCI_writeRegBlock(
- PCIDeviceInfo *info,
- int index,
- void *src,
- int count)
-{
- uchar *pb;
- ulong *pd;
- int i;
- int startCount = (index & 3);
- int middleCount = (count - startCount) >> 2;
- int endCount = count - middleCount * 4 - startCount;
-
- for (i = 0,pb = src; i < startCount; i++, index++) {
- PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
- }
- for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) {
- PCI_accessReg(index,*pd++,PCI_WRITE_DWORD,info);
- }
- for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) {
- PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info);
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c b/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c
deleted file mode 100644
index c3a66a7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c
+++ /dev/null
@@ -1,306 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module containing Unix I/O functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/stat.h>
-#include <unistd.h>
-#include <dirent.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* {secret} */
-typedef struct {
- DIR *d;
- char path[PM_MAX_PATH];
- char mask[PM_MAX_PATH];
- } PM_findHandle;
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- struct dirent *blk,
- const char *path)
-{
- ulong dwSize = findData->dwSize;
- struct stat st;
- char filename[PM_MAX_PATH];
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- strcpy(filename,path);
- PM_backslash(filename);
- strcat(filename,blk->d_name);
- stat(filename,&st);
- if (!(st.st_mode & S_IWRITE))
- findData->attrib |= PM_FILE_READONLY;
- if (st.st_mode & S_IFDIR)
- findData->attrib |= PM_FILE_DIRECTORY;
- findData->sizeLo = st.st_size;
- findData->sizeHi = 0;
- strncpy(findData->name,blk->d_name,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Determines if a file name matches the passed in pattern.
-****************************************************************************/
-static ibool filematch(
- char *pattern,
- char *dirpath,
- struct dirent *dire)
-{
- struct stat st;
- int i = 0,j = 0,lastchar = '\0';
- char fullpath[PM_MAX_PATH];
-
- strcpy(fullpath,dirpath);
- PM_backslash(fullpath);
- strcat(fullpath, dire->d_name);
- if (stat(fullpath, &st) != 0)
- return false;
- for (; i < (int)strlen(dire->d_name) && j < (int)strlen(pattern); i++, j++) {
- if (pattern[j] == '*' && lastchar != '\\') {
- if (pattern[j+1] == '\0')
- return true;
- while (dire->d_name[i++] != pattern[j+1]) {
- if (dire->d_name[i] == '\0')
- return false;
- }
- i -= 2;
- }
- else if (dire->d_name[i] != pattern[j] &&
- !(pattern[j] == '?' && lastchar != '\\'))
- return false;
- lastchar = pattern[i];
- }
- if (j == (int)strlen(pattern) && i == (int)strlen(dire->d_name))
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void * PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- PM_findHandle *d;
- struct dirent *dire;
- char name[PM_MAX_PATH];
- char ext[PM_MAX_PATH];
-
- if ((d = PM_malloc(sizeof(*d))) == NULL)
- return PM_FILE_INVALID;
- PM_splitpath(filename,NULL,d->path,name,ext);
- strcpy(d->mask,name);
- strcat(d->mask,ext);
- if (strlen(d->path) == 0)
- strcpy(d->path, ".");
- if (d->path[strlen(d->path)-1] == '/')
- d->path[strlen(d->path)-1] = 0;
- if ((d->d = opendir(d->path)) != NULL) {
- while ((dire = readdir(d->d)) != NULL) {
- if (filematch(d->mask,d->path,dire)) {
- convertFindData(findData,dire,d->path);
- return d;
- }
- }
- closedir(d->d);
- }
- PM_free(d);
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- PM_findHandle *d = handle;
- struct dirent *dire;
-
- while ((dire = readdir(d->d)) != NULL) {
- if (filematch(d->mask,d->path,dire)) {
- convertFindData(findData,dire,d->path);
- return true;
- }
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- PM_findHandle *d = handle;
-
- closedir(d->d);
- free(d);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- struct stat st;
- mode_t mode;
-
- stat(filename,&st);
- mode = st.st_mode;
- if (attrib & PM_FILE_READONLY)
- mode &= ~S_IWRITE;
- else
- mode |= S_IWRITE;
- chmod(filename,mode);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- struct stat st;
-
- stat(filename,&st);
- if (st.st_mode & S_IWRITE)
- return 0;
- return PM_FILE_READONLY;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return mkdir(filename,0x1FF) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_getFileTime not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_setFileTime not implemented yet!");
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c b/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c
deleted file mode 100644
index 8056e9a..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c
+++ /dev/null
@@ -1,377 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Portions copyright (C) Josh Vanderhoof
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Functions to save and restore the VGA hardware state.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#if defined(__WIN32_VXD__) || defined(__NT_DRIVER__)
-#include "sdd/sddhelp.h"
-#else
-#include <string.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* VGA index register ports */
-#define CRT_I 0x3D4 /* CRT Controller Index */
-#define ATT_IW 0x3C0 /* Attribute Controller Index & Data */
-#define GRA_I 0x3CE /* Graphics Controller Index */
-#define SEQ_I 0x3C4 /* Sequencer Index */
-
-/* VGA data register ports */
-#define CRT_D 0x3D5 /* CRT Controller Data Register */
-#define ATT_R 0x3C1 /* Attribute Controller Data Read Register */
-#define GRA_D 0x3CF /* Graphics Controller Data Register */
-#define SEQ_D 0x3C5 /* Sequencer Data Register */
-#define MIS_R 0x3CC /* Misc Output Read Register */
-#define MIS_W 0x3C2 /* Misc Output Write Register */
-#define IS1_R 0x3DA /* Input Status Register 1 */
-#define PEL_IW 0x3C8 /* PEL Write Index */
-#define PEL_IR 0x3C7 /* PEL Read Index */
-#define PEL_D 0x3C9 /* PEL Data Register */
-
-/* standard VGA indexes max counts */
-#define CRT_C 24 /* 24 CRT Controller Registers */
-#define ATT_C 21 /* 21 Attribute Controller Registers */
-#define GRA_C 9 /* 9 Graphics Controller Registers */
-#define SEQ_C 5 /* 5 Sequencer Registers */
-#define MIS_C 1 /* 1 Misc Output Register */
-#define PAL_C 768 /* 768 Palette Registers */
-#define FONT_C 8192 /* Total size of character generator RAM */
-
-/* VGA registers saving indexes */
-#define CRT 0 /* CRT Controller Registers start */
-#define ATT (CRT+CRT_C) /* Attribute Controller Registers start */
-#define GRA (ATT+ATT_C) /* Graphics Controller Registers start */
-#define SEQ (GRA+GRA_C) /* Sequencer Registers */
-#define MIS (SEQ+SEQ_C) /* General Registers */
-#define PAL (MIS+MIS_C) /* VGA Palette Registers */
-#define FONT (PAL+PAL_C) /* VGA font data */
-
-/* Macros for port I/O with arguments reversed */
-
-#define _port_out(v,p) PM_outpb(p,(uchar)(v))
-#define _port_in(p) PM_inpb(p)
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Returns the size of the VGA state buffer.
-****************************************************************************/
-int PMAPI PM_getVGAStateSize(void)
-{
- return CRT_C + ATT_C + GRA_C + SEQ_C + MIS_C + PAL_C + FONT_C;
-}
-
-/****************************************************************************
-REMARKS:
-Delay for a short period of time.
-****************************************************************************/
-static void vga_delay(void)
-{
- int i;
-
- /* For the loop here we program the POST register. The length of this
- * delay is dependant only on ISA bus speed, but it is enough for
- * what we need.
- */
- for (i = 0; i <= 10; i++)
- PM_outpb(0x80, 0);
-}
-
-/****************************************************************************
-PARAMETERS:
-port - I/O port to read value from
-index - Port index to read
-
-RETURNS:
-Byte read from 'port' register 'index'.
-****************************************************************************/
-static ushort vga_rdinx(
- ushort port,
- ushort index)
-{
- PM_outpb(port,(uchar)index);
- return PM_inpb(port+1);
-}
-
-/****************************************************************************
-PARAMETERS:
-port - I/O port to write to
-index - Port index to write
-value - Byte to write to port
-
-REMARKS:
-Writes a byte value to the 'port' register 'index'.
-****************************************************************************/
-static void vga_wrinx(
- ushort port,
- ushort index,
- ushort value)
-{
- PM_outpb(port,(uchar)index);
- PM_outpb(port+1,(uchar)value);
-}
-
-/****************************************************************************
-REMARKS:
-Save the color palette values
-****************************************************************************/
-static void vga_savepalette(
- uchar *pal)
-{
- int i;
-
- _port_out(0, PEL_IR);
- for (i = 0; i < 768; i++) {
- vga_delay();
- *pal++ = _port_in(PEL_D);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Restore the color palette values
-****************************************************************************/
-static void vga_restorepalette(
- const uchar *pal)
-{
- int i;
-
- /* restore saved palette */
- _port_out(0, PEL_IW);
- for (i = 0; i < 768; i++) {
- vga_delay();
- _port_out(*pal++, PEL_D);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Read the font data from the VGA character generator RAM
-****************************************************************************/
-static void vga_saveFont(
- uchar *data)
-{
- uchar *A0000Ptr = PM_getA0000Pointer();
- uchar save[7];
-
- /* Enable access to character generator RAM */
- save[0] = (uchar)vga_rdinx(SEQ_I,0x00);
- save[1] = (uchar)vga_rdinx(SEQ_I,0x02);
- save[2] = (uchar)vga_rdinx(SEQ_I,0x04);
- save[3] = (uchar)vga_rdinx(SEQ_I,0x00);
- save[4] = (uchar)vga_rdinx(GRA_I,0x04);
- save[5] = (uchar)vga_rdinx(GRA_I,0x05);
- save[6] = (uchar)vga_rdinx(GRA_I,0x06);
- vga_wrinx(SEQ_I,0x00,0x01);
- vga_wrinx(SEQ_I,0x02,0x04);
- vga_wrinx(SEQ_I,0x04,0x07);
- vga_wrinx(SEQ_I,0x00,0x03);
- vga_wrinx(GRA_I,0x04,0x02);
- vga_wrinx(GRA_I,0x05,0x00);
- vga_wrinx(GRA_I,0x06,0x00);
-
- /* Copy character generator RAM */
- memcpy(data,A0000Ptr,FONT_C);
-
- /* Restore VGA state */
- vga_wrinx(SEQ_I,0x00,save[0]);
- vga_wrinx(SEQ_I,0x02,save[1]);
- vga_wrinx(SEQ_I,0x04,save[2]);
- vga_wrinx(SEQ_I,0x00,save[3]);
- vga_wrinx(GRA_I,0x04,save[4]);
- vga_wrinx(GRA_I,0x05,save[5]);
- vga_wrinx(GRA_I,0x06,save[6]);
-}
-
-/****************************************************************************
-REMARKS:
-Downloads the font data to the VGA character generator RAM
-****************************************************************************/
-static void vga_restoreFont(
- const uchar *data)
-{
- uchar *A0000Ptr = PM_getA0000Pointer();
-
- /* Enable access to character generator RAM */
- vga_wrinx(SEQ_I,0x00,0x01);
- vga_wrinx(SEQ_I,0x02,0x04);
- vga_wrinx(SEQ_I,0x04,0x07);
- vga_wrinx(SEQ_I,0x00,0x03);
- vga_wrinx(GRA_I,0x04,0x02);
- vga_wrinx(GRA_I,0x05,0x00);
- vga_wrinx(GRA_I,0x06,0x00);
-
- /* Copy font back to character generator RAM */
- memcpy(A0000Ptr,data,FONT_C);
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of all VGA compatible registers
-****************************************************************************/
-void PMAPI PM_saveVGAState(
- void *stateBuf)
-{
- uchar *regs = stateBuf;
- int i;
-
- /* Save state of VGA registers */
- for (i = 0; i < CRT_C; i++) {
- _port_out(i, CRT_I);
- regs[CRT + i] = _port_in(CRT_D);
- }
- for (i = 0; i < ATT_C; i++) {
- _port_in(IS1_R);
- vga_delay();
- _port_out(i, ATT_IW);
- vga_delay();
- regs[ATT + i] = _port_in(ATT_R);
- vga_delay();
- }
- for (i = 0; i < GRA_C; i++) {
- _port_out(i, GRA_I);
- regs[GRA + i] = _port_in(GRA_D);
- }
- for (i = 0; i < SEQ_C; i++) {
- _port_out(i, SEQ_I);
- regs[SEQ + i] = _port_in(SEQ_D);
- }
- regs[MIS] = _port_in(MIS_R);
-
- /* Save the VGA palette values */
- vga_savepalette(®s[PAL]);
-
- /* Save the VGA character generator RAM */
- vga_saveFont(®s[FONT]);
-
- /* Turn the VGA display back on */
- PM_vgaUnblankDisplay();
-}
-
-/****************************************************************************
-REMARKS:
-Retore the state of all VGA compatible registers
-****************************************************************************/
-void PMAPI PM_restoreVGAState(
- const void *stateBuf)
-{
- const uchar *regs = stateBuf;
- int i;
-
- /* Blank the display before we start the restore */
- PM_vgaBlankDisplay();
-
- /* Restore the VGA character generator RAM */
- vga_restoreFont(®s[FONT]);
-
- /* Restore the VGA palette values */
- vga_restorepalette(®s[PAL]);
-
- /* Restore the state of the VGA compatible registers */
- _port_out(regs[MIS], MIS_W);
-
- /* Delay to allow clock change to settle */
- for (i = 0; i < 10; i++)
- vga_delay();
-
- /* Synchronous reset on */
- _port_out(0x00,SEQ_I);
- _port_out(0x01,SEQ_D);
-
- /* Write seqeuencer registers */
- _port_out(1, SEQ_I);
- _port_out(regs[SEQ + 1] | 0x20, SEQ_D);
- for (i = 2; i < SEQ_C; i++) {
- _port_out(i, SEQ_I);
- _port_out(regs[SEQ + i], SEQ_D);
- }
-
- /* Synchronous reset off */
- _port_out(0x00,SEQ_I);
- _port_out(0x03,SEQ_D);
-
- /* Deprotect CRT registers 0-7 and write CRTC */
- _port_out(0x11, CRT_I);
- _port_out(_port_in(CRT_D) & 0x7F, CRT_D);
- for (i = 0; i < CRT_C; i++) {
- _port_out(i, CRT_I);
- _port_out(regs[CRT + i], CRT_D);
- }
- for (i = 0; i < GRA_C; i++) {
- _port_out(i, GRA_I);
- _port_out(regs[GRA + i], GRA_D);
- }
- for (i = 0; i < ATT_C; i++) {
- _port_in(IS1_R); /* reset flip-flop */
- vga_delay();
- _port_out(i, ATT_IW);
- vga_delay();
- _port_out(regs[ATT + i], ATT_IW);
- vga_delay();
- }
-
- /* Ensure the VGA screen is turned on */
- PM_vgaUnblankDisplay();
-}
-
-/****************************************************************************
-REMARKS:
-Disables the VGA display for screen output making it blank.
-****************************************************************************/
-void PMAPI PM_vgaBlankDisplay(void)
-{
- /* Turn screen off */
- _port_out(0x01, SEQ_I);
- _port_out(_port_in(SEQ_D) | 0x20, SEQ_D);
-
- /* Disable video output */
- _port_in(IS1_R);
- vga_delay();
- _port_out(0x00, ATT_IW);
-}
-
-/****************************************************************************
-REMARKS:
-Enables the VGA display for screen output.
-****************************************************************************/
-void PMAPI PM_vgaUnblankDisplay(void)
-{
- /* Turn screen back on */
- _port_out(0x01, SEQ_I);
- _port_out(_port_in(SEQ_D) & 0xDF, SEQ_D);
-
- /* Enable video output */
- _port_in(IS1_R);
- vga_delay();
- _port_out(0x20, ATT_IW);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c
deleted file mode 100644
index ac62e81..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c
+++ /dev/null
@@ -1,808 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main module to implement the Zen Timer support functions.
-*
-****************************************************************************/
-
-#include "ztimer.h"
-#include "pmapi.h"
-#include "oshdr.h"
-#if !defined(__WIN32_VXD__) && !defined(__OS2_VDD__) && !defined(__NT_DRIVER__)
-#include <stdio.h>
-#include <string.h>
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External Intel assembler functions */
-#ifdef __INTEL__
-/* {secret} */
-ibool _ASMAPI _CPU_haveCPUID(void);
-/* {secret} */
-ibool _ASMAPI _CPU_check80386(void);
-/* {secret} */
-ibool _ASMAPI _CPU_check80486(void);
-/* {secret} */
-uint _ASMAPI _CPU_checkCPUID(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCPUIDModel(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCPUIDStepping(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCPUIDFeatures(void);
-/* {secret} */
-uint _ASMAPI _CPU_getCacheSize(void);
-/* {secret} */
-uint _ASMAPI _CPU_have3DNow(void);
-/* {secret} */
-ibool _ASMAPI _CPU_checkClone(void);
-/* {secret} */
-void _ASMAPI _CPU_readTimeStamp(CPU_largeInteger *time);
-/* {secret} */
-void _ASMAPI _CPU_runBSFLoop(ulong iterations);
-/* {secret} */
-ulong _ASMAPI _CPU_mulDiv(ulong a,ulong b,ulong c);
-/* {secret} */
-void ZTimerQuickInit(void);
-#define CPU_HaveMMX 0x00800000
-#define CPU_HaveRDTSC 0x00000010
-#define CPU_HaveSSE 0x02000000
-#endif
-
-#if defined(__SMX32__)
-#include "smx/cpuinfo.c"
-#elif defined(__RTTARGET__)
-#include "rttarget/cpuinfo.c"
-#elif defined(__REALDOS__)
-#include "dos/cpuinfo.c"
-#elif defined(__NT_DRIVER__)
-#include "ntdrv/cpuinfo.c"
-#elif defined(__WIN32_VXD__)
-#include "vxd/cpuinfo.c"
-#elif defined(__WINDOWS32__)
-#include "win32/cpuinfo.c"
-#elif defined(__OS2_VDD__)
-#include "vdd/cpuinfo.c"
-#elif defined(__OS2__)
-#include "os2/cpuinfo.c"
-#elif defined(__LINUX__)
-#include "linux/cpuinfo.c"
-#elif defined(__QNX__)
-#include "qnx/cpuinfo.c"
-#elif defined(__BEOS__)
-#include "beos/cpuinfo.c"
-#else
-#error CPU library not ported to this platform yet!
-#endif
-
-/*------------------------ Public interface routines ----------------------*/
-
-/****************************************************************************
-REMARKS:
-Read an I/O port location.
-****************************************************************************/
-static uchar rdinx(
- int port,
- int index)
-{
- PM_outpb(port,(uchar)index);
- return PM_inpb(port+1);
-}
-
-/****************************************************************************
-REMARKS:
-Write an I/O port location.
-****************************************************************************/
-static void wrinx(
- ushort port,
- ushort index,
- ushort value)
-{
- PM_outpb(port,(uchar)index);
- PM_outpb(port+1,(uchar)value);
-}
-
-/****************************************************************************
-REMARKS:
-Enables the Cyrix CPUID instruction to properly detect MediaGX and 6x86
-processors.
-****************************************************************************/
-static void _CPU_enableCyrixCPUID(void)
-{
- uchar ccr3;
-
- PM_init();
- ccr3 = rdinx(0x22,0xC3);
- wrinx(0x22,0xC3,(uchar)(ccr3 | 0x10));
- wrinx(0x22,0xE8,(uchar)(rdinx(0x22,0xE8) | 0x80));
- wrinx(0x22,0xC3,ccr3);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the type of processor in the system.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Numerical identifier for the installed processor
-
-REMARKS:
-Returns the type of processor in the system. Note that if the CPU is an
-unknown Pentium family processor that we don't have an enumeration for,
-the return value will be greater than or equal to the value of CPU_UnkPentium
-(depending on the value returned by the CPUID instruction).
-
-SEE ALSO:
-CPU_getProcessorSpeed, CPU_haveMMX, CPU_getProcessorName
-****************************************************************************/
-uint ZAPI CPU_getProcessorType(void)
-{
-#if defined(__INTEL__)
- uint cpu,vendor,model,cacheSize;
- static ibool firstTime = true;
-
- if (_CPU_haveCPUID()) {
- cpu = _CPU_checkCPUID();
- vendor = cpu & ~CPU_mask;
- if (vendor == CPU_Intel) {
- /* Check for Intel processors */
- switch (cpu & CPU_mask) {
- case 4: cpu = CPU_i486; break;
- case 5: cpu = CPU_Pentium; break;
- case 6:
- if ((model = _CPU_getCPUIDModel()) == 1)
- cpu = CPU_PentiumPro;
- else if (model <= 6) {
- cacheSize = _CPU_getCacheSize();
- if ((model == 5 && cacheSize == 0) ||
- (model == 5 && cacheSize == 256) ||
- (model == 6 && cacheSize == 128))
- cpu = CPU_Celeron;
- else
- cpu = CPU_PentiumII;
- }
- else if (model >= 7) {
- /* Model 7 == Pentium III */
- /* Model 8 == Celeron/Pentium III Coppermine */
- cacheSize = _CPU_getCacheSize();
- if ((model == 8 && cacheSize == 128))
- cpu = CPU_Celeron;
- else
- cpu = CPU_PentiumIII;
- }
- break;
- default:
- cpu = CPU_UnkIntel;
- }
- }
- else if (vendor == CPU_Cyrix) {
- /* Check for Cyrix processors */
- switch (cpu & CPU_mask) {
- case 4:
- if ((model = _CPU_getCPUIDModel()) == 4)
- cpu = CPU_CyrixMediaGX;
- else
- cpu = CPU_UnkCyrix;
- break;
- case 5:
- if ((model = _CPU_getCPUIDModel()) == 2)
- cpu = CPU_Cyrix6x86;
- else if (model == 4)
- cpu = CPU_CyrixMediaGXm;
- else
- cpu = CPU_UnkCyrix;
- break;
- case 6:
- if ((model = _CPU_getCPUIDModel()) <= 1)
- cpu = CPU_Cyrix6x86MX;
- else
- cpu = CPU_UnkCyrix;
- break;
- default:
- cpu = CPU_UnkCyrix;
- }
- }
- else if (vendor == CPU_AMD) {
- /* Check for AMD processors */
- switch (cpu & CPU_mask) {
- case 4:
- if ((model = _CPU_getCPUIDModel()) == 0)
- cpu = CPU_AMDAm5x86;
- else
- cpu = CPU_AMDAm486;
- break;
- case 5:
- if ((model = _CPU_getCPUIDModel()) <= 3)
- cpu = CPU_AMDK5;
- else if (model <= 7)
- cpu = CPU_AMDK6;
- else if (model == 8)
- cpu = CPU_AMDK6_2;
- else if (model == 9)
- cpu = CPU_AMDK6_III;
- else if (model == 13) {
- if (_CPU_getCPUIDStepping() <= 3)
- cpu = CPU_AMDK6_IIIplus;
- else
- cpu = CPU_AMDK6_2plus;
- }
- else
- cpu = CPU_UnkAMD;
- break;
- case 6:
- if ((model = _CPU_getCPUIDModel()) == 3)
- cpu = CPU_AMDDuron;
- else
- cpu = CPU_AMDAthlon;
- break;
- default:
- cpu = CPU_UnkAMD;
- }
- }
- else if (vendor == CPU_IDT) {
- /* Check for IDT WinChip processors */
- switch (cpu & CPU_mask) {
- case 5:
- if ((model = _CPU_getCPUIDModel()) <= 4)
- cpu = CPU_WinChipC6;
- else if (model == 8)
- cpu = CPU_WinChip2;
- else
- cpu = CPU_UnkIDT;
- break;
- default:
- cpu = CPU_UnkIDT;
- }
- }
- else {
- /* Assume a Pentium compatible Intel clone */
- cpu = CPU_Pentium;
- }
- return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift);
- }
- else {
- if (_CPU_check80386())
- cpu = CPU_i386;
- else if (_CPU_check80486()) {
- /* If we get here we may have a Cyrix processor so we can try
- * enabling the CPUID instruction and trying again.
- */
- if (firstTime) {
- firstTime = false;
- _CPU_enableCyrixCPUID();
- return CPU_getProcessorType();
- }
- cpu = CPU_i486;
- }
- else
- cpu = CPU_Pentium;
- if (!_CPU_checkClone())
- return cpu | CPU_Intel;
- return cpu;
- }
-#elif defined(__ALPHA__)
- return CPU_Alpha;
-#elif defined(__MIPS__)
- return CPU_Mips;
-#elif defined(__PPC__)
- return CPU_PowerPC;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns true if the processor supports Intel MMX extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if MMX is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the Intel MMX extended
-instruction set.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_have3DNow, CPU_haveSSE,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_haveMMX(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0;
- return false;
-#else
- return false;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns true if the processor supports AMD 3DNow! extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if 3DNow! is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the AMD 3DNow! extended
-instruction set.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_haveSSE,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_have3DNow(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return _CPU_have3DNow();
- return false;
-#else
- return false;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns true if the processor supports Intel KNI extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if Intel KNI is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the Intel KNI extended
-instruction set.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_haveSSE(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0;
- return false;
-#else
- return false;
-#endif
-}
-
-/****************************************************************************
-RETURNS:
-True if the RTSC instruction is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the Intel RDTSC
-instruction, for high precision timing. If the processor is not an Intel or
-Intel clone CPU, this function will always return false.
-
-DESCRIPTION:
-Returns true if the processor supports RDTSC extensions.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-True if RTSC is available, false if not.
-
-REMARKS:
-This function determines if the processor supports the RDTSC instruction
-for reading the processor time stamp counter.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_getProcessorSpeed, CPU_haveMMX, CPU_have3DNow,
-CPU_getProcessorName
-****************************************************************************/
-ibool ZAPI CPU_haveRDTSC(void)
-{
-#ifdef __INTEL__
- if (_CPU_haveCPUID())
- return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0;
- return false;
-#else
- return false;
-#endif
-}
-
-#ifdef __INTEL__
-
-#define ITERATIONS 16000
-#define SAMPLINGS 2
-#define INNER_LOOPS 400
-
-/****************************************************************************
-REMARKS:
-If processor does not support time stamp reading, but is at least a 386 or
-above, utilize method of timing a loop of BSF instructions which take a
-known number of cycles to run on i386(tm), i486(tm), and Pentium(R)
-processors.
-****************************************************************************/
-static ulong GetBSFCpuSpeed(
- ulong cycles)
-{
- CPU_largeInteger t0,t1,count_freq;
- ulong ticks; /* Microseconds elapsed during test */
- ulong current; /* Variable to store time elapsed */
- int i,j,iPriority;
- ulong lowest = (ulong)-1;
-
- iPriority = SetMaxThreadPriority();
- GetCounterFrequency(&count_freq);
- for (i = 0; i < SAMPLINGS; i++) {
- GetCounter(&t0);
- for (j = 0; j < INNER_LOOPS; j++)
- _CPU_runBSFLoop(ITERATIONS);
- GetCounter(&t1);
- current = t1.low - t0.low;
- if (current < lowest)
- lowest = current;
- }
- RestoreThreadPriority(iPriority);
-
- /* Compute frequency */
- ticks = _CPU_mulDiv(lowest,1000000,count_freq.low);
- if ((ticks % count_freq.low) > (count_freq.low/2))
- ticks++; /* Round up if necessary */
- if (ticks == 0)
- return 0;
- return ((cycles*INNER_LOOPS)/ticks);
-}
-
-#define TOLERANCE 1
-
-/****************************************************************************
-REMARKS:
-On processors supporting the Read Time Stamp opcode, compare elapsed
-time on the High-Resolution Counter with elapsed cycles on the Time
-Stamp Register.
-
-The inner loop runs up to 20 times oruntil the average of the previous
-three calculated frequencies is within 1 MHz of each of the individual
-calculated frequencies. This resampling increases the accuracy of the
-results since outside factors could affect this calculation.
-****************************************************************************/
-static ulong GetRDTSCCpuSpeed(
- ibool accurate)
-{
- CPU_largeInteger t0,t1,s0,s1,count_freq;
- u64 stamp0, stamp1, ticks0, ticks1;
- u64 total_cycles, cycles, hz, freq;
- u64 total_ticks, ticks;
- int tries,iPriority;
- ulong maxCount;
-
- PM_set64_32(total_cycles,0);
- PM_set64_32(total_ticks,0);
- maxCount = accurate ? 600000 : 30000;
- iPriority = SetMaxThreadPriority();
- GetCounterFrequency(&count_freq);
- PM_set64(freq,count_freq.high,count_freq.low);
- for (tries = 0; tries < 3; tries++) {
- /* Loop until 100 ticks have passed since last read of hi-res
- * counter. This accounts for overhead later.
- */
- GetCounter(&t0);
- t1.low = t0.low;
- t1.high = t0.high;
- while ((t1.low - t0.low) < 100) {
- GetCounter(&t1);
- _CPU_readTimeStamp(&s0);
- }
-
- /* Loop until 30000 ticks have passed since last read of hi-res counter.
- * This allows for elapsed time for sampling. For a hi-res frequency
- * of 1MHz, this is about 0.03 of a second. The frequency reported
- * by the OS dependent code should be tuned to provide a good
- * sample period depending on the accuracy of the OS timers (ie:
- * if the accuracy is lower, lower the frequency to spend more time
- * in the inner loop to get better accuracy).
- */
- t0.low = t1.low;
- t0.high = t1.high;
- while ((t1.low - t0.low) < maxCount) {
- GetCounter(&t1);
- _CPU_readTimeStamp(&s1);
- }
-
- /* Find the difference during the timing loop */
- PM_set64(stamp0,s0.high,s0.low);
- PM_set64(stamp1,s1.high,s1.low);
- PM_set64(ticks0,t0.high,t0.low);
- PM_set64(ticks1,t1.high,t1.low);
- PM_sub64(cycles,stamp1,stamp0);
- PM_sub64(ticks,ticks1,ticks0);
-
- /* Sum up the results */
- PM_add64(total_ticks,total_ticks,ticks);
- PM_add64(total_cycles,total_cycles,cycles);
- }
- RestoreThreadPriority(iPriority);
-
- /* Compute frequency in Hz */
- PM_mul64(hz,total_cycles,freq);
- PM_div64(hz,hz,total_ticks);
- return PM_64to32(hz);
-}
-
-#endif /* __INTEL__ */
-
-/****************************************************************************
-DESCRIPTION:
-Returns the speed of the processor in MHz.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-accurate - True of the speed should be measured accurately
-
-RETURNS:
-Processor speed in MHz.
-
-REMARKS:
-This function returns the speed of the CPU in MHz. Note that if the speed
-cannot be determined, this function will return 0.
-
-If the accurate parameter is set to true, this function will spend longer
-profiling the speed of the CPU, and will not round the CPU speed that is
-reported. This is important for highly accurate timing using the Pentium
-RDTSC instruction, but it does take a lot longer for the profiling to
-produce accurate results.
-
-SEE ALSO:
-CPU_getProcessorSpeedInHz, CPU_getProcessorType, CPU_haveMMX,
-CPU_getProcessorName
-****************************************************************************/
-ulong ZAPI CPU_getProcessorSpeed(
- ibool accurate)
-{
-#if defined(__INTEL__)
- /* Number of cycles needed to execute a single BSF instruction on i386+
- * processors.
- */
- ulong cpuSpeed;
- uint i;
- static ulong intel_cycles[] = {
- 115,47,43,
- };
- static ulong cyrix_cycles[] = {
- 38,38,52,52,
- };
- static ulong amd_cycles[] = {
- 49,
- };
- static ulong known_speeds[] = {
- 1000,950,900,850,800,750,700,650,600,550,500,450,433,400,350,
- 333,300,266,233,200,166,150,133,120,100,90,75,66,60,50,33,20,0,
- };
-
- if (CPU_haveRDTSC()) {
- cpuSpeed = (GetRDTSCCpuSpeed(accurate) + 500000) / 1000000;
- }
- else {
- int type = CPU_getProcessorType();
- int processor = type & CPU_mask;
- int vendor = type & CPU_familyMask;
- if (vendor == CPU_Intel)
- cpuSpeed = GetBSFCpuSpeed(ITERATIONS * intel_cycles[processor - CPU_i386]);
- else if (vendor == CPU_Cyrix)
- cpuSpeed = GetBSFCpuSpeed(ITERATIONS * cyrix_cycles[processor - CPU_Cyrix6x86]);
- else if (vendor == CPU_AMD)
- cpuSpeed = GetBSFCpuSpeed(ITERATIONS * amd_cycles[0]);
- else
- return 0;
- }
-
- /* Now normalise the results given known processors speeds, if the
- * speed we measure is within 2MHz of the expected values
- */
- if (!accurate) {
- for (i = 0; known_speeds[i] != 0; i++) {
- if (cpuSpeed >= (known_speeds[i]-3) && cpuSpeed <= (known_speeds[i]+3)) {
- return known_speeds[i];
- }
- }
- }
- return cpuSpeed;
-#else
- return 0;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the speed of the processor in Hz.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Accurate processor speed in Hz.
-
-REMARKS:
-This function returns the accurate speed of the CPU in Hz. Note that if the
-speed cannot be determined, this function will return 0.
-
-This function is similar to the CPU_getProcessorSpeed function, except that
-it attempts to accurately measure the CPU speed in Hz. This is used
-internally in the Zen Timer libraries to provide accurate real world timing
-information. This is important for highly accurate timing using the Pentium
-RDTSC instruction, but it does take a lot longer for the profiling to
-produce accurate results.
-
-SEE ALSO:
-CPU_getProcessorSpeed, CPU_getProcessorType, CPU_haveMMX,
-CPU_getProcessorName
-****************************************************************************/
-ulong ZAPI CPU_getProcessorSpeedInHZ(
- ibool accurate)
-{
-#if defined(__INTEL__)
- if (CPU_haveRDTSC()) {
- return GetRDTSCCpuSpeed(accurate);
- }
- return CPU_getProcessorSpeed(false) * 1000000;
-#else
- return 0;
-#endif
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns a string defining the speed and name of the processor.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Processor name string.
-
-REMARKS:
-This function returns an English string describing the speed and name of the
-CPU.
-
-SEE ALSO:
-CPU_getProcessorType, CPU_haveMMX, CPU_getProcessorName
-****************************************************************************/
-char * ZAPI CPU_getProcessorName(void)
-{
-#if defined(__INTEL__)
- static int cpu,speed = -1;
- static char name[80];
-
- if (speed == -1) {
- cpu = CPU_getProcessorType();
- speed = CPU_getProcessorSpeed(false);
- }
- sprintf(name,"%d MHz ", speed);
- switch (cpu & CPU_mask) {
- case CPU_i386:
- strcat(name,"Intel i386 processor");
- break;
- case CPU_i486:
- strcat(name,"Intel i486 processor");
- break;
- case CPU_Pentium:
- strcat(name,"Intel Pentium processor");
- break;
- case CPU_PentiumPro:
- strcat(name,"Intel Pentium Pro processor");
- break;
- case CPU_PentiumII:
- strcat(name,"Intel Pentium II processor");
- break;
- case CPU_Celeron:
- strcat(name,"Intel Celeron processor");
- break;
- case CPU_PentiumIII:
- strcat(name,"Intel Pentium III processor");
- break;
- case CPU_UnkIntel:
- strcat(name,"Unknown Intel processor");
- break;
- case CPU_Cyrix6x86:
- strcat(name,"Cyrix 6x86 processor");
- break;
- case CPU_Cyrix6x86MX:
- strcat(name,"Cyrix 6x86MX processor");
- break;
- case CPU_CyrixMediaGX:
- strcat(name,"Cyrix MediaGX processor");
- break;
- case CPU_CyrixMediaGXm:
- strcat(name,"Cyrix MediaGXm processor");
- break;
- case CPU_UnkCyrix:
- strcat(name,"Unknown Cyrix processor");
- break;
- case CPU_AMDAm486:
- strcat(name,"AMD Am486 processor");
- break;
- case CPU_AMDAm5x86:
- strcat(name,"AMD Am5x86 processor");
- break;
- case CPU_AMDK5:
- strcat(name,"AMD K5 processor");
- break;
- case CPU_AMDK6:
- strcat(name,"AMD K6 processor");
- break;
- case CPU_AMDK6_2:
- strcat(name,"AMD K6-2 processor");
- break;
- case CPU_AMDK6_III:
- strcat(name,"AMD K6-III processor");
- break;
- case CPU_AMDK6_2plus:
- strcat(name,"AMD K6-2+ processor");
- break;
- case CPU_AMDK6_IIIplus:
- strcat(name,"AMD K6-III+ processor");
- break;
- case CPU_UnkAMD:
- strcat(name,"Unknown AMD processor");
- break;
- case CPU_AMDAthlon:
- strcat(name,"AMD Athlon processor");
- break;
- case CPU_AMDDuron:
- strcat(name,"AMD Duron processor");
- break;
- case CPU_WinChipC6:
- strcat(name,"IDT WinChip C6 processor");
- break;
- case CPU_WinChip2:
- strcat(name,"IDT WinChip 2 processor");
- break;
- case CPU_UnkIDT:
- strcat(name,"Unknown IDT processor");
- break;
- default:
- strcat(name,"Unknown processor");
- }
- if (CPU_haveMMX())
- strcat(name," with MMX(R)");
- if (CPU_have3DNow())
- strcat(name,", 3DNow!(R)");
- if (CPU_haveSSE())
- strcat(name,", SSE(R)");
- return name;
-#else
- return "Unknown";
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/debug.c b/board/MAI/bios_emulator/scitech/src/pm/debug.c
deleted file mode 100644
index 751bf09..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/debug.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main module containing debug checking features.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#ifdef __WIN32_VXD__
-#include "vxdfile.h"
-#elif defined(__NT_DRIVER__)
-#include "ntdriver.h"
-#elif defined(__OS2_VDD__)
-#include "vddfile.h"
-#else
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#endif
-
-/*---------------------------- Global variables ---------------------------*/
-
-/* {secret} */
-void (*_CHK_fail)(int fatal,const char *msg,const char *cond,const char *file,int line) = _CHK_defaultFail;
-static char logFile[256] = "";
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef CHECKED
-void _CHK_defaultFail(
- int fatal,
- const char *msg,
- const char *cond,
- const char *file,
- int line)
-{
- FILE *f;
- char buf[256];
-
- if (logFile[0] == 0) {
- strcpy(logFile,PM_getNucleusPath());
- PM_backslash(logFile);
- strcat(logFile,"scitech.log");
- }
- if ((f = fopen(logFile,"a+")) != NULL) {
-#if defined(__WIN32_VXD__) || defined(__OS2_VDD__) || defined(__NT_DRIVER__)
- sprintf(buf,msg,cond,file,line);
- fwrite(buf,1,strlen(buf),f);
-#else
- fprintf(f,msg,cond,file,line);
-#endif
- fclose(f);
- }
- if (fatal) {
- sprintf(buf,"Check failed: check '%s' for details", logFile);
- PM_fatalError(buf);
- }
-}
-#endif
-
-/****************************************************************************
-DESCRIPTION:
-Sets the location of the debug log file.
-
-HEADER:
-pmapi.h
-
-PARAMETERS:
-logFilePath - Full file and path name to debug log file.
-
-REMARKS:
-Sets the name and location of the debug log file. The debug log file is
-created and written to when runtime checks, warnings and failure conditions
-are logged to disk when code is compiled in CHECKED mode. By default the
-log file is called 'scitech.log' and goes into the current SciTech Nucleus
-path for the application. You can use this function to set the filename
-and location of the debug log file to your own application specific
-directory.
-****************************************************************************/
-void PMAPI PM_setDebugLog(
- const char *logFilePath)
-{
- strcpy(logFile,logFilePath);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_event.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_event.asm
deleted file mode 100644
index 36dcaab..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_event.asm
+++ /dev/null
@@ -1,194 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Multi-platform Graphics Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler
-;* Environment: IBM PC (MS DOS)
-;*
-;* Description: Assembly language support routines for the event module.
-;*
-;****************************************************************************
-
- ideal
-
-include "scitech.mac" ; Memory model macros
-
-ifdef flatmodel
-
-header _event ; Set up memory model
-
-begdataseg _event
-
- cextern _EVT_biosPtr,DPTR
-
-ifdef USE_NASM
-%define KB_HEAD WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-%define KB_TAIL WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-%define KB_START WORD esi+080h ; Start of keyboard buffer in BIOS data area
-%define KB_END WORD esi+082h ; End of keyboard buffer in BIOS data area
-else
-KB_HEAD EQU WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-KB_TAIL EQU WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-KB_START EQU WORD esi+080h ; Start of keyboard buffer in BIOS data area
-KB_END EQU WORD esi+082h ; End of keyboard buffer in BIOS data area
-endif
-
-enddataseg _event
-
-begcodeseg _event ; Start of code segment
-
- cpublic _EVT_codeStart
-
-;----------------------------------------------------------------------------
-; int _EVT_getKeyCode(void)
-;----------------------------------------------------------------------------
-; Returns the key code for the next available key by extracting it from
-; the BIOS keyboard buffer.
-;----------------------------------------------------------------------------
-cprocstart _EVT_getKeyCode
-
- enter_c
-
- mov esi,[_EVT_biosPtr]
- xor ebx,ebx
- xor eax,eax
- mov bx,[KB_HEAD]
- cmp bx,[KB_TAIL]
- jz @@Done
- xor eax,eax
- mov ax,[esi+ebx] ; EAX := character from keyboard buffer
- inc _bx
- inc _bx
- cmp bx,[KB_END] ; Hit the end of the keyboard buffer?
- jl @@1
- mov bx,[KB_START]
-@@1: mov [KB_HEAD],bx ; Update keyboard buffer head pointer
-
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _EVT_pumpMessages(void)
-;----------------------------------------------------------------------------
-; This function would normally do nothing, however due to strange bugs
-; in the Windows 3.1 and OS/2 DOS boxes, we don't get any hardware keyboard
-; interrupts unless we periodically call the BIOS keyboard functions. Hence
-; this function gets called every time that we check for events, and works
-; around this problem (in essence it tells the DOS VDM to pump the
-; keyboard events to our program ;-).
-;
-; Note that this bug is not present under Win 9x DOS boxes.
-;----------------------------------------------------------------------------
-cprocstart _EVT_pumpMessages
-
- mov ah,11h ; Function - Check keyboard status
- int 16h ; Call BIOS
-
- mov ax, 0Bh ; Reset Move Mouse
- int 33h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _EVT_disableInt
-
- pushf ; Put flag word on stack
- cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _EVT_restoreInt(int ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _EVT_restoreInt
-
- ARG ps:UINT
-
- push ebp
- mov ebp,esp ; Set up stack frame
- push [DWORD ps]
- popf ; Restore processor status (and interrupts)
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int EVT_rdinx(int port,int index)
-;----------------------------------------------------------------------------
-; Reads an indexed register value from an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_rdinx
-
- ARG port:UINT, index:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- out dx,al
- inc dx
- in al,dx
- movzx eax,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void EVT_wrinx(int port,int index,int value)
-;----------------------------------------------------------------------------
-; Writes an indexed register value to an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_wrinx
-
- ARG port:UINT, index:UINT, value:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- mov ah,[BYTE value]
- out dx,ax
- pop ebp
- ret
-
-cprocend
-
- cpublic _EVT_codeEnd
-
-endcodeseg _event
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_lztimer.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_lztimer.asm
deleted file mode 100644
index a4a9c79..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_lztimer.asm
+++ /dev/null
@@ -1,438 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: IBM PC (MS DOS)
-;*
-;* Description: Uses the 8253 timer and the BIOS time-of-day count to time
-;* the performance of code that takes less than an hour to
-;* execute.
-;*
-;* The routines in this package only works with interrupts
-;* enabled, and in fact will explicitly turn interrupts on
-;* in order to ensure we get accurate results from the timer.
-;*
-;* Externally 'C' callable routines:
-;*
-;* LZ_timerOn: Saves the BIOS time of day count and starts the
-;* long period Zen Timer.
-;*
-;* LZ_timerLap: Latches the current count, and keeps the timer running
-;*
-;* LZ_timerOff: Stops the long-period Zen Timer and saves the timer
-;* count and the BIOS time of day count.
-;*
-;* LZ_timerCount: Returns an unsigned long representing the timed count
-;* in microseconds. If more than an hour passed during
-;* the timing interval, LZ_timerCount will return the
-;* value 0xFFFFFFFF (an invalid count).
-;*
-;* Note: If either more than an hour passes between calls to LZ_timerOn
-;* and LZ_timerOff, an error is reported. For timing code that takes
-;* more than a few minutes to execute, use the low resolution
-;* Ultra Long Period Zen Timer code, which should be accurate
-;* enough for most purposes.
-;*
-;* Note: Each block of code being timed should ideally be run several
-;* times, with at least two similar readings required to
-;* establish a true measurement, in order to eliminate any
-;* variability caused by interrupts.
-;*
-;* Note: Interrupts must not be disabled for more than 54 ms at a
-;* stretch during the timing interval. Because interrupts are
-;* enabled, key, mice, and other devices that generate interrupts
-;* should not be used during the timing interval.
-;*
-;* Note: Any extra code running off the timer interrupt (such as
-;* some memory resident utilities) will increase the time
-;* measured by the Zen Timer.
-;*
-;* Note: These routines can introduce inaccuracies of up to a few
-;* tenths of a second into the system clock count for each
-;* code section being timed. Consequently, it's a good idea to
-;* reboot at the conclusion of timing sessions. (The
-;* battery-backed clock, if any, is not affected by the Zen
-;* timer.)
-;*
-;* All registers and all flags are preserved by all routines, except
-;* interrupts which are always turned on
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-;****************************************************************************
-;
-; Equates used by long period Zen Timer
-;
-;****************************************************************************
-
-; Base address of 8253 timer chip
-
-BASE_8253 equ 40h
-
-; The address of the timer 0 count registers in the 8253
-
-TIMER_0_8253 equ BASE_8253 + 0
-
-; The address of the mode register in the 8253
-
-MODE_8253 equ BASE_8253 + 3
-
-; The address of the BIOS timer count variable in the BIOS data area.
-
-TIMER_COUNT equ 6Ch
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-endif
-
-header _lztimer
-
-begdataseg _lztimer
-
- cextern _ZTimerBIOSPtr,DPTR
-
-StartBIOSCount dd 0 ; Starting BIOS count dword
-EndBIOSCount dd 0 ; Ending BIOS count dword
-EndTimedCount dw 0 ; Timer 0 count at the end of timing period
-
-enddataseg _lztimer
-
-begcodeseg _lztimer ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void LZ_timerOn(void);
-;----------------------------------------------------------------------------
-; Starts the Long period Zen timer counting.
-;----------------------------------------------------------------------------
-cprocstart LZ_timerOn
-
-; Set the timer 0 of the 8253 to mode 2 (divide-by-N), to cause
-; linear counting rather than count-by-two counting. Also stops
-; timer 0 until the timer count is loaded, except on PS/2 computers.
-
- mov al,00110100b ; mode 2
- out MODE_8253,al
-
-; Set the timer count to 0, so we know we won't get another timer
-; interrupt right away. Note: this introduces an inaccuracy of up to 54 ms
-; in the system clock count each time it is executed.
-
- DELAY
- sub al,al
- out TIMER_0_8253,al ; lsb
- DELAY
- out TIMER_0_8253,al ; msb
-
-; Store the timing start BIOS count
-
- use_es
-ifdef flatmodel
- mov ebx,[_ZTimerBIOSPtr]
-else
- les bx,[_ZTimerBIOSPtr]
-endif
- cli ; No interrupts while we grab the count
- mov eax,[_ES _bx+TIMER_COUNT]
- sti
- mov [StartBIOSCount],eax
- unuse_es
-
-; Set the timer count to 0 again to start the timing interval.
-
- mov al,00110100b ; set up to load initial
- out MODE_8253,al ; timer count
- DELAY
- sub al,al
- out TIMER_0_8253,al ; load count lsb
- DELAY
- out TIMER_0_8253,al ; load count msb
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void LZ_timerOff(void);
-;----------------------------------------------------------------------------
-; Stops the long period Zen timer and saves count.
-;----------------------------------------------------------------------------
-cprocstart LZ_timerOff
-
-; Latch the timer count.
-
- mov al,00000000b ; latch timer 0
- out MODE_8253,al
- cli ; Stop the BIOS count
-
-; Read the BIOS count. (Since interrupts are disabled, the BIOS
-; count won't change).
-
- use_es
-ifdef flatmodel
- mov ebx,[_ZTimerBIOSPtr]
-else
- les bx,[_ZTimerBIOSPtr]
-endif
- mov eax,[_ES _bx+TIMER_COUNT]
- mov [EndBIOSCount],eax
- unuse_es
-
-; Read out the count we latched earlier.
-
- in al,TIMER_0_8253 ; least significant byte
- DELAY
- mov ah,al
- in al,TIMER_0_8253 ; most significant byte
- xchg ah,al
- neg ax ; Convert from countdown remaining
- ; to elapsed count
- mov [EndTimedCount],ax
- sti ; Let the BIOS count continue
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; unsigned long LZ_timerLap(void)
-;----------------------------------------------------------------------------
-; Latches the current count and converts it to a microsecond timing value,
-; but leaves the timer still running. We dont check for and overflow,
-; where the time has gone over an hour in this routine, since we want it
-; to execute as fast as possible.
-;----------------------------------------------------------------------------
-cprocstart LZ_timerLap
-
- push ebx ; Save EBX for 32 bit code
-
-; Latch the timer count.
-
- mov al,00000000b ; latch timer 0
- out MODE_8253,al
- cli ; Stop the BIOS count
-
-; Read the BIOS count. (Since interrupts are disabled, the BIOS
-; count wont change).
-
- use_es
-ifdef flatmodel
- mov ebx,[_ZTimerBIOSPtr]
-else
- les bx,[_ZTimerBIOSPtr]
-endif
- mov eax,[_ES _bx+TIMER_COUNT]
- mov [EndBIOSCount],eax
- unuse_es
-
-; Read out the count we latched earlier.
-
- in al,TIMER_0_8253 ; least significant byte
- DELAY
- mov ah,al
- in al,TIMER_0_8253 ; most significant byte
- xchg ah,al
- neg ax ; Convert from countdown remaining
- ; to elapsed count
- mov [EndTimedCount],ax
- sti ; Let the BIOS count continue
-
-; See if a midnight boundary has passed and adjust the finishing BIOS
-; count by the number of ticks in 24 hours. We wont be able to detect
-; more than 24 hours, but at least we can time across a midnight
-; boundary
-
- mov eax,[EndBIOSCount] ; Is end < start?
- cmp eax,[StartBIOSCount]
- jae @@CalcBIOSTime ; No, calculate the time taken
-
-; Adjust the finishing time by adding the number of ticks in 24 hours
-; (1573040).
-
- add [DWORD EndBIOSCount],1800B0h
-
-; Convert the BIOS time to microseconds
-
-@@CalcBIOSTime:
- mov ax,[WORD EndBIOSCount]
- sub ax,[WORD StartBIOSCount]
- mov dx,54925 ; Number of microseconds each
- ; BIOS count represents.
- mul dx
- mov bx,ax ; set aside BIOS count in
- mov cx,dx ; microseconds
-
-; Convert timer count to microseconds
-
- push _si
- mov ax,[EndTimedCount]
- mov si,8381
- mul si
- mov si,10000
- div si ; * 0.8381 = * 8381 / 10000
- pop _si
-
-; Add the timer and BIOS counts together to get an overall time in
-; microseconds.
-
- add ax,bx
- adc cx,0
-ifdef flatmodel
- shl ecx,16
- mov cx,ax
- mov eax,ecx ; EAX := timer count
-else
- mov dx,cx
-endif
- pop ebx ; Restore EBX for 32 bit code
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; unsigned long LZ_timerCount(void);
-;----------------------------------------------------------------------------
-; Returns an unsigned long representing the net time in microseconds.
-;
-; If an hour has passed while timing, we return 0xFFFFFFFF as the count
-; (which is not a possible count in itself).
-;----------------------------------------------------------------------------
-cprocstart LZ_timerCount
-
- push ebx ; Save EBX for 32 bit code
-
-; See if a midnight boundary has passed and adjust the finishing BIOS
-; count by the number of ticks in 24 hours. We wont be able to detect
-; more than 24 hours, but at least we can time across a midnight
-; boundary
-
- mov eax,[EndBIOSCount] ; Is end < start?
- cmp eax,[StartBIOSCount]
- jae @@CheckForHour ; No, check for hour passing
-
-; Adjust the finishing time by adding the number of ticks in 24 hours
-; (1573040).
-
- add [DWORD EndBIOSCount],1800B0h
-
-; See if more than an hour passed during timing. If so, notify the user.
-
-@@CheckForHour:
- mov ax,[WORD StartBIOSCount+2]
- cmp ax,[WORD EndBIOSCount+2]
- jz @@CalcBIOSTime ; Hour count didn't change, so
- ; everything is fine
-
- inc ax
- cmp ax,[WORD EndBIOSCount+2]
- jnz @@TestTooLong ; Two hour boundaries passed, so the
- ; results are no good
- mov ax,[WORD EndBIOSCount]
- cmp ax,[WORD StartBIOSCount]
- jb @@CalcBIOSTime ; a single hour boundary passed. That's
- ; OK, so long as the total time wasn't
- ; more than an hour.
-
-; Over an hour elapsed passed during timing, which renders
-; the results invalid. Notify the user. This misses the case where a
-; multiple of 24 hours has passed, but we'll rely on the perspicacity of
-; the user to detect that case :-).
-
-@@TestTooLong:
-ifdef flatmodel
- mov eax,0FFFFFFFFh
-else
- mov ax,0FFFFh
- mov dx,0FFFFh
-endif
- jmp short @@Done
-
-; Convert the BIOS time to microseconds
-
-@@CalcBIOSTime:
- mov ax,[WORD EndBIOSCount]
- sub ax,[WORD StartBIOSCount]
- mov dx,54925 ; Number of microseconds each
- ; BIOS count represents.
- mul dx
- mov bx,ax ; set aside BIOS count in
- mov cx,dx ; microseconds
-
-; Convert timer count to microseconds
-
- push _si
- mov ax,[EndTimedCount]
- mov si,8381
- mul si
- mov si,10000
- div si ; * 0.8381 = * 8381 / 10000
- pop _si
-
-; Add the timer and BIOS counts together to get an overall time in
-; microseconds.
-
- add ax,bx
- adc cx,0
-ifdef flatmodel
- shl ecx,16
- mov cx,ax
- mov eax,ecx ; EAX := timer count
-else
- mov dx,cx
-endif
-
-@@Done: pop ebx ; Restore EBX for 32 bit code
- ret
-
-cprocend
-
-cprocstart LZ_disable
- cli
- ret
-cprocend
-
-cprocstart LZ_enable
- sti
- ret
-cprocend
-
-endcodeseg _lztimer
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_pm.asm
deleted file mode 100644
index 42b5cf3..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_pm.asm
+++ /dev/null
@@ -1,656 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: IBM PC Real mode and 16/32 bit protected mode
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* MSDOS.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmdos ; Set up memory model
-
-begdataseg _pmdos
-
-ifndef flatmodel
-
-struc rmregs_s
-ax dw ?
-ax_high dw ?
-bx dw ?
-bx_high dw ?
-cx dw ?
-cx_high dw ?
-dx dw ?
-dx_high dw ?
-si dw ?
-si_high dw ?
-di dw ?
-di_high dw ?
-cflag dw ?
-cflag_high dw ?
-ends rmregs_s
-RMREGS = (rmregs_s PTR es:bx)
-
-struc rmsregs_s
-es dw ?
-cs dw ?
-ss dw ?
-ds dw ?
-ends rmsregs_s
-RMSREGS = (rmsregs_s PTR es:bx)
-
-endif ; !flatmodel
-
-ifdef flatmodel
- cextern _PM_savedDS,USHORT
- cextern _PM_VXD_off,UINT
- cextern _PM_VXD_sel,UINT
-ifdef DOS4GW
- cextern _PM_haveCauseWay,UINT
-endif
-endif
-intel_id db "GenuineIntel" ; Intel vendor ID
-
-PMHELP_GETPDB EQU 0026h
-PMHELP_FLUSHTLB EQU 0027h
-
-enddataseg _pmdos
-
-P586
-
-begcodeseg _pmdos ; Start of code segment
-
-ifndef flatmodel
-
-;----------------------------------------------------------------------------
-; void PM_callRealMode(unsigned s,unsigned o, RMREGS *regs,
-; RMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Calls a real mode procedure, loading the appropriate registers values
-; from the passed in structures. Only the DS and ES register are loaded
-; from the SREGS structure.
-;----------------------------------------------------------------------------
-cprocstart PM_callRealMode
-
- ARG s:WORD, o:WORD, regs:DWORD, sregs:DWORD
-
- LOCAL addr:DWORD, bxVal:WORD, esVal:WORD, flags:WORD = LocalSize
-
- enter_c
- push ds
- push es
-
- mov ax,[o] ; Build the address to call in 'addr'
- mov [WORD addr],ax
- mov ax,[s]
- mov [WORD addr+2],ax
-
- les bx,[sregs]
- mov ax,[RMSREGS.ds]
- mov ds,ax ; DS := passed in value
- mov ax,[RMSREGS.es]
- mov [esVal],ax
- les bx,[regs]
- mov ax,[RMREGS.bx]
- mov [bxVal],ax
- mov ax,[RMREGS.ax] ; AX := passed in value
- mov cx,[RMREGS.cx] ; CX := passed in value
- mov dx,[RMREGS.dx] ; DX := passed in value
- mov si,[RMREGS.si] ; SI := passed in value
- mov di,[RMREGS.di] ; DI := passed in value
- push bp
- push [esVal]
- pop es ; ES := passed in value
- mov bx,[bxVal] ; BX := passed in value
-
- call [addr] ; Call the specified routine
-
- pushf ; Save flags for later
- pop [flags]
-
- pop bp
- push es
- pop [esVal]
- push bx
- pop [bxVal]
- les bx,[sregs]
- push ds
- pop [RMSREGS.ds] ; Save value of DS
- push [esVal]
- pop [RMSREGS.es] ; Save value of ES
- les bx,[regs]
- mov [RMREGS.ax],ax ; Save value of AX
- mov [RMREGS.cx],cx ; Save value of CX
- mov [RMREGS.dx],dx ; Save value of DX
- mov [RMREGS.si],si ; Save value of SI
- mov [RMREGS.di],di ; Save value of DI
- mov ax,[flags] ; Return flags
- and ax,1h ; Isolate carry flag
- mov [RMREGS.cflag],ax ; Save carry flag status
- mov ax,[bxVal]
- mov [RMREGS.bx],ax ; Save value of BX
-
- pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-endif
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-; Create a table of the 256 different interrupt calls that we can jump
-; into
-
-ifdef USE_NASM
-
-%assign intno 0
-
-intTable:
-%rep 256
- db 0CDh
- db intno
-%assign intno intno + 1
- ret
- nop
-%endrep
-
-else
-
-intno = 0
-
-intTable:
- REPT 256
- db 0CDh
- db intno
-intno = intno + 1
- ret
- nop
- ENDM
-
-endif
-
-;----------------------------------------------------------------------------
-; _PM_genInt - Generate the appropriate interrupt
-;----------------------------------------------------------------------------
-cprocnear _PM_genInt
-
- push _ax ; Save _ax
- push _bx ; Save _bx
-ifdef flatmodel
- mov ebx,[UINT esp+12] ; EBX := interrupt number
-else
- mov bx,sp ; Make sure ESP is zeroed
- mov bx,[UINT ss:bx+6] ; BX := interrupt number
-endif
- mov _ax,offset intTable ; Point to interrupt generation table
- shl _bx,2 ; _BX := index into table
- add _ax,_bx ; _AX := pointer to interrupt code
-ifdef flatmodel
- xchg eax,[esp+4] ; Restore eax, and set for int
-else
- mov bx,sp
- xchg ax,[ss:bx+2] ; Restore ax, and set for int
-endif
- pop _bx ; restore _bx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_int386x
-
- ARG intno:UINT, inptr:DPTR, outptr:DPTR, sregs:DPTR
-
- LOCAL flags:UINT, sv_ds:UINT, sv_esi:ULONG = LocalSize
-
- enter_c
- push ds
- push es ; Save segment registers
- push fs
- push gs
-
- _lds _si,[sregs] ; DS:_SI -> Load segment registers
- mov es,[_si]
- mov bx,[_si+6]
- mov [sv_ds],_bx ; Save value of user DS on stack
- mov fs,[_si+8]
- mov gs,[_si+10]
-
- _lds _si,[inptr] ; Load CPU registers
- mov eax,[_si]
- mov ebx,[_si+4]
- mov ecx,[_si+8]
- mov edx,[_si+12]
- mov edi,[_si+20]
- mov esi,[_si+16]
-
- push ds ; Save value of DS
- push _bp ; Some interrupts trash this!
- clc ; Generate the interrupt
- push [UINT intno]
- mov ds,[WORD sv_ds] ; Set value of user's DS selector
- call _PM_genInt
- pop _bp ; Pop intno from stack (flags unchanged)
- pop _bp ; Restore value of stack frame pointer
- pop ds ; Restore value of DS
-
- pushf ; Save flags for later
- pop [UINT flags]
- push esi ; Save ESI for later
- pop [DWORD sv_esi]
- push ds ; Save DS for later
- pop [UINT sv_ds]
-
- _lds _si,[outptr] ; Save CPU registers
- mov [_si],eax
- mov [_si+4],ebx
- mov [_si+8],ecx
- mov [_si+12],edx
- push [DWORD sv_esi]
- pop [DWORD _si+16]
- mov [_si+20],edi
-
- mov _bx,[flags] ; Return flags
- and ebx,1h ; Isolate carry flag
- mov [_si+24],ebx ; Save carry flag status
-
- _lds _si,[sregs] ; Save segment registers
- mov [_si],es
- mov _bx,[sv_ds]
- mov [_si+6],bx ; Get returned DS from stack
- mov [_si+8],fs
- mov [_si+10],gs
-
- pop gs ; Restore segment registers
- pop fs
- pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-ifndef flatmodel
-_PM_savedDS dw _DATA ; Saved value of DS
-endif
-
-;----------------------------------------------------------------------------
-; void PM_saveDS(void)
-;----------------------------------------------------------------------------
-; Save the value of DS into a section of the code segment, so that we can
-; quickly load this value at a later date in the PM_loadDS() routine from
-; inside interrupt handlers etc. The method to do this is different
-; depending on the DOS extender being used.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_saveDS
-
-ifdef flatmodel
- mov [_PM_savedDS],ds ; Store away in data segment
-endif
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_loadDS(void)
-;----------------------------------------------------------------------------
-; Routine to load the DS register with the default value for the current
-; DOS extender. Only the DS register is loaded, not the ES register, so
-; if you wish to call C code, you will need to also load the ES register
-; in 32 bit protected mode.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_loadDS
-
- mov ds,[cs:_PM_savedDS] ; We can access the proper DS through CS
- ret
-
-cprocend
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; ibool DPMI_allocateCallback(void (*pmcode)(), void *rmregs, long *RMCB)
-;----------------------------------------------------------------------------
-cprocstart _DPMI_allocateCallback
-
- ARG pmcode:CPTR, rmregs:DPTR, RMCB:DPTR
-
- enter_c
- push ds
- push es
-
- push cs
- pop ds
- mov esi,[pmcode] ; DS:ESI -> protected mode code to call
- mov edi,[rmregs] ; ES:EDI -> real mode register buffer
- mov ax,303h ; AX := allocate realmode callback function
- int 31h
- mov eax,0 ; Return failure!
- jc @@Fail
-
- mov eax,[RMCB]
- shl ecx,16
- mov cx,dx
- mov [es:eax],ecx ; Return real mode address
- mov eax,1 ; Return success!
-
-@@Fail: pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void DPMI_freeCallback(long RMCB)
-;----------------------------------------------------------------------------
-cprocstart _DPMI_freeCallback
-
- ARG RMCB:ULONG
-
- enter_c
-
- mov cx,[WORD RMCB+2]
- mov dx,[WORD RMCB] ; CX:DX := real mode callback
- mov ax,304h
- int 31h
-
- leave_c
- ret
-
-cprocend
-
-endif
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- popfd
- pop _bp
- ret
-
-cprocend
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; int _PM_pagingEnabled(void)
-;----------------------------------------------------------------------------
-; Returns 1 if paging is enabled, 0 if not or -1 if not at ring 0
-;----------------------------------------------------------------------------
-cprocstart _PM_pagingEnabled
-
- mov eax,-1
-ifdef DOS4GW
- mov cx,cs
- and ecx,3
- jz @@Ring0
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Ring0
- jmp @@Exit
-
-@@Ring0:
- mov eax,cr0 ; Load CR0
- shr eax,31 ; Isolate paging enabled bit
-endif
-@@Exit: ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
-ifdef DOS4GW
- mov ax,cs
- and eax,3
- jz @@Ring0
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Ring0
-endif
-
-; Call VxD if running at ring 3 in a DOS box
-
- cmp [WORD _PM_VXD_sel],0
- jz @@Fail
- mov eax,PMHELP_GETPDB
-ifdef USE_NASM
- call far dword [_PM_VXD_off]
-else
- call [FCPTR _PM_VXD_off]
-endif
- ret
-
-@@Ring0:
-ifdef DOS4GW
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-endif
-@@Fail: xor eax,eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_flushTLB - Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- mov ax,cs
- and eax,3
- jz @@Ring0
-ifdef DOS4GW
- cmp [UINT _PM_haveCauseWay],0
- jnz @@Ring0
-endif
-
-; Call VxD if running at ring 3 in a DOS box
-
- cmp [WORD _PM_VXD_sel],0
- jz @@Fail
- mov eax,PMHELP_FLUSHTLB
-ifdef USE_NASM
- call far dword [_PM_VXD_off]
-else
- call [FCPTR _PM_VXD_off]
-endif
- ret
-
-@@Ring0:
-ifdef DOS4GW
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
-endif
-@@Fail: ret
-
-cprocend
-
-endif
-
-;----------------------------------------------------------------------------
-; void _PM_VxDCall(VXD_regs far *r,uint off,uint sel);
-;----------------------------------------------------------------------------
-cprocstart _PM_VxDCall
-
- ARG r:DPTR, off:UINT, sel:UINT
-
- enter_c
-
-; Load all registers from the registers structure
-
- mov ebx,[r]
- mov eax,[ebx+0]
- mov ecx,[ebx+8]
- mov edx,[ebx+12]
- mov esi,[ebx+16]
- mov edi,[ebx+20]
- mov ebx,[ebx+4] ; Trashes BX structure pointer!
-
-; Call the VxD entry point (on stack)
-
-ifdef USE_NASM
- call far dword [off]
-else
- call [FCPTR off]
-endif
-
-; Save all registers back in the structure
-
- push ebx ; Push EBX onto stack for later
- mov ebx,[r]
- mov [ebx+0],eax
- mov [ebx+8],ecx
- mov [ebx+12],edx
- mov [ebx+16],esi
- mov [ebx+20],edi
- pop [DWORD ebx+4] ; Save value of EBX from stack
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _pmdos
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_pmdos.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_pmdos.asm
deleted file mode 100644
index 5c741f3..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_pmdos.asm
+++ /dev/null
@@ -1,1105 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: IBM PC Real mode and 16/32 bit protected mode
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* MSDOS interrupt handling.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmdos ; Set up memory model
-
-; Define the size of our local stacks. For real mode code they cant be
-; that big, but for 32 bit protected mode code we can make them nice and
-; large so that complex C functions can be used.
-
-ifdef flatmodel
-MOUSE_STACK EQU 4096
-TIMER_STACK EQU 4096
-KEY_STACK EQU 1024
-INT10_STACK EQU 1024
-IRQ_STACK EQU 1024
-else
-MOUSE_STACK EQU 1024
-TIMER_STACK EQU 512
-KEY_STACK EQU 256
-INT10_STACK EQU 256
-IRQ_STACK EQU 256
-endif
-
-ifdef USE_NASM
-
-; Macro to load DS and ES registers with correct value.
-
-%imacro LOAD_DS 0
-%ifdef flatmodel
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-%else
- push ax
- mov ax,_DATA
- mov ds,ax
- pop ax
-%endif
-%endmacro
-
-; Note that interrupts we disable interrupts during the following stack
-; %imacro for correct operation, but we do not enable them again. Normally
-; these %imacros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-%imacro NEWSTK 1
- cli
- mov [seg_%1],ss
- mov [ptr_%1],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset %1
-%endmacro
-
-; %imacro to switch back to the old stack.
-
-%imacro RESTSTK 1
- cli
- mov ss,[seg_%1]
- mov _sp,[ptr_%1]
-%endmacro
-
-; %imacro to swap the current stack with the one saved away.
-
-%imacro SWAPSTK 1
- cli
- mov ax,ss
- xchg ax,[seg_%1]
- mov ss,ax
- xchg _sp,[ptr_%1]
-%endmacro
-
-else
-
-; Macro to load DS and ES registers with correct value.
-
-MACRO LOAD_DS
-ifdef flatmodel
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-else
- push ax
- mov ax,_DATA
- mov ds,ax
- pop ax
-endif
-ENDM
-
-; Note that interrupts we disable interrupts during the following stack
-; macro for correct operation, but we do not enable them again. Normally
-; these macros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-MACRO NEWSTK stkname
- cli
- mov [seg_&stkname&],ss
- mov [ptr_&stkname&],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset stkname
-ENDM
-
-; Macro to switch back to the old stack.
-
-MACRO RESTSTK stkname
- cli
- mov ss,[seg_&stkname&]
- mov _sp,[ptr_&stkname&]
-ENDM
-
-; Macro to swap the current stack with the one saved away.
-
-MACRO SWAPSTK stkname
- cli
- mov ax,ss
- xchg ax,[seg_&stkname&]
- mov ss,ax
- xchg _sp,[ptr_&stkname&]
-ENDM
-
-endif
-
-begdataseg _pmdos
-
-ifdef flatmodel
- cextern _PM_savedDS,USHORT
-endif
- cextern _PM_critHandler,CPTR
- cextern _PM_breakHandler,CPTR
- cextern _PM_timerHandler,CPTR
- cextern _PM_rtcHandler,CPTR
- cextern _PM_keyHandler,CPTR
- cextern _PM_key15Handler,CPTR
- cextern _PM_mouseHandler,CPTR
- cextern _PM_int10Handler,CPTR
-
- cextern _PM_ctrlCPtr,DPTR
- cextern _PM_ctrlBPtr,DPTR
- cextern _PM_critPtr,DPTR
-
- cextern _PM_prevTimer,FCPTR
- cextern _PM_prevRTC,FCPTR
- cextern _PM_prevKey,FCPTR
- cextern _PM_prevKey15,FCPTR
- cextern _PM_prevBreak,FCPTR
- cextern _PM_prevCtrlC,FCPTR
- cextern _PM_prevCritical,FCPTR
- cextern _PM_prevRealTimer,ULONG
- cextern _PM_prevRealRTC,ULONG
- cextern _PM_prevRealKey,ULONG
- cextern _PM_prevRealKey15,ULONG
- cextern _PM_prevRealInt10,ULONG
-
-cpublic _PM_pmdosDataStart
-
-; Allocate space for all of the local stacks that we need. These stacks
-; are not very large, but should be large enough for most purposes
-; (generally you want to handle these interrupts quickly, simply storing
-; the information for later and then returning). If you need bigger
-; stacks then change the appropriate value in here.
-
- ALIGN 4
- dclb MOUSE_STACK ; Space for local stack (small)
-MsStack: ; Stack starts at end!
-ptr_MsStack DUINT 0 ; Place to store old stack offset
-seg_MsStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb INT10_STACK ; Space for local stack (small)
-Int10Stack: ; Stack starts at end!
-ptr_Int10Stack DUINT 0 ; Place to store old stack offset
-seg_Int10Stack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-TmStack: ; Stack starts at end!
-ptr_TmStack DUINT 0 ; Place to store old stack offset
-seg_TmStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-RtcStack: ; Stack starts at end!
-ptr_RtcStack DUINT 0 ; Place to store old stack offset
-seg_RtcStack dw 0 ; Place to store old stack segment
-RtcInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-KyStack: ; Stack starts at end!
-ptr_KyStack DUINT 0 ; Place to store old stack offset
-seg_KyStack dw 0 ; Place to store old stack segment
-KyInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-Ky15Stack: ; Stack starts at end!
-ptr_Ky15Stack DUINT 0 ; Place to store old stack offset
-seg_Ky15Stack dw 0 ; Place to store old stack segment
-
-TempSeg dw 0 ; Place to store stack segment
-
-cpublic _PM_pmdosDataEnd
-
-enddataseg _pmdos
-
-begcodeseg _pmdos ; Start of code segment
-
-cpublic _PM_pmdosCodeStart
-
-;----------------------------------------------------------------------------
-; PM_mouseISR - Mouse interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt subroutine called by the mouse driver upon interrupts, to
-; dispatch control to high level C based subroutines. Interrupts are on
-; when we call the user code.
-;
-; It is _extremely_ important to save the state of the extended registers
-; as these may well be trashed by the routines called from here and not
-; restored correctly by the mouse interface module.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. For mouse handlers this is not a
-; problem, as the mouse driver arbitrates calls to the user mouse
-; handler for us.
-;
-; Entry: AX - Condition mask giving reason for call
-; BX - Mouse button state
-; CX - Horizontal cursor coordinate
-; DX - Vertical cursor coordinate
-; SI - Horizontal mickey value
-; DI - Vertical mickey value
-;
-;----------------------------------------------------------------------------
-ifdef DJGPP
-cprocstart _PM_mouseISR
-else
-cprocfar _PM_mouseISR
-endif
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
- NEWSTK MsStack ; Switch to local stack
-
-; Call the installed high level C code routine
-
- clrhi dx ; Clear out high order values
- clrhi cx
- clrhi bx
- clrhi ax
- sgnhi si
- sgnhi di
-
- push _di
- push _si
- push _dx
- push _cx
- push _bx
- push _ax
- sti ; Enable interrupts
- call [CPTR _PM_mouseHandler]
- _add sp,12,24
-
- RESTSTK MsStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- ret ; We are done!!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_timerISR - Timer interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_timerISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- NEWSTK TmStack ; Switch to local stack
- call [CPTR _PM_timerHandler]
- RESTSTK TmStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevTimer - Chain to previous timer interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous timer interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevTimer
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealTimer]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
- SWAPSTK TmStack ; Swap back to previous stack
- pushf ; Save state of interrupt flag
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevTimer]
-else
- call [_PM_prevTimer]
-endif
- popf ; Restore state of interrupt flag
- SWAPSTK TmStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; PM_rtcISR - Real time clock interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_rtcISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
-; Clear priority interrupt controller and re-enable interrupts so we
-; dont lock things up for long.
-
- mov al,20h
- out 0A0h,al
- out 020h,al
-
-; Clear real-time clock timeout
-
- in al,70h ; Read CMOS index register
- push _ax ; and save for later
- IODELAYN 3
- mov al,0Ch
- out 70h,al
- IODELAYN 5
- in al,71h
-
-; Call the C interrupt handler function
-
- LOAD_DS ; Load DS register
- cmp [BYTE RtcInside],1 ; Check for mutual exclusion
- je @@Exit
- mov [BYTE RtcInside],1
- NEWSTK RtcStack ; Switch to local stack
- sti ; Re-enable interrupts
- call [CPTR _PM_rtcHandler]
- RESTSTK RtcStack ; Restore previous stack
- mov [BYTE RtcInside],0
-
-@@Exit: pop _ax
- out 70h,al ; Restore CMOS index register
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-ifdef flatmodel
-;----------------------------------------------------------------------------
-; PM_irqISRTemplate - Hardware interrupt handler IRQ template
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for any interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible.
-;----------------------------------------------------------------------------
-cprocfar _PM_irqISRTemplate
-
- push ebx
- mov ebx,0 ; Relocation adjustment factor
- jmp __IRQEntry
-
-; Global variables stored in the IRQ thunk code segment
-
-_CHandler dd 0 ; Pointer to C interrupt handler
-_PrevIRQ dd 0 ; Previous IRQ handler
- dd 0
-_IRQ dd 0 ; IRQ we are hooked for
-ptr_IRQStack DUINT 0 ; Place to store old stack offset
-seg_IRQStack dw 0 ; Place to store old stack segment
-_Inside db 0 ; Mutual exclusion flag
- ALIGN 4
- dclb IRQ_STACK ; Space for local stack
-_IRQStack: ; Stack starts at end!
-
-; Check for and reject spurious IRQ 7 signals
-
-__IRQEntry:
- cmp [BYTE cs:ebx+_IRQ],7 ; Spurious IRQs occur only on IRQ 7
- jmp @@ValidIRQ
- push eax
- mov al,1011b ; OCW3: read ISR
- out 20h,al ; (Intel Peripheral Components, 1991,
- in al,20h ; p. 3-188)
- shl al,1 ; Set C = bit 7 (IRQ 7) of ISR register
- pop eax
- jc @@ValidIRQ
- iret ; Return from interrupt
-
-; Save all registers for duration of IRQ handler
-
-@@ValidIRQ:
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
- LOAD_DS ; Load DS register
-
-; Send an EOI to the PIC
-
- mov al,20h ; Send EOI to PIC
- cmp [BYTE ebx+_IRQ],8 ; Clear PIC1 first if IRQ >= 8
- jb @@1
- out 0A0h,al
-@@1: out 20h,al
-
-; Check for mutual exclusion
-
- cmp [BYTE ebx+_Inside],1
- je @@ChainOldHandler
- mov [BYTE ebx+_Inside],1
-
-; Call the C interrupt handler function
-
- mov [ebx+seg_IRQStack],ss ; Switch to local stack
- mov [ebx+ptr_IRQStack],esp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- lea esp,[ebx+_IRQStack]
- sti ; Re-enable interrupts
- push ebx
- call [DWORD ebx+_CHandler]
- pop ebx
- cli
- mov ss,[ebx+seg_IRQStack] ; Restore previous stack
- mov esp,[ebx+ptr_IRQStack]
- or eax,eax
- jz @@ChainOldHandler ; Chain if not handled for shared IRQ
-
-@@Exit: mov [BYTE ebx+_Inside],0
- popad ; Restore all extended registers
- pop es
- pop ds
- pop ebx
- iret ; Return from interrupt
-
-@@ChainOldHandler:
- cmp [DWORD ebx+_PrevIRQ],0
- jz @@Exit
- mov [BYTE ebx+_Inside],0
- mov eax,[DWORD ebx+_PrevIRQ]
- mov ebx,[DWORD ebx+_PrevIRQ+4]
- mov [DWORD _PrevIRQ],eax
- mov [DWORD _PrevIRQ+4],ebx
- popad ; Restore all extended registers
- pop es
- pop ds
- pop ebx
- jmp [cs:_PrevIRQ] ; Chain to previous IRQ handler
-
-cprocend
-cpublic _PM_irqISRTemplateEnd
-endif
-
-;----------------------------------------------------------------------------
-; PM_keyISR - keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the keyboard interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. However we ensure within this routine
-; mutual exclusion to the keyboard handling routine.
-;----------------------------------------------------------------------------
-cprocfar _PM_keyISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- cmp [BYTE KyInside],1 ; Check for mutual exclusion
- je @@Reissued
-
- mov [BYTE KyInside],1
- NEWSTK KyStack ; Switch to local stack
- call [CPTR _PM_keyHandler] ; Call C code
- RESTSTK KyStack ; Restore previous stack
- mov [BYTE KyInside],0
-
-@@Exit: popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-; When the BIOS keyboard handler needs to change the SHIFT status lights
-; on the keyboard, in the process of doing this the keyboard controller
-; re-issues another interrupt, while the current handler is still executing.
-; If we recieve another interrupt while still handling the current one,
-; then simply chain directly to the previous handler.
-;
-; Note that for most DOS extenders, the real mode interrupt handler that we
-; install takes care of this for us.
-
-@@Reissued:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
-endif
- jmp @@Exit
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevkey - Chain to previous key interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous key interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevKey
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
-
-; YIKES! For some strange reason, when execution returns from the
-; previous keyboard handler, interrupts are re-enabled!! Since we expect
-; interrupts to remain off during the duration of our handler, this can
-; cause havoc. However our stack macros always turn off interrupts, so they
-; will be off when we exit this routine. Obviously there is a tiny weeny
-; window when interrupts will be enabled, but there is nothing we can
-; do about this.
-
- SWAPSTK KyStack ; Swap back to previous stack
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
- SWAPSTK KyStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_key15ISR - Int 15h keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; This routine gets called if we have been called to handle the Int 15h
-; keyboard interrupt callout from real mode.
-;
-; Entry: AX - Hardware scan code to process
-; Exit: AX - Hardware scan code to process (0 to ignore)
-;----------------------------------------------------------------------------
-cprocfar _PM_key15ISR
-
- push ds
- push es
- LOAD_DS
- cmp ah,4Fh
- jnz @@NotOurs ; Quit if not keyboard callout
-
- pushad
- cld ; Clear direction flag
- xor ah,ah ; AX := scan code
- NEWSTK Ky15Stack ; Switch to local stack
- push _ax
- call [CPTR _PM_key15Handler] ; Call C code
- _add sp,2,4
- RESTSTK Ky15Stack ; Restore previous stack
- test ax,ax
- jz @@1
- stc ; Set carry to process as normal
- jmp @@2
-@@1: clc ; Clear carry to ignore scan code
-@@2: popad
- jmp @@Exit ; We are done
-
-@@NotOurs:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey15]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey15]
-else
- call [_PM_prevKey15]
-endif
-endif
-@@Exit: pop es
- pop ds
-ifdef flatmodel
- retf 4
-else
- retf 2
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_breakISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-Break interrupt. We simply set
-; the Ctrl-Break flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_breakISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
-ifdef flatmodel
- mov ebx,[_PM_ctrlBPtr]
-else
- les bx,[_PM_ctrlBPtr]
-endif
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,1
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlBreakHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-Break flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlBreakHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
-ifdef flatmodel
- mov ebx,[_PM_ctrlBPtr]
-else
- les bx,[_PM_ctrlBPtr]
-endif
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done: pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_ctrlCISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-C interrupt. We simply set
-; the Ctrl-C flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_ctrlCISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
-ifdef flatmodel
- mov ebx,[_PM_ctrlCPtr]
-else
- les bx,[_PM_ctrlCPtr]
-endif
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,0
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
- iretd
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlCHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-C flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlCHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
-ifdef flatmodel
- mov ebx,[_PM_ctrlCPtr]
-else
- les bx,[_PM_ctrlCPtr]
-endif
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done:
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_criticalISR - Control Error handler interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt handler for the MSDOS Critical Error interrupt, to dispatch
-; control to high level C based subroutines. We save the state of all
-; registers in this routine, and switch to a local stack. We also pass
-; the values of the AX and DI registers to the as pointers, so that the
-; values can be modified before returning to MSDOS.
-;----------------------------------------------------------------------------
-cprocfar _PM_criticalISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx ; Save register values changed
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-ifdef flatmodel
- mov ebx,[_PM_critPtr]
-else
- les bx,[_PM_critPtr]
-endif
- mov [_ES _bx],ax
- mov [_ES _bx+2],di
-
-; Run alternate critical handler code if installed
-
- cmp [CPTR _PM_critHandler],0
- je @@NoAltHandler
-
- pushad
- push _di
- push _ax
- call [CPTR _PM_critHandler] ; Call C code
- _add sp,4,8
- popad
-
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-@@NoAltHandler:
- mov ax,3 ; Tell MSDOS to fail the operation
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_criticalError(int *axVal,int *diVal,int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the critical error flags, and the values that
-; MSDOS passed in the AX and DI registers to our handler.
-;----------------------------------------------------------------------------
-cprocstart PM_criticalError
-
- ARG axVal:DPTR, diVal:DPTR, clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
-ifdef flatmodel
- mov ebx,[_PM_critPtr]
-else
- les bx,[_PM_critPtr]
-endif
- cli ; No interrupts thanks!
- xor _ax,_ax
- xor _di,_di
- mov ax,[_ES _bx]
- mov di,[_ES _bx+2]
- test [BYTE clearFlag],1
- jz @@NoClear
- mov [ULONG _ES _bx],0
-@@NoClear:
- _les _bx,[axVal]
- mov [_ES _bx],_ax
- _les _bx,[diVal]
- mov [_ES _bx],_di
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setMouseHandler(int mask, PM_mouseHandler mh)
-;----------------------------------------------------------------------------
-cprocstart _PM_setMouseHandler
-
- ARG mouseMask:UINT
-
- enter_c
- push es
-
- mov ax,0Ch ; AX := Function 12 - install interrupt sub
- mov _cx,[mouseMask] ; CX := mouse mask
- mov _dx,offset _PM_mouseISR
- push cs
- pop es ; ES:_DX -> mouse handler
- int 33h ; Call mouse driver
-
- pop es
- leave_c
- ret
-
-cprocend
-
-ifdef flatmodel
-
-;----------------------------------------------------------------------------
-; void PM_mousePMCB(void)
-;----------------------------------------------------------------------------
-; Mouse realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:_SI -> Real mode stack at time of call
-; ES:_DI -> Real mode register data structure
-; SS:_SP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_mousePMCB
-
- pushad
- mov eax,[es:_di+1Ch] ; Load register values from real mode
- mov ebx,[es:_di+10h]
- mov ecx,[es:_di+18h]
- mov edx,[es:_di+14h]
- mov esi,[es:_di+04h]
- mov edi,[es:_di]
- call _PM_mouseISR ; Call the mouse handler
- popad
-
- mov ax,[ds:_si]
- mov [es:_di+2Ah],ax ; Plug in return IP address
- mov ax,[ds:_si+2]
- mov [es:_di+2Ch],ax ; Plug in return CS value
- add [WORD es:_di+2Eh],4 ; Remove return address from stack
- iret ; Go back to real mode!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_int10PMCB(void)
-;----------------------------------------------------------------------------
-; int10 realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:ESI -> Real mode stack at time of call
-; ES:EDI -> Real mode register data structure
-; SS:ESP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_int10PMCB
-
- pushad
- push ds
- push es
- push fs
-
- pushfd
- pop eax
- mov [es:edi+20h],ax ; Save return flag status
- mov ax,[ds:esi]
- mov [es:edi+2Ah],ax ; Plug in return IP address
- mov ax,[ds:esi+2]
- mov [es:edi+2Ch],ax ; Plug in return CS value
- add [WORD es:edi+2Eh],4 ; Remove return address from stack
-
-; Call the install int10 handler in protected mode. This function gets called
-; with DS set to the current data selector, and ES:EDI pointing the the
-; real mode DPMI register structure at the time of the interrupt. The
-; handle must be written in assembler to be able to extract the real mode
-; register values from the structure
-
- push es
- pop fs ; FS:EDI -> real mode registers
- LOAD_DS
- NEWSTK Int10Stack ; Switch to local stack
-
- call [_PM_int10Handler]
-
- RESTSTK Int10Stack ; Restore previous stack
- pop fs
- pop es
- pop ds
- popad
- iret ; Go back to real mode!
-
-cprocend
-
-endif
-
-cpublic _PM_pmdosCodeEnd
-
-endcodeseg _pmdos
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/_vflat.asm b/board/MAI/bios_emulator/scitech/src/pm/dos/_vflat.asm
deleted file mode 100644
index 34985a9..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/_vflat.asm
+++ /dev/null
@@ -1,652 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Based on original code Copyright 1994 Otto Chrons
-;*
-;* Language: 80386 Assembler, TASM 4.0 or later
-;* Environment: IBM PC 32 bit protected mode
-;*
-;* Description: Low level page fault handler for virtual linear framebuffers.
-;*
-;****************************************************************************
-
- IDEAL
- JUMPS
-
-include "scitech.mac" ; Memory model macros
-
-header _vflat ; Set up memory model
-
-VFLAT_START EQU 0F0000000h
-VFLAT_END EQU 0F03FFFFFh
-PAGE_PRESENT EQU 1
-PAGE_NOTPRESENT EQU 0
-PAGE_READ EQU 0
-PAGE_WRITE EQU 2
-
-ifdef DOS4GW
-
-;----------------------------------------------------------------------------
-; DOS4G/W flat linear framebuffer emulation.
-;----------------------------------------------------------------------------
-
-begdataseg _vflat
-
-; Near pointers to the page directory base and our page tables. All of
-; this memory is always located in the first Mb of DOS memory.
-
-PDBR dd 0 ; Page directory base register (CR3)
-accessPageAddr dd 0
-accessPageTable dd 0
-
-; CauseWay page directory & 1st page table linear addresses.
-
-CauseWayDIRLinear dd 0
-CauseWay1stLinear dd 0
-
-; Place to store a copy of the original Page Table Directory before we
-; intialised our virtual buffer code.
-
-pageDirectory: resd 1024 ; Saved page table directory
-
-ValidCS dw 0 ; Valid CS for page faults
-Ring0CS dw 0 ; Our ring 0 code selector
-LastPage dd 0 ; Last page we mapped in
-BankFuncBuf: resb 101 ; Place to store bank switch code
-BankFuncPtr dd offset BankFuncBuf
-
-INT14Gate:
-INT14Offset dd 0 ; eip of original vector
-INT14Selector dw 0 ; cs of original vector
-
- cextern _PM_savedDS,USHORT
- cextern VF_haveCauseWay,BOOL
-
-enddataseg _vflat
-
-begcodeseg _vflat ; Start of code segment
-
- cextern VF_malloc,FPTR
-
-;----------------------------------------------------------------------------
-; PF_handler64k - Page fault handler for 64k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler64k
-
-; Check if this is a processor exeception or a page fault
-
- push eax
- mov ax,[cs:ValidCS] ; Use CS override to access data
- cmp [ss:esp+12],ax ; Is this a page fault?
- jne @@ToOldHandler ; Nope, jump to the previous handler
-
-; Get address of page fault and check if within our handlers range
-
- mov eax,cr2 ; EBX has page fault linear address
- cmp eax,VFLAT_START ; Is the fault less than ours?
- jb @@ToOldHandler ; Yep, go to previous handler
- cmp eax,VFLAT_END ; Is the fault more than ours?
- jae @@ToOldHandler ; Yep, go to previous handler
-
-; This is our page fault, so we need to handle it
-
- pushad
- push ds
- push es
- mov ebx,eax ; EBX := page fault address
- and ebx,invert 0FFFFh ; Mask to 64k bank boundary
- mov ds,[cs:_PM_savedDS]; Load segment registers
- mov es,[cs:_PM_savedDS]
-
-; Map in the page table for our virtual framebuffer area for modification
-
- mov edi,[PDBR] ; EDI points to page directory
- mov edx,ebx ; EDX = linear address
- shr edx,22 ; EDX = offset to page directory
- mov edx,[edx*4+edi] ; EDX = physical page table address
- mov eax,edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
-; Mark all pages valid for the new page fault area
-
- mov esi,ebx ; ESI := linear address for page
- shr esi,10
- and esi,0FFFh ; Offset into page table
- add esi,[accessPageAddr]
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0000000001h ; Enable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- or [DWORD esi+off],0000000001h ; Enable pages
-off = off+4
-ENDM
-endif
-
-; Mark all pages invalid for the previously mapped area
-
- xchg esi,[LastPage] ; Save last page for next page fault
- test esi,esi
- jz @@DoneMapping ; Dont update if first time round
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0FFFFFFFEh ; Disable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- and [DWORD esi+off],0FFFFFFFEh ; Disable pages
-off = off+4
-ENDM
-endif
-
-@@DoneMapping:
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
-
-; Now program the new SuperVGA starting bank address
-
- mov eax,ebx ; EAX := page fault address
- shr eax,16
- and eax,0FFh ; Mask to 0-255
- call [BankFuncPtr] ; Call the bank switch function
-
- pop es
- pop ds
- popad
- pop eax
- add esp,4 ; Pop the error code from stack
- iretd ; Return to faulting instruction
-
-@@ToOldHandler:
- pop eax
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PF_handler4k - Page fault handler for 4k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler4k
-
-; Fill in when we have tested all the 64Kb code
-
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallFaultHandler(void *baseAddr,int bankSize)
-;----------------------------------------------------------------------------
-; Installes the page fault handler directly int the interrupt descriptor
-; table for maximum performance. This of course requires ring 0 access,
-; but none of this stuff will run without ring 0!
-;----------------------------------------------------------------------------
-cprocstart InstallFaultHandler
-
- ARG baseAddr:ULONG, bankSize:UINT
-
- enter_c
-
- mov [DWORD LastPage],0 ; No pages have been mapped
- mov ax,cs
- mov [ValidCS],ax ; Save CS value for page faults
-
-; Put address of our page fault handler into the IDT directly
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
-
-; Note that Interrupt gates do not have the high and low word of the
-; offset in adjacent words in memory, there are 4 bytes separating them.
-
- mov ecx,[eax] ; Get cs and low 16 bits of offset
- mov edx,[eax+6] ; Get high 16 bits of offset in dx
- shl edx,16
- mov dx,cx ; edx has offset
- mov [INT14Offset],edx ; Save offset
- shr ecx,16
- mov [INT14Selector],cx ; Save original cs
- mov [eax+2],cs ; Install new cs
- mov edx,offset PF_handler64k
- cmp [UINT bankSize],4
- jne @@1
- mov edx,offset PF_handler4k
-@@1: mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void RemoveFaultHandler(void)
-;----------------------------------------------------------------------------
-; Closes down the virtual framebuffer services and restores the previous
-; page fault handler.
-;----------------------------------------------------------------------------
-cprocstart RemoveFaultHandler
-
- enter_c
-
-; Remove page fault handler from IDT
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
-
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
- mov cx,[INT14Selector]
- mov [eax+2],cx ; Restore original CS
- mov edx,[INT14Offset]
- mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallBankFunc(int codeLen,void *bankFunc)
-;----------------------------------------------------------------------------
-; Installs the bank switch function by relocating it into our data segment
-; and making it into a callable function. We do it this way to make the
-; code identical to the way that the VflatD devices work under Windows.
-;----------------------------------------------------------------------------
-cprocstart InstallBankFunc
-
- ARG codeLen:UINT, bankFunc:DPTR
-
- enter_c
-
- mov esi,[bankFunc] ; Copy the code into buffer
- mov edi,offset BankFuncBuf
- mov ecx,[codeLen]
- rep movsb
- mov [BYTE edi],0C3h ; Terminate the function with a near ret
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int InitPaging(void)
-;----------------------------------------------------------------------------
-; Initializes paging system. If paging is not enabled, builds a page table
-; directory and page tables for physical memory
-;
-; Exit: 0 - Successful
-; -1 - Couldn't initialize paging mechanism
-;----------------------------------------------------------------------------
-cprocstart InitPaging
-
- push ebx
- push ecx
- push edx
- push esi
- push edi
-
-; Are we running under CauseWay?
-
- mov ax,0FFF9h
- int 31h
- jc @@NotCauseway
- cmp ecx,"CAUS"
- jnz @@NotCauseway
- cmp edx,"EWAY"
- jnz @@NotCauseway
-
- mov [BOOL VF_haveCauseWay],1
- mov [CauseWayDIRLinear],esi
- mov [CauseWay1stLinear],edi
-
-; Check for DPMI
-
- mov ax,0ff00h
- push es
- int 31h
- pop es
- shr edi,2
- and edi,3
- cmp edi,2
- jz @@ErrExit ; Not supported under DPMI
-
- mov eax,[CauseWayDIRLinear]
- jmp @@CopyCR3
-
-@@NotCauseway:
- mov ax,cs
- test ax,3 ; Which ring are we running
- jnz @@ErrExit ; Needs zero ring to access
- ; page tables (CR3)
- mov eax,cr0 ; Load CR0
- test eax,80000000h ; Is paging enabled?
- jz @@ErrExit ; No, we must have paging!
-
- mov eax,cr3 ; Load directory address
- and eax,0FFFFF000h
-
-@@CopyCR3:
- mov [PDBR],eax ; Save it
- mov esi,eax
- mov edi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Copy the original page table directory
- cmp [DWORD accessPageAddr],0; Check if we have allocated page
- jne @@HaveRealMem ; table already (we cant free it)
-
- mov eax,0100h ; DPMI DOS allocate
- mov ebx,8192/16
- int 31h ; Allocate 8192 bytes
- and eax,0FFFFh
- shl eax,4 ; EAX points to newly allocated memory
- add eax,4095
- and eax,0FFFFF000h ; Page align
- mov [accessPageAddr],eax
-
-@@HaveRealMem:
- mov eax,[accessPageAddr] ; EAX -> page table in 1st Mb
- shr eax,12
- and eax,3FFh ; Page table offset
- shl eax,2
- cmp [BOOL VF_haveCauseWay],0
- jz @@NotCW0
- mov ebx,[CauseWay1stLinear]
- jmp @@Put1st
-
-@@NotCW0:
- mov ebx,[PDBR]
- mov ebx,[ebx]
- and ebx,0FFFFF000h ; Page table for 1st megabyte
-
-@@Put1st:
- add eax,ebx
- mov [accessPageTable],eax
- sub eax,eax ; No error
- jmp @@Exit
-
-@@ErrExit:
- mov eax,-1
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void ClosePaging(void)
-;----------------------------------------------------------------------------
-; Closes the paging system
-;----------------------------------------------------------------------------
-cprocstart ClosePaging
-
- push eax
- push ecx
- push edx
- push esi
- push edi
-
- mov eax,[accessPageAddr]
- call AccessPage ; Restore AccessPage mapping
- mov edi,[PDBR]
- mov esi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Restore the original page table directory
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long AccessPage(long phys)
-;----------------------------------------------------------------------------
-; Maps a known page to given physical memory
-; Entry: EAX - Physical memory
-; Exit: EAX - Linear memory address of mapped phys mem
-;----------------------------------------------------------------------------
-cprocstatic AccessPage
-
- push edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- mov eax,[accessPageAddr]
- pop edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long GetPhysicalAddress(long linear)
-;----------------------------------------------------------------------------
-; Returns the physical address of linear address
-; Entry: EAX - Linear address to convert
-; Exit: EAX - Physical address
-;----------------------------------------------------------------------------
-cprocstatic GetPhysicalAddress
-
- push ebx
- push edx
- mov edx,eax
- shr edx,22 ; EDX is the directory offset
- mov ebx,[PDBR]
- mov edx,[edx*4+ebx] ; Load page table address
- push eax
- mov eax,edx
- call AccessPage ; Access the page table
- mov edx,eax
- pop eax
- shr eax,12
- and eax,03FFh ; EAX offset into page table
- mov eax,[edx+eax*4] ; Load physical address
- and eax,0FFFFF000h
- pop edx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void CreatePageTable(long pageDEntry)
-;----------------------------------------------------------------------------
-; Creates a page table for specific address (4MB)
-; Entry: EAX - Page directory entry (top 10-bits of address)
-;----------------------------------------------------------------------------
-cprocstatic CreatePageTable
-
- push ebx
- push ecx
- push edx
- push edi
- mov ebx,eax ; Save address
- mov eax,8192
- push eax
- call VF_malloc ; Allocate page table directory
- add esp,4
- add eax,0FFFh
- and eax,0FFFFF000h ; Page align (4KB)
- mov edi,eax ; Save page table linear address
- sub eax,eax ; Fill with zero
- mov ecx,1024
- cld
- rep stosd ; Clear page table
- sub edi,4096
- mov eax,edi
- call GetPhysicalAddress
- mov edx,[PDBR]
- or eax,7 ; Present/write/user bit
- mov [edx+ebx*4],eax ; Save physical address into page directory
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- pop edi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void MapPhysical2Linear(ulong pAddr, ulong lAddr, int pages, int flags);
-;----------------------------------------------------------------------------
-; Maps physical memory into linear memory
-; Entry: pAddr - Physical address
-; lAddr - Linear address
-; pages - Number of 4K pages to map
-; flags - Page flags
-; bit 0 = present
-; bit 1 = Read(0)/Write(1)
-;----------------------------------------------------------------------------
-cprocstart MapPhysical2Linear
-
- ARG pAddr:ULONG, lAddr:ULONG, pages:UINT, pflags:UINT
-
- enter_c
-
- and [ULONG pAddr],0FFFFF000h; Page boundary
- and [ULONG lAddr],0FFFFF000h; Page boundary
- mov ecx,[pflags]
- and ecx,11b ; Just two bits
- or ecx,100b ; Supervisor bit
- mov [pflags],ecx
-
- mov edx,[lAddr]
- shr edx,22 ; EDX = Directory
- mov esi,[PDBR]
- mov edi,[pages] ; EDI page count
- mov ebx,[lAddr]
-
-@@CreateLoop:
- mov ecx,[esi+edx*4] ; Load page table address
- test ecx,1 ; Is it present?
- jnz @@TableOK
- mov eax,edx
- call CreatePageTable ; Create a page table
-@@TableOK:
- mov eax,ebx
- shr eax,12
- and eax,3FFh
- sub eax,1024
- neg eax ; EAX = page count in this table
- inc edx ; Next table
- mov ebx,0 ; Next time we'll map 1K pages
- sub edi,eax ; Subtract mapped pages from page count
- jns @@CreateLoop ; Create more tables if necessary
-
- mov ecx,[pages] ; ECX = Page count
- mov esi,[lAddr]
- shr esi,12 ; Offset part isn't needed
- mov edi,[pAddr]
-@@MappingLoop:
- mov eax,esi
- shr eax,10 ; EAX = offset to page directory
- mov ebx,[PDBR]
- mov eax,[eax*4+ebx] ; EAX = page table address
- call AccessPage
- mov ebx,esi
- and ebx,3FFh ; EBX = offset to page table
- mov edx,edi
- add edi,4096 ; Next physical address
- inc esi ; Next linear page
- or edx,[pflags] ; Update flags...
- mov [eax+ebx*4],edx ; Store page table entry
- loop @@MappingLoop
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _vflat
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/dos/cpuinfo.c
deleted file mode 100644
index ee117c7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/cpuinfo.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: DOS
-*
-* Description: MSDOS specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External timing function */
-
-void __ZTimerInit(void);
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- ulong resolution;
-
- __ZTimerInit();
- ULZTimerResolution(&resolution);
- freq->low = (ulong)(10000000000.0 / resolution);
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = ULZReadTime() * 10000L; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/event.c b/board/MAI/bios_emulator/scitech/src/pm/dos/event.c
deleted file mode 100644
index a969d11..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/event.c
+++ /dev/null
@@ -1,494 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit DOS
-*
-* Description: 32-bit DOS implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*--------------------------- Global variables ----------------------------*/
-
-ibool _VARAPI _EVT_useEvents = true; /* True to use event handling */
-ibool _VARAPI _EVT_installed = 0; /* Event handers installed? */
-uchar _VARAPI *_EVT_biosPtr = NULL; /* Pointer to the BIOS data area */
-static ibool haveMouse = false; /* True if we have a mouse */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* External assembler functions */
-
-void EVTAPI _EVT_pollJoystick(void);
-uint EVTAPI _EVT_disableInt(void);
-uint EVTAPI _EVT_restoreInt(uint flags);
-void EVTAPI _EVT_codeStart(void);
-void EVTAPI _EVT_codeEnd(void);
-void EVTAPI _EVT_cCodeStart(void);
-void EVTAPI _EVT_cCodeEnd(void);
-int EVTAPI _EVT_getKeyCode(void);
-void EVTAPI _EVT_pumpMessages(void);
-int EVTAPI EVT_rdinx(int port,int index);
-void EVTAPI EVT_wrinx(int port,int index,int value);
-
-#ifdef NO_KEYBOARD_INTERRUPT
-/****************************************************************************
-REMARKS:
-This function is used to pump all keyboard messages from the BIOS keyboard
-handler into our event queue. This can be used to avoid using the
-installable keyboard handler if this is causing problems.
-****************************************************************************/
-static void EVTAPI _EVT_pumpMessages(void)
-{
- RMREGS regs;
- uint key,ps;
-
- /* Since the keyboard ISR has not been installed if NO_IDE_BUG has
- * been defined, we first check for any pending keyboard events
- * here, and if there are some insert them into the event queue to
- * be picked up later - what a kludge.
- */
- while ((key = _EVT_getKeyCode()) != 0) {
- ps = _EVT_disableInt();
- addKeyEvent(EVT_KEYDOWN, key);
- _EVT_restoreInt(ps);
- }
-
- regs.x.ax = 0x0B; /* Reset Move Mouse */
- PM_int86(0x33,®s,®s);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- return (ulong)PM_getLong(_EVT_biosPtr+0x6C) * 55UL;
-}
-
-/****************************************************************************
-REMARKS:
-Reboots the machine from DOS (warm boot)
-****************************************************************************/
-static void Reboot(void)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- ushort *rebootType = PM_mapRealPointer(0x40,0x72);
- *rebootType = 0x1234;
- PM_callRealMode(0xFFFF,0x0000,®s,&sregs);
-}
-
-/****************************************************************************
-REMARKS:
-Include generic raw scancode keyboard module.
-****************************************************************************/
-#define SUPPORT_CTRL_ALT_DEL
-#include "common/keyboard.c"
-
-/****************************************************************************
-REMARKS:
-This function fools the DOS mouse driver into thinking that it is running
-in graphics mode, rather than text mode so we always get virtual coordinates
-correctly rather than character coordinates.
-****************************************************************************/
-int _EVT_foolMouse(void)
-{
- int oldmode = PM_getByte(_EVT_biosPtr+0x49);
- PM_setByte(_EVT_biosPtr+0x49,0x10);
- oldmode |= (EVT_rdinx(0x3C4,0x2) << 8);
- return oldmode;
-}
-
-/****************************************************************************
-REMARKS:
-This function unfools the DOS mouse driver after we have finished calling it.
-****************************************************************************/
-void _EVT_unfoolMouse(
- int oldmode)
-{
- PM_setByte(_EVT_biosPtr+0x49,oldmode);
-
- /* Some mouse drivers reset the plane mask register for VGA plane 4
- * modes, which screws up the display on some VGA compatible controllers
- * in SuperVGA modes. We reset the value back again in here to solve
- * the problem.
- */
- EVT_wrinx(0x3C4,0x2,oldmode >> 8);
-}
-
-/****************************************************************************
-REMARKS:
-Determines if we have a mouse attached and functioning.
-****************************************************************************/
-static ibool detectMouse(void)
-{
- RMREGS regs;
- RMSREGS sregs;
- uchar *p;
- ibool retval;
-
- regs.x.ax = 0x3533; /* Get interrupt vector 0x33 */
- PM_int86x(0x21,®s,®s,&sregs);
-
- /* Check that interrupt vector 0x33 is not a zero, and that the first
- * instruction in the interrupt vector is not an IRET instruction
- */
- p = PM_mapRealPointer(sregs.es, regs.x.bx);
- retval = ((sregs.es != 0) || (regs.x.bx != 0)) && (PM_getByte(p) != 207);
- return retval;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message
-x,y - Mouse position at time of event
-but_stat - Mouse button status at time of event
-
-REMARKS:
-Adds a new mouse event to the event queue. This routine is called from within
-the mouse interrupt subroutine, so it must be efficient.
-
-NOTE: Interrupts MUST be OFF while this routine is called to ensure we have
- mutually exclusive access to our internal data structures for
- interrupt driven systems (like under DOS).
-****************************************************************************/
-static void addMouseEvent(
- uint what,
- uint message,
- int x,
- int y,
- int mickeyX,
- int mickeyY,
- uint but_stat)
-{
- event_t evt;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record. */
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message;
- evt.modifiers = but_stat;
- evt.where_x = x; /* Save mouse event position */
- evt.where_y = y;
- evt.relative_x = mickeyX;
- evt.relative_y = mickeyY;
- evt.modifiers |= EVT.keyModifiers;
- addEvent(&evt); /* Add to tail of event queue */
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-mask - Event mask
-butstate - Button state
-x - Mouse x coordinate
-y - Mouse y coordinate
-
-REMARKS:
-Mouse event handling routine. This gets called when a mouse event occurs,
-and we call the addMouseEvent() routine to add the appropriate mouse event
-to the event queue.
-
-Note: Interrupts are ON when this routine is called by the mouse driver code.
-****************************************************************************/
-static void EVTAPI mouseISR(
- uint mask,
- uint butstate,
- int x,
- int y,
- int mickeyX,
- int mickeyY)
-{
- uint ps;
- uint buttonMask;
-
- if (mask & 1) {
- /* Save the current mouse coordinates */
- EVT.mx = x; EVT.my = y;
-
- /* If the last event was a movement event, then modify the last
- * event rather than post a new one, so that the queue will not
- * become saturated. Before we modify the data structures, we
- * MUST ensure that interrupts are off.
- */
- ps = _EVT_disableInt();
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = y;
- EVT.evtq[EVT.oldMove].relative_x += mickeyX;
- EVT.evtq[EVT.oldMove].relative_y += mickeyY;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
- addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate);
- }
- _EVT_restoreInt(ps);
- }
- if (mask & 0x2A) {
- ps = _EVT_disableInt();
- buttonMask = 0;
- if (mask & 2) buttonMask |= EVT_LEFTBMASK;
- if (mask & 8) buttonMask |= EVT_RIGHTBMASK;
- if (mask & 32) buttonMask |= EVT_MIDDLEBMASK;
- addMouseEvent(EVT_MOUSEDOWN,buttonMask,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- if (mask & 0x54) {
- ps = _EVT_disableInt();
- buttonMask = 0;
- if (mask & 2) buttonMask |= EVT_LEFTBMASK;
- if (mask & 8) buttonMask |= EVT_RIGHTBMASK;
- if (mask & 32) buttonMask |= EVT_MIDDLEBMASK;
- addMouseEvent(EVT_MOUSEUP,buttonMask,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- EVT.oldKey = -1;
-}
-
-/****************************************************************************
-REMARKS:
-Keyboard interrupt handler function.
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time.
-****************************************************************************/
-static void EVTAPI keyboardISR(void)
-{
- processRawScanCode(PM_inpb(0x60));
- PM_outpb(0x20,0x20);
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
-
- PM_init();
- EVT.mouseMove = mouseMove;
- _EVT_biosPtr = PM_getBIOSPointer();
- EVT_resume();
-
- /* Grab all characters pending in the keyboard buffer and stuff
- * them into our event buffer. This allows us to pick up any keypresses
- * while the program is initialising.
- */
- while ((i = _EVT_getKeyCode()) != 0)
- addKeyEvent(EVT_KEYDOWN,i);
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVTAPI EVT_resume(void)
-{
- static int locked = 0;
- int stat;
- uchar mods;
- PM_lockHandle lh; /* Unused in DOS */
-
- if (_EVT_useEvents) {
- /* Initialise the event queue and enable our interrupt handlers */
- initEventQueue();
-#ifndef NO_KEYBOARD_INTERRUPT
- PM_setKeyHandler(keyboardISR);
-#endif
-#ifndef NO_MOUSE_INTERRUPT
- if ((haveMouse = detectMouse()) != 0) {
- int oldmode = _EVT_foolMouse();
- PM_setMouseHandler(0xFFFF,mouseISR);
- _EVT_unfoolMouse(oldmode);
- }
-#endif
-
- /* Read the keyboard modifier flags from the BIOS to get the
- * correct initialisation state. The only state we care about is
- * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and
- * CAPSLOCK.
- */
- EVT.keyModifiers = 0;
- mods = PM_getByte(_EVT_biosPtr+0x17);
- if (mods & 0x10)
- EVT.keyModifiers |= EVT_SCROLLLOCK;
- if (mods & 0x20)
- EVT.keyModifiers |= EVT_NUMLOCK;
- if (mods & 0x40)
- EVT.keyModifiers |= EVT_CAPSLOCK;
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- /* It is difficult to ensure that we lock our global data, so we
- * do this by taking the address of a variable locking all data
- * 2Kb on either side. This should properly cover the global data
- * used by the module (the other alternative is to declare the
- * variables in assembler, in which case we know it will be
- * correct).
- */
- stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh);
- stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh);
- if (stat) {
- PM_fatalError("Page locking services failed - interrupt handling not safe!");
- exit(1);
- }
- locked = 1;
- }
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
- _EVT_installed = true;
- }
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- RMREGS regs;
-
- if (haveMouse) {
- int oldmode = _EVT_foolMouse();
- PM_resetMouseDriver(1);
- regs.x.ax = 7; /* Mouse function 7 - Set horizontal min and max */
- regs.x.cx = 0;
- regs.x.dx = xRes;
- PM_int86(0x33,®s,®s);
- regs.x.ax = 8; /* Mouse function 8 - Set vertical min and max */
- regs.x.cx = 0;
- regs.x.dx = yRes;
- PM_int86(0x33,®s,®s);
- _EVT_unfoolMouse(oldmode);
- }
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- RMREGS regs;
-
- if (haveMouse) {
- int oldmode = _EVT_foolMouse();
- regs.x.ax = 4; /* Mouse function 4 - Set mouse position */
- regs.x.cx = *x; /* New horizontal coordinate */
- regs.x.dx = *y; /* New vertical coordinate */
- PM_int86(0x33,®s,®s);
- _EVT_unfoolMouse(oldmode);
- }
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVTAPI EVT_suspend(void)
-{
- uchar mods;
-
- if (_EVT_installed) {
- /* Restore the interrupt handlers */
- PM_restoreKeyHandler();
- if (haveMouse)
- PM_restoreMouseHandler();
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* Set the keyboard modifier flags in the BIOS to our values */
- EVT_allowLEDS(true);
- mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70;
- if (EVT.keyModifiers & EVT_SCROLLLOCK)
- mods |= 0x10;
- if (EVT.keyModifiers & EVT_NUMLOCK)
- mods |= 0x20;
- if (EVT.keyModifiers & EVT_CAPSLOCK)
- mods |= 0x40;
- PM_setByte(_EVT_biosPtr+0x17,mods);
-
- /* Flag that we are no longer installed */
- _EVT_installed = false;
- }
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVTAPI EVT_exit(void)
-{
- EVT_suspend();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/dos/oshdr.h
deleted file mode 100644
index 35e8e00..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit DOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c b/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c
deleted file mode 100644
index 2ad9e34..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c
+++ /dev/null
@@ -1,2243 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 16/32 bit DOS
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "ztimerc.h"
-#include "mtrr.h"
-#include "pm_help.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-#include <conio.h>
-#ifdef __GNUC__
-#include <unistd.h>
-#include <sys/nearptr.h>
-#include <sys/stat.h>
-#else
-#include <direct.h>
-#endif
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-typedef struct {
- int oldMode;
- int old50Lines;
- } DOS_stateBuf;
-
-#define MAX_RM_BLOCKS 10
-
-static struct {
- void *p;
- uint tag;
- } rmBlocks[MAX_RM_BLOCKS];
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-ushort _VARAPI _PM_savedDS = 0;
-#ifdef DOS4GW
-static ulong PDB = 0,*pPDB = NULL;
-#endif
-#ifndef REALMODE
-static char VXD_name[] = PMHELP_NAME;
-static char VXD_module[] = PMHELP_MODULE;
-static char VXD_DDBName[] = PMHELP_DDBNAME;
-static uint VXD_version = -1;
-static uint VXD_loadOff = 0;
-static uint VXD_loadSel = 0;
-uint _VARAPI _PM_VXD_off = 0;
-uint _VARAPI _PM_VXD_sel = 0;
-int _VARAPI _PM_haveCauseWay = -1;
-
-/* Memory mapping cache */
-
-#define MAX_MEMORY_MAPPINGS 100
-typedef struct {
- ulong physical;
- ulong linear;
- ulong limit;
- } mmapping;
-static mmapping maps[MAX_MEMORY_MAPPINGS] = {0};
-static int numMaps = 0;
-
-/* Page sized block cache */
-
-#define PAGES_PER_BLOCK 100
-#define FREELIST_NEXT(p) (*(void**)(p))
-typedef struct pageblock {
- struct pageblock *next;
- struct pageblock *prev;
- void *freeListStart;
- void *freeList;
- void *freeListEnd;
- int freeCount;
- } pageblock;
-static pageblock *pageBlocks = NULL;
-#endif
-
-/* Start of all page tables in CauseWay */
-
-#define CW_PAGE_TABLE_START (1024UL*4096UL*1023UL)
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler functions */
-
-ulong _ASMAPI _PM_getPDB(void);
-int _ASMAPI _PM_pagingEnabled(void);
-void _ASMAPI _PM_VxDCall(VXD_regs *regs,uint off,uint sel);
-
-#ifndef REALMODE
-/****************************************************************************
-REMARKS:
-Exit function to unload the dynamically loaded VxD
-****************************************************************************/
-static void UnloadVxD(void)
-{
- PMSREGS sregs;
- VXD_regs r;
-
- r.eax = 2;
- r.ebx = 0;
- r.edx = (uint)VXD_module;
- PM_segread(&sregs);
-#ifdef __16BIT__
- r.ds = ((ulong)VXD_module) >> 16;
-#else
- r.ds = sregs.ds;
-#endif
- r.es = sregs.es;
- _PM_VxDCall(&r,VXD_loadOff,VXD_loadSel);
-}
-
-/****************************************************************************
-REMARKS:
-External function to call the PMHELP helper VxD.
-****************************************************************************/
-void PMAPI PM_VxDCall(
- VXD_regs *regs)
-{
- if (_PM_VXD_sel != 0 || _PM_VXD_off != 0)
- _PM_VxDCall(regs,_PM_VXD_off,_PM_VXD_sel);
-}
-
-/****************************************************************************
-RETURNS:
-BCD coded version number of the VxD, or 0 if not loaded (ie: 0x202 - 2.2)
-
-REMARKS:
-This function gets the version number for the VxD that we have connected to.
-****************************************************************************/
-uint PMAPI PMHELP_getVersion(void)
-{
- VXD_regs r;
-
- /* Call the helper VxD to determine the version number */
- if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) {
- memset(&r,0,sizeof(r));
- r.eax = API_NUM(PMHELP_GETVER);
- _PM_VxDCall(&r,_PM_VXD_off,_PM_VXD_sel);
- return VXD_version = (uint)r.eax;
- }
- return VXD_version = 0;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Connects to the helper VxD and returns the version number
-
-RETURNS:
-True if the VxD was found and loaded, false otherwise.
-
-REMARKS:
-This function connects to the VxD (loading it if it is dynamically loadable)
-and returns the version number of the VxD.
-****************************************************************************/
-static ibool PMHELP_connect(void)
-{
- PMREGS regs;
- PMSREGS sregs;
- VXD_regs r;
-
- /* Bail early if we have alread connected */
- if (VXD_version != -1)
- return VXD_version != 0;
-
- /* Get the static SDDHELP.VXD entry point if available */
- PM_segread(&sregs);
- regs.x.ax = 0x1684;
- regs.x.bx = SDDHELP_DeviceID;
- regs.x.di = 0;
- sregs.es = 0;
- PM_int386x(0x2F,®s,®s,&sregs);
- _PM_VXD_sel = sregs.es;
- _PM_VXD_off = regs.x.di;
- if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) {
- if (PMHELP_getVersion() >= PMHELP_VERSION)
- return true;
- }
-
- /* If we get here, then either SDDHELP.VXD is not loaded, or it is an
- * earlier version. In this case try to dynamically load the PMHELP.VXD
- * helper VxD instead.
- */
- PM_segread(&sregs);
- regs.x.ax = 0x1684;
- regs.x.bx = VXDLDR_DeviceID;
- regs.x.di = 0;
- sregs.es = 0;
- PM_int386x(0x2F,®s,®s,&sregs);
- VXD_loadSel = sregs.es;
- VXD_loadOff = regs.x.di;
- if (VXD_loadSel == 0 && VXD_loadOff == 0)
- return VXD_version = 0;
- r.eax = 1;
- r.ebx = 0;
- r.edx = (uint)VXD_name;
- PM_segread(&sregs);
- r.ds = sregs.ds;
- r.es = sregs.es;
- _PM_VxDCall(&r,VXD_loadOff,VXD_loadSel);
- if (r.eax != 0)
- return VXD_version = 0;
-
- /* Get the dynamic VxD entry point so we can call it */
- atexit(UnloadVxD);
- PM_segread(&sregs);
- regs.x.ax = 0x1684;
- regs.x.bx = 0;
- regs.e.edi = (uint)VXD_DDBName;
- PM_int386x(0x2F,®s,®s,&sregs);
- _PM_VXD_sel = sregs.es;
- _PM_VXD_off = regs.x.di;
- if (_PM_VXD_sel == 0 && _PM_VXD_off == 0)
- return VXD_version = 0;
- if (PMHELP_getVersion() >= PMHELP_VERSION)
- return true;
- return VXD_version = 0;
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library. First we try to connect to a static SDDHELP.VXD
-helper VxD, and check that it is a version we can use. If not we try to
-dynamically load the PMHELP.VXD helper VxD
-****************************************************************************/
-void PMAPI PM_init(void)
-{
-#ifndef REALMODE
- PMREGS regs;
-
- /* Check if we are running under CauseWay under real DOS */
- if (_PM_haveCauseWay == -1) {
- /* Check if we are running under DPMI in which case we will not be
- * able to use our special ring 0 CauseWay functions.
- */
- _PM_haveCauseWay = false;
- regs.x.ax = 0xFF00;
- PM_int386(0x31,®s,®s);
- if (regs.x.cflag || !(regs.e.edi & 8)) {
- /* We are not under DPMI, so now check if CauseWay is active */
- regs.x.ax = 0xFFF9;
- PM_int386(0x31,®s,®s);
- if (!regs.x.cflag && regs.e.ecx == 0x43415553 && regs.e.edx == 0x45574159)
- _PM_haveCauseWay = true;
- }
-
- /* Now connect to PMHELP.VXD and initialise MTRR module */
- if (!PMHELP_connect())
- MTRR_init();
- }
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
-#ifndef REALMODE
- VXD_regs regs;
-
- if (PMHELP_connect()) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_ENABLELFBCOMB);
- regs.ebx = base;
- regs.ecx = size;
- regs.edx = type;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return regs.eax;
- }
- return MTRR_enableWriteCombine(base,size,type);
-#else
- return PM_MTRR_NOT_SUPPORTED;
-#endif
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return true; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_DOS; }
-
-int PMAPI PM_getModeType(void)
-{
-#if defined(REALMODE)
- return PM_realMode;
-#elif defined(PM286)
- return PM_286;
-#elif defined(PM386)
- return PM_386;
-#endif
-}
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return PM_int386x(intno,in,out,&sregs);
-}
-
-/* Routines to set and get the real mode interrupt vectors, by making
- * direct real mode calls to DOS and bypassing the DOS extenders API.
- * This is the safest way to handle this, as some servers try to be
- * smart about changing real mode vectors.
- */
-
-void PMAPI _PM_getRMvect(int intno, long *realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x35;
- regs.h.al = intno;
- PM_int86x(0x21, ®s, ®s, &sregs);
- *realisr = ((long)sregs.es << 16) | regs.x.bx;
-}
-
-void PMAPI _PM_setRMvect(int intno, long realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = (int)(realisr >> 16);
- regs.x.dx = (int)(realisr & 0xFFFF);
- PM_int86x(0x21, ®s, ®s, &sregs);
-}
-
-void PMAPI _PM_addRealModeBlock(void *mem,uint tag)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == NULL) {
- rmBlocks[i].p = mem;
- rmBlocks[i].tag = tag;
- return;
- }
- }
- PM_fatalError("To many real mode memory block allocations!");
-}
-
-uint PMAPI _PM_findRealModeBlock(void *mem)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == mem)
- return rmBlocks[i].tag;
- }
- PM_fatalError("Could not find prior real mode memory block allocation!");
- return 0;
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return 'C'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return "c:\\"; }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
- char *env;
-
- if ((env = getenv("NUCLEUS_PATH")) != NULL)
- return env;
- if ((env = getenv("WINBOOTDIR")) != NULL) {
- /* Running in a Windows 9x DOS box or DOS mode */
- strcpy(path,env);
- strcat(path,"\\system\\nucleus");
- return path;
- }
- if ((env = getenv("SystemRoot")) != NULL) {
- /* Running in an NT/2K DOS box */
- strcpy(path,env);
- strcat(path,"\\system32\\nucleus");
- return path;
- }
- return "c:\\nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return "DOS"; }
-
-const char * PMAPI PM_getMachineName(void)
-{ return "DOS"; }
-
-int PMAPI PM_kbhit(void)
-{
- return kbhit();
-}
-
-int PMAPI PM_getch(void)
-{
- return getch();
-}
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen)
-{
- /* Not used for DOS */
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return 0;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- return sizeof(DOS_stateBuf);
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- DOS_stateBuf *sb = stateBuf;
-
- /* Save the old video mode state */
- regs.h.ah = 0x0F;
- PM_int86(0x10,®s,®s);
- sb->oldMode = regs.h.al & 0x7F;
- sb->old50Lines = false;
- if (sb->oldMode == 0x3) {
- regs.x.ax = 0x1130;
- regs.x.bx = 0;
- regs.x.dx = 0;
- PM_int86(0x10,®s,®s);
- sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* Not used for DOS */
- (void)saveState;
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- const DOS_stateBuf *sb = stateBuf;
-
- /* Retore 50 line mode if set */
- if (sb->old50Lines) {
- regs.x.ax = 0x1112;
- regs.x.bx = 0;
- PM_int86(0x10,®s,®s);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
- /* Not used for DOS */
- (void)hwndConsole;
-}
-
-void PMAPI PM_setOSCursorLocation(int x,int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PMAPI PM_setOSScreenWidth(int width,int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setWord(_biosPtr+0x4A,width);
- PM_setWord(_biosPtr+0x4C,width*2);
- PM_setByte(_biosPtr+0x84,height-1);
- if (height > 25) {
- PM_setWord(_biosPtr+0x60,0x0607);
- PM_setByte(_biosPtr+0x85,0x08);
- }
- else {
- PM_setWord(_biosPtr+0x60,0x0D0E);
- PM_setByte(_biosPtr+0x85,0x016);
- }
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-#define GetRMVect(intno,isr) *(isr) = ((ulong*)rmZeroPtr)[intno]
-#define SetRMVect(intno,isr) ((ulong*)rmZeroPtr)[intno] = (isr)
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- static int firstTime = true;
- static uchar *rmZeroPtr;
- long Current10,Current6D,Current42;
- RMREGS regs;
- RMSREGS sregs;
-
- /* Create a zero memory mapping for us to use */
- if (firstTime) {
- rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true);
- firstTime = false;
- }
-
- /* Remap the secondary BIOS to 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L || BIOSLen > 32768) {
- /* DOS cannot virtually remap the BIOS, so we can only work if all
- * the secondary controllers are identical, and we then use the
- * BIOS on the first controller for all the remaining controllers.
- *
- * For OS'es that do virtual memory, and remapping of 0xC0000
- * physical (perhaps a copy on write mapping) should be all that
- * is needed.
- */
- return false;
- }
-
- /* Save current handlers of int 10h and 6Dh */
- GetRMVect(0x10,&Current10);
- GetRMVect(0x6D,&Current6D);
-
- /* POST the secondary BIOS */
- GetRMVect(0x42,&Current42);
- SetRMVect(0x10,Current42); /* Restore int 10h to STD-BIOS */
- regs.x.ax = axVal;
- PM_callRealMode(0xC000,0x0003,®s,&sregs);
-
- /* Restore current handlers */
- SetRMVect(0x10,Current10);
- SetRMVect(0x6D,Current6D);
-
- /* Second the primary BIOS mappin 1:1 for 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L) {
- /* DOS does not support this */
- (void)mappedBIOS;
- }
- return true;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- ulong microseconds = milliseconds * 1000L;
- LZTimerObject tm;
-
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microseconds)
- ;
- LZTimerOffExt(&tm);
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- return level;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- struct find_t *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->attrib & _A_RDONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->attrib & _A_SUBDIR)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->attrib & _A_ARCH)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->attrib & _A_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->attrib & _A_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->size;
- strncpy(findData->name,blk->name,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-#define FIND_MASK (_A_RDONLY | _A_ARCH | _A_SUBDIR | _A_HIDDEN | _A_SYSTEM)
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void * PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- struct find_t *blk;
-
- if ((blk = PM_malloc(sizeof(*blk))) == NULL)
- return PM_FILE_INVALID;
- if (_dos_findfirst((char*)filename,FIND_MASK,blk) == 0) {
- convertFindData(findData,blk);
- return blk;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- struct find_t *blk = handle;
-
- if (_dos_findnext(blk) == 0) {
- convertFindData(findData,blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- PM_free(handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- RMREGS regs;
- regs.h.dl = (uchar)(drive - 'A' + 1);
- regs.h.ah = 0x36; /* Get disk information service */
- PM_int86(0x21,®s,®s);
- return regs.x.ax != 0xFFFF; /* AX = 0xFFFF if disk is invalid */
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- uint oldDrive,maxDrives;
- _dos_getdrive(&oldDrive);
- _dos_setdrive(drive,&maxDrives);
- getcwd(dir,len);
- _dos_setdrive(oldDrive,&maxDrives);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
-#if defined(TNT) && defined(_MSC_VER)
- DWORD attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= FILE_ATTRIBUTE_SYSTEM;
- SetFileAttributes((LPSTR)filename, attr);
-#else
- uint attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= _A_RDONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= _A_ARCH;
- if (attrib & PM_FILE_HIDDEN)
- attr |= _A_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= _A_SYSTEM;
- _dos_setfileattr(filename,attr);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
-#ifdef __GNUC__
- return mkdir(filename,S_IRUSR) == 0;
-#else
- return mkdir(filename) == 0;
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
-
-/*-------------------------------------------------------------------------*/
-/* Generic DPMI routines common to 16/32 bit code */
-/*-------------------------------------------------------------------------*/
-
-#ifndef REALMODE
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit)
-{
- PMREGS r;
- int i;
- ulong baseAddr,baseOfs,roundedLimit;
-
- /* We can't map memory below 1Mb, but the linear address are already
- * mapped 1:1 for this memory anyway so we just return the base address.
- */
- if (physAddr < 0x100000L)
- return physAddr;
-
- /* Search table of existing mappings to see if we have already mapped
- * a region of memory that will serve this purpose. We do this because
- * DPMI 0.9 does not allow us to free physical memory mappings, and if
- * the mappings get re-used in the program we want to avoid allocating
- * more mappings than necessary.
- */
- for (i = 0; i < numMaps; i++) {
- if (maps[i].physical == physAddr && maps[i].limit == limit)
- return maps[i].linear;
- }
-
- /* Find a free slot in our physical memory mapping table */
- for (i = 0; i < numMaps; i++) {
- if (maps[i].limit == 0)
- break;
- }
- if (i == numMaps) {
- i = numMaps++;
- if (i == MAX_MEMORY_MAPPINGS)
- return NULL;
- }
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to DPMI as some extenders
- * will fail the calls unless this is the case. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = physAddr & 4095;
- baseAddr = physAddr & ~4095;
- roundedLimit = ((limit+baseOfs+1+4095) & ~4095)-1;
- r.x.ax = 0x800;
- r.x.bx = baseAddr >> 16;
- r.x.cx = baseAddr & 0xFFFF;
- r.x.si = roundedLimit >> 16;
- r.x.di = roundedLimit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0xFFFFFFFFUL;
- maps[i].physical = physAddr;
- maps[i].limit = limit;
- maps[i].linear = ((ulong)r.x.bx << 16) + r.x.cx + baseOfs;
- return maps[i].linear;
-}
-
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr)
-{
- PMREGS r;
-
- r.x.ax = 7; /* DPMI set selector base address */
- r.x.bx = sel;
- r.x.cx = linAddr >> 16;
- r.x.dx = linAddr & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-ulong PMAPI DPMI_getSelectorBase(ushort sel)
-{
- PMREGS r;
-
- r.x.ax = 6; /* DPMI get selector base address */
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
- return ((ulong)r.x.cx << 16) + r.x.dx;
-}
-
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit)
-{
- PMREGS r;
-
- r.x.ax = 8; /* DPMI set selector limit */
- r.x.bx = sel;
- r.x.cx = limit >> 16;
- r.x.dx = limit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-uint PMAPI DPMI_createSelector(ulong base,ulong limit)
-{
- uint sel;
- PMREGS r;
-
- /* Allocate 1 descriptor */
- r.x.ax = 0;
- r.x.cx = 1;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag) return 0;
- sel = r.x.ax;
-
- /* Set the descriptor access rights (for a 32 bit page granular
- * segment).
- */
- if (limit >= 0x10000L) {
- r.x.ax = 9;
- r.x.bx = sel;
- r.x.cx = 0x40F3;
- PM_int386(0x31, &r, &r);
- }
-
- /* Map physical memory and create selector */
- if ((base = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFFUL)
- return 0;
- if (!DPMI_setSelectorBase(sel,base))
- return 0;
- if (!DPMI_setSelectorLimit(sel,limit))
- return 0;
- return sel;
-}
-
-void PMAPI DPMI_freeSelector(uint sel)
-{
- PMREGS r;
-
- r.x.ax = 1;
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
-}
-
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x600; /* DPMI Lock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x601; /* DPMI Unlock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-/****************************************************************************
-REMARKS:
-Adjust the page table caching bits directly. Requires ring 0 access and
-only works with DOS4GW and compatible extenders (CauseWay also works since
-it has direct support for the ring 0 instructions we need from ring 3). Will
-not work in a DOS box, but we call into the ring 0 helper VxD so we should
-never get here in a DOS box anyway (assuming the VxD is present). If we
-do get here and we are in windows, this code will be skipped.
-****************************************************************************/
-static void PM_adjustPageTables(
- ulong linear,
- ulong limit,
- ibool isCached)
-{
-#ifdef DOS4GW
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong andMask,orMask,pageTable,*pPageTable;
-
- andMask = ~0x18;
- orMask = (isCached) ? 0x00 : 0x18;
- if (_PM_pagingEnabled() == 1 && (PDB = _PM_getPDB()) != 0) {
- if (_PM_haveCauseWay) {
- /* CauseWay is a little different in the page table handling.
- * The code that we use for DOS4G/W does not appear to work
- * with CauseWay correctly as it does not appear to allow us
- * to map the page tables directly. Instead we can directly
- * access the page table entries in extended memory where
- * CauseWay always locates them (starting at 1024*4096*1023)
- */
- startPage = (linear >> 12);
- endPage = ((linear+limit) >> 12);
- pPageTable = (ulong*)CW_PAGE_TABLE_START;
- for (iPage = startPage; iPage <= endPage; iPage++)
- pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask;
- }
- else {
- pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF);
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFF;
- pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask;
- }
- }
- }
- PM_flushTLB();
- }
-#endif
-}
-
-void * PMAPI DPMI_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- PMSREGS sregs;
- ulong linAddr;
- ulong DSBaseAddr;
-
- /* Get the base address for the default DS selector */
- PM_segread(&sregs);
- DSBaseAddr = DPMI_getSelectorBase(sregs.ds);
- if ((base < 0x100000) && (DSBaseAddr == 0)) {
- /* DS is zero based, so we can directly access the first 1Mb of
- * system memory (like under DOS4GW).
- */
- return (void*)base;
- }
-
- /* Map the memory to a linear address using DPMI function 0x800 */
- if ((linAddr = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFF) {
- if (base >= 0x100000)
- return NULL;
- /* If the linear address mapping fails but we are trying to
- * map an area in the first 1Mb of system memory, then we must
- * be running under a Windows or OS/2 DOS box. Under these
- * environments we can use the segment wrap around as a fallback
- * measure, as this does work properly.
- */
- linAddr = base;
- }
-
- /* Now expand the default DS selector to 4Gb so we can access it */
- if (!DPMI_setSelectorLimit(sregs.ds,0xFFFFFFFFUL))
- return NULL;
-
- /* Finally enable caching for the page tables that we just mapped in,
- * since DOS4GW and PMODE/W create the page table entries without
- * caching enabled which hurts the performance of the linear framebuffer
- * as it disables write combining on Pentium Pro and above processors.
- *
- * For those processors cache disabling is better handled through the
- * MTRR registers anyway (we can write combine a region but disable
- * caching) so that MMIO register regions do not screw up.
- */
- if (DSBaseAddr == 0)
- PM_adjustPageTables(linAddr,limit,isCached);
-
- /* Now return the base address of the memory into the default DS */
- return (void*)(linAddr - DSBaseAddr);
-}
-
-#if defined(PM386)
-
-/* Some DOS extender implementations do not directly support calling a
- * real mode procedure from protected mode. However we can simulate what
- * we need temporarily hooking the INT 6Ah vector with a small real mode
- * stub that will call our real mode code for us.
- */
-
-static uchar int6AHandler[] = {
- 0x00,0x00,0x00,0x00, /* __PMODE_callReal variable */
- 0xFB, /* sti */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PMODE_callReal] */
- 0xCF, /* iretf */
- };
-static uchar *crPtr = NULL; /* Pointer to of int 6A handler */
-static uint crRSeg,crROff; /* Real mode seg:offset of handler */
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- uchar *p;
- uint oldSeg,oldOff;
-
- if (!crPtr) {
- /* Allocate and copy the memory block only once */
- crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff);
- memcpy(crPtr,int6AHandler,sizeof(int6AHandler));
- }
- PM_setWord(crPtr,off); /* Plug in address to call */
- PM_setWord(crPtr+2,seg);
- p = PM_mapRealPointer(0,0x6A * 4);
- oldOff = PM_getWord(p); /* Save old handler address */
- oldSeg = PM_getWord(p+2);
- PM_setWord(p,crROff+4); /* Hook 6A handler */
- PM_setWord(p+2,crRSeg);
- PM_int86x(0x6A, in, in, sregs); /* Call real mode code */
- PM_setWord(p,oldOff); /* Restore old handler */
- PM_setWord(p+2,oldSeg);
-}
-
-#endif /* PM386 */
-
-#endif /* !REALMODE */
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked, physically contiguous memory. The memory
-may be required to be below the 16Meg boundary.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16Meg)
-{
- uchar *p,*roundedP;
- uint r_seg,r_off;
- uint roundedSize = (size + 4 + 0xFFF) & ~0xFFF;
- PM_lockHandle lh; /* Unused in DOS */
-#ifndef REALMODE
- VXD_regs regs;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use the
- * helper VxD services to allocate the memory that we need.
- */
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_ALLOCLOCKED);
- regs.ebx = size;
- regs.ecx = (ulong)physAddr;
- regs.edx = contiguous | (below16Meg << 8);
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- /* If the memory is not contiguous, we simply need to allocate it
- * using regular memory allocation services, and lock it down
- * in memory.
- *
- * For contiguous memory blocks, the only way to guarantee contiguous physical
- * memory addresses under DOS is to allocate the memory below the
- * 1Meg boundary as real mode memory.
- *
- * Note that we must page align the memory block, and we also must
- * keep track of the non-aligned pointer so we can properly free
- * it later. Hence we actually allocate 4 bytes more than the
- * size rounded up to the next 4K boundary.
- */
- if (!contiguous)
- p = PM_malloc(roundedSize);
- else
-#endif
- p = PM_allocRealSeg(roundedSize,&r_seg,&r_off);
- if (p == NULL)
- return NULL;
- roundedP = (void*)(((ulong)p + 0xFFF) & ~0xFFF);
- *((ulong*)(roundedP + size)) = (ulong)p;
- PM_lockDataPages(roundedP,size,&lh);
- if ((*physAddr = PM_getPhysicalAddr(roundedP)) == 0xFFFFFFFF) {
- PM_freeLockedMem(roundedP,size,contiguous);
- return NULL;
- }
-
- /* Disable caching for the memory since it is probably a DMA buffer */
-#ifndef REALMODE
- PM_adjustPageTables((ulong)roundedP,size-1,false);
-#endif
- return roundedP;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
-#ifndef REALMODE
- VXD_regs regs;
- PM_lockHandle lh; /* Unused in DOS */
-
- if (!p)
- return;
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_FREELOCKED);
- regs.ebx = (ulong)p;
- regs.ecx = size;
- regs.edx = contiguous;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return;
- }
- PM_unlockDataPages(p,size,&lh);
- if (!contiguous)
- free(*((void**)((uchar*)p + size)));
- else
-#endif
- PM_freeRealSeg(*((void**)((char*)p + size)));
-}
-
-#ifndef REALMODE
-/****************************************************************************
-REMARKS:
-Allocates a new block of pages for the page block manager.
-****************************************************************************/
-static pageblock *PM_addNewPageBlock(void)
-{
- int i,size;
- pageblock *newBlock;
- char *p,*next;
-
- /* Allocate memory for the new page block, and add to head of list */
- size = PAGES_PER_BLOCK * PM_PAGE_SIZE + (PM_PAGE_SIZE-1) + sizeof(pageblock);
- if ((newBlock = PM_malloc(size)) == NULL)
- return NULL;
- newBlock->prev = NULL;
- newBlock->next = pageBlocks;
- if (pageBlocks)
- pageBlocks->prev = newBlock;
- pageBlocks = newBlock;
-
- /* Initialise the page aligned free list for the page block */
- newBlock->freeCount = PAGES_PER_BLOCK;
- newBlock->freeList = p = (char*)(((ulong)(newBlock + 1) + (PM_PAGE_SIZE-1)) & ~(PM_PAGE_SIZE-1));
- newBlock->freeListStart = newBlock->freeList;
- newBlock->freeListEnd = p + (PAGES_PER_BLOCK-1) * PM_PAGE_SIZE;
- for (i = 0; i < PAGES_PER_BLOCK; i++,p = next)
- FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE;
- FREELIST_NEXT(p - PM_PAGE_SIZE) = NULL;
- return newBlock;
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
-#ifndef REALMODE
- VXD_regs regs;
- pageblock *block;
- void *p;
- PM_lockHandle lh; /* Unused in DOS */
-
- /* Call the helper VxD for this service if we are running in a DOS box */
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_ALLOCPAGE);
- regs.ebx = locked;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- /* Scan the block list looking for any free blocks. Allocate a new
- * page block if no free blocks are found.
- */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (block->freeCount)
- break;
- }
- if (block == NULL && (block = PM_addNewPageBlock()) == NULL)
- return NULL;
- block->freeCount--;
- p = block->freeList;
- block->freeList = FREELIST_NEXT(p);
- if (locked)
- PM_lockDataPages(p,PM_PAGE_SIZE,&lh);
- return p;
-#else
- return NULL;
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
-#ifndef REALMODE
- VXD_regs regs;
- pageblock *block;
-
- /* Call the helper VxD for this service if we are running in a DOS box */
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_FREEPAGE);
- regs.ebx = (ulong)p;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return;
- }
-
- /* First find the page block that this page belongs to */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (p >= block->freeListStart && p <= block->freeListEnd)
- break;
- }
- CHECK(block != NULL);
-
- /* Now free the block by adding it to the free list */
- FREELIST_NEXT(p) = block->freeList;
- block->freeList = p;
- if (++block->freeCount == PAGES_PER_BLOCK) {
- /* If all pages in the page block are now free, free the entire
- * page block itself.
- */
- if (block == pageBlocks) {
- /* Delete from head */
- pageBlocks = block->next;
- if (block->next)
- block->next->prev = NULL;
- }
- else {
- /* Delete from middle of list */
- CHECK(block->prev != NULL);
- block->prev->next = block->next;
- if (block->next)
- block->next->prev = block->prev;
- }
- PM_free(block);
- }
-#else
- (void)p;
-#endif
-}
-
-/*-------------------------------------------------------------------------*/
-/* DOS Real Mode support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef REALMODE
-
-#ifndef MK_FP
-#define MK_FP(s,o) ( (void far *)( ((ulong)(s) << 16) + \
- (ulong)(o) ))
-#endif
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{ return MK_FP(r_seg,r_off); }
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return MK_FP(0x40,0);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- return MK_FP(0xA000,0);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- uint sel = base >> 4;
- uint off = base & 0xF;
- limit = limit;
- return MK_FP(sel,off);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{ ptr = ptr; }
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- return ((((ulong)p >> 16) << 4) + (ushort)p);
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{ return false; }
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- /* Call malloc() to allocate the memory for us */
- void *p = PM_malloc(size);
- *r_seg = FP_SEG(p);
- *r_off = FP_OFF(p);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- if (mem) PM_free(mem);
-}
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- return PM_int386(intno,in,out);
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- return PM_int386x(intno,in,out,sregs);
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS regs;
-
- regs.h.ah = 0x48;
- regs.x.bx = 0xFFFF;
- PM_int86(0x21,®s,®s);
- *physical = *total = regs.x.bx * 16UL;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Phar Lap TNT DOS Extender support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef TNT
-
-#include <pldos32.h>
-#include <pharlap.h>
-#include <hw386.h>
-
-static uchar *zeroPtr = NULL;
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- CONFIG_INF config;
- ULONG offset;
- int err;
- ulong baseAddr,baseOfs,newLimit;
- VXD_regs regs;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use
- * the helper VxD services to map memory instead of the DPMI services.
- * We do this because the helper VxD can properly disable caching
- * where necessary, which we can only do directly here if we are
- * running at ring 0 (ie: under real DOS).
- */
- if (VXD_version == -1)
- PM_init();
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_MAPPHYS);
- regs.ebx = base;
- regs.ecx = limit;
- regs.edx = isCached;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to TNT. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = base & 4095;
- baseAddr = base & ~4095;
- newLimit = ((limit+baseOfs+1+4095) & ~4095)-1;
- _dx_config_inf(&config, (UCHAR*)&config);
- err = _dx_map_phys(config.c_ds_sel,baseAddr,(newLimit + 4095) / 4096,&offset);
- if (err == 130) {
- /* If the TNT function failed, we are running in a DPMI environment
- * and this function does not work. However we know how to handle
- * DPMI properly, so we use our generic DPMI functions to do
- * what the TNT runtime libraries can't.
- */
- return DPMI_mapPhysicalAddr(base,limit,isCached);
- }
- if (err == 0)
- return (void*)(offset + baseOfs);
- return NULL;
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{ return 0xFFFFFFFFUL; }
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{ return false; }
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- USHORT addr,t;
- void *p;
-
- if (_dx_real_alloc((size + 0xF) >> 4,&addr,&t) != 0)
- return 0;
- *r_seg = addr; /* Real mode segment address */
- *r_off = 0; /* Real mode segment offset */
- p = PM_mapRealPointer(*r_seg,*r_off);
- _PM_addRealModeBlock(p,addr);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- if (mem) _dx_real_free(_PM_findRealModeBlock(mem));
-}
-
-#define INDPMI(reg) rmregs.reg = regs->reg
-#define OUTDPMI(reg) regs->reg = rmregs.reg
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- SWI_REGS rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- INDPMI(eax); INDPMI(ebx); INDPMI(ecx); INDPMI(edx); INDPMI(esi); INDPMI(edi);
-
- _dx_real_int(intno,&rmregs);
-
- OUTDPMI(eax); OUTDPMI(ebx); OUTDPMI(ecx); OUTDPMI(edx); OUTDPMI(esi); OUTDPMI(edi);
- regs->flags = rmregs.flags;
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- SWI_REGS rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
-
- _dx_real_int(intno,&rmregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- SWI_REGS rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
-
- _dx_real_int(intno,&rmregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS r;
- uint data[25];
-
- r.x.ax = 0x2520; /* Get free memory info */
- r.x.bx = 0;
- r.e.edx = (uint)data;
- PM_int386(0x21, &r, &r);
- *physical = data[21] * 4096;
- *total = data[23] * 4096;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Symantec C++ DOSX and FlashTek X-32/X-32VM support */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DOSX) || defined(X32VM)
-
-#ifdef X32VM
-#include <x32.h>
-
-#define _x386_mk_protected_ptr(p) _x32_mk_protected_ptr((void*)p)
-#define _x386_free_protected_ptr(p) _x32_free_protected_ptr(p)
-#define _x386_zero_base_ptr _x32_zero_base_ptr
-#else
-extern void *_x386_zero_base_ptr;
-#endif
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- return (void*)((ulong)_x386_zero_base_ptr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- PMREGS r;
-
- r.h.ah = 0x48; /* DOS function 48h - allocate mem */
- r.x.bx = (size + 0xF) >> 4; /* Number of paragraphs to allocate */
- PM_int386(0x21, &r, &r); /* Call DOS extender */
- if (r.x.cflag)
- return 0; /* Could not allocate the memory */
- *r_seg = r.e.eax;
- *r_off = 0;
- return PM_mapRealPointer(*r_seg,*r_off);
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- /* Cannot de-allocate this memory */
- mem = mem;
-}
-
-#pragma pack(1)
-
-typedef struct {
- ushort intno;
- ushort ds;
- ushort es;
- ushort fs;
- ushort gs;
- ulong eax;
- ulong edx;
- } _RMREGS;
-
-#pragma pack()
-
-#define IN(reg) regs.e.reg = in->e.reg
-#define OUT(reg) out->e.reg = regs.e.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- _RMREGS rmregs;
- PMREGS regs;
- PMSREGS pmsregs;
-
- rmregs.intno = intno;
- rmregs.eax = in->e.eax;
- rmregs.edx = in->e.edx;
- IN(ebx); IN(ecx); IN(esi); IN(edi);
- regs.x.ax = 0x2511;
- regs.e.edx = (uint)(&rmregs);
- PM_segread(&pmsregs);
- PM_int386x(0x21,®s,®s,&pmsregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(esi); OUT(edi);
- out->x.dx = rmregs.edx;
- out->x.cflag = regs.x.cflag;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out, RMSREGS *sregs)
-{
- _RMREGS rmregs;
- PMREGS regs;
- PMSREGS pmsregs;
-
- rmregs.intno = intno;
- rmregs.eax = in->e.eax;
- rmregs.edx = in->e.edx;
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
- IN(ebx); IN(ecx); IN(esi); IN(edi);
- regs.x.ax = 0x2511;
- regs.e.edx = (uint)(&rmregs);
- PM_segread(&pmsregs);
- PM_int386x(0x21,®s,®s,&pmsregs);
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->ds = rmregs.ds;
- out->x.dx = rmregs.edx;
- out->x.cflag = regs.x.cflag;
- return out->x.ax;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return (void*)((ulong)_x386_zero_base_ptr + 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- return (void*)((ulong)_x386_zero_base_ptr + 0xA0000);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- VXD_regs regs;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use
- * the helper VxD services to map memory instead of the DPMI services.
- * We do this because the helper VxD can properly disable caching
- * where necessary, which we can only do directly here if we are
- * running at ring 0 (ie: under real DOS).
- */
- if (VXD_version == -1)
- PM_init();
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_MAPPHYS);
- regs.ebx = base;
- regs.ecx = limit;
- regs.edx = isCached;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
-
- if (base > 0x100000)
- return _x386_map_physical_address((void*)base,limit);
- return (void*)((ulong)_x386_zero_base_ptr + base);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* Mapping cannot be freed */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{ return 0xFFFFFFFFUL; }
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{ return false; }
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-ulong _cdecl _X32_getPhysMem(void);
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS regs;
-
- /* Get total memory available, including virtual memory */
- regs.x.ax = 0x350B;
- PM_int386(0x21,®s,®s);
- *total = regs.e.eax;
-
- /* Get physical memory available */
- *physical = _X32_getPhysMem();
- if (*physical > *total)
- *physical = *total;
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Borland's DPMI32, Watcom DOS4GW and DJGPP DPMI support routines */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DPMI32) || defined(DOS4GW) || defined(DJGPP)
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return PM_mapPhysicalAddr(0x400,0xFFFF,true);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- return PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- VXD_regs regs;
-
-#ifdef DJGPP
- /* Enable near pointers for DJGPP V2 */
- __djgpp_nearptr_enable();
-#endif
- /* If we have connected to our helper VxD in a Windows DOS box, use
- * the helper VxD services to map memory instead of the DPMI services.
- * We do this because the helper VxD can properly disable caching
- * where necessary, which we can only do directly here if we are
- * running at ring 0 (ie: under real DOS).
- */
- if (VXD_version == -1)
- PM_init();
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_MAPPHYS);
- regs.ebx = base;
- regs.ecx = limit;
- regs.edx = isCached;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return (void*)regs.eax;
- }
- return DPMI_mapPhysicalAddr(base,limit,isCached);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* Mapping cannot be freed */
- (void)ptr;
- (void)limit;
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- ulong physAddr;
- if (!PM_getPhysicalAddrRange(p,1,&physAddr))
- return 0xFFFFFFFF;
- return physAddr | ((ulong)p & 0xFFF);
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- VXD_regs regs;
- ulong pte;
- PMSREGS sregs;
- ulong DSBaseAddr;
-
- /* If we have connected to our helper VxD in a Windows DOS box, use the
- * helper VxD services to find the physical address of an address.
- */
- if (VXD_version) {
- memset(®s,0,sizeof(regs));
- regs.eax = API_NUM(PMHELP_GETPHYSICALADDRRANGE);
- regs.ebx = (ulong)p;
- regs.ecx = (ulong)length;
- regs.edx = (ulong)physAddress;
- _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel);
- return regs.eax;
- }
-
- /* Find base address for default DS selector */
- PM_segread(&sregs);
- DSBaseAddr = DPMI_getSelectorBase(sregs.ds);
-
- /* Otherwise directly access the page tables to determine the
- * physical memory address. Note that we touch the memory before
- * calling, otherwise the memory may not be paged in correctly.
- */
- pte = *((ulong*)p);
-#ifdef DOS4GW
- if (_PM_pagingEnabled() == 0) {
- int count;
- ulong linAddr = (ulong)p;
-
- /* When paging is disabled physical=linear */
- for (count = (length+0xFFF) >> 12; count > 0; count--) {
- *physAddress++ = linAddr;
- linAddr += 4096;
- }
- return true;
- }
- else if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable,linAddr = (ulong)p;
- ulong limit = length-1;
-
- pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF);
- if (pPDB) {
- startPDB = (linAddr >> 22) & 0x3FFL;
- startPage = (linAddr >> 12) & 0x3FFL;
- endPDB = ((linAddr+limit) >> 22) & 0x3FFL;
- endPage = ((linAddr+limit) >> 12) & 0x3FFL;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFFL;
- pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FFL;
- for (iPage = start; iPage <= end; iPage++)
- *physAddress++ = (pPageTable[iPage] & ~0xFFF);
- }
- return true;
- }
- }
-#endif
- return false;
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{
- (void)limit;
- return (void*)base;
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- static uchar *zeroPtr = NULL;
-
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- PMREGS r;
- void *p;
-
- r.x.ax = 0x100; /* DPMI allocate DOS memory */
- r.x.bx = (size + 0xF) >> 4; /* number of paragraphs */
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return NULL; /* DPMI call failed */
- *r_seg = r.x.ax; /* Real mode segment */
- *r_off = 0;
- p = PM_mapRealPointer(*r_seg,*r_off);
- _PM_addRealModeBlock(p,r.x.dx);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- PMREGS r;
-
- if (mem) {
- r.x.ax = 0x101; /* DPMI free DOS memory */
- r.x.dx = _PM_findRealModeBlock(mem);/* DX := selector from 0x100 */
- PM_int386(0x31, &r, &r);
- }
-}
-
-static DPMI_handler_t DPMI_int10 = NULL;
-
-void PMAPI DPMI_setInt10Handler(DPMI_handler_t handler)
-{
- DPMI_int10 = handler;
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- PMREGS r;
- PMSREGS sr;
-
- if (intno == 0x10 && DPMI_int10) {
- if (DPMI_int10(regs))
- return;
- }
- PM_segread(&sr);
- r.x.ax = 0x300; /* DPMI issue real interrupt */
- r.h.bl = intno;
- r.h.bh = 0;
- r.x.cx = 0;
- sr.es = sr.ds;
- r.e.edi = (uint)regs;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
-
- DPMI_int86(intno,&rmregs); /* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
-
- DPMI_int86(intno,&rmregs); /* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-#pragma pack(1)
-
-typedef struct {
- uint LargestBlockAvail;
- uint MaxUnlockedPage;
- uint LargestLockablePage;
- uint LinAddrSpace;
- uint NumFreePagesAvail;
- uint NumPhysicalPagesFree;
- uint TotalPhysicalPages;
- uint FreeLinAddrSpace;
- uint SizeOfPageFile;
- uint res[3];
- } MemInfo;
-
-#pragma pack()
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS r;
- PMSREGS sr;
- MemInfo memInfo;
-
- PM_segread(&sr);
- r.x.ax = 0x500; /* DPMI get free memory info */
- sr.es = sr.ds;
- r.e.edi = (uint)&memInfo;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
- *physical = memInfo.NumPhysicalPagesFree * 4096;
- *total = memInfo.LargestBlockAvail;
- if (*total < *physical)
- *physical = *total;
-}
-
-#endif
-
-#ifndef __16BIT__
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- DPMI_regs regs;
- memset(®s, 0, sizeof(regs));
- regs.eax = 0x4F05;
- regs.ebx = 0x0000;
- regs.edx = bank;
- DPMI_int86(0x10,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- DPMI_regs regs;
- memset(®s, 0, sizeof(regs));
- regs.eax = 0x4F05;
- regs.ebx = 0x0000;
- regs.edx = bank;
- DPMI_int86(0x10,®s);
- regs.eax = 0x4F05;
- regs.ebx = 0x0001;
- regs.edx = bank;
- DPMI_int86(0x10,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- DPMI_regs regs;
- memset(®s, 0, sizeof(regs));
- regs.eax = 0x4F07;
- regs.ebx = waitVRT;
- regs.ecx = x;
- regs.edx = y;
- DPMI_int86(0x10,®s);
-}
-
-#endif
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this! */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c b/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c
deleted file mode 100644
index eecc2da..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c
+++ /dev/null
@@ -1,1637 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 16/32 bit DOS
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-
-/*--------------------------- Global variables ----------------------------*/
-
-#ifndef REALMODE
-static int globalDataStart;
-#endif
-
-PM_criticalHandler _VARAPI _PM_critHandler = NULL;
-PM_breakHandler _VARAPI _PM_breakHandler = NULL;
-PM_intHandler _VARAPI _PM_timerHandler = NULL;
-PM_intHandler _VARAPI _PM_rtcHandler = NULL;
-PM_intHandler _VARAPI _PM_keyHandler = NULL;
-PM_key15Handler _VARAPI _PM_key15Handler = NULL;
-PM_mouseHandler _VARAPI _PM_mouseHandler = NULL;
-PM_intHandler _VARAPI _PM_int10Handler = NULL;
-int _VARAPI _PM_mouseMask;
-
-uchar * _VARAPI _PM_ctrlCPtr; /* Location of Ctrl-C flag */
-uchar * _VARAPI _PM_ctrlBPtr; /* Location of Ctrl-Break flag */
-uchar * _VARAPI _PM_critPtr; /* Location of Critical error Bf*/
-PMFARPTR _VARAPI _PM_prevTimer = PMNULL; /* Previous timer handler */
-PMFARPTR _VARAPI _PM_prevRTC = PMNULL; /* Previous RTC handler */
-PMFARPTR _VARAPI _PM_prevKey = PMNULL; /* Previous key handler */
-PMFARPTR _VARAPI _PM_prevKey15 = PMNULL; /* Previous key15 handler */
-PMFARPTR _VARAPI _PM_prevBreak = PMNULL; /* Previous break handler */
-PMFARPTR _VARAPI _PM_prevCtrlC = PMNULL; /* Previous CtrlC handler */
-PMFARPTR _VARAPI _PM_prevCritical = PMNULL; /* Previous critical handler */
-long _VARAPI _PM_prevRealTimer; /* Previous real mode timer */
-long _VARAPI _PM_prevRealRTC; /* Previous real mode RTC */
-long _VARAPI _PM_prevRealKey; /* Previous real mode key */
-long _VARAPI _PM_prevRealKey15; /* Previous real mode key15 */
-long _VARAPI _PM_prevRealInt10; /* Previous real mode int 10h */
-static uchar _PM_oldCMOSRegA; /* CMOS register A contents */
-static uchar _PM_oldCMOSRegB; /* CMOS register B contents */
-static uchar _PM_oldRTCPIC2; /* Mask value for RTC IRQ8 */
-
-/* Structure to maintain information about hardware interrupt handlers,
- * include a copy of the hardware IRQ assembler thunk (one for each
- * hooked interrupt handler).
- */
-
-typedef struct {
- uchar IRQ;
- uchar IRQVect;
- uchar prevPIC;
- uchar prevPIC2;
- PMFARPTR prevHandler;
- long prevRealhandler;
- uchar thunk[1];
- /* IRQ assembler thunk follows ... */
- } _PM_IRQHandle;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Globals for locking interrupt handlers in _pmdos.asm */
-
-#ifndef REALMODE
-extern int _VARAPI _PM_pmdosDataStart;
-extern int _VARAPI _PM_pmdosDataEnd;
-extern int _VARAPI _PM_DMADataStart;
-extern int _VARAPI _PM_DMADataEnd;
-void _ASMAPI _PM_pmdosCodeStart(void);
-void _ASMAPI _PM_pmdosCodeEnd(void);
-void _ASMAPI _PM_DMACodeStart(void);
-void _ASMAPI _PM_DMACodeEnd(void);
-#endif
-
-/* Protected mode interrupt handlers, also called by PM callbacks below */
-
-void _ASMAPI _PM_timerISR(void);
-void _ASMAPI _PM_rtcISR(void);
-void _ASMAPI _PM_irqISRTemplate(void);
-void _ASMAPI _PM_irqISRTemplateEnd(void);
-void _ASMAPI _PM_keyISR(void);
-void _ASMAPI _PM_key15ISR(void);
-void _ASMAPI _PM_breakISR(void);
-void _ASMAPI _PM_ctrlCISR(void);
-void _ASMAPI _PM_criticalISR(void);
-void _ASMAPI _PM_mouseISR(void);
-void _ASMAPI _PM_int10PMCB(void);
-
-/* Protected mode DPMI callback handlers */
-
-void _ASMAPI _PM_mousePMCB(void);
-
-/* Routine to install a mouse handler function */
-
-void _ASMAPI _PM_setMouseHandler(int mask);
-
-/* Routine to allocate DPMI real mode callback routines */
-
-ibool _ASMAPI _DPMI_allocateCallback(void (_ASMAPI *pmcode)(),void *rmregs,long *RMCB);
-void _ASMAPI _DPMI_freeCallback(long RMCB);
-
-/* DPMI helper functions in PMLITE.C */
-
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit);
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr);
-ulong PMAPI DPMI_getSelectorBase(ushort sel);
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit);
-uint PMAPI DPMI_createSelector(ulong base,ulong limit);
-void PMAPI DPMI_freeSelector(uint sel);
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len);
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len);
-
-/* Functions to read and write CMOS registers */
-
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-/*-------------------------------------------------------------------------*/
-/* Generic routines common to all environments */
-/*-------------------------------------------------------------------------*/
-
-void PMAPI PM_resetMouseDriver(int hardReset)
-{
- RMREGS regs;
- PM_mouseHandler oldHandler = _PM_mouseHandler;
-
- PM_restoreMouseHandler();
- regs.x.ax = hardReset ? 0 : 33;
- PM_int86(0x33, ®s, ®s);
- if (oldHandler)
- PM_setMouseHandler(_PM_mouseMask, oldHandler);
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F);
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,0x20 | (i+3));
- _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40);
- }
-}
-
-#ifndef REALMODE
-
-static void PMAPI lockPMHandlers(void)
-{
- static int locked = 0;
- int stat;
- PM_lockHandle lh; /* Unused in DOS */
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- PM_saveDS();
- stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh);
- stat |= !PM_lockDataPages(&_PM_pmdosDataStart,(int)&_PM_pmdosDataEnd - (int)&_PM_pmdosDataStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_PM_pmdosCodeStart,(int)_PM_pmdosCodeEnd-(int)_PM_pmdosCodeStart,&lh);
- stat |= !PM_lockDataPages(&_PM_DMADataStart,(int)&_PM_DMADataEnd - (int)&_PM_DMADataStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_PM_DMACodeStart,(int)_PM_DMACodeEnd-(int)_PM_DMACodeStart,&lh);
- if (stat) {
- printf("Page locking services failed - interrupt handling not safe!\n");
- exit(1);
- }
- locked = 1;
- }
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* DOS Real Mode support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef REALMODE
-
-#ifndef MK_FP
-#define MK_FP(s,o) ( (void far *)( ((ulong)(s) << 16) + \
- (ulong)(o) ))
-#endif
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- PM_saveDS();
- _PM_mouseHandler = mh;
- _PM_setMouseHandler(_PM_mouseMask = mask);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- union REGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- int86(0x33, ®s, ®s);
- _PM_mouseHandler = NULL;
- }
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- _PM_getRMvect(0x8, (long*)&_PM_prevTimer);
- _PM_timerHandler = th;
- _PM_setRMvect(0x8, (long)_PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- _PM_setRMvect(0x8, (long)_PM_prevTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- _PM_getRMvect(0x70, (long*)&_PM_prevRTC);
- _PM_rtcHandler = th;
- _PM_setRMvect(0x70, (long)_PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- _PM_setRMvect(0x70, (long)_PM_prevRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- _PM_getRMvect(0x9, (long*)&_PM_prevKey);
- _PM_keyHandler = kh;
- _PM_setRMvect(0x9, (long)_PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- _PM_setRMvect(0x9, (long)_PM_prevKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- _PM_getRMvect(0x15, (long*)&_PM_prevKey15);
- _PM_key15Handler = kh;
- _PM_setRMvect(0x15, (long)_PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- _PM_setRMvect(0x15, (long)_PM_prevKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
- _PM_getRMvect(0x1B, (long*)&_PM_prevBreak);
- _PM_getRMvect(0x23, (long*)&_PM_prevCtrlC);
- _PM_breakHandler = bh;
- _PM_setRMvect(0x1B, (long)_PM_breakISR);
- _PM_setRMvect(0x23, (long)_PM_ctrlCISR);
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak) {
- _PM_setRMvect(0x1B, (long)_PM_prevBreak);
- _PM_setRMvect(0x23, (long)_PM_prevCtrlC);
- _PM_prevBreak = NULL;
- _PM_breakHandler = NULL;
- }
-}
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
- _PM_getRMvect(0x24, (long*)&_PM_prevCritical);
- _PM_critHandler = ch;
- _PM_setRMvect(0x24, (long)_PM_criticalISR);
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical) {
- _PM_setRMvect(0x24, (long)_PM_prevCritical);
- _PM_prevCritical = NULL;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len; /* Do nothing for real mode */
- return 1;
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- long t;
- _PM_getRMvect(intno,&t);
- *isr = (void*)t;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PM_saveDS();
- _PM_setRMvect(intno,(long)isr);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- _PM_setRMvect(intno,(long)isr);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Phar Lap TNT DOS Extender support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef TNT
-
-#include <pldos32.h>
-#include <pharlap.h>
-#include <hw386.h>
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-static uchar *mousePtr;
-
-/* The following real mode routine is used to call a 32 bit protected
- * mode FAR function from real mode. We use this for passing up control
- * from the real mode mouse callback to our protected mode code.
- */
-
-static UCHAR realHandler[] = { /* Real mode code generic handler */
- 0x00,0x00,0x00,0x00, /* __PM_callProtp */
- 0x00,0x00, /* __PM_protCS */
- 0x00,0x00,0x00,0x00, /* __PM_protHandler */
- 0x66,0x60, /* pushad */
- 0x1E, /* push ds */
- 0x6A,0x00, /* push 0 */
- 0x6A,0x00, /* push 0 */
- 0x2E,0xFF,0x36,0x04,0x00, /* push [cs:__PM_protCS] */
- 0x66,0x2E,0xFF,0x36,0x06,0x00, /* push [cs:__PM_protHandler] */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PM_callProtp] */
- 0x83,0xC4,0x0A, /* add sp,10 */
- 0x1F, /* pop ds */
- 0x66,0x61, /* popad */
- 0xCB, /* retf */
- };
-
-/* The following functions installs the above realmode callback mechanism
- * in real mode memory for calling the protected mode routine.
- */
-
-uchar * installCallback(void (PMAPI *pmCB)(),uint *rseg, uint *roff)
-{
- CONFIG_INF config;
- REALPTR realBufAdr,callProtp;
- ULONG bufSize;
- FARPTR protBufAdr;
- uchar *p;
-
- /* Get address of real mode routine to call up to protected mode */
- _dx_rmlink_get(&callProtp, &realBufAdr, &bufSize, &protBufAdr);
- _dx_config_inf(&config, (UCHAR*)&config);
-
- /* Fill in the values in the real mode code segment so that it will
- * call the correct routine.
- */
- *((REALPTR*)&realHandler[0]) = callProtp;
- *((USHORT*)&realHandler[4]) = config.c_cs_sel;
- *((ULONG*)&realHandler[6]) = (ULONG)pmCB;
-
- /* Copy the real mode handler to real mode memory */
- if ((p = PM_allocRealSeg(sizeof(realHandler),rseg,roff)) == NULL)
- return NULL;
- memcpy(p,realHandler,sizeof(realHandler));
-
- /* Skip past global variabls in real mode code segment */
- *roff += 0x0A;
- return p;
-}
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- RMREGS regs;
- RMSREGS sregs;
- uint rseg,roff;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- if ((mousePtr = installCallback(_PM_mouseISR, &rseg, &roff)) == NULL)
- return 0;
- _PM_mouseHandler = mh;
-
- /* Install the real mode mouse handler */
- sregs.es = rseg;
- regs.x.dx = roff;
- regs.x.cx = _PM_mouseMask = mask;
- regs.x.ax = 0xC;
- PM_int86x(0x33, ®s, ®s, &sregs);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- RMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int86(0x33, ®s, ®s);
- PM_freeRealSeg(mousePtr);
- _PM_mouseHandler = NULL;
- }
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- FARPTR ph;
-
- _dx_pmiv_get(intno, &ph);
- isr->sel = FP_SEL(ph);
- isr->off = FP_OFF(ph);
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- CONFIG_INF config;
- FARPTR ph;
-
- PM_saveDS();
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(ph,(uint)isr,config.c_cs_sel);
- _dx_pmiv_set(intno,ph);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- FARPTR ph;
-
- FP_SET(ph,isr.off,isr.sel);
- _dx_pmiv_set(intno,ph);
-}
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
- _PM_getRMvect(intno, realisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- _PM_setRMvect(intno,realisr);
- PM_restorePMvect(intno,pmisr);
-}
-
-static void setISR(int intno, void (PMAPI *isr)())
-{
- CONFIG_INF config;
- FARPTR ph;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(ph,(uint)isr,config.c_cs_sel);
- _dx_apmiv_set(intno,ph);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(0x8, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(0x8, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(0x9, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(0x9, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(0x9, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
- }
-}
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_dx_lock_pgsn(p,len) == 0);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_dx_ulock_pgsn(p,len) == 0);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- CONFIG_INF config;
- FARPTR fp;
-
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(fp,p,config.c_cs_sel);
- return (_dx_lock_pgs(fp,len) == 0);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- CONFIG_INF config;
- FARPTR fp;
-
- _dx_config_inf(&config, (UCHAR*)&config);
- FP_SET(fp,p,config.c_cs_sel);
- return (_dx_ulock_pgs(fp,len) == 0);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Symantec C++ DOSX and FlashTek X-32/X-32VM support */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DOSX) || defined(X32VM)
-
-#ifdef X32VM
-#include <x32.h>
-#endif
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-
-static uint mouseSel = 0,mouseOff;
-
-/* The following real mode routine is used to call a 32 bit protected
- * mode FAR function from real mode. We use this for passing up control
- * from the real mode mouse callback to our protected mode code.
- */
-
-static char realHandler[] = { /* Real mode code generic handler */
- 0x00,0x00,0x00,0x00, /* __PM_callProtp */
- 0x00,0x00, /* __PM_protCS */
- 0x00,0x00,0x00,0x00, /* __PM_protHandler */
- 0x1E, /* push ds */
- 0x6A,0x00, /* push 0 */
- 0x6A,0x00, /* push 0 */
- 0x2E,0xFF,0x36,0x04,0x00, /* push [cs:__PM_protCS] */
- 0x66,0x2E,0xFF,0x36,0x06,0x00, /* push [cs:__PM_protHandler] */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PM_callProtp] */
- 0x83,0xC4,0x0A, /* add sp,10 */
- 0x1F, /* pop ds */
- 0xCB, /* retf */
- };
-
-/* The following functions installs the above realmode callback mechanism
- * in real mode memory for calling the protected mode routine.
- */
-
-int installCallback(void (PMAPI *pmCB)(),uint *psel, uint *poff,
- uint *rseg, uint *roff)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- regs.x.ax = 0x250D;
- PM_segread(&sregs);
- PM_int386x(0x21,®s,®s,&sregs); /* Get RM callback address */
-
- /* Fill in the values in the real mode code segment so that it will
- * call the correct routine.
- */
- *((ulong*)&realHandler[0]) = regs.e.eax;
- *((ushort*)&realHandler[4]) = sregs.cs;
- *((ulong*)&realHandler[6]) = (ulong)pmCB;
-
- /* Copy the real mode handler to real mode memory (only allocate the
- * buffer once since we cant dealloate it with X32).
- */
- if (*psel == 0) {
- if (!PM_allocRealSeg(sizeof(realHandler),psel,poff,rseg,roff))
- return 0;
- }
- PM_memcpyfn(*psel,*poff,realHandler,sizeof(realHandler));
-
- /* Skip past global variables in real mode code segment */
- *roff += 0x0A;
- return 1;
-}
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- RMREGS regs;
- RMSREGS sregs;
- uint rseg,roff;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- if (!installCallback(_PM_mouseISR, &mouseSel, &mouseOff, &rseg, &roff))
- return 0;
- _PM_mouseHandler = mh;
-
- /* Install the real mode mouse handler */
- sregs.es = rseg;
- regs.x.dx = roff;
- regs.x.cx = _PM_mouseMask = mask;
- regs.x.ax = 0xC;
- PM_int86x(0x33, ®s, ®s, &sregs);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- RMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int86(0x33, ®s, ®s);
- _PM_mouseHandler = NULL;
- }
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.x.ax = 0x2502; /* Get PM interrupt vector */
- regs.x.cx = intno;
- PM_int386x(0x21, ®s, ®s, &sregs);
- isr->sel = sregs.es;
- isr->off = regs.e.ebx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMFARPTR pmisr;
- PMSREGS sregs;
-
- PM_saveDS();
- PM_segread(&sregs);
- pmisr.sel = sregs.cs;
- pmisr.off = (uint)isr;
- PM_restorePMvect(intno, pmisr);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.x.ax = 0x2505; /* Set PM interrupt vector */
- regs.x.cx = intno;
- sregs.ds = isr.sel;
- regs.e.edx = isr.off;
- PM_int386x(0x21, ®s, ®s, &sregs);
-}
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
- _PM_getRMvect(intno,realisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.x.ax = 0x2507; /* Set real and PM vectors */
- regs.x.cx = intno;
- sregs.ds = pmisr.sel;
- regs.e.edx = pmisr.off;
- regs.e.ebx = realisr;
- PM_int386x(0x21, ®s, ®s, &sregs);
-}
-
-static void setISR(int intno, void *isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- PM_segread(&sregs);
- regs.x.ax = 0x2506; /* Hook real and protected vectors */
- regs.x.cx = intno;
- sregs.ds = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386x(0x21, ®s, ®s, &sregs);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(0x8, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(0x8, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(0x9, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(0x9, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(0x9, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
- }
-}
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_x386_memlock(p,len) == 0);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- return (_x386_memunlock(p,len) == 0);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return (_x386_memlock(p,len) == 0);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return (_x386_memunlock(p,len) == 0);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Borland's DPMI32 DOS Power Pack Extender support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef DPMI32
-#define GENERIC_DPMI32 /* Use generic 32 bit DPMI routines */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x204;
- regs.h.bl = intno;
- PM_int386(0x31,®s,®s);
- isr->sel = regs.x.cx;
- isr->off = regs.e.edx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMSREGS sregs;
- PMREGS regs;
-
- PM_saveDS();
- regs.x.ax = 0x205; /* Set protected mode vector */
- regs.h.bl = intno;
- PM_segread(&sregs);
- regs.x.cx = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386(0x31,®s,®s);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x205;
- regs.h.bl = intno;
- regs.x.cx = isr.sel;
- regs.e.edx = isr.off;
- PM_int386(0x31,®s,®s);
-}
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Watcom C/C++ with Rational DOS/4GW support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef DOS4GW
-#define GENERIC_DPMI32 /* Use generic 32 bit DPMI routines */
-
-#define MOUSE_SUPPORTED /* DOS4GW directly supports mouse */
-
-/* We use the normal DOS services to save and restore interrupts handlers
- * for Watcom C++, because using the direct DPMI functions does not
- * appear to work properly. At least if we use the DPMI functions, we
- * dont get the auto-passup feature that we need to correctly trap
- * real and protected mode interrupts without installing Bi-model
- * interrupt handlers.
- */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.h.ah = 0x35;
- regs.h.al = intno;
- PM_int386x(0x21,®s,®s,&sregs);
- isr->sel = sregs.es;
- isr->off = regs.e.ebx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_saveDS();
- PM_segread(&sregs);
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386x(0x21,®s,®s,&sregs);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
- PMSREGS sregs;
-
- PM_segread(&sregs);
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = isr.sel;
- regs.e.edx = isr.off;
- PM_int386x(0x21,®s,®s,&sregs);
-}
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- _PM_mouseHandler = mh;
- _PM_setMouseHandler(_PM_mouseMask = mask);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- PMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int386(0x33, ®s, ®s);
- _PM_mouseHandler = NULL;
- }
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* DJGPP port of GNU C++ support. */
-/*-------------------------------------------------------------------------*/
-
-#ifdef DJGPP
-#define GENERIC_DPMI32 /* Use generic 32 bit DPMI routines */
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x204;
- regs.h.bl = intno;
- PM_int386(0x31,®s,®s);
- isr->sel = regs.x.cx;
- isr->off = regs.e.edx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMSREGS sregs;
- PMREGS regs;
-
- PM_saveDS();
- regs.x.ax = 0x205; /* Set protected mode vector */
- regs.h.bl = intno;
- PM_segread(&sregs);
- regs.x.cx = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386(0x31,®s,®s);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x205;
- regs.h.bl = intno;
- regs.x.cx = isr.sel;
- regs.e.edx = isr.off;
- PM_int386(0x31,®s,®s);
-}
-
-#endif
-
-/*-------------------------------------------------------------------------*/
-/* Generic 32 bit DPMI routines */
-/*-------------------------------------------------------------------------*/
-
-#if defined(GENERIC_DPMI32)
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-
-#ifndef MOUSE_SUPPORTED
-
-/* The following real mode routine is used to call a 32 bit protected
- * mode FAR function from real mode. We use this for passing up control
- * from the real mode mouse callback to our protected mode code.
- */
-
-static long mouseRMCB; /* Mouse real mode callback address */
-static uchar *mousePtr;
-static char mouseRegs[0x32]; /* Real mode regs for mouse callback */
-static uchar mouseHandler[] = {
- 0x00,0x00,0x00,0x00, /* _realRMCB */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:_realRMCB] */
- 0xCB, /* retf */
- };
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- RMREGS regs;
- RMSREGS sregs;
- uint rseg,roff;
-
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- /* Copy the real mode handler to real mode memory */
- if ((mousePtr = PM_allocRealSeg(sizeof(mouseHandler),&rseg,&roff)) == NULL)
- return 0;
- memcpy(mousePtr,mouseHandler,sizeof(mouseHandler));
- if (!_DPMI_allocateCallback(_PM_mousePMCB, mouseRegs, &mouseRMCB))
- PM_fatalError("Unable to allocate real mode callback!\n");
- PM_setLong(mousePtr,mouseRMCB);
-
- /* Install the real mode mouse handler */
- _PM_mouseHandler = mh;
- sregs.es = rseg;
- regs.x.dx = roff+4;
- regs.x.cx = _PM_mouseMask = mask;
- regs.x.ax = 0xC;
- PM_int86x(0x33, ®s, ®s, &sregs);
- return 1;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- RMREGS regs;
-
- if (_PM_mouseHandler) {
- regs.x.ax = 33;
- PM_int86(0x33, ®s, ®s);
- PM_freeRealSeg(mousePtr);
- _DPMI_freeCallback(mouseRMCB);
- _PM_mouseHandler = NULL;
- }
-}
-
-#endif
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
- _PM_getRMvect(intno,realisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- _PM_setRMvect(intno,realisr);
- PM_restorePMvect(intno,pmisr);
-}
-
-static void setISR(int intno, void (* PMAPI pmisr)())
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
- PM_setPMvect(intno,pmisr);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(0x8, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(0x8, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-PM_IRQHandle PMAPI PM_setIRQHandler(
- int IRQ,
- PM_irqHandler ih)
-{
- int thunkSize,PICmask,chainPrevious;
- ulong offsetAdjust;
- _PM_IRQHandle *handle;
-
- thunkSize = (ulong)_PM_irqISRTemplateEnd - (ulong)_PM_irqISRTemplate;
- if ((handle = PM_malloc(sizeof(_PM_IRQHandle) + thunkSize)) == NULL)
- return NULL;
- handle->IRQ = IRQ;
- handle->prevPIC = PM_inpb(0x21);
- handle->prevPIC2 = PM_inpb(0xA1);
- if (IRQ < 8) {
- handle->IRQVect = (IRQ + 8);
- PICmask = (1 << IRQ);
- chainPrevious = ((handle->prevPIC & PICmask) == 0);
- }
- else {
- handle->IRQVect = (0x60 + IRQ + 8);
- PICmask = ((1 << IRQ) | 0x4);
- chainPrevious = ((handle->prevPIC2 & (PICmask >> 8)) == 0);
- }
-
- /* Copy and setup the assembler thunk */
- offsetAdjust = (ulong)handle->thunk - (ulong)_PM_irqISRTemplate;
- memcpy(handle->thunk,_PM_irqISRTemplate,thunkSize);
- *((ulong*)&handle->thunk[2]) = offsetAdjust;
- *((ulong*)&handle->thunk[11+0]) = (ulong)ih;
- if (chainPrevious) {
- *((ulong*)&handle->thunk[11+4]) = handle->prevHandler.off;
- *((ulong*)&handle->thunk[11+8]) = handle->prevHandler.sel;
- }
- else {
- *((ulong*)&handle->thunk[11+4]) = 0;
- *((ulong*)&handle->thunk[11+8]) = 0;
- }
- *((ulong*)&handle->thunk[11+12]) = IRQ;
-
- /* Set the real time clock interrupt handler */
- getISR(handle->IRQVect, &handle->prevHandler, &handle->prevRealhandler);
- setISR(handle->IRQVect, (PM_intHandler)handle->thunk);
-
- /* Unmask the IRQ in the PIC */
- PM_outpb(0xA1,handle->prevPIC2 & ~(PICmask >> 8));
- PM_outpb(0x21,handle->prevPIC & ~PICmask);
- return handle;
-}
-
-void PMAPI PM_restoreIRQHandler(
- PM_IRQHandle irqHandle)
-{
- int PICmask;
- _PM_IRQHandle *handle = irqHandle;
-
- /* Restore PIC mask for the interrupt */
- if (handle->IRQ < 8)
- PICmask = (1 << handle->IRQ);
- else
- PICmask = ((1 << handle->IRQ) | 0x4);
- PM_outpb(0xA1,(PM_inpb(0xA1) & ~(PICmask >> 8)) | (handle->prevPIC2 & (PICmask >> 8)));
- PM_outpb(0x21,(PM_inpb(0x21) & ~PICmask) | (handle->prevPIC & PICmask));
-
- /* Restore the interrupt vector */
- restoreISR(handle->IRQVect, handle->prevHandler, handle->prevRealhandler);
-
- /* Finally free the thunk */
- PM_free(handle);
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(0x9, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(0x9, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(0x9, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-/* Real mode Ctrl-C and Ctrl-Break handler. This handler simply sets a
- * flag in the real mode code segment and exit. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-#ifndef DOS4GW
-static uchar ctrlHandler[] = {
- 0x00,0x00,0x00,0x00, /* ctrlBFlag */
- 0x66,0x2E,0xC7,0x06,0x00,0x00,
- 0x01,0x00,0x00,0x00, /* mov [cs:ctrlBFlag],1 */
- 0xCF, /* iretf */
- };
-#endif
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
-#ifndef DOS4GW
- uint rseg,roff;
-#else
- static int ctrlCFlag,ctrlBFlag;
-
- _PM_ctrlCPtr = (uchar*)&ctrlCFlag;
- _PM_ctrlBPtr = (uchar*)&ctrlBFlag;
-#endif
-
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-
-#ifndef DOS4GW
- /* Hook the real mode vectors for these handlers, as these are not
- * normally reflected by the DPMI server up to protected mode
- */
- _PM_ctrlBPtr = PM_allocRealSeg(sizeof(ctrlHandler)*2, &rseg, &roff);
- memcpy(_PM_ctrlBPtr,ctrlHandler,sizeof(ctrlHandler));
- memcpy(_PM_ctrlBPtr+sizeof(ctrlHandler),ctrlHandler,sizeof(ctrlHandler));
- _PM_ctrlCPtr = _PM_ctrlBPtr + sizeof(ctrlHandler);
- _PM_setRMvect(0x1B,((long)rseg << 16) | (roff+4));
- _PM_setRMvect(0x23,((long)rseg << 16) | (roff+sizeof(ctrlHandler)+4));
-#endif
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
-#ifndef DOS4GW
- PM_freeRealSeg(_PM_ctrlBPtr);
-#endif
- }
-}
-
-/* Real mode Critical Error handler. This handler simply saves the AX and
- * DI values in the real mode code segment and exits. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-#ifndef DOS4GW
-static uchar criticalHandler[] = {
- 0x00,0x00, /* axCode */
- 0x00,0x00, /* diCode */
- 0x2E,0xA3,0x00,0x00, /* mov [cs:axCode],ax */
- 0x2E,0x89,0x3E,0x02,0x00, /* mov [cs:diCode],di */
- 0xB8,0x03,0x00, /* mov ax,3 */
- 0xCF, /* iretf */
- };
-#endif
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
-#ifndef DOS4GW
- uint rseg,roff;
-#else
- static short critBuf[2];
-
- _PM_critPtr = (uchar*)critBuf;
-#endif
-
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-
-#ifndef DOS4GW
- /* Hook the real mode vector, as this is not normally reflected by the
- * DPMI server up to protected mode.
- */
- _PM_critPtr = PM_allocRealSeg(sizeof(criticalHandler)*2, &rseg, &roff);
- memcpy(_PM_critPtr,criticalHandler,sizeof(criticalHandler));
- _PM_setRMvect(0x24,((long)rseg << 16) | (roff+4));
-#endif
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- PM_freeRealSeg(_PM_critPtr);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_lockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_lockLinearPages((uint)p + DPMI_getSelectorBase(sregs.cs),len);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p + DPMI_getSelectorBase(sregs.cs),len);
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c
deleted file mode 100644
index c3e9b6c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit DOS
-*
-* Description: Main C module for the VFlat framebuffer routines. The page
-* fault handler is always installed to handle up to a 4Mb
-* framebuffer with a window size of 4Kb or 64Kb in size.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdlib.h>
-#include <dos.h>
-
-/*-------------------------------------------------------------------------*/
-/* DOS4G/W, PMODE/W and CauseWay support. */
-/*-------------------------------------------------------------------------*/
-
-#if defined(DOS4GW)
-
-#define VFLAT_START_ADDR 0xF0000000U
-#define VFLAT_END_ADDR 0xF03FFFFFU
-#define VFLAT_LIMIT (VFLAT_END_ADDR - VFLAT_START_ADDR)
-#define PAGE_PRESENT 1
-#define PAGE_NOTPRESENT 0
-#define PAGE_READ 0
-#define PAGE_WRITE 2
-
-PRIVATE ibool installed = false;
-PRIVATE ibool haveDPMI = false;
-PUBLIC ibool _ASMAPI VF_haveCauseWay = false;
-PUBLIC uchar * _ASMAPI VF_zeroPtr = NULL;
-
-/* Low level assembler code */
-
-int _ASMAPI InitPaging(void);
-void _ASMAPI ClosePaging(void);
-void _ASMAPI MapPhysical2Linear(ulong pAddr, ulong lAddr, int pages, int flags);
-void _ASMAPI InstallFaultHandler(ulong baseAddr,int bankSize);
-void _ASMAPI RemoveFaultHandler(void);
-void _ASMAPI InstallBankFunc(int codeLen,void *bankFunc);
-
-void * _ASMAPI VF_malloc(uint size)
-{ return PM_malloc(size); }
-
-void _ASMAPI VF_free(void *p)
-{ PM_free(p); }
-
-PRIVATE ibool CheckDPMI(void)
-/****************************************************************************
-*
-* Function: CheckDPMI
-* Returns: True if we are running under DPMI
-*
-****************************************************************************/
-{
- PMREGS regs;
-
- if (haveDPMI)
- return true;
-
- /* Check if we are running under DPMI in which case we will not be
- * able to install our page fault handlers. We can however use the
- * DVA.386 or VFLATD.386 virtual device drivers if they are present.
- */
- regs.x.ax = 0xFF00;
- PM_int386(0x31,®s,®s);
- if (!regs.x.cflag && (regs.e.edi & 8))
- return (haveDPMI = true);
- return false;
-}
-
-ibool PMAPI VF_available(void)
-/****************************************************************************
-*
-* Function: VF_available
-* Returns: True if virtual buffer is available, false if not.
-*
-****************************************************************************/
-{
- if (!VF_zeroPtr)
- VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true);
- if (CheckDPMI())
- return false;
-
- /* Standard DOS4GW, PMODE/W and Causeway */
- if (InitPaging() == -1)
- return false;
- ClosePaging();
- return true;
-}
-
-void * PMAPI InitDPMI(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-/****************************************************************************
-*
-* Function: InitDOS4GW
-* Parameters: baseAddr - Base address of framebuffer bank window
-* bankSize - Physical size of banks in Kb (4 or 64)
-* codeLen - Length of 32 bit bank switch function
-* bankFunc - Pointer to protected mode bank function
-* Returns: Near pointer to virtual framebuffer, or NULL on failure.
-*
-* Description: Installs the virtual linear framebuffer handling for
-* DPMI environments. This requires the DVA.386 or VFLATD.386
-* virtual device drivers to be installed and functioning.
-*
-****************************************************************************/
-{
- (void)baseAddr;
- (void)bankSize;
- (void)codeLen;
- (void)bankFunc;
- return NULL;
-}
-
-void * PMAPI InitDOS4GW(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-/****************************************************************************
-*
-* Function: InitDOS4GW
-* Parameters: baseAddr - Base address of framebuffer bank window
-* bankSize - Physical size of banks in Kb (4 or 64)
-* codeLen - Length of 32 bit bank switch function
-* bankFunc - Pointer to protected mode bank function
-* Returns: Near pointer to virtual framebuffer, or NULL on failure.
-*
-* Description: Installs the virtual linear framebuffer handling for
-* the DOS4GW extender.
-*
-****************************************************************************/
-{
- int i;
-
- if (InitPaging() == -1)
- return NULL; /* Cannot do hardware paging! */
-
- /* Map 4MB of video memory into linear address space (read/write) */
- if (bankSize == 64) {
- for (i = 0; i < 64; i++) {
- MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<16),16,
- PAGE_WRITE | PAGE_NOTPRESENT);
- }
- }
- else {
- for (i = 0; i < 1024; i++) {
- MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<12),1,
- PAGE_WRITE | PAGE_NOTPRESENT);
- }
- }
-
- /* Install our page fault handler and banks switch function */
- InstallFaultHandler(baseAddr,bankSize);
- InstallBankFunc(codeLen,bankFunc);
- installed = true;
- return (void*)VFLAT_START_ADDR;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-/****************************************************************************
-*
-* Function: VF_init
-* Parameters: baseAddr - Base address of framebuffer bank window
-* bankSize - Physical size of banks in Kb (4 or 64)
-* codeLen - Length of 32 bit bank switch function
-* bankFunc - Pointer to protected mode bank function
-* Returns: Near pointer to virtual framebuffer, or NULL on failure.
-*
-* Description: Installs the virtual linear framebuffer handling.
-*
-****************************************************************************/
-{
- if (installed)
- return (void*)VFLAT_START_ADDR;
- if (codeLen > 100)
- return NULL; /* Bank function is too large! */
- if (!VF_zeroPtr)
- VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true);
- if (CheckDPMI())
- return InitDPMI(baseAddr,bankSize,codeLen,bankFunc);
- return InitDOS4GW(baseAddr,bankSize,codeLen,bankFunc);
-}
-
-void PMAPI VF_exit(void)
-/****************************************************************************
-*
-* Function: VF_exit
-*
-* Description: Closes down the virtual framebuffer services and
-* restores the previous page fault handler.
-*
-****************************************************************************/
-{
- if (installed) {
- if (haveDPMI) {
- /* DPMI support */
- }
- else {
- /* Standard DOS4GW and PMODE/W support */
- RemoveFaultHandler();
- ClosePaging();
- }
- installed = false;
- }
-}
-
-/*-------------------------------------------------------------------------*/
-/* Support mapped out for other compilers. */
-/*-------------------------------------------------------------------------*/
-
-#else
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- (void)baseAddr;
- (void)bankSize;
- (void)codeLen;
- (void)bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c
deleted file mode 100644
index 53ab16c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: MSDOS
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-
-/*---------------------------- Global variables ---------------------------*/
-
-uchar * _VARAPI _ZTimerBIOSPtr;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler functions */
-
-void _ASMAPI LZ_timerOn(void);
-ulong _ASMAPI LZ_timerLap(void);
-void _ASMAPI LZ_timerOff(void);
-ulong _ASMAPI LZ_timerCount(void);
-void _ASMAPI LZ_disable(void);
-void _ASMAPI LZ_enable(void);
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
- _ZTimerBIOSPtr = PM_getBIOSPointer();
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) LZ_timerOn()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerLap(tm) LZ_timerLap()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) LZ_timerOff()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) LZ_timerCount()
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 54925
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- ulong ticks;
- LZ_disable(); /* Turn of interrupts */
- ticks = PM_getLong(_ZTimerBIOSPtr+0x6C);
- LZ_enable(); /* Turn on interrupts again */
- return ticks;
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{
- if (finish < start)
- finish += 1573040L; /* Number of ticks in 24 hours */
- return finish - start;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/event.c b/board/MAI/bios_emulator/scitech/src/pm/event.c
deleted file mode 100644
index b6f4586..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/event.c
+++ /dev/null
@@ -1,1115 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main implementation for the SciTech cross platform event
-* library. This module contains all the generic cross platform
-* code, and pulls in modules specific to each target OS
-* environment.
-*
-****************************************************************************/
-
-#include "event.h"
-#include "pmapi.h"
-#include <time.h>
-#include <signal.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define EVENTQSIZE 100 /* Number of events in event queue */
-#define JOY_NUM_AXES 4 /* Number of joystick axes supported */
-
-static struct {
- int mx,my; /* Current mouse position */
- int head; /* Head of event queue */
- int tail; /* Tail of event queue */
- int freeHead; /* Head of free list */
- int count; /* No. of items currently in queue */
- event_t evtq[EVENTQSIZE]; /* The queue structure itself */
- int oldMove; /* Previous movement event */
- int oldKey; /* Previous key repeat event */
- int oldJoyMove; /* Previous joystick movement event */
- int joyMask; /* Mask of joystick axes present */
- int joyMin[JOY_NUM_AXES];
- int joyCenter[JOY_NUM_AXES];
- int joyMax[JOY_NUM_AXES];
- int joyPrev[JOY_NUM_AXES];
- int joyButState;
- ulong doubleClick;
- ulong autoRepeat;
- ulong autoDelay;
- ulong autoTicks;
- ulong doubleClickThresh;
- ulong firstAuto;
- int autoMouse_x;
- int autoMouse_y;
- event_t downMouse;
- ulong keyModifiers; /* Current keyboard modifiers */
- uchar keyTable[128]; /* Table of key up/down flags */
- ibool allowLEDS; /* True if LEDS should change */
- _EVT_userEventFilter userEventCallback;
- _EVT_mouseMoveHandler mouseMove;
- _EVT_heartBeatCallback heartBeat;
- void *heartBeatParams;
- codepage_t *codePage;
- } EVT;
-
-/*---------------------------- Implementation -----------------------------*/
-
-#if defined(__REALDOS__) || defined(__SMX32__)
-/* {secret} */
-void EVTAPI _EVT_cCodeStart(void) {}
-#endif
-
-/* External assembler functions */
-
-int EVTAPI _EVT_readJoyAxis(int mask,int *axis);
-int EVTAPI _EVT_readJoyButtons(void);
-
-/* Forward declaration */
-
-ulong _EVT_getTicks(void);
-
-/****************************************************************************
-PARAMETERS:
-evt - Event to add to the event queue
-
-REMARKS:
-Adds an event to the event queue by tacking it onto the tail of the event
-queue. This routine assumes that at least one spot is available on the
-freeList for the event to be inserted.
-
-NOTE: Interrupts MUST be OFF while this routine is called to ensure we have
- mutually exclusive access to our internal data structures for
- interrupt driven systems (like under DOS).
-****************************************************************************/
-static void addEvent(
- event_t *evt)
-{
- int evtID;
-
- /* Check for mouse double click events */
- if (evt->what & EVT_MOUSEEVT) {
- EVT.autoMouse_x = evt->where_x;
- EVT.autoMouse_y = evt->where_y;
- if ((evt->what & EVT_MOUSEDOWN) && !(evt->message & EVT_DBLCLICK)) {
- /* Determine if the last mouse event was a double click event */
- uint diff_x = ABS(evt->where_x - EVT.downMouse.where_x);
- uint diff_y = ABS(evt->where_y - EVT.downMouse.where_y);
- if ((evt->message == EVT.downMouse.message)
- && ((evt->when - EVT.downMouse.when) <= EVT.doubleClick)
- && (diff_x <= EVT.doubleClickThresh)
- && (diff_y <= EVT.doubleClickThresh)) {
- evt->message |= EVT_DBLCLICK;
- EVT.downMouse = *evt;
- EVT.downMouse.when = 0;
- }
- else
- EVT.downMouse = *evt;
- EVT.autoTicks = _EVT_getTicks();
- }
- else if (evt->what & EVT_MOUSEUP) {
- EVT.downMouse.what = EVT_NULLEVT;
- EVT.firstAuto = true;
- }
- }
-
- /* Call user supplied callback to modify the event if desired */
- if (EVT.userEventCallback) {
- if (!EVT.userEventCallback(evt))
- return;
- }
-
- /* Get spot to place the event from the free list */
- evtID = EVT.freeHead;
- EVT.freeHead = EVT.evtq[EVT.freeHead].next;
-
- /* Add to the EVT.tail of the event queue */
- evt->next = -1;
- evt->prev = EVT.tail;
- if (EVT.tail != -1)
- EVT.evtq[EVT.tail].next = evtID;
- else
- EVT.head = evtID;
- EVT.tail = evtID;
- EVT.evtq[evtID] = *evt;
- EVT.count++;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to initialise the event queue to the empty state.
-****************************************************************************/
-static void initEventQueue(void)
-{
- int i;
-
- /* Build free list, and initialize global data structures */
- for (i = 0; i < EVENTQSIZE; i++)
- EVT.evtq[i].next = i+1;
- EVT.evtq[EVENTQSIZE-1].next = -1; /* Terminate list */
- EVT.count = EVT.freeHead = 0;
- EVT.head = EVT.tail = -1;
- EVT.oldMove = -1;
- EVT.oldKey = -1;
- EVT.oldJoyMove = -1;
- EVT.joyButState = 0;
- EVT.mx = EVT.my = 0;
- EVT.keyModifiers = 0;
- EVT.allowLEDS = true;
-
- /* Set default values for mouse double click and mouse auto events */
- EVT.doubleClick = 440;
- EVT.autoRepeat = 55;
- EVT.autoDelay = 330;
- EVT.autoTicks = 0;
- EVT.doubleClickThresh = 5;
- EVT.firstAuto = true;
- EVT.autoMouse_x = EVT.autoMouse_y = 0;
- memset(&EVT.downMouse,0,sizeof(EVT.downMouse));
-
- /* Setup default pointers for event library */
- EVT.userEventCallback = NULL;
- EVT.codePage = &_CP_US_English;
-
- /* Initialise the joystick module and do basic calibration (which assumes
- * the joystick is centered.
- */
- EVT.joyMask = EVT_joyIsPresent();
-}
-
-#if defined(NEED_SCALE_JOY_AXIS) || !defined(USE_OS_JOYSTICK)
-/****************************************************************************
-REMARKS:
-This function scales a joystick axis value to normalised form.
-****************************************************************************/
-static int scaleJoyAxis(
- int raw,
- int axis)
-{
- int scaled,range;
-
- /* Make sure the joystick is calibrated properly */
- if (EVT.joyCenter[axis] - EVT.joyMin[axis] < 5)
- return raw;
- if (EVT.joyMax[axis] - EVT.joyCenter[axis] < 5)
- return raw;
-
- /* Now scale the coordinates to -128 to 127 */
- raw -= EVT.joyCenter[axis];
- if (raw < 0)
- range = EVT.joyCenter[axis]-EVT.joyMin[axis];
- else
- range = EVT.joyMax[axis]-EVT.joyCenter[axis];
- scaled = (raw * 128) / range;
- if (scaled < -128)
- scaled = -128;
- if (scaled > 127)
- scaled = 127;
- return scaled;
-}
-#endif
-
-#if defined(__SMX32__)
-#include "smx/event.c"
-#elif defined(__RTTARGET__)
-#include "rttarget/event.c"
-#elif defined(__REALDOS__)
-#include "dos/event.c"
-#elif defined(__WINDOWS32__)
-#include "win32/event.c"
-#elif defined(__OS2__)
-#if defined(__OS2_PM__)
-#include "os2pm/event.c"
-#else
-#include "os2/event.c"
-#endif
-#elif defined(__LINUX__)
-#if defined(__USE_X11__)
-#include "x11/event.c"
-#else
-#include "linux/event.c"
-#endif
-#elif defined(__QNX__)
-#if defined(__USE_PHOTON__)
-#include "photon/event.c"
-#elif defined(__USE_X11__)
-#include "x11/event.c"
-#else
-#include "qnx/event.c"
-#endif
-#elif defined(__BEOS__)
-#include "beos/event.c"
-#else
-#error Event library not ported to this platform yet!
-#endif
-
-/*------------------------ Public interface routines ----------------------*/
-
-/* If USE_OS_JOYSTICK is defined, the OS specific libraries will implement
- * the joystick code rather than using the generic OS portable version.
- */
-
-#ifndef USE_OS_JOYSTICK
-/****************************************************************************
-DESCRIPTION:
-Returns the mask indicating what joystick axes are attached.
-
-HEADER:
-event.h
-
-REMARKS:
-This function is used to detect the attached joysticks, and determine
-what axes are present and functioning. This function will re-detect any
-attached joysticks when it is called, so if the user forgot to attach
-the joystick when the application started, you can call this function to
-re-detect any newly attached joysticks.
-
-SEE ALSO:
-EVT_joySetLowerRight, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-int EVTAPI EVT_joyIsPresent(void)
-{
- int mask,i;
-
- memset(EVT.joyMin,0,sizeof(EVT.joyMin));
- memset(EVT.joyCenter,0,sizeof(EVT.joyCenter));
- memset(EVT.joyMax,0,sizeof(EVT.joyMax));
- memset(EVT.joyPrev,0,sizeof(EVT.joyPrev));
- EVT.joyButState = 0;
-#ifdef __LINUX__
- PM_init();
-#endif
- mask = _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
- if (mask) {
- for (i = 0; i < JOY_NUM_AXES; i++)
- EVT.joyMax[i] = EVT.joyCenter[i]*2;
- }
- return mask;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Polls the joystick for position and button information.
-
-HEADER:
-event.h
-
-REMARKS:
-This routine is used to poll analogue joysticks for button and position
-information. It should be called once for each main loop of the user
-application, just before processing all pending events via EVT_getNext.
-All information polled from the joystick will be posted to the event
-queue for later retrieval.
-
-Note: Most analogue joysticks will provide readings that change even
- though the joystick has not moved. Hence if you call this routine
- you will likely get an EVT_JOYMOVE event every time through your
- event loop.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight,
-EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_pollJoystick(void)
-{
- event_t evt;
- int i,axis[JOY_NUM_AXES],newButState,mask,moved,ps;
-
- if (EVT.joyMask) {
- /* Read joystick axes and post movement events if they have
- * changed since the last time we polled. Until the events are
- * actually flushed, we keep modifying the same joystick movement
- * event, so you won't get multiple movement event
- */
- mask = _EVT_readJoyAxis(EVT.joyMask,axis);
- newButState = _EVT_readJoyButtons();
- moved = false;
- for (i = 0; i < JOY_NUM_AXES; i++) {
- if (mask & (EVT_JOY_AXIS_X1 << i))
- axis[i] = scaleJoyAxis(axis[i],i);
- else
- axis[i] = EVT.joyPrev[i];
- if (axis[i] != EVT.joyPrev[i])
- moved = true;
- }
- if (moved) {
- memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev));
- ps = _EVT_disableInt();
- if (EVT.oldJoyMove != -1) {
- /* Modify the existing joystick movement event */
- EVT.evtq[EVT.oldJoyMove].message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- }
- else if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick movement event */
- EVT.oldJoyMove = EVT.freeHead;
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYMOVE;
- evt.message = EVT.joyButState;
- evt.where_x = EVT.joyPrev[0];
- evt.where_y = EVT.joyPrev[1];
- evt.relative_x = EVT.joyPrev[2];
- evt.relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- }
- _EVT_restoreInt(ps);
- }
-
- /* Read the joystick buttons, and post events to reflect the change
- * in state for the joystick buttons.
- */
- if (newButState != EVT.joyButState) {
- if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick click event */
- ps = _EVT_disableInt();
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYCLICK;
- evt.message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- _EVT_restoreInt(ps);
- }
- EVT.joyButState = newButState;
- }
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick upper left position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the upper left
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetUpperLeft(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMin);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick lower right position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the lower right
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetLowerRight(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMax);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick center position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the center
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joySetCenter
-****************************************************************************/
-void EVTAPI EVT_joySetCenter(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
-}
-#endif
-
-/****************************************************************************
-DESCRIPTION:
-Posts a user defined event to the event queue
-
-HEADER:
-event.h
-
-RETURNS:
-True if event was posted, false if event queue is full.
-
-PARAMETERS:
-what - Type code for message to post
-message - Event specific message to post
-modifiers - Event specific modifier flags to post
-
-REMARKS:
-This routine is used to post user defined events to the event queue.
-
-SEE ALSO:
-EVT_flush, EVT_getNext, EVT_peekNext, EVT_halt
-****************************************************************************/
-ibool EVTAPI EVT_post(
- ulong which,
- ulong what,
- ulong message,
- ulong modifiers)
-{
- event_t evt;
- uint ps;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record */
- ps = _EVT_disableInt();
- evt.which = which;
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message;
- evt.modifiers = modifiers;
- addEvent(&evt); /* Add to EVT.tail of event queue */
- _EVT_restoreInt(ps);
- return true;
- }
- else
- return false;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Flushes all events of a specified type from the event queue.
-
-PARAMETERS:
-mask - Mask specifying the types of events that should be removed
-
-HEADER:
-event.h
-
-REMARKS:
-Flushes (removes) all pending events of the specified type from the event
-queue. You may combine the masks for different event types with a simple
-logical OR.
-
-SEE ALSO:
-EVT_getNext, EVT_halt, EVT_peekNext
-****************************************************************************/
-void EVTAPI EVT_flush(
- ulong mask)
-{
- event_t evt;
-
- do { /* Flush all events */
- EVT_getNext(&evt,mask);
- } while (evt.what != EVT_NULLEVT);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Halts until and event of the specified type is recieved.
-
-HEADER:
-event.h
-
-PARAMETERS:
-evt - Pointer to
-mask - Mask specifying the types of events that should be removed
-
-REMARKS:
-This functions halts exceution until an event of the specified type is
-recieved into the event queue. It does not flush the event queue of events
-before performing the busy loop. However this function does throw away
-any events other than the ones you have requested via the event mask, to
-avoid the event queue filling up with unwanted events (like EVT_KEYUP or
-EVT_MOUSEMOVE events).
-
-SEE ALSO:
-EVT_getNext, EVT_flush, EVT_peekNext
-****************************************************************************/
-void EVTAPI EVT_halt(
- event_t *evt,
- ulong mask)
-{
- do { /* Wait for an event */
- if (mask & (EVT_JOYEVT))
- EVT_pollJoystick();
- EVT_getNext(evt,EVT_EVERYEVT);
- } while (!(evt->what & mask));
-}
-
-/****************************************************************************
-DESCRIPTION:
-Peeks at the next pending event in the event queue.
-
-HEADER:
-event.h
-
-RETURNS:
-True if an event is pending, false if not.
-
-PARAMETERS:
-evt - Pointer to structure to return the event info in
-mask - Mask specifying the types of events that should be removed
-
-REMARKS:
-Peeks at the next pending event of the specified type in the event queue. The
-mask parameter is used to specify the type of events to be peeked at, and
-can be any logical combination of any of the flags defined by the
-EVT_eventType enumeration.
-
-In contrast to EVT_getNext, the event is not removed from the event queue.
-You may combine the masks for different event types with a simple logical OR.
-
-SEE ALSO:
-EVT_flush, EVT_getNext, EVT_halt
-****************************************************************************/
-ibool EVTAPI EVT_peekNext(
- event_t *evt,
- ulong mask)
-{
- int evtID;
- uint ps;
-
- if (EVT.heartBeat)
- EVT.heartBeat(EVT.heartBeatParams);
- _EVT_pumpMessages(); /* Pump all messages into queue */
- EVT.mouseMove(EVT.mx,EVT.my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
- if (EVT.count) {
- /* It is possible that an event be posted while we are trying
- * to access the event queue. This would create problems since
- * we may end up with invalid data for our event queue pointers. To
- * alleviate this, all interrupts are suspended while we manipulate
- * our pointers.
- */
- ps = _EVT_disableInt(); /* disable interrupts */
- for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) {
- if (EVT.evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1) {
- _EVT_restoreInt(ps);
- return false; /* Event was not found */
- }
- *evt = EVT.evtq[evtID]; /* Return the event */
- _EVT_restoreInt(ps);
- if (evt->what & EVT_KEYEVT)
- _EVT_maskKeyCode(evt);
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Retrieves the next pending event from the event queue.
-
-PARAMETERS:
-evt - Pointer to structure to return the event info in
-mask - Mask specifying the types of events that should be removed
-
-HEADER:
-event.h
-
-RETURNS:
-True if an event was pending, false if not.
-
-REMARKS:
-Retrieves the next pending event from the event queue, and stores it in a
-event_t structure. The mask parameter is used to specify the type of events
-to be removed, and can be any logical combination of any of the flags defined
-by the EVT_eventType enumeration.
-
-The what field of the event contains the event code of the event that was
-extracted. All application specific events should begin with the EVT_USEREVT
-code and build from there. Since the event code is stored in an integer,
-there is a maximum of 32 different event codes that can be distinguished.
-You can store extra information about the event in the message field to
-distinguish between events of the same class (for instance the button used in
-a EVT_MOUSEDOWN event).
-
-If an event of the specified type was not in the event queue, the what field
-of the event will be set to NULLEVT, and the return value will return false.
-
-Note: You should /always/ use the EVT_EVERYEVT mask for extracting events
- from your main event loop handler. Using a mask for only a specific
- type of event for long periods of time will cause the event queue to
- fill up with events of the type you are ignoring, eventually causing
- the application to hang when the event queue becomes full.
-
-SEE ALSO:
-EVT_flush, EVT_halt, EVT_peekNext
-****************************************************************************/
-ibool EVTAPI EVT_getNext(
- event_t *evt,
- ulong mask)
-{
- int evtID,next,prev;
- uint ps;
-
- if (EVT.heartBeat)
- EVT.heartBeat(EVT.heartBeatParams);
- _EVT_pumpMessages(); /* Pump all messages into queue */
- EVT.mouseMove(EVT.mx,EVT.my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
- if (EVT.count) {
- /* It is possible that an event be posted while we are trying
- * to access the event queue. This would create problems since
- * we may end up with invalid data for our event queue pointers. To
- * alleviate this, all interrupts are suspended while we manipulate
- * our pointers.
- */
- ps = _EVT_disableInt(); /* disable interrupts */
- for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) {
- if (EVT.evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1) {
- _EVT_restoreInt(ps);
- return false; /* Event was not found */
- }
- next = EVT.evtq[evtID].next;
- prev = EVT.evtq[evtID].prev;
- if (prev != -1)
- EVT.evtq[prev].next = next;
- else
- EVT.head = next;
- if (next != -1)
- EVT.evtq[next].prev = prev;
- else
- EVT.tail = prev;
- *evt = EVT.evtq[evtID]; /* Return the event */
- EVT.evtq[evtID].next = EVT.freeHead; /* and return to free list */
- EVT.freeHead = evtID;
- EVT.count--;
- if (evt->what == EVT_MOUSEMOVE)
- EVT.oldMove = -1;
- if (evt->what == EVT_KEYREPEAT)
- EVT.oldKey = -1;
- if (evt->what == EVT_JOYMOVE)
- EVT.oldJoyMove = -1;
- _EVT_restoreInt(ps); /* enable interrupts */
- if (evt->what & EVT_KEYEVT)
- _EVT_maskKeyCode(evt);
- }
-
- /* If there is no event pending, check if we should generate an auto
- * mouse down event if the mouse is still currently down.
- */
- if (evt->what == EVT_NULLEVT && EVT.autoRepeat && (mask & EVT_MOUSEAUTO) && (EVT.downMouse.what & EVT_MOUSEDOWN)) {
- ulong ticks = _EVT_getTicks();
- if ((ticks - EVT.autoTicks) >= (EVT.autoRepeat + (EVT.firstAuto ? EVT.autoDelay : 0))) {
- evt->what = EVT_MOUSEAUTO;
- evt->message = EVT.downMouse.message;
- evt->modifiers = EVT.downMouse.modifiers;
- evt->where_x = EVT.autoMouse_x;
- evt->where_y = EVT.autoMouse_y;
- evt->relative_x = 0;
- evt->relative_y = 0;
- EVT.autoTicks = evt->when = ticks;
- EVT.firstAuto = false;
- }
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Installs a user supplied event filter callback for event handling.
-
-HEADER:
-event.h
-
-PARAMETERS:
-userEventFilter - Address of user supplied event filter callback
-
-REMARKS:
-This function allows the application programmer to install an event filter
-callback for event handling. Once you install your callback, the MGL
-event handling routines will call your callback with a pointer to the
-new event that will be placed into the event queue. Your callback can the
-modify the contents of the event before it is placed into the queue (for
-instance adding custom information or perhaps high precision timing
-information).
-
-If your callback returns FALSE, the event will be ignore and will not be
-posted to the event queue. You should always return true from your event
-callback unless you plan to use the events immediately that they are
-recieved.
-
-Note: Your event callback may be called in response to a hardware
- interrupt and will be executing in the context of the hardware
- interrupt handler under MSDOS (ie: keyboard interrupt or mouse
- interrupt). For this reason the code pages for the callback that
- you register must be locked in memory with the PM_lockCodePages
- function. You must also lock down any data pages that your function
- needs to reference as well.
-
-Note: You can also use this filter callback to process events at the
- time they are activated by the user (ie: when the user hits the
- key or moves the mouse), but make sure your code runs as fast as
- possible as it will be executing inside the context of an interrupt
- handler on some systems.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext
-****************************************************************************/
-void EVTAPI EVT_setUserEventFilter(
- _EVT_userEventFilter filter)
-{
- EVT.userEventCallback = filter;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Installs a user supplied event heartbeat callback function.
-
-HEADER:
-event.h
-
-PARAMETERS:
-callback - Address of user supplied event heartbeat callback
-params - Parameters to pass to the event heartbeat function
-
-REMARKS:
-This function allows the application programmer to install an event heatbeat
-function that gets called every time that EVT_getNext or EVT_peekNext
-is called. This is primarily useful for simulating text mode cursors inside
-event handling code when running in graphics modes as opposed to hardware
-text modes.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_getHeartBeatCallback
-****************************************************************************/
-void EVTAPI EVT_setHeartBeatCallback(
- _EVT_heartBeatCallback callback,
- void *params)
-{
- EVT.heartBeat = callback;
- EVT.heartBeatParams = params;
-}
-
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current user supplied event heartbeat callback function.
-
-HEADER:
-event.h
-
-PARAMETERS:
-callback - Place to store the address of user supplied event heartbeat callback
-params - Place to store the parameters to pass to the event heartbeat function
-
-REMARKS:
-This function retrieves the current event heatbeat function that gets called
-every time that EVT_getNext or EVT_peekNext is called.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_setHeartBeatCallback
-****************************************************************************/
-void EVTAPI EVT_getHeartBeatCallback(
- _EVT_heartBeatCallback *callback,
- void **params)
-{
- *callback = EVT.heartBeat;
- *params = EVT.heartBeatParams;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Determines if a specified key is currently down.
-
-PARAMETERS:
-scanCode - Scan code to test
-
-RETURNS:
-True of the specified key is currently held down.
-
-HEADER:
-event.h
-
-REMARKS:
-This function determines if a specified key is currently down at the
-time that the call is made. You simply need to pass in the scan code of
-the key that you wish to test, and the MGL will tell you if it is currently
-down or not. The MGL does this by keeping track of the up and down state
-of all the keys.
-****************************************************************************/
-ibool EVTAPI EVT_isKeyDown(
- uchar scanCode)
-{
- return _EVT_isKeyDown(scanCode);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Set the mouse position for the event module
-
-PARAMETERS:
-x - X coordinate to move the mouse cursor position to
-y - Y coordinate to move the mouse cursor position to
-
-HEADER:
-event.h
-
-REMARKS:
-This function moves the mouse cursor position for the event module to the
-specified location.
-
-SEE ALSO:
-EVT_getMousePos
-****************************************************************************/
-void EVTAPI EVT_setMousePos(
- int x,
- int y)
-{
- EVT.mx = x;
- EVT.my = y;
- _EVT_setMousePos(&EVT.mx,&EVT.my);
- EVT.mouseMove(EVT.mx,EVT.my);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current mouse cursor location.
-
-HEADER:
-event.h
-
-PARAMETERS:
-x - Place to store value for mouse x coordinate (screen coordinates)
-y - Place to store value for mouse y coordinate (screen coordinates)
-
-REMARKS:
-Obtains the current mouse cursor position in screen coordinates. Normally the
-mouse cursor location is tracked using the mouse movement events that are
-posted to the event queue when the mouse moves, however this routine
-provides an alternative method of polling the mouse cursor location.
-
-SEE ALSO:
-EVT_setMousePos
-****************************************************************************/
-void EVTAPI EVT_getMousePos(
- int *x,
- int *y)
-{
- *x = EVT.mx;
- *y = EVT.my;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the currently active code page for translation of keyboard characters.
-
-HEADER:
-event.h
-
-RETURNS:
-Pointer to the currently active code page translation table.
-
-REMARKS:
-This function is returns a pointer to the currently active code page
-translation table. See EVT_setCodePage for more information.
-
-SEE ALSO:
-EVT_setCodePage
-****************************************************************************/
-codepage_t * EVTAPI EVT_getCodePage(void)
-{
- return EVT.codePage;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Sets the currently active code page for translation of keyboard characters.
-
-HEADER:
-event.h
-
-PARAMETERS:
-page - New code page to make active
-
-REMARKS:
-This function is used to set a new code page translation table that is used
-to translate virtual scan code values to ASCII characters for different
-keyboard configurations. The default is usually US English, although if
-possible the PM library will auto-detect the correct code page translation
-for the target OS if OS services are available to determine what type of
-keyboard is currently attached.
-
-SEE ALSO:
-EVT_getCodePage
-****************************************************************************/
-void EVTAPI EVT_setCodePage(
- codepage_t *page)
-{
- EVT.codePage = page;
-}
-
-/* The following contains fake C prototypes and documentation for the
- * macro functions in the event.h header file. These exist soley so
- * that DocJet will correctly pull in the documentation for these functions.
- */
-#ifdef INCLUDE_DOC_FUNCTIONS
-
-/****************************************************************************
-DESCRIPTION:
-Macro to extract the ASCII code from a message.
-
-PARAMETERS:
-message - Message to extract ASCII code from
-
-RETURNS:
-ASCII code extracted from the message.
-
-HEADER:
-event.h
-
-REMARKS:
-Macro to extract the ASCII code from the message field of the event_t
-structure. You pass the message field to the macro as the parameter and
-the ASCII code is the result, for example:
-
- event_t EVT.myEvent;
- uchar code;
- code = EVT_asciiCode(EVT.myEvent.message);
-
-SEE ALSO:
-EVT_scanCode, EVT_repeatCount
-****************************************************************************/
-uchar EVT_asciiCode(
- ulong message);
-
-/****************************************************************************
-DESCRIPTION:
-Macro to extract the keyboard scan code from a message.
-
-HEADER:
-event.h
-
-PARAMETERS:
-message - Message to extract scan code from
-
-RETURNS:
-Keyboard scan code extracted from the message.
-
-REMARKS:
-Macro to extract the keyboard scan code from the message field of the event
-structure. You pass the message field to the macro as the parameter and
-the scan code is the result, for example:
-
- event_t EVT.myEvent;
- uchar code;
- code = EVT_scanCode(EVT.myEvent.message);
-
-NOTE: Scan codes in the event library are not really hardware scan codes,
- but rather virtual scan codes as generated by a low level keyboard
- interface driver. All virtual scan code values are defined by the
- EVT_scanCodesType enumeration, and will be identical across all
- supports OS'es and platforms.
-
-SEE ALSO:
-EVT_asciiCode, EVT_repeatCount
-****************************************************************************/
-uchar EVT_scanCode(
- ulong message);
-
-/****************************************************************************
-DESCRIPTION:
-Macro to extract the repeat count from a message.
-
-HEADER:
-event.h
-
-PARAMETERS:
-message - Message to extract repeat count from
-
-RETURNS:
-Repeat count extracted from the message.
-
-REMARKS:
-Macro to extract the repeat count from the message field of the event
-structure. The repeat count is the number of times that the key repeated
-before there was another keyboard event to be place in the queue, and
-allows the event handling code to avoid keyboard buffer overflow
-conditions when a single key is held down by the user. If you are processing
-a key repeat code, you will probably want to check this field to see how
-many key repeats you should process for this message.
-
-SEE ALSO:
-EVT_asciiCode, EVT_repeatCount
-****************************************************************************/
-short EVT_repeatCount(
- ulong message);
-
-#endif /* DOC FUNCTIONS */
-
-#if defined(__REALDOS__) || defined(__SMX32__)
-/* {secret} */
-void EVTAPI _EVT_cCodeEnd(void) {}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/linux/cpuinfo.c
deleted file mode 100644
index e88d210..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/cpuinfo.c
+++ /dev/null
@@ -1,68 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Linux specific code for the CPU detection module.
-*
-****************************************************************************/
-
-#include <ztimer.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for Linux!
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for Linux!
-****************************************************************************/
-#define RestoreThreadPriority(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 1000000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- struct timeval tv; \
- gettimeofday(&tv,NULL); \
- (t)->low = tv.tv_sec*1000000 + tv.tv_usec; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/event.c b/board/MAI/bios_emulator/scitech/src/pm/linux/event.c
deleted file mode 100644
index ce38732..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/event.c
+++ /dev/null
@@ -1,1360 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Linux fullscreen console implementation for the SciTech
-* cross platform event library.
-* Portions ripped straigth from the gpm source code for mouse
-* handling.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-extern int _PM_console_fd;
-static ushort keyUpMsg[256] = {0};
-static int _EVT_mouse_fd = 0;
-static int range_x, range_y;
-static int opt_baud = 1200, opt_sample = 100;
-#ifdef USE_OS_JOYSTICK
-static short *axis0 = NULL, *axis1 = NULL;
-static uchar *buts0 = NULL, *buts1 = NULL;
-static int joystick0_fd = 0, joystick1_fd = 0;
-static int js_version = 0;
-#endif
-
-/* This defines the supported mouse drivers */
-
-typedef enum {
- EVT_noMouse = -1,
- EVT_microsoft = 0,
- EVT_ps2,
- EVT_mousesystems,
- EVT_gpm,
- EVT_MMseries,
- EVT_logitech,
- EVT_busmouse,
- EVT_mouseman,
- EVT_intellimouse,
- EVT_intellimouse_ps2,
- } mouse_drivers_t;
-
-static mouse_drivers_t mouse_driver = EVT_noMouse;
-static char mouse_dev[20] = "/dev/mouse";
-
-typedef struct {
- char *name;
- int flags;
- void (*init)(void);
- uchar proto[4];
- int packet_len;
- int read;
- } mouse_info;
-
-#define STD_FLG (CREAD | CLOCAL | HUPCL)
-
-static void _EVT_mouse_init(void);
-static void _EVT_logitech_init(void);
-static void _EVT_pnpmouse_init(void);
-
-mouse_info mouse_infos[] = {
- {"Microsoft", CS7 | B1200 | STD_FLG, _EVT_mouse_init, {0x40, 0x40, 0x40, 0x00}, 3, 1},
- {"PS2", STD_FLG, NULL, {0xc0, 0x00, 0x00, 0x00}, 3, 1},
- {"MouseSystems", CS8 | CSTOPB | STD_FLG, _EVT_mouse_init, {0xf8, 0x80, 0x00, 0x00}, 5, 5},
- {"GPM", CS8 | CSTOPB | STD_FLG, NULL, {0xf8, 0x80, 0x00, 0x00}, 5, 5},
- {"MMSeries", CS8 | PARENB | PARODD | STD_FLG, _EVT_mouse_init, {0xe0, 0x80, 0x80, 0x00}, 3, 1},
- {"Logitech", CS8 | CSTOPB | STD_FLG, _EVT_logitech_init, {0xe0, 0x80, 0x80, 0x00}, 3, 3},
- {"BusMouse", STD_FLG, NULL, {0xf8, 0x80, 0x00, 0x00}, 3, 3},
- {"MouseMan", CS7 | STD_FLG, _EVT_mouse_init, {0x40, 0x40, 0x40, 0x00}, 3, 1},
- {"IntelliMouse", CS7 | STD_FLG, _EVT_pnpmouse_init, {0xc0, 0x40, 0xc0, 0x00}, 4, 1},
- {"IMPS2", CS7 | STD_FLG, NULL, {0xc0, 0x40, 0xc0, 0x00}, 4, 1}, /* ? */
- };
-
-#define NB_MICE (sizeof(mouse_infos)/sizeof(mouse_info))
-
-/* The name of the environment variables that are used to change the defaults above */
-
-#define ENV_MOUSEDRV "MGL_MOUSEDRV"
-#define ENV_MOUSEDEV "MGL_MOUSEDEV"
-#define ENV_MOUSESPD "MGL_MOUSESPD"
-#define ENV_JOYDEV0 "MGL_JOYDEV1"
-#define ENV_JOYDEV1 "MGL_JOYDEV2"
-
-/* Scancode mappings on Linux for special keys */
-
-typedef struct {
- int scan;
- int map;
- } keymap;
-
-/* TODO: Fix this and set it up so we can do a binary search! */
-
-keymap keymaps[] = {
- {96, KB_padEnter},
- {74, KB_padMinus},
- {78, KB_padPlus},
- {55, KB_padTimes},
- {98, KB_padDivide},
- {71, KB_padHome},
- {72, KB_padUp},
- {73, KB_padPageUp},
- {75, KB_padLeft},
- {76, KB_padCenter},
- {77, KB_padRight},
- {79, KB_padEnd},
- {80, KB_padDown},
- {81, KB_padPageDown},
- {82, KB_padInsert},
- {83, KB_padDelete},
- {105,KB_left},
- {108,KB_down},
- {106,KB_right},
- {103,KB_up},
- {110,KB_insert},
- {102,KB_home},
- {104,KB_pageUp},
- {111,KB_delete},
- {107,KB_end},
- {109,KB_pageDown},
- {125,KB_leftWindows},
- {126,KB_rightWindows},
- {127,KB_menu},
- {100,KB_rightAlt},
- {97,KB_rightCtrl},
- };
-
-/* And the keypad with num lock turned on (changes the ASCII code only) */
-
-keymap keypad[] = {
- {71, ASCII_7},
- {72, ASCII_8},
- {73, ASCII_9},
- {75, ASCII_4},
- {76, ASCII_5},
- {77, ASCII_6},
- {79, ASCII_1},
- {80, ASCII_2},
- {81, ASCII_3},
- {82, ASCII_0},
- {83, ASCII_period},
- };
-
-#define NB_KEYMAPS (sizeof(keymaps)/sizeof(keymaps[0]))
-#define NB_KEYPAD (sizeof(keypad)/sizeof(keypad[0]))
-
-typedef struct {
- int sample;
- char code[2];
- } sample_rate;
-
-sample_rate sampletab[]={
- { 0,"O"},
- { 15,"J"},
- { 27,"K"},
- { 42,"L"},
- { 60,"R"},
- { 85,"M"},
- {125,"Q"},
- {1E9,"N"},
- };
-
-/* Number of keycodes to read at a time from the console */
-
-#define KBDREADBUFFERSIZE 32
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Linux */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flaps)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- static uint starttime = 0;
- struct timeval t;
-
- gettimeofday(&t, NULL);
- if (starttime == 0)
- starttime = t.tv_sec * 1000 + (t.tv_usec/1000);
- return ((t.tv_sec * 1000 + (t.tv_usec/1000)) - starttime);
-}
-
-/****************************************************************************
-REMARKS:
-Small Unix function that checks for availability on a file using select()
-****************************************************************************/
-static ibool dataReady(
- int fd)
-{
- static struct timeval t = { 0L, 0L };
- fd_set fds;
-
- FD_ZERO(&fds);
- FD_SET(fd, &fds);
- return select(fd+1, &fds, NULL, NULL, &t) > 0;
-}
-
-/****************************************************************************
-REMARKS:
-Reads mouse data according to the selected mouse driver.
-****************************************************************************/
-static ibool readMouseData(
- int *buttons,
- int *dx,
- int *dy)
-{
- static uchar data[32],prev = 0;
- int cnt = 0,ret;
- mouse_info *drv;
-
- /* Read the first byte to check for the protocol */
- drv = &mouse_infos[mouse_driver];
- if (read(_EVT_mouse_fd, data, drv->read) != drv->read) {
- perror("read");
- return false;
- }
- if ((data[0] & drv->proto[0]) != drv->proto[1])
- return false;
-
- /* Load a whole protocol packet */
- cnt += drv->read;
- while (cnt < drv->packet_len) {
- ret = read(_EVT_mouse_fd, data+cnt, drv->read);
- if (ret == drv->read)
- cnt += ret;
- else {
- perror("read");
- return false;
- }
- }
- if ((data[1] & drv->proto[2]) != drv->proto[3])
- return false;
-
- /* Now decode the protocol packet */
- switch (mouse_driver) {
- case EVT_microsoft:
- if (data[0] == 0x40 && !(prev|data[1]|data[2]))
- *buttons = 2; /* Third button on MS compatible mouse */
- else
- *buttons= ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4);
- prev = *buttons;
- *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F));
- *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F));
- break;
- case EVT_ps2:
- *buttons = !!(data[0]&1) * 4 + !!(data[0]&2) * 1 + !!(data[0]&4) * 2;
- if (data[1] != 0)
- *dx = (data[0] & 0x10) ? data[1]-256 : data[1];
- else
- *dx = 0;
- if (data[2] != 0)
- *dy = -((data[0] & 0x20) ? data[2]-256 : data[2]);
- else
- *dy = 0;
- break;
- case EVT_mousesystems: case EVT_gpm:
- *buttons = (~data[0]) & 0x07;
- *dx = (char)(data[1]) + (char)(data[3]);
- *dy = -((char)(data[2]) + (char)(data[4]));
- break;
- case EVT_logitech:
- *buttons= data[0] & 0x07;
- *dx = (data[0] & 0x10) ? data[1] : - data[1];
- *dy = (data[0] & 0x08) ? - data[2] : data[2];
- break;
- case EVT_busmouse:
- *buttons= (~data[0]) & 0x07;
- *dx = (char)data[1];
- *dy = -(char)data[2];
- break;
- case EVT_MMseries:
- *buttons = data[0] & 0x07;
- *dx = (data[0] & 0x10) ? data[1] : - data[1];
- *dy = (data[0] & 0x08) ? - data[2] : data[2];
- break;
- case EVT_intellimouse:
- *buttons = ((data[0] & 0x20) >> 3) /* left */
- | ((data[3] & 0x10) >> 3) /* middle */
- | ((data[0] & 0x10) >> 4); /* right */
- *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F));
- *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F));
- break;
- case EVT_intellimouse_ps2:
- *buttons = (data[0] & 0x04) >> 1 /* Middle */
- | (data[0] & 0x02) >> 1 /* Right */
- | (data[0] & 0x01) << 2; /* Left */
- *dx = (data[0] & 0x10) ? data[1]-256 : data[1];
- *dy = (data[0] & 0x20) ? -(data[2]-256) : -data[2];
- break;
- case EVT_mouseman: {
- static int getextra;
- static uchar prev=0;
- uchar b;
-
- /* The damned MouseMan has 3/4 bytes packets. The extra byte
- * is only there if the middle button is active.
- * I get the extra byte as a packet with magic numbers in it.
- * and then switch to 4-byte mode.
- */
- if (data[1] == 0xAA && data[2] == 0x55) {
- /* Got unexpected fourth byte */
- if ((b = (*data>>4)) > 0x3)
- return false; /* just a sanity check */
- *dx = *dy = 0;
- drv->packet_len=4;
- getextra=0;
- }
- else {
- /* Got 3/4, as expected */
- /* Motion is independent of packetlen... */
- *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F));
- *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F));
- prev = ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4);
- if (drv->packet_len==4)
- b = data[3]>>4;
- }
- if (drv->packet_len == 4) {
- if (b == 0) {
- drv->packet_len = 3;
- getextra = 1;
- }
- else {
- if (b & 0x2)
- prev |= 2;
- }
- }
- *buttons = prev;
-
- /* This "chord-middle" behaviour was reported by David A. van Leeuwen */
- if (((prev ^ *buttons) & 5) == 5)
- *buttons = *buttons ? 2 : 0;
- prev = *buttons;
- break;
- }
- case EVT_noMouse:
- return false;
- break;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Map a keypress via the key mapping table
-****************************************************************************/
-static int getKeyMapping(
- keymap *tab,
- int nb,
- int key)
-{
- int i;
-
- for(i = 0; i < nb; i++) {
- if (tab[i].scan == key)
- return tab[i].map;
- }
- return key;
-}
-
-#ifdef USE_OS_JOYSTICK
-
-static char js0_axes = 0, js0_buttons = 0;
-static char js1_axes = 0, js1_buttons = 0;
-static char joystick0_dev[20] = "/dev/js0";
-static char joystick1_dev[20] = "/dev/js1";
-
-/****************************************************************************
-REMARKS:
-Create a joystick event from the joystick data
-****************************************************************************/
-static void makeJoyEvent(
- event_t *evt)
-{
- evt->message = 0;
- if (buts0 && axis0) {
- if (buts0[0]) evt->message |= EVT_JOY1_BUTTONA;
- if (buts0[1]) evt->message |= EVT_JOY1_BUTTONB;
- evt->where_x = axis0[0];
- evt->where_y = axis0[1];
- }
- else
- evt->where_x = evt->where_y = 0;
- if (buts1 && axis1) {
- if (buts1[0]) evt->message |= EVT_JOY2_BUTTONA;
- if (buts1[1]) evt->message |= EVT_JOY2_BUTTONB;
- evt->where_x = axis1[0];
- evt->where_y = axis1[1];
- }
- else
- evt->where_x = evt->where_y = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the joystick axis data
-****************************************************************************/
-int EVTAPI _EVT_readJoyAxis(
- int jmask,
- int *axis)
-{
- int mask = 0;
-
- if ((js_version & ~0xffff) == 0) {
- /* Old 0.x driver */
- struct JS_DATA_TYPE js;
- if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN) {
- if (jmask & EVT_JOY_AXIS_X1)
- axis[0] = js.x;
- if (jmask & EVT_JOY_AXIS_Y1)
- axis[1] = js.y;
- mask |= EVT_JOY_AXIS_X1|EVT_JOY_AXIS_Y1;
- }
- if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN) {
- if (jmask & EVT_JOY_AXIS_X2)
- axis[2] = js.x;
- if (jmask & EVT_JOY_AXIS_Y2)
- axis[3] = js.y;
- mask |= EVT_JOY_AXIS_X2|EVT_JOY_AXIS_Y2;
- }
- }
- else {
- if (axis0) {
- if (jmask & EVT_JOY_AXIS_X1)
- axis[0] = axis0[0];
- if (jmask & EVT_JOY_AXIS_Y1)
- axis[1] = axis0[1];
- mask |= EVT_JOY_AXIS_X1 | EVT_JOY_AXIS_Y1;
- }
- if (axis1) {
- if (jmask & EVT_JOY_AXIS_X2)
- axis[2] = axis1[0];
- if (jmask & EVT_JOY_AXIS_Y2)
- axis[3] = axis1[1];
- mask |= EVT_JOY_AXIS_X2 | EVT_JOY_AXIS_Y2;
- }
- }
- return mask;
-}
-
-/****************************************************************************
-REMARKS:
-Read the joystick button data
-****************************************************************************/
-int EVTAPI _EVT_readJoyButtons(void)
-{
- int buts = 0;
-
- if ((js_version & ~0xffff) == 0) {
- /* Old 0.x driver */
- struct JS_DATA_TYPE js;
- if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN)
- buts = js.buttons;
- if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN)
- buts |= js.buttons << 2;
- }
- else {
- if (buts0)
- buts |= EVT_JOY1_BUTTONA*buts0[0] + EVT_JOY1_BUTTONB*buts0[1];
- if (buts1)
- buts |= EVT_JOY2_BUTTONA*buts1[0] + EVT_JOY2_BUTTONB*buts1[1];
- }
- return buts;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the mask indicating what joystick axes are attached.
-
-HEADER:
-event.h
-
-REMARKS:
-This function is used to detect the attached joysticks, and determine
-what axes are present and functioning. This function will re-detect any
-attached joysticks when it is called, so if the user forgot to attach
-the joystick when the application started, you can call this function to
-re-detect any newly attached joysticks.
-
-SEE ALSO:
-EVT_joySetLowerRight, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-int EVTAPI EVT_joyIsPresent(void)
-{
- static int mask = 0;
- int i;
- char *tmp, name0[128], name1[128];
- static ibool inited = false;
-
- if (inited)
- return mask;
- memset(EVT.joyMin,0,sizeof(EVT.joyMin));
- memset(EVT.joyCenter,0,sizeof(EVT.joyCenter));
- memset(EVT.joyMax,0,sizeof(EVT.joyMax));
- memset(EVT.joyPrev,0,sizeof(EVT.joyPrev));
- EVT.joyButState = 0;
- if ((tmp = getenv(ENV_JOYDEV0)) != NULL)
- strcpy(joystick0_dev,tmp);
- if ((tmp = getenv(ENV_JOYDEV1)) != NULL)
- strcpy(joystick1_dev,tmp);
- if ((joystick0_fd = open(joystick0_dev, O_RDONLY)) < 0)
- joystick0_fd = 0;
- if ((joystick1_fd = open(joystick1_dev, O_RDONLY)) < 0)
- joystick1_fd = 0;
- if (!joystick0_fd && !joystick1_fd) /* No joysticks detected */
- return 0;
- inited = true;
- if (ioctl(joystick0_fd ? joystick0_fd : joystick1_fd, JSIOCGVERSION, &js_version) < 0)
- return 0;
-
- /* Initialise joystick 0 */
- if (joystick0_fd) {
- ioctl(joystick0_fd, JSIOCGNAME(sizeof(name0)), name0);
- if (js_version & ~0xffff) {
- struct js_event js;
-
- ioctl(joystick0_fd, JSIOCGAXES, &js0_axes);
- ioctl(joystick0_fd, JSIOCGBUTTONS, &js0_buttons);
- axis0 = PM_calloc((int)js0_axes, sizeof(short));
- buts0 = PM_malloc((int)js0_buttons);
- /* Read the initial events */
- while(dataReady(joystick0_fd)
- && read(joystick0_fd, &js, sizeof(struct js_event)) == sizeof(struct js_event)
- && (js.type & JS_EVENT_INIT)
- ) {
- if (js.type & JS_EVENT_BUTTON)
- buts0[js.number] = js.value;
- else if (js.type & JS_EVENT_AXIS)
- axis0[js.number] = scaleJoyAxis(js.value,js.number);
- }
- }
- else {
- js0_axes = 2;
- js0_buttons = 2;
- axis0 = PM_calloc((int)js0_axes, sizeof(short));
- buts0 = PM_malloc((int)js0_buttons);
- }
- }
-
- /* Initialise joystick 1 */
- if (joystick1_fd) {
- ioctl(joystick1_fd, JSIOCGNAME(sizeof(name1)), name1);
- if (js_version & ~0xffff) {
- struct js_event js;
-
- ioctl(joystick1_fd, JSIOCGAXES, &js1_axes);
- ioctl(joystick1_fd, JSIOCGBUTTONS, &js1_buttons);
- axis1 = PM_calloc((int)js1_axes, sizeof(short));
- buts1 = PM_malloc((int)js1_buttons);
- /* Read the initial events */
- while(dataReady(joystick1_fd)
- && read(joystick1_fd, &js, sizeof(struct js_event))==sizeof(struct js_event)
- && (js.type & JS_EVENT_INIT)
- ) {
- if (js.type & JS_EVENT_BUTTON)
- buts1[js.number] = js.value;
- else if (js.type & JS_EVENT_AXIS)
- axis1[js.number] = scaleJoyAxis(js.value,js.number<<2);
- }
- }
- else {
- js1_axes = 2;
- js1_buttons = 2;
- axis1 = PM_calloc((int)js1_axes, sizeof(short));
- buts1 = PM_malloc((int)js1_buttons);
- }
- }
-
-#ifdef CHECKED
- fprintf(stderr,"Using joystick driver version %d.%d.%d\n",
- js_version >> 16, (js_version >> 8) & 0xff, js_version & 0xff);
- if (joystick0_fd)
- fprintf(stderr,"Joystick 1 (%s): %s\n", joystick0_dev, name0);
- if (joystick1_fd)
- fprintf(stderr,"Joystick 2 (%s): %s\n", joystick1_dev, name1);
-#endif
- mask = _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
- if (mask) {
- for (i = 0; i < JOY_NUM_AXES; i++)
- EVT.joyMax[i] = EVT.joyCenter[i]*2;
- }
- return mask;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Polls the joystick for position and button information.
-
-HEADER:
-event.h
-
-REMARKS:
-This routine is used to poll analogue joysticks for button and position
-information. It should be called once for each main loop of the user
-application, just before processing all pending events via EVT_getNext.
-All information polled from the joystick will be posted to the event
-queue for later retrieval.
-
-Note: Most analogue joysticks will provide readings that change even
- though the joystick has not moved. Hence if you call this routine
- you will likely get an EVT_JOYMOVE event every time through your
- event loop.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight,
-EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_pollJoystick(void)
-{
- event_t evt;
- int i,axis[JOY_NUM_AXES],newButState,mask,moved,ps;
-
- if ((js_version & ~0xFFFF) == 0 && EVT.joyMask) {
- /* Read joystick axes and post movement events if they have
- * changed since the last time we polled. Until the events are
- * actually flushed, we keep modifying the same joystick movement
- * event, so you won't get multiple movement event
- */
- mask = _EVT_readJoyAxis(EVT.joyMask,axis);
- newButState = _EVT_readJoyButtons();
- moved = false;
- for (i = 0; i < JOY_NUM_AXES; i++) {
- if (mask & (EVT_JOY_AXIS_X1 << i))
- axis[i] = scaleJoyAxis(axis[i],i);
- else
- axis[i] = EVT.joyPrev[i];
- if (axis[i] != EVT.joyPrev[i])
- moved = true;
- }
- if (moved) {
- memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev));
- ps = _EVT_disableInt();
- if (EVT.oldJoyMove != -1) {
- /* Modify the existing joystick movement event */
- EVT.evtq[EVT.oldJoyMove].message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- }
- else if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick movement event */
- EVT.oldJoyMove = EVT.freeHead;
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYMOVE;
- evt.message = EVT.joyButState;
- evt.where_x = EVT.joyPrev[0];
- evt.where_y = EVT.joyPrev[1];
- evt.relative_x = EVT.joyPrev[2];
- evt.relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- }
- _EVT_restoreInt(ps);
- }
-
- /* Read the joystick buttons, and post events to reflect the change
- * in state for the joystick buttons.
- */
- if (newButState != EVT.joyButState) {
- if (EVT.count < EVENTQSIZE) {
- /* Add a new joystick movement event */
- ps = _EVT_disableInt();
- memset(&evt,0,sizeof(evt));
- evt.what = EVT_JOYCLICK;
- evt.message = newButState;
- EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0];
- EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1];
- EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2];
- EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3];
- addEvent(&evt);
- _EVT_restoreInt(ps);
- }
- EVT.joyButState = newButState;
- }
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick upper left position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the upper left
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetUpperLeft(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMin);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick lower right position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the lower right
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetLowerRight(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyMax);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick center position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the center
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joySetCenter
-****************************************************************************/
-void EVTAPI EVT_joySetCenter(void)
-{
- _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter);
-}
-#endif
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from Linux into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- event_t evt;
- int i,numkeys, c;
- ibool release;
- static struct kbentry ke;
- static char buf[KBDREADBUFFERSIZE];
- static ushort repeatKey[128] = {0};
-
- /* Poll keyboard events */
- while (dataReady(_PM_console_fd) && (numkeys = read(_PM_console_fd, buf, KBDREADBUFFERSIZE)) > 0) {
- for (i = 0; i < numkeys; i++) {
- c = buf[i];
- release = c & 0x80;
- c &= 0x7F;
-
- /* TODO: This is wrong! We need this to be the time stamp at */
- /* ** interrupt ** time!! One solution would be to */
- /* put the keyboard and mouse polling loops into */
- /* a separate thread that can block on I/O to the */
- /* necessay file descriptor. */
- evt.when = _EVT_getTicks();
-
- if (release) {
- /* Key released */
- evt.what = EVT_KEYUP;
- switch (c) {
- case KB_leftShift:
- _PM_modifiers &= ~EVT_LEFTSHIFT;
- break;
- case KB_rightShift:
- _PM_modifiers &= ~EVT_RIGHTSHIFT;
- break;
- case 29:
- _PM_modifiers &= ~(EVT_LEFTCTRL|EVT_CTRLSTATE);
- break;
- case 97: /* Control */
- _PM_modifiers &= ~EVT_CTRLSTATE;
- break;
- case 56:
- _PM_modifiers &= ~(EVT_LEFTALT|EVT_ALTSTATE);
- break;
- case 100:
- _PM_modifiers &= ~EVT_ALTSTATE;
- break;
- default:
- }
- evt.modifiers = _PM_modifiers;
- evt.message = keyUpMsg[c];
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- keyUpMsg[c] = 0;
- repeatKey[c] = 0;
- }
- else {
- /* Key pressed */
- evt.what = EVT_KEYDOWN;
- switch (c) {
- case KB_leftShift:
- _PM_modifiers |= EVT_LEFTSHIFT;
- break;
- case KB_rightShift:
- _PM_modifiers |= EVT_RIGHTSHIFT;
- break;
- case 29:
- _PM_modifiers |= EVT_LEFTCTRL|EVT_CTRLSTATE;
- break;
- case 97: /* Control */
- _PM_modifiers |= EVT_CTRLSTATE;
- break;
- case 56:
- _PM_modifiers |= EVT_LEFTALT|EVT_ALTSTATE;
- break;
- case 100:
- _PM_modifiers |= EVT_ALTSTATE;
- break;
- case KB_capsLock: /* Caps Lock */
- _PM_leds ^= LED_CAP;
- ioctl(_PM_console_fd, KDSETLED, _PM_leds);
- break;
- case KB_numLock: /* Num Lock */
- _PM_leds ^= LED_NUM;
- ioctl(_PM_console_fd, KDSETLED, _PM_leds);
- break;
- case KB_scrollLock: /* Scroll Lock */
- _PM_leds ^= LED_SCR;
- ioctl(_PM_console_fd, KDSETLED, _PM_leds);
- break;
- default:
- }
- evt.modifiers = _PM_modifiers;
- if (keyUpMsg[c]) {
- evt.what = EVT_KEYREPEAT;
- evt.message = keyUpMsg[c] | (repeatKey[c]++ << 16);
- }
- else {
- int asc;
-
- evt.message = getKeyMapping(keymaps, NB_KEYMAPS, c) << 8;
- ke.kb_index = c;
- ke.kb_table = 0;
- if ((_PM_modifiers & EVT_SHIFTKEY) || (_PM_leds & LED_CAP))
- ke.kb_table |= K_SHIFTTAB;
- if (_PM_modifiers & (EVT_LEFTALT | EVT_ALTSTATE))
- ke.kb_table |= K_ALTTAB;
- if (ioctl(_PM_console_fd, KDGKBENT, (unsigned long)&ke)<0)
- perror("ioctl(KDGKBENT)");
- if ((_PM_leds & LED_NUM) && (getKeyMapping(keypad, NB_KEYPAD, c)!=c)) {
- asc = getKeyMapping(keypad, NB_KEYPAD, c);
- }
- else {
- switch (c) {
- case 14:
- asc = ASCII_backspace;
- break;
- case 15:
- asc = ASCII_tab;
- break;
- case 28:
- case 96:
- asc = ASCII_enter;
- break;
- case 1:
- asc = ASCII_esc;
- default:
- asc = ke.kb_value & 0xFF;
- if (asc < 0x1B)
- asc = 0;
- break;
- }
- }
- if ((_PM_modifiers & (EVT_CTRLSTATE|EVT_LEFTCTRL)) && isalpha(asc))
- evt.message |= toupper(asc) - 'A' + 1;
- else
- evt.message |= asc;
- keyUpMsg[c] = evt.message;
- repeatKey[c]++;
- }
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- }
-
- /* Poll mouse events */
- if (_EVT_mouse_fd) {
- int dx, dy, buts;
- static int oldbuts;
-
- while (dataReady(_EVT_mouse_fd)) {
- if (readMouseData(&buts, &dx, &dy)) {
- EVT.mx += dx;
- EVT.my += dy;
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > range_x) EVT.mx = range_x;
- if (EVT.my > range_y) EVT.my = range_y;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = dx;
- evt.relative_y = dy;
-
- /* TODO: This is wrong! We need this to be the time stamp at */
- /* ** interrupt ** time!! One solution would be to */
- /* put the keyboard and mouse polling loops into */
- /* a separate thread that can block on I/O to the */
- /* necessay file descriptor. */
- evt.when = _EVT_getTicks();
- evt.modifiers = _PM_modifiers;
- if (buts & 4)
- evt.modifiers |= EVT_LEFTBUT;
- if (buts & 1)
- evt.modifiers |= EVT_RIGHTBUT;
- if (buts & 2)
- evt.modifiers |= EVT_MIDDLEBUT;
-
- /* Left click events */
- if ((buts&4) != (oldbuts&4)) {
- if (buts&4)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Right click events */
- if ((buts&1) != (oldbuts&1)) {
- if (buts&1)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Middle click events */
- if ((buts&2) != (oldbuts&2)) {
- if (buts&2)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_MIDDLEBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Mouse movement event */
- if (dx || dy) {
- evt.what = EVT_MOUSEMOVE;
- evt.message = 0;
- if (EVT.oldMove != -1) {
- /* Modify existing movement event */
- EVT.evtq[EVT.oldMove].where_x = evt.where_x;
- EVT.evtq[EVT.oldMove].where_y = evt.where_y;
- }
- else {
- /* Save id of this movement event */
- EVT.oldMove = EVT.freeHead;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- oldbuts = buts;
- }
- }
- }
-
-#ifdef USE_OS_JOYSTICK
- /* Poll joystick events using the 1.x joystick driver API in the 2.2 kernels */
- if (js_version & ~0xffff) {
- static struct js_event js;
-
- /* Read joystick axis 0 */
- evt.when = 0;
- evt.modifiers = _PM_modifiers;
- if (joystick0_fd && dataReady(joystick0_fd) &&
- read(joystick0_fd, &js, sizeof(js)) == sizeof(js)) {
- if (js.type & JS_EVENT_BUTTON) {
- if (js.number < 2) { /* Only 2 buttons for now :( */
- buts0[js.number] = js.value;
- evt.what = EVT_JOYCLICK;
- makeJoyEvent(&evt);
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- else if (js.type & JS_EVENT_AXIS) {
- axis0[js.number] = scaleJoyAxis(js.value,js.number);
- evt.what = EVT_JOYMOVE;
- if (EVT.oldJoyMove != -1) {
- makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]);
- }
- else if (EVT.count < EVENTQSIZE) {
- EVT.oldJoyMove = EVT.freeHead;
- makeJoyEvent(&evt);
- addEvent(&evt);
- }
- }
- }
-
- /* Read joystick axis 1 */
- if (joystick1_fd && dataReady(joystick1_fd) &&
- read(joystick1_fd, &js, sizeof(js))==sizeof(js)) {
- if (js.type & JS_EVENT_BUTTON) {
- if (js.number < 2) { /* Only 2 buttons for now :( */
- buts1[js.number] = js.value;
- evt.what = EVT_JOYCLICK;
- makeJoyEvent(&evt);
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
- else if (js.type & JS_EVENT_AXIS) {
- axis1[js.number] = scaleJoyAxis(js.value,js.number<<2);
- evt.what = EVT_JOYMOVE;
- if (EVT.oldJoyMove != -1) {
- makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]);
- }
- else if (EVT.count < EVENTQSIZE) {
- EVT.oldJoyMove = EVT.freeHead;
- makeJoyEvent(&evt);
- addEvent(&evt);
- }
- }
- }
- }
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift _PM_modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Set the speed of the serial port
-****************************************************************************/
-static int setspeed(
- int fd,
- int old,
- int new,
- unsigned short flags)
-{
- struct termios tty;
- char *c;
-
- tcgetattr(fd, &tty);
- tty.c_iflag = IGNBRK | IGNPAR;
- tty.c_oflag = 0;
- tty.c_lflag = 0;
- tty.c_line = 0;
- tty.c_cc[VTIME] = 0;
- tty.c_cc[VMIN] = 1;
- switch (old) {
- case 9600: tty.c_cflag = flags | B9600; break;
- case 4800: tty.c_cflag = flags | B4800; break;
- case 2400: tty.c_cflag = flags | B2400; break;
- case 1200:
- default: tty.c_cflag = flags | B1200; break;
- }
- tcsetattr(fd, TCSAFLUSH, &tty);
- switch (new) {
- case 9600: c = "*q"; tty.c_cflag = flags | B9600; break;
- case 4800: c = "*p"; tty.c_cflag = flags | B4800; break;
- case 2400: c = "*o"; tty.c_cflag = flags | B2400; break;
- case 1200:
- default: c = "*n"; tty.c_cflag = flags | B1200; break;
- }
- write(fd, c, 2);
- usleep(100000);
- tcsetattr(fd, TCSAFLUSH, &tty);
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Generic mouse driver init code
-****************************************************************************/
-static void _EVT_mouse_init(void)
-{
- int i;
-
- /* Change from any available speed to the chosen one */
- for (i = 9600; i >= 1200; i /= 2)
- setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags);
-}
-
-/****************************************************************************
-REMARKS:
-Logitech mouse driver init code
-****************************************************************************/
-static void _EVT_logitech_init(void)
-{
- int i;
- struct stat buf;
- int busmouse;
-
- /* is this a serial- or a bus- mouse? */
- if (fstat(_EVT_mouse_fd,&buf) == -1)
- perror("fstat");
- i = MAJOR(buf.st_rdev);
- if (stat("/dev/ttyS0",&buf) == -1)
- perror("stat");
- busmouse=(i != MAJOR(buf.st_rdev));
-
- /* Fix the howmany field, so that serial mice have 1, while busmice have 3 */
- mouse_infos[mouse_driver].read = busmouse ? 3 : 1;
-
- /* Change from any available speed to the chosen one */
- for (i = 9600; i >= 1200; i /= 2)
- setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags);
-
- /* This stuff is peculiar of logitech mice, also for the serial ones */
- write(_EVT_mouse_fd, "S", 1);
- setspeed(_EVT_mouse_fd, opt_baud, opt_baud,CS8 |PARENB |PARODD |CREAD |CLOCAL |HUPCL);
-
- /* Configure the sample rate */
- for (i = 0; opt_sample <= sampletab[i].sample; i++)
- ;
- write(_EVT_mouse_fd,sampletab[i].code,1);
-}
-
-/****************************************************************************
-REMARKS:
-Microsoft Intellimouse init code
-****************************************************************************/
-static void _EVT_pnpmouse_init(void)
-{
- struct termios tty;
-
- tcgetattr(_EVT_mouse_fd, &tty);
- tty.c_iflag = IGNBRK | IGNPAR;
- tty.c_oflag = 0;
- tty.c_lflag = 0;
- tty.c_line = 0;
- tty.c_cc[VTIME] = 0;
- tty.c_cc[VMIN] = 1;
- tty.c_cflag = mouse_infos[mouse_driver].flags | B1200;
- tcsetattr(_EVT_mouse_fd, TCSAFLUSH, &tty); /* set parameters */
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
- char *tmp;
-
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- for (i = 0; i < 256; i++)
- keyUpMsg[i] = 0;
-
- /* Keyboard initialization */
- if (_PM_console_fd == -1)
- PM_fatalError("You must first call PM_openConsole to use the EVT functions!");
- _PM_keyboard_rawmode();
- fcntl(_PM_console_fd,F_SETFL,fcntl(_PM_console_fd,F_GETFL) | O_NONBLOCK);
-
- /* Mouse initialization */
- if ((tmp = getenv(ENV_MOUSEDRV)) != NULL) {
- for (i = 0; i < NB_MICE; i++) {
- if (!strcasecmp(tmp, mouse_infos[i].name)) {
- mouse_driver = i;
- break;
- }
- }
- if (i == NB_MICE) {
- fprintf(stderr,"Unknown mouse driver: %s\n", tmp);
- mouse_driver = EVT_noMouse;
- _EVT_mouse_fd = 0;
- }
- }
- if (mouse_driver != EVT_noMouse) {
- if (mouse_driver == EVT_gpm)
- strcpy(mouse_dev,"/dev/gpmdata");
- if ((tmp = getenv(ENV_MOUSEDEV)) != NULL)
- strcpy(mouse_dev,tmp);
-#ifdef CHECKED
- fprintf(stderr,"Using the %s MGL mouse driver on %s.\n", mouse_infos[mouse_driver].name, mouse_dev);
-#endif
- if ((_EVT_mouse_fd = open(mouse_dev, O_RDWR)) < 0) {
- perror("open");
- fprintf(stderr, "Unable to open mouse device %s, dropping mouse support.\n", mouse_dev);
- sleep(1);
- mouse_driver = EVT_noMouse;
- _EVT_mouse_fd = 0;
- }
- else {
- char c;
-
- /* Init and flush the mouse pending input queue */
- if (mouse_infos[mouse_driver].init)
- mouse_infos[mouse_driver].init();
- while(dataReady(_EVT_mouse_fd) && read(_EVT_mouse_fd, &c, 1) == 1)
- ;
- }
- }
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- range_x = xRes;
- range_y = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Linux */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Linux */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- _PM_restore_kb_mode();
- if (_EVT_mouse_fd) {
- close(_EVT_mouse_fd);
- _EVT_mouse_fd = 0;
- }
-#ifdef USE_OS_JOYSTICK
- if (joystick0_fd) {
- close(joystick0_fd);
- free(axis0);
- free(buts0);
- joystick0_fd = 0;
- }
- if (joystick1_fd) {
- close(joystick1_fd);
- free(axis1);
- free(buts1);
- joystick1_fd = 0;
- }
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/event.svga b/board/MAI/bios_emulator/scitech/src/pm/linux/event.svga
deleted file mode 100644
index c0358a0..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/event.svga
+++ /dev/null
@@ -1,1058 +0,0 @@
-/****************************************************************************
-*
-* The SuperVGA Kit - UniVBE Software Development Kit
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC (MS DOS)
-*
-* Description: Routines to provide a Linux event queue, which automatically
-* handles keyboard and mouse events for the Linux compatability
-* libraries. Based on the event handling code in the MGL.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <time.h>
-#include <ctype.h>
-#include <termios.h>
-#include <signal.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include <errno.h>
-#include <sys/time.h>
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <linux/keyboard.h>
-#include <linux/kd.h>
-#include <linux/vt.h>
-#include <gpm.h>
-#include "pm.h"
-#include "vesavbe.h"
-#include "wdirect.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define EVENTQSIZE 100 /* Number of events in event queue */
-
-static int head = -1; /* Head of event queue */
-static int tail = -1; /* Tail of event queue */
-static int freeHead = -1; /* Head of free list */
-static int count = 0; /* No. of items currently in queue */
-static WD_event evtq[EVENTQSIZE]; /* The queue structure itself */
-static int oldMove = -1; /* Previous movement event */
-static int oldKey = -1; /* Previous key repeat event */
-static int mx,my; /* Current mouse position */
-static int xRes,yRes; /* Screen resolution coordinates */
-static void *stateBuf; /* Pointer to console state buffer */
-static int conn; /* GPM file descriptor for mouse handling */
-static int tty_fd; /* File descriptor for /dev/console */
-extern int tty_vc; /* Virtual console ID, from the PM/Pro library */
-static ibool key_down[128]; /* State of all keyboard keys */
-static struct termios old_conf; /* Saved terminal configuration */
-static int oldkbmode; /* and previous keyboard mode */
-struct vt_mode oldvtmode; /* Old virtual terminal mode */
-static int old_flags; /* Old flags for fcntl */
-static ulong key_modifiers; /* Keyboard modifiers */
-static int forbid_vt_release=0;/* Flag to forbid release of VT */
-static int forbid_vt_acquire=0;/* Flag to forbid cature of VT */
-static int oldmode; /* Old SVGA mode saved for VT switch*/
-static int initmode; /* Initial text mode */
-static ibool installed = false; /* True if we are installed */
-static void (_ASMAPI *moveCursor)(int x,int y) = NULL;
-static int (_ASMAPI *suspendAppCallback)(int flags) = NULL;
-
-#if 0
-/* Keyboard Translation table from scancodes to ASCII */
-
-static uchar keyTable[128] =
-"\0\0331234567890-=\010"
-"\011qwertyuiop[]\015"
-"\0asdfghjkl;'`\0\\"
-"zxcvbnm,./\0*\0 \0"
-"\0\0\0\0\0\0\0\0\0\0\0\0" /* Function keys */
-"789-456+1230.\0\0\0\0\0" /* Keypad keys */
-"\0\0\0\0\0\0\0\015\0/";
-
-static uchar keyTableShifted[128] =
-"\0\033!@#$%^&*()_+\010"
-"\011QWERTYUIOP{}\015"
-"\0ASDFGHJKL:\"~\0|"
-"ZXCVBNM<>?\0*\0 \0"
-"\0\0\0\0\0\0\0\0\0\0\0\0" /* Function keys */
-"789-456+1230.\0\0\0\0\0" /* Keypad keys */
-"\0\0\0\0\0\0\0\015\0/";
-#endif
-
-/* Macros to keep track of the CAPS and NUM lock states */
-
-#define EVT_CAPSSTATE 0x0100
-#define EVT_NUMSTATE 0x0200
-
-/* Helper macros for dealing with timers */
-
-#define TICKS_TO_USEC(t) ((t)*65536.0/1.193180)
-#define USEC_TO_TICKS(u) ((u)*1.193180/65536.0)
-
-/* Number of keycodes to read at a time from the console */
-
-#define KBDREADBUFFERSIZE 32
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Returns the current time stamp in units of 18.2 ticks per second.
-****************************************************************************/
-static ulong getTimeStamp(void)
-{
- return (ulong)(clock() / (CLOCKS_PER_SEC / 18.2));
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Event to place onto event queue
-
-REMARKS:
-Adds an event to the event queue by tacking it onto the tail of the event
-queue. This routine assumes that at least one spot is available on the
-freeList for the event to be inserted.
-****************************************************************************/
-static void addEvent(
- WD_event *evt)
-{
- int evtID;
-
- /* Get spot to place the event from the free list */
- evtID = freeHead;
- freeHead = evtq[freeHead].next;
-
- /* Add to the tail of the event queue */
- evt->next = -1;
- evt->prev = tail;
- if (tail != -1)
- evtq[tail].next = evtID;
- else
- head = evtID;
- tail = evtID;
- evtq[evtID] = *evt;
- count++;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message
-modifiers - keyboard modifiers
-x - Mouse X position at time of event
-y - Mouse Y position at time of event
-but_stat - Mouse button status at time of event
-
-REMARKS:
-Adds a new mouse event to the event queue. This routine is called from
-within the mouse interrupt subroutine, so it must be efficient.
-****************************************************************************/
-static void addMouseEvent(
- uint what,
- uint message,
- int x,
- int y,
- uint but_stat)
-{
- WD_event evt;
-
- if (count < EVENTQSIZE) {
- evt.what = what;
- evt.when = getTimeStamp();
- evt.message = message;
- evt.modifiers = but_stat | key_modifiers;
- evt.where_x = x;
- evt.where_y = y;
- fprintf(stderr, "(%d,%d), buttons %ld\n", x,y, evt.modifiers);
- addEvent(&evt); /* Add to tail of event queue */
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-scancode - Raw keyboard scan code
-modifiers - Keyboard modifiers flags
-
-REMARKS:
-Converts the raw scan code into the appropriate ASCII code using the scan
-code and the keyboard modifier flags.
-****************************************************************************/
-static ulong getKeyMessage(
- uint scancode,
- ulong modifiers)
-{
- ushort code = scancode << 8;
- ushort ascii;
- struct kbentry ke;
-
- ke.kb_index = scancode;
-
- /* Find the basic ASCII code for the scan code */
- if (modifiers & EVT_CAPSSTATE) {
- if (modifiers & EVT_SHIFTKEY)
- ke.kb_table = K_NORMTAB;
- // ascii = tolower(keyTableShifted[scancode]);
- else
- ke.kb_table = K_SHIFTTAB;
- // ascii = toupper(keyTable[scancode]);
- }
- else {
- if (modifiers & EVT_SHIFTKEY)
- ke.kb_table = K_SHIFTTAB;
- // ascii = keyTableShifted[scancode];
- else
- ke.kb_table = K_NORMTAB;
- // ascii = keyTable[scancode];
- }
- if(modifiers & EVT_ALTSTATE)
- ke.kb_table |= K_ALTTAB;
-
- if (ioctl(tty_fd, KDGKBENT, (unsigned long)&ke)) {
- fprintf(stderr, "KDGKBENT at index %d in table %d: ",
- scancode, ke.kb_table);
- return 0;
- }
- ascii = ke.kb_value;
-
- /* Add ASCII code if key is not alt'ed or ctrl'ed */
- if (!(modifiers & (EVT_ALTSTATE | EVT_CTRLSTATE)))
- code |= ascii;
-
- return code;
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-scancode - Raw scancode of keyboard event to add
-
-REMARKS:
-Adds a new keyboard event to the event queue. We only take KEYUP and
-KEYDOWN event codes, however if a key is already down we convert the KEYDOWN
-to a KEYREPEAT.
-****************************************************************************/
-static void addKeyEvent(
- uint what,
- uint scancode)
-{
- WD_event evt;
-
- if (count < EVENTQSIZE) {
- evt.what = what;
- evt.when = getTimeStamp();
- evt.message = getKeyMessage(scancode,key_modifiers) | 0x10000UL;
- evt.where_x = evt.where_y = 0;
- evt.modifiers = key_modifiers;
- if (evt.what == EVT_KEYUP)
- key_down[scancode] = false;
- else if (evt.what == EVT_KEYDOWN) {
- if (key_down[scancode]) {
- if (oldKey != -1) {
- evtq[oldKey].message += 0x10000UL;
- }
- else {
- evt.what = EVT_KEYREPEAT;
- oldKey = freeHead;
- addEvent(&evt);
- oldMove = -1;
- }
- return;
- }
- key_down[scancode] = true;
- }
-
- addEvent(&evt);
- oldMove = -1;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-sig - Signal being sent to this signal handler
-
-REMARKS:
-Signal handler for the timer. This routine takes care of periodically
-posting timer events to the event queue.
-****************************************************************************/
-void timerHandler(
- int sig)
-{
- WD_event evt;
-
- if (sig == SIGALRM) {
- if (count < EVENTQSIZE) {
- evt.when = getTimeStamp();
- evt.what = EVT_TIMERTICK;
- evt.message = 0;
- evt.where_x = evt.where_y = 0;
- evt.modifiers = 0;
- addEvent(&evt);
- oldMove = -1;
- oldKey = -1;
- }
- signal(SIGALRM, timerHandler);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Restore the terminal to normal operation on exit
-****************************************************************************/
-static void restore_term(void)
-{
- RMREGS regs;
-
- if (installed) {
- /* Restore text mode and the state of the console */
- regs.x.ax = 0x3;
- PM_int86(0x10,®s,®s);
- PM_restoreConsoleState(stateBuf,tty_fd);
-
- /* Restore console to normal operation */
- ioctl(tty_fd, VT_SETMODE, &oldvtmode);
- ioctl(tty_fd, KDSKBMODE, oldkbmode);
- tcsetattr(tty_fd, TCSAFLUSH, &old_conf);
- fcntl(tty_fd,F_SETFL,old_flags &= ~O_NONBLOCK);
- PM_closeConsole(tty_fd);
-
- /* Close the mouse driver */
- close(conn);
-
- /* Flag that we are not no longer installed */
- installed = false;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Signal handler to capture forced program termination conditions so that
-we can clean up properly.
-****************************************************************************/
-static void exitHandler(int sig)
-{
- exit(-1);
-}
-
-/****************************************************************************
-REMARKS:
-Sleep until the virtual terminal is active
-****************************************************************************/
-void wait_vt_active(void)
-{
- while (ioctl(tty_fd, VT_WAITACTIVE, tty_vc) < 0) {
- if ((errno != EAGAIN) && (errno != EINTR)) {
- perror("ioctl(VT_WAITACTIVE)");
- exit(1);
- }
- usleep(150000);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Signal handler called when our virtual terminal has been released and we are
-losing the active focus.
-****************************************************************************/
-static void release_vt_signal(int n)
-{
- forbid_vt_acquire = 1;
- if (forbid_vt_release) {
- forbid_vt_acquire = 0;
- ioctl(tty_fd, VT_RELDISP, 0);
- return;
- }
-
- // TODO: Call the user supplied suspendAppCallback and restore text
- // mode (saving the existing mode so we can restore it).
- //
- // Also if the suspendAppCallback is NULL then we have to
- // ignore the switch request!
- if(suspendAppCallback){
- oldmode = VBE_getVideoMode();
- suspendAppCallback(true);
- VBE_setVideoMode(initmode);
- }
-
- ioctl(tty_fd, VT_RELDISP, 1);
- forbid_vt_acquire = 0;
- wait_vt_active();
-}
-
-/****************************************************************************
-REMARKS:
-Signal handler called when our virtual terminal has been re-aquired and we
-are now regaiing the active focus.
-****************************************************************************/
-static void acquire_vt_signal(int n)
-{
- forbid_vt_release = 1;
- if (forbid_vt_acquire) {
- forbid_vt_release = 0;
- return;
- }
-
- // TODO: Restore the old display mode, call the user suspendAppCallback
- // and and we will be back in graphics mode.
-
- if(suspendAppCallback){
- VBE_setVideoMode(oldmode);
- suspendAppCallback(false);
- }
-
- ioctl(tty_fd, VT_RELDISP, VT_ACKACQ);
- forbid_vt_release = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the action for a specific signal to call our signal handler.
-****************************************************************************/
-static void set_sigaction(int sig,void (*handler)(int))
-{
- struct sigaction siga;
-
- siga.sa_handler = handler;
- siga.sa_flags = SA_RESTART;
- memset(&(siga.sa_mask), 0, sizeof(sigset_t));
- sigaction(sig, &siga, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Function to take over control of VT switching so that we can capture
-virtual terminal release and aquire signals, allowing us to properly
-support VT switching while in graphics modes.
-****************************************************************************/
-static void take_vt_control(void)
-{
- struct vt_mode vtmode;
-
- ioctl(tty_fd, VT_GETMODE, &vtmode);
- oldvtmode = vtmode;
- vtmode.mode = VT_PROCESS;
- vtmode.relsig = SIGUSR1;
- vtmode.acqsig = SIGUSR2;
- set_sigaction(SIGUSR1, release_vt_signal);
- set_sigaction(SIGUSR2, acquire_vt_signal);
- ioctl(tty_fd, VT_SETMODE, &oldvtmode);
-}
-
-/****************************************************************************
-REMARKS:
-Set the shift keyboard LED's based on the current keyboard modifiers flags.
-****************************************************************************/
-static void updateLEDStatus(void)
-{
- int state = 0;
- if (key_modifiers & EVT_CAPSSTATE)
- state |= LED_CAP;
- if (key_modifiers & EVT_NUMSTATE)
- state |= LED_NUM;
- ioctl(tty_fd,KDSETLED,state);
-}
-
-/****************************************************************************
-PARAMETERS:
-scancode - Raw scan code to handle
-
-REMARKS:
-Handles the shift key modifiers and keeps track of the shift key states
-so that we can return the correct ASCII codes for the keyboard.
-****************************************************************************/
-static void toggleModifiers(
- int scancode)
-{
- static int caps_down = 0,num_down = 0;
-
- if (scancode & 0x80) {
- /* Handle key-release function */
- scancode &= 0x7F;
- if (scancode == 0x2A || scancode == 0x36)
- key_modifiers &= ~EVT_SHIFTKEY;
- else if (scancode == 0x1D || scancode == 0x61)
- key_modifiers &= ~EVT_CTRLSTATE;
- else if (scancode == 0x38 || scancode == 0x64)
- key_modifiers &= ~EVT_ALTSTATE;
- else if (scancode == 0x3A)
- caps_down = false;
- else if (scancode == 0x45)
- num_down = false;
- }
- else {
- /* Handle key-down function */
- scancode &= 0x7F;
- if (scancode == 0x2A || scancode == 0x36)
- key_modifiers |= EVT_SHIFTKEY;
- else if (scancode == 0x1D || scancode == 0x61)
- key_modifiers |= EVT_CTRLSTATE;
- else if (scancode == 0x38 || scancode == 0x64)
- key_modifiers |= EVT_ALTSTATE;
- else if (scancode == 0x3A) {
- if (!caps_down) {
- key_modifiers ^= EVT_CAPSSTATE;
- updateLEDStatus();
- }
- caps_down = true;
- }
- else if (scancode == 0x45) {
- if (!num_down) {
- key_modifiers ^= EVT_NUMSTATE;
- updateLEDStatus();
- }
- num_down = true;
- }
- }
-}
-
-/***************************************************************************
-REMARKS:
-Returns the number of bits that have changed from 0 to 1
-(a negative value means the number of bits that have changed from 1 to 0)
- **************************************************************************/
-static int compareBits(short a, short b)
-{
- int ret = 0;
- if( (a&1) != (b&1) ) ret += (b&1) ? 1 : -1;
- if( (a&2) != (b&2) ) ret += (b&2) ? 1 : -1;
- if( (a&4) != (b&4) ) ret += (b&4) ? 1 : -1;
- return ret;
-}
-
-/***************************************************************************
-REMARKS:
-Turns off all keyboard state because we can't rely on them anymore as soon
-as we switch VT's
-***************************************************************************/
-static void keyboard_clearstate(void)
-{
- key_modifiers = 0;
- memset(key_down, 0, sizeof(key_down));
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all events from the console event queue into the WinDirect event queue.
-****************************************************************************/
-static void pumpEvents(void)
-{
- static uchar buf[KBDREADBUFFERSIZE];
- static char data[5];
- static int old_buts, old_mx, old_my;
- static struct timeval t;
- fd_set fds;
- int numkeys,i;
- int dx, dy, buts;
-
- /* Read all pending keypresses from keyboard buffer and process */
- while ((numkeys = read(tty_fd, buf, KBDREADBUFFERSIZE)) > 0) {
- for (i = 0; i < numkeys; i++) {
- toggleModifiers(buf[i]);
- if (key_modifiers & EVT_ALTSTATE){
- int fkey = 0;
-
- // Do VT switching here for Alt+Fx keypresses
- switch(buf[i] & 0x7F){
- case 59 ... 68: /* F1 to F10 */
- fkey = (buf[i] & 0x7F) - 58;
- break;
- case 87: /* F11 */
- case 88: /* F12 */
- fkey = (buf[i] & 0x7F) - 76;
- break;
- }
- if(fkey){
- struct vt_stat vts;
- ioctl(tty_fd, VT_GETSTATE, &vts);
-
- if(fkey != vts.v_active){
- keyboard_clearstate();
- ioctl(tty_fd, VT_ACTIVATE, fkey);
- }
- }
- }
-
- if (buf[i] & 0x80)
- addKeyEvent(EVT_KEYUP,buf[i] & 0x7F);
- else
- addKeyEvent(EVT_KEYDOWN,buf[i] & 0x7F);
- }
-
- // TODO: If we want to handle VC switching we will need to do it
- // in here so that we can switch away from the VC and then
- // switch back to it later. Right now VC switching is disabled
- // and in order to enable it we need to save/restore the state
- // of the graphics screen (using the suspendAppCallback and
- // saving/restoring the state of the current display mode).
-
- }
-
- /* Read all pending mouse events and process them */
- if(conn > 0){
- FD_ZERO(&fds);
- FD_SET(conn, &fds);
- t.tv_sec = t.tv_usec = 0L;
- while (select(conn+1, &fds, NULL, NULL, &t) > 0) {
- if(read(conn, data, 5) == 5){
- buts = (~data[0]) & 0x07;
- dx = (char)(data[1]) + (char)(data[3]);
- dy = -((char)(data[2]) + (char)(data[4]));
-
- mx += dx; my += dy;
-
- if (dx || dy)
- addMouseEvent(EVT_MOUSEMOVE, 0, mx, my, buts);
-
- if (buts != old_buts){
- int c = compareBits(buts,old_buts);
- if(c>0)
- addMouseEvent(EVT_MOUSEDOWN, 0, mx, my, buts);
- else if(c<0)
- addMouseEvent(EVT_MOUSEUP, 0, mx, my, buts);
- }
- old_mx = mx; old_my = my;
- old_buts = buts;
- FD_SET(conn, &fds);
- t.tv_sec = t.tv_usec = 0L;
- }
- }
- }
-}
-
-/*------------------------ Public interface routines ----------------------*/
-
-/****************************************************************************
-PARAMETERS:
-which - Which code for event to post
-what - Event code for event to post
-message - Event message
-modifiers - Shift key/mouse button modifiers
-
-RETURNS:
-True if the event was posted, false if queue is full.
-
-REMARKS:
-Posts an event to the event queue. This routine can be used to post any type
-of event into the queue.
-****************************************************************************/
-ibool _WDAPI WD_postEvent(
- ulong which,
- uint what,
- ulong message,
- ulong modifiers)
-{
- WD_event evt;
-
- if (count < EVENTQSIZE) {
- /* Save information in event record */
- evt.which = which;
- evt.what = what;
- evt.when = getTimeStamp();
- evt.message = message;
- evt.modifiers = modifiers;
- addEvent(&evt); /* Add to tail of event queue */
- return true;
- }
- else
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-mask - Event mask to use
-
-REMARKS:
-Flushes all the event specified in 'mask' from the event queue.
-****************************************************************************/
-void _WDAPI WD_flushEvent(
- uint mask)
-{
- WD_event evt;
-
- do { /* Flush all events */
- WD_getEvent(&evt,mask);
- } while (evt.what != EVT_NULLEVT);
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Place to store event
-mask - Event mask to use
-
-REMARKS:
-Halts program execution until a specified event occurs. The event is
-returned. All pending events not in the specified mask will be ignored and
-removed from the queue.
-****************************************************************************/
-void _WDAPI WD_haltEvent(
- WD_event *evt,
- uint mask)
-{
- do { /* Wait for an event */
- WD_getEvent(evt,EVT_EVERYEVT);
- } while (!(evt->what & mask));
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Place to store event
-mask - Event mask to use
-
-RETURNS:
-True if an event was pending.
-
-REMARKS:
-Retrieves the next pending event defined in 'mask' from the event queue.
-The event queue is adjusted to reflect the new state after the event has
-been removed.
-****************************************************************************/
-ibool _WDAPI WD_getEvent(
- WD_event *evt,
- uint mask)
-{
- int evtID,next,prev;
-
- pumpEvents();
- if (moveCursor)
- moveCursor(mx,my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
-
- if (count) {
- for (evtID = head; evtID != -1; evtID = evtq[evtID].next) {
- if (evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1)
- return false; /* Event was not found */
- next = evtq[evtID].next;
- prev = evtq[evtID].prev;
- if (prev != -1)
- evtq[prev].next = next;
- else
- head = next;
- if (next != -1)
- evtq[next].prev = prev;
- else
- tail = prev;
- *evt = evtq[evtID]; /* Return the event */
- evtq[evtID].next = freeHead; /* and return to free list */
- freeHead = evtID;
- count--;
- if (evt->what == EVT_MOUSEMOVE)
- oldMove = -1;
- if (evt->what == EVT_KEYREPEAT)
- oldKey = -1;
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Place to store event
-mask - Event mask to use
-
-RETURNS:
-True if an event is pending.
-
-REMARKS:
-Peeks at the next pending event defined in 'mask' in the event queue. The
-event is not removed from the event queue.
-****************************************************************************/
-ibool _WDAPI WD_peekEvent(
- WD_event *evt,
- uint mask)
-{
- int evtID;
-
- pumpEvents();
- if (moveCursor)
- moveCursor(mx,my); /* Move the mouse cursor */
- evt->what = EVT_NULLEVT; /* Default to null event */
-
- if (count) {
- for (evtID = head; evtID != -1; evtID = evtq[evtID].next) {
- if (evtq[evtID].what & mask)
- break; /* Found an event */
- }
- if (evtID == -1)
- return false; /* Event was not found */
-
- *evt = evtq[evtID]; /* Return the event */
- }
- return evt->what != EVT_NULLEVT;
-}
-
-/****************************************************************************
-PARAMETERS:
-hwndMain - Handle to main window
-_xRes - X resolution of graphics mode to be used
-_yRes - Y resolulion of graphics mode to be used
-
-RETURNS:
-Handle to the fullscreen event window if (we return hwndMain on Linux)
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling
-ISR to be called whenever any button's are pressed or released. We also
-build the free list of events in the event queue.
-****************************************************************************/
-WD_HWND _WDAPI WD_startFullScreen(
- WD_HWND hwndMain,
- int _xRes,
- int _yRes)
-{
- int i;
- struct termios conf;
- if (!installed) {
- Gpm_Connect gpm;
-
- /* Build free list, and initialise global data structures */
- for (i = 0; i < EVENTQSIZE; i++)
- evtq[i].next = i+1;
- evtq[EVENTQSIZE-1].next = -1; /* Terminate list */
- count = freeHead = 0;
- head = tail = -1;
- oldMove = -1;
- oldKey = -1;
- xRes = _xRes;
- yRes = _yRes;
-
- /* Open the console device and initialise it for raw mode */
- tty_fd = PM_openConsole();
-
- /* Wait until virtual terminal is active and take over control */
- wait_vt_active();
- take_vt_control();
-
- /* Initialise keyboard handling to raw mode */
- if (ioctl(tty_fd, KDGKBMODE, &oldkbmode)) {
- printf("WD_startFullScreen: cannot get keyboard mode.\n");
- exit(-1);
- }
- old_flags = fcntl(tty_fd,F_GETFL);
- fcntl(tty_fd,F_SETFL,old_flags |= O_NONBLOCK);
- tcgetattr(tty_fd, &conf);
- old_conf = conf;
- conf.c_lflag &= ~(ICANON | ECHO | ECHOE | ECHOK | ECHONL | NOFLSH | ISIG);
- conf.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | BRKINT | PARMRK | INPCK | IUCLC | IXON | IXOFF);
- conf.c_iflag |= (IGNBRK | IGNPAR);
- conf.c_cc[VMIN] = 1;
- conf.c_cc[VTIME] = 0;
- conf.c_cc[VSUSP] = 0;
- tcsetattr(tty_fd, TCSAFLUSH, &conf);
- ioctl(tty_fd, KDSKBMODE, K_MEDIUMRAW);
-
- /* Clear the keyboard state information */
- memset(key_down, 0, sizeof(key_down));
- ioctl(tty_fd,KDSETLED,key_modifiers = 0);
-
- /* Initialize the mouse connection
- The user *MUST* run gpm with the option -R for this to work (or have a MouseSystems mouse)
- */
- if(Gpm_Open(&gpm,0) > 0){ /* GPM available */
- if ((conn = open(GPM_NODE_FIFO,O_RDONLY|O_SYNC)) < 0)
- fprintf(stderr,"WD_startFullScreen: Can't open mouse connection.\n");
- }else{
- fprintf(stderr,"Warning: when not using gpm -R, only MouseSystems mice are currently supported.\n");
- if ((conn = open("/dev/mouse",O_RDONLY|O_SYNC)) < 0)
- fprintf(stderr,"WD_startFullScreen: Can't open /dev/mouse.\n");
- }
- Gpm_Close();
-
- /* TODO: Scale the mouse coordinates to the specific resolution */
-
- /* Save the state of the console */
- if ((stateBuf = malloc(PM_getConsoleStateSize())) == NULL) {
- printf("Out of memory!\n");
- exit(-1);
- }
- PM_saveConsoleState(stateBuf,tty_fd);
- initmode = VBE_getVideoMode();
-
- /* Initialize the signal handler for timer events */
- signal(SIGALRM, timerHandler);
-
- /* Capture termination signals so we can clean up properly */
- signal(SIGTERM, exitHandler);
- signal(SIGINT, exitHandler);
- signal(SIGQUIT, exitHandler);
- atexit(restore_term);
-
- /* Signal that we are installed */
- installed = true;
- }
- return hwndMain;
-}
-
-/****************************************************************************
-REMARKS:
-Lets the library know when fullscreen graphics mode has been initialized so
-that we can properly scale the mouse driver coordinates.
-****************************************************************************/
-void _WDAPI WD_inFullScreen(void)
-{
- /* Nothing to do in here */
-}
-
-/****************************************************************************
-REMARKS:
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void _WDAPI WD_restoreGDI(void)
-{
- restore_term();
-}
-
-/****************************************************************************
-PARAMETERS:
-ticks - Number of ticks between timer tick messages
-
-RETURNS:
-Previous value for the timer tick event spacing.
-
-REMARKS:
-The event module will automatically generate periodic timer tick events for
-you, with 'ticks' between each event posting. If you set the value of
-'ticks' to 0, the timer tick events are turned off.
-****************************************************************************/
-int _WDAPI WD_setTimerTick(
- int ticks)
-{
- int old;
- struct itimerval tim;
- long ms = TICKS_TO_USEC(ticks);
-
- getitimer(ITIMER_REAL, &tim);
- old = USEC_TO_TICKS(tim.it_value.tv_sec*1000000.0 + tim.it_value.tv_usec);
- tim.it_interval.tv_sec = ms / 1000000;
- tim.it_interval.tv_usec = ms % 1000000;
- setitimer(ITIMER_REAL, &tim, NULL);
- return old;
-}
-
-/****************************************************************************
-PARAMETERS:
-saveState - Address of suspend app callback to register
-
-REMARKS:
-Registers a user application supplied suspend application callback so that
-we can properly handle virtual terminal switching.
-****************************************************************************/
-void _WDAPI WD_setSuspendAppCallback(
- int (_ASMAPI *saveState)(int flags))
-{
- suspendAppCallback = saveState;
-}
-
-/****************************************************************************
-PARAMETERS:
-x - New X coordinate to move the mouse cursor to
-y - New Y coordinate to move the mouse cursor to
-
-REMARKS:
-Moves to mouse cursor to the specified coordinate.
-****************************************************************************/
-void _WDAPI WD_setMousePos(
- int x,
- int y)
-{
- mx = x;
- my = y;
-}
-
-/****************************************************************************
-PARAMETERS:
-x - Place to store X coordinate of mouse cursor
-y - Place to store Y coordinate of mouse cursor
-
-REMARKS:
-Reads the current mouse cursor location int *screen* coordinates.
-****************************************************************************/
-void _WDAPI WD_getMousePos(
- int *x,
- int *y)
-{
- *x = mx;
- *y = my;
-}
-
-/****************************************************************************
-PARAMETERS:
-mcb - Address of mouse callback function
-
-REMARKS:
-Registers an application supplied mouse callback function that is called
-whenever the mouse cursor moves.
-****************************************************************************/
-void _WDAPI WD_setMouseCallback(
- void (_ASMAPI *mcb)(int x,int y))
-{
- moveCursor = mcb;
-}
-
-/****************************************************************************
-PARAMETERS:
-xRes - New X resolution of graphics mode
-yRes - New Y resolution of graphics mode
-
-REMARKS:
-This is called to inform the event handling code that the screen resolution
-has changed so that the mouse coordinates can be scaled appropriately.
-****************************************************************************/
-void _WDAPI WD_changeResolution(
- int xRes,
- int yRes)
-{
- // Gpm_FitValues(xRes, yRes); // ??
-}
-
-/****************************************************************************
-PARAMETERS:
-scancode - Scan code to check if a key is down
-
-REMARKS:
-Determines if a particular key is down based on the scan code for the key.
-****************************************************************************/
-ibool _WDAPI WD_isKeyDown(
- uchar scancode)
-{
- return key_down[scancode];
-}
-
-/****************************************************************************
-REMARKS:
-Determines if the application needs to run in safe mode. Not necessary for
-anything but broken Windows 95 display drivers so we return false for
-Linux.
-****************************************************************************/
-int _WDAPI WD_isSafeMode(void)
-{
- return false;
-}
-
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h
deleted file mode 100644
index eadedfb..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Include all the OS specific header files.
-*
-****************************************************************************/
-
-#include <fcntl.h>
-#include <sys/time.h>
-#include <sys/ioctl.h>
-#include <sys/stat.h>
-#include <time.h>
-#include <linux/keyboard.h>
-#include <linux/kd.h>
-#include <linux/vt.h>
-#include <linux/fs.h>
-#ifdef USE_OS_JOYSTICK
-#include <linux/joystick.h>
-#endif
-#include <termios.h>
-#include <signal.h>
-#include <unistd.h>
-#include <ctype.h>
-#include <stdlib.h>
-
-/* Internal global variables */
-
-extern int _PM_console_fd,_PM_leds,_PM_modifiers;
-
-/* Internal function prototypes */
-
-void _PM_restore_kb_mode(void);
-void _PM_keyboard_rawmode(void);
-
-/* Linux needs the generic joystick scaling code */
-
-#define NEED_SCALE_JOY_AXIS
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c b/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c
deleted file mode 100644
index c12a835..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c
+++ /dev/null
@@ -1,1809 +0,0 @@
-;/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Portions copyright (C) Josh Vanderhoof
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <sys/mman.h>
-#include <sys/kd.h>
-#include <sys/ioctl.h>
-#include <sys/stat.h>
-#include <sys/vt.h>
-#include <sys/wait.h>
-#include <sys/types.h>
-#include <sys/time.h>
-#include <unistd.h>
-#include <termios.h>
-#include <fcntl.h>
-#include <syscall.h>
-#include <signal.h>
-#include <time.h>
-#include <ctype.h>
-#include <errno.h>
-#include <asm/io.h>
-#include <asm/types.h>
-#ifdef ENABLE_MTRR
-#include <asm/mtrr.h>
-#endif
-#include <asm/vm86.h>
-#ifdef __GLIBC__
-#include <sys/perm.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define REAL_MEM_BASE ((void *)0x10000)
-#define REAL_MEM_SIZE 0x10000
-#define REAL_MEM_BLOCKS 0x100
-#define DEFAULT_VM86_FLAGS (IF_MASK | IOPL_MASK)
-#define DEFAULT_STACK_SIZE 0x1000
-#define RETURN_TO_32_INT 255
-
-/* Quick and dirty fix for vm86() syscall from lrmi 0.6 */
-static int
-vm86(struct vm86_struct *vm)
- {
- int r;
-#ifdef __PIC__
- asm volatile (
- "pushl %%ebx\n\t"
- "movl %2, %%ebx\n\t"
- "int $0x80\n\t"
- "popl %%ebx"
- : "=a" (r)
- : "0" (113), "r" (vm));
-#else
- asm volatile (
- "int $0x80"
- : "=a" (r)
- : "0" (113), "b" (vm));
-#endif
- return r;
- }
-
-
-static struct {
- int ready;
- unsigned short ret_seg, ret_off;
- unsigned short stack_seg, stack_off;
- struct vm86_struct vm;
- } context = {0};
-
-struct mem_block {
- unsigned int size : 20;
- unsigned int free : 1;
- };
-
-static struct {
- int ready;
- int count;
- struct mem_block blocks[REAL_MEM_BLOCKS];
- } mem_info = {0};
-
-int _PM_console_fd = -1;
-int _PM_leds = 0,_PM_modifiers = 0;
-static ibool inited = false;
-static int tty_vc = 0;
-static int console_count = 0;
-static int startup_vc;
-static int fd_mem = 0;
-static ibool in_raw_mode = false;
-#ifdef ENABLE_MTRR
-static int mtrr_fd;
-#endif
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-#ifdef TRACE_IO
-static ulong traceAddr;
-#endif
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef TRACE_IO
-extern void printk(char *msg,...);
-#endif
-
-static inline void port_out(int value, int port)
-{
-#ifdef TRACE_IO
- printk("%04X:%04X: outb.%04X <- %02X\n", traceAddr >> 16, traceAddr & 0xFFFF, (ushort)port, (uchar)value);
-#endif
- asm volatile ("outb %0,%1"
- ::"a" ((unsigned char) value), "d"((unsigned short) port));
-}
-
-static inline void port_outw(int value, int port)
-{
-#ifdef TRACE_IO
- printk("%04X:%04X: outw.%04X <- %04X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ushort)value);
-#endif
- asm volatile ("outw %0,%1"
- ::"a" ((unsigned short) value), "d"((unsigned short) port));
-}
-
-static inline void port_outl(int value, int port)
-{
-#ifdef TRACE_IO
- printk("%04X:%04X: outl.%04X <- %08X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ulong)value);
-#endif
- asm volatile ("outl %0,%1"
- ::"a" ((unsigned long) value), "d"((unsigned short) port));
-}
-
-static inline unsigned int port_in(int port)
-{
- unsigned char value;
- asm volatile ("inb %1,%0"
- :"=a" ((unsigned char)value)
- :"d"((unsigned short) port));
-#ifdef TRACE_IO
- printk("%04X:%04X: inb.%04X -> %02X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (uchar)value);
-#endif
- return value;
-}
-
-static inline unsigned int port_inw(int port)
-{
- unsigned short value;
- asm volatile ("inw %1,%0"
- :"=a" ((unsigned short)value)
- :"d"((unsigned short) port));
-#ifdef TRACE_IO
- printk("%04X:%04X: inw.%04X -> %04X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ushort)value);
-#endif
- return value;
-}
-
-static inline unsigned int port_inl(int port)
-{
- unsigned long value;
- asm volatile ("inl %1,%0"
- :"=a" ((unsigned long)value)
- :"d"((unsigned short) port));
-#ifdef TRACE_IO
- printk("%04X:%04X: inl.%04X -> %08X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ulong)value);
-#endif
- return value;
-}
-
-static int real_mem_init(void)
-{
- void *m;
- int fd_zero;
-
- if (mem_info.ready)
- return 1;
-
- if ((fd_zero = open("/dev/zero", O_RDONLY)) == -1)
- PM_fatalError("You must have root privledges to run this program!");
- if ((m = mmap((void *)REAL_MEM_BASE, REAL_MEM_SIZE,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, fd_zero, 0)) == (void *)-1) {
- close(fd_zero);
- PM_fatalError("You must have root privledges to run this program!");
- }
- mem_info.ready = 1;
- mem_info.count = 1;
- mem_info.blocks[0].size = REAL_MEM_SIZE;
- mem_info.blocks[0].free = 1;
- return 1;
-}
-
-static void insert_block(int i)
-{
- memmove(
- mem_info.blocks + i + 1,
- mem_info.blocks + i,
- (mem_info.count - i) * sizeof(struct mem_block));
- mem_info.count++;
-}
-
-static void delete_block(int i)
-{
- mem_info.count--;
-
- memmove(
- mem_info.blocks + i,
- mem_info.blocks + i + 1,
- (mem_info.count - i) * sizeof(struct mem_block));
-}
-
-static inline void set_bit(unsigned int bit, void *array)
-{
- unsigned char *a = array;
- a[bit / 8] |= (1 << (bit % 8));
-}
-
-static inline unsigned int get_int_seg(int i)
-{
- return *(unsigned short *)(i * 4 + 2);
-}
-
-static inline unsigned int get_int_off(int i)
-{
- return *(unsigned short *)(i * 4);
-}
-
-static inline void pushw(unsigned short i)
-{
- struct vm86_regs *r = &context.vm.regs;
- r->esp -= 2;
- *(unsigned short *)(((unsigned int)r->ss << 4) + r->esp) = i;
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return true; }
-
-void PMAPI PM_init(void)
-{
- void *m;
- uint r_seg,r_off;
-
- if (inited)
- return;
-
- /* Map the Interrupt Vectors (0x0 - 0x400) + BIOS data (0x400 - 0x502)
- * and the physical framebuffer and ROM images from (0xa0000 - 0x100000)
- */
- real_mem_init();
- if (!fd_mem && (fd_mem = open("/dev/mem", O_RDWR)) == -1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0, 0x502,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, fd_mem, 0)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0xA0000, 0xC0000 - 0xA0000,
- PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_SHARED, fd_mem, 0xA0000)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0xC0000, 0xD0000 - 0xC0000,
- PROT_READ | PROT_WRITE | PROT_EXEC,
- MAP_FIXED | MAP_PRIVATE, fd_mem, 0xC0000)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- if ((m = mmap((void *)0xD0000, 0x100000 - 0xD0000,
- PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_SHARED, fd_mem, 0xD0000)) == (void *)-1) {
- PM_fatalError("You must have root privileges to run this program!");
- }
- inited = 1;
-
- /* Allocate a stack */
- m = PM_allocRealSeg(DEFAULT_STACK_SIZE,&r_seg,&r_off);
- context.stack_seg = r_seg;
- context.stack_off = r_off+DEFAULT_STACK_SIZE;
-
- /* Allocate the return to 32 bit routine */
- m = PM_allocRealSeg(2,&r_seg,&r_off);
- context.ret_seg = r_seg;
- context.ret_off = r_off;
- ((uchar*)m)[0] = 0xCD; /* int opcode */
- ((uchar*)m)[1] = RETURN_TO_32_INT;
- memset(&context.vm, 0, sizeof(context.vm));
-
- /* Enable kernel emulation of all ints except RETURN_TO_32_INT */
- memset(&context.vm.int_revectored, 0, sizeof(context.vm.int_revectored));
- set_bit(RETURN_TO_32_INT, &context.vm.int_revectored);
- context.ready = 1;
-#ifdef ENABLE_MTRR
- mtrr_fd = open("/dev/cpu/mtrr", O_RDWR, 0);
- if (mtrr_fd < 0)
- mtrr_fd = open("/proc/mtrr", O_RDWR, 0);
-#endif
- /* Enable I/O permissions to directly access I/O ports. We break the
- * allocation into two parts, one for the ports from 0-0x3FF and
- * another for the remaining ports up to 0xFFFF. Standard Linux kernels
- * only allow the first 0x400 ports to be enabled, so to enable all
- * 65536 ports you need a patched kernel that will enable the full
- * 8Kb I/O permissions bitmap.
- */
-#ifndef TRACE_IO
- ioperm(0x0,0x400,1);
- ioperm(0x400,0x10000-0x400,1);
-#endif
- iopl(3);
-}
-
-long PMAPI PM_getOSType(void)
-{ return _OS_LINUX; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- fflush(stderr);
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/* New raw console based getch and kbhit functions */
-
-#define KB_CAPS LED_CAP /* 4 */
-#define KB_NUMLOCK LED_NUM /* 2 */
-#define KB_SCROLL LED_SCR /* 1 */
-#define KB_SHIFT 8
-#define KB_CONTROL 16
-#define KB_ALT 32
-
-/* Structure used to save the keyboard mode to disk. We save it to disk
- * so that we can properly restore the mode later if the program crashed.
- */
-
-typedef struct {
- struct termios termios;
- int kb_mode;
- int leds;
- int flags;
- int startup_vc;
- } keyboard_mode;
-
-/* Name of the file used to save keyboard mode information */
-
-#define KBMODE_DAT "kbmode.dat"
-
-/****************************************************************************
-REMARKS:
-Open the keyboard mode file on disk.
-****************************************************************************/
-static FILE *open_kb_mode(
- char *mode,
- char *path)
-{
- if (!PM_findBPD("graphics.bpd",path))
- return NULL;
- PM_backslash(path);
- strcat(path,KBMODE_DAT);
- return fopen(path,mode);
-}
-
-/****************************************************************************
-REMARKS:
-Restore the keyboard to normal mode
-****************************************************************************/
-void _PM_restore_kb_mode(void)
-{
- FILE *kbmode;
- keyboard_mode mode;
- char path[PM_MAX_PATH];
-
- if (_PM_console_fd != -1 && (kbmode = open_kb_mode("rb",path)) != NULL) {
- if (fread(&mode,1,sizeof(mode),kbmode) == sizeof(mode)) {
- if (mode.startup_vc > 0)
- ioctl(_PM_console_fd, VT_ACTIVATE, mode.startup_vc);
- ioctl(_PM_console_fd, KDSKBMODE, mode.kb_mode);
- ioctl(_PM_console_fd, KDSETLED, mode.leds);
- tcsetattr(_PM_console_fd, TCSAFLUSH, &mode.termios);
- fcntl(_PM_console_fd,F_SETFL,mode.flags);
- }
- fclose(kbmode);
- unlink(path);
- in_raw_mode = false;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _PM_abort(
- int signo)
-{
- char buf[80];
-
- sprintf(buf,"Terminating on signal %d",signo);
- _PM_restore_kb_mode();
- PM_fatalError(buf);
-}
-
-/****************************************************************************
-REMARKS:
-Put the keyboard into raw mode
-****************************************************************************/
-void _PM_keyboard_rawmode(void)
-{
- struct termios conf;
- FILE *kbmode;
- keyboard_mode mode;
- char path[PM_MAX_PATH];
- int i;
- static int sig_list[] = {
- SIGHUP,
- SIGINT,
- SIGQUIT,
- SIGILL,
- SIGTRAP,
- SIGABRT,
- SIGIOT,
- SIGBUS,
- SIGFPE,
- SIGKILL,
- SIGSEGV,
- SIGTERM,
- };
-
- if ((kbmode = open_kb_mode("rb",path)) == NULL) {
- if ((kbmode = open_kb_mode("wb",path)) == NULL)
- PM_fatalError("Unable to open kbmode.dat file for writing!");
- if (ioctl(_PM_console_fd, KDGKBMODE, &mode.kb_mode))
- perror("KDGKBMODE");
- ioctl(_PM_console_fd, KDGETLED, &mode.leds);
- _PM_leds = mode.leds & 0xF;
- _PM_modifiers = 0;
- tcgetattr(_PM_console_fd, &mode.termios);
- conf = mode.termios;
- conf.c_lflag &= ~(ICANON | ECHO | ISIG);
- conf.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | BRKINT | PARMRK | INPCK | IUCLC | IXON | IXOFF);
- conf.c_iflag |= (IGNBRK | IGNPAR);
- conf.c_cc[VMIN] = 1;
- conf.c_cc[VTIME] = 0;
- conf.c_cc[VSUSP] = 0;
- tcsetattr(_PM_console_fd, TCSAFLUSH, &conf);
- mode.flags = fcntl(_PM_console_fd,F_GETFL);
- if (ioctl(_PM_console_fd, KDSKBMODE, K_MEDIUMRAW))
- perror("KDSKBMODE");
- atexit(_PM_restore_kb_mode);
- for (i = 0; i < sizeof(sig_list)/sizeof(sig_list[0]); i++)
- signal(sig_list[i], _PM_abort);
- mode.startup_vc = startup_vc;
- if (fwrite(&mode,1,sizeof(mode),kbmode) != sizeof(mode))
- PM_fatalError("Error writing kbmode.dat!");
- fclose(kbmode);
- in_raw_mode = true;
- }
-}
-
-int PMAPI PM_kbhit(void)
-{
- fd_set s;
- struct timeval tv = { 0, 0 };
-
- if (console_count == 0)
- PM_fatalError("You *must* open a console before using PM_kbhit!");
- if (!in_raw_mode)
- _PM_keyboard_rawmode();
- FD_ZERO(&s);
- FD_SET(_PM_console_fd, &s);
- return select(_PM_console_fd+1, &s, NULL, NULL, &tv) > 0;
-}
-
-int PMAPI PM_getch(void)
-{
- static uchar c;
- int release;
- static struct kbentry ke;
-
- if (console_count == 0)
- PM_fatalError("You *must* open a console before using PM_getch!");
- if (!in_raw_mode)
- _PM_keyboard_rawmode();
- while (read(_PM_console_fd, &c, 1) > 0) {
- release = c & 0x80;
- c &= 0x7F;
- if (release) {
- switch(c){
- case 42: case 54: /* Shift */
- _PM_modifiers &= ~KB_SHIFT;
- break;
- case 29: case 97: /* Control */
- _PM_modifiers &= ~KB_CONTROL;
- break;
- case 56: case 100: /* Alt / AltGr */
- _PM_modifiers &= ~KB_ALT;
- break;
- }
- continue;
- }
- switch (c) {
- case 42: case 54: /* Shift */
- _PM_modifiers |= KB_SHIFT;
- break;
- case 29: case 97: /* Control */
- _PM_modifiers |= KB_CONTROL;
- break;
- case 56: case 100: /* Alt / AltGr */
- _PM_modifiers |= KB_ALT;
- break;
- case 58: /* Caps Lock */
- _PM_modifiers ^= KB_CAPS;
- ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7);
- break;
- case 69: /* Num Lock */
- _PM_modifiers ^= KB_NUMLOCK;
- ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7);
- break;
- case 70: /* Scroll Lock */
- _PM_modifiers ^= KB_SCROLL;
- ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7);
- break;
- case 28:
- return 0x1C;
- default:
- ke.kb_index = c;
- ke.kb_table = 0;
- if ((_PM_modifiers & KB_SHIFT) || (_PM_modifiers & KB_CAPS))
- ke.kb_table |= K_SHIFTTAB;
- if (_PM_modifiers & KB_ALT)
- ke.kb_table |= K_ALTTAB;
- ioctl(_PM_console_fd, KDGKBENT, (ulong)&ke);
- c = ke.kb_value & 0xFF;
- return c;
- }
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Sleep until the virtual terminal is active
-****************************************************************************/
-static void wait_vt_active(
- int _PM_console_fd)
-{
- while (ioctl(_PM_console_fd, VT_WAITACTIVE, tty_vc) < 0) {
- if ((errno != EAGAIN) && (errno != EINTR)) {
- perror("ioctl(VT_WAITACTIVE)");
- exit(1);
- }
- usleep(150000);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Checks the owner of the specified virtual console.
-****************************************************************************/
-static int check_owner(
- int vc)
-{
- struct stat sbuf;
- char fname[30];
-
- sprintf(fname, "/dev/tty%d", vc);
- if ((stat(fname, &sbuf) >= 0) && (getuid() == sbuf.st_uid))
- return 1;
- printf("You must be the owner of the current console to use this program.\n");
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Checks if the console is currently in graphics mode, and if so we forcibly
-restore it back to text mode again. This handles the case when a Nucleus or
-MGL program crashes and leaves the console in graphics mode. Running the
-textmode utility (or any other Nucleus/MGL program) via a telnet session
-into the machine will restore it back to normal.
-****************************************************************************/
-static void restore_text_console(
- int console_id)
-{
- if (ioctl(console_id, KDSETMODE, KD_TEXT) < 0)
- LOGWARN("ioctl(KDSETMODE) failed");
- _PM_restore_kb_mode();
-}
-
-/****************************************************************************
-REMARKS:
-Opens up the console device for output by finding an appropriate virutal
-console that we can run on.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- struct vt_mode vtm;
- struct vt_stat vts;
- struct stat sbuf;
- char fname[30];
-
- /* Check if we have already opened the console */
- if (console_count++)
- return _PM_console_fd;
-
- /* Now, it would be great if we could use /dev/tty and see what it is
- * connected to. Alas, we cannot find out reliably what VC /dev/tty is
- * bound to. Thus we parse stdin through stderr for a reliable VC.
- */
- startup_vc = 0;
- for (_PM_console_fd = 0; _PM_console_fd < 3; _PM_console_fd++) {
- if (fstat(_PM_console_fd, &sbuf) < 0)
- continue;
- if (ioctl(_PM_console_fd, VT_GETMODE, &vtm) < 0)
- continue;
- if ((sbuf.st_rdev & 0xFF00) != 0x400)
- continue;
- if (!(sbuf.st_rdev & 0xFF))
- continue;
- tty_vc = sbuf.st_rdev & 0xFF;
- restore_text_console(_PM_console_fd);
- return _PM_console_fd;
- }
- if ((_PM_console_fd = open("/dev/console", O_RDWR)) < 0) {
- printf("open_dev_console: can't open /dev/console \n");
- exit(1);
- }
- if (ioctl(_PM_console_fd, VT_OPENQRY, &tty_vc) < 0)
- goto Error;
- if (tty_vc <= 0)
- goto Error;
- sprintf(fname, "/dev/tty%d", tty_vc);
- close(_PM_console_fd);
-
- /* Change our control terminal */
- setsid();
-
- /* We must use RDWR to allow for output... */
- if (((_PM_console_fd = open(fname, O_RDWR)) >= 0) &&
- (ioctl(_PM_console_fd, VT_GETSTATE, &vts) >= 0)) {
- if (!check_owner(vts.v_active))
- goto Error;
- restore_text_console(_PM_console_fd);
-
- /* Success, redirect all stdios */
- fflush(stdin);
- fflush(stdout);
- fflush(stderr);
- close(0);
- close(1);
- close(2);
- dup(_PM_console_fd);
- dup(_PM_console_fd);
- dup(_PM_console_fd);
-
- /* clear screen and switch to it */
- fwrite("\e[H\e[J", 6, 1, stderr);
- fflush(stderr);
- if (tty_vc != vts.v_active) {
- startup_vc = vts.v_active;
- ioctl(_PM_console_fd, VT_ACTIVATE, tty_vc);
- wait_vt_active(_PM_console_fd);
- }
- }
- return _PM_console_fd;
-
-Error:
- if (_PM_console_fd > 2)
- close(_PM_console_fd);
- console_count = 0;
- PM_fatalError(
- "Not running in a graphics capable console,\n"
- "and unable to find one.\n");
- return -1;
-}
-
-#define FONT_C 0x10000 /* 64KB for font data */
-
-/****************************************************************************
-REMARKS:
-Returns the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- if (!inited)
- PM_init();
- return PM_getVGAStateSize() + FONT_C*2;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the Linux console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
-{
- uchar *regs = stateBuf;
-
- /* Save the current console font */
- if (ioctl(console_id,GIO_FONT,®s[PM_getVGAStateSize()]) < 0)
- perror("ioctl(GIO_FONT)");
-
- /* Inform the Linux console that we are going into graphics mode */
- if (ioctl(console_id, KDSETMODE, KD_GRAPHICS) < 0)
- perror("ioctl(KDSETMODE)");
-
- /* Save state of VGA registers */
- PM_saveVGAState(stateBuf);
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* TODO: Implement support for allowing console switching! */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the state of the Linux console.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND console_id)
-{
- const uchar *regs = stateBuf;
-
- /* Restore the state of the VGA compatible registers */
- PM_restoreVGAState(stateBuf);
-
- /* Inform the Linux console that we are back from graphics modes */
- if (ioctl(console_id, KDSETMODE, KD_TEXT) < 0)
- LOGWARN("ioctl(KDSETMODE) failed");
-
- /* Restore the old console font */
- if (ioctl(console_id,PIO_FONT,®s[PM_getVGAStateSize()]) < 0)
- LOGWARN("ioctl(KDSETMODE) failed");
-
- /* Coming back from graphics mode on Linux also restored the previous
- * text mode console contents, so we need to clear the screen to get
- * around this since the cursor does not get homed by our code.
- */
- fflush(stdout);
- fflush(stderr);
- printf("\033[H\033[J");
- fflush(stdout);
-}
-
-/****************************************************************************
-REMARKS:
-Close the Linux console and put it back to normal.
-****************************************************************************/
-void PMAPI PM_closeConsole(PM_HWND _PM_console_fd)
-{
- /* Restore console to normal operation */
- if (--console_count == 0) {
- /* Re-activate the original virtual console */
- if (startup_vc > 0)
- ioctl(_PM_console_fd, VT_ACTIVATE, startup_vc);
-
- /* Close the console file descriptor */
- if (_PM_console_fd > 2)
- close(_PM_console_fd);
- _PM_console_fd = -1;
- }
-}
-
-void PM_setOSCursorLocation(int x,int y)
-{
- /* Nothing to do in here */
-}
-
-/****************************************************************************
-REMARKS:
-Set the screen width and height for the Linux console.
-****************************************************************************/
-void PM_setOSScreenWidth(int width,int height)
-{
- struct winsize ws;
- struct vt_sizes vs;
-
- /* Resize the software terminal */
- ws.ws_col = width;
- ws.ws_row = height;
- ioctl(_PM_console_fd, TIOCSWINSZ, &ws);
-
- /* And the hardware */
- vs.v_rows = height;
- vs.v_cols = width;
- vs.v_scrollsize = 0;
- ioctl(_PM_console_fd, VT_RESIZE, &vs);
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
-{
- /* TODO: Implement this for Linux */
- return false;
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- /* TODO: Implement this for Linux */
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Implement this for Linux */
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return '/'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return PM_getNucleusConfigPath(); }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- char *env = getenv("NUCLEUS_PATH");
- return env ? env : "/usr/lib/nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-const char * PMAPI PM_getMachineName(void)
-{
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- static uchar *zeroPtr = NULL;
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- /* PM_init maps in the 0xA0000 framebuffer region 1:1 with our
- * address mapping, so we can return the address here.
- */
- if (!inited)
- PM_init();
- return (void*)(0xA0000);
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- uchar *p;
- ulong baseAddr,baseOfs;
-
- if (!inited)
- PM_init();
- if (base >= 0xA0000 && base < 0x100000)
- return (void*)base;
- if (!fd_mem && (fd_mem = open("/dev/mem", O_RDWR)) == -1)
- return NULL;
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to mmap. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = base & 4095;
- baseAddr = base & ~4095;
- limit = ((limit+baseOfs+1+4095) & ~4095)-1;
- if ((p = mmap(0, limit+1,
- PROT_READ | PROT_WRITE, MAP_SHARED,
- fd_mem, baseAddr)) == (void *)-1)
- return NULL;
- return (void*)(p+baseOfs);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- if ((ulong)ptr >= 0x100000)
- munmap(ptr,limit+1);
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress)
-{
- /* TODO: This function should find a range of physical addresses */
- /* for a linear address. */
- return false;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- /* PM_init maps in the 0xA0000-0x100000 region 1:1 with our
- * address mapping, as well as all memory blocks in a 1:1 address
- * mapping so we can simply return the physical address in here.
- */
- if (!inited)
- PM_init();
- return (void*)MK_PHYS(r_seg,r_off);
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- int i;
- char *r = (char *)REAL_MEM_BASE;
-
- if (!inited)
- PM_init();
- if (!mem_info.ready)
- return NULL;
- if (mem_info.count == REAL_MEM_BLOCKS)
- return NULL;
- size = (size + 15) & ~15;
- for (i = 0; i < mem_info.count; i++) {
- if (mem_info.blocks[i].free && size < mem_info.blocks[i].size) {
- insert_block(i);
- mem_info.blocks[i].size = size;
- mem_info.blocks[i].free = 0;
- mem_info.blocks[i + 1].size -= size;
- *r_seg = (uint)(r) >> 4;
- *r_off = (uint)(r) & 0xF;
- return (void *)r;
- }
- r += mem_info.blocks[i].size;
- }
- return NULL;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- int i;
- char *r = (char *)REAL_MEM_BASE;
-
- if (!mem_info.ready)
- return;
- i = 0;
- while (mem != (void *)r) {
- r += mem_info.blocks[i].size;
- i++;
- if (i == mem_info.count)
- return;
- }
- mem_info.blocks[i].free = 1;
- if (i + 1 < mem_info.count && mem_info.blocks[i + 1].free) {
- mem_info.blocks[i].size += mem_info.blocks[i + 1].size;
- delete_block(i + 1);
- }
- if (i - 1 >= 0 && mem_info.blocks[i - 1].free) {
- mem_info.blocks[i - 1].size += mem_info.blocks[i].size;
- delete_block(i);
- }
-}
-
-#define DIRECTION_FLAG (1 << 10)
-
-static void em_ins(int size)
-{
- unsigned int edx, edi;
-
- edx = context.vm.regs.edx & 0xffff;
- edi = context.vm.regs.edi & 0xffff;
- edi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; insl; cld"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else if (size == 2)
- asm volatile ("std; insw; cld"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else
- asm volatile ("std; insb; cld"
- : "=D" (edi) : "d" (edx), "0" (edi));
- }
- else {
- if (size == 4)
- asm volatile ("cld; insl"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else if (size == 2)
- asm volatile ("cld; insw"
- : "=D" (edi) : "d" (edx), "0" (edi));
- else
- asm volatile ("cld; insb"
- : "=D" (edi) : "d" (edx), "0" (edi));
- }
- edi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.edi &= 0xffff0000;
- context.vm.regs.edi |= edi & 0xffff;
-}
-
-static void em_rep_ins(int size)
-{
- unsigned int ecx, edx, edi;
-
- ecx = context.vm.regs.ecx & 0xffff;
- edx = context.vm.regs.edx & 0xffff;
- edi = context.vm.regs.edi & 0xffff;
- edi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; rep; insl; cld"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else if (size == 2)
- asm volatile ("std; rep; insw; cld"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else
- asm volatile ("std; rep; insb; cld"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- }
- else {
- if (size == 4)
- asm volatile ("cld; rep; insl"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else if (size == 2)
- asm volatile ("cld; rep; insw"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- else
- asm volatile ("cld; rep; insb"
- : "=D" (edi), "=c" (ecx)
- : "d" (edx), "0" (edi), "1" (ecx));
- }
-
- edi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.edi &= 0xffff0000;
- context.vm.regs.edi |= edi & 0xffff;
- context.vm.regs.ecx &= 0xffff0000;
- context.vm.regs.ecx |= ecx & 0xffff;
-}
-
-static void em_outs(int size)
-{
- unsigned int edx, esi;
-
- edx = context.vm.regs.edx & 0xffff;
- esi = context.vm.regs.esi & 0xffff;
- esi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; outsl; cld"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else if (size == 2)
- asm volatile ("std; outsw; cld"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else
- asm volatile ("std; outsb; cld"
- : "=S" (esi) : "d" (edx), "0" (esi));
- }
- else {
- if (size == 4)
- asm volatile ("cld; outsl"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else if (size == 2)
- asm volatile ("cld; outsw"
- : "=S" (esi) : "d" (edx), "0" (esi));
- else
- asm volatile ("cld; outsb"
- : "=S" (esi) : "d" (edx), "0" (esi));
- }
-
- esi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.esi &= 0xffff0000;
- context.vm.regs.esi |= esi & 0xffff;
-}
-
-static void em_rep_outs(int size)
-{
- unsigned int ecx, edx, esi;
-
- ecx = context.vm.regs.ecx & 0xffff;
- edx = context.vm.regs.edx & 0xffff;
- esi = context.vm.regs.esi & 0xffff;
- esi += (unsigned int)context.vm.regs.ds << 4;
- if (context.vm.regs.eflags & DIRECTION_FLAG) {
- if (size == 4)
- asm volatile ("std; rep; outsl; cld"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else if (size == 2)
- asm volatile ("std; rep; outsw; cld"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else
- asm volatile ("std; rep; outsb; cld"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- }
- else {
- if (size == 4)
- asm volatile ("cld; rep; outsl"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else if (size == 2)
- asm volatile ("cld; rep; outsw"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- else
- asm volatile ("cld; rep; outsb"
- : "=S" (esi), "=c" (ecx)
- : "d" (edx), "0" (esi), "1" (ecx));
- }
-
- esi -= (unsigned int)context.vm.regs.ds << 4;
- context.vm.regs.esi &= 0xffff0000;
- context.vm.regs.esi |= esi & 0xffff;
- context.vm.regs.ecx &= 0xffff0000;
- context.vm.regs.ecx |= ecx & 0xffff;
-}
-
-static int emulate(void)
-{
- unsigned char *insn;
- struct {
- unsigned int size : 1;
- unsigned int rep : 1;
- } prefix = { 0, 0 };
- int i = 0;
-
- insn = (unsigned char *)((unsigned int)context.vm.regs.cs << 4);
- insn += context.vm.regs.eip;
-
- while (1) {
-#ifdef TRACE_IO
- traceAddr = ((ulong)context.vm.regs.cs << 16) + context.vm.regs.eip + i;
-#endif
- if (insn[i] == 0x66) {
- prefix.size = 1 - prefix.size;
- i++;
- }
- else if (insn[i] == 0xf3) {
- prefix.rep = 1;
- i++;
- }
- else if (insn[i] == 0xf0 || insn[i] == 0xf2
- || insn[i] == 0x26 || insn[i] == 0x2e
- || insn[i] == 0x36 || insn[i] == 0x3e
- || insn[i] == 0x64 || insn[i] == 0x65
- || insn[i] == 0x67) {
- /* these prefixes are just ignored */
- i++;
- }
- else if (insn[i] == 0x6c) {
- if (prefix.rep)
- em_rep_ins(1);
- else
- em_ins(1);
- i++;
- break;
- }
- else if (insn[i] == 0x6d) {
- if (prefix.rep) {
- if (prefix.size)
- em_rep_ins(4);
- else
- em_rep_ins(2);
- }
- else {
- if (prefix.size)
- em_ins(4);
- else
- em_ins(2);
- }
- i++;
- break;
- }
- else if (insn[i] == 0x6e) {
- if (prefix.rep)
- em_rep_outs(1);
- else
- em_outs(1);
- i++;
- break;
- }
- else if (insn[i] == 0x6f) {
- if (prefix.rep) {
- if (prefix.size)
- em_rep_outs(4);
- else
- em_rep_outs(2);
- }
- else {
- if (prefix.size)
- em_outs(4);
- else
- em_outs(2);
- }
- i++;
- break;
- }
- else if (insn[i] == 0xec) {
- *((uchar*)&context.vm.regs.eax) = port_in(context.vm.regs.edx);
- i++;
- break;
- }
- else if (insn[i] == 0xed) {
- if (prefix.size)
- *((ulong*)&context.vm.regs.eax) = port_inl(context.vm.regs.edx);
- else
- *((ushort*)&context.vm.regs.eax) = port_inw(context.vm.regs.edx);
- i++;
- break;
- }
- else if (insn[i] == 0xee) {
- port_out(context.vm.regs.eax,context.vm.regs.edx);
- i++;
- break;
- }
- else if (insn[i] == 0xef) {
- if (prefix.size)
- port_outl(context.vm.regs.eax,context.vm.regs.edx);
- else
- port_outw(context.vm.regs.eax,context.vm.regs.edx);
- i++;
- break;
- }
- else
- return 0;
- }
-
- context.vm.regs.eip += i;
- return 1;
-}
-
-static void debug_info(int vret)
-{
- int i;
- unsigned char *p;
-
- fputs("vm86() failed\n", stderr);
- fprintf(stderr, "return = 0x%x\n", vret);
- fprintf(stderr, "eax = 0x%08lx\n", context.vm.regs.eax);
- fprintf(stderr, "ebx = 0x%08lx\n", context.vm.regs.ebx);
- fprintf(stderr, "ecx = 0x%08lx\n", context.vm.regs.ecx);
- fprintf(stderr, "edx = 0x%08lx\n", context.vm.regs.edx);
- fprintf(stderr, "esi = 0x%08lx\n", context.vm.regs.esi);
- fprintf(stderr, "edi = 0x%08lx\n", context.vm.regs.edi);
- fprintf(stderr, "ebp = 0x%08lx\n", context.vm.regs.ebp);
- fprintf(stderr, "eip = 0x%08lx\n", context.vm.regs.eip);
- fprintf(stderr, "cs = 0x%04x\n", context.vm.regs.cs);
- fprintf(stderr, "esp = 0x%08lx\n", context.vm.regs.esp);
- fprintf(stderr, "ss = 0x%04x\n", context.vm.regs.ss);
- fprintf(stderr, "ds = 0x%04x\n", context.vm.regs.ds);
- fprintf(stderr, "es = 0x%04x\n", context.vm.regs.es);
- fprintf(stderr, "fs = 0x%04x\n", context.vm.regs.fs);
- fprintf(stderr, "gs = 0x%04x\n", context.vm.regs.gs);
- fprintf(stderr, "eflags = 0x%08lx\n", context.vm.regs.eflags);
- fputs("cs:ip = [ ", stderr);
- p = (unsigned char *)((context.vm.regs.cs << 4) + (context.vm.regs.eip & 0xffff));
- for (i = 0; i < 16; ++i)
- fprintf(stderr, "%02x ", (unsigned int)p[i]);
- fputs("]\n", stderr);
- fflush(stderr);
-}
-
-static int run_vm86(void)
-{
- unsigned int vret;
-
- for (;;) {
- vret = vm86(&context.vm);
- if (VM86_TYPE(vret) == VM86_INTx) {
- unsigned int v = VM86_ARG(vret);
- if (v == RETURN_TO_32_INT)
- return 1;
- pushw(context.vm.regs.eflags);
- pushw(context.vm.regs.cs);
- pushw(context.vm.regs.eip);
- context.vm.regs.cs = get_int_seg(v);
- context.vm.regs.eip = get_int_off(v);
- context.vm.regs.eflags &= ~(VIF_MASK | TF_MASK);
- continue;
- }
- if (VM86_TYPE(vret) != VM86_UNKNOWN)
- break;
- if (!emulate())
- break;
- }
- debug_info(vret);
- return 0;
-}
-
-#define IND(ereg) context.vm.regs.ereg = regs->ereg
-#define OUTD(ereg) regs->ereg = context.vm.regs.ereg
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IND(eax); IND(ebx); IND(ecx); IND(edx); IND(esi); IND(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(intno);
- context.vm.regs.eip = get_int_off(intno);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUTD(eax); OUTD(ebx); OUTD(ecx); OUTD(edx); OUTD(esi); OUTD(edi);
- regs->flags = context.vm.regs.eflags;
-}
-
-#define IN(ereg) context.vm.regs.ereg = in->e.ereg
-#define OUT(ereg) out->e.ereg = context.vm.regs.ereg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(intno);
- context.vm.regs.eip = get_int_off(intno);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = context.vm.regs.eflags & 1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- if (!inited)
- PM_init();
- if (intno == 0x21) {
- time_t today = time(NULL);
- struct tm *t;
- t = localtime(&today);
- out->x.cx = t->tm_year + 1900;
- out->h.dh = t->tm_mon + 1;
- out->h.dl = t->tm_mday;
- }
- else {
- unsigned int seg, off;
- seg = get_int_seg(intno);
- off = get_int_off(intno);
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = seg;
- context.vm.regs.eip = off;
- context.vm.regs.es = sregs->es;
- context.vm.regs.ds = sregs->ds;
- context.vm.regs.fs = sregs->fs;
- context.vm.regs.gs = sregs->gs;
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = context.vm.regs.es;
- sregs->ds = context.vm.regs.ds;
- sregs->fs = context.vm.regs.fs;
- sregs->gs = context.vm.regs.gs;
- out->x.cflag = context.vm.regs.eflags & 1;
- }
- return out->e.eax;
-}
-
-#define OUTR(ereg) in->e.ereg = context.vm.regs.ereg
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = seg;
- context.vm.regs.eip = off;
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- context.vm.regs.es = sregs->es;
- context.vm.regs.ds = sregs->ds;
- context.vm.regs.fs = sregs->fs;
- context.vm.regs.gs = sregs->gs;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- OUTR(eax); OUTR(ebx); OUTR(ecx); OUTR(edx); OUTR(esi); OUTR(edi);
- sregs->es = context.vm.regs.es;
- sregs->ds = context.vm.regs.ds;
- sregs->fs = context.vm.regs.fs;
- sregs->gs = context.vm.regs.gs;
- in->x.cflag = context.vm.regs.eflags & 1;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- FILE *mem = fopen("/proc/meminfo","r");
- char buf[1024];
-
- fgets(buf,1024,mem);
- fgets(buf,1024,mem);
- sscanf(buf,"Mem: %*d %*d %ld", physical);
- fgets(buf,1024,mem);
- sscanf(buf,"Swap: %*d %*d %ld", total);
- fclose(mem);
- *total += *physical;
-}
-
-void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16M)
-{
- /* TODO: Implement this for Linux */
- return NULL;
-}
-
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
- /* TODO: Implement this for Linux */
-}
-
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- /* TODO: Implement this for Linux */
- return NULL;
-}
-
-void PMAPI PM_freePage(
- void *p)
-{
- /* TODO: Implement this for Linux */
-}
-
-void PMAPI PM_setBankA(int bank)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- context.vm.regs.eax = 0x4F05;
- context.vm.regs.ebx = 0x0000;
- context.vm.regs.edx = bank;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
-}
-
-void PMAPI PM_setBankAB(int bank)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- context.vm.regs.eax = 0x4F05;
- context.vm.regs.ebx = 0x0000;
- context.vm.regs.edx = bank;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
- context.vm.regs.eax = 0x4F05;
- context.vm.regs.ebx = 0x0001;
- context.vm.regs.edx = bank;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
-}
-
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
-{
- if (!inited)
- PM_init();
- memset(&context.vm.regs, 0, sizeof(context.vm.regs));
- context.vm.regs.eax = 0x4F07;
- context.vm.regs.ebx = waitVRT;
- context.vm.regs.ecx = x;
- context.vm.regs.edx = y;
- context.vm.regs.eflags = DEFAULT_VM86_FLAGS;
- context.vm.regs.cs = get_int_seg(0x10);
- context.vm.regs.eip = get_int_off(0x10);
- context.vm.regs.ss = context.stack_seg;
- context.vm.regs.esp = context.stack_off;
- pushw(DEFAULT_VM86_FLAGS);
- pushw(context.ret_seg);
- pushw(context.ret_off);
- run_vm86();
-}
-
-int PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type)
-{
-#ifdef ENABLE_MTRR
- struct mtrr_sentry sentry;
-
- if (mtrr_fd < 0)
- return PM_MTRR_ERR_NO_OS_SUPPORT;
- sentry.base = base;
- sentry.size = length;
- sentry.type = type;
- if (ioctl(mtrr_fd, MTRRIOC_ADD_ENTRY, &sentry) == -1) {
- /* TODO: Need to decode MTRR error codes!! */
- return PM_MTRR_NOT_SUPPORTED;
- }
- return PM_MTRR_ERR_OK;
-#else
- return PM_MTRR_ERR_NO_OS_SUPPORT;
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-callback - Function to callback with write combine information
-
-REMARKS:
-Function to enumerate all write combine regions currently enabled for the
-processor.
-****************************************************************************/
-int PMAPI PM_enumWriteCombine(
- PM_enumWriteCombine_t callback)
-{
-#ifdef ENABLE_MTRR
- struct mtrr_gentry gentry;
-
- if (mtrr_fd < 0)
- return PM_MTRR_ERR_NO_OS_SUPPORT;
-
- for (gentry.regnum = 0; ioctl (mtrr_fd, MTRRIOC_GET_ENTRY, &gentry) == 0;
- ++gentry.regnum) {
- if (gentry.size > 0) {
- /* WARNING: This code assumes that the types in pmapi.h match the ones */
- /* in the Linux kernel (mtrr.h) */
- callback(gentry.base, gentry.size, gentry.type);
- }
- }
-
- return PM_MTRR_ERR_OK;
-#else
- return PM_MTRR_ERR_NO_OS_SUPPORT;
-#endif
-}
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *copyOfBIOS,
- ulong BIOSLen)
-{
- char *bios_ptr = (char*)0xC0000;
- char *old_bios;
- ulong Current10, Current6D, *rvec = 0;
- RMREGS regs;
- RMSREGS sregs;
-
- /* The BIOS is mapped to 0xC0000 with a private memory mapping enabled
- * which means we have a copy on write scheme. Hence we simply copy
- * the secondary BIOS image over the top of the old one.
- */
- if (!inited)
- PM_init();
- if ((old_bios = PM_malloc(BIOSLen)) == NULL)
- return false;
- if (BIOSPhysAddr != 0xC0000) {
- memcpy(old_bios,bios_ptr,BIOSLen);
- memcpy(bios_ptr,copyOfBIOS,BIOSLen);
- }
-
- /* The interrupt vectors should already be mmap()'ed from 0-0x400 in PM_init */
- Current10 = rvec[0x10];
- Current6D = rvec[0x6D];
-
- /* POST the secondary BIOS */
- rvec[0x10] = rvec[0x42]; /* Restore int 10h to STD-BIOS */
- regs.x.ax = axVal;
- PM_callRealMode(0xC000,0x0003,®s,&sregs);
-
- /* Restore interrupt vectors */
- rvec[0x10] = Current10;
- rvec[0x6D] = Current6D;
-
- /* Restore original BIOS image */
- if (BIOSPhysAddr != 0xC0000)
- memcpy(bios_ptr,old_bios,BIOSLen);
- PM_free(old_bios);
- return true;
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- /* TODO: Move the IOPL switching into this function!! */
- return level;
-}
-
-void PMAPI PM_flushTLB(void)
-{
- /* Do nothing on Linux. */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/linux/vflat.c
deleted file mode 100644
index 579ef2c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/linux/ztimer.c
deleted file mode 100644
index 1b9bae2..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/linux/ztimer.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux
-*
-* Description: Linux specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-#include <unistd.h>
-#include <sys/time.h>
-#include "pmapi.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-}
-
-/****************************************************************************
-REMARKS:
-Use the gettimeofday() function to get microsecond precision (probably less
-though)
-****************************************************************************/
-static inline ulong __ULZReadTime(void)
-{
- struct timeval t;
- gettimeofday(&t, NULL);
- return t.tv_sec*1000000 + t.tv_usec;
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-#define __LZTimerOn(tm) tm->start.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-#define __LZTimerLap(tm) (__ULZReadTime() - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) tm->end.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) (tm->end.low - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/makefile b/board/MAI/bios_emulator/scitech/src/pm/makefile
deleted file mode 100644
index 265f0e3..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/makefile
+++ /dev/null
@@ -1,290 +0,0 @@
-#############################################################################
-#
-# Copyright (C) 1996 SciTech Software.
-# All rights reserved.
-#
-# Descripton: Generic makefile for the PM library. Builds the library
-# file and all test programs.
-#
-#############################################################################
-
-.IMPORT .IGNORE : DEBUG_AGP_DRIVER TEST_HARNESS DEBUG_SDDPMI
-
-#----------------------------------------------------------------------------
-# Add DOS extender dependant flags to command line
-#----------------------------------------------------------------------------
-
-CFLAGS += $(DX_CFLAGS)
-ASFLAGS += $(DX_ASFLAGS)
-NO_PMLIB := 1
-
-#----------------------------------------------------------------------------
-# Include definitions specific for the target system
-#----------------------------------------------------------------------------
-
-.IF $(USE_VXD)
-
-# Building for Win32 VxD (minimal PM library implementation)
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O ztimer$O cpuinfo$O mtrr$O fileio$O pcilib$O \
- agp$O malloc$O vgastate$O gavxd$O _pm$O _mtrr$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := vxd;common;codepage;tests
-.SOURCE: vxd common codepage tests
-
-.ELIF $(USE_NTDRV)
-
-# Building for NT device drivers (minimal PM library implementation)
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O ztimer$O cpuinfo$O mtrr$O mem$O irq$O int86$O \
- stdio$O stdlib$O pcilib$O agp$O malloc$O vgastate$O gantdrv$O \
- _pm$O _mtrr$O _cpuinfo$O _int64$O _pcihelp$O _irq$O
-DEPEND_SRC := ntdrv;common;codepage;tests
-.SOURCE: ntdrv common codepage tests
-
-.ELIF $(USE_WIN32)
-
-# Building for Win32
-
-CFLAGS += -DUSE_OS_JOYSTICK
-LIBNAME = pm
-OBJECTS = pm$O vflat$O event$O ddraw$O ztimer$O cpuinfo$O pcilib$O \
- agp$O malloc$O vgastate$O gawin32$O ntservc$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := win32;common;codepage;tests
-.SOURCE: win32 common codepage tests
-
-.ELIF $(USE_OS232)
-
-# Building for OS/2
-
-.IF $(USE_OS2GUI)
-LIBNAME = pm_pm
-.ELSE
-LIBNAME = pm
-.ENDIF
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O vgastate$O gaos2$O _pmos2$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O dossctl$O
-DEPEND_SRC := os2;common;codepage;tests
-.SOURCE: os2 common codepage tests
-
-.ELIF $(USE_QNX)
-
-# Building for QNX
-
-USE_BIOS := 1
-.IF $(USE_PHOTON)
-LIBNAME = pm_ph
-.ELIF $(USE_X11)
-LIBNAME = pm_x11
-.ELSE
-LIBNAME = pm
-.ENDIF
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O mtrrqnx$O unixio$O vgastate$O gaqnx$O _joy$O \
- _mtrrqnx$O _cpuinfo$O _int64$O _pcihelp$O
-DEPEND_SRC := qnx;common;codepage;tests
-.SOURCE: qnx common codepage tests
-
-# Indicate that this program uses Nucleus device drivers (so needs I/O access)
-USE_NUCLEUS := 1
-
-.ELIF $(USE_LINUX)
-
-# Building for Linux
-
-CFLAGS += -DENABLE_MTRR -DUSE_OS_JOYSTICK
-.IF $(USE_X11)
-LIBNAME = pm_x11
-.ELSE
-LIBNAME = pm
-.ENDIF
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O pcilib$O \
- agp$O malloc$O unixio$O vgastate$O galinux$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := linux;common;codepage;tests;x11
-.SOURCE: linux common codepage tests x11
-
-# Building a shared library
-.IF $(SOFILE)
-LIB := ld
-LIBFLAGS := -r -o
-CFLAGS += -fPIC
-.ENDIF
-
-.ELIF $(USE_BEOS)
-
-# Building for BeOS GUI
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O pcilib$O \
- agp$O malloc$O vgastate$O gabeos$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := beos;common;codepage;tests
-.SOURCE: beos common codepage tests
-
-.ELIF $(USE_SMX32)
-
-# Building for SMX
-
-LIBNAME = pm
-OBJECTS = pm$O pmsmx$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O vgastate$O gasmx$O _pm$O _pmsmx$O _mtrr$O _event$O \
- _joy$O _cpuinfo$O _int64$O _pcihelp$O _lztimer$O
-DEPEND_SRC := smx;common;codepage;tests
-.SOURCE: smx common codepage tests
-
-.ELIF $(USE_RTTARGET)
-
-# Building for RTTarget-32
-
-LIBNAME = pm
-OBJECTS = pm$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O pcilib$O \
- agp$O malloc$O vgastate$O gartt$O _mtrr$O _joy$O _cpuinfo$O \
- _int64$O _pcihelp$O
-DEPEND_SRC := rttarget;common;codepage;tests
-.SOURCE: rttarget common codepage tests
-
-.ELSE
-
-# Building for MSDOS
-
-LIBNAME = pm
-OBJECTS = pm$O pmdos$O vflat$O event$O ztimer$O cpuinfo$O mtrr$O \
- agp$O malloc$O pcilib$O vgastate$O gados$O \
- _pm$O _pmdos$O _mtrr$O _vflat$O _event$O _joy$O _pcihelp$O \
- _cpuinfo$O _int64$O _lztimer$O _dma$O
-DEPEND_SRC := dos;common;codepage;tests
-.SOURCE: dos common codepage tests
-
-.ENDIF
-
-# Object modules for keyboard code pages
-
-OBJECTS += us_eng$O
-
-# Common object modules
-
-OBJECTS += common$O
-.IF $(CHECKED)
-OBJECTS += debug$O
-.ENDIF
-
-# Nucleus loader library object modules. Note that when compiling a test harness
-# library we need to exclude the Nucleus loader library.
-
-.IF $(TEST_HARNESS)
-CFLAGS += -DTEST_HARNESS -DPMLIB
-LIBNAME = pm_test
-.ELSE
-OBJECTS += galib$O _ga_imp$O
-.ENDIF
-
-.IF $(DEBUG_SDDPMI)
-CFLAGS += -DDEBUG_SDDPMI
-.ENDIF
-
-# AGP library object modules
-
-.IF $(DEBUG_AGP_DRIVER)
-CFLAGS += -DDEBUG_AGP_DRIVER
-OBJECTS += agplib$O
-.ELSE
-OBJECTS += agplib$O peloader$O libcimp$O _gatimer$O
-.ENDIF
-
-#----------------------------------------------------------------------------
-# Name of library and generic object files required to build it
-#----------------------------------------------------------------------------
-
-.IF $(STKCALL)
-LIBFILE = s$(LP)$(LIBNAME)$L
-.ELSE
-LIBFILE = $(LP)$(LIBNAME)$L
-.ENDIF
-LIBCLEAN = *.lib *.a
-
-#----------------------------------------------------------------------------
-# Change destination for library file depending the extender being used. This
-# is only necessary for DOS extender since the file go into a subdirectory
-# in the normal library directory, one for each supported extender. Other
-# OS'es put the file into the regular library directory, since there is
-# only one per OS in this case.
-#----------------------------------------------------------------------------
-
-MK_PMODE = 1
-
-.IF $(TEST_HARNESS)
-LIB_DEST := $(LIB_BASE)
-.ELIF $(USE_TNT)
-LIB_DEST := $(LIB_BASE)\tnt
-.ELIF $(USE_DOS4GW)
-LIB_DEST := $(LIB_BASE)\dos4gw
-.ELIF $(USE_X32)
-LIB_DEST := $(LIB_BASE)\x32
-.ELIF $(USE_DPMI16)
-LIB_DEST := $(LIB_BASE)\dpmi16
-.ELIF $(USE_DPMI32)
-LIB_DEST := $(LIB_BASE)\dpmi32
-.ELIF $(USE_DOSX)
-LIB_DEST := $(LIB_BASE)\dosx
-.END
-
-#----------------------------------------------------------------------------
-# Names of all executable files built
-#----------------------------------------------------------------------------
-
-.IF $(USE_REALDOS)
-EXEFILES = memtest$E biosptr$E video$E isvesa$E callreal$E \
- mouse$E tick$E key$E key15$E brk$E altbrk$E \
- critical$E altcrit$E vftest$E rtc$E getch$E \
- cpu$E timerc$E timercpp$E showpci$E uswc$E block$E
-.ELSE
-EXEFILES = memtest$E video$E isvesa$E callreal$E vftest$E getch$E \
- cpu$E timerc$E timercpp$E showpci$E uswc$E block$E \
- save$E restore$E
-.ENDIF
-
-all: $(EXEFILES)
-
-$(EXEFILES): $(LIBFILE)
-
-memtest$E: memtest$O
-biosptr$E: biosptr$O
-video$E: video$O
-isvesa$E: isvesa$O
-mouse$E: mouse$O
-tick$E: tick$O
-key$E: key$O
-key15$E: key15$O
-brk$E: brk$O
-altbrk$E: altbrk$O
-critical$E: critical$O
-altcrit$E: altcrit$O
-callreal$E: callreal$O
-vftest$E: vftest$O
-rtc$E: rtc$O
-getch$E: getch$O
-cpu$E: cpu$O
-timerc$E: timerc$O
-timercpp$E: timercpp$O
-showpci$E: showpci$O
-uswc$E: uswc$O
-block$E: block$O
-save$E: save$O
-restore$E: restore$O
-test$E: test$O _test$O
-
-#----------------------------------------------------------------------------
-# Define the list of object files to create dependency information for
-#----------------------------------------------------------------------------
-
-DEPEND_OBJ := $(OBJECTS) memtest$O biosptr$O video$O isvesa$O mouse$O \
- tick$O key$O key$O brk$O altbrk$O critical$O altcrit$O \
- callreal$O vftest$O getch$O timercpp$O
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_irq.asm b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_irq.asm
deleted file mode 100644
index 11824a0..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_irq.asm
+++ /dev/null
@@ -1,288 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit Windows NT device driver
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* Windows NT device drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _irq ; Set up memory model
-
-begdataseg _irq
-
- cextern _PM_rtcHandler,CPTR
- cextern _PM_prevRTC,FCPTR
-
-RtcInside dw 0 ; Are we still handling current interrupt
-sidtBuf df 0 ; Buffer for sidt instruction
-
-enddataseg _irq
-
-begcodeseg _irq ; Start of code segment
-
-cpublic _PM_irqCodeStart
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; PM_rtcISR - Real time clock interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_rtcISR
-
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-; If we enable interrupts and call into any C based interrupt handling code,
-; we need to setup a bunch of important information for the NT kernel. The
-; code below takes care of this housekeeping for us (see Undocumented NT for
-; details). If we don't do this housekeeping and interrupts are enabled,
-; the kernel will become very unstable and crash within 10 seconds or so.
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-
- pushad
- pushfd
- push fs
-
- mov ebx,00000030h
- mov fs,bx
- sub esp,50h
- mov ebp,esp
-
-; Setup the exception frame to NULL
-
- mov ebx,[DWORD cs:0FFDFF000h]
- mov [DWORD ds:0FFDFF000h], 0FFFFFFFFh
- mov [DWORD ebp],ebx
-
-; Save away the existing KSS ebp
-
- mov esi,[DWORD cs:0FFDFF124h]
- mov ebx,[DWORD esi+00000128h]
- mov [DWORD ebp+4h],ebx
- mov [DWORD esi+00000128h],ebp
-
-; Save away the kernel time and the thread mode (kernel/user)
-
- mov edi,[DWORD esi+00000137h]
- mov [DWORD ebp+8h],edi
-
-; Set the thread mode (kernel/user) based on the code selector
-
- mov ebx,[DWORD ebp+7Ch]
- and ebx,01
- mov [BYTE esi+00000137h],bl
-
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-; End of special interrupt Prolog code
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-
-; Clear priority interrupt controller and re-enable interrupts so we
-; dont lock things up for long.
-
- mov al,20h
- out 0A0h,al
- out 020h,al
-
-; Clear real-time clock timeout
-
- in al,70h ; Read CMOS index register
- push eax ; and save for later
- IODELAYN 3
- mov al,0Ch
- out 70h,al
- IODELAYN 5
- in al,71h
-
-; Call the C interrupt handler function
-
- cmp [BYTE RtcInside],1 ; Check for mutual exclusion
- je @@Exit
- mov [BYTE RtcInside],1
- sti ; Enable interrupts
- cld ; Clear direction flag for C code
- call [CPTR _PM_rtcHandler]
- cli ; Disable interrupts on exit!
- mov [BYTE RtcInside],0
-
-@@Exit: pop eax
- out 70h,al ; Restore CMOS index register
-
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-; Start of special epilog code to restore stuff on exit from handler
-;++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
-
-; Restore the KSS ebp
-
- mov esi,[DWORD cs:0FFDFF124h]
- mov ebx,[DWORD ebp+4]
- mov [DWORD esi+00000128h],ebx
-
-; Restore the exception frame
-
- mov ebx,[DWORD ebp]
- mov [DWORD fs:00000000],ebx
-
-; Restore the thread mode
-
- mov ebx,[DWORD ebp+8h]
- mov esi,[DWORD fs:00000124h]
- mov [BYTE esi+00000137h],bl
- add esp, 50h
- pop fs
- popfd
- popad
-
-; Return from interrupt
-
- iret
-
-cprocend
-
-cpublic _PM_irqCodeEnd
-
-;----------------------------------------------------------------------------
-; void _PM_getISR(int irq,PMFARPTR *handler);
-;----------------------------------------------------------------------------
-; Function to return the specific IRQ handler direct from the IDT.
-;----------------------------------------------------------------------------
-cprocstart _PM_getISR
-
- ARG idtEntry:UINT, handler:DPTR
-
- enter_c 0
- mov ecx,[handler] ; Get address of handler to fill in
- sidt [sidtBuf] ; Get IDTR register into sidtBuf
- mov eax,[DWORD sidtBuf+2] ; Get address of IDT into EAX
- mov ebx,[idtEntry]
- lea eax,[eax+ebx*8] ; Get entry in the IDT
- movzx edx,[WORD eax+6] ; Get high order 16-bits
- shl edx,16 ; Move into top 16-bits of address
- mov dx,[WORD eax] ; Get low order 16-bits
- mov [DWORD ecx],edx ; Store linear address of handler
- mov dx,[WORD eax+2] ; Get selector value
- mov [WORD ecx+4],dx ; Store selector value
- leave_c
- ret
-
-cprocend _PM_getISR
-
-;----------------------------------------------------------------------------
-; void _PM_setISR(int irq,void *handler);
-;----------------------------------------------------------------------------
-; Function to set the specific IRQ handler direct in the IDT.
-;----------------------------------------------------------------------------
-cprocstart _PM_setISR
-
- ARG irq:UINT, handler:CPTR
-
- enter_c 0
- mov ecx,[handler] ; Get address of new handler
- mov dx,cs ; Get selector for new handler
- sidt [sidtBuf] ; Get IDTR register into sidtBuf
- mov eax,[DWORD sidtBuf+2] ; Get address of IDT into EAX
- mov ebx,[idtEntry]
- lea eax,[eax+ebx*8] ; Get entry in the IDT
- cli
- mov [WORD eax+2],dx ; Store code segment selector
- mov [WORD eax],cx ; Store low order bits of handler
- shr ecx,16
- mov [WORD eax+6],cx ; Store high order bits of handler
- sti
- leave_c
- ret
-
-cprocend _PM_setISR
-
-;----------------------------------------------------------------------------
-; void _PM_restoreISR(int irq,PMFARPTR *handler);
-;----------------------------------------------------------------------------
-; Function to set the specific IRQ handler direct in the IDT.
-;----------------------------------------------------------------------------
-cprocstart _PM_restoreISR
-
- ARG irq:UINT, handler:CPTR
-
- enter_c 0
- mov ecx,[handler]
- mov dx,[WORD ecx+4] ; Get selector for old handler
- mov ecx,[DWORD ecx] ; Get address of old handler
- sidt [sidtBuf] ; Get IDTR register into sidtBuf
- mov eax,[DWORD sidtBuf+2] ; Get address of IDT into EAX
- mov ebx,[idtEntry]
- lea eax,[eax+ebx*8] ; Get entry in the IDT
- cli
- mov [WORD eax+2],dx ; Store code segment selector
- mov [WORD eax],cx ; Store low order bits of handler
- shr ecx,16
- mov [WORD eax+6],cx ; Store high order bits of handler
- sti
- leave_c
- ret
-
-cprocend _PM_restoreISR
-
-endcodeseg _irq
-
- END ; End of module
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_pm.asm
deleted file mode 100644
index 6cb276d..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/_pm.asm
+++ /dev/null
@@ -1,281 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit Windows NT device driver
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* Windows NT device drivers.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pm ; Set up memory model
-
-P586
-
-begdataseg
-
-; Watcom C++ externals required to link when compiling floating point
-; C code. They are not actually used in the code because we compile with
-; inline floating point instructions, however the compiler still generates
-; the references in the object modules.
-
-__8087 dd 0
- PUBLIC __8087
-__imthread:
-__fltused:
-_fltused_ dd 0
- PUBLIC __imthread
- PUBLIC _fltused_
- PUBLIC __fltused
-
-enddataseg
-
-begcodeseg _pm ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstart PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstart PM_int386x
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankA(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankA
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankAB(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankAB
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setCRTStart(int x,int y,int waitVRT)
-;----------------------------------------------------------------------------
-cprocstart PM_setCRTStart
-
-; Not used for NT device drivers
-
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; double _ftol(double f)
-;----------------------------------------------------------------------------
-; Calls to __ftol are generated by the Borland C++ compiler for code
-; that needs to convert a floating point type to an integral type.
-;
-; Input: floating point number on the top of the '87.
-;
-; Output: a (signed or unsigned) long in EAX
-; All other registers preserved.
-;-----------------------------------------------------------------------
-cprocstart _ftol
-
- LOCAL temp1:WORD, temp2:QWORD = LocalSize
-
- push ebp
- mov ebp,esp
- sub esp,LocalSize
-
- fstcw [temp1] ; save the control word
- fwait
- mov al,[BYTE temp1+1]
- or [BYTE temp1+1],0Ch ; set rounding control to chop
- fldcw [temp1]
- fistp [temp2] ; convert to 64-bit integer
- mov [BYTE temp1+1],al
- fldcw [temp1] ; restore the control word
- mov eax,[DWORD temp2] ; return LS 32 bits
- mov edx,[DWORD temp2+4] ; MS 32 bits
-
- mov esp,ebp
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- ret
-
-cprocend
-
-endcodeseg _pm
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c
deleted file mode 100644
index d15b07c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: VxD specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- KeQueryPerformanceCounter((LARGE_INTEGER*)freq);
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- LARGE_INTEGER lt = KeQueryPerformanceCounter(NULL); \
- (t)->low = lt.LowPart; \
- (t)->high = lt.HighPart; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c
deleted file mode 100644
index c82648b..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c
+++ /dev/null
@@ -1,251 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the real mode software interrupt
-* handling functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-We do have limited BIOS access under Windows NT device drivers.
-****************************************************************************/
-ibool PMAPI PM_haveBIOSAccess(void)
-{
- /* Return false unless we have full buffer passing! */
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Place to store the length of the buffer
-rseg - Place to store the real mode segment of the buffer
-roff - Place to store the real mode offset of the buffer
-
-REMARKS:
-This function returns the address and length of the global VESA transfer
-buffer that is used for communicating with the VESA BIOS functions from
-Win16 and Win32 programs under Windows.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* No buffers supported under Windows NT (Windows XP has them however if */
- /* we ever decide to support this!) */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a protected mode software interrupt.
-****************************************************************************/
-int PMAPI PM_int386(
- int intno,
- PMREGS *in,
- PMREGS *out)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return PM_int386x(intno,in,out,&sregs);
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- /* Not used for Windows NT drivers! */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* Not supported in NT drivers */
- (void)size;
- (void)r_seg;
- (void)r_off;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Not supported in NT drivers */
- (void)mem;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* Not used in NT drivers */
-}
-
-/****************************************************************************
-REMARKS:
-Call a V86 real mode function with the specified register values
-loaded before the call. The call returns with a far ret.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- /* TODO!! */
-#if 0
- CLIENT_STRUCT saveRegs;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS)
- return;
-
- TRACE("SDDHELP: Entering PM_callRealMode()\n");
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,regs,sregs);
- Simulate_Far_Call(seg, off);
- Resume_Exec();
- ReadV86Registers(&saveRegs,regs,sregs);
- End_Nest_Exec();
- TRACE("SDDHELP: Exiting PM_callRealMode()\n");
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- /* TODO!! */
-#if 0
- RMSREGS sregs = {0};
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,&sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,&sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- TRACE("SDDHELP: Exiting PM_int86()\n");
-#else
- *out = *in;
-#endif
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- /* TODO!! */
-#if 0
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS) {
- *out = *in;
- return out->x.ax;
- }
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86x()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- TRACE("SDDHELP: Exiting PM_int86x()\n");
-#else
- *out = *in;
-#endif
- return out->x.ax;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c
deleted file mode 100644
index 9cd52047..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c
+++ /dev/null
@@ -1,142 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the NT driver IRQ management functions
-* for the PM library.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pmint.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static int globalDataStart;
-static uchar _PM_oldCMOSRegA;
-static uchar _PM_oldCMOSRegB;
-static uchar _PM_oldRTCPIC2;
-static ulong RTC_idtEntry;
-PM_intHandler _PM_rtcHandler = NULL;
-PMFARPTR _VARAPI _PM_prevRTC = PMNULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Functions to read and write CMOS registers */
-
-uchar _ASMAPI _PM_readCMOS(int index);
-void _ASMAPI _PM_writeCMOS(int index,uchar value);
-void _ASMAPI _PM_rtcISR(void);
-void _ASMAPI _PM_getISR(int irq,PMFARPTR *handler);
-void _ASMAPI _PM_setISR(int irq,void *handler);
-void _ASMAPI _PM_restoreISR(int irq,PMFARPTR *handler);
-void _ASMAPI _PM_irqCodeStart(void);
-void _ASMAPI _PM_irqCodeEnd(void);
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,(uchar)_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,(uchar)(_PM_oldCMOSRegB & 0x0F));
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,(uchar)(0x20 | (i+3)));
- _PM_writeCMOS(0x0B,(uchar)((_PM_oldCMOSRegB & 0x0F) | 0x40));
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- static ibool locked = false;
-
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Install the interrupt handler */
- RTC_idtEntry = 0x38;
- _PM_getISR(RTC_idtEntry, &_PM_prevRTC);
- _PM_rtcHandler = th;
- _PM_setISR(RTC_idtEntry, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,(uchar)(_PM_oldRTCPIC2 & 0xFE));
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(uchar)((PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)));
-
- /* Restore the interrupt vector */
- _PM_restoreISR(RTC_idtEntry, &_PM_prevRTC);
- _PM_rtcHandler = NULL;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c
deleted file mode 100644
index 3128c6a..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c
+++ /dev/null
@@ -1,518 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the NT driver memory management functions
-* for the PM library.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define MAX_MEMORY_SHARED 100
-#define MAX_MEMORY_MAPPINGS 100
-#define MAX_MEMORY_LOCKED 100
-
-typedef struct {
- void *linear;
- ulong length;
- PMDL pMdl;
- } memshared;
-
-typedef struct {
- void *linear;
- void *mmIoMapped;
- ulong length;
- PMDL pMdl;
- } memlocked;
-
-typedef struct {
- ulong physical;
- ulong linear;
- ulong length;
- ibool isCached;
- } mmapping;
-
-static int numMappings = 0;
-static memshared shared[MAX_MEMORY_MAPPINGS] = {0};
-static mmapping maps[MAX_MEMORY_MAPPINGS];
-static memlocked locked[MAX_MEMORY_LOCKED];
-
-/*----------------------------- Implementation ----------------------------*/
-
-ulong PMAPI _PM_getPDB(void);
-
-/* Page table entry flags */
-
-#define PAGE_FLAGS_PRESENT 0x00000001
-#define PAGE_FLAGS_WRITEABLE 0x00000002
-#define PAGE_FLAGS_USER 0x00000004
-#define PAGE_FLAGS_WRITE_THROUGH 0x00000008
-#define PAGE_FLAGS_CACHE_DISABLE 0x00000010
-#define PAGE_FLAGS_ACCESSED 0x00000020
-#define PAGE_FLAGS_DIRTY 0x00000040
-#define PAGE_FLAGS_4MB 0x00000080
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-Maps a physical memory range to a linear memory range.
-****************************************************************************/
-static ulong _PM_mapPhysicalToLinear(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong length = limit+1;
- PHYSICAL_ADDRESS paIoBase = {0};
-
- /* NT loves large Ints */
- paIoBase = RtlConvertUlongToLargeInteger( base );
-
- /* Map IO space into Kernel */
- if (isCached)
- return (ULONG)MmMapIoSpace(paIoBase, length, MmCached );
- else
- return (ULONG)MmMapIoSpace(paIoBase, length, MmNonCached );
-}
-
-/****************************************************************************
-REMARKS:
-Adjust the page table caching bits directly. Requires ring 0 access and
-only works with DOS4GW and compatible extenders (CauseWay also works since
-it has direct support for the ring 0 instructions we need from ring 3). Will
-not work in a DOS box, but we call into the ring 0 helper VxD so we should
-never get here in a DOS box anyway (assuming the VxD is present). If we
-do get here and we are in windows, this code will be skipped.
-****************************************************************************/
-static void _PM_adjustPageTables(
- ulong linear,
- ulong limit,
- ibool isGlobal,
- ibool isCached)
-{
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPDB,*pPageTable;
- ulong mask = 0xFFFFFFFF;
- ulong bits = 0x00000000;
-
- /* Enable user level access for page table entry */
- if (isGlobal) {
- mask &= ~PAGE_FLAGS_USER;
- bits |= PAGE_FLAGS_USER;
- }
-
- /* Disable PCD bit if page table entry should be uncached */
- if (!isCached) {
- mask &= ~(PAGE_FLAGS_CACHE_DISABLE | PAGE_FLAGS_WRITE_THROUGH);
- bits |= (PAGE_FLAGS_CACHE_DISABLE | PAGE_FLAGS_WRITE_THROUGH);
- }
-
- pPDB = (ulong*)_PM_mapPhysicalToLinear(_PM_getPDB(),0xFFF,true);
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- /* Set the bits in the page directory entry - required as per */
- /* Pentium 4 manual. This also takes care of the 4MB page entries */
- pPDB[iPDB] = (pPDB[iPDB] & mask) | bits;
- if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) {
- /* If we are dealing with 4KB pages then we need to iterate */
- /* through each of the page table entries */
- pageTable = pPDB[iPDB] & ~0xFFF;
- pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,true);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++) {
- pPageTable[iPage] = (pPageTable[iPage] & mask) | bits;
- }
- MmUnmapIoSpace(pPageTable,0xFFF);
- }
- }
- MmUnmapIoSpace(pPDB,0xFFF);
- PM_flushTLB();
- }
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For NT we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- int i;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == 0)
- break;
- }
- if (i == MAX_MEMORY_SHARED)
- return NULL;
-
- /* Allocate the paged pool */
- shared[i].linear = ExAllocatePool(PagedPool, size);
-
- /* Create a list to manage this allocation */
- shared[i].pMdl = IoAllocateMdl(shared[i].linear,size,FALSE,FALSE,(PIRP) NULL);
-
- /* Lock this allocation in memory */
- MmProbeAndLockPages(shared[i].pMdl,KernelMode,IoModifyAccess);
-
- /* Modify bits to grant user access */
- _PM_adjustPageTables((ulong)shared[i].linear, size, true, true);
- return (void*)shared[i].linear;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *p)
-{
- int i;
-
- /* Find a shared memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == p) {
- /* Unlock what we locked */
- MmUnlockPages(shared[i].pMdl);
-
- /* Free our MDL */
- IoFreeMdl(shared[i].pMdl);
-
- /* Free our mem */
- ExFreePool(shared[i].linear);
-
- /* Flag that is entry is available */
- shared[i].linear = 0;
- break;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong linear,length = limit+1;
- int i;
-
- /* Search table of existing mappings to see if we have already mapped */
- /* a region of memory that will serve this purpose. */
- for (i = 0; i < numMappings; i++) {
- if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) {
- _PM_adjustPageTables((ulong)maps[i].linear, maps[i].length, true, isCached);
- return (void*)maps[i].linear;
- }
- }
- if (numMappings == MAX_MEMORY_MAPPINGS)
- return NULL;
-
- /* We did not find any previously mapped memory region, so maps it in. */
- if ((linear = _PM_mapPhysicalToLinear(base,limit,isCached)) == 0xFFFFFFFF)
- return NULL;
- maps[numMappings].physical = base;
- maps[numMappings].length = length;
- maps[numMappings].linear = linear;
- maps[numMappings].isCached = isCached;
- numMappings++;
-
- /* Grant user access to this I/O space */
- _PM_adjustPageTables((ulong)linear, length, true, isCached);
- return (void*)linear;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* We don't free the memory mappings in here because we cache all */
- /* the memory mappings we create in the system for later use. */
-}
-
-/****************************************************************************
-REMARKS:
-Called when the device driver unloads to free all the page table mappings!
-****************************************************************************/
-void PMAPI _PM_freeMemoryMappings(void)
-{
- int i;
-
- for (i = 0; i < numMappings; i++)
- MmUnmapIoSpace((void *)maps[i].linear,maps[i].length);
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- PHYSICAL_ADDRESS paOurAddress;
-
- paOurAddress = MmGetPhysicalAddress(p);
- return paOurAddress.LowPart;
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- int i;
- ulong linear = (ulong)p & ~0xFFF;
-
- for (i = (length + 0xFFF) >> 12; i > 0; i--) {
- if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF)
- return false;
- linear += 4096;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked physical memory.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- int i;
- PHYSICAL_ADDRESS paOurAddress;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_LOCKED; i++) {
- if (locked[i].linear == 0)
- break;
- }
- if (i == MAX_MEMORY_LOCKED)
- return NULL;
-
- /* HighestAcceptableAddress - Specifies the highest valid physical address */
- /* the driver can use. For example, if a device can only reference physical */
- /* memory in the lower 16MB, this value would be set to 0x00000000FFFFFF. */
- paOurAddress.HighPart = 0;
- if (below16M)
- paOurAddress.LowPart = 0x00FFFFFF;
- else
- paOurAddress.LowPart = 0xFFFFFFFF;
-
- if (contiguous) {
- /* Allocate from the non-paged pool (unfortunately 4MB pages) */
- locked[i].linear = MmAllocateContiguousMemory(size, paOurAddress);
- if (!locked[i].linear)
- return NULL;
-
- /* Flag no MDL */
- locked[i].pMdl = NULL;
-
- /* Map the physical address for the memory so we can manage */
- /* the page tables in 4KB chunks mapped into user space. */
-
- /* TODO: Map this with the physical address to the linear addresss */
- locked[i].mmIoMapped = locked[i].linear;
-
- /* Modify bits to grant user access, flag not cached */
- _PM_adjustPageTables((ulong)locked[i].mmIoMapped, size, true, false);
- return (void*)locked[i].mmIoMapped;
- }
- else {
- /* Allocate from the paged pool */
- locked[i].linear = ExAllocatePool(PagedPool, size);
- if (!locked[i].linear)
- return NULL;
-
- /* Create a list to manage this allocation */
- locked[i].pMdl = IoAllocateMdl(locked[i].linear,size,FALSE,FALSE,(PIRP) NULL);
-
- /* Lock this allocation in memory */
- MmProbeAndLockPages(locked[i].pMdl,KernelMode,IoModifyAccess);
-
- /* Modify bits to grant user access, flag not cached */
- _PM_adjustPageTables((ulong)locked[i].linear, size, true, false);
- return (void*)locked[i].linear;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Frees a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- int i;
-
- /* Find a locked memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_LOCKED; i++) {
- if (locked[i].linear == p) {
- /* An Mdl indicates that we used the paged pool, and locked it, */
- /* so now we have to unlock, free the MDL, and free paged */
- if (locked[i].pMdl) {
- /* Unlock what we locked and free the Mdl */
- MmUnlockPages(locked[i].pMdl);
- IoFreeMdl(locked[i].pMdl);
- ExFreePool(locked[i].linear);
- }
- else {
- /* TODO: Free the mmIoMap mapping for the memory! */
-
- /* Free non-paged pool */
- MmFreeContiguousMemory(locked[i].linear);
- }
-
- /* Flag that is entry is available */
- locked[i].linear = 0;
- break;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- /* Allocate the memory from the non-paged pool if we want the memory */
- /* to be locked. */
- return ExAllocatePool(
- locked ? NonPagedPoolCacheAligned : PagedPoolCacheAligned,
- PAGE_SIZE);
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- if (p) ExFreePool(p);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- MDL *pMdl;
-
- /* Create a list to manage this allocation */
- if ((pMdl = IoAllocateMdl(p,len,FALSE,FALSE,(PIRP)NULL)) == NULL)
- return false;
-
- /* Lock this allocation in memory */
- MmProbeAndLockPages(pMdl,KernelMode,IoModifyAccess);
- *((PMDL*)(&lh->h)) = pMdl;
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- if (p && lh) {
- /* Unlock what we locked */
- MDL *pMdl = *((PMDL*)(&lh->h));
- MmUnlockPages(pMdl);
- IoFreeMdl(pMdl);
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_lockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_unlockDataPages((void*)p,len,lh);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h
deleted file mode 100644
index 65b7bae..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT drivers
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#ifndef __NTDRV_OSHDR_H
-#define __NTDRV_OSHDR_H
-
-/*--------------------------- Macros and Typedefs -------------------------*/
-
-/*---------------------------- Global variables ---------------------------*/
-
-/*--------------------------- Function Prototypes -------------------------*/
-
-/* Internal unicode string handling functions */
-
-UNICODE_STRING * _PM_CStringToUnicodeString(const char *cstr);
-void _PM_FreeUnicodeString(UNICODE_STRING *uniStr);
-
-#endif /* __NTDRV_OSHDR_H */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c
deleted file mode 100644
index c660631..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c
+++ /dev/null
@@ -1,933 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT device drivers.
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-#include "oshdr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-char _PM_cntPath[PM_MAX_PATH] = "";
-char _PM_nucleusPath[PM_MAX_PATH] = "";
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-static char *szNTWindowsKey = "\\REGISTRY\\Machine\\Software\\Microsoft\\Windows NT\\CurrentVersion";
-static char *szNTSystemRoot = "SystemRoot";
-static char *szMachineNameKey = "\\REGISTRY\\Machine\\System\\CurrentControlSet\\control\\ComputerName\\ComputerName";
-static char *szMachineNameKeyNT = "\\REGISTRY\\Machine\\System\\CurrentControlSet\\control\\ComputerName\\ActiveComputerName";
-static char *szMachineName = "ComputerName";
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* Initialiase the MTRR module */
- MTRR_init();
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- return _OS_WINNTDRV;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Handle fatal errors internally in the driver.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- ULONG BugCheckCode = 0;
- ULONG MoreBugCheckData[4] = {0};
- char *p;
- ULONG len;
-
- if (fatalErrorCleanup)
- fatalErrorCleanup();
-
-#ifdef DBG /* Send output to debugger, just return so as not to force a reboot */
-#pragma message("INFO: building for debug, PM_fatalError() re-routed")
- DBGMSG2("SDDHELP> PM_fatalError(): ERROR: %s\n", msg);
- return ;
-#endif
- /* KeBugCheckEx brings down the system in a controlled */
- /* manner when the caller discovers an unrecoverable */
- /* inconsistency that would corrupt the system if */
- /* the caller continued to run. */
- /* */
- /* hack - dump the first 20 chars in hex using the variables */
- /* provided - Each ULONG is equal to four characters... */
- for(len = 0; len < 20; len++)
- if (msg[len] == (char)0)
- break;
-
- /* This looks bad but it's quick and reliable... */
- p = (char *)&BugCheckCode;
- if(len > 0) p[3] = msg[0];
- if(len > 1) p[2] = msg[1];
- if(len > 2) p[1] = msg[2];
- if(len > 3) p[0] = msg[3];
-
- p = (char *)&MoreBugCheckData[0];
- if(len > 4) p[3] = msg[4];
- if(len > 5) p[2] = msg[5];
- if(len > 6) p[1] = msg[6];
- if(len > 7) p[0] = msg[7];
-
- p = (char *)&MoreBugCheckData[1];
- if(len > 8) p[3] = msg[8];
- if(len > 9) p[2] = msg[9];
- if(len > 10) p[1] = msg[10];
- if(len > 11) p[0] = msg[11];
-
- p = (char *)&MoreBugCheckData[2];
- if(len > 12) p[3] = msg[12];
- if(len > 13) p[2] = msg[13];
- if(len > 14) p[1] = msg[14];
- if(len > 15) p[0] = msg[15];
-
- p = (char *)&MoreBugCheckData[3];
- if(len > 16) p[3] = msg[16];
- if(len > 17) p[2] = msg[17];
- if(len > 18) p[1] = msg[18];
- if(len > 19) p[0] = msg[19];
-
- /* Halt the system! */
- KeBugCheckEx(BugCheckCode, MoreBugCheckData[0], MoreBugCheckData[1], MoreBugCheckData[2], MoreBugCheckData[3]);
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- strncpy(path,_PM_cntPath,maxLen);
- path[maxLen-1] = 0;
- return path;
-}
-
-/****************************************************************************
-PARAMETERS:
-szKey - Key to query (can contain version number formatting)
-szValue - Value to get information for
-value - Place to store the registry key data read
-size - Size of the string buffer to read into
-
-RETURNS:
-true if the key was found, false if not.
-****************************************************************************/
-static ibool REG_queryString(
- char *szKey,
- const char *szValue,
- char *value,
- DWORD size)
-{
- ibool status;
- NTSTATUS rval;
- ULONG length;
- HANDLE Handle;
- OBJECT_ATTRIBUTES keyAttributes;
- UNICODE_STRING *uniKey = NULL;
- UNICODE_STRING *uniValue = NULL;
- PKEY_VALUE_FULL_INFORMATION fullInfo = NULL;
- STRING stringdata;
- UNICODE_STRING unidata;
-
- /* Convert strings to UniCode */
- status = false;
- if ((uniKey = _PM_CStringToUnicodeString(szKey)) == NULL)
- goto Exit;
- if ((uniValue = _PM_CStringToUnicodeString(szValue)) == NULL)
- goto Exit;
-
- /* Open the key */
- InitializeObjectAttributes( &keyAttributes,
- uniKey,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL );
- rval = ZwOpenKey( &Handle,
- KEY_ALL_ACCESS,
- &keyAttributes );
- if (!NT_SUCCESS(rval))
- goto Exit;
-
- /* Query the value */
- length = sizeof (KEY_VALUE_FULL_INFORMATION)
- + size * sizeof(WCHAR);
- if ((fullInfo = ExAllocatePool (PagedPool, length)) == NULL)
- goto Exit;
- RtlZeroMemory(fullInfo, length);
- rval = ZwQueryValueKey (Handle,
- uniValue,
- KeyValueFullInformation,
- fullInfo,
- length,
- &length);
- if (NT_SUCCESS (rval)) {
- /* Create the UniCode string so we can convert it */
- unidata.Buffer = (PWCHAR)(((PCHAR)fullInfo) + fullInfo->DataOffset);
- unidata.Length = (USHORT)fullInfo->DataLength;
- unidata.MaximumLength = (USHORT)fullInfo->DataLength + sizeof(WCHAR);
-
- /* Convert unicode univalue to ansi string. */
- rval = RtlUnicodeStringToAnsiString(&stringdata, &unidata, TRUE);
- if (NT_SUCCESS(rval)) {
- strcpy(value,stringdata.Buffer);
- status = true;
- }
- }
-
-Exit:
- if (fullInfo) ExFreePool(fullInfo);
- if (uniKey) _PM_FreeUnicodeString(uniKey);
- if (uniValue) _PM_FreeUnicodeString(uniValue);
- return status;
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- char path[256];
- if (REG_queryString(szNTWindowsKey,szNTSystemRoot,path,sizeof(path)))
- return 'c';
- return path[0];
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return "c:\\";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
-
- if (strlen(_PM_nucleusPath) > 0) {
- strcpy(path,_PM_nucleusPath);
- PM_backslash(path);
- return path;
- }
- if (!REG_queryString(szNTWindowsKey,szNTSystemRoot,path,sizeof(path)))
- strcpy(path,"c:\\winnt");
- PM_backslash(path);
- strcat(path,"system32\\nucleus");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[256];
-
- if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name)))
- return name;
- if (REG_queryString(szMachineNameKeyNT,szMachineName,name,sizeof(name)))
- return name;
- return "Unknown";
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* Not used in NT drivers */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* Not used in NT drivers */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Open a console for output to the screen, creating the main event handling
-window if necessary.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- /* Not used in NT drivers */
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Find the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Not used in NT drivers */
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Not used in NT drivers */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the suspend application callback for the fullscreen console.
-****************************************************************************/
-void PMAPI PM_setSuspendAppCallback(
- PM_saveState_cb saveState)
-{
- /* Not used in NT drivers */
- (void)saveState;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the console state.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Not used in NT drivers */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Close the fullscreen console.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Not used in NT drivers */
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PMAPI PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* Nothing to do for Windows */
- (void)x;
- (void)y;
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PMAPI PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do for Windows */
- (void)width;
- (void)height;
-}
-
-/****************************************************************************
-REMARKS:
-Maps a shared memory block into process address space. Does nothing since
-the memory blocks are already globally mapped into all processes.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- /* Not used anymore */
- (void)base;
- (void)limit;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* This may not be possible in NT and should be done by the OS anyway */
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)mappedBIOS;
- (void)BIOSLen;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* Note that on NT this probably does not do what we expect! */
- return PM_mapPhysicalAddr(0x400, 0x1000, true);
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- return PM_mapPhysicalAddr(0xA0000,0xFFFF,false);
-}
-
-/****************************************************************************
-REMARKS:
-Sleep for the specified number of milliseconds.
-****************************************************************************/
-void PMAPI PM_sleep(
- ulong milliseconds)
-{
- /* We never use this in NT drivers */
- (void)milliseconds;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified COM port.
-****************************************************************************/
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- case 2: return 0x3E8;
- case 3: return 0x2E8;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified LPT port.
-****************************************************************************/
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Returns available memory. Not possible under Windows.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* Not used in NT drivers */
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* Not used in NT drivers */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* Not used in NT drivers */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- /* Not supported in NT drivers */
- (void)drive;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* Not supported in NT drivers */
- (void)drive;
- (void)dir;
- (void)len;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- NTSTATUS status;
- ACCESS_MASK DesiredAccess = GENERIC_READ | GENERIC_WRITE;
- OBJECT_ATTRIBUTES ObjectAttributes;
- ULONG ShareAccess = FILE_SHARE_READ;
- ULONG CreateDisposition = FILE_OPEN;
- HANDLE FileHandle = NULL;
- UNICODE_STRING *uniFile = NULL;
- IO_STATUS_BLOCK IoStatusBlock;
- FILE_BASIC_INFORMATION FileBasic;
- char kernelFilename[PM_MAX_PATH+5];
- ULONG FileAttributes = 0;
-
- /* Convert file attribute flags */
- if (attrib & PM_FILE_READONLY)
- FileAttributes |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- FileAttributes |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- FileAttributes |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- FileAttributes |= FILE_ATTRIBUTE_SYSTEM;
-
- /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */
- strcpy(kernelFilename, "\\??\\");
- strcat(kernelFilename, filename);
-
- /* Convert filename string to ansi string */
- if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL)
- goto Exit;
-
- /* Must open a file to query it's attributes */
- InitializeObjectAttributes (&ObjectAttributes,
- uniFile,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL );
- status = ZwCreateFile( &FileHandle,
- DesiredAccess | SYNCHRONIZE,
- &ObjectAttributes,
- &IoStatusBlock,
- NULL, /*AllocationSize OPTIONAL, */
- FILE_ATTRIBUTE_NORMAL,
- ShareAccess,
- CreateDisposition,
- FILE_RANDOM_ACCESS, /*CreateOptions, */
- NULL, /*EaBuffer OPTIONAL, */
- 0 /*EaLength (required if EaBuffer) */
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Query timestamps */
- status = ZwQueryInformationFile(FileHandle,
- &IoStatusBlock,
- &FileBasic,
- sizeof(FILE_BASIC_INFORMATION),
- FileBasicInformation
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Change the four bits we change */
- FileBasic.FileAttributes &= ~(FILE_ATTRIBUTE_READONLY | FILE_ATTRIBUTE_ARCHIVE
- | FILE_ATTRIBUTE_HIDDEN | FILE_ATTRIBUTE_SYSTEM);
- FileBasic.FileAttributes |= FileAttributes;
-
- /* Set timestamps */
- ZwSetInformationFile( FileHandle,
- &IoStatusBlock,
- &FileBasic,
- sizeof(FILE_BASIC_INFORMATION),
- FileBasicInformation
- );
-
-Exit:
- if (FileHandle) ZwClose(FileHandle);
- if (uniFile) _PM_FreeUnicodeString(uniFile);
- return;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- NTSTATUS status;
- ACCESS_MASK DesiredAccess = GENERIC_READ | GENERIC_WRITE;
- OBJECT_ATTRIBUTES ObjectAttributes;
- ULONG ShareAccess = FILE_SHARE_READ;
- ULONG CreateDisposition = FILE_OPEN;
- HANDLE FileHandle = NULL;
- UNICODE_STRING *uniFile = NULL;
- IO_STATUS_BLOCK IoStatusBlock;
- FILE_BASIC_INFORMATION FileBasic;
- char kernelFilename[PM_MAX_PATH+5];
- ULONG FileAttributes = 0;
- uint retval = 0;
-
- /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */
- strcpy(kernelFilename, "\\??\\");
- strcat(kernelFilename, filename);
-
- /* Convert filename string to ansi string */
- if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL)
- goto Exit;
-
- /* Must open a file to query it's attributes */
- InitializeObjectAttributes (&ObjectAttributes,
- uniFile,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL );
- status = ZwCreateFile( &FileHandle,
- DesiredAccess | SYNCHRONIZE,
- &ObjectAttributes,
- &IoStatusBlock,
- NULL, /*AllocationSize OPTIONAL, */
- FILE_ATTRIBUTE_NORMAL,
- ShareAccess,
- CreateDisposition,
- FILE_RANDOM_ACCESS, /*CreateOptions, */
- NULL, /*EaBuffer OPTIONAL, */
- 0 /*EaLength (required if EaBuffer) */
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Query timestamps */
- status = ZwQueryInformationFile(FileHandle,
- &IoStatusBlock,
- &FileBasic,
- sizeof(FILE_BASIC_INFORMATION),
- FileBasicInformation
- );
- if (!NT_SUCCESS (status))
- goto Exit;
-
- /* Translate the file attributes */
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_READONLY)
- retval |= PM_FILE_READONLY;
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_ARCHIVE)
- retval |= PM_FILE_ARCHIVE;
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_HIDDEN)
- retval |= PM_FILE_HIDDEN;
- if (FileBasic.FileAttributes & FILE_ATTRIBUTE_SYSTEM)
- retval |= PM_FILE_SYSTEM;
-
-Exit:
- if (FileHandle) ZwClose(FileHandle);
- if (uniFile) _PM_FreeUnicodeString(uniFile);
- return retval;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- /* Not supported in NT drivers */
- (void)filename;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- /* Not supported in NT drivers */
- (void)filename;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* Not supported in NT drivers */
- (void)filename;
- (void)gmTime;
- (void)time;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* Not supported in NT drivers */
- (void)filename;
- (void)gmTime;
- (void)time;
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c
deleted file mode 100644
index 658f1c8..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c
+++ /dev/null
@@ -1,330 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT driver
-*
-* Description: C library compatible I/O functions for use within a Windows
-* NT driver.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "oshdr.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fopen function.
-****************************************************************************/
-FILE * fopen(
- const char *filename,
- const char *mode)
-{
- ACCESS_MASK DesiredAccess; /* for ZwCreateFile... */
- OBJECT_ATTRIBUTES ObjectAttributes;
- ULONG ShareAccess;
- ULONG CreateDisposition;
- NTSTATUS status;
- HANDLE FileHandle;
- UNICODE_STRING *uniFile = NULL;
- PWCHAR bufFile = NULL;
- IO_STATUS_BLOCK IoStatusBlock;
- FILE_STANDARD_INFORMATION FileInformation;
- FILE_POSITION_INFORMATION FilePosition;
- char kernelFilename[PM_MAX_PATH+5];
- FILE *f;
-
- /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */
- strcpy(kernelFilename, "\\??\\");
- strcat(kernelFilename, filename);
- if ((f = PM_malloc(sizeof(FILE))) == NULL)
- goto Error;
- f->offset = 0;
- f->text = (mode[1] == 't' || mode[2] == 't');
- f->writemode = (mode[0] == 'w') || (mode[0] == 'a');
- if (mode[0] == 'r') {
- /* omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE; */
- /* action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL; */
- DesiredAccess = GENERIC_READ;
- ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE;
- CreateDisposition = FILE_OPEN;
- }
- else if (mode[0] == 'w') {
- /* omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE; */
- /* action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE; */
- DesiredAccess = GENERIC_WRITE;
- ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE;
- CreateDisposition = FILE_SUPERSEDE;
- }
- else {
- /* omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE; */
- /* action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE; */
- DesiredAccess = GENERIC_READ | GENERIC_WRITE;
- ShareAccess = FILE_SHARE_READ;
- CreateDisposition = FILE_OPEN_IF;
- }
-
- /* Convert filename string to ansi string and then to UniCode string */
- if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL)
- return NULL;
-
- /* Create the file */
- InitializeObjectAttributes (&ObjectAttributes,
- uniFile,
- OBJ_CASE_INSENSITIVE,
- NULL,
- NULL);
- status = ZwCreateFile( &FileHandle,
- DesiredAccess | SYNCHRONIZE,
- &ObjectAttributes,
- &IoStatusBlock,
- NULL, /* AllocationSize OPTIONAL, */
- FILE_ATTRIBUTE_NORMAL,
- ShareAccess,
- CreateDisposition,
- FILE_RANDOM_ACCESS, /* CreateOptions, */
- NULL, /* EaBuffer OPTIONAL, */
- 0 /* EaLength (required if EaBuffer) */
- );
- if (!NT_SUCCESS (status))
- goto Error;
- f->handle = (int)FileHandle;
-
- /* Determine size of the file */
- status = ZwQueryInformationFile( FileHandle,
- &IoStatusBlock,
- &FileInformation,
- sizeof(FILE_STANDARD_INFORMATION),
- FileStandardInformation
- );
- if (!NT_SUCCESS (status))
- goto Error;
- f->filesize = FileInformation.EndOfFile.LowPart;
-
- /* Move to the end of the file if we are appending */
- if (mode[0] == 'a') {
- FilePosition.CurrentByteOffset.HighPart = 0;
- FilePosition.CurrentByteOffset.LowPart = f->filesize;
- status = ZwSetInformationFile( FileHandle,
- &IoStatusBlock,
- &FilePosition,
- sizeof(FILE_POSITION_INFORMATION),
- FilePositionInformation
- );
- if (!NT_SUCCESS (status))
- goto Error;
- }
- return f;
-
-Error:
- if (f) PM_free(f);
- if (uniFile) _PM_FreeUnicodeString(uniFile);
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fread function.
-****************************************************************************/
-size_t fread(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- NTSTATUS status;
- IO_STATUS_BLOCK IoStatusBlock;
- LARGE_INTEGER ByteOffset;
-
- /* Read any extra bytes from the file */
- ByteOffset.HighPart = 0;
- ByteOffset.LowPart = f->offset;
- status = ZwReadFile( (HANDLE)f->handle,
- NULL, /*IN HANDLE Event OPTIONAL, */
- NULL, /* IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, */
- NULL, /* IN PVOID ApcContext OPTIONAL, */
- &IoStatusBlock,
- ptr, /* OUT PVOID Buffer, */
- size * n, /*IN ULONG Length, */
- &ByteOffset, /*OPTIONAL, */
- NULL /*IN PULONG Key OPTIONAL */
- );
- if (!NT_SUCCESS (status))
- return 0;
- f->offset += IoStatusBlock.Information;
- return IoStatusBlock.Information / size;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fwrite function.
-****************************************************************************/
-size_t fwrite(
- const void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- NTSTATUS status;
- IO_STATUS_BLOCK IoStatusBlock;
- LARGE_INTEGER ByteOffset;
-
- if (!f->writemode)
- return 0;
- ByteOffset.HighPart = 0;
- ByteOffset.LowPart = f->offset;
- status = ZwWriteFile( (HANDLE)f->handle,
- NULL, /*IN HANDLE Event OPTIONAL, */
- NULL, /* IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, */
- NULL, /* IN PVOID ApcContext OPTIONAL, */
- &IoStatusBlock,
- (void*)ptr, /* OUT PVOID Buffer, */
- size * n, /*IN ULONG Length, */
- &ByteOffset, /*OPTIONAL, */
- NULL /*IN PULONG Key OPTIONAL */
- );
- if (!NT_SUCCESS (status))
- return 0;
- f->offset += IoStatusBlock.Information;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- return IoStatusBlock.Information / size;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fflush function.
-****************************************************************************/
-int fflush(
- FILE *f)
-{
- /* Nothing to do here as we are not doing buffered I/O */
- (void)f;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fseek function.
-****************************************************************************/
-int fseek(
- FILE *f,
- long int offset,
- int whence)
-{
- NTSTATUS status;
- FILE_POSITION_INFORMATION FilePosition;
- IO_STATUS_BLOCK IoStatusBlock;
-
- if (whence == 0)
- f->offset = offset;
- else if (whence == 1)
- f->offset += offset;
- else if (whence == 2)
- f->offset = f->filesize + offset;
- FilePosition.CurrentByteOffset.HighPart = 0;
- FilePosition.CurrentByteOffset.LowPart = f->offset;
- status = ZwSetInformationFile( (HANDLE)f->handle,
- &IoStatusBlock,
- &FilePosition,
- sizeof(FILE_POSITION_INFORMATION),
- FilePositionInformation
- );
- if (!NT_SUCCESS (status))
- return -1;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C ftell function.
-****************************************************************************/
-long ftell(
- FILE *f)
-{
- return f->offset;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C feof function.
-****************************************************************************/
-int feof(
- FILE *f)
-{
- return (f->offset == f->filesize);
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fgets function.
-****************************************************************************/
-char *fgets(
- char *s,
- int n,
- FILE *f)
-{
- int len;
- char *cs;
-
- /* Read the entire buffer into memory (our functions are unbuffered!) */
- if ((len = fread(s,1,n,f)) == 0)
- return NULL;
-
- /* Search for '\n' or end of string */
- if (n > len)
- n = len;
- cs = s;
- while (--n > 0) {
- if (*cs == '\n')
- break;
- cs++;
- }
- *cs = '\0';
- return s;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fputs function.
-****************************************************************************/
-int fputs(
- const char *s,
- FILE *f)
-{
- return fwrite(s,1,strlen(s),f);
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fclose function.
-****************************************************************************/
-int fclose(
- FILE *f)
-{
- ZwClose((HANDLE)f->handle);
- PM_free(f);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c
deleted file mode 100644
index bbf0cbf..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows NT driver
-*
-* Description: C library compatible stdlib.h functions for use within a
-* Windows NT driver.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "oshdr.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-/****************************************************************************
-REMARKS:
-PM_malloc override function for Nucleus drivers loaded in NT drivers's.
-****************************************************************************/
-void * malloc(
- size_t size)
-{
- return PM_mallocShared(size);
-}
-
-/****************************************************************************
-REMARKS:
-calloc library function for Nucleus drivers loaded in NT drivers's.
-****************************************************************************/
-void * calloc(
- size_t nelem,
- size_t size)
-{
- void *p = PM_mallocShared(nelem * size);
- if (p)
- memset(p,0,nelem * size);
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_realloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * realloc(
- void *ptr,
- size_t size)
-{
- void *p = PM_mallocShared(size);
- if (p) {
- memcpy(p,ptr,size);
- PM_freeShared(ptr);
- }
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_free override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void free(
- void *p)
-{
- PM_freeShared(p);
-}
-
-/****************************************************************************
-PARAMETERS:
-cstr - C style ANSI string to convert
-
-RETURNS:
-Pointer to the UniCode string structure or NULL on failure to allocate memory
-
-REMARKS:
-Converts a C style string to a UniCode string structure that can be passed
-directly to NT kernel functions.
-****************************************************************************/
-UNICODE_STRING *_PM_CStringToUnicodeString(
- const char *cstr)
-{
- int length;
- ANSI_STRING ansiStr;
- UNICODE_STRING *uniStr;
-
- /* Allocate memory for the string structure */
- if ((uniStr = ExAllocatePool(NonPagedPool, sizeof(UNICODE_STRING))) == NULL)
- return NULL;
-
- /* Allocate memory for the wide string itself */
- length = (strlen(cstr) * sizeof(WCHAR)) + sizeof(WCHAR);
- if ((uniStr->Buffer = ExAllocatePool(NonPagedPool, length)) == NULL) {
- ExFreePool(uniStr);
- return NULL;
- }
- RtlZeroMemory(uniStr->Buffer, length);
- uniStr->Length = 0;
- uniStr->MaximumLength = (USHORT)length;
-
- /* Convert filename string to ansi string and then to UniCode string */
- RtlInitAnsiString(&ansiStr, cstr);
- RtlAnsiStringToUnicodeString(uniStr, &ansiStr, FALSE);
- return uniStr;
-}
-
-/****************************************************************************
-PARAMETERS:
-uniStr - UniCode string structure to free
-
-REMARKS:
-Frees a string allocated by the above _PM_CStringToUnicodeString function.
-****************************************************************************/
-void _PM_FreeUnicodeString(
- UNICODE_STRING *uniStr)
-{
- if (uniStr) {
- ExFreePool(uniStr->Buffer);
- ExFreePool(uniStr);
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/vflat.c
deleted file mode 100644
index 901ce1c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/vflat.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c
deleted file mode 100644
index f4c4bd4..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c
+++ /dev/null
@@ -1,123 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static CPU_largeInteger countFreq;
-static ulong start,finish;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-static void __ZTimerInit(void)
-{
- KeQueryPerformanceCounter((LARGE_INTEGER*)&countFreq);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- LARGE_INTEGER lt = KeQueryPerformanceCounter(NULL);
- tm->start.low = lt.LowPart;
- tm->start.high = lt.HighPart;
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- LARGE_INTEGER tmLap = KeQueryPerformanceCounter(NULL);
- CPU_largeInteger tmCount;
-
- _CPU_diffTime64(&tm->start,(CPU_largeInteger*)&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- LARGE_INTEGER lt = KeQueryPerformanceCounter(NULL);
- tm->end.low = lt.LowPart;
- tm->end.high = lt.HighPart;
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- LARGE_INTEGER count;
- KeQuerySystemTime(&count);
- return (ulong)(*((_int64*)&count) / 10);
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/_pmos2.asm b/board/MAI/bios_emulator/scitech/src/pm/os2/_pmos2.asm
deleted file mode 100644
index 761f0f4..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/_pmos2.asm
+++ /dev/null
@@ -1,180 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: OS/2 32 bit protected mode
-;*
-;* Description: Low level assembly support for the PM library specific
-;* to OS/2
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmos2 ; Set up memory model
-
-begdataseg _pmos2
-
- cglobal _PM_ioentry
- cglobal _PM_gdt
-_PM_ioentry dd 0 ; Offset to call gate
-_PM_gdt dw 0 ; Selector to call gate
-
-enddataseg _pmos2
-
-begcodeseg _pmos2 ; Start of code segment
-
-;----------------------------------------------------------------------------
-; int PM_setIOPL(int iopl)
-;----------------------------------------------------------------------------
-; Change the IOPL level for the 32-bit task. Returns the previous level
-; so it can be restored for the task correctly.
-;----------------------------------------------------------------------------
-cprocstart PM_setIOPL
-
- ARG iopl:UINT
-
- enter_c
- pushfd ; Save the old EFLAGS for later
- mov ecx,[iopl] ; ECX := IOPL level
- xor ebx,ebx ; Change IOPL level function code (0)
-ifdef USE_NASM
- call far dword [_PM_ioentry]
-else
- call [FWORD _PM_ioentry]
-endif
- pop eax
- and eax,0011000000000000b
- shr eax,12
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_setGDTSelLimit(ushort selector, ulong limit);
-;----------------------------------------------------------------------------
-; Change the GDT selector limit to given value. Used to change selector
-; limits to address the entire system address space.
-;----------------------------------------------------------------------------
-cprocstart _PM_setGDTSelLimit
-
- ARG selector:USHORT, limit:UINT
-
- enter_c
- sub esp,20 ; Make room for selector data on stack
- mov ecx,esp ; ECX := selector data structure
- mov bx,[selector] ; Fill out the data structure
- and bx,0FFF8h ; Kick out the LDT/GDT and DPL bits
- mov [WORD ecx],bx
- mov ebx,[limit]
- mov [DWORD ecx+4],ebx
- mov ebx,5 ; Set GDT selector limit function code
-ifdef USE_NASM
- call far dword [_PM_ioentry]
-else
- call [FWORD _PM_ioentry]
-endif
- add esp,20
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_getCx86(uchar reg);
-;----------------------------------------------------------------------------
-; Read a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_getCx86
-
- ARG reg:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- in al,23h
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_setCx86(uchar reg,uchar val);
-;----------------------------------------------------------------------------
-; Write a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_setCx86
-
- ARG reg:UCHAR, val:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- mov al,[val]
- out 23h,al
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_disableInt
-
-; Do nothing!
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreInt(ulong ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreInt
-
-; Do nothing!
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void DebugInt(void)
-;----------------------------------------------------------------------------
-cprocstart DebugInt
-
- int 3
- ret
-
-cprocend
-
-endcodeseg _pmos2
-
- END ; End of module
-
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/os2/cpuinfo.c
deleted file mode 100644
index 7de400d..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/cpuinfo.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: OS/2
-*
-* Description: OS/2 specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-TODO: This should be implemented for OS/2!
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-TODO: This should be implemented for OS/2!
-****************************************************************************/
-#define RestoreThreadPriority(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 100000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- ULONG count; \
- DosQuerySysInfo( QSV_MS_COUNT, QSV_MS_COUNT, &count, sizeof(ULONG) ); \
- (t)->low = count * 100; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj b/board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj
deleted file mode 100644
index 5533346..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/dossctl.obj
+++ /dev/null
Binary files differ
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/event.c b/board/MAI/bios_emulator/scitech/src/pm/os2/event.c
deleted file mode 100644
index 91cc19b..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/event.c
+++ /dev/null
@@ -1,565 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC (OS/2)
-*
-* Description: OS/2 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-/* Define generous keyboard monitor circular buffer size to minimize
- * the danger of losing keystrokes
- */
-#define KEYBUFSIZE (EVENTQSIZE + 10)
-
-static int oldMouseState; /* Old mouse state */
-static ulong oldKeyMessage; /* Old keyboard state */
-static ushort keyUpMsg[256] = {0}; /* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-HMOU _EVT_hMouse; /* Handle to the mouse driver */
-HMONITOR _EVT_hKbdMon; /* Handle to the keyboard driver */
-TID kbdMonTID = 0; /* Keyboard monitor thread ID */
-HEV hevStart; /* Start event semaphore handle */
-BOOL bMonRunning; /* Flag set if monitor thread OK */
-HMTX hmtxKeyBuf; /* Mutex protecting key buffer */
-KEYPACKET keyMonPkts[KEYBUFSIZE]; /* Array of monitor key packets */
-int kpHead = 0; /* Key packet buffer head */
-int kpTail = 0; /* Key packet buffer tail */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under OS/2 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- ULONG count;
- DosQuerySysInfo( QSV_MS_COUNT, QSV_MS_COUNT, &count, sizeof(ULONG) );
- return count;
-}
-
-/****************************************************************************
-REMARKS:
-Converts a mickey movement value to a pixel adjustment value.
-****************************************************************************/
-static int MickeyToPixel(
- int mickey)
-{
- /* TODO: We can add some code in here to handle 'acceleration' for */
- /* the mouse cursor. For now just use the mickeys. */
- return mickey;
-}
-
-/* Some useful defines any typedefs used in the keyboard handling */
-#define KEY_RELEASE 0x40
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from OS/2 into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- KBDINFO keyInfo; /* Must not cross a 64K boundary */
- KBDKEYINFO key; /* Must not cross a 64K boundary */
- MOUQUEINFO mqueue; /* Must not cross a 64K boundary */
- MOUEVENTINFO mouse; /* Must not cross a 64K boundary */
- ushort mWait; /* Must not cross a 64K boundary */
- KEYPACKET kp; /* Must not cross a 64K boundary */
- event_t evt;
- int scan;
- ibool noInput = TRUE; /* Flag to determine if any input was available */
-
- /* First of all, check if we should do any session switch work */
- __PM_checkConsoleSwitch();
-
- /* Pump all keyboard messages from our circular buffer */
- for (;;) {
- /* Check that the monitor thread is still running */
- if (!bMonRunning)
- PM_fatalError("Keyboard monitor thread died!");
-
- /* Protect keypacket buffer with mutex */
- DosRequestMutexSem(hmtxKeyBuf, SEM_INDEFINITE_WAIT);
- if (kpHead == kpTail) {
- DosReleaseMutexSem(hmtxKeyBuf);
- break;
- }
-
- noInput = FALSE;
-
- /* Read packet from circular buffer and remove it */
- memcpy(&kp, &keyMonPkts[kpTail], sizeof(KEYPACKET));
- if (++kpTail == KEYBUFSIZE)
- kpTail = 0;
- DosReleaseMutexSem(hmtxKeyBuf);
-
- /* Compensate for the 0xE0 character */
- if (kp.XlatedScan && kp.XlatedChar == 0xE0)
- kp.XlatedChar = 0;
-
- /* Determine type of keyboard event */
- memset(&evt,0,sizeof(evt));
- if (kp.KbdDDFlagWord & KEY_RELEASE)
- evt.what = EVT_KEYUP;
- else
- evt.what = EVT_KEYDOWN;
-
- /* Convert keyboard codes */
- scan = kp.MonFlagWord >> 8;
- if (evt.what == EVT_KEYUP) {
- /* Get message for keyup code from table of cached down values */
- evt.message = keyUpMsg[scan];
- keyUpMsg[scan] = 0;
- oldKeyMessage = -1;
- }
- else {
- evt.message = ((ulong)scan << 8) | kp.XlatedChar;
- if (evt.message == keyUpMsg[scan]) {
- evt.what = EVT_KEYREPEAT;
- evt.message |= 0x10000;
- }
- oldKeyMessage = evt.message & 0x0FFFF;
- keyUpMsg[scan] = (ushort)evt.message;
- }
-
- /* Convert shift state modifiers */
- if (kp.u.ShiftState & 0x0001)
- evt.modifiers |= EVT_RIGHTSHIFT;
- if (kp.u.ShiftState & 0x0002)
- evt.modifiers |= EVT_LEFTSHIFT;
- if (kp.u.ShiftState & 0x0100)
- evt.modifiers |= EVT_LEFTCTRL;
- if (kp.u.ShiftState & 0x0200)
- evt.modifiers |= EVT_LEFTALT;
- if (kp.u.ShiftState & 0x0400)
- evt.modifiers |= EVT_RIGHTCTRL;
- if (kp.u.ShiftState & 0x0800)
- evt.modifiers |= EVT_RIGHTALT;
- EVT.oldMove = -1;
-
- /* Add time stamp and add the event to the queue */
- evt.when = key.time;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Don't just flush because that terminally confuses the monitor */
- do {
- KbdCharIn(&key, IO_NOWAIT, 0);
- } while (key.fbStatus & KBDTRF_FINAL_CHAR_IN);
-
- /* Pump all mouse messages */
- KbdGetStatus(&keyInfo,0);
- /* Check return code - mouse may not be operational!! */
- if (MouGetNumQueEl(&mqueue,_EVT_hMouse) == NO_ERROR) {
- while (mqueue.cEvents) {
- while (mqueue.cEvents--) {
- memset(&evt,0,sizeof(evt));
- mWait = MOU_NOWAIT;
- MouReadEventQue(&mouse,&mWait,_EVT_hMouse);
-
- /* Update the mouse position. We get the mouse coordinates
- * in mickeys so we have to translate these into pixels and
- * move our mouse position. If we don't do this, OS/2 gives
- * us the coordinates in character positions since it still
- * thinks we are in text mode!
- */
- EVT.mx += MickeyToPixel(mouse.col);
- EVT.my += MickeyToPixel(mouse.row);
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > rangeX) EVT.mx = rangeX;
- if (EVT.my > rangeY) EVT.my = rangeY;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = mouse.col;
- evt.relative_y = mouse.row;
- evt.when = key.time;
- if (mouse.fs & (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN))
- evt.modifiers |= EVT_LEFTBUT;
- if (mouse.fs & (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN))
- evt.modifiers |= EVT_RIGHTBUT;
- if (mouse.fs & (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN))
- evt.modifiers |= EVT_MIDDLEBUT;
- if (keyInfo.fsState & 0x0001)
- evt.modifiers |= EVT_RIGHTSHIFT;
- if (keyInfo.fsState & 0x0002)
- evt.modifiers |= EVT_LEFTSHIFT;
- if (keyInfo.fsState & 0x0100)
- evt.modifiers |= EVT_LEFTCTRL;
- if (keyInfo.fsState & 0x0200)
- evt.modifiers |= EVT_LEFTALT;
- if (keyInfo.fsState & 0x0400)
- evt.modifiers |= EVT_RIGHTCTRL;
- if (keyInfo.fsState & 0x0800)
- evt.modifiers |= EVT_RIGHTALT;
-
- /* Check for left mouse click events */
- /* 0x06 == (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN) */
- if (((mouse.fs & 0x0006) && !(oldMouseState & 0x0006))
- || (!(mouse.fs & 0x0006) && (oldMouseState & 0x0006))) {
- if (mouse.fs & 0x0006)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Check for right mouse click events */
- /* 0x0018 == (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN) */
- if (((mouse.fs & 0x0018) && !(oldMouseState & 0x0018))
- || (!(mouse.fs & 0x0018) && (oldMouseState & 0x0018))) {
- if (mouse.fs & 0x0018)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Check for middle mouse click events */
- /* 0x0060 == (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN) */
- if (((mouse.fs & 0x0060) && !(oldMouseState & 0x0060))
- || (!(mouse.fs & 0x0060) && (oldMouseState & 0x0060))) {
- if (mouse.fs & 0x0060)
- evt.what = EVT_MOUSEDOWN;
- else
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_MIDDLEBMASK;
- EVT.oldMove = -1;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
-
- /* Check for mouse movement event */
- if (mouse.fs & 0x002B) {
- evt.what = EVT_MOUSEMOVE;
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = evt.where_y;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- }
-
- /* Save current mouse state */
- oldMouseState = mouse.fs;
- }
- MouGetNumQueEl(&mqueue,_EVT_hMouse);
- }
- noInput = FALSE;
- }
-
- /* If there was no input available, give up the current timeslice
- * Note: DosSleep(0) will effectively do nothing if no other thread is ready. Hence
- * DosSleep(0) will still use 100% CPU _but_ should not interfere with other programs.
- */
- if (noInput)
- DosSleep(0);
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Keyboard monitor thread. Needed to catch both keyup and keydown events.
-****************************************************************************/
-static void _kbdMonThread(
- void *params)
-{
- APIRET rc;
- KEYPACKET kp;
- USHORT count = sizeof(KEYPACKET);
- MONBUF monInbuf;
- MONBUF monOutbuf;
- int kpNew;
-
- /* Raise thread priority for higher responsiveness */
- DosSetPriority(PRTYS_THREAD, PRTYC_TIMECRITICAL, 0, 0);
- monInbuf.cb = sizeof(monInbuf) - sizeof(monInbuf.cb);
- monOutbuf.cb = sizeof(monOutbuf) - sizeof(monOutbuf.cb);
- bMonRunning = FALSE;
-
- /* Register the buffers to be used for monitoring for current session */
- if (DosMonReg(_EVT_hKbdMon, &monInbuf, (ULONG*)&monOutbuf,MONITOR_END, -1)) {
- DosPostEventSem(hevStart); /* unblock the main thread */
- return;
- }
-
- /* Unblock the main thread and tell it we're OK*/
- bMonRunning = TRUE;
- DosPostEventSem(hevStart);
- while (bMonRunning) { /* Start an endless loop */
- /* Read data from keyboard driver */
- rc = DosMonRead((PBYTE)&monInbuf, IO_WAIT, (PBYTE)&kp, (PUSHORT)&count);
- if (rc) {
-#ifdef CHECKED
- if (bMonRunning)
- printf("Error in DosMonRead, rc = %ld\n", rc);
-#endif
- bMonRunning = FALSE;
- return;
- }
-
- /* Pass FLUSH packets immediately */
- if (kp.MonFlagWord & 4) {
-#ifdef CHECKED
- printf("Flush packet!\n");
-#endif
- DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count);
- continue;
- }
-
- /*TODO: to be removed */
- /* Skip extended scancodes & some others */
- if (((kp.MonFlagWord >> 8) == 0xE0) || ((kp.KbdDDFlagWord & 0x0F) == 0x0F)) {
- DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count);
- continue;
- }
-
-/* printf("RawScan = %X, XlatedScan = %X, fbStatus = %X, KbdDDFlags = %X\n", */
-/* kp.MonFlagWord >> 8, kp.XlatedScan, kp.u.ShiftState, kp.KbdDDFlagWord); */
-
- /* Protect access to buffer with mutex semaphore */
- rc = DosRequestMutexSem(hmtxKeyBuf, 1000);
- if (rc) {
-#ifdef CHECKED
- printf("Can't get access to mutex, rc = %ld\n", rc);
-#endif
- bMonRunning = FALSE;
- return;
- }
-
- /* Store packet in circular buffer, drop it if it's full */
- kpNew = kpHead + 1;
- if (kpNew == KEYBUFSIZE)
- kpNew = 0;
- if (kpNew != kpTail) {
- memcpy(&keyMonPkts[kpHead], &kp, sizeof(KEYPACKET));
- /* TODO: fix this! */
- /* Convert break to make code */
- keyMonPkts[kpHead].MonFlagWord &= 0x7FFF;
- kpHead = kpNew;
- }
- DosReleaseMutexSem(hmtxKeyBuf);
-
- /* Finally write the packet */
- rc = DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count);
- if (rc) {
-#ifdef CHECKED
- if (bMonRunning)
- printf("Error in DosMonWrite, rc = %ld\n", rc);
-#endif
- bMonRunning = FALSE;
- return;
- }
- }
- (void)params;
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signal)
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- ushort stat;
-
- /* Initialise the event queue */
- PM_init();
- EVT.mouseMove = mouseMove;
- initEventQueue();
- oldMouseState = 0;
- oldKeyMessage = 0;
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* Open the mouse driver, and set it up to report events in mickeys */
- MouOpen(NULL,&_EVT_hMouse);
- stat = 0x7F;
- MouSetEventMask(&stat,_EVT_hMouse);
- stat = (MOU_NODRAW | MOU_MICKEYS) << 8;
- MouSetDevStatus(&stat,_EVT_hMouse);
-
- /* Open the keyboard monitor */
- if (DosMonOpen((PSZ)"KBD$", &_EVT_hKbdMon))
- PM_fatalError("Unable to open keyboard monitor!");
-
- /* Create event semaphore, the monitor will post it when it's initalized */
- if (DosCreateEventSem(NULL, &hevStart, 0, FALSE))
- PM_fatalError("Unable to create event semaphore!");
-
- /* Create mutex semaphore protecting the keypacket buffer */
- if (DosCreateMutexSem(NULL, &hmtxKeyBuf, 0, FALSE))
- PM_fatalError("Unable to create mutex semaphore!");
-
- /* Start keyboard monitor thread, use 32K stack */
- kbdMonTID = _beginthread(_kbdMonThread, NULL, 0x8000, NULL);
-
- /* Now block until the monitor thread is up and running */
- /* Give the thread one second */
- DosWaitEventSem(hevStart, 1000);
- if (!bMonRunning) { /* Check the thread is OK */
- DosMonClose(_EVT_hKbdMon);
- PM_fatalError("Keyboard monitor thread didn't initialize!");
- }
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- APIRET rc;
-
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* Close the mouse driver */
- MouClose(_EVT_hMouse);
-
- /* Stop the keyboard monitor thread and close the monitor */
- bMonRunning = FALSE;
- rc = DosKillThread(kbdMonTID);
-#ifdef CHECKED
- if (rc)
- printf("DosKillThread failed, rc = %ld\n", rc);
-#endif
- rc = DosMonClose(_EVT_hKbdMon);
-#ifdef CHECKED
- if (rc) {
- printf("DosMonClose failed, rc = %ld\n", rc);
- }
-#endif
- DosCloseEventSem(hevStart);
- DosCloseMutexSem(hmtxKeyBuf);
- KbdFlushBuffer(0);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h b/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h
deleted file mode 100644
index 28d39fb..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h
+++ /dev/null
@@ -1,165 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Include file to include all OS/2 keyboard monitor stuff.
-*
-****************************************************************************/
-
-/* Monitors stuff */
-
-#define MONITOR_DEFAULT 0x0000
-#define MONITOR_BEGIN 1
-#define MONITOR_END 2
-
-typedef SHANDLE HMONITOR;
-typedef HMONITOR *PHMONITOR;
-
-typedef struct _KEYPACKET {
- USHORT MonFlagWord;
- UCHAR XlatedChar;
- UCHAR XlatedScan;
- UCHAR DBCSStatus;
- UCHAR DBCSShift;
-
- union
- {
- USHORT ShiftState;
- USHORT LayerIndex;
- } u;
-
- ULONG Milliseconds;
- USHORT KbdDDFlagWord;
-} KEYPACKET;
-
-typedef struct _MLNPACKET {
- USHORT MonFlagWord;
- USHORT IOCTL;
- USHORT CPId;
- USHORT CPIndex;
- ULONG Reserved;
- USHORT KbdDDFlagWord;
-} MLNPACKET;
-
-/* DBCSStatus */
-
-#define SF_SHIFTS 1 /* If set to 1, shift status returned without a character */
-#define SF_NOTCHAR 2 /* 0 - Scan code is a character */
- /* 1 - Scan code is not a character; */
- /* instead it is an extended key code from the keyboard. */
-#define SF_IMMEDIATE 32 /* If set to 1, immediate conversion requested */
-#define SF_TYPEMASK 192 /* Has the following values: */
- /* 00 - Undefined */
- /* 01 - Final character; interim character flag is turned off */
- /* 10 - Interim character */
- /* 11 - Final character; interim character flag is turned on. */
-/* MonFlagWord */
-
-#define MF_OPEN 1 /* open */
-#define MF_CLOSE 2 /* close */
-#define MF_FLUSH 4 /* is flush packet */
-
-/* KbdDDFlagWord */
-
-#define KF_NOTSQPACKET 1024 /* Don't put this packet in SQ buffer */
-#define KF_ACCENTEDKEY 512 /* Key was translated using previous accent. */
-#define KF_MULTIMAKE 256 /* Key was repeated make of a toggle key. */
-#define KF_SECONDARYKEY 128 /* Previous scan code was the E0 prefix code. */
-#define KF_KEYBREAK 64 /* This is the break of the key. */
-#define KF_KEYTYPEMASK 63 /* Isolates the Key Type field of DDFlags. */
-#define KF_UNDEFKEY 63 /* Key packet is undefined */
-#define KF_SYSREQKEY 23 /* This key packet is the SysReq key (4990) */
-#define KF_PRINTFLUSHKEY 22 /* This packet is Ct-Alt-PrtScr */
-#define KF_PSPRINTECHOKEY 21 /* This packet is Ctl-P */
-#define KF_PRINTECHOKEY 20 /* This packet is Ctl-PrtScr */
-#define KF_PRTSCRKEY 19 /* This packet is PrtScr */
-#define KF_PSBREAKKEY 18 /* This packet is Ctl-C */
-#define KF_BREAKKEY 17 /* This packet is Ctl-Break */
-#define KF_ACCENTKEY 16 /* This packet is an accent key */
-#define KF_XRORPNOT 13 /* This packet is a Read or Peek Notification Pct. */
-#define KF_MLNOTIFICATION 14 /* packet is a Multi-Layer NLS packet */
-#define KF_HOTKEYPACKET 12 /* This packet is the hot key. */
-#define KF_BADKEYCOMBO 11 /* Accent/char combo undefined, beep only. */
-#define KF_WAKEUPKEY 10 /* This packet is one following PAUSEKEY */
-#define KF_PSPAUSEKEY 9 /* This packet is Ctl-S */
-#define KF_PAUSEKEY 8 /* This packet is Ctl-Numlock or PAUSE */
-#define KF_SHIFTMASK 7 /* Key is a shift Key */
-#define KF_DUMPKEY 6 /* This packet is Ctl-Numlock-NumLock */
-#define KF_REBOOTKEY 5 /* This packet is Ctl-Alt-Del */
-#define KF_RESENDCODE 4 /* This packet is resend code from controller */
-#define KF_OVERRUNCODE 3 /* This packet is overrun code from controller */
-#define KF_SECPREFIXCODE 2 /* This packet is E0/E1 scan code */
-#define KF_ACKCODE 1 /* This packet is ack code from keyboard */
-
-
-typedef struct _MONBUF {
- USHORT cb;
- KEYPACKET Buffer;
- BYTE Reserved[20];
-} MONBUF;
-
-#define RS_SYSREG 32768 /* Bit 15 SysReq key down */
-#define RS_CAPSLOCK 16384 /* Bit 14 Caps Lock key down */
-#define RS_NUMLOCK 8192 /* Bit 13 NumLock key down */
-#define RS_SCROLLLOCK 4096 /* Bit 12 Scroll Lock key down */
-#define RS_RALT 2048 /* Bit 11 Right Alt key down */
-#define RS_RCONTROL 1024 /* Bit 10 Right Ctrl key down */
-#define RS_LALT 512 /* Bit 9 Left Alt key down */
-#define RS_LCONTROL 256 /* Bit 8 Left Ctrl key down */
-#define RS_INSERT 128 /* Bit 7 Insert on */
-#define RS_CAPS 64 /* Bit 6 Caps Lock on */
-#define RS_NUM 32 /* Bit 5 NumLock on */
-#define RS_SCROLL 16 /* Bit 4 Scroll Lock on */
-#define RS_ALT 8 /* Bit 3 Either Alt key down */
-#define RS_CONTROL 4 /* Bit 2 Either Ctrl key down */
-#define RS_LSHIFT 2 /* Bit 1 Left Shift key down */
-#define RS_RSHIFT 1 /* Bit 0 Right Shift key down */
-
-
-#define CS_RCONTROL 91 /* Right Control */
-#define CS_LSHIFT 42 /* Left Shift */
-#define CS_RSHIFT 54 /* Right Shift */
-#define CS_LALT 56 /* Left Alt */
-#define CS_RALT 94 /* Right Alt */
-
-
-/* DosMon* prototypes */
-#ifdef __EMX__
- #define APIRET16 USHORT
- #define APIENTRY16
-#else
- #define DosMonOpen DOS16MONOPEN
- #define DosMonClose DOS16MONCLOSE
- #define DosMonReg DOS16MONREG
- #define DosMonRead DOS16MONREAD
- #define DosMonWrite DOS16MONWRITE
- #define DosGetInfoSeg DOS16GETINFOSEG
-#endif
-
-APIRET16 APIENTRY16 DosMonOpen (PSZ pszDevName, PHMONITOR phmon);
-APIRET16 APIENTRY16 DosMonClose (HMONITOR hmon);
-APIRET16 APIENTRY16 DosMonReg (HMONITOR hmon, MONBUF *pbInBuf, /*MONBUF*/ULONG *pbOutBuf, USHORT fPosition, USHORT usIndex);
-APIRET16 APIENTRY16 DosMonRead (PBYTE pbInBuf, USHORT fWait, PBYTE pbDataBuf, PUSHORT pcbData);
-APIRET16 APIENTRY16 DosMonWrite (PBYTE pbOutBuf, PBYTE pbDataBuf, USHORT cbData);
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h
deleted file mode 100644
index e7aa1c6..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h
+++ /dev/null
@@ -1,41 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define INCL_DOSPROFILE
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-#include <process.h>
-#include "os2/mon.h"
-
-void __PM_checkConsoleSwitch(void);
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c b/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c
deleted file mode 100644
index 756eead..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c
+++ /dev/null
@@ -1,2008 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "pm_help.h"
-#include "mtrr.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <process.h>
-#ifndef __EMX__
-#include <direct.h>
-#endif
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
-
-/* Semaphore for communication with our background daemon */
-#define SHAREDSEM ((PSZ)"\\SEM32\\SDD\\DAEMON")
-#define DAEMON_NAME "SDDDAEMN.EXE"
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* Public structures used to communicate with VIDEOPMI for implementing
- * the ability to call the real mode BIOS functions.
- */
-
-typedef struct _VIDEOMODEINFO {
- ULONG miModeId;
- USHORT usType;
- USHORT usInt10ModeSet;
- USHORT usXResolution;
- USHORT usYResolution;
- ULONG ulBufferAddress;
- ULONG ulApertureSize;
- BYTE bBitsPerPixel;
- BYTE bBitPlanes;
- BYTE bXCharSize;
- BYTE bYCharSize;
- USHORT usBytesPerScanLine;
- USHORT usTextRows;
- ULONG ulPageLength;
- ULONG ulSaveSize;
- BYTE bVrtRefresh;
- BYTE bHrtRefresh;
- BYTE bVrtPolPos;
- BYTE bHrtPolPos;
- CHAR bRedMaskSize;
- CHAR bRedFieldPosition;
- CHAR bGreenMaskSize;
- CHAR bGreenFieldPosition;
- CHAR bBlueMaskSize;
- CHAR bBlueFieldPosition;
- CHAR bRsvdMaskSize;
- CHAR bRsvdFieldPosition;
- ULONG ulColors;
- ULONG ulReserved[3];
- } VIDEOMODEINFO, FAR *PVIDEOMODEINFO;
-
-typedef struct _ADAPTERINFO {
- ULONG ulAdapterID;
- CHAR szOEMString[128];
- CHAR szDACString[128];
- CHAR szRevision[128];
- ULONG ulTotalMemory;
- ULONG ulMMIOBaseAddress;
- ULONG ulPIOBaseAddress;
- BYTE bBusType;
- BYTE bEndian;
- USHORT usDeviceBusID;
- USHORT usVendorBusID;
- USHORT SlotID;
- } ADAPTERINFO, FAR *PADAPTERINFO;
-
-typedef struct _VIDEO_ADAPTER {
- void *hvideo;
- ADAPTERINFO Adapter;
- VIDEOMODEINFO ModeInfo;
- } VIDEO_ADAPTER, FAR *PVIDEO_ADAPTER;
-
-/* PMIREQUEST_SOFTWAREINT structures from OS/2 DDK */
-
-typedef struct {
- ULONG ulFlags; /* VDM initialization type */
-#define VDM_POSTLOAD 0x1 /* adapter just loaded, used internally for initialization */
-#define VDM_INITIALIZE 0x2 /* force initialization of a permanently open VDM, even if previously initialized */
-#define VDM_TERMINATE_POSTINITIALIZE 0x6 /*start VDM with initialization, but close it afterwards (includes VDM_INITIALIZE) */
-#define VDM_QUERY_CAPABILITY 0x10 /* query the current int 10 capability */
-#define VDM_FULL_VDM_CREATED 0x20 /* a full VDM is created */
-#define VDM_MINI_VDM_CREATED 0x40 /* a mini VDM is created */
-#define VDM_MINI_VDM_SUPPORTED 0x80 /* mini VDM support is available */
- PCHAR szName; /* VDM initialization program */
- PCHAR szArgs; /* VDM initialization arguments */
- }INITVDM;
-
-typedef struct {
- BYTE bBufferType;
-#define BUFFER_NONE 0
-#define INPUT_BUFFER 1
-#define OUTPUT_BUFFER 2
- BYTE bReserved;
- BYTE bSelCRF;
- BYTE bOffCRF;
- PVOID pAddress;
- ULONG ulSize;
- } BUFFER, *PBUFFER;
-
-typedef struct vcrf_s {
- ULONG reg_eax;
- ULONG reg_ebx;
- ULONG reg_ecx;
- ULONG reg_edx;
- ULONG reg_ebp;
- ULONG reg_esi;
- ULONG reg_edi;
- ULONG reg_ds;
- ULONG reg_es;
- ULONG reg_fs;
- ULONG reg_gs;
- ULONG reg_cs;
- ULONG reg_eip;
- ULONG reg_eflag;
- ULONG reg_ss;
- ULONG reg_esp;
- } VCRF;
-
-typedef struct {
- ULONG ulBIOSIntNo;
- VCRF aCRF;
- BUFFER pB[2];
- } INTCRF;
-
-#define PMIREQUEST_LOADPMIFILE 21
-#define PMIREQUEST_IDENTIFYADAPTER 22
-#define PMIREQUEST_SOFTWAREINT 23
-
-#ifdef PTR_DECL_IN_FRONT
-#define EXPENTRYP * EXPENTRY
-#else
-#define EXPENTRYP EXPENTRY *
-#endif
-
-/* Entry point to VIDEOPMI32Request. This may be overridden by external
- * code that has already loaded VIDEOPMI to avoid loading it twice.
- */
-
-APIRET (EXPENTRYP PM_VIDEOPMI32Request)(PVIDEO_ADAPTER, ULONG, PVOID, PVOID) = NULL;
-static ibool haveInt10 = -1; /* True if we have Int 10 support */
-static ibool useVPMI = true; /* False if VIDEOPMI unavailable */
-static VIDEO_ADAPTER Adapter; /* Video adapter for VIDEOPMI */
-static uchar RMBuf[1024]; /* Fake real mode transfer buffer */
-static uint VESABuf_len = 1024;/* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL;/* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static uchar * lowMem = NULL;
-static ibool isSessionSwitching = false;
-static ulong parmsIn[4]; /* Must not cross 64Kb boundary! */
-static ulong parmsOut[4]; /* Must not cross 64Kb boundary! */
-extern ushort _PM_gdt;
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/* DosSysCtl prototype. It is not declared in the headers but it is in the
- * standard import libraries (DOSCALLS.876). Funny.
- */
-APIRET APIENTRY DosSysCtl(ULONG ulFunction, PVOID pvData);
-
-/* This is the stack size for the threads that track the session switch event */
-#define SESSION_SWITCH_STACK_SIZE 32768
-
-typedef struct {
- VIOMODEINFO vmi;
- USHORT CursorX;
- USHORT CursorY;
- UCHAR FrameBuffer[1];
- } CONSOLE_SAVE;
-
-typedef struct _SESWITCHREC {
- /* The following variable is volatile because of PM_SUSPEND_APP */
- volatile int Flags; /* -1 or PM_DEACTIVATE or PM_REACTIVATE */
- PM_saveState_cb Callback; /* Save/restore context callback */
- HMTX Mutex; /* Exclusive access mutex */
- HEV Event; /* Posted after callback is called */
- } SESWITCHREC;
-
-/* Page sized block cache */
-
-#define PAGES_PER_BLOCK 32
-#define PAGE_BLOCK_SIZE (PAGES_PER_BLOCK * PM_PAGE_SIZE + (PM_PAGE_SIZE-1) + sizeof(pageblock))
-#define FREELIST_NEXT(p) (*(void**)(p))
-typedef struct pageblock {
- struct pageblock *next;
- struct pageblock *prev;
- void *freeListStart;
- void *freeList;
- void *freeListEnd;
- int freeCount;
- PM_lockHandle lockHandle;
- } pageblock;
-
-static pageblock *pageBlocks = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-func - Helper device driver function to call
-
-RETURNS:
-First return value from the device driver in parmsOut[0]
-
-REMARKS:
-Function to open our helper device driver, call it and close the file
-handle. Note that we have to open the device driver for every call because
-of two problems:
-
- 1. We cannot open a single file handle in a DLL that is shared amongst
- programs, since every process must have it's own open file handle.
-
- 2. For some reason there appears to be a limit of about 12 open file
- handles on a device driver in the system. Hence when we open more
- than about 12 file handles things start to go very strange.
-
-Hence we simply open the file handle every time that we need to call the
-device driver to work around these problems.
-****************************************************************************/
-static ulong CallSDDHelp(
- int func)
-{
- static ulong inLen; /* Must not cross 64Kb boundary! */
- static ulong outLen; /* Must not cross 64Kb boundary! */
- HFILE hSDDHelp;
- ULONG rc;
- ulong result;
-
- if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL)) != 0) {
- if (rc == 4) { /* Did we run out of file handles? */
- ULONG ulNewFHs;
- LONG lAddFHs = 5;
-
- if (DosSetRelMaxFH(&lAddFHs, &ulNewFHs) != 0)
- PM_fatalError("Failed to raise the file handles limit!");
- else {
- if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0,
- FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE,
- NULL)) != 0) {
- PM_fatalError("Unable to open SDDHELP$ helper device driver! (#2)");
- }
- }
- }
- else
- PM_fatalError("Unable to open SDDHELP$ helper device driver!");
- }
- if (DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func,
- &parmsIn, inLen = sizeof(parmsIn), &inLen,
- &parmsOut, outLen = sizeof(parmsOut), &outLen) != 0)
- PM_fatalError("Failure calling SDDHELP$ helper device driver!");
- DosClose(hSDDHelp);
- return parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Determine if we're running on a DBCS system.
-****************************************************************************/
-ibool __IsDBCSSystem(void)
-{
- CHAR achDBCSInfo[12];
- COUNTRYCODE ccStruct = {0, 0};
-
- memset(achDBCSInfo, 0, 12);
-
- /* Get the DBCS vector - if it's not empty, we're on DBCS */
- DosQueryDBCSEnv(sizeof(achDBCSInfo), &ccStruct, achDBCSInfo);
- if (achDBCSInfo[0] != 0)
- return true;
- else
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Determine if PMSHELL is running - if it isn't, we can't use certain calls
-****************************************************************************/
-ibool __isShellLoaded(void)
-{
- PVOID ptr;
-
- if (DosGetNamedSharedMem(&ptr, (PSZ)"\\SHAREMEM\\PMGLOBAL.MEM", PAG_READ) == NO_ERROR) {
- DosFreeMem(ptr);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library and connect to our helper device driver. If we
-cannot connect to our helper device driver, we bail out with an error
-message.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- if (!lowMem) {
- /* Obtain the 32->16 callgate from the device driver to enable IOPL */
- if ((_PM_gdt = CallSDDHelp(PMHELP_GETGDT32)) == 0)
- PM_fatalError("Unable to obtain call gate selector!");
-
- PM_setIOPL(3);
-
- /* Map the first Mb of physical memory into lowMem */
- if ((lowMem = PM_mapPhysicalAddr(0,0xFFFFF,true)) == NULL)
- PM_fatalError("Unable to map first Mb physical memory!");
-
- /* Initialise the MTRR interface functions */
- MTRR_init();
- }
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library for BIOS access via VIDEOPMI. This should work
-with any GRADD driver, including SDD/2.
-****************************************************************************/
-static ibool InitInt10(void)
-{
- HMODULE hModGENPMI,hModSDDPMI,hModVideoPMI;
- CHAR buf[80],path[_MAX_PATH];
- HEV hevDaemon = NULLHANDLE;
- RESULTCODES resCodes;
-
- if (haveInt10 == -1) {
- /* Connect to VIDEOPMI and get entry point. Note that we only
- * do this if GENPMI or SDDPMI are already loaded, since we need
- * a GRADD based driver for this to work.
- */
- PM_init();
- haveInt10 = false;
- if (DosQueryModuleHandle((PSZ)"GENPMI.DLL",&hModGENPMI) != 0)
- hModGENPMI = NULLHANDLE;
- if (DosQueryModuleHandle((PSZ)"SDDPMI.DLL",&hModSDDPMI) != 0)
- hModSDDPMI = NULLHANDLE;
- if (hModGENPMI || hModSDDPMI) {
- if (DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"VIDEOPMI.DLL",&hModVideoPMI) == 0) {
- if (DosQueryProcAddr(hModVideoPMI,0,(PSZ)"VIDEOPMI32Request",(void*)&PM_VIDEOPMI32Request) != 0)
- PM_fatalError("Unable to get VIDEOPMI32Request entry point!");
- strcpy(path,"X:\\OS2\\SVGADATA.PMI");
- path[0] = PM_getBootDrive();
- if (PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_LOADPMIFILE,path,NULL) != 0) {
- DosFreeModule(hModVideoPMI);
- PM_VIDEOPMI32Request = NULL;
- haveInt10 = false;
- }
- else {
- /* Attempt to initialise the full VDM in the system. This will only
- * work if VPRPMI.SYS is loaded, but it provides support for passing
- * values in ES/DS/ESI/EDI between the BIOS which does not work with
- * kernel VDM's in fixpacks earlier than FP15. FP15 and later and
- * the new Warp 4.51 and Warp Server convenience packs should work
- * fine with the kernel mini-VDM.
- *
- * Also the full VDM is the only solution for really old kernels
- * (but GRADD won't run on them so this is superfluous ;-).
- */
- INITVDM InitVDM = {VDM_INITIALIZE,NULL,NULL};
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&InitVDM,NULL);
- haveInt10 = true;
- }
- }
- }
- else {
- /* A GRADD driver isn't loaded, hence we can't use VIDEOPMI. But we will try
- * to access the mini-VDM directly, first verifying that the support is
- * available in the kernel (it should be for kernels that support GRADD).
- * This may be needed in a command line boot or if non-GRADD driver is
- * used (Matrox or classic VGA).
- * Note: because of problems with mini-VDM support in the kernel, we have to
- * spawn a daemon process that will do the actual mini-VDM access for us.
- */
- /* Try to open shared semaphore to see if our daemon is already up */
- if (DosOpenEventSem(SHAREDSEM, &hevDaemon) == NO_ERROR) {
- if (DosWaitEventSem(hevDaemon, 1) == NO_ERROR) {
- /* If semaphore is posted, all is well */
- useVPMI = false;
- haveInt10 = true;
- }
- }
- else {
- /* Create shared event semaphore */
- if (DosCreateEventSem(SHAREDSEM, &hevDaemon, DC_SEM_SHARED, FALSE) == NO_ERROR) {
- PM_findBPD(DAEMON_NAME, path);
- strcat(path, DAEMON_NAME);
- if (DosExecPgm(buf, sizeof(buf), EXEC_BACKGROUND, (PSZ)DAEMON_NAME,
- NULL, &resCodes, (PSZ)path) == NO_ERROR) {
- /* The daemon was successfully spawned, now give it a sec to come up */
- if (DosWaitEventSem(hevDaemon, 2000) == NO_ERROR) {
- /* It's up! */
- useVPMI = false;
- haveInt10 = true;
- }
- }
- }
- }
- }
- }
- return haveInt10;
-}
-
-/****************************************************************************
-REMARKS:
-We "probably" have BIOS access under OS/2 but we have to verify/initialize it
-first.
-****************************************************************************/
-ibool PMAPI PM_haveBIOSAccess(void)
-{
- return InitInt10();
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- return _OS_OS2;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- /* Be prepare to be called recursively (failed to fail situation :-) */
- static int fatalErrorCount = 0;
- if (fatalErrorCount++ == 0) {
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- }
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- KBDKEYINFO key; /* Must not cross a 64K boundary */
-
- KbdPeek(&key, 0);
- return (key.fbStatus & KBDTRF_FINAL_CHAR_IN);
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- KBDKEYINFO key; /* Must not cross a 64K boundary */
-
- KbdCharIn(&key,IO_WAIT,0);
- return key.chChar;
-}
-
-/****************************************************************************
-REMARKS:
-Open a fullscreen console for output to the screen. This requires that
-the application be a fullscreen VIO program.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Find the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- VIOMODEINFO vmi;
- vmi.cb = sizeof (VIOMODEINFO);
- VioGetMode (&vmi, (HVIO)0);
- return sizeof (CONSOLE_SAVE) - 1 + vmi.col * vmi.row * 2;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- USHORT fblen;
- CONSOLE_SAVE *cs = (CONSOLE_SAVE*)stateBuf;
- VIOMODEINFO vmi;
-
- /* The reason for the VIOMODEINFO juggling is 16-bit code. Because the user
- * allocates the state buffer, cd->vmi might be crossing the 64K boundary and
- * the 16-bit API would fail. If we create another copy on stack, the compiler
- * should ensure that the 64K boundary will not be crossed (it adjusts the stack
- * if it should cross).
- */
- vmi.cb = sizeof(VIOMODEINFO);
- VioGetMode(&vmi,(HVIO)0);
- memcpy(&cs->vmi, &vmi, sizeof(VIOMODEINFO));
- VioGetCurPos(&cs->CursorY, &cs->CursorX, (HVIO)0);
- fblen = cs->vmi.col * cs->vmi.row * 2;
- VioReadCellStr((PCH)cs->FrameBuffer, &fblen, 0, 0, (HVIO)0);
-}
-
-/* Global variable to communicate between threads */
-static SESWITCHREC SesSwitchRec = { -1 };
-
-/****************************************************************************
-REMARKS:
-Called by external routines at least once per frame to check whenever a
-session save/restore should be performed. Since we receive such notifications
-asyncronously, we can't perform all required operations at that time.
-****************************************************************************/
-void __PM_checkConsoleSwitch(void)
-{
- int Flags, Mode;
- PM_saveState_cb Callback;
-
- /* Quick optimized path for most common case */
- if (SesSwitchRec.Flags == -1)
- return;
-
-again:
- if (DosRequestMutexSem(SesSwitchRec.Mutex, 100))
- return;
- Flags = SesSwitchRec.Flags;
- Callback = SesSwitchRec.Callback;
- SesSwitchRec.Flags = -1;
- DosReleaseMutexSem(SesSwitchRec.Mutex);
-
- isSessionSwitching = true; /* Prevent VIO calls */
- Mode = Callback(Flags);
- isSessionSwitching = false;
- DosPostEventSem(SesSwitchRec.Event);
- if (Flags == PM_DEACTIVATE && Mode == PM_SUSPEND_APP)
- /* Suspend application until we switch back to our application */
- for (;;) {
- DosSleep (500);
- /* SesSwitchRec.Flags is volatile so optimizer
- * won't load it into a register
- */
- if (SesSwitchRec.Flags != -1)
- goto again;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Waits until main thread processes the session switch event.
-****************************************************************************/
-static void _PM_SessionSwitchEvent(
- PM_saveState_cb saveState,
- int flags)
-{
- ULONG Count;
-
- if (DosRequestMutexSem(SesSwitchRec.Mutex, 10000))
- return;
-
- /* We're going to wait on that semaphore */
- DosResetEventSem(SesSwitchRec.Event, &Count);
- SesSwitchRec.Callback = saveState;
- SesSwitchRec.Flags = flags;
- DosReleaseMutexSem(SesSwitchRec.Mutex);
-
- /* Now wait until all required operations are complete */
- DosWaitEventSem (SesSwitchRec.Event, 10000);
-}
-
-/****************************************************************************
-REMARKS:
-This is the thread responsible for tracking switches back to our
-fullscreen session.
-****************************************************************************/
-static void _PM_ConsoleSwitch(
- PM_saveState_cb saveState)
-{
- USHORT NotifyType;
-
- for (;;) {
- if (VioModeWait(VMWR_POPUP, &NotifyType, 0) != 0)
- break;
- _PM_SessionSwitchEvent(saveState, PM_REACTIVATE);
- }
- VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_ERRORCODE, (HVIO)0);
-}
-
-/****************************************************************************
-REMARKS:
-This is the thread responsible for tracking screen popups (usually fatal
-error handler uses them).
-****************************************************************************/
-static void _PM_ConsolePopup(
- PM_saveState_cb saveState)
-{
- USHORT NotifyType;
- for (;;) {
- if (VioSavRedrawWait(VSRWI_SAVEANDREDRAW, &NotifyType, 0) != 0)
- break;
- if (NotifyType == VSRWN_SAVE)
- _PM_SessionSwitchEvent(saveState, PM_DEACTIVATE);
- else if (NotifyType == VSRWN_REDRAW)
- _PM_SessionSwitchEvent(saveState, PM_REACTIVATE);
- }
- VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_ERRORCODE, (HVIO)0);
-}
-
-/****************************************************************************
-REMARKS:
-Set the suspend application callback for the fullscreen console.
-****************************************************************************/
-void PMAPI PM_setSuspendAppCallback(
- PM_saveState_cb saveState)
-{
- /* If PM isn't loaded, this stuff will cause crashes! */
- if (__isShellLoaded()) {
- if (saveState) {
- /* Create the threads responsible for tracking console switches */
- SesSwitchRec.Flags = -1;
- DosCreateMutexSem(NULL, &SesSwitchRec.Mutex, 0, FALSE);
- DosCreateEventSem(NULL, &SesSwitchRec.Event, 0, FALSE);
- _beginthread ((void(*)(void*))_PM_ConsoleSwitch,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState);
- _beginthread ((void(*)(void*))_PM_ConsolePopup,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState);
- }
- else {
- /* Kill the threads responsible for tracking console switches */
- VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0);
- VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0);
- DosCloseEventSem(SesSwitchRec.Event);
- DosCloseMutexSem(SesSwitchRec.Mutex);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Restore the console state.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- CONSOLE_SAVE *cs = (CONSOLE_SAVE *)stateBuf;
- VIOMODEINFO vmi;
-
- if (!cs)
- return;
-
- memcpy(&vmi, &cs->vmi, sizeof (VIOMODEINFO));
- VioSetMode(&vmi, (HVIO)0);
- VioSetCurPos(cs->CursorY, cs->CursorX, (HVIO)0);
- VioWrtCellStr((PCH)cs->FrameBuffer, cs->vmi.col * cs->vmi.row * 2,0, 0, (HVIO)0);
-}
-
-/****************************************************************************
-REMARKS:
-Close the fullscreen console.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Kill the threads responsible for tracking console switches */
- PM_setSuspendAppCallback(NULL);
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* If session switch is in progress, calling into VIO causes deadlocks! */
- /* Also this call to VIO screws up our console library on DBCS boxes... */
- if (!isSessionSwitching && !__IsDBCSSystem())
- VioSetCurPos(y,x,0);
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do in here */
- (void)width;
- (void)height;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* TODO: Implement this! */
- (void)ih;
- (void)frequency;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* TODO: Implement this! */
- (void)frequency;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Implement this! */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- ulong boot = 3;
- DosQuerySysInfo(QSV_BOOT_DRIVE,QSV_BOOT_DRIVE,&boot,sizeof(boot));
- return (char)('a' + boot - 1);
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,"x:\\");
- path[0] = PM_getBootDrive();
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[CCHMAXPATH];
- if (getenv("NUCLEUS_PATH") != NULL)
- return getenv("NUCLEUS_PATH");
- strcpy(path,"x:\\os2\\drivers");
- path[0] = PM_getBootDrive();
- PM_backslash(path);
- strcat(path,"nucleus");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[40],*env;
-
- if ((env = getenv("HOSTNAME")) != NULL) {
- strncpy(name,env,sizeof(name));
- name[sizeof(name)-1] = 0;
- return name;
- }
- return "OS2";
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- PM_init();
- return lowMem + 0x400;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- PM_init();
- return lowMem + 0xA0000;
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong baseAddr,baseOfs,linear;
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to mmap. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = base & 4095;
- baseAddr = base & ~4095;
- limit = ((limit+baseOfs+1+4095) & ~4095)-1;
- parmsIn[0] = baseAddr;
- parmsIn[1] = limit;
- parmsIn[2] = isCached;
- if ((linear = CallSDDHelp(PMHELP_MAPPHYS)) == 0)
- return NULL;
- return (void*)(linear + baseOfs);
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- parmsIn[0] = (ulong)ptr;
- parmsIn[1] = limit;
- CallSDDHelp(PMHELP_FREEPHYS);
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- parmsIn[0] = (ulong)p;
- return CallSDDHelp(PMHELP_GETPHYSICALADDR);
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- parmsIn[0] = (ulong)p;
- parmsIn[1] = (ulong)length;
- parmsIn[2] = (ulong)physAddress;
- return CallSDDHelp(PMHELP_GETPHYSICALADDRRANGE);
-}
-
-/****************************************************************************
-REMARKS:
-Sleep for the specified number of milliseconds.
-****************************************************************************/
-void PMAPI PM_sleep(
- ulong milliseconds)
-{
- DosSleep(milliseconds);
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified COM port.
-****************************************************************************/
-int PMAPI PM_getCOMPort(
- int port)
-{
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified LPT port.
-****************************************************************************/
-int PMAPI PM_getLPTPort(
- int port)
-{
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For Win9x we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- parmsIn[0] = size;
- return (void*)CallSDDHelp(PMHELP_MALLOCSHARED);
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- parmsIn[0] = (ulong)ptr;
- CallSDDHelp(PMHELP_FREESHARED);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- ulong baseAddr,baseOfs;
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to mmap. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- baseOfs = (ulong)base & 4095;
- baseAddr = (ulong)base & ~4095;
- limit = ((limit+baseOfs+1+4095) & ~4095)-1;
- parmsIn[0] = (ulong)baseAddr;
- parmsIn[1] = limit;
- return (void*)(CallSDDHelp(PMHELP_MAPTOPROCESS)+baseOfs);
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- if (r_seg == 0xFFFF)
- return &RMBuf[r_off];
- return lowMem + MK_PHYS(r_seg,r_off);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- if (size > sizeof(RMBuf))
- return NULL;
- *r_seg = 0xFFFF;
- *r_off = 0x0000;
- return &RMBuf;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Nothing to do in here */
- (void)mem;
-}
-
-#define INDPMI(reg) rmregs.aCRF.reg_##reg = regs->reg
-#define OUTDPMI(reg) regs->reg = rmregs.aCRF.reg_##reg
-
-#define REG_OFFSET(field) (((ULONG)&(((VCRF*)0)->field)) / sizeof(ULONG))
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- INTCRF rmregs;
- ulong eax = 0;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = intno;
- INDPMI(eax); INDPMI(ebx); INDPMI(ecx); INDPMI(edx); INDPMI(esi); INDPMI(edi);
- rmregs.aCRF.reg_ds = regs->ds;
- rmregs.aCRF.reg_es = regs->es;
- if (intno == 0x10) {
- eax = rmregs.aCRF.reg_eax;
- switch (eax & 0xFFFF) {
- case 0x4F00:
- /* We have to hack the way this function works, due to
- * some bugs in the IBM mini-VDM BIOS support. Specifically
- * we need to make the input buffer and output buffer the
- * 'same' buffer, and that ES:SI points to the output
- * buffer (ignored by the BIOS). The data will end up
- * being returned in the input buffer, except for the
- * first four bytes ('VESA') that will not be returned.
- */
- rmregs.pB[0].bBufferType = INPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 4;
- rmregs.pB[1].bBufferType = OUTPUT_BUFFER;
- rmregs.pB[1].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[1].bOffCRF = REG_OFFSET(reg_esi);
- rmregs.pB[1].pAddress = ((PBYTE)RMBuf)+4;
- rmregs.pB[1].ulSize = 512-4;
- break;
- case 0x4F01:
- rmregs.pB[0].bBufferType = OUTPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 256;
- break;
- case 0x4F02:
- rmregs.pB[0].bBufferType = INPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 256;
- break;
- case 0x4F09:
- rmregs.pB[0].bBufferType = INPUT_BUFFER;
- rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es);
- rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi);
- rmregs.pB[0].pAddress = RMBuf;
- rmregs.pB[0].ulSize = 1024;
- break;
- case 0x4F0A:
- /* Due to bugs in the mini-VDM in OS/2, the 0x4F0A protected
- * mode interface functions will not work (we never get any
- * selectors returned), so we fail this function here. The
- * rest of the VBE/Core driver will work properly if this
- * function is failed, because the VBE 2.0 and 3.0 specs
- * allow for this.
- */
- regs->eax = 0x014F;
- return;
- }
- }
- if (useVPMI)
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,NULL,&rmregs);
- else {
- DosSysCtl(6, &rmregs);
- }
-
- OUTDPMI(eax); OUTDPMI(ebx); OUTDPMI(ecx); OUTDPMI(edx); OUTDPMI(esi); OUTDPMI(edi);
- if (((regs->eax & 0xFFFF) == 0x004F) && ((eax & 0xFFFF) == 0x4F00)) {
- /* Hack to fix up the missing 'VESA' string for mini-VDM */
- memcpy(RMBuf,"VESA",4);
- }
- regs->ds = rmregs.aCRF.reg_ds;
- regs->es = rmregs.aCRF.reg_es;
- regs->flags = rmregs.aCRF.reg_eflag;
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- DPMI_int86(intno,&rmregs);
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
- DPMI_int86(intno,&rmregs);
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- PM_fatalError("PM_callRealMode not supported on OS/2!");
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* Unable to get reliable values from OS/2 for this */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- parmsIn[0] = size;
- parmsIn[1] = contiguous;
- parmsIn[2] = below16M;
- CallSDDHelp(PMHELP_ALLOCLOCKED);
- *physAddr = parmsOut[1];
- return (void*)parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- parmsIn[0] = (ulong)p;
- CallSDDHelp(PMHELP_FREELOCKED);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a new block of pages for the page block manager.
-****************************************************************************/
-static pageblock *PM_addNewPageBlock(void)
-{
- int i;
- pageblock *newBlock;
- char *p,*next;
-
- /* Allocate memory for the new page block, and add to head of list */
- if (DosAllocSharedMem((void**)&newBlock,NULL,PAGE_BLOCK_SIZE,OBJ_GETTABLE | PAG_READ | PAG_WRITE | PAG_COMMIT))
- return NULL;
- if (!PM_lockDataPages(newBlock,PAGE_BLOCK_SIZE,&newBlock->lockHandle))
- return NULL;
- newBlock->prev = NULL;
- newBlock->next = pageBlocks;
- if (pageBlocks)
- pageBlocks->prev = newBlock;
- pageBlocks = newBlock;
-
- /* Initialise the page aligned free list for the page block */
- newBlock->freeCount = PAGES_PER_BLOCK;
- newBlock->freeList = p = (char*)(((ulong)(newBlock + 1) + (PM_PAGE_SIZE-1)) & ~(PM_PAGE_SIZE-1));
- newBlock->freeListStart = newBlock->freeList;
- newBlock->freeListEnd = p + (PAGES_PER_BLOCK-1) * PM_PAGE_SIZE;
- for (i = 0; i < PAGES_PER_BLOCK; i++,p = next)
- FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE;
- FREELIST_NEXT(p - PM_PAGE_SIZE) = NULL;
- return newBlock;
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- pageblock *block;
- void *p;
-
- /* Scan the block list looking for any free blocks. Allocate a new
- * page block if no free blocks are found.
- */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (block->freeCount)
- break;
- }
- if (block == NULL && (block = PM_addNewPageBlock()) == NULL)
- return NULL;
- block->freeCount--;
- p = block->freeList;
- block->freeList = FREELIST_NEXT(p);
- (void)locked;
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- pageblock *block;
-
- /* First find the page block that this page belongs to */
- for (block = pageBlocks; block != NULL; block = block->next) {
- if (p >= block->freeListStart && p <= block->freeListEnd)
- break;
- }
- CHECK(block != NULL);
-
- /* Now free the block by adding it to the free list */
- FREELIST_NEXT(p) = block->freeList;
- block->freeList = p;
- if (++block->freeCount == PAGES_PER_BLOCK) {
- /* If all pages in the page block are now free, free the entire
- * page block itself.
- */
- if (block == pageBlocks) {
- /* Delete from head */
- pageBlocks = block->next;
- if (block->next)
- block->next->prev = NULL;
- }
- else {
- /* Delete from middle of list */
- CHECK(block->prev != NULL);
- block->prev->next = block->next;
- if (block->next)
- block->next->prev = block->prev;
- }
-
- /* Unlock the memory and free it */
- PM_unlockDataPages(block,PAGE_BLOCK_SIZE,&block->lockHandle);
- DosFreeMem(block);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Map in all the shared memory blocks for managing the memory pages above.
-****************************************************************************/
-void PMAPI PM_mapSharedPages(void)
-{
- pageblock *block;
-
- /* Map all the page blocks above into the shared memory for process */
- for (block = pageBlocks; block != NULL; block = block->next) {
- DosGetSharedMem(block, PAG_READ | PAG_WRITE);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = (ulong)p;
- parmsIn[1] = len;
- CallSDDHelp(PMHELP_LOCKPAGES);
- lockHandle->h[0] = parmsOut[1];
- lockHandle->h[1] = parmsOut[2];
- lockHandle->h[2] = parmsOut[3];
- return parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = lockHandle->h[0];
- parmsIn[1] = lockHandle->h[1];
- parmsIn[2] = lockHandle->h[2];
- return CallSDDHelp(PMHELP_UNLOCKPAGES);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = (ulong)p;
- parmsIn[1] = len;
- CallSDDHelp(PMHELP_LOCKPAGES);
- lockHandle->h[0] = parmsOut[1];
- lockHandle->h[1] = parmsOut[2];
- lockHandle->h[2] = parmsOut[3];
- return parmsOut[0];
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lockHandle)
-{
- parmsIn[0] = lockHandle->h[0];
- parmsIn[1] = lockHandle->h[1];
- parmsIn[2] = lockHandle->h[2];
- return CallSDDHelp(PMHELP_UNLOCKPAGES);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- INTCRF rmregs;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F05;
- rmregs.aCRF.reg_ebx = 0x0000;
- rmregs.aCRF.reg_edx = bank;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- INTCRF rmregs;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F05;
- rmregs.aCRF.reg_ebx = 0x0000;
- rmregs.aCRF.reg_edx = bank;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F05;
- rmregs.aCRF.reg_ebx = 0x0001;
- rmregs.aCRF.reg_edx = bank;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- INTCRF rmregs;
-
- if (!InitInt10())
- return;
- memset(&rmregs, 0, sizeof(rmregs));
- rmregs.ulBIOSIntNo = 0x10;
- rmregs.aCRF.reg_eax = 0x4F07;
- rmregs.aCRF.reg_ebx = waitVRT;
- rmregs.aCRF.reg_ecx = x;
- rmregs.aCRF.reg_edx = y;
- PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&rmregs,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)mappedBIOS;
- (void)BIOSLen;
- return false;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/* TODO: Move the MTRR helper stuff into the call gate, or better yet */
-/* entirely into the ring 0 helper driver!! */
-
-/* MTRR helper functions. To make it easier to implement the MTRR support
- * under OS/2, we simply put our ring 0 helper functions into the
- * helper device driver rather than the entire MTRR module. This makes
- * it easier to maintain the MTRR support since we don't need to deal
- * with 16-bit ring 0 code in the MTRR library.
- */
-
-/****************************************************************************
-REMARKS:
-Flush the translation lookaside buffer.
-****************************************************************************/
-void PMAPI PM_flushTLB(void)
-{
- CallSDDHelp(PMHELP_FLUSHTLB);
-}
-
-/****************************************************************************
-REMARKS:
-Return true if ring 0 (or if we can call the helpers functions at ring 0)
-****************************************************************************/
-ibool _ASMAPI _MTRR_isRing0(void)
-{
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Read and return the value of the CR4 register
-****************************************************************************/
-ulong _ASMAPI _MTRR_saveCR4(void)
-{
- return CallSDDHelp(PMHELP_SAVECR4);
-}
-
-/****************************************************************************
-REMARKS:
-Restore the value of the CR4 register
-****************************************************************************/
-void _ASMAPI _MTRR_restoreCR4(ulong cr4Val)
-{
- parmsIn[0] = cr4Val;
- CallSDDHelp(PMHELP_RESTORECR4);
-}
-
-/****************************************************************************
-REMARKS:
-Read a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_readMSR(
- ulong reg,
- ulong *eax,
- ulong *edx)
-{
- parmsIn[0] = reg;
- CallSDDHelp(PMHELP_READMSR);
- *eax = parmsOut[0];
- *edx = parmsOut[1];
-}
-
-/****************************************************************************
-REMARKS:
-Write a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_writeMSR(
- ulong reg,
- ulong eax,
- ulong edx)
-{
- parmsIn[0] = reg;
- parmsIn[1] = eax;
- parmsIn[2] = edx;
- CallSDDHelp(PMHELP_WRITEMSR);
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- FILEFINDBUF3 *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->attrFile & FILE_READONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->attrFile & FILE_DIRECTORY)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->attrFile & FILE_ARCHIVED)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->attrFile & FILE_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->attrFile & FILE_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->cbFile;
- findData->sizeHi = 0;
- strncpy(findData->name,blk->achName,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-#define FIND_MASK (FILE_ARCHIVED | FILE_DIRECTORY | FILE_SYSTEM | FILE_HIDDEN | FILE_READONLY)
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- FILEFINDBUF3 blk;
- HDIR hdir = HDIR_CREATE;
- ulong count = 1;
-
- if (DosFindFirst((PSZ)filename,&hdir,FIND_MASK,&blk,sizeof(blk),&count,FIL_STANDARD) == NO_ERROR) {
- convertFindData(findData,&blk);
- return (void*)hdir;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- FILEFINDBUF3 blk;
- ulong count = 1;
-
- if (DosFindNext((HDIR)handle,&blk,sizeof(blk),&count) == NO_ERROR) {
- convertFindData(findData,&blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- DosFindClose((HDIR)handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 0 - Current drive
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- ulong cntDisk,cntDriveMap;
- ibool valid;
-
- DosQueryCurrentDisk(&cntDisk,&cntDriveMap);
- valid = (DosSetDefaultDisk(drive) == NO_ERROR);
- DosSetDefaultDisk(cntDisk);
- return valid;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- ulong length = len;
-
- DosQueryCurrentDir(drive, (PSZ)dir, &length);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- FILESTATUS3 s;
-
- if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s)))
- return;
- s.attrFile = 0;
- if (attrib & PM_FILE_READONLY)
- s.attrFile |= FILE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- s.attrFile |= FILE_ARCHIVED;
- if (attrib & PM_FILE_HIDDEN)
- s.attrFile |= FILE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- s.attrFile |= FILE_SYSTEM;
- DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- FILESTATUS3 fs3;
- uint retval = 0;
-
- if (DosQueryPathInfo((PSZ)filename, FIL_STANDARD, &fs3, sizeof(FILESTATUS3)))
- return 0;
- if (fs3.attrFile & FILE_READONLY)
- retval |= PM_FILE_READONLY;
- if (fs3.attrFile & FILE_ARCHIVED)
- retval |= PM_FILE_ARCHIVE;
- if (fs3.attrFile & FILE_HIDDEN)
- retval |= PM_FILE_HIDDEN;
- if (fs3.attrFile & FILE_SYSTEM)
- retval |= PM_FILE_SYSTEM;
- return retval;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return DosCreateDir((PSZ)filename,NULL) == NO_ERROR;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return DosDeleteDir((PSZ)filename) == NO_ERROR;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- FILESTATUS3 fs3;
- struct tm tc;
- struct tm *ret;
- time_t tt;
-
- if (DosQueryPathInfo((PSZ)filename, FIL_STANDARD, &fs3, sizeof(FILESTATUS3)))
- return false;
- if (gmTime) {
- tc.tm_year = fs3.fdateLastWrite.year + 80;
- tc.tm_mon = fs3.fdateLastWrite.month - 1;
- tc.tm_mday = fs3.fdateLastWrite.day;
- tc.tm_hour = fs3.ftimeLastWrite.hours;
- tc.tm_min = fs3.ftimeLastWrite.minutes;
- tc.tm_sec = fs3.ftimeLastWrite.twosecs * 2;
- if((tt = mktime(&tc)) == -1)
- return false;
- if(!(ret = gmtime(&tt)))
- return false;
- time->sec = ret->tm_sec;
- time->day = ret->tm_mday;
- time->mon = ret->tm_mon + 1;
- time->year = ret->tm_year - 80;
- time->min = ret->tm_min;
- time->hour = ret->tm_hour;
- }
- else {
- time->sec = fs3.ftimeLastWrite.twosecs * 2;
- time->day = fs3.fdateLastWrite.day;
- time->mon = fs3.fdateLastWrite.month;
- time->year = fs3.fdateLastWrite.year;
- time->min = fs3.ftimeLastWrite.minutes;
- time->hour = fs3.ftimeLastWrite.hours;
- }
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- FILESTATUS3 fs3;
- struct tm tc;
- struct tm *ret;
- time_t tt;
-
- if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&fs3,sizeof(fs3)))
- return false;
- if (gmTime) {
- tc.tm_year = time->year + 80;
- tc.tm_mon = time->mon - 1;
- tc.tm_mday = time->day;
- tc.tm_hour = time->hour;
- tc.tm_min = time->min;
- tc.tm_sec = time->sec;
- if((tt = mktime(&tc)) == -1)
- return false;
- ret = localtime(&tt);
- fs3.ftimeLastWrite.twosecs = ret->tm_sec / 2;
- fs3.fdateLastWrite.day = ret->tm_mday;
- fs3.fdateLastWrite.month = ret->tm_mon + 1;
- fs3.fdateLastWrite.year = ret->tm_year - 80;
- fs3.ftimeLastWrite.minutes = ret->tm_min;
- fs3.ftimeLastWrite.hours = ret->tm_hour;
- }
- else {
- fs3.ftimeLastWrite.twosecs = time->sec / 2;
- fs3.fdateLastWrite.day = time->day;
- fs3.fdateLastWrite.month = time->mon;
- fs3.fdateLastWrite.year = time->year;
- fs3.ftimeLastWrite.minutes = time->min;
- fs3.ftimeLastWrite.hours = time->hour;
- }
- memcpy(&fs3.fdateLastAccess, &fs3.fdateLastWrite, sizeof(FDATE));
- memcpy(&fs3.fdateCreation, &fs3.fdateLastWrite, sizeof(FDATE));
- memcpy(&fs3.ftimeLastAccess, &fs3.ftimeLastWrite, sizeof(FTIME));
- memcpy(&fs3.ftimeCreation, &fs3.ftimeLastWrite, sizeof(FTIME));
- DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&fs3,sizeof(FILESTATUS3),0L);
- return true;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/os2/vflat.c
deleted file mode 100644
index 579ef2c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/os2/ztimer.c
deleted file mode 100644
index 30ffe43..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2/ztimer.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: OS/2
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ulong frequency;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
- DosTmrQueryFreq(&frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-#define __LZTimerOn(tm) DosTmrQueryTime((QWORD*)&tm->start)
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmLap,tmCount;
-
- DosTmrQueryTime((QWORD*)&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) DosTmrQueryTime((QWORD*)&tm->end)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- ULONG count;
- DosQuerySysInfo( QSV_MS_COUNT, QSV_MS_COUNT, &count, sizeof(ULONG) );
- return count;
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c b/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c
deleted file mode 100644
index 7af20a9..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c
+++ /dev/null
@@ -1,170 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: IBM PC (OS/2)
-*
-* Description: OS/2 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static int oldMouseState; /* Old mouse state */
-static ulong oldKeyMessage; /* Old keyboard state */
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-HMOU _EVT_hMouse; /* Handle to the mouse driver */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under OS/2 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from OS/2 into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- /* TODO: Implement this for OS/2 Presentation Manager apps! */
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- oldMouseState = 0;
- oldKeyMessage = 0;
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* TODO: OS/2 PM specific initialisation code! */
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for OS/2 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: OS/2 PM specific exit code */
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2pm/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/os2pm/oshdr.h
deleted file mode 100644
index 0b69f82..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/os2pm/oshdr.h
+++ /dev/null
@@ -1,36 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define INCL_DOSERRORS
-#define INCL_DOS
-#define INCL_SUB
-#define INCL_VIO
-#define INCL_KBD
-#include <os2.h>
diff --git a/board/MAI/bios_emulator/scitech/src/pm/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/oshdr.h
deleted file mode 100644
index 404e5c9..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/oshdr.h
+++ /dev/null
@@ -1,70 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Header file to pull in OS specific headers for the target
-* OS environment.
-*
-****************************************************************************/
-
-#if defined(__SMX32__)
-#include "smx/oshdr.h"
-#elif defined(__RTTARGET__)
-#include "rttarget/oshdr.h"
-#elif defined(__REALDOS__)
-#include "dos/oshdr.h"
-#elif defined(__WIN32_VXD__)
-#include "vxd/oshdr.h"
-#elif defined(__NT_DRIVER__)
-#include "ntdrv/oshdr.h"
-#elif defined(__WINDOWS32__)
-#include "win32/oshdr.h"
-#elif defined(__OS2_VDD__)
-#include "vxd/oshdr.h"
-#elif defined(__OS2__)
-#if defined(__OS2_PM__)
-#include "os2pm/oshdr.h"
-#else
-#include "os2/oshdr.h"
-#endif
-#elif defined(__LINUX__)
-#if defined(__USE_X11__)
-#include "x11/oshdr.h"
-#else
-#include "linux/oshdr.h"
-#endif
-#elif defined(__QNX__)
-#if defined(__USE_PHOTON__)
-#include "photon/oshdr.h"
-#elif defined(__USE_X11__)
-#include "x11/oshdr.h"
-#else
-#include "qnx/oshdr.h"
-#endif
-#elif defined(__BEOS__)
-#include "beos/oshdr.h"
-#else
-#error PM library not ported to this platform yet!
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/photon/event.c b/board/MAI/bios_emulator/scitech/src/pm/photon/event.c
deleted file mode 100644
index 581da16..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/photon/event.c
+++ /dev/null
@@ -1,268 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX Photon GUI
-*
-* Description: QNX fullscreen console implementation for the SciTech
-* cross platform event library.
-*
-****************************************************************************/
-
-/*--------------------------- Global variables ----------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Linux */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-static ibool _EVT_isKeyDown(
- uchar scancode)
-{
- return (KeyState[(scancode & 0xf8) >> 3] & (1 << (scancode & 0x7)) ?
- true : false);
-}
-
-/****************************************************************************
-REMARKS:
-Retrieves all events from the mouse/keyboard event queue and stuffs them
-into the MGL event queue for further processing.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- int pid;
- uint msg, but_stat, message;
- uchar evt[sizeof (PhEvent_t) + 1024];
- PhEvent_t *event = (void *)evt;
- PhKeyEvent_t *key;
- PhPointerEvent_t *mouse;
- static int extended;
- event_t _evt;
-
- while (count < EVENTQSIZE) {
- uint mods = 0, keyp = 0;
-
- pid = Creceive(0, &msg, sizeof (msg));
-
- if (pid == -1)
- return;
-
- if (PhEventRead(pid, event, sizeof (evt)) == Ph_EVENT_MSG) {
- memset(&evt, 0, sizeof (evt));
- if (event->type == Ph_EV_KEY) {
- key = PhGetData(event);
-
- if (key->key_flags & KEY_SCAN_VALID) {
- keyp = key->key_scan;
- if (key->key_flags & KEY_DOWN)
- KeyState[(keyp & 0xf800) >> 11]
- |= 1 << ((keyp & 0x700) >> 8);
- else
- KeyState[(keyp & 0xf800) >> 11]
- &= ~(1 << ((keyp & 0x700) >> 8));
- }
- if ((key->key_flags & KEY_SYM_VALID) || extended)
- keyp |= key->key_sym;
-
- /* No way to tell left from right... */
- if (key->key_mods & KEYMOD_SHIFT)
- mods = (EVT_LEFTSHIFT | EVT_RIGHTSHIFT);
- if (key->key_mods & KEYMOD_CTRL)
- mods |= (EVT_CTRLSTATE | EVT_LEFTCTRL);
- if (key->key_mods & KEYMOD_ALT)
- mods |= (EVT_ALTSTATE | EVT_LEFTALT);
-
- _evt.when = evt->timestamp;
- if (key->key_flags & KEY_REPEAT) {
- _evt.what = EVT_KEYREPEAT;
- _evt.message = 0x10000;
- }
- else if (key->key_flags & KEY_DOWN)
- _evt.what = EVT_KEYDOWN;
- else
- _evt.what = EVT_KEYUP;
- _evt.modifiers = mods;
- _evt.message |= keyp;
-
- addEvent(&_evt);
-
- switch(key->key_scan & 0xff00) {
- case 0xe000:
- extended = 1;
- break;
- case 0xe001:
- extended = 2;
- break;
- default:
- if (extended)
- extended--;
- }
- }
- else if (event->type & Ph_EV_PTR_ALL) {
- but_stat = message = 0;
- mouse = PhGetData(event);
-
- if (mouse->button_state & Ph_BUTTON_3)
- but_stat = EVT_LEFTBUT;
- if (mouse->buttons & Ph_BUTTON_3)
- message = EVT_LEFTBMASK;
-
- if (mouse->button_state & Ph_BUTTON_1)
- but_stat |= EVT_RIGHTBUT;
- if (mouse->buttons & Ph_BUTTON_1)
- message |= EVT_RIGHTBMASK;
-
- _evt.when = evt->timestamp;
- if (event->type & Ph_EV_PTR_MOTION) {
- _evt.what = EVT_MOUSEMOVE;
- _evt.where_x = mouse->pos.x;
- _evt.where_y = mouse->pos.y;
- _evt.modifiers = but_stat;
- addEvent(&_evt);
- }
- if (event->type & Ph_EV_BUT_PRESS)
- _evt.what = EVT_MOUSEDOWN;
- else
- _evt.what = EVT_MOUSEUP;
- _evt.where_x = mouse->pos.x;
- _evt.where_y = mouse->pos.y;
- _evt.modifiers = but_stat;
- _evt.message = message;
- addEvent(&_evt);
- }
- }
- else
- return;
- }
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signo)
-{
- char buf[80];
-
- EVT_exit();
- sprintf(buf,"Terminating on signal %d",signo);
- PM_fatalError(buf);
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
-
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset((void *)KeyState, 0, sizeof (KeyState));
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- /* TODO: Need to call Input to change the coordinates that it returns */
- /* for mouse events!! */
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Photon */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Photon */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/photon/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/photon/oshdr.h
deleted file mode 100644
index 3c72563..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/photon/oshdr.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX Photon GUI
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#include <sys/mouse.h>
-#include <sys/keyboard.h>
-#include <sys/fd.h>
-#include <sys/stat.h>
-#include <conio.h>
-#include <process.h>
-#include <sys/kernel.h>
-#include <Ph.h>
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pm.vpw b/board/MAI/bios_emulator/scitech/src/pm/pm.vpw
deleted file mode 100644
index 26e68a7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pm.vpw
+++ /dev/null
@@ -1,43 +0,0 @@
-[Dependencies]
-[CurrentProject]
-curproj=pmlinux.vpj
-[ProjectFiles]
-pmcommon.vpj
-pmdos.vpj
-pmlinux.vpj
-pmqnx.vpj
-pmvxd.vpj
-pmwin32.vpj
-z_samples.vpj
-..\a-global includes.vpj
-[TreeExpansion]
-"..\a-global includes.vpj" 0
-pmcommon.vpj 0
-pmdos.vpj 0
-pmlinux.vpj 0
-pmqnx.vpj 0
-pmvxd.vpj 0
-pmwin32.vpj 0
-z_samples.vpj 1 1
-[State]
-SCREEN: 1280 1024 0 0 960 746 0 0 M 0 0 0 0 977 631
-CWD: C:\scitech\src\pm
-FILEHIST: 9
-C:\scitech\makedefs\gcc_win32.mk
-C:\scitech\bin\gcc2-w32.bat
-C:\scitech\bin\gcc2-c32.bat
-C:\scitech\bin\gcc2-linux.bat
-C:\scitech\makedefs\gcc_linux.mk
-C:\scitech\src\pm\linux\event.c
-C:\scitech\src\pm\linux\oshdr.h
-C:\scitech\src\pm\event.c
-C:\scitech\src\pm\pmlinux.vpj
-[ProjectDates]
-pmcommon.vpj=20010517164335290
-pmdos.vpj=20010517164335290
-pmlinux.vpj=20010620175829812
-pmqnx.vpj=20010517164335290
-pmvxd.vpj=20010517164335306
-pmwin32.vpj=20010517164335306
-z_samples.vpj=20010517164335306
-..\a-global includes.vpj=20010517164334978
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmcommon.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmcommon.vpj
deleted file mode 100644
index 48b872d..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmcommon.vpj
+++ /dev/null
@@ -1,45 +0,0 @@
-[COMPILER]
-version=5.0b
-MACRO=\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\nOther Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n*.*\n
-FILTERASSOCIATEFILETYPES=0 0 0 0
-FILTERAPPCOMMAND=\n\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|hide|:Compile:&Compile,
-make=concur|capture|hide|clear|saveall|:Build:&Build,
-rebuild=concur|capture|hide|clear|saveall|:Rebuild:&Rebuild,
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-common.c
-cpuinfo.c
-debug.c
-event.c
-makefile
-oshdr.h
-ztimer.c
-..\common\agplib.c
-codepage\us_eng.c
-common\_cpuinfo.asm
-common\_dma.asm
-common\_int64.asm
-common\_joy.asm
-common\_mtrr.asm
-common\_pcilib.asm
-common\agp.c
-common\keyboard.c
-common\malloc.c
-common\mtrr.c
-common\pcilib.c
-common\unixio.c
-common\vgastate.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmdos.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmdos.vpj
deleted file mode 100644
index 1157513..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmdos.vpj
+++ /dev/null
@@ -1,41 +0,0 @@
-[SciTech]
-compiler=wc10-
-targetos=d32
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,TEST_HARNESS=1
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|clear|:Compile:&Compile,dmake %n.obj -u %b
-make=concur|capture|clear|saveall|:Build:&Build,dmake install %b
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u %b
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:C&lean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-dos\_event.asm
-dos\_lztimer.asm
-dos\_pm.asm
-dos\_pmdos.asm
-dos\_vflat.asm
-dos\cpuinfo.c
-dos\event.c
-dos\oshdr.h
-dos\pm.c
-dos\pmdos.c
-dos\vflat.c
-dos\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
-config=,NORMAL_BUILD=1
-config=,TEST_HARNESS=1
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmlinux.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmlinux.vpj
deleted file mode 100644
index 0bfbf84..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmlinux.vpj
+++ /dev/null
@@ -1,35 +0,0 @@
-[SciTech]
-compiler=gcc2-
-targetos=linux
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-activeconfig=,install BUILD_DLL=1
-compile=concur|capture|clear|:Compile:&Compile,dmake %n.o -u
-make=concur|capture|clear|saveall|:Build:&Build,dmake %b
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake -u %b
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:C&lean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-linux\cpuinfo.c
-linux\event.c
-linux\oshdr.h
-linux\pm.c
-linux\vflat.c
-linux\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
-config=,install BUILD_DLL=1
-config=,install
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmntdrv.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmntdrv.vpj
deleted file mode 100644
index 3ec35a7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmntdrv.vpj
+++ /dev/null
@@ -1,39 +0,0 @@
-[SciTech]
-compiler=vc60-
-targetos=drvw2k
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-..\..\include\ntdriver.h
-ntdrv\_pm.asm
-ntdrv\cpuinfo.c
-ntdrv\int86.c
-ntdrv\irq.c
-ntdrv\mem.c
-ntdrv\oshdr.h
-ntdrv\pm.c
-ntdrv\stdio.c
-ntdrv\stdlib.c
-ntdrv\vflat.c
-ntdrv\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmqnx.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmqnx.vpj
deleted file mode 100644
index d541702..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmqnx.vpj
+++ /dev/null
@@ -1,35 +0,0 @@
-[SciTech]
-compiler=wc10-
-targetos=qnx
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|clear|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:C&lean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-qnx\_mtrrqnx.asm
-qnx\cpuinfo.c
-qnx\event.c
-qnx\mtrrqnx.c
-qnx\oshdr.h
-qnx\pm.c
-qnx\vflat.c
-qnx\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmvxd.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmvxd.vpj
deleted file mode 100644
index 1fcf911..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmvxd.vpj
+++ /dev/null
@@ -1,34 +0,0 @@
-[SciTech]
-compiler=bc50-
-targetos=vxd
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|nochangedir|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|nochangedir|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|nochangedir|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|nochangedir|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|hide|savenone|nochangedir|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-vxd\_pm.asm
-vxd\cpuinfo.c
-vxd\fileio.c
-vxd\oshdr.h
-vxd\pm.c
-vxd\vflat.c
-vxd\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/pmwin32.vpj b/board/MAI/bios_emulator/scitech/src/pm/pmwin32.vpj
deleted file mode 100644
index ace6822..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/pmwin32.vpj
+++ /dev/null
@@ -1,35 +0,0 @@
-[SciTech]
-compiler=vc60-
-targetos=c32
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,wc10-d32
-FILTERNAME=Source Files\nInclude Files\nAssembler Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n*.h\n*.asm\n
-FILTERASSOCIATEFILETYPES=0 0 0
-FILTERAPPCOMMAND=\n\n\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake install
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake cleanexe & dmake install -u
-debug=concur|capture|hide|savenone|:Debug:&Debug,
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|:User 1:User 1,
-user2=hide|:User 2:User 2,
-usertool_clean_directory=concur|capture|savenone|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-win32\_pmwin32.asm
-win32\cpuinfo.c
-win32\ddraw.c
-win32\event.c
-win32\oshdr.h
-win32\pm.c
-win32\vflat.c
-win32\ztimer.c
-[ASSOCIATION]
-[CONFIGURATIONS]
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/_mtrrqnx.asm b/board/MAI/bios_emulator/scitech/src/pm/qnx/_mtrrqnx.asm
deleted file mode 100644
index 5a3fe10..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/_mtrrqnx.asm
+++ /dev/null
@@ -1,226 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM
-;* Environment: QNX
-;*
-;* Description: Assembler support routines for the Memory Type Range Register
-;* (MTRR) module for QNX.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _mtrrqnx ; Set up memory model
-
-begdataseg _mtrrqnx ; Start of code segment
-
-ifdef USE_NASM
-%define R0_FLUSH_TLB 0
-%define R0_SAVE_CR4 1
-%define R0_RESTORE_CR4 2
-%define R0_READ_MSR 3
-%define R0_WRITE_MSR 4
-else
-R0_FLUSH_TLB EQU 0
-R0_SAVE_CR4 EQU 1
-R0_RESTORE_CR4 EQU 2
-R0_READ_MSR EQU 3
-R0_WRITE_MSR EQU 4
-endif
-
-cpublic _PM_R0
-_PM_R0_service dd 0
-_PM_R0_reg dd 0
-_PM_R0_eax dd 0
-_PM_R0_edx dd 0
-
-enddataseg _mtrrqnx ; Start of code segment
-
-begcodeseg _mtrrqnx ; Start of code segment
-
-P586
-
-;----------------------------------------------------------------------------
-; ulong _MTRR_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_disableInt
-
- pushfd ; Put flag word on stack
-; cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _MTRR_restoreInt(ulong ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _MTRR_restoreInt
-
- ARG ps:ULONG
-
- push ebp
- mov ebp,esp ; Set up stack frame
- push [ULONG ps]
- popfd ; Restore processor status (and interrupts)
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_getCx86(uchar reg);
-;----------------------------------------------------------------------------
-; Read a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_getCx86
-
- ARG reg:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- in al,23h
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; uchar _MTRR_setCx86(uchar reg,uchar val);
-;----------------------------------------------------------------------------
-; Write a Cyrix CPU indexed register
-;----------------------------------------------------------------------------
-cprocstart _MTRR_setCx86
-
- ARG reg:UCHAR, val:UCHAR
-
- enter_c
- mov al,[reg]
- out 22h,al
- mov al,[val]
- out 23h,al
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; ulong _PM_ring0_isr(void);
-;----------------------------------------------------------------------------
-; Ring 0 clock interrupt handler that we use to execute the MTRR support
-; code.
-;----------------------------------------------------------------------------
-cprocnear _PM_ring0_isr
-
-;--------------------------------------------------------
-; void PM_flushTLB(void);
-;--------------------------------------------------------
- pushad
- cmp [DWORD _PM_R0_service],R0_FLUSH_TLB
- jne @@1
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- jmp @@Exit
-
-;--------------------------------------------------------
-; ulong _MTRR_saveCR4(void);
-;--------------------------------------------------------
-@@1: cmp [DWORD _PM_R0_service],R0_SAVE_CR4
- jne @@2
-
-; Save value of CR4 and clear Page Global Enable (bit 7)
-
- mov ebx,cr4
- mov eax,ebx
- and al,7Fh
- mov cr4,eax
-
-; Disable and flush caches
-
- mov eax,cr0
- or eax,40000000h
- wbinvd
- mov cr0,eax
- wbinvd
-
-; Return value from CR4
-
- mov [_PM_R0_reg],ebx
- jmp @@Exit
-
-;--------------------------------------------------------
-; void _MTRR_restoreCR4(ulong cr4Val)
-;--------------------------------------------------------
-@@2: cmp [DWORD _PM_R0_service],R0_RESTORE_CR4
- jne @@3
-
- mov eax,cr0
- and eax,0BFFFFFFFh
- mov cr0,eax
- mov eax,[_PM_R0_reg]
- mov cr4,eax
- jmp @@Exit
-
-;--------------------------------------------------------
-; void _MTRR_readMSR(int reg, ulong FAR *eax, ulong FAR *edx);
-;--------------------------------------------------------
-@@3: cmp [DWORD _PM_R0_service],R0_READ_MSR
- jne @@4
-
- mov ecx,[_PM_R0_reg]
- rdmsr
- mov [_PM_R0_eax],eax
- mov [_PM_R0_edx],edx
- jmp @@Exit
-
-;--------------------------------------------------------
-; void _MTRR_writeMSR(int reg, ulong eax, ulong edx);
-;--------------------------------------------------------
-@@4: cmp [DWORD _PM_R0_service],R0_WRITE_MSR
- jne @@Exit
-
- mov ecx,[_PM_R0_reg]
- mov eax,[_PM_R0_eax]
- mov edx,[_PM_R0_edx]
- wrmsr
- jmp @@Exit
-
-@@Exit: mov [DWORD _PM_R0_service],-1
- popad
- mov eax,0
- retf
-
-cprocend
-
-endcodeseg _mtrrqnx
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/cpuinfo.c
deleted file mode 100644
index a8782542..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/cpuinfo.c
+++ /dev/null
@@ -1,64 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: QNX specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for QNX!
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-TODO: We should implement this for QNX!
-****************************************************************************/
-#define RestoreThreadPriority(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = CLOCKS_PER_SEC * 1000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = clock() * 1000; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c
deleted file mode 100644
index 45cd514..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c
+++ /dev/null
@@ -1,601 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: QNX fullscreen console implementation for the SciTech
-* cross platform event library.
-*
-****************************************************************************/
-
-#include <errno.h>
-#include <unistd.h>
-
-/*--------------------------- Global variables ----------------------------*/
-
-#ifndef __QNXNTO__
-static struct _mouse_ctrl *_PM_mouse_ctl;
-static int _PM_keyboard_fd = -1;
-/*static int _PM_modifiers, _PM_leds; */
-#else
-static int kbd_fd = -1, mouse_fd = -1;
-#endif
-static int kill_pid = 0;
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-#define TIME_TO_MSEC(__t) ((__t).tv_nsec / 1000000 + (__t).tv_sec * 1000)
-
-#define LED_NUM 1
-#define LED_CAP 2
-#define LED_SCR 4
-
-/* Scancode mappings on QNX for special keys */
-
-typedef struct {
- int scan;
- int map;
- } keymap;
-
-/* TODO: Fix this and set it up so we can do a binary search! */
-
-keymap keymaps[] = {
- {96, KB_padEnter},
- {74, KB_padMinus},
- {78, KB_padPlus},
- {55, KB_padTimes},
- {98, KB_padDivide},
- {71, KB_padHome},
- {72, KB_padUp},
- {73, KB_padPageUp},
- {75, KB_padLeft},
- {76, KB_padCenter},
- {77, KB_padRight},
- {79, KB_padEnd},
- {80, KB_padDown},
- {81, KB_padPageDown},
- {82, KB_padInsert},
- {83, KB_padDelete},
- {105,KB_left},
- {108,KB_down},
- {106,KB_right},
- {103,KB_up},
- {110,KB_insert},
- {102,KB_home},
- {104,KB_pageUp},
- {111,KB_delete},
- {107,KB_end},
- {109,KB_pageDown},
- {125,KB_leftWindows},
- {126,KB_rightWindows},
- {127,KB_menu},
- {100,KB_rightAlt},
- {97,KB_rightCtrl},
- };
-
-/* And the keypad with num lock turned on (changes the ASCII code only) */
-
-keymap keypad[] = {
- {71, ASCII_7},
- {72, ASCII_8},
- {73, ASCII_9},
- {75, ASCII_4},
- {76, ASCII_5},
- {77, ASCII_6},
- {79, ASCII_1},
- {80, ASCII_2},
- {81, ASCII_3},
- {82, ASCII_0},
- {83, ASCII_period},
- };
-
-#define NB_KEYMAPS (sizeof(keymaps)/sizeof(keymaps[0]))
-#define NB_KEYPAD (sizeof(keypad)/sizeof(keypad[0]))
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Include generic raw scancode keyboard module.
-****************************************************************************/
-#include "common/keyboard.c"
-
-/* These are not used under QNX */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- struct timespec t;
- clock_gettime(CLOCK_REALTIME,&t);
- return (t.tv_nsec / 1000000 + t.tv_sec * 1000);
-}
-
-/****************************************************************************
-REMARKS:
-Converts a mickey movement value to a pixel adjustment value.
-****************************************************************************/
-static int MickeyToPixel(
- int mickey)
-{
- /* TODO: We can add some code in here to handle 'acceleration' for */
- /* the mouse cursor. For now just use the mickeys. */
- return mickey;
-}
-
-#ifdef __QNXNTO__
-/****************************************************************************
-REMARKS:
-Retrieves all events from the mouse/keyboard event queue and stuffs them
-into the MGL event queue for further processing.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- int rc1, rc2;
- struct _keyboard_packet key;
- struct _mouse_packet ms;
- static long old_buttons = 0;
- uint message = 0, but_stat = 0, mods = 0;
- event_t evt;
-
- while (EVT.count < EVENTQSIZE) {
- rc1 = read(kbd_fd, (void *)&key, sizeof(key));
- if (rc1 == -1) {
- if (errno == EAGAIN)
- rc1 = 0;
- else {
- perror("getEvents");
- PM_fatalError("Keyboard error");
- }
- }
- if (rc1 > 0) {
- memset(&evt, 0, sizeof(evt));
- if (key.data.modifiers & KEYMOD_SHIFT)
- mods |= EVT_LEFTSHIFT;
- if (key.data.modifiers & KEYMOD_CTRL)
- mods |= EVT_CTRLSTATE;
- if (key.data.modifiers & KEYMOD_ALT)
- mods |= EVT_ALTSTATE;
-
- /* Now store the keyboard event data */
- evt.when = TIME_TO_MSEC(key.time);
- if (key.data.flags & KEY_SCAN_VALID)
- evt.message |= (key.data.key_scan & 0x7F) << 8;
- if ((key.data.flags & KEY_SYM_VALID) &&
- (((key.data.key_sym & 0xff00) == 0xf000 &&
- (key.data.key_sym & 0xff) < 0x20) ||
- key.data.key_sym < 0x80))
- evt.message |= (key.data.key_sym & 0xFF);
- evt.modifiers = mods;
- if (key.data.flags & KEY_DOWN) {
- evt.what = EVT_KEYDOWN;
- keyUpMsg[evt.message >> 8] = (ushort)evt.message;
- }
- else if (key.data.flags & KEY_REPEAT) {
- evt.message |= 0x10000;
- evt.what = EVT_KEYREPEAT;
- }
- else {
- evt.what = EVT_KEYUP;
- evt.message = keyUpMsg[evt.message >> 8];
- if (evt.message == 0)
- continue;
- keyUpMsg[evt.message >> 8] = 0;
- }
-
- /* Now add the new event to the event queue */
- addEvent(&evt);
- }
- rc2 = read(mouse_fd, (void *)&ms, sizeof (ms));
- if (rc2 == -1) {
- if (errno == EAGAIN)
- rc2 = 0;
- else {
- perror("getEvents");
- PM_fatalError("Mouse error");
- }
- }
- if (rc2 > 0) {
- memset(&evt, 0, sizeof(evt));
- ms.hdr.buttons &=
- (_POINTER_BUTTON_LEFT | _POINTER_BUTTON_RIGHT);
- if (ms.hdr.buttons & _POINTER_BUTTON_LEFT)
- but_stat = EVT_LEFTBUT;
- if ((ms.hdr.buttons & _POINTER_BUTTON_LEFT) !=
- (old_buttons & _POINTER_BUTTON_LEFT))
- message = EVT_LEFTBMASK;
- if (ms.hdr.buttons & _POINTER_BUTTON_RIGHT)
- but_stat |= EVT_RIGHTBUT;
- if ((ms.hdr.buttons & _POINTER_BUTTON_RIGHT) !=
- (old_buttons & _POINTER_BUTTON_RIGHT))
- message |= EVT_RIGHTBMASK;
- if (ms.dx || ms.dy) {
- ms.dy = -ms.dy;
- EVT.mx += MickeyToPixel(ms.dx);
- EVT.my += MickeyToPixel(ms.dy);
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > rangeX) EVT.mx = rangeX;
- if (EVT.my > rangeY) EVT.my = rangeY;
- evt.what = EVT_MOUSEMOVE;
- evt.when = TIME_TO_MSEC(ms.hdr.time);
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ms.dx;
- evt.relative_y = ms.dy;
- evt.modifiers = but_stat;
- addEvent(&evt);
- }
- evt.what = ms.hdr.buttons < old_buttons ?
- EVT_MOUSEUP : EVT_MOUSEDOWN;
- evt.when = TIME_TO_MSEC(ms.hdr.time);
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ms.dx;
- evt.relative_y = ms.dy;
- evt.modifiers = but_stat;
- evt.message = message;
- if (ms.hdr.buttons != old_buttons) {
- addEvent(&evt);
- old_buttons = ms.hdr.buttons;
- }
- }
- if (rc1 + rc2 == 0)
- break;
- }
-}
-#else
-/****************************************************************************
-REMARKS:
-Retrieves all events from the mouse/keyboard event queue and stuffs them
-into the MGL event queue for further processing.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- struct mouse_event ev;
- int rc;
- static long old_buttons = 0;
- uint message = 0, but_stat = 0;
- event_t evt;
- char buf[32];
- int numkeys, i;
-
- /* Poll keyboard events */
- while ((numkeys = read(_PM_keyboard_fd, buf, sizeof buf)) > 0) {
- for (i = 0; i < numkeys; i++) {
- processRawScanCode(buf[i]);
- }
- }
-
- if (_PM_mouse_ctl == NULL)
- return;
-
- /* Gobble pending mouse events */
- while (EVT.count < EVENTQSIZE) {
- rc = mouse_read(_PM_mouse_ctl, &ev, 1, 0, NULL);
- if (rc == -1) {
- perror("getEvents");
- PM_fatalError("Mouse error (Input terminated?)");
- }
- if (rc == 0)
- break;
-
- message = 0, but_stat = 0;
- memset(&evt, 0, sizeof(evt));
-
- ev.buttons &= (_MOUSE_LEFT | _MOUSE_RIGHT);
- if (ev.buttons & _MOUSE_LEFT)
- but_stat = EVT_LEFTBUT;
- if ((ev.buttons & _MOUSE_LEFT) != (old_buttons & _MOUSE_LEFT))
- message = EVT_LEFTBMASK;
- if (ev.buttons & _MOUSE_RIGHT)
- but_stat |= EVT_RIGHTBUT;
- if ((ev.buttons & _MOUSE_RIGHT) != (old_buttons & _MOUSE_RIGHT))
- message |= EVT_RIGHTBMASK;
- if (ev.dx || ev.dy) {
- ev.dy = -ev.dy;
- EVT.mx += MickeyToPixel(ev.dx);
- EVT.my += MickeyToPixel(ev.dy);
- if (EVT.mx < 0) EVT.mx = 0;
- if (EVT.my < 0) EVT.my = 0;
- if (EVT.mx > rangeX) EVT.mx = rangeX;
- if (EVT.my > rangeY) EVT.my = rangeY;
- evt.what = EVT_MOUSEMOVE;
- evt.when = ev.timestamp*100;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ev.dx;
- evt.relative_y = ev.dy;
- evt.modifiers = but_stat;
- addEvent(&evt);
- }
- evt.what = ev.buttons < old_buttons ? EVT_MOUSEUP : EVT_MOUSEDOWN;
- evt.when = ev.timestamp*100;
- evt.where_x = EVT.mx;
- evt.where_y = EVT.my;
- evt.relative_x = ev.dx;
- evt.relative_y = ev.dy;
- evt.modifiers = but_stat;
- evt.message = message;
- if (ev.buttons != old_buttons) {
- addEvent(&evt);
- old_buttons = ev.buttons;
- }
- }
-}
-#endif /* __QNXNTO__ */
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signo)
-{
- char buf[80];
-
- EVT_exit();
- sprintf(buf,"Terminating on signal %d",signo);
- PM_fatalError(buf);
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
- struct stat st;
- char *iarg[16];
-#ifdef __QNXNTO__
- char buf[128];
- FILE *p;
- int argno,len;
-#endif
-
-#ifdef __QNXNTO__
- ThreadCtl(_NTO_TCTL_IO, 0); /* So joystick code won't blow up */
-#endif
-
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
-#ifdef __QNXNTO__
- /*
- * User may already have input running with the right parameters.
- * Thus they could start input at boot time, using the output of
- * inputtrap, passing the the -r flag to make it run as a resource
- * manager.
- */
- if ((mouse_fd = open("/dev/mouse0", O_RDONLY | O_NONBLOCK)) < 0) {
- /* Run inputtrap to get the args for input */
- if ((p = popen("inputtrap", "r")) == NULL)
- PM_fatalError("Error running 'inputtrap'");
- fgets(buf, sizeof(buf), p);
- pclose(p);
-
- /* Build the argument list */
- len = strlen(buf);
- iarg[0] = buf;
- for (i = 0, argno = 0; i < len && argno < 15;) {
- if (argno == 1) {
- /*
- * Add flags to input's arg list.
- * '-r' means run as resource
- * manager, providing the /dev/mouse
- * and /dev/keyboard interfaces.
- * '-P' supresses the /dev/photon
- * mechanism.
- */
- iarg[argno++] = "-Pr";
- continue;
- }
- while (buf[i] == ' ')
- i++;
- if (buf[i] == '\0' || buf[i] == '\n')
- break;
- iarg[argno++] = &buf[i];
- while (buf[i] != ' '
- && buf[i] != '\0' && buf[i] != '\n')
- i++;
- buf[i++] = '\0';
- }
- iarg[argno] = NULL;
-
- if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], iarg)) == -1) {
- perror("spawning input resmgr");
- PM_fatalError("Could not start input resmgr");
- }
- for (i = 0; i < 10; i++) {
- if (stat("/dev/mouse0", &st) == 0)
- break;
- sleep(1);
- }
- if ((mouse_fd = open("/dev/mouse0", O_RDONLY|O_NONBLOCK)) < 0) {
- perror("/dev/mouse0");
- PM_fatalError("Could not open /dev/mouse0");
- }
- }
- if ((kbd_fd = open("/dev/keyboard0", O_RDONLY|O_NONBLOCK)) < 0) {
- perror("/dev/keyboard0");
- PM_fatalError("Could not open /dev/keyboard0");
- }
-#else
- /* Connect to Input/Mouse for event handling */
- if (_PM_mouse_ctl == NULL) {
- _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0);
-
- /* "Mouse" is not running; attempt to start it */
- if (_PM_mouse_ctl == NULL) {
- iarg[0] = "mousetrap";
- iarg[1] = "start";
- iarg[2] = NULL;
- if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], (void*)iarg)) == -1)
- perror("spawn (mousetrap)");
- else {
- for (i = 0; i < 10; i++) {
- if (stat("/dev/mouse", &st) == 0)
- break;
- sleep(1);
- }
- _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0);
- }
- }
- }
- if (_PM_keyboard_fd == -1)
- _PM_keyboard_fd = open("/dev/kbd", O_RDONLY|O_NONBLOCK);
-#endif
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-#define _EVT_setMousePos(x,y)
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for QNX */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for QNX */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
-#ifdef __QNXNTO__
- char c;
- int flags;
-
- if (kbd_fd != -1) {
- close(kbd_fd);
- kbd_fd = -1;
- }
- if (mouse_fd != -1) {
- close(mouse_fd);
- mouse_fd = -1;
- }
-#endif
-
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
-#ifndef __QNXNTO__
- /* Kill the Input/Mouse driver if we have spawned it */
- if (_PM_mouse_ctl != NULL) {
- struct _fd_entry fde;
- uint pid = 0;
-
- /* Find out the pid of the mouse driver */
- if (kill_pid > 0) {
- if (qnx_fd_query(0,
- 0, _PM_mouse_ctl->fd, &fde) != -1)
- pid = fde.pid;
- }
- mouse_close(_PM_mouse_ctl);
- _PM_mouse_ctl = NULL;
-
- if (pid > 0) {
- /* For some reasons the PID's are different under QNX4,
- * so we use the old mechanism to kill the mouse server.
- */
- kill(pid, SIGTERM);
- kill_pid = 0;
- }
- }
-#endif
- if (kill_pid > 0) {
- kill(kill_pid, SIGTERM);
- kill_pid = 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c
deleted file mode 100644
index f960c75..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c
+++ /dev/null
@@ -1,182 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: MTRR helper functions module. To make it easier to implement
-* the MTRR support under QNX, we simply put our ring 0 helper
-* functions into stubs that run them at ring 0 using whatever
-* mechanism is available.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <sys/mman.h>
-#include <time.h>
-#ifdef __QNXNTO__
-#include <sys/neutrino.h>
-#include <sys/syspage.h>
-#else
-#include <i86.h>
-#include <sys/irqinfo.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define R0_FLUSH_TLB 0
-#define R0_SAVE_CR4 1
-#define R0_RESTORE_CR4 2
-#define R0_READ_MSR 3
-#define R0_WRITE_MSR 4
-
-typedef struct {
- int service;
- int reg;
- ulong eax;
- ulong edx;
- } R0_data;
-
-extern volatile R0_data _PM_R0;
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef __QNXNTO__
-const struct sigevent * _ASMAPI _PM_ring0_isr(void *arg, int id);
-#else
-pid_t far _ASMAPI _PM_ring0_isr();
-#endif
-
-/****************************************************************************
-REMARKS:
-Return true if ring 0 (or if we can call the helpers functions at ring 0)
-****************************************************************************/
-ibool _ASMAPI _MTRR_isRing0(void)
-{
-#ifdef __QNXNTO__
- return false; /* Not implemented yet! */
-#else
- return true;
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to execute a service at ring 0. This is done using the clock
-interrupt handler since the code we attach to it will always run at ring 0.
-****************************************************************************/
-static void CallRing0(void)
-{
-#ifdef __QNXNTO__
- uint clock_intno = SYSPAGE_ENTRY(qtime)->intr;
-#else
- uint clock_intno = 0; /* clock irq */
-#endif
- int intrid;
-
-#ifdef __QNXNTO__
- mlock((void*)&_PM_R0, sizeof(_PM_R0));
- ThreadCtl(_NTO_TCTL_IO, 0);
-#endif
-#ifdef __QNXNTO__
- if ((intrid = InterruptAttach(_NTO_INTR_CLASS_EXTERNAL | clock_intno,
- _PM_ring0_isr, (void*)&_PM_R0, sizeof(_PM_R0), _NTO_INTR_FLAGS_END)) == -1) {
-#else
- if ((intrid = qnx_hint_attach(clock_intno, _PM_ring0_isr, FP_SEG(&_PM_R0))) == -1) {
-#endif
- perror("Attach");
- exit(-1);
- }
- while (_PM_R0.service != -1)
- ;
-#ifdef __QNXNTO__
- InterruptDetachId(intrid);
-#else
- qnx_hint_detach(intrid);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Flush the translation lookaside buffer.
-****************************************************************************/
-void PMAPI PM_flushTLB(void)
-{
- _PM_R0.service = R0_FLUSH_TLB;
- CallRing0();
-}
-
-/****************************************************************************
-REMARKS:
-Read and return the value of the CR4 register
-****************************************************************************/
-ulong _ASMAPI _MTRR_saveCR4(void)
-{
- _PM_R0.service = R0_SAVE_CR4;
- CallRing0();
- return _PM_R0.reg;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the value of the CR4 register
-****************************************************************************/
-void _ASMAPI _MTRR_restoreCR4(ulong cr4Val)
-{
- _PM_R0.service = R0_RESTORE_CR4;
- _PM_R0.reg = cr4Val;
- CallRing0();
-}
-
-/****************************************************************************
-REMARKS:
-Read a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_readMSR(
- int reg,
- ulong *eax,
- ulong *edx)
-{
- _PM_R0.service = R0_READ_MSR;
- _PM_R0.reg = reg;
- CallRing0();
- *eax = _PM_R0.eax;
- *edx = _PM_R0.edx;
-}
-
-/****************************************************************************
-REMARKS:
-Write a machine status register for the CPU.
-****************************************************************************/
-void _ASMAPI _MTRR_writeMSR(
- int reg,
- ulong eax,
- ulong edx)
-{
- _PM_R0.service = R0_WRITE_MSR;
- _PM_R0.reg = reg;
- _PM_R0.eax = eax;
- _PM_R0.edx = edx;
- CallRing0();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/qnx/oshdr.h
deleted file mode 100644
index 0961193..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/oshdr.h
+++ /dev/null
@@ -1,103 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#include <sys/stat.h>
-#include <fcntl.h>
-#include <process.h>
-#include <time.h>
-#ifndef __QNXNTO__
-#include <sys/mouse.h>
-#include <sys/keyboard.h>
-#include <sys/fd.h>
-#include <conio.h>
-#else
-#include <sys/dcmd_input.h>
-
-/* Things 'borrowed' from photon/keycodes.h */
-
-/*
- * Keyboard modifiers
- */
-#define KEYMODBIT_SHIFT 0
-#define KEYMODBIT_CTRL 1
-#define KEYMODBIT_ALT 2
-#define KEYMODBIT_ALTGR 3
-#define KEYMODBIT_SHL3 4
-#define KEYMODBIT_MOD6 5
-#define KEYMODBIT_MOD7 6
-#define KEYMODBIT_MOD8 7
-
-#define KEYMODBIT_SHIFT_LOCK 8
-#define KEYMODBIT_CTRL_LOCK 9
-#define KEYMODBIT_ALT_LOCK 10
-#define KEYMODBIT_ALTGR_LOCK 11
-#define KEYMODBIT_SHL3_LOCK 12
-#define KEYMODBIT_MOD6_LOCK 13
-#define KEYMODBIT_MOD7_LOCK 14
-#define KEYMODBIT_MOD8_LOCK 15
-
-#define KEYMODBIT_CAPS_LOCK 16
-#define KEYMODBIT_NUM_LOCK 17
-#define KEYMODBIT_SCROLL_LOCK 18
-
-#define KEYMOD_SHIFT (1 << KEYMODBIT_SHIFT)
-#define KEYMOD_CTRL (1 << KEYMODBIT_CTRL)
-#define KEYMOD_ALT (1 << KEYMODBIT_ALT)
-#define KEYMOD_ALTGR (1 << KEYMODBIT_ALTGR)
-#define KEYMOD_SHL3 (1 << KEYMODBIT_SHL3)
-#define KEYMOD_MOD6 (1 << KEYMODBIT_MOD6)
-#define KEYMOD_MOD7 (1 << KEYMODBIT_MOD7)
-#define KEYMOD_MOD8 (1 << KEYMODBIT_MOD8)
-
-#define KEYMOD_SHIFT_LOCK (1 << KEYMODBIT_SHIFT_LOCK)
-#define KEYMOD_CTRL_LOCK (1 << KEYMODBIT_CTRL_LOCK)
-#define KEYMOD_ALT_LOCK (1 << KEYMODBIT_ALT_LOCK)
-#define KEYMOD_ALTGR_LOCK (1 << KEYMODBIT_ALTGR_LOCK)
-#define KEYMOD_SHL3_LOCK (1 << KEYMODBIT_SHL3_LOCK)
-#define KEYMOD_MOD6_LOCK (1 << KEYMODBIT_MOD6_LOCK)
-#define KEYMOD_MOD7_LOCK (1 << KEYMODBIT_MOD7_LOCK)
-#define KEYMOD_MOD8_LOCK (1 << KEYMODBIT_MOD8_LOCK)
-
-#define KEYMOD_CAPS_LOCK (1 << KEYMODBIT_CAPS_LOCK)
-#define KEYMOD_NUM_LOCK (1 << KEYMODBIT_NUM_LOCK)
-#define KEYMOD_SCROLL_LOCK (1 << KEYMODBIT_SCROLL_LOCK)
-
-/*
- * Keyboard flags
- */
-#define KEY_DOWN 0x00000001 /* Key was pressed down */
-#define KEY_REPEAT 0x00000002 /* Key was repeated */
-#define KEY_SCAN_VALID 0x00000020 /* Scancode is valid */
-#define KEY_SYM_VALID 0x00000040 /* Key symbol is valid */
-#define KEY_CAP_VALID 0x00000080 /* Key cap is valid */
-#define KEY_DEAD 0x40000000 /* Key symbol is a DEAD key */
-#define KEY_OEM_CAP 0x80000000 /* Key cap is an OEM scan code from keyboard */
-
-#endif /* __QNXNTO__ */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c
deleted file mode 100644
index c993ee0..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c
+++ /dev/null
@@ -1,891 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "mtrr.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <time.h>
-#include <unistd.h>
-#include <termios.h>
-#include <fcntl.h>
-#include <malloc.h>
-#include <sys/mman.h>
-#include "qnx/vbios.h"
-#ifndef __QNXNTO__
-#include <sys/seginfo.h>
-#include <sys/console.h>
-#include <conio.h>
-#include <i86.h>
-#else
-#include <sys/neutrino.h>
-#include <sys/dcmd_chr.h>
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static VBIOSregs_t *VRegs = NULL; /* Pointer to VBIOS registers */
-static int raw_count = 0;
-static struct _console_ctrl *cc = NULL;
-static int console_count = 0;
-static int rmbuf_inuse = 0;
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-void PMAPI PM_init(void)
-{
- char *force;
-
- if (VRegs == NULL) {
-#ifdef __QNXNTO__
- ThreadCtl(_NTO_TCTL_IO, 0); /* Get IO privilidge */
-#endif
- force = getenv("VBIOS_METHOD");
- VRegs = VBIOSinit(force ? atoi(force) : 0);
- }
-#ifndef __QNXNTO__
- MTRR_init();
-#endif
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return VRegs != NULL; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_QNX; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-static int term_raw(void)
-{
- struct termios termios_p;
-
- if (raw_count++ > 0)
- return 0;
-
- /* Go into "raw" input mode */
- if (tcgetattr(STDIN_FILENO, &termios_p))
- return -1;
-
- termios_p.c_cc[VMIN] = 1;
- termios_p.c_cc[VTIME] = 0;
- termios_p.c_lflag &= ~( ECHO|ICANON|ISIG|ECHOE|ECHOK|ECHONL);
- tcsetattr(STDIN_FILENO, TCSADRAIN, &termios_p);
- return 0;
-}
-
-static void term_restore(void)
-{
- struct termios termios_p;
-
- if (raw_count-- != 1)
- return;
-
- tcgetattr(STDIN_FILENO, &termios_p);
- termios_p.c_lflag |= (ECHO|ICANON|ISIG|ECHOE|ECHOK|ECHONL);
- termios_p.c_oflag |= (OPOST);
- tcsetattr(STDIN_FILENO, TCSADRAIN, &termios_p);
-}
-
-int PMAPI PM_kbhit(void)
-{
- int blocking, c;
-
- if (term_raw() == -1)
- return 0;
-
- /* Go into non blocking mode */
- blocking = fcntl(STDIN_FILENO, F_GETFL) | O_NONBLOCK;
- fcntl(STDIN_FILENO, F_SETFL, blocking);
- c = getc(stdin);
-
- /* restore blocking mode */
- fcntl(STDIN_FILENO, F_SETFL, blocking & ~O_NONBLOCK);
- term_restore();
- if (c != EOF) {
- ungetc(c, stdin);
- return c;
- }
- clearerr(stdin);
- return 0;
-}
-
-int PMAPI PM_getch(void)
-{
- int c;
-
- if (term_raw() == -1)
- return (0);
- c = getc(stdin);
-#if defined(__QNX__) && !defined(__QNXNTO__)
- if (c == 0xA)
- c = 0x0D;
- else if (c == 0x7F)
- c = 0x08;
-#endif
- term_restore();
- return c;
-}
-
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
-#ifndef __QNXNTO__
- int fd;
-
- if (console_count++)
- return 0;
- if ((fd = open("/dev/con1", O_RDWR)) == -1)
- return -1;
- cc = console_open(fd, O_RDWR);
- close(fd);
- if (cc == NULL)
- return -1;
-#endif
- return 1;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- return PM_getVGAStateSize() + sizeof(int) * 3;
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,int console_id)
-{
-#ifdef __QNXNTO__
- int fd;
- int flags;
-
- if ((fd = open("/dev/con1", O_RDWR)) == -1)
- return;
- flags = _CONCTL_INVISIBLE_CHG | _CONCTL_INVISIBLE;
- devctl(fd, DCMD_CHR_SERCTL, &flags, sizeof flags, 0);
- close(fd);
-#else
- uchar *buf = &((uchar*)stateBuf)[PM_getVGAStateSize()];
-
- /* Save QNX 4 console state */
- console_read(cc, -1, 0, NULL, 0,
- (int *)buf+1, (int *)buf+2, NULL);
- *(int *)buf = console_ctrl(cc, -1,
- CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE,
- CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE);
-
- /* Save state of VGA registers */
- PM_saveVGAState(stateBuf);
-#endif
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* TODO: Implement support for console switching if possible */
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
-#ifdef __QNXNTO__
- int fd;
- int flags;
-
- if ((fd = open("/dev/con1", O_RDWR)) == -1)
- return;
- flags = _CONCTL_INVISIBLE_CHG;
- devctl(fd, DCMD_CHR_SERCTL, &flags, sizeof flags, 0);
- close(fd);
-#else
- uchar *buf = &((uchar*)stateBuf)[PM_getVGAStateSize()];
-
- /* Restore the state of the VGA compatible registers */
- PM_restoreVGAState(stateBuf);
-
- /* Restore QNX 4 console state */
- console_ctrl(cc, -1, *(int *)buf,
- CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE);
- console_write(cc, -1, 0, NULL, 0,
- (int *)buf+1, (int *)buf+2, NULL);
-#endif
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
-#ifndef __QNXNTO__
- if (--console_count == 0) {
- console_close(cc);
- cc = NULL;
- }
-#endif
-}
-
-void PM_setOSCursorLocation(int x,int y)
-{
- if (!cc)
- return;
-#ifndef __QNXNTO__
- console_write(cc, -1, 0, NULL, 0, &y, &x, NULL);
-#endif
-}
-
-void PM_setOSScreenWidth(int width,int height)
-{
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency)
-{
- /* TODO: Implement this for QNX */
- return false;
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- /* TODO: Implement this for QNX */
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Implement this for QNX */
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return '/'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return PM_getNucleusConfigPath(); }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- char *env = getenv("NUCLEUS_PATH");
-#ifdef __QNXNTO__
-#ifdef __X86__
- return env ? env : "/nto/scitech/x86/bin";
-#elif defined (__PPC__)
- return env ? env : "/nto/scitech/ppcbe/bin";
-#elif defined (__MIPS__)
-#ifdef __BIGENDIAN__
- return env ? env : "/nto/scitech/mipsbe/bin";
-#else
- return env ? env : "/nto/scitech/mipsle/bin";
-#endif
-#elif defined (__SH__)
-#ifdef __BIGENDIAN__
- return env ? env : "/nto/scitech/shbe/bin";
-#else
- return env ? env : "/nto/scitech/shle/bin";
-#endif
-#elif defined (__ARM__)
- return env ? env : "/nto/scitech/armle/bin";
-#endif
-#else /* QNX 4 */
- return env ? env : "/qnx4/scitech/bin";
-#endif
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[512];
- char *env;
-#ifdef __QNXNTO__
- char temp[64];
- gethostname(temp, sizeof (temp));
- temp[sizeof (temp) - 1] = '\0'; /* Paranoid */
- sprintf(path,"/etc/config/scitech/%s/config", temp);
-#else
- sprintf(path,"/etc/config/scitech/%d/config", getnid());
-#endif
- if ((env = getenv("NUCLEUS_PATH")) != NULL) {
- strcpy(path,env);
- PM_backslash(path);
- strcat(path,"config");
- }
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{
- static char buf[128];
-#ifdef __QNXNTO__
- gethostname(buf, sizeof (buf));
-#else
- sprintf(buf,"node%d", getnid());
-#endif
- return buf;
-}
-
-const char * PMAPI PM_getMachineName(void)
-{
- static char buf[128];
-#ifdef __QNXNTO__
- gethostname(buf, sizeof (buf));
-#else
- sprintf(buf,"node%d", getnid());
-#endif
- return buf;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{
- return PM_mapRealPointer(0, 0x400);
-}
-
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *ptr = NULL;
- void *freeptr;
- unsigned offset, i, maplen;
-
- if (ptr != NULL)
- return ptr;
-
- /* Some trickery is required to get the linear address 64K aligned */
- for (i = 0; i < 5; i++) {
- ptr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- offset = 0x10000 - ((unsigned)ptr % 0x10000);
- if (!offset)
- break;
- munmap(ptr, 0x10000);
- maplen = 0x10000 + offset;
- freeptr = PM_mapPhysicalAddr(0xA0000-offset, maplen-1,true);
- ptr = (void *)(offset + (unsigned)freeptr);
- if (0x10000 - ((unsigned)ptr % 0x10000))
- break;
- munmap(freeptr, maplen);
- }
- if (i == 5) {
- printf("Could not get a 64K aligned linear address for A0000 region\n");
- exit(1);
- }
- return ptr;
-}
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- uchar_t *p;
- unsigned o;
- unsigned prot = PROT_READ|PROT_WRITE|(isCached?0:PROT_NOCACHE);
-#ifdef __PAGESIZE
- int pagesize = __PAGESIZE;
-#else
- int pagesize = 4096;
-#endif
- int rounddown = base % pagesize;
-#ifndef __QNXNTO__
- static int __VidFD = -1;
-#endif
-
- if (rounddown) {
- if (base < rounddown)
- return NULL;
- base -= rounddown;
- limit += rounddown;
- }
-
-#ifndef __QNXNTO__
- if (__VidFD < 0) {
- if ((__VidFD = shm_open( "Physical", O_RDWR, 0777 )) == -1) {
- perror( "Cannot open Physical memory" );
- exit(1);
- }
- }
- o = base & 0xFFF;
- limit = (limit + o + 0xFFF) & ~0xFFF;
- if ((int)(p = mmap( 0, limit, prot, MAP_SHARED,
- __VidFD, base )) == -1 ) {
- return NULL;
- }
- p += o;
-#else
- if ((p = mmap(0, limit, prot, MAP_PHYS | MAP_SHARED,
- NOFD, base)) == MAP_FAILED) {
- return (void *)-1;
- }
-#endif
- return (p + rounddown);
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- munmap(ptr,limit+1);
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- /* TODO: Implement this! */
- return false;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- void *p;
-
- PM_init();
-
- if ((p = VBIOSgetmemptr(r_seg, r_off, VRegs)) == (void *)-1)
- return NULL;
- return p;
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- if (size > 1024) {
- printf("PM_allocRealSeg: can't handle %d bytes\n", size);
- return 0;
- }
- if (rmbuf_inuse != 0) {
- printf("PM_allocRealSeg: transfer area already in use\n");
- return 0;
- }
- PM_init();
- rmbuf_inuse = 1;
- *r_seg = VBIOS_TransBufVSeg(VRegs);
- *r_off = VBIOS_TransBufVOff(VRegs);
- return (void*)VBIOS_TransBufPtr(VRegs);
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- if (rmbuf_inuse == 0) {
- printf("PM_freeRealSeg: nothing was allocated\n");
- return;
- }
- rmbuf_inuse = 0;
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = regs->eax;
- VRegs->l.ebx = regs->ebx;
- VRegs->l.ecx = regs->ecx;
- VRegs->l.edx = regs->edx;
- VRegs->l.esi = regs->esi;
- VRegs->l.edi = regs->edi;
-
- VBIOSint(intno, VRegs, 1024);
-
- regs->eax = VRegs->l.eax;
- regs->ebx = VRegs->l.ebx;
- regs->ecx = VRegs->l.ecx;
- regs->edx = VRegs->l.edx;
- regs->esi = VRegs->l.esi;
- regs->edi = VRegs->l.edi;
- regs->flags = VRegs->w.flags & 0x1;
-}
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- PM_init();
- if (VRegs == NULL)
- return 0;
-
- VRegs->l.eax = in->e.eax;
- VRegs->l.ebx = in->e.ebx;
- VRegs->l.ecx = in->e.ecx;
- VRegs->l.edx = in->e.edx;
- VRegs->l.esi = in->e.esi;
- VRegs->l.edi = in->e.edi;
-
- VBIOSint(intno, VRegs, 1024);
-
- out->e.eax = VRegs->l.eax;
- out->e.ebx = VRegs->l.ebx;
- out->e.ecx = VRegs->l.ecx;
- out->e.edx = VRegs->l.edx;
- out->e.esi = VRegs->l.esi;
- out->e.edi = VRegs->l.edi;
- out->x.cflag = VRegs->w.flags & 0x1;
-
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- PM_init();
- if (VRegs == NULL)
- return 0;
-
- if (intno == 0x21) {
- time_t today = time(NULL);
- struct tm *t;
- t = localtime(&today);
- out->x.cx = t->tm_year + 1900;
- out->h.dh = t->tm_mon + 1;
- out->h.dl = t->tm_mday;
- return 0;
- }
- else {
- VRegs->l.eax = in->e.eax;
- VRegs->l.ebx = in->e.ebx;
- VRegs->l.ecx = in->e.ecx;
- VRegs->l.edx = in->e.edx;
- VRegs->l.esi = in->e.esi;
- VRegs->l.edi = in->e.edi;
- VRegs->w.es = sregs->es;
- VRegs->w.ds = sregs->ds;
-
- VBIOSint(intno, VRegs, 1024);
-
- out->e.eax = VRegs->l.eax;
- out->e.ebx = VRegs->l.ebx;
- out->e.ecx = VRegs->l.ecx;
- out->e.edx = VRegs->l.edx;
- out->e.esi = VRegs->l.esi;
- out->e.edi = VRegs->l.edi;
- out->x.cflag = VRegs->w.flags & 0x1;
- sregs->es = VRegs->w.es;
- sregs->ds = VRegs->w.ds;
-
- return out->x.ax;
- }
-}
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = in->e.eax;
- VRegs->l.ebx = in->e.ebx;
- VRegs->l.ecx = in->e.ecx;
- VRegs->l.edx = in->e.edx;
- VRegs->l.esi = in->e.esi;
- VRegs->l.edi = in->e.edi;
- VRegs->w.es = sregs->es;
- VRegs->w.ds = sregs->ds;
-
- VBIOScall(seg, off, VRegs, 1024);
-
- in->e.eax = VRegs->l.eax;
- in->e.ebx = VRegs->l.ebx;
- in->e.ecx = VRegs->l.ecx;
- in->e.edx = VRegs->l.edx;
- in->e.esi = VRegs->l.esi;
- in->e.edi = VRegs->l.edi;
- in->x.cflag = VRegs->w.flags & 0x1;
- sregs->es = VRegs->w.es;
- sregs->ds = VRegs->w.ds;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
-#ifndef __QNXNTO__
- *physical = *total = _memavl();
-#endif
-}
-
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- /* TODO: Implement this on QNX */
- return NULL;
-}
-
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- /* TODO: Implement this on QNX */
-}
-
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- /* TODO: Implement this on QNX */
- return NULL;
-}
-
-void PMAPI PM_freePage(
- void *p)
-{
- /* TODO: Implement this on QNX */
-}
-
-void PMAPI PM_setBankA(int bank)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = 0x4F05;
- VRegs->l.ebx = 0x0000;
- VRegs->l.edx = bank;
- VBIOSint(0x10, VRegs, 1024);
-}
-
-void PMAPI PM_setBankAB(int bank)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = 0x4F05;
- VRegs->l.ebx = 0x0000;
- VRegs->l.edx = bank;
- VBIOSint(0x10, VRegs, 1024);
-
- VRegs->l.eax = 0x4F05;
- VRegs->l.ebx = 0x0001;
- VRegs->l.edx = bank;
- VBIOSint(0x10, VRegs, 1024);
-}
-
-void PMAPI PM_setCRTStart(int x,int y,int waitVRT)
-{
- PM_init();
- if (VRegs == NULL)
- return;
-
- VRegs->l.eax = 0x4F07;
- VRegs->l.ebx = waitVRT;
- VRegs->l.ecx = x;
- VRegs->l.edx = y;
- VBIOSint(0x10, VRegs, 1024);
-}
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *copyOfBIOS,
- ulong BIOSLen)
-{
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)copyOfBIOS;
- (void)BIOSLen;
- return false;
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- p = p; len = len;
- return 1;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- /* QNX handles IOPL selection at the program link level. */
- return level;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
-#ifndef __QNXNTO__
- return MTRR_enableWriteCombine(base,size,type);
-#else
- return PM_MTRR_NOT_SUPPORTED;
-#endif
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/vflat.c
deleted file mode 100644
index 579ef2c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/ztimer.c
deleted file mode 100644
index d274097..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/qnx/ztimer.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: QNX
-*
-* Description: QNX specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-}
-
-/****************************************************************************
-REMARKS:
-Use the gettimeofday() function to get microsecond precision (probably less
-though)
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- struct timespec ts;
- clock_gettime(CLOCK_REALTIME, &ts);
- return (ts.tv_nsec / 1000 + ts.tv_sec * 1000000);
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-#define __LZTimerOn(tm) tm->start.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-#define __LZTimerLap(tm) (__ULZReadTime() - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) tm->end.low = __ULZReadTime()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) (tm->end.low - tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c
deleted file mode 100644
index 4f32c3e..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ibool havePerformanceCounter;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- int oldPriority;
- HANDLE hThread = GetCurrentThread();
-
- oldPriority = GetThreadPriority(hThread);
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL);
- return oldPriority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int oldPriority)
-{
- HANDLE hThread = GetCurrentThread();
-
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, oldPriority);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- if (!QueryPerformanceFrequency((LARGE_INTEGER*)freq)) {
- havePerformanceCounter = false;
- freq->low = 100000;
- freq->high = 0;
- }
- else
- havePerformanceCounter = true;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- if (havePerformanceCounter) \
- QueryPerformanceCounter((LARGE_INTEGER*)t); \
- else { \
- (t)->low = timeGetTime() * 100; \
- (t)->high = 0; \
- } \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c
deleted file mode 100644
index 962a14a..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c
+++ /dev/null
@@ -1,287 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Win32 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0}; /* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Win32 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from Win32 into our event queue.
-****************************************************************************/
-void _EVT_pumpMessages(void)
-{
- MSG msg;
- MSG charMsg;
- event_t evt;
-
- while (PeekMessage(&msg,NULL,0,0,PM_REMOVE)) {
- memset(&evt,0,sizeof(evt));
- switch (msg.message) {
- case WM_MOUSEMOVE:
- evt.what = EVT_MOUSEMOVE;
- break;
- case WM_LBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK | EVT_DBLCLICK;
- break;
- case WM_LBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_LBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_RBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_KEYDOWN:
- case WM_SYSKEYDOWN:
- if (HIWORD(msg.lParam) & KF_REPEAT) {
- evt.what = EVT_KEYREPEAT;
- }
- else {
- evt.what = EVT_KEYDOWN;
- }
- break;
- case WM_KEYUP:
- case WM_SYSKEYUP:
- evt.what = EVT_KEYUP;
- break;
- }
-
- /* Convert mouse event modifier flags */
- if (evt.what & EVT_MOUSEEVT) {
- evt.where_x = msg.pt.x;
- evt.where_y = msg.pt.y;
- if (evt.what == EVT_MOUSEMOVE) {
- if (oldMove != -1) {
- evtq[oldMove].where_x = evt.where_x;/* Modify existing one */
- evtq[oldMove].where_y = evt.where_y;
- evt.what = 0;
- }
- else {
- oldMove = freeHead; /* Save id of this move event */
- }
- }
- else
- oldMove = -1;
- if (msg.wParam & MK_LBUTTON)
- evt.modifiers |= EVT_LEFTBUT;
- if (msg.wParam & MK_RBUTTON)
- evt.modifiers |= EVT_RIGHTBUT;
- if (msg.wParam & MK_SHIFT)
- evt.modifiers |= EVT_SHIFTKEY;
- if (msg.wParam & MK_CONTROL)
- evt.modifiers |= EVT_CTRLSTATE;
- }
-
- /* Convert keyboard codes */
- TranslateMessage(&msg);
- if (evt.what & EVT_KEYEVT) {
- int scanCode = (msg.lParam >> 16) & 0xFF;
- if (evt.what == EVT_KEYUP) {
- /* Get message for keyup code from table of cached down values */
- evt.message = keyUpMsg[scanCode];
- keyUpMsg[scanCode] = 0;
- }
- else {
- if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- evt.message |= ((msg.lParam >> 8) & 0xFF00);
- keyUpMsg[scanCode] = (ushort)evt.message;
- }
- if (evt.what == EVT_KEYREPEAT)
- evt.message |= (msg.lParam << 16);
- if (HIWORD(msg.lParam) & KF_ALTDOWN)
- evt.modifiers |= EVT_ALTSTATE;
- if (GetKeyState(VK_SHIFT) & 0x8000U)
- evt.modifiers |= EVT_SHIFTKEY;
- if (GetKeyState(VK_CONTROL) & 0x8000U)
- evt.modifiers |= EVT_CTRLSTATE;
- oldMove = -1;
- }
-
- if (evt.what != 0) {
- /* Add time stamp and add the event to the queue */
- evt.when = msg.time;
- if (count < EVENTQSIZE) {
- addEvent(&evt);
- }
- }
- DispatchMessage(&msg);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- SetCursorPos(*x,*y);
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/rttarget/oshdr.h
deleted file mode 100644
index 1352dad..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/oshdr.h
+++ /dev/null
@@ -1,34 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c
deleted file mode 100644
index 47d7ed6..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c
+++ /dev/null
@@ -1,701 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-void MTRR_init(void);
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* TODO: dO any special init code in here. */
- MTRR_init();
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- return _OS_RTTARGET;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- /* TODO: Display a fatal error message and exit! */
-/* MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION); */
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* No BIOS access for the RTTarget */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* TODO: Need to check if a key is waiting on the keyboard queue */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* TODO: Need to obtain the next keypress, and block until one is hit */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* Nothing to do for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* Not supported for RTTarget-32 */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* Not supported under RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* Not supported under RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- return 'c';
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return "c:\\";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- /* TODO: Point this at the path when the Nucleus drivers will be found */
- return "c:\\nucleus";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- /* Not necessary for RTTarget-32 */
- return "Unknown";
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* Not used for RTTarget-32 */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- /* TODO: Map a physical memory address to a linear address */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* TODO: Free the physical address mapping */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- Sleep(milliseconds);
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of (unnamed) shared memory.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- return PM_malloc(size);
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- PM_free(ptr);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- return base;
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- /* Not used for RTTarget-32 */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* Not used for RTTarget-32 */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- /* Not used for RTTarget-32 */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- /* Not used for RTTarget-32 */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* TODO: Figure out how to determine the available memory. Not entirely */
- /* critical so returning 0 is OK. */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- /* TODO: Allocate a block of locked, phsyically contigous memory for DMA */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
-
- ibool contiguous)
-{
- /* TODO: Free a locked memory buffer */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- /* Not used for RTTarget-32 */
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS)
-{
- /* Not used for RTTarget-32 */
- return false;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: Implement this to load shared libraries! */
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: Implement this! */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: Implement this! */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-ulong PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- ulong handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- ulong handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Set the file attributes for a file */
- (void)filename;
- (void)attrib;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return mkdir(filename) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/vflat.c
deleted file mode 100644
index dd9dfe6..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/vflat.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c
deleted file mode 100644
index 80c184d..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: RTTarget-32
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static CPU_largeInteger countFreq;
-static ibool havePerformanceCounter;
-static ulong start,finish;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-#ifdef NO_ASSEMBLER
- havePerformanceCounter = false;
-#else
- havePerformanceCounter = QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->start);
- else
- tm->start.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmLap,tmCount;
-
- if (havePerformanceCounter) {
- QueryPerformanceCounter((LARGE_INTEGER*)&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else {
- tmLap.low = timeGetTime();
- return (tmLap.low - tm->start.low) * 1000L;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->end);
- else
- tm->end.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- if (havePerformanceCounter) {
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else
- return (tm->end.low - tm->start.low) * 1000L;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_event.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_event.asm
deleted file mode 100644
index da62b1f..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_event.asm
+++ /dev/null
@@ -1,175 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech Multi-platform Graphics Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler
-;* Environment: IBM PC (MS DOS)
-;*
-;* Description: Assembly language support routines for the event module.
-;*
-;****************************************************************************
-
- ideal
-
-include "scitech.mac" ; Memory model macros
-
-ifdef flatmodel
-
-header _event ; Set up memory model
-
-begdataseg _event
-
- cextern _EVT_biosPtr,DPTR
-
- cpublic _EVT_dataStart
-
-ifdef USE_NASM
-%define KB_HEAD WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-%define KB_TAIL WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-%define KB_START WORD esi+080h ; Start of keyboard buffer in BIOS data area
-%define KB_END WORD esi+082h ; End of keyboard buffer in BIOS data area
-else
-KB_HEAD EQU WORD esi+01Ah ; Keyboard buffer head in BIOS data area
-KB_TAIL EQU WORD esi+01Ch ; Keyboard buffer tail in BIOS data area
-KB_START EQU WORD esi+080h ; Start of keyboard buffer in BIOS data area
-KB_END EQU WORD esi+082h ; End of keyboard buffer in BIOS data area
-endif
-
- cpublic _EVT_dataEnd
-
-enddataseg _event
-
-begcodeseg _event ; Start of code segment
-
- cpublic _EVT_codeStart
-
-;----------------------------------------------------------------------------
-; int _EVT_getKeyCode(void)
-;----------------------------------------------------------------------------
-; Returns the key code for the next available key by extracting it from
-; the BIOS keyboard buffer.
-;----------------------------------------------------------------------------
-cprocstart _EVT_getKeyCode
-
- enter_c
-
- mov esi,[_EVT_biosPtr]
- xor ebx,ebx
- xor eax,eax
- mov bx,[KB_HEAD]
- cmp bx,[KB_TAIL]
- jz @@Done
- xor eax,eax
- mov ax,[esi+ebx] ; EAX := character from keyboard buffer
- inc _bx
- inc _bx
- cmp bx,[KB_END] ; Hit the end of the keyboard buffer?
- jl @@1
- mov bx,[KB_START]
-@@1: mov [KB_HEAD],bx ; Update keyboard buffer head pointer
-
-@@Done: leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _EVT_disableInt(void);
-;----------------------------------------------------------------------------
-; Return processor interrupt status and disable interrupts.
-;----------------------------------------------------------------------------
-cprocstart _EVT_disableInt
-
- pushf ; Put flag word on stack
- cli ; Disable interrupts!
- pop eax ; deposit flag word in return register
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _EVT_restoreInt(int ps);
-;----------------------------------------------------------------------------
-; Restore processor interrupt status.
-;----------------------------------------------------------------------------
-cprocstart _EVT_restoreInt
-
- ARG ps:UINT
-
- push ebp
- mov ebp,esp ; Set up stack frame
- push [DWORD ps]
- popf ; Restore processor status (and interrupts)
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int EVT_rdinx(int port,int index)
-;----------------------------------------------------------------------------
-; Reads an indexed register value from an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_rdinx
-
- ARG port:UINT, index:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- out dx,al
- inc dx
- in al,dx
- movzx eax,al
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void EVT_wrinx(int port,int index,int value)
-;----------------------------------------------------------------------------
-; Writes an indexed register value to an I/O port.
-;----------------------------------------------------------------------------
-cprocstart EVT_wrinx
-
- ARG port:UINT, index:UINT, value:UINT
-
- push ebp
- mov ebp,esp
- mov edx,[port]
- mov al,[BYTE index]
- mov ah,[BYTE value]
- out dx,ax
- pop ebp
- ret
-
-cprocend
-
- cpublic _EVT_codeEnd
-
-endcodeseg _event
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_lztimer.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_lztimer.asm
deleted file mode 100644
index 068eea6..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_lztimer.asm
+++ /dev/null
@@ -1,58 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: NASM or TASM Assembler
-;* Environment: smx 32 bit intel CPU
-;*
-;* Description: SMX does not support 486's, so this module is not necessary.
-;*
-;* All registers and all flags are preserved by all routines, except
-;* interrupts which are always turned on
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac"
-
-header _lztimer
-
-begdataseg _lztimer
-
-enddataseg _lztimer
-
-begcodeseg _lztimer ; Start of code segment
-
-cprocstart LZ_disable
- cli
- ret
-cprocend
-
-cprocstart LZ_enable
- sti
- ret
-cprocend
-
-endcodeseg _lztimer
-
- END
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_pm.asm
deleted file mode 100644
index 1c7cb21..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_pm.asm
+++ /dev/null
@@ -1,448 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit SMX embedded systems development
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* SMX.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pm ; Set up memory model
-
-begdataseg _pm
-
- cextern _PM_savedDS,USHORT
-
-intel_id db "GenuineIntel" ; Intel vendor ID
-
-enddataseg _pm
-
-begcodeseg _pm ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-; Create a table of the 256 different interrupt calls that we can jump
-; into
-
-ifdef USE_NASM
-
-%assign intno 0
-
-intTable:
-%rep 256
- db 0CDh
- db intno
-%assign intno intno + 1
- ret
- nop
-%endrep
-
-else
-
-intno = 0
-
-intTable:
- REPT 256
- db 0CDh
- db intno
-intno = intno + 1
- ret
- nop
- ENDM
-
-endif
-
-;----------------------------------------------------------------------------
-; _PM_genInt - Generate the appropriate interrupt
-;----------------------------------------------------------------------------
-cprocnear _PM_genInt
-
- push _ax ; Save _ax
- push _bx ; Save _bx
- mov ebx,[UINT esp+12] ; EBX := interrupt number
- mov _ax,offset intTable ; Point to interrupt generation table
- shl _bx,2 ; _BX := index into table
- add _ax,_bx ; _AX := pointer to interrupt code
- xchg eax,[esp+4] ; Restore eax, and set for int
- pop _bx ; restore _bx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_int386x
-
- ARG intno:UINT, inptr:DPTR, outptr:DPTR, sregs:DPTR
-
- LOCAL flags:UINT, sv_ds:UINT, sv_esi:ULONG = LocalSize
-
- enter_c
- push ds
- push es ; Save segment registers
- push fs
- push gs
-
- _lds _si,[sregs] ; DS:_SI -> Load segment registers
- mov es,[_si]
- mov bx,[_si+6]
- mov [sv_ds],_bx ; Save value of user DS on stack
- mov fs,[_si+8]
- mov gs,[_si+10]
-
- _lds _si,[inptr] ; Load CPU registers
- mov eax,[_si]
- mov ebx,[_si+4]
- mov ecx,[_si+8]
- mov edx,[_si+12]
- mov edi,[_si+20]
- mov esi,[_si+16]
-
- push ds ; Save value of DS
- push _bp ; Some interrupts trash this!
- clc ; Generate the interrupt
- push [UINT intno]
- mov ds,[WORD sv_ds] ; Set value of user's DS selector
- call _PM_genInt
- pop _bp ; Pop intno from stack (flags unchanged)
- pop _bp ; Restore value of stack frame pointer
- pop ds ; Restore value of DS
-
- pushf ; Save flags for later
- pop [UINT flags]
- push esi ; Save ESI for later
- pop [DWORD sv_esi]
- push ds ; Save DS for later
- pop [UINT sv_ds]
-
- _lds _si,[outptr] ; Save CPU registers
- mov [_si],eax
- mov [_si+4],ebx
- mov [_si+8],ecx
- mov [_si+12],edx
- push [DWORD sv_esi]
- pop [DWORD _si+16]
- mov [_si+20],edi
-
- mov _bx,[flags] ; Return flags
- and ebx,1h ; Isolate carry flag
- mov [_si+24],ebx ; Save carry flag status
-
- _lds _si,[sregs] ; Save segment registers
- mov [_si],es
- mov _bx,[sv_ds]
- mov [_si+6],bx ; Get returned DS from stack
- mov [_si+8],fs
- mov [_si+10],gs
-
- pop gs ; Restore segment registers
- pop fs
- pop es
- pop ds
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_saveDS(void)
-;----------------------------------------------------------------------------
-; Save the value of DS into a section of the code segment, so that we can
-; quickly load this value at a later date in the PM_loadDS() routine from
-; inside interrupt handlers etc. The method to do this is different
-; depending on the DOS extender being used.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_saveDS
-
- mov [_PM_savedDS],ds ; Store away in data segment
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_loadDS(void)
-;----------------------------------------------------------------------------
-; Routine to load the DS register with the default value for the current
-; DOS extender. Only the DS register is loaded, not the ES register, so
-; if you wish to call C code, you will need to also load the ES register
-; in 32 bit protected mode.
-;----------------------------------------------------------------------------
-cprocstartdll16 PM_loadDS
-
- mov ds,[cs:_PM_savedDS] ; We can access the proper DS through CS
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankA(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankA
-
- ARG bank:UINT
-
- push ebp
- mov ebp,esp
- push ebx
- mov _bx,0
- mov _ax,4F05h
- mov _dx,[bank]
- int 10h
- pop ebx
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankAB(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankAB
-
- ARG bank:UINT
-
- push ebp
- mov ebp,esp
- push ebx
- mov _bx,0
- mov _ax,4F05h
- mov _dx,[bank]
- int 10h
- mov _bx,1
- mov _ax,4F05h
- mov _dx,[bank]
- int 10h
- pop ebx
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setCRTStart(int x,int y,int waitVRT)
-;----------------------------------------------------------------------------
-cprocstart PM_setCRTStart
-
- ARG x:UINT, y:UINT, waitVRT:UINT
-
- push ebp
- mov ebp,esp
- push ebx
- mov _bx,[waitVRT]
- mov _cx,[x]
- mov _dx,[y]
- mov _ax,4F07h
- int 10h
- pop ebx
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int _PM_inp(int port)
-;----------------------------------------------------------------------------
-; Reads a byte from the specified port
-;----------------------------------------------------------------------------
-cprocstart _PM_inp
-
- ARG port:UINT
-
- push _bp
- mov _bp,_sp
- xor _ax,_ax
- mov _dx,[port]
- in al,dx
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_outp(int port,int value)
-;----------------------------------------------------------------------------
-; Write a byte to the specified port.
-;----------------------------------------------------------------------------
-cprocstart _PM_outp
-
- ARG port:UINT, value:UINT
-
- push _bp
- mov _bp,_sp
- mov _dx,[port]
- mov _ax,[value]
- out dx,al
- pop _bp
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- sti
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_flushTLB - Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- ret
-
-cprocend
-
-endcodeseg _pm
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_pmsmx.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_pmsmx.asm
deleted file mode 100644
index 8352ce3..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_pmsmx.asm
+++ /dev/null
@@ -1,933 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit SMX embedded systems development
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* SMX interrupt handling.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmsmx ; Set up memory model
-
-; Define the size of our local stacks. For real mode code they cant be
-; that big, but for 32 bit protected mode code we can make them nice and
-; large so that complex C functions can be used.
-
-MOUSE_STACK EQU 4096
-TIMER_STACK EQU 4096
-KEY_STACK EQU 1024
-INT10_STACK EQU 1024
-
-ifdef USE_NASM
-
-; Macro to load DS and ES registers with correct value.
-
-%imacro LOAD_DS 0
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-%endmacro
-
-; Note that interrupts we disable interrupts during the following stack
-; %imacro for correct operation, but we do not enable them again. Normally
-; these %imacros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-%imacro NEWSTK 1
- cli
- mov [seg_%1],ss
- mov [ptr_%1],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset %1
-%endmacro
-
-; %imacro to switch back to the old stack.
-
-%imacro RESTSTK 1
- cli
- mov ss,[seg_%1]
- mov _sp,[ptr_%1]
-%endmacro
-
-; %imacro to swap the current stack with the one saved away.
-
-%imacro SWAPSTK 1
- cli
- mov ax,ss
- xchg ax,[seg_%1]
- mov ss,ax
- xchg _sp,[ptr_%1]
-%endmacro
-
-else
-
-; Macro to load DS and ES registers with correct value.
-
-MACRO LOAD_DS
- mov ds,[cs:_PM_savedDS]
- mov es,[cs:_PM_savedDS]
-ENDM
-
-; Note that interrupts we disable interrupts during the following stack
-; macro for correct operation, but we do not enable them again. Normally
-; these macros are used within interrupt handlers so interrupts should
-; already be off. We turn them back on explicitly later if the user code
-; needs them to be back on.
-
-; Macro to switch to a new local stack.
-
-MACRO NEWSTK stkname
- cli
- mov [seg_&stkname&],ss
- mov [ptr_&stkname&],_sp
- mov [TempSeg],ds
- mov ss,[TempSeg]
- mov _sp,offset stkname
-ENDM
-
-; Macro to switch back to the old stack.
-
-MACRO RESTSTK stkname
- cli
- mov ss,[seg_&stkname&]
- mov _sp,[ptr_&stkname&]
-ENDM
-
-; Macro to swap the current stack with the one saved away.
-
-MACRO SWAPSTK stkname
- cli
- mov ax,ss
- xchg ax,[seg_&stkname&]
- mov ss,ax
- xchg _sp,[ptr_&stkname&]
-ENDM
-
-endif
-
-begdataseg _pmsmx
-
- cextern _PM_savedDS,USHORT
- cextern _PM_critHandler,CPTR
- cextern _PM_breakHandler,CPTR
- cextern _PM_timerHandler,CPTR
- cextern _PM_rtcHandler,CPTR
- cextern _PM_keyHandler,CPTR
- cextern _PM_key15Handler,CPTR
- cextern _PM_mouseHandler,CPTR
- cextern _PM_int10Handler,CPTR
-
- cextern _PM_ctrlCPtr,DPTR
- cextern _PM_ctrlBPtr,DPTR
- cextern _PM_critPtr,DPTR
-
- cextern _PM_prevTimer,FCPTR
- cextern _PM_prevRTC,FCPTR
- cextern _PM_prevKey,FCPTR
- cextern _PM_prevKey15,FCPTR
- cextern _PM_prevBreak,FCPTR
- cextern _PM_prevCtrlC,FCPTR
- cextern _PM_prevCritical,FCPTR
- cextern _PM_prevRealTimer,ULONG
- cextern _PM_prevRealRTC,ULONG
- cextern _PM_prevRealKey,ULONG
- cextern _PM_prevRealKey15,ULONG
- cextern _PM_prevRealInt10,ULONG
-
-cpublic _PM_pmsmxDataStart
-
-; Allocate space for all of the local stacks that we need. These stacks
-; are not very large, but should be large enough for most purposes
-; (generally you want to handle these interrupts quickly, simply storing
-; the information for later and then returning). If you need bigger
-; stacks then change the appropriate value in here.
-
- ALIGN 4
- dclb MOUSE_STACK ; Space for local stack (small)
-MsStack: ; Stack starts at end!
-ptr_MsStack DUINT 0 ; Place to store old stack offset
-seg_MsStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb INT10_STACK ; Space for local stack (small)
-Int10Stack: ; Stack starts at end!
-ptr_Int10Stack DUINT 0 ; Place to store old stack offset
-seg_Int10Stack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-TmStack: ; Stack starts at end!
-ptr_TmStack DUINT 0 ; Place to store old stack offset
-seg_TmStack dw 0 ; Place to store old stack segment
-
- ALIGN 4
- dclb TIMER_STACK ; Space for local stack (small)
-RtcStack: ; Stack starts at end!
-ptr_RtcStack DUINT 0 ; Place to store old stack offset
-seg_RtcStack dw 0 ; Place to store old stack segment
-RtcInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-KyStack: ; Stack starts at end!
-ptr_KyStack DUINT 0 ; Place to store old stack offset
-seg_KyStack dw 0 ; Place to store old stack segment
-KyInside dw 0 ; Are we still handling current interrupt
-
- ALIGN 4
- dclb KEY_STACK ; Space for local stack (small)
-Ky15Stack: ; Stack starts at end!
-ptr_Ky15Stack DUINT 0 ; Place to store old stack offset
-seg_Ky15Stack dw 0 ; Place to store old stack segment
-
-TempSeg dw 0 ; Place to store stack segment
-
-cpublic _PM_pmsmxDataEnd
-
-enddataseg _pmsmx
-
-begcodeseg _pmsmx ; Start of code segment
-
-cpublic _PM_pmsmxCodeStart
-
-;----------------------------------------------------------------------------
-; PM_mouseISR - Mouse interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt subroutine called by the mouse driver upon interrupts, to
-; dispatch control to high level C based subroutines. Interrupts are on
-; when we call the user code.
-;
-; It is _extremely_ important to save the state of the extended registers
-; as these may well be trashed by the routines called from here and not
-; restored correctly by the mouse interface module.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. For mouse handlers this is not a
-; problem, as the mouse driver arbitrates calls to the user mouse
-; handler for us.
-;
-; Entry: AX - Condition mask giving reason for call
-; BX - Mouse button state
-; CX - Horizontal cursor coordinate
-; DX - Vertical cursor coordinate
-; SI - Horizontal mickey value
-; DI - Vertical mickey value
-;
-;----------------------------------------------------------------------------
-cprocfar _PM_mouseISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
- NEWSTK MsStack ; Switch to local stack
-
-; Call the installed high level C code routine
-
- clrhi dx ; Clear out high order values
- clrhi cx
- clrhi bx
- clrhi ax
- sgnhi si
- sgnhi di
-
- push _di
- push _si
- push _dx
- push _cx
- push _bx
- push _ax
- sti ; Enable interrupts
- call [CPTR _PM_mouseHandler]
- _add sp,12,24
-
- RESTSTK MsStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- ret ; We are done!!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_timerISR - Timer interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_timerISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- NEWSTK TmStack ; Switch to local stack
- call [CPTR _PM_timerHandler]
- RESTSTK TmStack ; Restore previous stack
-
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevTimer - Chain to previous timer interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous timer interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevTimer
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealTimer]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
- SWAPSTK TmStack ; Swap back to previous stack
- pushf ; Save state of interrupt flag
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevTimer]
-else
- call [_PM_prevTimer]
-endif
- popf ; Restore state of interrupt flag
- SWAPSTK TmStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; PM_rtcISR - Real time clock interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the timer interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. Make sure your C code executes as
-; quickly as possible, since a timer overrun will simply hang the
-; system.
-;----------------------------------------------------------------------------
-cprocfar _PM_rtcISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
-; Clear priority interrupt controller and re-enable interrupts so we
-; dont lock things up for long.
-
- mov al,20h
- out 0A0h,al
- out 020h,al
-
-; Clear real-time clock timeout
-
- in al,70h ; Read CMOS index register
- push _ax ; and save for later
- IODELAYN 3
- mov al,0Ch
- out 70h,al
- IODELAYN 5
- in al,71h
-
-; Call the C interrupt handler function
-
- LOAD_DS ; Load DS register
- cmp [BYTE RtcInside],1 ; Check for mutual exclusion
- je @@Exit
- mov [BYTE RtcInside],1
- sti ; Re-enable interrupts
- NEWSTK RtcStack ; Switch to local stack
- call [CPTR _PM_rtcHandler]
- RESTSTK RtcStack ; Restore previous stack
- mov [BYTE RtcInside],0
-
-@@Exit: pop _ax
- out 70h,al ; Restore CMOS index register
- popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_keyISR - keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the keyboard interrupt, to dispatch control
-; to high level C based subroutines. We save the state of all registers
-; in this routine, and switch to a local stack. Interrupts are *off*
-; when we call the user code.
-;
-; NOTE: This routine switches to a local stack before calling any C code,
-; and hence is _not_ re-entrant. However we ensure within this routine
-; mutual exclusion to the keyboard handling routine.
-;----------------------------------------------------------------------------
-cprocfar _PM_keyISR
-
- push ds ; Save value of DS
- push es
- pushad ; Save _all_ extended registers
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
-
- cmp [BYTE KyInside],1 ; Check for mutual exclusion
- je @@Reissued
-
- mov [BYTE KyInside],1
- NEWSTK KyStack ; Switch to local stack
- call [CPTR _PM_keyHandler] ; Call C code
- RESTSTK KyStack ; Restore previous stack
- mov [BYTE KyInside],0
-
-@@Exit: popad ; Restore all extended registers
- pop es
- pop ds
- iret ; Return from interrupt
-
-; When the BIOS keyboard handler needs to change the SHIFT status lights
-; on the keyboard, in the process of doing this the keyboard controller
-; re-issues another interrupt, while the current handler is still executing.
-; If we recieve another interrupt while still handling the current one,
-; then simply chain directly to the previous handler.
-;
-; Note that for most DOS extenders, the real mode interrupt handler that we
-; install takes care of this for us.
-
-@@Reissued:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
-endif
- jmp @@Exit
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_chainPrevkey - Chain to previous key interrupt and return
-;----------------------------------------------------------------------------
-; Chains to the previous key interrupt routine and returns control
-; back to the high level interrupt handler.
-;----------------------------------------------------------------------------
-cprocstart PM_chainPrevKey
-
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
- ret
-else
-
-; YIKES! For some strange reason, when execution returns from the
-; previous keyboard handler, interrupts are re-enabled!! Since we expect
-; interrupts to remain off during the duration of our handler, this can
-; cause havoc. However our stack macros always turn off interrupts, so they
-; will be off when we exit this routine. Obviously there is a tiny weeny
-; window when interrupts will be enabled, but there is nothing we can
-; do about this.
-
- SWAPSTK KyStack ; Swap back to previous stack
- pushf ; Push flags on stack to simulate interrupt
-ifdef USE_NASM
- call far dword [_PM_prevKey]
-else
- call [_PM_prevKey]
-endif
- SWAPSTK KyStack ; Swap back to C stack again
- ret
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_key15ISR - Int 15h keyboard interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; This routine gets called if we have been called to handle the Int 15h
-; keyboard interrupt callout from real mode.
-;
-; Entry: AX - Hardware scan code to process
-; Exit: AX - Hardware scan code to process (0 to ignore)
-;----------------------------------------------------------------------------
-cprocfar _PM_key15ISR
-
- push ds
- push es
- LOAD_DS
- cmp ah,4Fh
- jnz @@NotOurs ; Quit if not keyboard callout
-
- pushad
- cld ; Clear direction flag
- xor ah,ah ; AX := scan code
- NEWSTK Ky15Stack ; Switch to local stack
- push _ax
- call [CPTR _PM_key15Handler] ; Call C code
- _add sp,2,4
- RESTSTK Ky15Stack ; Restore previous stack
- test ax,ax
- jz @@1
- stc ; Set carry to process as normal
- jmp @@2
-@@1: clc ; Clear carry to ignore scan code
-@@2: popad
- jmp @@Exit ; We are done
-
-@@NotOurs:
-ifdef TNT
- push eax
- push ebx
- push ecx
- pushfd ; Push flags on stack to simulate interrupt
- mov ax,250Eh ; Call real mode procedure function
- mov ebx,[_PM_prevRealKey15]
- mov ecx,1 ; Copy real mode flags to real mode stack
- int 21h ; Call the real mode code
- popfd
- pop ecx
- pop ebx
- pop eax
-else
- pushf
-ifdef USE_NASM
- call far dword [_PM_prevKey15]
-else
- call [_PM_prevKey15]
-endif
-endif
-@@Exit: pop es
- pop ds
- retf 4
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_breakISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-Break interrupt. We simply set
-; the Ctrl-Break flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_breakISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
- mov ebx,[_PM_ctrlBPtr]
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,1
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlBreakHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-Break flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlBreakHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
- mov ebx,[_PM_ctrlBPtr]
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done: pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_ctrlCISR - Control Break interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Hardware interrupt handler for the Ctrl-C interrupt. We simply set
-; the Ctrl-C flag to a 1 and leave (note that this is accessed through
-; a far pointer, as it may well be located in conventional memory).
-;----------------------------------------------------------------------------
-cprocfar _PM_ctrlCISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx
-
- LOAD_DS ; Load DS register
- mov ebx,[_PM_ctrlCPtr]
- mov [UINT _ES _bx],1
-
-; Run alternate break handler code if installed
-
- cmp [CPTR _PM_breakHandler],0
- je @@Exit
-
- pushad
- mov _ax,0
- push _ax
- call [CPTR _PM_breakHandler] ; Call C code
- pop _ax
- popad
-
-@@Exit: pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
- iretd
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_ctrlCHit(int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the Ctrl-C flag and possibly clears it.
-;----------------------------------------------------------------------------
-cprocstart PM_ctrlCHit
-
- ARG clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
- mov ebx,[_PM_ctrlCPtr]
- cli ; No interrupts thanks!
- mov _ax,[_ES _bx]
- test [BYTE clearFlag],1
- jz @@Done
- mov [UINT _ES _bx],0
-
-@@Done:
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PM_criticalISR - Control Error handler interrupt subroutine dispatcher
-;----------------------------------------------------------------------------
-; Interrupt handler for the MSDOS Critical Error interrupt, to dispatch
-; control to high level C based subroutines. We save the state of all
-; registers in this routine, and switch to a local stack. We also pass
-; the values of the AX and DI registers to the as pointers, so that the
-; values can be modified before returning to MSDOS.
-;----------------------------------------------------------------------------
-cprocfar _PM_criticalISR
-
- sti
- push ds ; Save value of DS
- push es
- push _bx ; Save register values changed
- cld ; Clear direction flag
-
- LOAD_DS ; Load DS register
- mov ebx,[_PM_critPtr]
- mov [_ES _bx],ax
- mov [_ES _bx+2],di
-
-; Run alternate critical handler code if installed
-
- cmp [CPTR _PM_critHandler],0
- je @@NoAltHandler
-
- pushad
- push _di
- push _ax
- call [CPTR _PM_critHandler] ; Call C code
- _add sp,4,8
- popad
-
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-@@NoAltHandler:
- mov ax,3 ; Tell MSDOS to fail the operation
- pop _bx
- pop es
- pop ds
- iret ; Return from interrupt
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_criticalError(int *axVal,int *diVal,int clearFlag)
-;----------------------------------------------------------------------------
-; Returns the current state of the critical error flags, and the values that
-; MSDOS passed in the AX and DI registers to our handler.
-;----------------------------------------------------------------------------
-cprocstart PM_criticalError
-
- ARG axVal:DPTR, diVal:DPTR, clearFlag:UINT
-
- enter_c
- pushf ; Save interrupt status
- push es
- mov ebx,[_PM_critPtr]
- cli ; No interrupts thanks!
- xor _ax,_ax
- xor _di,_di
- mov ax,[_ES _bx]
- mov di,[_ES _bx+2]
- test [BYTE clearFlag],1
- jz @@NoClear
- mov [ULONG _ES _bx],0
-@@NoClear:
- _les _bx,[axVal]
- mov [_ES _bx],_ax
- _les _bx,[diVal]
- mov [_ES _bx],_di
- pop es
- popf ; Restore interrupt status
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setMouseHandler(int mask, PM_mouseHandler mh)
-;----------------------------------------------------------------------------
-cprocstart _PM_setMouseHandler
-
- ARG mouseMask:UINT
-
- enter_c
- push es
-
- mov ax,0Ch ; AX := Function 12 - install interrupt sub
- mov _cx,[mouseMask] ; CX := mouse mask
- mov _dx,offset _PM_mouseISR
- push cs
- pop es ; ES:_DX -> mouse handler
- int 33h ; Call mouse driver
-
- pop es
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_mousePMCB(void)
-;----------------------------------------------------------------------------
-; Mouse realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:_SI -> Real mode stack at time of call
-; ES:_DI -> Real mode register data structure
-; SS:_SP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_mousePMCB
-
- pushad
- mov eax,[es:_di+1Ch] ; Load register values from real mode
- mov ebx,[es:_di+10h]
- mov ecx,[es:_di+18h]
- mov edx,[es:_di+14h]
- mov esi,[es:_di+04h]
- mov edi,[es:_di]
- call _PM_mouseISR ; Call the mouse handler
- popad
-
- mov ax,[ds:_si]
- mov [es:_di+2Ah],ax ; Plug in return IP address
- mov ax,[ds:_si+2]
- mov [es:_di+2Ch],ax ; Plug in return CS value
- add [WORD es:_di+2Eh],4 ; Remove return address from stack
- iret ; Go back to real mode!
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_int10PMCB(void)
-;----------------------------------------------------------------------------
-; int10 realmode callback routine. Upon entry to this routine, we recieve
-; the following from the DPMI server:
-;
-; Entry: DS:ESI -> Real mode stack at time of call
-; ES:EDI -> Real mode register data structure
-; SS:ESP -> Locked protected mode stack to use
-;----------------------------------------------------------------------------
-cprocfar _PM_int10PMCB
-
- pushad
- push ds
- push es
- push fs
-
- pushfd
- pop eax
- mov [es:edi+20h],ax ; Save return flag status
- mov ax,[ds:esi]
- mov [es:edi+2Ah],ax ; Plug in return IP address
- mov ax,[ds:esi+2]
- mov [es:edi+2Ch],ax ; Plug in return CS value
- add [WORD es:edi+2Eh],4 ; Remove return address from stack
-
-; Call the install int10 handler in protected mode. This function gets called
-; with DS set to the current data selector, and ES:EDI pointing the the
-; real mode DPMI register structure at the time of the interrupt. The
-; handle must be written in assembler to be able to extract the real mode
-; register values from the structure
-
- push es
- pop fs ; FS:EDI -> real mode registers
- LOAD_DS
- NEWSTK Int10Stack ; Switch to local stack
-
- call [_PM_int10Handler]
-
- RESTSTK Int10Stack ; Restore previous stack
- pop fs
- pop es
- pop ds
- popad
- iret ; Go back to real mode!
-
-cprocend
-
-cpublic _PM_pmsmxCodeEnd
-
-endcodeseg _pmsmx
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/_vflat.asm b/board/MAI/bios_emulator/scitech/src/pm/smx/_vflat.asm
deleted file mode 100644
index 34985a9..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/_vflat.asm
+++ /dev/null
@@ -1,652 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Based on original code Copyright 1994 Otto Chrons
-;*
-;* Language: 80386 Assembler, TASM 4.0 or later
-;* Environment: IBM PC 32 bit protected mode
-;*
-;* Description: Low level page fault handler for virtual linear framebuffers.
-;*
-;****************************************************************************
-
- IDEAL
- JUMPS
-
-include "scitech.mac" ; Memory model macros
-
-header _vflat ; Set up memory model
-
-VFLAT_START EQU 0F0000000h
-VFLAT_END EQU 0F03FFFFFh
-PAGE_PRESENT EQU 1
-PAGE_NOTPRESENT EQU 0
-PAGE_READ EQU 0
-PAGE_WRITE EQU 2
-
-ifdef DOS4GW
-
-;----------------------------------------------------------------------------
-; DOS4G/W flat linear framebuffer emulation.
-;----------------------------------------------------------------------------
-
-begdataseg _vflat
-
-; Near pointers to the page directory base and our page tables. All of
-; this memory is always located in the first Mb of DOS memory.
-
-PDBR dd 0 ; Page directory base register (CR3)
-accessPageAddr dd 0
-accessPageTable dd 0
-
-; CauseWay page directory & 1st page table linear addresses.
-
-CauseWayDIRLinear dd 0
-CauseWay1stLinear dd 0
-
-; Place to store a copy of the original Page Table Directory before we
-; intialised our virtual buffer code.
-
-pageDirectory: resd 1024 ; Saved page table directory
-
-ValidCS dw 0 ; Valid CS for page faults
-Ring0CS dw 0 ; Our ring 0 code selector
-LastPage dd 0 ; Last page we mapped in
-BankFuncBuf: resb 101 ; Place to store bank switch code
-BankFuncPtr dd offset BankFuncBuf
-
-INT14Gate:
-INT14Offset dd 0 ; eip of original vector
-INT14Selector dw 0 ; cs of original vector
-
- cextern _PM_savedDS,USHORT
- cextern VF_haveCauseWay,BOOL
-
-enddataseg _vflat
-
-begcodeseg _vflat ; Start of code segment
-
- cextern VF_malloc,FPTR
-
-;----------------------------------------------------------------------------
-; PF_handler64k - Page fault handler for 64k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler64k
-
-; Check if this is a processor exeception or a page fault
-
- push eax
- mov ax,[cs:ValidCS] ; Use CS override to access data
- cmp [ss:esp+12],ax ; Is this a page fault?
- jne @@ToOldHandler ; Nope, jump to the previous handler
-
-; Get address of page fault and check if within our handlers range
-
- mov eax,cr2 ; EBX has page fault linear address
- cmp eax,VFLAT_START ; Is the fault less than ours?
- jb @@ToOldHandler ; Yep, go to previous handler
- cmp eax,VFLAT_END ; Is the fault more than ours?
- jae @@ToOldHandler ; Yep, go to previous handler
-
-; This is our page fault, so we need to handle it
-
- pushad
- push ds
- push es
- mov ebx,eax ; EBX := page fault address
- and ebx,invert 0FFFFh ; Mask to 64k bank boundary
- mov ds,[cs:_PM_savedDS]; Load segment registers
- mov es,[cs:_PM_savedDS]
-
-; Map in the page table for our virtual framebuffer area for modification
-
- mov edi,[PDBR] ; EDI points to page directory
- mov edx,ebx ; EDX = linear address
- shr edx,22 ; EDX = offset to page directory
- mov edx,[edx*4+edi] ; EDX = physical page table address
- mov eax,edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
-; Mark all pages valid for the new page fault area
-
- mov esi,ebx ; ESI := linear address for page
- shr esi,10
- and esi,0FFFh ; Offset into page table
- add esi,[accessPageAddr]
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0000000001h ; Enable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- or [DWORD esi+off],0000000001h ; Enable pages
-off = off+4
-ENDM
-endif
-
-; Mark all pages invalid for the previously mapped area
-
- xchg esi,[LastPage] ; Save last page for next page fault
- test esi,esi
- jz @@DoneMapping ; Dont update if first time round
-ifdef USE_NASM
-%assign off 0
-%rep 16
- or [DWORD esi+off],0FFFFFFFEh ; Disable pages
-%assign off off+4
-%endrep
-else
-off = 0
-REPT 16
- and [DWORD esi+off],0FFFFFFFEh ; Disable pages
-off = off+4
-ENDM
-endif
-
-@@DoneMapping:
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
-
-; Now program the new SuperVGA starting bank address
-
- mov eax,ebx ; EAX := page fault address
- shr eax,16
- and eax,0FFh ; Mask to 0-255
- call [BankFuncPtr] ; Call the bank switch function
-
- pop es
- pop ds
- popad
- pop eax
- add esp,4 ; Pop the error code from stack
- iretd ; Return to faulting instruction
-
-@@ToOldHandler:
- pop eax
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; PF_handler4k - Page fault handler for 4k banks
-;----------------------------------------------------------------------------
-; The handler below is a 32 bit ring 0 page fault handler. It receives
-; control immediately after any page fault or after an IRQ6 (hardware
-; interrupt). This provides the fastest possible handling of page faults
-; since it jump directly here. If this is a page fault, the number
-; immediately on the stack will be an error code, at offset 4 will be
-; the eip of the faulting instruction, at offset 8 will be the cs of the
-; faulting instruction. If it is a hardware interrupt, it will not have
-; the error code and the eflags will be at offset 8.
-;----------------------------------------------------------------------------
-cprocfar PF_handler4k
-
-; Fill in when we have tested all the 64Kb code
-
-ifdef USE_NASM
- jmp far dword [cs:INT14Gate]; Chain to previous handler
-else
- jmp [FWORD cs:INT14Gate]; Chain to previous handler
-endif
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallFaultHandler(void *baseAddr,int bankSize)
-;----------------------------------------------------------------------------
-; Installes the page fault handler directly int the interrupt descriptor
-; table for maximum performance. This of course requires ring 0 access,
-; but none of this stuff will run without ring 0!
-;----------------------------------------------------------------------------
-cprocstart InstallFaultHandler
-
- ARG baseAddr:ULONG, bankSize:UINT
-
- enter_c
-
- mov [DWORD LastPage],0 ; No pages have been mapped
- mov ax,cs
- mov [ValidCS],ax ; Save CS value for page faults
-
-; Put address of our page fault handler into the IDT directly
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
-
-; Note that Interrupt gates do not have the high and low word of the
-; offset in adjacent words in memory, there are 4 bytes separating them.
-
- mov ecx,[eax] ; Get cs and low 16 bits of offset
- mov edx,[eax+6] ; Get high 16 bits of offset in dx
- shl edx,16
- mov dx,cx ; edx has offset
- mov [INT14Offset],edx ; Save offset
- shr ecx,16
- mov [INT14Selector],cx ; Save original cs
- mov [eax+2],cs ; Install new cs
- mov edx,offset PF_handler64k
- cmp [UINT bankSize],4
- jne @@1
- mov edx,offset PF_handler4k
-@@1: mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void RemoveFaultHandler(void)
-;----------------------------------------------------------------------------
-; Closes down the virtual framebuffer services and restores the previous
-; page fault handler.
-;----------------------------------------------------------------------------
-cprocstart RemoveFaultHandler
-
- enter_c
-
-; Remove page fault handler from IDT
-
- sub esp,6 ; Allocate space on stack
-ifdef USE_NASM
- sidt [ss:esp] ; Store pointer to IDT
-else
- sidt [FWORD ss:esp] ; Store pointer to IDT
-endif
-
- pop ax ; add esp,2
- pop eax ; Absolute address of IDT
- add eax,14*8 ; Point to Int #14
- mov cx,[INT14Selector]
- mov [eax+2],cx ; Restore original CS
- mov edx,[INT14Offset]
- mov [eax],dx ; Install low word of offset
- shr edx,16
- mov [eax+6],dx ; Install high word of offset
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void InstallBankFunc(int codeLen,void *bankFunc)
-;----------------------------------------------------------------------------
-; Installs the bank switch function by relocating it into our data segment
-; and making it into a callable function. We do it this way to make the
-; code identical to the way that the VflatD devices work under Windows.
-;----------------------------------------------------------------------------
-cprocstart InstallBankFunc
-
- ARG codeLen:UINT, bankFunc:DPTR
-
- enter_c
-
- mov esi,[bankFunc] ; Copy the code into buffer
- mov edi,offset BankFuncBuf
- mov ecx,[codeLen]
- rep movsb
- mov [BYTE edi],0C3h ; Terminate the function with a near ret
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int InitPaging(void)
-;----------------------------------------------------------------------------
-; Initializes paging system. If paging is not enabled, builds a page table
-; directory and page tables for physical memory
-;
-; Exit: 0 - Successful
-; -1 - Couldn't initialize paging mechanism
-;----------------------------------------------------------------------------
-cprocstart InitPaging
-
- push ebx
- push ecx
- push edx
- push esi
- push edi
-
-; Are we running under CauseWay?
-
- mov ax,0FFF9h
- int 31h
- jc @@NotCauseway
- cmp ecx,"CAUS"
- jnz @@NotCauseway
- cmp edx,"EWAY"
- jnz @@NotCauseway
-
- mov [BOOL VF_haveCauseWay],1
- mov [CauseWayDIRLinear],esi
- mov [CauseWay1stLinear],edi
-
-; Check for DPMI
-
- mov ax,0ff00h
- push es
- int 31h
- pop es
- shr edi,2
- and edi,3
- cmp edi,2
- jz @@ErrExit ; Not supported under DPMI
-
- mov eax,[CauseWayDIRLinear]
- jmp @@CopyCR3
-
-@@NotCauseway:
- mov ax,cs
- test ax,3 ; Which ring are we running
- jnz @@ErrExit ; Needs zero ring to access
- ; page tables (CR3)
- mov eax,cr0 ; Load CR0
- test eax,80000000h ; Is paging enabled?
- jz @@ErrExit ; No, we must have paging!
-
- mov eax,cr3 ; Load directory address
- and eax,0FFFFF000h
-
-@@CopyCR3:
- mov [PDBR],eax ; Save it
- mov esi,eax
- mov edi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Copy the original page table directory
- cmp [DWORD accessPageAddr],0; Check if we have allocated page
- jne @@HaveRealMem ; table already (we cant free it)
-
- mov eax,0100h ; DPMI DOS allocate
- mov ebx,8192/16
- int 31h ; Allocate 8192 bytes
- and eax,0FFFFh
- shl eax,4 ; EAX points to newly allocated memory
- add eax,4095
- and eax,0FFFFF000h ; Page align
- mov [accessPageAddr],eax
-
-@@HaveRealMem:
- mov eax,[accessPageAddr] ; EAX -> page table in 1st Mb
- shr eax,12
- and eax,3FFh ; Page table offset
- shl eax,2
- cmp [BOOL VF_haveCauseWay],0
- jz @@NotCW0
- mov ebx,[CauseWay1stLinear]
- jmp @@Put1st
-
-@@NotCW0:
- mov ebx,[PDBR]
- mov ebx,[ebx]
- and ebx,0FFFFF000h ; Page table for 1st megabyte
-
-@@Put1st:
- add eax,ebx
- mov [accessPageTable],eax
- sub eax,eax ; No error
- jmp @@Exit
-
-@@ErrExit:
- mov eax,-1
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void ClosePaging(void)
-;----------------------------------------------------------------------------
-; Closes the paging system
-;----------------------------------------------------------------------------
-cprocstart ClosePaging
-
- push eax
- push ecx
- push edx
- push esi
- push edi
-
- mov eax,[accessPageAddr]
- call AccessPage ; Restore AccessPage mapping
- mov edi,[PDBR]
- mov esi,offset pageDirectory
- mov ecx,1024
- cld
- rep movsd ; Restore the original page table directory
-
-@@Exit: pop edi
- pop esi
- pop edx
- pop ecx
- pop eax
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long AccessPage(long phys)
-;----------------------------------------------------------------------------
-; Maps a known page to given physical memory
-; Entry: EAX - Physical memory
-; Exit: EAX - Linear memory address of mapped phys mem
-;----------------------------------------------------------------------------
-cprocstatic AccessPage
-
- push edx
- mov edx,[accessPageTable]
- or eax,7
- mov [edx],eax
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- mov eax,[accessPageAddr]
- pop edx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; long GetPhysicalAddress(long linear)
-;----------------------------------------------------------------------------
-; Returns the physical address of linear address
-; Entry: EAX - Linear address to convert
-; Exit: EAX - Physical address
-;----------------------------------------------------------------------------
-cprocstatic GetPhysicalAddress
-
- push ebx
- push edx
- mov edx,eax
- shr edx,22 ; EDX is the directory offset
- mov ebx,[PDBR]
- mov edx,[edx*4+ebx] ; Load page table address
- push eax
- mov eax,edx
- call AccessPage ; Access the page table
- mov edx,eax
- pop eax
- shr eax,12
- and eax,03FFh ; EAX offset into page table
- mov eax,[edx+eax*4] ; Load physical address
- and eax,0FFFFF000h
- pop edx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void CreatePageTable(long pageDEntry)
-;----------------------------------------------------------------------------
-; Creates a page table for specific address (4MB)
-; Entry: EAX - Page directory entry (top 10-bits of address)
-;----------------------------------------------------------------------------
-cprocstatic CreatePageTable
-
- push ebx
- push ecx
- push edx
- push edi
- mov ebx,eax ; Save address
- mov eax,8192
- push eax
- call VF_malloc ; Allocate page table directory
- add esp,4
- add eax,0FFFh
- and eax,0FFFFF000h ; Page align (4KB)
- mov edi,eax ; Save page table linear address
- sub eax,eax ; Fill with zero
- mov ecx,1024
- cld
- rep stosd ; Clear page table
- sub edi,4096
- mov eax,edi
- call GetPhysicalAddress
- mov edx,[PDBR]
- or eax,7 ; Present/write/user bit
- mov [edx+ebx*4],eax ; Save physical address into page directory
- mov eax,cr3
- mov cr3,eax ; Update page table cache
- pop edi
- pop edx
- pop ecx
- pop ebx
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void MapPhysical2Linear(ulong pAddr, ulong lAddr, int pages, int flags);
-;----------------------------------------------------------------------------
-; Maps physical memory into linear memory
-; Entry: pAddr - Physical address
-; lAddr - Linear address
-; pages - Number of 4K pages to map
-; flags - Page flags
-; bit 0 = present
-; bit 1 = Read(0)/Write(1)
-;----------------------------------------------------------------------------
-cprocstart MapPhysical2Linear
-
- ARG pAddr:ULONG, lAddr:ULONG, pages:UINT, pflags:UINT
-
- enter_c
-
- and [ULONG pAddr],0FFFFF000h; Page boundary
- and [ULONG lAddr],0FFFFF000h; Page boundary
- mov ecx,[pflags]
- and ecx,11b ; Just two bits
- or ecx,100b ; Supervisor bit
- mov [pflags],ecx
-
- mov edx,[lAddr]
- shr edx,22 ; EDX = Directory
- mov esi,[PDBR]
- mov edi,[pages] ; EDI page count
- mov ebx,[lAddr]
-
-@@CreateLoop:
- mov ecx,[esi+edx*4] ; Load page table address
- test ecx,1 ; Is it present?
- jnz @@TableOK
- mov eax,edx
- call CreatePageTable ; Create a page table
-@@TableOK:
- mov eax,ebx
- shr eax,12
- and eax,3FFh
- sub eax,1024
- neg eax ; EAX = page count in this table
- inc edx ; Next table
- mov ebx,0 ; Next time we'll map 1K pages
- sub edi,eax ; Subtract mapped pages from page count
- jns @@CreateLoop ; Create more tables if necessary
-
- mov ecx,[pages] ; ECX = Page count
- mov esi,[lAddr]
- shr esi,12 ; Offset part isn't needed
- mov edi,[pAddr]
-@@MappingLoop:
- mov eax,esi
- shr eax,10 ; EAX = offset to page directory
- mov ebx,[PDBR]
- mov eax,[eax*4+ebx] ; EAX = page table address
- call AccessPage
- mov ebx,esi
- and ebx,3FFh ; EBX = offset to page table
- mov edx,edi
- add edi,4096 ; Next physical address
- inc esi ; Next linear page
- or edx,[pflags] ; Update flags...
- mov [eax+ebx*4],edx ; Store page table entry
- loop @@MappingLoop
- mov eax,cr3
- mov cr3,eax ; Update page table cache
-
- leave_c
- ret
-
-cprocend
-
-endcodeseg _vflat
-
-endif
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/smx/cpuinfo.c
deleted file mode 100644
index 5447e57..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/cpuinfo.c
+++ /dev/null
@@ -1,72 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development.
-*
-* Description: SMX specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External timing function */
-
-void __ZTimerInit(void);
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS because we don't have thread priorities.
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- ulong resolution;
-
- __ZTimerInit();
- ULZTimerResolution(&resolution);
- freq->low = (ulong)(10000000000.0 / resolution);
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = ULZReadTime() * 10000L; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/event.c b/board/MAI/bios_emulator/scitech/src/pm/smx/event.c
deleted file mode 100644
index 533c261..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/event.c
+++ /dev/null
@@ -1,368 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development
-*
-* Description: 32-bit SMX implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-#include "smx/ps2mouse.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-ibool _VARAPI _EVT_useEvents = true; /* True to use event handling */
-ibool _VARAPI _EVT_installed = 0; /* Event handers installed? */
-uchar _VARAPI *_EVT_biosPtr = NULL; /* Pointer to the BIOS data area */
-static ibool haveMouse = false; /* True if we have a mouse */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* External assembler functions */
-
-void EVTAPI _EVT_pollJoystick(void);
-uint EVTAPI _EVT_disableInt(void);
-uint EVTAPI _EVT_restoreInt(uint flags);
-void EVTAPI _EVT_codeStart(void);
-void EVTAPI _EVT_codeEnd(void);
-void EVTAPI _EVT_cCodeStart(void);
-void EVTAPI _EVT_cCodeEnd(void);
-int EVTAPI _EVT_getKeyCode(void);
-int EVTAPI EVT_rdinx(int port,int index);
-void EVTAPI EVT_wrinx(int port,int index,int value);
-
-/****************************************************************************
-REMARKS:
-Do nothing for DOS, because we are fully interrupt driven.
-****************************************************************************/
-#define _EVT_pumpMessages()
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- return (ulong)PM_getLong(_EVT_biosPtr+0x6C) * 55UL;
-}
-
-/****************************************************************************
-REMARKS:
-Include generic raw scancode keyboard module.
-****************************************************************************/
-#include "common/keyboard.c"
-
-/****************************************************************************
-REMARKS:
-Determines if we have a mouse attached and functioning.
-****************************************************************************/
-static ibool detectMouse(void)
-{
- return(ps2Query());
-}
-
-/****************************************************************************
-PARAMETERS:
-what - Event code
-message - Event message
-x,y - Mouse position at time of event
-but_stat - Mouse button status at time of event
-
-REMARKS:
-Adds a new mouse event to the event queue. This routine is called from within
-the mouse interrupt subroutine, so it must be efficient.
-
-NOTE: Interrupts MUST be OFF while this routine is called to ensure we have
- mutually exclusive access to our internal data structures for
- interrupt driven systems (like under DOS).
-****************************************************************************/
-static void addMouseEvent(
- uint what,
- uint message,
- int x,
- int y,
- int mickeyX,
- int mickeyY,
- uint but_stat)
-{
- event_t evt;
-
- if (EVT.count < EVENTQSIZE) {
- /* Save information in event record. */
- evt.when = _EVT_getTicks();
- evt.what = what;
- evt.message = message;
- evt.modifiers = but_stat;
- evt.where_x = x; /* Save mouse event position */
- evt.where_y = y;
- evt.relative_x = mickeyX;
- evt.relative_y = mickeyY;
- evt.modifiers |= EVT.keyModifiers;
- addEvent(&evt); /* Add to tail of event queue */
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-mask - Event mask
-butstate - Button state
-x - Mouse x coordinate
-y - Mouse y coordinate
-
-REMARKS:
-Mouse event handling routine. This gets called when a mouse event occurs,
-and we call the addMouseEvent() routine to add the appropriate mouse event
-to the event queue.
-
-Note: Interrupts are ON when this routine is called by the mouse driver code.
-/*AM: NOTE: This function has not actually been ported from DOS yet and should not */
-/*AM: be installed until it is. */
-****************************************************************************/
-static void EVTAPI mouseISR(
- uint mask,
- uint butstate,
- int x,
- int y,
- int mickeyX,
- int mickeyY)
-{
- RMREGS regs;
- uint ps;
-
- if (mask & 1) {
- /* Save the current mouse coordinates */
- EVT.mx = x; EVT.my = y;
-
- /* If the last event was a movement event, then modify the last
- * event rather than post a new one, so that the queue will not
- * become saturated. Before we modify the data structures, we
- * MUST ensure that interrupts are off.
- */
- ps = _EVT_disableInt();
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = y;
- EVT.evtq[EVT.oldMove].relative_x += mickeyX;
- EVT.evtq[EVT.oldMove].relative_y += mickeyY;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
- addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate);
- }
- _EVT_restoreInt(ps);
- }
- if (mask & 0x2A) {
- ps = _EVT_disableInt();
- addMouseEvent(EVT_MOUSEDOWN,mask >> 1,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- if (mask & 0x54) {
- ps = _EVT_disableInt();
- addMouseEvent(EVT_MOUSEUP,mask >> 2,x,y,0,0,butstate);
- EVT.oldMove = -1;
- _EVT_restoreInt(ps);
- }
- EVT.oldKey = -1;
-}
-
-/****************************************************************************
-REMARKS:
-Keyboard interrupt handler function.
-
-NOTE: Interrupts are OFF when this routine is called by the keyboard ISR,
- and we leave them OFF the entire time. This has been modified to work
- in conjunction with smx keyboard handler.
-****************************************************************************/
-static void EVTAPI keyboardISR(void)
-{
- PM_chainPrevKey();
- processRawScanCode(PM_inpb(0x60));
- PM_outpb(0x20,0x20);
-}
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- int i;
-
- EVT.mouseMove = mouseMove;
- _EVT_biosPtr = PM_getBIOSPointer();
- EVT_resume();
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVTAPI EVT_resume(void)
-{
- static int locked = 0;
- int stat;
- uchar mods;
- PM_lockHandle lh;
-
- if (_EVT_useEvents) {
- /* Initialise the event queue and enable our interrupt handlers */
- initEventQueue();
- PM_setKeyHandler(keyboardISR);
- if ((haveMouse = detectMouse()) != 0)
- PM_setMouseHandler(0xFFFF,mouseISR);
-
- /* Read the keyboard modifier flags from the BIOS to get the
- * correct initialisation state. The only state we care about is
- * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and
- * CAPSLOCK.
- */
- EVT.keyModifiers = 0;
- mods = PM_getByte(_EVT_biosPtr+0x17);
- if (mods & 0x10)
- EVT.keyModifiers |= EVT_SCROLLLOCK;
- if (mods & 0x20)
- EVT.keyModifiers |= EVT_NUMLOCK;
- if (mods & 0x40)
- EVT.keyModifiers |= EVT_CAPSLOCK;
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- /* It is difficult to ensure that we lock our global data, so we
- * do this by taking the address of a variable locking all data
- * 2Kb on either side. This should properly cover the global data
- * used by the module (the other alternative is to declare the
- * variables in assembler, in which case we know it will be
- * correct).
- */
- stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh);
- stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh);
- if (stat) {
- PM_fatalError("Page locking services failed - interrupt handling not safe!");
- exit(1);
- }
- locked = 1;
- }
-
- _EVT_installed = true;
- }
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- if (haveMouse) {
- ps2MouseStop();
- ps2MouseStart( 0, xRes, 0, yRes, -1, -1, -1);
- }
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- if (haveMouse)
- ps2MouseMove(*x, *y);
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVTAPI EVT_suspend(void)
-{
- uchar mods;
-
- if (_EVT_installed) {
- PM_restoreKeyHandler();
- if (haveMouse)
- PM_restoreMouseHandler();
-
- /* Set the keyboard modifier flags in the BIOS to our values */
- EVT_allowLEDS(true);
- mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70;
- if (EVT.keyModifiers & EVT_SCROLLLOCK)
- mods |= 0x10;
- if (EVT.keyModifiers & EVT_NUMLOCK)
- mods |= 0x20;
- if (EVT.keyModifiers & EVT_CAPSLOCK)
- mods |= 0x40;
- PM_setByte(_EVT_biosPtr+0x17,mods);
-
- /* Flag that we are no longer installed */
- _EVT_installed = false;
- }
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVTAPI EVT_exit(void)
-{
- EVT_suspend();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/smx/oshdr.h
deleted file mode 100644
index 3ff8daa..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development.
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c b/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c
deleted file mode 100644
index 99ee3d4..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c
+++ /dev/null
@@ -1,1187 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32 bit SMX embedded systems development.
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "ztimerc.h"
-#include "event.h"
-#include "mtrr.h"
-#include "pm_help.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-#include <conio.h>
-#ifdef __GNUC__
-#include <unistd.h>
-#include <sys/nearptr.h>
-#include <sys/stat.h>
-#else
-#include <direct.h>
-#endif
-#ifdef __BORLANDC__
-#pragma warn -par
-#endif
-
-/*--------------------------- Global variables ----------------------------*/
-
-typedef struct {
- int oldMode;
- int old50Lines;
- } DOS_stateBuf;
-
-#define MAX_RM_BLOCKS 10
-
-static struct {
- void *p;
- uint tag;
- } rmBlocks[MAX_RM_BLOCKS];
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-ushort _VARAPI _PM_savedDS = 0;
-static ulong PDB = 0,*pPDB = NULL;
-static uint VXD_version = -1;
-
-/*----------------------------- Implementation ----------------------------*/
-
-ulong _ASMAPI _PM_getPDB(void);
-void _ASMAPI _PM_VxDCall(VXD_regs *regs,uint off,uint sel);
-
-/****************************************************************************
-REMARKS:
-External function to call the PMHELP helper VxD.
-****************************************************************************/
-void PMAPI PM_VxDCall(
- VXD_regs *regs)
-{
-}
-
-/****************************************************************************
-RETURNS:
-BCD coded version number of the VxD, or 0 if not loaded (ie: 0x202 - 2.2)
-
-REMARKS:
-This function gets the version number for the VxD that we have connected to.
-****************************************************************************/
-uint PMAPI PMHELP_getVersion(void)
-{
- return VXD_version = 0;
-}
-
-void PMAPI PM_init(void)
-{
-#ifndef REALMODE
- MTRR_init();
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
-#ifndef REALMODE
- return MTRR_enableWriteCombine(base,size,type);
-#else
- return PM_MTRR_NOT_SUPPORTED;
-#endif
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return false; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_SMX; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void MGLOutput(char *);
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- MGLOutput(msg);
-/* No support for fprintf() under smx currently! */
-/* fprintf(stderr,"%s\n", msg); */
- exit(1);
-}
-
-static void ExitVBEBuf(void)
-{
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff)
-{
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return PM_int386x(intno,in,out,&sregs);
-}
-
-/* Routines to set and get the real mode interrupt vectors, by making
- * direct real mode calls to DOS and bypassing the DOS extenders API.
- * This is the safest way to handle this, as some servers try to be
- * smart about changing real mode vectors.
- */
-
-void PMAPI _PM_getRMvect(int intno, long *realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x35;
- regs.h.al = intno;
- PM_int86x(0x21, ®s, ®s, &sregs);
- *realisr = ((long)sregs.es << 16) | regs.x.bx;
-}
-
-void PMAPI _PM_setRMvect(int intno, long realisr)
-{
- RMREGS regs;
- RMSREGS sregs;
-
- PM_saveDS();
- regs.h.ah = 0x25;
- regs.h.al = intno;
- sregs.ds = (int)(realisr >> 16);
- regs.x.dx = (int)(realisr & 0xFFFF);
- PM_int86x(0x21, ®s, ®s, &sregs);
-}
-
-void PMAPI _PM_addRealModeBlock(void *mem,uint tag)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == NULL) {
- rmBlocks[i].p = mem;
- rmBlocks[i].tag = tag;
- return;
- }
- }
- PM_fatalError("To many real mode memory block allocations!");
-}
-
-uint PMAPI _PM_findRealModeBlock(void *mem)
-{
- int i;
-
- for (i = 0; i < MAX_RM_BLOCKS; i++) {
- if (rmBlocks[i].p == mem)
- return rmBlocks[i].tag;
- }
- PM_fatalError("Could not find prior real mode memory block allocation!");
- return 0;
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return 'C'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return "c:\\"; }
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
- char *env;
-
- if ((env = getenv("NUCLEUS_PATH")) != NULL)
- return env;
- return "c:\\nucleus";
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return "SMX"; }
-
-const char * PMAPI PM_getMachineName(void)
-{ return "SMX"; }
-
-int PMAPI PM_kbhit(void)
-{
- int hit;
- event_t evt;
-
- hit = EVT_peekNext(&evt,EVT_KEYDOWN | EVT_KEYREPEAT);
- EVT_flush(~(EVT_KEYDOWN | EVT_KEYREPEAT));
- return hit;
-}
-
-int PMAPI PM_getch(void)
-{
- event_t evt;
-
- EVT_halt(&evt,EVT_KEYDOWN);
- return EVT_asciiCode(evt.message);
-}
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen)
-{
- /* Not used for SMX */
- (void)hwndUser;
- (void)device;
- (void)xRes;
- (void)yRes;
- (void)bpp;
- (void)fullScreen;
- return 0;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- return sizeof(DOS_stateBuf);
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- DOS_stateBuf *sb = stateBuf;
-
- /* Save the old video mode state */
- regs.h.ah = 0x0F;
- PM_int86(0x10,®s,®s);
- sb->oldMode = regs.h.al & 0x7F;
- sb->old50Lines = false;
- if (sb->oldMode == 0x3) {
- regs.x.ax = 0x1130;
- regs.x.bx = 0;
- regs.x.dx = 0;
- PM_int86(0x10,®s,®s);
- sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* Not used for SMX */
- (void)saveState;
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
- RMREGS regs;
- const DOS_stateBuf *sb = stateBuf;
-
- /* Retore 50 line mode if set */
- if (sb->old50Lines) {
- regs.x.ax = 0x1112;
- regs.x.bx = 0;
- PM_int86(0x10,®s,®s);
- }
- (void)hwndConsole;
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
- /* Not used for SMX */
- (void)hwndConsole;
-}
-
-void PMAPI PM_setOSCursorLocation(int x,int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PMAPI PM_setOSScreenWidth(int width,int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setWord(_biosPtr+0x4A,width);
- PM_setWord(_biosPtr+0x4C,width*2);
- PM_setByte(_biosPtr+0x84,height-1);
- if (height > 25) {
- PM_setWord(_biosPtr+0x60,0x0607);
- PM_setByte(_biosPtr+0x85,0x08);
- }
- else {
- PM_setWord(_biosPtr+0x60,0x0D0E);
- PM_setByte(_biosPtr+0x85,0x016);
- }
-}
-
-void * PMAPI PM_mallocShared(long size)
-{
- return PM_malloc(size);
-}
-
-void PMAPI PM_freeShared(void *ptr)
-{
- PM_free(ptr);
-}
-
-#define GetRMVect(intno,isr) *(isr) = ((ulong*)rmZeroPtr)[intno]
-#define SetRMVect(intno,isr) ((ulong*)rmZeroPtr)[intno] = (isr)
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- static int firstTime = true;
- static uchar *rmZeroPtr;
- long Current10,Current6D,Current42;
- RMREGS regs;
- RMSREGS sregs;
-
- /* Create a zero memory mapping for us to use */
- if (firstTime) {
- rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true);
- firstTime = false;
- }
-
- /* Remap the secondary BIOS to 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L || BIOSLen > 32768) {
- /* SMX cannot virtually remap the BIOS, so we can only work if all
- * the secondary controllers are identical, and we then use the
- * BIOS on the first controller for all the remaining controllers.
- *
- * For OS'es that do virtual memory, and remapping of 0xC0000
- * physical (perhaps a copy on write mapping) should be all that
- * is needed.
- */
- return false;
- }
-
- /* Save current handlers of int 10h and 6Dh */
- GetRMVect(0x10,&Current10);
- GetRMVect(0x6D,&Current6D);
-
- /* POST the secondary BIOS */
- GetRMVect(0x42,&Current42);
- SetRMVect(0x10,Current42); /* Restore int 10h to STD-BIOS */
- regs.x.ax = axVal;
- PM_callRealMode(0xC000,0x0003,®s,&sregs);
-
- /* Restore current handlers */
- SetRMVect(0x10,Current10);
- SetRMVect(0x6D,Current6D);
-
- /* Second the primary BIOS mappin 1:1 for 0xC0000 physical */
- if (BIOSPhysAddr != 0xC0000L) {
- /* SMX does not support this */
- (void)mappedBIOS;
- }
- return true;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- ulong microseconds = milliseconds * 1000L;
- LZTimerObject tm;
-
- LZTimerOnExt(&tm);
- while (LZTimerLapExt(&tm) < microseconds)
- ;
- LZTimerOffExt(&tm);
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-int PMAPI PM_setIOPL(
- int level)
-{
- return level;
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- struct find_t *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->attrib & _A_RDONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->attrib & _A_SUBDIR)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->attrib & _A_ARCH)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->attrib & _A_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->attrib & _A_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->size;
- strncpy(findData->name,blk->name,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-#define FIND_MASK (_A_RDONLY | _A_ARCH | _A_SUBDIR | _A_HIDDEN | _A_SYSTEM)
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void * PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- struct find_t *blk;
-
- if ((blk = PM_malloc(sizeof(*blk))) == NULL)
- return PM_FILE_INVALID;
- if (_dos_findfirst((char*)filename,FIND_MASK,blk) == 0) {
- convertFindData(findData,blk);
- return blk;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- struct find_t *blk = handle;
-
- if (_dos_findnext(blk) == 0) {
- convertFindData(findData,blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- PM_free(handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- RMREGS regs;
- regs.h.dl = (uchar)(drive - 'A' + 1);
- regs.h.ah = 0x36; /* Get disk information service */
- PM_int86(0x21,®s,®s);
- return regs.x.ax != 0xFFFF; /* AX = 0xFFFF if disk is invalid */
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- uint oldDrive,maxDrives;
- _dos_getdrive(&oldDrive);
- _dos_setdrive(drive,&maxDrives);
- getcwd(dir,len);
- _dos_setdrive(oldDrive,&maxDrives);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
-#if defined(TNT) && defined(_MSC_VER)
- DWORD attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= FILE_ATTRIBUTE_SYSTEM;
- SetFileAttributes((LPSTR)filename, attr);
-#else
- uint attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= _A_RDONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= _A_ARCH;
- if (attrib & PM_FILE_HIDDEN)
- attr |= _A_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= _A_SYSTEM;
- _dos_setfileattr(filename,attr);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
-#ifdef __GNUC__
- return mkdir(filename,S_IRUSR) == 0;
-#else
-/*AM: return mkdir(filename) == 0; */
- return(false);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
-/*AM: return rmdir(filename) == 0; */
- return(false);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked, physically contiguous memory. The memory
-may be required to be below the 16Meg boundary.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- void *p;
- uint r_seg,r_off;
- PM_lockHandle lh;
-
- /* Under DOS the only way to know the physical memory address is to
- * allocate the memory below the 1Meg boundary as real mode memory.
- * We also allocate 4095 bytes more memory than we need, so we can
- * properly page align the start of the memory block for DMA operations.
- */
- if (size > 4096)
- return NULL;
- if ((p = PM_allocRealSeg((size + 0xFFF) & ~0xFFF,&r_seg,&r_off)) == NULL)
- return NULL;
- *physAddr = ((r_seg << 4) + r_off + 0xFFF) & ~0xFFF;
- PM_lockDataPages(p,size*2,&lh);
- return p;
-}
-
-void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous)
-{
- (void)size;
- PM_freeRealSeg(p);
-}
-
-/*-------------------------------------------------------------------------*/
-/* Generic DPMI routines common to 16/32 bit code */
-/*-------------------------------------------------------------------------*/
-
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit)
-{
- PMREGS r;
- ulong physOfs;
-
- if (physAddr < 0x100000L) {
- /* We can't map memory below 1Mb, but the linear address are already
- * mapped 1:1 for this memory anyway so we just return the base address.
- */
- return physAddr;
- }
-
- /* Round the physical address to a 4Kb boundary and the limit to a
- * 4Kb-1 boundary before passing the values to DPMI as some extenders
- * will fail the calls unless this is the case. If we round the
- * physical address, then we also add an extra offset into the address
- * that we return.
- */
- physOfs = physAddr & 4095;
- physAddr = physAddr & ~4095;
- limit = ((limit+physOfs+1+4095) & ~4095)-1;
-
- r.x.ax = 0x800; /* DPMI map physical to linear */
- r.x.bx = physAddr >> 16;
- r.x.cx = physAddr & 0xFFFF;
- r.x.si = limit >> 16;
- r.x.di = limit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0xFFFFFFFFUL;
- return ((ulong)r.x.bx << 16) + r.x.cx + physOfs;
-}
-
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr)
-{
- PMREGS r;
-
- r.x.ax = 7; /* DPMI set selector base address */
- r.x.bx = sel;
- r.x.cx = linAddr >> 16;
- r.x.dx = linAddr & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-ulong PMAPI DPMI_getSelectorBase(ushort sel)
-{
- PMREGS r;
-
- r.x.ax = 6; /* DPMI get selector base address */
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
- return ((ulong)r.x.cx << 16) + r.x.dx;
-}
-
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit)
-{
- PMREGS r;
-
- r.x.ax = 8; /* DPMI set selector limit */
- r.x.bx = sel;
- r.x.cx = limit >> 16;
- r.x.dx = limit & 0xFFFF;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return 0;
- return 1;
-}
-
-uint PMAPI DPMI_createSelector(ulong base,ulong limit)
-{
- uint sel;
- PMREGS r;
-
- /* Allocate 1 descriptor */
- r.x.ax = 0;
- r.x.cx = 1;
- PM_int386(0x31, &r, &r);
- if (r.x.cflag) return 0;
- sel = r.x.ax;
-
- /* Set the descriptor access rights (for a 32 bit page granular
- * segment, ring 0).
- */
- r.x.ax = 9;
- r.x.bx = sel;
- r.x.cx = 0x4093;
- PM_int386(0x31, &r, &r);
-
- /* Map physical memory and create selector */
- if ((base = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFFUL)
- return 0;
- if (!DPMI_setSelectorBase(sel,base))
- return 0;
- if (!DPMI_setSelectorLimit(sel,limit))
- return 0;
- return sel;
-}
-
-void PMAPI DPMI_freeSelector(uint sel)
-{
- PMREGS r;
-
- r.x.ax = 1;
- r.x.bx = sel;
- PM_int386(0x31, &r, &r);
-}
-
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x600; /* DPMI Lock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len)
-{
- PMREGS r;
-
- r.x.ax = 0x601; /* DPMI Unlock Linear Region */
- r.x.bx = (linear >> 16); /* Linear address in BX:CX */
- r.x.cx = (linear & 0xFFFF);
- r.x.si = (len >> 16); /* Length in SI:DI */
- r.x.di = (len & 0xFFFF);
- PM_int386(0x31, &r, &r);
- return (!r.x.cflag);
-}
-
-void * PMAPI DPMI_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{
- PMSREGS sregs;
- ulong linAddr;
- ulong DSBaseAddr;
-
- /* Get the base address for the default DS selector */
- PM_segread(&sregs);
- DSBaseAddr = DPMI_getSelectorBase(sregs.ds);
- if ((base < 0x100000) && (DSBaseAddr == 0)) {
- /* DS is zero based, so we can directly access the first 1Mb of
- * system memory (like under DOS4GW).
- */
- return (void*)base;
- }
-
- /* Map the memory to a linear address using DPMI function 0x800 */
- if ((linAddr = DPMI_mapPhysicalToLinear(base,limit)) == 0) {
- if (base >= 0x100000)
- return NULL;
- /* If the linear address mapping fails but we are trying to
- * map an area in the first 1Mb of system memory, then we must
- * be running under a Windows or OS/2 DOS box. Under these
- * environments we can use the segment wrap around as a fallback
- * measure, as this does work properly.
- */
- linAddr = base;
- }
-
- /* Now expand the default DS selector to 4Gb so we can access it */
- if (!DPMI_setSelectorLimit(sregs.ds,0xFFFFFFFFUL))
- return NULL;
-
- /* Finally enable caching for the page tables that we just mapped in,
- * since DOS4GW and PMODE/W create the page table entries without
- * caching enabled which hurts the performance of the linear framebuffer
- * as it disables write combining on Pentium Pro and above processors.
- *
- * For those processors cache disabling is better handled through the
- * MTRR registers anyway (we can write combine a region but disable
- * caching) so that MMIO register regions do not screw up.
- */
- if (isCached) {
- if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable;
- if (!pPDB) {
- if (PDB >= 0x100000)
- pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF);
- else
- pPDB = (ulong*)PDB;
- }
- if (pPDB) {
- startPDB = (linAddr >> 22) & 0x3FF;
- startPage = (linAddr >> 12) & 0x3FF;
- endPDB = ((linAddr+limit) >> 22) & 0x3FF;
- endPage = ((linAddr+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFF;
- if (pageTable >= 0x100000)
- pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF);
- else
- pPageTable = (ulong*)pageTable;
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] &= ~0x18;
- }
- }
- }
- }
-
- /* Now return the base address of the memory into the default DS */
- return (void*)(linAddr - DSBaseAddr);
-}
-
-/* Some DOS extender implementations do not directly support calling a
- * real mode procedure from protected mode. However we can simulate what
- * we need temporarily hooking the INT 6Ah vector with a small real mode
- * stub that will call our real mode code for us.
- */
-
-static uchar int6AHandler[] = {
- 0x00,0x00,0x00,0x00, /* __PMODE_callReal variable */
- 0xFB, /* sti */
- 0x2E,0xFF,0x1E,0x00,0x00, /* call [cs:__PMODE_callReal] */
- 0xCF, /* iretf */
- };
-static uchar *crPtr = NULL; /* Pointer to of int 6A handler */
-static uint crRSeg,crROff; /* Real mode seg:offset of handler */
-
-void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in,
- RMSREGS *sregs)
-{
- uchar *p;
- uint oldSeg,oldOff;
-
- if (!crPtr) {
- /* Allocate and copy the memory block only once */
- crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff);
- memcpy(crPtr,int6AHandler,sizeof(int6AHandler));
- }
- PM_setWord(crPtr,off); /* Plug in address to call */
- PM_setWord(crPtr+2,seg);
- p = PM_mapRealPointer(0,0x6A * 4);
- oldOff = PM_getWord(p); /* Save old handler address */
- oldSeg = PM_getWord(p+2);
- PM_setWord(p,crROff+4); /* Hook 6A handler */
- PM_setWord(p+2,crRSeg);
- PM_int86x(0x6A, in, in, sregs); /* Call real mode code */
- PM_setWord(p,oldOff); /* Restore old handler */
- PM_setWord(p+2,oldSeg);
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{ return PM_mapPhysicalAddr(0x400,0xFFFF,true); }
-
-void * PMAPI PM_getA0000Pointer(void)
-{ return PM_mapPhysicalAddr(0xA0000,0xFFFF,true); }
-
-void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached)
-{ return DPMI_mapPhysicalAddr(base,limit,isCached); }
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* Mapping cannot be free */
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- (void)p;
- return 0xFFFFFFFFUL;
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{
- (void)limit;
- return (void*)base;
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{
- static uchar *zeroPtr = NULL;
-
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{
- PMREGS r;
- void *p;
-
- r.x.ax = 0x100; /* DPMI allocate DOS memory */
- r.x.bx = (size + 0xF) >> 4; /* number of paragraphs */
- PM_int386(0x31, &r, &r);
- if (r.x.cflag)
- return NULL; /* DPMI call failed */
- *r_seg = r.x.ax; /* Real mode segment */
- *r_off = 0;
- p = PM_mapRealPointer(*r_seg,*r_off);
- _PM_addRealModeBlock(p,r.x.dx);
- return p;
-}
-
-void PMAPI PM_freeRealSeg(void *mem)
-{
- PMREGS r;
-
- r.x.ax = 0x101; /* DPMI free DOS memory */
- r.x.dx = _PM_findRealModeBlock(mem);/* DX := selector from 0x100 */
- PM_int386(0x31, &r, &r);
-}
-
-static DPMI_handler_t DPMI_int10 = NULL;
-
-void PMAPI DPMI_setInt10Handler(DPMI_handler_t handler)
-{
- DPMI_int10 = handler;
-}
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- PMREGS r;
- PMSREGS sr;
-
- if (intno == 0x10 && DPMI_int10) {
- if (DPMI_int10(regs))
- return;
- }
- PM_segread(&sr);
- r.x.ax = 0x300; /* DPMI issue real interrupt */
- r.h.bl = intno;
- r.h.bh = 0;
- r.x.cx = 0;
- sr.es = sr.ds;
- r.e.edi = (uint)regs;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
-}
-
-#define IN(reg) rmregs.reg = in->e.reg
-#define OUT(reg) out->e.reg = rmregs.reg
-
-int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
-
-/* These real mode ints may cause crashes. */
-/*AM: DPMI_int86(intno,&rmregs); /###* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out,
- RMSREGS *sregs)
-{
- DPMI_regs rmregs;
-
- memset(&rmregs, 0, sizeof(rmregs));
- IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi);
- rmregs.es = sregs->es;
- rmregs.ds = sregs->ds;
-
-/*AM: DPMI_int86(intno,&rmregs); /###* DPMI issue real interrupt */
-
- OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi);
- sregs->es = rmregs.es;
- sregs->cs = rmregs.cs;
- sregs->ss = rmregs.ss;
- sregs->ds = rmregs.ds;
- out->x.cflag = rmregs.flags & 0x1;
- return out->x.ax;
-}
-
-#pragma pack(1)
-
-typedef struct {
- uint LargestBlockAvail;
- uint MaxUnlockedPage;
- uint LargestLockablePage;
- uint LinAddrSpace;
- uint NumFreePagesAvail;
- uint NumPhysicalPagesFree;
- uint TotalPhysicalPages;
- uint FreeLinAddrSpace;
- uint SizeOfPageFile;
- uint res[3];
- } MemInfo;
-
-#pragma pack()
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{
- PMREGS r;
- PMSREGS sr;
- MemInfo memInfo;
-
- PM_segread(&sr);
- r.x.ax = 0x500; /* DPMI get free memory info */
- sr.es = sr.ds;
- r.e.edi = (uint)&memInfo;
- PM_int386x(0x31, &r, &r, &sr); /* Issue the interrupt */
- *physical = memInfo.NumPhysicalPagesFree * 4096;
- *total = memInfo.LargestBlockAvail;
- if (*total < *physical)
- *physical = *total;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this! */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c b/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c
deleted file mode 100644
index 98e31bc..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c
+++ /dev/null
@@ -1,471 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <dos.h>
-#include "smx/ps2mouse.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-static int globalDataStart;
-
-PM_criticalHandler _VARAPI _PM_critHandler = NULL;
-PM_breakHandler _VARAPI _PM_breakHandler = NULL;
-PM_intHandler _VARAPI _PM_timerHandler = NULL;
-PM_intHandler _VARAPI _PM_rtcHandler = NULL;
-PM_intHandler _VARAPI _PM_keyHandler = NULL;
-PM_key15Handler _VARAPI _PM_key15Handler = NULL;
-PM_mouseHandler _VARAPI _PM_mouseHandler = NULL;
-PM_intHandler _VARAPI _PM_int10Handler = NULL;
-int _VARAPI _PM_mouseMask;
-
-uchar * _VARAPI _PM_ctrlCPtr; /* Location of Ctrl-C flag */
-uchar * _VARAPI _PM_ctrlBPtr; /* Location of Ctrl-Break flag */
-uchar * _VARAPI _PM_critPtr; /* Location of Critical error Bf*/
-PMFARPTR _VARAPI _PM_prevTimer = PMNULL; /* Previous timer handler */
-PMFARPTR _VARAPI _PM_prevRTC = PMNULL; /* Previous RTC handler */
-PMFARPTR _VARAPI _PM_prevKey = PMNULL; /* Previous key handler */
-PMFARPTR _VARAPI _PM_prevKey15 = PMNULL; /* Previous key15 handler */
-PMFARPTR _VARAPI _PM_prevBreak = PMNULL; /* Previous break handler */
-PMFARPTR _VARAPI _PM_prevCtrlC = PMNULL; /* Previous CtrlC handler */
-PMFARPTR _VARAPI _PM_prevCritical = PMNULL; /* Previous critical handler */
-long _VARAPI _PM_prevRealTimer; /* Previous real mode timer */
-long _VARAPI _PM_prevRealRTC; /* Previous real mode RTC */
-long _VARAPI _PM_prevRealKey; /* Previous real mode key */
-long _VARAPI _PM_prevRealKey15; /* Previous real mode key15 */
-long _VARAPI _PM_prevRealInt10; /* Previous real mode int 10h */
-static uchar _PM_oldCMOSRegA; /* CMOS register A contents */
-static uchar _PM_oldCMOSRegB; /* CMOS register B contents */
-static uchar _PM_oldRTCPIC2; /* Mask value for RTC IRQ8 */
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Globals for locking interrupt handlers in _pmsmx.asm */
-
-extern int _ASMAPI _PM_pmsmxDataStart;
-extern int _ASMAPI _PM_pmsmxDataEnd;
-void _ASMAPI _PM_pmsmxCodeStart(void);
-void _ASMAPI _PM_pmsmxCodeEnd(void);
-
-/* Protected mode interrupt handlers, also called by PM callbacks below */
-
-void _ASMAPI _PM_timerISR(void);
-void _ASMAPI _PM_rtcISR(void);
-void _ASMAPI _PM_keyISR(void);
-void _ASMAPI _PM_key15ISR(void);
-void _ASMAPI _PM_breakISR(void);
-void _ASMAPI _PM_ctrlCISR(void);
-void _ASMAPI _PM_criticalISR(void);
-void _ASMAPI _PM_mouseISR(void);
-void _ASMAPI _PM_int10PMCB(void);
-
-/* Protected mode DPMI callback handlers */
-
-void _ASMAPI _PM_mousePMCB(void);
-
-/* Routine to install a mouse handler function */
-
-void _ASMAPI _PM_setMouseHandler(int mask);
-
-/* Routine to allocate DPMI real mode callback routines */
-
-void _ASMAPI _DPMI_allocateCallback(void (_ASMAPI *pmcode)(),void *rmregs,long *RMCB);
-void _ASMAPI _DPMI_freeCallback(long RMCB);
-
-/* DPMI helper functions in PMLITE.C */
-
-ulong PMAPI DPMI_mapPhysicalToLinear(ulong physAddr,ulong limit);
-int PMAPI DPMI_setSelectorBase(ushort sel,ulong linAddr);
-ulong PMAPI DPMI_getSelectorBase(ushort sel);
-int PMAPI DPMI_setSelectorLimit(ushort sel,ulong limit);
-uint PMAPI DPMI_createSelector(ulong base,ulong limit);
-void PMAPI DPMI_freeSelector(uint sel);
-int PMAPI DPMI_lockLinearPages(ulong linear,ulong len);
-int PMAPI DPMI_unlockLinearPages(ulong linear,ulong len);
-
-/* Functions to read and write CMOS registers */
-
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-/*-------------------------------------------------------------------------*/
-/* Generic routines common to all environments */
-/*-------------------------------------------------------------------------*/
-
-void PMAPI PM_resetMouseDriver(int hardReset)
-{
- ps2MouseReset();
-}
-
-void PMAPI PM_setRealTimeClockFrequency(int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F);
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,(_PM_oldCMOSRegA & 0xF0) | (i+3));
- _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40);
- }
-}
-
-static void PMAPI lockPMHandlers(void)
-{
- static int locked = 0;
- int stat = 0;
- PM_lockHandle lh;
-
- /* Lock all of the code and data used by our protected mode interrupt
- * handling routines, so that it will continue to work correctly
- * under real mode.
- */
- if (!locked) {
- PM_saveDS();
- stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh);
- stat |= !PM_lockDataPages(&_PM_pmsmxDataStart,(int)&_PM_pmsmxDataEnd - (int)&_PM_pmsmxDataStart,&lh);
- stat |= !PM_lockCodePages((__codePtr)_PM_pmsmxCodeStart,(int)_PM_pmsmxCodeEnd-(int)_PM_pmsmxCodeStart,&lh);
- if (stat) {
- printf("Page locking services failed - interrupt handling not safe!\n");
- exit(1);
- }
- locked = 1;
- }
-}
-
-void PMAPI PM_getPMvect(int intno, PMFARPTR *isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x204;
- regs.h.bl = intno;
- PM_int386(0x31,®s,®s);
- isr->sel = regs.x.cx;
- isr->off = regs.e.edx;
-}
-
-void PMAPI PM_setPMvect(int intno, PM_intHandler isr)
-{
- PMSREGS sregs;
- PMREGS regs;
-
- PM_saveDS();
- regs.x.ax = 0x205; /* Set protected mode vector */
- regs.h.bl = intno;
- PM_segread(&sregs);
- regs.x.cx = sregs.cs;
- regs.e.edx = (uint)isr;
- PM_int386(0x31,®s,®s);
-}
-
-void PMAPI PM_restorePMvect(int intno, PMFARPTR isr)
-{
- PMREGS regs;
-
- regs.x.ax = 0x205;
- regs.h.bl = intno;
- regs.x.cx = isr.sel;
- regs.e.edx = isr.off;
- PM_int386(0x31,®s,®s);
-}
-
-static long prevRealBreak; /* Previous real mode break handler */
-static long prevRealCtrlC; /* Previous real mode CtrlC handler */
-static long prevRealCritical; /* Prev real mode critical handler */
-
-int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh)
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
-
- _PM_mouseHandler = mh;
- return 0;
-}
-
-void PMAPI PM_restoreMouseHandler(void)
-{
- if (_PM_mouseHandler)
- _PM_mouseHandler = NULL;
-}
-
-static void getISR(int intno, PMFARPTR *pmisr, long *realisr)
-{
- PM_getPMvect(intno,pmisr);
-}
-
-static void restoreISR(int intno, PMFARPTR pmisr, long realisr)
-{
- PM_restorePMvect(intno,pmisr);
-}
-
-static void setISR(int intno, void (* PMAPI pmisr)())
-{
- lockPMHandlers(); /* Ensure our handlers are locked */
- PM_setPMvect(intno,pmisr);
-}
-
-void PMAPI PM_setTimerHandler(PM_intHandler th)
-{
- getISR(PM_IRQ0, &_PM_prevTimer, &_PM_prevRealTimer);
- _PM_timerHandler = th;
- setISR(PM_IRQ0, _PM_timerISR);
-}
-
-void PMAPI PM_restoreTimerHandler(void)
-{
- if (_PM_timerHandler) {
- restoreISR(PM_IRQ0, _PM_prevTimer, _PM_prevRealTimer);
- _PM_timerHandler = NULL;
- }
-}
-
-ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency)
-{
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- getISR(0x70, &_PM_prevRTC, &_PM_prevRealRTC);
- _PM_rtcHandler = th;
- setISR(0x70, _PM_rtcISR);
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC2 */
- _PM_oldRTCPIC2 = PM_inpb(0xA1);
- PM_outpb(0xA1,_PM_oldRTCPIC2 & 0xFE);
- return true;
-}
-
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (_PM_rtcHandler) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
- PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE));
-
- /* Restore the interrupt vector */
- restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC);
- _PM_rtcHandler = NULL;
- }
-}
-
-void PMAPI PM_setKeyHandler(PM_intHandler kh)
-{
- getISR(PM_IRQ1, &_PM_prevKey, &_PM_prevRealKey);
- _PM_keyHandler = kh;
- setISR(PM_IRQ1, _PM_keyISR);
-}
-
-void PMAPI PM_restoreKeyHandler(void)
-{
- if (_PM_keyHandler) {
- restoreISR(PM_IRQ1, _PM_prevKey, _PM_prevRealKey);
- _PM_keyHandler = NULL;
- }
-}
-
-void PMAPI PM_setKey15Handler(PM_key15Handler kh)
-{
- getISR(0x15, &_PM_prevKey15, &_PM_prevRealKey15);
- _PM_key15Handler = kh;
- setISR(0x15, _PM_key15ISR);
-}
-
-void PMAPI PM_restoreKey15Handler(void)
-{
- if (_PM_key15Handler) {
- restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15);
- _PM_key15Handler = NULL;
- }
-}
-
-/* Real mode Ctrl-C and Ctrl-Break handler. This handler simply sets a
- * flag in the real mode code segment and exit. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-static uchar ctrlHandler[] = {
- 0x00,0x00,0x00,0x00, /* ctrlBFlag */
- 0x66,0x2E,0xC7,0x06,0x00,0x00,
- 0x01,0x00,0x00,0x00, /* mov [cs:ctrlBFlag],1 */
- 0xCF, /* iretf */
- };
-
-void PMAPI PM_installAltBreakHandler(PM_breakHandler bh)
-{
- uint rseg,roff;
-
- getISR(0x1B, &_PM_prevBreak, &prevRealBreak);
- getISR(0x23, &_PM_prevCtrlC, &prevRealCtrlC);
- _PM_breakHandler = bh;
- setISR(0x1B, _PM_breakISR);
- setISR(0x23, _PM_ctrlCISR);
-
- /* Hook the real mode vectors for these handlers, as these are not
- * normally reflected by the DPMI server up to protected mode
- */
- _PM_ctrlBPtr = PM_allocRealSeg(sizeof(ctrlHandler)*2, &rseg, &roff);
- memcpy(_PM_ctrlBPtr,ctrlHandler,sizeof(ctrlHandler));
- memcpy(_PM_ctrlBPtr+sizeof(ctrlHandler),ctrlHandler,sizeof(ctrlHandler));
- _PM_ctrlCPtr = _PM_ctrlBPtr + sizeof(ctrlHandler);
- _PM_setRMvect(0x1B,((long)rseg << 16) | (roff+4));
- _PM_setRMvect(0x23,((long)rseg << 16) | (roff+sizeof(ctrlHandler)+4));
-}
-
-void PMAPI PM_installBreakHandler(void)
-{
- PM_installAltBreakHandler(NULL);
-}
-
-void PMAPI PM_restoreBreakHandler(void)
-{
- if (_PM_prevBreak.sel) {
- restoreISR(0x1B, _PM_prevBreak, prevRealBreak);
- restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC);
- _PM_prevBreak.sel = 0;
- _PM_breakHandler = NULL;
- PM_freeRealSeg(_PM_ctrlBPtr);
- }
-}
-
-/* Real mode Critical Error handler. This handler simply saves the AX and
- * DI values in the real mode code segment and exits. We save the location
- * of this flag in real mode memory so that both the real mode and
- * protected mode code will be modifying the same flags.
- */
-
-static uchar criticalHandler[] = {
- 0x00,0x00, /* axCode */
- 0x00,0x00, /* diCode */
- 0x2E,0xA3,0x00,0x00, /* mov [cs:axCode],ax */
- 0x2E,0x89,0x3E,0x02,0x00, /* mov [cs:diCode],di */
- 0xB8,0x03,0x00, /* mov ax,3 */
- 0xCF, /* iretf */
- };
-
-void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch)
-{
- uint rseg,roff;
-
- getISR(0x24, &_PM_prevCritical, &prevRealCritical);
- _PM_critHandler = ch;
- setISR(0x24, _PM_criticalISR);
-
- /* Hook the real mode vector, as this is not normally reflected by the
- * DPMI server up to protected mode.
- */
- _PM_critPtr = PM_allocRealSeg(sizeof(criticalHandler)*2, &rseg, &roff);
- memcpy(_PM_critPtr,criticalHandler,sizeof(criticalHandler));
- _PM_setRMvect(0x24,((long)rseg << 16) | (roff+4));
-}
-
-void PMAPI PM_installCriticalHandler(void)
-{
- PM_installAltCriticalHandler(NULL);
-}
-
-void PMAPI PM_restoreCriticalHandler(void)
-{
- if (_PM_prevCritical.sel) {
- restoreISR(0x24, _PM_prevCritical, prevRealCritical);
- PM_freeRealSeg(_PM_critPtr);
- _PM_prevCritical.sel = 0;
- _PM_critHandler = NULL;
- }
-}
-
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_lockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p + DPMI_getSelectorBase(sregs.ds),len);
-}
-
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
-/*AM: causes minor glitch with */
-/*AM: older versions pmEasy which don't allow DPMI 06 on */
-/*AM: Code selector 0x0C -- assume base is 0 which it should be. */
- return DPMI_lockLinearPages((uint)p,len);
-}
-
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- PMSREGS sregs;
- PM_segread(&sregs);
- return DPMI_unlockLinearPages((uint)p,len);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/smx/vflat.c
deleted file mode 100644
index 579ef2c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c
deleted file mode 100644
index 7941192..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit SMX embedded systems development
-*
-* Description: OS specific implementation for the Zen Timer functions.
-* LZTimer not supported for smx (as needed for i486 processors), only
-* ULZTimer is supported at this time.
-*
-****************************************************************************/
-
-/*---------------------------- Global smx variables -----------------------*/
-
-extern ulong _cdecl etime; /* elapsed time */
-extern ulong _cdecl xticks_per_second(void);
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External assembler functions */
-
-void _ASMAPI LZ_disable(void);
-void _ASMAPI LZ_enable(void);
-
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-}
-
-ulong reterr(void)
-{
- PM_fatalError("Zen Timer not supported for smx.");
- return(0);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) PM_fatalError("Zen Timer not supported for smx.")
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerLap(tm) reterr()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) PM_fatalError("Zen Timer not supported for smx.")
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerCount(tm) reterr()
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as seconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION (ulong)(1000000/xticks_per_second())
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the smx timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- ulong ticks;
- LZ_disable(); /* Turn of interrupts */
- ticks = etime;
- LZ_enable(); /* Turn on interrupts again */
- return ticks;
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{
- if (finish < start)
- finish += xticks_per_second() * 3600 *24; /* Number of ticks in 24 hours */
- return finish - start;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c
deleted file mode 100644
index 0615e90..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c
+++ /dev/null
@@ -1,79 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- /* TODO: If you have thread priorities, increase it to maximum for the */
- /* thread for timing the CPU frequency. */
- return oldPriority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int priority)
-{
- /* TODO: Restore the original thread priority on exit. */
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- /* TODO: Return the frequency of the counter in here. You should try to */
- /* normalise this value to be around 100,000 ticks per second. */
- freq->low = 0;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-
-TODO: Implement this to read the counter. It should be done as a macro
- for accuracy.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- (t)->low = 0; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/event.c b/board/MAI/bios_emulator/scitech/src/pm/stub/event.c
deleted file mode 100644
index 204c492..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/event.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: **** implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under non-DOS systems */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- /* TODO: Implement this for your OS! */
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the application message queue into our event queue.
-****************************************************************************/
-static void _EVT_pumpMessages(void)
-{
- /* TODO: The purpose of this function is to read all keyboard and mouse */
- /* events from the OS specific event queue, translate them and post */
- /* them into the SciTech event queue. */
- /* */
- /* NOTE: There are a couple of important things that this function must */
- /* take care of: */
- /* */
- /* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */
- /* */
- /* 2. Support for reading hardware scan code as well as ASCII */
- /* translated values is required. Games use the scan codes rather */
- /* than ASCII values. Scan codes go into the high order byte of the */
- /* keyboard message field. */
- /* */
- /* 3. Support for at least reading mouse motion data (mickeys) from the */
- /* mouse is required. Using the mickey values, we can then translate */
- /* to mouse cursor coordinates scaled to the range of the current */
- /* graphics display mode. Mouse values are scaled based on the */
- /* global 'rangeX' and 'rangeY'. */
- /* */
- /* 4. Support for a timestamp for the events is required, which is */
- /* defined as the number of milliseconds since some event (usually */
- /* system startup). This is the timestamp when the event occurred */
- /* (ie: at interrupt time) not when it was stuff into the SciTech */
- /* event queue. */
- /* */
- /* 5. Support for mouse double click events. If the OS has a native */
- /* mechanism to determine this, it should be used. Otherwise the */
- /* time stamp information will be used by the generic event code */
- /* to generate double click events. */
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* TODO: Do any OS specific initialisation here */
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: Do any OS specific cleanup in here */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h
deleted file mode 100644
index 1395cbc..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-/* TODO: This is where you include OS specific headers for the event handling */
-/* library. You may leave this empty if you have no OS specific headers */
-/* to include. */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c b/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c
deleted file mode 100644
index 5f278c3..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c
+++ /dev/null
@@ -1,980 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-
-/* TODO: Include any OS specific headers here! */
-
-/*--------------------------- Global variables ----------------------------*/
-
-/* TODO: If you support access to the BIOS, the following VESABuf globals */
-/* keep track of a single VESA transfer buffer. If you don't support */
-/* access to the BIOS, remove these variables. */
-
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* TODO: Do any initialisation in here. This includes getting IOPL */
- /* access for the process calling PM_init. This will get called */
- /* more than once. */
-
- /* TODO: If you support the supplied MTRR register stuff (you need to */
- /* be at ring 0 for this!), you should initialise it in here. */
-
-/* MTRR_init(); */
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- /* TODO: Change this to return the define for your OS from drvlib/os.h */
- return _OS_MYOS;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier (always PM_386 for protected mode)
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '/') {
- s[pos] = '/';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- /* TODO: If you are running in a GUI environment without a console, */
- /* this needs to be changed to bring up a fatal error message */
- /* box and terminate the program. */
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- fprintf(stderr,"%s\n", msg);
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Exit handler to kill the VESA transfer buffer.
-****************************************************************************/
-static void ExitVBEBuf(void)
-{
- /* TODO: If you do not have BIOS access, remove this function. */
- if (VESABuf_ptr)
- PM_freeRealSeg(VESABuf_ptr);
- VESABuf_ptr = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* TODO: If you do not have BIOS access, simply delete the guts of */
- /* this function and return NULL. */
- if (!VESABuf_ptr) {
- /* Allocate a global buffer for communicating with the VESA VBE */
- if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL)
- return NULL;
- atexit(ExitVBEBuf);
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* TODO: This function checks if a key is available to be read. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* TODO: This returns the ASCII code of the key pressed. This */
- /* should be implemented, but is mostly used by the test programs */
- /* these days. */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Open a fullscreen console mode for output.
-****************************************************************************/
-int PMAPI PM_openConsole(void)
-{
- /* TODO: Opens up a fullscreen console for graphics output. If your */
- /* console does not have graphics/text modes, this can be left */
- /* empty. The main purpose of this is to disable console switching */
- /* when in graphics modes if you can switch away from fullscreen */
- /* consoles (if you want to allow switching, this can be done */
- /* elsewhere with a full save/restore state of the graphics mode). */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the size of the state buffer used to save the console state.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* TODO: Returns the size of the console state buffer used to save the */
- /* state of the console before going into graphics mode. This is */
- /* used to restore the console back to normal when we are done. */
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console into the state buffer.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- int console_id)
-{
- /* TODO: Saves the state of the console into the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the state of the console from the state buffer.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- int console_id)
-{
- /* TODO: Restore the state of the console from the state buffer. This is */
- /* used to restore the console back to normal when we are done. */
- /* We will always restore 80x25 text mode after being in graphics */
- /* mode, so if restoring text mode is all you need to do this can */
- /* be left empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Close the console and return to non-fullscreen console mode.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- int console_id)
-{
- /* TODO: Close the console when we are done, going back to text mode. */
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* TODO: Set the OS console cursor location to the new value. This is */
- /* generally used for new OS ports (used mostly for DOS). */
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* TODO: Set the OS console screen width. This is generally unused for */
- /* new OS ports. */
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* TODO: Install a real time clock interrupt handler. Normally this */
- /* will not be supported from most OS'es in user land, so an */
- /* alternative mechanism is needed to enable software stereo. */
- /* Hence leave this unimplemented unless you have a high priority */
- /* mechanism to call the 32-bit callback when the real time clock */
- /* interrupt fires. */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* TODO: Set the real time clock interrupt frequency. Used for stereo */
- /* LC shutter glasses when doing software stereo. Usually sets */
- /* the frequency to around 2048 Hz. */
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* TODO: Restores the real time clock handler. */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- /* TODO: Return the boot drive letter for the OS. Normally this is 'c' */
- /* for DOS based OS'es and '/' for Unices. */
- return '/';
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files (legacy and not used).
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return PM_getNucleusConfigPath();
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- /* TODO: Change this to the default path to Nucleus driver files. The */
- /* following is the default for Unices. */
- char *env = getenv("NUCLEUS_PATH");
- return env ? env : "/usr/lib/nucleus";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- /* TODO: Return a unique ID for the machine. If a unique ID is not */
- /* available, return the machine name. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- /* TODO: Return the network machine name for the machine. */
- static char buf[128];
- gethostname(buf, 128);
- return buf;
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- /* TODO: This returns a pointer to the real mode BIOS data area. If you */
- /* do not support BIOS access, you can simply return NULL here. */
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true);
- return (void*)(zeroPtr + 0x400);
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- static void *bankPtr;
- if (!bankPtr)
- bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true);
- return bankPtr;
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- /* TODO: This function maps a physical memory address to a linear */
- /* address in the address space of the calling process. */
-
- /* NOTE: This function *must* be able to handle any phsyical base */
- /* address, and hence you will have to handle rounding of */
- /* the physical base address to a page boundary (ie: 4Kb on */
- /* x86 CPU's) to be able to properly map in the memory */
- /* region. */
-
- /* NOTE: If possible the isCached bit should be used to ensure that */
- /* the PCD (Page Cache Disable) and PWT (Page Write Through) */
- /* bits are set to disable caching for a memory mapping used */
- /* for MMIO register access. We also disable caching using */
- /* the MTRR registers for Pentium Pro and later chipsets so if */
- /* MTRR support is enabled for your OS then you can safely ignore */
- /* the isCached flag and always enable caching in the page */
- /* tables. */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* TODO: This function will free a physical memory mapping previously */
- /* allocated with PM_mapPhysicalAddr() if at all possible. If */
- /* you can't free physical memory mappings, simply do nothing. */
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* TODO: Put the process to sleep for milliseconds */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of (unnamed) shared memory.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- /* TODO: This is used to allocate memory that is shared between process */
- /* that all access the common Nucleus drivers via a common display */
- /* driver DLL. If your OS does not support shared memory (or if */
- /* the display driver does not need to allocate shared memory */
- /* for each process address space), this should just call PM_malloc. */
- return PM_malloc(size);
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- /* TODO: Free the shared memory block. This will be called in the context */
- /* of the original calling process that allocated the shared */
- /* memory with PM_mallocShared. Simply call PM_free if you do not */
- /* need this. */
- PM_free(ptr);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- /* TODO: This function is used to map a physical memory mapping */
- /* previously allocated with PM_mapPhysicalAddr into the */
- /* address space of the calling process. If the memory mapping */
- /* allocated by PM_mapPhysicalAddr is global to all processes, */
- /* simply return the pointer. */
-
- /* NOTE: This function must also handle rounding to page boundaries, */
- /* since this function is used to map in shared memory buffers */
- /* allocated with PM_mapPhysicalAddr(). Hence if you aligned */
- /* the physical address above, then you also need to do it here. */
- return base;
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- /* TODO: This function maps a real mode memory pointer into the */
- /* calling processes address space as a 32-bit near pointer. If */
- /* you do not support BIOS access, simply return NULL here. */
- if (!zeroPtr)
- zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF);
- return (void*)(zeroPtr + MK_PHYS(r_seg,r_off));
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* TODO: This function allocates a block of real mode memory for the */
- /* calling process used to communicate with real mode BIOS */
- /* functions. If you do not support BIOS access, simply return */
- /* NULL here. */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* TODO: Frees a previously allocated real mode memory block. If you */
- /* do not support BIOS access, this function should be empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* TODO: This function calls the real mode BIOS using the passed in */
- /* register structure. If you do not support real mode BIOS */
- /* access, this function should be empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- /* TODO: This function calls the real mode BIOS using the passed in */
- /* register structure. If you do not support real mode BIOS */
- /* access, this function should return 0. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- /* TODO: This function calls the real mode BIOS using the passed in */
- /* register structure. If you do not support real mode BIOS */
- /* access, this function should return 0. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- /* TODO: This function calls a real mode far function with a far call. */
- /* If you do not support BIOS access, this function should be */
- /* empty. */
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* TODO: Report the amount of available memory, both the amount of */
- /* physical memory left and the amount of virtual memory left. */
- /* If the OS does not provide these services, report 0's. */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- /* TODO: Allocate a block of locked, physical memory of the specified */
- /* size. This is used for bus master operations. If this is not */
- /* supported by the OS, return NULL and bus mastering will not */
- /* be used. */
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- /* TODO: Free a memory block allocated with PM_allocLockedMem. */
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- RMREGS regs;
-
- /* TODO: This does a bank switch function by calling the real mode */
- /* VESA BIOS. If you do not support BIOS access, this function should */
- /* be empty. */
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- RMREGS regs;
-
- /* TODO: This does a bank switch function by calling the real mode */
- /* VESA BIOS. If you do not support BIOS access, this function should */
- /* be empty. */
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0001;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- RMREGS regs;
-
- /* TODO: This changes the display start address by calling the real mode */
- /* VESA BIOS. If you do not support BIOS access, this function */
- /* should be empty. */
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT;
- regs.x.cx = x;
- regs.x.dx = y;
- PM_int86(0x10,®s,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Enable write combining for the memory region.
-****************************************************************************/
-ibool PMAPI PM_enableWriteCombine(
- ulong base,
- ulong length,
- uint type)
-{
- /* TODO: This function should enable Pentium Pro and Pentium II MTRR */
- /* write combining for the passed in physical memory base address */
- /* and length. Normally this is done via calls to an OS specific */
- /* device driver as this can only be done at ring 0. */
- /* */
- /* NOTE: This is a *very* important function to implement! If you do */
- /* not implement, graphics performance on the latest Intel chips */
- /* will be severly impaired. For sample code that can be used */
- /* directly in a ring 0 device driver, see the MSDOS implementation */
- /* which includes assembler code to do this directly (if the */
- /* program is running at ring 0). */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS)
-{
- /* TODO: This function is used to run the BIOS POST code on a secondary */
- /* controller to initialise it for use. This is not necessary */
- /* for multi-controller operation, but it will make it a lot */
- /* more convenicent for end users (otherwise they have to boot */
- /* the system once with the secondary controller as primary, and */
- /* then boot with both controllers installed). */
- /* */
- /* Even if you don't support full BIOS access, it would be */
- /* adviseable to be able to POST the secondary controllers in the */
- /* system using this function as a minimum requirement. Some */
- /* graphics hardware has registers that contain values that only */
- /* the BIOS knows about, which makes bring up a card from cold */
- /* reset difficult if the BIOS has not POST'ed it. */
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Load an OS specific shared library or DLL. If the OS does not support
-shared libraries, simply return NULL.
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- /* TODO: This function should load a native shared library from disk */
- /* given the path to the library. */
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Get the address of a named procedure from a shared library.
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- /* TODO: This function should return the address of a named procedure */
- /* from a native shared library. */
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Unload a shared library.
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- /* TODO: This function free a previously loaded native shared library. */
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Enable requested I/O privledge level (usually only to set to a value of
-3, and then restore it back again). If the OS is protected this function
-must be implemented in order to enable I/O port access for ring 3
-applications. The function should return the IOPL level active before
-the switch occurred so it can be properly restored.
-****************************************************************************/
-int PMAPI PM_setIOPL(
- int level)
-{
- /* TODO: This function should enable IOPL for the task (if IOPL is */
- /* not always enabled for the app through some other means). */
- return level;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- if (drive == 3)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- (void)drive;
- getcwd(dir,len);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Set the file attributes for a file */
- (void)filename;
- (void)attrib;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return mkdir(filename) == 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return rmdir(filename) == 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/stub/vflat.c
deleted file mode 100644
index 579ef2c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/vflat.c
+++ /dev/null
@@ -1,49 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- baseAddr = baseAddr;
- bankSize = bankSize;
- codeLen = codeLen;
- bankFunc = bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c
deleted file mode 100644
index 820e292..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c
+++ /dev/null
@@ -1,111 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: *** TODO: ADD YOUR OS ENVIRONMENT NAME HERE ***
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
- /* TODO: Do any specific internal initialisation in here */
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- /* TODO: Start the Zen Timer counting. This should be a macro if */
- /* possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- /* TODO: Compute the lap time between the current time and when the */
- /* timer was started. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- /* TODO: Stop the timer counting. Should be a macro if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- /* TODO: Compute the elapsed time and return it. Always microseconds. */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- /* TODO: Read the long period timer from the OS. The resolution of this */
- /* timer should be around 1/20 of a second for timing long */
- /* periods if possible. */
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c b/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c
deleted file mode 100644
index ba90262..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* control C/break interrupt handler. Note that this
-* alternate version does not work with all extenders.
-*
-* Functions tested: PM_installAltBreakHandler()
-* PM_restoreBreakHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile int breakHit = false;
-volatile int ctrlCHit = false;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI breakHandler(uint bHit)
-{
- if (bHit)
- breakHit = true;
- else
- ctrlCHit = true;
-}
-
-int main(void)
-{
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installAltBreakHandler(breakHandler);
- printf("Control C/Break interrupt handler installed\n");
- while (1) {
- if (ctrlCHit) {
- printf("Code termimated with Ctrl-C.\n");
- break;
- }
- if (breakHit) {
- printf("Code termimated with Ctrl-Break.\n");
- break;
- }
- if (PM_kbhit() && PM_getch() == 0x1B) {
- printf("No break code detected!\n");
- break;
- }
- printf("Hit Ctrl-C or Ctrl-Break to exit!\n");
- }
-
- PM_restoreBreakHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c b/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c
deleted file mode 100644
index e137307..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c
+++ /dev/null
@@ -1,85 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* critical error handler.
-*
-* Functions tested: PM_installCriticalHandler()
-* PM_criticalError()
-* PM_restoreCriticalHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile uint criticalError = false;
-volatile uint axValue;
-volatile uint diValue;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-uint PMAPI criticalHandler(uint axVal,uint diVal)
-{
- criticalError = true;
- axValue = axVal;
- diValue = diVal;
- return 3; /* Tell MS-DOS to fail the operation */
-}
-
-int main(void)
-{
- FILE *f;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installAltCriticalHandler(criticalHandler);
- printf("Critical Error handler installed - trying to read from A: drive...\n");
- f = fopen("a:\bog.bog","rb");
- if (f) fclose(f);
- if (criticalError) {
- printf("Critical error occured on INT 21h function %02X!\n",
- axValue >> 8);
- }
- else
- printf("Critical error was not caught!\n");
- PM_restoreCriticalHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c b/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c
deleted file mode 100644
index 5fa3382..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to manipulate the
-* BIOS data area from protected mode using the PM
-* library. Compile and link with the appropriate command
-* line for your DOS extender.
-*
-* Functions tested: PM_getBIOSSelector()
-* PM_getLong()
-* PM_getByte()
-* PM_getWord()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-/* Macros to obtain values from the BIOS data area */
-
-#define TICKS() PM_getLong(bios+0x6C)
-#define KB_STAT PM_getByte(bios+0x17)
-#define KB_HEAD PM_getWord(bios+0x1A)
-#define KB_TAIL PM_getWord(bios+0x1C)
-
-/* Macros for working with the keyboard buffer */
-
-#define KB_HIT() (KB_HEAD != KB_TAIL)
-#define CTRL() (KB_STAT & 4)
-#define SHIFT() (KB_STAT & 2)
-#define ESC 0x1B
-
-/* Selector for BIOS data area */
-
-uchar *bios;
-
-int main(void)
-{
- int c,done = 0;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- bios = PM_getBIOSPointer();
- printf("Hit any key to test, Ctrl-Shift-Esc to quit\n");
- while (!done) {
- if (KB_HIT()) {
- c = PM_getch();
- if (c == 0) PM_getch();
- printf("TIME=%-8lX ST=%02X CHAR=%02X ", TICKS(), KB_STAT, c);
- printf("\n");
- if ((c == ESC) && SHIFT() && CTRL())/* Ctrl-Shift-Esc */
- break;
- }
- }
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/block.c b/board/MAI/bios_emulator/scitech/src/pm/tests/block.c
deleted file mode 100644
index 15d503c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/block.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program for the PM_blockUntilTimeout function.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include "pmapi.h"
-
-#define DELAY_MSECS 1100
-#define LOOPS 5
-
-/*-------------------------- Implementation -------------------------------*/
-
-/* The following routine takes a long count in microseconds and outputs
- * a string representing the count in seconds. It could be modified to
- * return a pointer to a static string representing the count rather
- * than printing it out.
- */
-
-void ReportTime(ulong count)
-{
- ulong secs;
-
- secs = count / 1000000L;
- count = count - secs * 1000000L;
- printf("Time taken: %lu.%06lu seconds\n",secs,count);
-}
-
-int main(void)
-{
- int i;
-
- printf("Detecting processor information ...");
- fflush(stdout);
- printf("\n\n%s\n", CPU_getProcessorName());
- ZTimerInit();
- LZTimerOn();
- for (i = 0; i < LOOPS; i++) {
- PM_blockUntilTimeout(DELAY_MSECS);
- ReportTime(LZTimerLap());
- }
- LZTimerOff();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c b/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c
deleted file mode 100644
index 10b6446..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* control C/break interrupt handler.
-*
-* Functions tested: PM_installBreakHandler()
-* PM_ctrlCHit()
-* PM_ctrlBreakHit()
-* PM_restoreBreakHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-int main(void)
-{
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installBreakHandler();
- printf("Control C/Break interrupt handler installed\n");
- while (1) {
- if (PM_ctrlCHit(1)) {
- printf("Code termimated with Ctrl-C.\n");
- break;
- }
- if (PM_ctrlBreakHit(1)) {
- printf("Code termimated with Ctrl-Break.\n");
- break;
- }
- if (PM_kbhit() && PM_getch() == 0x1B) {
- printf("No break code detected!\n");
- break;
- }
- printf("Hit Ctrl-C or Ctrl-Break to exit!\n");
- }
-
- PM_restoreBreakHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c b/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c
deleted file mode 100644
index 4d37cab..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to call a real mode
-* procedure. We simply copy a terribly simple assembly
-* language routine into a real mode block that we allocate,
-* and then attempt to call the routine and verify that it
-* was successful.
-*
-* Functions tested: PM_allocRealSeg()
-* PM_freeRealSeg()
-* PM_callRealMode()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include "pmapi.h"
-
-/* Block of real mode code we will eventually call */
-
-static unsigned char realModeCode[] = {
- 0x93, /* xchg ax,bx */
- 0x87, 0xCA, /* xchg cx,dx */
- 0xCB /* retf */
- };
-
-int main(void)
-{
- RMREGS regs;
- RMSREGS sregs;
- uchar *p;
- unsigned r_seg,r_off;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Allocate a the block of real mode memory */
- if ((p = PM_allocRealSeg(sizeof(realModeCode), &r_seg, &r_off)) == NULL) {
- printf("Unable to allocate real mode memory!\n");
- exit(1);
- }
-
- /* Copy the real mode code */
- memcpy(p,realModeCode,sizeof(realModeCode));
-
- /* Now call the real mode code */
- regs.x.ax = 1;
- regs.x.bx = 2;
- regs.x.cx = 3;
- regs.x.dx = 4;
- regs.x.si = 5;
- regs.x.di = 6;
- sregs.es = 7;
- sregs.ds = 8;
- PM_callRealMode(r_seg,r_off,®s,&sregs);
- if (regs.x.ax != 2 || regs.x.bx != 1 || regs.x.cx != 4 || regs.x.dx != 3
- || regs.x.si != 5 || regs.x.di != 6 || sregs.es != 7
- || sregs.ds != 8) {
- printf("Real mode call failed!\n");
- printf("\n");
- printf("ax = %04X, bx = %04X, cx = %04X, dx = %04X\n",
- regs.x.ax,regs.x.bx,regs.x.cx,regs.x.dx);
- printf("si = %04X, di = %04X, es = %04X, ds = %04X\n",
- regs.x.si,regs.x.di,sregs.es,sregs.ds);
- }
- else
- printf("Real mode call succeeded!\n");
-
- /* Free the memory we allocated */
- PM_freeRealSeg(p);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c b/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c
deleted file mode 100644
index 5933ac9..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c
+++ /dev/null
@@ -1,100 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Main module for building checked builds of products with
-* assertions and trace code.
-*
-****************************************************************************/
-
-#include "scitech.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#ifdef __WINDOWS__
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#endif
-
-#ifdef CHECKED
-
-/*---------------------------- Global variables ---------------------------*/
-
-#define LOGFILE "\\scitech.log"
-
-void (*_CHK_fail)(int fatal,const char *msg,const char *cond,const char *file,int line) = _CHK_defaultFail;
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Handles fatal error and warning conditions for checked builds.
-
-HEADER:
-scitech.h
-
-REMARKS:
-This function is called whenever an inline check or warning fails in any
-of the SciTech runtime libraries. Warning conditions simply cause the
-condition to be logged to the log file and send to the system debugger
-under Window. Fatal error conditions do all of the above, and then
-terminate the program with a fatal error conditions.
-
-This handler may be overriden by the user code if necessary to replace it
-with a different handler (the MGL for instance overrides this and replaces
-it with a handler that does an MGL_exit() before terminating the application
-so that it will clean up correctly.
-****************************************************************************/
-void _CHK_defaultFail(
- int fatal,
- const char *msg,
- const char *cond,
- const char *file,
- int line)
-{
- char buf[256];
- FILE *log = fopen(LOGFILE, "at+");
-
- sprintf(buf,msg,cond,file,line);
- if (log) {
- fputs(buf,log);
- fflush(log);
- fclose(log);
-#ifdef __WINDOWS__
- OutputDebugStr(buf);
-#endif
- }
- if (fatal) {
-#ifdef __WINDOWS__
- MessageBox(NULL, buf,"Fatal Error!",MB_ICONEXCLAMATION);
-#else
- fputs(buf,stderr);
-#endif
- exit(-1);
- }
-}
-
-#endif /* CHECKED */
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c b/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c
deleted file mode 100644
index 30e5dd3..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c
+++ /dev/null
@@ -1,46 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program for the CPU detection code.
-*
-****************************************************************************/
-
-#include "ztimer.h"
-#include "pmapi.h"
-#include <stdio.h>
-#include <stdlib.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-int main(void)
-{
- printf("Detecting processor information ...");
- fflush(stdout);
- printf("\n\n%s\n", CPU_getProcessorName());
- if (CPU_haveRDTSC())
- printf("\nProcessor supports Read Time Stamp Counter performance timer.\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c b/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c
deleted file mode 100644
index 60f1251..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* critical error handler.
-*
-* Functions tested: PM_installAltCriticalHandler()
-* PM_restoreCriticalHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-int main(void)
-{
- FILE *f;
- int axcode,dicode;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- PM_installCriticalHandler();
- printf("Critical Error handler installed - trying to read from A: drive...\n");
- f = fopen("a:\bog.bog","rb");
- if (f) fclose(f);
- if (PM_criticalError(&axcode,&dicode,1)) {
- printf("Critical error occured on INT 21h function %02X!\n",
- axcode >> 8);
- }
- else printf("Critical error was not caught!\n");
- PM_restoreCriticalHandler();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c b/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c
deleted file mode 100644
index 06c2180..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c
+++ /dev/null
@@ -1,501 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program to test out the cross platform event handling
-* library.
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <ctype.h>
-#include "pmapi.h"
-#include "event.h"
-
-/* Translation table for key codes */
-
-typedef struct {
- int code;
- char *name;
- } KeyEntry;
-
-KeyEntry ASCIICodes[] = {
- {ASCII_ctrlA ,"ASCII_ctrlA"},
- {ASCII_ctrlB ,"ASCII_ctrlB"},
- {ASCII_ctrlC ,"ASCII_ctrlC"},
- {ASCII_ctrlD ,"ASCII_ctrlD"},
- {ASCII_ctrlE ,"ASCII_ctrlE"},
- {ASCII_ctrlF ,"ASCII_ctrlF"},
- {ASCII_ctrlG ,"ASCII_ctrlG"},
- {ASCII_backspace ,"ASCII_backspace"},
- {ASCII_ctrlH ,"ASCII_ctrlH"},
- {ASCII_tab ,"ASCII_tab"},
- {ASCII_ctrlI ,"ASCII_ctrlI"},
- {ASCII_ctrlJ ,"ASCII_ctrlJ"},
- {ASCII_ctrlK ,"ASCII_ctrlK"},
- {ASCII_ctrlL ,"ASCII_ctrlL"},
- {ASCII_enter ,"ASCII_enter"},
- {ASCII_ctrlM ,"ASCII_ctrlM"},
- {ASCII_ctrlN ,"ASCII_ctrlN"},
- {ASCII_ctrlO ,"ASCII_ctrlO"},
- {ASCII_ctrlP ,"ASCII_ctrlP"},
- {ASCII_ctrlQ ,"ASCII_ctrlQ"},
- {ASCII_ctrlR ,"ASCII_ctrlR"},
- {ASCII_ctrlS ,"ASCII_ctrlS"},
- {ASCII_ctrlT ,"ASCII_ctrlT"},
- {ASCII_ctrlU ,"ASCII_ctrlU"},
- {ASCII_ctrlV ,"ASCII_ctrlV"},
- {ASCII_ctrlW ,"ASCII_ctrlW"},
- {ASCII_ctrlX ,"ASCII_ctrlX"},
- {ASCII_ctrlY ,"ASCII_ctrlY"},
- {ASCII_ctrlZ ,"ASCII_ctrlZ"},
- {ASCII_esc ,"ASCII_esc"},
- {ASCII_space ,"ASCII_space"},
- {ASCII_exclamation ,"ASCII_exclamation"},
- {ASCII_quote ,"ASCII_quote"},
- {ASCII_pound ,"ASCII_pound"},
- {ASCII_dollar ,"ASCII_dollar"},
- {ASCII_percent ,"ASCII_percent"},
- {ASCII_ampersand ,"ASCII_ampersand"},
- {ASCII_apostrophe ,"ASCII_apostrophe"},
- {ASCII_leftBrace ,"ASCII_leftBrace"},
- {ASCII_rightBrace ,"ASCII_rightBrace"},
- {ASCII_times ,"ASCII_times"},
- {ASCII_plus ,"ASCII_plus"},
- {ASCII_comma ,"ASCII_comma"},
- {ASCII_minus ,"ASCII_minus"},
- {ASCII_period ,"ASCII_period"},
- {ASCII_divide ,"ASCII_divide"},
- {ASCII_0 ,"ASCII_0"},
- {ASCII_1 ,"ASCII_1"},
- {ASCII_2 ,"ASCII_2"},
- {ASCII_3 ,"ASCII_3"},
- {ASCII_4 ,"ASCII_4"},
- {ASCII_5 ,"ASCII_5"},
- {ASCII_6 ,"ASCII_6"},
- {ASCII_7 ,"ASCII_7"},
- {ASCII_8 ,"ASCII_8"},
- {ASCII_9 ,"ASCII_9"},
- {ASCII_colon ,"ASCII_colon"},
- {ASCII_semicolon ,"ASCII_semicolon"},
- {ASCII_lessThan ,"ASCII_lessThan"},
- {ASCII_equals ,"ASCII_equals"},
- {ASCII_greaterThan ,"ASCII_greaterThan"},
- {ASCII_question ,"ASCII_question"},
- {ASCII_at ,"ASCII_at"},
- {ASCII_A ,"ASCII_A"},
- {ASCII_B ,"ASCII_B"},
- {ASCII_C ,"ASCII_C"},
- {ASCII_D ,"ASCII_D"},
- {ASCII_E ,"ASCII_E"},
- {ASCII_F ,"ASCII_F"},
- {ASCII_G ,"ASCII_G"},
- {ASCII_H ,"ASCII_H"},
- {ASCII_I ,"ASCII_I"},
- {ASCII_J ,"ASCII_J"},
- {ASCII_K ,"ASCII_K"},
- {ASCII_L ,"ASCII_L"},
- {ASCII_M ,"ASCII_M"},
- {ASCII_N ,"ASCII_N"},
- {ASCII_O ,"ASCII_O"},
- {ASCII_P ,"ASCII_P"},
- {ASCII_Q ,"ASCII_Q"},
- {ASCII_R ,"ASCII_R"},
- {ASCII_S ,"ASCII_S"},
- {ASCII_T ,"ASCII_T"},
- {ASCII_U ,"ASCII_U"},
- {ASCII_V ,"ASCII_V"},
- {ASCII_W ,"ASCII_W"},
- {ASCII_X ,"ASCII_X"},
- {ASCII_Y ,"ASCII_Y"},
- {ASCII_Z ,"ASCII_Z"},
- {ASCII_leftSquareBrace ,"ASCII_leftSquareBrace"},
- {ASCII_backSlash ,"ASCII_backSlash"},
- {ASCII_rightSquareBrace ,"ASCII_rightSquareBrace"},
- {ASCII_caret ,"ASCII_caret"},
- {ASCII_underscore ,"ASCII_underscore"},
- {ASCII_leftApostrophe ,"ASCII_leftApostrophe"},
- {ASCII_a ,"ASCII_a"},
- {ASCII_b ,"ASCII_b"},
- {ASCII_c ,"ASCII_c"},
- {ASCII_d ,"ASCII_d"},
- {ASCII_e ,"ASCII_e"},
- {ASCII_f ,"ASCII_f"},
- {ASCII_g ,"ASCII_g"},
- {ASCII_h ,"ASCII_h"},
- {ASCII_i ,"ASCII_i"},
- {ASCII_j ,"ASCII_j"},
- {ASCII_k ,"ASCII_k"},
- {ASCII_l ,"ASCII_l"},
- {ASCII_m ,"ASCII_m"},
- {ASCII_n ,"ASCII_n"},
- {ASCII_o ,"ASCII_o"},
- {ASCII_p ,"ASCII_p"},
- {ASCII_q ,"ASCII_q"},
- {ASCII_r ,"ASCII_r"},
- {ASCII_s ,"ASCII_s"},
- {ASCII_t ,"ASCII_t"},
- {ASCII_u ,"ASCII_u"},
- {ASCII_v ,"ASCII_v"},
- {ASCII_w ,"ASCII_w"},
- {ASCII_x ,"ASCII_x"},
- {ASCII_y ,"ASCII_y"},
- {ASCII_z ,"ASCII_z"},
- {ASCII_leftCurlyBrace ,"ASCII_leftCurlyBrace"},
- {ASCII_verticalBar ,"ASCII_verticalBar"},
- {ASCII_rightCurlyBrace ,"ASCII_rightCurlyBrace"},
- {ASCII_tilde ,"ASCII_tilde"},
- {0 ,"ASCII_unknown"},
- };
-
-KeyEntry ScanCodes[] = {
- {KB_padEnter ,"KB_padEnter"},
- {KB_padMinus ,"KB_padMinus"},
- {KB_padPlus ,"KB_padPlus"},
- {KB_padTimes ,"KB_padTimes"},
- {KB_padDivide ,"KB_padDivide"},
- {KB_padLeft ,"KB_padLeft"},
- {KB_padRight ,"KB_padRight"},
- {KB_padUp ,"KB_padUp"},
- {KB_padDown ,"KB_padDown"},
- {KB_padInsert ,"KB_padInsert"},
- {KB_padDelete ,"KB_padDelete"},
- {KB_padHome ,"KB_padHome"},
- {KB_padEnd ,"KB_padEnd"},
- {KB_padPageUp ,"KB_padPageUp"},
- {KB_padPageDown ,"KB_padPageDown"},
- {KB_padCenter ,"KB_padCenter"},
- {KB_F1 ,"KB_F1"},
- {KB_F2 ,"KB_F2"},
- {KB_F3 ,"KB_F3"},
- {KB_F4 ,"KB_F4"},
- {KB_F5 ,"KB_F5"},
- {KB_F6 ,"KB_F6"},
- {KB_F7 ,"KB_F7"},
- {KB_F8 ,"KB_F8"},
- {KB_F9 ,"KB_F9"},
- {KB_F10 ,"KB_F10"},
- {KB_F11 ,"KB_F11"},
- {KB_F12 ,"KB_F12"},
- {KB_left ,"KB_left"},
- {KB_right ,"KB_right"},
- {KB_up ,"KB_up"},
- {KB_down ,"KB_down"},
- {KB_insert ,"KB_insert"},
- {KB_delete ,"KB_delete"},
- {KB_home ,"KB_home"},
- {KB_end ,"KB_end"},
- {KB_pageUp ,"KB_pageUp"},
- {KB_pageDown ,"KB_pageDown"},
- {KB_capsLock ,"KB_capsLock"},
- {KB_numLock ,"KB_numLock"},
- {KB_scrollLock ,"KB_scrollLock"},
- {KB_leftShift ,"KB_leftShift"},
- {KB_rightShift ,"KB_rightShift"},
- {KB_leftCtrl ,"KB_leftCtrl"},
- {KB_rightCtrl ,"KB_rightCtrl"},
- {KB_leftAlt ,"KB_leftAlt"},
- {KB_rightAlt ,"KB_rightAlt"},
- {KB_leftWindows ,"KB_leftWindows"},
- {KB_rightWindows ,"KB_rightWindows"},
- {KB_menu ,"KB_menu"},
- {KB_sysReq ,"KB_sysReq"},
- {KB_esc ,"KB_esc"},
- {KB_1 ,"KB_1"},
- {KB_2 ,"KB_2"},
- {KB_3 ,"KB_3"},
- {KB_4 ,"KB_4"},
- {KB_5 ,"KB_5"},
- {KB_6 ,"KB_6"},
- {KB_7 ,"KB_7"},
- {KB_8 ,"KB_8"},
- {KB_9 ,"KB_9"},
- {KB_0 ,"KB_0"},
- {KB_minus ,"KB_minus"},
- {KB_equals ,"KB_equals"},
- {KB_backSlash ,"KB_backSlash"},
- {KB_backspace ,"KB_backspace"},
- {KB_tab ,"KB_tab"},
- {KB_Q ,"KB_Q"},
- {KB_W ,"KB_W"},
- {KB_E ,"KB_E"},
- {KB_R ,"KB_R"},
- {KB_T ,"KB_T"},
- {KB_Y ,"KB_Y"},
- {KB_U ,"KB_U"},
- {KB_I ,"KB_I"},
- {KB_O ,"KB_O"},
- {KB_P ,"KB_P"},
- {KB_leftSquareBrace ,"KB_leftSquareBrace"},
- {KB_rightSquareBrace ,"KB_rightSquareBrace"},
- {KB_enter ,"KB_enter"},
- {KB_A ,"KB_A"},
- {KB_S ,"KB_S"},
- {KB_D ,"KB_D"},
- {KB_F ,"KB_F"},
- {KB_G ,"KB_G"},
- {KB_H ,"KB_H"},
- {KB_J ,"KB_J"},
- {KB_K ,"KB_K"},
- {KB_L ,"KB_L"},
- {KB_semicolon ,"KB_semicolon"},
- {KB_apostrophe ,"KB_apostrophe"},
- {KB_Z ,"KB_Z"},
- {KB_X ,"KB_X"},
- {KB_C ,"KB_C"},
- {KB_V ,"KB_V"},
- {KB_B ,"KB_B"},
- {KB_N ,"KB_N"},
- {KB_M ,"KB_M"},
- {KB_comma ,"KB_comma"},
- {KB_period ,"KB_period"},
- {KB_divide ,"KB_divide"},
- {KB_space ,"KB_space"},
- {KB_tilde ,"KB_tilde"},
- {0 ,"KB_unknown"},
- };
-
-/****************************************************************************
-PARAMETERS:
-x - X coordinate of the mouse cursor position (screen coordinates)
-y - Y coordinate of the mouse cursor position (screen coordinates)
-
-REMARKS:
-This gets called periodically to move the mouse. It will get called when
-the mouse may not have actually moved, so check if it has before redrawing
-it.
-****************************************************************************/
-void EVTAPI moveMouse(
- int x,
- int y)
-{
-}
-
-/****************************************************************************
-PARAMETERS:
-code - Code to translate
-keys - Table of translation key values to look up
-
-REMARKS:
-Simple function to look up the printable name for the keyboard code.
-****************************************************************************/
-KeyEntry *FindKey(
- int code,
- KeyEntry *keys)
-{
- KeyEntry *key;
-
- for (key = keys; key->code != 0; key++) {
- if (key->code == code)
- break;
- }
- return key;
-}
-
-/****************************************************************************
-PARAMETERS:
-evt - Event to display modifiers for
-
-REMARKS:
-Function to display shift modifiers flags
-****************************************************************************/
-void DisplayModifiers(
- event_t *evt)
-{
- if (evt->modifiers & EVT_LEFTBUT)
- printf(", LBUT");
- if (evt->modifiers & EVT_RIGHTBUT)
- printf(", RBUT");
- if (evt->modifiers & EVT_MIDDLEBUT)
- printf(", MBUT");
- if (evt->modifiers & EVT_SHIFTKEY) {
- if (evt->modifiers & EVT_LEFTSHIFT)
- printf(", LSHIFT");
- if (evt->modifiers & EVT_RIGHTSHIFT)
- printf(", RSHIFT");
- }
- if (evt->modifiers & EVT_CTRLSTATE) {
- if (evt->modifiers & EVT_LEFTCTRL)
- printf(", LCTRL");
- if (evt->modifiers & EVT_RIGHTCTRL)
- printf(", RCTRL");
- }
- if (evt->modifiers & EVT_ALTSTATE) {
- if (evt->modifiers & EVT_LEFTALT)
- printf(", LALT");
- if (evt->modifiers & EVT_RIGHTALT)
- printf(", RALT");
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-msg - Message to display for type of event
-evt - Event to display
-
-REMARKS:
-Function to display the status of the keyboard event to the screen.
-****************************************************************************/
-void DisplayKey(
- char *msg,
- event_t *evt)
-{
- KeyEntry *ascii,*scan;
- char ch = EVT_asciiCode(evt->message);
-
- ascii = FindKey(ch,ASCIICodes);
- scan = FindKey(EVT_scanCode(evt->message),ScanCodes);
- printf("%s: 0x%04X -> %s, %s, '%c'",
- msg, (int)evt->message & 0xFFFF, scan->name, ascii->name, isprint(ch) ? ch : ' ');
- DisplayModifiers(evt);
- printf("\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-msg - Message to display for type of event
-evt - Event to display
-
-REMARKS:
-Function to display the status of the mouse event to the screen.
-****************************************************************************/
-void DisplayMouse(
- char *msg,
- event_t *evt)
-{
- printf("%s: ", msg);
- if (evt->message & EVT_LEFTBMASK)
- printf("LEFT ");
- if (evt->message & EVT_RIGHTBMASK)
- printf("RIGHT ");
- if (evt->message & EVT_MIDDLEBMASK)
- printf("MIDDLE ");
- printf("abs(%d,%d), rel(%d,%d)", evt->where_x, evt->where_y, evt->relative_x, evt->relative_y);
- DisplayModifiers(evt);
- if (evt->message & EVT_DBLCLICK)
- printf(", DBLCLICK");
- printf("\n");
-}
-
-/****************************************************************************
-PARAMETERS:
-msg - Message to display for type of event
-evt - Event to display
-
-REMARKS:
-Function to display the status of the joystick event to the screen.
-****************************************************************************/
-void DisplayJoy(
- char *msg,
- event_t *evt)
-{
- printf("%s: Joy1(%4d,%4d,%c%c), Joy2(%4d,%4d,%c%c)\n", msg,
- evt->where_x,evt->where_y,
- (evt->message & EVT_JOY1_BUTTONA) ? 'A' : 'a',
- (evt->message & EVT_JOY1_BUTTONB) ? 'B' : 'b',
- evt->relative_x,evt->relative_y,
- (evt->message & EVT_JOY2_BUTTONA) ? 'A' : 'a',
- (evt->message & EVT_JOY2_BUTTONB) ? 'B' : 'b');
-}
-
-/****************************************************************************
-REMARKS:
-Joystick calibration routine
-****************************************************************************/
-void CalibrateJoy(void)
-{
- event_t evt;
- if(EVT_joyIsPresent()){
- printf("Joystick Calibration\nMove the joystick to the upper left corner and press any button.\n");
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_joySetUpperLeft();
- printf("Move the joystick to the lower right corner and press any button.\n");
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_joySetLowerRight();
- printf("Move the joystick to center position and press any button.\n");
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_halt(&evt, EVT_JOYCLICK);
- EVT_joySetCenter();
- printf("Joystick calibrated\n");
- }
-}
-
-/****************************************************************************
-REMARKS:
-Main program entry point
-****************************************************************************/
-int main(void)
-{
- event_t evt;
- ibool done = false;
- PM_HWND hwndConsole;
-
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
- EVT_init(&moveMouse);
- EVT_setMouseRange(1024,768);
- CalibrateJoy();
- do {
- EVT_pollJoystick();
- if (EVT_getNext(&evt,EVT_EVERYEVT)) {
- switch (evt.what) {
- case EVT_KEYDOWN:
- DisplayKey("EVT_KEYDOWN ", &evt);
- if (EVT_scanCode(evt.message) == KB_esc)
- done = true;
- break;
- case EVT_KEYREPEAT:
- DisplayKey("EVT_KEYREPEAT", &evt);
- break;
- case EVT_KEYUP:
- DisplayKey("EVT_KEYUP ", &evt);
- break;
- case EVT_MOUSEDOWN:
- DisplayMouse("EVT_MOUSEDOWN", &evt);
- break;
- case EVT_MOUSEAUTO:
- DisplayMouse("EVT_MOUSEAUTO", &evt);
- break;
- case EVT_MOUSEUP:
- DisplayMouse("EVT_MOUSEUP ", &evt);
- break;
- case EVT_MOUSEMOVE:
- DisplayMouse("EVT_MOUSEMOVE", &evt);
- break;
- case EVT_JOYCLICK:
- DisplayJoy("EVT_JOYCLICK ", &evt);
- break;
- case EVT_JOYMOVE:
- DisplayJoy("EVT_JOYMOVE ", &evt);
- break;
- }
- }
- } while (!done);
- EVT_exit();
- PM_closeConsole(hwndConsole);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c b/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c
deleted file mode 100644
index 67ad245..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c
+++ /dev/null
@@ -1,110 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to allocate real mode
-* memory and to call real mode interrupt handlers such as
-* the VESA VBE BIOS from protected mode. Compile and link
-* with the appropriate command line for your DOS extender.
-*
-* Functions tested: PM_getVESABuf()
-* PM_mapRealPointer()
-* PM_int86x()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include "pmapi.h"
-
-/* SuperVGA information block */
-
-#pragma pack(1)
-
-typedef struct {
- char VESASignature[4]; /* 'VESA' 4 byte signature */
- short VESAVersion; /* VBE version number */
- ulong OEMStringPtr; /* Far pointer to OEM string */
- ulong Capabilities; /* Capabilities of video card */
- ulong VideoModePtr; /* Far pointer to supported modes */
- short TotalMemory; /* Number of 64kb memory blocks */
- char reserved[236]; /* Pad to 256 byte block size */
- } VgaInfoBlock;
-
-#pragma pack()
-
-int main(void)
-{
- RMREGS regs;
- RMSREGS sregs;
- VgaInfoBlock vgaInfo;
- ushort *mode;
- uint vgLen;
- uchar *vgPtr;
- unsigned r_vgseg,r_vgoff;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Allocate a 256 byte block of real memory for communicating with
- * the VESA BIOS.
- */
- if ((vgPtr = PM_getVESABuf(&vgLen,&r_vgseg,&r_vgoff)) == NULL) {
- printf("Unable to allocate VESA memory buffer!\n");
- exit(1);
- }
-
- /* Call the VESA VBE to see if it is out there */
- regs.x.ax = 0x4F00;
- regs.x.di = r_vgoff;
- sregs.es = r_vgseg;
- memcpy(vgPtr,"VBE2",4);
- PM_int86x(0x10, ®s, ®s, &sregs);
- memcpy(&vgaInfo,vgPtr,sizeof(VgaInfoBlock));
- if (regs.x.ax == 0x4F && strncmp(vgaInfo.VESASignature,"VESA",4) == 0) {
- printf("VESA VBE version %d.%d BIOS detected\n\n",
- vgaInfo.VESAVersion >> 8, vgaInfo.VESAVersion & 0xF);
- printf("Available video modes:\n");
- mode = PM_mapRealPointer(vgaInfo.VideoModePtr >> 16, vgaInfo.VideoModePtr & 0xFFFF);
- while (*mode != 0xFFFF) {
- printf(" %04hXh (%08X)\n", *mode, (int)mode);
- mode++;
- }
- }
- else
- printf("VESA VBE not found\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/key.c b/board/MAI/bios_emulator/scitech/src/pm/tests/key.c
deleted file mode 100644
index dba8885..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/key.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* keyboard interrupt handler.
-*
-* Functions tested: PM_setKeyHandler()
-* PM_chainPrevKey()
-* PM_restoreKeyHandler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI keyHandler(void)
-{
- count++;
- PM_chainPrevKey(); /* Chain to previous handler */
-}
-
-int main(void)
-{
- int ch;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)keyHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Breaks! */
- PM_setKeyHandler(keyHandler);
- printf("Keyboard interrupt handler installed - Type some characters and\n");
- printf("hit ESC to exit\n");
- while ((ch = PM_getch()) != 0x1B) {
- printf("%c", ch);
- fflush(stdout);
- }
-
- PM_restoreKeyHandler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)keyHandler,100,&lh);
- printf("\n\nKeyboard handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c b/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c
deleted file mode 100644
index b0b94be..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c
+++ /dev/null
@@ -1,96 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* keyboard Int 15h interrupt handler. This is an alternate
-* way to intercept scancodes from the keyboard by hooking
-* the Int 15h keyboard intercept callout.
-*
-* Functions tested: PM_setKey15Handler()
-* PM_restoreKey15Handler()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-volatile short lastScanCode = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-short PMAPI keyHandler(short scanCode)
-{
- count++;
- lastScanCode = scanCode;
- return scanCode; /* Let BIOS process as normal */
-}
-
-int main(void)
-{
- int ch;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)keyHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Break's! */
- PM_setKey15Handler(keyHandler);
- printf("Keyboard interrupt handler installed - Type some characters and\n");
- printf("hit ESC to exit\n");
- while ((ch = PM_getch()) != 0x1B) {
- printf("%c", ch);
- fflush(stdout);
- }
-
- PM_restoreKey15Handler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)keyHandler,100,&lh);
- printf("\n\nKeyboard handler was called %ld times\n", count);
- printf("Last scan code %04X\n", lastScanCode);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c b/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c
deleted file mode 100644
index a2c655b..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c
+++ /dev/null
@@ -1,106 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to determine just how much memory can be
-* allocated with the compiler in use. Compile and link
-* with the appropriate command line for your DOS extender.
-*
-* Functions tested: PM_malloc()
-* PM_availableMemory()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include <string.h>
-#include <math.h>
-#include "pmapi.h"
-
-#ifdef __16BIT__
-#define MAXALLOC 64
-#else
-#define MAXALLOC 2000
-#endif
-
-int main(void)
-{
- int i;
- ulong allocs;
- ulong physical,total;
- char *p,*pa[MAXALLOC];
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- printf("Memory available at start:\n");
- PM_availableMemory(&physical,&total);
- printf(" Physical memory: %ld Kb\n", physical / 1024);
- printf(" Total (including virtual): %ld Kb\n", total / 1024);
- printf("\n");
- for (allocs = i = 0; i < MAXALLOC; i++) {
- if ((pa[i] = PM_malloc(10*1024)) != 0) { /* in 10k blocks */
- p = pa[allocs];
- memset(p, 0, 10*1024); /* touch every byte */
- *p = 'x'; /* do something, anything with */
- p[1023] = 'y'; /* the allocated memory */
- allocs++;
- printf("Allocated %lu bytes\r", 10*(allocs << 10));
- }
- else break;
- if (PM_kbhit() && (PM_getch() == 0x1B))
- break;
- }
-
- printf("\n\nAllocated total of %lu bytes\n", 10 * (allocs << 10));
-
- printf("\nMemory available at end:\n");
- PM_availableMemory(&physical,&total);
- printf(" Physical memory: %ld Kb\n", physical / 1024);
- printf(" Total (including virtual): %ld Kb\n", total / 1024);
-
- for (i = allocs-1; i >= 0; i--)
- PM_free(pa[i]);
-
- printf("\nMemory available after freeing all blocks (note that under protected mode\n");
- printf("this will most likely not be correct after freeing blocks):\n\n");
- PM_availableMemory(&physical,&total);
- printf(" Physical memory: %ld Kb\n", physical / 1024);
- printf(" Total (including virtual): %ld Kb\n", total / 1024);
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c b/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c
deleted file mode 100644
index 2765a0d..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c
+++ /dev/null
@@ -1,109 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install an assembly
-* language mouse interrupt handler. We use assembly language
-* as it must be a far function and should swap to a local
-* 32 bit stack if it is going to call any C based code (which
-* we do in this example).
-*
-* Functions tested: PM_installMouseHandler()
-* PM_int86()
-*
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI mouseHandler(
- uint mask,
- uint butstate,
- int x,
- int y,
- int mickeyX,
- int mickeyY)
-{
- mask = mask; /* We dont use any of the parameters */
- butstate = butstate;
- x = x;
- y = y;
- mickeyX = mickeyX;
- mickeyY = mickeyY;
- count++;
-}
-
-int main(void)
-{
- RMREGS regs;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- regs.x.ax = 33; /* Mouse function 33 - Software reset */
- PM_int86(0x33,®s,®s);
- if (regs.x.bx == 0) {
- printf("No mouse installed.\n");
- exit(1);
- }
-
- /* Install our mouse handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)mouseHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- if (!PM_setMouseHandler(0xFFFF, mouseHandler)) {
- printf("Unable to install mouse handler!\n");
- exit(1);
- }
- printf("Mouse handler installed - Hit any key to exit\n");
- PM_getch();
-
- PM_restoreMouseHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)mouseHandler,100,&lh);
- printf("Mouse handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c b/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c
deleted file mode 100644
index e00be75..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c
+++ /dev/null
@@ -1,81 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux/QNX
-*
-* Description: Program to restore the console state state from a previously
-* saved state if the program crashed while the console
-* was in graphics mode.
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-void setVideoMode(int mode)
-{
- RMREGS r;
-
- r.x.ax = mode;
- PM_int86(0x10, &r, &r);
-}
-
-int main(void)
-{
- PM_HWND hwndConsole;
- ulong stateSize;
- void *stateBuf;
- FILE *f;
-
- /* Write the saved console state buffer to disk */
- if ((f = fopen("/etc/pmsave.dat","rb")) == NULL) {
- printf("Unable to open /etc/pmsave.dat for reading!\n");
- return -1;
- }
- fread(&stateSize,1,sizeof(stateSize),f);
- if (stateSize != PM_getConsoleStateSize()) {
- printf("Size mismatch in /etc/pmsave.dat!\n");
- return -1;
- }
- if ((stateBuf = PM_malloc(stateSize)) == NULL) {
- printf("Unable to allocate console state buffer!\n");
- return -1;
- }
- fread(stateBuf,1,stateSize,f);
- fclose(f);
-
- /* Open the console */
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
-
- /* Forcibly set 80x25 text mode using the BIOS */
- setVideoMode(0x3);
-
- /* Restore the previous console state */
- PM_restoreConsoleState(stateBuf,0);
- PM_closeConsole(hwndConsole);
- PM_free(stateBuf);
- printf("Console state successfully restored from /etc/pmsave.dat\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c
deleted file mode 100644
index acef922..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* Real Time Clock interrupt handler.
-*
-* Functions tested: PM_setRealTimeClockHandler()
-* PM_restoreRealTimeClockHandler()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI RTCHandler(void)
-{
- count++;
-}
-
-int main(void)
-{
- long oldCount;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)RTCHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Breaks! */
- PM_setRealTimeClockHandler(RTCHandler,128);
- printf("RealTimeClock interrupt handler installed - Hit ESC to exit\n");
- oldCount = count;
- while (1) {
- if (PM_kbhit() && (PM_getch() == 0x1B))
- break;
- if (count != oldCount) {
- printf("Tick, Tock: %ld\n", count);
- oldCount = count;
- }
- }
-
- PM_restoreRealTimeClockHandler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)RTCHandler,100,&lh);
- printf("RealTimeClock handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/save.c b/board/MAI/bios_emulator/scitech/src/pm/tests/save.c
deleted file mode 100644
index f732456..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/save.c
+++ /dev/null
@@ -1,69 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Linux/QNX
-*
-* Description: Program to save the console state state so that it can
-* be later restored if the program crashed while the console
-* was in graphics mode.
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-int main(void)
-{
- PM_HWND hwndConsole;
- ulong stateSize;
- void *stateBuf;
- FILE *f;
-
- /* Allocate a buffer to save console state and save the state */
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
- stateSize = PM_getConsoleStateSize();
- if ((stateBuf = PM_malloc(stateSize)) == NULL) {
- PM_closeConsole(hwndConsole);
- printf("Unable to allocate console state buffer!\n");
- return -1;
- }
- PM_saveConsoleState(stateBuf,0);
-
- /* Restore the console state on exit */
- PM_restoreConsoleState(stateBuf,0);
- PM_closeConsole(hwndConsole);
-
- /* Write the saved console state buffer to disk */
- if ((f = fopen("/etc/pmsave.dat","wb")) == NULL)
- printf("Unable to open /etc/pmsave/dat for writing!\n");
- else {
- fwrite(&stateSize,1,sizeof(stateSize),f);
- fwrite(stateBuf,1,stateSize,f);
- fclose(f);
- printf("Console state successfully saved to /etc/pmsave.dat\n");
- }
- PM_free(stateBuf);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c b/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c
deleted file mode 100644
index be275e1..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c
+++ /dev/null
@@ -1,253 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to test the PCI library functions.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pcilib.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-static int NumPCI = -1;
-static PCIDeviceInfo *PCI;
-static int *BridgeIndex;
-static int *DeviceIndex;
-static int NumBridges;
-static PCIDeviceInfo *AGPBridge = NULL;
-static int NumDevices;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-REMARKS:
-Enumerates the PCI bus and dumps the PCI configuration information to the
-log file.
-****************************************************************************/
-static void EnumeratePCI(void)
-{
- int i,index;
- PCIDeviceInfo *info;
-
- printf("Displaying enumeration of PCI bus (%d devices, %d display devices)\n",
- NumPCI, NumDevices);
- for (index = 0; index < NumDevices; index++)
- printf(" Display device %d is PCI device %d\n",index,DeviceIndex[index]);
- printf("\n");
- printf("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ",
- PCI[i].slot.p.Bus,
- PCI[i].slot.p.Device,
- PCI[i].slot.p.Function,
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.SubSystemVendorID,
- PCI[i].u.type0.SubSystemID,
- PCI[i].RevID,
- PCI[i].BaseClass,
- PCI[i].SubClass,
- PCI[i].u.type0.InterruptLine,
- PCI[i].u.type0.InterruptPin,
- PCI[i].Command);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("DeviceID Stat Ifc Cch Lat Hdr BIST\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%04X:%04X %04X %02X %02X %02X %02X %02X ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].Status,
- PCI[i].Interface,
- PCI[i].CacheLineSize,
- PCI[i].LatencyTimer,
- PCI[i].HeaderType,
- PCI[i].BIST);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.BaseAddress10,
- PCI[i].u.type0.BaseAddress14,
- PCI[i].u.type0.BaseAddress18,
- PCI[i].u.type0.BaseAddress1C,
- PCI[i].u.type0.BaseAddress20,
- PCI[i].u.type0.BaseAddress24,
- PCI[i].u.type0.ROMBaseAddress);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n");
- for (i = 0; i < NumPCI; i++) {
- printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.BaseAddress10Len,
- PCI[i].u.type0.BaseAddress14Len,
- PCI[i].u.type0.BaseAddress18Len,
- PCI[i].u.type0.BaseAddress1CLen,
- PCI[i].u.type0.BaseAddress20Len,
- PCI[i].u.type0.BaseAddress24Len,
- PCI[i].u.type0.ROMBaseAddressLen);
- for (index = 0; index < NumDevices; index++) {
- if (DeviceIndex[index] == i)
- break;
- }
- if (index < NumDevices)
- printf("<- %d\n", index);
- else
- printf("\n");
- }
- printf("\n");
- printf("Displaying enumeration of %d bridge devices\n",NumBridges);
- printf("\n");
- printf("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n");
- for (i = 0; i < NumBridges; i++) {
- info = (PCIDeviceInfo*)&PCI[BridgeIndex[i]];
- printf("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n",
- info->VendorID,
- info->DeviceID,
- info->u.type1.PrimaryBusNumber,
- info->u.type1.SecondayBusNumber,
- info->u.type1.SubordinateBusNumber,
- ((u16)info->u.type1.IOBase << 8) & 0xF000,
- info->u.type1.IOLimit ?
- ((u16)info->u.type1.IOLimit << 8) | 0xFFF : 0,
- ((u32)info->u.type1.MemoryBase << 16) & 0xFFF00000,
- info->u.type1.MemoryLimit ?
- ((u32)info->u.type1.MemoryLimit << 16) | 0xFFFFF : 0,
- ((u32)info->u.type1.PrefetchableMemoryBase << 16) & 0xFFF00000,
- info->u.type1.PrefetchableMemoryLimit ?
- ((u32)info->u.type1.PrefetchableMemoryLimit << 16) | 0xFFFFF : 0,
- info->u.type1.BridgeControl);
- }
- printf("\n");
-}
-
-/****************************************************************************
-RETURNS:
-Number of display devices found.
-
-REMARKS:
-This function enumerates the number of available display devices on the
-PCI bus, and returns the number found.
-****************************************************************************/
-static int PCI_enumerateDevices(void)
-{
- int i,j;
- PCIDeviceInfo *info;
-
- /* If this is the first time we have been called, enumerate all */
- /* devices on the PCI bus. */
- if (NumPCI == -1) {
- if ((NumPCI = PCI_getNumDevices()) == 0)
- return -1;
- PCI = malloc(NumPCI * sizeof(PCI[0]));
- BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0]));
- DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0]));
- if (!PCI || !BridgeIndex || !DeviceIndex)
- return -1;
- for (i = 0; i < NumPCI; i++)
- PCI[i].dwSize = sizeof(PCI[i]);
- if (PCI_enumerate(PCI) == 0)
- return -1;
-
- /* Build a list of all PCI bridge devices */
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS)
- BridgeIndex[NumBridges++] = i;
- }
-
- /* Now build a list of all display class devices */
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
- if ((PCI[i].Command & 0x3) == 0x3)
- DeviceIndex[0] = i;
- else
- DeviceIndex[NumDevices++] = i;
- if (PCI[i].slot.p.Bus != 0) {
- /* This device is on a different bus than the primary */
- /* PCI bus, so it is probably an AGP device. Find the */
- /* AGP bus device that controls that bus so we can */
- /* control it. */
- for (j = 0; j < NumBridges; j++) {
- info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]];
- if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) {
- AGPBridge = info;
- break;
- }
- }
- }
- }
- }
-
- /* Enumerate all PCI and bridge devices to standard output */
- EnumeratePCI();
- }
- return NumDevices;
-}
-
-int main(void)
-{
- /* Enumerate all PCI devices */
- PM_init();
- if (PCI_enumerateDevices() < 1) {
- printf("No PCI display devices found!\n");
- return -1;
- }
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c b/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c
deleted file mode 100644
index 378725e..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to install a C based
-* timer interrupt handler.
-*
-* Functions tested: PM_setTimerHandler()
-* PM_chainPrevTimer();
-* PM_restoreTimerHandler()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-volatile long count = 0;
-
-#pragma off (check_stack) /* No stack checking under Watcom */
-
-void PMAPI timerHandler(void)
-{
- PM_chainPrevTimer(); /* Chain to previous handler */
- count++;
-}
-
-int main(void)
-{
- long oldCount;
- PM_lockHandle lh;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- /* Install our timer handler and lock handler pages in memory. It is
- * difficult to get the size of a function in C, but we know our
- * function is well less than 100 bytes (and an entire 4k page will
- * need to be locked by the server anyway).
- */
- PM_lockCodePages((__codePtr)timerHandler,100,&lh);
- PM_lockDataPages((void*)&count,sizeof(count),&lh);
- PM_installBreakHandler(); /* We *DONT* want Ctrl-Breaks! */
- PM_setTimerHandler(timerHandler);
- printf("Timer interrupt handler installed - Hit ESC to exit\n");
- oldCount = count;
- while (1) {
- if (PM_kbhit() && (PM_getch() == 0x1B))
- break;
- if (count != oldCount) {
- printf("Tick, Tock: %ld\n", count);
- oldCount = count;
- }
- }
-
- PM_restoreTimerHandler();
- PM_restoreBreakHandler();
- PM_unlockDataPages((void*)&count,sizeof(count),&lh);
- PM_unlockCodePages((__codePtr)timerHandler,100,&lh);
- printf("Timer handler was called %ld times\n", count);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c
deleted file mode 100644
index 7fa77b7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c
+++ /dev/null
@@ -1,87 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Test program for the Zen Timer Library.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include "pmapi.h"
-#include "ztimer.h"
-
-#define DELAY_SECS 10
-
-/*-------------------------- Implementation -------------------------------*/
-
-/* The following routine takes a long count in microseconds and outputs
- * a string representing the count in seconds. It could be modified to
- * return a pointer to a static string representing the count rather
- * than printing it out.
- */
-
-void ReportTime(ulong count)
-{
- ulong secs;
-
- secs = count / 1000000L;
- count = count - secs * 1000000L;
- printf("Time taken: %lu.%06lu seconds\n",secs,count);
-}
-
-int i,j; /* NON register variables! */
-
-int main(void)
-{
-#ifdef LONG_TEST
- ulong start,finish;
-#endif
-
- printf("Processor type: %d %ld MHz\n", CPU_getProcessorType(), CPU_getProcessorSpeed(true));
-
- ZTimerInit();
-
- /* Test the long period Zen Timer (we don't check for overflow coz
- * it would take tooooo long!)
- */
-
- LZTimerOn();
- for (j = 0; j < 10; j++)
- for (i = 0; i < 20000; i++)
- i = i;
- LZTimerOff();
- ReportTime(LZTimerCount());
-
- /* Test the ultra long period Zen Timer */
-#ifdef LONG_TEST
- start = ULZReadTime();
- delay(DELAY_SECS * 1000);
- finish = ULZReadTime();
- printf("Delay of %d secs took %d 1/10ths of a second\n",
- DELAY_SECS,ULZElapsedTime(start,finish));
-#endif
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/timercpp.cpp b/board/MAI/bios_emulator/scitech/src/pm/tests/timercpp.cpp
deleted file mode 100644
index 1258a4b..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/timercpp.cpp
+++ /dev/null
@@ -1,107 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: C++ 3.0
-* Environment: Any
-*
-* Description: Test program for the Zen Timer Library C++ interface.
-*
-****************************************************************************/
-
-#include <iostream.h>
-#include "pmapi.h"
-#include "ztimer.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-int i,j,k; /* NON register variables! */
-
-void dummy() {}
-
-int main(void)
-{
- LZTimer ltimer;
- ULZTimer ultimer;
-
- ZTimerInit();
-
- /* Test the long period Zen Timer (we don't check for overflow coz
- * it would take tooooo long!)
- */
-
- cout << endl;
- ultimer.restart();
- ltimer.start();
- for (j = 0; j < 10; j++)
- for (i = 0; i < 20000; i++)
- dummy();
- ltimer.stop();
- ultimer.stop();
- cout << "LCount: " << ltimer.count() << endl;
- cout << "Time: " << ltimer << " secs\n";
- cout << "ULCount: " << ultimer.count() << endl;
- cout << "ULTime: " << ultimer << " secs\n";
-
- cout << endl << "Timing ... \n";
- ultimer.restart();
- ltimer.restart();
- for (j = 0; j < 200; j++)
- for (i = 0; i < 20000; i++)
- dummy();
- ltimer.stop();
- ultimer.stop();
- cout << "LCount: " << ltimer.count() << endl;
- cout << "Time: " << ltimer << " secs\n";
- cout << "ULCount: " << ultimer.count() << endl;
- cout << "ULTime: " << ultimer << " secs\n";
-
- /* Test the lap function of the long period Zen Timer */
-
- cout << endl << "Timing ... \n";
- ultimer.restart();
- ltimer.restart();
- for (j = 0; j < 20; j++) {
- for (k = 0; k < 10; k++)
- for (i = 0; i < 20000; i++)
- dummy();
- cout << "lap: " << ltimer.lap() << endl;
- }
- ltimer.stop();
- ultimer.stop();
- cout << "LCount: " << ltimer.count() << endl;
- cout << "Time: " << ltimer << " secs\n";
- cout << "ULCount: " << ultimer.count() << endl;
- cout << "ULTime: " << ultimer << " secs\n";
-
-#ifdef LONG_TEST
- /* Test the ultra long period Zen Timer */
-
- ultimer.start();
- delay(DELAY_SECS * 1000);
- ultimer.stop();
- cout << "Delay of " << DELAY_SECS << " secs took " << ultimer.count()
- << " 1/10ths of a second\n";
- cout << "Time: " << ultimer << " secs\n";
-#endif
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c
deleted file mode 100644
index f0c7bd6..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Simple test program to test the write combine functions.
-*
-* Note that this program should never be used in a production
-* environment, because write combining needs to be handled
-* with more intimate knowledge of the display hardware than
-* you can obtain by simply examining the PCI configuration
-* space.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "pcilib.h"
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-static int NumPCI = -1;
-static PCIDeviceInfo *PCI;
-static int *BridgeIndex;
-static int *DeviceIndex;
-static int NumBridges;
-static PCIDeviceInfo *AGPBridge = NULL;
-static int NumDevices;
-
-/*-------------------------- Implementation -------------------------------*/
-
-/****************************************************************************
-RETURNS:
-Number of display devices found.
-
-REMARKS:
-This function enumerates the number of available display devices on the
-PCI bus, and returns the number found.
-****************************************************************************/
-static int PCI_enumerateDevices(void)
-{
- int i,j;
- PCIDeviceInfo *info;
-
- /* If this is the first time we have been called, enumerate all */
- /* devices on the PCI bus. */
- if (NumPCI == -1) {
- if ((NumPCI = PCI_getNumDevices()) == 0)
- return -1;
- PCI = malloc(NumPCI * sizeof(PCI[0]));
- BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0]));
- DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0]));
- if (!PCI || !BridgeIndex || !DeviceIndex)
- return -1;
- for (i = 0; i < NumPCI; i++)
- PCI[i].dwSize = sizeof(PCI[i]);
- if (PCI_enumerate(PCI) == 0)
- return -1;
-
- /* Build a list of all PCI bridge devices */
- for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) {
- if (PCI[i].BaseClass == PCI_BRIDGE_CLASS)
- BridgeIndex[NumBridges++] = i;
- }
-
- /* Now build a list of all display class devices */
- for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) {
- if (PCI_IS_DISPLAY_CLASS(&PCI[i])) {
- if ((PCI[i].Command & 0x3) == 0x3)
- DeviceIndex[0] = i;
- else
- DeviceIndex[NumDevices++] = i;
- if (PCI[i].slot.p.Bus != 0) {
- /* This device is on a different bus than the primary */
- /* PCI bus, so it is probably an AGP device. Find the */
- /* AGP bus device that controls that bus so we can */
- /* control it. */
- for (j = 0; j < NumBridges; j++) {
- info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]];
- if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) {
- AGPBridge = info;
- break;
- }
- }
- }
- }
- }
- }
- return NumDevices;
-}
-
-/****************************************************************************
-REMARKS:
-Enumerates useful information about attached display devices.
-****************************************************************************/
-static void ShowDisplayDevices(void)
-{
- int i,index;
-
- printf("Displaying enumeration of %d PCI display devices\n", NumDevices);
- printf("\n");
- printf("DeviceID SubSystem Base10h (length ) Base14h (length )\n");
- for (index = 0; index < NumDevices; index++) {
- i = DeviceIndex[index];
- printf("%04X:%04X %04X:%04X %08lX (%6ld KB) %08lX (%6ld KB)\n",
- PCI[i].VendorID,
- PCI[i].DeviceID,
- PCI[i].u.type0.SubSystemVendorID,
- PCI[i].u.type0.SubSystemID,
- PCI[i].u.type0.BaseAddress10,
- PCI[i].u.type0.BaseAddress10Len / 1024,
- PCI[i].u.type0.BaseAddress14,
- PCI[i].u.type0.BaseAddress14Len / 1024);
- }
- printf("\n");
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static char *DecodeWCType(
- uint type)
-{
- static char *names[] = {
- "UNCACHABLE",
- "WRCOMB",
- "UNKNOWN",
- "UNKNOWN",
- "WRTHROUGH",
- "WRPROT",
- "WRBACK",
- };
- if (type <= PM_MTRR_MAX)
- return names[type];
- return "UNKNOWN";
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static void PMAPI EnumWriteCombine(
- ulong base,
- ulong length,
- uint type)
-{
- printf("%08lX %-10ld %s\n", base, length / 1024, DecodeWCType(type));
-}
-
-/****************************************************************************
-PARAMETERS:
-err - Error to log
-
-REMARKS:
-Function to log an error message if the MTRR write combining attempt failed.
-****************************************************************************/
-static void LogMTRRError(
- int err)
-{
- if (err == PM_MTRR_ERR_OK)
- return;
- switch (err) {
- case PM_MTRR_NOT_SUPPORTED:
- printf("Failed: MTRR is not supported by host CPU\n");
- break;
- case PM_MTRR_ERR_PARAMS:
- printf("Failed: Invalid parameters passed to PM_enableWriteCombined!\n");
- break;
- case PM_MTRR_ERR_NOT_4KB_ALIGNED:
- printf("Failed: Address is not 4Kb aligned!\n");
- break;
- case PM_MTRR_ERR_BELOW_1MB:
- printf("Failed: Addresses below 1Mb cannot be write combined!\n");
- break;
- case PM_MTRR_ERR_NOT_ALIGNED:
- printf("Failed: Address is not correctly aligned for processor!\n");
- break;
- case PM_MTRR_ERR_OVERLAP:
- printf("Failed: Address overlaps an existing region!\n");
- break;
- case PM_MTRR_ERR_TYPE_MISMATCH:
- printf("Failed: Adress is contained with existing region, but type is different!\n");
- break;
- case PM_MTRR_ERR_NONE_FREE:
- printf("Failed: Out of MTRR registers!\n");
- break;
- case PM_MTRR_ERR_NOWRCOMB:
- printf("Failed: This processor does not support write combining!\n");
- break;
- case PM_MTRR_ERR_NO_OS_SUPPORT:
- printf("Failed: MTRR is not supported by host OS\n");
- break;
- default:
- printf("Failed: UNKNOWN ERROR!\n");
- break;
- }
- exit(-1);
-}
-
-/****************************************************************************
-REMARKS:
-Shows all write combine regions.
-****************************************************************************/
-static void ShowWriteCombine(void)
-{
- printf("Base Length(KB) Type\n");
- LogMTRRError(PM_enumWriteCombine(EnumWriteCombine));
- printf("\n");
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static void EnableWriteCombine(void)
-{
- int i,index;
-
- for (index = 0; index < NumDevices; index++) {
- i = DeviceIndex[index];
- if (PCI[i].u.type0.BaseAddress10 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress10Len,
- PM_MTRR_WRCOMB));
- }
- if (PCI[i].u.type0.BaseAddress14 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress14Len,
- PM_MTRR_WRCOMB));
- }
- }
- printf("\n");
- ShowDisplayDevices();
- ShowWriteCombine();
-}
-
-/****************************************************************************
-REMARKS:
-Dumps the value for a write combine region to the display.
-****************************************************************************/
-static void DisableWriteCombine(void)
-{
- int i,index;
-
- for (index = 0; index < NumDevices; index++) {
- i = DeviceIndex[index];
- if (PCI[i].u.type0.BaseAddress10 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress10Len,
- PM_MTRR_UNCACHABLE));
- }
- if (PCI[i].u.type0.BaseAddress14 & 0x8) {
- LogMTRRError(PM_enableWriteCombine(
- PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0,
- PCI[i].u.type0.BaseAddress14Len,
- PM_MTRR_UNCACHABLE));
- }
- }
- printf("\n");
- ShowDisplayDevices();
- ShowWriteCombine();
-}
-
-int main(int argc,char *argv[])
-{
- PM_init();
- if (PCI_enumerateDevices() < 1) {
- printf("No PCI display devices found!\n");
- return -1;
- }
- if (argc < 2) {
- printf("usage: uswc [-show -on -off]\n\n");
- ShowDisplayDevices();
- return -1;
- }
- if (stricmp(argv[1],"-show") == 0)
- ShowWriteCombine();
- else if (stricmp(argv[1],"-on") == 0)
- EnableWriteCombine();
- else if (stricmp(argv[1],"-off") == 0)
- DisableWriteCombine();
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c b/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c
deleted file mode 100644
index b7e3bb7..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c
+++ /dev/null
@@ -1,78 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Filename: $Workfile$
-* Version: $Revision: 1.1 $
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to test the VFlat virtual framebuffer functions.
-*
-* Functions tested: VF_available()
-* VF_init()
-* VF_exit()
-*
-* $Date: 2002/10/02 15:35:21 $ $Author: hfrieden $
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-uchar code[] = {
- 0xC3, /* ret */
- };
-
-int main(void)
-{
- void *vfBuffer;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- if (!VF_available()) {
- printf("Virtual Linear Framebuffer not available.\n");
- exit(1);
- }
-
- vfBuffer = VF_init(0xA0000,64,sizeof(code),code);
- if (!vfBuffer) {
- printf("Failure to initialise Virtual Linear Framebuffer!\n");
- exit(1);
- }
- VF_exit();
- printf("Virtual Linear Framebuffer set up successfully!\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/video.c b/board/MAI/bios_emulator/scitech/src/pm/tests/video.c
deleted file mode 100644
index 92adcdd..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/tests/video.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: any
-*
-* Description: Test program to check the ability to generate real mode
-* interrupts and to be able to obtain direct access to the
-* video memory from protected mode. Compile and link with
-* the appropriate command line for your DOS extender.
-*
-* Functions tested: PM_getBIOSSelector()
-* PM_mapPhysicalAddr()
-* PM_int86()
-*
-****************************************************************************/
-
-#include <stdlib.h>
-#include <stdio.h>
-#include "pmapi.h"
-
-uchar *bios; /* Pointer to BIOS data area */
-uchar *videoPtr; /* Pointer to VGA framebuffer */
-void *stateBuf; /* Console state save buffer */
-
-/* Routine to return the current video mode number */
-
-int getVideoMode(void)
-{
- return PM_getByte(bios+0x49);
-}
-
-/* Routine to set a specified video mode */
-
-void setVideoMode(int mode)
-{
- RMREGS r;
-
- r.x.ax = mode;
- PM_int86(0x10, &r, &r);
-}
-
-/* Routine to clear a rectangular region on the display by calling the
- * video BIOS.
- */
-
-void clearScreen(int startx, int starty, int endx, int endy, unsigned char attr)
-{
- RMREGS r;
-
- r.x.ax = 0x0600;
- r.h.bh = attr;
- r.h.cl = startx;
- r.h.ch = starty;
- r.h.dl = endx;
- r.h.dh = endy;
- PM_int86(0x10, &r, &r);
-}
-
-/* Routine to fill a rectangular region on the display using direct
- * video writes.
- */
-
-#define SCREEN(x,y) (videoPtr + ((y) * 160) + ((x) << 1))
-
-void fill(int startx, int starty, int endx, int endy, unsigned char c,
- unsigned char attr)
-{
- unsigned char *v;
- int x,y;
-
- for (y = starty; y <= endy; y++) {
- v = SCREEN(startx,y);
- for (x = startx; x <= endx; x++) {
- *v++ = c;
- *v++ = attr;
- }
- }
-}
-
-/* Routine to display a single character using direct video writes */
-
-void writeChar(int x, int y, unsigned char c, unsigned char attr)
-{
- unsigned char *v = SCREEN(x,y);
- *v++ = c;
- *v = attr;
-}
-
-/* Routine to draw a border around a rectangular area using direct video
- * writes.
- */
-
-static unsigned char border_chars[] = {
- 186, 205, 201, 187, 200, 188 /* double box chars */
- };
-
-void border(int startx, int starty, int endx, int endy, unsigned char attr)
-{
- unsigned char *v;
- unsigned char *b;
- int i;
-
- b = border_chars;
-
- for (i = starty+1; i < endy; i++) {
- writeChar(startx, i, *b, attr);
- writeChar(endx, i, *b, attr);
- }
- b++;
- for (i = startx+1, v = SCREEN(startx+1, starty); i < endx; i++) {
- *v++ = *b;
- *v++ = attr;
- }
- for (i = startx+1, v = SCREEN(startx+1, endy); i < endx; i++) {
- *v++ = *b;
- *v++ = attr;
- }
- b++;
- writeChar(startx, starty, *b++, attr);
- writeChar(endx, starty, *b++, attr);
- writeChar(startx, endy, *b++, attr);
- writeChar(endx, endy, *b++, attr);
-}
-
-int main(void)
-{
- int orgMode;
- PM_HWND hwndConsole;
-
- printf("Program running in ");
- switch (PM_getModeType()) {
- case PM_realMode:
- printf("real mode.\n\n");
- break;
- case PM_286:
- printf("16 bit protected mode.\n\n");
- break;
- case PM_386:
- printf("32 bit protected mode.\n\n");
- break;
- }
-
- hwndConsole = PM_openConsole(0,0,0,0,0,true);
- printf("Hit any key to start 80x25 text mode and perform some direct video output.\n");
- PM_getch();
-
- /* Allocate a buffer to save console state and save the state */
- if ((stateBuf = PM_malloc(PM_getConsoleStateSize())) == NULL) {
- printf("Unable to allocate console state buffer!\n");
- exit(1);
- }
- PM_saveConsoleState(stateBuf,0);
- bios = PM_getBIOSPointer();
- orgMode = getVideoMode();
- setVideoMode(0x3);
- if ((videoPtr = PM_mapPhysicalAddr(0xB8000,0xFFFF,true)) == NULL) {
- printf("Unable to obtain pointer to framebuffer!\n");
- exit(1);
- }
-
- /* Draw some text on the screen */
- fill(0, 0, 79, 24, 176, 0x1E);
- border(0, 0, 79, 24, 0x1F);
- PM_getch();
- clearScreen(0, 0, 79, 24, 0x7);
-
- /* Restore the console state on exit */
- PM_restoreConsoleState(stateBuf,0);
- PM_free(stateBuf);
- PM_closeConsole(hwndConsole);
-
- /* Display useful status information */
- printf("\n");
- printf("Original Video Mode = %02X\n", orgMode);
- printf("BIOS Pointer = %08X\n", (int)bios);
- printf("Video Memory = %08X\n", (int)videoPtr);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/cpuinfo.c
deleted file mode 100644
index 3460b72..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/cpuinfo.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: VDD specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Do nothing for VDD's
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for VDD's
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 100000;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- ULONG count; \
- count = VDHQuerySysValue(0, VDHGSV_MSECSBOOT); \
- (t)->low = count * 100; \
- (t)->high = 0; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c
deleted file mode 100644
index 93742de..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c
+++ /dev/null
@@ -1,359 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: C library compatible I/O functions for use within a VDD.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "vddfile.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-#define EOF -1
-
-/* NB: none of the file VDHs are available during the DOS session */
-/* initialzation context! */
-
-/* Macros for Open/Close APIs to allow using this module in both VDDs and */
-/* normal OS/2 applications. Unfortunately VDHRead/Write/Seek don't map to */
-/* their Dos* counterparts so cleanly. */
-#ifdef __OS2_VDD__
-#define _OS2Open VDHOpen
-#define _OS2Close VDHClose
-#else
-#define _OS2Open DosOpen
-#define _OS2Close DosClose
-#endif
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fopen function.
-****************************************************************************/
-FILE * fopen(
- const char *filename,
- const char *mode)
-{
- FILE *f = PM_malloc(sizeof(FILE));
- long oldpos;
- ULONG rc, ulAction;
- ULONG omode, oflags;
-
- if (f != NULL) {
- f->offset = 0;
- f->text = (mode[1] == 't' || mode[2] == 't');
- f->writemode = (mode[0] == 'w') || (mode[0] == 'a');
- f->unputc = EOF;
- f->endp = f->buf + sizeof(f->buf);
- f->curp = f->startp = f->buf;
-
- if (mode[0] == 'r') {
- #ifdef __OS2_VDD__
- omode = VDHOPEN_ACCESS_READONLY | VDHOPEN_SHARE_DENYNONE;
- oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_FAIL_IF_NEW;
- #else
- omode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE;
- oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_FAIL_IF_NEW;
- #endif
- }
- else if (mode[0] == 'w') {
- #ifdef __OS2_VDD__
- omode = VDHOPEN_ACCESS_WRITEONLY | VDHOPEN_SHARE_DENYWRITE;
- oflags = VDHOPEN_ACTION_REPLACE_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW;
- #else
- omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE;
- oflags = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- #endif
- }
- else {
- #ifdef __OS2_VDD__
- omode = VDHOPEN_ACCESS_READWRITE | VDHOPEN_SHARE_DENYWRITE;
- oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW;
- #else
- omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE;
- oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW;
- #endif
- }
- rc = _OS2Open((PSZ)filename, (PHFILE)&f->handle, &ulAction, 0, VDHOPEN_FILE_NORMAL, oflags, omode, NULL);
- if (rc != 0) {
- PM_free(f);
- return NULL;
- }
-
- #ifdef __OS2_VDD__
- f->filesize = VDHSeek((HFILE)f->handle, 0, VDHSK_END_OF_FILE);
- #else
- rc = DosSetFilePtr((HFILE)f->handle, 0, FILE_END, &f->filesize);
- #endif
-
- if (mode[0] == 'a')
- fseek(f,0,2);
- }
- return f;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fread function. Note that unlike Windows VxDs,
-OS/2 VDDs are not limited to 64K reads or writes.
-****************************************************************************/
-size_t fread(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- char *buf = ptr;
- int bytes,readbytes,totalbytes = 0;
-
- /* First copy any data already read into our buffer */
- if ((bytes = (f->curp - f->startp)) > 0) {
- memcpy(buf,f->curp,bytes);
- f->startp = f->curp = f->buf;
- buf += bytes;
- totalbytes += bytes;
- bytes = (size * n) - bytes;
- }
- else
- bytes = size * n;
- if (bytes) {
- #ifdef __OS2_VDD__
- readbytes = VDHRead((HFILE)f->handle, buf, bytes);
- #else
- DosRead((HFILE)f->handle, buf, bytes, &readbytes);
- #endif
- totalbytes += readbytes;
- f->offset += readbytes;
- }
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fwrite function.
-****************************************************************************/
-size_t fwrite(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- char *buf = ptr;
- int bytes,writtenbytes,totalbytes = 0;
-
- /* Flush anything already in the buffer */
- if (!f->writemode)
- return 0;
- fflush(f);
- bytes = size * n;
- #ifdef __OS2_VDD__
- writtenbytes = VDHWrite((HFILE)f->handle, buf, bytes);
- #else
- DosWrite((HFILE)f->handle, buf, bytes, &writtenbytes);
- #endif
- totalbytes += writtenbytes;
- f->offset += writtenbytes;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fflush function.
-****************************************************************************/
-int fflush(
- FILE *f)
-{
- ULONG bytes;
-
- /* First copy any data already written into our buffer */
- if (f->writemode && (bytes = (f->curp - f->startp)) > 0) {
- #ifdef __OS2_VDD__
- bytes = VDHWrite((HFILE)f->handle, f->startp, bytes);
- #else
- DosWrite((HFILE)f->handle, f->startp, bytes, &bytes);
- #endif
- f->offset += bytes;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- f->startp = f->curp = f->buf;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C fseek function.
-****************************************************************************/
-int fseek(
- FILE *f,
- long int offset,
- int whence)
-{
- fflush(f);
-
- if (whence == 0)
- f->offset = offset;
- else if (whence == 1)
- f->offset += offset;
- else if (whence == 2)
- f->offset = f->filesize + offset;
-
- #ifdef __OS2_VDD__
- VDHSeek((HFILE)f->handle, f->offset, VDHSK_ABSOLUTE);
- #else
- DosSetFilePtr((HFILE)f->handle, f->offset, FILE_BEGIN, NULL);
- #endif
-
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C ftell function.
-****************************************************************************/
-long ftell(
- FILE *f)
-{
- long offset;
-
- offset = (f->curp - f->startp);
- offset += f->offset;
- return offset;
-}
-
-/****************************************************************************
-REMARKS:
-VDD implementation of the ANSI C feof function.
-****************************************************************************/
-int feof(
- FILE *f)
-{
- return (f->offset == f->filesize);
-}
-
-/****************************************************************************
-REMARKS:
-Read a single character from the input file buffer, including translation
-of the character in text transation modes.
-****************************************************************************/
-static int __getc(
- FILE *f)
-{
- int c;
-
- if (f->unputc != EOF) {
- c = f->unputc;
- f->unputc = EOF;
- }
- else {
- if (f->startp == f->curp) {
- int bytes = fread(f->buf,1,sizeof(f->buf),f);
- if (bytes == 0)
- return EOF;
- f->curp = f->startp + bytes;
- }
- c = *f->startp++;
- if (f->text && c == '\r') {
- int nc = __getc(f);
- if (nc != '\n')
- f->unputc = nc;
- }
- }
- return c;
-}
-
-/****************************************************************************
-REMARKS:
-Write a single character from to input buffer, including translation of the
-character in text transation modes.
-****************************************************************************/
-static int __putc(int c,FILE *f)
-{
- int count = 1;
- if (f->text && c == '\n') {
- __putc('\r',f);
- count = 2;
- }
- if (f->curp == f->endp)
- fflush(f);
- *f->curp++ = c;
- return count;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fgets function.
-****************************************************************************/
-char *fgets(
- char *s,
- int n,
- FILE *f)
-{
- int c = 0;
- char *cs;
-
- cs = s;
- while (--n > 0 && (c = __getc(f)) != EOF) {
- *cs++ = c;
- if (c == '\n')
- break;
- }
- if (c == EOF && cs == s)
- return NULL;
- *cs = '\0';
- return s;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fputs function.
-****************************************************************************/
-int fputs(
- const char *s,
- FILE *f)
-{
- int r = 0;
- int c;
-
- while ((c = *s++) != 0)
- r = __putc(c, f);
- return r;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fclose function.
-****************************************************************************/
-int fclose(
- FILE *f)
-{
- fflush(f);
- _OS2Close((HFILE)f->handle);
- PM_free(f);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/vdd/oshdr.h
deleted file mode 100644
index 03286bd..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c
deleted file mode 100644
index 6688bab..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c
+++ /dev/null
@@ -1,1050 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-
-#define TRACE(a)
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define MAX_MEMORY_SHARED 100
-#define MAX_MEMORY_MAPPINGS 100
-
-/* TODO: I think the global and linear members will be the same, but not sure yet. */
-typedef struct {
- void *linear;
- ulong global;
- ulong length;
- int npages;
- } memshared;
-
-typedef struct {
- ulong physical;
- ulong linear;
- ulong length;
- int npages;
- ibool isCached;
- } mmapping;
-
-static int numMappings = 0;
-static memshared shared[MAX_MEMORY_MAPPINGS] = {0};
-static mmapping maps[MAX_MEMORY_MAPPINGS];
-ibool _PM_haveBIOS = TRUE;
-char _PM_cntPath[PM_MAX_PATH] = ""; /* there just isn't any */
-uchar *_PM_rmBufAddr = NULL;
-ushort _VARAPI PM_savedDS = 0; /* why can't I use the underscore prefix? */
-
-HVDHSEM hevFarCallRet = NULL;
-HVDHSEM hevIRet = NULL;
-HHOOK hhookUserReturnHook = NULL;
-HHOOK hhookUserIRetHook = NULL;
-
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Functions to read and write CMOS registers */
-
-ulong PMAPI _PM_getPDB(void);
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-VOID HOOKENTRY UserReturnHook(PVOID pRefData, PCRF pcrf);
-VOID HOOKENTRY UserIRetHook(PVOID pRefData, PCRF pcrf);
-
-void PMAPI PM_init(void)
-{
- MTRR_init();
-
- /* Initialize VDD-specific data */
- /* Note: PM_init must be (obviously) called in VDM task context! */
- VDHCreateSem(&hevFarCallRet, VDH_EVENTSEM);
- VDHCreateSem(&hevIRet, VDH_EVENTSEM);
- hhookUserReturnHook = VDHAllocHook(VDH_RETURN_HOOK, (PFNARM)UserReturnHook, 0);
- hhookUserIRetHook = VDHAllocHook(VDH_RETURN_HOOK, (PFNARM)UserIRetHook, 0);
-
- if ((hevIRet == NULL) || (hevFarCallRet == NULL) ||
- (hhookUserReturnHook == NULL) || (hhookUserIRetHook == NULL)) {
- /* something failed, we can't go on */
- /* TODO: take some action here! */
- }
-}
-
-/* Do some cleaning up */
-void PMAPI PM_exit(void)
-{
- /* Note: Hooks allocated during or after VDM creation are deallocated automatically */
- if (hevIRet != NULL)
- VDHDestroySem(hevIRet);
-
- if (hevFarCallRet != NULL)
- VDHDestroySem(hevFarCallRet);
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return _PM_haveBIOS; }
-
-long PMAPI PM_getOSType(void)
-{ return /*_OS_OS2VDD*/ _OS_OS2; } /*FIX!! */
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
-/* Fatal_Error_Handler(msg,0); TODO: implement somehow! */
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Place to store the length of the buffer
-rseg - Place to store the real mode segment of the buffer
-roff - Place to store the real mode offset of the buffer
-
-REMARKS:
-This function returns the address and length of the global VESA transfer
-buffer.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- if (_PM_rmBufAddr) {
- *len = 0; /*VESA_BUF_SIZE; */
- *rseg = (ulong)(_PM_rmBufAddr) >> 4;
- *roff = (ulong)(_PM_rmBufAddr) & 0xF;
- return _PM_rmBufAddr;
- }
- return NULL;
-}
-
-int PMAPI PM_int386(int intno, PMREGS *in, PMREGS *out)
-{
- /* Unused in VDDs */
- return 0;
-}
-
-char * PMAPI PM_getCurrentPath(char *path,int maxLen)
-{
- strncpy(path, _PM_cntPath, maxLen);
- path[maxLen - 1] = 0;
- return path;
-}
-
-char PMAPI PM_getBootDrive(void)
-{
- ulong boot = 3;
- boot = VDHQuerySysValue(0, VDHGSV_BOOTDRV);
- return (char)('a' + boot - 1);
-}
-
-const char * PMAPI PM_getVBEAFPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,"x:\\");
- path[0] = PM_getBootDrive();
- return path;
-}
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[CCHMAXPATH];
- strcpy(path,"x:\\os2\\drivers");
- path[0] = PM_getBootDrive();
- PM_backslash(path);
- strcat(path,"nucleus");
- return path;
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return PM_getMachineName(); }
-
-const char * PMAPI PM_getMachineName(void)
-{
- return "Unknown";
-}
-
-int PMAPI PM_kbhit(void)
-{ return 1; }
-
-int PMAPI PM_getch(void)
-{ return 0; }
-
-PM_HWND PMAPI PM_openConsole(PM_HWND hwndUser,int device,int xRes,int yRes,int bpp,ibool fullScreen)
-{
- /* Unused in VDDs */
- return NULL;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Unused in VDDs */
- return 1;
-}
-
-void PMAPI PM_saveConsoleState(void *stateBuf,PM_HWND hwndConsole)
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_setSuspendAppCallback(int (_ASMAPIP saveState)(int flags))
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_restoreConsoleState(const void *stateBuf,PM_HWND hwndConsole)
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_closeConsole(PM_HWND hwndConsole)
-{
- /* Unused in VDDs */
-}
-
-void PMAPI PM_setOSCursorLocation(int x,int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PMAPI PM_setOSScreenWidth(int width,int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x4A,width);
- PM_setByte(_biosPtr+0x84,height-1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For OS/2 VDD we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(long size)
-{
- ULONG nPages = (size + 0xFFF) >> 12;
- int i;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == 0)
- break;
- }
- if (i < MAX_MEMORY_SHARED) {
- shared[i].linear = VDHAllocPages(NULL, nPages, VDHAP_SYSTEM | VDHAP_FIXED);
- shared[i].npages = nPages;
- shared[i].global = (ULONG)shared[i].linear;
- return (void*)shared[i].global;
- }
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory
-****************************************************************************/
-void PMAPI PM_freeShared(void *p)
-{
- int i;
-
- /* Find a shared memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].global == (ulong)p) {
- VDHFreePages(shared[i].linear);
- shared[i].linear = 0;
- break;
- }
- }
-}
-
-void * PMAPI PM_mapToProcess(void *base,ulong limit)
-{ return (void*)base; }
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* TODO: Figure out how to do this */
- return false;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{ return (void*)0x400; }
-
-void * PMAPI PM_getA0000Pointer(void)
-{ return PM_mapPhysicalAddr(0xA0000,0xFFFF,true); }
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-Maps a physical memory range to a linear memory range.
-****************************************************************************/
-ulong MapPhysicalToLinear(
- ulong base,
- ulong limit,
- int *npages)
-{
- ulong linear,length = limit+1;
- int i,ppage,flags;
-#if 0
- ppage = base >> 12;
- *npages = (length + (base & 0xFFF) + 4095) >> 12;
- flags = PR_FIXED | PR_STATIC;
- if (base == 0xA0000) {
- /* We require the linear address to be aligned to a 64Kb boundary
- * for mapping the banked framebuffer (so we can do efficient
- * carry checking for bank changes in the assembler code). The only
- * way to ensure this is to force the linear address to be aligned
- * to a 4Mb boundary.
- */
- flags |= PR_4MEG;
- }
- if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1)
- return 0;
- if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE))
- return 0;
-#endif
- return linear + (base & 0xFFF);
-}
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to map in
-limit - Limit of physical memory to region to map in
-isCached - True if the memory should be cached, false if not
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-This function maps physical memory to linear memory, which can then be used
-to create a selector or used directly from 32-bit protected mode programs.
-This is better than DPMI 0x800, since it allows you to maps physical
-memory below 1Mb, which gets this memory out of the way of the Windows VxD's
-sticky paws.
-
-NOTE: If the memory is not expected to be cached, this function will
- directly re-program the PCD (Page Cache Disable) bit in the
- page tables. There does not appear to be a mechanism in the VMM
- to control this bit via the regular interface.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong linear,length = limit+1;
- int i,npages;
- ulong PDB,*pPDB;
-
- /* Search table of existing mappings to see if we have already mapped
- * a region of memory that will serve this purpose.
- */
- for (i = 0; i < numMappings; i++) {
- if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached)
- return (void*)maps[i].linear;
- }
- if (numMappings == MAX_MEMORY_MAPPINGS)
- return NULL;
-
- /* We did not find any previously mapped memory region, so map it in.
- * Note that we do not use MapPhysToLinear, since this function appears
- * to have problems mapping memory in the 1Mb physical address space.
- * Hence we use PageReserve and PageCommitPhys.
- */
- if ((linear = MapPhysicalToLinear(base,limit,&npages)) == 0)
- return NULL;
- maps[numMappings].physical = base;
- maps[numMappings].length = length;
- maps[numMappings].linear = linear;
- maps[numMappings].npages = npages;
- maps[numMappings].isCached = isCached;
- numMappings++;
-
-#if 0
- /* Finally disable caching where necessary */
- if (!isCached && (PDB = _PM_getPDB()) != 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable;
-
- if (PDB >= 0x100000)
- pPDB = (ulong*)MapPhysicalToLinear(PDB,0xFFF,&npages);
- else
- pPDB = (ulong*)PDB;
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- pageTable = pPDB[iPDB] & ~0xFFF;
- if (pageTable >= 0x100000)
- pPageTable = (ulong*)MapPhysicalToLinear(pageTable,0xFFF,&npages);
- else
- pPageTable = (ulong*)pageTable;
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] |= 0x10;
- PageFree((ulong)pPageTable,PR_STATIC);
- }
- PageFree((ulong)pPDB,PR_STATIC);
- }
- }
-#endif
- return (void*)linear;
-}
-
-void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit)
-{
- /* We never free the mappings */
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* We never sleep in a VDD */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-ulong PMAPI PM_getPhysicalAddr(void *p)
-{
- /* TODO: This function should find the physical address of a linear */
- /* address. */
- return 0xFFFFFFFFUL;
-}
-
-void PMAPI _PM_freeMemoryMappings(void)
-{
- int i;
-/* for (i = 0; i < numMappings; i++) */
-/* PageFree(maps[i].linear,PR_STATIC); */
-}
-
-void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off)
-{ return (void*)MK_PHYS(r_seg,r_off); }
-
-void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off)
-{ return NULL; }
-
-void PMAPI PM_freeRealSeg(void *mem)
-{ }
-
-void PMAPI DPMI_int86(int intno, DPMI_regs *regs)
-{
- /* Unsed in VDDs */
-}
-
-/****************************************************************************
-REMARKS:
-Load the V86 registers in the client state, and save the original state
-before loading the registers.
-****************************************************************************/
-static void LoadV86Registers(
- PCRF saveRegs,
- RMREGS *in,
- RMSREGS *sregs)
-{
- PCRF pcrf; /* current client register frame */
-
- /* get pointer to registers */
- pcrf = (PCRF)VDHQuerySysValue(CURRENT_VDM, VDHLSV_PCRF);
-
- /* Note: We could do VDHPushRegs instead but this should be safer as it */
- /* doesn't rely on the VDM session having enough free stack space. */
- *saveRegs = *pcrf; /* save all registers */
-
- pcrf->crf_eax = in->e.eax; /* load new values */
- pcrf->crf_ebx = in->e.ebx;
- pcrf->crf_ecx = in->e.ecx;
- pcrf->crf_edx = in->e.edx;
- pcrf->crf_esi = in->e.esi;
- pcrf->crf_edi = in->e.edi;
- pcrf->crf_es = sregs->es;
- pcrf->crf_ds = sregs->ds;
-
-}
-
-/****************************************************************************
-REMARKS:
-Read the V86 registers from the client state and restore the original state.
-****************************************************************************/
-static void ReadV86Registers(
- PCRF saveRegs,
- RMREGS *out,
- RMSREGS *sregs)
-{
- PCRF pcrf; /* current client register frame */
-
- /* get pointer to registers */
- pcrf = (PCRF)VDHQuerySysValue(CURRENT_VDM, VDHLSV_PCRF);
-
- /* read new register values */
- out->e.eax = pcrf->crf_eax;
- out->e.ebx = pcrf->crf_ebx;
- out->e.ecx = pcrf->crf_ecx;
- out->e.edx = pcrf->crf_edx;
- out->e.esi = pcrf->crf_esi;
- out->e.edi = pcrf->crf_edi;
- sregs->es = pcrf->crf_es;
- sregs->ds = pcrf->crf_ds;
-
- /* restore original client registers */
- *pcrf = *saveRegs;
-}
-
-/****************************************************************************
-REMARKS: Used for far calls into V86 code
-****************************************************************************/
-VOID HOOKENTRY UserReturnHook(
- PVOID pRefData,
- PCRF pcrf )
-{
- VDHPostEventSem(hevFarCallRet);
-}
-
-/****************************************************************************
-REMARKS: Used for calling BIOS interrupts
-****************************************************************************/
-VOID HOOKENTRY UserIRetHook(
- PVOID pRefData,
- PCRF pcrf )
-{
- VDHPostEventSem(hevIRet);
-}
-
-/****************************************************************************
-REMARKS:
-Call a V86 real mode function with the specified register values
-loaded before the call. The call returns with a far ret.
-Must be called from within a DOS session context!
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- CRF saveRegs;
- FPFN fnAddress;
- ULONG rc;
-
- TRACE("SDDHELP: Entering PM_callRealMode()\n");
- LoadV86Registers(SSToDS(&saveRegs),regs,sregs);
-
- /* set up return hook for call */
- rc = VDHArmReturnHook(hhookUserReturnHook, VDHARH_CSEIP_HOOK);
-
- VDHResetEventSem(hevFarCallRet);
-
- /* the address is a 16:32 pointer */
- OFFSETOF32(fnAddress) = off;
- SEGMENTOF32(fnAddress) = seg;
- rc = VDHPushFarCall(fnAddress);
- VDHYield(0);
-
- /* wait until the V86 call returns - our return hook posts the semaphore */
- rc = VDHWaitEventSem(hevFarCallRet, SEM_INDEFINITE_WAIT);
-
- ReadV86Registers(SSToDS(&saveRegs),regs,sregs);
- TRACE("SDDHELP: Exiting PM_callRealMode()\n");
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-Must be called from within a DOS session context!
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- RMSREGS sregs = {0};
- CRF saveRegs;
- ushort oldDisable;
- ULONG rc;
-
- memset(SSToDS(&sregs), 0, sizeof(sregs));
-
-#if 0 /* do we need this?? */
- /* Disable pass-up to our VDD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
-#endif
-
- LoadV86Registers(SSToDS(&saveRegs), in, SSToDS(&sregs));
-
- VDHResetEventSem(hevIRet);
- rc = VDHPushInt(intno);
-
- /* set up return hook for interrupt */
- rc = VDHArmReturnHook(hhookUserIRetHook, VDHARH_NORMAL_IRET);
-
- VDHYield(0);
-
- /* wait until the V86 IRETs - our return hook posts the semaphore */
- rc = VDHWaitEventSem(hevIRet, 5000); /*SEM_INDEFINITE_WAIT); */
-
- ReadV86Registers(SSToDS(&saveRegs), out, SSToDS(&sregs));
-
-#if 0
- /* Re-enable pass-up to our VDD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-#endif
-
- TRACE("SDDHELP: Exiting PM_int86()\n");
- return out->x.ax;
-
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- CRF saveRegs;
- ushort oldDisable;
- ULONG rc;
-
-#if 0
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- TRACE("SDDHELP: Entering PM_int86x()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
-#endif
- LoadV86Registers(SSToDS(&saveRegs), in, sregs);
-
- VDHResetEventSem(hevIRet);
- rc = VDHPushInt(intno);
-
- /* set up return hook for interrupt */
- rc = VDHArmReturnHook(hhookUserIRetHook, VDHARH_NORMAL_IRET);
-
- VDHYield(0);
-
- /* wait until the V86 IRETs - our return hook posts the semaphore */
- rc = VDHWaitEventSem(hevIRet, 5000); /*SEM_INDEFINITE_WAIT); */
-
- ReadV86Registers(SSToDS(&saveRegs), out, sregs);
-
-#if 0
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-#endif
-
- TRACE("SDDHELP: Exiting PM_int86x()\n");
- return out->x.ax;
-}
-
-void PMAPI PM_availableMemory(ulong *physical,ulong *total)
-{ *physical = *total = 0; }
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked physical memory.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- ULONG flags = VDHAP_SYSTEM;
- ULONG nPages = (size + 0xFFF) >> 12;
-
- flags |= (physAddr != NULL) ? VDHAP_PHYSICAL : VDHAP_FIXED;
-
- return VDHAllocPages(physAddr, nPages, VDHAP_SYSTEM | VDHAP_PHYSICAL);
-}
-
-/****************************************************************************
-REMARKS:
-Frees a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- if (p)
- VDHFreePages((PVOID)p);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- ULONG lockHandle;
-
- /* TODO: the lock handle is essential for the unlock operation!! */
- lockHandle = VDHLockMem(p, len, 0, (PVOID)VDHLM_NO_ADDR, NULL);
-
- if (lockHandle != NULL)
- return 0;
- else
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- /* TODO: implement - use a table of lock handles? */
- /* VDHUnlockPages(lockHandle); */
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return PM_lockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- return PM_unlockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VDD
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VDD
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VDD
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- /* Not applicable in a VDD */
- (void)drive;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* Not applicable in a VDD */
- (void)drive;
- (void)dir;
- (void)len;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Implement this ? */
- (void)filename;
- (void)attrib;
- PM_fatalError("PM_setFileAttr not implemented!");
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this ? */
- (void)filename;
- PM_fatalError("PM_getFileAttr not implemented!");
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- /* TODO: Implement this ? */
- (void)filename;
- PM_fatalError("PM_mkdir not implemented!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- /* TODO: Implement this ? */
- (void)filename;
- PM_fatalError("PM_rmdir not implemented!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this ? */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_getFileTime not implemented!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this ? */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_setFileTime not implemented!");
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c
deleted file mode 100644
index 2163928..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/ztimer.c
deleted file mode 100644
index 631f655..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vdd/ztimer.c
+++ /dev/null
@@ -1,103 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit OS/2 VDD
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ulong frequency = 1193180;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-#define __ZTimerInit()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) VTD_Get_Real_Time(&tm->start.high,&tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger lap,count;
- VTD_Get_Real_Time(&lap.high,&lap.low);
- _CPU_diffTime64(&tm->start,&lap,&count);
- return _CPU_calcMicroSec(&count,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) VTD_Get_Real_Time(&tm->end.high,&tm->end.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- return VDHQuerySysValue(0, VDHGSV_MSECSBOOT);
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/_pm.asm b/board/MAI/bios_emulator/scitech/src/pm/vxd/_pm.asm
deleted file mode 100644
index 64a7cec..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/_pm.asm
+++ /dev/null
@@ -1,299 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: 32-bit Windows VxD
-;*
-;* Description: Low level assembly support for the PM library specific to
-;* Windows VxDs.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pm ; Set up memory model
-
-begdataseg _pm
-
- cextern _PM_savedDS,USHORT
-
-enddataseg _pm
-
-P586
-
-begcodeseg _pm ; Start of code segment
-
-;----------------------------------------------------------------------------
-; void PM_segread(PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Read the current value of all segment registers
-;----------------------------------------------------------------------------
-cprocstart PM_segread
-
- ARG sregs:DPTR
-
- enter_c
-
- mov ax,es
- _les _si,[sregs]
- mov [_ES _si],ax
- mov [_ES _si+2],cs
- mov [_ES _si+4],ss
- mov [_ES _si+6],ds
- mov [_ES _si+8],fs
- mov [_ES _si+10],gs
-
- leave_c
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; int PM_int386x(int intno, PMREGS *in, PMREGS *out,PMSREGS *sregs)
-;----------------------------------------------------------------------------
-; Issues a software interrupt in protected mode. This routine has been
-; written to allow user programs to load CS and DS with different values
-; other than the default.
-;----------------------------------------------------------------------------
-cprocstart PM_int386x
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_saveDS(void)
-;----------------------------------------------------------------------------
-; Save the value of DS into a section of the code segment, so that we can
-; quickly load this value at a later date in the PM_loadDS() routine from
-; inside interrupt handlers etc. The method to do this is different
-; depending on the DOS extender being used.
-;----------------------------------------------------------------------------
-cprocstart PM_saveDS
-
- mov [_PM_savedDS],ds ; Store away in data segment
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_loadDS(void)
-;----------------------------------------------------------------------------
-; Routine to load the DS register with the default value for the current
-; DOS extender. Only the DS register is loaded, not the ES register, so
-; if you wish to call C code, you will need to also load the ES register
-; in 32 bit protected mode.
-;----------------------------------------------------------------------------
-cprocstart PM_loadDS
-
- mov ds,[cs:_PM_savedDS] ; We can access the proper DS through CS
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankA(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankA
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setBankAB(int bank)
-;----------------------------------------------------------------------------
-cprocstart PM_setBankAB
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void PM_setCRTStart(int x,int y,int waitVRT)
-;----------------------------------------------------------------------------
-cprocstart PM_setCRTStart
-
-; Not used for VxDs
-
- ret
-
-cprocend
-
-; Macro to delay briefly to ensure that enough time has elapsed between
-; successive I/O accesses so that the device being accessed can respond
-; to both accesses even on a very fast PC.
-
-ifdef USE_NASM
-%macro DELAY 0
- jmp short $+2
- jmp short $+2
- jmp short $+2
-%endmacro
-%macro IODELAYN 1
-%rep %1
- DELAY
-%endrep
-%endmacro
-else
-macro DELAY
- jmp short $+2
- jmp short $+2
- jmp short $+2
-endm
-macro IODELAYN N
- rept N
- DELAY
- endm
-endm
-endif
-
-;----------------------------------------------------------------------------
-; uchar _PM_readCMOS(int index)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_readCMOS
-
- ARG index:UINT
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- in al,71h
- mov ah,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- mov al,ah ; Return value in AL
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; void _PM_writeCMOS(int index,uchar value)
-;----------------------------------------------------------------------------
-; Read the value of a specific CMOS register. We do this with both
-; normal interrupts and NMI disabled.
-;----------------------------------------------------------------------------
-cprocstart _PM_writeCMOS
-
- ARG index:UINT, value:UCHAR
-
- push _bp
- mov _bp,_sp
- pushfd
- mov al,[BYTE index]
- or al,80h ; Add disable NMI flag
- cli
- out 70h,al
- IODELAYN 5
- mov al,[value]
- out 71h,al
- xor al,al
- IODELAYN 5
- out 70h,al ; Re-enable NMI
- popfd
- pop _bp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; double _ftol(double f)
-;----------------------------------------------------------------------------
-; Calls to __ftol are generated by the Borland C++ compiler for code
-; that needs to convert a floating point type to an integral type.
-;
-; Input: floating point number on the top of the '87.
-;
-; Output: a (signed or unsigned) long in EAX
-; All other registers preserved.
-;-----------------------------------------------------------------------
-cprocstart _ftol
-
- LOCAL temp1:WORD, temp2:QWORD = LocalSize
-
- push ebp
- mov ebp,esp
- sub esp,LocalSize
-
- fstcw [temp1] ; save the control word
- fwait
- mov al,[BYTE temp1+1]
- or [BYTE temp1+1],0Ch ; set rounding control to chop
- fldcw [temp1]
- fistp [temp2] ; convert to 64-bit integer
- mov [BYTE temp1+1],al
- fldcw [temp1] ; restore the control word
- mov eax,[DWORD temp2] ; return LS 32 bits
- mov edx,[DWORD temp2+4] ; MS 32 bits
-
- mov esp,ebp
- pop ebp
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; _PM_getPDB - Return the Page Table Directory Base address
-;----------------------------------------------------------------------------
-cprocstart _PM_getPDB
-
- mov eax,cr3
- and eax,0FFFFF000h
- ret
-
-cprocend
-
-;----------------------------------------------------------------------------
-; Flush the Translation Lookaside buffer
-;----------------------------------------------------------------------------
-cprocstart PM_flushTLB
-
- wbinvd ; Flush the CPU cache
- mov eax,cr3
- mov cr3,eax ; Flush the TLB
- ret
-
-cprocend
-
-endcodeseg _pm
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/cpuinfo.c
deleted file mode 100644
index 3c7eaae..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/cpuinfo.c
+++ /dev/null
@@ -1,66 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: VxD specific code for the CPU detection module.
-*
-****************************************************************************/
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define SetMaxThreadPriority() 0
-
-/****************************************************************************
-REMARKS:
-Do nothing for VxD's
-****************************************************************************/
-#define RestoreThreadPriority(i) (void)(i)
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- freq->low = 1193180;
- freq->high = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- CPU_largeInteger count; \
- VTD_Get_Real_Time(&count.high,&count.low); \
- (t)->low = count.low; \
- (t)->high = count.high; \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c
deleted file mode 100644
index 3c6ce99..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c
+++ /dev/null
@@ -1,304 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: C library compatible I/O functions for use within a VxD.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "vxdfile.h"
-
-/*------------------------ Main Code Implementation -----------------------*/
-
-#define EOF -1
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fopen function.
-****************************************************************************/
-FILE * fopen(
- const char *filename,
- const char *mode)
-{
- FILE *f = PM_malloc(sizeof(FILE));
- long oldpos;
-
- if (f) {
- f->offset = 0;
- f->text = (mode[1] == 't' || mode[2] == 't');
- f->writemode = (mode[0] == 'w') || (mode[0] == 'a');
- if (initComplete) {
- WORD omode,error;
- BYTE action;
-
- if (mode[0] == 'r') {
- omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE;
- action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL;
- }
- else if (mode[0] == 'w') {
- omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE;
- action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE;
- }
- else {
- omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE;
- action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE;
- }
- f->handle = (int)R0_OpenCreateFile(false,(char*)filename,omode,ATTR_NORMAL,action,0,&error,&action);
- if (f->handle == 0) {
- PM_free(f);
- return NULL;
- }
- f->filesize = R0_GetFileSize((HANDLE)f->handle,&error);
- if (mode[0] == 'a')
- fseek(f,0,2);
- }
- else {
- int oflag,pmode;
-
- if (mode[0] == 'r') {
- pmode = _S_IREAD;
- oflag = _O_RDONLY;
- }
- else if (mode[0] == 'w') {
- pmode = _S_IWRITE;
- oflag = _O_WRONLY | _O_CREAT | _O_TRUNC;
- }
- else {
- pmode = _S_IWRITE;
- oflag = _O_RDWR | _O_CREAT | _O_APPEND;
- }
- if (f->text)
- oflag |= _O_TEXT;
- else
- oflag |= _O_BINARY;
- if ((f->handle = i_open(filename,oflag,pmode)) == -1) {
- PM_free(f);
- return NULL;
- }
- oldpos = i_lseek(f->handle,0,1);
- f->filesize = i_lseek(f->handle,0,2);
- i_lseek(f->handle,oldpos,0);
- }
- }
- return f;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fread function. Note that the VxD file I/O
-functions are layered on DOS, so can only read up to 64K at a time. Since
-we are expected to handle much larger chunks than this, we handle larger
-blocks automatically in here.
-****************************************************************************/
-size_t fread(
- void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- char *buf = ptr;
- WORD error;
- int bytes = size * n;
- int readbytes,totalbytes = 0;
-
- while (bytes > 0x10000) {
- if (initComplete) {
- readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error);
- readbytes += R0_ReadFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error);
- }
- else {
- readbytes = i_read(f->handle,buf,0x8000);
- readbytes += i_read(f->handle,buf+0x8000,0x8000);
- }
- totalbytes += readbytes;
- f->offset += readbytes;
- buf += 0x10000;
- bytes -= 0x10000;
- }
- if (bytes) {
- if (initComplete)
- readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error);
- else
- readbytes = i_read(f->handle,buf,bytes);
- totalbytes += readbytes;
- f->offset += readbytes;
- }
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fwrite function. Note that the VxD file I/O
-functions are layered on DOS, so can only read up to 64K at a time. Since
-we are expected to handle much larger chunks than this, we handle larger
-blocks automatically in here.
-****************************************************************************/
-size_t fwrite(
- const void *ptr,
- size_t size,
- size_t n,
- FILE *f)
-{
- const char *buf = ptr;
- WORD error;
- int bytes = size * n;
- int writtenbytes,totalbytes = 0;
-
- if (!f->writemode)
- return 0;
- while (bytes > 0x10000) {
- if (initComplete) {
- writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error);
- writtenbytes += R0_WriteFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error);
- }
- else {
- writtenbytes = i_write(f->handle,buf,0x8000);
- writtenbytes += i_write(f->handle,buf+0x8000,0x8000);
- }
- totalbytes += writtenbytes;
- f->offset += writtenbytes;
- buf += 0x10000;
- bytes -= 0x10000;
- }
- if (initComplete)
- writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error);
- else
- writtenbytes = i_write(f->handle,buf,bytes);
- totalbytes += writtenbytes;
- f->offset += writtenbytes;
- if (f->offset > f->filesize)
- f->filesize = f->offset;
- return totalbytes / size;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fflush function.
-****************************************************************************/
-int fflush(
- FILE *f)
-{
- /* Nothing to do since we are not doing buffered file I/O */
- (void)f;
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fseek function.
-****************************************************************************/
-int fseek(
- FILE *f,
- long int offset,
- int whence)
-{
- if (whence == 0)
- f->offset = offset;
- else if (whence == 1)
- f->offset += offset;
- else if (whence == 2)
- f->offset = f->filesize + offset;
- if (!initComplete)
- i_lseek(f->handle,f->offset,0);
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C ftell function.
-****************************************************************************/
-long ftell(
- FILE *f)
-{
- return f->offset;
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C feof function.
-****************************************************************************/
-int feof(
- FILE *f)
-{
- return (f->offset == f->filesize);
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fgets function.
-****************************************************************************/
-char *fgets(
- char *s,
- int n,
- FILE *f)
-{
- int len;
- char *cs;
-
- /* Read the entire buffer into memory (our functions are unbuffered!) */
- if ((len = fread(s,1,n,f)) == 0)
- return NULL;
-
- /* Search for '\n' or end of string */
- if (n > len)
- n = len;
- cs = s;
- while (--n > 0) {
- if (*cs == '\n')
- break;
- cs++;
- }
- *cs = '\0';
- return s;
-}
-
-/****************************************************************************
-REMARKS:
-NT driver implementation of the ANSI C fputs function.
-****************************************************************************/
-int fputs(
- const char *s,
- FILE *f)
-{
- return fwrite(s,1,strlen(s),f);
-}
-
-/****************************************************************************
-REMARKS:
-VxD implementation of the ANSI C fclose function.
-****************************************************************************/
-int fclose(
- FILE *f)
-{
- WORD error;
-
- if (initComplete)
- R0_CloseFile((HANDLE)f->handle,&error);
- else
- i_close(f->handle);
- PM_free(f);
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/vxd/oshdr.h
deleted file mode 100644
index 7efc0f9..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/oshdr.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c
deleted file mode 100644
index 4cb7f19..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c
+++ /dev/null
@@ -1,1359 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "sdd/sddhelp.h"
-#include "mtrr.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-#define MAX_MEMORY_SHARED 100
-#define MAX_MEMORY_MAPPINGS 100
-
-typedef struct {
- void *linear;
- ulong global;
- ulong length;
- int npages;
- } memshared;
-
-typedef struct {
- ulong physical;
- ulong linear;
- ulong length;
- int npages;
- ibool isCached;
- } mmapping;
-
-static int numMappings = 0;
-static memshared shared[MAX_MEMORY_MAPPINGS] = {0};
-static mmapping maps[MAX_MEMORY_MAPPINGS];
-extern ibool _PM_haveBIOS;
-char _PM_cntPath[PM_MAX_PATH] = "";
-char _PM_nucleusPath[PM_MAX_PATH] = "";
-uchar *_PM_rmBufAddr = NULL;
-ushort _VARAPI _PM_savedDS = 0;
-static uchar _PM_oldCMOSRegA;
-static uchar _PM_oldCMOSRegB;
-PM_intHandler _PM_rtcHandler = NULL;
-IRQHANDLE RTCIRQHandle = 0;
-VPICD_HWInt_THUNK RTCInt_Thunk;
-
-static char *szWindowsKey = "Software\\Microsoft\\Windows\\CurrentVersion";
-static char *szSystemRoot = "SystemRoot";
-static char *szMachineNameKey = "System\\CurrentControlSet\\control\\ComputerName\\ComputerName";
-static char *szMachineName = "ComputerName";
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Functions to read and write CMOS registers */
-
-ulong PMAPI _PM_getPDB(void);
-uchar PMAPI _PM_readCMOS(int index);
-void PMAPI _PM_writeCMOS(int index,uchar value);
-
-/****************************************************************************
-REMARKS:
-PM_malloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * VXD_malloc(
- size_t size)
-{
- return PM_mallocShared(size);
-}
-
-/****************************************************************************
-REMARKS:
-PM_calloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * VXD_calloc(
- size_t nelem,
- size_t size)
-{
- void *p = PM_mallocShared(nelem * size);
- if (p)
- memset(p,0,nelem * size);
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_realloc override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void * VXD_realloc(
- void *ptr,
- size_t size)
-{
- void *p = PM_mallocShared(size);
- if (p) {
- memcpy(p,ptr,size);
- PM_freeShared(ptr);
- }
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-PM_free override function for Nucleus drivers loaded in VxD's.
-****************************************************************************/
-void VXD_free(
- void *p)
-{
- PM_freeShared(p);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- /* Override the default memory allocators for all Nucleus drivers
- * loaded in SDDHELP/PMHELP. We do this so that we can ensure all memory
- * dynamically allocated by Nucleus drivers and internal C runtime
- * library functions are shared memory blocks that all processes
- * connecting to SDDHELP can see.
- */
- PM_useLocalMalloc(VXD_malloc,VXD_calloc,VXD_realloc,VXD_free);
-
- /* Initialiase the MTRR module */
- MTRR_init();
-}
-
-ibool PMAPI PM_haveBIOSAccess(void)
-{ return _PM_haveBIOS; }
-
-long PMAPI PM_getOSType(void)
-{ return _OS_WIN32VXD; }
-
-int PMAPI PM_getModeType(void)
-{ return PM_386; }
-
-void PMAPI PM_backslash(char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-void PMAPI PM_fatalError(const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- Fatal_Error_Handler(msg,0);
-}
-
-/****************************************************************************
-PARAMETERS:
-len - Place to store the length of the buffer
-rseg - Place to store the real mode segment of the buffer
-roff - Place to store the real mode offset of the buffer
-
-REMARKS:
-This function returns the address and length of the global VESA transfer
-buffer that is used for communicating with the VESA BIOS functions from
-Win16 and Win32 programs under Windows.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- /* If the VxD is dynamically loaded we will not have a real mode
- * transfer buffer to return, so we fail the call.
- */
- if (_PM_rmBufAddr) {
- *len = VESA_BUF_SIZE;
- *rseg = (ulong)(_PM_rmBufAddr) >> 4;
- *roff = (ulong)(_PM_rmBufAddr) & 0xF;
- return _PM_rmBufAddr;
- }
- return NULL;
-}
-
-int PMAPI PM_int386(
- int intno,
- PMREGS *in,
- PMREGS *out)
-{
- /* Unused in VxDs */
- return 0;
-}
-
-void PMAPI _PM_getRMvect(
- int intno,
- long *realisr)
-{
- WORD seg;
- DWORD off;
-
- Get_V86_Int_Vector(intno,&seg,&off);
- *realisr = ((long)seg << 16) | (off & 0xFFFF);
-}
-
-void PMAPI _PM_setRMvect(
- int intno,
- long realisr)
-{
- Set_V86_Int_Vector(intno,realisr >> 16,realisr & 0xFFFF);
-}
-
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- strncpy(path,_PM_cntPath,maxLen);
- path[maxLen-1] = 0;
- return path;
-}
-
-char PMAPI PM_getBootDrive(void)
-{ return 'c'; }
-
-const char * PMAPI PM_getVBEAFPath(void)
-{ return "c:\\"; }
-
-/****************************************************************************
-PARAMETERS:
-szKey - Key to query (can contain version number formatting)
-szValue - Value to get information for
-value - Place to store the registry key data read
-size - Size of the string buffer to read into
-
-RETURNS:
-true if the key was found, false if not.
-****************************************************************************/
-static ibool REG_queryString(
- char *szKey,
- char *szValue,
- char *value,
- ulong size)
-{
- HKEY hKey;
- ulong type;
- ibool status = false;
-
- memset(value,0,sizeof(value));
- if (RegOpenKey(HKEY_LOCAL_MACHINE,szKey,&hKey) == ERROR_SUCCESS) {
- if (RegQueryValueEx(hKey,(PCHAR)szValue,(ulong*)NULL,(ulong*)&type,value,(ulong*)&size) == ERROR_SUCCESS)
- status = true;
- RegCloseKey(hKey);
- }
- return status;
-}
-
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
-
- if (strlen(_PM_nucleusPath) > 0) {
- strcpy(path,_PM_nucleusPath);
- PM_backslash(path);
- return path;
- }
- if (!REG_queryString(szWindowsKey,szSystemRoot,path,sizeof(path)))
- strcpy(path,"c:\\windows");
- PM_backslash(path);
- strcat(path,"system\\nucleus");
- return path;
-}
-
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-const char * PMAPI PM_getUniqueID(void)
-{ return PM_getMachineName(); }
-
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[256];
- if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name)))
- return name;
- return "Unknown";
-}
-
-int PMAPI PM_kbhit(void)
-{ return 1; }
-
-int PMAPI PM_getch(void)
-{ return 0; }
-
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hwndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- /* Unused in VxDs */
- return NULL;
-}
-
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Unused in VxDs */
- return 1;
-}
-
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Unused in VxDs */
-}
-
-void PMAPI PM_setSuspendAppCallback(
- int (_ASMAPIP saveState)(
- int flags))
-{
- /* Unused in VxDs */
-}
-
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Unused in VxDs */
-}
-
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Unused in VxDs */
-}
-
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x50,x);
- PM_setByte(_biosPtr+0x51,y);
-}
-
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- uchar *_biosPtr = PM_getBIOSPointer();
- PM_setByte(_biosPtr+0x4A,width);
- PM_setByte(_biosPtr+0x84,height-1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For Win9x we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- MEMHANDLE hMem;
- DWORD pgNum,nPages = (size + 0xFFF) >> 12;
- int i;
-
- /* First find a free slot in our shared memory table */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].linear == 0)
- break;
- }
- if (i < MAX_MEMORY_SHARED) {
- PageAllocate(nPages,PG_SYS,0,0,0,0,NULL,0,&hMem,&shared[i].linear);
- shared[i].npages = nPages;
- pgNum = (ulong)shared[i].linear >> 12;
- shared[i].global = LinPageLock(pgNum,nPages,PAGEMAPGLOBAL);
- return (void*)shared[i].global;
- }
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory
-****************************************************************************/
-void PMAPI PM_freeShared(void *p)
-{
- int i;
-
- /* Find a shared memory block in our table and free it */
- for (i = 0; i < MAX_MEMORY_SHARED; i++) {
- if (shared[i].global == (ulong)p) {
- LinPageUnLock(shared[i].global >> 12,shared[i].npages,PAGEMAPGLOBAL);
- PageFree((ulong)shared[i].linear,0);
- shared[i].linear = 0;
- break;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Maps a shared memory block into process address space. Does nothing since
-the memory blocks are already globally7 mapped into all processes.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- return (void*)base;
-}
-
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* TODO: Figure out how to do this */
- return false;
-}
-
-void * PMAPI PM_getBIOSPointer(void)
-{ return (void*)0x400; }
-
-void * PMAPI PM_getA0000Pointer(void)
-{ return PM_mapPhysicalAddr(0xA0000,0xFFFF,true); }
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-Maps a physical memory range to a linear memory range.
-****************************************************************************/
-ulong _PM_mapPhysicalToLinear(
- ulong base,
- ulong limit,
- int *npages)
-{
- ulong linear,length = limit+1;
- int i,ppage,flags;
-
- if (base < 0x100000) {
- /* Windows 9x is zero based for the first meg of memory */
- return base;
- }
- ppage = base >> 12;
- *npages = (length + (base & 0xFFF) + 4095) >> 12;
- flags = PR_FIXED | PR_STATIC;
- if (base == 0xA0000) {
- /* We require the linear address to be aligned to a 64Kb boundary
- * for mapping the banked framebuffer (so we can do efficient
- * carry checking for bank changes in the assembler code). The only
- * way to ensure this is to force the linear address to be aligned
- * to a 4Mb boundary.
- */
- flags |= PR_4MEG;
- }
- if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1)
- return 0xFFFFFFFF;
- if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE))
- return 0xFFFFFFFF;
- return linear + (base & 0xFFF);
-}
-
-/* Page table flags */
-
-#define PAGE_FLAGS_PRESENT 0x00000001
-#define PAGE_FLAGS_WRITEABLE 0x00000002
-#define PAGE_FLAGS_USER 0x00000004
-#define PAGE_FLAGS_WRITE_THROUGH 0x00000008
-#define PAGE_FLAGS_CACHE_DISABLE 0x00000010
-#define PAGE_FLAGS_ACCESSED 0x00000020
-#define PAGE_FLAGS_DIRTY 0x00000040
-#define PAGE_FLAGS_4MB 0x00000080
-
-/****************************************************************************
-PARAMETERS:
-base - Physical base address of the memory to maps in
-limit - Limit of physical memory to region to maps in
-isCached - True if the memory should be cached, false if not
-
-RETURNS:
-Linear address of the newly mapped memory.
-
-REMARKS:
-This function maps physical memory to linear memory, which can then be used
-to create a selector or used directly from 32-bit protected mode programs.
-This is better than DPMI 0x800, since it allows you to maps physical
-memory below 1Mb, which gets this memory out of the way of the Windows VDD's
-sticky paws.
-
-NOTE: If the memory is not expected to be cached, this function will
- directly re-program the PCD (Page Cache Disable) bit in the
- page tables. There does not appear to be a mechanism in the VMM
- to control this bit via the regular interface.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- ulong linear,length = limit+1;
- int i,npages;
- ulong PDB,*pPDB;
-
- /* Search table of existing mappings to see if we have already mapped
- * a region of memory that will serve this purpose.
- */
- for (i = 0; i < numMappings; i++) {
- if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached)
- return (void*)maps[i].linear;
- }
- if (numMappings == MAX_MEMORY_MAPPINGS)
- return NULL;
-
- /* We did not find any previously mapped memory region, so maps it in.
- * Note that we do not use MapPhysToLinear, since this function appears
- * to have problems mapping memory in the 1Mb physical address space.
- * Hence we use PageReserve and PageCommitPhys.
- */
- if ((linear = _PM_mapPhysicalToLinear(base,limit,&npages)) == 0xFFFFFFFF)
- return NULL;
- maps[numMappings].physical = base;
- maps[numMappings].length = length;
- maps[numMappings].linear = linear;
- maps[numMappings].npages = npages;
- maps[numMappings].isCached = isCached;
- numMappings++;
-
- /* Finally disable caching where necessary */
- if (!isCached && (PDB = _PM_getPDB()) != 0) {
- int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage;
- ulong pageTable,*pPageTable;
- pPDB = (ulong*)_PM_mapPhysicalToLinear(PDB,0xFFF,&npages);
- if (pPDB) {
- startPDB = (linear >> 22) & 0x3FF;
- startPage = (linear >> 12) & 0x3FF;
- endPDB = ((linear+limit) >> 22) & 0x3FF;
- endPage = ((linear+limit) >> 12) & 0x3FF;
- for (iPDB = startPDB; iPDB <= endPDB; iPDB++) {
- /* Set the bits in the page directory entry - required as per */
- /* Pentium 4 manual. This also takes care of the 4MB page entries */
- pPDB[iPDB] = pPDB[iPDB] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE);
- if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) {
- /* If we are dealing with 4KB pages then we need to iterate */
- /* through each of the page table entries */
- pageTable = pPDB[iPDB] & ~0xFFF;
- pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,&npages);
- start = (iPDB == startPDB) ? startPage : 0;
- end = (iPDB == endPDB) ? endPage : 0x3FF;
- for (iPage = start; iPage <= end; iPage++)
- pPageTable[iPage] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE);
- PageFree((ulong)pPageTable,PR_STATIC);
- }
- }
- PageFree((ulong)pPDB,PR_STATIC);
- PM_flushTLB();
- }
- }
- return (void*)linear;
-}
-
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* We never free the mappings */
-}
-
-void PMAPI PM_sleep(ulong milliseconds)
-{
- /* We never sleep in a VxD */
-}
-
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- case 2: return 0x3E8;
- case 3: return 0x2E8;
- }
- return 0;
-}
-
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- DWORD pte;
-
- /* Touch the memory before calling CopyPageTable. For some reason */
- /* we need to do this on Windows 9x, otherwise the memory may not */
- /* be paged in correctly. Of course if the passed in pointer is */
- /* invalid, this function will fault, but we shouldn't be passed bogus */
- /* pointers anyway ;-) */
- pte = *((ulong*)p);
-
- /* Return assembled address value only if VMM service succeeds */
- if (CopyPageTable(((DWORD)p) >> 12, 1, (PVOID*)&pte, 0))
- return (pte & ~0xFFF) | (((DWORD)p) & 0xFFF);
-
- /* Return failure to the caller! */
- return 0xFFFFFFFFUL;
-}
-
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- int i;
- ulong linear = (ulong)p & ~0xFFF;
-
- for (i = (length + 0xFFF) >> 12; i > 0; i--) {
- if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF)
- return false;
- linear += 4096;
- }
- return true;
-}
-
-void PMAPI _PM_freeMemoryMappings(void)
-{
- int i;
- for (i = 0; i < numMappings; i++)
- PageFree(maps[i].linear,PR_STATIC);
-}
-
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- return (void*)MK_PHYS(r_seg,r_off);
-}
-
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- return NULL;
-}
-
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
-}
-
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- /* Unsed in VxD's */
-}
-
-/****************************************************************************
-REMARKS:
-Load the V86 registers in the client state, and save the original state
-before loading the registers.
-****************************************************************************/
-static void LoadV86Registers(
- CLIENT_STRUCT *saveRegs,
- RMREGS *in,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT newRegs;
-
- Save_Client_State(saveRegs);
- newRegs = *saveRegs;
- newRegs.CRS.Client_EAX = in->e.eax;
- newRegs.CRS.Client_EBX = in->e.ebx;
- newRegs.CRS.Client_ECX = in->e.ecx;
- newRegs.CRS.Client_EDX = in->e.edx;
- newRegs.CRS.Client_ESI = in->e.esi;
- newRegs.CRS.Client_EDI = in->e.edi;
- newRegs.CRS.Client_ES = sregs->es;
- newRegs.CRS.Client_DS = sregs->ds;
- Restore_Client_State(&newRegs);
-}
-
-/****************************************************************************
-REMARKS:
-Read the V86 registers from the client state and restore the original state.
-****************************************************************************/
-static void ReadV86Registers(
- CLIENT_STRUCT *saveRegs,
- RMREGS *out,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT newRegs;
-
- Save_Client_State(&newRegs);
- out->e.eax = newRegs.CRS.Client_EAX;
- out->e.ebx = newRegs.CRS.Client_EBX;
- out->e.ecx = newRegs.CRS.Client_ECX;
- out->e.edx = newRegs.CRS.Client_EDX;
- out->e.esi = newRegs.CRS.Client_ESI;
- out->e.edi = newRegs.CRS.Client_EDI;
- sregs->es = newRegs.CRS.Client_ES;
- sregs->ds = newRegs.CRS.Client_DS;
- Restore_Client_State(saveRegs);
-}
-
-/****************************************************************************
-REMARKS:
-Call a V86 real mode function with the specified register values
-loaded before the call. The call returns with a far ret.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *regs,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT saveRegs;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS)
- return;
-
- _TRACE("SDDHELP: Entering PM_callRealMode()\n");
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,regs,sregs);
- Simulate_Far_Call(seg, off);
- Resume_Exec();
- ReadV86Registers(&saveRegs,regs,sregs);
- End_Nest_Exec();
- _TRACE("SDDHELP: Exiting PM_callRealMode()\n");
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- RMSREGS sregs = {0};
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS) {
- *out = *in;
- return out->x.ax;
- }
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- _TRACE("SDDHELP: Entering PM_int86()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,&sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,&sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- _TRACE("SDDHELP: Exiting PM_int86()\n");
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a V86 real mode interrupt with the specified register values
-loaded before the interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- CLIENT_STRUCT saveRegs;
- ushort oldDisable;
-
- /* Bail if we do not have BIOS access (ie: the VxD was dynamically
- * loaded, and not statically loaded.
- */
- if (!_PM_haveBIOS) {
- *out = *in;
- return out->x.ax;
- }
-
- /* Disable pass-up to our VxD handler so we directly call BIOS */
- _TRACE("SDDHELP: Entering PM_int86x()\n");
- if (disableTSRFlag) {
- oldDisable = *disableTSRFlag;
- *disableTSRFlag = 0;
- }
- Begin_Nest_V86_Exec();
- LoadV86Registers(&saveRegs,in,sregs);
- Exec_Int(intno);
- ReadV86Registers(&saveRegs,out,sregs);
- End_Nest_Exec();
-
- /* Re-enable pass-up to our VxD handler if previously enabled */
- if (disableTSRFlag)
- *disableTSRFlag = oldDisable;
-
- _TRACE("SDDHELP: Exiting PM_int86x()\n");
- return out->x.ax;
-}
-
-/****************************************************************************
-REMARKS:
-Returns available memory. Not possible under Windows.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a block of locked physical memory.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- MEMHANDLE hMem;
- DWORD nPages = (size + 0xFFF) >> 12;
- DWORD flags = PAGEFIXED | PAGEUSEALIGN | (contiguous ? PAGECONTIG : 0);
- DWORD maxPhys = below16M ? 0x00FFFFFF : 0xFFFFFFFF;
- void *p;
-
- /* TODO: This may need to be modified if the memory needs to be globally */
- /* accessible. Check how we implemented PM_mallocShared() as we */
- /* may need to do something similar in here. */
- PageAllocate(nPages,PG_SYS,0,0,0,maxPhys,physAddr,flags,&hMem,&p);
-
- /* TODO: We may need to modify the memory blocks to disable caching via */
- /* the page tables (PCD|PWT) since DMA memory blocks *cannot* be */
- /* cached! */
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-Frees a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- if (p)
- PageFree((ulong)p,0);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- MEMHANDLE hMem;
- void *p;
-
- /* TODO: This will need to be modified if the memory needs to be globally */
- /* accessible. Check how we implemented PM_mallocShared() as we */
- /* may need to do something similar in here. */
- PageAllocate(1,PG_SYS,0,0,0,0,0,PAGEFIXED,&hMem,&p);
- return p;
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- if (p)
- PageFree((ulong)p,0);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- DWORD pgNum = (ulong)p >> 12;
- DWORD nPages = (len + (ulong)p - (pgNum << 12) + 0xFFF) >> 12;
- return LinPageLock(pgNum,nPages,0);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(
- void *p,
- uint len,
- PM_lockHandle *lh)
-{
- DWORD pgNum = (ulong)p >> 12;
- DWORD nPages = (len + (ulong)p - (pgNum << 12) + 0xFFF) >> 12;
- return LinPageUnLock(pgNum,nPages,0);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_lockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(
- void (*p)(),
- uint len,
- PM_lockHandle *lh)
-{
- return PM_unlockDataPages((void*)p,len,lh);
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- static short convert[] = {
- 8192,
- 4096,
- 2048,
- 1024,
- 512,
- 256,
- 128,
- 64,
- 32,
- 16,
- 8,
- 4,
- 2,
- -1,
- };
- int i;
-
- /* First clear any pending RTC timeout if not cleared */
- _PM_readCMOS(0x0C);
- if (frequency == 0) {
- /* Disable RTC timout */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F);
- }
- else {
- /* Convert frequency value to RTC clock indexes */
- for (i = 0; convert[i] != -1; i++) {
- if (convert[i] == frequency)
- break;
- }
-
- /* Set RTC timout value and enable timeout */
- _PM_writeCMOS(0x0A,0x20 | (i+3));
- _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Real time clock interrupt handler, which calls the user registered C code.
-****************************************************************************/
-static BOOL __stdcall RTCInt_Handler(
- VMHANDLE hVM,
- IRQHANDLE hIRQ)
-{
- static char inside = 0;
-
- /* Clear priority interrupt controller and re-enable interrupts so we
- * dont lock things up for long.
- */
- VPICD_Phys_EOI(hIRQ);
-
- /* Clear real-time clock timeout */
- _PM_readCMOS(0x0C);
-
- /* Now call the C based interrupt handler (but check for mutual
- * exclusion since we may still be servicing an old interrupt when a
- * new one comes along; if that happens we ignore the old one).
- */
- if (!inside) {
- inside = 1;
- enable();
- _PM_rtcHandler();
- inside = 0;
- }
- return TRUE;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- struct VPICD_IRQ_Descriptor IRQdesc;
-
- /* Save the old CMOS real time clock values */
- _PM_oldCMOSRegA = _PM_readCMOS(0x0A);
- _PM_oldCMOSRegB = _PM_readCMOS(0x0B);
-
- /* Set the real time clock interrupt handler */
- CHECK(ih != NULL);
- _PM_rtcHandler = ih;
- IRQdesc.VID_IRQ_Number = 0x8;
- IRQdesc.VID_Options = 0;
- IRQdesc.VID_Hw_Int_Proc = (DWORD)VPICD_Thunk_HWInt(RTCInt_Handler, &RTCInt_Thunk);
- IRQdesc.VID_EOI_Proc = 0;
- IRQdesc.VID_Virt_Int_Proc = 0;
- IRQdesc.VID_Mask_Change_Proc= 0;
- IRQdesc.VID_IRET_Proc = 0;
- IRQdesc.VID_IRET_Time_Out = 500;
- if ((RTCIRQHandle = VPICD_Virtualize_IRQ(&IRQdesc)) == 0)
- return false;
-
- /* Program the real time clock default frequency */
- PM_setRealTimeClockFrequency(frequency);
-
- /* Unmask IRQ8 in the PIC */
- VPICD_Physically_Unmask(RTCIRQHandle);
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- if (RTCIRQHandle) {
- /* Restore CMOS registers and mask RTC clock */
- _PM_writeCMOS(0x0A,_PM_oldCMOSRegA);
- _PM_writeCMOS(0x0B,_PM_oldCMOSRegB);
-
- /* Restore the interrupt vector */
- VPICD_Set_Auto_Masking(RTCIRQHandle);
- VPICD_Force_Default_Behavior(RTCIRQHandle);
- RTCIRQHandle = 0;
- }
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- (void)szDLLName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- (void)hModule;
- (void)szProcName;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-OS specific shared libraries not supported inside a VxD
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- (void)hModule;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- /* TODO: This function should start a directory enumeration search */
- /* given the filename (with wildcards). The data should be */
- /* converted and returned in the findData standard form. */
- (void)filename;
- (void)findData;
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- /* TODO: This function should find the next file in directory enumeration */
- /* search given the search criteria defined in the call to */
- /* PM_findFirstFile. The data should be converted and returned */
- /* in the findData standard form. */
- (void)handle;
- (void)findData;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- /* TODO: This function should close the find process. This may do */
- /* nothing for some OS'es. */
- (void)handle;
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- /* Not supported in a VxD */
- (void)drive;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* Not supported in a VxD */
- (void)drive;
- (void)dir;
- (void)len;
-}
-
-/****************************************************************************
-PARAMETERS:
-base - The starting physical base address of the region
-size - The size in bytes of the region
-type - Type to place into the MTRR register
-
-RETURNS:
-Error code describing the result.
-
-REMARKS:
-Function to enable write combining for the specified region of memory.
-****************************************************************************/
-int PMAPI PM_enableWriteCombine(
- ulong base,
- ulong size,
- uint type)
-{
- return MTRR_enableWriteCombine(base,size,type);
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- /* TODO: Implement this */
- (void)filename;
- (void)attrib;
- PM_fatalError("PM_setFileAttr not implemented yet!");
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- /* TODO: Implement this */
- (void)filename;
- PM_fatalError("PM_getFileAttr not implemented yet!");
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- /* TODO: Implement this */
- (void)filename;
- PM_fatalError("PM_mkdir not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- /* TODO: Implement this */
- (void)filename;
- PM_fatalError("PM_rmdir not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_getFileTime not implemented yet!");
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- /* TODO: Implement this! */
- (void)filename;
- (void)gmTime;
- (void)time;
- PM_fatalError("PM_setFileTime not implemented yet!");
- return false;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/vflat.c
deleted file mode 100644
index 901ce1c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/vflat.c
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc)
-{
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/ztimer.c
deleted file mode 100644
index 76df48c..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/vxd/ztimer.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: 32-bit Windows VxD
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ulong frequency = 1193180;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-#define __ZTimerInit()
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOn(tm) VTD_Get_Real_Time(&tm->start.high,&tm->start.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger lap,count;
- VTD_Get_Real_Time(&lap.high,&lap.low);
- _CPU_diffTime64(&tm->start,&lap,&count);
- return _CPU_calcMicroSec(&count,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-#define __LZTimerOff(tm) VTD_Get_Real_Time(&tm->end.high,&tm->end.low)
-
-/****************************************************************************
-REMARKS:
-Call the assembler Zen Timer functions to do the timing.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer value from the BIOS timer tick.
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{
- CPU_largeInteger count;
- VTD_Get_Real_Time(&count.high,&count.low);
- return (count.low * 1000.0 / frequency);
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/_pmwin32.asm b/board/MAI/bios_emulator/scitech/src/pm/win32/_pmwin32.asm
deleted file mode 100644
index 7c242b5..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/_pmwin32.asm
+++ /dev/null
@@ -1,78 +0,0 @@
-;****************************************************************************
-;*
-;* SciTech OS Portability Manager Library
-;*
-;* ========================================================================
-;*
-;* The contents of this file are subject to the SciTech MGL Public
-;* License Version 1.0 (the "License"); you may not use this file
-;* except in compliance with the License. You may obtain a copy of
-;* the License at http://www.scitechsoft.com/mgl-license.txt
-;*
-;* Software distributed under the License is distributed on an
-;* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-;* implied. See the License for the specific language governing
-;* rights and limitations under the License.
-;*
-;* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-;*
-;* The Initial Developer of the Original Code is SciTech Software, Inc.
-;* All Rights Reserved.
-;*
-;* ========================================================================
-;*
-;* Language: 80386 Assembler, TASM 4.0 or NASM
-;* Environment: Win32
-;*
-;* Description: Low level assembly support for the PM library specific
-;* to Windows.
-;*
-;****************************************************************************
-
- IDEAL
-
-include "scitech.mac" ; Memory model macros
-
-header _pmwin32 ; Set up memory model
-
-begdataseg _pmwin32
-
- cglobal _PM_ioentry
- cglobal _PM_gdt
-_PM_ioentry dd 0 ; Offset to call gate
-_PM_gdt dw 0 ; Selector to call gate
-
-enddataseg _pmwin32
-
-begcodeseg _pmwin32 ; Start of code segment
-
-;----------------------------------------------------------------------------
-; int PM_setIOPL(int iopl)
-;----------------------------------------------------------------------------
-; Change the IOPL level for the 32-bit task. Returns the previous level
-; so it can be restored for the task correctly.
-;----------------------------------------------------------------------------
-cprocstart _PM_setIOPLViaCallGate
-
- ARG iopl:UINT
-
- enter_c
- pushfd ; Save the old EFLAGS for later
- mov ecx,[iopl] ; ECX := IOPL level
- xor ebx,ebx ; Change IOPL level function code
-ifdef USE_NASM
- call far dword [_PM_ioentry]
-else
- call [FWORD _PM_ioentry]
-endif
- pop eax
- and eax,0011000000000000b
- shr eax,12
- leave_c
- ret
-
-cprocend
-
-endcodeseg _pmwin32
-
- END ; End of module
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c
deleted file mode 100644
index 7da9752..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c
+++ /dev/null
@@ -1,94 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Module to implement OS specific services to measure the
-* CPU frequency.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static ibool havePerformanceCounter;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Increase the thread priority to maximum, if possible.
-****************************************************************************/
-static int SetMaxThreadPriority(void)
-{
- int oldPriority;
- HANDLE hThread = GetCurrentThread();
-
- oldPriority = GetThreadPriority(hThread);
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL);
- return oldPriority;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original thread priority.
-****************************************************************************/
-static void RestoreThreadPriority(
- int oldPriority)
-{
- HANDLE hThread = GetCurrentThread();
-
- if (oldPriority != THREAD_PRIORITY_ERROR_RETURN)
- SetThreadPriority(hThread, oldPriority);
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the counter and return the frequency of the counter.
-****************************************************************************/
-static void GetCounterFrequency(
- CPU_largeInteger *freq)
-{
- if (!QueryPerformanceFrequency((LARGE_INTEGER*)freq)) {
- havePerformanceCounter = false;
- freq->low = 100000;
- freq->high = 0;
- }
- else
- havePerformanceCounter = true;
-}
-
-/****************************************************************************
-REMARKS:
-Read the counter and return the counter value.
-****************************************************************************/
-#define GetCounter(t) \
-{ \
- if (havePerformanceCounter) \
- QueryPerformanceCounter((LARGE_INTEGER*)t); \
- else { \
- (t)->low = timeGetTime() * 100; \
- (t)->high = 0; \
- } \
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c
deleted file mode 100644
index d6c3f60..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c
+++ /dev/null
@@ -1,582 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Win32 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-#include "event.h"
-#include "pmapi.h"
-#include "win32/oshdr.h"
-#include "nucleus/graphics.h"
-
-/*---------------------------- Global Variables ---------------------------*/
-
-/* Publicly accessible variables */
-
-int _PM_deskX,_PM_deskY;/* Desktop dimentions */
-HWND _PM_hwndConsole; /* Window handle for console */
-#ifdef __INTEL__
-uint _PM_cw_default; /* Default FPU control word */
-#endif
-
-/* Private internal variables */
-
-static HINSTANCE hInstApp = NULL;/* Application instance handle */
-static HWND hwndUser = NULL;/* User window handle */
-static HINSTANCE hInstDD = NULL; /* Handle to DirectDraw DLL */
-static LPDIRECTDRAW lpDD = NULL; /* DirectDraw object */
-static LONG oldWndStyle; /* Info about old user window */
-static LONG oldExWndStyle; /* Info about old user window */
-static int oldWinPosX; /* Old window position X coordinate */
-static int oldWinPosY; /* Old window pisition Y coordinate */
-static int oldWinSizeX; /* Old window size X */
-static int oldWinSizeY; /* Old window size Y */
-static WNDPROC oldWinProc = NULL;
-static PM_saveState_cb suspendApp = NULL;
-static ibool waitActive = false;
-static ibool isFullScreen = false;
-static ibool backInGDI = false;
-
-/* Internal strings */
-
-static char *szWinClassName = "SciTechDirectDrawWindow";
-static char *szAutoPlayKey = "Software\\Microsoft\\Windows\\CurrentVersion\\Policies\\Explorer";
-static char *szAutoPlayValue = "NoDriveTypeAutoRun";
-
-/* Dynalinks to DirectDraw functions */
-
-static HRESULT (WINAPI *pDirectDrawCreate)(GUID FAR *lpGUID, LPDIRECTDRAW FAR *lplpDD, IUnknown FAR *pUnkOuter);
-
-/*---------------------------- Implementation -----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Temporarily disables AutoPlay operation while we are running in fullscreen
-graphics modes.
-****************************************************************************/
-static void DisableAutoPlay(void)
-{
- DWORD dwAutoPlay,dwSize = sizeof(dwAutoPlay);
- HKEY hKey;
-
- if (RegOpenKeyEx(HKEY_CURRENT_USER,szAutoPlayKey,0,KEY_EXECUTE | KEY_WRITE,&hKey) == ERROR_SUCCESS) {
- RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize);
- dwAutoPlay |= AUTOPLAY_DRIVE_CDROM;
- RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize);
- RegCloseKey(hKey);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Re-enables AutoPlay operation when we return to regular GDI mode.
-****************************************************************************/
-static void RestoreAutoPlay(void)
-{
- DWORD dwAutoPlay,dwSize = sizeof(dwAutoPlay);
- HKEY hKey;
-
- if (RegOpenKeyEx(HKEY_CURRENT_USER,szAutoPlayKey,0,KEY_EXECUTE | KEY_WRITE,&hKey) == ERROR_SUCCESS) {
- RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize);
- dwAutoPlay &= ~AUTOPLAY_DRIVE_CDROM;
- RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize);
- RegCloseKey(hKey);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Suspends the application by switching back to the GDI desktop, allowing
-normal application code to be processed, and then waiting for the
-application activate command to bring us back to fullscreen mode with our
-window minimised.
-****************************************************************************/
-static void LeaveFullScreen(void)
-{
- int retCode = PM_SUSPEND_APP;
-
- if (backInGDI)
- return;
- if (suspendApp)
- retCode = suspendApp(PM_DEACTIVATE);
- RestoreAutoPlay();
- backInGDI = true;
-
- /* Now process messages normally until we are re-activated */
- waitActive = true;
- if (retCode != PM_NO_SUSPEND_APP) {
- while (waitActive) {
- _EVT_pumpMessages();
- Sleep(200);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Reactivate all the surfaces for DirectDraw and set the system back up for
-fullscreen rendering.
-****************************************************************************/
-static void RestoreFullScreen(void)
-{
- static ibool firstTime = true;
-
- if (firstTime) {
- /* Clear the message queue while waiting for the surfaces to be
- * restored.
- */
- firstTime = false;
- while (1) {
- /* Continue looping until out application has been restored
- * and we have reset the display mode.
- */
- _EVT_pumpMessages();
- if (GetActiveWindow() == _PM_hwndConsole) {
- if (suspendApp)
- suspendApp(PM_REACTIVATE);
- DisableAutoPlay();
- backInGDI = false;
- waitActive = false;
- firstTime = true;
- return;
- }
- Sleep(200);
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-This function suspends the application by switching back to the GDI desktop,
-allowing normal application code to be processed and then waiting for the
-application activate command to bring us back to fullscreen mode with our
-window minimised.
-
-This version only gets called if we have not captured the screen switch in
-our activate message loops and will occur if the DirectDraw drivers lose a
-surface for some reason while rendering. This should not normally happen,
-but it is included just to be sure (it can happen on WinNT/2000 if the user
-hits the Ctrl-Alt-Del key combination). Note that this code will always
-spin loop, and we cannot disable the spin looping from this version (ie:
-if the user hits Ctrl-Alt-Del under WinNT/2000 the application main loop
-will cease to be executed until the user switches back to the application).
-****************************************************************************/
-void PMAPI PM_doSuspendApp(void)
-{
- static ibool firstTime = true;
-
- /* Call system DLL version if found */
- if (_PM_imports.PM_doSuspendApp != PM_doSuspendApp) {
- _PM_imports.PM_doSuspendApp();
- return;
- }
-
- if (firstTime) {
- if (suspendApp)
- suspendApp(PM_DEACTIVATE);
- RestoreAutoPlay();
- firstTime = false;
- backInGDI = true;
- }
- RestoreFullScreen();
- firstTime = true;
-}
-
-/****************************************************************************
-REMARKS:
-Main Window proc for the full screen DirectDraw Window that we create while
-running in full screen mode. Here we capture all mouse and keyboard events
-for the window and plug them into our event queue.
-****************************************************************************/
-static LONG CALLBACK PM_winProc(
- HWND hwnd,
- UINT msg,
- WPARAM wParam,
- LONG lParam)
-{
- switch (msg) {
- case WM_SYSCHAR:
- /* Stop Alt-Space from pausing our application */
- return 0;
- case WM_KEYDOWN:
- case WM_SYSKEYDOWN:
- if (HIWORD(lParam) & KF_REPEAT) {
- if (msg == WM_SYSKEYDOWN)
- return 0;
- break;
- }
- /* Fall through for keydown events */
- case WM_KEYUP:
- case WM_SYSKEYUP:
- if (msg == WM_SYSKEYDOWN || msg == WM_SYSKEYUP) {
- if ((HIWORD(lParam) & KF_ALTDOWN) && wParam == VK_RETURN)
- break;
- /* We ignore the remainder of the system keys to stop the
- * system menu from being activated from the keyboard and pausing
- * our app while fullscreen (ie: pressing the Alt key).
- */
- return 0;
- }
- break;
- case WM_SYSCOMMAND:
- switch (wParam & ~0x0F) {
- case SC_SCREENSAVE:
- case SC_MONITORPOWER:
- /* Ignore screensaver requests in fullscreen modes */
- return 0;
- }
- break;
- case WM_SIZE:
- if (waitActive && backInGDI && (wParam != SIZE_MINIMIZED)) {
- /* Start the re-activation process */
- PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_RESTORE_FULLSCREEN,0);
- }
- else if (!waitActive && isFullScreen && !backInGDI && (wParam == SIZE_MINIMIZED)) {
- /* Start the de-activation process */
- PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_LEAVE_FULLSCREEN,0);
- }
- break;
- case WM_DO_SUSPEND_APP:
- switch (wParam) {
- case WM_PM_RESTORE_FULLSCREEN:
- RestoreFullScreen();
- break;
- case WM_PM_LEAVE_FULLSCREEN:
- LeaveFullScreen();
- break;
- }
- return 0;
- }
- if (oldWinProc)
- return oldWinProc(hwnd,msg,wParam,lParam);
- return DefWindowProc(hwnd,msg,wParam,lParam);
-}
-
-/****************************************************************************
-PARAMETERS:
-hwnd - User window to convert
-width - Window of the fullscreen window
-height - Height of the fullscreen window
-
-RETURNS:
-Handle to converted fullscreen Window.
-
-REMARKS:
-This function takes the original user window handle and modifies the size,
-position and attributes for the window to convert it into a fullscreen
-window that we can use.
-****************************************************************************/
-static PM_HWND _PM_convertUserWindow(
- HWND hwnd,
- int width,
- int height)
-{
- RECT window;
-
- GetWindowRect(hwnd,&window);
- oldWinPosX = window.left;
- oldWinPosY = window.top;
- oldWinSizeX = window.right - window.left;
- oldWinSizeY = window.bottom - window.top;
- oldWndStyle = SetWindowLong(hwnd,GWL_STYLE,WS_POPUP | WS_SYSMENU);
- oldExWndStyle = SetWindowLong(hwnd,GWL_EXSTYLE,WS_EX_APPWINDOW);
- ShowWindow(hwnd,SW_SHOW);
- MoveWindow(hwnd,0,0,width,height,TRUE);
- SetWindowPos(hwnd,HWND_TOPMOST,0,0,0,0,SWP_NOMOVE | SWP_NOSIZE);
- oldWinProc = (WNDPROC)SetWindowLong(hwnd,GWL_WNDPROC, (LPARAM)PM_winProc);
- return hwnd;
-}
-
-/****************************************************************************
-PARAMETERS:
-hwnd - User window to restore
-
-REMARKS:
-This function restores the original attributes of the user window and put's
-it back into it's original state before it was converted to a fullscreen
-window.
-****************************************************************************/
-static void _PM_restoreUserWindow(
- HWND hwnd)
-{
- SetWindowLong(hwnd,GWL_WNDPROC, (LPARAM)oldWinProc);
- SetWindowLong(hwnd,GWL_EXSTYLE,oldExWndStyle);
- SetWindowLong(hwnd,GWL_STYLE,oldWndStyle);
- SetWindowPos(hwnd,HWND_NOTOPMOST,0,0,0,0,SWP_NOMOVE | SWP_NOSIZE);
- ShowWindow(hwnd,SW_SHOW);
- MoveWindow(hwnd,oldWinPosX,oldWinPosY,oldWinSizeX,oldWinSizeY,TRUE);
- oldWinProc = NULL;
-}
-
-/****************************************************************************
-PARAMETERS:
-device - Index of the device to load DirectDraw for (0 for primary)
-
-REMARKS:
-Attempts to dynamically load the DirectDraw DLL's and create the DirectDraw
-objects that we need.
-****************************************************************************/
-void * PMAPI PM_loadDirectDraw(
- int device)
-{
- HDC hdc;
- int bits;
-
- /* Call system DLL version if found */
- if (_PM_imports.PM_loadDirectDraw != PM_loadDirectDraw)
- return _PM_imports.PM_loadDirectDraw(device);
-
- /* TODO: Handle multi-monitor!! */
- if (device != 0)
- return NULL;
-
- /* Load the DirectDraw DLL if not presently loaded */
- GET_DEFAULT_CW();
- if (!hInstDD) {
- hdc = GetDC(NULL);
- bits = GetDeviceCaps(hdc,BITSPIXEL);
- ReleaseDC(NULL,hdc);
- if (bits < 8)
- return NULL;
- if ((hInstDD = LoadLibrary("ddraw.dll")) == NULL)
- return NULL;
- pDirectDrawCreate = (void*)GetProcAddress(hInstDD,"DirectDrawCreate");
- if (!pDirectDrawCreate)
- return NULL;
- }
-
- /* Create the DirectDraw object */
- if (!lpDD && pDirectDrawCreate(NULL, &lpDD, NULL) != DD_OK) {
- lpDD = NULL;
- return NULL;
- }
- RESET_DEFAULT_CW();
- return lpDD;
-}
-
-/****************************************************************************
-PARAMETERS:
-device - Index of the device to unload DirectDraw for (0 for primary)
-
-REMARKS:
-Frees any DirectDraw objects for the device. We never actually explicitly
-unload the ddraw.dll library, since unloading and reloading it is
-unnecessary since we only want to unload it when the application exits and
-that happens automatically.
-****************************************************************************/
-void PMAPI PM_unloadDirectDraw(
- int device)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_unloadDirectDraw != PM_unloadDirectDraw) {
- _PM_imports.PM_unloadDirectDraw(device);
- return;
- }
- if (lpDD) {
- IDirectDraw_Release(lpDD);
- lpDD = NULL;
- }
- (void)device;
-}
-
-/****************************************************************************
-REMARKS:
-Open a console for output to the screen, creating the main event handling
-window if necessary.
-****************************************************************************/
-PM_HWND PMAPI PM_openConsole(
- PM_HWND hWndUser,
- int device,
- int xRes,
- int yRes,
- int bpp,
- ibool fullScreen)
-{
- WNDCLASS cls;
- static ibool classRegistered = false;
-
- /* Call system DLL version if found */
- GA_getSystemPMImports();
- if (_PM_imports.PM_openConsole != PM_openConsole) {
- if (fullScreen) {
- _PM_deskX = xRes;
- _PM_deskY = yRes;
- }
- return _PM_imports.PM_openConsole(hWndUser,device,xRes,yRes,bpp,fullScreen);
- }
-
- /* Create the fullscreen window if necessary */
- hwndUser = hWndUser;
- if (fullScreen) {
- if (!classRegistered) {
- /* Create a Window class for the fullscreen window in here, since
- * we need to register one that will do all our event handling for
- * us.
- */
- hInstApp = GetModuleHandle(NULL);
- cls.hCursor = LoadCursor(NULL,IDC_ARROW);
- cls.hIcon = LoadIcon(hInstApp,MAKEINTRESOURCE(1));
- cls.lpszMenuName = NULL;
- cls.lpszClassName = szWinClassName;
- cls.hbrBackground = GetStockObject(BLACK_BRUSH);
- cls.hInstance = hInstApp;
- cls.style = CS_DBLCLKS;
- cls.lpfnWndProc = PM_winProc;
- cls.cbWndExtra = 0;
- cls.cbClsExtra = 0;
- if (!RegisterClass(&cls))
- return NULL;
- classRegistered = true;
- }
- _PM_deskX = xRes;
- _PM_deskY = yRes;
- if (!hwndUser) {
- char windowTitle[80];
- if (LoadString(hInstApp,1,windowTitle,sizeof(windowTitle)) == 0)
- strcpy(windowTitle,"MGL Fullscreen Application");
- _PM_hwndConsole = CreateWindowEx(WS_EX_APPWINDOW,szWinClassName,
- windowTitle,WS_POPUP | WS_SYSMENU,0,0,xRes,yRes,
- NULL,NULL,hInstApp,NULL);
- }
- else {
- _PM_hwndConsole = _PM_convertUserWindow(hwndUser,xRes,yRes);
- }
- ShowCursor(false);
- isFullScreen = true;
- }
- else {
- _PM_hwndConsole = hwndUser;
- isFullScreen = false;
- }
- SetFocus(_PM_hwndConsole);
- SetForegroundWindow(_PM_hwndConsole);
- DisableAutoPlay();
- (void)bpp;
- return _PM_hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Find the size of the console state buffer.
-****************************************************************************/
-int PMAPI PM_getConsoleStateSize(void)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_getConsoleStateSize != PM_getConsoleStateSize)
- return _PM_imports.PM_getConsoleStateSize();
-
- /* Not used in Windows */
- return 1;
-}
-
-/****************************************************************************
-REMARKS:
-Save the state of the console.
-****************************************************************************/
-void PMAPI PM_saveConsoleState(
- void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_saveConsoleState != PM_saveConsoleState) {
- _PM_imports.PM_saveConsoleState(stateBuf,hwndConsole);
- return;
- }
-
- /* Not used in Windows */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Set the suspend application callback for the fullscreen console.
-****************************************************************************/
-void PMAPI PM_setSuspendAppCallback(
- PM_saveState_cb saveState)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_setSuspendAppCallback != PM_setSuspendAppCallback) {
- _PM_imports.PM_setSuspendAppCallback(saveState);
- return;
- }
- suspendApp = saveState;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the console state.
-****************************************************************************/
-void PMAPI PM_restoreConsoleState(
- const void *stateBuf,
- PM_HWND hwndConsole)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_restoreConsoleState != PM_restoreConsoleState) {
- _PM_imports.PM_restoreConsoleState(stateBuf,hwndConsole);
- return;
- }
-
- /* Not used in Windows */
- (void)stateBuf;
- (void)hwndConsole;
-}
-
-/****************************************************************************
-REMARKS:
-Close the fullscreen console.
-****************************************************************************/
-void PMAPI PM_closeConsole(
- PM_HWND hwndConsole)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_closeConsole != PM_closeConsole) {
- _PM_imports.PM_closeConsole(hwndConsole);
- return;
- }
- ShowCursor(true);
- RestoreAutoPlay();
- if (hwndUser)
- _PM_restoreUserWindow(hwndConsole);
- else
- DestroyWindow(hwndConsole);
- hwndUser = NULL;
- _PM_hwndConsole = NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Return the DirectDraw window handle used by the application.
-****************************************************************************/
-PM_HWND PMAPI PM_getDirectDrawWindow(void)
-{
- /* Call system DLL version if found */
- if (_PM_imports.PM_getDirectDrawWindow != PM_getDirectDrawWindow)
- return _PM_imports.PM_getDirectDrawWindow();
- return _PM_hwndConsole;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/event.c b/board/MAI/bios_emulator/scitech/src/pm/win32/event.c
deleted file mode 100644
index 6388052..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/event.c
+++ /dev/null
@@ -1,459 +0,0 @@
-/****************************************************************************
-*
-* SciTech Multi-platform Graphics Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Win32 implementation for the SciTech cross platform
-* event library.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0}; /* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under Win32 */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags) (void)(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the message queue from Win32 into our event queue.
-****************************************************************************/
-void _EVT_pumpMessages(void)
-{
- MSG msg;
- MSG charMsg;
- event_t evt;
-
- /* TODO: Add support for DirectInput! We can't support relative mouse */
- /* movement motion counters without DirectInput ;-(. */
- while (PeekMessage(&msg,NULL,0,0,PM_REMOVE)) {
- memset(&evt,0,sizeof(evt));
- switch (msg.message) {
- case WM_MOUSEMOVE:
- evt.what = EVT_MOUSEMOVE;
- break;
- case WM_LBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK | EVT_DBLCLICK;
- break;
- case WM_LBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_LBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_LEFTBMASK;
- break;
- case WM_RBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_RBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_RIGHTBMASK;
- break;
- case WM_MBUTTONDBLCLK:
- evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK;
- evt.message = EVT_MIDDLEBMASK;
- break;
- case WM_MBUTTONDOWN:
- evt.what = EVT_MOUSEDOWN;
- evt.message = EVT_MIDDLEBMASK;
- break;
- case WM_MBUTTONUP:
- evt.what = EVT_MOUSEUP;
- evt.message = EVT_MIDDLEBMASK;
- break;
- case WM_KEYDOWN:
- case WM_SYSKEYDOWN:
- if (HIWORD(msg.lParam) & KF_REPEAT) {
- evt.what = EVT_KEYREPEAT;
- }
- else {
- evt.what = EVT_KEYDOWN;
- }
- break;
- case WM_KEYUP:
- case WM_SYSKEYUP:
- evt.what = EVT_KEYUP;
- break;
- }
-
- /* Convert mouse event modifier flags */
- if (evt.what & EVT_MOUSEEVT) {
- if (_PM_deskX) {
- evt.where_x = ((long)msg.pt.x * rangeX) / _PM_deskX;
- evt.where_y = ((long)msg.pt.y * rangeY) / _PM_deskY;
- }
- else {
- ScreenToClient(_PM_hwndConsole, &msg.pt);
- evt.where_x = msg.pt.x;
- evt.where_y = msg.pt.y;
- }
- if (evt.what == EVT_MOUSEMOVE) {
- /* Save the current mouse position */
- EVT.mx = evt.where_x;
- EVT.my = evt.where_y;
- if (EVT.oldMove != -1) {
- EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */
- EVT.evtq[EVT.oldMove].where_y = evt.where_y;
-/* EVT.evtq[EVT.oldMove].relative_x += mickeyX; / / TODO! */
-/* EVT.evtq[EVT.oldMove].relative_y += mickeyY; / / TODO! */
- evt.what = 0;
- }
- else {
- EVT.oldMove = EVT.freeHead; /* Save id of this move event */
-/* evt.relative_x = mickeyX; / / TODO! */
-/* evt.relative_y = mickeyY; / / TODO! */
- }
- }
- else
- EVT.oldMove = -1;
- if (msg.wParam & MK_LBUTTON)
- evt.modifiers |= EVT_LEFTBUT;
- if (msg.wParam & MK_RBUTTON)
- evt.modifiers |= EVT_RIGHTBUT;
- if (msg.wParam & MK_MBUTTON)
- evt.modifiers |= EVT_MIDDLEBUT;
- if (msg.wParam & MK_SHIFT)
- evt.modifiers |= EVT_SHIFTKEY;
- if (msg.wParam & MK_CONTROL)
- evt.modifiers |= EVT_CTRLSTATE;
- }
-
- /* Convert keyboard codes */
- TranslateMessage(&msg);
- if (evt.what & EVT_KEYEVT) {
- int scanCode = (msg.lParam >> 16) & 0xFF;
- if (evt.what == EVT_KEYUP) {
- /* Get message for keyup code from table of cached down values */
- evt.message = keyUpMsg[scanCode];
- keyUpMsg[scanCode] = 0;
- }
- else {
- if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE))
- evt.message = charMsg.wParam;
- evt.message |= ((msg.lParam >> 8) & 0xFF00);
- keyUpMsg[scanCode] = (ushort)evt.message;
- }
- if (evt.what == EVT_KEYREPEAT)
- evt.message |= (msg.lParam << 16);
- if (HIWORD(msg.lParam) & KF_ALTDOWN)
- evt.modifiers |= EVT_ALTSTATE;
- if (GetKeyState(VK_SHIFT) & 0x8000U)
- evt.modifiers |= EVT_SHIFTKEY;
- if (GetKeyState(VK_CONTROL) & 0x8000U)
- evt.modifiers |= EVT_CTRLSTATE;
- EVT.oldMove = -1;
- }
-
- if (evt.what != 0) {
- /* Add time stamp and add the event to the queue */
- evt.when = msg.time;
- if (EVT.count < EVENTQSIZE)
- addEvent(&evt);
- }
- DispatchMessage(&msg);
- }
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort(
- int signal)
-{
- (void)signal;
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-void EVTAPI EVT_init(
- _EVT_mouseMoveHandler mouseMove)
-{
- /* Initialise the event queue */
- EVT.mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS
-Modifes the mouse coordinates as necessary if scaling to OS coordinates,
-and sets the OS mouse cursor position.
-****************************************************************************/
-void _EVT_setMousePos(
- int *x,
- int *y)
-{
- /* Scale coordinates up to desktop coordinates first */
- int scaledX = (*x * _PM_deskX) / rangeX;
- int scaledY = (*y * _PM_deskY) / rangeY;
-
- /* Scale coordinates back to screen coordinates again */
- *x = (scaledX * rangeX) / _PM_deskX;
- *y = (scaledY * rangeY) / _PM_deskY;
- SetCursorPos(scaledX,scaledY);
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for Win32 */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the mask indicating what joystick axes are attached.
-
-HEADER:
-event.h
-
-REMARKS:
-This function is used to detect the attached joysticks, and determine
-what axes are present and functioning. This function will re-detect any
-attached joysticks when it is called, so if the user forgot to attach
-the joystick when the application started, you can call this function to
-re-detect any newly attached joysticks.
-
-SEE ALSO:
-EVT_joySetLowerRight, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-int EVTAPI EVT_joyIsPresent(void)
-{
- /* TODO: Implement joystick code based on DirectX! */
- return 0;
-}
-
-/****************************************************************************
-DESCRIPTION:
-Polls the joystick for position and button information.
-
-HEADER:
-event.h
-
-REMARKS:
-This routine is used to poll analogue joysticks for button and position
-information. It should be called once for each main loop of the user
-application, just before processing all pending events via EVT_getNext.
-All information polled from the joystick will be posted to the event
-queue for later retrieval.
-
-Note: Most analogue joysticks will provide readings that change even
- though the joystick has not moved. Hence if you call this routine
- you will likely get an EVT_JOYMOVE event every time through your
- event loop.
-
-SEE ALSO:
-EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight,
-EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_pollJoystick(void)
-{
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick upper left position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the upper left
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetUpperLeft(void)
-{
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick lower right position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the lower right
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetCenter, EVT_joyIsPresent
-****************************************************************************/
-void EVTAPI EVT_joySetLowerRight(void)
-{
-}
-
-/****************************************************************************
-DESCRIPTION:
-Calibrates the joystick center position
-
-HEADER:
-event.h
-
-REMARKS:
-This function can be used to zero in on better joystick calibration factors,
-which may work better than the default simplistic calibration (which assumes
-the joystick is centered when the event library is initialised).
-To use this function, ask the user to hold the stick in the center
-position and then have them press a key or button. and then call this
-function. This function will then read the joystick and update the
-calibration factors.
-
-Usually, assuming that the stick was centered when the event library was
-initialized, you really only need to call EVT_joySetLowerRight since the
-upper left position is usually always 0,0 on most joysticks. However, the
-safest procedure is to call all three calibration functions.
-
-SEE ALSO:
-EVT_joySetUpperLeft, EVT_joySetLowerRight, EVT_joySetCenter
-****************************************************************************/
-void EVTAPI EVT_joySetCenter(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c
deleted file mode 100644
index 59d9aa0..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c
+++ /dev/null
@@ -1,258 +0,0 @@
-/****************************************************************************
-*
-* SciTech Display Doctor
-*
-* Copyright (C) 1991-2001 SciTech Software, Inc.
-* All rights reserved.
-*
-* ======================================================================
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* | |
-* |This copyrighted computer code is a proprietary trade secret of |
-* |SciTech Software, Inc., located at 505 Wall Street, Chico, CA 95928 |
-* |USA (www.scitechsoft.com). ANY UNAUTHORIZED POSSESSION, USE, |
-* |VIEWING, COPYING, MODIFICATION OR DISSEMINATION OF THIS CODE IS |
-* |STRICTLY PROHIBITED BY LAW. Unless you have current, express |
-* |written authorization from SciTech to possess or use this code, you |
-* |may be subject to civil and/or criminal penalties. |
-* | |
-* |If you received this code in error or you would like to report |
-* |improper use, please immediately contact SciTech Software, Inc. at |
-* |530-894-8400. |
-* | |
-* |REMOVAL OR MODIFICATION OF THIS HEADER IS STRICTLY PROHIBITED BY LAW|
-* ======================================================================
-*
-* Language: ANSI C
-* Environment: Windows NT, Windows 2K or Windows XP.
-*
-* Description: Main module to do the installation of the SDD and GLDirect
-* device driver components under Windows NT/2K/XP.
-*
-****************************************************************************/
-
-#include "pmapi.h"
-#include "win32/oshdr.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-szDriverName - Actual name of the driver to install in the system
-szServiceName - Name of the service to create
-szLoadGroup - Load group for the driver (NULL for normal drivers)
-dwServiceType - Service type to create
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function does all the work to install the driver into the system.
-The driver is not however activated; for that you must use the Start_SddFilt
-function.
-****************************************************************************/
-ulong PMAPI PM_installService(
- const char *szDriverName,
- const char *szServiceName,
- const char *szLoadGroup,
- ulong dwServiceType)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- char szDriverPath[MAX_PATH];
- HKEY key;
- char keyPath[MAX_PATH];
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Find the path to the driver in system directory */
- GetSystemDirectory(szDriverPath, sizeof(szDriverPath));
- strcat(szDriverPath, "\\drivers\\");
- strcat(szDriverPath, szDriverName);
-
- /* Create the service with the Service Control Manager. */
- driverHandle = CreateService(scmHandle,
- szServiceName,
- szServiceName,
- SERVICE_ALL_ACCESS,
- dwServiceType,
- SERVICE_BOOT_START,
- SERVICE_ERROR_NORMAL,
- szDriverPath,
- szLoadGroup,
- NULL,
- NULL,
- NULL,
- NULL);
-
- /* Check to see if the driver could actually be installed. */
- if (!driverHandle) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Get a handle to the key for driver so that it can be altered in the */
- /* next step. */
- strcpy(keyPath, "SYSTEM\\CurrentControlSet\\Services\\");
- strcat(keyPath, szServiceName);
- if ((status = RegOpenKeyEx(HKEY_LOCAL_MACHINE,keyPath,0,KEY_ALL_ACCESS,&key)) != ERROR_SUCCESS) {
- /* A problem has occured. Delete the service so that it is not installed. */
- status = GetLastError();
- DeleteService(driverHandle);
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Delete the ImagePath value in the newly created key so that the */
- /* system looks for the driver in the normal location. */
- if ((status = RegDeleteValue(key, "ImagePath")) != ERROR_SUCCESS) {
- /* A problem has occurred. Delete the service so that it is not */
- /* installed and will not try to start. */
- RegCloseKey(key);
- DeleteService(driverHandle);
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Clean up and exit */
- RegCloseKey(key);
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
-
-/****************************************************************************
-PARAMETERS:
-szServiceName - Name of the service to start
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function is used to start the specified service and make it active.
-****************************************************************************/
-ulong PMAPI PM_startService(
- const char *szServiceName)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- SERVICE_STATUS serviceStatus;
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Open the service with the Service Control Manager. */
- if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Start the service */
- if (!StartService(driverHandle,0,NULL)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Query the service to make sure it is there */
- if (!QueryServiceStatus(driverHandle,&serviceStatus)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
-
-/****************************************************************************
-PARAMETERS:
-szServiceName - Name of the service to stop
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function is used to stop the specified service and disable it.
-****************************************************************************/
-ulong PMAPI PM_stopService(
- const char *szServiceName)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- SERVICE_STATUS serviceStatus;
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Open the service with the Service Control Manager. */
- if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Stop the service from running */
- if (!ControlService(driverHandle, SERVICE_CONTROL_STOP, &serviceStatus)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
-
-/****************************************************************************
-PARAMETERS:
-szServiceName - Name of the service to remove
-
-RETURNS:
-True on success, false on failure.
-
-REMARKS:
-This function is used to remove a service completely from the system.
-****************************************************************************/
-ulong PMAPI PM_removeService(
- const char *szServiceName)
-{
- SC_HANDLE scmHandle;
- SC_HANDLE driverHandle;
- ulong status;
-
- /* Obtain a handle to the service control manager requesting all access */
- if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL)
- return GetLastError();
-
- /* Open the service with the Service Control Manager. */
- if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) {
- status = GetLastError();
- CloseServiceHandle(scmHandle);
- return status;
- }
-
- /* Remove the service */
- if (!DeleteService(driverHandle)) {
- status = GetLastError();
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return status;
- }
- CloseServiceHandle(driverHandle);
- CloseServiceHandle(scmHandle);
- return ERROR_SUCCESS;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h
deleted file mode 100644
index 0c59e90..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h
+++ /dev/null
@@ -1,79 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
-#include <float.h>
-#define NONAMELESSUNION
-#include "pm/ddraw.h"
-
-/* Macros to save and restore the default control word. Windows 9x has
- * some bugs in it such that calls to load any DLL's which load 16-bit
- * DLL's cause the floating point control word to get trashed. We fix
- * this by saving and restoring the control word across problematic
- * calls.
- */
-
-#if defined(__INTEL__)
-#define GET_DEFAULT_CW() \
-{ \
- if (_PM_cw_default == 0) \
- _PM_cw_default = _control87(0,0); \
-}
-#define RESET_DEFAULT_CW() \
- _control87(_PM_cw_default,0xFFFFFFFF)
-#else
-#define GET_DEFAULT_CW()
-#define RESET_DEFAULT_CW()
-#endif
-
-/* Custom window messages */
-
-#define WM_DO_SUSPEND_APP WM_USER
-#define WM_PM_LEAVE_FULLSCREEN 0
-#define WM_PM_RESTORE_FULLSCREEN 1
-
-/* Macro for disabling AutoPlay on a use system */
-
-#define AUTOPLAY_DRIVE_CDROM 0x20
-
-/*--------------------------- Global Variables ----------------------------*/
-
-#ifdef __INTEL__
-extern uint _PM_cw_default; /* Default FPU control word */
-#endif
-extern int _PM_deskX,_PM_deskY; /* Desktop dimensions */
-extern HWND _PM_hwndConsole; /* Window handle for console */
-
-/*-------------------------- Internal Functions ---------------------------*/
-
-void _EVT_pumpMessages(void);
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c b/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c
deleted file mode 100644
index 1ffdbcc..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c
+++ /dev/null
@@ -1,1459 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: Implementation for the OS Portability Manager Library, which
-* contains functions to implement OS specific services in a
-* generic, cross platform API. Porting the OS Portability
-* Manager library is the first step to porting any SciTech
-* products to a new platform.
-*
-****************************************************************************/
-
-#define WIN32_LEAN_AND_MEAN
-#define STRICT
-#include <windows.h>
-#include <mmsystem.h>
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <direct.h>
-#include "pmapi.h"
-#include "drvlib/os/os.h"
-#include "pm_help.h"
-
-/*--------------------------- Global variables ----------------------------*/
-
-ibool _PM_haveWinNT; /* True if we are running on NT */
-static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */
-static void *VESABuf_ptr = NULL;/* Near pointer to VESABuf */
-static uint VESABuf_rseg; /* Real mode segment of VESABuf */
-static uint VESABuf_roff; /* Real mode offset of VESABuf */
-HANDLE _PM_hDevice = NULL; /* Handle to Win32 VxD */
-static ibool inited = false; /* Flags if we are initialised */
-static void (PMAPIP fatalErrorCleanup)(void) = NULL;
-
-static char *szMachineNameKey = "System\\CurrentControlSet\\control\\ComputerName\\ComputerName";
-static char *szMachineNameKeyNT = "System\\CurrentControlSet\\control\\ComputerName\\ActiveComputerName";
-static char *szMachineName = "ComputerName";
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* Macro to check for a valid, loaded version of PMHELP. We check this
- * on demand when we need these services rather than when PM_init() is
- * called because if we are running on DirectDraw we don't need PMHELP.VXD.
- */
-
-#define CHECK_FOR_PMHELP() \
-{ \
- if (_PM_hDevice == INVALID_HANDLE_VALUE) \
- if (_PM_haveWinNT) \
- PM_fatalError("Unable to connect to PMHELP.SYS or SDDHELP.SYS!"); \
- else \
- PM_fatalError("Unable to connect to PMHELP.VXD or SDDHELP.VXD!"); \
-}
-
-/****************************************************************************
-REMARKS:
-Initialise the PM library and connect to our helper device driver. If we
-cannot connect to our helper device driver, we bail out with an error
-message. Our Windows 9x VxD is dynamically loadable, so it can be loaded
-after the system has started.
-****************************************************************************/
-void PMAPI PM_init(void)
-{
- DWORD inBuf[1]; /* Buffer to receive data from VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
- char cntPath[PM_MAX_PATH];
- char *env;
-
- /* Create a file handle for the static VxD if possible, otherwise
- * dynamically load the PMHELP helper VxD. Note that if an old version
- * of SDD is loaded, we use the PMHELP VxD instead.
- */
- if (!inited) {
- /* Determine if we are running under Windows NT or not and
- * set the global OS type variable.
- */
- _PM_haveWinNT = false;
- if ((GetVersion() & 0x80000000UL) == 0)
- _PM_haveWinNT = true;
- ___drv_os_type = (_PM_haveWinNT) ? _OS_WINNT : _OS_WIN95;
-
- /* Now try to connect to SDDHELP.VXD or SDDHELP.SYS */
- _PM_hDevice = CreateFile(SDDHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0);
- if (_PM_hDevice != INVALID_HANDLE_VALUE) {
- if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) {
- /* Old version of SDDHELP loaded, so use PMHELP instead */
- CloseHandle(_PM_hDevice);
- _PM_hDevice = INVALID_HANDLE_VALUE;
- }
- }
- if (_PM_hDevice == INVALID_HANDLE_VALUE) {
- /* First try to see if there is a currently loaded PMHELP driver.
- * This is usually the case when we are running under Windows NT/2K.
- */
- _PM_hDevice = CreateFile(PMHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0);
- if (_PM_hDevice == INVALID_HANDLE_VALUE) {
- /* The driver was not staticly loaded, so try creating a file handle
- * to a dynamic version of the VxD if possible. Note that on WinNT/2K we
- * cannot support dynamically loading the drivers.
- */
- _PM_hDevice = CreateFile(PMHELP_VXD_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0);
- }
- }
- if (_PM_hDevice != INVALID_HANDLE_VALUE) {
- /* Call the driver to determine the version number */
- if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) {
- if (_PM_haveWinNT)
- PM_fatalError("Older version of PMHELP.SYS found!");
- else
- PM_fatalError("Older version of PMHELP.VXD found!");
- }
-
- /* Now set the current path inside the VxD so it knows what the
- * current directory is for loading Nucleus drivers.
- */
- inBuf[0] = (ulong)PM_getCurrentPath(cntPath,sizeof(cntPath));
- if (!DeviceIoControl(_PM_hDevice, PMHELP_SETCNTPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL))
- PM_fatalError("Unable to set VxD current path!");
-
- /* Now pass down the NUCLEUS_PATH environment variable to the device
- * driver so it can use this value if it is found.
- */
- if ((env = getenv("NUCLEUS_PATH")) != NULL) {
- inBuf[0] = (ulong)env;
- if (!DeviceIoControl(_PM_hDevice, PMHELP_SETNUCLEUSPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL))
- PM_fatalError("Unable to set VxD Nucleus path!");
- }
-
- /* Enable IOPL for ring-3 code by default if driver is present */
- if (_PM_haveWinNT)
- PM_setIOPL(3);
- }
-
- /* Indicate that we have been initialised */
- inited = true;
- }
-}
-
-/****************************************************************************
-REMARKS:
-We do have BIOS access under Windows 9x, but not under Windows NT.
-****************************************************************************/
-int PMAPI PM_setIOPL(
- int iopl)
-{
- DWORD inBuf[1]; /* Buffer to receive data from VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
- static int cntIOPL = 0;
- int oldIOPL = cntIOPL;
-
- /* Enable I/O by adjusting the I/O permissions map on Windows NT */
- if (_PM_haveWinNT) {
- CHECK_FOR_PMHELP();
- if (iopl == 3)
- DeviceIoControl(_PM_hDevice, PMHELP_ENABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL);
- else
- DeviceIoControl(_PM_hDevice, PMHELP_DISABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL);
- cntIOPL = iopl;
- return oldIOPL;
- }
-
- /* We always have IOPL on Windows 9x */
- return 3;
-}
-
-/****************************************************************************
-REMARKS:
-We do have BIOS access under Windows 9x, but not under Windows NT.
-****************************************************************************/
-ibool PMAPI PM_haveBIOSAccess(void)
-{
- if (PM_getOSType() == _OS_WINNT)
- return false;
- else
- return _PM_hDevice != INVALID_HANDLE_VALUE;
-}
-
-/****************************************************************************
-REMARKS:
-Return the operating system type identifier.
-****************************************************************************/
-long PMAPI PM_getOSType(void)
-{
- if ((GetVersion() & 0x80000000UL) == 0)
- return ___drv_os_type = _OS_WINNT;
- else
- return ___drv_os_type = _OS_WIN95;
-}
-
-/****************************************************************************
-REMARKS:
-Return the runtime type identifier.
-****************************************************************************/
-int PMAPI PM_getModeType(void)
-{
- return PM_386;
-}
-
-/****************************************************************************
-REMARKS:
-Add a file directory separator to the end of the filename.
-****************************************************************************/
-void PMAPI PM_backslash(
- char *s)
-{
- uint pos = strlen(s);
- if (s[pos-1] != '\\') {
- s[pos] = '\\';
- s[pos+1] = '\0';
- }
-}
-
-/****************************************************************************
-REMARKS:
-Add a user defined PM_fatalError cleanup function.
-****************************************************************************/
-void PMAPI PM_setFatalErrorCleanup(
- void (PMAPIP cleanup)(void))
-{
- fatalErrorCleanup = cleanup;
-}
-
-/****************************************************************************
-REMARKS:
-Report a fatal error condition and halt the program.
-****************************************************************************/
-void PMAPI PM_fatalError(
- const char *msg)
-{
- if (fatalErrorCleanup)
- fatalErrorCleanup();
- MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION);
- exit(1);
-}
-
-/****************************************************************************
-REMARKS:
-Allocate the real mode VESA transfer buffer for communicating with the BIOS.
-****************************************************************************/
-void * PMAPI PM_getVESABuf(
- uint *len,
- uint *rseg,
- uint *roff)
-{
- DWORD outBuf[4]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- /* We require the helper VxD to be loaded staticly in order to support
- * the VESA transfer buffer. We do not support dynamically allocating
- * real mode memory buffers from Win32 programs (we need a 16-bit DLL
- * for this, and Windows 9x becomes very unstable if you free the
- * memory blocks out of order).
- */
- if (!inited)
- PM_init();
- if (!VESABuf_ptr) {
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETVESABUF32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL)) {
- if (!outBuf[0])
- return NULL;
- VESABuf_ptr = (void*)outBuf[0];
- VESABuf_len = outBuf[1];
- VESABuf_rseg = outBuf[2];
- VESABuf_roff = outBuf[3];
- }
- }
- *len = VESABuf_len;
- *rseg = VESABuf_rseg;
- *roff = VESABuf_roff;
- return VESABuf_ptr;
-}
-
-/****************************************************************************
-REMARKS:
-Check if a key has been pressed.
-****************************************************************************/
-int PMAPI PM_kbhit(void)
-{
- /* Not used in Windows */
- return true;
-}
-
-/****************************************************************************
-REMARKS:
-Wait for and return the next keypress.
-****************************************************************************/
-int PMAPI PM_getch(void)
-{
- /* Not used in Windows */
- return 0xD;
-}
-
-/****************************************************************************
-REMARKS:
-Set the location of the OS console cursor.
-****************************************************************************/
-void PM_setOSCursorLocation(
- int x,
- int y)
-{
- /* Nothing to do for Windows */
- (void)x;
- (void)y;
-}
-
-/****************************************************************************
-REMARKS:
-Set the width of the OS console.
-****************************************************************************/
-void PM_setOSScreenWidth(
- int width,
- int height)
-{
- /* Nothing to do for Windows */
- (void)width;
- (void)height;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock handler (used for software stereo modes).
-****************************************************************************/
-ibool PMAPI PM_setRealTimeClockHandler(
- PM_intHandler ih,
- int frequency)
-{
- /* We do not support this from Win32 programs. Rather the VxD handles
- * this stuff it will take care of hooking the stereo flip functions at
- * the VxD level.
- */
- (void)ih;
- (void)frequency;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Set the real time clock frequency (for stereo modes).
-****************************************************************************/
-void PMAPI PM_setRealTimeClockFrequency(
- int frequency)
-{
- /* Not supported under Win32 */
- (void)frequency;
-}
-
-/****************************************************************************
-REMARKS:
-Restore the original real time clock handler.
-****************************************************************************/
-void PMAPI PM_restoreRealTimeClockHandler(void)
-{
- /* Not supported under Win32 */
-}
-
-/****************************************************************************
-REMARKS:
-Return the current operating system path or working directory.
-****************************************************************************/
-char * PMAPI PM_getCurrentPath(
- char *path,
- int maxLen)
-{
- return getcwd(path,maxLen);
-}
-
-/****************************************************************************
-REMARKS:
-Query a string from the registry (extended version).
-****************************************************************************/
-static ibool REG_queryStringEx(
- HKEY hKey,
- const char *szValue,
- char *value,
- ulong size)
-{
- DWORD type;
-
- if (RegQueryValueEx(hKey,(PCHAR)szValue,(PDWORD)NULL,(PDWORD)&type,(LPBYTE)value,(PDWORD)&size) == ERROR_SUCCESS)
- return true;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Query a string from the registry.
-****************************************************************************/
-static ibool REG_queryString(
- const char *szKey,
- const char *szValue,
- char *value,
- DWORD size)
-{
- HKEY hKey;
- ibool status = false;
-
- memset(value,0,sizeof(value));
- if (RegOpenKey(HKEY_LOCAL_MACHINE,szKey,&hKey) == ERROR_SUCCESS) {
- status = REG_queryStringEx(hKey,szValue,value,size);
- RegCloseKey(hKey);
- }
- return status;
-}
-
-/****************************************************************************
-REMARKS:
-Return the drive letter for the boot drive.
-****************************************************************************/
-char PMAPI PM_getBootDrive(void)
-{
- static char path[256];
- GetSystemDirectory(path,sizeof(path));
- return path[0];
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the VBE/AF driver files.
-****************************************************************************/
-const char * PMAPI PM_getVBEAFPath(void)
-{
- return "c:\\";
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus driver files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusPath(void)
-{
- static char path[256];
- char *env;
-
- if ((env = getenv("NUCLEUS_PATH")) != NULL)
- return env;
- GetSystemDirectory(path,sizeof(path));
- strcat(path,"\\nucleus");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return the path to the Nucleus configuration files.
-****************************************************************************/
-const char * PMAPI PM_getNucleusConfigPath(void)
-{
- static char path[256];
- strcpy(path,PM_getNucleusPath());
- PM_backslash(path);
- strcat(path,"config");
- return path;
-}
-
-/****************************************************************************
-REMARKS:
-Return a unique identifier for the machine if possible.
-****************************************************************************/
-const char * PMAPI PM_getUniqueID(void)
-{
- return PM_getMachineName();
-}
-
-/****************************************************************************
-REMARKS:
-Get the name of the machine on the network.
-****************************************************************************/
-const char * PMAPI PM_getMachineName(void)
-{
- static char name[256];
-
- if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name)))
- return name;
- if (REG_queryString(szMachineNameKeyNT,szMachineName,name,sizeof(name)))
- return name;
- return "Unknown";
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to the real mode BIOS data area.
-****************************************************************************/
-void * PMAPI PM_getBIOSPointer(void)
-{
- if (_PM_haveWinNT) {
- /* On Windows NT we have to map it physically directly */
- return PM_mapPhysicalAddr(0x400, 0x1000, true);
- }
- else {
- /* For Windows 9x we can access this memory directly */
- return (void*)0x400;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Return a pointer to 0xA0000 physical VGA graphics framebuffer.
-****************************************************************************/
-void * PMAPI PM_getA0000Pointer(void)
-{
- if (_PM_haveWinNT) {
- /* On Windows NT we have to map it physically directly */
- return PM_mapPhysicalAddr(0xA0000, 0x0FFFF, false);
- }
- else {
- /* Always use the 0xA0000 linear address so that we will use
- * whatever page table mappings are set up for us (ie: for virtual
- * bank switching.
- */
- return (void*)0xA0000;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Map a physical address to a linear address in the callers process.
-****************************************************************************/
-void * PMAPI PM_mapPhysicalAddr(
- ulong base,
- ulong limit,
- ibool isCached)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = base;
- inBuf[1] = limit;
- inBuf[2] = isCached;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_MAPPHYS32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a physical address mapping allocated by PM_mapPhysicalAddr.
-****************************************************************************/
-void PMAPI PM_freePhysicalAddr(
- void *ptr,
- ulong limit)
-{
- /* We never free the mappings under Win32 (the VxD tracks them and
- * reissues the same mappings until the system is rebooted).
- */
- (void)ptr;
- (void)limit;
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ulong PMAPI PM_getPhysicalAddr(
- void *p)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETPHYSICALADDR32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0xFFFFFFFFUL;
-}
-
-/****************************************************************************
-REMARKS:
-Find the physical address of a linear memory address in current process.
-****************************************************************************/
-ibool PMAPI PM_getPhysicalAddrRange(
- void *p,
- ulong length,
- ulong *physAddress)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- inBuf[1] = (ulong)length;
- inBuf[2] = (ulong)physAddress;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETPHYSICALADDRRANGE32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Sleep for the specified number of milliseconds.
-****************************************************************************/
-void PMAPI PM_sleep(
- ulong milliseconds)
-{
- Sleep(milliseconds);
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified COM port.
-****************************************************************************/
-int PMAPI PM_getCOMPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3F8;
- case 1: return 0x2F8;
- case 2: return 0x3E8;
- case 3: return 0x2E8;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Return the base I/O port for the specified LPT port.
-****************************************************************************/
-int PMAPI PM_getLPTPort(int port)
-{
- /* TODO: Re-code this to determine real values using the Plug and Play */
- /* manager for the OS. */
- switch (port) {
- case 0: return 0x3BC;
- case 1: return 0x378;
- case 2: return 0x278;
- }
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of shared memory. For Win9x we allocate shared memory
-as locked, global memory that is accessible from any memory context
-(including interrupt time context), which allows us to load our important
-data structure and code such that we can access it directly from a ring
-0 interrupt context.
-****************************************************************************/
-void * PMAPI PM_mallocShared(
- long size)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = size;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_MALLOCSHARED32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of shared memory.
-****************************************************************************/
-void PMAPI PM_freeShared(
- void *ptr)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
-
- inBuf[0] = (ulong)ptr;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FREESHARED32, inBuf, sizeof(inBuf), NULL, 0, NULL, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Map a linear memory address to the calling process address space. The
-address will have been allocated in another process using the
-PM_mapPhysicalAddr function.
-****************************************************************************/
-void * PMAPI PM_mapToProcess(
- void *base,
- ulong limit)
-{
- (void)base;
- (void)limit;
- return base;
-}
-
-/****************************************************************************
-REMARKS:
-Map a real mode pointer to a protected mode pointer.
-****************************************************************************/
-void * PMAPI PM_mapRealPointer(
- uint r_seg,
- uint r_off)
-{
- return (void*)(MK_PHYS(r_seg,r_off));
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of real mode memory
-****************************************************************************/
-void * PMAPI PM_allocRealSeg(
- uint size,
- uint *r_seg,
- uint *r_off)
-{
- /* We do not support dynamically allocating real mode memory buffers
- * from Win32 programs (we need a 16-bit DLL for this, and Windows
- * 9x becomes very unstable if you free the memory blocks out of order).
- */
- (void)size;
- (void)r_seg;
- (void)r_off;
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of real mode memory.
-****************************************************************************/
-void PMAPI PM_freeRealSeg(
- void *mem)
-{
- /* Not supported in Windows */
- (void)mem;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt (parameters in DPMI compatible structure)
-****************************************************************************/
-void PMAPI DPMI_int86(
- int intno,
- DPMI_regs *regs)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = intno;
- inBuf[1] = (ulong)regs;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_DPMIINT8632, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86(
- int intno,
- RMREGS *in,
- RMREGS *out)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = intno;
- inBuf[1] = (ulong)in;
- inBuf[2] = (ulong)out;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_INT8632, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Issue a real mode interrupt.
-****************************************************************************/
-int PMAPI PM_int86x(
- int intno,
- RMREGS *in,
- RMREGS *out,
- RMSREGS *sregs)
-{
- DWORD inBuf[4]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = intno;
- inBuf[1] = (ulong)in;
- inBuf[2] = (ulong)out;
- inBuf[3] = (ulong)sregs;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_INT86X32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call a real mode far function.
-****************************************************************************/
-void PMAPI PM_callRealMode(
- uint seg,
- uint off,
- RMREGS *in,
- RMSREGS *sregs)
-{
- DWORD inBuf[4]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = seg;
- inBuf[1] = off;
- inBuf[2] = (ulong)in;
- inBuf[3] = (ulong)sregs;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_CALLREALMODE32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Return the amount of available memory.
-****************************************************************************/
-void PMAPI PM_availableMemory(
- ulong *physical,
- ulong *total)
-{
- /* We don't support this under Win32 at the moment */
- *physical = *total = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Allocate a block of locked, physical memory for DMA operations.
-****************************************************************************/
-void * PMAPI PM_allocLockedMem(
- uint size,
- ulong *physAddr,
- ibool contiguous,
- ibool below16M)
-{
- DWORD inBuf[4]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = size;
- inBuf[1] = (ulong)physAddr;
- inBuf[2] = (ulong)contiguous;
- inBuf[3] = (ulong)below16M;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_ALLOCLOCKED32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a block of locked physical memory.
-****************************************************************************/
-void PMAPI PM_freeLockedMem(
- void *p,
- uint size,
- ibool contiguous)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- inBuf[1] = size;
- inBuf[2] = contiguous;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FREELOCKED32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Allocates a page aligned and page sized block of memory
-****************************************************************************/
-void * PMAPI PM_allocPage(
- ibool locked)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = locked;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_ALLOCPAGE32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return (void*)outBuf[0];
- return NULL;
-}
-
-/****************************************************************************
-REMARKS:
-Free a page aligned and page sized block of memory
-****************************************************************************/
-void PMAPI PM_freePage(
- void *p)
-{
- DWORD inBuf[1]; /* Buffer to send data to VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = (ulong)p;
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FREEPAGE32, inBuf, sizeof(inBuf),
- NULL, 0, &count, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_LOCKDATAPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_UNLOCKDATAPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Lock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_lockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_LOCKCODEPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Unlock linear memory so it won't be paged.
-****************************************************************************/
-int PMAPI PM_unlockCodePages(void (*p)(),uint len,PM_lockHandle *lh)
-{
- DWORD inBuf[2]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- inBuf[0] = (ulong)p;
- inBuf[1] = len;
- inBuf[2] = (ulong)lh;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_UNLOCKCODEPAGES32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankA(
- int bank)
-{
- RMREGS regs;
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display banks.
-****************************************************************************/
-void PMAPI PM_setBankAB(
- int bank)
-{
- RMREGS regs;
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0000;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
- regs.x.ax = 0x4F05;
- regs.x.bx = 0x0001;
- regs.x.dx = bank;
- PM_int86(0x10,®s,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Call the VBE/Core software interrupt to change display start address.
-****************************************************************************/
-void PMAPI PM_setCRTStart(
- int x,
- int y,
- int waitVRT)
-{
- RMREGS regs;
- regs.x.ax = 0x4F07;
- regs.x.bx = waitVRT;
- regs.x.cx = x;
- regs.x.dx = y;
- PM_int86(0x10,®s,®s);
-}
-
-/****************************************************************************
-REMARKS:
-Enable write combining for the memory region.
-****************************************************************************/
-ibool PMAPI PM_enableWriteCombine(
- ulong base,
- ulong length,
- uint type)
-{
- DWORD inBuf[3]; /* Buffer to send data to VxD */
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- if (!inited)
- PM_init();
- inBuf[0] = base;
- inBuf[1] = length;
- inBuf[2] = type;
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_ENABLELFBCOMB32, inBuf, sizeof(inBuf),
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Get the page directory base register value
-****************************************************************************/
-ulong PMAPI _PM_getPDB(void)
-{
- DWORD outBuf[1]; /* Buffer to receive data from VxD */
- DWORD count; /* Count of bytes returned from VxD */
-
- CHECK_FOR_PMHELP();
- if (DeviceIoControl(_PM_hDevice, PMHELP_GETPDB32, NULL, 0,
- outBuf, sizeof(outBuf), &count, NULL))
- return outBuf[0];
- return 0;
-}
-
-/****************************************************************************
-REMARKS:
-Flush the translation lookaside buffer.
-****************************************************************************/
-void PMAPI PM_flushTLB(void)
-{
- CHECK_FOR_PMHELP();
- DeviceIoControl(_PM_hDevice, PMHELP_FLUSHTLB32, NULL, 0, NULL, 0, NULL, NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Execute the POST on the secondary BIOS for a controller.
-****************************************************************************/
-ibool PMAPI PM_doBIOSPOST(
- ushort axVal,
- ulong BIOSPhysAddr,
- void *mappedBIOS,
- ulong BIOSLen)
-{
- /* This is never done by Win32 programs, but rather done by the VxD
- * when the system boots.
- */
- (void)axVal;
- (void)BIOSPhysAddr;
- (void)mappedBIOS;
- (void)BIOSLen;
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Load an OS specific shared library or DLL. If the OS does not support
-shared libraries, simply return NULL.
-****************************************************************************/
-PM_MODULE PMAPI PM_loadLibrary(
- const char *szDLLName)
-{
- return (PM_MODULE)LoadLibrary(szDLLName);
-}
-
-/****************************************************************************
-REMARKS:
-Get the address of a named procedure from a shared library.
-****************************************************************************/
-void * PMAPI PM_getProcAddress(
- PM_MODULE hModule,
- const char *szProcName)
-{
- return (void*)GetProcAddress((HINSTANCE)hModule,szProcName);
-}
-
-/****************************************************************************
-REMARKS:
-Unload a shared library.
-****************************************************************************/
-void PMAPI PM_freeLibrary(
- PM_MODULE hModule)
-{
- FreeLibrary((HINSTANCE)hModule);
-}
-
-/****************************************************************************
-REMARKS:
-Internal function to convert the find data to the generic interface.
-****************************************************************************/
-static void convertFindData(
- PM_findData *findData,
- WIN32_FIND_DATA *blk)
-{
- ulong dwSize = findData->dwSize;
-
- memset(findData,0,findData->dwSize);
- findData->dwSize = dwSize;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_READONLY)
- findData->attrib |= PM_FILE_READONLY;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY)
- findData->attrib |= PM_FILE_DIRECTORY;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_ARCHIVE)
- findData->attrib |= PM_FILE_ARCHIVE;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_HIDDEN)
- findData->attrib |= PM_FILE_HIDDEN;
- if (blk->dwFileAttributes & FILE_ATTRIBUTE_SYSTEM)
- findData->attrib |= PM_FILE_SYSTEM;
- findData->sizeLo = blk->nFileSizeLow;
- findData->sizeHi = blk->nFileSizeHigh;
- strncpy(findData->name,blk->cFileName,PM_MAX_PATH);
- findData->name[PM_MAX_PATH-1] = 0;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the first file matching a search criteria in a directory.
-****************************************************************************/
-void *PMAPI PM_findFirstFile(
- const char *filename,
- PM_findData *findData)
-{
- WIN32_FIND_DATA blk;
- HANDLE hfile;
-
- if ((hfile = FindFirstFile(filename,&blk)) != INVALID_HANDLE_VALUE) {
- convertFindData(findData,&blk);
- return (void*)hfile;
- }
- return PM_FILE_INVALID;
-}
-
-/****************************************************************************
-REMARKS:
-Function to find the next file matching a search criteria in a directory.
-****************************************************************************/
-ibool PMAPI PM_findNextFile(
- void *handle,
- PM_findData *findData)
-{
- WIN32_FIND_DATA blk;
-
- if (FindNextFile((HANDLE)handle,&blk)) {
- convertFindData(findData,&blk);
- return true;
- }
- return false;
-}
-
-/****************************************************************************
-REMARKS:
-Function to close the find process
-****************************************************************************/
-void PMAPI PM_findClose(
- void *handle)
-{
- FindClose((HANDLE)handle);
-}
-
-/****************************************************************************
-REMARKS:
-Function to determine if a drive is a valid drive or not. Under Unix this
-function will return false for anything except a value of 3 (considered
-the root drive, and equivalent to C: for non-Unix systems). The drive
-numbering is:
-
- 1 - Drive A:
- 2 - Drive B:
- 3 - Drive C:
- etc
-
-****************************************************************************/
-ibool PMAPI PM_driveValid(
- char drive)
-{
- char buf[5];
- int type;
-
- sprintf(buf,"%c:\\", drive);
- return ((type = GetDriveType(buf)) != 0 && type != 1);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the current working directory for the specififed drive.
-Under Unix this will always return the current working directory regardless
-of what the value of 'drive' is.
-****************************************************************************/
-void PMAPI PM_getdcwd(
- int drive,
- char *dir,
- int len)
-{
- /* NT stores the current directory for drive N in the magic environment */
- /* variable =N: so we simply look for that environment variable. */
- char envname[4];
-
- envname[0] = '=';
- envname[1] = drive - 1 + 'A';
- envname[2] = ':';
- envname[3] = '\0';
- if (GetEnvironmentVariable(envname,dir,len) == 0) {
- /* The current directory or the drive has not been set yet, so */
- /* simply set it to the root. */
- dir[0] = envname[1];
- dir[1] = ':';
- dir[2] = '\\';
- dir[3] = '\0';
- SetEnvironmentVariable(envname,dir);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Function to change the file attributes for a specific file.
-****************************************************************************/
-void PMAPI PM_setFileAttr(
- const char *filename,
- uint attrib)
-{
- DWORD attr = 0;
-
- if (attrib & PM_FILE_READONLY)
- attr |= FILE_ATTRIBUTE_READONLY;
- if (attrib & PM_FILE_ARCHIVE)
- attr |= FILE_ATTRIBUTE_ARCHIVE;
- if (attrib & PM_FILE_HIDDEN)
- attr |= FILE_ATTRIBUTE_HIDDEN;
- if (attrib & PM_FILE_SYSTEM)
- attr |= FILE_ATTRIBUTE_SYSTEM;
- SetFileAttributes((LPSTR)filename, attr);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file attributes for a specific file.
-****************************************************************************/
-uint PMAPI PM_getFileAttr(
- const char *filename)
-{
- DWORD attr = GetFileAttributes(filename);
- uint attrib = 0;
-
- if (attr & FILE_ATTRIBUTE_READONLY)
- attrib |= PM_FILE_READONLY;
- if (attr & FILE_ATTRIBUTE_ARCHIVE)
- attrib |= PM_FILE_ARCHIVE;
- if (attr & FILE_ATTRIBUTE_HIDDEN)
- attrib |= PM_FILE_HIDDEN;
- if (attr & FILE_ATTRIBUTE_SYSTEM)
- attrib |= PM_FILE_SYSTEM;
- return attrib;
-}
-
-/****************************************************************************
-REMARKS:
-Function to create a directory.
-****************************************************************************/
-ibool PMAPI PM_mkdir(
- const char *filename)
-{
- return CreateDirectory(filename,NULL);
-}
-
-/****************************************************************************
-REMARKS:
-Function to remove a directory.
-****************************************************************************/
-ibool PMAPI PM_rmdir(
- const char *filename)
-{
- return RemoveDirectory(filename);
-}
-
-/****************************************************************************
-REMARKS:
-Function to get the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_getFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- HFILE f;
- OFSTRUCT of;
- FILETIME utcTime,localTime;
- SYSTEMTIME sysTime;
- ibool status = false;
-
- of.cBytes = sizeof(of);
- if ((f = OpenFile(filename,&of,OF_READ)) == HFILE_ERROR)
- return false;
- if (!GetFileTime((HANDLE)f,NULL,NULL,&utcTime))
- goto Exit;
- if (!gmTime) {
- if (!FileTimeToLocalFileTime(&utcTime,&localTime))
- goto Exit;
- }
- else
- localTime = utcTime;
- if (!FileTimeToSystemTime(&localTime,&sysTime))
- goto Exit;
- time->year = sysTime.wYear;
- time->mon = sysTime.wMonth-1;
- time->day = sysTime.wYear;
- time->hour = sysTime.wHour;
- time->min = sysTime.wMinute;
- time->sec = sysTime.wSecond;
- status = true;
-
-Exit:
- CloseHandle((HANDLE)f);
- return status;
-}
-
-/****************************************************************************
-REMARKS:
-Function to set the file time and date for a specific file.
-****************************************************************************/
-ibool PMAPI PM_setFileTime(
- const char *filename,
- ibool gmTime,
- PM_time *time)
-{
- HFILE f;
- OFSTRUCT of;
- FILETIME utcTime,localTime;
- SYSTEMTIME sysTime;
- ibool status = false;
-
- of.cBytes = sizeof(of);
- if ((f = OpenFile(filename,&of,OF_WRITE)) == HFILE_ERROR)
- return false;
- sysTime.wYear = time->year;
- sysTime.wMonth = time->mon+1;
- sysTime.wYear = time->day;
- sysTime.wHour = time->hour;
- sysTime.wMinute = time->min;
- sysTime.wSecond = time->sec;
- if (!SystemTimeToFileTime(&sysTime,&localTime))
- goto Exit;
- if (!gmTime) {
- if (!LocalFileTimeToFileTime(&localTime,&utcTime))
- goto Exit;
- }
- else
- utcTime = localTime;
- if (!SetFileTime((HANDLE)f,NULL,NULL,&utcTime))
- goto Exit;
- status = true;
-
-Exit:
- CloseHandle((HANDLE)f);
- return status;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/win32/vflat.c
deleted file mode 100644
index 70491cd..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/vflat.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Dummy module; no virtual framebuffer for this OS
-*
-****************************************************************************/
-
-#include "pmapi.h"
-
-ibool PMAPI VF_available(void)
-{
- return false;
-}
-
-void * PMAPI VF_init(
- ulong baseAddr,
- int bankSize,
- int codeLen,
- void *bankFunc)
-{
- (void)baseAddr;
- (void)bankSize;
- (void)codeLen;
- (void)bankFunc;
- return NULL;
-}
-
-void PMAPI VF_exit(void)
-{
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c
deleted file mode 100644
index 5a901a4..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/****************************************************************************
-*
-* Ultra Long Period Timer
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Win32
-*
-* Description: OS specific implementation for the Zen Timer functions.
-*
-****************************************************************************/
-
-/*---------------------------- Global variables ---------------------------*/
-
-static CPU_largeInteger countFreq;
-static ibool havePerformanceCounter;
-static ulong start,finish;
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Initialise the Zen Timer module internals.
-****************************************************************************/
-void __ZTimerInit(void)
-{
-#ifdef NO_ASSEMBLER
- havePerformanceCounter = false;
-#else
- havePerformanceCounter = QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq);
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Start the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOn(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->start);
- else
- tm->start.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the lap time since the timer was started.
-****************************************************************************/
-static ulong __LZTimerLap(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmLap,tmCount;
-
- if (havePerformanceCounter) {
- QueryPerformanceCounter((LARGE_INTEGER*)&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else {
- tmLap.low = timeGetTime();
- return (tmLap.low - tm->start.low) * 1000L;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Stop the Zen Timer counting.
-****************************************************************************/
-static void __LZTimerOff(
- LZTimerObject *tm)
-{
- if (havePerformanceCounter)
- QueryPerformanceCounter((LARGE_INTEGER*)&tm->end);
- else
- tm->end.low = timeGetTime();
-}
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time in microseconds between start and end timings.
-****************************************************************************/
-static ulong __LZTimerCount(
- LZTimerObject *tm)
-{
- CPU_largeInteger tmCount;
-
- if (havePerformanceCounter) {
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,countFreq.low);
- }
- else
- return (tm->end.low - tm->start.low) * 1000L;
-}
-
-/****************************************************************************
-REMARKS:
-Define the resolution of the long period timer as microseconds per timer tick.
-****************************************************************************/
-#define ULZTIMER_RESOLUTION 1000
-
-/****************************************************************************
-REMARKS:
-Read the Long Period timer from the OS
-****************************************************************************/
-static ulong __ULZReadTime(void)
-{ return timeGetTime(); }
-
-/****************************************************************************
-REMARKS:
-Compute the elapsed time from the BIOS timer tick. Note that we check to see
-whether a midnight boundary has passed, and if so adjust the finish time to
-account for this. We cannot detect if more that one midnight boundary has
-passed, so if this happens we will be generating erronous results.
-****************************************************************************/
-ulong __ULZElapsedTime(ulong start,ulong finish)
-{ return finish - start; }
diff --git a/board/MAI/bios_emulator/scitech/src/pm/x11/event.c b/board/MAI/bios_emulator/scitech/src/pm/x11/event.c
deleted file mode 100644
index b34bfac..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/x11/event.c
+++ /dev/null
@@ -1,307 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Unix / X11
-*
-* Description: X11 event queue implementation for the MGL.
-* This can be used both for windowed and fullscreen (DGA) modes.
-*
-****************************************************************************/
-
-/*---------------------------- Global Variables ---------------------------*/
-
-static ushort keyUpMsg[256] = {0};/* Table of key up messages */
-static int rangeX,rangeY; /* Range of mouse coordinates */
-
-static Display *_EVT_dpy;
-static Window _EVT_win;
-
-typedef struct {
- int keycode;
- int scancode;
-} xkeymap;
-
-xkeymap xkeymaps[] = {
- { 9, KB_esc},
- {24, KB_Q},
- {25, KB_W},
- {26, KB_E},
- {27, KB_R},
- {28, KB_T},
- {29, KB_Y},
- {30, KB_U},
- {31, KB_I},
- {32, KB_O},
- {33, KB_P},
-};
-
-/*---------------------------- Implementation -----------------------------*/
-
-/* These are not used under non-DOS systems */
-#define _EVT_disableInt() 1
-#define _EVT_restoreInt(flags)
-
-/****************************************************************************
-PARAMETERS:
-scanCode - Scan code to test
-
-REMARKS:
-This macro determines if a specified key is currently down at the
-time that the call is made.
-****************************************************************************/
-#define _EVT_isKeyDown(scanCode) (keyUpMsg[scanCode] != 0)
-
-/****************************************************************************
-REMARKS:
-This function is used to return the number of ticks since system
-startup in milliseconds. This should be the same value that is placed into
-the time stamp fields of events, and is used to implement auto mouse down
-events.
-****************************************************************************/
-ulong _EVT_getTicks(void)
-{
- static unsigned starttime = 0;
- struct timeval t;
-
- gettimeofday(&t, NULL);
- if (starttime == 0)
- starttime = t.tv_sec * 1000 + (t.tv_usec/1000);
- return ((t.tv_sec * 1000 + (t.tv_usec/1000)) - starttime);
-}
-
-static int getScancode(int keycode)
-{
- return keycode-8;
-}
-
-/****************************************************************************
-REMARKS:
-Pumps all messages in the application message queue into our event queue.
-****************************************************************************/
-#ifdef X11_CORE
-static void _EVT_pumpX11Messages(void)
-#else
-static void _EVT_pumpMessages(void)
-#endif
-{
- /* TODO: The purpose of this function is to read all keyboard and mouse */
- /* events from the OS specific event queue, translate them and post */
- /* them into the SciTech event queue. */
- event_t evt;
- XEvent ev;
- static int old_mx = 0, old_my = 0, buts = 0, c;
- char buf[2];
-
- while (XPending(_EVT_dpy) && XNextEvent(_EVT_dpy,&ev)) {
- evt.when = _MGL_getTicks();
-
- switch(ev.type){
- case KeyPress:
- c = getScancode(ev.xkey.keycode);
- evt.what = EVT_KEYDOWN;
- evt.message = c << 8;
- XLookupString(&ev.xkey, buf, 2, NULL, NULL);
- evt.message |= buf[0];
- break;
- case KeyRelease:
- c = getScancode(ev.xkey.keycode);
- evt.what = EVT_KEYUP;
- evt.message = keyUpMsg[c];
- if(count < EVENTQSIZE)
- addEvent(&evt);
- keyUpMsg[c] = 0;
- repeatKey[c] = 0;
- break;
- case ButtonPress:
- evt.what = EVT_MOUSEDOWN;
- if(ev.xbutton.button == 1){
- buts |= EVT_LEFTBUT;
- evt.message = EVT_LEFTBMASK;
- }else if(ev.xbutton.button == 2){
- buts |= EVT_MIDDLEBUT;
- evt.message = EVT_MIDDLEBMASK;
- }else if(ev.xbutton.button == 3){
- buts |= EVT_RIGHTBUT;
- evt.message = EVT_RIGHTBMASK;
- }
- evt.modifiers = modifiers | buts;
-
- break;
- case ButtonRelease:
- evt.what = EVT_MOUSEUP;
- if(ev.xbutton.button == 1){
- buts &= ~EVT_LEFTBUT;
- evt.message = EVT_LEFTBMASK;
- }else if(ev.xbutton.button == 2){
- buts &= ~EVT_MIDDLEBUT;
- evt.message = EVT_MIDDLEBMASK;
- }else if(ev.xbutton.button == 3){
- buts &= ~EVT_RIGHTBUT;
- evt.message = EVT_RIGHTBMASK;
- }
- evt.modifiers = modifiers | buts;
-
- break;
- case MotionNotify:
- evt.what = EVT_MOUSEMOVE;
- evt.where_x = ev.xmotion.x;
- evt.where_y = ev.xmotion.y;
- evt.relative_x = evt.where_x - old_mx;
- evt.relative_y = evt.where_y - old_my;
- old_mx = evt.where_x;
- old_my = evt.where_y;
- break;
- }
- if (count < EVENTQSIZE)
- addEvent(&evt);
- }
-
-}
-
-/****************************************************************************
-REMARKS:
-This macro/function is used to converts the scan codes reported by the
-keyboard to our event libraries normalised format. We only have one scan
-code for the 'A' key, and use shift modifiers to determine if it is a
-Ctrl-F1, Alt-F1 etc. The raw scan codes from the keyboard work this way,
-but the OS gives us 'cooked' scan codes, we have to translate them back
-to the raw format.
-****************************************************************************/
-#define _EVT_maskKeyCode(evt)
-
-/****************************************************************************
-REMARKS:
-Safely abort the event module upon catching a fatal error.
-****************************************************************************/
-void _EVT_abort()
-{
- EVT_exit();
- PM_fatalError("Unhandled exception!");
-}
-
-/****************************************************************************
-PARAMETERS:
-mouseMove - Callback function to call wheneve the mouse needs to be moved
-
-REMARKS:
-Initiliase the event handling module. Here we install our mouse handling ISR
-to be called whenever any button's are pressed or released. We also build
-the free list of events in the event queue.
-
-We use handler number 2 of the mouse libraries interrupt handlers for our
-event handling routines.
-****************************************************************************/
-#ifdef X11_CORE
-void EVTAPI EVT_initX11(
-#else
-void EVTAPI EVT_init(
-#endif
- _EVT_mouseMoveHandler mouseMove)
-{
- int result, i,j,k;
- XDeviceInfoPtr list,slist;
-
- /* Initialise the event queue */
- _mouseMove = mouseMove;
- initEventQueue();
- memset(keyUpMsg,0,sizeof(keyUpMsg));
-
-
- /* query server for input extensions */
- result =XQueryExtension(_EVT_dpy,"XInputExtension",&i,&j,&k);
- if(!result) {
- fprintf(stderr,"Your server doesn't support XInput Extensions\n");
- fprintf(stderr,"X11 Joystick disabled\n");
- }
- list = XListInputDevices(_EVT_dpy,&result);
- if (!list) {
- fprintf(stderr,"No extended input devices found !!\n");
- fprintf(stderr,"X11 Joystick disabled\n");
- }
-
-
- /* Catch program termination signals so we can clean up properly */
- signal(SIGABRT, _EVT_abort);
- signal(SIGFPE, _EVT_abort);
- signal(SIGINT, _EVT_abort);
-}
-
-/****************************************************************************
-REMARKS
-Changes the range of coordinates returned by the mouse functions to the
-specified range of values. This is used when changing between graphics
-modes set the range of mouse coordinates for the new display mode.
-****************************************************************************/
-void EVTAPI EVT_setMouseRange(
- int xRes,
- int yRes)
-{
- rangeX = xRes;
- rangeY = yRes;
-}
-
-/****************************************************************************
-REMARKS:
-Initiailises the internal event handling modules. The EVT_suspend function
-can be called to suspend event handling (such as when shelling out to DOS),
-and this function can be used to resume it again later.
-****************************************************************************/
-void EVT_resume(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Suspends all of our event handling operations. This is also used to
-de-install the event handling code.
-****************************************************************************/
-void EVT_suspend(void)
-{
- /* Do nothing for non DOS systems */
-}
-
-/****************************************************************************
-REMARKS
-Exits the event module for program terminatation.
-****************************************************************************/
-void EVT_exit(void)
-{
- /* Restore signal handlers */
- signal(SIGABRT, SIG_DFL);
- signal(SIGFPE, SIG_DFL);
- signal(SIGINT, SIG_DFL);
-
- /* TODO: Do any OS specific cleanup in here */
-}
-
-/****************************************************************************
-REMARKS
-Sets the current X11 display
-****************************************************************************/
-void EVT_setX11Display(Display *dpy, Window win)
-{
- _EVT_dpy = dpy;
- _EVT_win = win;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/pm/x11/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/x11/oshdr.h
deleted file mode 100644
index 45d7451..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/x11/oshdr.h
+++ /dev/null
@@ -1,38 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: BeOS
-*
-* Description: Include file to include all OS specific header files.
-*
-****************************************************************************/
-
-#include <X11/Xlib.h>
-#include <X11/keysym.h>
-#include <time.h>
-#include <signal.h>
-#ifdef USE_OS_JOYSTICK
-#include <X11/extensions/XI.h>
-#include <X11/extensions/XInput.h>
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/pm/z_samples.vpj b/board/MAI/bios_emulator/scitech/src/pm/z_samples.vpj
deleted file mode 100644
index 0c6c80f..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/z_samples.vpj
+++ /dev/null
@@ -1,74 +0,0 @@
-[SciTech]
-compiler=wc10-
-targetos=d32
-[COMPILER]
-version=5.0b
-MACRO=enable_current_compiler\n
-activeconfig=,getch.exe
-FILTERNAME=Source Files\n
-FILTERPATTERN=*.c;*.cpp;*.cxx;*.prg;*.pas;*.dpr;*.bas;*.java;*.sc;*.e;*.cob;*.html;*.rc\n
-FILTERASSOCIATEFILETYPES=0
-FILTERAPPCOMMAND=\n
-vcsproject=SCC:Perforce SCM://depot
-vcslocalpath=SCC:Perforce SCM:c:\
-compile=concur|capture|:Compile:&Compile,dmake %n.obj
-make=concur|capture|clear|saveall|:Build:&Build,dmake %b
-rebuild=concur|capture|clear|saveall|:Rebuild:&Rebuild,dmake -u %b
-debug=concur|capture|savenone|nochangedir|:Debug:&Debug,wdn %b
-execute=hide|savenone|nochangedir|:Execute:E&xecute,
-user1=hide|nochangedir|:User 1:User 1,
-user2=hide|nochangedir|:User 2:User 2,
-usertool_build_all=concur|capture|clear|savenone|:Build All:Build All,dmake all
-usertool_rebuild_all=concur|capture|clear|savenone|:Rebuild All:Rebuild All,dmake -u all
-usertool_clean_directory=concur|capture|savenone|:Clean Directory:&Clean Directory,dmake cleanexe
-workingdir=.
-includedirs=%(SCITECH)\include;%(PRIVATE)\include
-reffile=
-[FILES]
-tests\altbrk.c
-tests\altcrit.c
-tests\biosptr.c
-tests\block.c
-tests\brk.c
-tests\callreal.c
-tests\checks.c
-tests\cpu.c
-tests\critical.c
-tests\getch.c
-tests\isvesa.c
-tests\key.c
-tests\key15.c
-tests\memtest.c
-tests\mouse.c
-tests\rtc.c
-tests\showpci.c
-tests\tick.c
-tests\timerc.c
-tests\timercpp.cpp
-tests\uswc.c
-tests\vftest.c
-tests\video.c
-[ASSOCIATION]
-[CONFIGURATIONS]
-config=,altbrk.exe
-config=,altcrit.exe
-config=,biosptr.exe
-config=,block.exe
-config=,brk.exe
-config=,callreal.exe
-config=,cpu.exe
-config=,critical.exe
-config=,getch.exe
-config=,isvesa.exe
-config=,key.exe
-config=,key15.exe
-config=,memtest.exe
-config=,mouse.exe
-config=,rtc.exe
-config=,showpci.exe
-config=,tick.exe
-config=,timerc.exe
-config=,timercpp.exe
-config=,uswc.exe
-config=,vftest.exe
-config=,video.exe
diff --git a/board/MAI/bios_emulator/scitech/src/pm/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/ztimer.c
deleted file mode 100644
index 5acf7b1..0000000
--- a/board/MAI/bios_emulator/scitech/src/pm/ztimer.c
+++ /dev/null
@@ -1,516 +0,0 @@
-/****************************************************************************
-*
-* SciTech OS Portability Manager Library
-*
-* ========================================================================
-*
-* The contents of this file are subject to the SciTech MGL Public
-* License Version 1.0 (the "License"); you may not use this file
-* except in compliance with the License. You may obtain a copy of
-* the License at http://www.scitechsoft.com/mgl-license.txt
-*
-* Software distributed under the License is distributed on an
-* "AS IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
-* implied. See the License for the specific language governing
-* rights and limitations under the License.
-*
-* The Original Code is Copyright (C) 1991-1998 SciTech Software, Inc.
-*
-* The Initial Developer of the Original Code is SciTech Software, Inc.
-* All Rights Reserved.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-*
-* Description: Module to implement high precision timing on each OS.
-*
-****************************************************************************/
-
-#include "ztimer.h"
-#include "pmapi.h"
-#include "oshdr.h"
-
-/*---------------------------- Global variables ---------------------------*/
-
-static LZTimerObject LZTimer;
-static ulong start,finish;
-#ifdef __INTEL__
-static long cpuSpeed = -1;
-static ibool haveRDTSC = false;
-#endif
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* External Intel assembler functions */
-#ifdef __INTEL__
-/* {secret} */
-void _ASMAPI _CPU_readTimeStamp(CPU_largeInteger *time);
-/* {secret} */
-ulong _ASMAPI _CPU_diffTime64(CPU_largeInteger *t1,CPU_largeInteger *t2,CPU_largeInteger *t);
-/* {secret} */
-ulong _ASMAPI _CPU_calcMicroSec(CPU_largeInteger *count,ulong freq);
-#endif
-
-#if defined(__SMX32__)
-#include "smx/ztimer.c"
-#elif defined(__RTTARGET__)
-#include "rttarget/ztimer.c"
-#elif defined(__REALDOS__)
-#include "dos/ztimer.c"
-#elif defined(__NT_DRIVER__)
-#include "ntdrv/ztimer.c"
-#elif defined(__WIN32_VXD__)
-#include "vxd/ztimer.c"
-#elif defined(__WINDOWS32__)
-#include "win32/ztimer.c"
-#elif defined(__OS2_VDD__)
-#include "vdd/ztimer.c"
-#elif defined(__OS2__)
-#include "os2/ztimer.c"
-#elif defined(__LINUX__)
-#include "linux/ztimer.c"
-#elif defined(__QNX__)
-#include "qnx/ztimer.c"
-#elif defined(__BEOS__)
-#include "beos/ztimer.c"
-#else
-#error Timer library not ported to this platform yet!
-#endif
-
-/*------------------------ Public interface routines ----------------------*/
-
-/****************************************************************************
-DESCRIPTION:
-Initializes the Zen Timer library (extended)
-
-PARAMETERS:
-accurate - True of the speed should be measured accurately
-
-HEADER:
-ztimer.h
-
-REMARKS:
-This function initializes the Zen Timer library, and /must/ be called before
-any of the remaining Zen Timer library functions are called. The accurate
-parameter is used to determine whether highly accurate timing should be
-used or not. If high accuracy is needed, more time is spent profiling the
-actual speed of the CPU so that we can obtain highly accurate timing
-results, but the time spent in the initialisation routine will be
-significantly longer (on the order of 5 seconds).
-****************************************************************************/
-void ZAPI ZTimerInitExt(
- ibool accurate)
-{
- if (cpuSpeed == -1) {
- __ZTimerInit();
-#ifdef __INTEL__
- cpuSpeed = CPU_getProcessorSpeedInHZ(accurate);
- haveRDTSC = CPU_haveRDTSC() && (cpuSpeed > 0);
-#endif
- }
-}
-
-/****************************************************************************
-DESCRIPTION:
-Initializes the Zen Timer library.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-This function initializes the Zen Timer library, and /must/ be called before
-any of the remaining Zen Timer library functions are called.
-****************************************************************************/
-void ZAPI ZTimerInit(void)
-{
- ZTimerInitExt(false);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Starts the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to start timing with
-
-REMARKS:
-Starts the Long Period Zen Timer counting. Once you have started the timer,
-you can stop it with LZTimerOff or you can latch the current count with
-LZTimerLap.
-
-The Long Period Zen Timer uses a number of different high precision timing
-mechanisms to obtain microsecond accurate timings results whenever possible.
-The following different techniques are used depending on the operating
-system, runtime environment and CPU on the target machine. If the target
-system has a Pentium CPU installed which supports the Read Time Stamp
-Counter instruction (RDTSC), the Zen Timer library will use this to
-obtain the maximum timing precision available.
-
-Under 32-bit Windows, if the Pentium RDTSC instruction is not available, we
-first try to use the Win32 QueryPerformanceCounter API, and if that is not
-available we fall back on the timeGetTime API which is always supported.
-
-Under 32-bit DOS, if the Pentium RDTSC instruction is not available, we
-then do all timing using the old style 8253 timer chip. The 8253 timer
-routines provide highly accurate timings results in pure DOS mode, however
-in a DOS box under Windows or other Operating Systems the virtualization
-of the timer can produce inaccurate results.
-
-Note: Because the Long Period Zen Timer stores the results in a 32-bit
- unsigned integer, you can only time periods of up to 2^32 microseconds,
- or about 1hr 20mins. For timing longer periods use the Ultra Long
- Period Zen Timer.
-
-SEE ALSO:
-LZTimerOff, LZTimerLap, LZTimerCount
-****************************************************************************/
-void ZAPI LZTimerOnExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- if (haveRDTSC) {
- _CPU_readTimeStamp(&tm->start);
- }
- else
-#endif
- __LZTimerOn(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer and keeps it
-running.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to do lap timing with
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Returns the current count that has elapsed since the last call to
-LZTimerOn in microseconds. The time continues to run after this function is
-called so you can call this function repeatedly.
-
-SEE ALSO:
-LZTimerOn, LZTimerOff, LZTimerCount
-****************************************************************************/
-ulong ZAPI LZTimerLapExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- CPU_largeInteger tmLap,tmCount;
-
- if (haveRDTSC) {
- _CPU_readTimeStamp(&tmLap);
- _CPU_diffTime64(&tm->start,&tmLap,&tmCount);
- return _CPU_calcMicroSec(&tmCount,cpuSpeed);
- }
- else
-#endif
- return __LZTimerLap(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Stops the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to stop timing with
-
-REMARKS:
-Stops the Long Period Zen Timer counting and latches the count. Once you
-have stopped the timer you can read the count with LZTimerCount. If you need
-highly accurate timing, you should use the on and off functions rather than
-the lap function since the lap function does not subtract the overhead of
-the function calls from the timed count.
-
-SEE ALSO:
-LZTimerOn, LZTimerLap, LZTimerCount
-****************************************************************************/
-void ZAPI LZTimerOffExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- if (haveRDTSC) {
- _CPU_readTimeStamp(&tm->end);
- }
- else
-#endif
- __LZTimerOff(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-tm - Timer object to compute the elapsed time with.
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Returns the current count that has elapsed between calls to
-LZTimerOn and LZTimerOff in microseconds.
-
-SEE ALSO:
-LZTimerOn, LZTimerOff, LZTimerLap
-****************************************************************************/
-ulong ZAPI LZTimerCountExt(
- LZTimerObject *tm)
-{
-#ifdef __INTEL__
- CPU_largeInteger tmCount;
-
- if (haveRDTSC) {
- _CPU_diffTime64(&tm->start,&tm->end,&tmCount);
- return _CPU_calcMicroSec(&tmCount,cpuSpeed);
- }
- else
-#endif
- return __LZTimerCount(tm);
-}
-
-/****************************************************************************
-DESCRIPTION:
-Starts the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Obsolete function. You should use the LZTimerOnExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-void ZAPI LZTimerOn(void)
-{ LZTimerOnExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer and keeps it
-running.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Obsolete function. You should use the LZTimerLapExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-ulong ZAPI LZTimerLap(void)
-{ return LZTimerLapExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Stops the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Obsolete function. You should use the LZTimerOffExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-void ZAPI LZTimerOff(void)
-{ LZTimerOffExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in microseconds.
-
-REMARKS:
-Obsolete function. You should use the LZTimerCountExt function instead
-which allows for multiple timers running at the same time.
-****************************************************************************/
-ulong ZAPI LZTimerCount(void)
-{ return LZTimerCountExt(&LZTimer); }
-
-/****************************************************************************
-DESCRIPTION:
-Starts the Ultra Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Starts the Ultra Long Period Zen Timer counting. Once you have started the
-timer, you can stop it with ULZTimerOff or you can latch the current count
-with ULZTimerLap.
-
-The Ultra Long Period Zen Timer uses the available operating system services
-to obtain accurate timings results with as much precision as the operating
-system provides, but with enough granularity to time longer periods of
-time than the Long Period Zen Timer. Note that the resolution of the timer
-ticks is not constant between different platforms, and you should use the
-ULZTimerResolution function to determine the number of seconds in a single
-tick of the timer, and use this to convert the timer counts to seconds.
-
-Under 32-bit Windows, we use the timeGetTime function which provides a
-resolution of 1 millisecond (0.001 of a second). Given that the timer
-count is returned as an unsigned 32-bit integer, this we can time intervals
-that are a maximum of 2^32 milliseconds in length (or about 1,200 hours or
-50 days!).
-
-Under 32-bit DOS, we use the system timer tick which runs at 18.2 times per
-second. Given that the timer count is returned as an unsigned 32-bit integer,
-this we can time intervals that are a maximum of 2^32 * (1/18.2) in length
-(or about 65,550 hours or 2731 days!).
-
-SEE ALSO:
-ULZTimerOff, ULZTimerLap, ULZTimerCount, ULZElapsedTime, ULZReadTime
-****************************************************************************/
-void ZAPI ULZTimerOn(void)
-{ start = __ULZReadTime(); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Ultra Long Period Zen Timer and keeps it
-running.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in resolution counts.
-
-REMARKS:
-Returns the current count that has elapsed since the last call to
-ULZTimerOn in microseconds. The time continues to run after this function is
-called so you can call this function repeatedly.
-
-SEE ALSO:
-ULZTimerOn, ULZTimerOff, ULZTimerCount
-****************************************************************************/
-ulong ZAPI ULZTimerLap(void)
-{ return (__ULZReadTime() - start); }
-
-/****************************************************************************
-DESCRIPTION:
-Stops the Long Period Zen Timer counting.
-
-HEADER:
-ztimer.h
-
-REMARKS:
-Stops the Ultra Long Period Zen Timer counting and latches the count. Once
-you have stopped the timer you can read the count with ULZTimerCount.
-
-SEE ALSO:
-ULZTimerOn, ULZTimerLap, ULZTimerCount
-****************************************************************************/
-void ZAPI ULZTimerOff(void)
-{ finish = __ULZReadTime(); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the current count for the Ultra Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Count that has elapsed in resolution counts.
-
-REMARKS:
-Returns the current count that has elapsed between calls to
-ULZTimerOn and ULZTimerOff in resolution counts.
-
-SEE ALSO:
-ULZTimerOn, ULZTimerOff, ULZTimerLap, ULZTimerResolution
-****************************************************************************/
-ulong ZAPI ULZTimerCount(void)
-{ return (finish - start); }
-
-/****************************************************************************
-DESCRIPTION:
-Reads the current time from the Ultra Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-RETURNS:
-Current timer value in resolution counts.
-
-REMARKS:
-Reads the current Ultra Long Period Zen Timer and returns itÂ’s current
-count. You can use the ULZElapsedTime function to find the elapsed time
-between two timer count readings.
-
-SEE ALSO:
-ULZElapsedTime, ULZTimerResolution
-****************************************************************************/
-ulong ZAPI ULZReadTime(void)
-{ return __ULZReadTime(); }
-
-/****************************************************************************
-DESCRIPTION:
-Compute the elapsed time between two timer counts.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-start - Starting time for elapsed count
-finish - Ending time for elapsed count
-
-RETURNS:
-Elapsed timer in resolution counts.
-
-REMARKS:
-Returns the elapsed time for the Ultra Long Period Zen Timer in units of the
-timers resolution (1/18th of a second under DOS). This function correctly
-computes the difference even if a midnight boundary has been crossed
-during the timing period.
-
-SEE ALSO:
-ULZReadTime, ULZTimerResolution
-****************************************************************************/
-ulong ZAPI ULZElapsedTime(
- ulong start,
- ulong finish)
-{ return __ULZElapsedTime(start,finish); }
-
-/****************************************************************************
-DESCRIPTION:
-Returns the resolution of the Ultra Long Period Zen Timer.
-
-HEADER:
-ztimer.h
-
-PARAMETERS:
-resolution - Place to store the timer in microseconds per timer count.
-
-REMARKS:
-Returns the resolution of the Ultra Long Period Zen Timer as a 32-bit
-integer value measured in microseconds per timer count.
-
-SEE ALSO:
-ULZReadTime, ULZElapsedTime, ULZTimerCount
-****************************************************************************/
-void ZAPI ULZTimerResolution(
- ulong *resolution)
-{ *resolution = ULZTIMER_RESOLUTION; }
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h b/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h
deleted file mode 100644
index 77c545a..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h
+++ /dev/null
@@ -1,450 +0,0 @@
-/* $XConsortium: AsmMacros.h /main/13 1996/10/25 11:33:12 kaleb $ */
-/*
- * (c) Copyright 1993,1994 by David Wexelblat <dwex@xfree86.org>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * DAVID WEXELBLAT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- *
- * Except as contained in this notice, the name of David Wexelblat shall not be
- * used in advertising or otherwise to promote the sale, use or other dealings
- * in this Software without prior written authorization from David Wexelblat.
- *
- */
-/*
- * Copyright 1997
- * Digital Equipment Corporation. All rights reserved.
- * This software is furnished under license and may be used and copied only in
- * accordance with the following terms and conditions. Subject to these
- * conditions, you may download, copy, install, use, modify and distribute
- * this software in source and/or binary form. No title or ownership is
- * transferred hereby.
- *
- * 1) Any source code used, modified or distributed must reproduce and retain
- * this copyright notice and list of conditions as they appear in the source
- * file.
- *
- * 2) No right is granted to use any trade name, trademark, or logo of Digital
- * Equipment Corporation. Neither the "Digital Equipment Corporation" name
- * nor any trademark or logo of Digital Equipment Corporation may be used
- * to endorse or promote products derived from this software without the
- * prior written permission of Digital Equipment Corporation.
- *
- * 3) This software is provided "AS-IS" and any express or implied warranties,
- * including but not limited to, any implied warranties of merchantability,
- * fitness for a particular purpose, or non-infringement are disclaimed. In
- * no event shall DIGITAL be liable for any damages whatsoever, and in
- * particular, DIGITAL shall not be liable for special, indirect,
- * consequential, or incidental damages or damages for
- * lost profits, loss of revenue or loss of use, whether such damages arise
- * in contract,
- * negligence, tort, under statute, in equity, at law or otherwise, even if
- * advised of the possibility of such damage.
- *
- */
-
-/* $XFree86: xc/programs/Xserver/hw/xfree86/SuperProbe/AsmMacros.h,v 3.14 1999/09/25 14:36:58 dawes Exp $ */
-
-#if defined(__GNUC__)
-#if defined(linux) && (defined(__alpha__) || defined(__ia64__))
-#undef inb
-#define inb _inb
-#undef inw
-#define inw _inw
-#undef inl
-#define inl _inl
-#undef outb
-#define outb(p,v) _outb((v),(p))
-#undef outw
-#define outw(p,v) _outw((v),(p))
-#undef outl
-#define outl(p,v) _outl((v),(p))
-#else
-#if defined(__sparc__)
-#ifndef ASI_PL
-#define ASI_PL 0x88
-#endif
-
-static __inline__ void
-outb(port, val)
-unsigned long port;
-char val;
-{
- __asm__ __volatile__("stba %0, [%1] %2" : : "r" (val), "r" (port), "i" (ASI_PL));
-}
-
-static __inline__ void
-outw(port, val)
-unsigned long port;
-char val;
-{
- __asm__ __volatile__("stha %0, [%1] %2" : : "r" (val), "r" (port), "i" (ASI_PL));
-}
-
-static __inline__ void
-outl(port, val)
-unsigned long port;
-char val;
-{
- __asm__ __volatile__("sta %0, [%1] %2" : : "r" (val), "r" (port), "i" (ASI_PL));
-}
-
-static __inline__ unsigned int
-inb(port)
-unsigned long port;
-{
- unsigned char ret;
- __asm__ __volatile__("lduba [%1] %2, %0" : "=r" (ret) : "r" (port), "i" (ASI_PL));
- return ret;
-}
-
-static __inline__ unsigned int
-inw(port)
-unsigned long port;
-{
- unsigned char ret;
- __asm__ __volatile__("lduha [%1] %2, %0" : "=r" (ret) : "r" (port), "i" (ASI_PL));
- return ret;
-}
-
-static __inline__ unsigned int
-inl(port)
-unsigned long port;
-{
- unsigned char ret;
- __asm__ __volatile__("lda [%1] %2, %0" : "=r" (ret) : "r" (port), "i" (ASI_PL));
- return ret;
-}
-#else
-#ifdef __arm32__
-unsigned int IOPortBase; /* Memory mapped I/O port area */
-
-static __inline__ void
-outb(port, val)
- short port;
- char val;
-{
- if ((unsigned short)port >= 0x400) return;
-
- *(volatile unsigned char*)(((unsigned short)(port))+IOPortBase) = val;
-}
-
-static __inline__ void
-outw(port, val)
- short port;
- short val;
-{
- if ((unsigned short)port >= 0x400) return;
-
- *(volatile unsigned short*)(((unsigned short)(port))+IOPortBase) = val;
-}
-
-static __inline__ void
-outl(port, val)
- short port;
- int val;
-{
- if ((unsigned short)port >= 0x400) return;
-
- *(volatile unsigned long*)(((unsigned short)(port))+IOPortBase) = val;
-}
-
-static __inline__ unsigned int
-inb(port)
- short port;
-{
- if ((unsigned short)port >= 0x400) return((unsigned int)-1);
-
- return(*(volatile unsigned char*)(((unsigned short)(port))+IOPortBase));
-}
-
-static __inline__ unsigned int
-inw(port)
- short port;
-{
- if ((unsigned short)port >= 0x400) return((unsigned int)-1);
-
- return(*(volatile unsigned short*)(((unsigned short)(port))+IOPortBase));
-}
-
-static __inline__ unsigned int
-inl(port)
- short port;
-{
- if ((unsigned short)port >= 0x400) return((unsigned int)-1);
-
- return(*(volatile unsigned long*)(((unsigned short)(port))+IOPortBase));
-}
-#else /* __arm32__ */
-#if defined(Lynx) && defined(__powerpc__)
-extern unsigned char *ioBase;
-
-static volatile void
-eieio()
-{
- __asm__ __volatile__ ("eieio");
-}
-
-static void
-outb(port, value)
-short port;
-unsigned char value;
-{
- *(uchar *)(ioBase + port) = value; eieio();
-}
-
-static void
-outw(port, value)
-short port;
-unsigned short value;
-{
- *(unsigned short *)(ioBase + port) = value; eieio();
-}
-
-static void
-outl(port, value)
-short port;
-unsigned long value;
-{
- *(unsigned long *)(ioBase + port) = value; eieio();
-}
-
-static unsigned char
-inb(port)
-short port;
-{
- unsigned char val;
-
- val = *((unsigned char *)(ioBase + port)); eieio();
- return(val);
-}
-
-static unsigned short
-inw(port)
-short port;
-{
- unsigned short val;
-
- val = *((unsigned short *)(ioBase + port)); eieio();
- return(val);
-}
-
-static unsigned long
-inl(port)
-short port;
-{
- unsigned long val;
-
- val = *((unsigned long *)(ioBase + port)); eieio();
- return(val);
-}
-
-#else
-#if defined(__FreeBSD__) && defined(__alpha__)
-
-#include <sys/types.h>
-
-extern void outb(u_int32_t port, u_int8_t val);
-extern void outw(u_int32_t port, u_int16_t val);
-extern void outl(u_int32_t port, u_int32_t val);
-extern u_int8_t inb(u_int32_t port);
-extern u_int16_t inw(u_int32_t port);
-extern u_int32_t inl(u_int32_t port);
-
-#else
-#ifdef GCCUSESGAS
-static __inline__ void
-outb(port, val)
-short port;
-char val;
-{
- __asm__ __volatile__("outb %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outw(port, val)
-short port;
-short val;
-{
- __asm__ __volatile__("outw %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(port, val)
-short port;
-unsigned int val;
-{
- __asm__ __volatile__("outl %0,%1" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(port)
-short port;
-{
- unsigned char ret;
- __asm__ __volatile__("inb %1,%0" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inw(port)
-short port;
-{
- unsigned short ret;
- __asm__ __volatile__("inw %1,%0" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inl(port)
-short port;
-{
- unsigned int ret;
- __asm__ __volatile__("inl %1,%0" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-#else /* GCCUSESGAS */
-
-static __inline__ void
-outb(port, val)
- short port;
- char val;
-{
- __asm__ __volatile__("out%B0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outw(port, val)
- short port;
- short val;
-{
- __asm__ __volatile__("out%W0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ void
-outl(port, val)
- short port;
- unsigned int val;
-{
- __asm__ __volatile__("out%L0 (%1)" : :"a" (val), "d" (port));
-}
-
-static __inline__ unsigned int
-inb(port)
- short port;
-{
- unsigned int ret;
- __asm__ __volatile__("in%B0 (%1)" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inw(port)
- short port;
-{
- unsigned int ret;
- __asm__ __volatile__("in%W0 (%1)" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-static __inline__ unsigned int
-inl(port)
- short port;
-{
- unsigned int ret;
- __asm__ __volatile__("in%L0 (%1)" :
- "=a" (ret) :
- "d" (port));
- return ret;
-}
-
-#endif /* GCCUSESGAS */
-#endif /* Lynx && __powerpc__ */
-#endif /* arm32 */
-#endif /* linux && __sparc__ */
-#endif /* linux && __alpha__ */
-#endif /* __FreeBSD__ && __alpha__ */
-
-#if defined(linux) || defined(__arm32__) || (defined(Lynx) && defined(__powerpc__))
-
-#define intr_disable()
-#define intr_enable()
-
-#else
-
-static __inline__ void
-intr_disable()
-{
- __asm__ __volatile__("cli");
-}
-
-static __inline__ void
-intr_enable()
-{
- __asm__ __volatile__("sti");
-}
-
-#endif /* else !linux && !__arm32__ */
-
-#else /* __GNUC__ */
-
-#if defined(_MINIX) && defined(_ACK)
-
-/* inb, outb, inw and outw are defined in the library */
-/* ... but I've no idea if the same is true for inl & outl */
-
-u8_t inb(U16_t);
-void outb(U16_t, U8_t);
-u16_t inw(U16_t);
-void outw(U16_t, U16_t);
-u32_t inl(U16_t);
-void outl(U16_t, U32_t);
-
-#else /* not _MINIX and _ACK */
-
-# if defined(__STDC__) && (__STDC__ == 1)
-# ifndef NCR
-# define asm __asm
-# endif
-# endif
-# ifdef SVR4
-# include <sys/types.h>
-# ifndef __USLC__
-# define __USLC__
-# endif
-# endif
-#ifndef SCO325
-# include <sys/inline.h>
-#else
-# include "../common/scoasm.h"
-#endif
-#define intr_disable() asm("cli")
-#define intr_enable() asm("sti")
-
-#endif /* _MINIX and _ACK */
-#endif /* __GNUC__ */
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/README b/board/MAI/bios_emulator/scitech/src/v86bios/README
deleted file mode 100644
index cb65674..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/README
+++ /dev/null
@@ -1,32 +0,0 @@
-
-This is a preliminary version of a VGA softbooter for LINUX.
-
-It makes use of the of the vm86() call and is therefore only
-usable on ix86 systems.
-There are plans to port this program to use a x86 emulator
-like x86emu. Also it may be ported to other operating systems.
-
-So far it has been tested on a small number of cards. It might
-well be that it will fail on your card.
-
-If you need to make modifications to the programs to be able
-to boot your card please let the author know.
-
-So far there is no command line interface. All options need
-to be hardcoded. You can do this by editing debug.h. You can
-turn on a bunch of debug output. Other options allow you to
-boot the primary card (CONFIG_ACTIVE_DEVICE), save the bios
-to a file (SAVE_BIOS), and map the original system bios
-(MAP_SYS_BIOS).
-
-The author wants to thank
- Hans Lermen (dosemu)
- and
- Kendall Bennett (x86emu)
-for their support.
-
-Parts of the code - especially in v86.c and io.c - are based on code
-taken from dosemu. Parts of the code in int.c are based on code taken
-from x86emu
-
-Egbert Eich. <Egbert.Eich@Physik.TU-Darmstadt.DE>
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/awk.scr b/board/MAI/bios_emulator/scitech/src/v86bios/awk.scr
deleted file mode 100644
index 9d2a80d..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/awk.scr
+++ /dev/null
@@ -1,15 +0,0 @@
-/.*\(0x3da.*/||/.*\(0x3ba.*/ {
- if (v_3da != 1) print "_v_retrace_";
- v_3da = 1;
- next;
- }
-/.*\(0x42.*/||/.*\(0x43.*/ {
- if (v_4x != 1) print "_timer_";
- v_4x = 1;
- next;
-}
-{
- print;
- v_3da = 0;
- v_4x = 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c b/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c
deleted file mode 100644
index 6b12dff..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c
+++ /dev/null
@@ -1,415 +0,0 @@
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <string.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/stat.h>
-#include <getopt.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#elif defined(HAVE_SYS_PERM)
-#include <sys/perm.h>
-#endif
-#include "debug.h"
-#include "v86bios.h"
-#include "pci.h"
-#include "AsmMacros.h"
-
-#define SIZE 0x100000
-#define VRAM_START 0xA0000
-#define VRAM_SIZE 0x1FFFF
-#define V_BIOS_SIZE 0x1FFFF
-#define BIOS_START 0x7C00 /* default BIOS entry */
-#define BIOS_MEM 0x600
-
-CARD8 code[] = { 0xcd, 0x10, 0xf4 };
-struct config Config;
-
-static int map(void);
-static void unmap(void);
-static void runBIOS(int argc, char **argv);
-static int map_vram(void);
-static void unmap_vram(void);
-static int copy_vbios(memType base);
-static int copy_sys_bios(void);
-static CARD32 setup_int_vect(void);
-static void update_bios_vars(void);
-static int chksum(CARD8 *start);
-static void setup_bios_regs(i86biosRegsPtr regs, int argc, char **argv);
-static void print_regs(i86biosRegsPtr regs);
-void dprint(unsigned long start, unsigned long size);
-
-void loadCodeToMem(unsigned char *ptr, CARD8 *code);
-
-static int vram_mapped = 0;
-static char* bios_var;
-
-
-int
-main(int argc,char **argv)
-{
- CARD32 vbios_base;
-
- Config.PrintPort = PRINT_PORT;
- Config.IoStatistics = IO_STATISTICS;
- Config.PrintIrq = PRINT_IRQ;
- Config.PrintPci = PRINT_PCI;
- Config.ShowAllDev = SHOW_ALL_DEV;
- Config.PrintIp = PRINT_IP;
- Config.SaveBios = SAVE_BIOS;
- Config.Trace = TRACE;
- Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY;
- Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE;
- Config.MapSysBios = MAP_SYS_BIOS;
- Config.Resort = RESORT;
- Config.FixRom = FIX_ROM;
- Config.NoConsole = NO_CONSOLE;
- Config.Verbose = VERBOSE;
-
- if (!map())
- exit(1);
- if (!copy_sys_bios())
- exit(1);
- if (!(vbios_base = setup_int_vect()))
- exit(1);
- if (!map_vram())
- exit(1);
- if (!copy_vbios(vbios_base))
- exit(1);
-
- iopl(3);
- setup_io();
- runBIOS(argc,argv);
- update_bios_vars();
- unmap_vram();
- iopl(0);
- unmap();
- printf("done !\n");
- exit (1);
-}
-
-int
-map(void)
-{
- void* mem;
-
- mem = mmap(0, (size_t)SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_PRIVATE | MAP_ANON,
- -1, 0 );
- if (mem != 0) {
- perror("anonymous map");
- return (0);
- }
- memset(mem,0,SIZE);
-
- loadCodeToMem((unsigned char *) BIOS_START, code);
- return (1);
-}
-
-static int
-copy_sys_bios(void)
-{
-#define SYS_BIOS 0xF0000
- int mem_fd;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS)
- goto Error;
- if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF)
- goto Error;
-
- close(mem_fd);
- return (1);
-
-Error:
- perror("sys_bios");
- close(mem_fd);
- return (0);
-}
-
-static int
-map_vram(void)
-{
- int mem_fd;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return 0;
- }
-
-#ifndef __alpha__
- if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED,
- mem_fd, VRAM_START) == (void *) -1)
-#else
- if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */
- if (!_bus_base_sparse()) sparse_shift = 0;
- if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift),
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- mem_fd, (VRAM_START << sparse_shift)
- | _bus_base_sparse())) == (void *) -1)
-#endif
- {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return (0);
- }
- vram_mapped = 1;
- close(mem_fd);
- return (1);
-}
-
-static int
-copy_vbios(memType v_base)
-{
- int mem_fd;
- unsigned char *tmp;
- int size;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) {
- fprintf(stderr,"Cannot lseek\n");
- goto Error;
- }
- tmp = (unsigned char *)malloc(3);
- if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base)
- goto Error;
-
- if (*tmp != 0x55 || *(tmp+1) != 0xAA ) {
- fprintf(stderr,"No bios found at: 0x%lx\n",v_base);
- goto Error;
- }
-#ifdef DEBUG
- dprint((unsigned long)tmp,0x100);
-#endif
- size = *(tmp+2) * 512;
-
- if (read(mem_fd, (char *)v_base, (size_t) size) != (size_t) size) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- free(tmp);
- close(mem_fd);
- if (!chksum((CARD8*)v_base))
- return (0);
-
- return (1);
-
-Error:
- perror("v_bios");
- close(mem_fd);
- return (0);
-}
-
-static void
-unmap(void)
-{
- munmap(0,SIZE);
-}
-
-static void
-unmap_vram(void)
-{
- if (!vram_mapped) return;
-
- munmap((void*)VRAM_START,VRAM_SIZE);
- vram_mapped = 0;
-}
-
-static void
-runBIOS(int argc, char ** argv)
-{
- i86biosRegs bRegs;
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- setup_bios_regs(&bRegs, argc, argv);
- do_x86(BIOS_START,&bRegs);
- print_regs(&bRegs);
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-}
-
-static CARD32
-setup_int_vect(void)
-{
- int mem_fd;
- CARD32 vbase;
- void *map;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return (0);
- }
-
- close(mem_fd);
- memcpy(0,map,BIOS_MEM);
- munmap(map,0x2000);
- /*
- * create a backup copy of the bios variables to write back the
- * modified values
- */
- bios_var = (char *)malloc(BIOS_MEM);
- memcpy(bios_var,0,BIOS_MEM);
-
- vbase = (*((CARD16*)(0x10 << 2) + 1)) << 4;
- fprintf(stderr,"vbase: 0x%x\n",vbase);
- return vbase;
-}
-
-static void
-update_bios_vars(void)
-{
- int mem_fd;
- void *map;
- memType i;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return;
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return;
- }
-
- for (i = 0; i < BIOS_MEM; i++) {
- if (bios_var[i] != *(CARD8*)i)
- *((CARD8*)map + i) = *(CARD8*)i;
- }
-
- munmap(map,0x2000);
- close(mem_fd);
-}
-
-
-static void
-setup_bios_regs(i86biosRegsPtr regs, int argc, char **argv)
-{
- int c;
-
- regs->ax = 0;
- regs->bx = 0;
- regs->cx = 0;
- regs->dx = 0;
- regs->es = 0;
- regs->di = 0;
- opterr = 0;
- while ((c = getopt(argc,argv,"a:b:c:d:e:i:")) != EOF) {
- switch (c) {
- case 'a':
- regs->ax = strtol(optarg,NULL,0);
- break;
- case 'b':
- regs->bx = strtol(optarg,NULL,0);
- break;
- case 'c':
- regs->cx = strtol(optarg,NULL,0);
- break;
- case 'd':
- regs->dx = strtol(optarg,NULL,0);
- break;
- case 'e':
- regs->es = strtol(optarg,NULL,0);
- break;
- case 'i':
- regs->di = strtol(optarg,NULL,0);
- break;
- }
- }
-}
-
-
-static int
-chksum(CARD8 *start)
-{
- CARD16 size;
- CARD8 val = 0;
- int i;
-
- size = *(start+2) * 512;
- for (i = 0; i<size; i++)
- val += *(start + i);
-
- if (!val)
- return 1;
-
- fprintf(stderr,"BIOS cksum wrong!\n");
- return 0;
-}
-
-static void
-print_regs(i86biosRegsPtr regs)
-{
- printf("ax=%x bx=%x cx=%x dx=%x es=%x di=%x\n",(CARD16)regs->ax,
- (CARD16)regs->bx,(CARD16)regs->cx,(CARD16)regs->dx,
- (CARD16)regs->es,(CARD16)regs->di);
-}
-
-void
-loadCodeToMem(unsigned char *ptr, CARD8 code[])
-{
- int i;
- CARD8 val;
-
- for ( i=0;;i++) {
- val = code[i];
- *ptr++ = val;
- if (val == 0xf4) break;
- }
- return;
-}
-
-void
-dprint(unsigned long start, unsigned long size)
-{
- int i,j;
- char *c = (char *)start;
-
- for (j = 0; j < (size >> 4); j++) {
- printf ("\n0x%lx: ",(unsigned long)c);
- for (i = 0; i<16; i++)
- printf("%x ",(unsigned char) (*(c++)));
- }
- printf("\n");
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/command.c b/board/MAI/bios_emulator/scitech/src/v86bios/command.c
deleted file mode 100644
index e2bce6d..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/command.c
+++ /dev/null
@@ -1,38 +0,0 @@
-#include <stdio.h>
-#include <readline/readline.h>
-#include <readline/history.h>
-#include <malloc.h>
-
-#define PROMPT ">"
-
-
-void
-getline(char *buf,int *num,int max_num)
-{
- static int line_len = 0;
- static char *line = NULL;
- static char *line_pointer = NULL;
- static int len = 0;
- int tmp_len;
- char *buff;
-
- if (len <= 0) {
- buff = readline(PROMPT);
- add_history(buff);
-
- if ((tmp_len = strlen(buff)) > line_len) {
- free(line);
- line = malloc(tmp_len);
- line_len = tmp_len;
- }
- sprintf(line,"%s\n",buff);
- free(buff);
- line_pointer = line;
- len = strlen(line);
- }
-
- *num = max_num > len? len : max_num;
- strncpy(buf,line_pointer,*num);
- line_pointer = line_pointer + *num;
- len = len - *num;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/console.c b/board/MAI/bios_emulator/scitech/src/v86bios/console.c
deleted file mode 100644
index 5e9c924..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/console.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include <sys/ioctl.h>
-#include <sys/vt.h>
-#include <sys/kd.h>
-#include <stdio.h>
-#include <fcntl.h>
-#include <unistd.h>
-#include "debug.h"
-#include "v86bios.h"
-
-console
-open_console(void)
-{
- int fd;
- int VTno;
- char VTname[11];
- console Con = {-1,-1};
- struct vt_stat vts;
-
- if (NO_CONSOLE)
- return Con;
-
- if ((fd = open("/dev/tty0",O_WRONLY,0)) < 0)
- return Con;
-
- if ((ioctl(fd, VT_OPENQRY, &VTno) < 0) || (VTno == -1)) {
- fprintf(stderr,"cannot get a vt\n");
- return Con;
- }
-
- close(fd);
- sprintf(VTname,"/dev/tty%i",VTno);
-
- if ((fd = open(VTname, O_RDWR|O_NDELAY, 0)) < 0) {
- fprintf(stderr,"cannot open console\n");
- return Con;
- }
-
- if (ioctl(fd, VT_GETSTATE, &vts) == 0)
- Con.vt = vts.v_active;
-
- if (ioctl(fd, VT_ACTIVATE, VTno) != 0) {
- fprintf(stderr,"cannot activate console\n");
- close(fd);
- return Con;
- }
- if (ioctl(fd, VT_WAITACTIVE, VTno) != 0) {
- fprintf(stderr,"wait for active console failed\n");
- close(fd);
- return Con;
- }
-#if 0
- if (ioctl(fd, KDSETMODE, KD_GRAPHICS) < 0) {
- close(fd);
- return Con;
- }
-#endif
- Con.fd = fd;
- return Con;
-}
-
-void
-close_console(console Con)
-{
- if (Con.fd == -1)
- return;
-
-#if 0
- ioctl(Con.fd, KDSETMODE, KD_TEXT);
-#endif
- if (Con.vt >=0)
- ioctl(Con.fd, VT_ACTIVATE, Con.vt);
-
- close(Con.fd);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/debug.h b/board/MAI/bios_emulator/scitech/src/v86bios/debug.h
deleted file mode 100644
index c5c906b..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/debug.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-/*#define V86BIOS_DEBUG */
-
-/*
- * uncomment the following if needed
- * should be command line options
- */
-
-#define PRINT_PORT 0
-#define IO_STATISTICS 0
-#define PRINT_IRQ 0
-#define PRINT_PCI 1
-#define PRINT_IP 0 /* print IP address with PIO information */
-#define TRACE 0 /* turn on debugger in x86emu */
- /* requires x86emu compiled with -DDEBUG */
-
-/*
- * these should not be here.
- * Should be converted to command line options.
- */
-#define CONFIG_ACTIVE_ONLY 0
-#define CONFIG_ACTIVE_DEVICE 1
-#define SAVE_BIOS 0
-#define MAP_SYS_BIOS 1
-#define RESORT 1
-#define FIX_ROM 0
-#define NO_CONSOLE 0
-#define SHOW_ALL_DEV 0
-#define VERBOSE 0
-
-/*#define V_BIOS 0xe0000 */
-/*#define V_BIOS 0xe4000 */
-
-
-#if (PRINT_IO == 1) && (PRINT_PORT == 0)
-# define PRINT_IO 0
-#endif
-#if (IO_STATISTICS == 1) && (PRINT_PORT == 0)
-# define IO_STATISTICS 0
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/happy_cards b/board/MAI/bios_emulator/scitech/src/v86bios/happy_cards
deleted file mode 100644
index 943d44e..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/happy_cards
+++ /dev/null
@@ -1,76 +0,0 @@
-What I had to do to make cards happy:
-
-1. Tseng ET4000 W32P
-This card wants to call the original system BIOS video routines.
-It sets the int 0x42 vector to F000:F065, the entry point to the
-system bios video routines.
-CAVE: don't catch int 0x42 and use the vbios int 0x10 routines.
-At early stage during initialization they call int 0x42. This
-causes an infinite loop.
-
-2. ATi Mach64 Rage IIc AGP
-This card does similar things like the Tseng ET4000 W32P.
-However it doesn't have the problem with the ininite loop.
-
-3. Elsa Victory II-A16 AGP Banshee
-This card is very clever: It knows it is an AGP card. Therefore
-it knows it is behind a PCI-PCI bridge. It also knows that noone
-else is behind this bridge. Therefore it start reprogramming the
-bridge! For this it assumes the AGP bridge is on bus 1.
-
-4. Elsa Gloria Synergy 8 ViVo AGP PM2
-This card likes to see a complete interrupt vector table. If
-we fill this table with 0 the VBIOS detects this and quits
-initialization.
-
-5. Dimond Viper 330 AGP NVIDIA Riva 128.
-This card has a similar problem like the Elsa Gloria. It wants
-to read the system BIOS date at 0xffffd.
-
-6. Matrox Mystique PCI
-This card reads the IO port 0x62. If it doesn't like what it sees
-it loops forever. To keep the card happy put 0xfc into 0xffffe.
-This location holds the system model id. 0xfc means IBM-AT.
- One can make an interesting observation: this card likes to know
-with whom it has to share the system. Therefore it accesses PCI
-config space of all the other cards. It does this bypassing the
-PCI BIOS by reading the PCI access ports directly.
-
-7. Matrox G100 AGP
-This card has the same problem as the Mystique.
-
-Apperantly this works now. However not all combinations of cards are
-checked, yet.
-
-Further notes:
-the IO register 0x42-0x43 as well as 0x61-0x63 are of special interest
-for many graphic cards. They should be emulated.
-The so called "Industry Standard BIOS Entry Points" to int 0x42 (0xFF065)
-and to int 0x1a (0xFFE6E) should be filled with useful code. This code
-needs to return as if it was called as int.
-The subvendor ID PCI registers might cause problems. On some chipsets
-they are programmed in a non-obivous non-PCI conformant way.
-V_Bioses are seen to modify the following int:
-0x10 (default video), 0x1f(font table), 0x42(copy of default video),
-0x43 (??), 0x6d (copy of default video - same as 0x10?)
-
-TODO:
-Int 0x6d needs to be done.
-All interrupts where there is no default industry standard entry point
-should point to an unused location in the 0xF000 segmant (possibly
-0xF0000). This way they could be trapped. A trap handler for
-a. int 0x42 and int 0x1a needs to be implemented.
-The default "industry entry point" for video and PCI (0xFFE6E) should
-also be implemented. (any others?) They should either be routed to
-int 0x42(0x6d?) (video) and 0x1A (PCI) or some other interrupts to
-trap them. Mapping of system bios might not be a good idea. Maybe
-the system bios area should just be filled with "hlt" to trap any
-access there.
-Handling of timer IO registers 0x42, 0x43 and IO registers 0x61, 0x62.
-
-Find documentation:
-- on interrupt vector table
-- on industry standard entry points to the system bios
-- on IO registers 0x61 and 0x62
-
-
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/hexdump b/board/MAI/bios_emulator/scitech/src/v86bios/hexdump
deleted file mode 100644
index 4f359e5..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/hexdump
+++ /dev/null
@@ -1,3 +0,0 @@
-"%06.6_ax " 16/1 "%02x "
-" " 16/1 "%_p"
-"\n"
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/int.c b/board/MAI/bios_emulator/scitech/src/v86bios/int.c
deleted file mode 100644
index 3504c6c..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/int.c
+++ /dev/null
@@ -1,238 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#endif
-
-#include "v86bios.h"
-#include "AsmMacros.h"
-#include "pci.h"
-
-static int int1A_handler(struct regs86 *regs);
-static int int42_handler(int num, struct regs86 *regs);
-
-int
-int_handler(int num, struct regs86 *regs)
-{
- switch (num) {
- case 0x10:
- case 0x42:
- return (int42_handler(num,regs));
- case 0x1A:
- return (int1A_handler(regs));
- default:
- return 0;
- }
- return 0;
-}
-
-static int
-int42_handler(int num,struct regs86 *regs)
-{
- unsigned char c;
- CARD32 val;
-
- i_printf("int 0x%x: ax:0x%lx bx:0x%lx cx:0x%lx dx:0x%lx\n",num,
- regs->eax,regs->ebx, regs->ecx, regs->edx);
-
- /*
- * video bios has modified these -
- * leave it to the video bios to do this
- */
-
- val = getIntVect(num);
- if (val != 0xF000F065)
- return 0;
-
- if ((regs->ebx & 0xff) == 0x32) {
- switch (regs->eax & 0xFFFF) {
- case 0x1200:
- i_printf("enabling video\n");
- c = inb(0x3cc);
- c |= 0x02;
- outb(0x3c2,c);
- return 1;
- case 0x1201:
- i_printf("disabling video\n");
- c = inb(0x3cc);
- c &= ~0x02;
- outb(0x3c2,c);
- return 1;
- default:
- }
- }
- if (num == 0x42)
- return 1;
- else
- return 0;
-}
-
-#define SUCCESSFUL 0x00
-#define DEVICE_NOT_FOUND 0x86
-#define BAD_REGISTER_NUMBER 0x87
-
-static int
-int1A_handler(struct regs86 *regs)
-{
- CARD32 Slot;
- PciStructPtr pPci;
-
- if (! CurrentPci) return 0; /* oops */
-
- i_printf("int 0x1a: ax=0x%lx bx=0x%lx cx=0x%lx dx=0x%lx di=0x%lx"
- " si=0x%lx\n", regs->eax,regs->ebx,regs->ecx,regs->edx,
- regs->edi,regs->esi);
- switch (regs->eax & 0xFFFF) {
- case 0xb101:
- regs->eax &= 0xFF00; /* no config space/special cycle support */
- regs->edx = 0x20494350; /* " ICP" */
- regs->ebx = 0x0210; /* Version 2.10 */
- regs->ecx &= 0xFF00;
- regs->ecx |= (pciMaxBus & 0xFF); /* Max bus number in system */
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- i_printf("ax=0x%lx dx=0x%lx bx=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->edx,regs->ebx,regs->ecx,regs->eflags);
- return 1;
- case 0xb102:
- if (((regs->edx & 0xFFFF) == CurrentPci->VendorID) &&
- ((regs->ecx & 0xFFFF) == CurrentPci->DeviceID) &&
- (regs->esi == 0)) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- regs->ebx = pciSlotBX(CurrentPci);
- }
- else if (Config.ShowAllDev &&
- (pPci = findPciDevice(regs->edx,regs->ecx,regs->esi)) != NULL) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- regs->ebx = pciSlotBX(pPci);
- } else {
- regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx bx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ebx,regs->eflags);
- return 1;
- case 0xb103:
- if (((regs->ecx & 0xFF) == CurrentPci->Interface) &&
- (((regs->ecx & 0xFF00) >> 8) == CurrentPci->SubClass) &&
- (((regs->ecx & 0xFFFF0000) >> 16) == CurrentPci->BaseClass) &&
- ((regs->esi & 0xff) == 0)) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->ebx = pciSlotBX(CurrentPci);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- }
- else if (Config.ShowAllDev
- && (pPci = findPciClass(regs->ecx & 0xFF, (regs->ecx & 0xff00) >> 8,
- (regs->ecx & 0xffff0000) >> 16, regs->esi)) != NULL) {
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->ebx = pciSlotBX(pPci);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n",regs->eax,regs->eflags);
- return 1;
- case 0xb108:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- regs->ecx &= 0xFFFFFF00;
- regs->ecx |= PciRead8(regs->edi,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ecx,regs->eflags);
- return 1;
- case 0xb109:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- regs->ecx &= 0xFFFF0000;
- regs->ecx |= PciRead16(regs->edi,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ecx,regs->eflags);
- return 1;
- case 0xb10a:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- regs->ecx &= 0;
- regs->ecx |= PciRead32(regs->edi,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n",
- regs->eax,regs->ecx,regs->eflags);
- return 1;
- case 0xb10b:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- PciWrite8(regs->edi,(CARD8)regs->ecx,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags);
- return 1;
- case 0xb10c:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- PciWrite16(regs->edi,(CARD16)regs->ecx,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags);
- return 1;
- case 0xb10d:
- i_printf("Slot=0x%x\n",CurrentPci->Slot.l);
- if ((Slot = findPci(regs->ebx))) {
- PciWrite32(regs->edi,(CARD32)regs->ecx,Slot);
- regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8);
- regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */
- } else {
- regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8);
- regs->eflags |= ((unsigned long)0x01); /* set carry flag */
- }
- i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags);
- return 1;
- default:
- return 0;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/io.c b/board/MAI/bios_emulator/scitech/src/v86bios/io.c
deleted file mode 100644
index f35b43e..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/io.c
+++ /dev/null
@@ -1,257 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-
-#include <stdio.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#endif
-#include "AsmMacros.h"
-#include "v86bios.h"
-#include "pci.h"
-
-int r_inb = 0, r_inw = 0, r_inl = 0, r_outb = 0, r_outw = 0, r_outl = 0;
-int in_b = 0, in_w = 0, in_l = 0, out_b = 0, out_w = 0, out_l = 0;
-
-
-int
-port_rep_inb(CARD16 port, CARD8 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD8 *dst = base;
-
- p_printf(" rep_insb(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_inb++;
- while (count--) {
- *dst = inb(port);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_inw(CARD16 port, CARD16 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD16 *dst = base;
-
- p_printf(" rep_insw(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_inw++;
- while (count--) {
- *dst = inw(port);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_inl(CARD16 port, CARD32 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD32 *dst = base;
-
- p_printf(" rep_insl(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_inl++;
- while (count--) {
- *dst = inl(port);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_outb(CARD16 port, CARD8 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD8 *dst = base;
-
- p_printf(" rep_outb(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_outb++;
- while (count--) {
- outb(port,*dst);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_outw(CARD16 port, CARD16 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD16 *dst = base;
-
- p_printf(" rep_outw(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_outw++;
- while (count--) {
- outw(port,*dst);
- dst += inc;
- }
- return (dst-base);
-}
-
-int
-port_rep_outl(CARD16 port, CARD32 *base, int d_f, CARD32 count)
-{
- register int inc = d_f ? -1 : 1;
- CARD32 *dst = base;
-
- p_printf(" rep_outl(%#x) %d bytes at %p %s",
- port, count, base, d_f?"up":"down");
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- r_outl++;
- while (count--) {
- outl(port,*dst);
- dst += inc;
- }
- return (dst-base);
-}
-
-CARD8
-p_inb(CARD16 port)
-{
- CARD8 val = 0;
- in_b++;
- val = inb(port);
- p_printf(" inb(%#x) = %2.2x",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- return val;
-}
-
-CARD16
-p_inw(CARD16 port)
-{
- CARD16 val = 0;
- in_w++;
- val = inw(port);
- p_printf(" inw(%#x) = %4.4x",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- return val;
-}
-
-CARD32
-p_inl(CARD16 port)
-{
- CARD32 val = 0;
- in_l++;
-#ifdef NEED_PCI_IO
- if (cfg1in(port,&val))
- return val;
- else
-#endif
- val = inl(port);
- p_printf(" inl(%#x) = %8.8x",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- return val;
-}
-
-void
-p_outb(CARD16 port, CARD8 val)
-{
- out_b++;
- p_printf(" outb(%#x, %2.2x)",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- outb(port,val);
-}
-
-void
-p_outw(CARD16 port, CARD16 val)
-{
- out_w++;
- p_printf(" outw(%#x, %4.4x)",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
- outw(port,val);
-}
-
-void
-p_outl(CARD16 port, CARD32 val)
-{
- out_l++;
- p_printf(" outl(%#x, %8.8x)",port,val);
- if (Config.PrintIp)
- p_printf(" %x\n",getIP());
- else p_printf("\n");
-
-#ifdef NEED_PCI_IO
- if (cfg1out(port,val))
- return;
-#endif
- outl(port,val);
-}
-
-void
-io_statistics(void)
-{
- p_printf("rep: inb: %i, inw: %i, inl: %i, outb: %i, outw: %i, outl: %i\n",
- r_inb,r_inw,r_inl,r_outb,r_outw,r_outl);
- p_printf("inb: %i, inw: %i, inl: %i, outb: %i, outw: %i, outl: %i\n",
- in_b,in_w,in_l,out_b,out_w,out_l);
-}
-
-void
-clear_stat(void)
-{
- r_inb = r_inw = r_inl = r_outb = r_outw = r_outl = 0;
- in_b = in_w = in_l = out_b = out_w = out_l = 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/lex.l b/board/MAI/bios_emulator/scitech/src/v86bios/lex.l
deleted file mode 100644
index 3a3391c..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/lex.l
+++ /dev/null
@@ -1,79 +0,0 @@
-%{
-#include "parser.h"
-
-#include <string.h>
-#include <stdio.h>
-
- void getline(char *buf,int *num,int max_num);
-
-#define YY_INPUT(buf,result,max_size) {\
- getline(buf,&result,max_size);\
- }
-
- void
- yyerror (char *s)
- {
- printf ("%s\n", s);
- }
-
-%}
-
-DIGIT [0-9a-fA-F]
-
-%%
-
-"0x"?{DIGIT}+ { yylval = strtol(yytext,NULL,0); return TOK_NUM; }
-"ax" { return TOK_REG_AX; }
-"bx" { return TOK_REG_BX; }
-"cx" { return TOK_REG_CX; }
-"dx" { return TOK_REG_DX; }
-"di" { return TOK_REG_SI; }
-"si" { return TOK_REG_DI; }
-"ds" { return TOK_SEG_DS; }
-"es" { return TOK_SEG_ES; }
-":" { return TOK_SEP;}
-"$"{DIGIT}{1,2} { yylval = strtol(yytext+1,NULL,0); return TOK_VAR; }
-"$mem" { return TOK_VAR_MEM; }
-[ \t]+
-"#".*[\n] { return TOK_END; }
-"boot" { return TOK_COMMAND_BOOT; }
-"do" { return TOK_COMMAND_EXEC; }
-"\"".*"\"" { yylval = (unsigned long) yytext; return TOK_STRING; }
-"byte" { return TOK_BYTE; }
-"word" { return TOK_WORD; }
-"long" { return TOK_LONG; }
-"setmem" { return TOK_COMMAND_MEMSET; }
-"dumpmem" { return TOK_COMMAND_MEMDUMP; }
-"quit" { return TOK_COMMAND_QUIT; }
-"\n" { return TOK_END; }
-"select" { return TOK_SELECT; }
-"isa" { return TOK_ISA; }
-"pci" { return TOK_PCI; }
-"pport" { return TOK_PRINT_PORT; }
-"iostat" { return TOK_IOSTAT; }
-"pirq" { return TOK_PRINT_IRQ; }
-"ppci" { return TOK_PPCI; }
-"pip" { return TOK_PIP; }
-"trace" { return TOK_TRACE; }
-"on" { return TOK_ON; }
-"off" { return TOK_OFF; }
-"verbose" { return TOK_VERBOSE; }
-"log" { return TOK_LOG; }
-"print" { return TOK_STDOUT; }
-"clstat" { return TOK_CLSTAT; }
-"hlt" { return TOK_HLT; }
-"del" { return TOK_DEL; }
-"ioperm" { return TOK_IOPERM; }
-"lpci" { return TOK_DUMP_PCI; }
-"bootbios" { return TOK_BOOT_BIOS; }
-"?" { return '?'; }
-. { return TOK_ERROR; }
-
-%%
-
-
-
-
-
-
-
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/main.c b/board/MAI/bios_emulator/scitech/src/v86bios/main.c
deleted file mode 100644
index 15f9115..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/main.c
+++ /dev/null
@@ -1,616 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#define DELETE
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <string.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/stat.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#elif defined(HAVE_SYS_PERM)
-#include <sys/perm.h>
-#endif
-#include "debug.h"
-#include "v86bios.h"
-#include "pci.h"
-#include "AsmMacros.h"
-
-#define SIZE 0x100000
-#define VRAM_START 0xA0000
-#define VRAM_SIZE 0x1FFFF
-#define V_BIOS_SIZE 0x1FFFF
-#define BIOS_START 0x7C00 /* default BIOS entry */
-
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; */
-#define VB_X(x) (V_BIOS >> x) & 0xFF
-CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xf4 };
-/*CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, */
-/*0xcd, 0x10, 0xf4 }; */
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; */
-
-static void sig_handler(int);
-static int map(void);
-static void unmap(void);
-static void bootBIOS(CARD16 ax);
-static int map_vram(void);
-static void unmap_vram(void);
-static int copy_vbios(void);
-static int copy_sys_bios(void);
-static void save_bios_to_file(void);
-static int setup_system_bios(void);
-static void setup_int_vect(void);
-static int chksum(CARD8 *start);
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax);
-
-void loadCodeToMem(unsigned char *ptr, CARD8 *code);
-void dprint(unsigned long start, unsigned long size);
-
-static int vram_mapped = 0;
-static CARD8 save_msr;
-static CARD8 save_pos102;
-static CARD8 save_vse;
-static CARD8 save_46e8;
-console Console;
-struct config Config;
-
-
-int
-main(void)
-{
- int Active_is_Pci = 0;
-#ifdef DELETE
- Config.PrintPort = PRINT_PORT;
- Config.IoStatistics = IO_STATISTICS;
- Config.PrintIrq = PRINT_IRQ;
- Config.PrintPci = PRINT_PCI;
- Config.ShowAllDev = SHOW_ALL_DEV;
- Config.PrintIp = PRINT_IP;
- Config.SaveBios = SAVE_BIOS;
- Config.Trace = TRACE;
- Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY;
- Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE;
- Config.MapSysBios = MAP_SYS_BIOS;
- Config.Resort = RESORT;
- Config.FixRom = FIX_ROM;
- Config.NoConsole = NO_CONSOLE;
- Config.Verbose = VERBOSE;
-
- if (!map())
- exit(1);
-
- if (!setup_system_bios())
- exit(1);
-
- iopl(3);
- setup_io();
-
- scan_pci();
- if (!CurrentPci && !Config.ConfigActiveDevice && !Config.ConfigActiveOnly)
- exit (1);
-#endif
- Console = open_console();
-
- if (Config.ConfigActiveOnly) {
- CARD16 ax;
- int activePci = 0;
- int error = 0;
-
- while (CurrentPci) {
- if (CurrentPci->active) {
- activePci = 1;
- if (!(mapPciRom(NULL) && chksum((CARD8*)V_BIOS)))
- error = 1;
- break;
- }
- CurrentPci = CurrentPci->next;
- }
- ax = ((CARD16)(CurrentPci->bus) << 8)
- | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7);
- P_printf("ax: 0x%x\n",ax);
- setup_int_vect();
- if (!error && (activePci || copy_vbios())) {
-
- if (Config.SaveBios) save_bios_to_file();
- if (map_vram()) {
- printf("initializing ISA\n");
- bootBIOS(0);
- }
- }
- unmap_vram();
- sleep(1);
- } else {
- /* disable primary card */
- save_msr = inb(0x3CC);
- save_vse = inb(0x3C3);
- save_46e8 = inb(0x46e8);
- save_pos102 = inb(0x102);
-
- signal(2,sig_handler);
- signal(11,sig_handler);
-
- outb(0x3C2,~(CARD8)0x03 & save_msr);
- outb(0x3C3,~(CARD8)0x01 & save_vse);
- outb(0x46e8, ~(CARD8)0x08 & save_46e8);
- outb(0x102, ~(CARD8)0x01 & save_pos102);
-
- pciVideoDisable();
-
- while (CurrentPci) {
- CARD16 ax;
-
- if (CurrentPci->active) {
- Active_is_Pci = 1;
- if (!Config.ConfigActiveDevice) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- }
-
- EnableCurrent();
-
- if (CurrentPci->active) {
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
- }
-
- /* clear interrupt vectors */
- setup_int_vect();
-
- ax = ((CARD16)(CurrentPci->bus) << 8)
- | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7);
- P_printf("ax: 0x%x\n",ax);
-
- if (!((mapPciRom(NULL) && chksum((CARD8*)V_BIOS))
- || (CurrentPci->active && copy_vbios()))) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (!map_vram()) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (Config.SaveBios) save_bios_to_file();
- printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus,
- CurrentPci->dev,CurrentPci->func);
- bootBIOS(ax);
- unmap_vram();
-
- CurrentPci = CurrentPci->next;
- }
-
- /* We have an ISA device - configure if requested */
- if (!Active_is_Pci && Config.ConfigActiveDevice) {
- pciVideoDisable();
-
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- setup_int_vect();
- if (copy_vbios()) {
-
- if (Config.SaveBios) save_bios_to_file();
- if (map_vram()) {
- printf("initializing ISA\n");
- bootBIOS(0);
- }
- }
-
- unmap_vram();
- sleep(1);
- }
-
- pciVideoRestore();
-
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
- }
-
- close_console(Console);
-#ifdef DELETE
- iopl(0);
- unmap();
-
- printf("done !\n");
-#endif
- if (Config.IoStatistics)
- io_statistics();
-#ifdef DELETE
- exit(0);
-#endif
-}
-
-int
-map(void)
-{
- void* mem;
-
- mem = mmap(0, (size_t)SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_PRIVATE | MAP_ANON,
- -1, 0 );
- if (mem != 0) {
- perror("anonymous map");
- return (0);
- }
- memset(mem,0,SIZE);
-
- loadCodeToMem((unsigned char *) BIOS_START, code);
- return (1);
-}
-
-static void
-unmap(void)
-{
- munmap(0,SIZE);
-}
-
-static void
-bootBIOS(CARD16 ax)
-{
- i86biosRegs bRegs;
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- setup_bios_regs(&bRegs, ax);
- do_x86(BIOS_START,&bRegs);
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-}
-
-static int
-map_vram(void)
-{
- int mem_fd;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return 0;
- }
-
-#ifndef __alpha__
- if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED,
- mem_fd, VRAM_START) == (void *) -1)
-#else
- if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */
- if (!_bus_base_sparse()) sparse_shift = 0;
- if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift),
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- mem_fd, (VRAM_START << sparse_shift)
- | _bus_base_sparse())) == (void *) -1)
-#endif
- {
- perror("mmap error in map_hardware_ram");
- close(mem_fd);
- return (0);
- }
- vram_mapped = 1;
- close(mem_fd);
- return (1);
-}
-
-static void
-unmap_vram(void)
-{
- if (!vram_mapped) return;
-
- munmap((void*)VRAM_START,VRAM_SIZE);
- vram_mapped = 0;
-}
-
-static int
-copy_vbios(void)
-{
- int mem_fd;
- unsigned char *tmp;
- int size;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) V_BIOS, SEEK_SET) != (off_t) V_BIOS) {
- fprintf(stderr,"Cannot lseek\n");
- goto Error;
- }
- tmp = (unsigned char *)malloc(3);
- if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- if (lseek(mem_fd,(off_t) V_BIOS,SEEK_SET) != (off_t) V_BIOS)
- goto Error;
-
- if (*tmp != 0x55 || *(tmp+1) != 0xAA ) {
-#ifdef DEBUG
- dprint((unsigned long)tmp,0x100);
-#endif
- fprintf(stderr,"No bios found at: 0x%x\n",V_BIOS);
- goto Error;
- }
- size = *(tmp+2) * 512;
-
- if (read(mem_fd, (char *)V_BIOS, (size_t) size) != (size_t) size) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- free(tmp);
- close(mem_fd);
- if (!chksum((CARD8)V_BIOS))
- return (0);
-
- return (1);
-
-Error:
- perror("v_bios");
- close(mem_fd);
- return (0);
-}
-
-static int
-copy_sys_bios(void)
-{
-#define SYS_BIOS 0xF0000
- int mem_fd;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS)
- goto Error;
- if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF)
- goto Error;
-
- close(mem_fd);
- return (1);
-
-Error:
- perror("sys_bios");
- close(mem_fd);
- return (0);
-}
-
-void
-loadCodeToMem(unsigned char *ptr, CARD8 code[])
-{
- int i;
- CARD8 val;
-
- for ( i=0;;i++) {
- val = code[i];
- *ptr++ = val;
- if (val == 0xf4) break;
- }
- return;
-}
-
-void
-dprint(unsigned long start, unsigned long size)
-{
- int i,j;
- char *c = (char *)start;
-
- for (j = 0; j < (size >> 4); j++) {
- char *d = c;
- printf("\n0x%lx: ",(unsigned long)c);
- for (i = 0; i<16; i++)
- printf("%2.2x ",(unsigned char) (*(c++)));
- c = d;
- for (i = 0; i<16; i++) {
- printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?
- (unsigned char) (*(c)): '.');
- c++;
- }
- }
- printf("\n");
-}
-
-static void
-save_bios_to_file(void)
-{
- static int num = 0;
- int size, count;
- char file_name[256];
- int fd;
-
- sprintf(file_name,"bios_%i.fil",num);
- if ((fd = open(file_name,O_WRONLY | O_CREAT | O_TRUNC,00644)) == -1)
- return;
- size = (*(unsigned char*)(V_BIOS + 2)) * 512;
-#ifdef V86BIOS_DEBUG
- dprint(V_BIOS,20);
-#endif
- if ((count = write(fd,(void *)(V_BIOS),size)) != size)
- fprintf(stderr,"only saved %i of %i bytes\n",size,count);
- num++;
-}
-
-static void
-sig_handler(int unused)
-{
- fflush(stdout);
- fflush(stderr);
-
- /* put system back in a save state */
- unmap_vram();
- pciVideoRestore();
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- close_console(Console);
- iopl(0);
- unmap();
-
- exit(1);
-}
-
-/*
- * For initialization we just pass ax to the BIOS.
- * PCI BIOSes need this. All other register are set 0.
- */
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax)
-{
- regs->ax = ax;
- regs->bx = 0;
- regs->cx = 0;
- regs->dx = 0;
- regs->es = 0;
- regs->di = 0;
-}
-
-/*
- * here we are really paranoid about faking a "real"
- * BIOS. Most of this information was pulled from
- * dosem.
- */
-static void
-setup_int_vect(void)
-{
- const CARD16 cs = 0x0000;
- const CARD16 ip = 0x0;
- int i;
-
- /* let the int vects point to the SYS_BIOS seg */
- for (i=0; i<0x80; i++) {
- ((CARD16*)0)[i<<1] = ip;
- ((CARD16*)0)[(i<<1)+1] = cs;
- }
- /* video interrupts default location */
- ((CARD16*)0)[(0x42<<1)+1] = 0xf000;
- ((CARD16*)0)[0x42<<1] = 0xf065;
- ((CARD16*)0)[(0x10<<1)+1] = 0xf000;
- ((CARD16*)0)[0x10<<1] = 0xf065;
- /* video param table default location (int 1d) */
- ((CARD16*)0)[(0x1d<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1d<<1] = 0xf0A4;
- /* font tables default location (int 1F) */
- ((CARD16*)0)[(0x1f<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1f<<1] = 0xfa6e;
-
- /* int 11 default location */
- ((CARD16*)0)[(0x11<1)+1] = 0xf000;
- ((CARD16*)0)[0x11<<1] = 0xf84d;
- /* int 12 default location */
- ((CARD16*)0)[(0x12<<1)+1] = 0xf000;
- ((CARD16*)0)[0x12<<1] = 0xf841;
- /* int 15 default location */
- ((CARD16*)0)[(0x15<<1)+1] = 0xf000;
- ((CARD16*)0)[0x15<<1] = 0xf859;
- /* int 1A default location */
- ((CARD16*)0)[(0x1a<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1a<<1] = 0xff6e;
- /* int 05 default location */
- ((CARD16*)0)[(0x05<<1)+1] = 0xf000;
- ((CARD16*)0)[0x05<<1] = 0xff54;
- /* int 08 default location */
- ((CARD16*)0)[(0x8<<1)+1] = 0xf000;
- ((CARD16*)0)[0x8<<1] = 0xfea5;
- /* int 13 default location (fdd) */
- ((CARD16*)0)[(0x13<<1)+1] = 0xf000;
- ((CARD16*)0)[0x13<<1] = 0xec59;
- /* int 0E default location */
- ((CARD16*)0)[(0xe<<1)+1] = 0xf000;
- ((CARD16*)0)[0xe<<1] = 0xef57;
- /* int 17 default location */
- ((CARD16*)0)[(0x17<<1)+1] = 0xf000;
- ((CARD16*)0)[0x17<<1] = 0xefd2;
- /* fdd table default location (int 1e) */
- ((CARD16*)0)[(0x1e<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1e<<1] = 0xefc7;
-}
-
-static int
-setup_system_bios(void)
-{
- char *date = "06/01/99";
- char *eisa_ident = "PCI/ISA";
-
-#if MAP_SYS_BIOS
- if (!copy_sys_bios()) return 0;
- return 1;
-#endif
-/* memset((void *)0xF0000,0xf4,0xfff7); */
-
- /*
- * we trap the "industry standard entry points" to the BIOS
- * and all other locations by filling them with "hlt"
- * TODO: implement hlt-handler for these
- */
- memset((void *)0xF0000,0xf4,0x10000);
-
- /*
- * TODO: we should copy the fdd table (0xfec59-0xfec5b)
- * the video parameter table (0xf0ac-0xf0fb)
- * and the font tables (0xfa6e-0xfe6d)
- * from the original bios here
- */
-
- /* set bios date */
- strcpy((char *)0xFFFF5,date);
- /* set up eisa ident string */
- strcpy((char *)0xFFFD9,eisa_ident);
- /* write system model id for IBM-AT */
- ((char *)0)[0xFFFFE] = 0xfc;
-
- return 1;
-}
-
-static int
-chksum(CARD8 *start)
-{
- CARD16 size;
- CARD8 val = 0;
- int i;
-
- size = *(start+2) * 512;
- for (i = 0; i<size; i++)
- val += *(start + i);
-
- if (!val)
- return 1;
-
- fprintf(stderr,"BIOS cksum wrong!\n");
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/makefile.linux b/board/MAI/bios_emulator/scitech/src/v86bios/makefile.linux
deleted file mode 100644
index 5dfe306..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/makefile.linux
+++ /dev/null
@@ -1,59 +0,0 @@
-CFLAGS=-g -I/usr/include -I../../include/ -O0 -Wall
-CC=gcc
-
-.y.c:
- bison -d -o $@ $<
-.l.c:
- flex -o$@ $<
-
-SRCS = main.c io.c x86emu.c int.c pci.c
-OBJS = main.o io.o x86emu.o int.o pci.o
-
-all : vbios.vm86 v86bios.vm86 cbios.vm86 cbios.x86emu vbios.x86emu v86bios.x86emu
-#all : cbios.x86emu vbios.x86emu v86bios.x86emu
-
-parser.c : parser.y
-lex.c : lex.l
-cbios.o : cbios.c v86bios.h debug.h
-main.o : main.c v86bios.h pci.h debug.h
-io.o : v86bios.h AsmMacros.h debug.h
-mem.o : mem.c debug.h v86bios.h
-int.o : int.c v86bios.h debug.h
-pci.o : pci.c pci.h debug.h
-console.o : console.c v86bios.h debug.h
-v86.o : v86.c debug.h
-parser.o : parser.c
-lex.o : lex.c
-v86bios.o: v86bios.c v86bios.h pci.h debug.h
-logging.o: logging.c v86bios.h
-x86emu.o : x86emu.c v86bios.h debug.h
- $(CC) -c -DX86EMU $(CFLAGS) $*.c
-
-vbios.x86emu : main.o x86emu.o io.o int.o pci.o console.o mem.o logging.o
- gcc -Wl,-defsym -Wl,printk=lprintf -o vbios.x86emu main.o \
- x86emu.o io.o int.o pci.o console.o mem.o logging.o \
- -L../x86emu -lx86emud -lc
-vbios.vm86 : main.o v86.o io.o int.o pci.o console.o logging.o
- gcc -o vbios.vm86 main.o v86.o io.o int.o pci.o console.o \
- logging.o -lc
-cbios.x86emu : cbios.o x86emu.o io.o int.o pci.o console.o mem.o logging.o
- gcc -Wl,-defsym -Wl,printk=lprintf -o cbios.x86emu cbios.o \
- x86emu.o io.o int.o pci.o console.o mem.o logging.o \
- -L../x86emu -lx86emud -lc
-cbios.vm86 : cbios.o v86.o io.o int.o pci.o console.o logging.o
- gcc -o cbios.vm86 cbios.o v86.o io.o int.o pci.o console.o \
- logging.o -lc
-v86bios.vm86: command.o parser.o lex.o v86bios.o v86.o io.o int.o pci.o console.o logging.o
- gcc -o v86bios.vm86 command.o parser.o lex.o v86bios.o v86.o io.o \
- int.o pci.o console.o logging.o -L/usr/lib/curses -lfl \
- -lreadline -lc -lncurses /usr/lib/libc.a
-v86bios.x86emu: command.o parser.o lex.o v86bios.o x86emu.o io.o int.o pci.o console.o logging.o
- gcc -Wl,-defsym -Wl,printk=lprintf -o v86bios.x86emu \
- command.o parser.o lex.o v86bios.o x86emu.o io.o \
- int.o pci.o console.o logging.o -L/usr/lib/curses -lfl \
- -lreadline -lc -lncurses /usr/lib/libc.a -L../x86emu -lx86emud
-
-clean:
- rm -f *.o vbios.x86emu vbios.vm86 cbios.x86emu cbios.vm86 parser.c \
- lex.c parser.h v86bios.x86emu v86bios.vm86
-
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/mem.c b/board/MAI/bios_emulator/scitech/src/v86bios/mem.c
deleted file mode 100644
index 24c1aef..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/mem.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-#include "v86bios.h"
-#include "x86emu.h"
-
-#ifdef __alpha__
-
-void* vram_map = 0;
-int sparse_shift = 5;
-
-#define mem_barrier() __asm__ __volatile__("mb" : : : "memory")
-
-#define vuip volatile unsigned int *
-
-CARD8
-mem_rb(CARD32 addr)
-{
- unsigned long result, shift;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- shift = (addr & 0x3) * 8;
- result = *(vuip) ((unsigned long)vram_map + (addr << sparse_shift));
- result >>= shift;
- return 0xffUL & result;
- } else
-#endif
- return rdb(addr);
-}
-
-CARD16
-mem_rw(CARD32 addr)
-{
- unsigned long result, shift;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- shift = (addr & 0x2) * 8;
- result = *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
- +(1<<(sparse_shift-2)));
- result >>= shift;
- return 0xffffUL & result;
- } else
-#endif
- return rdw(addr);
-}
-
-CARD32
-mem_rl(CARD32 addr)
-{
- unsigned long result;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- result = *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)+(3<<(sparse_shift-2)));
- return result;
- } else
-#endif
- return rdl(addr);
-}
-
-void
-mem_wb(CARD32 addr, CARD8 val)
-{
- unsigned int b = val & 0xffU;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- *(vuip) ((unsigned long)vram_map + (addr << sparse_shift)) = b * 0x01010101;
- mem_barrier();
- } else
-#endif
- wrb(addr,val);
-}
-
-void
-mem_ww(CARD32 addr, CARD16 val)
-{
- unsigned int w = val & 0xffffU;
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
- +(1<<(sparse_shift-2))) = w * 0x00010001;
- mem_barrier();
- } else
-#endif
- wrw(addr,val);
-}
-
-void
-mem_wl(CARD32 addr, CARD32 val)
-{
-#if 1
- if (addr >= 0xA0000 && addr <= 0xBFFFF) {
- addr -= 0xA0000;
- *(vuip)((unsigned long)vram_map+(addr<<sparse_shift)
- +(3<<(sparse_shift-2))) = val;
- mem_barrier();
- } else
-#endif
- wrl(addr,val);
-}
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/parser.y b/board/MAI/bios_emulator/scitech/src/v86bios/parser.y
deleted file mode 100644
index 21c4023..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/parser.y
+++ /dev/null
@@ -1,498 +0,0 @@
-%{
-#include <malloc.h>
-#include <string.h>
-#include "v86bios.h"
-#include "pci.h"
-
-#define YYSTYPE unsigned long
-
-#define MAX_VAR 0x20
-
- CARD32 var[MAX_VAR];
- CARD32 var_mem;
-
-
-i86biosRegs regs = { 00 };
-
-enum mem_type { BYTE, WORD, LONG, STRING };
-union mem_val {
- CARD32 integer;
- char *ptr;
-} rec;
-
-struct mem {
- enum mem_type type;
- union mem_val val;
- struct mem *next;
-};
-
-
-struct device Device = {FALSE,NONE,{0}};
-
-extern void yyerror(char *s);
-extern int yylex( void );
-
-static void boot(void);
-static void dump_mem(CARD32 addr, int len);
-static void exec_int(int num);
-static void *add_to_list(enum mem_type type, union mem_val *rec, void *next);
-static void do_list(struct mem *list, memType addr);
-static char * normalize_string(char *ptr);
-%}
-
-%token TOK_NUM
-%token TOK_REG_AX
-%token TOK_REG_BX
-%token TOK_REG_CX
-%token TOK_REG_DX
-%token TOK_REG_DI
-%token TOK_REG_SI
-%token TOK_SEG_DS
-%token TOK_SEG_ES
-%token TOK_SEP
-%token TOK_VAR
-%token TOK_VAR_MEM
-%token TOK_COMMAND_BOOT
-%token TOK_COMMAND_EXEC
-%token TOK_SELECT
-%token TOK_STRING
-%token TOK_MODIFIER_BYTE
-%token TOK_MODIFIER_WORD
-%token TOK_MODIFIER_LONG
-%token TOK_MODIFIER_MEMSET
-%token TOK_COMMAND_MEMSET
-%token TOK_COMMAND_MEMDUMP
-%token TOK_COMMAND_QUIT
-%token TOK_ERROR
-%token TOK_END
-%token TOK_ISA
-%token TOK_PCI
-%token TOK_BYTE
-%token TOK_WORD
-%token TOK_LONG
-%token TOK_PRINT_PORT
-%token TOK_IOSTAT
-%token TOK_PRINT_IRQ
-%token TOK_PPCI
-%token TOK_PIP
-%token TOK_TRACE
-%token TOK_ON
-%token TOK_OFF
-%token TOK_VERBOSE
-%token TOK_LOG
-%token TOK_LOGOFF
-%token TOK_CLSTAT
-%token TOK_STDOUT
-%token TOK_HLT
-%token TOK_DEL
-%token TOK_IOPERM
-%token TOK_DUMP_PCI
-%token TOK_BOOT_BIOS
-%%
-input: | input line
-line: end | com_reg | com_var | com_select
- | com_boot | com_memset | com_memdump | com_quit
- | com_exec | hlp | config | verbose | logging | print | clstat
- | com_hlt | ioperm | list_pci | boot_bios
- | error end { printf("unknown command\n"); }
-;
-end: TOK_END
-;
-com_reg: reg_off val end { *(CARD16*)$1 = $2 & 0xffff; }
- | reg_seg TOK_SEP reg_off val end {
- *(CARD16*)$1 = ($4 & 0xf0000) >> 4;
- *(CARD16*)$3 = ($4 & 0x0ffff);
- }
- | reg_off '?' end { printf("0x%x\n",*(CARD16*)$1);}
- | reg_seg TOK_SEP reg_off '?' end
- { printf("0x%x:0x%x\n",*(CARD16*)$1,
- *(CARD16*)$3); }
-;
-register_read: reg_seg TOK_SEP reg_off { $$ = (((*(CARD16*)$1) << 4)
- | ((*(CARD16*)$3) & 0xffff));
- }
- | reg_off { $$ = ((*(CARD16*)$1) & 0xffff); }
-;
-reg_off: TOK_REG_AX { $$ = (unsigned long)&(regs.ax); }
- | TOK_REG_BX { $$ = (unsigned long)&(regs.bx); }
- | TOK_REG_CX { $$ = (unsigned long)&(regs.cx); }
- | TOK_REG_DX { $$ = (unsigned long)&(regs.dx); }
- | TOK_REG_DI { $$ = (unsigned long)&(regs.di); }
- | TOK_REG_SI { $$ = (unsigned long)&(regs.si); }
-;
-reg_seg: TOK_SEG_DS { $$ = (unsigned long)&(regs.ds); }
- | TOK_SEG_ES { $$ = (unsigned long)&(regs.es); }
-;
-com_var: TOK_VAR_MEM '?' end { printf("var mem: 0x%x\n",var_mem); }
- | TOK_VAR '?' end { if ($1 < MAX_VAR)
- printf("var[%i]: 0x%x\n",(int)$1,var[$1]);
- else
- printf("var index %i out of range\n",(int)$1); }
- | TOK_VAR_MEM val end { var_mem = $2; }
- | TOK_VAR val end { if ($1 <= MAX_VAR)
- var[$1] = $2;
- else
- printf("var index %i out of range\n",(int)$1); }
- | TOK_VAR error end { printf("$i val\n"); }
- | TOK_VAR_MEM error end { printf("$i val\n"); }
-;
-com_boot: TOK_COMMAND_BOOT end { boot(); }
- TOK_COMMAND_BOOT error end { boot(); }
-;
-com_select: TOK_SELECT TOK_ISA end { Device.booted = FALSE;
- Device.type = ISA;
- CurrentPci = NULL; }
- | TOK_SELECT TOK_PCI val TOK_SEP val TOK_SEP val end
- { Device.booted = FALSE;
- Device.type = PCI;
- Device.loc.pci.bus = $3;
- Device.loc.pci.dev = $5;
- Device.loc.pci.func = $7; }
- | TOK_SELECT '?' end
- { switch (Device.type) {
- case ISA:
- printf("isa\n");
- break;
- case PCI:
- printf("pci: %x:%x:%x\n",Device.loc.pci.bus,
- Device.loc.pci.dev,
- Device.loc.pci.func);
- break;
- default:
- printf("no device selected\n");
- break;
- }
- }
- | TOK_SELECT error end { printf("select ? | isa "
- "| pci:bus:dev:func\n"); }
-;
-com_quit: TOK_COMMAND_QUIT end { return 0; }
- | TOK_COMMAND_QUIT error end { logoff(); return 0; }
-;
-com_exec: TOK_COMMAND_EXEC end { exec_int(0x10); }
- | TOK_COMMAND_EXEC val end { exec_int($2); }
- | TOK_COMMAND_EXEC error end { exec_int(0x10); }
-;
-com_memdump: TOK_COMMAND_MEMDUMP val val end { dump_mem($2,$3); }
- | TOK_COMMAND_MEMDUMP error end { printf("memdump start len\n"); }
-
-
-;
-com_memset: TOK_COMMAND_MEMSET val list end { do_list((struct mem*)$3,$2);}
- | TOK_COMMAND_MEMSET error end { printf("setmem addr [byte val] "
- "[word val] [long val] "
- "[\"string\"]\n"); }
-;
-list: { $$ = 0; }
- | TOK_BYTE val list { rec.integer = $2;
- $$ = (unsigned long)add_to_list(BYTE,&rec,(void*)$3); }
- | TOK_WORD val list { rec.integer = $2;
- $$ = (unsigned long) add_to_list(WORD,&rec,(void*)$3); }
- | TOK_LONG val list { rec.integer = $2;
- $$ = (unsigned long) add_to_list(LONG,&rec,(void*)$3); }
- | TOK_STRING list { rec.ptr = (void*)$1;
- $$ = (unsigned long) add_to_list(STRING,&rec,(void*)$2); }
-;
-val: TOK_VAR { if ($1 > MAX_VAR) {
- printf("variable index out of range\n");
- $$=0;
- } else
- $$ = var[$1]; }
- | TOK_NUM { $$ = $1; }
- | register_read
-;
-bool: TOK_ON { $$ = 1; }
- | TOK_OFF { $$ = 0; }
-;
-config: TOK_PRINT_PORT bool end { Config.PrintPort = $2; }
- | TOK_PRINT_PORT '?' end { printf("print port %s\n",
- Config.PrintPort?"on":"off"); }
- | TOK_PRINT_PORT error end { printf("pport on | off | ?\n") }
- | TOK_PRINT_IRQ bool end { Config.PrintIrq = $2; }
- | TOK_PRINT_IRQ '?' end { printf("print irq %s\n",
- Config.PrintIrq?"on":"off"); }
- | TOK_PRINT_IRQ error end { printf("pirq on | off | ?\n") }
- | TOK_PPCI bool end { Config.PrintPci = $2; }
- | TOK_PPCI '?' end { printf("print PCI %s\n",
- Config.PrintPci?"on":"off"); }
- | TOK_PPCI error end { printf("ppci on | off | ?\n") }
- | TOK_PIP bool end { Config.PrintIp = $2; }
- | TOK_PIP '?' end { printf("printip %s\n",
- Config.PrintIp?"on":"off"); }
- | TOK_PIP error end { printf("pip on | off | ?\n") }
- | TOK_IOSTAT bool end { Config.IoStatistics = $2; }
- | TOK_IOSTAT '?' end { printf("io statistics %s\n",
- Config.IoStatistics?"on":"off"); }
- | TOK_IOSTAT error end { printf("iostat on | off | ?\n") }
- | TOK_TRACE bool end { Config.Trace = $2; }
- | TOK_TRACE '?' end { printf("trace %s\n",
- Config.Trace ?"on":"off"); }
- | TOK_TRACE error end { printf("trace on | off | ?\n") }
-;
-verbose: TOK_VERBOSE val end { Config.Verbose = $2; }
- | TOK_VERBOSE '?' end { printf("verbose: %i\n",
- Config.Verbose); }
- | TOK_VERBOSE error end { printf("verbose val | ?\n"); }
-;
-logging: TOK_LOG TOK_STRING end { logon(normalize_string((char*)$2)); }
- | TOK_LOG '?' end { if (logging) printf("logfile: %s\n",
- logfile);
- else printf("no logging\n?"); }
- | TOK_LOG TOK_OFF end { logoff(); }
- | TOK_LOG error end { printf("log \"<filename>\" | ? |"
- " off\n"); }
-;
-clstat: TOK_CLSTAT end { clear_stat(); }
- | TOK_CLSTAT error end { printf("clstat\n"); }
-;
-print: TOK_STDOUT bool end { nostdout = !$2; }
- | TOK_STDOUT '?' end { printf("print %s\n",nostdout ?
- "no":"yes"); }
- | TOK_STDOUT error end { printf("print on | off\n"); }
-;
-com_hlt: TOK_HLT val end { add_hlt($2); }
- | TOK_HLT TOK_DEL val end { del_hlt($3); }
- | TOK_HLT TOK_DEL end { del_hlt(21); }
- | TOK_HLT '?' end { list_hlt(); }
- | TOK_HLT error end { printf(
- "hlt val | del [val] | ?\n"); }
-;
-ioperm: TOK_IOPERM val val val end { int i,max;
- if ($2 >= 0) {
- max = $2 + $3 - 1;
- if (max > IOPERM_BITS)
- max = IOPERM_BITS;
- for (i = $2;i <= max; i++)
- ioperm_list[i]
- = $4>0 ? 1 : 0;
- }
- }
- | TOK_IOPERM '?' end { int i,start;
- for (i=0; i <= IOPERM_BITS; i++) {
- if (ioperm_list[i]) {
- start = i;
- for (; i <= IOPERM_BITS; i++)
- if (!ioperm_list[i]) {
- printf("ioperm on in "
- "0x%x+0x%x\n", start,i-start);
- break;
- }
- }
- }
- }
- | TOK_IOPERM error end { printf("ioperm start len val\n"); }
-;
-list_pci: TOK_DUMP_PCI end { list_pci(); }
- | TOK_DUMP_PCI error end { list_pci(); }
-;
-boot_bios: TOK_BOOT_BIOS '?' end { if (!BootBios) printf("No Boot BIOS\n");
- else printf("BootBIOS from: %i:%i:%i\n",
- BootBios->bus, BootBios->dev,
- BootBios->func); }
- | TOK_BOOT_BIOS error end { printf ("bootbios bus:dev:num\n"); }
-;
-hlp: '?' { printf("Command list:\n");
- printf(" select isa | pci bus:dev:func\n");
- printf(" boot\n");
- printf(" seg:reg val | reg val \n");
- printf(" $x val | $mem val\n");
- printf(" setmem addr list; addr := val\n");
- printf(" dumpmem addr len; addr,len := val\n");
- printf(" do [val]\n");
- printf(" quit\n");
- printf(" ?\n");
- printf(" seg := ds | es;"
- " reg := ax | bx | cx | dx | si \n");
- printf(" val := var | <hex-number> | seg:reg | seg\n");
- printf(" var := $x | $mem; x := 0..20\n");
- printf(" list := byte val | word val | long val "
- "| \"string\"\n");
- printf(" pport on | off | ?\n");
- printf(" ppci on | off | ?\n");
- printf(" pirq on | off | ?\n");
- printf(" pip on | off | ?\n");
- printf(" trace on | off | ?\n");
- printf(" iostat on | off | ?\n");
- printf(" verbose val\n");
- printf(" log \"<filename>\" | off | ?\n");
- printf(" print on | off\n");
- printf(" hlt val | del [val] | ?\n");
- printf(" clstat\n");
- printf(" lpci\n");
- printf ("bootbios ?\n");
-}
-;
-
-%%
-
-static void
-dump_mem(CARD32 addr, int len)
-{
- dprint(addr,len);
-}
-
-static void
-exec_int(int num)
-{
- if (num == 0x10) { /* video interrupt */
- if (Device.type == NONE) {
- CurrentPci = PciList;
- while (CurrentPci) {
- if (CurrentPci->active)
- break;
- CurrentPci = CurrentPci->next;
- }
- if (!CurrentPci)
- Device.type = ISA;
- else {
- Device.type = PCI;
- Device.loc.pci.dev = CurrentPci->dev;
- Device.loc.pci.bus = CurrentPci->bus;
- Device.loc.pci.func = CurrentPci->func;
- }
- }
- if (Device.type != ISA) {
- if (!Device.booted) {
- if (!CurrentPci || (Device.type == PCI
- && (!CurrentPci->active
- && (Device.loc.pci.dev != CurrentPci->dev
- || Device.loc.pci.bus != CurrentPci->bus
- || Device.loc.pci.func != CurrentPci->func)))) {
- printf("boot the device fist\n");
- return;
- }
- }
- } else
- CurrentPci = NULL;
- } else {
- Device.booted = FALSE; /* we need this for sanity! */
- }
-
- runINT(num,®s);
-}
-
-static void
-boot(void)
-{
- if (Device.type == NONE) {
- printf("select a device fist\n");
- return;
- }
-
- call_boot(&Device);
-}
-
-static void *
-add_to_list(enum mem_type type, union mem_val *rec, void *next)
-{
- struct mem *mem_rec = (struct mem *) malloc(sizeof(mem_rec));
-
- mem_rec->type = type;
- mem_rec->next = next;
-
- switch (type) {
- case BYTE:
- case WORD:
- case LONG:
- mem_rec->val.integer = rec->integer;
- break;
- case STRING:
- mem_rec->val.ptr = normalize_string(rec->ptr);
- break;
- }
- return mem_rec;
-}
-
-static int
-validRange(int addr,int len)
-{
- int end = addr + len;
-
- if (addr < 0x1000 || end > 0xc0000)
- return 0;
- return 1;
-}
-
-static void
-do_list(struct mem *list, memType addr)
-{
- struct mem *prev;
- int len;
-
- while (list) {
- switch (list->type) {
- case BYTE:
- if (!validRange(addr,1)) goto error;
- *(CARD8*)addr = list->val.integer;
- addr =+ 1;
- break;
- case WORD:
- if (!validRange(addr,2)) goto error;
- *(CARD16*)addr = list->val.integer;
- addr =+ 2;
- break;
- case LONG:
- if (!validRange(addr,4)) goto error;
- *(CARD32*)addr = list->val.integer;
- addr =+ 4;
- break;
- case STRING:
- len = strlen((char*)list->val.ptr);
- if (!validRange(addr,len)) goto error;
- memcpy((CARD8*)addr,(void*)list->val.ptr,len);
- addr =+ len;
- free(list->val.ptr);
- break;
- }
- prev = list;
- list = list->next;
- free(prev);
- continue;
- error:
- printf("address out of range\n");
- while (list) {
- prev = list;
- list = list->next;
- free(prev);
- }
- break;
- }
-}
-
-static char *
-normalize_string(char *ptr)
-{
- int i = 0, j = 0, c = 0, esc= 0;
- int size;
- char *mem_ptr;
-
- size = strlen(ptr);
- mem_ptr = malloc(size);
- while (1) {
- switch (*(ptr + i)) {
- case '\\':
- if (esc) {
- *(mem_ptr + j++) = *(ptr + i);
- esc = 0;
- } else
- esc = 1;
- break;
- case '\"':
- if (esc) {
- *(mem_ptr + j++) = *(ptr + i);
- esc = 0;
- } else
- c++;
- break;
- default:
- *(mem_ptr + j++) = *(ptr + i);
- break;
- }
- if (c > 1) {
- *(mem_ptr + j) = '\0';
- break;
- }
- i++;
- }
- return mem_ptr;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/pci.c b/board/MAI/bios_emulator/scitech/src/v86bios/pci.c
deleted file mode 100644
index b58a571..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/pci.c
+++ /dev/null
@@ -1,902 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-#include <fcntl.h>
-#include <unistd.h>
-#include <malloc.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <sys/stat.h>
-#include <string.h>
-#if defined (__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#endif
-#include "AsmMacros.h"
-
-#include "pci.h"
-
-/*
- * I'm rather simple mindend - therefore I do a poor man's
- * pci scan without all the fancy stuff that is done in
- * scanpci. However that's all we need.
- */
-
-PciStructPtr PciStruct = NULL;
-PciBusPtr PciBuses = NULL;
-PciStructPtr CurrentPci = NULL;
-PciStructPtr PciList = NULL;
-PciStructPtr BootBios = NULL;
-int pciMaxBus = 0;
-
-static CARD32 PciCfg1Addr;
-
-static void readConfigSpaceCfg1(CARD32 bus, CARD32 dev, CARD32 func,
- CARD32 *reg);
-static int checkSlotCfg1(CARD32 bus, CARD32 dev, CARD32 func);
-static int checkSlotCfg2(CARD32 bus, int dev);
-static void readConfigSpaceCfg2(CARD32 bus, int dev, CARD32 *reg);
-static CARD8 interpretConfigSpace(CARD32 *reg, int busidx,
- CARD8 dev, CARD8 func);
-static CARD32 findBIOSMap(PciStructPtr pciP, CARD32 *biosSize);
-static void restoreMem(PciStructPtr pciP);
-
-
-#ifdef __alpha__
-#define PCI_BUS_FROM_TAG(tag) (((tag) & 0x00ff0000) >> 16)
-#define PCI_DFN_FROM_TAG(tag) (((tag) & 0x0000ff00) >> 8)
-
-#include <asm/unistd.h>
-
-CARD32
-axpPciCfgRead(CARD32 tag)
-{
- int bus, dfn;
- CARD32 val = 0xffffffff;
-
- bus = PCI_BUS_FROM_TAG(tag);
- dfn = PCI_DFN_FROM_TAG(tag);
-
- syscall(__NR_pciconfig_read, bus, dfn, tag & 0xff, 4, &val);
- return(val);
-}
-
-void
-axpPciCfgWrite(CARD32 tag, CARD32 val)
-{
- int bus, dfn;
-
- bus = PCI_BUS_FROM_TAG(tag);
- dfn = PCI_DFN_FROM_TAG(tag);
-
- syscall(__NR_pciconfig_write, bus, dfn, tag & 0xff, 4, &val);
-}
-
-static CARD32 (*readPci)(CARD32 reg) = axpPciCfgRead;
-static void (*writePci)(CARD32 reg, CARD32 val) = axpPciCfgWrite;
-#else
-static CARD32 readPciCfg1(CARD32 reg);
-static void writePciCfg1(CARD32 reg, CARD32 val);
-static CARD32 readPciCfg2(CARD32 reg);
-static void writePciCfg2(CARD32 reg, CARD32 val);
-
-static CARD32 (*readPci)(CARD32 reg) = readPciCfg1;
-static void (*writePci)(CARD32 reg, CARD32 val) = writePciCfg1;
-#endif
-
-#if defined(__alpha__) || defined(__sparc__)
-#define PCI_EN 0x00000000
-#else
-#define PCI_EN 0x80000000
-#endif
-
-
-static int numbus;
-static int hostbridges = 1;
-static unsigned long pciMinMemReg = ~0;
-
-
-void
-scan_pci(void)
-{
- unsigned short configtype;
-
- CARD32 reg[64];
- int busidx;
- CARD8 cardnum;
- CARD8 func;
- int idx;
-
- int i;
- PciStructPtr pci1;
- PciBusPtr pci_b1,pci_b2;
-
-#if defined(__alpha__) || defined(__powerpc__) || defined(__sparc__) || defined(__ia64__)
- configtype = 1;
-#else
- CARD8 tmp1, tmp2;
- CARD32 tmp32_1, tmp32_2;
- outb(PCI_MODE2_ENABLE_REG, 0x00);
- outb(PCI_MODE2_FORWARD_REG, 0x00);
- tmp1 = inb(PCI_MODE2_ENABLE_REG);
- tmp2 = inb(PCI_MODE2_FORWARD_REG);
- if ((tmp1 == 0x00) && (tmp2 == 0x00)) {
- configtype = 2;
- readPci = readPciCfg2;
- writePci = writePciCfg2;
- P_printf("PCI says configuration type 2\n");
- } else {
- tmp32_1 = inl(PCI_MODE1_ADDRESS_REG);
- outl(PCI_MODE1_ADDRESS_REG, PCI_EN);
- tmp32_2 = inl(PCI_MODE1_ADDRESS_REG);
- outl(PCI_MODE1_ADDRESS_REG, tmp32_1);
- if (tmp32_2 == PCI_EN) {
- configtype = 1;
- P_printf("PCI says configuration type 1\n");
- } else {
- P_printf("No PCI !\n");
- return;
- }
- }
-#endif
-
- if (configtype == 1) {
- P_printf("PCI probing configuration type 1\n");
- busidx = 0;
- numbus = 1;
- idx = 0;
- do {
- P_printf("\nProbing for devices on PCI bus %d:\n", busidx);
- for (cardnum = 0; cardnum < MAX_DEV_PER_VENDOR_CFG1; cardnum++) {
- func = 0;
- do {
- /* loop over the different functions, if present */
- if (!checkSlotCfg1(busidx,cardnum,func))
- break;
- readConfigSpaceCfg1(busidx,cardnum,func,reg);
-
- func = interpretConfigSpace(reg,busidx,
- cardnum,func);
-
- if (idx++ > MAX_PCI_DEVICES)
- continue;
- } while (func < 8);
- }
- } while (++busidx < PCI_MAXBUS);
-#if defined(__alpha__) || defined(__powerpc__) || defined(__sparc__) || defined(__ia64__)
- /* don't use outl() ;-) */
-#else
- outl(PCI_MODE1_ADDRESS_REG, 0);
-#endif
- } else {
- int slot;
-
- P_printf("PCI probing configuration type 2\n");
- busidx = 0;
- numbus = 1;
- idx = 0;
- do {
- for (slot=0xc0; slot<0xd0; i++) {
- if (!checkSlotCfg2(busidx,slot))
- break;
- readConfigSpaceCfg2(busidx,slot,reg);
-
- interpretConfigSpace(reg,busidx,
- slot,0);
- if (idx++ > MAX_PCI_DEVICES)
- continue;
- }
- } while (++busidx < PCI_MAXBUS);
- }
-
-
- pciMaxBus = numbus - 1;
- P_printf("Number of buses in system: %i\n",pciMaxBus + 1);
- P_printf("Min PCI mem address: 0x%lx\n",pciMinMemReg);
-
- /* link buses */
- pci_b1 = PciBuses;
- while (pci_b1) {
- pci_b2 = PciBuses;
- pci_b1->pBus = NULL;
- while (pci_b2) {
- if (pci_b1->primary == pci_b2->secondary)
- pci_b1->pBus = pci_b2;
- pci_b2 = pci_b2->next;
- }
- pci_b1 = pci_b1->next;
- }
- pci1 = PciStruct;
- while (pci1) {
- pci_b2 = PciBuses;
- pci1->pBus = NULL;
- while (pci_b2) {
- if (pci1->bus == pci_b2->secondary)
- pci1->pBus = pci_b2;
- pci_b2 = pci_b2->next;
- }
- pci1 = pci1->next;
- }
- if (RESORT) {
- PciStructPtr tmp = PciStruct, tmp1;
- PciStruct = NULL;
- while (tmp) {
- tmp1 = tmp->next;
- tmp->next = PciStruct;
- PciStruct = tmp;
- tmp = tmp1;
- }
- }
- PciList = CurrentPci = PciStruct;
-}
-
-#ifndef __alpha__
-static CARD32
-readPciCfg1(CARD32 reg)
-{
- CARD32 val;
-
- outl(PCI_MODE1_ADDRESS_REG, reg);
- val = inl(PCI_MODE1_DATA_REG);
- outl(PCI_MODE1_ADDRESS_REG, 0);
- P_printf("reading: 0x%x from 0x%x\n",val,reg);
- return val;
-}
-
-static void
-writePciCfg1(CARD32 reg, CARD32 val)
-{
- P_printf("writing: 0x%x to 0x%x\n",val,reg);
- outl(PCI_MODE1_ADDRESS_REG, reg);
- outl(PCI_MODE1_DATA_REG,val);
- outl(PCI_MODE1_ADDRESS_REG, 0);
-}
-
-static CARD32
-readPciCfg2(CARD32 reg)
-{
- CARD32 val;
- CARD8 bus = (reg >> 16) & 0xff;
- CARD8 dev = (reg >> 11) & 0x1f;
- CARD8 num = reg & 0xff;
-
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- val = inl((dev << 8) + num);
- outb(PCI_MODE2_ENABLE_REG, 0x00);
- P_printf("reading: 0x%x from 0x%x\n",val,reg);
- return val;
-}
-
-static void
-writePciCfg2(CARD32 reg, CARD32 val)
-{
- CARD8 bus = (reg >> 16) & 0xff;
- CARD8 dev = (reg >> 11) & 0x1f;
- CARD8 num = reg & 0xff;
-
- P_printf("writing: 0x%x to 0x%x\n",val,reg);
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- outl((dev << 8) + num,val);
- outb(PCI_MODE2_ENABLE_REG, 0x00);
-}
-#endif
-
-void
-pciVideoDisable(void)
-{
- /* disable VGA routing on bridges */
- PciBusPtr pbp = PciBuses;
- PciStructPtr pcp = PciStruct;
-
- while (pbp) {
- writePci(pbp->Slot.l | 0x3c, pbp->bctl & ~(CARD32)(8<<16));
- pbp = pbp->next;
- }
- /* disable display devices */
- while (pcp) {
- writePci(pcp->Slot.l | 0x04, pcp->cmd_st & ~(CARD32)3);
- writePci(pcp->Slot.l | 0x30, pcp->RomBase & ~(CARD32)1);
- pcp = pcp->next;
- }
-}
-
-void
-pciVideoRestore(void)
-{
- /* disable VGA routing on bridges */
- PciBusPtr pbp = PciBuses;
- PciStructPtr pcp = PciStruct;
-
- while (pbp) {
- writePci(pbp->Slot.l | 0x3c, pbp->bctl);
- pbp = pbp->next;
- }
- /* disable display devices */
- while (pcp) {
- writePci(pcp->Slot.l | 0x04, pcp->cmd_st);
- writePci(pcp->Slot.l | 0x30, pcp->RomBase);
- pcp = pcp->next;
- }
-}
-
-void
-EnableCurrent()
-{
- PciBusPtr pbp;
- PciStructPtr pcp = CurrentPci;
-
- pciVideoDisable();
-
- pbp = pcp->pBus;
- while (pbp) { /* enable bridges */
- writePci(pbp->Slot.l | 0x3c, pbp->bctl | (CARD32)(8<<16));
- pbp = pbp->pBus;
- }
- writePci(pcp->Slot.l | 0x04, pcp->cmd_st | (CARD32)3);
- writePci(pcp->Slot.l | 0x30, pcp->RomBase | (CARD32)1);
-}
-
-CARD8
-PciRead8(int offset, CARD32 Slot)
-{
- int shift = offset & 0x3;
- offset = offset & 0xFC;
- return ((readPci(Slot | offset) >> (shift << 3)) & 0xff);
-}
-
-CARD16
-PciRead16(int offset, CARD32 Slot)
-{
- int shift = offset & 0x2;
- offset = offset & 0xFC;
- return ((readPci(Slot | offset) >> (shift << 3)) & 0xffff);
-}
-
-CARD32
-PciRead32(int offset, CARD32 Slot)
-{
- offset = offset & 0xFC;
- return (readPci(Slot | offset));
-}
-
-void
-PciWrite8(int offset, CARD8 byte, CARD32 Slot)
-{
- CARD32 val;
- int shift = offset & 0x3;
- offset = offset & 0xFC;
- val = readPci(Slot | offset);
- val &= ~(CARD32)(0xff << (shift << 3));
- val |= byte << (shift << 3);
- writePci(Slot | offset, val);
-}
-
-void
-PciWrite16(int offset, CARD16 word, CARD32 Slot)
-{
- CARD32 val;
- int shift = offset & 0x2;
- offset = offset & 0xFC;
- val = readPci(Slot | offset);
- val &= ~(CARD32)(0xffff << (shift << 3));
- val |= word << (shift << 3);
- writePci(Slot | offset, val);
-}
-
-void
-PciWrite32(int offset, CARD32 lg, CARD32 Slot)
-{
- offset = offset & 0xFC;
- writePci(Slot | offset, lg);
-}
-
-int
-mapPciRom(PciStructPtr pciP)
-{
- unsigned long RomBase = 0;
- int mem_fd;
- unsigned char *mem, *ptr;
- unsigned char *scratch = NULL;
- int length = 0;
- CARD32 biosSize = 0x1000000;
- CARD32 enablePci;
-
- if (!pciP)
- pciP = CurrentPci;
-
- if (FIX_ROM) {
- RomBase = findBIOSMap(pciP, &biosSize);
- if (!RomBase) {
- fprintf(stderr,"Cannot remap BIOS of %i:%i:%i "
- "- trying preset address\n",pciP->bus,pciP->dev,
- pciP->func);
- RomBase = pciP->RomBase & ~(CARD32)0xFF;
- }
- } else {
- RomBase = pciP->RomBase & ~(CARD32)0xFF;
- if (~RomBase + 1 < biosSize || !RomBase)
- RomBase = findBIOSMap(pciP, &biosSize);
- }
-
- P_printf("RomBase: 0x%lx\n",RomBase);
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- restoreMem(pciP);
- return (0);
- }
-
- PciWrite32(0x30,RomBase | 1,pciP->Slot.l);
-
-#ifdef __alpha__
- mem = ptr = (unsigned char *)mmap(0, biosSize, PROT_READ,
- MAP_SHARED, mem_fd, RomBase | _bus_base());
-#else
- mem = ptr = (unsigned char *)mmap(0, biosSize, PROT_READ,
- MAP_SHARED, mem_fd, RomBase);
-#endif
- if (pciP != CurrentPci) {
- enablePci = PciRead32(0x4,pciP->Slot.l);
- PciWrite32(0x4,enablePci | 0x2,pciP->Slot.l);
- }
-
-#ifdef PRINT_PCI
- dprint((unsigned long)ptr,0x30);
-#endif
- while ( *ptr == 0x55 && *(ptr+1) == 0xAA) {
- unsigned short data_off = *(ptr+0x18) | (*(ptr+0x19)<< 8);
- unsigned char *data = ptr + data_off;
- unsigned char type;
- int i;
-
- if (*data!='P' || *(data+1)!='C' || *(data+2)!='I' || *(data+3)!='R') {
- break;
- }
- type = *(data + 0x14);
- P_printf("data segment in BIOS: 0x%x, type: 0x%x ",data_off,type);
-
- if (type != 0) { /* not PC-AT image: find next one */
- unsigned int image_length;
- unsigned char indicator = *(data + 0x15);
- if (indicator & 0x80) /* last image */
- break;
- image_length = (*(data + 0x10)
- | (*(data + 0x11) << 8)) << 9;
- P_printf("data image length: 0x%x, ind: 0x%x\n",
- image_length,indicator);
- ptr = ptr + image_length;
- continue;
- }
- /* OK, we have a PC Image */
- length = (*(ptr + 2) << 9);
- P_printf("BIOS length: 0x%x\n",length);
- scratch = (unsigned char *)malloc(length);
- /* don't use memcpy() here: Reading from bus! */
- for (i=0;i<length;i++)
- *(scratch + i)=*(ptr + i);
- break;
- }
-
- if (pciP != CurrentPci)
- PciWrite32(0x4,enablePci,pciP->Slot.l);
-
- /* unmap/close/disable PCI bios mem */
- munmap(mem, biosSize);
- close(mem_fd);
- /* disable and restore mapping */
- writePci(pciP->Slot.l | 0x30, pciP->RomBase & ~(CARD32)1);
-
- if (scratch && length) {
- memcpy((unsigned char *)V_BIOS, scratch, length);
- free(scratch);
- }
-
- restoreMem(pciP);
- return length;
-}
-
-CARD32
-findPci(CARD16 slotBX)
-{
- CARD32 slot = slotBX << 8;
-
- if (slot == (CurrentPci->Slot.l & ~PCI_EN))
- return (CurrentPci->Slot.l | PCI_EN);
- else {
-#if !SHOW_ALL_DEV
- PciBusPtr pBus = CurrentPci->pBus;
- while (pBus) {
- /* fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pBus->Slot.l); */
- if (slot == (pBus->Slot.l & ~PCI_EN))
- return pBus->Slot.l | PCI_EN;
- pBus = pBus->next;
- }
-#else
- PciStructPtr pPci = PciStruct;
- while (pPci) {
- /*fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pPci->Slot.l); */
- if (slot == (pPci->Slot.l & ~PCI_EN))
- return pPci->Slot.l | PCI_EN;
- pPci = pPci->next;
- }
-#endif
- }
- return 0;
-}
-
-CARD16
-pciSlotBX(PciStructPtr pPci)
-{
- return (CARD16)((pPci->Slot.l >> 8) & 0xFFFF);
-}
-
-PciStructPtr
-findPciDevice(CARD16 vendorID, CARD16 deviceID, char n)
-{
- PciStructPtr pPci = CurrentPci;
- n++;
-
- while (pPci) {
- if ((pPci->VendorID == vendorID) && (pPci->DeviceID == deviceID)) {
- if (!(--n)) break;
- }
- pPci = pPci->next;
- }
- return pPci;
-}
-
-PciStructPtr
-findPciClass(CARD8 intf, CARD8 subClass, CARD16 class, char n)
-{
- PciStructPtr pPci = CurrentPci;
- n++;
-
- while (pPci) {
- if ((pPci->Interface == intf) && (pPci->SubClass == subClass)
- && (pPci->BaseClass == class)) {
- if (!(--n)) break;
- }
- pPci = pPci->next;
- }
- return pPci;
-}
-
-static void
-readConfigSpaceCfg1(CARD32 bus, CARD32 dev, CARD32 func, CARD32 *reg)
-{
- CARD32 config_cmd = PCI_EN | (bus<<16) |
- (dev<<11) | (func<<8);
- int i;
-
- for (i = 0; i<64;i+=4) {
-#ifdef __alpha__
- reg[i] = axpPciCfgRead(config_cmd | i);
-#else
- outl(PCI_MODE1_ADDRESS_REG, config_cmd | i);
- reg[i] = inl(PCI_MODE1_DATA_REG);
-#endif
-
-#ifdef V86BIOS_DEBUG
- P_printf("0x%lx\n",reg[i]);
-#endif
- }
-}
-
-static int
-checkSlotCfg1(CARD32 bus, CARD32 dev, CARD32 func)
-{
- CARD32 config_cmd = PCI_EN | (bus<<16) |
- (dev<<11) | (func<<8);
- CARD32 reg;
-#ifdef __alpha__
- reg = axpPciCfgRead(config_cmd);
-#else
- outl(PCI_MODE1_ADDRESS_REG, config_cmd);
- reg = inl(PCI_MODE1_DATA_REG);
-#endif
- if (reg != 0xFFFFFFFF)
- return 1;
- else
- return 0;
-}
-
-static int
-checkSlotCfg2(CARD32 bus, int dev)
-{
- CARD32 val;
-
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- val = inl(dev << 8);
- outb(PCI_MODE2_FORWARD_REG, 0x00);
- outb(PCI_MODE2_ENABLE_REG, 0x00);
- if (val == 0xFFFFFFFF)
- return 0;
- if (val == 0xF0F0F0F0)
- return 0;
- return 1;
-}
-
-static void
-readConfigSpaceCfg2(CARD32 bus, int dev, CARD32 *reg)
-{
- int i;
-
- outb(PCI_MODE2_ENABLE_REG, 0xF1);
- outb(PCI_MODE2_FORWARD_REG, bus);
- for (i = 0; i<64;i+=4) {
- reg[i] = inl((dev << 8) + i);
-#ifdef V86BIOS_DEBUG
- P_printf("0x%lx\n",reg[i]);
-#endif
- }
- outb(PCI_MODE2_ENABLE_REG, 0x00);
-}
-
-static CARD8
-interpretConfigSpace(CARD32 *reg, int busidx, CARD8 dev, CARD8 func)
-{
- CARD32 config_cmd;
- CARD16 vendor, device;
- CARD8 baseclass, subclass;
- CARD8 primary, secondary;
- CARD8 header, interface;
- int i;
-
- config_cmd = PCI_EN | busidx<<16 |
- (dev<<11) | (func<<8);
-
- for (i = 0x10; i < 0x28; i+=4) {
- if (IS_MEM32(reg[i]))
- if ((reg[i] & 0xFFFFFFF0) < pciMinMemReg)
- pciMinMemReg = (reg[i] & 0xFFFFFFF0);
-#ifdef __alpha__
- if (IS_MEM64(reg[i])) {
- unsigned long addr = reg[i] |
- (unsigned long)(reg[i+4]) << 32;
- if ((addr & ~0xfL) < pciMinMemReg)
- pciMinMemReg = (addr & ~0xfL);
- i+=4;
- }
-#endif
- }
- vendor = reg[0] & 0xFFFF;
- device = reg[0] >> 16;
- P_printf("bus: %i card: %i func %i reg0: 0x%x ", busidx,dev,func,reg[0]);
- baseclass = reg[8] >> 24;
- subclass = (reg[8] >> 16) & 0xFF;
- interface = (reg[8] >> 8) & 0xFF;
-
- header = (reg[0x0c] >> 16) & 0xff;
- P_printf("bc 0x%x, sub 0x%x, if 0x%x, hdr 0x%x\n",
- baseclass,subclass,interface,header);
- if (BRIDGE_CLASS(baseclass)) {
- if (BRIDGE_PCI_CLASS(subclass)) {
- PciBusPtr pbp = malloc(sizeof(PciBusRec));
- P_printf("Pci-Pci Bridge found; ");
- primary = reg[0x18] & 0xFF;
- secondary = (reg[0x18] >> 8) & 0xFF;
- P_printf("primary: 0x%x secondary: 0x%x\n",
- primary,secondary);
- pbp->bctl = reg[0x3c];
- pbp->primary = primary;
- pbp->secondary = secondary;
- pbp->Slot.l = config_cmd;
- pbp->next = PciBuses;
- PciBuses = pbp;
- numbus++;
- } else if (BRIDGE_HOST_CLASS(subclass)
- && (hostbridges++ > 1)) {
- numbus++;
- }
- } else if (VIDEO_CLASS(baseclass,subclass)) {
- PciStructPtr pcp = malloc(sizeof(PciStructRec));
- P_printf("Display adapter found\n");
- pcp->RomBase = reg[0x30];
- pcp->cmd_st = reg[4];
- pcp->active = (reg[4] & 0x03) == 3 ? 1 : 0;
- pcp->VendorID = vendor;
- pcp->DeviceID = device;
- pcp->Interface = interface;
- pcp->BaseClass = baseclass;
- pcp->SubClass = subclass;
- pcp->Slot.l = config_cmd;
- pcp->bus = busidx;
- pcp->dev = dev;
- pcp->func = func;
- pcp->next = PciStruct;
- PciStruct = pcp;
- }
- if ((func == 0)
- && ((header & PCI_MULTIFUNC_DEV) == 0))
- func = 8;
- else
- func++;
- return func;
-}
-
-static CARD32 remapMEM_val;
-static int remapMEM_num;
-
-static int /* map it on some other video device */
-remapMem(PciStructPtr pciP, int num, CARD32 size)
-{
- PciStructPtr pciPtr = PciStruct;
- int i;
- CARD32 org;
- CARD32 val;
- CARD32 size_n;
-
- org = PciRead32(num + 0x10,pciP->Slot.l);
-
- while (pciPtr) {
- for (i = 0; i < 20; i=i+4) {
-
- val = PciRead32(i + 0x10,pciPtr->Slot.l);
- /* don't map it on itself */
- if ((org & 0xfffffff0) == (val & 0xfffffff0))
- continue;
- if (val && !(val & 1))
- PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l);
- else
- continue;
- size_n = PciRead32(i + 0x10,pciPtr->Slot.l);
- PciWrite32(i + 0x10,val,pciPtr->Slot.l);
- size_n = ~(CARD32)(size_n & 0xfffffff0) + 1;
-
- if (size_n >= size) {
- PciWrite32(num + 0x10,val,pciP->Slot.l);
- return 1;
- }
- }
- pciPtr = pciPtr->next;
- }
- /* last resort: try to go below lowest PCI mem address */
- val = ((pciMinMemReg & ~(CARD32)(size - 1)) - size);
- if (val > 0x7fffffff) {
- PciWrite32(num + 0x10,val, pciP->Slot.l);
- return 1;
- }
-
- return 0;
-}
-
-static void
-restoreMem(PciStructPtr pciP)
-{
- if (remapMEM_val == 0) return;
- PciWrite32(remapMEM_num + 0x10,remapMEM_val,pciP->Slot.l);
- return;
-}
-
-static CARD32
-findBIOSMap(PciStructPtr pciP, CARD32 *biosSize)
-{
- PciStructPtr pciPtr = PciStruct;
- int i;
- CARD32 val;
- CARD32 size;
-
- PciWrite32(0x30,0xffffffff,pciP->Slot.l);
- *biosSize = PciRead32(0x30,pciP->Slot.l);
- P_printf("bios size: 0x%x\n",*biosSize);
- PciWrite32(0x30,pciP->RomBase,pciP->Slot.l);
- *biosSize = ~(*biosSize & 0xFFFFFF00) + 1;
- P_printf("bios size masked: 0x%x\n",*biosSize);
- if (*biosSize > (1024 * 1024 * 16)) {
- *biosSize = 1024 * 1024 * 16;
- P_printf("fixing broken BIOS size: 0x%x\n",*biosSize);
- }
- while (pciPtr) {
- if (pciPtr->bus != pciP->bus) {
- pciPtr = pciPtr->next;
- continue;
- }
- for (i = 0; i < 20; i=i+4) {
-
- val = PciRead32(i + 0x10,pciPtr->Slot.l);
- if (!(val & 1))
-
- PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l);
- else
- continue;
- size = PciRead32(i + 0x10,pciPtr->Slot.l);
- PciWrite32(i + 0x10,val,pciPtr->Slot.l);
- size = ~(CARD32)(size & 0xFFFFFFF0) + 1;
-#ifdef V86_BIOS_DEBUG
- P_printf("size: 0x%x\n",size);
-#endif
- if (size >= *biosSize) {
- if (pciP == pciPtr) { /* if same device remap ram*/
- if (!(remapMem(pciP,i,size)))
- continue;
- remapMEM_val = val;
- remapMEM_num = i;
- } else {
- remapMEM_val = 0;
- }
- return val & 0xFFFFFF00;
- }
- }
- pciPtr = pciPtr->next;
- }
- remapMEM_val = 0;
- /* very last resort */
- if (pciP->bus == 0 && (pciMinMemReg > *biosSize))
- return (pciMinMemReg - size) & ~(size - 1);
-
- return 0;
-}
-
-int
-cfg1out(CARD16 addr, CARD32 val)
-{
- if (addr == 0xCF8) {
- PciCfg1Addr = val;
- return 1;
- } else if (addr == 0xCFC) {
- writePci(PciCfg1Addr, val);
- return 1;
- }
- return 0;
-}
-
-int
-cfg1in(CARD16 addr, CARD32 *val)
-{
- if (addr == 0xCF8) {
- *val = PciCfg1Addr;
- return 1;
- } else if (addr == 0xCFC) {
- *val = readPci(PciCfg1Addr);
- return 1;
- }
- return 0;
-}
-
-void
-list_pci(void)
-{
- PciStructPtr pci = PciList;
-
- while (pci) {
- printf("[0x%x:0x%x:0x%x] vendor: 0x%4.4x dev: 0x%4.4x class: 0x%4.4x"
- " subclass: 0x%4.4x\n",pci->bus,pci->dev,pci->func,
- pci->VendorID,pci->DeviceID,pci->BaseClass,pci->SubClass);
- pci = pci->next;
- }
-}
-
-PciStructPtr
-findPciByIDs(int bus, int dev, int func)
-{
- PciStructPtr pciP = PciList;
-
- while (pciP) {
- if (pciP->bus == bus && pciP->dev == dev && pciP->func == func)
- return pciP;
- pciP = pciP->next;
- }
- return NULL;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/pci.h b/board/MAI/bios_emulator/scitech/src/v86bios/pci.h
deleted file mode 100644
index 58ad522..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/pci.h
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "v86bios.h"
-
-#ifndef V86_PCI_H
-#define V86_PCI_H
-
-typedef union {
- struct {
- unsigned int zero:2;
- unsigned int reg:6;
- unsigned int func:3;
- unsigned int dev:5;
- unsigned int bus:8;
- unsigned int reserved:7;
- unsigned int enable:1;
- } pci;
- CARD32 l;
-} PciSlot;
-
-typedef struct pciBusRec {
- CARD8 primary;
- CARD8 secondary;
- CARD32 bctl;
- PciSlot Slot;
- struct pciBusRec *next;
- struct pciBusRec *pBus;
-} PciBusRec, *PciBusPtr;
-
-typedef struct pciStructRec {
- CARD16 VendorID;
- CARD16 DeviceID;
- CARD8 Interface;
- CARD8 BaseClass;
- CARD8 SubClass;
- CARD32 RomBase;
- CARD32 bus;
- CARD8 dev;
- CARD8 func;
- CARD32 cmd_st;
- int active;
- PciSlot Slot;
- struct pciStructRec *next;
- PciBusPtr pBus;
-} PciStructRec , *PciStructPtr;
-
-
-extern PciStructPtr CurrentPci;
-extern PciStructPtr PciList;
-extern PciStructPtr BootBios;
-extern int pciMaxBus;
-
-extern CARD32 findPci(CARD16 slotBX);
-extern CARD16 pciSlotBX(PciStructPtr);
-PciStructPtr findPciDevice(CARD16 vendorID, CARD16 deviceID, char n);
-PciStructPtr findPciClass(CARD8 intf, CARD8 subClass, CARD16 class, char n);
-
-extern CARD8 PciRead8(int offset, CARD32 slot);
-extern CARD16 PciRead16(int offset, CARD32 slot);
-extern CARD32 PciRead32(int offset, CARD32 slot);
-
-extern void PciWrite8(int offset,CARD8 byte, CARD32 slot);
-extern void PciWrite16(int offset,CARD16 word, CARD32 slot);
-extern void PciWrite32(int offset,CARD32 lg, CARD32 slot);
-
-extern void scan_pci(void);
-extern void pciVideoDisable(void);
-extern void pciVideoRestore(void);
-extern void EnableCurrent(void);
-extern int mapPciRom(PciStructPtr pciP);
-extern int cfg1out(CARD16 addr, CARD32 val);
-extern int cfg1in(CARD16 addr, CARD32 *val);
-extern void list_pci(void);
-extern PciStructPtr findPciByIDs(int bus, int dev, int func);
-
-#define PCI_MODE2_ENABLE_REG 0xCF8
-#define PCI_MODE2_FORWARD_REG 0xCFA
-#define PCI_MODE1_ADDRESS_REG 0xCF8
-#define PCI_MODE1_DATA_REG 0xCFC
-#if defined(__alpha__) || defined(__sparc__)
-#define PCI_EN 0x00000000
-#else
-#define PCI_EN 0x80000000
-#endif
-#define MAX_DEV_PER_VENDOR_CFG1 32
-#define BRIDGE_CLASS(x) (x == 0x06)
-#define BRIDGE_PCI_CLASS(x) (x == 0x04)
-#define BRIDGE_HOST_CLASS(x) (x == 0x00)
-#define PCI_CLASS_PREHISTORIC 0x00
-#define PCI_SUBCLASS_PREHISTORIC_VGA 0x01
-#define PCI_CLASS_DISPLAY 0x03
-#define PCI_SUBCLASS_DISPLAY_VGA 0x00
-#define PCI_SUBCLASS_DISPLAY_XGA 0x01
-#define PCI_SUBCLASS_DISPLAY_MISC 0x80
-#define VIDEO_CLASS(b,s) \
- (((b) == PCI_CLASS_PREHISTORIC && (s) == PCI_SUBCLASS_PREHISTORIC_VGA) || \
- ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_VGA) ||\
- ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_XGA) ||\
- ((b) == PCI_CLASS_DISPLAY && (s) == PCI_SUBCLASS_DISPLAY_MISC))
-#define PCI_MULTIFUNC_DEV 0x80
-#define MAX_PCI_DEVICES 64
-#define PCI_MAXBUS 16
-#define PCI_IS_MEM 0x00000001
-#define MAX_PCI_ROM_SIZE (1024 * 1024 * 16)
-
-#define IS_MEM32(x) ((x & 0x7) == 0 && x != 0)
-#define IS_MEM64(x) ((x & 0x7) == 0x4)
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86.c b/board/MAI/bios_emulator/scitech/src/v86bios/v86.c
deleted file mode 100644
index 4deed04..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/v86.c
+++ /dev/null
@@ -1,562 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-
-#include "debug.h"
-#include <sys/vm86.h>
-#include <unistd.h>
-#include <errno.h>
-#include <asm/unistd.h>
-#include <stdio.h>
-#include <string.h>
-#include <signal.h>
-#include <setjmp.h>
-#include "v86bios.h"
-#include "AsmMacros.h"
-
-struct vm86_struct vm86s;
-
-static int vm86_GP_fault(void);
-static int vm86_do_int(int num);
-static void dump_code(void);
-static void dump_registers(void);
-static void stack_trace(void);
-static int vm86_rep(struct vm86_struct *ptr);
-
-#define CPU_REG(x) (vm86s.regs.##x)
-#define CPU_REG_LW(reg) (*((CARD16 *)&CPU_REG(reg)))
-#define CPU_REG_HW(reg) (*((CARD16 *)&CPU_REG(reg) + 1))
-#define CPU_REG_LB(reg) (*(CARD8 *)&CPU_REG(e##reg))
-#define SEG_ADR(type, seg, reg) type((CPU_REG_LW(seg) << 4) \
- + CPU_REG_LW(e##reg))
-#define DF (1 << 10)
-
-struct pio P;
-
-
-void
-setup_io(void)
-{
- if (!Config.PrintPort && !Config.IoStatistics) {
- P.inb = (CARD8(*)(CARD16))inb;
- P.inw = (CARD16(*)(CARD16))inw;
- P.inl = (CARD32(*)(CARD16))inl;
- P.outb = (void(*)(CARD16,CARD8))outb;
- P.outw = (void(*)(CARD16,CARD16))outw;
- P.outl = (void(*)(CARD16,CARD32))outl;
- } else {
- P.inb = p_inb;
- P.inw = p_inw;
- P.inl = p_inl;
- P.outb = p_outb;
- P.outw = p_outw;
- P.outl = p_outl;
- }
-}
-
-
-static void
-setup_vm86(unsigned long bios_start, i86biosRegsPtr regs)
-{
- CARD32 eip;
- CARD16 cs;
-
- vm86s.flags = VM86_SCREEN_BITMAP;
- vm86s.flags = 0;
- vm86s.screen_bitmap = 0;
- vm86s.cpu_type = CPU_586;
- memset(&vm86s.int_revectored, 0xff,sizeof(vm86s.int_revectored)) ;
- memset(&vm86s.int21_revectored, 0xff,sizeof(vm86s.int21_revectored)) ;
-
- eip = bios_start & 0xFFFF;
- cs = (bios_start & 0xFF0000) >> 4;
-
- CPU_REG(eax) = regs->ax;
- CPU_REG(ebx) = regs->bx;
- CPU_REG(ecx) = regs->cx;
- CPU_REG(edx) = regs->dx;
- CPU_REG(esi) = 0;
- CPU_REG(edi) = regs->di;
- CPU_REG(ebp) = 0;
- CPU_REG(eip) = eip;
- CPU_REG(cs) = cs;
- CPU_REG(esp) = 0x100;
- CPU_REG(ss) = 0x30; /* This is the standard pc bios stack */
- CPU_REG(es) = regs->es;
- CPU_REG(ds) = 0x40; /* standard pc ds */
- CPU_REG(fs) = 0;
- CPU_REG(gs) = 0;
- CPU_REG(eflags) |= (VIF_MASK | VIP_MASK);
-}
-
-void
-collect_bios_regs(i86biosRegsPtr regs)
-{
- regs->ax = CPU_REG(eax);
- regs->bx = CPU_REG(ebx);
- regs->cx = CPU_REG(ecx);
- regs->dx = CPU_REG(edx);
- regs->es = CPU_REG(es);
- regs->ds = CPU_REG(ds);
- regs->di = CPU_REG(edi);
- regs->si = CPU_REG(esi);
-}
-
-static int
-do_vm86(void)
-{
- int retval;
-
-#ifdef V86BIOS_DEBUG
- dump_registers();
-#endif
-/* retval = SYS_vm86old(&vm86s); */
-/* retval = syscall(SYS_vm86old,&vm86s); */
-
- retval = vm86_rep(&vm86s);
-
- switch (VM86_TYPE(retval)) {
- case VM86_UNKNOWN:
- if (!vm86_GP_fault()) return 0;
- break;
- case VM86_STI:
- fprintf(stderr,"vm86_sti :-((\n");
- stack_trace();
- dump_code();
- return 0;
- case VM86_INTx:
- if (!vm86_do_int(VM86_ARG(retval))) {
- fprintf(stderr,"\nUnknown vm86_int: %X\n\n",VM86_ARG(retval));
- dump_registers();
- return 0;
- }
- /* I'm not sure yet what to do if we can handle ints */
- break;
- case VM86_SIGNAL:
- fprintf(stderr,"received signal\n");
- return 0;
- default:
- fprintf(stderr,"unknown type(0x%x)=0x%x\n",
- VM86_ARG(retval),VM86_TYPE(retval));
- dump_registers();
- dump_code();
- stack_trace();
- return 0;
- }
-
- return 1;
-}
-
-static jmp_buf x86_esc;
-static void
-vmexit(int unused)
-{
- longjmp(x86_esc,1);
-}
-
-void
-do_x86(unsigned long bios_start, i86biosRegsPtr regs)
-{
- static void (*org_handler)(int);
-
- setup_vm86(bios_start, regs);
- if (setjmp(x86_esc) == 0) {
- org_handler = signal(2,vmexit);
- while(do_vm86()) {};
- signal(2,org_handler);
- collect_bios_regs(regs);
- } else {
- signal(2,org_handler);
- printf("interrupted at 0x%x\n",((CARD16)CPU_REG(cs)) << 4
- | (CARD16)CPU_REG(eip));
- }
-}
-
-/* get the linear address */
-#define LIN_PREF_SI ((pref_seg << 4) + CPU_REG_LW(esi))
-
-#define LWECX (prefix66 ^ prefix67 ? CPU_REG(ecx) : CPU_REG_LW(ecx))
-
-static int
-vm86_GP_fault(void)
-{
- unsigned char *csp, *lina;
- CARD32 org_eip;
- int pref_seg;
- int done,is_rep,prefix66,prefix67;
-
-
- csp = lina = SEG_ADR((unsigned char *), cs, ip);
-#ifdef V86BIOS_DEBUG
- printf("exception: \n");
- dump_code();
-#endif
-
- is_rep = 0;
- prefix66 = prefix67 = 0;
- pref_seg = -1;
-
- /* eat up prefixes */
- done = 0;
- do {
- switch (*(csp++)) {
- case 0x66: /* operand prefix */ prefix66=1; break;
- case 0x67: /* address prefix */ prefix67=1; break;
- case 0x2e: /* CS */ pref_seg=CPU_REG(cs); break;
- case 0x3e: /* DS */ pref_seg=CPU_REG(ds); break;
- case 0x26: /* ES */ pref_seg=CPU_REG(es); break;
- case 0x36: /* SS */ pref_seg=CPU_REG(ss); break;
- case 0x65: /* GS */ pref_seg=CPU_REG(gs); break;
- case 0x64: /* FS */ pref_seg=CPU_REG(fs); break;
- case 0xf2: /* repnz */
- case 0xf3: /* rep */ is_rep=1; break;
- default: done=1;
- }
- } while (!done);
- csp--; /* oops one too many */
- org_eip = CPU_REG(eip);
- CPU_REG_LW(eip) += (csp - lina);
-
- switch (*csp) {
-
- case 0x6c: /* insb */
- /* NOTE: ES can't be overwritten; prefixes 66,67 should use esi,edi,ecx
- * but is anyone using extended regs in real mode? */
- /* WARNING: no test for DI wrapping! */
- CPU_REG_LW(edi) += port_rep_inb(CPU_REG_LW(edx),
- SEG_ADR((CARD8 *),es,di),
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0x6d: /* (rep) insw / insd */
- /* NOTE: ES can't be overwritten */
- /* WARNING: no test for _DI wrapping! */
- if (prefix66) {
- CPU_REG_LW(edi) += port_rep_inl(CPU_REG_LW(edx),
- SEG_ADR((CARD32 *),es,di),
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- else {
- CPU_REG_LW(edi) += port_rep_inw(CPU_REG_LW(edx),
- SEG_ADR((CARD16 *),es,di),
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0x6e: /* (rep) outsb */
- if (pref_seg < 0) pref_seg = CPU_REG_LW(ds);
- /* WARNING: no test for _SI wrapping! */
- CPU_REG_LW(esi) += port_rep_outb(CPU_REG_LW(edx),(CARD8*)LIN_PREF_SI,
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0x6f: /* (rep) outsw / outsd */
- if (pref_seg < 0) pref_seg = CPU_REG_LW(ds);
- /* WARNING: no test for _SI wrapping! */
- if (prefix66) {
- CPU_REG_LW(esi) += port_rep_outl(CPU_REG_LW(edx),
- (CARD32 *)LIN_PREF_SI,
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- else {
- CPU_REG_LW(esi) += port_rep_outw(CPU_REG_LW(edx),
- (CARD16 *)LIN_PREF_SI,
- CPU_REG_LW(eflags)&DF,
- (is_rep? LWECX:1));
- }
- if (is_rep) LWECX = 0;
- CPU_REG_LW(eip)++;
- break;
-
- case 0xe5: /* inw xx, inl xx */
- if (prefix66) CPU_REG(eax) = P.inl((int) csp[1]);
- else CPU_REG_LW(eax) = P.inw((int) csp[1]);
- CPU_REG_LW(eip) += 2;
- break;
- case 0xe4: /* inb xx */
- CPU_REG_LW(eax) &= ~(CARD32)0xff;
- CPU_REG_LB(ax) |= P.inb((int) csp[1]);
- CPU_REG_LW(eip) += 2;
- break;
- case 0xed: /* inw dx, inl dx */
- if (prefix66) CPU_REG(eax) = P.inl(CPU_REG_LW(edx));
- else CPU_REG_LW(eax) = P.inw(CPU_REG_LW(edx));
- CPU_REG_LW(eip) += 1;
- break;
- case 0xec: /* inb dx */
- CPU_REG_LW(eax) &= ~(CARD32)0xff;
- CPU_REG_LB(ax) |= P.inb(CPU_REG_LW(edx));
- CPU_REG_LW(eip) += 1;
- break;
-
- case 0xe7: /* outw xx */
- if (prefix66) P.outl((int)csp[1], CPU_REG(eax));
- else P.outw((int)csp[1], CPU_REG_LW(eax));
- CPU_REG_LW(eip) += 2;
- break;
- case 0xe6: /* outb xx */
- P.outb((int) csp[1], CPU_REG_LB(ax));
- CPU_REG_LW(eip) += 2;
- break;
- case 0xef: /* outw dx */
- if (prefix66) P.outl(CPU_REG_LW(edx), CPU_REG(eax));
- else P.outw(CPU_REG_LW(edx), CPU_REG_LW(eax));
- CPU_REG_LW(eip) += 1;
- break;
- case 0xee: /* outb dx */
- P.outb(CPU_REG_LW(edx), CPU_REG_LB(ax));
- CPU_REG_LW(eip) += 1;
- break;
-
- case 0xf4:
-#ifdef V86BIOS_DEBUG
- printf("hlt at %p\n", lina);
-#endif
- return 0;
-
- case 0x0f:
- fprintf(stderr,"CPU 0x0f Trap at eip=0x%lx\n",CPU_REG(eip));
- goto op0ferr;
- break;
-
- case 0xf0: /* lock */
- default:
- fprintf(stderr,"unknown reason for exception\n");
- dump_registers();
- stack_trace();
- op0ferr:
- dump_code();
- fprintf(stderr,"cannot continue\n");
- return 0;
- } /* end of switch() */
- return 1;
-}
-
-static int
-vm86_do_int(int num)
-{
- int val;
- struct regs86 regs;
-
- i_printf("int 0x%x received: ax:0x%lx",num,CPU_REG(eax));
- if (Config.PrintIp)
- i_printf(" at: 0x%x\n",getIP());
- else
- i_printf("\n");
-
- /* try to run bios interrupt */
-
- /* if not installed fall back */
-#define COPY(x) regs.##x = CPU_REG(x)
-#define COPY_R(x) CPU_REG(x) = regs.##x
-
- COPY(eax);
- COPY(ebx);
- COPY(ecx);
- COPY(edx);
- COPY(esi);
- COPY(edi);
- COPY(ebp);
- COPY(eip);
- COPY(esp);
- COPY(cs);
- COPY(ss);
- COPY(ds);
- COPY(es);
- COPY(fs);
- COPY(gs);
- COPY(eflags);
-
- if (!(val = int_handler(num,®s)))
- if (!(val = run_bios_int(num,®s)))
- return val;
-
- COPY_R(eax);
- COPY_R(ebx);
- COPY_R(ecx);
- COPY_R(edx);
- COPY_R(esi);
- COPY_R(edi);
- COPY_R(ebp);
- COPY_R(eip);
- COPY_R(esp);
- COPY_R(cs);
- COPY_R(ss);
- COPY_R(ds);
- COPY_R(es);
- COPY_R(fs);
- COPY_R(gs);
- COPY_R(eflags);
-
- return val;
-#undef COPY
-#undef COPY_R
-}
-
-static void
-dump_code(void)
-{
- int i;
- unsigned char *lina = SEG_ADR((unsigned char *), cs, ip);
-
- fprintf(stderr,"code at 0x%8.8x: ",(CARD32)lina);
- for (i=0; i<0x10; i++)
- fprintf(stderr,"%2.2x ",*(lina + i));
- fprintf(stderr,"\n ");
- for (; i<0x20; i++)
- fprintf(stderr,"%2.2x ",*(lina + i));
- fprintf(stderr,"\n");
-}
-
-#define PRINT(x) fprintf(stderr,#x":%4.4x ",CPU_REG_LW(x))
-#define PRINT_FLAGS(x) fprintf(stderr,#x":%8.8x ",CPU_REG_LW(x))
-static void
-dump_registers(void)
-{
- PRINT(eip);
- PRINT(eax);
- PRINT(ebx);
- PRINT(ecx);
- PRINT(edx);
- PRINT(esi);
- PRINT(edi);
- PRINT(ebp);
- fprintf(stderr,"\n");
- PRINT(esp);
- PRINT(cs);
- PRINT(ss);
- PRINT(es);
- PRINT(ds);
- PRINT(fs);
- PRINT(gs);
- PRINT_FLAGS(eflags);
- fprintf(stderr,"\n");
-}
-
-static void
-stack_trace(void)
-{
- int i;
- unsigned char *stack = SEG_ADR((unsigned char *), ss, sp);
-
- fprintf(stderr,"stack at 0x%8.8lx:\n",(unsigned long)stack);
- for (i=0; i < 0x10; i++)
- fprintf(stderr,"%2.2x ",*(stack + i));
- fprintf(stderr,"\n");
-
-}
-
-static int
-vm86_rep(struct vm86_struct *ptr)
-{
-
- int __res;
-
- __asm__ __volatile__("int $0x80\n"
- :"=a" (__res):"a" ((int)113),
- "b" ((struct vm86_struct *)ptr));
-
- if ((__res) < 0) {
- errno = -__res;
- __res=-1;
- }
- else errno = 0;
- return __res;
-}
-
-#define pushw(base, ptr, val) \
-__asm__ __volatile__( \
- "decw %w0\n\t" \
- "movb %h2,(%1,%0)\n\t" \
- "decw %w0\n\t" \
- "movb %b2,(%1,%0)" \
- : "=r" (ptr) \
- : "r" (base), "q" (val), "0" (ptr))
-
-int
-run_bios_int(int num, struct regs86 *regs)
-{
- CARD16 *ssp;
- CARD32 sp;
- CARD32 eflags;
-
-#ifdef V86BIOS_DEBUG
- static int firsttime = 1;
-#endif
- /* check if bios vector is initialized */
- if (((CARD16*)0)[(num<<1)+1] == 0x0000) { /* SYS_BIOS_SEG ?*/
-#ifdef V86BIOS_DEBUG
- i_printf("card BIOS not loaded\n");
-#endif
- return 0;
- }
-
-#ifdef V86BIOS_DEBUG
- if (firsttime) {
- dprint(0,0x3D0);
- firsttime = 0;
- }
-#endif
-
- i_printf("calling card BIOS at: ");
- ssp = (CARD16*)(CPU_REG(ss)<<4);
- sp = (CARD32) CPU_REG_LW(esp);
-
- eflags = regs->eflags;
- eflags = ((eflags & VIF_MASK) != 0)
- ? (eflags | IF_MASK) : (eflags & ~(CARD32) IF_MASK);
- pushw(ssp, sp, eflags);
- pushw(ssp, sp, regs->cs);
- pushw(ssp, sp, (CARD16)regs->eip);
- regs->esp -= 6;
- regs->cs = ((CARD16 *) 0)[(num << 1) + 1];
- regs->eip = (regs->eip & 0xFFFF0000) | ((CARD16 *) 0)[num << 1];
- i_printf("0x%x:%lx\n",regs->cs,regs->eip);
-#ifdef V86BIOS_DEBUG
- dump_code();
-#endif
- regs->eflags = regs->eflags
- & ~(VIF_MASK | TF_MASK | IF_MASK | NT_MASK);
- return 1;
-}
-
-CARD32
-getIntVect(int num)
-{
- return ((CARD32*)0)[num];
-}
-
-CARD32
-getIP(void)
-{
- return (CPU_REG(cs) << 4) + CPU_REG(eip);
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c
deleted file mode 100644
index 101c1f2..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c
+++ /dev/null
@@ -1,933 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#define DELETE
-#include <unistd.h>
-#include <fcntl.h>
-#include <stdio.h>
-#include <sys/mman.h>
-#include <sys/types.h>
-#include <string.h>
-#include <stdlib.h>
-#include <signal.h>
-#include <sys/stat.h>
-#include <readline/readline.h>
-#include <readline/history.h>
-#if defined(__alpha__) || defined (__ia64__)
-#include <sys/io.h>
-#elif defined(HAVE_SYS_PERM)
-#include <sys/perm.h>
-#endif
-#include "debug.h"
-#include "v86bios.h"
-#include "pci.h"
-#include "AsmMacros.h"
-
-#define SIZE 0x100000
-#define VRAM_START 0xA0000
-#define VRAM_SIZE 0x1FFFF
-#define V_BIOS_SIZE 0x1FFFF
-#define BIOS_START 0x7C00 /* default BIOS entry */
-#define BIOS_MEM 0x600
-
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; */
-#define VB_X(x) (V_BIOS >> x) & 0xFF
-CARD8 code[] = { 6, 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xf4 };
-/*CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, */
-/*0xcd, 0x10, 0xf4 }; */
-/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; */
-
-int ioperm_list[IOPERM_BITS] = {0,};
-
-static void sig_handler(int);
-static int map(void);
-static void unmap(void);
-static void bootBIOS(CARD16 ax);
-static int map_vram(void);
-static void unmap_vram(void);
-static int copy_vbios(memType v_base);
-static int copy_sys_bios(void);
-static void save_bios_to_file(void);
-static int setup_system_bios(void);
-static CARD32 setup_int_vect(void);
-#ifdef __ia32__
-static CARD32 setup_primary_int_vect(void);
-#endif
-static int chksum(CARD8 *start);
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax);
-static void print_regs(i86biosRegsPtr regs);
-static void print_usage(void);
-static void set_hlt(Bool set);
-static void set_ioperm(void);
-
-extern void yyparse();
-
-void loadCodeToMem(unsigned char *ptr, CARD8 *code);
-void dprint(unsigned long start, unsigned long size);
-
-static int vram_mapped = 0;
-static char* bios_var = NULL;
-static CARD8 save_msr;
-static CARD8 save_pos102;
-static CARD8 save_vse;
-static CARD8 save_46e8;
-static haltpoints hltp[20] = { {0, 0}, };
-
-console Console = {-1,-1};
-struct config Config;
-
-int main(int argc,char **argv)
-{
- int c;
-
- Config.PrintPort = PRINT_PORT;
- Config.IoStatistics = IO_STATISTICS;
- Config.PrintIrq = PRINT_IRQ;
- Config.PrintPci = PRINT_PCI;
- Config.ShowAllDev = SHOW_ALL_DEV;
- Config.PrintIp = PRINT_IP;
- Config.SaveBios = SAVE_BIOS;
- Config.Trace = TRACE;
- Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; /* boot */
- Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE; /* boot */
- Config.MapSysBios = MAP_SYS_BIOS;
- Config.Resort = RESORT; /* boot */
- Config.FixRom = FIX_ROM;
- Config.NoConsole = NO_CONSOLE;
- Config.BootOnly = FALSE;
- Config.Verbose = VERBOSE;
-
- opterr = 0;
- while ((c = getopt(argc,argv,"psicaPStAdbrfnv:?")) != EOF) {
- switch(c) {
- case 'p':
- Config.PrintPort = TRUE;
- break;
- case 's':
- Config.IoStatistics = TRUE;
- break;
- case 'i':
- Config.PrintIrq = TRUE;
- break;
- case 'c':
- Config.PrintPci = TRUE;
- break;
- case 'a':
- Config.ShowAllDev = TRUE;
- break;
- case 'P':
- Config.PrintIp = TRUE;
- break;
- case 'S':
- Config.SaveBios = TRUE;
- break;
- case 't':
- Config.Trace = TRUE;
- break;
- case 'A':
- Config.ConfigActiveOnly = TRUE;
- break;
- case 'd':
- Config.ConfigActiveDevice = TRUE;
- break;
- case 'b':
- Config.MapSysBios = TRUE;
- break;
- case 'r':
- Config.Resort = TRUE;
- break;
- case 'f':
- Config.FixRom = TRUE;
- break;
- case 'n':
- Config.NoConsole = TRUE;
- break;
- case 'v':
- Config.Verbose = strtol(optarg,NULL,0);
- break;
- case '?':
- print_usage();
- break;
- default:
- break;
- }
- }
-
-
- if (!map())
- exit(1);
-
- if (!setup_system_bios())
- exit(1);
-
- iopl(3);
-
- scan_pci();
-
- save_msr = inb(0x3CC);
- save_vse = inb(0x3C3);
- save_46e8 = inb(0x46e8);
- save_pos102 = inb(0x102);
-
- if (Config.BootOnly) {
-
- if (!CurrentPci && !Config.ConfigActiveDevice
- && !Config.ConfigActiveOnly) {
- iopl(0);
- unmap();
- exit (1);
- }
- call_boot(NULL);
- } else {
- using_history();
- yyparse();
- }
-
- unmap();
-
- pciVideoRestore();
-
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- iopl(0);
-
- close_console(Console);
-
- exit(0);
-}
-
-
-void
-call_boot(struct device *dev)
-{
- int Active_is_Pci = 0;
- CARD32 vbios_base;
-
- CurrentPci = PciList;
- Console = open_console();
-
- set_ioperm();
-
-
- signal(2,sig_handler);
- signal(11,sig_handler);
-
- /* disable primary card */
- pciVideoRestore(); /* reset PCI state to see primary card */
- outb(0x3C2,~(CARD8)0x03 & save_msr);
- outb(0x3C3,~(CARD8)0x01 & save_vse);
- outb(0x46e8, ~(CARD8)0x08 & save_46e8);
- outb(0x102, ~(CARD8)0x01 & save_pos102);
-
- pciVideoDisable();
-
- while (CurrentPci) {
- CARD16 ax;
-
- if (CurrentPci->active) {
- Active_is_Pci = 1;
- if (!Config.ConfigActiveDevice && !dev) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- } else if (Config.ConfigActiveOnly && !dev) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (dev && ((dev->type != PCI)
- || (dev->type == PCI
- && (dev->loc.pci.dev != CurrentPci->dev
- || dev->loc.pci.bus != CurrentPci->bus
- || dev->loc.pci.func != CurrentPci->func)))) {
- CurrentPci = CurrentPci->next;
- continue;
- }
-
- EnableCurrent();
-
- if (CurrentPci->active) {
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
- }
-
- /* clear interrupt vectors */
-#ifdef __ia32__
- vbios_base = CurrentPci->active ? setup_primary_int_vect()
- : setup_int_vect();
-#else
- vbios_base = setup_int_vect();
-#endif
- ax = ((CARD16)(CurrentPci->bus) << 8)
- | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7);
- if (Config.Verbose > 1) P_printf("ax: 0x%x\n",ax);
-
- BootBios = findPciByIDs(CurrentPci->bus,CurrentPci->dev,
- CurrentPci->func);
- if (!((mapPciRom(BootBios) && chksum((CARD8*)V_BIOS))
- || (CurrentPci->active && copy_vbios(vbios_base)))) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (!map_vram()) {
- CurrentPci = CurrentPci->next;
- continue;
- }
- if (Config.SaveBios) save_bios_to_file();
- printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus,
- CurrentPci->dev,CurrentPci->func);
- bootBIOS(ax);
- unmap_vram();
-
- if (CurrentPci->active)
- close_console(Console);
-
- if (dev) return;
-
- CurrentPci = CurrentPci->next;
- }
-
- /* We have an ISA device - configure if requested */
- if (!Active_is_Pci /* no isa card in system! */
- && ((!dev && (Config.ConfigActiveDevice || Config.ConfigActiveOnly))
- || (dev && dev->type == ISA))) {
-
- pciVideoDisable();
-
- if (!dev || dev->type == ISA) {
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
-#ifdef __ia32__
- vbios_base = setup_primary_int_vect();
-#else
- vbios_base = setup_int_vect();
-#endif
- if (copy_vbios(vbios_base)) {
-
- if (Config.SaveBios) save_bios_to_file();
- if (map_vram()) {
- printf("initializing ISA bus\n");
- bootBIOS(0);
- }
- }
-
- unmap_vram();
- sleep(1);
- close_console(Console);
- }
- }
-
-
-}
-
-int
-map(void)
-{
- void* mem;
- mem = mmap(0, (size_t)SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE,
- MAP_FIXED | MAP_PRIVATE | MAP_ANON,
- -1, 0 );
- if (mem != 0) {
- perror("anonymous map");
- return (0);
- }
- memset(mem,0,SIZE);
-
- return (1);
-}
-
-static void
-unmap(void)
-{
- munmap(0,SIZE);
-}
-
-static void
-bootBIOS(CARD16 ax)
-{
- i86biosRegs bRegs;
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- setup_io();
- setup_bios_regs(&bRegs, ax);
- loadCodeToMem((unsigned char *) BIOS_START, code);
- do_x86(BIOS_START,&bRegs);
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-}
-
-static int
-map_vram(void)
-{
- int mem_fd;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return 0;
- }
-
-#ifdef __alpha__
- if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */
- if (!_bus_base_sparse()) sparse_shift = 0;
- if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift),
- PROT_READ | PROT_WRITE,
- MAP_SHARED,
- mem_fd, (VRAM_START << sparse_shift)
- | _bus_base_sparse())) == (void *) -1)
-#else
- if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED,
- mem_fd, VRAM_START) == (void *) -1)
-#endif
- {
- perror("mmap error in map_hardware_ram (1)");
- close(mem_fd);
- return (0);
- }
- vram_mapped = 1;
- close(mem_fd);
- return (1);
-}
-
-static void
-unmap_vram(void)
-{
- if (!vram_mapped) return;
-
- munmap((void*)VRAM_START,VRAM_SIZE);
- vram_mapped = 0;
-}
-
-static int
-copy_vbios(memType v_base)
-{
- int mem_fd;
- unsigned char *tmp;
- int size;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) {
- fprintf(stderr,"Cannot lseek\n");
- goto Error;
- }
- tmp = (unsigned char *)malloc(3);
- if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base)
- goto Error;
-
- if (*tmp != 0x55 || *(tmp+1) != 0xAA ) {
- fprintf(stderr,"No bios found at: 0x%lx\n",v_base);
- goto Error;
- }
-#ifdef DEBUG
- dprint((unsigned long)tmp,0x100);
-#endif
- size = *(tmp+2) * 512;
-
- if (read(mem_fd, (char *)v_base, (size_t) size) != (size_t) size) {
- fprintf(stderr,"Cannot read\n");
- goto Error;
- }
- free(tmp);
- close(mem_fd);
- if (!chksum((CARD8*)v_base))
- return (0);
-
- return (1);
-
-Error:
- perror("v_bios");
- close(mem_fd);
- return (0);
-}
-
-static int
-copy_sys_bios(void)
-{
-#define SYS_BIOS 0xF0000
- int mem_fd;
-
- if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) {
- perror("opening memory");
- return (0);
- }
-
- if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS)
- goto Error;
- if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF)
- goto Error;
-
- close(mem_fd);
- return (1);
-
-Error:
- perror("sys_bios");
- close(mem_fd);
- return (0);
-}
-
-void
-loadCodeToMem(unsigned char *ptr, CARD8 code[])
-{
- int i;
- CARD8 val;
- int size = code[0];
-
- for ( i=1;i<=size;i++) {
- val = code[i];
- *ptr++ = val;
- }
- return;
-}
-
-void
-dprint(unsigned long start, unsigned long size)
-{
- int i,j;
- char *c = (char *)start;
-
- for (j = 0; j < (size >> 4); j++) {
- char *d = c;
- printf("\n0x%lx: ",(unsigned long)c);
- for (i = 0; i<16; i++)
- printf("%2.2x ",(unsigned char) (*(c++)));
- c = d;
- for (i = 0; i<16; i++) {
- printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ?
- (unsigned char) (*(c)): '.');
- c++;
- }
- }
- printf("\n");
-}
-
-static void
-save_bios_to_file(void)
-{
- static int num = 0;
- int size, count;
- char file_name[256];
- int fd;
-
- sprintf(file_name,"bios_%i.fil",num);
- if ((fd = open(file_name,O_WRONLY | O_CREAT | O_TRUNC,00644)) == -1)
- return;
- size = (*(unsigned char*)(V_BIOS + 2)) * 512;
-#ifdef V86BIOS_DEBUG
- dprint(V_BIOS,20);
-#endif
- if ((count = write(fd,(void *)(V_BIOS),size)) != size)
- fprintf(stderr,"only saved %i of %i bytes\n",size,count);
- num++;
-}
-
-static void
-sig_handler(int unused)
-{
- fflush(stdout);
- fflush(stderr);
-
- /* put system back in a save state */
- unmap_vram();
- pciVideoRestore();
- outb(0x102, save_pos102);
- outb(0x46e8, save_46e8);
- outb(0x3C3, save_vse);
- outb(0x3C2, save_msr);
-
- close_console(Console);
- iopl(0);
- unmap();
-
- exit(1);
-}
-
-/*
- * For initialization we just pass ax to the BIOS.
- * PCI BIOSes need this. All other register are set 0.
- */
-static void setup_bios_regs(i86biosRegsPtr regs, CARD32 ax)
-{
- regs->ax = ax;
- regs->bx = 0;
- regs->cx = 0;
- regs->dx = 0;
- regs->es = 0;
- regs->ds = 0x40; /* standard pc ds */
- regs->si = 0;
- regs->di = 0;
-}
-
-/*
- * here we are really paranoid about faking a "real"
- * BIOS. Most of this information was pulled from
- * dosem.
- */
-
-#ifdef __ia32__
-static CARD32
-setup_primary_int_vect(void)
-{
- int mem_fd;
- CARD32 vbase;
- void *map;
-
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
- {
- perror("opening memory");
- return (0);
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram (2)");
- close(mem_fd);
- return (0);
- }
-
- close(mem_fd);
- memcpy(0,map,BIOS_MEM);
- munmap(map,0x2000);
- /*
- * create a backup copy of the bios variables to write back the
- * modified values
- */
- if (!bios_var)
- bios_var = (char *)malloc(BIOS_MEM);
- memcpy(bios_var,0,BIOS_MEM);
-
- vbase = (*((CARD16*)(0x10 << 2) + 1)) << 4;
- if (Config.Verbose > 0) printf("vbase: 0x%x\n",vbase);
- return vbase;
-}
-#endif
-
-static CARD32
-setup_int_vect(void)
-{
- const CARD16 cs = 0x0;
- const CARD16 ip = 0x0;
- int i;
-
- /* let the int vects point to the SYS_BIOS seg */
- for (i=0; i<0x80; i++) {
- ((CARD16*)0)[i<<1] = ip;
- ((CARD16*)0)[(i<<1)+1] = cs;
- }
- /* video interrupts default location */
- ((CARD16*)0)[(0x42<<1)+1] = 0xf000;
- ((CARD16*)0)[0x42<<1] = 0xf065;
- ((CARD16*)0)[(0x10<<1)+1] = 0xf000;
- ((CARD16*)0)[0x10<<1] = 0xf065;
- /* video param table default location (int 1d) */
- ((CARD16*)0)[(0x1d<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1d<<1] = 0xf0A4;
- /* font tables default location (int 1F) */
- ((CARD16*)0)[(0x1f<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1f<<1] = 0xfa6e;
-
- /* int 11 default location */
- ((CARD16*)0)[(0x11<<1)+1] = 0xf000;
- ((CARD16*)0)[0x11<<1] = 0xf84d;
- /* int 12 default location */
- ((CARD16*)0)[(0x12<<1)+1] = 0xf000;
- ((CARD16*)0)[0x12<<1] = 0xf841;
- /* int 15 default location */
- ((CARD16*)0)[(0x15<<1)+1] = 0xf000;
- ((CARD16*)0)[0x15<<1] = 0xf859;
- /* int 1A default location */
- ((CARD16*)0)[(0x1a<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1a<<1] = 0xff6e;
- /* int 05 default location */
- ((CARD16*)0)[(0x05<<1)+1] = 0xf000;
- ((CARD16*)0)[0x05<<1] = 0xff54;
- /* int 08 default location */
- ((CARD16*)0)[(0x8<<1)+1] = 0xf000;
- ((CARD16*)0)[0x8<<1] = 0xfea5;
- /* int 13 default location (fdd) */
- ((CARD16*)0)[(0x13<<1)+1] = 0xf000;
- ((CARD16*)0)[0x13<<1] = 0xec59;
- /* int 0E default location */
- ((CARD16*)0)[(0xe<<1)+1] = 0xf000;
- ((CARD16*)0)[0xe<<1] = 0xef57;
- /* int 17 default location */
- ((CARD16*)0)[(0x17<<1)+1] = 0xf000;
- ((CARD16*)0)[0x17<<1] = 0xefd2;
- /* fdd table default location (int 1e) */
- ((CARD16*)0)[(0x1e<<1)+1] = 0xf000;
- ((CARD16*)0)[0x1e<<1] = 0xefc7;
- return V_BIOS;
-}
-
-static int
-setup_system_bios(void)
-{
- char *date = "06/01/99";
- char *eisa_ident = "PCI/ISA";
-
- if (Config.MapSysBios) {
-
- if (!copy_sys_bios()) return 0;
- return 1;
-
- } else {
-
-/* memset((void *)0xF0000,0xf4,0xfff7); */
-
- /*
- * we trap the "industry standard entry points" to the BIOS
- * and all other locations by filling them with "hlt"
- * TODO: implement hlt-handler for these
- */
- memset((void *)0xF0000,0xf4,0x10000);
-
- /*
- * TODO: we should copy the fdd table (0xfec59-0xfec5b)
- * the video parameter table (0xf0ac-0xf0fb)
- * and the font tables (0xfa6e-0xfe6d)
- * from the original bios here
- */
-
- /* set bios date */
- strcpy((char *)0xFFFF5,date);
- /* set up eisa ident string */
- strcpy((char *)0xFFFD9,eisa_ident);
- /* write system model id for IBM-AT */
- ((char *)0)[0xFFFFE] = 0xfc;
-
- return 1;
- }
-
-}
-
-static void
-update_bios_vars(void)
-{
- int mem_fd;
- void *map;
- memType i;
-
-#ifdef __ia64__
- if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0)
-#else
- if ((mem_fd = open(MEM_FILE,O_RDWR))<0)
-#endif
- {
- perror("opening memory");
- return;
- }
-
- if ((map = mmap((void *) 0, (size_t) 0x2000,
- PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED,
- mem_fd, 0)) == (void *)-1) {
- perror("mmap error in map_hardware_ram (3)");
- close(mem_fd);
- return;
- }
-
- for (i = 0; i < BIOS_MEM; i++) {
- if (bios_var[i] != *(CARD8*)i)
- *((CARD8*)map + i) = *(CARD8*)i;
- }
-
- munmap(map,0x2000);
- close(mem_fd);
-}
-
-static int
-chksum(CARD8 *start)
-{
- CARD16 size;
- CARD8 val = 0;
- int i;
-
- size = *(start+2) * 512;
- for (i = 0; i<size; i++)
- val += *(start + i);
-
- if (!val)
- return 1;
-
- fprintf(stderr,"BIOS cksum wrong!\n");
- return 0;
-}
-
-void
-runINT(int num, i86biosRegsPtr Regs)
-{
- Bool isVideo = FALSE;
- CARD8 code_int[] = { 3, 0xcd, 0x00, 0xf4 };
-
- code_int[2] = (CARD8) num;
-
- if (num == 0x10)
- isVideo = TRUE;
-
- if (!setup_system_bios())
- return;
-
- if ((isVideo && (!CurrentPci || CurrentPci->active)) || !isVideo) {
- CARD32 vbios_base;
-
-#ifdef __ia32__
- if (!(vbios_base = setup_primary_int_vect()))
-#else
- if (!(vbios_base = setup_int_vect()))
-#endif
- return;
- if (!copy_vbios(vbios_base))
- return;
- }
-
- if (!map_vram())
- return;
-
-#ifdef V86BIOS_DEBUG
- printf("starting BIOS\n");
-#endif
- loadCodeToMem((unsigned char *) BIOS_START, code_int);
- setup_io();
- print_regs(Regs);
- set_ioperm();
- set_hlt(TRUE);
- do_x86(BIOS_START,Regs);
- set_hlt(FALSE);
- print_regs(Regs);
-
-#ifdef V86BIOS_DEBUG
- printf("done\n");
-#endif
-
- if ((isVideo && (!CurrentPci || CurrentPci->active)) || !isVideo)
- update_bios_vars();
-}
-
-static void
-print_regs(i86biosRegsPtr regs)
-{
- printf("ax=%x bx=%x cx=%x dx=%x ds=%x es=%x di=%x si=%x\n",
- (CARD16)regs->ax,(CARD16)regs->bx,(CARD16)regs->cx,(CARD16)regs->dx,
- (CARD16)regs->ds,(CARD16)regs->es,(CARD16)regs->di,
- (CARD16)regs->si);
-}
-
-static void
-print_usage(void)
-{
-}
-
-void
-add_hlt(unsigned long val)
-{
- int i;
-
- if (val < BIOS_MEM || (val > VRAM_START && val < (VRAM_START + VRAM_SIZE))
- || val >= SIZE) {
- printf("address out of range\n");
- return;
- }
-
- for (i=0; i<20; i++) {
- if (hltp[i].address == 0) {
- hltp[i].address = (void*)val;
- break;
- }
- }
- if (i == 20) printf("no more hltpoints available\n");
-}
-
-void
-del_hlt(int val)
-{
- if (val == 21) { /* delete all */
- int i;
- printf("clearing all hltpoints\n");
- for (i=0; i <20; i++)
- hltp[i].address = NULL;
- } else if (val >= 0 && val <20)
- hltp[val].address = NULL;
- else printf("hltpoint %i out of range: valid range 0-19\n",val);
-}
-
-void
-list_hlt()
-{
- int i;
- for (i=0; i<20; i++)
- if (hltp[i].address)
- printf("hltpoint[%i]: 0x%lx\n",i,(unsigned long)hltp[i].address);
-}
-
-static void
-set_hlt(Bool set)
-{
- int i;
- for (i=0; i<20; i++)
- if (hltp[i].address) {
- if (set) {
- hltp[i].orgval = *(CARD8*)hltp[i].address;
- *(CARD8*)hltp[i].address = 0xf4;
- } else
- *(CARD8*)hltp[i].address = hltp[i].orgval;
- }
-}
-
-static void
-set_ioperm(void)
-{
- int i, start;
-
- ioperm(0,IOPERM_BITS,0);
-
- for (i = 0; i < IOPERM_BITS;i++)
- if (ioperm_list[i]) {
- start = i;
- for (;i < IOPERM_BITS; i++) {
- if (!ioperm_list[i]) {
- ioperm(start,i - start, 1);
- break;
- }
- }
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h
deleted file mode 100644
index a8f3f8e..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h
+++ /dev/null
@@ -1,214 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#ifndef V86_BIOS_H
-#define V86_BIOS_H
-
-#if defined (__i386__) || defined (__i486__) || defined (__i586__) || defined (__i686__) || defined (__k6__)
-# ifndef __ia32__
-# define __ia32__
-# endif
-#endif
-
-#include <stdio.h>
-
-#define p_printf(f,a...) do {if (Config.PrintPort) lprintf(f,##a);} \
- while(0)
-#define i_printf(f,a...) do {if (Config.PrintIrq) lprintf(f,##a);} \
- while(0)
-#define P_printf(f,a...) do {if (Config.PrintPci) lprintf(f,##a);} \
- while(0)
-
-typedef unsigned char CARD8;
-typedef unsigned short CARD16;
-typedef unsigned int CARD32;
-#if defined (__alpha__) || defined (__ia64__)
-typedef unsigned long memType;
-#else
-typedef unsigned int memType;
-#endif
-
-typedef int Bool;
-
-#define FALSE 0
-#define TRUE 1
-
-struct config {
- Bool PrintPort;
- Bool IoStatistics;
- Bool PrintIrq;
- Bool PrintPci;
- Bool ShowAllDev;
- Bool PrintIp;
- Bool SaveBios;
- Bool Trace;
- Bool ConfigActiveOnly;
- Bool ConfigActiveDevice;
- Bool MapSysBios;
- Bool Resort;
- Bool FixRom;
- Bool NoConsole;
- Bool BootOnly;
- int Verbose;
-};
-
-struct pio {
- CARD8 (*inb)(CARD16);
- CARD16 (*inw)(CARD16);
- CARD32 (*inl)(CARD16);
- void (*outb)(CARD16,CARD8);
- void (*outw)(CARD16,CARD16);
- void (*outl)(CARD16,CARD32);
-};
-
-struct regs86 {
- long ebx;
- long ecx;
- long edx;
- long esi;
- long edi;
- long ebp;
- long eax;
- long eip;
- long esp;
- unsigned short cs;
- unsigned short ss;
- unsigned short es;
- unsigned short ds;
- unsigned short fs;
- unsigned short gs;
- long eflags;
-};
-
-typedef struct {
- CARD32 ax;
- CARD32 bx;
- CARD32 cx;
- CARD32 dx;
- CARD32 cs;
- CARD32 es;
- CARD32 ds;
- CARD32 si;
- CARD32 di;
-} i86biosRegs, *i86biosRegsPtr;
-
-typedef struct {
- int fd;
- int vt;
-} console;
-
-typedef struct {
- void* address;
- CARD8 orgval;
-} haltpoints;
-
-enum dev_type { NONE, ISA, PCI };
-struct device {
- Bool booted;
- enum dev_type type;
- union {
- int none;
- struct pci {
- int bus;
- int dev;
- int func;
- } pci;
- } loc;
-};
-
-extern struct device Device;
-
-#ifdef __alpha__
-unsigned long _bus_base(void);
-extern void* vram_map;
-extern int sparse_shift;
-#endif
-
-extern struct pio P;
-extern struct config Config;
-#define IOPERM_BITS 1024
-extern int ioperm_list[IOPERM_BITS];
-
-extern void setup_io(void);
-extern void do_x86(unsigned long bios_start,i86biosRegsPtr regs);
-extern int run_bios_int(int num, struct regs86 *regs);
-extern CARD32 getIntVect(int num);
-CARD32 getIP(void);
-
-extern void call_boot(struct device *dev);
-extern void runINT(int num,i86biosRegsPtr Regs);
-extern void add_hlt(unsigned long addr);
-extern void del_hlt(int addr);
-extern void list_hlt();
-
-extern int port_rep_inb(CARD16 port, CARD8 *base, int d_f, CARD32 count);
-extern int port_rep_inw(CARD16 port, CARD16 *base, int d_f, CARD32 count);
-extern int port_rep_inl(CARD16 port, CARD32 *base, int d_f, CARD32 count);
-extern int port_rep_outb(CARD16 port, CARD8 *base, int d_f, CARD32 count);
-extern int port_rep_outw(CARD16 port, CARD16 *base, int d_f, CARD32 count);
-extern int port_rep_outl(CARD16 port, CARD32 *base, int d_f, CARD32 count);
-extern CARD8 p_inb(CARD16 port);
-extern CARD16 p_inw(CARD16 port);
-extern CARD32 p_inl(CARD16 port);
-extern void p_outb(CARD16 port, CARD8 val);
-extern void p_outw(CARD16 port, CARD16 val);
-extern void p_outl(CARD16 port, CARD32 val);
-#ifdef __alpha__
-extern CARD8 a_inb(CARD16 port);
-extern CARD16 a_inw(CARD16 port);
-extern void a_outb(CARD16 port, CARD8 val);
-extern void a_outw(CARD16 port, CARD16 val);
-#endif
-#ifdef __alpha__
-CARD8 mem_rb(CARD32 addr);
-CARD16 mem_rw(CARD32 addr);
-CARD32 mem_rl(CARD32 addr);
-void mem_wb(CARD32 addr, CARD8 val);
-void mem_ww(CARD32 addr, CARD16 val);
-void mem_wl(CARD32 addr, CARD32 val);
-#endif
-extern void io_statistics(void);
-extern void clear_stat(void);
-extern int int_handler(int num, struct regs86 *regs);
-
-extern console open_console(void);
-extern void close_console(console);
-
-extern void dprint(unsigned long start, unsigned long size);
-
-extern Bool logging;
-extern Bool nostdout;
-extern char* logfile;
-extern void logon(void* ptr);
-extern void logoff();
-extern void lprintf(const char *f, ...);
-
-#define MEM_FILE "/dev/mem"
-#define DEFAULT_V_BIOS 0xc0000
-#ifndef V_BIOS
-#define V_BIOS DEFAULT_V_BIOS
-#endif
-
-#ifdef __alpha__
-#define NEED_PCI_IO
-#endif
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/working_cards b/board/MAI/bios_emulator/scitech/src/v86bios/working_cards
deleted file mode 100644
index 7753f24..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/working_cards
+++ /dev/null
@@ -1,7 +0,0 @@
-David Monro: Trident TGUI 9440
- Virge/VX (Diamond Stealth 3D 3400)
- Riva TNT (Diamond Viper V550) no vbios?
-Jarno Paananen <jpaana@s2.org>: Guillemot Maxigamer Xentor 32
- (NVIDIA TNT2 Ultra)
- Creative Graphics Blaster Exxtreme
- (Permedia 2)
diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c b/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c
deleted file mode 100644
index b5c99d7..0000000
--- a/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/*
- * Copyright 1999 Egbert Eich
- *
- * Permission to use, copy, modify, distribute, and sell this software and its
- * documentation for any purpose is hereby granted without fee, provided that
- * the above copyright notice appear in all copies and that both that
- * copyright notice and this permission notice appear in supporting
- * documentation, and that the name of the authors not be used in
- * advertising or publicity pertaining to distribution of the software without
- * specific, written prior permission. The authors makes no representations
- * about the suitability of this software for any purpose. It is provided
- * "as is" without express or implied warranty.
- *
- * THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
- * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
- * EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
- * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
- * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
- * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
- * PERFORMANCE OF THIS SOFTWARE.
- */
-#include "debug.h"
-
-#define IF_MASK 0x00000200
-#define VIF_MASK 0x00080000 /* virtual interrupt flag */
-#define VIP_MASK 0x00100000 /* virtual interrupt pending */
-
-#include </usr/include/unistd.h>
-#include <errno.h>
-#include <asm/unistd.h>
-/*#include <syscall-list.h> */
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#ifdef __alpha__
-#include <sys/io.h>
-#endif
-#include <signal.h>
-#include <setjmp.h>
-#include "AsmMacros.h"
-#include "v86bios.h"
-# define DEBUG
-#include "x86emu.h"
-#undef DEBUG
-
-#define M _X86EMU_env
-#define CPU_REG(reg) M.x86.R_##reg
-
-struct pio P;
-
-void
-setup_io(void)
-{
- if (!Config.PrintPort && !Config.IoStatistics) {
-
-#if defined (__i386__)
- P.inb = (u8(*)(u16))inb;
- P.inw = (u16(*)(u16))inw;
- P.outb = (void(*)(u16,u8))outb;
- P.outw = (void(*)(u16,u16))outw;
-#else
- P.inb = p_inb;
- P.inw = p_inw;
- P.outb = p_outb;
- P.outw = p_outw;
-#endif
-#if defined (__i386__) && ! defined(NEED_PCI_IO)
- P.inl = (u32(*)(u16))inl;
- P.outl = (void(*)(u16,u32))outl;
-#else
- P.inl = p_inl;
- P.outl = p_outl;
-#endif
- } else {
- P.inb = p_inb;
- P.inw = p_inw;
- P.inl = p_inl;
- P.outb = p_outb;
- P.outw = p_outw;
- P.outl = p_outl;
- }
-}
-
-void
-x86emu_do_int(int num)
-{
- struct regs86 regs;
-
- i_printf("int 0x%x received: ax:0x%x",num,CPU_REG(AX));
- if (Config.PrintIp)
- i_printf(" at: 0x%x\n",getIP());
- else
- i_printf("\n");
-
- /* try to run bios interrupt */
-
- /* if not installed fall back */
-#define COPY(x,y) regs.y = M.x86.x
-#define COPY_R(x,y) M.x86.x = regs.y
-
- COPY(R_EAX,eax);
- COPY(R_EBX,ebx);
- COPY(R_ECX,ecx);
- COPY(R_EDX,edx);
- COPY(R_ESI,esi);
- COPY(R_EDI,edi);
- COPY(R_EBP,ebp);
- COPY(R_EIP,eip);
- COPY(R_ESP,esp);
- COPY(R_CS,cs);
- COPY(R_SS,ss);
- COPY(R_DS,ds);
- COPY(R_ES,es);
- COPY(R_FS,fs);
- COPY(R_GS,gs);
- COPY(R_EFLG,eflags);
-
- if (!(int_handler(num,®s))) {
- if (!run_bios_int(num,®s))
- goto unknown_int;
- else
- return;
- }
-
- COPY_R(R_EAX,eax);
- COPY_R(R_EBX,ebx);
- COPY_R(R_ECX,ecx);
- COPY_R(R_EDX,edx);
- COPY_R(R_ESI,esi);
- COPY_R(R_EDI,edi);
- COPY_R(R_EBP,ebp);
- COPY_R(R_EIP,eip);
- COPY_R(R_ESP,esp);
- COPY_R(R_CS,cs);
- COPY_R(R_SS,ss);
- COPY_R(R_DS,ds);
- COPY_R(R_ES,es);
- COPY_R(R_FS,fs);
- COPY_R(R_GS,gs);
- COPY_R(R_EFLG,eflags);
- return;
-
- unknown_int:
- fprintf(stderr,"\nUnknown vm86_int: %X\n\n",num);
- X86EMU_halt_sys();
- return;
-
-#undef COPY
-#undef COPY_R
-}
-
-void
-setup_x86emu(unsigned long bios_start, i86biosRegsPtr regs)
-{
- int i;
- CARD32 eip;
- CARD16 cs;
- X86EMU_intrFuncs intFuncs[256];
-
- X86EMU_pioFuncs pioFuncs = {
- (u8(*)(u16))P.inb,
- (u16(*)(u16))P.inw,
- (u32(*)(u16))P.inl,
- (void(*)(u16,u8))P.outb,
- (void(*)(u16,u16))P.outw,
- (void(*)(u16,u32))P.outl
- };
-#ifdef __alpha__
- X86EMU_memFuncs memFuncs = {
- (u8(*)(u32))mem_rb,
- (u16(*)(u32))mem_rw,
- (u32(*)(u32))mem_rl,
- (void(*)(u32,u8))mem_wb,
- (void(*)(u32,u16))mem_ww,
- (void(*)(u32,u32))mem_wl
- };
-#endif
- M.mem_base = 0;
- M.mem_size = 1024*1024 + 1024;
- /* M.x86.debug = DEBUG_DISASSEMBLE_F | DEBUG_TRACE_F | DEBUG_DECODE_F; */
- /* M.x86.debug |= DEBUG_DECODE_F | DEBUG_TRACE_F; */
-/*
- * For single step tracing compile x86emu with option -DDEBUG
- */
- M.x86.debug = 0;
- if (Config.PrintIp)
- M.x86.debug = DEBUG_SAVE_CS_IP;
-
- if (Config.Trace)
- X86EMU_trace_on();
-
- X86EMU_setupPioFuncs(&pioFuncs);
-#ifdef __alpha__
- X86EMU_setupMemFuncs(&memFuncs);
-#endif
- for (i=0;i<256;i++)
- intFuncs[i] = x86emu_do_int;
- X86EMU_setupIntrFuncs(intFuncs);
-
- eip = bios_start & 0xFFFF;
- cs = (bios_start & 0xFF0000) >> 4;
-
- CPU_REG(EAX) = regs->ax;
- CPU_REG(EBX) = regs->bx;
- CPU_REG(ECX) = regs->cx;
- CPU_REG(EDX) = regs->dx;
- CPU_REG(ESI) = regs->si;
- CPU_REG(EDI) = regs->di;
- CPU_REG(EBP) = 0;
- CPU_REG(EIP) = eip;
- CPU_REG(CS) = cs;
- CPU_REG(SP) = 0x100;
- CPU_REG(SS) = 0x30; /* This is the standard pc bios stack */
- CPU_REG(ES) = regs->es;
- CPU_REG(DS) = regs->ds;
- CPU_REG(FS) = 0;
- CPU_REG(GS) = 0;
- CPU_REG(EFLG) |= (VIF_MASK | VIP_MASK | IF_MASK | 0x2);
-}
-
-void
-collect_bios_regs(i86biosRegsPtr regs)
-{
- regs->ax = CPU_REG(EAX);
- regs->bx = CPU_REG(EBX);
- regs->cx = CPU_REG(ECX);
- regs->dx = CPU_REG(EDX);
- regs->es = CPU_REG(ES);
- regs->ds = CPU_REG(DS);
- regs->di = CPU_REG(EDI);
- regs->si = CPU_REG(ESI);
-}
-
-static void
-do_x86emu(void)
-{
- X86EMU_exec();
-}
-
-static jmp_buf x86_esc;
-static void
-vmexit(int unused)
-{
- longjmp(x86_esc,1);
-}
-
-void
-do_x86(unsigned long bios_start, i86biosRegsPtr regs)
-{
- static void (*org_handler)(int);
-
- setup_x86emu(bios_start,regs);
- if (setjmp(x86_esc) == 0) {
- org_handler = signal(2,vmexit);
- do_x86emu();
- signal(2,org_handler);
- collect_bios_regs(regs);
- } else {
- signal(2,org_handler);
- printf("interrupted at 0x%x\n",((CARD16)CPU_REG(CS)) << 4
- | (CARD16)CPU_REG(EIP));
- }
-}
-
-int
-run_bios_int(int num, struct regs86 *regs)
-{
-#ifdef V86BIOS_DEBUG
- static int firsttime = 1;
-#endif
- /* check if bios vector is initialized */
- if (((CARD16*)0)[(num<<1)+1] == 0x0000) { /* SYS_BIOS_SEG ?*/
-#ifdef V86BIOS_DEBUG
- i_printf("card BIOS not loaded\n");
-#endif
- return 0;
- }
-
-#ifdef V86BIOS_DEBUG
- if (firsttime) {
- dprint(0,0x3D0);
- firsttime = 0;
- }
-#endif
-
- i_printf("calling card BIOS at: ");
- i_printf("0x%x:%x\n",((CARD16 *) 0)[(num << 1) + 1],
- (CARD32)((CARD16 *) 0)[num << 1]);
- X86EMU_prepareForInt(num);
-
- return 1;
-}
-
-CARD32
-getIntVect(int num)
-{
- return ((CARD32*)0)[num];
-}
-#if 0
-void
-printk(const char *fmt, ...)
-{
- va_list argptr;
- va_start(argptr, fmt);
- vfprintf(stdout, fmt, argptr);
- fflush(stdout);
- va_end(argptr);
-}
-#endif
-
-CARD32
-getIP(void)
-{
- return (M.x86.saved_cs << 4) + M.x86.saved_ip;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/LICENSE b/board/MAI/bios_emulator/scitech/src/x86emu/LICENSE
deleted file mode 100644
index a3ede4a..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/LICENSE
+++ /dev/null
@@ -1,17 +0,0 @@
- License information
- -------------------
-
-The x86emu library is under a BSD style license, comaptible
-with the XFree86 and X licenses used by XFree86. The
-original x86emu libraries were under the GNU General Public
-License. Due to license incompatibilities between the GPL
-and the XFree86 license, the original authors of the code
-decided to allow a license change. If you have submitted
-code to the original x86emu project, and you don't agree
-with the license change, please contact us and let you
-know. Your code will be removed to comply with your wishes.
-
-If you have any questions about this, please send email to
-x86emu@linuxlabs.com or KendallB@scitechsoft.com for
-clarification.
-
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/debug.c b/board/MAI/bios_emulator/scitech/src/x86emu/debug.c
deleted file mode 100644
index 235e6ac..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/debug.c
+++ /dev/null
@@ -1,443 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file contains the code to handle debugging of the
-* emulator.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-#include <stdarg.h>
-#include <stdlib.h>
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifdef DEBUG
-
-static void print_encoded_bytes (u16 s, u16 o);
-static void print_decoded_instruction (void);
-static int parse_line (char *s, int *ps, int *n);
-
-/* should look something like debug's output. */
-void X86EMU_trace_regs (void)
-{
- if (DEBUG_TRACE()) {
- x86emu_dump_regs();
- }
- if (DEBUG_DECODE() && ! DEBUG_DECODE_NOPRINT()) {
- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
- print_decoded_instruction();
- }
-}
-
-void X86EMU_trace_xregs (void)
-{
- if (DEBUG_TRACE()) {
- x86emu_dump_xregs();
- }
-}
-
-void x86emu_just_disassemble (void)
-{
- /*
- * This routine called if the flag DEBUG_DISASSEMBLE is set kind
- * of a hack!
- */
- printk("%04x:%04x ",M.x86.saved_cs, M.x86.saved_ip);
- print_encoded_bytes( M.x86.saved_cs, M.x86.saved_ip);
- print_decoded_instruction();
-}
-
-static void disassemble_forward (u16 seg, u16 off, int n)
-{
- X86EMU_sysEnv tregs;
- int i;
- u8 op1;
- /*
- * hack, hack, hack. What we do is use the exact machinery set up
- * for execution, except that now there is an additional state
- * flag associated with the "execution", and we are using a copy
- * of the register struct. All the major opcodes, once fully
- * decoded, have the following two steps: TRACE_REGS(r,m);
- * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
- * the preprocessor. The TRACE_REGS macro expands to:
- *
- * if (debug&DEBUG_DISASSEMBLE)
- * {just_disassemble(); goto EndOfInstruction;}
- * if (debug&DEBUG_TRACE) trace_regs(r,m);
- *
- * ...... and at the last line of the routine.
- *
- * EndOfInstruction: end_instr();
- *
- * Up to the point where TRACE_REG is expanded, NO modifications
- * are done to any register EXCEPT the IP register, for fetch and
- * decoding purposes.
- *
- * This was done for an entirely different reason, but makes a
- * nice way to get the system to help debug codes.
- */
- tregs = M;
- tregs.x86.R_IP = off;
- tregs.x86.R_CS = seg;
-
- /* reset the decoding buffers */
- tregs.x86.enc_str_pos = 0;
- tregs.x86.enc_pos = 0;
-
- /* turn on the "disassemble only, no execute" flag */
- tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
-
- /* DUMP NEXT n instructions to screen in straight_line fashion */
- /*
- * This looks like the regular instruction fetch stream, except
- * that when this occurs, each fetched opcode, upon seeing the
- * DEBUG_DISASSEMBLE flag set, exits immediately after decoding
- * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
- * Note the use of a copy of the register structure...
- */
- for (i=0; i<n; i++) {
- op1 = (*sys_rdb)(((u32)M.x86.R_CS<<4) + (M.x86.R_IP++));
- (x86emu_optab[op1])(op1);
- }
- /* end major hack mode. */
-}
-
-void x86emu_check_ip_access (void)
-{
- /* NULL as of now */
-}
-
-void x86emu_check_sp_access (void)
-{
-}
-
-void x86emu_check_mem_access (u32 dummy)
-{
- /* check bounds, etc */
-}
-
-void x86emu_check_data_access (uint dummy1, uint dummy2)
-{
- /* check bounds, etc */
-}
-
-void x86emu_inc_decoded_inst_len (int x)
-{
- M.x86.enc_pos += x;
-}
-
-void x86emu_decode_printf (char *x)
-{
- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",x);
- M.x86.enc_str_pos += strlen(x);
-}
-
-void x86emu_decode_printf2 (char *x, int y)
-{
- char temp[100];
- sprintf(temp,x,y);
- sprintf(M.x86.decoded_buf+M.x86.enc_str_pos,"%s",temp);
- M.x86.enc_str_pos += strlen(temp);
-}
-
-void x86emu_end_instr (void)
-{
- M.x86.enc_str_pos = 0;
- M.x86.enc_pos = 0;
-}
-
-static void print_encoded_bytes (u16 s, u16 o)
-{
- int i;
- char buf1[64];
- for (i=0; i< M.x86.enc_pos; i++) {
- sprintf(buf1+2*i,"%02x", fetch_data_byte_abs(s,o+i));
- }
- printk("%-20s",buf1);
-}
-
-static void print_decoded_instruction (void)
-{
- printk("%s", M.x86.decoded_buf);
-}
-
-void x86emu_print_int_vect (u16 iv)
-{
- u16 seg,off;
-
- if (iv > 256) return;
- seg = fetch_data_word_abs(0,iv*4);
- off = fetch_data_word_abs(0,iv*4+2);
- printk("%04x:%04x ", seg, off);
-}
-
-void X86EMU_dump_memory (u16 seg, u16 off, u32 amt)
-{
- u32 start = off & 0xfffffff0;
- u32 end = (off+16) & 0xfffffff0;
- u32 i;
- u32 current;
-
- current = start;
- while (end <= off + amt) {
- printk("%04x:%04x ", seg, start);
- for (i=start; i< off; i++)
- printk(" ");
- for ( ; i< end; i++)
- printk("%02x ", fetch_data_byte_abs(seg,i));
- printk("\n");
- start = end;
- end = start + 16;
- }
-}
-
-void x86emu_single_step (void)
-{
- char s[1024];
- int ps[10];
- int ntok;
- int cmd;
- int done;
- int segment;
- int offset;
- static int breakpoint;
- static int noDecode = 1;
-
- char *p;
-
- if (DEBUG_BREAK()) {
- if (M.x86.saved_ip != breakpoint) {
- return;
- } else {
- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
- M.x86.debug |= DEBUG_TRACE_F;
- M.x86.debug &= ~DEBUG_BREAK_F;
- print_decoded_instruction ();
- X86EMU_trace_regs();
- }
- }
-
- done=0;
- offset = M.x86.saved_ip;
- while (!done) {
- printk("-");
- /*p = fgets(s, 1023, stdin); */
- cons_gets(s);
- cmd = parse_line(s, ps, &ntok);
- switch(cmd) {
- case 'u':
- disassemble_forward(M.x86.saved_cs,(u16)offset,10);
- break;
- case 'd':
- if (ntok == 2) {
- segment = M.x86.saved_cs;
- offset = ps[1];
- X86EMU_dump_memory(segment,(u16)offset,16);
- offset += 16;
- } else if (ntok == 3) {
- segment = ps[1];
- offset = ps[2];
- X86EMU_dump_memory(segment,(u16)offset,16);
- offset += 16;
- } else {
- segment = M.x86.saved_cs;
- X86EMU_dump_memory(segment,(u16)offset,16);
- offset += 16;
- }
- break;
- case 'c':
- M.x86.debug ^= DEBUG_TRACECALL_F;
- break;
- case 's':
- M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
- break;
- case 'r':
- X86EMU_trace_regs();
- break;
- case 'x':
- X86EMU_trace_xregs();
- break;
- case 'g':
- if (ntok == 2) {
- breakpoint = ps[1];
- printk("breakpoint set to 0x%X\n", breakpoint);
- if (noDecode) {
- M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
- } else {
- M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
- }
- M.x86.debug &= ~DEBUG_TRACE_F;
- M.x86.debug |= DEBUG_BREAK_F;
- done = 1;
- }
- break;
- case 'q':
- M.x86.debug |= DEBUG_EXIT;
- return;
- case 'P':
- noDecode = (noDecode)?0:1;
- printk("Toggled decoding to %s\n",(noDecode)?"FALSE":"TRUE");
- break;
- case 't':
- case 0:
- done = 1;
- break;
- }
- }
-}
-
-int X86EMU_trace_on(void)
-{
- return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
-}
-
-int X86EMU_trace_off(void)
-{
- return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
-}
-
-static int parse_line (char *s, int *ps, int *n)
-{
- int cmd;
-
- *n = 0;
- while(*s == ' ' || *s == '\t') s++;
- ps[*n] = *s;
- switch (*s) {
- case '\n':
- *n += 1;
- return 0;
- default:
- cmd = *s;
- *n += 1;
- }
-
- while (1) {
- while (*s != ' ' && *s != '\t' && *s != '\n') s++;
-
- if (*s == '\n')
- return cmd;
-
- while(*s == ' ' || *s == '\t') s++;
-
- ps[*n]=atoi(s);
- /*sscanf(s,"%x",&ps[*n]); */
- *n += 1;
- }
-}
-
-#endif /* DEBUG */
-
-void x86emu_dump_stack(void)
-{
- int i;
- printk("Stack: ");
- for (i = 0; i<16; i++)
- {
- u8 x = fetch_data_byte_abs(M.x86.R_SS, M.x86.R_SP + i);
- printk("%02x ", (int)x);
- }
- printk("\n");
-}
-
-void x86emu_dump_regs (void)
-{
- printk("\tAX=%04x ", M.x86.R_AX );
- printk("BX=%04x ", M.x86.R_BX );
- printk("CX=%04x ", M.x86.R_CX );
- printk("DX=%04x ", M.x86.R_DX );
- printk("SP=%04x ", M.x86.R_SP );
- printk("BP=%04x ", M.x86.R_BP );
- printk("SI=%04x ", M.x86.R_SI );
- printk("DI=%04x\n", M.x86.R_DI );
- printk("\tDS=%04x ", M.x86.R_DS );
- printk("ES=%04x ", M.x86.R_ES );
- printk("SS=%04x ", M.x86.R_SS );
- printk("CS=%04x ", M.x86.R_CS );
- printk("IP=%04x ", M.x86.R_IP );
- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */
- else printk("NV ");
- if (ACCESS_FLAG(F_DF)) printk("DN ");
- else printk("UP ");
- if (ACCESS_FLAG(F_IF)) printk("EI ");
- else printk("DI ");
- if (ACCESS_FLAG(F_SF)) printk("NG ");
- else printk("PL ");
- if (ACCESS_FLAG(F_ZF)) printk("ZR ");
- else printk("NZ ");
- if (ACCESS_FLAG(F_AF)) printk("AC ");
- else printk("NA ");
- if (ACCESS_FLAG(F_PF)) printk("PE ");
- else printk("PO ");
- if (ACCESS_FLAG(F_CF)) printk("CY ");
- else printk("NC ");
- printk("\n");
- /*x86emu_dump_stack(); */
-}
-
-void x86emu_dump_xregs (void)
-{
- printk("\tEAX=%08x ", M.x86.R_EAX );
- printk("EBX=%08x ", M.x86.R_EBX );
- printk("ECX=%08x ", M.x86.R_ECX );
- printk("EDX=%08x \n", M.x86.R_EDX );
- printk("\tESP=%08x ", M.x86.R_ESP );
- printk("EBP=%08x ", M.x86.R_EBP );
- printk("ESI=%08x ", M.x86.R_ESI );
- printk("EDI=%08x\n", M.x86.R_EDI );
- printk("\tDS=%04x ", M.x86.R_DS );
- printk("ES=%04x ", M.x86.R_ES );
- printk("SS=%04x ", M.x86.R_SS );
- printk("CS=%04x ", M.x86.R_CS );
- printk("EIP=%08x\n\t", M.x86.R_EIP );
- if (ACCESS_FLAG(F_OF)) printk("OV "); /* CHECKED... */
- else printk("NV ");
- if (ACCESS_FLAG(F_DF)) printk("DN ");
- else printk("UP ");
- if (ACCESS_FLAG(F_IF)) printk("EI ");
- else printk("DI ");
- if (ACCESS_FLAG(F_SF)) printk("NG ");
- else printk("PL ");
- if (ACCESS_FLAG(F_ZF)) printk("ZR ");
- else printk("NZ ");
- if (ACCESS_FLAG(F_AF)) printk("AC ");
- else printk("NA ");
- if (ACCESS_FLAG(F_PF)) printk("PE ");
- else printk("PO ");
- if (ACCESS_FLAG(F_CF)) printk("CY ");
- else printk("NC ");
- printk("\n");
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/decode.c b/board/MAI/bios_emulator/scitech/src/x86emu/decode.c
deleted file mode 100644
index 832b1f5..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/decode.c
+++ /dev/null
@@ -1,970 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines which are related to
-* instruction decoding and accessess of immediate data via IP. etc.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-REMARKS:
-Handles any pending asychronous interrupts.
-****************************************************************************/
-static void x86emu_intr_handle(void)
-{
- u8 intno;
-
- if (M.x86.intr & INTR_SYNCH) {
- intno = M.x86.intno;
- if (_X86EMU_intrTab[intno]) {
- (*_X86EMU_intrTab[intno])(intno);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(intno * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(intno * 4);
- M.x86.intr = 0;
- }
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-intrnum - Interrupt number to raise
-
-REMARKS:
-Raise the specified interrupt to be handled before the execution of the
-next instruction.
-****************************************************************************/
-void x86emu_intr_raise(
- u8 intrnum)
-{
- M.x86.intno = intrnum;
- M.x86.intr |= INTR_SYNCH;
-}
-
-/****************************************************************************
-REMARKS:
-Main execution loop for the emulator. We return from here when the system
-halts, which is normally caused by a stack fault when we return from the
-original real mode call.
-****************************************************************************/
-void X86EMU_exec(void)
-{
- u8 op1;
-
- M.x86.intr = 0;
- DB(x86emu_end_instr();)
-
- for (;;) {
- DB(if (CHECK_IP_FETCH()) x86emu_check_ip_access();)
- /* If debugging, save the IP and CS values. */
- SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
- INC_DECODED_INST_LEN(1);
- if (M.x86.intr) {
- if (M.x86.intr & INTR_HALTED) {
- DB( printk("halted\n"); X86EMU_trace_regs();)
- return;
- }
- if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
- !ACCESS_FLAG(F_IF)) {
- x86emu_intr_handle();
- }
- }
- op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- (*x86emu_optab[op1])(op1);
- if (M.x86.debug & DEBUG_EXIT) {
- M.x86.debug &= ~DEBUG_EXIT;
- return;
- }
- }
-}
-
-/****************************************************************************
-REMARKS:
-Halts the system by setting the halted system flag.
-****************************************************************************/
-void X86EMU_halt_sys(void)
-{
- M.x86.intr |= INTR_HALTED;
-}
-
-/****************************************************************************
-PARAMETERS:
-mod - Mod value from decoded byte
-regh - Reg h value from decoded byte
-regl - Reg l value from decoded byte
-
-REMARKS:
-Raise the specified interrupt to be handled before the execution of the
-next instruction.
-
-NOTE: Do not inline this function, as (*sys_rdb) is already inline!
-****************************************************************************/
-void fetch_decode_modrm(
- int *mod,
- int *regh,
- int *regl)
-{
- int fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- INC_DECODED_INST_LEN(1);
- *mod = (fetched >> 6) & 0x03;
- *regh = (fetched >> 3) & 0x07;
- *regl = (fetched >> 0) & 0x07;
-}
-
-/****************************************************************************
-RETURNS:
-Immediate byte value read from instruction queue
-
-REMARKS:
-This function returns the immediate byte from the instruction queue, and
-moves the instruction pointer to the next value.
-
-NOTE: Do not inline this function, as (*sys_rdb) is already inline!
-****************************************************************************/
-u8 fetch_byte_imm(void)
-{
- u8 fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- INC_DECODED_INST_LEN(1);
- return fetched;
-}
-
-/****************************************************************************
-RETURNS:
-Immediate word value read from instruction queue
-
-REMARKS:
-This function returns the immediate byte from the instruction queue, and
-moves the instruction pointer to the next value.
-
-NOTE: Do not inline this function, as (*sys_rdw) is already inline!
-****************************************************************************/
-u16 fetch_word_imm(void)
-{
- u16 fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
- M.x86.R_IP += 2;
- INC_DECODED_INST_LEN(2);
- return fetched;
-}
-
-/****************************************************************************
-RETURNS:
-Immediate lone value read from instruction queue
-
-REMARKS:
-This function returns the immediate byte from the instruction queue, and
-moves the instruction pointer to the next value.
-
-NOTE: Do not inline this function, as (*sys_rdw) is already inline!
-****************************************************************************/
-u32 fetch_long_imm(void)
-{
- u32 fetched;
-
-DB( if (CHECK_IP_FETCH())
- x86emu_check_ip_access();)
- fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
- M.x86.R_IP += 4;
- INC_DECODED_INST_LEN(4);
- return fetched;
-}
-
-/****************************************************************************
-RETURNS:
-Value of the default data segment
-
-REMARKS:
-Inline function that returns the default data segment for the current
-instruction.
-
-On the x86 processor, the default segment is not always DS if there is
-no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to
-addresses relative to SS (ie: on the stack). So, at the minimum, all
-decodings of addressing modes would have to set/clear a bit describing
-whether the access is relative to DS or SS. That is the function of the
-cpu-state-varible M.x86.mode. There are several potential states:
-
- repe prefix seen (handled elsewhere)
- repne prefix seen (ditto)
-
- cs segment override
- ds segment override
- es segment override
- fs segment override
- gs segment override
- ss segment override
-
- ds/ss select (in absense of override)
-
-Each of the above 7 items are handled with a bit in the mode field.
-****************************************************************************/
-_INLINE u32 get_data_segment(void)
-{
-#define GET_SEGMENT(segment)
- switch (M.x86.mode & SYSMODE_SEGMASK) {
- case 0: /* default case: use ds register */
- case SYSMODE_SEGOVR_DS:
- case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
- return M.x86.R_DS;
- case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */
- return M.x86.R_SS;
- case SYSMODE_SEGOVR_CS:
- case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
- return M.x86.R_CS;
- case SYSMODE_SEGOVR_ES:
- case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
- return M.x86.R_ES;
- case SYSMODE_SEGOVR_FS:
- case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
- return M.x86.R_FS;
- case SYSMODE_SEGOVR_GS:
- case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
- return M.x86.R_GS;
- case SYSMODE_SEGOVR_SS:
- case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
- return M.x86.R_SS;
- default:
-#ifdef DEBUG
- printk("error: should not happen: multiple overrides.\n");
-#endif
- HALT_SYS();
- return 0;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to load data from
-
-RETURNS:
-Byte value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u8 fetch_data_byte(
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- return (*sys_rdb)((get_data_segment() << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to load data from
-
-RETURNS:
-Word value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u16 fetch_data_word(
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- return (*sys_rdw)((get_data_segment() << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to load data from
-
-RETURNS:
-Long value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u32 fetch_data_long(
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- return (*sys_rdl)((get_data_segment() << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to load data from
-offset - Offset to load data from
-
-RETURNS:
-Byte value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u8 fetch_data_byte_abs(
- uint segment,
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- return (*sys_rdb)(((u32)segment << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to load data from
-offset - Offset to load data from
-
-RETURNS:
-Word value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u16 fetch_data_word_abs(
- uint segment,
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- return (*sys_rdw)(((u32)segment << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to load data from
-offset - Offset to load data from
-
-RETURNS:
-Long value read from the absolute memory location.
-
-NOTE: Do not inline this function as (*sys_rdX) is already inline!
-****************************************************************************/
-u32 fetch_data_long_abs(
- uint segment,
- uint offset)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- return (*sys_rdl)(((u32)segment << 4) + offset);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a word value to an segmented memory location. The segment used is
-the current 'default' segment, which may have been overridden.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_byte(
- uint offset,
- u8 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- (*sys_wrb)((get_data_segment() << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a word value to an segmented memory location. The segment used is
-the current 'default' segment, which may have been overridden.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_word(
- uint offset,
- u16 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- (*sys_wrw)((get_data_segment() << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a long value to an segmented memory location. The segment used is
-the current 'default' segment, which may have been overridden.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_long(
- uint offset,
- u32 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access((u16)get_data_segment(), offset);
-#endif
- (*sys_wrl)((get_data_segment() << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to store data at
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a byte value to an absolute memory location.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_byte_abs(
- uint segment,
- uint offset,
- u8 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- (*sys_wrb)(((u32)segment << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to store data at
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a word value to an absolute memory location.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_word_abs(
- uint segment,
- uint offset,
- u16 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- (*sys_wrw)(((u32)segment << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-segment - Segment to store data at
-offset - Offset to store data at
-val - Value to store
-
-REMARKS:
-Writes a long value to an absolute memory location.
-
-NOTE: Do not inline this function as (*sys_wrX) is already inline!
-****************************************************************************/
-void store_data_long_abs(
- uint segment,
- uint offset,
- u32 val)
-{
-#ifdef DEBUG
- if (CHECK_DATA_ACCESS())
- x86emu_check_data_access(segment, offset);
-#endif
- (*sys_wrl)(((u32)segment << 4) + offset, val);
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for byte operands. Also enables the decoding of instructions.
-****************************************************************************/
-u8* decode_rm_byte_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("AL");
- return &M.x86.R_AL;
- case 1:
- DECODE_PRINTF("CL");
- return &M.x86.R_CL;
- case 2:
- DECODE_PRINTF("DL");
- return &M.x86.R_DL;
- case 3:
- DECODE_PRINTF("BL");
- return &M.x86.R_BL;
- case 4:
- DECODE_PRINTF("AH");
- return &M.x86.R_AH;
- case 5:
- DECODE_PRINTF("CH");
- return &M.x86.R_CH;
- case 6:
- DECODE_PRINTF("DH");
- return &M.x86.R_DH;
- case 7:
- DECODE_PRINTF("BH");
- return &M.x86.R_BH;
- }
- HALT_SYS();
- return NULL; /* NOT REACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for word operands. Also enables the decoding of instructions.
-****************************************************************************/
-u16* decode_rm_word_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("AX");
- return &M.x86.R_AX;
- case 1:
- DECODE_PRINTF("CX");
- return &M.x86.R_CX;
- case 2:
- DECODE_PRINTF("DX");
- return &M.x86.R_DX;
- case 3:
- DECODE_PRINTF("BX");
- return &M.x86.R_BX;
- case 4:
- DECODE_PRINTF("SP");
- return &M.x86.R_SP;
- case 5:
- DECODE_PRINTF("BP");
- return &M.x86.R_BP;
- case 6:
- DECODE_PRINTF("SI");
- return &M.x86.R_SI;
- case 7:
- DECODE_PRINTF("DI");
- return &M.x86.R_DI;
- }
- HALT_SYS();
- return NULL; /* NOTREACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for dword operands. Also enables the decoding of instructions.
-****************************************************************************/
-u32* decode_rm_long_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("EAX");
- return &M.x86.R_EAX;
- case 1:
- DECODE_PRINTF("ECX");
- return &M.x86.R_ECX;
- case 2:
- DECODE_PRINTF("EDX");
- return &M.x86.R_EDX;
- case 3:
- DECODE_PRINTF("EBX");
- return &M.x86.R_EBX;
- case 4:
- DECODE_PRINTF("ESP");
- return &M.x86.R_ESP;
- case 5:
- DECODE_PRINTF("EBP");
- return &M.x86.R_EBP;
- case 6:
- DECODE_PRINTF("ESI");
- return &M.x86.R_ESI;
- case 7:
- DECODE_PRINTF("EDI");
- return &M.x86.R_EDI;
- }
- HALT_SYS();
- return NULL; /* NOTREACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-reg - Register to decode
-
-RETURNS:
-Pointer to the appropriate register
-
-REMARKS:
-Return a pointer to the register given by the R/RM field of the
-modrm byte, for word operands, modified from above for the weirdo
-special case of segreg operands. Also enables the decoding of instructions.
-****************************************************************************/
-u16* decode_rm_seg_register(
- int reg)
-{
- switch (reg) {
- case 0:
- DECODE_PRINTF("ES");
- return &M.x86.R_ES;
- case 1:
- DECODE_PRINTF("CS");
- return &M.x86.R_CS;
- case 2:
- DECODE_PRINTF("SS");
- return &M.x86.R_SS;
- case 3:
- DECODE_PRINTF("DS");
- return &M.x86.R_DS;
- case 4:
- case 5:
- case 6:
- case 7:
- DECODE_PRINTF("ILLEGAL SEGREG");
- break;
- }
- HALT_SYS();
- return NULL; /* NOT REACHED OR REACHED ON ERROR */
-}
-
-/****************************************************************************
-PARAMETERS:
-rm - RM value to decode
-
-RETURNS:
-Offset in memory for the address decoding
-
-REMARKS:
-Return the offset given by mod=00 addressing. Also enables the
-decoding of instructions.
-
-NOTE: The code which specifies the corresponding segment (ds vs ss)
- below in the case of [BP+..]. The assumption here is that at the
- point that this subroutine is called, the bit corresponding to
- SYSMODE_SEG_DS_SS will be zero. After every instruction
- except the segment override instructions, this bit (as well
- as any bits indicating segment overrides) will be clear. So
- if a SS access is needed, set this bit. Otherwise, DS access
- occurs (unless any of the segment override bits are set).
-****************************************************************************/
-unsigned decode_rm00_address(
- int rm)
-{
- unsigned offset;
-
- if (M.x86.mode & SYSMODE_PREFIX_ADDR)
- {
- switch (rm) {
- case 0:
- DECODE_PRINTF("[EAX]");
- return M.x86.R_EAX;
- case 1:
- DECODE_PRINTF("[ECX]");
- return M.x86.R_ECX;
- case 2:
- DECODE_PRINTF("[EDX]");
-/* M.x86.mode |= SYSMODE_SEG_DS_SS; */
- return M.x86.R_EDX;
- case 3:
- DECODE_PRINTF("[EBX]");
-/* M.x86.mode |= SYSMODE_SEG_DS_SS; */
- return M.x86.R_EBX;
- case 4:
- printk("Unsupported SIB encoding\n");
- HALT_SYS();
- return 0;
- case 5:
- offset = fetch_long_imm();
- DECODE_PRINTF2("[%08x]", offset);
- return offset;
- case 6:
- DECODE_PRINTF("[ESI]");
- return M.x86.R_ESI;
- case 7:
- DECODE_PRINTF("[EDI]");
- return M.x86.R_EDI;
- }
- }
- else
- {
- switch (rm) {
- case 0:
- DECODE_PRINTF("[BX+SI]");
- return M.x86.R_BX + M.x86.R_SI;
- case 1:
- DECODE_PRINTF("[BX+DI]");
- return M.x86.R_BX + M.x86.R_DI;
- case 2:
- DECODE_PRINTF("[BP+SI]");
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_SI;
- case 3:
- DECODE_PRINTF("[BP+DI]");
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_DI;
- case 4:
- DECODE_PRINTF("[SI]");
- return M.x86.R_SI;
- case 5:
- DECODE_PRINTF("[DI]");
- return M.x86.R_DI;
- case 6:
- offset = fetch_word_imm();
- DECODE_PRINTF2("[%04x]", offset);
- return offset;
- case 7:
- DECODE_PRINTF("[BX]");
- return M.x86.R_BX;
- }
- }
- HALT_SYS();
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-rm - RM value to decode
-
-RETURNS:
-Offset in memory for the address decoding
-
-REMARKS:
-Return the offset given by mod=01 addressing. Also enables the
-decoding of instructions.
-****************************************************************************/
-unsigned decode_rm01_address(
- int rm)
-{
- int displacement = (s8)fetch_byte_imm();
- if (M.x86.mode & SYSMODE_PREFIX_ADDR)
- {
- switch (rm)
- {
- case 0:
- DECODE_PRINTF2("%d[EAX}", displacement);
- return M.x86.R_EAX + displacement;
- case 1:
- DECODE_PRINTF2("%d[ECX]", displacement);
- return M.x86.R_ECX + displacement;
- case 2:
- DECODE_PRINTF2("%d[EDX]", displacement);
- return M.x86.R_EDX + displacement;
- case 3:
- DECODE_PRINTF2("%d[EBX]", displacement);
- return M.x86.R_EBX + displacement;
- case 4:
- printk("Unsupported SIB addressing mode\n");
- HALT_SYS();
- return 0;
- case 5:
- DECODE_PRINTF2("%d[EBP]", displacement);
- return M.x86.R_EBP + displacement;
- case 6:
- DECODE_PRINTF2("%d[ESI]", displacement);
- return M.x86.R_ESI + displacement;
- case 7:
- DECODE_PRINTF2("%d[EDI]", displacement);
- return M.x86.R_EDI + displacement;
- }
- }
- else
- {
- switch (rm) {
- case 0:
- DECODE_PRINTF2("%d[BX+SI]", displacement);
- return M.x86.R_BX + M.x86.R_SI + displacement;
- case 1:
- DECODE_PRINTF2("%d[BX+DI]", displacement);
- return M.x86.R_BX + M.x86.R_DI + displacement;
- case 2:
- DECODE_PRINTF2("%d[BP+SI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_SI + displacement;
- case 3:
- DECODE_PRINTF2("%d[BP+DI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + M.x86.R_DI + displacement;
- case 4:
- DECODE_PRINTF2("%d[SI]", displacement);
- return M.x86.R_SI + displacement;
- case 5:
- DECODE_PRINTF2("%d[DI]", displacement);
- return M.x86.R_DI + displacement;
- case 6:
- DECODE_PRINTF2("%d[BP]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return M.x86.R_BP + displacement;
- case 7:
- DECODE_PRINTF2("%d[BX]", displacement);
- return M.x86.R_BX + displacement;
- }
- HALT_SYS();
- }
- return 0; /* SHOULD NOT HAPPEN */
-}
-
-/****************************************************************************
-PARAMETERS:
-rm - RM value to decode
-
-RETURNS:
-Offset in memory for the address decoding
-
-REMARKS:
-Return the offset given by mod=10 addressing. Also enables the
-decoding of instructions.
-****************************************************************************/
-unsigned decode_rm10_address(
- int rm)
-{
- if (M.x86.mode & SYSMODE_PREFIX_ADDR)
- {
- int displacement = (s32)fetch_long_imm();
- switch (rm)
- {
- case 0:
- DECODE_PRINTF2("%d[EAX}", displacement);
- return M.x86.R_EAX + displacement;
- case 1:
- DECODE_PRINTF2("%d[ECX]", displacement);
- return M.x86.R_ECX + displacement;
- case 2:
- DECODE_PRINTF2("%d[EDX]", displacement);
- return M.x86.R_EDX + displacement;
- case 3:
- DECODE_PRINTF2("%d[EBX]", displacement);
- return M.x86.R_EBX + displacement;
- case 4:
- printk("Unsupported SIB addressing mode\n");
- HALT_SYS();
- return 0;
- case 5:
- DECODE_PRINTF2("%d[EBP]", displacement);
- return M.x86.R_EBP + displacement;
- case 6:
- DECODE_PRINTF2("%d[ESI]", displacement);
- return M.x86.R_ESI + displacement;
- case 7:
- DECODE_PRINTF2("%d[EDI]", displacement);
- return M.x86.R_EDI + displacement;
- }
- }
- else
- {
- int displacement = (s16)fetch_word_imm();
- switch (rm) {
- case 0:
- DECODE_PRINTF2("%d[BX+SI]", displacement);
- return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
- case 1:
- DECODE_PRINTF2("%d[BX+DI]", displacement);
- return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
- case 2:
- DECODE_PRINTF2("%d[BP+SI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
- case 3:
- DECODE_PRINTF2("%d[BP+DI]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
- case 4:
- DECODE_PRINTF2("%d[SI]", displacement);
- return (M.x86.R_SI + displacement) & 0xffff;
- case 5:
- DECODE_PRINTF2("%d[DI]", displacement);
- return (M.x86.R_DI + displacement) & 0xffff;
- case 6:
- DECODE_PRINTF2("%d[BP]", displacement);
- M.x86.mode |= SYSMODE_SEG_DS_SS;
- return (M.x86.R_BP + displacement) & 0xffff;
- case 7:
- DECODE_PRINTF2("%d[BX]", displacement);
- return (M.x86.R_BX + displacement) & 0xffff;
- }
- }
- HALT_SYS();
- return 0;
- /*NOTREACHED */
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c b/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c
deleted file mode 100644
index 7f7c345..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c
+++ /dev/null
@@ -1,945 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file contains the code to implement the decoding and
-* emulation of the FPU instructions.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/* opcode=0xd8 */
-void x86emuOp_esc_coprocess_d8(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("ESC D8\n");
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_d9_tab[] = {
- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
-
- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
-
- "FLD\tDWORD PTR ", "ESC_D9\t", "FST\tDWORD PTR ", "FSTP\tDWORD PTR ",
- "FLDENV\t", "FLDCW\t", "FSTENV\t", "FSTCW\t",
-};
-
-static char *x86emu_fpu_op_d9_tab1[] = {
- "FLD\t", "FLD\t", "FLD\t", "FLD\t",
- "FLD\t", "FLD\t", "FLD\t", "FLD\t",
-
- "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
- "FXCH\t", "FXCH\t", "FXCH\t", "FXCH\t",
-
- "FNOP", "ESC_D9", "ESC_D9", "ESC_D9",
- "ESC_D9", "ESC_D9", "ESC_D9", "ESC_D9",
-
- "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
- "FSTP\t", "FSTP\t", "FSTP\t", "FSTP\t",
-
- "FCHS", "FABS", "ESC_D9", "ESC_D9",
- "FTST", "FXAM", "ESC_D9", "ESC_D9",
-
- "FLD1", "FLDL2T", "FLDL2E", "FLDPI",
- "FLDLG2", "FLDLN2", "FLDZ", "ESC_D9",
-
- "F2XM1", "FYL2X", "FPTAN", "FPATAN",
- "FXTRACT", "ESC_D9", "FDECSTP", "FINCSTP",
-
- "FPREM", "FYL2XP1", "FSQRT", "ESC_D9",
- "FRNDINT", "FSCALE", "ESC_D9", "ESC_D9",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xd9 */
-void x86emuOp_esc_coprocess_d9(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (mod != 3) {
- DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl);
- } else {
- DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]);
- }
-#endif
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- if (rh < 4) {
- DECODE_PRINTF2("ST(%d)\n", stkelem);
- } else {
- DECODE_PRINTF("\n");
- }
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- /* execute */
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem);
- break;
- case 1:
- x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem);
- break;
- case 2:
- switch (rl) {
- case 0:
- x86emu_fpu_R_nop();
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- case 3:
- x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem);
- break;
- case 4:
- switch (rl) {
- case 0:
- x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP);
- break;
- default:
- /* 2,3,6,7 */
- x86emu_fpu_illegal();
- break;
- }
- break;
-
- case 5:
- switch (rl) {
- case 0:
- x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP);
- break;
- case 6:
- x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP);
- break;
- default:
- /* 7 */
- x86emu_fpu_illegal();
- break;
- }
- break;
-
- case 6:
- switch (rl) {
- case 0:
- x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_illegal();
- break;
- case 6:
- x86emu_fpu_R_decstp();
- break;
- case 7:
- x86emu_fpu_R_incstp();
- break;
- }
- break;
-
- case 7:
- switch (rl) {
- case 0:
- x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_illegal();
- break;
- case 4:
- x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP);
- break;
- case 6:
- case 7:
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
-
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset);
- break;
- }
- }
- }
-#endif /* X86EMU_FPU_PRESENT */
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-char *x86emu_fpu_op_da_tab[] = {
- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
- "FICOMP\tDWORD PTR ",
- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
- "FIDIVR\tDWORD PTR ",
-
- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
- "FICOMP\tDWORD PTR ",
- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
- "FIDIVR\tDWORD PTR ",
-
- "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ",
- "FICOMP\tDWORD PTR ",
- "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ",
- "FIDIVR\tDWORD PTR ",
-
- "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
- "ESC_DA ", "ESC_DA ", "ESC_DA ", "ESC_DA ",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xda */
-void x86emuOp_esc_coprocess_da(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- x86emu_fpu_illegal();
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset);
- break;
- case 1:
- x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset);
- break;
- case 2:
- x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset);
- break;
- case 3:
- x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset);
- break;
- case 4:
- x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset);
- break;
- case 5:
- x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset);
- break;
- case 6:
- x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset);
- break;
- case 7:
- x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-char *x86emu_fpu_op_db_tab[] = {
- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
-
- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
-
- "FILD\tDWORD PTR ", "ESC_DB\t19", "FIST\tDWORD PTR ", "FISTP\tDWORD PTR ",
- "ESC_DB\t1C", "FLD\tTBYTE PTR ", "ESC_DB\t1E", "FSTP\tTBYTE PTR ",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xdb */
-void x86emuOp_esc_coprocess_db(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (mod != 3) {
- DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl);
- } else if (rh == 4) { /* === 11 10 0 nnn */
- switch (rl) {
- case 0:
- DECODE_PRINTF("FENI\n");
- break;
- case 1:
- DECODE_PRINTF("FDISI\n");
- break;
- case 2:
- DECODE_PRINTF("FCLEX\n");
- break;
- case 3:
- DECODE_PRINTF("FINIT\n");
- break;
- }
- } else {
- DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl));
- }
-#endif /* DEBUG */
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- break;
- case 3: /* register to register */
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- /* execute */
- switch (mod) {
- case 3:
- switch (rh) {
- case 4:
- switch (rl) {
- case 0:
- x86emu_fpu_R_feni();
- break;
- case 1:
- x86emu_fpu_R_fdisi();
- break;
- case 2:
- x86emu_fpu_R_fclex();
- break;
- case 3:
- x86emu_fpu_R_finit();
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset);
- break;
- case 4:
- x86emu_fpu_illegal();
- break;
- case 5:
- x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset);
- break;
- case 6:
- x86emu_fpu_illegal();
- break;
- case 7:
- x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-char *x86emu_fpu_op_dc_tab[] = {
- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
- "FCOMP\tQWORD PTR ",
- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
- "FDIVR\tQWORD PTR ",
-
- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
- "FCOMP\tQWORD PTR ",
- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
- "FDIVR\tQWORD PTR ",
-
- "FADD\tQWORD PTR ", "FMUL\tQWORD PTR ", "FCOM\tQWORD PTR ",
- "FCOMP\tQWORD PTR ",
- "FSUB\tQWORD PTR ", "FSUBR\tQWORD PTR ", "FDIV\tQWORD PTR ",
- "FDIVR\tQWORD PTR ",
-
- "FADD\t", "FMUL\t", "FCOM\t", "FCOMP\t",
- "FSUBR\t", "FSUB\t", "FDIVR\t", "FDIV\t",
-};
-#endif /* DEBUG */
-
-/* opcode=0xdc */
-void x86emuOp_esc_coprocess_dc(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- /* execute */
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 3:
- x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 4:
- x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 6:
- x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 7:
- x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP);
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 1:
- x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 2:
- x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_dd_tab[] = {
- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
-
- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
-
- "FLD\tQWORD PTR ", "ESC_DD\t29,", "FST\tQWORD PTR ", "FSTP\tQWORD PTR ",
- "FRSTOR\t", "ESC_DD\t2D,", "FSAVE\t", "FSTSW\t",
-
- "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
- "ESC_DD\t2C,", "ESC_DD\t2D,", "ESC_DD\t2E,", "ESC_DD\t2F,",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xdd */
-void x86emuOp_esc_coprocess_dd(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_ffree(stkelem);
- break;
- case 1:
- x86emu_fpu_R_fxch(stkelem);
- break;
- case 2:
- x86emu_fpu_R_fst(stkelem); /* register version */
- break;
- case 3:
- x86emu_fpu_R_fstp(stkelem); /* register version */
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset);
- break;
- case 4:
- x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset);
- break;
- case 5:
- x86emu_fpu_illegal();
- break;
- case 6:
- x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_de_tab[] =
-{
- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
- "FICOMP\tWORD PTR ",
- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
- "FIDIVR\tWORD PTR ",
-
- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
- "FICOMP\tWORD PTR ",
- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
- "FIDIVR\tWORD PTR ",
-
- "FIADD\tWORD PTR ", "FIMUL\tWORD PTR ", "FICOM\tWORD PTR ",
- "FICOMP\tWORD PTR ",
- "FISUB\tWORD PTR ", "FISUBR\tWORD PTR ", "FIDIV\tWORD PTR ",
- "FIDIVR\tWORD PTR ",
-
- "FADDP\t", "FMULP\t", "FCOMP\t", "FCOMPP\t",
- "FSUBRP\t", "FSUBP\t", "FDIVRP\t", "FDIVP\t",
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xde */
-void x86emuOp_esc_coprocess_de(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d),ST\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 1:
- x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 2:
- x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 3:
- if (stkelem == 1)
- x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP);
- else
- x86emu_fpu_illegal();
- break;
- case 4:
- x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 5:
- x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 6:
- x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP);
- break;
- case 7:
- x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP);
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset);
- break;
- case 1:
- x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset);
- break;
- case 2:
- x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset);
- break;
- case 3:
- x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
-
-#ifdef DEBUG
-
-static char *x86emu_fpu_op_df_tab[] = {
- /* mod == 00 */
- "FILD\tWORD PTR ", "ESC_DF\t39\n", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
- "FISTP\tQWORD PTR ",
-
- /* mod == 01 */
- "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
- "FISTP\tQWORD PTR ",
-
- /* mod == 10 */
- "FILD\tWORD PTR ", "ESC_DF\t39 ", "FIST\tWORD PTR ", "FISTP\tWORD PTR ",
- "FBLD\tTBYTE PTR ", "FILD\tQWORD PTR ", "FBSTP\tTBYTE PTR ",
- "FISTP\tQWORD PTR ",
-
- /* mod == 11 */
- "FFREE\t", "FXCH\t", "FST\t", "FSTP\t",
- "ESC_DF\t3C,", "ESC_DF\t3D,", "ESC_DF\t3E,", "ESC_DF\t3F,"
-};
-
-#endif /* DEBUG */
-
-/* opcode=0xdf */
-void x86emuOp_esc_coprocess_df(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 stkelem;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- break;
- case 3: /* register to register */
- stkelem = (u8)rl;
- DECODE_PRINTF2("\tST(%d)\n", stkelem);
- break;
- }
-#ifdef X86EMU_FPU_PRESENT
- switch (mod) {
- case 3:
- switch (rh) {
- case 0:
- x86emu_fpu_R_ffree(stkelem);
- break;
- case 1:
- x86emu_fpu_R_fxch(stkelem);
- break;
- case 2:
- x86emu_fpu_R_fst(stkelem); /* register version */
- break;
- case 3:
- x86emu_fpu_R_fstp(stkelem); /* register version */
- break;
- default:
- x86emu_fpu_illegal();
- break;
- }
- break;
- default:
- switch (rh) {
- case 0:
- x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset);
- break;
- case 1:
- x86emu_fpu_illegal();
- break;
- case 2:
- x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset);
- break;
- case 3:
- x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset);
- break;
- case 4:
- x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset);
- break;
- case 5:
- x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset);
- break;
- case 6:
- x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset);
- break;
- case 7:
- x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset);
- break;
- }
- }
-#endif
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR_NO_TRACE();
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile b/board/MAI/bios_emulator/scitech/src/x86emu/makefile
deleted file mode 100644
index 8ce2e9e..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile
+++ /dev/null
@@ -1,63 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Generic makefile for the x86emu library. Requires
-# the SciTech Software makefile definitions package to be
-# installed, which uses the DMAKE make program.
-#
-#############################################################################
-
-.IMPORT .IGNORE: DEBUG
-
-#----------------------------------------------------------------------------
-# Define the lists of object files
-#----------------------------------------------------------------------------
-
-OBJECTS = sys$O decode$O ops$O ops2$O prim_ops$O fpu$O debug$O
-CFLAGS += -DSCITECH
-.IF $(DEBUG)
-CFLAGS += -DDEBUG
-.ENDIF
-LIBCLEAN = *.dll *.lib *.a
-LIBFILE = $(LP)x86emu$L
-
-#----------------------------------------------------------------------------
-# Sample test programs
-#----------------------------------------------------------------------------
-
-all: $(LIBFILE)
-
-validate$E: validate$O $(LIBFILE)
-
-#----------------------------------------------------------------------------
-# Define the list of object files to create dependency information for
-#----------------------------------------------------------------------------
-
-DEPEND_OBJ = validate$O $(OBJECTS)
-
-.INCLUDE: "$(SCITECH)/makedefs/common.mk"
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.cross b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.cross
deleted file mode 100644
index 0bce9a9..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.cross
+++ /dev/null
@@ -1,82 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Linux specific makefile for the x86emu library.
-#
-#############################################################################
-
-CC = $(CROSS_COMPILE)gcc
-AR = $(CROSS_COMPILE)ar
-
-TARGETLIB = libx86emu.a
-TARGETDEBUGLIB =libx86emud.a
-
-OBJS=\
-decode.o \
-fpu.o \
-ops.o \
-ops2.o \
-prim_ops.o \
-sys.o
-
-DEBUGOBJS=debug.d \
- decode.d \
- fpu.d \
- ops.d \
- ops2.d \
- prim_ops.d \
- sys.d
-
-.SUFFIXES: .d
-
-all: $(TARGETLIB) $(TARGETDEBUGLIB)
-
-$(TARGETLIB): $(OBJS)
- $(AR) rv $(TARGETLIB) $(OBJS)
-
-$(TARGETDEBUGLIB): $(DEBUGOBJS)
- $(AR) rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
-
-INCS = -I. -Ix86emu -I../../include
-CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -Dprintk=printf -fsigned-char -fomit-frame-pointer -fPIC -ffixed-r14 -meabi
-CDEBUGFLAGS = -DDEBUG
-
-.c.o:
- $(CC) -g -O2 -Wall -c $(CFLAGS) $(INCS) $*.c
-
-.c.d:
- $(CC) -g -O2 -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
-
-.cpp.o:
- $(CC) -c $(CFLAGS) $(INCS) $*.cpp
-
-clean:
- rm -f *.a *.o *.d
-
-validate: validate.o libx86emu.a
- $(CC) -o validate validate.o -lx86emu -L.
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.linux b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.linux
deleted file mode 100644
index f74b88d..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.linux
+++ /dev/null
@@ -1,81 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Linux specific makefile for the x86emu library.
-#
-#############################################################################
-
-TARGETLIB = libx86emu.a
-TARGETDEBUGLIB =libx86emud.a
-
-OBJS=\
-decode.o \
-fpu.o \
-ops.o \
-ops2.o \
-prim_ops.o \
-pregs.o \
-sys.o
-
-DEBUGOBJS=debug.d \
- decode.d \
- fpu.d \
- ops.d \
- ops2.d \
- prim_ops.d \
- pregs.d \
- sys.d
-
-.SUFFIXES: .d
-
-all: $(TARGETLIB) $(TARGETDEBUGLIB)
-
-$(TARGETLIB): $(OBJS)
- ar rv $(TARGETLIB) $(OBJS)
-
-$(TARGETDEBUGLIB): $(DEBUGOBJS)
- ar rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
-
-INCS = -I. -Ix86emu -I../../include
-CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG
-CDEBUGFLAGS = -DDEBUG
-
-.c.o:
- gcc -g -O -Wall -c $(CFLAGS) $(INCS) $*.c
-
-.c.d:
- gcc -g -O -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
-
-.cpp.o:
- gcc -c $(CFLAGS) $(INCS) $*.cpp
-
-clean:
- rm -f *.a *.o *.d
-
-validate: validate.o libx86emu.a
- gcc -o validate validate.o -lx86emu -L.
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot b/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot
deleted file mode 100644
index af9ae1f..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/makefile.uboot
+++ /dev/null
@@ -1,80 +0,0 @@
-#############################################################################
-#
-# Realmode X86 Emulator Library
-#
-# Copyright (C) 1996-1999 SciTech Software, Inc.
-#
-# ========================================================================
-#
-# Permission to use, copy, modify, distribute, and sell this software and
-# its documentation for any purpose is hereby granted without fee,
-# provided that the above copyright notice appear in all copies and that
-# both that copyright notice and this permission notice appear in
-# supporting documentation, and that the name of the authors not be used
-# in advertising or publicity pertaining to distribution of the software
-# without specific, written prior permission. The authors makes no
-# representations about the suitability of this software for any purpose.
-# It is provided "as is" without express or implied warranty.
-#
-# THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-# INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-# EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-# CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-# USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-# OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-# PERFORMANCE OF THIS SOFTWARE.
-#
-# ========================================================================
-#
-# Descripton: Linux specific makefile for the x86emu library.
-#
-#############################################################################
-CC = $(CROSS_COMPILE)gcc
-AR = $(CROSS_COMPILE)ar
-TARGETLIB = libx86emu.a
-TARGETDEBUGLIB =libx86emud.a
-
-OBJS=\
-decode.o \
-fpu.o \
-ops.o \
-ops2.o \
-prim_ops.o \
-sys.o
-
-DEBUGOBJS=debug.d \
- decode.d \
- fpu.d \
- ops.d \
- ops2.d \
- prim_ops.d \
- sys.d
-
-.SUFFIXES: .d
-
-all: $(TARGETLIB) $(TARGETDEBUGLIB)
-
-$(TARGETLIB): $(OBJS)
- $(AR) rv $(TARGETLIB) $(OBJS)
-
-$(TARGETDEBUGLIB): $(DEBUGOBJS)
- $(AR) rv $(TARGETDEBUGLIB) $(DEBUGOBJS)
-
-INCS = -I. -Ix86emu -I../../include
-CFLAGS = -D__DRIVER__ -DFORCE_POST -D_CEXPORT= -DNO_LONG_LONG -Dprintk=printf -fsigned-char -fomit-frame-pointer -fPIC -ffixed-r14 -meabi
-CDEBUGFLAGS = -DDEBUG
-
-.c.o:
- $(CC) -g -O2 -Wall -c $(CFLAGS) $(INCS) $*.c
-
-.c.d:
- $(CC) -g -O2 -Wall -c -o$*.d $(CFLAGS) $(CDEBUGFLAGS) $(INCS) $*.c
-
-.cpp.o:
- $(CC) -c $(CFLAGS) $(INCS) $*.cpp
-
-clean:
- rm -f *.a *.o *.d
-
-validate: validate.o libx86emu.a
- $(CC) -o validate validate.o -lx86emu -L.
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/ops.c b/board/MAI/bios_emulator/scitech/src/x86emu/ops.c
deleted file mode 100644
index 2d4f93e..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/ops.c
+++ /dev/null
@@ -1,11701 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines to implement the decoding
-* and emulation of all the x86 processor instructions.
-*
-* There are approximately 250 subroutines in here, which correspond
-* to the 256 byte-"opcodes" found on the 8086. The table which
-* dispatches this is found in the files optab.[ch].
-*
-* Each opcode proc has a comment preceeding it which gives it's table
-* address. Several opcodes are missing (undefined) in the table.
-*
-* Each proc includes information for decoding (DECODE_PRINTF and
-* DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
-* functions (START_OF_INSTR, END_OF_INSTR).
-*
-* Many of the procedures are *VERY* similar in coding. This has
-* allowed for a very large amount of code to be generated in a fairly
-* short amount of time (i.e. cut, paste, and modify). The result is
-* that much of the code below could have been folded into subroutines
-* for a large reduction in size of this file. The downside would be
-* that there would be a penalty in execution speed. The file could
-* also have been *MUCH* larger by inlining certain functions which
-* were called. This could have resulted even faster execution. The
-* prime directive I used to decide whether to inline the code or to
-* modularize it, was basically: 1) no unnecessary subroutine calls,
-* 2) no routines more than about 200 lines in size, and 3) modularize
-* any code that I might not get right the first time. The fetch_*
-* subroutines fall into the latter category. The The decode_* fall
-* into the second category. The coding of the "switch(mod){ .... }"
-* in many of the subroutines below falls into the first category.
-* Especially, the coding of {add,and,or,sub,...}_{byte,word}
-* subroutines are an especially glaring case of the third guideline.
-* Since so much of the code is cloned from other modules (compare
-* opcode #00 to opcode #01), making the basic operations subroutine
-* calls is especially important; otherwise mistakes in coding an
-* "add" would represent a nightmare in maintenance.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-op1 - Instruction op code
-
-REMARKS:
-Handles illegal opcodes.
-****************************************************************************/
-void x86emuOp_illegal_op(
- u8 op1)
-{
- START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-1,op1);
- HALT_SYS();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x00
-****************************************************************************/
-void x86emuOp_add_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg, *srcreg;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x01
-****************************************************************************/
-void x86emuOp_add_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = add_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x02
-****************************************************************************/
-void x86emuOp_add_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x03
-****************************************************************************/
-void x86emuOp_add_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = add_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x04
-****************************************************************************/
-void x86emuOp_add_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADD\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = add_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x05
-****************************************************************************/
-void x86emuOp_add_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("ADD\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("ADD\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = add_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = add_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x06
-****************************************************************************/
-void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tES\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_ES);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x07
-****************************************************************************/
-void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tES\n");
- TRACE_AND_STEP();
- M.x86.R_ES = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x08
-****************************************************************************/
-void x86emuOp_or_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x09
-****************************************************************************/
-void x86emuOp_or_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = or_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0a
-****************************************************************************/
-void x86emuOp_or_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0b
-****************************************************************************/
-void x86emuOp_or_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = or_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0c
-****************************************************************************/
-void x86emuOp_or_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("OR\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = or_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0d
-****************************************************************************/
-void x86emuOp_or_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("OR\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("OR\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = or_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = or_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0e
-****************************************************************************/
-void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tCS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
-****************************************************************************/
-void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
-{
- u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
- INC_DECODED_INST_LEN(1);
- (*x86emu_optab2[op2])(op2);
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x10
-****************************************************************************/
-void x86emuOp_adc_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x11
-****************************************************************************/
-void x86emuOp_adc_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = adc_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x12
-****************************************************************************/
-void x86emuOp_adc_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x13
-****************************************************************************/
-void x86emuOp_adc_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = adc_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x14
-****************************************************************************/
-void x86emuOp_adc_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("ADC\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = adc_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x15
-****************************************************************************/
-void x86emuOp_adc_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("ADC\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("ADC\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = adc_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = adc_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x16
-****************************************************************************/
-void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tSS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_SS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x17
-****************************************************************************/
-void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tSS\n");
- TRACE_AND_STEP();
- M.x86.R_SS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x18
-****************************************************************************/
-void x86emuOp_sbb_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x19
-****************************************************************************/
-void x86emuOp_sbb_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sbb_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1a
-****************************************************************************/
-void x86emuOp_sbb_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1b
-****************************************************************************/
-void x86emuOp_sbb_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sbb_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1c
-****************************************************************************/
-void x86emuOp_sbb_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SBB\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = sbb_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1d
-****************************************************************************/
-void x86emuOp_sbb_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("SBB\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("SBB\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = sbb_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = sbb_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1e
-****************************************************************************/
-void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tDS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_DS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x1f
-****************************************************************************/
-void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tDS\n");
- TRACE_AND_STEP();
- M.x86.R_DS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x20
-****************************************************************************/
-void x86emuOp_and_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
-
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
-
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
-
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
-
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x21
-****************************************************************************/
-void x86emuOp_and_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = and_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x22
-****************************************************************************/
-void x86emuOp_and_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x23
-****************************************************************************/
-void x86emuOp_and_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, srcval);
- break;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, srcval);
- break;
- }
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = and_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x24
-****************************************************************************/
-void x86emuOp_and_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("AND\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = and_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x25
-****************************************************************************/
-void x86emuOp_and_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("AND\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("AND\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = and_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = and_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x26
-****************************************************************************/
-void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("ES:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_ES;
- /*
- * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
- * opcode subroutines we do not want to do this.
- */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x27
-****************************************************************************/
-void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DAA\n");
- TRACE_AND_STEP();
- M.x86.R_AL = daa_byte(M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x28
-****************************************************************************/
-void x86emuOp_sub_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x29
-****************************************************************************/
-void x86emuOp_sub_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = sub_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2a
-****************************************************************************/
-void x86emuOp_sub_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2b
-****************************************************************************/
-void x86emuOp_sub_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = sub_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2c
-****************************************************************************/
-void x86emuOp_sub_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("SUB\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = sub_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2d
-****************************************************************************/
-void x86emuOp_sub_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("SUB\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("SUB\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = sub_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = sub_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2e
-****************************************************************************/
-void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("CS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_CS;
- /* note no DECODE_CLEAR_SEGOVR here. */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x2f
-****************************************************************************/
-void x86emuOp_das(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DAS\n");
- TRACE_AND_STEP();
- M.x86.R_AL = das_byte(M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x30
-****************************************************************************/
-void x86emuOp_xor_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_byte(destval, *srcreg);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x31
-****************************************************************************/
-void x86emuOp_xor_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_long(destval, *srcreg);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = xor_word(destval, *srcreg);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x32
-****************************************************************************/
-void x86emuOp_xor_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x33
-****************************************************************************/
-void x86emuOp_xor_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = xor_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x34
-****************************************************************************/
-void x86emuOp_xor_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("XOR\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- M.x86.R_AL = xor_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x35
-****************************************************************************/
-void x86emuOp_xor_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XOR\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("XOR\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = xor_long(M.x86.R_EAX, srcval);
- } else {
- M.x86.R_AX = xor_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x36
-****************************************************************************/
-void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("SS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_SS;
- /* no DECODE_CLEAR_SEGOVR ! */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x37
-****************************************************************************/
-void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("AAA\n");
- TRACE_AND_STEP();
- M.x86.R_AX = aaa_word(M.x86.R_AX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x38
-****************************************************************************/
-void x86emuOp_cmp_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg, *srcreg;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(destval, *srcreg);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(destval, *srcreg);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(destval, *srcreg);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x39
-****************************************************************************/
-void x86emuOp_cmp_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(destval, *srcreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(destval, *srcreg);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(destval, *srcreg);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3a
-****************************************************************************/
-void x86emuOp_cmp_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, srcval);
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, srcval);
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, srcval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3b
-****************************************************************************/
-void x86emuOp_cmp_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, srcval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, srcval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, srcval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- cmp_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3c
-****************************************************************************/
-void x86emuOp_cmp_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMP\tAL,");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- cmp_byte(M.x86.R_AL, srcval);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3d
-****************************************************************************/
-void x86emuOp_cmp_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CMP\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("CMP\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- cmp_long(M.x86.R_EAX, srcval);
- } else {
- cmp_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3e
-****************************************************************************/
-void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_DS;
- /* NO DECODE_CLEAR_SEGOVR! */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x3f
-****************************************************************************/
-void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("AAS\n");
- TRACE_AND_STEP();
- M.x86.R_AX = aas_word(M.x86.R_AX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x40
-****************************************************************************/
-void x86emuOp_inc_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEAX\n");
- } else {
- DECODE_PRINTF("INC\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = inc_long(M.x86.R_EAX);
- } else {
- M.x86.R_AX = inc_word(M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x41
-****************************************************************************/
-void x86emuOp_inc_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tECX\n");
- } else {
- DECODE_PRINTF("INC\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = inc_long(M.x86.R_ECX);
- } else {
- M.x86.R_CX = inc_word(M.x86.R_CX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x42
-****************************************************************************/
-void x86emuOp_inc_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEDX\n");
- } else {
- DECODE_PRINTF("INC\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = inc_long(M.x86.R_EDX);
- } else {
- M.x86.R_DX = inc_word(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x43
-****************************************************************************/
-void x86emuOp_inc_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEBX\n");
- } else {
- DECODE_PRINTF("INC\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = inc_long(M.x86.R_EBX);
- } else {
- M.x86.R_BX = inc_word(M.x86.R_BX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x44
-****************************************************************************/
-void x86emuOp_inc_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tESP\n");
- } else {
- DECODE_PRINTF("INC\tSP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = inc_long(M.x86.R_ESP);
- } else {
- M.x86.R_SP = inc_word(M.x86.R_SP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x45
-****************************************************************************/
-void x86emuOp_inc_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEBP\n");
- } else {
- DECODE_PRINTF("INC\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = inc_long(M.x86.R_EBP);
- } else {
- M.x86.R_BP = inc_word(M.x86.R_BP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x46
-****************************************************************************/
-void x86emuOp_inc_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tESI\n");
- } else {
- DECODE_PRINTF("INC\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = inc_long(M.x86.R_ESI);
- } else {
- M.x86.R_SI = inc_word(M.x86.R_SI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x47
-****************************************************************************/
-void x86emuOp_inc_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tEDI\n");
- } else {
- DECODE_PRINTF("INC\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = inc_long(M.x86.R_EDI);
- } else {
- M.x86.R_DI = inc_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x48
-****************************************************************************/
-void x86emuOp_dec_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEAX\n");
- } else {
- DECODE_PRINTF("DEC\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = dec_long(M.x86.R_EAX);
- } else {
- M.x86.R_AX = dec_word(M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x49
-****************************************************************************/
-void x86emuOp_dec_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tECX\n");
- } else {
- DECODE_PRINTF("DEC\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = dec_long(M.x86.R_ECX);
- } else {
- M.x86.R_CX = dec_word(M.x86.R_CX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4a
-****************************************************************************/
-void x86emuOp_dec_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEDX\n");
- } else {
- DECODE_PRINTF("DEC\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = dec_long(M.x86.R_EDX);
- } else {
- M.x86.R_DX = dec_word(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4b
-****************************************************************************/
-void x86emuOp_dec_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEBX\n");
- } else {
- DECODE_PRINTF("DEC\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = dec_long(M.x86.R_EBX);
- } else {
- M.x86.R_BX = dec_word(M.x86.R_BX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4c
-****************************************************************************/
-void x86emuOp_dec_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tESP\n");
- } else {
- DECODE_PRINTF("DEC\tSP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = dec_long(M.x86.R_ESP);
- } else {
- M.x86.R_SP = dec_word(M.x86.R_SP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4d
-****************************************************************************/
-void x86emuOp_dec_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEBP\n");
- } else {
- DECODE_PRINTF("DEC\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = dec_long(M.x86.R_EBP);
- } else {
- M.x86.R_BP = dec_word(M.x86.R_BP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4e
-****************************************************************************/
-void x86emuOp_dec_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tESI\n");
- } else {
- DECODE_PRINTF("DEC\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = dec_long(M.x86.R_ESI);
- } else {
- M.x86.R_SI = dec_word(M.x86.R_SI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x4f
-****************************************************************************/
-void x86emuOp_dec_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tEDI\n");
- } else {
- DECODE_PRINTF("DEC\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = dec_long(M.x86.R_EDI);
- } else {
- M.x86.R_DI = dec_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x50
-****************************************************************************/
-void x86emuOp_push_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEAX\n");
- } else {
- DECODE_PRINTF("PUSH\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EAX);
- } else {
- push_word(M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x51
-****************************************************************************/
-void x86emuOp_push_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tECX\n");
- } else {
- DECODE_PRINTF("PUSH\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_ECX);
- } else {
- push_word(M.x86.R_CX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x52
-****************************************************************************/
-void x86emuOp_push_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEDX\n");
- } else {
- DECODE_PRINTF("PUSH\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EDX);
- } else {
- push_word(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x53
-****************************************************************************/
-void x86emuOp_push_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEBX\n");
- } else {
- DECODE_PRINTF("PUSH\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EBX);
- } else {
- push_word(M.x86.R_BX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x54
-****************************************************************************/
-void x86emuOp_push_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tESP\n");
- } else {
- DECODE_PRINTF("PUSH\tSP\n");
- }
- TRACE_AND_STEP();
- /* Always push (E)SP, since we are emulating an i386 and above
- * processor. This is necessary as some BIOS'es use this to check
- * what type of processor is in the system.
- */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_ESP);
- } else {
- push_word((u16)(M.x86.R_SP));
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x55
-****************************************************************************/
-void x86emuOp_push_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEBP\n");
- } else {
- DECODE_PRINTF("PUSH\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EBP);
- } else {
- push_word(M.x86.R_BP);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x56
-****************************************************************************/
-void x86emuOp_push_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tESI\n");
- } else {
- DECODE_PRINTF("PUSH\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_ESI);
- } else {
- push_word(M.x86.R_SI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x57
-****************************************************************************/
-void x86emuOp_push_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSH\tEDI\n");
- } else {
- DECODE_PRINTF("PUSH\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(M.x86.R_EDI);
- } else {
- push_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x58
-****************************************************************************/
-void x86emuOp_pop_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEAX\n");
- } else {
- DECODE_PRINTF("POP\tAX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = pop_long();
- } else {
- M.x86.R_AX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x59
-****************************************************************************/
-void x86emuOp_pop_CX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tECX\n");
- } else {
- DECODE_PRINTF("POP\tCX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = pop_long();
- } else {
- M.x86.R_CX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5a
-****************************************************************************/
-void x86emuOp_pop_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEDX\n");
- } else {
- DECODE_PRINTF("POP\tDX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = pop_long();
- } else {
- M.x86.R_DX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5b
-****************************************************************************/
-void x86emuOp_pop_BX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEBX\n");
- } else {
- DECODE_PRINTF("POP\tBX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = pop_long();
- } else {
- M.x86.R_BX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5c
-****************************************************************************/
-void x86emuOp_pop_SP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tESP\n");
- } else {
- DECODE_PRINTF("POP\tSP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = pop_long();
- } else {
- M.x86.R_SP = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5d
-****************************************************************************/
-void x86emuOp_pop_BP(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEBP\n");
- } else {
- DECODE_PRINTF("POP\tBP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = pop_long();
- } else {
- M.x86.R_BP = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5e
-****************************************************************************/
-void x86emuOp_pop_SI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tESI\n");
- } else {
- DECODE_PRINTF("POP\tSI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = pop_long();
- } else {
- M.x86.R_SI = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x5f
-****************************************************************************/
-void x86emuOp_pop_DI(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POP\tEDI\n");
- } else {
- DECODE_PRINTF("POP\tDI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = pop_long();
- } else {
- M.x86.R_DI = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x60
-****************************************************************************/
-void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSHAD\n");
- } else {
- DECODE_PRINTF("PUSHA\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 old_sp = M.x86.R_ESP;
-
- push_long(M.x86.R_EAX);
- push_long(M.x86.R_ECX);
- push_long(M.x86.R_EDX);
- push_long(M.x86.R_EBX);
- push_long(old_sp);
- push_long(M.x86.R_EBP);
- push_long(M.x86.R_ESI);
- push_long(M.x86.R_EDI);
- } else {
- u16 old_sp = M.x86.R_SP;
-
- push_word(M.x86.R_AX);
- push_word(M.x86.R_CX);
- push_word(M.x86.R_DX);
- push_word(M.x86.R_BX);
- push_word(old_sp);
- push_word(M.x86.R_BP);
- push_word(M.x86.R_SI);
- push_word(M.x86.R_DI);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x61
-****************************************************************************/
-void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POPAD\n");
- } else {
- DECODE_PRINTF("POPA\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = pop_long();
- M.x86.R_ESI = pop_long();
- M.x86.R_EBP = pop_long();
- M.x86.R_ESP += 4; /* skip ESP */
- M.x86.R_EBX = pop_long();
- M.x86.R_EDX = pop_long();
- M.x86.R_ECX = pop_long();
- M.x86.R_EAX = pop_long();
- } else {
- M.x86.R_DI = pop_word();
- M.x86.R_SI = pop_word();
- M.x86.R_BP = pop_word();
- M.x86.R_SP += 2; /* skip SP */
- M.x86.R_BX = pop_word();
- M.x86.R_DX = pop_word();
- M.x86.R_CX = pop_word();
- M.x86.R_AX = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */
-/*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x64
-****************************************************************************/
-void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("FS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_FS;
- /*
- * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
- * opcode subroutines we do not want to do this.
- */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x65
-****************************************************************************/
-void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("GS:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_SEGOVR_GS;
- /*
- * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
- * opcode subroutines we do not want to do this.
- */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x66 - prefix for 32-bit register
-****************************************************************************/
-void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("DATA:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_DATA;
- /* note no DECODE_CLEAR_SEGOVR here. */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x67 - prefix for 32-bit address
-****************************************************************************/
-void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("ADDR:\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_ADDR;
- /* note no DECODE_CLEAR_SEGOVR here. */
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x68
-****************************************************************************/
-void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 imm;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- imm = fetch_long_imm();
- } else {
- imm = fetch_word_imm();
- }
- DECODE_PRINTF2("PUSH\t%x\n", imm);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(imm);
- } else {
- push_word((u16)imm);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x69
-****************************************************************************/
-void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
- s32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
- s16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- res = (s16)*srcreg * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6a
-****************************************************************************/
-void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
-{
- s16 imm;
-
- START_OF_INSTR();
- imm = (s8)fetch_byte_imm();
- DECODE_PRINTF2("PUSH\t%d\n", imm);
- TRACE_AND_STEP();
- push_word(imm);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6b
-****************************************************************************/
-void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
- s8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- res = (s16)srcval * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%d\n", (s32)imm);
- res = (s16)*srcreg * (s16)imm;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6c
-****************************************************************************/
-void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("INSB\n");
- ins(1);
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6d
-****************************************************************************/
-void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INSD\n");
- ins(4);
- } else {
- DECODE_PRINTF("INSW\n");
- ins(2);
- }
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6e
-****************************************************************************/
-void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("OUTSB\n");
- outs(1);
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x6f
-****************************************************************************/
-void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("OUTSD\n");
- outs(4);
- } else {
- DECODE_PRINTF("OUTSW\n");
- outs(2);
- }
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x70
-****************************************************************************/
-void x86emuOp_jump_near_O(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if overflow flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JO\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_OF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x71
-****************************************************************************/
-void x86emuOp_jump_near_NO(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if overflow is not set */
- START_OF_INSTR();
- DECODE_PRINTF("JNO\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_OF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x72
-****************************************************************************/
-void x86emuOp_jump_near_B(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is set. */
- START_OF_INSTR();
- DECODE_PRINTF("JB\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_CF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x73
-****************************************************************************/
-void x86emuOp_jump_near_NB(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is clear. */
- START_OF_INSTR();
- DECODE_PRINTF("JNB\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_CF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x74
-****************************************************************************/
-void x86emuOp_jump_near_Z(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if zero flag is set. */
- START_OF_INSTR();
- DECODE_PRINTF("JZ\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x75
-****************************************************************************/
-void x86emuOp_jump_near_NZ(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if zero flag is clear. */
- START_OF_INSTR();
- DECODE_PRINTF("JNZ\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x76
-****************************************************************************/
-void x86emuOp_jump_near_BE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is set or if the zero
- flag is set. */
- START_OF_INSTR();
- DECODE_PRINTF("JBE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x77
-****************************************************************************/
-void x86emuOp_jump_near_NBE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if carry flag is clear and if the zero
- flag is clear */
- START_OF_INSTR();
- DECODE_PRINTF("JNBE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x78
-****************************************************************************/
-void x86emuOp_jump_near_S(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if sign flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JS\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_SF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x79
-****************************************************************************/
-void x86emuOp_jump_near_NS(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if sign flag is clear */
- START_OF_INSTR();
- DECODE_PRINTF("JNS\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_SF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7a
-****************************************************************************/
-void x86emuOp_jump_near_P(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if parity flag is set (even parity) */
- START_OF_INSTR();
- DECODE_PRINTF("JP\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_PF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7b
-****************************************************************************/
-void x86emuOp_jump_near_NP(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
-
- /* jump to byte offset if parity flag is clear (odd parity) */
- START_OF_INSTR();
- DECODE_PRINTF("JNP\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (!ACCESS_FLAG(F_PF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7c
-****************************************************************************/
-void x86emuOp_jump_near_L(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag not equal to overflow flag. */
- START_OF_INSTR();
- DECODE_PRINTF("JL\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- if (sf ^ of)
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7d
-****************************************************************************/
-void x86emuOp_jump_near_NL(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag not equal to overflow flag. */
- START_OF_INSTR();
- DECODE_PRINTF("JNL\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- /* note: inverse of above, but using == instead of xor. */
- if (sf == of)
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7e
-****************************************************************************/
-void x86emuOp_jump_near_LE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag not equal to overflow flag
- or the zero flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JLE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- if ((sf ^ of) || ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x7f
-****************************************************************************/
-void x86emuOp_jump_near_NLE(u8 X86EMU_UNUSED(op1))
-{
- s8 offset;
- u16 target;
- int sf, of;
-
- /* jump to byte offset if sign flag equal to overflow flag.
- and the zero flag is clear */
- START_OF_INSTR();
- DECODE_PRINTF("JNLE\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + (s16)offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- sf = ACCESS_FLAG(F_SF) != 0;
- of = ACCESS_FLAG(F_OF) != 0;
- if ((sf == of) && !ACCESS_FLAG(F_ZF))
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u8 (*opc80_byte_operation[])(u8 d, u8 s) =
-{
- add_byte, /* 00 */
- or_byte, /* 01 */
- adc_byte, /* 02 */
- sbb_byte, /* 03 */
- and_byte, /* 04 */
- sub_byte, /* 05 */
- xor_byte, /* 06 */
- cmp_byte, /* 07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x80
-****************************************************************************/
-void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 imm;
- u8 destval;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc80_byte_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u16 (*opc81_word_operation[])(u16 d, u16 s) =
-{
- add_word, /*00 */
- or_word, /*01 */
- adc_word, /*02 */
- sbb_word, /*03 */
- and_word, /*04 */
- sub_word, /*05 */
- xor_word, /*06 */
- cmp_word, /*07 */
-};
-
-static u32 (*opc81_long_operation[])(u32 d, u32 s) =
-{
- add_long, /*00 */
- or_long, /*01 */
- adc_long, /*02 */
- sbb_long, /*03 */
- and_long, /*04 */
- sub_long, /*05 */
- xor_long, /*06 */
- cmp_long, /*07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x81
-****************************************************************************/
-void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /*
- * Know operation, decode the mod byte to find the addressing
- * mode.
- */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 destval,imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- imm = fetch_long_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_long_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- } else {
- u16 *destreg;
- u16 destval,imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc81_word_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u8 (*opc82_byte_operation[])(u8 s, u8 d) =
-{
- add_byte, /*00 */
- or_byte, /*01 */ /*YYY UNUSED ???? */
- adc_byte, /*02 */
- sbb_byte, /*03 */
- and_byte, /*04 */ /*YYY UNUSED ???? */
- sub_byte, /*05 */
- xor_byte, /*06 */ /*YYY UNUSED ???? */
- cmp_byte, /*07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x82
-****************************************************************************/
-void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 imm;
- u8 destval;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction Similar to opcode 81, except that
- * the immediate byte is sign extended to a word length.
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- destval = fetch_data_byte(destoffset);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc82_byte_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-static u16 (*opc83_word_operation[])(u16 s, u16 d) =
-{
- add_word, /*00 */
- or_word, /*01 */ /*YYY UNUSED ???? */
- adc_word, /*02 */
- sbb_word, /*03 */
- and_word, /*04 */ /*YYY UNUSED ???? */
- sub_word, /*05 */
- xor_word, /*06 */ /*YYY UNUSED ???? */
- cmp_word, /*07 */
-};
-
-static u32 (*opc83_long_operation[])(u32 s, u32 d) =
-{
- add_long, /*00 */
- or_long, /*01 */ /*YYY UNUSED ???? */
- adc_long, /*02 */
- sbb_long, /*03 */
- and_long, /*04 */ /*YYY UNUSED ???? */
- sub_long, /*05 */
- xor_long, /*06 */ /*YYY UNUSED ???? */
- cmp_long, /*07 */
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x83
-****************************************************************************/
-void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /*
- * Weirdo special case instruction format. Part of the opcode
- * held below in "RH". Doubly nested case would result, except
- * that the decoded instruction Similar to opcode 81, except that
- * the immediate byte is sign extended to a word length.
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ADD\t");
- break;
- case 1:
- DECODE_PRINTF("OR\t");
- break;
- case 2:
- DECODE_PRINTF("ADC\t");
- break;
- case 3:
- DECODE_PRINTF("SBB\t");
- break;
- case 4:
- DECODE_PRINTF("AND\t");
- break;
- case 5:
- DECODE_PRINTF("SUB\t");
- break;
- case 6:
- DECODE_PRINTF("XOR\t");
- break;
- case 7:
- DECODE_PRINTF("CMP\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- destval = fetch_data_long(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- destval = fetch_data_word(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- destval = fetch_data_long(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- destval = fetch_data_word(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- destval = fetch_data_long(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_long(destoffset, destval);
- } else {
- u16 destval,imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- destval = fetch_data_word(destoffset);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (destval, imm);
- if (rh != 7)
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 destval,imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_long_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- } else {
- u16 *destreg;
- u16 destval,imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- imm = (s8) fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- destval = (*opc83_word_operation[rh]) (*destreg, imm);
- if (rh != 7)
- *destreg = destval;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x84
-****************************************************************************/
-void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("TEST\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(destval, *srcreg);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(destval, *srcreg);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(destval, *srcreg);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_byte(*destreg, *srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x85
-****************************************************************************/
-void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("TEST\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(destval, *srcreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(destval, *srcreg);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(destval, *srcreg);
- } else {
- u16 destval;
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(destval, *srcreg);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_long(*destreg, *srcreg);
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- test_word(*destreg, *srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x86
-****************************************************************************/
-void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
- u8 destval;
- u8 tmp;
-
- START_OF_INSTR();
- DECODE_PRINTF("XCHG\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_byte(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_byte(destoffset);
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = *destreg;
- *destreg = tmp;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x87
-****************************************************************************/
-void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("XCHG\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 destval,tmp;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_long(destoffset, destval);
- } else {
- u16 *srcreg;
- u16 destval,tmp;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 destval,tmp;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_long(destoffset, destval);
- } else {
- u16 *srcreg;
- u16 destval,tmp;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 destval,tmp;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_long(destoffset);
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_long(destoffset, destval);
- } else {
- u16 *srcreg;
- u16 destval,tmp;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- destval = fetch_data_word(destoffset);
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = destval;
- destval = tmp;
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 tmp;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = *destreg;
- *destreg = tmp;
- } else {
- u16 *destreg,*srcreg;
- u16 tmp;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- tmp = *srcreg;
- *srcreg = *destreg;
- *destreg = tmp;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x88
-****************************************************************************/
-void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_byte(destoffset, *srcreg);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_byte(destoffset, *srcreg);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_byte(destoffset, *srcreg);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x89
-****************************************************************************/
-void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_long(destoffset, *srcreg);
- } else {
- u16 *srcreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_word(destoffset, *srcreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_long(destoffset, *srcreg);
- } else {
- u16 *srcreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_word(destoffset, *srcreg);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_long(destoffset, *srcreg);
- } else {
- u16 *srcreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- store_data_word(destoffset, *srcreg);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg,*srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8a
-****************************************************************************/
-void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg, *srcreg;
- uint srcoffset;
- u8 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8b
-****************************************************************************/
-void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg, *srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg, *srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8c
-****************************************************************************/
-void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u16 *destreg, *srcreg;
- uint destoffset;
- u16 destval;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = *srcreg;
- store_data_word(destoffset, destval);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = *srcreg;
- store_data_word(destoffset, destval);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = *srcreg;
- store_data_word(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcreg = decode_rm_seg_register(rh);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8d
-****************************************************************************/
-void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u16 *srcreg;
- uint destoffset;
-
-/*
- * TODO: Need to handle address size prefix!
- *
- * lea eax,[eax+ebx*2] ??
- */
-
- START_OF_INSTR();
- DECODE_PRINTF("LEA\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *srcreg = (u16)destoffset;
- break;
- case 1:
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *srcreg = (u16)destoffset;
- break;
- case 2:
- srcreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *srcreg = (u16)destoffset;
- break;
- case 3: /* register to register */
- /* undefined. Do nothing. */
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8e
-****************************************************************************/
-void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u16 *destreg, *srcreg;
- uint srcoffset;
- u16 srcval;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = decode_rm_seg_register(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- /*
- * Clean up, and reset all the R_xSP pointers to the correct
- * locations. This is about 3x too much overhead (doing all the
- * segreg ptrs when only one is needed, but this instruction
- * *cannot* be that common, and this isn't too much work anyway.
- */
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x8f
-****************************************************************************/
-void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("POP\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_long();
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_word();
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_long();
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_word();
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_long();
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- destval = pop_word();
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = pop_long();
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = pop_word();
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x90
-****************************************************************************/
-void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("NOP\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x91
-****************************************************************************/
-void x86emuOp_xchg_word_AX_CX(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,ECX\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,CX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_ECX;
- M.x86.R_ECX = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_CX;
- M.x86.R_CX = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x92
-****************************************************************************/
-void x86emuOp_xchg_word_AX_DX(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EDX\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,DX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EDX;
- M.x86.R_EDX = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_DX;
- M.x86.R_DX = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x93
-****************************************************************************/
-void x86emuOp_xchg_word_AX_BX(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EBX\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,BX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EBX;
- M.x86.R_EBX = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_BX;
- M.x86.R_BX = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x94
-****************************************************************************/
-void x86emuOp_xchg_word_AX_SP(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,ESP\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,SP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_ESP;
- M.x86.R_ESP = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_SP;
- M.x86.R_SP = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x95
-****************************************************************************/
-void x86emuOp_xchg_word_AX_BP(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EBP\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,BP\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EBP;
- M.x86.R_EBP = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_BP;
- M.x86.R_BP = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x96
-****************************************************************************/
-void x86emuOp_xchg_word_AX_SI(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,ESI\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,SI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_ESI;
- M.x86.R_ESI = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_SI;
- M.x86.R_SI = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x97
-****************************************************************************/
-void x86emuOp_xchg_word_AX_DI(u8 X86EMU_UNUSED(op1))
-{
- u32 tmp;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("XCHG\tEAX,EDI\n");
- } else {
- DECODE_PRINTF("XCHG\tAX,DI\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- tmp = M.x86.R_EAX;
- M.x86.R_EAX = M.x86.R_EDI;
- M.x86.R_EDI = tmp;
- } else {
- tmp = M.x86.R_AX;
- M.x86.R_AX = M.x86.R_DI;
- M.x86.R_DI = (u16)tmp;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x98
-****************************************************************************/
-void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CWDE\n");
- } else {
- DECODE_PRINTF("CBW\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- if (M.x86.R_AX & 0x8000) {
- M.x86.R_EAX |= 0xffff0000;
- } else {
- M.x86.R_EAX &= 0x0000ffff;
- }
- } else {
- if (M.x86.R_AL & 0x80) {
- M.x86.R_AH = 0xff;
- } else {
- M.x86.R_AH = 0x0;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x99
-****************************************************************************/
-void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CDQ\n");
- } else {
- DECODE_PRINTF("CWD\n");
- }
- DECODE_PRINTF("CWD\n");
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- if (M.x86.R_EAX & 0x80000000) {
- M.x86.R_EDX = 0xffffffff;
- } else {
- M.x86.R_EDX = 0x0;
- }
- } else {
- if (M.x86.R_AX & 0x8000) {
- M.x86.R_DX = 0xffff;
- } else {
- M.x86.R_DX = 0x0;
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9a
-****************************************************************************/
-void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 farseg, faroff;
-
- START_OF_INSTR();
- DECODE_PRINTF("CALL\t");
- faroff = fetch_word_imm();
- farseg = fetch_word_imm();
- DECODE_PRINTF2("%04x:", farseg);
- DECODE_PRINTF2("%04x\n", faroff);
- CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
-
- /* XXX
- *
- * Hooked interrupt vectors calling into our "BIOS" will cause
- * problems unless all intersegment stuff is checked for BIOS
- * access. Check needed here. For moment, let it alone.
- */
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = farseg;
- push_word(M.x86.R_IP);
- M.x86.R_IP = faroff;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9b
-****************************************************************************/
-void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("WAIT");
- TRACE_AND_STEP();
- /* NADA. */
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9c
-****************************************************************************/
-void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
-{
- u32 flags;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("PUSHFD\n");
- } else {
- DECODE_PRINTF("PUSHF\n");
- }
- TRACE_AND_STEP();
-
- /* clear out *all* bits not representing flags, and turn on real bits */
- flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON;
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- push_long(flags);
- } else {
- push_word((u16)flags);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9d
-****************************************************************************/
-void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("POPFD\n");
- } else {
- DECODE_PRINTF("POPF\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EFLG = pop_long();
- } else {
- M.x86.R_FLG = pop_word();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9e
-****************************************************************************/
-void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("SAHF\n");
- TRACE_AND_STEP();
- /* clear the lower bits of the flag register */
- M.x86.R_FLG &= 0xffffff00;
- /* or in the AH register into the flags register */
- M.x86.R_FLG |= M.x86.R_AH;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x9f
-****************************************************************************/
-void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("LAHF\n");
- TRACE_AND_STEP();
- M.x86.R_AH = (u8)(M.x86.R_FLG & 0xff);
- /*undocumented TC++ behavior??? Nope. It's documented, but
- you have too look real hard to notice it. */
- M.x86.R_AH |= 0x2;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa0
-****************************************************************************/
-void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tAL,");
- offset = fetch_word_imm();
- DECODE_PRINTF2("[%04x]\n", offset);
- TRACE_AND_STEP();
- M.x86.R_AL = fetch_data_byte(offset);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa1
-****************************************************************************/
-void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- offset = fetch_word_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset);
- } else {
- DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = fetch_data_long(offset);
- } else {
- M.x86.R_AX = fetch_data_word(offset);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa2
-****************************************************************************/
-void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- offset = fetch_word_imm();
- DECODE_PRINTF2("[%04x],AL\n", offset);
- TRACE_AND_STEP();
- store_data_byte(offset, M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa3
-****************************************************************************/
-void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 offset;
-
- START_OF_INSTR();
- offset = fetch_word_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset);
- } else {
- DECODE_PRINTF2("MOV\t[%04x],AX\n", offset);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- store_data_long(offset, M.x86.R_EAX);
- } else {
- store_data_word(offset, M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa4
-****************************************************************************/
-void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
-{
- u8 val;
- u32 count;
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVS\tBYTE\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- val = fetch_data_byte(M.x86.R_SI);
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val);
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa5
-****************************************************************************/
-void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
-{
- u32 val;
- int inc;
- u32 count;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOVS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("MOVS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long(M.x86.R_SI);
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val);
- } else {
- val = fetch_data_word(M.x86.R_SI);
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val);
- }
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa6
-****************************************************************************/
-void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
-{
- s8 val1, val2;
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("CMPS\tBYTE\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
-
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val1 = fetch_data_byte(M.x86.R_SI);
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(val1, val2);
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val1 = fetch_data_byte(M.x86.R_SI);
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(val1, val2);
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- val1 = fetch_data_byte(M.x86.R_SI);
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(val1, val2);
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa7
-****************************************************************************/
-void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
-{
- u32 val1,val2;
- int inc;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("CMPS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("CMPS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val1 = fetch_data_long(M.x86.R_SI);
- val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(val1, val2);
- } else {
- val1 = fetch_data_word(M.x86.R_SI);
- val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word((u16)val1, (u16)val2);
- }
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val1 = fetch_data_long(M.x86.R_SI);
- val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(val1, val2);
- } else {
- val1 = fetch_data_word(M.x86.R_SI);
- val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word((u16)val1, (u16)val2);
- }
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val1 = fetch_data_long(M.x86.R_SI);
- val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(val1, val2);
- } else {
- val1 = fetch_data_word(M.x86.R_SI);
- val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word((u16)val1, (u16)val2);
- }
- M.x86.R_SI += inc;
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa8
-****************************************************************************/
-void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- int imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("TEST\tAL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%04x\n", imm);
- TRACE_AND_STEP();
- test_byte(M.x86.R_AL, (u8)imm);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xa9
-****************************************************************************/
-void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("TEST\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("TEST\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- test_long(M.x86.R_EAX, srcval);
- } else {
- test_word(M.x86.R_AX, (u16)srcval);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xaa
-****************************************************************************/
-void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
-{
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("STOS\tBYTE\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- TRACE_AND_STEP();
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xab
-****************************************************************************/
-void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
-{
- int inc;
- u32 count;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("STOS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("STOS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX);
- } else {
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
- }
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xac
-****************************************************************************/
-void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
-{
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("LODS\tBYTE\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
- M.x86.R_CX -= 1;
- M.x86.R_SI += inc;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
- M.x86.R_SI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xad
-****************************************************************************/
-void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
-{
- int inc;
- u32 count;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("LODS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("LODS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- count = 1;
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* move them until CX is ZERO. */
- count = M.x86.R_CX;
- M.x86.R_CX = 0;
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- }
- while (count--) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = fetch_data_long(M.x86.R_SI);
- } else {
- M.x86.R_AX = fetch_data_word(M.x86.R_SI);
- }
- M.x86.R_SI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xae
-****************************************************************************/
-void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
-{
- s8 val2;
- int inc;
-
- START_OF_INSTR();
- DECODE_PRINTF("SCAS\tBYTE\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -1;
- else
- inc = 1;
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(M.x86.R_AL, val2);
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(M.x86.R_AL, val2);
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_byte(M.x86.R_AL, val2);
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xaf
-****************************************************************************/
-void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
-{
- int inc;
- u32 val;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("SCAS\tDWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -4;
- else
- inc = 4;
- } else {
- DECODE_PRINTF("SCAS\tWORD\n");
- if (ACCESS_FLAG(F_DF)) /* down */
- inc = -2;
- else
- inc = 2;
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_REPE) {
- /* REPE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(M.x86.R_EAX, val);
- } else {
- val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word(M.x86.R_AX, (u16)val);
- }
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF) == 0)
- break;
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPE;
- } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
- /* REPNE */
- /* move them until CX is ZERO. */
- while (M.x86.R_CX != 0) {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(M.x86.R_EAX, val);
- } else {
- val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word(M.x86.R_AX, (u16)val);
- }
- M.x86.R_CX -= 1;
- M.x86.R_DI += inc;
- if (ACCESS_FLAG(F_ZF))
- break; /* zero flag set means equal */
- }
- M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
- } else {
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_long(M.x86.R_EAX, val);
- } else {
- val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
- cmp_word(M.x86.R_AX, (u16)val);
- }
- M.x86.R_DI += inc;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb0
-****************************************************************************/
-void x86emuOp_mov_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tAL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_AL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb1
-****************************************************************************/
-void x86emuOp_mov_byte_CL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tCL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_CL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb2
-****************************************************************************/
-void x86emuOp_mov_byte_DL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tDL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_DL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb3
-****************************************************************************/
-void x86emuOp_mov_byte_BL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tBL,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_BL = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb4
-****************************************************************************/
-void x86emuOp_mov_byte_AH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tAH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_AH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb5
-****************************************************************************/
-void x86emuOp_mov_byte_CH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tCH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_CH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb6
-****************************************************************************/
-void x86emuOp_mov_byte_DH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tDH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_DH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb7
-****************************************************************************/
-void x86emuOp_mov_byte_BH_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\tBH,");
- imm = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", imm);
- TRACE_AND_STEP();
- M.x86.R_BH = imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb8
-****************************************************************************/
-void x86emuOp_mov_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEAX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tAX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = srcval;
- } else {
- M.x86.R_AX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xb9
-****************************************************************************/
-void x86emuOp_mov_word_CX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tECX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tCX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = srcval;
- } else {
- M.x86.R_CX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xba
-****************************************************************************/
-void x86emuOp_mov_word_DX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEDX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tDX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDX = srcval;
- } else {
- M.x86.R_DX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbb
-****************************************************************************/
-void x86emuOp_mov_word_BX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEBX,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tBX,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBX = srcval;
- } else {
- M.x86.R_BX = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbc
-****************************************************************************/
-void x86emuOp_mov_word_SP_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tESP,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tSP,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESP = srcval;
- } else {
- M.x86.R_SP = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbd
-****************************************************************************/
-void x86emuOp_mov_word_BP_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEBP,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tBP,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EBP = srcval;
- } else {
- M.x86.R_BP = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbe
-****************************************************************************/
-void x86emuOp_mov_word_SI_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tESI,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tSI,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ESI = srcval;
- } else {
- M.x86.R_SI = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xbf
-****************************************************************************/
-void x86emuOp_mov_word_DI_IMM(u8 X86EMU_UNUSED(op1))
-{
- u32 srcval;
-
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("MOV\tEDI,");
- srcval = fetch_long_imm();
- } else {
- DECODE_PRINTF("MOV\tDI,");
- srcval = fetch_word_imm();
- }
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EDI = srcval;
- } else {
- M.x86.R_DI = (u16)srcval;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* used by opcodes c0, d0, and d2. */
-static u8(*opcD0_byte_operation[])(u8 d, u8 s) =
-{
- rol_byte,
- ror_byte,
- rcl_byte,
- rcr_byte,
- shl_byte,
- shr_byte,
- shl_byte, /* sal_byte === shl_byte by definition */
- sar_byte,
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc0
-****************************************************************************/
-void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* used by opcodes c1, d1, and d3. */
-static u16(*opcD1_word_operation[])(u16 s, u8 d) =
-{
- rol_word,
- ror_word,
- rcl_word,
- rcr_word,
- shl_word,
- shr_word,
- shl_word, /* sal_byte === shl_byte by definition */
- sar_word,
-};
-
-/* used by opcodes c1, d1, and d3. */
-static u32 (*opcD1_long_operation[])(u32 s, u8 d) =
-{
- rol_long,
- ror_long,
- rcl_long,
- rcr_long,
- shl_long,
- shr_long,
- shl_long, /* sal_byte === shl_byte by definition */
- sar_long,
-};
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc1
-****************************************************************************/
-void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- TRACE_AND_STEP();
- *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- amt = fetch_byte_imm();
- DECODE_PRINTF2(",%x\n", amt);
- TRACE_AND_STEP();
- *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc2
-****************************************************************************/
-void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("RET\t");
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- M.x86.R_SP += imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc3
-****************************************************************************/
-void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("RET\n");
- RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc4
-****************************************************************************/
-void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LES\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_ES = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_ES = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_ES = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc5
-****************************************************************************/
-void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LDS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_DS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_DS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_DS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc6
-****************************************************************************/
-void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- store_data_byte(destoffset, imm);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- store_data_byte(destoffset, imm);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- store_data_byte(destoffset, imm);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- imm = fetch_byte_imm();
- DECODE_PRINTF2(",%2x\n", imm);
- TRACE_AND_STEP();
- *destreg = imm;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc7
-****************************************************************************/
-void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOV\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- if (rh != 0) {
- DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_long(destoffset, imm);
- } else {
- u16 imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_word(destoffset, imm);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_long(destoffset, imm);
- } else {
- u16 imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_word(destoffset, imm);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 imm;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_long(destoffset, imm);
- } else {
- u16 imm;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- store_data_word(destoffset, imm);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 imm;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- imm = fetch_long_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- *destreg = imm;
- } else {
- u16 *destreg;
- u16 imm;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- imm = fetch_word_imm();
- DECODE_PRINTF2(",%x\n", imm);
- TRACE_AND_STEP();
- *destreg = imm;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc8
-****************************************************************************/
-void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
-{
- u16 local,frame_pointer;
- u8 nesting;
- int i;
-
- START_OF_INSTR();
- local = fetch_word_imm();
- nesting = fetch_byte_imm();
- DECODE_PRINTF2("ENTER %x\n", local);
- DECODE_PRINTF2(",%x\n", nesting);
- TRACE_AND_STEP();
- push_word(M.x86.R_BP);
- frame_pointer = M.x86.R_SP;
- if (nesting > 0) {
- for (i = 1; i < nesting; i++) {
- M.x86.R_BP -= 2;
- push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP));
- }
- push_word(frame_pointer);
- }
- M.x86.R_BP = frame_pointer;
- M.x86.R_SP = (u16)(M.x86.R_SP - local);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xc9
-****************************************************************************/
-void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("LEAVE\n");
- TRACE_AND_STEP();
- M.x86.R_SP = M.x86.R_BP;
- M.x86.R_BP = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xca
-****************************************************************************/
-void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 imm;
-
- START_OF_INSTR();
- DECODE_PRINTF("RETF\t");
- imm = fetch_word_imm();
- DECODE_PRINTF2("%x\n", imm);
- RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- M.x86.R_CS = pop_word();
- M.x86.R_SP += imm;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcb
-****************************************************************************/
-void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("RETF\n");
- RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
- TRACE_AND_STEP();
- M.x86.R_IP = pop_word();
- M.x86.R_CS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcc
-****************************************************************************/
-void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
-{
- u16 tmp;
-
- START_OF_INSTR();
- DECODE_PRINTF("INT 3\n");
- tmp = (u16) mem_access_word(3 * 4 + 2);
- /* access the segment register */
- TRACE_AND_STEP();
- if (_X86EMU_intrTab[3]) {
- (*_X86EMU_intrTab[3])(3);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(3 * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(3 * 4);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcd
-****************************************************************************/
-void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 tmp;
- u8 intnum;
-
- START_OF_INSTR();
- DECODE_PRINTF("INT\t");
- intnum = fetch_byte_imm();
- DECODE_PRINTF2("%x\n", intnum);
- tmp = mem_access_word(intnum * 4 + 2);
- TRACE_AND_STEP();
- if (_X86EMU_intrTab[intnum]) {
- (*_X86EMU_intrTab[intnum])(intnum);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(intnum * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(intnum * 4);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xce
-****************************************************************************/
-void x86emuOp_into(u8 X86EMU_UNUSED(op1))
-{
- u16 tmp;
-
- START_OF_INSTR();
- DECODE_PRINTF("INTO\n");
- TRACE_AND_STEP();
- if (ACCESS_FLAG(F_OF)) {
- tmp = mem_access_word(4 * 4 + 2);
- if (_X86EMU_intrTab[4]) {
- (*_X86EMU_intrTab[4])(4);
- } else {
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(4 * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(4 * 4);
- }
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xcf
-****************************************************************************/
-void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("IRET\n");
-
- TRACE_AND_STEP();
-
- M.x86.R_IP = pop_word();
- M.x86.R_CS = pop_word();
- M.x86.R_FLG = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd0
-****************************************************************************/
-void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, 1);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, 1);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, 1);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",1\n");
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (*destreg, 1);
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd1
-****************************************************************************/
-void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, 1);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, 1);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, 1);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, 1);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, 1);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",1\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, 1);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",1\n");
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (*destreg, 1);
- *destreg = destval;
- } else {
- u16 destval;
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",1\n");
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (*destreg, 1);
- *destreg = destval;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd2
-****************************************************************************/
-void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- amt = M.x86.R_CL;
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (destval, amt);
- store_data_byte(destoffset, destval);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
- *destreg = destval;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd3
-****************************************************************************/
-void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 amt;
-
- /*
- * Yet another weirdo special case instruction format. Part of
- * the opcode held below in "RH". Doubly nested case would
- * result, except that the decoded instruction
- */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
- switch (rh) {
- case 0:
- DECODE_PRINTF("ROL\t");
- break;
- case 1:
- DECODE_PRINTF("ROR\t");
- break;
- case 2:
- DECODE_PRINTF("RCL\t");
- break;
- case 3:
- DECODE_PRINTF("RCR\t");
- break;
- case 4:
- DECODE_PRINTF("SHL\t");
- break;
- case 5:
- DECODE_PRINTF("SHR\t");
- break;
- case 6:
- DECODE_PRINTF("SAL\t");
- break;
- case 7:
- DECODE_PRINTF("SAR\t");
- break;
- }
- }
-#endif
- /* know operation, decode the mod byte to find the addressing
- mode. */
- amt = M.x86.R_CL;
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_long_operation[rh]) (destval, amt);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("WORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",CL\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = (*opcD1_word_operation[rh]) (destval, amt);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd4
-****************************************************************************/
-void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
-{
- u8 a;
-
- START_OF_INSTR();
- DECODE_PRINTF("AAM\n");
- a = fetch_byte_imm(); /* this is a stupid encoding. */
- if (a != 10) {
- DECODE_PRINTF("ERROR DECODING AAM\n");
- TRACE_REGS();
- HALT_SYS();
- }
- TRACE_AND_STEP();
- /* note the type change here --- returning AL and AH in AX. */
- M.x86.R_AX = aam_word(M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd5
-****************************************************************************/
-void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
-{
- u8 a;
-
- START_OF_INSTR();
- DECODE_PRINTF("AAD\n");
- a = fetch_byte_imm();
- TRACE_AND_STEP();
- M.x86.R_AX = aad_word(M.x86.R_AX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* opcode 0xd6 ILLEGAL OPCODE */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xd7
-****************************************************************************/
-void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
-{
- u16 addr;
-
- START_OF_INSTR();
- DECODE_PRINTF("XLAT\n");
- TRACE_AND_STEP();
- addr = (u16)(M.x86.R_BX + (u8)M.x86.R_AL);
- M.x86.R_AL = fetch_data_byte(addr);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/* instuctions D8 .. DF are in i87_ops.c */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe0
-****************************************************************************/
-void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("LOOPNE\t");
- ip = (s8) fetch_byte_imm();
- ip += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_CX -= 1;
- if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe1
-****************************************************************************/
-void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("LOOPE\t");
- ip = (s8) fetch_byte_imm();
- ip += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_CX -= 1;
- if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe2
-****************************************************************************/
-void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("LOOP\t");
- ip = (s8) fetch_byte_imm();
- ip += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_CX -= 1;
- if (M.x86.R_CX != 0)
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe3
-****************************************************************************/
-void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
-{
- u16 target;
- s8 offset;
-
- /* jump to byte offset if overflow flag is set */
- START_OF_INSTR();
- DECODE_PRINTF("JCXZ\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- if (M.x86.R_CX == 0)
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe4
-****************************************************************************/
-void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("IN\t");
- port = (u8) fetch_byte_imm();
- DECODE_PRINTF2("%x,AL\n", port);
- TRACE_AND_STEP();
- M.x86.R_AL = (*sys_inb)(port);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe5
-****************************************************************************/
-void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("IN\t");
- port = (u8) fetch_byte_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("EAX,%x\n", port);
- } else {
- DECODE_PRINTF2("AX,%x\n", port);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = (*sys_inl)(port);
- } else {
- M.x86.R_AX = (*sys_inw)(port);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe6
-****************************************************************************/
-void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("OUT\t");
- port = (u8) fetch_byte_imm();
- DECODE_PRINTF2("%x,AL\n", port);
- TRACE_AND_STEP();
- (*sys_outb)(port, M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe7
-****************************************************************************/
-void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
-{
- u8 port;
-
- START_OF_INSTR();
- DECODE_PRINTF("OUT\t");
- port = (u8) fetch_byte_imm();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF2("%x,EAX\n", port);
- } else {
- DECODE_PRINTF2("%x,AX\n", port);
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- (*sys_outl)(port, M.x86.R_EAX);
- } else {
- (*sys_outw)(port, M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe8
-****************************************************************************/
-void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
-{
- s16 ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("CALL\t");
- ip = (s16) fetch_word_imm();
- ip += (s16) M.x86.R_IP; /* CHECK SIGN */
- DECODE_PRINTF2("%04x\n", ip);
- CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, "");
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xe9
-****************************************************************************/
-void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
-{
- int ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("JMP\t");
- ip = (s16)fetch_word_imm();
- ip += (s16)M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_IP = (u16)ip;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xea
-****************************************************************************/
-void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 cs, ip;
-
- START_OF_INSTR();
- DECODE_PRINTF("JMP\tFAR ");
- ip = fetch_word_imm();
- cs = fetch_word_imm();
- DECODE_PRINTF2("%04x:", cs);
- DECODE_PRINTF2("%04x\n", ip);
- TRACE_AND_STEP();
- M.x86.R_IP = ip;
- M.x86.R_CS = cs;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xeb
-****************************************************************************/
-void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
-{
- u16 target;
- s8 offset;
-
- START_OF_INSTR();
- DECODE_PRINTF("JMP\t");
- offset = (s8)fetch_byte_imm();
- target = (u16)(M.x86.R_IP + offset);
- DECODE_PRINTF2("%x\n", target);
- TRACE_AND_STEP();
- M.x86.R_IP = target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xec
-****************************************************************************/
-void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("IN\tAL,DX\n");
- TRACE_AND_STEP();
- M.x86.R_AL = (*sys_inb)(M.x86.R_DX);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xed
-****************************************************************************/
-void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("IN\tEAX,DX\n");
- } else {
- DECODE_PRINTF("IN\tAX,DX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_EAX = (*sys_inl)(M.x86.R_DX);
- } else {
- M.x86.R_AX = (*sys_inw)(M.x86.R_DX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xee
-****************************************************************************/
-void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("OUT\tDX,AL\n");
- TRACE_AND_STEP();
- (*sys_outb)(M.x86.R_DX, M.x86.R_AL);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xef
-****************************************************************************/
-void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("OUT\tDX,EAX\n");
- } else {
- DECODE_PRINTF("OUT\tDX,AX\n");
- }
- TRACE_AND_STEP();
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- (*sys_outl)(M.x86.R_DX, M.x86.R_EAX);
- } else {
- (*sys_outw)(M.x86.R_DX, M.x86.R_AX);
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf0
-****************************************************************************/
-void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("LOCK:\n");
- TRACE_AND_STEP();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/*opcode 0xf1 ILLEGAL OPERATION */
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf2
-****************************************************************************/
-void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("REPNE\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_REPNE;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf3
-****************************************************************************/
-void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("REPE\n");
- TRACE_AND_STEP();
- M.x86.mode |= SYSMODE_PREFIX_REPE;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf4
-****************************************************************************/
-void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
-{
- START_OF_INSTR();
- DECODE_PRINTF("HALT\n");
- TRACE_AND_STEP();
- HALT_SYS();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf5
-****************************************************************************/
-void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
-{
- /* complement the carry flag. */
- START_OF_INSTR();
- DECODE_PRINTF("CMC\n");
- TRACE_AND_STEP();
- TOGGLE_FLAG(F_CF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf6
-****************************************************************************/
-void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- u8 *destreg;
- uint destoffset;
- u8 destval, srcval;
-
- /* long, drawn out code follows. Double switch for a total
- of 32 cases. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0: /* mod=00 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- test_byte(destval, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = not_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 3:
- DECODE_PRINTF("NEG\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = neg_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 4:
- DECODE_PRINTF("MUL\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- mul_byte(destval);
- break;
- case 5:
- DECODE_PRINTF("IMUL\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- imul_byte(destval);
- break;
- case 6:
- DECODE_PRINTF("DIV\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- div_byte(destval);
- break;
- case 7:
- DECODE_PRINTF("IDIV\tBYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- idiv_byte(destval);
- break;
- }
- break; /* end mod==00 */
- case 1: /* mod=01 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- test_byte(destval, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = not_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 3:
- DECODE_PRINTF("NEG\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = neg_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 4:
- DECODE_PRINTF("MUL\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- mul_byte(destval);
- break;
- case 5:
- DECODE_PRINTF("IMUL\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- imul_byte(destval);
- break;
- case 6:
- DECODE_PRINTF("DIV\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- div_byte(destval);
- break;
- case 7:
- DECODE_PRINTF("IDIV\tBYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- idiv_byte(destval);
- break;
- }
- break; /* end mod==01 */
- case 2: /* mod=10 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- test_byte(destval, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = not_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 3:
- DECODE_PRINTF("NEG\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = neg_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 4:
- DECODE_PRINTF("MUL\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- mul_byte(destval);
- break;
- case 5:
- DECODE_PRINTF("IMUL\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- imul_byte(destval);
- break;
- case 6:
- DECODE_PRINTF("DIV\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- div_byte(destval);
- break;
- case 7:
- DECODE_PRINTF("IDIV\tBYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- idiv_byte(destval);
- break;
- }
- break; /* end mod==10 */
- case 3: /* mod=11 */
- switch (rh) {
- case 0: /* test byte imm */
- DECODE_PRINTF("TEST\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF(",");
- srcval = fetch_byte_imm();
- DECODE_PRINTF2("%02x\n", srcval);
- TRACE_AND_STEP();
- test_byte(*destreg, srcval);
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- DECODE_PRINTF("NOT\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = not_byte(*destreg);
- break;
- case 3:
- DECODE_PRINTF("NEG\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = neg_byte(*destreg);
- break;
- case 4:
- DECODE_PRINTF("MUL\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- mul_byte(*destreg); /*!!! */
- break;
- case 5:
- DECODE_PRINTF("IMUL\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- imul_byte(*destreg);
- break;
- case 6:
- DECODE_PRINTF("DIV\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- div_byte(*destreg);
- break;
- case 7:
- DECODE_PRINTF("IDIV\t");
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- idiv_byte(*destreg);
- break;
- }
- break; /* end mod==11 */
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf7
-****************************************************************************/
-void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rl, rh;
- uint destoffset;
-
- /* long, drawn out code follows. Double switch for a total
- of 32 cases. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0: /* mod=00 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,srcval;
-
- DECODE_PRINTF("TEST\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- test_long(destval, srcval);
- } else {
- u16 destval,srcval;
-
- DECODE_PRINTF("TEST\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- test_word(destval, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NOT\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = not_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NOT\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = not_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NEG\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = neg_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NEG\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = neg_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("MUL\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- mul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("MUL\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- mul_word(destval);
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IMUL\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- imul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IMUL\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- imul_word(destval);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DIV\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- div_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("DIV\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- div_word(destval);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IDIV\tDWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- idiv_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IDIV\tWORD PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- idiv_word(destval);
- }
- break;
- }
- break; /* end mod==00 */
- case 1: /* mod=01 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,srcval;
-
- DECODE_PRINTF("TEST\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- test_long(destval, srcval);
- } else {
- u16 destval,srcval;
-
- DECODE_PRINTF("TEST\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- test_word(destval, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NOT\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = not_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NOT\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = not_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NEG\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = neg_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NEG\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = neg_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("MUL\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- mul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("MUL\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- mul_word(destval);
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IMUL\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- imul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IMUL\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- imul_word(destval);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DIV\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- div_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("DIV\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- div_word(destval);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IDIV\tDWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- idiv_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IDIV\tWORD PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- idiv_word(destval);
- }
- break;
- }
- break; /* end mod==01 */
- case 2: /* mod=10 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval,srcval;
-
- DECODE_PRINTF("TEST\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- test_long(destval, srcval);
- } else {
- u16 destval,srcval;
-
- DECODE_PRINTF("TEST\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- test_word(destval, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NOT\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = not_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NOT\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = not_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("NEG\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = neg_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("NEG\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = neg_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("MUL\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- mul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("MUL\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- mul_word(destval);
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IMUL\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- imul_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IMUL\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- imul_word(destval);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("DIV\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- div_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("DIV\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- div_word(destval);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- DECODE_PRINTF("IDIV\tDWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- idiv_long(destval);
- } else {
- u16 destval;
-
- DECODE_PRINTF("IDIV\tWORD PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- idiv_word(destval);
- }
- break;
- }
- break; /* end mod==10 */
- case 3: /* mod=11 */
- switch (rh) {
- case 0: /* test word imm */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- DECODE_PRINTF("TEST\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- srcval = fetch_long_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- test_long(*destreg, srcval);
- } else {
- u16 *destreg;
- u16 srcval;
-
- DECODE_PRINTF("TEST\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- srcval = fetch_word_imm();
- DECODE_PRINTF2("%x\n", srcval);
- TRACE_AND_STEP();
- test_word(*destreg, srcval);
- }
- break;
- case 1:
- DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
- HALT_SYS();
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("NOT\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = not_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("NOT\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = not_word(*destreg);
- }
- break;
- case 3:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("NEG\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = neg_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("NEG\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = neg_word(*destreg);
- }
- break;
- case 4:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("MUL\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- mul_long(*destreg); /*!!! */
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("MUL\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- mul_word(*destreg); /*!!! */
- }
- break;
- case 5:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("IMUL\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- imul_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("IMUL\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- imul_word(*destreg);
- }
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("DIV\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- div_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("DIV\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- div_word(*destreg);
- }
- break;
- case 7:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- DECODE_PRINTF("IDIV\t");
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- idiv_long(*destreg);
- } else {
- u16 *destreg;
-
- DECODE_PRINTF("IDIV\t");
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- idiv_word(*destreg);
- }
- break;
- }
- break; /* end mod==11 */
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf8
-****************************************************************************/
-void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
-{
- /* clear the carry flag. */
- START_OF_INSTR();
- DECODE_PRINTF("CLC\n");
- TRACE_AND_STEP();
- CLEAR_FLAG(F_CF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xf9
-****************************************************************************/
-void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
-{
- /* set the carry flag. */
- START_OF_INSTR();
- DECODE_PRINTF("STC\n");
- TRACE_AND_STEP();
- SET_FLAG(F_CF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfa
-****************************************************************************/
-void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
-{
- /* clear interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("CLI\n");
- TRACE_AND_STEP();
- CLEAR_FLAG(F_IF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfb
-****************************************************************************/
-void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
-{
- /* enable interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("STI\n");
- TRACE_AND_STEP();
- SET_FLAG(F_IF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfc
-****************************************************************************/
-void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
-{
- /* clear interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("CLD\n");
- TRACE_AND_STEP();
- CLEAR_FLAG(F_DF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfd
-****************************************************************************/
-void x86emuOp_std(u8 X86EMU_UNUSED(op1))
-{
- /* clear interrupts. */
- START_OF_INSTR();
- DECODE_PRINTF("STD\n");
- TRACE_AND_STEP();
- SET_FLAG(F_DF);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xfe
-****************************************************************************/
-void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- u8 destval;
- uint destoffset;
- u8 *destreg;
-
- /* Yet another special case instruction. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- DECODE_PRINTF("INC\t");
- break;
- case 1:
- DECODE_PRINTF("DEC\t");
- break;
- case 2:
- case 3:
- case 4:
- case 5:
- case 6:
- case 7:
- DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod);
- HALT_SYS();
- break;
- }
- }
-#endif
- switch (mod) {
- case 0:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0: /* inc word ptr ... */
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = inc_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 1: /* dec word ptr ... */
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = dec_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- }
- break;
- case 1:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = inc_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = dec_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- }
- break;
- case 2:
- DECODE_PRINTF("BYTE PTR ");
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = inc_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- case 1:
- destval = fetch_data_byte(destoffset);
- TRACE_AND_STEP();
- destval = dec_byte(destval);
- store_data_byte(destoffset, destval);
- break;
- }
- break;
- case 3:
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- TRACE_AND_STEP();
- *destreg = inc_byte(*destreg);
- break;
- case 1:
- TRACE_AND_STEP();
- *destreg = dec_byte(*destreg);
- break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0xff
-****************************************************************************/
-void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
-{
- int mod, rh, rl;
- uint destoffset = 0;
- u16 *destreg;
- u16 destval,destval2;
-
- /* Yet another special case instruction. */
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
-#ifdef DEBUG
- if (DEBUG_DECODE()) {
- /* XXX DECODE_PRINTF may be changed to something more
- general, so that it is important to leave the strings
- in the same format, even though the result is that the
- above test is done twice. */
-
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("INC\tDWORD PTR ");
- } else {
- DECODE_PRINTF("INC\tWORD PTR ");
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- DECODE_PRINTF("DEC\tDWORD PTR ");
- } else {
- DECODE_PRINTF("DEC\tWORD PTR ");
- }
- break;
- case 2:
- DECODE_PRINTF("CALL\t ");
- break;
- case 3:
- DECODE_PRINTF("CALL\tFAR ");
- break;
- case 4:
- DECODE_PRINTF("JMP\t");
- break;
- case 5:
- DECODE_PRINTF("JMP\tFAR ");
- break;
- case 6:
- DECODE_PRINTF("PUSH\t");
- break;
- case 7:
- DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
- HALT_SYS();
- break;
- }
- }
-#endif
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0: /* inc word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = inc_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = inc_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 1: /* dec word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = dec_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = dec_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 2: /* call word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 3: /* call far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = destval2;
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 4: /* jmp word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- break;
- case 5: /* jmp far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- M.x86.R_CS = destval2;
- break;
- case 6: /* push word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- push_long(destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(destval);
- }
- break;
- }
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = inc_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = inc_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = dec_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = dec_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 2: /* call word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 3: /* call far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = destval2;
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 4: /* jmp word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- break;
- case 5: /* jmp far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- M.x86.R_CS = destval2;
- break;
- case 6: /* push word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- push_long(destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(destval);
- }
- break;
- }
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = inc_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = inc_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- destval = dec_long(destval);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- destval = dec_word(destval);
- store_data_word(destoffset, destval);
- }
- break;
- case 2: /* call word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 3: /* call far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- push_word(M.x86.R_CS);
- M.x86.R_CS = destval2;
- push_word(M.x86.R_IP);
- M.x86.R_IP = destval;
- break;
- case 4: /* jmp word ptr ... */
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- break;
- case 5: /* jmp far ptr ... */
- destval = fetch_data_word(destoffset);
- destval2 = fetch_data_word(destoffset + 2);
- TRACE_AND_STEP();
- M.x86.R_IP = destval;
- M.x86.R_CS = destval2;
- break;
- case 6: /* push word ptr ... */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
-
- destval = fetch_data_long(destoffset);
- TRACE_AND_STEP();
- push_long(destval);
- } else {
- u16 destval;
-
- destval = fetch_data_word(destoffset);
- TRACE_AND_STEP();
- push_word(destval);
- }
- break;
- }
- break;
- case 3:
- switch (rh) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = inc_long(*destreg);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = inc_word(*destreg);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = dec_long(*destreg);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = dec_word(*destreg);
- }
- break;
- case 2: /* call word ptr ... */
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_IP);
- M.x86.R_IP = *destreg;
- break;
- case 3: /* jmp far ptr ... */
- DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
- TRACE_AND_STEP();
- HALT_SYS();
- break;
-
- case 4: /* jmp ... */
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- M.x86.R_IP = (u16) (*destreg);
- break;
- case 5: /* jmp far ptr ... */
- DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
- TRACE_AND_STEP();
- HALT_SYS();
- break;
- case 6:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- push_long(*destreg);
- } else {
- u16 *destreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- push_word(*destreg);
- }
- break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/***************************************************************************
- * Single byte operation code table:
- **************************************************************************/
-void (*x86emu_optab[256])(u8) =
-{
-/* 0x00 */ x86emuOp_add_byte_RM_R,
-/* 0x01 */ x86emuOp_add_word_RM_R,
-/* 0x02 */ x86emuOp_add_byte_R_RM,
-/* 0x03 */ x86emuOp_add_word_R_RM,
-/* 0x04 */ x86emuOp_add_byte_AL_IMM,
-/* 0x05 */ x86emuOp_add_word_AX_IMM,
-/* 0x06 */ x86emuOp_push_ES,
-/* 0x07 */ x86emuOp_pop_ES,
-
-/* 0x08 */ x86emuOp_or_byte_RM_R,
-/* 0x09 */ x86emuOp_or_word_RM_R,
-/* 0x0a */ x86emuOp_or_byte_R_RM,
-/* 0x0b */ x86emuOp_or_word_R_RM,
-/* 0x0c */ x86emuOp_or_byte_AL_IMM,
-/* 0x0d */ x86emuOp_or_word_AX_IMM,
-/* 0x0e */ x86emuOp_push_CS,
-/* 0x0f */ x86emuOp_two_byte,
-
-/* 0x10 */ x86emuOp_adc_byte_RM_R,
-/* 0x11 */ x86emuOp_adc_word_RM_R,
-/* 0x12 */ x86emuOp_adc_byte_R_RM,
-/* 0x13 */ x86emuOp_adc_word_R_RM,
-/* 0x14 */ x86emuOp_adc_byte_AL_IMM,
-/* 0x15 */ x86emuOp_adc_word_AX_IMM,
-/* 0x16 */ x86emuOp_push_SS,
-/* 0x17 */ x86emuOp_pop_SS,
-
-/* 0x18 */ x86emuOp_sbb_byte_RM_R,
-/* 0x19 */ x86emuOp_sbb_word_RM_R,
-/* 0x1a */ x86emuOp_sbb_byte_R_RM,
-/* 0x1b */ x86emuOp_sbb_word_R_RM,
-/* 0x1c */ x86emuOp_sbb_byte_AL_IMM,
-/* 0x1d */ x86emuOp_sbb_word_AX_IMM,
-/* 0x1e */ x86emuOp_push_DS,
-/* 0x1f */ x86emuOp_pop_DS,
-
-/* 0x20 */ x86emuOp_and_byte_RM_R,
-/* 0x21 */ x86emuOp_and_word_RM_R,
-/* 0x22 */ x86emuOp_and_byte_R_RM,
-/* 0x23 */ x86emuOp_and_word_R_RM,
-/* 0x24 */ x86emuOp_and_byte_AL_IMM,
-/* 0x25 */ x86emuOp_and_word_AX_IMM,
-/* 0x26 */ x86emuOp_segovr_ES,
-/* 0x27 */ x86emuOp_daa,
-
-/* 0x28 */ x86emuOp_sub_byte_RM_R,
-/* 0x29 */ x86emuOp_sub_word_RM_R,
-/* 0x2a */ x86emuOp_sub_byte_R_RM,
-/* 0x2b */ x86emuOp_sub_word_R_RM,
-/* 0x2c */ x86emuOp_sub_byte_AL_IMM,
-/* 0x2d */ x86emuOp_sub_word_AX_IMM,
-/* 0x2e */ x86emuOp_segovr_CS,
-/* 0x2f */ x86emuOp_das,
-
-/* 0x30 */ x86emuOp_xor_byte_RM_R,
-/* 0x31 */ x86emuOp_xor_word_RM_R,
-/* 0x32 */ x86emuOp_xor_byte_R_RM,
-/* 0x33 */ x86emuOp_xor_word_R_RM,
-/* 0x34 */ x86emuOp_xor_byte_AL_IMM,
-/* 0x35 */ x86emuOp_xor_word_AX_IMM,
-/* 0x36 */ x86emuOp_segovr_SS,
-/* 0x37 */ x86emuOp_aaa,
-
-/* 0x38 */ x86emuOp_cmp_byte_RM_R,
-/* 0x39 */ x86emuOp_cmp_word_RM_R,
-/* 0x3a */ x86emuOp_cmp_byte_R_RM,
-/* 0x3b */ x86emuOp_cmp_word_R_RM,
-/* 0x3c */ x86emuOp_cmp_byte_AL_IMM,
-/* 0x3d */ x86emuOp_cmp_word_AX_IMM,
-/* 0x3e */ x86emuOp_segovr_DS,
-/* 0x3f */ x86emuOp_aas,
-
-/* 0x40 */ x86emuOp_inc_AX,
-/* 0x41 */ x86emuOp_inc_CX,
-/* 0x42 */ x86emuOp_inc_DX,
-/* 0x43 */ x86emuOp_inc_BX,
-/* 0x44 */ x86emuOp_inc_SP,
-/* 0x45 */ x86emuOp_inc_BP,
-/* 0x46 */ x86emuOp_inc_SI,
-/* 0x47 */ x86emuOp_inc_DI,
-
-/* 0x48 */ x86emuOp_dec_AX,
-/* 0x49 */ x86emuOp_dec_CX,
-/* 0x4a */ x86emuOp_dec_DX,
-/* 0x4b */ x86emuOp_dec_BX,
-/* 0x4c */ x86emuOp_dec_SP,
-/* 0x4d */ x86emuOp_dec_BP,
-/* 0x4e */ x86emuOp_dec_SI,
-/* 0x4f */ x86emuOp_dec_DI,
-
-/* 0x50 */ x86emuOp_push_AX,
-/* 0x51 */ x86emuOp_push_CX,
-/* 0x52 */ x86emuOp_push_DX,
-/* 0x53 */ x86emuOp_push_BX,
-/* 0x54 */ x86emuOp_push_SP,
-/* 0x55 */ x86emuOp_push_BP,
-/* 0x56 */ x86emuOp_push_SI,
-/* 0x57 */ x86emuOp_push_DI,
-
-/* 0x58 */ x86emuOp_pop_AX,
-/* 0x59 */ x86emuOp_pop_CX,
-/* 0x5a */ x86emuOp_pop_DX,
-/* 0x5b */ x86emuOp_pop_BX,
-/* 0x5c */ x86emuOp_pop_SP,
-/* 0x5d */ x86emuOp_pop_BP,
-/* 0x5e */ x86emuOp_pop_SI,
-/* 0x5f */ x86emuOp_pop_DI,
-
-/* 0x60 */ x86emuOp_push_all,
-/* 0x61 */ x86emuOp_pop_all,
-/* 0x62 */ x86emuOp_illegal_op, /* bound */
-/* 0x63 */ x86emuOp_illegal_op, /* arpl */
-/* 0x64 */ x86emuOp_segovr_FS,
-/* 0x65 */ x86emuOp_segovr_GS,
-/* 0x66 */ x86emuOp_prefix_data,
-/* 0x67 */ x86emuOp_prefix_addr,
-
-/* 0x68 */ x86emuOp_push_word_IMM,
-/* 0x69 */ x86emuOp_imul_word_IMM,
-/* 0x6a */ x86emuOp_push_byte_IMM,
-/* 0x6b */ x86emuOp_imul_byte_IMM,
-/* 0x6c */ x86emuOp_ins_byte,
-/* 0x6d */ x86emuOp_ins_word,
-/* 0x6e */ x86emuOp_outs_byte,
-/* 0x6f */ x86emuOp_outs_word,
-
-/* 0x70 */ x86emuOp_jump_near_O,
-/* 0x71 */ x86emuOp_jump_near_NO,
-/* 0x72 */ x86emuOp_jump_near_B,
-/* 0x73 */ x86emuOp_jump_near_NB,
-/* 0x74 */ x86emuOp_jump_near_Z,
-/* 0x75 */ x86emuOp_jump_near_NZ,
-/* 0x76 */ x86emuOp_jump_near_BE,
-/* 0x77 */ x86emuOp_jump_near_NBE,
-
-/* 0x78 */ x86emuOp_jump_near_S,
-/* 0x79 */ x86emuOp_jump_near_NS,
-/* 0x7a */ x86emuOp_jump_near_P,
-/* 0x7b */ x86emuOp_jump_near_NP,
-/* 0x7c */ x86emuOp_jump_near_L,
-/* 0x7d */ x86emuOp_jump_near_NL,
-/* 0x7e */ x86emuOp_jump_near_LE,
-/* 0x7f */ x86emuOp_jump_near_NLE,
-
-/* 0x80 */ x86emuOp_opc80_byte_RM_IMM,
-/* 0x81 */ x86emuOp_opc81_word_RM_IMM,
-/* 0x82 */ x86emuOp_opc82_byte_RM_IMM,
-/* 0x83 */ x86emuOp_opc83_word_RM_IMM,
-/* 0x84 */ x86emuOp_test_byte_RM_R,
-/* 0x85 */ x86emuOp_test_word_RM_R,
-/* 0x86 */ x86emuOp_xchg_byte_RM_R,
-/* 0x87 */ x86emuOp_xchg_word_RM_R,
-
-/* 0x88 */ x86emuOp_mov_byte_RM_R,
-/* 0x89 */ x86emuOp_mov_word_RM_R,
-/* 0x8a */ x86emuOp_mov_byte_R_RM,
-/* 0x8b */ x86emuOp_mov_word_R_RM,
-/* 0x8c */ x86emuOp_mov_word_RM_SR,
-/* 0x8d */ x86emuOp_lea_word_R_M,
-/* 0x8e */ x86emuOp_mov_word_SR_RM,
-/* 0x8f */ x86emuOp_pop_RM,
-
-/* 0x90 */ x86emuOp_nop,
-/* 0x91 */ x86emuOp_xchg_word_AX_CX,
-/* 0x92 */ x86emuOp_xchg_word_AX_DX,
-/* 0x93 */ x86emuOp_xchg_word_AX_BX,
-/* 0x94 */ x86emuOp_xchg_word_AX_SP,
-/* 0x95 */ x86emuOp_xchg_word_AX_BP,
-/* 0x96 */ x86emuOp_xchg_word_AX_SI,
-/* 0x97 */ x86emuOp_xchg_word_AX_DI,
-
-/* 0x98 */ x86emuOp_cbw,
-/* 0x99 */ x86emuOp_cwd,
-/* 0x9a */ x86emuOp_call_far_IMM,
-/* 0x9b */ x86emuOp_wait,
-/* 0x9c */ x86emuOp_pushf_word,
-/* 0x9d */ x86emuOp_popf_word,
-/* 0x9e */ x86emuOp_sahf,
-/* 0x9f */ x86emuOp_lahf,
-
-/* 0xa0 */ x86emuOp_mov_AL_M_IMM,
-/* 0xa1 */ x86emuOp_mov_AX_M_IMM,
-/* 0xa2 */ x86emuOp_mov_M_AL_IMM,
-/* 0xa3 */ x86emuOp_mov_M_AX_IMM,
-/* 0xa4 */ x86emuOp_movs_byte,
-/* 0xa5 */ x86emuOp_movs_word,
-/* 0xa6 */ x86emuOp_cmps_byte,
-/* 0xa7 */ x86emuOp_cmps_word,
-/* 0xa8 */ x86emuOp_test_AL_IMM,
-/* 0xa9 */ x86emuOp_test_AX_IMM,
-/* 0xaa */ x86emuOp_stos_byte,
-/* 0xab */ x86emuOp_stos_word,
-/* 0xac */ x86emuOp_lods_byte,
-/* 0xad */ x86emuOp_lods_word,
-/* 0xac */ x86emuOp_scas_byte,
-/* 0xad */ x86emuOp_scas_word,
-
-
-/* 0xb0 */ x86emuOp_mov_byte_AL_IMM,
-/* 0xb1 */ x86emuOp_mov_byte_CL_IMM,
-/* 0xb2 */ x86emuOp_mov_byte_DL_IMM,
-/* 0xb3 */ x86emuOp_mov_byte_BL_IMM,
-/* 0xb4 */ x86emuOp_mov_byte_AH_IMM,
-/* 0xb5 */ x86emuOp_mov_byte_CH_IMM,
-/* 0xb6 */ x86emuOp_mov_byte_DH_IMM,
-/* 0xb7 */ x86emuOp_mov_byte_BH_IMM,
-
-/* 0xb8 */ x86emuOp_mov_word_AX_IMM,
-/* 0xb9 */ x86emuOp_mov_word_CX_IMM,
-/* 0xba */ x86emuOp_mov_word_DX_IMM,
-/* 0xbb */ x86emuOp_mov_word_BX_IMM,
-/* 0xbc */ x86emuOp_mov_word_SP_IMM,
-/* 0xbd */ x86emuOp_mov_word_BP_IMM,
-/* 0xbe */ x86emuOp_mov_word_SI_IMM,
-/* 0xbf */ x86emuOp_mov_word_DI_IMM,
-
-/* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM,
-/* 0xc1 */ x86emuOp_opcC1_word_RM_MEM,
-/* 0xc2 */ x86emuOp_ret_near_IMM,
-/* 0xc3 */ x86emuOp_ret_near,
-/* 0xc4 */ x86emuOp_les_R_IMM,
-/* 0xc5 */ x86emuOp_lds_R_IMM,
-/* 0xc6 */ x86emuOp_mov_byte_RM_IMM,
-/* 0xc7 */ x86emuOp_mov_word_RM_IMM,
-/* 0xc8 */ x86emuOp_enter,
-/* 0xc9 */ x86emuOp_leave,
-/* 0xca */ x86emuOp_ret_far_IMM,
-/* 0xcb */ x86emuOp_ret_far,
-/* 0xcc */ x86emuOp_int3,
-/* 0xcd */ x86emuOp_int_IMM,
-/* 0xce */ x86emuOp_into,
-/* 0xcf */ x86emuOp_iret,
-
-/* 0xd0 */ x86emuOp_opcD0_byte_RM_1,
-/* 0xd1 */ x86emuOp_opcD1_word_RM_1,
-/* 0xd2 */ x86emuOp_opcD2_byte_RM_CL,
-/* 0xd3 */ x86emuOp_opcD3_word_RM_CL,
-/* 0xd4 */ x86emuOp_aam,
-/* 0xd5 */ x86emuOp_aad,
-/* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */
-/* 0xd7 */ x86emuOp_xlat,
-/* 0xd8 */ x86emuOp_esc_coprocess_d8,
-/* 0xd9 */ x86emuOp_esc_coprocess_d9,
-/* 0xda */ x86emuOp_esc_coprocess_da,
-/* 0xdb */ x86emuOp_esc_coprocess_db,
-/* 0xdc */ x86emuOp_esc_coprocess_dc,
-/* 0xdd */ x86emuOp_esc_coprocess_dd,
-/* 0xde */ x86emuOp_esc_coprocess_de,
-/* 0xdf */ x86emuOp_esc_coprocess_df,
-
-/* 0xe0 */ x86emuOp_loopne,
-/* 0xe1 */ x86emuOp_loope,
-/* 0xe2 */ x86emuOp_loop,
-/* 0xe3 */ x86emuOp_jcxz,
-/* 0xe4 */ x86emuOp_in_byte_AL_IMM,
-/* 0xe5 */ x86emuOp_in_word_AX_IMM,
-/* 0xe6 */ x86emuOp_out_byte_IMM_AL,
-/* 0xe7 */ x86emuOp_out_word_IMM_AX,
-
-/* 0xe8 */ x86emuOp_call_near_IMM,
-/* 0xe9 */ x86emuOp_jump_near_IMM,
-/* 0xea */ x86emuOp_jump_far_IMM,
-/* 0xeb */ x86emuOp_jump_byte_IMM,
-/* 0xec */ x86emuOp_in_byte_AL_DX,
-/* 0xed */ x86emuOp_in_word_AX_DX,
-/* 0xee */ x86emuOp_out_byte_DX_AL,
-/* 0xef */ x86emuOp_out_word_DX_AX,
-
-/* 0xf0 */ x86emuOp_lock,
-/* 0xf1 */ x86emuOp_illegal_op,
-/* 0xf2 */ x86emuOp_repne,
-/* 0xf3 */ x86emuOp_repe,
-/* 0xf4 */ x86emuOp_halt,
-/* 0xf5 */ x86emuOp_cmc,
-/* 0xf6 */ x86emuOp_opcF6_byte_RM,
-/* 0xf7 */ x86emuOp_opcF7_word_RM,
-
-/* 0xf8 */ x86emuOp_clc,
-/* 0xf9 */ x86emuOp_stc,
-/* 0xfa */ x86emuOp_cli,
-/* 0xfb */ x86emuOp_sti,
-/* 0xfc */ x86emuOp_cld,
-/* 0xfd */ x86emuOp_std,
-/* 0xfe */ x86emuOp_opcFE_byte_RM,
-/* 0xff */ x86emuOp_opcFF_word_RM,
-};
-
-void tables_relocate(unsigned int offset)
-{
- int i;
- for (i=0; i<8; i++)
- {
- opc80_byte_operation[i] -= offset;
- opc81_word_operation[i] -= offset;
- opc81_long_operation[i] -= offset;
-
- opc82_byte_operation[i] -= offset;
- opc83_word_operation[i] -= offset;
- opc83_long_operation[i] -= offset;
-
- opcD0_byte_operation[i] -= offset;
- opcD1_word_operation[i] -= offset;
- opcD1_long_operation[i] -= offset;
- }
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c b/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c
deleted file mode 100644
index d381307..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c
+++ /dev/null
@@ -1,2800 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines to implement the decoding
-* and emulation of all the x86 extended two-byte processor
-* instructions.
-*
-****************************************************************************/
-
-#include "x86emu/x86emui.h"
-
-/*----------------------------- Implementation ----------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-op1 - Instruction op code
-
-REMARKS:
-Handles illegal opcodes.
-****************************************************************************/
-void x86emuOp2_illegal_op(
- u8 op2)
-{
- START_OF_INSTR();
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
- M.x86.R_CS, M.x86.R_IP-2,op2);
- HALT_SYS();
- END_OF_INSTR();
-}
-
-#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0x80-0x8F
-****************************************************************************/
-void x86emuOp2_long_jump(u8 op2)
-{
- s32 target;
- char *name = 0;
- int cond = 0;
-
- /* conditional jump to word offset. */
- START_OF_INSTR();
- switch (op2) {
- case 0x80:
- name = "JO\t";
- cond = ACCESS_FLAG(F_OF);
- break;
- case 0x81:
- name = "JNO\t";
- cond = !ACCESS_FLAG(F_OF);
- break;
- case 0x82:
- name = "JB\t";
- cond = ACCESS_FLAG(F_CF);
- break;
- case 0x83:
- name = "JNB\t";
- cond = !ACCESS_FLAG(F_CF);
- break;
- case 0x84:
- name = "JZ\t";
- cond = ACCESS_FLAG(F_ZF);
- break;
- case 0x85:
- name = "JNZ\t";
- cond = !ACCESS_FLAG(F_ZF);
- break;
- case 0x86:
- name = "JBE\t";
- cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
- break;
- case 0x87:
- name = "JNBE\t";
- cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
- break;
- case 0x88:
- name = "JS\t";
- cond = ACCESS_FLAG(F_SF);
- break;
- case 0x89:
- name = "JNS\t";
- cond = !ACCESS_FLAG(F_SF);
- break;
- case 0x8a:
- name = "JP\t";
- cond = ACCESS_FLAG(F_PF);
- break;
- case 0x8b:
- name = "JNP\t";
- cond = !ACCESS_FLAG(F_PF);
- break;
- case 0x8c:
- name = "JL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x8d:
- name = "JNL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x8e:
- name = "JLE\t";
- cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- case 0x8f:
- name = "JNLE\t";
- cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- }
- DECODE_PRINTF(name);
- target = (s16) fetch_word_imm();
- target += (s16) M.x86.R_IP;
- DECODE_PRINTF2("%04x\n", target);
- TRACE_AND_STEP();
- if (cond)
- M.x86.R_IP = (u16)target;
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0x90-0x9F
-****************************************************************************/
-void x86emuOp2_set_byte(u8 op2)
-{
- int mod, rl, rh;
- uint destoffset;
- u8 *destreg;
- char *name = 0;
- int cond = 0;
-
- START_OF_INSTR();
- switch (op2) {
- case 0x90:
- name = "SETO\t";
- cond = ACCESS_FLAG(F_OF);
- break;
- case 0x91:
- name = "SETNO\t";
- cond = !ACCESS_FLAG(F_OF);
- break;
- case 0x92:
- name = "SETB\t";
- cond = ACCESS_FLAG(F_CF);
- break;
- case 0x93:
- name = "SETNB\t";
- cond = !ACCESS_FLAG(F_CF);
- break;
- case 0x94:
- name = "SETZ\t";
- cond = ACCESS_FLAG(F_ZF);
- break;
- case 0x95:
- name = "SETNZ\t";
- cond = !ACCESS_FLAG(F_ZF);
- break;
- case 0x96:
- name = "SETBE\t";
- cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
- break;
- case 0x97:
- name = "SETNBE\t";
- cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
- break;
- case 0x98:
- name = "SETS\t";
- cond = ACCESS_FLAG(F_SF);
- break;
- case 0x99:
- name = "SETNS\t";
- cond = !ACCESS_FLAG(F_SF);
- break;
- case 0x9a:
- name = "SETP\t";
- cond = ACCESS_FLAG(F_PF);
- break;
- case 0x9b:
- name = "SETNP\t";
- cond = !ACCESS_FLAG(F_PF);
- break;
- case 0x9c:
- name = "SETL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x9d:
- name = "SETNL\t";
- cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
- break;
- case 0x9e:
- name = "SETLE\t";
- cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- case 0x9f:
- name = "SETNLE\t";
- cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
- ACCESS_FLAG(F_ZF));
- break;
- }
- DECODE_PRINTF(name);
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destoffset = decode_rm00_address(rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- break;
- case 1:
- destoffset = decode_rm01_address(rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- break;
- case 2:
- destoffset = decode_rm10_address(rl);
- TRACE_AND_STEP();
- store_data_byte(destoffset, cond ? 0x01 : 0x00);
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_BYTE_REGISTER(rl);
- TRACE_AND_STEP();
- *destreg = cond ? 0x01 : 0x00;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa0
-****************************************************************************/
-void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tFS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_FS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa1
-****************************************************************************/
-void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tFS\n");
- TRACE_AND_STEP();
- M.x86.R_FS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa3
-****************************************************************************/
-void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BT\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- } else {
- u16 srcval;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- } else {
- u16 *srcreg,*shiftreg;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa4
-****************************************************************************/
-void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 shift;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,shift);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa5
-****************************************************************************/
-void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shld_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shld_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa8
-****************************************************************************/
-void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("PUSH\tGS\n");
- TRACE_AND_STEP();
- push_word(M.x86.R_GS);
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xa9
-****************************************************************************/
-void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
-{
- START_OF_INSTR();
- DECODE_PRINTF("POP\tGS\n");
- TRACE_AND_STEP();
- M.x86.R_GS = pop_word();
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xaa
-****************************************************************************/
-void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval | mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, srcval | mask);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg |= mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xac
-****************************************************************************/
-void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
- u8 shift;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,shift);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,shift);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,shift);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- DECODE_PRINTF2("%d\n", shift);
- TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,shift);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xad
-****************************************************************************/
-void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint destoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("SHLD\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 destval;
- u32 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_long(destoffset);
- destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
- store_data_long(destoffset, destval);
- } else {
- u16 destval;
- u16 *shiftreg;
-
- destoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- destval = fetch_data_word(destoffset);
- destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
- store_data_word(destoffset, destval);
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*shiftreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
- } else {
- u16 *destreg,*shiftreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",CL\n");
- TRACE_AND_STEP();
- *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xaf
-****************************************************************************/
-void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("IMUL\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_long(srcoffset);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg;
- u16 srcval;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- TRACE_AND_STEP();
- res = (s16)*destreg * (s16)srcval;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg,*srcreg;
- u32 res_lo,res_hi;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- TRACE_AND_STEP();
- imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
- if (res_hi != 0) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u32)res_lo;
- } else {
- u16 *destreg,*srcreg;
- u32 res;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- res = (s16)*destreg * (s16)*srcreg;
- if (res > 0xFFFF) {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- }
- *destreg = (u16)res;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb2
-****************************************************************************/
-void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LSS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_SS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb3
-****************************************************************************/
-void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTR\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval & ~mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg &= ~mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb4
-****************************************************************************/
-void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LFS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_FS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb5
-****************************************************************************/
-void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rh, rl;
- u16 *dstreg;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("LGS\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- break;
- case 1:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- break;
- case 2:
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *dstreg = fetch_data_word(srcoffset);
- M.x86.R_GS = fetch_data_word(srcoffset + 2);
- break;
- case 3: /* register to register */
- /* UNDEFINED! */
- TRACE_AND_STEP();
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb6
-****************************************************************************/
-void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVZX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_byte(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- } else {
- u16 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xb7
-****************************************************************************/
-void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- u32 *destreg;
- u32 srcval;
- u16 *srcreg;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVZX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = fetch_data_word(srcoffset);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = *srcreg;
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xba
-****************************************************************************/
-void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit;
-
- START_OF_INSTR();
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (rh) {
- case 3:
- DECODE_PRINTF("BT\t");
- break;
- case 4:
- DECODE_PRINTF("BTS\t");
- break;
- case 5:
- DECODE_PRINTF("BTR\t");
- break;
- case 6:
- DECODE_PRINTF("BTC\t");
- break;
- default:
- DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
- TRACE_REGS();
- printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
- M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
- HALT_SYS();
- }
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- srcval = fetch_data_long(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_long(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_long(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_long(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- } else {
- u16 srcval, mask;
- u8 shift;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- srcval = fetch_data_word(srcoffset);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- switch (rh) {
- case 4:
- store_data_word(srcoffset, srcval | mask);
- break;
- case 5:
- store_data_word(srcoffset, srcval & ~mask);
- break;
- case 6:
- store_data_word(srcoffset, srcval ^ mask);
- break;
- default:
- break;
- }
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg;
- u32 mask;
- u8 shift;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 4:
- *srcreg |= mask;
- break;
- case 5:
- *srcreg &= ~mask;
- break;
- case 6:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- } else {
- u16 *srcreg;
- u16 mask;
- u8 shift;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shift = fetch_byte_imm();
- TRACE_AND_STEP();
- bit = shift & 0xF;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- switch (rh) {
- case 4:
- *srcreg |= mask;
- break;
- case 5:
- *srcreg &= ~mask;
- break;
- case 6:
- *srcreg ^= mask;
- break;
- default:
- break;
- }
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbb
-****************************************************************************/
-void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- int bit,disp;
-
- START_OF_INSTR();
- DECODE_PRINTF("BTC\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval,mask;
- u32 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- disp = (s16)*shiftreg >> 5;
- srcval = fetch_data_long(srcoffset+disp);
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_long(srcoffset+disp, srcval ^ mask);
- } else {
- u16 srcval,mask;
- u16 *shiftreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- disp = (s16)*shiftreg >> 4;
- srcval = fetch_data_word(srcoffset+disp);
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
- store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg,*shiftreg;
- u32 mask;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0x1F;
- mask = (0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- } else {
- u16 *srcreg,*shiftreg;
- u16 mask;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- shiftreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- bit = *shiftreg & 0xF;
- mask = (u16)(0x1 << bit);
- CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
- *srcreg ^= mask;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbc
-****************************************************************************/
-void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("BSF\n");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch(mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
- if ((*srcreg >> *dstreg) & 1) break;
- } else {
- u16 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
- if ((*srcreg >> *dstreg) & 1) break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbd
-****************************************************************************/
-void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("BSF\n");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch(mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm00_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm01_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_long(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- } else {
- u16 srcval, *dstreg;
-
- srcoffset = decode_rm10_address(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- srcval = fetch_data_word(srcoffset);
- CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((srcval >> *dstreg) & 1) break;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_LONG_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_LONG_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
- if ((*srcreg >> *dstreg) & 1) break;
- } else {
- u16 *srcreg, *dstreg;
-
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF(",");
- dstreg = DECODE_RM_WORD_REGISTER(rh);
- TRACE_AND_STEP();
- CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
- for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
- if ((*srcreg >> *dstreg) & 1) break;
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbe
-****************************************************************************/
-void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVSX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 1:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 2:
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u32 srcval;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = (s32)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- } else {
- u16 *destreg;
- u16 srcval;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = (s16)((s8)fetch_data_byte(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- }
- break;
- case 3: /* register to register */
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- u32 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s32)((s8)*srcreg);
- } else {
- u16 *destreg;
- u8 *srcreg;
-
- destreg = DECODE_RM_WORD_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_BYTE_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s16)((s8)*srcreg);
- }
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/****************************************************************************
-REMARKS:
-Handles opcode 0x0f,0xbf
-****************************************************************************/
-void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
-{
- int mod, rl, rh;
- uint srcoffset;
- u32 *destreg;
- u32 srcval;
- u16 *srcreg;
-
- START_OF_INSTR();
- DECODE_PRINTF("MOVSX\t");
- FETCH_DECODE_MODRM(mod, rh, rl);
- switch (mod) {
- case 0:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm00_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 1:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm01_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 2:
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcoffset = decode_rm10_address(rl);
- srcval = (s32)((s16)fetch_data_word(srcoffset));
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = srcval;
- break;
- case 3: /* register to register */
- destreg = DECODE_RM_LONG_REGISTER(rh);
- DECODE_PRINTF(",");
- srcreg = DECODE_RM_WORD_REGISTER(rl);
- DECODE_PRINTF("\n");
- TRACE_AND_STEP();
- *destreg = (s32)((s16)*srcreg);
- break;
- }
- DECODE_CLEAR_SEGOVR();
- END_OF_INSTR();
-}
-
-/***************************************************************************
- * Double byte operation code table:
- **************************************************************************/
-void (*x86emu_optab2[256])(u8) =
-{
-/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
-/* 0x01 */ x86emuOp2_illegal_op, /* Group G (ring 0 PM) */
-/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
-/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
-/* 0x04 */ x86emuOp2_illegal_op,
-/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
-/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
-/* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */
-/* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */
-/* 0x0a */ x86emuOp2_illegal_op,
-/* 0x0b */ x86emuOp2_illegal_op,
-/* 0x0c */ x86emuOp2_illegal_op,
-/* 0x0d */ x86emuOp2_illegal_op,
-/* 0x0e */ x86emuOp2_illegal_op,
-/* 0x0f */ x86emuOp2_illegal_op,
-
-/* 0x10 */ x86emuOp2_illegal_op,
-/* 0x11 */ x86emuOp2_illegal_op,
-/* 0x12 */ x86emuOp2_illegal_op,
-/* 0x13 */ x86emuOp2_illegal_op,
-/* 0x14 */ x86emuOp2_illegal_op,
-/* 0x15 */ x86emuOp2_illegal_op,
-/* 0x16 */ x86emuOp2_illegal_op,
-/* 0x17 */ x86emuOp2_illegal_op,
-/* 0x18 */ x86emuOp2_illegal_op,
-/* 0x19 */ x86emuOp2_illegal_op,
-/* 0x1a */ x86emuOp2_illegal_op,
-/* 0x1b */ x86emuOp2_illegal_op,
-/* 0x1c */ x86emuOp2_illegal_op,
-/* 0x1d */ x86emuOp2_illegal_op,
-/* 0x1e */ x86emuOp2_illegal_op,
-/* 0x1f */ x86emuOp2_illegal_op,
-
-/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
-/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
-/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
-/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
-/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
-/* 0x25 */ x86emuOp2_illegal_op,
-/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
-/* 0x27 */ x86emuOp2_illegal_op,
-/* 0x28 */ x86emuOp2_illegal_op,
-/* 0x29 */ x86emuOp2_illegal_op,
-/* 0x2a */ x86emuOp2_illegal_op,
-/* 0x2b */ x86emuOp2_illegal_op,
-/* 0x2c */ x86emuOp2_illegal_op,
-/* 0x2d */ x86emuOp2_illegal_op,
-/* 0x2e */ x86emuOp2_illegal_op,
-/* 0x2f */ x86emuOp2_illegal_op,
-
-/* 0x30 */ x86emuOp2_illegal_op,
-/* 0x31 */ x86emuOp2_illegal_op,
-/* 0x32 */ x86emuOp2_illegal_op,
-/* 0x33 */ x86emuOp2_illegal_op,
-/* 0x34 */ x86emuOp2_illegal_op,
-/* 0x35 */ x86emuOp2_illegal_op,
-/* 0x36 */ x86emuOp2_illegal_op,
-/* 0x37 */ x86emuOp2_illegal_op,
-/* 0x38 */ x86emuOp2_illegal_op,
-/* 0x39 */ x86emuOp2_illegal_op,
-/* 0x3a */ x86emuOp2_illegal_op,
-/* 0x3b */ x86emuOp2_illegal_op,
-/* 0x3c */ x86emuOp2_illegal_op,
-/* 0x3d */ x86emuOp2_illegal_op,
-/* 0x3e */ x86emuOp2_illegal_op,
-/* 0x3f */ x86emuOp2_illegal_op,
-
-/* 0x40 */ x86emuOp2_illegal_op,
-/* 0x41 */ x86emuOp2_illegal_op,
-/* 0x42 */ x86emuOp2_illegal_op,
-/* 0x43 */ x86emuOp2_illegal_op,
-/* 0x44 */ x86emuOp2_illegal_op,
-/* 0x45 */ x86emuOp2_illegal_op,
-/* 0x46 */ x86emuOp2_illegal_op,
-/* 0x47 */ x86emuOp2_illegal_op,
-/* 0x48 */ x86emuOp2_illegal_op,
-/* 0x49 */ x86emuOp2_illegal_op,
-/* 0x4a */ x86emuOp2_illegal_op,
-/* 0x4b */ x86emuOp2_illegal_op,
-/* 0x4c */ x86emuOp2_illegal_op,
-/* 0x4d */ x86emuOp2_illegal_op,
-/* 0x4e */ x86emuOp2_illegal_op,
-/* 0x4f */ x86emuOp2_illegal_op,
-
-/* 0x50 */ x86emuOp2_illegal_op,
-/* 0x51 */ x86emuOp2_illegal_op,
-/* 0x52 */ x86emuOp2_illegal_op,
-/* 0x53 */ x86emuOp2_illegal_op,
-/* 0x54 */ x86emuOp2_illegal_op,
-/* 0x55 */ x86emuOp2_illegal_op,
-/* 0x56 */ x86emuOp2_illegal_op,
-/* 0x57 */ x86emuOp2_illegal_op,
-/* 0x58 */ x86emuOp2_illegal_op,
-/* 0x59 */ x86emuOp2_illegal_op,
-/* 0x5a */ x86emuOp2_illegal_op,
-/* 0x5b */ x86emuOp2_illegal_op,
-/* 0x5c */ x86emuOp2_illegal_op,
-/* 0x5d */ x86emuOp2_illegal_op,
-/* 0x5e */ x86emuOp2_illegal_op,
-/* 0x5f */ x86emuOp2_illegal_op,
-
-/* 0x60 */ x86emuOp2_illegal_op,
-/* 0x61 */ x86emuOp2_illegal_op,
-/* 0x62 */ x86emuOp2_illegal_op,
-/* 0x63 */ x86emuOp2_illegal_op,
-/* 0x64 */ x86emuOp2_illegal_op,
-/* 0x65 */ x86emuOp2_illegal_op,
-/* 0x66 */ x86emuOp2_illegal_op,
-/* 0x67 */ x86emuOp2_illegal_op,
-/* 0x68 */ x86emuOp2_illegal_op,
-/* 0x69 */ x86emuOp2_illegal_op,
-/* 0x6a */ x86emuOp2_illegal_op,
-/* 0x6b */ x86emuOp2_illegal_op,
-/* 0x6c */ x86emuOp2_illegal_op,
-/* 0x6d */ x86emuOp2_illegal_op,
-/* 0x6e */ x86emuOp2_illegal_op,
-/* 0x6f */ x86emuOp2_illegal_op,
-
-/* 0x70 */ x86emuOp2_illegal_op,
-/* 0x71 */ x86emuOp2_illegal_op,
-/* 0x72 */ x86emuOp2_illegal_op,
-/* 0x73 */ x86emuOp2_illegal_op,
-/* 0x74 */ x86emuOp2_illegal_op,
-/* 0x75 */ x86emuOp2_illegal_op,
-/* 0x76 */ x86emuOp2_illegal_op,
-/* 0x77 */ x86emuOp2_illegal_op,
-/* 0x78 */ x86emuOp2_illegal_op,
-/* 0x79 */ x86emuOp2_illegal_op,
-/* 0x7a */ x86emuOp2_illegal_op,
-/* 0x7b */ x86emuOp2_illegal_op,
-/* 0x7c */ x86emuOp2_illegal_op,
-/* 0x7d */ x86emuOp2_illegal_op,
-/* 0x7e */ x86emuOp2_illegal_op,
-/* 0x7f */ x86emuOp2_illegal_op,
-
-/* 0x80 */ x86emuOp2_long_jump,
-/* 0x81 */ x86emuOp2_long_jump,
-/* 0x82 */ x86emuOp2_long_jump,
-/* 0x83 */ x86emuOp2_long_jump,
-/* 0x84 */ x86emuOp2_long_jump,
-/* 0x85 */ x86emuOp2_long_jump,
-/* 0x86 */ x86emuOp2_long_jump,
-/* 0x87 */ x86emuOp2_long_jump,
-/* 0x88 */ x86emuOp2_long_jump,
-/* 0x89 */ x86emuOp2_long_jump,
-/* 0x8a */ x86emuOp2_long_jump,
-/* 0x8b */ x86emuOp2_long_jump,
-/* 0x8c */ x86emuOp2_long_jump,
-/* 0x8d */ x86emuOp2_long_jump,
-/* 0x8e */ x86emuOp2_long_jump,
-/* 0x8f */ x86emuOp2_long_jump,
-
-/* 0x90 */ x86emuOp2_set_byte,
-/* 0x91 */ x86emuOp2_set_byte,
-/* 0x92 */ x86emuOp2_set_byte,
-/* 0x93 */ x86emuOp2_set_byte,
-/* 0x94 */ x86emuOp2_set_byte,
-/* 0x95 */ x86emuOp2_set_byte,
-/* 0x96 */ x86emuOp2_set_byte,
-/* 0x97 */ x86emuOp2_set_byte,
-/* 0x98 */ x86emuOp2_set_byte,
-/* 0x99 */ x86emuOp2_set_byte,
-/* 0x9a */ x86emuOp2_set_byte,
-/* 0x9b */ x86emuOp2_set_byte,
-/* 0x9c */ x86emuOp2_set_byte,
-/* 0x9d */ x86emuOp2_set_byte,
-/* 0x9e */ x86emuOp2_set_byte,
-/* 0x9f */ x86emuOp2_set_byte,
-
-/* 0xa0 */ x86emuOp2_push_FS,
-/* 0xa1 */ x86emuOp2_pop_FS,
-/* 0xa2 */ x86emuOp2_illegal_op,
-/* 0xa3 */ x86emuOp2_bt_R,
-/* 0xa4 */ x86emuOp2_shld_IMM,
-/* 0xa5 */ x86emuOp2_shld_CL,
-/* 0xa6 */ x86emuOp2_illegal_op,
-/* 0xa7 */ x86emuOp2_illegal_op,
-/* 0xa8 */ x86emuOp2_push_GS,
-/* 0xa9 */ x86emuOp2_pop_GS,
-/* 0xaa */ x86emuOp2_illegal_op,
-/* 0xab */ x86emuOp2_bt_R,
-/* 0xac */ x86emuOp2_shrd_IMM,
-/* 0xad */ x86emuOp2_shrd_CL,
-/* 0xae */ x86emuOp2_illegal_op,
-/* 0xaf */ x86emuOp2_imul_R_RM,
-
-/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
-/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
-/* 0xb2 */ x86emuOp2_lss_R_IMM,
-/* 0xb3 */ x86emuOp2_btr_R,
-/* 0xb4 */ x86emuOp2_lfs_R_IMM,
-/* 0xb5 */ x86emuOp2_lgs_R_IMM,
-/* 0xb6 */ x86emuOp2_movzx_byte_R_RM,
-/* 0xb7 */ x86emuOp2_movzx_word_R_RM,
-/* 0xb8 */ x86emuOp2_illegal_op,
-/* 0xb9 */ x86emuOp2_illegal_op,
-/* 0xba */ x86emuOp2_btX_I,
-/* 0xbb */ x86emuOp2_btc_R,
-/* 0xbc */ x86emuOp2_bsf,
-/* 0xbd */ x86emuOp2_bsr,
-/* 0xbe */ x86emuOp2_movsx_byte_R_RM,
-/* 0xbf */ x86emuOp2_movsx_word_R_RM,
-
-/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
-/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
-/* 0xc2 */ x86emuOp2_illegal_op,
-/* 0xc3 */ x86emuOp2_illegal_op,
-/* 0xc4 */ x86emuOp2_illegal_op,
-/* 0xc5 */ x86emuOp2_illegal_op,
-/* 0xc6 */ x86emuOp2_illegal_op,
-/* 0xc7 */ x86emuOp2_illegal_op,
-/* 0xc8 */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xc9 */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xca */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcb */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcc */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcd */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xce */ x86emuOp2_illegal_op, /* TODO: bswap */
-/* 0xcf */ x86emuOp2_illegal_op, /* TODO: bswap */
-
-/* 0xd0 */ x86emuOp2_illegal_op,
-/* 0xd1 */ x86emuOp2_illegal_op,
-/* 0xd2 */ x86emuOp2_illegal_op,
-/* 0xd3 */ x86emuOp2_illegal_op,
-/* 0xd4 */ x86emuOp2_illegal_op,
-/* 0xd5 */ x86emuOp2_illegal_op,
-/* 0xd6 */ x86emuOp2_illegal_op,
-/* 0xd7 */ x86emuOp2_illegal_op,
-/* 0xd8 */ x86emuOp2_illegal_op,
-/* 0xd9 */ x86emuOp2_illegal_op,
-/* 0xda */ x86emuOp2_illegal_op,
-/* 0xdb */ x86emuOp2_illegal_op,
-/* 0xdc */ x86emuOp2_illegal_op,
-/* 0xdd */ x86emuOp2_illegal_op,
-/* 0xde */ x86emuOp2_illegal_op,
-/* 0xdf */ x86emuOp2_illegal_op,
-
-/* 0xe0 */ x86emuOp2_illegal_op,
-/* 0xe1 */ x86emuOp2_illegal_op,
-/* 0xe2 */ x86emuOp2_illegal_op,
-/* 0xe3 */ x86emuOp2_illegal_op,
-/* 0xe4 */ x86emuOp2_illegal_op,
-/* 0xe5 */ x86emuOp2_illegal_op,
-/* 0xe6 */ x86emuOp2_illegal_op,
-/* 0xe7 */ x86emuOp2_illegal_op,
-/* 0xe8 */ x86emuOp2_illegal_op,
-/* 0xe9 */ x86emuOp2_illegal_op,
-/* 0xea */ x86emuOp2_illegal_op,
-/* 0xeb */ x86emuOp2_illegal_op,
-/* 0xec */ x86emuOp2_illegal_op,
-/* 0xed */ x86emuOp2_illegal_op,
-/* 0xee */ x86emuOp2_illegal_op,
-/* 0xef */ x86emuOp2_illegal_op,
-
-/* 0xf0 */ x86emuOp2_illegal_op,
-/* 0xf1 */ x86emuOp2_illegal_op,
-/* 0xf2 */ x86emuOp2_illegal_op,
-/* 0xf3 */ x86emuOp2_illegal_op,
-/* 0xf4 */ x86emuOp2_illegal_op,
-/* 0xf5 */ x86emuOp2_illegal_op,
-/* 0xf6 */ x86emuOp2_illegal_op,
-/* 0xf7 */ x86emuOp2_illegal_op,
-/* 0xf8 */ x86emuOp2_illegal_op,
-/* 0xf9 */ x86emuOp2_illegal_op,
-/* 0xfa */ x86emuOp2_illegal_op,
-/* 0xfb */ x86emuOp2_illegal_op,
-/* 0xfc */ x86emuOp2_illegal_op,
-/* 0xfd */ x86emuOp2_illegal_op,
-/* 0xfe */ x86emuOp2_illegal_op,
-/* 0xff */ x86emuOp2_illegal_op,
-};
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c b/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c
deleted file mode 100644
index 72b1bf2..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c
+++ /dev/null
@@ -1,2914 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file contains the code to implement the primitive
-* machine operations used by the emulation code in ops.c
-*
-* Carry Chain Calculation
-*
-* This represents a somewhat expensive calculation which is
-* apparently required to emulate the setting of the OF and AF flag.
-* The latter is not so important, but the former is. The overflow
-* flag is the XOR of the top two bits of the carry chain for an
-* addition (similar for subtraction). Since we do not want to
-* simulate the addition in a bitwise manner, we try to calculate the
-* carry chain given the two operands and the result.
-*
-* So, given the following table, which represents the addition of two
-* bits, we can derive a formula for the carry chain.
-*
-* a b cin r cout
-* 0 0 0 0 0
-* 0 0 1 1 0
-* 0 1 0 1 0
-* 0 1 1 0 1
-* 1 0 0 1 0
-* 1 0 1 0 1
-* 1 1 0 0 1
-* 1 1 1 1 1
-*
-* Construction of table for cout:
-*
-* ab
-* r \ 00 01 11 10
-* |------------------
-* 0 | 0 1 1 1
-* 1 | 0 0 1 0
-*
-* By inspection, one gets: cc = ab + r'(a + b)
-*
-* That represents alot of operations, but NO CHOICE....
-*
-* Borrow Chain Calculation.
-*
-* The following table represents the subtraction of two bits, from
-* which we can derive a formula for the borrow chain.
-*
-* a b bin r bout
-* 0 0 0 0 0
-* 0 0 1 1 1
-* 0 1 0 1 1
-* 0 1 1 0 1
-* 1 0 0 1 0
-* 1 0 1 0 0
-* 1 1 0 0 0
-* 1 1 1 1 1
-*
-* Construction of table for cout:
-*
-* ab
-* r \ 00 01 11 10
-* |------------------
-* 0 | 0 1 0 0
-* 1 | 1 1 1 0
-*
-* By inspection, one gets: bc = a'b + r(a' + b)
-*
-****************************************************************************/
-
-#define PRIM_OPS_NO_REDEFINE_ASM
-#include "x86emu/x86emui.h"
-
-/*------------------------- Global Variables ------------------------------*/
-
-#ifndef __HAVE_INLINE_ASSEMBLER__
-
-static u32 x86emu_parity_tab[8] =
-{
- 0x96696996,
- 0x69969669,
- 0x69969669,
- 0x96696996,
- 0x69969669,
- 0x96696996,
- 0x96696996,
- 0x69969669,
-};
-
-#endif
-
-#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0)
-#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1)
-
-/*----------------------------- Implementation ----------------------------*/
-
-#ifndef __HAVE_INLINE_ASSEMBLER__
-
-/****************************************************************************
-REMARKS:
-Implements the AAA instruction and side effects.
-****************************************************************************/
-u16 aaa_word(u16 d)
-{
- u16 res;
- if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
- d += 0x6;
- d += 0x100;
- SET_FLAG(F_AF);
- SET_FLAG(F_CF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- }
- res = (u16)(d & 0xFF0F);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AAA instruction and side effects.
-****************************************************************************/
-u16 aas_word(u16 d)
-{
- u16 res;
- if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
- d -= 0x6;
- d -= 0x100;
- SET_FLAG(F_AF);
- SET_FLAG(F_CF);
- } else {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- }
- res = (u16)(d & 0xFF0F);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AAD instruction and side effects.
-****************************************************************************/
-u16 aad_word(u16 d)
-{
- u16 l;
- u8 hb, lb;
-
- hb = (u8)((d >> 8) & 0xff);
- lb = (u8)((d & 0xff));
- l = (u16)((lb + 10 * hb) & 0xFF);
-
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(l == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
- return l;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AAM instruction and side effects.
-****************************************************************************/
-u16 aam_word(u8 d)
-{
- u16 h, l;
-
- h = (u16)(d / 10);
- l = (u16)(d % 10);
- l |= (u16)(h << 8);
-
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(l & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(l == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(l & 0xff), F_PF);
- return l;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADC instruction and side effects.
-****************************************************************************/
-u8 adc_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- if (ACCESS_FLAG(F_CF))
- res = 1 + d + s;
- else
- res = d + s;
-
- CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADC instruction and side effects.
-****************************************************************************/
-u16 adc_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- if (ACCESS_FLAG(F_CF))
- res = 1 + d + s;
- else
- res = d + s;
-
- CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADC instruction and side effects.
-****************************************************************************/
-u32 adc_long(u32 d, u32 s)
-{
- register u32 lo; /* all operands in native machine order */
- register u32 hi;
- register u32 res;
- register u32 cc;
-
- if (ACCESS_FLAG(F_CF)) {
- lo = 1 + (d & 0xFFFF) + (s & 0xFFFF);
- res = 1 + d + s;
- }
- else {
- lo = (d & 0xFFFF) + (s & 0xFFFF);
- res = d + s;
- }
- hi = (lo >> 16) + (d >> 16) + (s >> 16);
-
- CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADD instruction and side effects.
-****************************************************************************/
-u8 add_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + s;
- CONDITIONAL_SET_FLAG(res & 0x100, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADD instruction and side effects.
-****************************************************************************/
-u16 add_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + s;
- CONDITIONAL_SET_FLAG(res & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ADD instruction and side effects.
-****************************************************************************/
-u32 add_long(u32 d, u32 s)
-{
- register u32 lo; /* all operands in native machine order */
- register u32 hi;
- register u32 res;
- register u32 cc;
-
- lo = (d & 0xFFFF) + (s & 0xFFFF);
- res = d + s;
- hi = (lo >> 16) + (d >> 16) + (s >> 16);
-
- CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (s & d) | ((~res) & (s | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
-
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AND instruction and side effects.
-****************************************************************************/
-u8 and_byte(u8 d, u8 s)
-{
- register u8 res; /* all operands in native machine order */
-
- res = d & s;
-
- /* set the flags */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AND instruction and side effects.
-****************************************************************************/
-u16 and_word(u16 d, u16 s)
-{
- register u16 res; /* all operands in native machine order */
-
- res = d & s;
-
- /* set the flags */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the AND instruction and side effects.
-****************************************************************************/
-u32 and_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- /* set the flags */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the CMP instruction and side effects.
-****************************************************************************/
-u8 cmp_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CLEAR_FLAG(F_CF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the CMP instruction and side effects.
-****************************************************************************/
-u16 cmp_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the CMP instruction and side effects.
-****************************************************************************/
-u32 cmp_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DAA instruction and side effects.
-****************************************************************************/
-u8 daa_byte(u8 d)
-{
- u32 res = d;
- if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
- res += 6;
- SET_FLAG(F_AF);
- }
- if (res > 0x9F || ACCESS_FLAG(F_CF)) {
- res += 0x60;
- SET_FLAG(F_CF);
- }
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xFF) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DAS instruction and side effects.
-****************************************************************************/
-u8 das_byte(u8 d)
-{
- if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
- d -= 6;
- SET_FLAG(F_AF);
- }
- if (d > 0x9F || ACCESS_FLAG(F_CF)) {
- d -= 0x60;
- SET_FLAG(F_CF);
- }
- CONDITIONAL_SET_FLAG(d & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(d == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(d & 0xff), F_PF);
- return d;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DEC instruction and side effects.
-****************************************************************************/
-u8 dec_byte(u8 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - 1;
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- /* based on sub_byte, uses s==1. */
- bc = (res & (~d | 1)) | (~d & 1);
- /* carry flag unchanged */
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DEC instruction and side effects.
-****************************************************************************/
-u16 dec_word(u16 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - 1;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- /* based on the sub_byte routine, with s==1 */
- bc = (res & (~d | 1)) | (~d & 1);
- /* carry flag unchanged */
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DEC instruction and side effects.
-****************************************************************************/
-u32 dec_long(u32 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - 1;
-
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | 1)) | (~d & 1);
- /* carry flag unchanged */
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the INC instruction and side effects.
-****************************************************************************/
-u8 inc_byte(u8 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + 1;
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = ((1 & d) | (~res)) & (1 | d);
- CONDITIONAL_SET_FLAG(XOR2(cc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the INC instruction and side effects.
-****************************************************************************/
-u16 inc_word(u16 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + 1;
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (1 & d) | ((~res) & (1 | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the INC instruction and side effects.
-****************************************************************************/
-u32 inc_long(u32 d)
-{
- register u32 res; /* all operands in native machine order */
- register u32 cc;
-
- res = d + 1;
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the carry chain SEE NOTE AT TOP. */
- cc = (1 & d) | ((~res) & (1 | d));
- CONDITIONAL_SET_FLAG(XOR2(cc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u8 or_byte(u8 d, u8 s)
-{
- register u8 res; /* all operands in native machine order */
-
- res = d | s;
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u16 or_word(u16 d, u16 s)
-{
- register u16 res; /* all operands in native machine order */
-
- res = d | s;
- /* set the carry flag to be bit 8 */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u32 or_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d | s;
-
- /* set the carry flag to be bit 8 */
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u8 neg_byte(u8 s)
-{
- register u8 res;
- register u8 bc;
-
- CONDITIONAL_SET_FLAG(s != 0, F_CF);
- res = (u8)-s;
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- /* calculate the borrow chain --- modified such that d=0.
- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
- (the one used for sub) and simplifying, since ~d=0xff...,
- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
- ~d&s == s. So the simplified result is: */
- bc = res | s;
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u16 neg_word(u16 s)
-{
- register u16 res;
- register u16 bc;
-
- CONDITIONAL_SET_FLAG(s != 0, F_CF);
- res = (u16)-s;
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain --- modified such that d=0.
- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
- (the one used for sub) and simplifying, since ~d=0xff...,
- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
- ~d&s == s. So the simplified result is: */
- bc = res | s;
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OR instruction and side effects.
-****************************************************************************/
-u32 neg_long(u32 s)
-{
- register u32 res;
- register u32 bc;
-
- CONDITIONAL_SET_FLAG(s != 0, F_CF);
- res = (u32)-s;
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain --- modified such that d=0.
- substitutiing d=0 into bc= res&(~d|s)|(~d&s);
- (the one used for sub) and simplifying, since ~d=0xff...,
- ~d|s == 0xffff..., and res&0xfff... == res. Similarly
- ~d&s == s. So the simplified result is: */
- bc = res | s;
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the NOT instruction and side effects.
-****************************************************************************/
-u8 not_byte(u8 s)
-{
- return ~s;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the NOT instruction and side effects.
-****************************************************************************/
-u16 not_word(u16 s)
-{
- return ~s;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the NOT instruction and side effects.
-****************************************************************************/
-u32 not_long(u32 s)
-{
- return ~s;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCL instruction and side effects.
-****************************************************************************/
-u8 rcl_byte(u8 d, u8 s)
-{
- register unsigned int res, cnt, mask, cf;
-
- /* s is the rotate distance. It varies from 0 - 8. */
- /* have
-
- CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
-
- want to rotate through the carry by "s" bits. We could
- loop, but that's inefficient. So the width is 9,
- and we split into three parts:
-
- The new carry flag (was B_n)
- the stuff in B_n-1 .. B_0
- the stuff in B_7 .. B_n+1
-
- The new rotate is done mod 9, and given this,
- for a rotation of n bits (mod 9) the new carry flag is
- then located n bits from the MSB. The low part is
- then shifted up cnt bits, and the high part is or'd
- in. Using CAPS for new values, and lowercase for the
- original values, this can be expressed as:
-
- IF n > 0
- 1) CF <- b_(8-n)
- 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0
- 3) B_(n-1) <- cf
- 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1))
- */
- res = d;
- if ((cnt = s % 9) != 0) {
- /* extract the new CARRY FLAG. */
- /* CF <- b_(8-n) */
- cf = (d >> (8 - cnt)) & 0x1;
-
- /* get the low stuff which rotated
- into the range B_7 .. B_cnt */
- /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */
- /* note that the right hand side done by the mask */
- res = (d << cnt) & 0xff;
-
- /* now the high stuff which rotated around
- into the positions B_cnt-2 .. B_0 */
- /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */
- /* shift it downward, 7-(n-2) = 9-n positions.
- and mask off the result before or'ing in.
- */
- mask = (1 << (cnt - 1)) - 1;
- res |= (d >> (9 - cnt)) & mask;
-
- /* if the carry flag was set, or it in. */
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- /* B_(n-1) <- cf */
- res |= 1 << (cnt - 1);
- }
- /* set the new carry flag, based on the variable "cf" */
- CONDITIONAL_SET_FLAG(cf, F_CF);
- /* OVERFLOW is set *IFF* cnt==1, then it is the
- xor of CF and the most significant bit. Blecck. */
- /* parenthesized this expression since it appears to
- be causing OF to be misset */
- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),
- F_OF);
-
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCL instruction and side effects.
-****************************************************************************/
-u16 rcl_word(u16 d, u8 s)
-{
- register unsigned int res, cnt, mask, cf;
-
- res = d;
- if ((cnt = s % 17) != 0) {
- cf = (d >> (16 - cnt)) & 0x1;
- res = (d << cnt) & 0xffff;
- mask = (1 << (cnt - 1)) - 1;
- res |= (d >> (17 - cnt)) & mask;
- if (ACCESS_FLAG(F_CF)) {
- res |= 1 << (cnt - 1);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),
- F_OF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCL instruction and side effects.
-****************************************************************************/
-u32 rcl_long(u32 d, u8 s)
-{
- register u32 res, cnt, mask, cf;
-
- res = d;
- if ((cnt = s % 33) != 0) {
- cf = (d >> (32 - cnt)) & 0x1;
- res = (d << cnt) & 0xffffffff;
- mask = (1 << (cnt - 1)) - 1;
- res |= (d >> (33 - cnt)) & mask;
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- res |= 1 << (cnt - 1);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)),
- F_OF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCR instruction and side effects.
-****************************************************************************/
-u8 rcr_byte(u8 d, u8 s)
-{
- u32 res, cnt;
- u32 mask, cf, ocf = 0;
-
- /* rotate right through carry */
- /*
- s is the rotate distance. It varies from 0 - 8.
- d is the byte object rotated.
-
- have
-
- CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
-
- The new rotate is done mod 9, and given this,
- for a rotation of n bits (mod 9) the new carry flag is
- then located n bits from the LSB. The low part is
- then shifted up cnt bits, and the high part is or'd
- in. Using CAPS for new values, and lowercase for the
- original values, this can be expressed as:
-
- IF n > 0
- 1) CF <- b_(n-1)
- 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
- 3) B_(8-n) <- cf
- 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0)
- */
- res = d;
- if ((cnt = s % 9) != 0) {
- /* extract the new CARRY FLAG. */
- /* CF <- b_(n-1) */
- if (cnt == 1) {
- cf = d & 0x1;
- /* note hackery here. Access_flag(..) evaluates to either
- 0 if flag not set
- non-zero if flag is set.
- doing access_flag(..) != 0 casts that into either
- 0..1 in any representation of the flags register
- (i.e. packed bit array or unpacked.)
- */
- ocf = ACCESS_FLAG(F_CF) != 0;
- } else
- cf = (d >> (cnt - 1)) & 0x1;
-
- /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */
- /* note that the right hand side done by the mask
- This is effectively done by shifting the
- object to the right. The result must be masked,
- in case the object came in and was treated
- as a negative number. Needed??? */
-
- mask = (1 << (8 - cnt)) - 1;
- res = (d >> cnt) & mask;
-
- /* now the high stuff which rotated around
- into the positions B_cnt-2 .. B_0 */
- /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */
- /* shift it downward, 7-(n-2) = 9-n positions.
- and mask off the result before or'ing in.
- */
- res |= (d << (9 - cnt));
-
- /* if the carry flag was set, or it in. */
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- /* B_(8-n) <- cf */
- res |= 1 << (8 - cnt);
- }
- /* set the new carry flag, based on the variable "cf" */
- CONDITIONAL_SET_FLAG(cf, F_CF);
- /* OVERFLOW is set *IFF* cnt==1, then it is the
- xor of CF and the most significant bit. Blecck. */
- /* parenthesized... */
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)),
- F_OF);
- }
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCR instruction and side effects.
-****************************************************************************/
-u16 rcr_word(u16 d, u8 s)
-{
- u32 res, cnt;
- u32 mask, cf, ocf = 0;
-
- /* rotate right through carry */
- res = d;
- if ((cnt = s % 17) != 0) {
- if (cnt == 1) {
- cf = d & 0x1;
- ocf = ACCESS_FLAG(F_CF) != 0;
- } else
- cf = (d >> (cnt - 1)) & 0x1;
- mask = (1 << (16 - cnt)) - 1;
- res = (d >> cnt) & mask;
- res |= (d << (17 - cnt));
- if (ACCESS_FLAG(F_CF)) {
- res |= 1 << (16 - cnt);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)),
- F_OF);
- }
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the RCR instruction and side effects.
-****************************************************************************/
-u32 rcr_long(u32 d, u8 s)
-{
- u32 res, cnt;
- u32 mask, cf, ocf = 0;
-
- /* rotate right through carry */
- res = d;
- if ((cnt = s % 33) != 0) {
- if (cnt == 1) {
- cf = d & 0x1;
- ocf = ACCESS_FLAG(F_CF) != 0;
- } else
- cf = (d >> (cnt - 1)) & 0x1;
- mask = (1 << (32 - cnt)) - 1;
- res = (d >> cnt) & mask;
- if (cnt != 1)
- res |= (d << (33 - cnt));
- if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
- res |= 1 << (32 - cnt);
- }
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)),
- F_OF);
- }
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROL instruction and side effects.
-****************************************************************************/
-u8 rol_byte(u8 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- /* rotate left */
- /*
- s is the rotate distance. It varies from 0 - 8.
- d is the byte object rotated.
-
- have
-
- CF B_7 ... B_0
-
- The new rotate is done mod 8.
- Much simpler than the "rcl" or "rcr" operations.
-
- IF n > 0
- 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0)
- 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n)
- */
- res = d;
- if ((cnt = s % 8) != 0) {
- /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */
- res = (d << cnt);
-
- /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */
- mask = (1 << cnt) - 1;
- res |= (d >> (8 - cnt)) & mask;
-
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- /* OVERFLOW is set *IFF* s==1, then it is the
- xor of CF and the most significant bit. Blecck. */
- CONDITIONAL_SET_FLAG(s == 1 &&
- XOR2((res & 0x1) + ((res >> 6) & 0x2)),
- F_OF);
- } if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROL instruction and side effects.
-****************************************************************************/
-u16 rol_word(u16 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- res = d;
- if ((cnt = s % 16) != 0) {
- res = (d << cnt);
- mask = (1 << cnt) - 1;
- res |= (d >> (16 - cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 &&
- XOR2((res & 0x1) + ((res >> 14) & 0x2)),
- F_OF);
- } if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROL instruction and side effects.
-****************************************************************************/
-u32 rol_long(u32 d, u8 s)
-{
- register u32 res, cnt, mask;
-
- res = d;
- if ((cnt = s % 32) != 0) {
- res = (d << cnt);
- mask = (1 << cnt) - 1;
- res |= (d >> (32 - cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 &&
- XOR2((res & 0x1) + ((res >> 30) & 0x2)),
- F_OF);
- } if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROR instruction and side effects.
-****************************************************************************/
-u8 ror_byte(u8 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- /* rotate right */
- /*
- s is the rotate distance. It varies from 0 - 8.
- d is the byte object rotated.
-
- have
-
- B_7 ... B_0
-
- The rotate is done mod 8.
-
- IF n > 0
- 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
- 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0)
- */
- res = d;
- if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */
- /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */
- res = (d << (8 - cnt));
-
- /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */
- mask = (1 << (8 - cnt)) - 1;
- res |= (d >> (cnt)) & mask;
-
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
- /* OVERFLOW is set *IFF* s==1, then it is the
- xor of the two most significant bits. Blecck. */
- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
- } else if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROR instruction and side effects.
-****************************************************************************/
-u16 ror_word(u16 d, u8 s)
-{
- register unsigned int res, cnt, mask;
-
- res = d;
- if ((cnt = s % 16) != 0) {
- res = (d << (16 - cnt));
- mask = (1 << (16 - cnt)) - 1;
- res |= (d >> (cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
- } else if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the ROR instruction and side effects.
-****************************************************************************/
-u32 ror_long(u32 d, u8 s)
-{
- register u32 res, cnt, mask;
-
- res = d;
- if ((cnt = s % 32) != 0) {
- res = (d << (32 - cnt));
- mask = (1 << (32 - cnt)) - 1;
- res |= (d >> (cnt)) & mask;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
- } else if (s != 0) {
- /* set the new carry flag, Note that it is the low order
- bit of the result!!! */
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHL instruction and side effects.
-****************************************************************************/
-u8 shl_byte(u8 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 8) {
- cnt = s % 8;
-
- /* last bit shifted out goes into carry flag */
- if (cnt > 0) {
- res = d << cnt;
- cf = d & (1 << (8 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = (u8) d;
- }
-
- if (cnt == 1) {
- /* Needs simplification. */
- CONDITIONAL_SET_FLAG(
- (((res & 0x80) == 0x80) ^
- (ACCESS_FLAG(F_CF) != 0)),
- /* was (M.x86.R_FLG&F_CF)==F_CF)), */
- F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHL instruction and side effects.
-****************************************************************************/
-u16 shl_word(u16 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- res = d << cnt;
- cf = d & (1 << (16 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = (u16) d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(
- (((res & 0x8000) == 0x8000) ^
- (ACCESS_FLAG(F_CF) != 0)),
- F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHL instruction and side effects.
-****************************************************************************/
-u32 shl_long(u32 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- res = d << cnt;
- cf = d & (1 << (32 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
- (ACCESS_FLAG(F_CF) != 0)), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHR instruction and side effects.
-****************************************************************************/
-u8 shr_byte(u8 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 8) {
- cnt = s % 8;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = d >> cnt;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = (u8) d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHR instruction and side effects.
-****************************************************************************/
-u16 shr_word(u16 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = d >> cnt;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHR instruction and side effects.
-****************************************************************************/
-u32 shr_long(u32 d, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = d >> cnt;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SAR instruction and side effects.
-****************************************************************************/
-u8 sar_byte(u8 d, u8 s)
-{
- unsigned int cnt, res, cf, mask, sf;
-
- res = d;
- sf = d & 0x80;
- cnt = s % 8;
- if (cnt > 0 && cnt < 8) {
- mask = (1 << (8 - cnt)) - 1;
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) & mask;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (sf) {
- res |= ~mask;
- }
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- } else if (cnt >= 8) {
- if (sf) {
- res = 0xff;
- SET_FLAG(F_CF);
- CLEAR_FLAG(F_ZF);
- SET_FLAG(F_SF);
- SET_FLAG(F_PF);
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- }
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SAR instruction and side effects.
-****************************************************************************/
-u16 sar_word(u16 d, u8 s)
-{
- unsigned int cnt, res, cf, mask, sf;
-
- sf = d & 0x8000;
- cnt = s % 16;
- res = d;
- if (cnt > 0 && cnt < 16) {
- mask = (1 << (16 - cnt)) - 1;
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) & mask;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (sf) {
- res |= ~mask;
- }
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else if (cnt >= 16) {
- if (sf) {
- res = 0xffff;
- SET_FLAG(F_CF);
- CLEAR_FLAG(F_ZF);
- SET_FLAG(F_SF);
- SET_FLAG(F_PF);
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SAR instruction and side effects.
-****************************************************************************/
-u32 sar_long(u32 d, u8 s)
-{
- u32 cnt, res, cf, mask, sf;
-
- sf = d & 0x80000000;
- cnt = s % 32;
- res = d;
- if (cnt > 0 && cnt < 32) {
- mask = (1 << (32 - cnt)) - 1;
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) & mask;
- CONDITIONAL_SET_FLAG(cf, F_CF);
- if (sf) {
- res |= ~mask;
- }
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else if (cnt >= 32) {
- if (sf) {
- res = 0xffffffff;
- SET_FLAG(F_CF);
- CLEAR_FLAG(F_ZF);
- SET_FLAG(F_SF);
- SET_FLAG(F_PF);
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHLD instruction and side effects.
-****************************************************************************/
-u16 shld_word (u16 d, u16 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- res = (d << cnt) | (fill >> (16-cnt));
- cf = d & (1 << (16 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
- (ACCESS_FLAG(F_CF) != 0)), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHLD instruction and side effects.
-****************************************************************************/
-u32 shld_long (u32 d, u32 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- res = (d << cnt) | (fill >> (32-cnt));
- cf = d & (1 << (32 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
- (ACCESS_FLAG(F_CF) != 0)), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
- CLEAR_FLAG(F_OF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_PF);
- SET_FLAG(F_ZF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHRD instruction and side effects.
-****************************************************************************/
-u16 shrd_word (u16 d, u16 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 16) {
- cnt = s % 16;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) | (fill << (16 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
-
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SHRD instruction and side effects.
-****************************************************************************/
-u32 shrd_long (u32 d, u32 fill, u8 s)
-{
- unsigned int cnt, res, cf;
-
- if (s < 32) {
- cnt = s % 32;
- if (cnt > 0) {
- cf = d & (1 << (cnt - 1));
- res = (d >> cnt) | (fill << (32 - cnt));
- CONDITIONAL_SET_FLAG(cf, F_CF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- } else {
- res = d;
- }
- if (cnt == 1) {
- CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
- } else {
- CLEAR_FLAG(F_OF);
- }
- } else {
- res = 0;
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- SET_FLAG(F_ZF);
- CLEAR_FLAG(F_SF);
- CLEAR_FLAG(F_PF);
- }
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SBB instruction and side effects.
-****************************************************************************/
-u8 sbb_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- if (ACCESS_FLAG(F_CF))
- res = d - s - 1;
- else
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SBB instruction and side effects.
-****************************************************************************/
-u16 sbb_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- if (ACCESS_FLAG(F_CF))
- res = d - s - 1;
- else
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SBB instruction and side effects.
-****************************************************************************/
-u32 sbb_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- if (ACCESS_FLAG(F_CF))
- res = d - s - 1;
- else
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SUB instruction and side effects.
-****************************************************************************/
-u8 sub_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u8)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SUB instruction and side effects.
-****************************************************************************/
-u16 sub_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return (u16)res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the SUB instruction and side effects.
-****************************************************************************/
-u32 sub_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
- register u32 bc;
-
- res = d - s;
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
-
- /* calculate the borrow chain. See note at top */
- bc = (res & (~d | s)) | (~d & s);
- CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
- CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
- CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the TEST instruction and side effects.
-****************************************************************************/
-void test_byte(u8 d, u8 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- /* AF == dont care */
- CLEAR_FLAG(F_CF);
-}
-
-/****************************************************************************
-REMARKS:
-Implements the TEST instruction and side effects.
-****************************************************************************/
-void test_word(u16 d, u16 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- /* AF == dont care */
- CLEAR_FLAG(F_CF);
-}
-
-/****************************************************************************
-REMARKS:
-Implements the TEST instruction and side effects.
-****************************************************************************/
-void test_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d & s;
-
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- /* AF == dont care */
- CLEAR_FLAG(F_CF);
-}
-
-/****************************************************************************
-REMARKS:
-Implements the XOR instruction and side effects.
-****************************************************************************/
-u8 xor_byte(u8 d, u8 s)
-{
- register u8 res; /* all operands in native machine order */
-
- res = d ^ s;
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res), F_PF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the XOR instruction and side effects.
-****************************************************************************/
-u16 xor_word(u16 d, u16 s)
-{
- register u16 res; /* all operands in native machine order */
-
- res = d ^ s;
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the XOR instruction and side effects.
-****************************************************************************/
-u32 xor_long(u32 d, u32 s)
-{
- register u32 res; /* all operands in native machine order */
-
- res = d ^ s;
- CLEAR_FLAG(F_OF);
- CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
- CONDITIONAL_SET_FLAG(res == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF);
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_byte(u8 s)
-{
- s16 res = (s16)((s8)M.x86.R_AL * (s8)s);
-
- M.x86.R_AX = res;
- if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) ||
- ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_word(u16 s)
-{
- s32 res = (s16)M.x86.R_AX * (s16)s;
-
- M.x86.R_AX = (u16)res;
- M.x86.R_DX = (u16)(res >> 16);
- if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x00) ||
- ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFF)) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- s64 res = (s32)d * (s32)s;
-
- *res_lo = (u32)res;
- *res_hi = (u32)(res >> 32);
-#else
- u32 d_lo,d_hi,d_sign;
- u32 s_lo,s_hi,s_sign;
- u32 rlo_lo,rlo_hi,rhi_lo;
-
- if ((d_sign = d & 0x80000000) != 0)
- d = -d;
- d_lo = d & 0xFFFF;
- d_hi = d >> 16;
- if ((s_sign = s & 0x80000000) != 0)
- s = -s;
- s_lo = s & 0xFFFF;
- s_hi = s >> 16;
- rlo_lo = d_lo * s_lo;
- rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16);
- rhi_lo = d_hi * s_hi + (rlo_hi >> 16);
- *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
- *res_hi = rhi_lo;
- if (d_sign != s_sign) {
- d = ~*res_lo;
- s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16);
- *res_lo = ~*res_lo+1;
- *res_hi = ~*res_hi+(s >> 16);
- }
-#endif
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IMUL instruction and side effects.
-****************************************************************************/
-void imul_long(u32 s)
-{
- imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s);
- if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00) ||
- ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFF)) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the MUL instruction and side effects.
-****************************************************************************/
-void mul_byte(u8 s)
-{
- u16 res = (u16)(M.x86.R_AL * s);
-
- M.x86.R_AX = res;
- if (M.x86.R_AH == 0) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the MUL instruction and side effects.
-****************************************************************************/
-void mul_word(u16 s)
-{
- u32 res = M.x86.R_AX * s;
-
- M.x86.R_AX = (u16)res;
- M.x86.R_DX = (u16)(res >> 16);
- if (M.x86.R_DX == 0) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the MUL instruction and side effects.
-****************************************************************************/
-void mul_long(u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- u64 res = (u32)M.x86.R_EAX * (u32)s;
-
- M.x86.R_EAX = (u32)res;
- M.x86.R_EDX = (u32)(res >> 32);
-#else
- u32 a,a_lo,a_hi;
- u32 s_lo,s_hi;
- u32 rlo_lo,rlo_hi,rhi_lo;
-
- a = M.x86.R_EAX;
- a_lo = a & 0xFFFF;
- a_hi = a >> 16;
- s_lo = s & 0xFFFF;
- s_hi = s >> 16;
- rlo_lo = a_lo * s_lo;
- rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16);
- rhi_lo = a_hi * s_hi + (rlo_hi >> 16);
- M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
- M.x86.R_EDX = rhi_lo;
-#endif
-
- if (M.x86.R_EDX == 0) {
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_OF);
- } else {
- SET_FLAG(F_CF);
- SET_FLAG(F_OF);
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IDIV instruction and side effects.
-****************************************************************************/
-void idiv_byte(u8 s)
-{
- s32 dvd, div, mod;
-
- dvd = (s16)M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (s8)s;
- mod = dvd % (s8)s;
- if (abs(div) > 0x7f) {
- x86emu_intr_raise(0);
- return;
- }
- M.x86.R_AL = (s8) div;
- M.x86.R_AH = (s8) mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IDIV instruction and side effects.
-****************************************************************************/
-void idiv_word(u16 s)
-{
- s32 dvd, div, mod;
-
- dvd = (((s32)M.x86.R_DX) << 16) | M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (s16)s;
- mod = dvd % (s16)s;
- if (abs(div) > 0x7fff) {
- x86emu_intr_raise(0);
- return;
- }
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(div == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_AX = (u16)div;
- M.x86.R_DX = (u16)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the IDIV instruction and side effects.
-****************************************************************************/
-void idiv_long(u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- s64 dvd, div, mod;
-
- dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (s32)s;
- mod = dvd % (s32)s;
- if (abs(div) > 0x7fffffff) {
- x86emu_intr_raise(0);
- return;
- }
-#else
- s32 div = 0, mod;
- s32 h_dvd = M.x86.R_EDX;
- u32 l_dvd = M.x86.R_EAX;
- u32 abs_s = s & 0x7FFFFFFF;
- u32 abs_h_dvd = h_dvd & 0x7FFFFFFF;
- u32 h_s = abs_s >> 1;
- u32 l_s = abs_s << 31;
- int counter = 31;
- int carry;
-
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- do {
- div <<= 1;
- carry = (l_dvd >= l_s) ? 0 : 1;
-
- if (abs_h_dvd < (h_s + carry)) {
- h_s >>= 1;
- l_s = abs_s << (--counter);
- continue;
- } else {
- abs_h_dvd -= (h_s + carry);
- l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
- : (l_dvd - l_s);
- h_s >>= 1;
- l_s = abs_s << (--counter);
- div |= 1;
- continue;
- }
-
- } while (counter > -1);
- /* overflow */
- if (abs_h_dvd || (l_dvd > abs_s)) {
- x86emu_intr_raise(0);
- return;
- }
- /* sign */
- div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000));
- mod = l_dvd;
-
-#endif
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_EAX = (u32)div;
- M.x86.R_EDX = (u32)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DIV instruction and side effects.
-****************************************************************************/
-void div_byte(u8 s)
-{
- u32 dvd, div, mod;
-
- dvd = M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (u8)s;
- mod = dvd % (u8)s;
- if (abs(div) > 0xff) {
- x86emu_intr_raise(0);
- return;
- }
- M.x86.R_AL = (u8)div;
- M.x86.R_AH = (u8)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DIV instruction and side effects.
-****************************************************************************/
-void div_word(u16 s)
-{
- u32 dvd, div, mod;
-
- dvd = (((u32)M.x86.R_DX) << 16) | M.x86.R_AX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (u16)s;
- mod = dvd % (u16)s;
- if (abs(div) > 0xffff) {
- x86emu_intr_raise(0);
- return;
- }
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_SF);
- CONDITIONAL_SET_FLAG(div == 0, F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_AX = (u16)div;
- M.x86.R_DX = (u16)mod;
-}
-
-/****************************************************************************
-REMARKS:
-Implements the DIV instruction and side effects.
-****************************************************************************/
-void div_long(u32 s)
-{
-#ifdef __HAS_LONG_LONG__
- u64 dvd, div, mod;
-
- dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- div = dvd / (u32)s;
- mod = dvd % (u32)s;
- if (abs(div) > 0xffffffff) {
- x86emu_intr_raise(0);
- return;
- }
-#else
- s32 div = 0, mod;
- s32 h_dvd = M.x86.R_EDX;
- u32 l_dvd = M.x86.R_EAX;
-
- u32 h_s = s;
- u32 l_s = 0;
- int counter = 32;
- int carry;
-
- if (s == 0) {
- x86emu_intr_raise(0);
- return;
- }
- do {
- div <<= 1;
- carry = (l_dvd >= l_s) ? 0 : 1;
-
- if (h_dvd < (h_s + carry)) {
- h_s >>= 1;
- l_s = s << (--counter);
- continue;
- } else {
- h_dvd -= (h_s + carry);
- l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
- : (l_dvd - l_s);
- h_s >>= 1;
- l_s = s << (--counter);
- div |= 1;
- continue;
- }
-
- } while (counter > -1);
- /* overflow */
- if (h_dvd || (l_dvd > s)) {
- x86emu_intr_raise(0);
- return;
- }
- mod = l_dvd;
-#endif
- CLEAR_FLAG(F_CF);
- CLEAR_FLAG(F_AF);
- CLEAR_FLAG(F_SF);
- SET_FLAG(F_ZF);
- CONDITIONAL_SET_FLAG(PARITY(mod & 0xff), F_PF);
-
- M.x86.R_EAX = (u32)div;
- M.x86.R_EDX = (u32)mod;
-}
-
-#endif /* __HAVE_INLINE_ASSEMBLER__ */
-
-/****************************************************************************
-REMARKS:
-Implements the IN string instruction and side effects.
-****************************************************************************/
-void ins(int size)
-{
- int inc = size;
-
- if (ACCESS_FLAG(F_DF)) {
- inc = -size;
- }
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* in until CX is ZERO. */
- u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
- M.x86.R_ECX : M.x86.R_CX);
- switch (size) {
- case 1:
- while (count--) {
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inb)(M.x86.R_DX));
- M.x86.R_DI += inc;
- }
- break;
-
- case 2:
- while (count--) {
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inw)(M.x86.R_DX));
- M.x86.R_DI += inc;
- }
- break;
- case 4:
- while (count--) {
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inl)(M.x86.R_DX));
- M.x86.R_DI += inc;
- break;
- }
- }
- M.x86.R_CX = 0;
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = 0;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- switch (size) {
- case 1:
- store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inb)(M.x86.R_DX));
- break;
- case 2:
- store_data_word_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inw)(M.x86.R_DX));
- break;
- case 4:
- store_data_long_abs(M.x86.R_ES, M.x86.R_DI,
- (*sys_inl)(M.x86.R_DX));
- break;
- }
- M.x86.R_DI += inc;
- }
-}
-
-/****************************************************************************
-REMARKS:
-Implements the OUT string instruction and side effects.
-****************************************************************************/
-void outs(int size)
-{
- int inc = size;
-
- if (ACCESS_FLAG(F_DF)) {
- inc = -size;
- }
- if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
- /* dont care whether REPE or REPNE */
- /* out until CX is ZERO. */
- u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
- M.x86.R_ECX : M.x86.R_CX);
- switch (size) {
- case 1:
- while (count--) {
- (*sys_outb)(M.x86.R_DX,
- fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
- M.x86.R_SI += inc;
- }
- break;
-
- case 2:
- while (count--) {
- (*sys_outw)(M.x86.R_DX,
- fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
- M.x86.R_SI += inc;
- }
- break;
- case 4:
- while (count--) {
- (*sys_outl)(M.x86.R_DX,
- fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
- M.x86.R_SI += inc;
- break;
- }
- }
- M.x86.R_CX = 0;
- if (M.x86.mode & SYSMODE_PREFIX_DATA) {
- M.x86.R_ECX = 0;
- }
- M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
- } else {
- switch (size) {
- case 1:
- (*sys_outb)(M.x86.R_DX,
- fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
- break;
- case 2:
- (*sys_outw)(M.x86.R_DX,
- fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
- break;
- case 4:
- (*sys_outl)(M.x86.R_DX,
- fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
- break;
- }
- M.x86.R_SI += inc;
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Address to fetch word from
-
-REMARKS:
-Fetches a word from emulator memory using an absolute address.
-****************************************************************************/
-u16 mem_access_word(int addr)
-{
-DB( if (CHECK_MEM_ACCESS())
- x86emu_check_mem_access(addr);)
- return (*sys_rdw)(addr);
-}
-
-/****************************************************************************
-REMARKS:
-Pushes a word onto the stack.
-
-NOTE: Do not inline this, as (*sys_wrX) is already inline!
-****************************************************************************/
-void push_word(u16 w)
-{
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- M.x86.R_SP -= 2;
- (*sys_wrw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
-}
-
-/****************************************************************************
-REMARKS:
-Pushes a long onto the stack.
-
-NOTE: Do not inline this, as (*sys_wrX) is already inline!
-****************************************************************************/
-void push_long(u32 w)
-{
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- M.x86.R_SP -= 4;
- (*sys_wrl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
-}
-
-/****************************************************************************
-REMARKS:
-Pops a word from the stack.
-
-NOTE: Do not inline this, as (*sys_rdX) is already inline!
-****************************************************************************/
-u16 pop_word(void)
-{
- register u16 res;
-
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- res = (*sys_rdw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
- M.x86.R_SP += 2;
- return res;
-}
-
-/****************************************************************************
-REMARKS:
-Pops a long from the stack.
-
-NOTE: Do not inline this, as (*sys_rdX) is already inline!
-****************************************************************************/
-u32 pop_long(void)
-{
- register u32 res;
-
-DB( if (CHECK_SP_ACCESS())
- x86emu_check_sp_access();)
- res = (*sys_rdl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
- M.x86.R_SP += 4;
- return res;
-}
-
-#ifdef __HAVE_INLINE_ASSEMBLER__
-
-u16 aaa_word (u16 d)
-{ return aaa_word_asm(&M.x86.R_EFLG,d); }
-
-u16 aas_word (u16 d)
-{ return aas_word_asm(&M.x86.R_EFLG,d); }
-
-u16 aad_word (u16 d)
-{ return aad_word_asm(&M.x86.R_EFLG,d); }
-
-u16 aam_word (u8 d)
-{ return aam_word_asm(&M.x86.R_EFLG,d); }
-
-u8 adc_byte (u8 d, u8 s)
-{ return adc_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 adc_word (u16 d, u16 s)
-{ return adc_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 adc_long (u32 d, u32 s)
-{ return adc_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 add_byte (u8 d, u8 s)
-{ return add_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 add_word (u16 d, u16 s)
-{ return add_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 add_long (u32 d, u32 s)
-{ return add_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 and_byte (u8 d, u8 s)
-{ return and_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 and_word (u16 d, u16 s)
-{ return and_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 and_long (u32 d, u32 s)
-{ return and_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 cmp_byte (u8 d, u8 s)
-{ return cmp_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 cmp_word (u16 d, u16 s)
-{ return cmp_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 cmp_long (u32 d, u32 s)
-{ return cmp_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 daa_byte (u8 d)
-{ return daa_byte_asm(&M.x86.R_EFLG,d); }
-
-u8 das_byte (u8 d)
-{ return das_byte_asm(&M.x86.R_EFLG,d); }
-
-u8 dec_byte (u8 d)
-{ return dec_byte_asm(&M.x86.R_EFLG,d); }
-
-u16 dec_word (u16 d)
-{ return dec_word_asm(&M.x86.R_EFLG,d); }
-
-u32 dec_long (u32 d)
-{ return dec_long_asm(&M.x86.R_EFLG,d); }
-
-u8 inc_byte (u8 d)
-{ return inc_byte_asm(&M.x86.R_EFLG,d); }
-
-u16 inc_word (u16 d)
-{ return inc_word_asm(&M.x86.R_EFLG,d); }
-
-u32 inc_long (u32 d)
-{ return inc_long_asm(&M.x86.R_EFLG,d); }
-
-u8 or_byte (u8 d, u8 s)
-{ return or_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 or_word (u16 d, u16 s)
-{ return or_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 or_long (u32 d, u32 s)
-{ return or_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 neg_byte (u8 s)
-{ return neg_byte_asm(&M.x86.R_EFLG,s); }
-
-u16 neg_word (u16 s)
-{ return neg_word_asm(&M.x86.R_EFLG,s); }
-
-u32 neg_long (u32 s)
-{ return neg_long_asm(&M.x86.R_EFLG,s); }
-
-u8 not_byte (u8 s)
-{ return not_byte_asm(&M.x86.R_EFLG,s); }
-
-u16 not_word (u16 s)
-{ return not_word_asm(&M.x86.R_EFLG,s); }
-
-u32 not_long (u32 s)
-{ return not_long_asm(&M.x86.R_EFLG,s); }
-
-u8 rcl_byte (u8 d, u8 s)
-{ return rcl_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 rcl_word (u16 d, u8 s)
-{ return rcl_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 rcl_long (u32 d, u8 s)
-{ return rcl_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 rcr_byte (u8 d, u8 s)
-{ return rcr_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 rcr_word (u16 d, u8 s)
-{ return rcr_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 rcr_long (u32 d, u8 s)
-{ return rcr_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 rol_byte (u8 d, u8 s)
-{ return rol_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 rol_word (u16 d, u8 s)
-{ return rol_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 rol_long (u32 d, u8 s)
-{ return rol_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 ror_byte (u8 d, u8 s)
-{ return ror_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 ror_word (u16 d, u8 s)
-{ return ror_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 ror_long (u32 d, u8 s)
-{ return ror_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 shl_byte (u8 d, u8 s)
-{ return shl_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 shl_word (u16 d, u8 s)
-{ return shl_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 shl_long (u32 d, u8 s)
-{ return shl_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 shr_byte (u8 d, u8 s)
-{ return shr_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 shr_word (u16 d, u8 s)
-{ return shr_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 shr_long (u32 d, u8 s)
-{ return shr_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 sar_byte (u8 d, u8 s)
-{ return sar_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 sar_word (u16 d, u8 s)
-{ return sar_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 sar_long (u32 d, u8 s)
-{ return sar_long_asm(&M.x86.R_EFLG,d,s); }
-
-u16 shld_word (u16 d, u16 fill, u8 s)
-{ return shld_word_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u32 shld_long (u32 d, u32 fill, u8 s)
-{ return shld_long_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u16 shrd_word (u16 d, u16 fill, u8 s)
-{ return shrd_word_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u32 shrd_long (u32 d, u32 fill, u8 s)
-{ return shrd_long_asm(&M.x86.R_EFLG,d,fill,s); }
-
-u8 sbb_byte (u8 d, u8 s)
-{ return sbb_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 sbb_word (u16 d, u16 s)
-{ return sbb_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 sbb_long (u32 d, u32 s)
-{ return sbb_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 sub_byte (u8 d, u8 s)
-{ return sub_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 sub_word (u16 d, u16 s)
-{ return sub_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 sub_long (u32 d, u32 s)
-{ return sub_long_asm(&M.x86.R_EFLG,d,s); }
-
-void test_byte (u8 d, u8 s)
-{ test_byte_asm(&M.x86.R_EFLG,d,s); }
-
-void test_word (u16 d, u16 s)
-{ test_word_asm(&M.x86.R_EFLG,d,s); }
-
-void test_long (u32 d, u32 s)
-{ test_long_asm(&M.x86.R_EFLG,d,s); }
-
-u8 xor_byte (u8 d, u8 s)
-{ return xor_byte_asm(&M.x86.R_EFLG,d,s); }
-
-u16 xor_word (u16 d, u16 s)
-{ return xor_word_asm(&M.x86.R_EFLG,d,s); }
-
-u32 xor_long (u32 d, u32 s)
-{ return xor_long_asm(&M.x86.R_EFLG,d,s); }
-
-void imul_byte (u8 s)
-{ imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s); }
-
-void imul_word (u16 s)
-{ imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s); }
-
-void imul_long (u32 s)
-{ imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); }
-
-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
-{ imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s); }
-
-void mul_byte (u8 s)
-{ mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s); }
-
-void mul_word (u16 s)
-{ mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s); }
-
-void mul_long (u32 s)
-{ mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s); }
-
-void idiv_byte (u8 s)
-{ idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s); }
-
-void idiv_word (u16 s)
-{ idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s); }
-
-void idiv_long (u32 s)
-{ idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s); }
-
-void div_byte (u8 s)
-{ div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s); }
-
-void div_word (u16 s)
-{ div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s); }
-
-void div_long (u32 s)
-{ div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s); }
-
-#endif
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/sys.c b/board/MAI/bios_emulator/scitech/src/x86emu/sys.c
deleted file mode 100644
index afe58f8..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/sys.c
+++ /dev/null
@@ -1,658 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: This file includes subroutines which are related to
-* programmed I/O and memory access. Included in this module
-* are default functions with limited usefulness. For real
-* uses these functions will most likely be overriden by the
-* user library.
-*
-****************************************************************************/
-
-#include "x86emu.h"
-#include "x86emu/regs.h"
-#include "x86emu/debug.h"
-#include "x86emu/prim_ops.h"
-#include <string.h>
-
-/*------------------------- Global Variables ------------------------------*/
-
-X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
-X86EMU_intrFuncs _X86EMU_intrTab[256];
-
-/*----------------------------- Implementation ----------------------------*/
-#ifdef __alpha__
-/* to cope with broken egcs-1.1.2 :-(((( */
-
-/*
- * inline functions to do unaligned accesses
- * from linux/include/asm-alpha/unaligned.h
- */
-
-/*
- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
- * packed structures to talk about such things with.
- */
-
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
-struct __una_u64 { unsigned long x __attribute__((packed)); };
-struct __una_u32 { unsigned int x __attribute__((packed)); };
-struct __una_u16 { unsigned short x __attribute__((packed)); };
-#endif
-
-static __inline__ unsigned long ldq_u(unsigned long * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
- return ptr->x;
-#else
- unsigned long r1,r2;
- __asm__("ldq_u %0,%3\n\t"
- "ldq_u %1,%4\n\t"
- "extql %0,%2,%0\n\t"
- "extqh %1,%2,%1"
- :"=&r" (r1), "=&r" (r2)
- :"r" (r11),
- "m" (*r11),
- "m" (*(const unsigned long *)(7+(char *) r11)));
- return r1 | r2;
-#endif
-}
-
-static __inline__ unsigned long ldl_u(unsigned int * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
- return ptr->x;
-#else
- unsigned long r1,r2;
- __asm__("ldq_u %0,%3\n\t"
- "ldq_u %1,%4\n\t"
- "extll %0,%2,%0\n\t"
- "extlh %1,%2,%1"
- :"=&r" (r1), "=&r" (r2)
- :"r" (r11),
- "m" (*r11),
- "m" (*(const unsigned long *)(3+(char *) r11)));
- return r1 | r2;
-#endif
-}
-
-static __inline__ unsigned long ldw_u(unsigned short * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
- return ptr->x;
-#else
- unsigned long r1,r2;
- __asm__("ldq_u %0,%3\n\t"
- "ldq_u %1,%4\n\t"
- "extwl %0,%2,%0\n\t"
- "extwh %1,%2,%1"
- :"=&r" (r1), "=&r" (r2)
- :"r" (r11),
- "m" (*r11),
- "m" (*(const unsigned long *)(1+(char *) r11)));
- return r1 | r2;
-#endif
-}
-
-/*
- * Elemental unaligned stores
- */
-
-static __inline__ void stq_u(unsigned long r5, unsigned long * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- struct __una_u64 *ptr = (struct __una_u64 *) r11;
- ptr->x = r5;
-#else
- unsigned long r1,r2,r3,r4;
-
- __asm__("ldq_u %3,%1\n\t"
- "ldq_u %2,%0\n\t"
- "insqh %6,%7,%5\n\t"
- "insql %6,%7,%4\n\t"
- "mskqh %3,%7,%3\n\t"
- "mskql %2,%7,%2\n\t"
- "bis %3,%5,%3\n\t"
- "bis %2,%4,%2\n\t"
- "stq_u %3,%1\n\t"
- "stq_u %2,%0"
- :"=m" (*r11),
- "=m" (*(unsigned long *)(7+(char *) r11)),
- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
- :"r" (r5), "r" (r11));
-#endif
-}
-
-static __inline__ void stl_u(unsigned long r5, unsigned int * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- struct __una_u32 *ptr = (struct __una_u32 *) r11;
- ptr->x = r5;
-#else
- unsigned long r1,r2,r3,r4;
-
- __asm__("ldq_u %3,%1\n\t"
- "ldq_u %2,%0\n\t"
- "inslh %6,%7,%5\n\t"
- "insll %6,%7,%4\n\t"
- "msklh %3,%7,%3\n\t"
- "mskll %2,%7,%2\n\t"
- "bis %3,%5,%3\n\t"
- "bis %2,%4,%2\n\t"
- "stq_u %3,%1\n\t"
- "stq_u %2,%0"
- :"=m" (*r11),
- "=m" (*(unsigned long *)(3+(char *) r11)),
- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
- :"r" (r5), "r" (r11));
-#endif
-}
-
-static __inline__ void stw_u(unsigned long r5, unsigned short * r11)
-{
-#if __GNUC__ > 2 || __GNUC_MINOR__ >= 91
- struct __una_u16 *ptr = (struct __una_u16 *) r11;
- ptr->x = r5;
-#else
- unsigned long r1,r2,r3,r4;
-
- __asm__("ldq_u %3,%1\n\t"
- "ldq_u %2,%0\n\t"
- "inswh %6,%7,%5\n\t"
- "inswl %6,%7,%4\n\t"
- "mskwh %3,%7,%3\n\t"
- "mskwl %2,%7,%2\n\t"
- "bis %3,%5,%3\n\t"
- "bis %2,%4,%2\n\t"
- "stq_u %3,%1\n\t"
- "stq_u %2,%0"
- :"=m" (*r11),
- "=m" (*(unsigned long *)(1+(char *) r11)),
- "=&r" (r1), "=&r" (r2), "=&r" (r3), "=&r" (r4)
- :"r" (r5), "r" (r11));
-#endif
-}
-
-#elif defined (__ia64__)
-/*
- * EGCS 1.1 knows about arbitrary unaligned loads. Define some
- * packed structures to talk about such things with.
- */
-struct __una_u64 { unsigned long x __attribute__((packed)); };
-struct __una_u32 { unsigned int x __attribute__((packed)); };
-struct __una_u16 { unsigned short x __attribute__((packed)); };
-
-static __inline__ unsigned long
-__uldq (const unsigned long * r11)
-{
- const struct __una_u64 *ptr = (const struct __una_u64 *) r11;
- return ptr->x;
-}
-
-static __inline__ unsigned long
-uldl (const unsigned int * r11)
-{
- const struct __una_u32 *ptr = (const struct __una_u32 *) r11;
- return ptr->x;
-}
-
-static __inline__ unsigned long
-uldw (const unsigned short * r11)
-{
- const struct __una_u16 *ptr = (const struct __una_u16 *) r11;
- return ptr->x;
-}
-
-static __inline__ void
-ustq (unsigned long r5, unsigned long * r11)
-{
- struct __una_u64 *ptr = (struct __una_u64 *) r11;
- ptr->x = r5;
-}
-
-static __inline__ void
-ustl (unsigned long r5, unsigned int * r11)
-{
- struct __una_u32 *ptr = (struct __una_u32 *) r11;
- ptr->x = r5;
-}
-
-static __inline__ void
-ustw (unsigned long r5, unsigned short * r11)
-{
- struct __una_u16 *ptr = (struct __una_u16 *) r11;
- ptr->x = r5;
-}
-
-#endif
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Byte value read from emulator memory.
-
-REMARKS:
-Reads a byte value from the emulator memory.
-****************************************************************************/
-u8 X86API rdb(
- u32 addr)
-{
- u8 val;
-
- if (addr > M.mem_size - 1) {
- DB(printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- val = *(u8*)(M.mem_base + addr);
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 1 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Word value read from emulator memory.
-
-REMARKS:
-Reads a word value from the emulator memory.
-****************************************************************************/
-u16 X86API rdw(
- u32 addr)
-{
- u16 val = 0;
-
- if (addr > M.mem_size - 2) {
- DB(printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- val = (*(u8*)(M.mem_base + addr) |
- (*(u8*)(M.mem_base + addr + 1) << 8));
- }
- else
-#endif
-#ifdef __alpha__
- val = ldw_u((u16*)(M.mem_base + addr));
-#elif defined (__ia64__)
- val = uldw((u16*)(M.mem_base + addr));
-#else
- val = *(u16*)(M.mem_base + addr);
-#endif
- DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 2 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-
-RETURNS:
-Long value read from emulator memory.
-REMARKS:
-Reads a long value from the emulator memory.
-****************************************************************************/
-u32 X86API rdl(
- u32 addr)
-{
- u32 val = 0;
-
- if (addr > M.mem_size - 4) {
- DB(printk("mem_read: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x3) {
- val = (*(u8*)(M.mem_base + addr + 0) |
- (*(u8*)(M.mem_base + addr + 1) << 8) |
- (*(u8*)(M.mem_base + addr + 2) << 16) |
- (*(u8*)(M.mem_base + addr + 3) << 24));
- }
- else
-#endif
-#ifdef __alpha__
- val = ldl_u((u32*)(M.mem_base + addr));
-#elif defined (__ia64__)
- val = uldl((u32*)(M.mem_base + addr));
-#else
- val = *(u32*)(M.mem_base + addr);
-#endif
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 4 -> %#x\n", addr, val);)
- return val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a byte value to emulator memory.
-****************************************************************************/
-void X86API wrb(
- u32 addr,
- u8 val)
-{
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 1 <- %#x\n", addr, val);)
- if (addr > M.mem_size - 1) {
- DB(printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
- *(u8*)(M.mem_base + addr) = val;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a word value to emulator memory.
-****************************************************************************/
-void X86API wrw(
- u32 addr,
- u16 val)
-{
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 2 <- %#x\n", addr, val);)
- if (addr > M.mem_size - 2) {
- DB(printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- }
- else
-#endif
-#ifdef __alpha__
- stw_u(val,(u16*)(M.mem_base + addr));
-#elif defined (__ia64__)
- ustw(val,(u16*)(M.mem_base + addr));
-#else
- *(u16*)(M.mem_base + addr) = val;
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - Emulator memory address to read
-val - Value to store
-
-REMARKS:
-Writes a long value to emulator memory.
-****************************************************************************/
-void X86API wrl(
- u32 addr,
- u32 val)
-{
-DB( if (DEBUG_MEM_TRACE())
- printk("%#08x 4 <- %#x\n", addr, val);)
- if (addr > M.mem_size - 4) {
- DB(printk("mem_write: address %#lx out of range!\n", addr);)
- HALT_SYS();
- }
-#ifdef __BIG_ENDIAN__
- if (addr & 0x1) {
- *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff;
- *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff;
- *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff;
- *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff;
- }
- else
-#endif
-#ifdef __alpha__
- stl_u(val,(u32*)(M.mem_base + addr));
-#elif defined (__ia64__)
- ustl(val,(u32*)(M.mem_base + addr));
-#else
- *(u32*)(M.mem_base + addr) = val;
-#endif
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to read
-RETURN:
-0
-REMARKS:
-Default PIO byte read function. Doesn't perform real inb.
-****************************************************************************/
-static u8 X86API p_inb(
- X86EMU_pioAddr addr)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("inb %#04x \n", addr);)
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to read
-RETURN:
-0
-REMARKS:
-Default PIO word read function. Doesn't perform real inw.
-****************************************************************************/
-static u16 X86API p_inw(
- X86EMU_pioAddr addr)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("inw %#04x \n", addr);)
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to read
-RETURN:
-0
-REMARKS:
-Default PIO long read function. Doesn't perform real inl.
-****************************************************************************/
-static u32 X86API p_inl(
- X86EMU_pioAddr addr)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("inl %#04x \n", addr);)
- return 0;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to write
-val - Value to store
-REMARKS:
-Default PIO byte write function. Doesn't perform real outb.
-****************************************************************************/
-static void X86API p_outb(
- X86EMU_pioAddr addr,
- u8 val)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("outb %#02x -> %#04x \n", val, addr);)
- return;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to write
-val - Value to store
-REMARKS:
-Default PIO word write function. Doesn't perform real outw.
-****************************************************************************/
-static void X86API p_outw(
- X86EMU_pioAddr addr,
- u16 val)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("outw %#04x -> %#04x \n", val, addr);)
- return;
-}
-
-/****************************************************************************
-PARAMETERS:
-addr - PIO address to write
-val - Value to store
-REMARKS:
-Default PIO ;ong write function. Doesn't perform real outl.
-****************************************************************************/
-static void X86API p_outl(
- X86EMU_pioAddr addr,
- u32 val)
-{
-DB( if (DEBUG_IO_TRACE())
- printk("outl %#08x -> %#04x \n", val, addr);)
- return;
-}
-
-/*------------------------- Global Variables ------------------------------*/
-
-u8 (X86APIP sys_rdb)(u32 addr) = rdb;
-u16 (X86APIP sys_rdw)(u32 addr) = rdw;
-u32 (X86APIP sys_rdl)(u32 addr) = rdl;
-void (X86APIP sys_wrb)(u32 addr,u8 val) = wrb;
-void (X86APIP sys_wrw)(u32 addr,u16 val) = wrw;
-void (X86APIP sys_wrl)(u32 addr,u32 val) = wrl;
-u8 (X86APIP sys_inb)(X86EMU_pioAddr addr) = p_inb;
-u16 (X86APIP sys_inw)(X86EMU_pioAddr addr) = p_inw;
-u32 (X86APIP sys_inl)(X86EMU_pioAddr addr) = p_inl;
-void (X86APIP sys_outb)(X86EMU_pioAddr addr, u8 val) = p_outb;
-void (X86APIP sys_outw)(X86EMU_pioAddr addr, u16 val) = p_outw;
-void (X86APIP sys_outl)(X86EMU_pioAddr addr, u32 val) = p_outl;
-
-/*----------------------------- Setup -------------------------------------*/
-
-/****************************************************************************
-PARAMETERS:
-funcs - New memory function pointers to make active
-
-REMARKS:
-This function is used to set the pointers to functions which access
-memory space, allowing the user application to override these functions
-and hook them out as necessary for their application.
-****************************************************************************/
-void X86EMU_setupMemFuncs(
- X86EMU_memFuncs *funcs)
-{
- sys_rdb = funcs->rdb;
- sys_rdw = funcs->rdw;
- sys_rdl = funcs->rdl;
- sys_wrb = funcs->wrb;
- sys_wrw = funcs->wrw;
- sys_wrl = funcs->wrl;
-}
-
-/****************************************************************************
-PARAMETERS:
-funcs - New programmed I/O function pointers to make active
-
-REMARKS:
-This function is used to set the pointers to functions which access
-I/O space, allowing the user application to override these functions
-and hook them out as necessary for their application.
-****************************************************************************/
-void X86EMU_setupPioFuncs(
- X86EMU_pioFuncs *funcs)
-{
- sys_inb = funcs->inb;
- sys_inw = funcs->inw;
- sys_inl = funcs->inl;
- sys_outb = funcs->outb;
- sys_outw = funcs->outw;
- sys_outl = funcs->outl;
-}
-
-/****************************************************************************
-PARAMETERS:
-funcs - New interrupt vector table to make active
-
-REMARKS:
-This function is used to set the pointers to functions which handle
-interrupt processing in the emulator, allowing the user application to
-hook interrupts as necessary for their application. Any interrupts that
-are not hooked by the user application, and reflected and handled internally
-in the emulator via the interrupt vector table. This allows the application
-to get control when the code being emulated executes specific software
-interrupts.
-****************************************************************************/
-void X86EMU_setupIntrFuncs(
- X86EMU_intrFuncs funcs[])
-{
- int i;
-
- for (i=0; i < 256; i++)
- _X86EMU_intrTab[i] = NULL;
- if (funcs) {
- for (i = 0; i < 256; i++)
- _X86EMU_intrTab[i] = funcs[i];
- }
-}
-
-/****************************************************************************
-PARAMETERS:
-int - New software interrupt to prepare for
-
-REMARKS:
-This function is used to set up the emulator state to exceute a software
-interrupt. This can be used by the user application code to allow an
-interrupt to be hooked, examined and then reflected back to the emulator
-so that the code in the emulator will continue processing the software
-interrupt as per normal. This essentially allows system code to actively
-hook and handle certain software interrupts as necessary.
-****************************************************************************/
-void X86EMU_prepareForInt(
- int num)
-{
- push_word((u16)M.x86.R_FLG);
- CLEAR_FLAG(F_IF);
- CLEAR_FLAG(F_TF);
- push_word(M.x86.R_CS);
- M.x86.R_CS = mem_access_word(num * 4 + 2);
- push_word(M.x86.R_IP);
- M.x86.R_IP = mem_access_word(num * 4);
- M.x86.intr = 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/validate.c b/board/MAI/bios_emulator/scitech/src/x86emu/validate.c
deleted file mode 100644
index c951301..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/validate.c
+++ /dev/null
@@ -1,765 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: Watcom C 10.6 or later
-* Environment: 32-bit DOS
-* Developer: Kendall Bennett
-*
-* Description: Program to validate the x86 emulator library for
-* correctness. We run the emulator primitive operations
-* functions against the real x86 CPU, and compare the result
-* and flags to ensure correctness.
-*
-* We use inline assembler to compile and build this program.
-*
-****************************************************************************/
-
-#include <stdio.h>
-#include <stdlib.h>
-#include <string.h>
-#include <stdarg.h>
-#include "x86emu.h"
-#include "x86emu/prim_asm.h"
-
-/*-------------------------- Implementation -------------------------------*/
-
-#define true 1
-#define false 0
-
-#define ALL_FLAGS (F_CF | F_PF | F_AF | F_ZF | F_SF | F_OF)
-
-#define VAL_START_BINARY(parm_type,res_type,dmax,smax,dincr,sincr) \
-{ \
- parm_type d,s; \
- res_type r,r_asm; \
- ulong flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < dmax; d += dincr) { \
- for (s = 0; s < smax; s += sincr) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) {
-
-#define VAL_TEST_BINARY(name) \
- r_asm = name##_asm(&flags,d,s); \
- r = name(d,s); \
- if (r != r_asm || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) {
-
-#define VAL_TEST_BINARY_VOID(name) \
- name##_asm(&flags,d,s); \
- name(d,s); \
- r = r_asm = 0; \
- if (M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) {
-
-#define VAL_FAIL_BYTE_BYTE_BINARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_WORD_WORD_BINARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_LONG_LONG_BINARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_END_BINARY() \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_BYTE_BYTE_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u8,u8,0xFF,0xFF,1,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_BYTE_BYTE_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_WORD_WORD_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u16,u16,0xFF00,0xFF00,0x100,0x100) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_WORD_WORD_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_LONG_LONG_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u32,u32,0xFF000000,0xFF000000,0x1000000,0x1000000) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_LONG_LONG_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_VOID_BYTE_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u8,u8,0xFF,0xFF,1,1) \
- VAL_TEST_BINARY_VOID(name) \
- VAL_FAIL_BYTE_BYTE_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_VOID_WORD_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u16,u16,0xFF00,0xFF00,0x100,0x100) \
- VAL_TEST_BINARY_VOID(name) \
- VAL_FAIL_WORD_WORD_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_VOID_LONG_BINARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u32,u32,0xFF000000,0xFF000000,0x1000000,0x1000000) \
- VAL_TEST_BINARY_VOID(name) \
- VAL_FAIL_LONG_LONG_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_BYTE_ROTATE(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u8,u8,0xFF,8,1,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_BYTE_BYTE_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_WORD_ROTATE(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u16,u16,0xFF00,16,0x100,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_WORD_WORD_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_LONG_ROTATE(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_BINARY(u32,u32,0xFF000000,32,0x1000000,1) \
- VAL_TEST_BINARY(name) \
- VAL_FAIL_LONG_LONG_BINARY(name) \
- VAL_END_BINARY()
-
-#define VAL_START_TERNARY(parm_type,res_type,dmax,smax,dincr,sincr,maxshift)\
-{ \
- parm_type d,s; \
- res_type r,r_asm; \
- u8 shift; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < dmax; d += dincr) { \
- for (s = 0; s < smax; s += sincr) { \
- for (shift = 0; shift < maxshift; shift += 1) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) {
-
-#define VAL_TEST_TERNARY(name) \
- r_asm = name##_asm(&flags,d,s,shift); \
- r = name(d,s,shift); \
- if (r != r_asm || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) {
-
-#define VAL_FAIL_WORD_WORD_TERNARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \
- r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_LONG_LONG_TERNARY(name) \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \
- r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_END_TERNARY() \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_WORD_ROTATE_DBL(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_TERNARY(u16,u16,0xFF00,0xFF00,0x100,0x100,16) \
- VAL_TEST_TERNARY(name) \
- VAL_FAIL_WORD_WORD_TERNARY(name) \
- VAL_END_TERNARY()
-
-#define VAL_LONG_ROTATE_DBL(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_TERNARY(u32,u32,0xFF000000,0xFF000000,0x1000000,0x1000000,32) \
- VAL_TEST_TERNARY(name) \
- VAL_FAIL_LONG_LONG_TERNARY(name) \
- VAL_END_TERNARY()
-
-#define VAL_START_UNARY(parm_type,max,incr) \
-{ \
- parm_type d,r,r_asm; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < max; d += incr) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) {
-
-#define VAL_TEST_UNARY(name) \
- r_asm = name##_asm(&flags,d); \
- r = name(d); \
- if (r != r_asm || M.x86.R_EFLG != flags) { \
- failed = true;
-
-#define VAL_FAIL_BYTE_UNARY(name) \
- printk("fail\n"); \
- printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \
- r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_WORD_UNARY(name) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \
- r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_FAIL_LONG_UNARY(name) \
- printk("fail\n"); \
- printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \
- r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags));
-
-#define VAL_END_UNARY() \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | ALL_FLAGS; \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_BYTE_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u8,0xFF,0x1) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_BYTE_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_WORD_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u16,0xFF00,0x100) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_WORD_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_WORD_BYTE_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u16,0xFF,0x1) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_WORD_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_LONG_UNARY(name) \
- printk("Validating %s ... ", #name); \
- VAL_START_UNARY(u32,0xFF000000,0x1000000) \
- VAL_TEST_UNARY(name) \
- VAL_FAIL_LONG_UNARY(name) \
- VAL_END_UNARY()
-
-#define VAL_BYTE_MUL(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u8 d,s; \
- u16 r,r_asm; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF; d += 1) { \
- for (s = 0; s < 0xFF; s += 1) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- name##_asm(&flags,&r_asm,d,s); \
- M.x86.R_AL = d; \
- name(s); \
- r = M.x86.R_AX; \
- if (r != r_asm || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \
- r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_WORD_MUL(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u16 d,s; \
- u16 r_lo,r_asm_lo; \
- u16 r_hi,r_asm_hi; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF00; d += 0x100) { \
- for (s = 0; s < 0xFF00; s += 0x100) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \
- M.x86.R_AX = d; \
- name(s); \
- r_lo = M.x86.R_AX; \
- r_hi = M.x86.R_DX; \
- if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \
- r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_LONG_MUL(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u32 d,s; \
- u32 r_lo,r_asm_lo; \
- u32 r_hi,r_asm_hi; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF000000; d += 0x1000000) { \
- for (s = 0; s < 0xFF000000; s += 0x1000000) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \
- M.x86.R_EAX = d; \
- name(s); \
- r_lo = M.x86.R_EAX; \
- r_hi = M.x86.R_EDX; \
- if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \
- r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_BYTE_DIV(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u16 d,s; \
- u8 r_quot,r_rem,r_asm_quot,r_asm_rem; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF00; d += 0x100) { \
- for (s = 1; s < 0xFF; s += 1) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- M.x86.intr = 0; \
- M.x86.R_AX = d; \
- name(s); \
- r_quot = M.x86.R_AL; \
- r_rem = M.x86.R_AH; \
- if (M.x86.intr & INTR_SYNCH) \
- continue; \
- name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,s); \
- if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \
- r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \
- r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_WORD_DIV(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u32 d,s; \
- u16 r_quot,r_rem,r_asm_quot,r_asm_rem; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF000000; d += 0x1000000) { \
- for (s = 0x100; s < 0xFF00; s += 0x100) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- M.x86.intr = 0; \
- M.x86.R_AX = d & 0xFFFF; \
- M.x86.R_DX = d >> 16; \
- name(s); \
- r_quot = M.x86.R_AX; \
- r_rem = M.x86.R_DX; \
- if (M.x86.intr & INTR_SYNCH) \
- continue; \
- name##_asm(&flags,&r_asm_quot,&r_asm_rem,d & 0xFFFF,d >> 16,s);\
- if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \
- r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \
- r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-#define VAL_LONG_DIV(name) \
- printk("Validating %s ... ", #name); \
-{ \
- u32 d,s; \
- u32 r_quot,r_rem,r_asm_quot,r_asm_rem; \
- u32 flags,inflags; \
- int f,failed = false; \
- char buf1[80],buf2[80]; \
- for (d = 0; d < 0xFF000000; d += 0x1000000) { \
- for (s = 0x100; s < 0xFF00; s += 0x100) { \
- M.x86.R_EFLG = inflags = flags = def_flags; \
- for (f = 0; f < 2; f++) { \
- M.x86.intr = 0; \
- M.x86.R_EAX = d; \
- M.x86.R_EDX = 0; \
- name(s); \
- r_quot = M.x86.R_EAX; \
- r_rem = M.x86.R_EDX; \
- if (M.x86.intr & INTR_SYNCH) \
- continue; \
- name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,0,s); \
- if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \
- failed = true; \
- if (failed || trace) { \
- if (failed) \
- printk("fail\n"); \
- printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \
- r_quot, r_rem, #name, 0, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \
- printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \
- r_asm_quot, r_asm_rem, #name"_asm", 0, d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \
- } \
- M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (failed) \
- break; \
- } \
- if (!failed) \
- printk("passed\n"); \
-}
-
-void printk(const char *fmt, ...)
-{
- va_list argptr;
- va_start(argptr, fmt);
- vfprintf(stdout, fmt, argptr);
- fflush(stdout);
- va_end(argptr);
-}
-
-char * print_flags(char *buf,ulong flags)
-{
- char *separator = "";
-
- buf[0] = 0;
- if (flags & F_CF) {
- strcat(buf,separator);
- strcat(buf,"CF");
- separator = ",";
- }
- if (flags & F_PF) {
- strcat(buf,separator);
- strcat(buf,"PF");
- separator = ",";
- }
- if (flags & F_AF) {
- strcat(buf,separator);
- strcat(buf,"AF");
- separator = ",";
- }
- if (flags & F_ZF) {
- strcat(buf,separator);
- strcat(buf,"ZF");
- separator = ",";
- }
- if (flags & F_SF) {
- strcat(buf,separator);
- strcat(buf,"SF");
- separator = ",";
- }
- if (flags & F_OF) {
- strcat(buf,separator);
- strcat(buf,"OF");
- separator = ",";
- }
- if (separator[0] == 0)
- strcpy(buf,"None");
- return buf;
-}
-
-int main(int argc)
-{
- ulong def_flags;
- int trace = false;
-
- if (argc > 1)
- trace = true;
- memset(&M, 0, sizeof(M));
- def_flags = get_flags_asm() & ~ALL_FLAGS;
-
- VAL_WORD_UNARY(aaa_word);
- VAL_WORD_UNARY(aas_word);
-
- VAL_WORD_UNARY(aad_word);
- VAL_WORD_UNARY(aam_word);
-
- VAL_BYTE_BYTE_BINARY(adc_byte);
- VAL_WORD_WORD_BINARY(adc_word);
- VAL_LONG_LONG_BINARY(adc_long);
-
- VAL_BYTE_BYTE_BINARY(add_byte);
- VAL_WORD_WORD_BINARY(add_word);
- VAL_LONG_LONG_BINARY(add_long);
-
- VAL_BYTE_BYTE_BINARY(and_byte);
- VAL_WORD_WORD_BINARY(and_word);
- VAL_LONG_LONG_BINARY(and_long);
-
- VAL_BYTE_BYTE_BINARY(cmp_byte);
- VAL_WORD_WORD_BINARY(cmp_word);
- VAL_LONG_LONG_BINARY(cmp_long);
-
- VAL_BYTE_UNARY(daa_byte);
- VAL_BYTE_UNARY(das_byte); /* Fails for 0x9A (out of range anyway) */
-
- VAL_BYTE_UNARY(dec_byte);
- VAL_WORD_UNARY(dec_word);
- VAL_LONG_UNARY(dec_long);
-
- VAL_BYTE_UNARY(inc_byte);
- VAL_WORD_UNARY(inc_word);
- VAL_LONG_UNARY(inc_long);
-
- VAL_BYTE_BYTE_BINARY(or_byte);
- VAL_WORD_WORD_BINARY(or_word);
- VAL_LONG_LONG_BINARY(or_long);
-
- VAL_BYTE_UNARY(neg_byte);
- VAL_WORD_UNARY(neg_word);
- VAL_LONG_UNARY(neg_long);
-
- VAL_BYTE_UNARY(not_byte);
- VAL_WORD_UNARY(not_word);
- VAL_LONG_UNARY(not_long);
-
- VAL_BYTE_ROTATE(rcl_byte);
- VAL_WORD_ROTATE(rcl_word);
- VAL_LONG_ROTATE(rcl_long);
-
- VAL_BYTE_ROTATE(rcr_byte);
- VAL_WORD_ROTATE(rcr_word);
- VAL_LONG_ROTATE(rcr_long);
-
- VAL_BYTE_ROTATE(rol_byte);
- VAL_WORD_ROTATE(rol_word);
- VAL_LONG_ROTATE(rol_long);
-
- VAL_BYTE_ROTATE(ror_byte);
- VAL_WORD_ROTATE(ror_word);
- VAL_LONG_ROTATE(ror_long);
-
- VAL_BYTE_ROTATE(shl_byte);
- VAL_WORD_ROTATE(shl_word);
- VAL_LONG_ROTATE(shl_long);
-
- VAL_BYTE_ROTATE(shr_byte);
- VAL_WORD_ROTATE(shr_word);
- VAL_LONG_ROTATE(shr_long);
-
- VAL_BYTE_ROTATE(sar_byte);
- VAL_WORD_ROTATE(sar_word);
- VAL_LONG_ROTATE(sar_long);
-
- VAL_WORD_ROTATE_DBL(shld_word);
- VAL_LONG_ROTATE_DBL(shld_long);
-
- VAL_WORD_ROTATE_DBL(shrd_word);
- VAL_LONG_ROTATE_DBL(shrd_long);
-
- VAL_BYTE_BYTE_BINARY(sbb_byte);
- VAL_WORD_WORD_BINARY(sbb_word);
- VAL_LONG_LONG_BINARY(sbb_long);
-
- VAL_BYTE_BYTE_BINARY(sub_byte);
- VAL_WORD_WORD_BINARY(sub_word);
- VAL_LONG_LONG_BINARY(sub_long);
-
- VAL_BYTE_BYTE_BINARY(xor_byte);
- VAL_WORD_WORD_BINARY(xor_word);
- VAL_LONG_LONG_BINARY(xor_long);
-
- VAL_VOID_BYTE_BINARY(test_byte);
- VAL_VOID_WORD_BINARY(test_word);
- VAL_VOID_LONG_BINARY(test_long);
-
- VAL_BYTE_MUL(imul_byte);
- VAL_WORD_MUL(imul_word);
- VAL_LONG_MUL(imul_long);
-
- VAL_BYTE_MUL(mul_byte);
- VAL_WORD_MUL(mul_word);
- VAL_LONG_MUL(mul_long);
-
- VAL_BYTE_DIV(idiv_byte);
- VAL_WORD_DIV(idiv_word);
- VAL_LONG_DIV(idiv_long);
-
- VAL_BYTE_DIV(div_byte);
- VAL_WORD_DIV(div_word);
- VAL_LONG_DIV(div_long);
-
- return 0;
-}
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h
deleted file mode 100644
index 9a4a096..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h
+++ /dev/null
@@ -1,210 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for debug definitions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_DEBUG_H
-#define __X86EMU_DEBUG_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* checks to be enabled for "runtime" */
-
-#define CHECK_IP_FETCH_F 0x1
-#define CHECK_SP_ACCESS_F 0x2
-#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
-#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset*/
-
-#ifdef DEBUG
-# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
-# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
-# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
-# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
-#else
-# define CHECK_IP_FETCH()
-# define CHECK_SP_ACCESS()
-# define CHECK_MEM_ACCESS()
-# define CHECK_DATA_ACCESS()
-#endif
-
-#ifdef DEBUG
-# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
-# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
-# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
-# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
-# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
-# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
-# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
-# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
-
-# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
-# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
-# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
-# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
-# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
-# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
-# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
-# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
-# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
-#else
-# define DEBUG_INSTRUMENT() 0
-# define DEBUG_DECODE() 0
-# define DEBUG_TRACE() 0
-# define DEBUG_STEP() 0
-# define DEBUG_DISASSEMBLE() 0
-# define DEBUG_BREAK() 0
-# define DEBUG_SVC() 0
-# define DEBUG_SAVE_IP_CS() 0
-# define DEBUG_FS() 0
-# define DEBUG_PROC() 0
-# define DEBUG_SYSINT() 0
-# define DEBUG_TRACECALL() 0
-# define DEBUG_TRACECALLREGS() 0
-# define DEBUG_SYS() 0
-# define DEBUG_MEM_TRACE() 0
-# define DEBUG_IO_TRACE() 0
-# define DEBUG_DECODE_NOPRINT() 0
-#endif
-
-#ifdef DEBUG
-
-# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
- x86emu_decode_printf(x)
-# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
- x86emu_decode_printf2(x,y)
-
-/*
- * The following allow us to look at the bytes of an instruction. The
- * first INCR_INSTRN_LEN, is called everytime bytes are consumed in
- * the decoding process. The SAVE_IP_CS is called initially when the
- * major opcode of the instruction is accessed.
- */
-#define INC_DECODED_INST_LEN(x) \
- if (DEBUG_DECODE()) \
- x86emu_inc_decoded_inst_len(x)
-
-#define SAVE_IP_CS(x,y) \
- if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
- | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
- M.x86.saved_cs = x; \
- M.x86.saved_ip = y; \
- }
-#else
-# define INC_DECODED_INST_LEN(x)
-# define DECODE_PRINTF(x)
-# define DECODE_PRINTF2(x,y)
-# define SAVE_IP_CS(x,y)
-#endif
-
-#ifdef DEBUG
-#define TRACE_REGS() \
- if (DEBUG_DISASSEMBLE()) { \
- x86emu_just_disassemble(); \
- goto EndOfTheInstructionProcedure; \
- } \
- if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
-#else
-# define TRACE_REGS()
-#endif
-
-#ifdef DEBUG
-# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
-#else
-# define SINGLE_STEP()
-#endif
-
-#define TRACE_AND_STEP() \
- TRACE_REGS(); \
- SINGLE_STEP()
-
-#ifdef DEBUG
-# define START_OF_INSTR()
-# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
-# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
-#else
-# define START_OF_INSTR()
-# define END_OF_INSTR()
-# define END_OF_INSTR_NO_TRACE()
-#endif
-
-#ifdef DEBUG
-# define CALL_TRACE(u,v,w,x,s) \
- if (DEBUG_TRACECALLREGS()) \
- x86emu_dump_regs(); \
- if (DEBUG_TRACECALL()) \
- printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
-# define RETURN_TRACE(n,u,v) \
- if (DEBUG_TRACECALLREGS()) \
- x86emu_dump_regs(); \
- if (DEBUG_TRACECALL()) \
- printk("%04x:%04x: %s\n",u,v,n);
-#else
-# define CALL_TRACE(u,v,w,x,s)
-# define RETURN_TRACE(n,u,v)
-#endif
-
-#ifdef DEBUG
-#define DB(x) x
-#else
-#define DB(x)
-#endif
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-extern void x86emu_inc_decoded_inst_len (int x);
-extern void x86emu_decode_printf (char *x);
-extern void x86emu_decode_printf2 (char *x, int y);
-extern void x86emu_just_disassemble (void);
-extern void x86emu_single_step (void);
-extern void x86emu_end_instr (void);
-extern void x86emu_dump_regs (void);
-extern void x86emu_dump_xregs (void);
-extern void x86emu_print_int_vect (u16 iv);
-extern void x86emu_instrument_instruction (void);
-extern void x86emu_check_ip_access (void);
-extern void x86emu_check_sp_access (void);
-extern void x86emu_check_mem_access (u32 p);
-extern void x86emu_check_data_access (uint s, uint o);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_DEBUG_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/decode.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/decode.h
deleted file mode 100644
index 321a345..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/decode.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for instruction decoding logic.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_DECODE_H
-#define __X86EMU_DECODE_H
-
-/*---------------------- Macros and type definitions ----------------------*/
-
-/* Instruction Decoding Stuff */
-
-#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl)
-#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r)
-#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r)
-#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r)
-#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK
-
-/*-------------------------- Function Prototypes --------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-void x86emu_intr_raise (u8 type);
-void fetch_decode_modrm (int *mod,int *regh,int *regl);
-u8 fetch_byte_imm (void);
-u16 fetch_word_imm (void);
-u32 fetch_long_imm (void);
-u8 fetch_data_byte (uint offset);
-u8 fetch_data_byte_abs (uint segment, uint offset);
-u16 fetch_data_word (uint offset);
-u16 fetch_data_word_abs (uint segment, uint offset);
-u32 fetch_data_long (uint offset);
-u32 fetch_data_long_abs (uint segment, uint offset);
-void store_data_byte (uint offset, u8 val);
-void store_data_byte_abs (uint segment, uint offset, u8 val);
-void store_data_word (uint offset, u16 val);
-void store_data_word_abs (uint segment, uint offset, u16 val);
-void store_data_long (uint offset, u32 val);
-void store_data_long_abs (uint segment, uint offset, u32 val);
-u8* decode_rm_byte_register(int reg);
-u16* decode_rm_word_register(int reg);
-u32* decode_rm_long_register(int reg);
-u16* decode_rm_seg_register(int reg);
-unsigned decode_rm00_address(int rm);
-unsigned decode_rm01_address(int rm);
-unsigned decode_rm10_address(int rm);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_DECODE_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/fpu.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/fpu.h
deleted file mode 100644
index 5fb2714..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/fpu.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for FPU instruction decoding.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_FPU_H
-#define __X86EMU_FPU_H
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-/* these have to be defined, whether 8087 support compiled in or not. */
-
-extern void x86emuOp_esc_coprocess_d8 (u8 op1);
-extern void x86emuOp_esc_coprocess_d9 (u8 op1);
-extern void x86emuOp_esc_coprocess_da (u8 op1);
-extern void x86emuOp_esc_coprocess_db (u8 op1);
-extern void x86emuOp_esc_coprocess_dc (u8 op1);
-extern void x86emuOp_esc_coprocess_dd (u8 op1);
-extern void x86emuOp_esc_coprocess_de (u8 op1);
-extern void x86emuOp_esc_coprocess_df (u8 op1);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_FPU_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/ops.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/ops.h
deleted file mode 100644
index 65ea676..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/ops.h
+++ /dev/null
@@ -1,45 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for operand decoding functions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_OPS_H
-#define __X86EMU_OPS_H
-
-extern void (*x86emu_optab[0x100])(u8 op1);
-extern void (*x86emu_optab2[0x100])(u8 op2);
-
-#endif /* __X86EMU_OPS_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_asm.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_asm.h
deleted file mode 100644
index e023cf8..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_asm.h
+++ /dev/null
@@ -1,970 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: Watcom C++ 10.6 or later
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Inline assembler versions of the primitive operand
-* functions for faster performance. At the moment this is
-* x86 inline assembler, but these functions could be replaced
-* with native inline assembler for each supported processor
-* platform.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_PRIM_ASM_H
-#define __X86EMU_PRIM_ASM_H
-
-#ifdef __WATCOMC__
-
-#ifndef VALIDATE
-#define __HAVE_INLINE_ASSEMBLER__
-#endif
-
-u32 get_flags_asm(void);
-#pragma aux get_flags_asm = \
- "pushf" \
- "pop eax" \
- value [eax] \
- modify exact [eax];
-
-u16 aaa_word_asm(u32 *flags,u16 d);
-#pragma aux aaa_word_asm = \
- "push [edi]" \
- "popf" \
- "aaa" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u16 aas_word_asm(u32 *flags,u16 d);
-#pragma aux aas_word_asm = \
- "push [edi]" \
- "popf" \
- "aas" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u16 aad_word_asm(u32 *flags,u16 d);
-#pragma aux aad_word_asm = \
- "push [edi]" \
- "popf" \
- "aad" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u16 aam_word_asm(u32 *flags,u8 d);
-#pragma aux aam_word_asm = \
- "push [edi]" \
- "popf" \
- "aam" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [ax] \
- modify exact [ax];
-
-u8 adc_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux adc_byte_asm = \
- "push [edi]" \
- "popf" \
- "adc al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 adc_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux adc_word_asm = \
- "push [edi]" \
- "popf" \
- "adc ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 adc_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux adc_long_asm = \
- "push [edi]" \
- "popf" \
- "adc eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 add_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux add_byte_asm = \
- "push [edi]" \
- "popf" \
- "add al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 add_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux add_word_asm = \
- "push [edi]" \
- "popf" \
- "add ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 add_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux add_long_asm = \
- "push [edi]" \
- "popf" \
- "add eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 and_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux and_byte_asm = \
- "push [edi]" \
- "popf" \
- "and al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 and_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux and_word_asm = \
- "push [edi]" \
- "popf" \
- "and ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 and_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux and_long_asm = \
- "push [edi]" \
- "popf" \
- "and eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 cmp_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux cmp_byte_asm = \
- "push [edi]" \
- "popf" \
- "cmp al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 cmp_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux cmp_word_asm = \
- "push [edi]" \
- "popf" \
- "cmp ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 cmp_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux cmp_long_asm = \
- "push [edi]" \
- "popf" \
- "cmp eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 daa_byte_asm(u32 *flags,u8 d);
-#pragma aux daa_byte_asm = \
- "push [edi]" \
- "popf" \
- "daa" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u8 das_byte_asm(u32 *flags,u8 d);
-#pragma aux das_byte_asm = \
- "push [edi]" \
- "popf" \
- "das" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u8 dec_byte_asm(u32 *flags,u8 d);
-#pragma aux dec_byte_asm = \
- "push [edi]" \
- "popf" \
- "dec al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 dec_word_asm(u32 *flags,u16 d);
-#pragma aux dec_word_asm = \
- "push [edi]" \
- "popf" \
- "dec ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 dec_long_asm(u32 *flags,u32 d);
-#pragma aux dec_long_asm = \
- "push [edi]" \
- "popf" \
- "dec eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 inc_byte_asm(u32 *flags,u8 d);
-#pragma aux inc_byte_asm = \
- "push [edi]" \
- "popf" \
- "inc al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 inc_word_asm(u32 *flags,u16 d);
-#pragma aux inc_word_asm = \
- "push [edi]" \
- "popf" \
- "inc ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 inc_long_asm(u32 *flags,u32 d);
-#pragma aux inc_long_asm = \
- "push [edi]" \
- "popf" \
- "inc eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 or_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux or_byte_asm = \
- "push [edi]" \
- "popf" \
- "or al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 or_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux or_word_asm = \
- "push [edi]" \
- "popf" \
- "or ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 or_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux or_long_asm = \
- "push [edi]" \
- "popf" \
- "or eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 neg_byte_asm(u32 *flags,u8 d);
-#pragma aux neg_byte_asm = \
- "push [edi]" \
- "popf" \
- "neg al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 neg_word_asm(u32 *flags,u16 d);
-#pragma aux neg_word_asm = \
- "push [edi]" \
- "popf" \
- "neg ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 neg_long_asm(u32 *flags,u32 d);
-#pragma aux neg_long_asm = \
- "push [edi]" \
- "popf" \
- "neg eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 not_byte_asm(u32 *flags,u8 d);
-#pragma aux not_byte_asm = \
- "push [edi]" \
- "popf" \
- "not al" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] \
- value [al] \
- modify exact [al];
-
-u16 not_word_asm(u32 *flags,u16 d);
-#pragma aux not_word_asm = \
- "push [edi]" \
- "popf" \
- "not ax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] \
- value [ax] \
- modify exact [ax];
-
-u32 not_long_asm(u32 *flags,u32 d);
-#pragma aux not_long_asm = \
- "push [edi]" \
- "popf" \
- "not eax" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] \
- value [eax] \
- modify exact [eax];
-
-u8 rcl_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rcl_byte_asm = \
- "push [edi]" \
- "popf" \
- "rcl al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 rcl_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rcl_word_asm = \
- "push [edi]" \
- "popf" \
- "rcl ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 rcl_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rcl_long_asm = \
- "push [edi]" \
- "popf" \
- "rcl eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 rcr_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rcr_byte_asm = \
- "push [edi]" \
- "popf" \
- "rcr al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 rcr_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rcr_word_asm = \
- "push [edi]" \
- "popf" \
- "rcr ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 rcr_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rcr_long_asm = \
- "push [edi]" \
- "popf" \
- "rcr eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 rol_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux rol_byte_asm = \
- "push [edi]" \
- "popf" \
- "rol al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 rol_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux rol_word_asm = \
- "push [edi]" \
- "popf" \
- "rol ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 rol_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux rol_long_asm = \
- "push [edi]" \
- "popf" \
- "rol eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 ror_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux ror_byte_asm = \
- "push [edi]" \
- "popf" \
- "ror al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 ror_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux ror_word_asm = \
- "push [edi]" \
- "popf" \
- "ror ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 ror_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux ror_long_asm = \
- "push [edi]" \
- "popf" \
- "ror eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 shl_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux shl_byte_asm = \
- "push [edi]" \
- "popf" \
- "shl al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 shl_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux shl_word_asm = \
- "push [edi]" \
- "popf" \
- "shl ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 shl_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux shl_long_asm = \
- "push [edi]" \
- "popf" \
- "shl eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 shr_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux shr_byte_asm = \
- "push [edi]" \
- "popf" \
- "shr al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 shr_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux shr_word_asm = \
- "push [edi]" \
- "popf" \
- "shr ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 shr_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux shr_long_asm = \
- "push [edi]" \
- "popf" \
- "shr eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u8 sar_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sar_byte_asm = \
- "push [edi]" \
- "popf" \
- "sar al,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [cl] \
- value [al] \
- modify exact [al cl];
-
-u16 sar_word_asm(u32 *flags,u16 d, u8 s);
-#pragma aux sar_word_asm = \
- "push [edi]" \
- "popf" \
- "sar ax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [cl] \
- value [ax] \
- modify exact [ax cl];
-
-u32 sar_long_asm(u32 *flags,u32 d, u8 s);
-#pragma aux sar_long_asm = \
- "push [edi]" \
- "popf" \
- "sar eax,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [cl] \
- value [eax] \
- modify exact [eax cl];
-
-u16 shld_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
-#pragma aux shld_word_asm = \
- "push [edi]" \
- "popf" \
- "shld ax,dx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [dx] [cl] \
- value [ax] \
- modify exact [ax dx cl];
-
-u32 shld_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
-#pragma aux shld_long_asm = \
- "push [edi]" \
- "popf" \
- "shld eax,edx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [edx] [cl] \
- value [eax] \
- modify exact [eax edx cl];
-
-u16 shrd_word_asm(u32 *flags,u16 d, u16 fill, u8 s);
-#pragma aux shrd_word_asm = \
- "push [edi]" \
- "popf" \
- "shrd ax,dx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [dx] [cl] \
- value [ax] \
- modify exact [ax dx cl];
-
-u32 shrd_long_asm(u32 *flags,u32 d, u32 fill, u8 s);
-#pragma aux shrd_long_asm = \
- "push [edi]" \
- "popf" \
- "shrd eax,edx,cl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [edx] [cl] \
- value [eax] \
- modify exact [eax edx cl];
-
-u8 sbb_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sbb_byte_asm = \
- "push [edi]" \
- "popf" \
- "sbb al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 sbb_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux sbb_word_asm = \
- "push [edi]" \
- "popf" \
- "sbb ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 sbb_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux sbb_long_asm = \
- "push [edi]" \
- "popf" \
- "sbb eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-u8 sub_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux sub_byte_asm = \
- "push [edi]" \
- "popf" \
- "sub al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 sub_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux sub_word_asm = \
- "push [edi]" \
- "popf" \
- "sub ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 sub_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux sub_long_asm = \
- "push [edi]" \
- "popf" \
- "sub eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-void test_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux test_byte_asm = \
- "push [edi]" \
- "popf" \
- "test al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- modify exact [al bl];
-
-void test_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux test_word_asm = \
- "push [edi]" \
- "popf" \
- "test ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- modify exact [ax bx];
-
-void test_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux test_long_asm = \
- "push [edi]" \
- "popf" \
- "test eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- modify exact [eax ebx];
-
-u8 xor_byte_asm(u32 *flags,u8 d, u8 s);
-#pragma aux xor_byte_asm = \
- "push [edi]" \
- "popf" \
- "xor al,bl" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [al] [bl] \
- value [al] \
- modify exact [al bl];
-
-u16 xor_word_asm(u32 *flags,u16 d, u16 s);
-#pragma aux xor_word_asm = \
- "push [edi]" \
- "popf" \
- "xor ax,bx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [ax] [bx] \
- value [ax] \
- modify exact [ax bx];
-
-u32 xor_long_asm(u32 *flags,u32 d, u32 s);
-#pragma aux xor_long_asm = \
- "push [edi]" \
- "popf" \
- "xor eax,ebx" \
- "pushf" \
- "pop [edi]" \
- parm [edi] [eax] [ebx] \
- value [eax] \
- modify exact [eax ebx];
-
-void imul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
-#pragma aux imul_byte_asm = \
- "push [edi]" \
- "popf" \
- "imul bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- parm [edi] [esi] [al] [bl] \
- modify exact [esi ax bl];
-
-void imul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
-#pragma aux imul_word_asm = \
- "push [edi]" \
- "popf" \
- "imul bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [bx]\
- modify exact [esi edi ax bx dx];
-
-void imul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
-#pragma aux imul_long_asm = \
- "push [edi]" \
- "popf" \
- "imul ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [ebx] \
- modify exact [esi edi eax ebx edx];
-
-void mul_byte_asm(u32 *flags,u16 *ax,u8 d,u8 s);
-#pragma aux mul_byte_asm = \
- "push [edi]" \
- "popf" \
- "mul bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- parm [edi] [esi] [al] [bl] \
- modify exact [esi ax bl];
-
-void mul_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 d,u16 s);
-#pragma aux mul_word_asm = \
- "push [edi]" \
- "popf" \
- "mul bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [bx]\
- modify exact [esi edi ax bx dx];
-
-void mul_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 d,u32 s);
-#pragma aux mul_long_asm = \
- "push [edi]" \
- "popf" \
- "mul ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [ebx] \
- modify exact [esi edi eax ebx edx];
-
-void idiv_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
-#pragma aux idiv_byte_asm = \
- "push [edi]" \
- "popf" \
- "idiv bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],al" \
- "mov [ecx],ah" \
- parm [edi] [esi] [ecx] [ax] [bl]\
- modify exact [esi edi ax bl];
-
-void idiv_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
-#pragma aux idiv_word_asm = \
- "push [edi]" \
- "popf" \
- "idiv bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [dx] [bx]\
- modify exact [esi edi ax dx bx];
-
-void idiv_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
-#pragma aux idiv_long_asm = \
- "push [edi]" \
- "popf" \
- "idiv ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
- modify exact [esi edi eax edx ebx];
-
-void div_byte_asm(u32 *flags,u8 *al,u8 *ah,u16 d,u8 s);
-#pragma aux div_byte_asm = \
- "push [edi]" \
- "popf" \
- "div bl" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],al" \
- "mov [ecx],ah" \
- parm [edi] [esi] [ecx] [ax] [bl]\
- modify exact [esi edi ax bl];
-
-void div_word_asm(u32 *flags,u16 *ax,u16 *dx,u16 dlo,u16 dhi,u16 s);
-#pragma aux div_word_asm = \
- "push [edi]" \
- "popf" \
- "div bx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],ax" \
- "mov [ecx],dx" \
- parm [edi] [esi] [ecx] [ax] [dx] [bx]\
- modify exact [esi edi ax dx bx];
-
-void div_long_asm(u32 *flags,u32 *eax,u32 *edx,u32 dlo,u32 dhi,u32 s);
-#pragma aux div_long_asm = \
- "push [edi]" \
- "popf" \
- "div ebx" \
- "pushf" \
- "pop [edi]" \
- "mov [esi],eax" \
- "mov [ecx],edx" \
- parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
- modify exact [esi edi eax edx ebx];
-
-#endif
-
-#endif /* __X86EMU_PRIM_ASM_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_ops.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_ops.h
deleted file mode 100644
index 1633fe1..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/prim_ops.h
+++ /dev/null
@@ -1,231 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for primitive operation functions.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_PRIM_OPS_H
-#define __X86EMU_PRIM_OPS_H
-
-#include "x86emu/prim_asm.h"
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-u16 aaa_word (u16 d);
-u16 aas_word (u16 d);
-u16 aad_word (u16 d);
-u16 aam_word (u8 d);
-u8 adc_byte (u8 d, u8 s);
-u16 adc_word (u16 d, u16 s);
-u32 adc_long (u32 d, u32 s);
-u8 add_byte (u8 d, u8 s);
-u16 add_word (u16 d, u16 s);
-u32 add_long (u32 d, u32 s);
-u8 and_byte (u8 d, u8 s);
-u16 and_word (u16 d, u16 s);
-u32 and_long (u32 d, u32 s);
-u8 cmp_byte (u8 d, u8 s);
-u16 cmp_word (u16 d, u16 s);
-u32 cmp_long (u32 d, u32 s);
-u8 daa_byte (u8 d);
-u8 das_byte (u8 d);
-u8 dec_byte (u8 d);
-u16 dec_word (u16 d);
-u32 dec_long (u32 d);
-u8 inc_byte (u8 d);
-u16 inc_word (u16 d);
-u32 inc_long (u32 d);
-u8 or_byte (u8 d, u8 s);
-u16 or_word (u16 d, u16 s);
-u32 or_long (u32 d, u32 s);
-u8 neg_byte (u8 s);
-u16 neg_word (u16 s);
-u32 neg_long (u32 s);
-u8 not_byte (u8 s);
-u16 not_word (u16 s);
-u32 not_long (u32 s);
-u8 rcl_byte (u8 d, u8 s);
-u16 rcl_word (u16 d, u8 s);
-u32 rcl_long (u32 d, u8 s);
-u8 rcr_byte (u8 d, u8 s);
-u16 rcr_word (u16 d, u8 s);
-u32 rcr_long (u32 d, u8 s);
-u8 rol_byte (u8 d, u8 s);
-u16 rol_word (u16 d, u8 s);
-u32 rol_long (u32 d, u8 s);
-u8 ror_byte (u8 d, u8 s);
-u16 ror_word (u16 d, u8 s);
-u32 ror_long (u32 d, u8 s);
-u8 shl_byte (u8 d, u8 s);
-u16 shl_word (u16 d, u8 s);
-u32 shl_long (u32 d, u8 s);
-u8 shr_byte (u8 d, u8 s);
-u16 shr_word (u16 d, u8 s);
-u32 shr_long (u32 d, u8 s);
-u8 sar_byte (u8 d, u8 s);
-u16 sar_word (u16 d, u8 s);
-u32 sar_long (u32 d, u8 s);
-u16 shld_word (u16 d, u16 fill, u8 s);
-u32 shld_long (u32 d, u32 fill, u8 s);
-u16 shrd_word (u16 d, u16 fill, u8 s);
-u32 shrd_long (u32 d, u32 fill, u8 s);
-u8 sbb_byte (u8 d, u8 s);
-u16 sbb_word (u16 d, u16 s);
-u32 sbb_long (u32 d, u32 s);
-u8 sub_byte (u8 d, u8 s);
-u16 sub_word (u16 d, u16 s);
-u32 sub_long (u32 d, u32 s);
-void test_byte (u8 d, u8 s);
-void test_word (u16 d, u16 s);
-void test_long (u32 d, u32 s);
-u8 xor_byte (u8 d, u8 s);
-u16 xor_word (u16 d, u16 s);
-u32 xor_long (u32 d, u32 s);
-void imul_byte (u8 s);
-void imul_word (u16 s);
-void imul_long (u32 s);
-void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s);
-void mul_byte (u8 s);
-void mul_word (u16 s);
-void mul_long (u32 s);
-void idiv_byte (u8 s);
-void idiv_word (u16 s);
-void idiv_long (u32 s);
-void div_byte (u8 s);
-void div_word (u16 s);
-void div_long (u32 s);
-void ins (int size);
-void outs (int size);
-u16 mem_access_word (int addr);
-void push_word (u16 w);
-void push_long (u32 w);
-u16 pop_word (void);
-u32 pop_long (void);
-
-#if defined(__HAVE_INLINE_ASSEMBLER__) && !defined(PRIM_OPS_NO_REDEFINE_ASM)
-
-#define aaa_word(d) aaa_word_asm(&M.x86.R_EFLG,d)
-#define aas_word(d) aas_word_asm(&M.x86.R_EFLG,d)
-#define aad_word(d) aad_word_asm(&M.x86.R_EFLG,d)
-#define aam_word(d) aam_word_asm(&M.x86.R_EFLG,d)
-#define adc_byte(d,s) adc_byte_asm(&M.x86.R_EFLG,d,s)
-#define adc_word(d,s) adc_word_asm(&M.x86.R_EFLG,d,s)
-#define adc_long(d,s) adc_long_asm(&M.x86.R_EFLG,d,s)
-#define add_byte(d,s) add_byte_asm(&M.x86.R_EFLG,d,s)
-#define add_word(d,s) add_word_asm(&M.x86.R_EFLG,d,s)
-#define add_long(d,s) add_long_asm(&M.x86.R_EFLG,d,s)
-#define and_byte(d,s) and_byte_asm(&M.x86.R_EFLG,d,s)
-#define and_word(d,s) and_word_asm(&M.x86.R_EFLG,d,s)
-#define and_long(d,s) and_long_asm(&M.x86.R_EFLG,d,s)
-#define cmp_byte(d,s) cmp_byte_asm(&M.x86.R_EFLG,d,s)
-#define cmp_word(d,s) cmp_word_asm(&M.x86.R_EFLG,d,s)
-#define cmp_long(d,s) cmp_long_asm(&M.x86.R_EFLG,d,s)
-#define daa_byte(d) daa_byte_asm(&M.x86.R_EFLG,d)
-#define das_byte(d) das_byte_asm(&M.x86.R_EFLG,d)
-#define dec_byte(d) dec_byte_asm(&M.x86.R_EFLG,d)
-#define dec_word(d) dec_word_asm(&M.x86.R_EFLG,d)
-#define dec_long(d) dec_long_asm(&M.x86.R_EFLG,d)
-#define inc_byte(d) inc_byte_asm(&M.x86.R_EFLG,d)
-#define inc_word(d) inc_word_asm(&M.x86.R_EFLG,d)
-#define inc_long(d) inc_long_asm(&M.x86.R_EFLG,d)
-#define or_byte(d,s) or_byte_asm(&M.x86.R_EFLG,d,s)
-#define or_word(d,s) or_word_asm(&M.x86.R_EFLG,d,s)
-#define or_long(d,s) or_long_asm(&M.x86.R_EFLG,d,s)
-#define neg_byte(s) neg_byte_asm(&M.x86.R_EFLG,s)
-#define neg_word(s) neg_word_asm(&M.x86.R_EFLG,s)
-#define neg_long(s) neg_long_asm(&M.x86.R_EFLG,s)
-#define not_byte(s) not_byte_asm(&M.x86.R_EFLG,s)
-#define not_word(s) not_word_asm(&M.x86.R_EFLG,s)
-#define not_long(s) not_long_asm(&M.x86.R_EFLG,s)
-#define rcl_byte(d,s) rcl_byte_asm(&M.x86.R_EFLG,d,s)
-#define rcl_word(d,s) rcl_word_asm(&M.x86.R_EFLG,d,s)
-#define rcl_long(d,s) rcl_long_asm(&M.x86.R_EFLG,d,s)
-#define rcr_byte(d,s) rcr_byte_asm(&M.x86.R_EFLG,d,s)
-#define rcr_word(d,s) rcr_word_asm(&M.x86.R_EFLG,d,s)
-#define rcr_long(d,s) rcr_long_asm(&M.x86.R_EFLG,d,s)
-#define rol_byte(d,s) rol_byte_asm(&M.x86.R_EFLG,d,s)
-#define rol_word(d,s) rol_word_asm(&M.x86.R_EFLG,d,s)
-#define rol_long(d,s) rol_long_asm(&M.x86.R_EFLG,d,s)
-#define ror_byte(d,s) ror_byte_asm(&M.x86.R_EFLG,d,s)
-#define ror_word(d,s) ror_word_asm(&M.x86.R_EFLG,d,s)
-#define ror_long(d,s) ror_long_asm(&M.x86.R_EFLG,d,s)
-#define shl_byte(d,s) shl_byte_asm(&M.x86.R_EFLG,d,s)
-#define shl_word(d,s) shl_word_asm(&M.x86.R_EFLG,d,s)
-#define shl_long(d,s) shl_long_asm(&M.x86.R_EFLG,d,s)
-#define shr_byte(d,s) shr_byte_asm(&M.x86.R_EFLG,d,s)
-#define shr_word(d,s) shr_word_asm(&M.x86.R_EFLG,d,s)
-#define shr_long(d,s) shr_long_asm(&M.x86.R_EFLG,d,s)
-#define sar_byte(d,s) sar_byte_asm(&M.x86.R_EFLG,d,s)
-#define sar_word(d,s) sar_word_asm(&M.x86.R_EFLG,d,s)
-#define sar_long(d,s) sar_long_asm(&M.x86.R_EFLG,d,s)
-#define shld_word(d,fill,s) shld_word_asm(&M.x86.R_EFLG,d,fill,s)
-#define shld_long(d,fill,s) shld_long_asm(&M.x86.R_EFLG,d,fill,s)
-#define shrd_word(d,fill,s) shrd_word_asm(&M.x86.R_EFLG,d,fill,s)
-#define shrd_long(d,fill,s) shrd_long_asm(&M.x86.R_EFLG,d,fill,s)
-#define sbb_byte(d,s) sbb_byte_asm(&M.x86.R_EFLG,d,s)
-#define sbb_word(d,s) sbb_word_asm(&M.x86.R_EFLG,d,s)
-#define sbb_long(d,s) sbb_long_asm(&M.x86.R_EFLG,d,s)
-#define sub_byte(d,s) sub_byte_asm(&M.x86.R_EFLG,d,s)
-#define sub_word(d,s) sub_word_asm(&M.x86.R_EFLG,d,s)
-#define sub_long(d,s) sub_long_asm(&M.x86.R_EFLG,d,s)
-#define test_byte(d,s) test_byte_asm(&M.x86.R_EFLG,d,s)
-#define test_word(d,s) test_word_asm(&M.x86.R_EFLG,d,s)
-#define test_long(d,s) test_long_asm(&M.x86.R_EFLG,d,s)
-#define xor_byte(d,s) xor_byte_asm(&M.x86.R_EFLG,d,s)
-#define xor_word(d,s) xor_word_asm(&M.x86.R_EFLG,d,s)
-#define xor_long(d,s) xor_long_asm(&M.x86.R_EFLG,d,s)
-#define imul_byte(s) imul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
-#define imul_word(s) imul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
-#define imul_long(s) imul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
-#define imul_long_direct(res_lo,res_hi,d,s) imul_long_asm(&M.x86.R_EFLG,res_lo,res_hi,d,s)
-#define mul_byte(s) mul_byte_asm(&M.x86.R_EFLG,&M.x86.R_AX,M.x86.R_AL,s)
-#define mul_word(s) mul_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,s)
-#define mul_long(s) mul_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s)
-#define idiv_byte(s) idiv_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
-#define idiv_word(s) idiv_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
-#define idiv_long(s) idiv_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
-#define div_byte(s) div_byte_asm(&M.x86.R_EFLG,&M.x86.R_AL,&M.x86.R_AH,M.x86.R_AX,s)
-#define div_word(s) div_word_asm(&M.x86.R_EFLG,&M.x86.R_AX,&M.x86.R_DX,M.x86.R_AX,M.x86.R_DX,s)
-#define div_long(s) div_long_asm(&M.x86.R_EFLG,&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,M.x86.R_EDX,s)
-
-#endif
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_PRIM_OPS_H */
diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/x86emui.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/x86emui.h
deleted file mode 100644
index bff4903..0000000
--- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/x86emui.h
+++ /dev/null
@@ -1,98 +0,0 @@
-/****************************************************************************
-*
-* Realmode X86 Emulator Library
-*
-* Copyright (C) 1996-1999 SciTech Software, Inc.
-* Copyright (C) David Mosberger-Tang
-* Copyright (C) 1999 Egbert Eich
-*
-* ========================================================================
-*
-* Permission to use, copy, modify, distribute, and sell this software and
-* its documentation for any purpose is hereby granted without fee,
-* provided that the above copyright notice appear in all copies and that
-* both that copyright notice and this permission notice appear in
-* supporting documentation, and that the name of the authors not be used
-* in advertising or publicity pertaining to distribution of the software
-* without specific, written prior permission. The authors makes no
-* representations about the suitability of this software for any purpose.
-* It is provided "as is" without express or implied warranty.
-*
-* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
-* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
-* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
-* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
-* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
-* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
-* PERFORMANCE OF THIS SOFTWARE.
-*
-* ========================================================================
-*
-* Language: ANSI C
-* Environment: Any
-* Developer: Kendall Bennett
-*
-* Description: Header file for system specific functions. These functions
-* are always compiled and linked in the OS depedent libraries,
-* and never in a binary portable driver.
-*
-****************************************************************************/
-
-#ifndef __X86EMU_X86EMUI_H
-#define __X86EMU_X86EMUI_H
-
-/* If we are compiling in C++ mode, we can compile some functions as
- * inline to increase performance (however the code size increases quite
- * dramatically in this case).
- */
-
-#if defined(__cplusplus) && !defined(_NO_INLINE)
-#define _INLINE inline
-#else
-#define _INLINE static
-#endif
-
-/* Get rid of unused parameters in C++ compilation mode */
-
-#ifdef __cplusplus
-#define X86EMU_UNUSED(v)
-#else
-#define X86EMU_UNUSED(v) v
-#endif
-
-#include "x86emu.h"
-#include "x86emu/regs.h"
-#include "x86emu/debug.h"
-#include "x86emu/decode.h"
-#include "x86emu/ops.h"
-#include "x86emu/prim_ops.h"
-#include "x86emu/fpu.h"
-#include "x86emu/fpu_regs.h"
-#include <stdio.h>
-#include <string.h>
-
-/*--------------------------- Inline Functions ----------------------------*/
-
-#ifdef __cplusplus
-extern "C" { /* Use "C" linkage when in C++ mode */
-#endif
-
-extern u8 (X86APIP sys_rdb)(u32 addr);
-extern u16 (X86APIP sys_rdw)(u32 addr);
-extern u32 (X86APIP sys_rdl)(u32 addr);
-extern void (X86APIP sys_wrb)(u32 addr,u8 val);
-extern void (X86APIP sys_wrw)(u32 addr,u16 val);
-extern void (X86APIP sys_wrl)(u32 addr,u32 val);
-
-extern u8 (X86APIP sys_inb)(X86EMU_pioAddr addr);
-extern u16 (X86APIP sys_inw)(X86EMU_pioAddr addr);
-extern u32 (X86APIP sys_inl)(X86EMU_pioAddr addr);
-extern void (X86APIP sys_outb)(X86EMU_pioAddr addr,u8 val);
-extern void (X86APIP sys_outw)(X86EMU_pioAddr addr,u16 val);
-extern void (X86APIP sys_outl)(X86EMU_pioAddr addr,u32 val);
-
-#ifdef __cplusplus
-} /* End of "C" linkage for C++ */
-#endif
-
-#endif /* __X86EMU_X86EMUI_H */
diff --git a/board/MAI/bios_emulator/x86interface.c b/board/MAI/bios_emulator/x86interface.c
deleted file mode 100644
index 909cb3c..0000000
--- a/board/MAI/bios_emulator/x86interface.c
+++ /dev/null
@@ -1,814 +0,0 @@
-#include "x86emu.h"
-#include "glue.h"
-
-
-/*
- * This isn't nice, but there are a lot of incompatibilities in the U-Boot and scitech include
- * files that this is the only really workable solution.
- * Might be cleaned out later.
- */
-
-#ifdef DEBUG
-#undef DEBUG
-#endif
-
-#undef IO_LOGGING
-#undef MEM_LOGGING
-
-#ifdef IO_LOGGING
-#define LOGIO(port, format, args...) if (dolog(port)) _printf(format , ## args)
-#else
-#define LOGIO(port, format, args...)
-#endif
-
-#ifdef MEM_LOGGIN
-#define LOGMEM(format, args...) _printf(format , ## args)
-#else
-#define LOGMEM(format, args...)
-#endif
-
-#ifdef DEBUG
-#define PRINTF(format, args...) _printf(format , ## args)
-#else
-#define PRINTF(format, argc...)
-#endif
-
-typedef unsigned char UBYTE;
-typedef unsigned short UWORD;
-typedef unsigned long ULONG;
-
-typedef char BYTE;
-typedef short WORT;
-typedef long LONG;
-
-#define EMULATOR_MEM_SIZE (1024*1024)
-#define EMULATOR_BIOS_OFFSET 0xC0000
-#define EMULATOR_STRAP_OFFSET 0x30000
-#define EMULATOR_STACK_OFFSET 0x20000
-#define EMULATOR_LOGO_OFFSET 0x40000 /* If you change this, change the strap code, too */
-#define VIDEO_BASE (void *)0xFD0B8000
-
-extern char *getenv(char *);
-extern int tstc(void);
-extern int getc(void);
-extern unsigned char video_get_attr(void);
-
-int atoi(char *string)
-{
- int res = 0;
- while (*string>='0' && *string <='9')
- {
- res *= 10;
- res += *string-'0';
- string++;
- }
-
- return res;
-}
-
-void cons_gets(char *buffer)
-{
- int i = 0;
- char c = 0;
-
- buffer[0] = 0;
- if (getenv("x86_runthru")) return; /*FIXME: */
- while (c != 0x0D && c != 0x0A)
- {
- while (!tstc());
- c = getc();
- if (c>=32 && c < 127)
- {
- buffer[i] = c;
- i++;
- buffer[i] = 0;
- putc(c);
- }
- else
- {
- if (c == 0x08)
- {
- if (i>0) i--;
- buffer[i] = 0;
- }
- }
- }
- buffer[i] = '\n';
- buffer[i+1] = 0;
-}
-
-char *bios_date = "08/14/02";
-UBYTE model = 0xFC;
-UBYTE submodel = 0x00;
-
-static inline UBYTE read_byte(volatile UBYTE* from)
-{
- int x;
- asm volatile ("lbz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UBYTE)x;
-}
-
-static inline void write_byte(volatile UBYTE *to, int x)
-{
- asm volatile ("stb %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline UWORD read_word_little(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m" (*from));
- return (UWORD)x;
-}
-
-static inline UWORD read_word_big(volatile UWORD *from)
-{
- int x;
- asm volatile ("lhz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (UWORD)x;
-}
-
-static inline void write_word_little(volatile UWORD *to, int x)
-{
- asm volatile ("sthbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_word_big(volatile UWORD *to, int x)
-{
- asm volatile ("sth %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static inline ULONG read_long_little(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwbrx %0,0,%1\n eieio" : "=r" (x) : "r" (from), "m"(*from));
- return (ULONG)x;
-}
-
-static inline ULONG read_long_big(volatile ULONG *from)
-{
- unsigned long x;
- asm volatile ("lwz %0,%1\n eieio" : "=r" (x) : "m" (*from));
- return (ULONG)x;
-}
-
-static inline void write_long_little(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stwbrx %1,0,%2\n eieio" : "=m" (*to) : "r" (x), "r" (to));
-}
-
-static inline void write_long_big(volatile ULONG *to, ULONG x)
-{
- asm volatile ("stw %1,%0\n eieio" : "=m" (*to) : "r" (x));
-}
-
-static int log_init = 0;
-static int log_do = 0;
-static int log_low = 0;
-
-int dolog(int port)
-{
- if (log_init && log_do)
- {
- if (log_low && port > 0x400) return 0;
- return 1;
- }
-
- if (!log_init)
- {
- log_init = 1;
- log_do = (getenv("x86_logio") != (char *)0);
- log_low = (getenv("x86_loglow") != (char *)0);
- if (log_do)
- {
- if (log_low && port > 0x400) return 0;
- return 1;
- }
- }
- return 0;
-}
-
-/* Converts an emulator address to a physical address. */
-/* Handles all special cases (bios date, model etc), and might need work */
-u32 memaddr(u32 addr)
-{
-/* if (addr >= 0xF0000 && addr < 0xFFFFF) printf("WARNING: Segment F access (0x%x)\n", addr); */
-/* printf("MemAddr=%p\n", addr); */
- if (addr >= 0xA0000 && addr < 0xC0000)
- return 0xFD000000 + addr;
- else if (addr >= 0xFFFF5 && addr < 0xFFFFE)
- {
- return (u32)bios_date+addr-0xFFFF5;
- }
- else if (addr == 0xFFFFE)
- return (u32)&model;
- else if (addr == 0xFFFFF)
- return (u32)&submodel;
- else if (addr >= 0x80000000)
- {
- /*printf("Warning: High memory access at 0x%x\n", addr); */
- return addr;
- }
- else
- return (u32)M.mem_base+addr;
-}
-
-u8 A1_rdb(u32 addr)
-{
- u8 a = read_byte((UBYTE *)memaddr(addr));
- LOGMEM("rdb: %x -> %x\n", addr, a);
- return a;
-}
-
-u16 A1_rdw(u32 addr)
-{
- u16 a = read_word_little((UWORD *)memaddr(addr));
- LOGMEM("rdw: %x -> %x\n", addr, a);
- return a;
-}
-
-u32 A1_rdl(u32 addr)
-{
- u32 a = read_long_little((ULONG *)memaddr(addr));
- LOGMEM("rdl: %x -> %x\n", addr, a);
- return a;
-}
-
-void A1_wrb(u32 addr, u8 val)
-{
- LOGMEM("wrb: %x <- %x\n", addr, val);
- write_byte((UBYTE *)memaddr(addr), val);
-}
-
-void A1_wrw(u32 addr, u16 val)
-{
- LOGMEM("wrw: %x <- %x\n", addr, val);
- write_word_little((UWORD *)memaddr(addr), val);
-}
-
-void A1_wrl(u32 addr, u32 val)
-{
- LOGMEM("wrl: %x <- %x\n", addr, val);
- write_long_little((ULONG *)memaddr(addr), val);
-}
-
-X86EMU_memFuncs _A1_mem =
-{
- A1_rdb,
- A1_rdw,
- A1_rdl,
- A1_wrb,
- A1_wrw,
- A1_wrl,
-};
-
-#define ARTICIAS_PCI_CFGADDR 0xfec00cf8
-#define ARTICIAS_PCI_CFGDATA 0xfee00cfc
-#define IOBASE 0xFE000000
-
-#define in_byte(from) read_byte( (UBYTE *)port_to_mem(from))
-#define in_word(from) read_word_little((UWORD *)port_to_mem(from))
-#define in_long(from) read_long_little((ULONG *)port_to_mem(from))
-#define out_byte(to, val) write_byte((UBYTE *)port_to_mem(to), val)
-#define out_word(to, val) write_word_little((UWORD *)port_to_mem(to), val)
-#define out_long(to, val) write_long_little((ULONG *)port_to_mem(to), val)
-
-u32 port_to_mem(int port)
-{
- if (port >= 0xCFC && port <= 0xCFF) return 0xFEE00000+port;
- else if (port >= 0xCF8 && port <= 0xCFB) return 0xFEC00000+port;
- else return IOBASE + port;
-}
-
-u8 A1_inb(int port)
-{
- u8 a;
- /*if (port == 0x3BA) return 0; */
- a = in_byte(port);
- LOGIO(port, "inb: %Xh -> %d (%Xh)\n", port, a, a);
- return a;
-}
-
-u16 A1_inw(int port)
-{
- u16 a = in_word(port);
- LOGIO(port, "inw: %Xh -> %d (%Xh)\n", port, a, a);
- return a;
-}
-
-u32 A1_inl(int port)
-{
- u32 a = in_long(port);
- LOGIO(port, "inl: %Xh -> %d (%Xh)\n", port, a, a);
- return a;
-}
-
-void A1_outb(int port, u8 val)
-{
- LOGIO(port, "outb: %Xh <- %d (%Xh)\n", port, val, val);
-/* if (port == 0xCF8) port = 0xCFB;
- else if (port == 0xCF9) port = 0xCFA;
- else if (port == 0xCFA) port = 0xCF9;
- else if (port == 0xCFB) port = 0xCF8;*/
- out_byte(port, val);
-}
-
-void A1_outw(int port, u16 val)
-{
- LOGIO(port, "outw: %Xh <- %d (%Xh)\n", port, val, val);
- out_word(port, val);
-}
-
-void A1_outl(int port, u32 val)
-{
- LOGIO(port, "outl: %Xh <- %d (%Xh)\n", port, val, val);
- out_long(port, val);
-}
-
-X86EMU_pioFuncs _A1_pio =
-{
- A1_inb,
- A1_inw,
- A1_inl,
- A1_outb,
- A1_outw,
- A1_outl,
-};
-
-static int reloced_ops = 0;
-
-void reloc_ops(void *reloc_addr)
-{
- extern void (*x86emu_optab[256])(u8);
- extern void (*x86emu_optab2[256])(u8);
- extern void tables_relocate(unsigned int offset);
- int i;
- unsigned long delta;
- if (reloced_ops == 1) return;
- reloced_ops = 1;
-
- delta = TEXT_BASE - (unsigned long)reloc_addr;
-
- for (i=0; i<256; i++)
- {
- x86emu_optab[i] -= delta;
- x86emu_optab2[i] -= delta;
- }
-
- _A1_mem.rdb = A1_rdb;
- _A1_mem.rdw = A1_rdw;
- _A1_mem.rdl = A1_rdl;
- _A1_mem.wrb = A1_wrb;
- _A1_mem.wrw = A1_wrw;
- _A1_mem.wrl = A1_wrl;
-
- _A1_pio.inb = A1_inb;
- _A1_pio.inw = A1_inw;
- _A1_pio.inl = A1_inl;
- _A1_pio.outb = A1_outb;
- _A1_pio.outw = A1_outw;
- _A1_pio.outl = A1_outl;
-
- tables_relocate(delta);
-
-}
-
-
-#define ANY_KEY(text) \
- printf(text); \
- while (!tstc());
-
-
-unsigned char more_strap[] = {
- 0xb4, 0x0, 0xb0, 0x2, 0xcd, 0x10,
-};
-#define MORE_STRAP_BYTES 6 /* Additional bytes of strap code */
-
-
-unsigned char *done_msg="VGA Initialized\0";
-
-int execute_bios(pci_dev_t gr_dev, void *reloc_addr)
-{
- extern void bios_init(void);
- extern void remove_init_data(void);
- extern int video_rows(void);
- extern int video_cols(void);
- extern int video_size(int, int);
- u8 *strap;
- unsigned char *logo;
- u8 cfg;
- int i;
- char c;
- char *s;
-#ifdef EASTEREGG
- int easteregg_active = 0;
-#endif
- char *pal_reset;
- u8 *fb;
- unsigned char *msg;
- unsigned char current_attr;
-
- PRINTF("Trying to remove init data\n");
- remove_init_data();
- PRINTF("Removed init data from cache, now in RAM\n");
-
- reloc_ops(reloc_addr);
- PRINTF("Attempting to run emulator on %02x:%02x:%02x\n",
- PCI_BUS(gr_dev), PCI_DEV(gr_dev), PCI_FUNC(gr_dev));
-
- /* Enable compatibility hole for emulator access to frame buffer */
- PRINTF("Enabling compatibility hole\n");
- enable_compatibility_hole();
-
- /* Allocate memory */
- /* FIXME: We shouldn't use this much memory really. */
- memset(&M, 0, sizeof(X86EMU_sysEnv));
- M.mem_base = malloc(EMULATOR_MEM_SIZE);
- M.mem_size = EMULATOR_MEM_SIZE;
-
- if (!M.mem_base)
- {
- PRINTF("Unable to allocate one megabyte for emulator\n");
- return 0;
- }
-
- if (attempt_map_rom(gr_dev, M.mem_base + EMULATOR_BIOS_OFFSET) == 0)
- {
- PRINTF("Error mapping rom. Emulation terminated\n");
- return 0;
- }
-
-#if 1 /*def DEBUG*/
- s = getenv("x86_ask_start");
- if (s)
- {
- printf("Press 'q' to skip initialization, 'd' for dry init\n'i' for i/o session");
- while (!tstc());
- c = getc();
- if (c == 'q') return 0;
- if (c == 'd')
- {
- extern void bios_set_mode(int mode);
- bios_set_mode(0x03);
- return 0;
- }
- if (c == 'i') do_inout();
- }
-
-
-#endif
-
-#ifdef EASTEREGG
-/* if (tstc())
- {
- if (getc() == 'c')
- {
- easteregg_active = 1;
- }
- }
-*/
- if (getenv("easteregg"))
- {
- easteregg_active = 1;
- }
-
- if (easteregg_active)
- {
- /* Yay! */
- setenv("x86_mode", "1");
- setenv("vga_fg_color", "11");
- setenv("vga_bg_color", "1");
- easteregg_active = 1;
- }
-#endif
-
- strap = (u8*)M.mem_base + EMULATOR_STRAP_OFFSET;
-
- {
- char *m = getenv("x86_mode");
- if (m)
- {
- more_strap[3] = atoi(m);
- if (more_strap[3] == 1) video_size(40, 25);
- else video_size(80, 25);
- }
- }
-
- /*
- * Poke the strap routine. This might need a bit of extending
- * if there is a mode switch involved, i.e. we want to int10
- * afterwards to set a different graphics mode, or alternatively
- * there might be a different start address requirement if the
- * ROM doesn't have an x86 image in its first image.
- */
-
- PRINTF("Poking strap...\n");
-
- /* FAR CALL c000:0003 */
- *strap++ = 0x9A; *strap++ = 0x03; *strap++ = 0x00;
- *strap++ = 0x00; *strap++ = 0xC0;
-
-#if 1
- /* insert additional strap code */
- for (i=0; i < MORE_STRAP_BYTES; i++)
- {
- *strap++ = more_strap[i];
- }
-#endif
- /* HALT */
- *strap++ = 0xF4;
-
- PRINTF("Setting up logo data\n");
- logo = (unsigned char *)M.mem_base + EMULATOR_LOGO_OFFSET;
- for (i=0; i<16; i++)
- {
- *logo++ = 0xFF;
- }
-
- /*
- * Setup the init parameters.
- * Per PCI specs, AH must contain the bus and AL
- * must contain the devfn, encoded as (dev<<3)|fn
- */
-
- /* Execution starts here */
- M.x86.R_CS = SEG(EMULATOR_STRAP_OFFSET);
- M.x86.R_IP = OFF(EMULATOR_STRAP_OFFSET);
-
- /* Stack at top of ram */
- M.x86.R_SS = SEG(EMULATOR_STACK_OFFSET);
- M.x86.R_SP = OFF(EMULATOR_STACK_OFFSET);
-
- /* Input parameters */
- M.x86.R_AH = PCI_BUS(gr_dev);
- M.x86.R_AL = (PCI_DEV(gr_dev)<<3) | PCI_FUNC(gr_dev);
-
- /* Set the I/O and memory access functions */
- X86EMU_setupMemFuncs(&_A1_mem);
- X86EMU_setupPioFuncs(&_A1_pio);
-
- /* Enable timer 2 */
- cfg = in_byte(0x61); /* Get Misc control */
- cfg |= 0x01; /* Enable timer 2 */
- out_byte(0x61, cfg); /* output again */
-
- /* Set up the timers */
- out_byte(0x43, 0x54);
- out_byte(0x41, 0x18);
-
- out_byte(0x43, 0x36);
- out_byte(0x40, 0x00);
- out_byte(0x40, 0x00);
-
- out_byte(0x43, 0xb6);
- out_byte(0x42, 0x31);
- out_byte(0x42, 0x13);
-
- /* Init the "BIOS". */
- bios_init();
-
- /* Video Card Reset */
- out_byte(0x3D8, 0);
- out_byte(0x3B8, 1);
- (void)in_byte(0x3BA);
- (void)in_byte(0x3DA);
- out_byte(0x3C0, 0);
- out_byte(0x61, 0xFC);
-
-#ifdef DEBUG
- s = _getenv("x86_singlestep");
- if (s && strcmp(s, "on")==0)
- {
- PRINTF("Enabling single stepping for debug\n");
- X86EMU_trace_on();
- }
-#endif
-
- /* Ready set go... */
- PRINTF("Running emulator\n");
- X86EMU_exec();
- PRINTF("Done running emulator\n");
-
-/* FIXME: Remove me */
- pal_reset = getenv("x86_palette_reset");
- if (pal_reset && strcmp(pal_reset, "on") == 0)
- {
- PRINTF("Palette reset\n");
- /*(void)in_byte(0x3da); */
- /*out_byte(0x3c0, 0); */
-
- out_byte(0x3C8, 0);
- out_byte(0x3C9, 0);
- out_byte(0x3C9, 0);
- out_byte(0x3C9, 0);
- for (i=0; i<254; i++)
- {
- out_byte(0x3C9, 63);
- out_byte(0x3C9, 63);
- out_byte(0x3C9, 63);
- }
-
- out_byte(0x3c0, 0x20);
- }
-/* FIXME: remove me */
-#ifdef EASTEREGG
- if (easteregg_active)
- {
- extern void video_easteregg(void);
- video_easteregg();
- }
-#endif
-/*
- current_attr = video_get_attr();
- fb = (u8 *)VIDEO_BASE;
- for (i=0; i<video_rows()*video_cols()*2; i+=2)
- {
- *(fb+i) = ' ';
- *(fb+i+1) = current_attr;
- }
-
- fb = (u8 *)VIDEO_BASE + (video_rows())-1*(video_cols()*2);
- for (i=0; i<video_cols(); i++)
- {
- *(fb + 2*i) = 32;
- *(fb + 2*i + 1) = 0x17;
- }
-
- msg = done_msg;
- while (*msg)
- {
- *fb = *msg;
- fb += 2;
- msg ++;
- }
-*/
-#ifdef DEBUG
- if (getenv("x86_do_inout")) do_inout();
-#endif
-
-/*FIXME: dcache_disable(); */
- return 1;
-}
-
-/* Clean up the x86 mess */
-void shutdown_bios(void)
-{
-/* disable_compatibility_hole(); */
- /* Free the memory associated */
- free(M.mem_base);
-
-}
-
-int to_int(char *buffer)
-{
- int base = 0;
- int res = 0;
-
- if (*buffer == '$')
- {
- base = 16;
- buffer++;
- }
- else base = 10;
-
- for (;;)
- {
- switch(*buffer)
- {
- case '0' ... '9':
- res *= base;
- res += *buffer - '0';
- break;
- case 'A':
- case 'a':
- res *= base;
- res += 10;
- break;
- case 'B':
- case 'b':
- res *= base;
- res += 11;
- break;
- case 'C':
- case 'c':
- res *= base;
- res += 12;
- break;
- case 'D':
- case 'd':
- res *= base;
- res += 13;
- break;
- case 'E':
- case 'e':
- res *= base;
- res += 14;
- break;
- case 'F':
- case 'f':
- res *= base;
- res += 15;
- break;
- default:
- return res;
- }
- buffer++;
- }
- return res;
-}
-
-void one_arg(char *buffer, int *a)
-{
- while (*buffer && *buffer != '\n')
- {
- if (*buffer == ' ') buffer++;
- else break;
- }
-
- *a = to_int(buffer);
-}
-
-void two_args(char *buffer, int *a, int *b)
-{
- while (*buffer && *buffer != '\n')
- {
- if (*buffer == ' ') buffer++;
- else break;
- }
-
- *a = to_int(buffer);
-
- while (*buffer && *buffer != '\n')
- {
- if (*buffer != ' ') buffer++;
- else break;
- }
-
- while (*buffer && *buffer != '\n')
- {
- if (*buffer == ' ') buffer++;
- else break;
- }
-
- *b = to_int(buffer);
-}
-
-void do_inout(void)
-{
- char buffer[256];
- char *arg1, *arg2;
- int a,b;
-
- printf("In/Out Session\nUse 'i[bwl]' for in, 'o[bwl]' for out and 'q' to quit\n");
-
- do
- {
- cons_gets(buffer);
- printf("\n");
-
- *arg1 = buffer;
- while (*arg1 != ' ' ) arg1++;
- while (*arg1 == ' ') arg1++;
-
- if (buffer[0] == 'i')
- {
- one_arg(buffer+2, &a);
- switch (buffer[1])
- {
- case 'b':
- printf("in_byte(%xh) = %xh\n", a, A1_inb(a));
- break;
- case 'w':
- printf("in_word(%xh) = %xh\n", a, A1_inw(a));
- break;
- case 'l':
- printf("in_dword(%xh) = %xh\n", a, A1_inl(a));
- break;
- default:
- printf("Invalid length '%c'\n", buffer[1]);
- break;
- }
- }
- else if (buffer[0] == 'o')
- {
- two_args(buffer+2, &a, &b);
- switch (buffer[1])
- {
- case 'b':
- printf("out_byte(%d, %d)\n", a, b);
- A1_outb(a,b);
- break;
- case 'w':
- printf("out_word(%d, %d)\n", a, b);
- A1_outw(a, b);
- break;
- case 'l':
- printf("out_long(%d, %d)\n", a, b);
- A1_outl(a, b);
- break;
- default:
- printf("Invalid length '%c'\n", buffer[1]);
- break;
- }
- } else if (buffer[0] == 'q') return;
- } while (1);
-}
diff --git a/board/MAI/menu/cmd_menu.c b/board/MAI/menu/cmd_menu.c
index a515bd8..079f1ff 100644
--- a/board/MAI/menu/cmd_menu.c
+++ b/board/MAI/menu/cmd_menu.c
@@ -7,7 +7,7 @@
return 0;
}
-#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_AMIGAONEG3SE) && defined(CONFIG_CMD_BSP)
U_BOOT_CMD(
menu, 1, 1, do_menu,
"menu - display BIOS setup menu\n",
diff --git a/board/Marvell/common/serial.c b/board/Marvell/common/serial.c
index 6a1d4d7..01efbea 100644
--- a/board/Marvell/common/serial.c
+++ b/board/Marvell/common/serial.c
@@ -145,7 +145,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void kgdb_serial_init (void)
{
}
@@ -169,4 +169,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/a3000/u-boot.lds b/board/a3000/u-boot.lds
deleted file mode 100644
index acb9ffd..0000000
--- a/board/a3000/u-boot.lds
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ads5121/Makefile b/board/ads5121/Makefile
new file mode 100644
index 0000000..cd8148c
--- /dev/null
+++ b/board/ads5121/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/ads5121/ads5121.c b/board/ads5121/ads5121.c
new file mode 100644
index 0000000..f275ce7
--- /dev/null
+++ b/board/ads5121/ads5121.c
@@ -0,0 +1,186 @@
+/*
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <mpc512x.h>
+#include <asm/bitops.h>
+#include <command.h>
+
+/* Clocks in use */
+#define SCCR1_CLOCKS_EN (CLOCK_SCCR1_CFG_EN | \
+ CLOCK_SCCR1_LPC_EN | \
+ CLOCK_SCCR1_PSC_EN(CONFIG_PSC_CONSOLE) | \
+ CLOCK_SCCR1_PSCFIFO_EN | \
+ CLOCK_SCCR1_DDR_EN | \
+ CLOCK_SCCR1_FEC_EN)
+
+#define SCCR2_CLOCKS_EN (CLOCK_SCCR2_MEM_EN | \
+ CLOCK_SCCR2_SPDIF_EN | \
+ CLOCK_SCCR2_I2C_EN)
+
+#define CSAW_START(start) ((start) & 0xFFFF0000)
+#define CSAW_STOP(start, size) (((start) + (size) - 1) >> 16)
+
+long int fixed_sdram(void);
+
+int board_early_init_f (void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 lpcaw;
+
+ /*
+ * Initialize Local Window for the CPLD registers access (CS2 selects
+ * the CPLD chip)
+ */
+ im->sysconf.lpcs2aw = CSAW_START(CFG_CPLD_BASE) |
+ CSAW_STOP(CFG_CPLD_BASE, CFG_CPLD_SIZE);
+ im->lpc.cs_cfg[2] = CFG_CS2_CFG;
+
+ /*
+ * According to MPC5121e RM, configuring local access windows should
+ * be followed by a dummy read of the config register that was
+ * modified last and an isync
+ */
+ lpcaw = im->sysconf.lpcs2aw;
+ __asm__ __volatile__ ("isync");
+
+ /*
+ * Disable Boot NOR FLASH write protect - CPLD Reg 8 NOR FLASH Control
+ *
+ * Without this the flash identification routine fails, as it needs to issue
+ * write commands in order to establish the device ID.
+ */
+ *((volatile u8 *)(CFG_CPLD_BASE + 0x08)) = 0xC1;
+
+ /*
+ * Enable clocks
+ */
+ im->clk.sccr[0] = SCCR1_CLOCKS_EN;
+ im->clk.sccr[1] = SCCR2_CLOCKS_EN;
+
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ u32 msize = 0;
+
+ msize = fixed_sdram ();
+
+ return msize;
+}
+
+/*
+ * fixed sdram init -- the board doesn't use memory modules that have serial presence
+ * detect or similar mechanism for discovery of the DRAM settings
+ */
+long int fixed_sdram (void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = CFG_DDR_SIZE * 1024 * 1024;
+ u32 msize_log2 = __ilog2 (msize);
+ u32 i;
+
+ /* Initialize IO Control */
+ im->io_ctrl.regs[MEM_IDX] = IOCTRL_MUX_DDR;
+
+ /* Initialize DDR Local Window */
+ im->sysconf.ddrlaw.bar = CFG_DDR_BASE & 0xFFFFF000;
+ im->sysconf.ddrlaw.ar = msize_log2 - 1;
+
+ /*
+ * According to MPC5121e RM, configuring local access windows should
+ * be followed by a dummy read of the config register that was
+ * modified last and an isync
+ */
+ i = im->sysconf.ddrlaw.ar;
+ __asm__ __volatile__ ("isync");
+
+ /* Enable DDR */
+ im->mddrc.ddr_sys_config = CFG_MDDRC_SYS_CFG_EN;
+
+ /* Initialize DDR Priority Manager */
+ im->mddrc.prioman_config1 = CFG_MDDRCGRP_PM_CFG1;
+ im->mddrc.prioman_config2 = CFG_MDDRCGRP_PM_CFG2;
+ im->mddrc.hiprio_config = CFG_MDDRCGRP_HIPRIO_CFG;
+ im->mddrc.lut_table0_main_upper = CFG_MDDRCGRP_LUT0_MU;
+ im->mddrc.lut_table1_main_upper = CFG_MDDRCGRP_LUT1_MU;
+ im->mddrc.lut_table2_main_upper = CFG_MDDRCGRP_LUT2_MU;
+ im->mddrc.lut_table3_main_upper = CFG_MDDRCGRP_LUT3_MU;
+ im->mddrc.lut_table4_main_upper = CFG_MDDRCGRP_LUT4_MU;
+ im->mddrc.lut_table0_main_lower = CFG_MDDRCGRP_LUT0_ML;
+ im->mddrc.lut_table1_main_lower = CFG_MDDRCGRP_LUT1_ML;
+ im->mddrc.lut_table2_main_lower = CFG_MDDRCGRP_LUT2_ML;
+ im->mddrc.lut_table3_main_lower = CFG_MDDRCGRP_LUT3_ML;
+ im->mddrc.lut_table4_main_lower = CFG_MDDRCGRP_LUT4_ML;
+ im->mddrc.lut_table0_alternate_upper = CFG_MDDRCGRP_LUT0_AU;
+ im->mddrc.lut_table1_alternate_upper = CFG_MDDRCGRP_LUT1_AU;
+ im->mddrc.lut_table2_alternate_upper = CFG_MDDRCGRP_LUT2_AU;
+ im->mddrc.lut_table3_alternate_upper = CFG_MDDRCGRP_LUT3_AU;
+ im->mddrc.lut_table4_alternate_upper = CFG_MDDRCGRP_LUT4_AU;
+ im->mddrc.lut_table0_alternate_lower = CFG_MDDRCGRP_LUT0_AU;
+ im->mddrc.lut_table1_alternate_lower = CFG_MDDRCGRP_LUT1_AL;
+ im->mddrc.lut_table2_alternate_lower = CFG_MDDRCGRP_LUT2_AL;
+ im->mddrc.lut_table3_alternate_lower = CFG_MDDRCGRP_LUT3_AL;
+ im->mddrc.lut_table4_alternate_lower = CFG_MDDRCGRP_LUT4_AL;
+
+ /* Initialize MDDRC */
+ im->mddrc.ddr_sys_config = CFG_MDDRC_SYS_CFG;
+ im->mddrc.ddr_time_config0 = CFG_MDDRC_TIME_CFG0;
+ im->mddrc.ddr_time_config1 = CFG_MDDRC_TIME_CFG1;
+ im->mddrc.ddr_time_config2 = CFG_MDDRC_TIME_CFG2;
+
+ /* Initialize DDR */
+ for (i = 0; i < 10; i++)
+ im->mddrc.ddr_command = CFG_MICRON_NOP;
+
+ im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL;
+ im->mddrc.ddr_command = CFG_MICRON_EM2;
+ im->mddrc.ddr_command = CFG_MICRON_EM3;
+ im->mddrc.ddr_command = CFG_MICRON_EN_DLL;
+ im->mddrc.ddr_command = CFG_MICRON_RST_DLL;
+ im->mddrc.ddr_command = CFG_MICRON_PCHG_ALL;
+ im->mddrc.ddr_command = CFG_MICRON_RFSH;
+ im->mddrc.ddr_command = CFG_MICRON_INIT_DEV_OP;
+ im->mddrc.ddr_command = CFG_MICRON_OCD_DEFAULT;
+ im->mddrc.ddr_command = CFG_MICRON_OCD_EXIT;
+
+ for (i = 0; i < 10; i++)
+ im->mddrc.ddr_command = CFG_MICRON_NOP;
+
+ /* Start MDDRC */
+ im->mddrc.ddr_time_config0 = CFG_MDDRC_TIME_CFG0_RUN;
+ im->mddrc.ddr_sys_config = CFG_MDDRC_SYS_CFG_RUN;
+
+ return msize;
+}
+
+int checkboard (void)
+{
+ ushort brd_rev = *(vu_short *) (CFG_CPLD_BASE + 0x00);
+ uchar cpld_rev = *(vu_char *) (CFG_CPLD_BASE + 0x02);
+
+ printf ("Board: ADS5121 rev. 0x%04x (CPLD rev. 0x%02x)\n",
+ brd_rev, cpld_rev);
+ return 0;
+}
diff --git a/board/ads5121/config.mk b/board/ads5121/config.mk
new file mode 100644
index 0000000..14998f4
--- /dev/null
+++ b/board/ads5121/config.mk
@@ -0,0 +1,23 @@
+#
+# (C) Copyright 2007 DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFF00000
diff --git a/board/ads5121/u-boot.lds b/board/ads5121/u-boot.lds
new file mode 100644
index 0000000..34ceb0f
--- /dev/null
+++ b/board/ads5121/u-boot.lds
@@ -0,0 +1,121 @@
+/*
+ * (C) Copyright 2007 DENX Software Engineering.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc512x/start.o (.text)
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
+ENTRY(_start)
diff --git a/board/alaska/alaska.c b/board/alaska/alaska.c
index 93874b2..9531703 100644
--- a/board/alaska/alaska.c
+++ b/board/alaska/alaska.c
@@ -138,7 +138,7 @@
size = dramSetup ();
/* if iCache ad dCache is defined */
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
+#if defined(CONFIG_CMD_CACHE)
/* setupBat(size);*/
#endif
diff --git a/board/alaska/u-boot.lds b/board/alaska/u-boot.lds
deleted file mode 100644
index 889bc77..0000000
--- a/board/alaska/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8220/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/altera/dk1c20/dk1c20.c b/board/altera/dk1c20/dk1c20.c
index 98ee7a7..d0eb9ea 100644
--- a/board/altera/dk1c20/dk1c20.c
+++ b/board/altera/dk1c20/dk1c20.c
@@ -55,7 +55,7 @@
return (0);
}
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
int ide_preinit (void)
{
nios_pio_t *present = (nios_pio_t *) CFG_CF_PRESENT;
@@ -78,4 +78,4 @@
return 0;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
+#endif
diff --git a/board/amcc/acadia/Makefile b/board/amcc/acadia/Makefile
index abcbf3e..c56b273 100644
--- a/board/amcc/acadia/Makefile
+++ b/board/amcc/acadia/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o cpr.o memory.o
+COBJS = $(BOARD).o cmd_acadia.o memory.o pll.o
SOBJS =
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/amcc/acadia/acadia.c b/board/amcc/acadia/acadia.c
index baf598c..8b82ea4 100644
--- a/board/amcc/acadia/acadia.c
+++ b/board/amcc/acadia/acadia.c
@@ -31,13 +31,13 @@
/*
* GPIO0 setup (select GPIO or alternate function)
*/
- out32(GPIO0_OSRL, CFG_GPIO0_OSRL);
- out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */
- out32(GPIO0_ISR1L, CFG_GPIO0_ISR1L);
- out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */
- out32(GPIO0_TSRL, CFG_GPIO0_TSRL);
- out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */
- out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */
+ out32(GPIO0_OSRL, CFG_GPIO0_OSRL);
+ out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */
+ out32(GPIO0_ISR1L, CFG_GPIO0_ISR1L);
+ out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */
+ out32(GPIO0_TSRL, CFG_GPIO0_TSRL);
+ out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */
+ out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */
/*
* Ultra (405EZ) was nice enough to add another GPIO controller
@@ -55,13 +55,25 @@
{
unsigned int reg;
+#if !defined(CONFIG_NAND_U_BOOT)
/* don't reinit PLL when booting via I2C bootstrap option */
mfsdr(SDR_PINSTP, reg);
if (reg != 0xf0000000)
board_pll_init_f();
+#endif
acadia_gpio_init();
+ /* Configure 405EZ for NAND usage */
+ mtsdr(sdrnand0, SDR_NAND0_NDEN | SDR_NAND0_NDAREN | SDR_NAND0_NDRBEN);
+ mfsdr(sdrultra0, reg);
+ reg &= ~SDR_ULTRA0_CSN_MASK;
+ reg |= (SDR_ULTRA0_CSNSEL0 >> CFG_NAND_CS) |
+ SDR_ULTRA0_NDGPIOBP |
+ SDR_ULTRA0_EBCRDYEN |
+ SDR_ULTRA0_NFSRSTEN;
+ mtsdr(sdrultra0, reg);
+
/* USB Host core needs this bit set */
mfsdr(sdrultra1, reg);
mtsdr(sdrultra1, reg | SDR_ULTRA1_LEDNENABLE);
@@ -91,8 +103,11 @@
int checkboard(void)
{
char *s = getenv("serial#");
+ u8 rev;
- printf("Board: Acadia - AMCC PPC405EZ Evaluation Board");
+ rev = in8(CFG_CPLD_BASE + 0);
+ printf("Board: Acadia - AMCC PPC405EZ Evaluation Board, Rev. %X", rev);
+
if (s != NULL) {
puts(", serial# ");
puts(s);
diff --git a/board/amcc/acadia/cmd_acadia.c b/board/amcc/acadia/cmd_acadia.c
new file mode 100644
index 0000000..fb7ea35
--- /dev/null
+++ b/board/amcc/acadia/cmd_acadia.c
@@ -0,0 +1,101 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+
+static u8 boot_267_nor[] = {
+ 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8e, 0x00,
+ 0x14, 0xc0, 0x36, 0xcc, 0x00, 0x0c, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+};
+
+static u8 boot_267_nand[] = {
+ 0xd0, 0x38, 0xc3, 0x50, 0x13, 0x88, 0x8e, 0x00,
+ 0x14, 0xc0, 0x36, 0xcc, 0x00, 0x0c, 0x00, 0x00,
+ 0x00, 0x00, 0x00, 0x00
+};
+
+static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ u8 chip;
+ u8 *buf;
+ int cpu_freq;
+
+ if (argc < 3) {
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ cpu_freq = simple_strtol(argv[1], NULL, 10);
+ if (cpu_freq != 267) {
+ printf("Unsupported cpu-frequency - only 267 supported\n");
+ return 1;
+ }
+
+ /* use 0x50 as I2C EEPROM address for now */
+ chip = 0x50;
+
+ if ((strcmp(argv[2], "nor") != 0) &&
+ (strcmp(argv[2], "nand") != 0)) {
+ printf("Unsupported boot-device - only nor|nand support\n");
+ return 1;
+ }
+
+ if (strcmp(argv[2], "nand") == 0) {
+ switch (cpu_freq) {
+ case 267:
+ buf = boot_267_nand;
+ break;
+ default:
+ break;
+ }
+ } else {
+ switch (cpu_freq) {
+ case 267:
+ buf = boot_267_nor;
+ break;
+ default:
+ break;
+ }
+ }
+
+ if (i2c_write(chip, 0, 1, buf, 16) != 0)
+ printf("Error writing to EEPROM at address 0x%x\n", chip);
+ udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+ if (i2c_write(chip, 0x10, 1, buf+16, 4) != 0)
+ printf("Error2 writing to EEPROM at address 0x%x\n", chip);
+
+ printf("Done\n");
+ printf("Please power-cycle the board for the changes to take effect\n");
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ bootstrap, 3, 0, do_bootstrap,
+ "bootstrap - program the I2C bootstrap EEPROM\n",
+ "<cpu-freq> <nor|nand> - program the I2C bootstrap EEPROM\n"
+ );
diff --git a/board/amcc/acadia/config.mk b/board/amcc/acadia/config.mk
index c8566ec..af5a46c 100644
--- a/board/amcc/acadia/config.mk
+++ b/board/amcc/acadia/config.mk
@@ -21,6 +21,12 @@
# MA 02111-1307 USA
#
+#
+# AMCC 405EZ Reference Platform (Acadia) board
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
ifndef TEXT_BASE
TEXT_BASE = 0xFFFC0000
endif
diff --git a/board/amcc/acadia/memory.c b/board/amcc/acadia/memory.c
index 5375d36..9346d2c 100644
--- a/board/amcc/acadia/memory.c
+++ b/board/amcc/acadia/memory.c
@@ -31,6 +31,8 @@
#include <asm/io.h>
#include <asm/gpio.h>
+extern void board_pll_init_f(void);
+
/*
* sdram_init - Dummy implementation for start.S, spd_sdram used on this board!
*/
@@ -39,6 +41,7 @@
return;
}
+#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
static void cram_bcr_write(u32 wr_val)
{
wr_val <<= 2;
@@ -62,9 +65,21 @@
return;
}
+#endif
long int initdram(int board_type)
{
+#if defined(CONFIG_NAND_SPL)
+ u32 reg;
+
+ /* don't reinit PLL when booting via I2C bootstrap option */
+ mfsdr(SDR_PINSTP, reg);
+ if (reg != 0xf0000000)
+ board_pll_init_f();
+#endif
+
+#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+ int i;
u32 val;
/* 1. EBC need to program READY, CLK, ADV for ASync mode */
@@ -92,7 +107,12 @@
/* Config EBC to use RDY */
mfsdr(sdrultra0, val);
- mtsdr(sdrultra0, val | 0x04000000);
+ mtsdr(sdrultra0, val | SDR_ULTRA0_EBCRDYEN);
+
+ /* Wait a short while, since for NAND booting this is too fast */
+ for (i=0; i<200000; i++)
+ ;
+#endif
return (CFG_MBYTES_RAM << 20);
}
diff --git a/board/amcc/acadia/cpr.c b/board/amcc/acadia/pll.c
similarity index 100%
rename from board/amcc/acadia/cpr.c
rename to board/amcc/acadia/pll.c
diff --git a/board/amcc/acadia/u-boot-nand.lds b/board/amcc/acadia/u-boot-nand.lds
new file mode 100644
index 0000000..a5dae0e
--- /dev/null
+++ b/board/amcc/acadia/u-boot-nand.lds
@@ -0,0 +1,137 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/ppc4xx/start.o (.text)
+
+ /* Align to next NAND block */
+ . = ALIGN(0x4000);
+ common/environment.o (.ppcenv)
+ /* Keep some space here for redundant env and potential bad env blocks */
+ . = ALIGN(0x10000);
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/amcc/bamboo/Makefile b/board/amcc/bamboo/Makefile
index 5da96e9..d01cc49 100644
--- a/board/amcc/bamboo/Makefile
+++ b/board/amcc/bamboo/Makefile
@@ -1,5 +1,5 @@
#
-# (C) Copyright 2002-2006
+# (C) Copyright 2002-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -33,7 +33,7 @@
SOBJS := $(addprefix $(obj),$(SOBJS))
$(LIB): $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
clean:
rm -f $(SOBJS) $(OBJS)
diff --git a/board/amcc/bamboo/bamboo.c b/board/amcc/bamboo/bamboo.c
index 6260b01..00c793a 100644
--- a/board/amcc/bamboo/bamboo.c
+++ b/board/amcc/bamboo/bamboo.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -32,9 +32,170 @@
void configure_ppc440ep_pins(void);
int is_nand_selected(void);
-unsigned char cfg_simulate_spd_eeprom[128];
+#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
+/*************************************************************************
+ *
+ * Bamboo has one bank onboard sdram (plus DIMM)
+ *
+ * Fixed memory is composed of :
+ * MT46V16M16TG-75 from Micron (x 2), 256Mb, 16 M x16, DDR266,
+ * 13 row add bits, 10 column add bits (but 12 row used only).
+ * ECC device: MT46V16M8TG-75 from Micron (x 1), 128Mb, x8, DDR266,
+ * 12 row add bits, 10 column add bits.
+ * Prepare a subset (only the used ones) of SPD data
+ *
+ * Note : if the ECC is enabled (SDRAM_ECC_ENABLE) the size of
+ * the corresponding bank is divided by 2 due to number of Row addresses
+ * 12 in the ECC module
+ *
+ * Assumes: 64 MB, ECC, non-registered
+ * PLB @ 133 MHz
+ *
+ ************************************************************************/
+const unsigned char cfg_simulate_spd_eeprom[128] = {
+ 0x80, /* number of SPD bytes used: 128 */
+ 0x08, /* total number bytes in SPD device = 256 */
+ 0x07, /* DDR ram */
+#ifdef CONFIG_DDR_ECC
+ 0x0C, /* num Row Addr: 12 */
+#else
+ 0x0D, /* num Row Addr: 13 */
+#endif
+ 0x09, /* numColAddr: 9 */
+ 0x01, /* numBanks: 1 */
+ 0x20, /* Module data width: 32 bits */
+ 0x00, /* Module data width continued: +0 */
+ 0x04, /* 2.5 Volt */
+ 0x75, /* SDRAM Cycle Time (cas latency 2.5) = 7.5 ns */
+#ifdef CONFIG_DDR_ECC
+ 0x02, /* ECC ON : 02 OFF : 00 */
+#else
+ 0x00, /* ECC ON : 02 OFF : 00 */
+#endif
+ 0x82, /* refresh Rate Type: Normal (15.625us) + Self refresh */
+ 0,
+ 0,
+ 0,
+ 0x01, /* wcsbc = 1 */
+ 0,
+ 0,
+ 0x0C, /* casBit (2,2.5) */
+ 0,
+ 0,
+ 0x00, /* not registered: 0 registered : 0x02*/
+ 0,
+ 0xA0, /* SDRAM Cycle Time (cas latency 2) = 10 ns */
+ 0,
+ 0x00, /* SDRAM Cycle Time (cas latency 1.5) = N.A */
+ 0,
+ 0x50, /* tRpNs = 20 ns */
+ 0,
+ 0x50, /* tRcdNs = 20 ns */
+ 45, /* tRasNs */
+#ifdef CONFIG_DDR_ECC
+ 0x08, /* bankSizeID: 32MB */
+#else
+ 0x10, /* bankSizeID: 64MB */
+#endif
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0,
+ 0
+};
+#endif
-gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX];
#if 0
{ /* GPIO Alternate1 Alternate2 Alternate3 */
{
@@ -291,73 +452,18 @@
return (0);
}
-/*************************************************************************
- *
- * init_spd_array -- Bamboo has one bank onboard sdram (plus DIMM)
- *
- * Fixed memory is composed of :
- * MT46V16M16TG-75 from Micron (x 2), 256Mb, 16 M x16, DDR266,
- * 13 row add bits, 10 column add bits (but 12 row used only).
- * ECC device: MT46V16M8TG-75 from Micron (x 1), 128Mb, x8, DDR266,
- * 12 row add bits, 10 column add bits.
- * Prepare a subset (only the used ones) of SPD data
- *
- * Note : if the ECC is enabled (SDRAM_ECC_ENABLE) the size of
- * the corresponding bank is divided by 2 due to number of Row addresses
- * 12 in the ECC module
- *
- * Assumes: 64 MB, ECC, non-registered
- * PLB @ 133 MHz
- *
- ************************************************************************/
-static void init_spd_array(void)
-{
- cfg_simulate_spd_eeprom[8] = 0x04; /* 2.5 Volt */
- cfg_simulate_spd_eeprom[2] = 0x07; /* DDR ram */
-
-#ifdef CONFIG_DDR_ECC
- cfg_simulate_spd_eeprom[11] = 0x02; /* ECC ON : 02 OFF : 00 */
- cfg_simulate_spd_eeprom[31] = 0x08; /* bankSizeID: 32MB */
- cfg_simulate_spd_eeprom[3] = 0x0C; /* num Row Addr: 12 */
-#else
- cfg_simulate_spd_eeprom[11] = 0x00; /* ECC ON : 02 OFF : 00 */
- cfg_simulate_spd_eeprom[31] = 0x10; /* bankSizeID: 64MB */
- cfg_simulate_spd_eeprom[3] = 0x0D; /* num Row Addr: 13 */
-#endif
-
- cfg_simulate_spd_eeprom[4] = 0x09; /* numColAddr: 9 */
- cfg_simulate_spd_eeprom[5] = 0x01; /* numBanks: 1 */
- cfg_simulate_spd_eeprom[0] = 0x80; /* number of SPD bytes used: 128 */
- cfg_simulate_spd_eeprom[1] = 0x08; /* total number bytes in SPD device = 256 */
- cfg_simulate_spd_eeprom[21] = 0x00; /* not registered: 0 registered : 0x02*/
- cfg_simulate_spd_eeprom[6] = 0x20; /* Module data width: 32 bits */
- cfg_simulate_spd_eeprom[7] = 0x00; /* Module data width continued: +0 */
- cfg_simulate_spd_eeprom[15] = 0x01; /* wcsbc = 1 */
- cfg_simulate_spd_eeprom[27] = 0x50; /* tRpNs = 20 ns */
- cfg_simulate_spd_eeprom[29] = 0x50; /* tRcdNs = 20 ns */
-
- cfg_simulate_spd_eeprom[30] = 45; /* tRasNs */
-
- cfg_simulate_spd_eeprom[18] = 0x0C; /* casBit (2,2.5) */
-
- cfg_simulate_spd_eeprom[9] = 0x75; /* SDRAM Cycle Time (cas latency 2.5) = 7.5 ns */
- cfg_simulate_spd_eeprom[23] = 0xA0; /* SDRAM Cycle Time (cas latency 2) = 10 ns */
- cfg_simulate_spd_eeprom[25] = 0x00; /* SDRAM Cycle Time (cas latency 1.5) = N.A */
- cfg_simulate_spd_eeprom[12] = 0x82; /* refresh Rate Type: Normal (15.625us) + Self refresh */
-}
long int initdram (int board_type)
{
- long dram_size = 0;
-
- /*
- * First write simulated values in eeprom array for onboard bank 0
- */
- init_spd_array();
+#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
+ long dram_size;
dram_size = spd_sdram();
return dram_size;
+#else
+ return CFG_MBYTES_SDRAM << 20;
+#endif
}
#if defined(CFG_DRAM_TEST)
@@ -365,11 +471,12 @@
{
unsigned long *mem = (unsigned long *)0;
const unsigned long kend = (1024 / sizeof(unsigned long));
- unsigned long k, n;
+ unsigned long k, n, *p32, ctr;
+ const unsigned long bend = CFG_MBYTES_SDRAM * 1024 * 1024;
mtmsr(0);
- for (k = 0; k < CFG_KBYTES_SDRAM;
+ for (k = 0; k < CFG_MBYTES_SDRAM*1024;
++k, mem += (1024 / sizeof(unsigned long))) {
if ((k & 1023) == 0) {
printf("%3d MB\r", k / 1024);
@@ -393,6 +500,34 @@
}
}
}
+
+ /*
+ * Perform a sequence test to ensure that all
+ * memory locations are uniquely addressable
+ */
+ ctr = 0;
+ p32 = 0;
+ while ((unsigned long)p32 != bend) {
+ if (0 == ((unsigned long)p32 & ((1<<20)-1)))
+ printf("Writing %3d MB\r", (unsigned long)p32 >> 20);
+ *p32++ = ctr++;
+ }
+
+ ctr = 0;
+ p32 = 0;
+ while ((unsigned long)p32 != bend) {
+ if (0 == ((unsigned long)p32 & ((1<<20)-1)))
+ printf("Verifying %3d MB\r", (unsigned long)p32 >> 20);
+
+ if (*p32 != ctr) {
+ printf("SDRAM test fails at: %08x\n", p32);
+ return 1;
+ }
+
+ ctr++;
+ p32++;
+ }
+
printf("SDRAM test passes\n");
return 0;
}
@@ -410,7 +545,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
@@ -451,7 +586,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -881,11 +1016,11 @@
/*------------------------------------------------------------------------- */
case BOOT_FROM_NAND_FLASH0:
/*------------------------------------------------------------------------- */
- ebc0_cs0_bnap_value = 0;
- ebc0_cs0_bncr_value = 0;
+ ebc0_cs0_bnap_value = EBC0_BNAP_NAND_FLASH;
+ ebc0_cs0_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
- ebc0_cs1_bnap_value = EBC0_BNAP_NAND_FLASH;
- ebc0_cs1_bncr_value = EBC0_BNCR_NAND_FLASH_CS1;
+ ebc0_cs1_bnap_value = 0;
+ ebc0_cs1_bncr_value = 0;
ebc0_cs2_bnap_value = 0;
ebc0_cs2_bncr_value = 0;
ebc0_cs3_bnap_value = 0;
@@ -1205,7 +1340,7 @@
/*----------------------------------------------------------------------------+
| init_default_gpio
+----------------------------------------------------------------------------*/
-void init_default_gpio(void)
+void init_default_gpio(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
int i;
@@ -1275,7 +1410,7 @@
|
+----------------------------------------------------------------------------*/
-void update_uart_ios(uart_config_nb_t uart_config)
+void update_uart_ios(uart_config_nb_t uart_config, gpio_param_s (*gpio_tab)[GPIO_MAX])
{
switch (uart_config)
{
@@ -1403,16 +1538,16 @@
/*----------------------------------------------------------------------------+
| update_ndfc_ios(void).
+----------------------------------------------------------------------------*/
-void update_ndfc_ios(void)
+void update_ndfc_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
/* Update GPIO Configuration Table */
gpio_tab[GPIO0][6].in_out = GPIO_OUT; /* EBC_CS_N(1) */
gpio_tab[GPIO0][6].alt_nb = GPIO_ALT1;
-#if 0
gpio_tab[GPIO0][7].in_out = GPIO_OUT; /* EBC_CS_N(2) */
gpio_tab[GPIO0][7].alt_nb = GPIO_ALT1;
+#if 0
gpio_tab[GPIO0][7].in_out = GPIO_OUT; /* EBC_CS_N(3) */
gpio_tab[GPIO0][7].alt_nb = GPIO_ALT1;
#endif
@@ -1421,7 +1556,7 @@
/*----------------------------------------------------------------------------+
| update_zii_ios(void).
+----------------------------------------------------------------------------*/
-void update_zii_ios(void)
+void update_zii_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
/* Update GPIO Configuration Table */
gpio_tab[GPIO0][12].in_out = GPIO_IN; /* ZII_p0Rxd(0) */
@@ -1471,7 +1606,7 @@
/*----------------------------------------------------------------------------+
| update_uic_0_3_irq_ios().
+----------------------------------------------------------------------------*/
-void update_uic_0_3_irq_ios(void)
+void update_uic_0_3_irq_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO1][8].in_out = GPIO_IN; /* UIC_IRQ(0) */
gpio_tab[GPIO1][8].alt_nb = GPIO_ALT1;
@@ -1489,7 +1624,7 @@
/*----------------------------------------------------------------------------+
| update_uic_4_9_irq_ios().
+----------------------------------------------------------------------------*/
-void update_uic_4_9_irq_ios(void)
+void update_uic_4_9_irq_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO1][12].in_out = GPIO_IN; /* UIC_IRQ(4) */
gpio_tab[GPIO1][12].alt_nb = GPIO_ALT1;
@@ -1510,7 +1645,7 @@
/*----------------------------------------------------------------------------+
| update_dma_a_b_ios().
+----------------------------------------------------------------------------*/
-void update_dma_a_b_ios(void)
+void update_dma_a_b_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO1][12].in_out = GPIO_OUT; /* DMA_ACK(1) */
gpio_tab[GPIO1][12].alt_nb = GPIO_ALT2;
@@ -1531,7 +1666,7 @@
/*----------------------------------------------------------------------------+
| update_dma_c_d_ios().
+----------------------------------------------------------------------------*/
-void update_dma_c_d_ios(void)
+void update_dma_c_d_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO0][0].in_out = GPIO_IN; /* DMA_REQ(2) */
gpio_tab[GPIO0][0].alt_nb = GPIO_ALT2;
@@ -1556,7 +1691,7 @@
/*----------------------------------------------------------------------------+
| update_ebc_master_ios().
+----------------------------------------------------------------------------*/
-void update_ebc_master_ios(void)
+void update_ebc_master_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO0][27].in_out = GPIO_IN; /* EXT_EBC_REQ */
gpio_tab[GPIO0][27].alt_nb = GPIO_ALT1;
@@ -1574,7 +1709,7 @@
/*----------------------------------------------------------------------------+
| update_usb2_device_ios().
+----------------------------------------------------------------------------*/
-void update_usb2_device_ios(void)
+void update_usb2_device_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO0][26].in_out = GPIO_IN; /* USB2D_RXVALID */
gpio_tab[GPIO0][26].alt_nb = GPIO_ALT2;
@@ -1605,20 +1740,21 @@
/*----------------------------------------------------------------------------+
| update_pci_patch_ios().
+----------------------------------------------------------------------------*/
-void update_pci_patch_ios(void)
+void update_pci_patch_ios(gpio_param_s (*gpio_tab)[GPIO_MAX])
{
gpio_tab[GPIO0][29].in_out = GPIO_OUT; /* EBC_EXT_HDLA */
gpio_tab[GPIO0][29].alt_nb = GPIO_ALT1;
}
/*----------------------------------------------------------------------------+
- | set_chip_gpio_configuration(unsigned char gpio_core)
+ | set_chip_gpio_configuration(unsigned char gpio_core,
+ | gpio_param_s (*gpio_tab)[GPIO_MAX])
| Put the core impacted by clock modification and sharing in reset.
| Config the select registers to resolve the sharing depending of the config.
| Configure the GPIO registers.
|
+----------------------------------------------------------------------------*/
-void set_chip_gpio_configuration(unsigned char gpio_core)
+void set_chip_gpio_configuration(unsigned char gpio_core, gpio_param_s (*gpio_tab)[GPIO_MAX])
{
unsigned char i=0, j=0, reg_offset = 0;
unsigned long gpio_reg, gpio_core_add;
@@ -1772,11 +1908,12 @@
CORE_NOT_SELECTED /* PCI_PATCH */
};
+ gpio_param_s gpio_tab[GPIO_GROUP_MAX][GPIO_MAX];
/* Table Default Initialisation + FPGA Access */
- init_default_gpio();
- set_chip_gpio_configuration(GPIO0);
- set_chip_gpio_configuration(GPIO1);
+ init_default_gpio(gpio_tab);
+ set_chip_gpio_configuration(GPIO0, gpio_tab);
+ set_chip_gpio_configuration(GPIO1, gpio_tab);
/* Update Table */
force_bup_core_selection(ppc440ep_core_selection, &config_val);
@@ -1811,7 +1948,7 @@
/* UIC 0:3 Selection */
if (ppc440ep_core_selection[UIC_0_3] == CORE_SELECTED)
{
- update_uic_0_3_irq_ios();
+ update_uic_0_3_irq_ios(gpio_tab);
dma_a_b_unselect_in_fpga();
}
@@ -1819,21 +1956,21 @@
if (ppc440ep_core_selection[UIC_4_9] == CORE_SELECTED)
{
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_DIS_MASK) | SDR0_PFC1_DIS_UICIRQ5_SEL;
- update_uic_4_9_irq_ios();
+ update_uic_4_9_irq_ios(gpio_tab);
}
/* DMA AB Selection */
if (ppc440ep_core_selection[DMA_CHANNEL_AB] == CORE_SELECTED)
{
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_DIS_MASK) | SDR0_PFC1_DIS_DMAR_SEL;
- update_dma_a_b_ios();
+ update_dma_a_b_ios(gpio_tab);
dma_a_b_selection_in_fpga();
}
/* DMA CD Selection */
if (ppc440ep_core_selection[DMA_CHANNEL_CD] == CORE_SELECTED)
{
- update_dma_c_d_ios();
+ update_dma_c_d_ios(gpio_tab);
dma_c_d_selection_in_fpga();
}
@@ -1842,14 +1979,14 @@
{
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_ERE_MASK) | SDR0_PFC1_ERE_EXTR_SEL;
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UES_MASK) | SDR0_PFC1_UES_EBCHR_SEL;
- update_ebc_master_ios();
+ update_ebc_master_ios(gpio_tab);
}
/* PCI Patch Enable */
if (ppc440ep_core_selection[PCI_PATCH] == CORE_SELECTED)
{
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UES_MASK) | SDR0_PFC1_UES_EBCHR_SEL;
- update_pci_patch_ios();
+ update_pci_patch_ios(gpio_tab);
}
/* USB2 Host Selection - Not Implemented in PowerPC 440EP Pass1 */
@@ -1865,7 +2002,7 @@
/* USB2.0 Device Selection */
if (ppc440ep_core_selection[USB2_DEVICE] == CORE_SELECTED)
{
- update_usb2_device_ios();
+ update_usb2_device_ios(gpio_tab);
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UES_MASK) | SDR0_PFC1_UES_USB2D_SEL;
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_UPR_MASK) | SDR0_PFC1_UPR_DISABLE;
@@ -1898,14 +2035,23 @@
/* NAND Flash Selection */
if (ppc440ep_core_selection[NAND_FLASH] == CORE_SELECTED)
{
- update_ndfc_ios();
+ update_ndfc_ios(gpio_tab);
+#if !(defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL))
mtsdr(sdr_cust0, SDR0_CUST0_MUX_NDFC_SEL |
SDR0_CUST0_NDFC_ENABLE |
SDR0_CUST0_NDFC_BW_8_BIT |
SDR0_CUST0_NDFC_ARE_MASK |
SDR0_CUST0_CHIPSELGAT_EN1 |
SDR0_CUST0_CHIPSELGAT_EN2);
+#else
+ mtsdr(sdr_cust0, SDR0_CUST0_MUX_NDFC_SEL |
+ SDR0_CUST0_NDFC_ENABLE |
+ SDR0_CUST0_NDFC_BW_8_BIT |
+ SDR0_CUST0_NDFC_ARE_MASK |
+ SDR0_CUST0_CHIPSELGAT_EN0 |
+ SDR0_CUST0_CHIPSELGAT_EN2);
+#endif
ndfc_selection_in_fpga();
}
@@ -1918,7 +2064,7 @@
/* MII Selection */
if (ppc440ep_core_selection[MII_SEL] == CORE_SELECTED)
{
- update_zii_ios();
+ update_zii_ios(gpio_tab);
mfsdr(sdr_mfr, sdr0_mfr);
sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_MII;
mtsdr(sdr_mfr, sdr0_mfr);
@@ -1929,7 +2075,7 @@
/* RMII Selection */
if (ppc440ep_core_selection[RMII_SEL] == CORE_SELECTED)
{
- update_zii_ios();
+ update_zii_ios(gpio_tab);
mfsdr(sdr_mfr, sdr0_mfr);
sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_RMII_10M;
mtsdr(sdr_mfr, sdr0_mfr);
@@ -1940,7 +2086,7 @@
/* SMII Selection */
if (ppc440ep_core_selection[SMII_SEL] == CORE_SELECTED)
{
- update_zii_ios();
+ update_zii_ios(gpio_tab);
mfsdr(sdr_mfr, sdr0_mfr);
sdr0_mfr = (sdr0_mfr & ~SDR0_MFR_ZMII_MODE_MASK) | SDR0_MFR_ZMII_MODE_SMII;
mtsdr(sdr_mfr, sdr0_mfr);
@@ -1977,7 +2123,7 @@
sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_U1ME_MASK) | SDR0_PFC1_U1ME_DSR_DTR;
break;
}
- update_uart_ios(uart_configuration);
+ update_uart_ios(uart_configuration, gpio_tab);
/* UART Selection in all cases */
uart_selection_in_fpga(uart_configuration);
@@ -1999,8 +2145,8 @@
/* Perform effective access to hardware */
mtsdr(sdr_pfc1, sdr0_pfc1);
- set_chip_gpio_configuration(GPIO0);
- set_chip_gpio_configuration(GPIO1);
+ set_chip_gpio_configuration(GPIO0, gpio_tab);
+ set_chip_gpio_configuration(GPIO1, gpio_tab);
/* USB2.0 Device Reset must be done after GPIO setting */
if (ppc440ep_core_selection[USB2_DEVICE] == CORE_SELECTED)
diff --git a/board/amcc/bamboo/config.mk b/board/amcc/bamboo/config.mk
index 9d7f4c3..b46527d 100644
--- a/board/amcc/bamboo/config.mk
+++ b/board/amcc/bamboo/config.mk
@@ -1,5 +1,5 @@
#
-# (C) Copyright 2002-2006
+# (C) Copyright 2002-2007
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -21,7 +21,11 @@
# MA 02111-1307 USA
#
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
TEXT_BASE = 0xFFFA0000
+endif
PLATFORM_CPPFLAGS += -DCONFIG_440=1
diff --git a/board/amcc/bamboo/flash.c b/board/amcc/bamboo/flash.c
index a30ab7a..8a2e832 100644
--- a/board/amcc/bamboo/flash.c
+++ b/board/amcc/bamboo/flash.c
@@ -53,7 +53,7 @@
static unsigned long flash_addr_table[][CFG_MAX_FLASH_BANKS] = {
{0x87800001, 0xFFF00000, 0xFFF80000}, /* 0:boot from small flash */
{0x00000000, 0x00000000, 0x00000000}, /* 1:boot from pci 66 */
- {0x00000000, 0x00000000, 0x00000000}, /* 2:boot from nand flash */
+ {0x87800001, 0x00000000, 0x00000000}, /* 0:boot from nand flash */
{0x87F00000, 0x87F80000, 0xFFC00001}, /* 3:boot from big flash 33*/
{0x87F00000, 0x87F80000, 0xFFC00001}, /* 4:boot from big flash 66*/
{0x00000000, 0x00000000, 0x00000000}, /* 5:boot from */
@@ -134,10 +134,10 @@
flash_info[i].size = 0;
/* check whether the address is 0 */
- if (flash_addr_table[index][i] == 0) {
+ if (flash_addr_table[index][i] == 0)
continue;
- }
+ DEBUGF("Detection bank %d...\n", i);
/* call flash_get_size() to initialize sector address */
size_b[i] = flash_get_size((vu_long *) flash_addr_table[index][i],
&flash_info[i]);
diff --git a/board/amcc/bamboo/init.S b/board/amcc/bamboo/init.S
index 7820107..f4d2ae3 100644
--- a/board/amcc/bamboo/init.S
+++ b/board/amcc/bamboo/init.S
@@ -1,74 +1,31 @@
/*
-*
-* See file CREDITS for list of people who contributed to this
-* project.
-*
-* This program is free software; you can redistribute it and/or
-* modify it under the terms of the GNU General Public License as
-* published by the Free Software Foundation; either version 2 of
-* the License, or (at your option) any later version.
-*
-* This program is distributed in the hope that it will be useful,
-* but WITHOUT ANY WARRANTY; without even the implied warranty of
-* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-* GNU General Public License for more details.
-*
-* You should have received a copy of the GNU General Public License
-* along with this program; if not, write to the Free Software
-* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-* MA 02111-1307 USA
-*/
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
#include <ppc_asm.tmpl>
#include <config.h>
-
-/* General */
-#define TLB_VALID 0x00000200
-
-/* Supported page sizes */
-
-#define SZ_1K 0x00000000
-#define SZ_4K 0x00000010
-#define SZ_16K 0x00000020
-#define SZ_64K 0x00000030
-#define SZ_256K 0x00000040
-#define SZ_1M 0x00000050
-#define SZ_8M 0x00000060
-#define SZ_16M 0x00000070
-#define SZ_256M 0x00000090
-
-/* Storage attributes */
-#define SA_W 0x00000800 /* Write-through */
-#define SA_I 0x00000400 /* Caching inhibited */
-#define SA_M 0x00000200 /* Memory coherence */
-#define SA_G 0x00000100 /* Guarded */
-#define SA_E 0x00000080 /* Endian */
-
-/* Access control */
-#define AC_X 0x00000024 /* Execute */
-#define AC_W 0x00000012 /* Write */
-#define AC_R 0x00000009 /* Read */
-
-/* Some handy macros */
-
-#define EPN(e) ((e) & 0xfffffc00)
-#define TLB0(epn,sz) ( (EPN((epn)) | (sz) | TLB_VALID ) )
-#define TLB1(rpn,erpn) ( ((rpn)&0xfffffc00) | (erpn) )
-#define TLB2(a) ( (a)&0x00000fbf )
-
-#define tlbtab_start\
- mflr r1 ;\
- bl 0f ;
-
-#define tlbtab_end\
- .long 0, 0, 0 ; \
-0: mflr r0 ; \
- mtlr r1 ; \
- blr ;
-
-#define tlbentry(epn,sz,rpn,erpn,attr)\
- .long TLB0(epn,sz),TLB1(rpn,erpn),TLB2(attr)
-
+#include <asm-ppc/mmu.h>
/**************************************************************************
* TLB TABLE
@@ -80,34 +37,67 @@
* Pointer to the table is returned in r1
*
*************************************************************************/
-
- .section .bootpg,"ax"
- .globl tlbtab
+ .section .bootpg,"ax"
+ .globl tlbtab
tlbtab:
- tlbtab_start
+ tlbtab_start
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
+#ifndef CONFIG_NAND_SPL
+ tlbentry(CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G)
+#else
+ tlbentry(CFG_NAND_BOOT_SPL_SRC, SZ_4K, CFG_NAND_BOOT_SPL_SRC, 0, AC_R|AC_W|AC_X|SA_G)
+ tlbentry(CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I)
+#endif
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+ /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+ tlbentry(CFG_INIT_RAM_ADDR, SZ_4K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G)
- tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
- tlbentry( CFG_NAND_ADDR, SZ_256M, CFG_NAND_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I )
+ /* PCI base & peripherals */
+ tlbentry(CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I)
- /* PCI */
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry(CFG_NVRAM_BASE_ADDR, SZ_256M, CFG_NVRAM_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I)
+ tlbentry(CFG_NAND_ADDR, SZ_4K, CFG_NAND_ADDR, 0, AC_R|AC_W|AC_X|SA_W|SA_I)
- /* USB 2.0 Device */
- tlbentry( CFG_USB_DEVICE, SZ_1K, CFG_USB_DEVICE, 0, AC_R|AC_W|SA_G|SA_I )
+ /* PCI */
+ tlbentry(CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I)
- tlbtab_end
+ /* USB 2.0 Device */
+ tlbentry(CFG_USB_DEVICE, SZ_1K, CFG_USB_DEVICE, 0, AC_R|AC_W|SA_G|SA_I)
+
+ tlbtab_end
+
+#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+ /*
+ * For NAND booting the first TLB has to be reconfigured to full size
+ * and with caching disabled after running from RAM!
+ */
+#define TLB00 TLB0(CFG_BOOT_BASE_ADDR, SZ_256M)
+#define TLB01 TLB1(CFG_BOOT_BASE_ADDR, 0)
+#define TLB02 TLB2(AC_R|AC_W|AC_X|SA_G|SA_I)
+
+ .globl reconfig_tlb0
+reconfig_tlb0:
+ sync
+ isync
+ addi r4,r0,0x0000 /* TLB entry #0 */
+ lis r5,TLB00@h
+ ori r5,r5,TLB00@l
+ tlbwe r5,r4,0x0000 /* Save it out */
+ lis r5,TLB01@h
+ ori r5,r5,TLB01@l
+ tlbwe r5,r4,0x0001 /* Save it out */
+ lis r5,TLB02@h
+ ori r5,r5,TLB02@l
+ tlbwe r5,r4,0x0002 /* Save it out */
+ sync
+ isync
+ blr
+#endif
diff --git a/board/amcc/bamboo/u-boot-nand.lds b/board/amcc/bamboo/u-boot-nand.lds
new file mode 100644
index 0000000..a5dae0e
--- /dev/null
+++ b/board/amcc/bamboo/u-boot-nand.lds
@@ -0,0 +1,137 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/ppc4xx/start.o (.text)
+
+ /* Align to next NAND block */
+ . = ALIGN(0x4000);
+ common/environment.o (.ppcenv)
+ /* Keep some space here for redundant env and potential bad env blocks */
+ . = ALIGN(0x10000);
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/amcc/bamboo/u-boot.lds b/board/amcc/bamboo/u-boot.lds
index f6d7183..0375618 100644
--- a/board/amcc/bamboo/u-boot.lds
+++ b/board/amcc/bamboo/u-boot.lds
@@ -141,8 +141,6 @@
*(COMMON)
}
- ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
-
_end = . ;
PROVIDE (end = .);
}
diff --git a/board/amcc/bubinga/bubinga.c b/board/amcc/bubinga/bubinga.c
index fe6ce8a..66e7509 100644
--- a/board/amcc/bubinga/bubinga.c
+++ b/board/amcc/bubinga/bubinga.c
@@ -20,10 +20,12 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
-long int spd_sdram(void);
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
+
+long int spd_sdram(void);
int board_early_init_f(void)
{
@@ -34,6 +36,15 @@
mtdcr(uictr, 0x00000010); /* set int trigger levels */
mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ /*
+ * Configure CPC0_PCI to enable PerWE as output
+ * and enable the internal PCI arbiter if selected
+ */
+ if (in_8((void *)FPGA_REG1) & FPGA_REG1_PCI_INT_ARB)
+ mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
+ else
+ mtdcr(cpc0_pci, CPC0_PCI_HOST_CFG_EN);
+
return 0;
}
diff --git a/board/amcc/common/flash.c b/board/amcc/common/flash.c
index e6429ec..eba0511 100644
--- a/board/amcc/common/flash.c
+++ b/board/amcc/common/flash.c
@@ -745,19 +745,27 @@
if (info->flash_id & FLASH_BTYPE) {
/* set sector offsets for bottom boot block type */
info->start[0] = base + 0x00000000;
- info->start[1] = base + 0x00004000;
- info->start[2] = base + 0x00006000;
- info->start[3] = base + 0x00008000;
- for (i = 4; i < info->sector_count; i++) {
+ info->start[1] = base + 0x00002000;
+ info->start[2] = base + 0x00004000;
+ info->start[3] = base + 0x00006000;
+ info->start[4] = base + 0x00008000;
+ info->start[5] = base + 0x0000a000;
+ info->start[6] = base + 0x0000c000;
+ info->start[7] = base + 0x0000e000;
+ for (i = 8; i < info->sector_count; i++) {
info->start[i] =
- base + (i * 0x00010000) - 0x00030000;
+ base + ((i-7) * 0x00010000);
}
} else {
/* set sector offsets for top boot block type */
i = info->sector_count - 1;
+ info->start[i--] = base + info->size - 0x00002000;
info->start[i--] = base + info->size - 0x00004000;
info->start[i--] = base + info->size - 0x00006000;
info->start[i--] = base + info->size - 0x00008000;
+ info->start[i--] = base + info->size - 0x0000a000;
+ info->start[i--] = base + info->size - 0x0000c000;
+ info->start[i--] = base + info->size - 0x0000e000;
for (; i >= 0; i--) {
info->start[i] = base + i * 0x00010000;
}
diff --git a/board/amcc/ebony/ebony.c b/board/amcc/ebony/ebony.c
index dcafac9..ededb3e 100644
--- a/board/amcc/ebony/ebony.c
+++ b/board/amcc/ebony/ebony.c
@@ -207,14 +207,14 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long strap;
/*--------------------------------------------------------------------------+
- * The ebony board is always configured as the host & requires the
- * PCI arbiter to be enabled.
+ * The ebony board is always configured as the host & requires the
+ * PCI arbiter to be enabled.
*--------------------------------------------------------------------------*/
strap = mfdcr(cpc0_strp1);
if ((strap & 0x00100000) == 0) {
@@ -224,7 +224,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/amcc/katmai/init.S b/board/amcc/katmai/init.S
index 5202ae6..e3f3da6 100644
--- a/board/amcc/katmai/init.S
+++ b/board/amcc/katmai/init.S
@@ -67,9 +67,9 @@
tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
@@ -109,9 +109,9 @@
tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x00100000, 0xD, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x20100000, 0xD, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0x40100000, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_R|AC_W|SA_G|SA_I)
diff --git a/board/amcc/katmai/katmai.c b/board/amcc/katmai/katmai.c
index 286bdc1..a49066f 100644
--- a/board/amcc/katmai/katmai.c
+++ b/board/amcc/katmai/katmai.c
@@ -34,6 +34,8 @@
#undef PCIE_ENDPOINT
/* #define PCIE_ENDPOINT 1 */
+DECLARE_GLOBAL_DATA_PTR;
+
int ppc440spe_init_pcie_rootport(int port);
void ppc440spe_setup_pcie(struct pci_controller *hose, int port);
@@ -292,7 +294,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -309,7 +311,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -322,8 +324,6 @@
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*-------------------------------------------------------------------+
* Disable everything
*-------------------------------------------------------------------*/
@@ -392,16 +392,18 @@
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
-void pcie_setup_hoses(void)
+void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
+ char *env;
+ unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
- bus = 1;
+ bus = busno;
for (i = 0; i <= 2; i++) {
/* Check for katmai card presence */
if (!katmai_pcie_card_present(i))
@@ -418,8 +420,8 @@
hose = &pcie_hose[i];
hose->first_busno = bus;
- hose->last_busno = bus;
- bus++;
+ hose->last_busno = bus;
+ hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
@@ -439,10 +441,21 @@
*/
#else
ppc440spe_setup_pcie_rootpoint(hose, i);
+
+ env = getenv ("pciscandelay");
+ if (env != NULL) {
+ delay = simple_strtoul (env, NULL, 10);
+ if (delay > 5)
+ printf ("Warning, expect noticable delay before PCIe"
+ "scan due to 'pciscandelay' value!\n");
+ mdelay (delay * 1000);
+ }
+
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
+ bus = hose->last_busno + 1;
#endif
}
}
diff --git a/board/amcc/luan/luan.c b/board/amcc/luan/luan.c
index 778aafc..7b16f8a 100644
--- a/board/amcc/luan/luan.c
+++ b/board/amcc/luan/luan.c
@@ -104,6 +104,13 @@
return 0;
}
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+u32 ddr_clktr(u32 default_val) {
+ return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
+}
/*************************************************************************
* int testdram()
@@ -161,7 +168,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init( struct pci_controller *hose )
{
unsigned long strap;
@@ -179,7 +186,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
diff --git a/board/amcc/ocotea/ocotea.c b/board/amcc/ocotea/ocotea.c
index 3f6d204..3bd1b81 100644
--- a/board/amcc/ocotea/ocotea.c
+++ b/board/amcc/ocotea/ocotea.c
@@ -306,7 +306,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -323,7 +323,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/amcc/sequoia/Makefile b/board/amcc/sequoia/Makefile
index 06ef7f9..e1c9ad4 100644
--- a/board/amcc/sequoia/Makefile
+++ b/board/amcc/sequoia/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o sdram.o
+COBJS = $(BOARD).o cmd_sequoia.o sdram.o
SOBJS = init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/board/amcc/sequoia/cmd_sequoia.c b/board/amcc/sequoia/cmd_sequoia.c
new file mode 100644
index 0000000..f3803c0
--- /dev/null
+++ b/board/amcc/sequoia/cmd_sequoia.c
@@ -0,0 +1,220 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+
+/*
+ * There are 2 versions of production Sequoia & Rainier platforms.
+ * The primary difference is the reference clock. Those with
+ * 33333333 reference clocks will also have 667MHz rated
+ * processors. Not enough differences to have unique clock
+ * settings.
+ *
+ * NOR and NAND boot options change bytes 6, 7, 8, 9, 11. The
+ * values are independent of the rest of the clock settings.
+ *
+ * All Sequoias & Rainiers select from two possible EEPROMs in Boot
+ * Config F. One for 33MHz PCI, one for 66MHz PCI. The following
+ * values are for the 33MHz PCI configuration. Byte 5 (0 base) is
+ * the only value affected for a 66MHz PCI and simply needs a +0x10.
+ */
+
+#define NAND_COMPATIBLE 0x01
+#define NOR_COMPATIBLE 0x02
+
+/* check with Stefan on CFG_I2C_EEPROM_ADDR */
+#define I2C_EEPROM_ADDR 0x52
+
+static char *config_labels[] = {
+ "CPU: 333 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 333 PLB: 166 OPB: 83 EBC: 55",
+ "CPU: 400 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 400 PLB: 160 OPB: 80 EBC: 53",
+ "CPU: 416 PLB: 166 OPB: 83 EBC: 55",
+ "CPU: 500 PLB: 166 OPB: 83 EBC: 55",
+ "CPU: 533 PLB: 133 OPB: 66 EBC: 66",
+ "CPU: 667 PLB: 166 OPB: 83 EBC: 55",
+ NULL
+};
+
+static u8 boot_configs[][17] = {
+ {
+ (NOR_COMPATIBLE),
+ 0x84, 0x70, 0xa2, 0xa6, 0x05, 0x57, 0xa0, 0x10, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0xc7, 0x78, 0xf3, 0x4e, 0x05, 0xd7, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NOR_COMPATIBLE),
+ 0x86, 0x78, 0xc2, 0xc6, 0x05, 0x57, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NOR_COMPATIBLE),
+ 0x86, 0x78, 0xc2, 0xa6, 0x05, 0xd7, 0xa0, 0x10, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0xc6, 0x78, 0x52, 0xa6, 0x05, 0xd7, 0xa0, 0x10, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0xc7, 0x78, 0x52, 0xc6, 0x05, 0xd7, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NOR_COMPATIBLE),
+ 0x87, 0x78, 0x82, 0x52, 0x09, 0x57, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ (NAND_COMPATIBLE | NOR_COMPATIBLE),
+ 0x87, 0x78, 0xa2, 0x52, 0x09, 0xd7, 0xa0, 0x30, 0x40,
+ 0x08, 0x23, 0x50, 0x0d, 0x05, 0x00, 0x00
+ },
+ {
+ 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+ }
+};
+
+/*
+ * Bytes 6,8,9,11 change for NAND boot
+ */
+static u8 nand_boot[] = {
+ 0xd0, 0xa0, 0x68, 0x58
+};
+
+static int do_bootstrap(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ u8 *buf, bNAND;
+ int x, y, nbytes, selcfg;
+ extern char console_buffer[];
+
+ if (argc < 2) {
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if ((strcmp(argv[1], "nor") != 0) &&
+ (strcmp(argv[1], "nand") != 0)) {
+ printf("Unsupported boot-device - only nor|nand support\n");
+ return 1;
+ }
+
+ /* set the nand flag based on provided input */
+ if ((strcmp(argv[1], "nand") == 0))
+ bNAND = 1;
+ else
+ bNAND = 0;
+
+ printf("Available configurations: \n\n");
+
+ if (bNAND) {
+ for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
+ /* filter on nand compatible */
+ if (boot_configs[x][0] & NAND_COMPATIBLE) {
+ printf(" %d - %s\n", (y+1), config_labels[x]);
+ y++;
+ }
+ }
+ } else {
+ for(x = 0, y = 0; boot_configs[x][0] != 0; x++) {
+ /* filter on nor compatible */
+ if (boot_configs[x][0] & NOR_COMPATIBLE) {
+ printf(" %d - %s\n", (y+1), config_labels[x]);
+ y++;
+ }
+ }
+ }
+
+ do {
+ nbytes = readline(" Selection [1-x / quit]: ");
+
+ if (nbytes) {
+ if (strcmp(console_buffer, "quit") == 0)
+ return 0;
+ selcfg = simple_strtol(console_buffer, NULL, 10);
+ if ((selcfg < 1) || (selcfg > y))
+ nbytes = 0;
+ }
+ } while (nbytes == 0);
+
+
+ y = (selcfg - 1);
+
+ for (x = 0; boot_configs[x][0] != 0; x++) {
+ if (bNAND) {
+ if (boot_configs[x][0] & NAND_COMPATIBLE) {
+ if (y > 0)
+ y--;
+ else if (y < 1)
+ break;
+ }
+ } else {
+ if (boot_configs[x][0] & NOR_COMPATIBLE) {
+ if (y > 0)
+ y--;
+ else if (y < 1)
+ break;
+ }
+ }
+ }
+
+ buf = &boot_configs[x][1];
+
+ if (bNAND) {
+ buf[6] = nand_boot[0];
+ buf[8] = nand_boot[1];
+ buf[9] = nand_boot[2];
+ buf[11] = nand_boot[3];
+ }
+
+ /* check CPLD register +5 for PCI 66MHz flag */
+ if (in8(CFG_BCSR_BASE + 5) & 0x01)
+ buf[5] += 0x10;
+
+ if (i2c_write(I2C_EEPROM_ADDR, 0, 1, buf, 16) != 0)
+ printf("Error writing to EEPROM at address 0x%x\n", I2C_EEPROM_ADDR);
+ udelay(CFG_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
+
+ printf("Done\n");
+ printf("Please power-cycle the board for the changes to take effect\n");
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ bootstrap, 2, 0, do_bootstrap,
+ "bootstrap - program the I2C bootstrap EEPROM\n",
+ "<nand|nor> - strap to boot from NAND or NOR flash\n"
+ );
diff --git a/board/amcc/sequoia/init.S b/board/amcc/sequoia/init.S
index 45bcd4b..5fe3af9 100644
--- a/board/amcc/sequoia/init.S
+++ b/board/amcc/sequoia/init.S
@@ -126,6 +126,9 @@
/* TLB-entry for peripherals */
tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
+ /* TLB-entry PCI IO Space - from sr@denx.de */
+ tlbentry(0xE8000000, SZ_64K, 0xE8000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
+
tlbtab_end
#if defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
diff --git a/board/amcc/sequoia/sdram.c b/board/amcc/sequoia/sdram.c
index d045df1..78e2cb4 100644
--- a/board/amcc/sequoia/sdram.c
+++ b/board/amcc/sequoia/sdram.c
@@ -387,7 +387,11 @@
long int initdram (int board_type)
{
#if !defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+#if !defined(CONFIG_NAND_SPL)
ulong speed = get_bus_freq(0);
+#else
+ ulong speed = 133333333; /* 133MHz is on the safe side */
+#endif
mtsdram(DDR0_02, 0x00000000);
diff --git a/board/amcc/sequoia/sequoia.c b/board/amcc/sequoia/sequoia.c
index 930fa71..f823117 100644
--- a/board/amcc/sequoia/sequoia.c
+++ b/board/amcc/sequoia/sequoia.c
@@ -25,7 +25,6 @@
#include <common.h>
#include <asm/processor.h>
#include <ppc440.h>
-#include "sequoia.h"
DECLARE_GLOBAL_DATA_PTR;
@@ -226,7 +225,7 @@
if (act == NULL || strcmp(act, "hostdev") == 0) {
/* SDR Setting */
mfsdr(SDR0_PFC1, sdr0_pfc1);
- mfsdr(SDR0_USB0, usb2d0cr);
+ mfsdr(SDR0_USB2D0CR, usb2d0cr);
mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
mfsdr(SDR0_USB2H0CR, usb2h0cr);
@@ -254,7 +253,7 @@
sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/
mtsdr(SDR0_PFC1, sdr0_pfc1);
- mtsdr(SDR0_USB0, usb2d0cr);
+ mtsdr(SDR0_USB2D0CR, usb2d0cr);
mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
mtsdr(SDR0_USB2H0CR, usb2h0cr);
@@ -298,7 +297,7 @@
/* SDR Setting */
mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
mfsdr(SDR0_USB2H0CR, usb2h0cr);
- mfsdr(SDR0_USB0, usb2d0cr);
+ mfsdr(SDR0_USB2D0CR, usb2d0cr);
mfsdr(SDR0_PFC1, sdr0_pfc1);
usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
@@ -323,7 +322,7 @@
mtsdr(SDR0_USB2H0CR, usb2h0cr);
mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
- mtsdr(SDR0_USB0, usb2d0cr);
+ mtsdr(SDR0_USB2D0CR, usb2d0cr);
mtsdr(SDR0_PFC1, sdr0_pfc1);
/*clear resets*/
@@ -363,8 +362,8 @@
printf("Board: Rainier - AMCC PPC440GRx Evaluation Board");
#endif
- rev = *(u8 *)(CFG_BCSR_BASE + 0);
- val = *(u8 *)(CFG_BCSR_BASE + 5) & 0x01;
+ rev = in8(CFG_BCSR_BASE + 0);
+ val = in8(CFG_BCSR_BASE + 5) & 0x01;
printf(", Rev. %X, PCI=%d MHz", rev, val ? 66 : 33);
if (s != NULL) {
@@ -426,23 +425,10 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
-#if 0
- /*--------------------------------------------------------------------------+
- * Cactus is always configured as the host & requires the
- * PCI arbiter to be enabled ???
- *--------------------------------------------------------------------------*/
- unsigned long strap;
- mfsdr(sdr_sdstp1, strap);
- if ((strap & SDR0_SDSTP1_PAE_MASK) == 0) {
- printf("PCI: SDR0_STRP1[PAE] not set.\n");
- printf("PCI: Configuration aborted.\n");
- return 0;
- }
-#endif
/*-------------------------------------------------------------------------+
| Set priority for all PLB3 devices to 0.
@@ -480,7 +466,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -586,3 +572,13 @@
return (1);
}
#endif /* defined(CONFIG_PCI) */
+#if defined(CONFIG_POST)
+/*
+ * Returns 1 if keys pressed to start the power-on long-running tests
+ * Called from board_init_f().
+ */
+int post_hotkeys_pressed(void)
+{
+ return 0; /* No hotkeys supported */
+}
+#endif /* CONFIG_POST */
diff --git a/board/amcc/sequoia/sequoia.h b/board/amcc/sequoia/sequoia.h
deleted file mode 100644
index 1d44b16..0000000
--- a/board/amcc/sequoia/sequoia.h
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * (C) Copyright 2006
- * Stefan Roese, DENX Software Engineering, sr@denx.de.
- *
- * (C) Copyright 2006
- * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
- * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-
-/*----------------------------------------------------------------------------+
- | EBC Configuration Register - EBC0_CFG
- +----------------------------------------------------------------------------*/
-/* External Bus Three-State Control */
-#define EBC0_CFG_EBTC_DRIVEN 0x80000000
-/* Device-Paced Time-out Disable */
-#define EBC0_CFG_PTD_ENABLED 0x00000000
-/* Ready Timeout Count */
-#define EBC0_CFG_RTC_MASK 0x38000000
-#define EBC0_CFG_RTC_16PERCLK 0x00000000
-#define EBC0_CFG_RTC_32PERCLK 0x08000000
-#define EBC0_CFG_RTC_64PERCLK 0x10000000
-#define EBC0_CFG_RTC_128PERCLK 0x18000000
-#define EBC0_CFG_RTC_256PERCLK 0x20000000
-#define EBC0_CFG_RTC_512PERCLK 0x28000000
-#define EBC0_CFG_RTC_1024PERCLK 0x30000000
-#define EBC0_CFG_RTC_2048PERCLK 0x38000000
-/* External Master Priority Low */
-#define EBC0_CFG_EMPL_LOW 0x00000000
-#define EBC0_CFG_EMPL_MEDIUM_LOW 0x02000000
-#define EBC0_CFG_EMPL_MEDIUM_HIGH 0x04000000
-#define EBC0_CFG_EMPL_HIGH 0x06000000
-/* External Master Priority High */
-#define EBC0_CFG_EMPH_LOW 0x00000000
-#define EBC0_CFG_EMPH_MEDIUM_LOW 0x00800000
-#define EBC0_CFG_EMPH_MEDIUM_HIGH 0x01000000
-#define EBC0_CFG_EMPH_HIGH 0x01800000
-/* Chip Select Three-State Control */
-#define EBC0_CFG_CSTC_DRIVEN 0x00400000
-/* Burst Prefetch */
-#define EBC0_CFG_BPF_ONEDW 0x00000000
-#define EBC0_CFG_BPF_TWODW 0x00100000
-#define EBC0_CFG_BPF_FOURDW 0x00200000
-/* External Master Size */
-#define EBC0_CFG_EMS_8BIT 0x00000000
-/* Power Management Enable */
-#define EBC0_CFG_PME_DISABLED 0x00000000
-#define EBC0_CFG_PME_ENABLED 0x00020000
-/* Power Management Timer */
-#define EBC0_CFG_PMT_ENCODE(n) ((((unsigned long)(n))&0x1F)<<12)
-
-#define SDR0_USB0 0x0320 /* USB Control Register */
diff --git a/board/amcc/taihu/Makefile b/board/amcc/taihu/Makefile
new file mode 100644
index 0000000..9731c6e
--- /dev/null
+++ b/board/amcc/taihu/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o flash.o lcd.o update.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/amcc/taihu/config.mk b/board/amcc/taihu/config.mk
new file mode 100644
index 0000000..1bdf5e4
--- /dev/null
+++ b/board/amcc/taihu/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFFC0000
diff --git a/board/amcc/taihu/flash.c b/board/amcc/taihu/flash.c
new file mode 100644
index 0000000..290259e
--- /dev/null
+++ b/board/amcc/taihu/flash.c
@@ -0,0 +1,1083 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+#undef DEBUG
+#ifdef DEBUG
+#define DEBUGF(x...) printf(x)
+#else
+#define DEBUGF(x...)
+#endif /* DEBUG */
+
+#define CFG_FLASH_CHAR_SIZE unsigned char
+#define CFG_FLASH_CHAR_ADDR0 (0x0aaa)
+#define CFG_FLASH_CHAR_ADDR1 (0x0555)
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size(vu_long * addr, flash_info_t * info);
+static void flash_get_offsets(ulong base, flash_info_t * info);
+static int write_word(flash_info_t * info, ulong dest, ulong data);
+#ifdef FLASH_BASE1_PRELIM
+static int write_word_1(flash_info_t * info, ulong dest, ulong data);
+static int write_word_2(flash_info_t * info, ulong dest, ulong data);
+static int flash_erase_1(flash_info_t * info, int s_first, int s_last);
+static int flash_erase_2(flash_info_t * info, int s_first, int s_last);
+static ulong flash_get_size_1(vu_long * addr, flash_info_t * info);
+static ulong flash_get_size_2(vu_long * addr, flash_info_t * info);
+#endif
+
+unsigned long flash_init(void)
+{
+ unsigned long size_b0, size_b1=0;
+ int i;
+
+ /* Init: no FLASHes known */
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
+ flash_info[i].flash_id = FLASH_UNKNOWN;
+ }
+
+ /* Static FLASH Bank configuration here - FIXME XXX */
+
+ size_b0 =
+ flash_get_size((vu_long *) FLASH_BASE0_PRELIM, &flash_info[0]);
+
+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+ printf("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n",
+ size_b0, size_b0 << 20);
+ }
+
+ if (size_b0) {
+ /* Setup offsets */
+ flash_get_offsets(FLASH_BASE0_PRELIM, &flash_info[0]);
+ /* Monitor protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CFG_MONITOR_BASE,
+ CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
+ &flash_info[0]);
+#ifdef CFG_ENV_IS_IN_FLASH
+ (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
+ &flash_info[0]);
+ (void)flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + CFG_ENV_SECT_SIZE - 1,
+ &flash_info[0]);
+#endif
+ /* Also protect sector containing initial power-up instruction */
+ /* (flash_protect() checks address range - other call ignored) */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ 0xFFFFFFFC, 0xFFFFFFFF, &flash_info[0]);
+
+ flash_info[0].size = size_b0;
+ }
+#ifdef FLASH_BASE1_PRELIM
+ size_b1 =
+ flash_get_size((vu_long *) FLASH_BASE1_PRELIM, &flash_info[1])*2;
+
+ if (flash_info[1].flash_id == FLASH_UNKNOWN) {
+ printf("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n",
+ size_b1, size_b1 << 20);
+ }
+
+ if (size_b1) {
+ /* Setup offsets */
+ flash_get_offsets(FLASH_BASE1_PRELIM, &flash_info[1]);
+ flash_info[1].size = size_b1;
+ }
+#endif
+ return (size_b0 + size_b1);
+}
+
+static void flash_get_offsets(ulong base, flash_info_t * info)
+{
+ int i;
+
+ /* set up sector start address table */
+ if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+ (info->flash_id == FLASH_AM040)) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000);
+ } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMLV128U) {
+ for (i = 0; i < info->sector_count; i++) {
+ info->start[i] = base + (i * 0x00010000*2);
+ }
+ } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_S29GL128N ) {
+ for (i = 0; i < info->sector_count; i++) {
+ info->start[i] = base + (i * 0x00020000*2);
+ }
+ } else {
+ if (info->flash_id & FLASH_BTYPE) {
+ /* set sector offsets for bottom boot block type */
+ info->start[0] = base + 0x00000000;
+ info->start[1] = base + 0x00004000;
+ info->start[2] = base + 0x00006000;
+ info->start[3] = base + 0x00008000;
+ for (i = 4; i < info->sector_count; i++) {
+ info->start[i] =
+ base + (i * 0x00010000) - 0x00030000;
+ }
+ } else {
+ /* set sector offsets for top boot block type */
+ i = info->sector_count - 1;
+ info->start[i--] = base + info->size - 0x00004000;
+ info->start[i--] = base + info->size - 0x00006000;
+ info->start[i--] = base + info->size - 0x00008000;
+ for (; i >= 0; i--) {
+ info->start[i] = base + i * 0x00010000;
+ }
+ }
+ }
+}
+
+
+void flash_print_info(flash_info_t * info)
+{
+ int i;
+ int k;
+ int size;
+ int erased;
+ volatile unsigned long *flash;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_AMD:
+ printf("AMD ");
+ break;
+ case FLASH_MAN_STM:
+ printf("STM ");
+ break;
+ case FLASH_MAN_FUJ:
+ printf("FUJITSU ");
+ break;
+ case FLASH_MAN_SST:
+ printf("SST ");
+ break;
+ default:
+ printf("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_AM040:
+ printf("AM29F040 (512 Kbit, uniform sector size)\n");
+ break;
+ case FLASH_AM400B:
+ printf("AM29LV400B (4 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM400T:
+ printf("AM29LV400T (4 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AM800B:
+ printf("AM29LV800B (8 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM800T:
+ printf("AM29LV800T (8 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AMD016:
+ printf("AM29F016D (16 Mbit, uniform sector size)\n");
+ break;
+ case FLASH_AM160B:
+ printf("AM29LV160B (16 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM160T:
+ printf("AM29LV160T (16 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AM320B:
+ printf("AM29LV320B (32 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM320T:
+ printf("AM29LV320T (32 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AM033C:
+ printf("AM29LV033C (32 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AMLV128U:
+ printf("AM29LV128U (128 Mbit * 2, top boot sector)\n");
+ break;
+ case FLASH_SST800A:
+ printf("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+ break;
+ case FLASH_SST160A:
+ printf("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+ break;
+ case FLASH_STMW320DT:
+ printf ("M29W320DT (32 M, top sector)\n");
+ break;
+ case FLASH_S29GL128N:
+ printf ("S29GL128N (256 Mbit, uniform sector size)\n");
+ break;
+ default:
+ printf("Unknown Chip Type\n");
+ break;
+ }
+
+ printf(" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+
+ printf(" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ /*
+ * Check if whole sector is erased
+ */
+ if (i != (info->sector_count - 1))
+ size = info->start[i + 1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned long *)info->start[i];
+ size = size >> 2; /* divide by 4 for longword access */
+ for (k = 0; k < size; k++) {
+ if (*flash++ != 0xffffffff) {
+ erased = 0;
+ break;
+ }
+ }
+
+ if ((i % 5) == 0)
+ printf("\n ");
+ printf(" %08lX%s%s",
+ info->start[i],
+ erased ? " E" : " ", info->protect[i] ? "RO " : " ");
+ }
+ printf("\n");
+ return;
+}
+
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+#ifdef FLASH_BASE1_PRELIM
+static ulong flash_get_size(vu_long * addr, flash_info_t * info)
+{
+ if ((ulong)addr == FLASH_BASE1_PRELIM) {
+ return flash_get_size_2(addr, info);
+ } else {
+ return flash_get_size_1(addr, info);
+ }
+}
+
+static ulong flash_get_size_1(vu_long * addr, flash_info_t * info)
+#else
+static ulong flash_get_size(vu_long * addr, flash_info_t * info)
+#endif
+{
+ short i;
+ CFG_FLASH_WORD_SIZE value;
+ ulong base = (ulong) addr;
+ volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
+
+ DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
+
+ /* Write auto select command: read Manufacturer ID */
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
+ udelay(1000);
+
+ value = addr2[0];
+ DEBUGF("FLASH MANUFACT: %x\n", value);
+
+ switch (value) {
+ case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+ case (CFG_FLASH_WORD_SIZE) FUJ_MANUFACT:
+ info->flash_id = FLASH_MAN_FUJ;
+ break;
+ case (CFG_FLASH_WORD_SIZE) SST_MANUFACT:
+ info->flash_id = FLASH_MAN_SST;
+ break;
+ case (CFG_FLASH_WORD_SIZE) STM_MANUFACT:
+ info->flash_id = FLASH_MAN_STM;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ return 0; /* no or unknown flash */
+ }
+
+ value = addr2[1]; /* device ID */
+ DEBUGF("\nFLASH DEVICEID: %x\n", value);
+
+ switch (value) {
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_F040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+
+ case (CFG_FLASH_WORD_SIZE) STM_ID_M29W040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_F016D:
+ info->flash_id += FLASH_AMD016;
+ info->sector_count = 32;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV033C:
+ info->flash_id += FLASH_AMDLV033C;
+ info->sector_count = 64;
+ info->size = 0x00400000;
+ break; /* => 4 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400T:
+ info->flash_id += FLASH_AM400T;
+ info->sector_count = 11;
+ info->size = 0x00080000;
+ break; /* => 0.5 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV400B:
+ info->flash_id += FLASH_AM400B;
+ info->sector_count = 11;
+ info->size = 0x00080000;
+ break; /* => 0.5 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800T:
+ info->flash_id += FLASH_AM800T;
+ info->sector_count = 19;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV800B:
+ info->flash_id += FLASH_AM800B;
+ info->sector_count = 19;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160T:
+ info->flash_id += FLASH_AM160T;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+
+ case (CFG_FLASH_WORD_SIZE) AMD_ID_LV160B:
+ info->flash_id += FLASH_AM160B;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ return 0; /* => no or unknown flash */
+ }
+
+ /* set up sector start address table */
+ if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000);
+ }
+ else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMLV128U) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000 * 2);
+ } else {
+ if (info->flash_id & FLASH_BTYPE) {
+ /* set sector offsets for bottom boot block type */
+ info->start[0] = base + 0x00000000;
+ info->start[1] = base + 0x00004000;
+ info->start[2] = base + 0x00006000;
+ info->start[3] = base + 0x00008000;
+ for (i = 4; i < info->sector_count; i++) {
+ info->start[i] =
+ base + (i * 0x00010000) - 0x00030000;
+ }
+ } else {
+ /* set sector offsets for top boot block type */
+ i = info->sector_count - 1;
+ info->start[i--] = base + info->size - 0x00004000;
+ info->start[i--] = base + info->size - 0x00006000;
+ info->start[i--] = base + info->size - 0x00008000;
+ for (; i >= 0; i--) {
+ info->start[i] = base + i * 0x00010000;
+ }
+ }
+ }
+
+ /* check for protected sectors */
+ for (i = 0; i < info->sector_count; i++) {
+ /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+ /* D0 = 1 if protected */
+ addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
+
+ /* For AMD29033C flash we need to resend the command of *
+ * reading flash protection for upper 8 Mb of flash */
+ if (i == 32) {
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+ info->protect[i] = 0;
+ else
+ info->protect[i] = addr2[2] & 1;
+ }
+
+ /* issue bank reset to return to read mode */
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
+
+ return info->size;
+}
+
+static int wait_for_DQ7_1(flash_info_t * info, int sect)
+{
+ ulong start, now, last;
+ volatile CFG_FLASH_WORD_SIZE *addr =
+ (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
+
+ start = get_timer(0);
+ last = start;
+ while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
+ (CFG_FLASH_WORD_SIZE) 0x00800080) {
+ if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ printf("Timeout\n");
+ return -1;
+ }
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc('.');
+ last = now;
+ }
+ }
+ return 0;
+}
+
+#ifdef FLASH_BASE1_PRELIM
+int flash_erase(flash_info_t * info, int s_first, int s_last)
+{
+ if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMLV128U) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_S29GL128N) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
+ return flash_erase_2(info, s_first, s_last);
+ } else {
+ return flash_erase_1(info, s_first, s_last);
+ }
+}
+
+static int flash_erase_1(flash_info_t * info, int s_first, int s_last)
+#else
+int flash_erase(flash_info_t * info, int s_first, int s_last)
+#endif
+{
+ volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *addr2;
+ int flag, prot, sect, l_sect;
+ int i;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("- missing\n");
+ } else {
+ printf("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("Can't erase unknown flash type - aborted\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf("\n");
+ }
+
+ l_sect = -1;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00500050; /* block erase */
+ for (i = 0; i < 50; i++)
+ udelay(1000); /* wait 1 ms */
+ } else {
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
+ }
+ l_sect = sect;
+ /*
+ * Wait for each sector to complete, it's more
+ * reliable. According to AMD Spec, you must
+ * issue all erase commands within a specified
+ * timeout. This has been seen to fail, especially
+ * if printf()s are included (for debug)!!
+ */
+ wait_for_DQ7_1(info, sect);
+ }
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay(1000);
+
+ /* reset to read mode */
+ addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
+ addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+
+ printf(" done\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong cp, wp, data;
+ int i, l, rc;
+
+ wp = (addr & ~3); /* get lower word aligned address */
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+ for (; i < 4 && cnt > 0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt == 0 && i < 4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ if ((rc = write_word(info, wp, data)) != 0) {
+ return rc;
+ }
+ wp += 4;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= 4) {
+ data = 0;
+ for (i = 0; i < 4; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_word(info, wp, data)) != 0) {
+ return rc;
+ }
+ wp += 4;
+ cnt -= 4;
+ }
+
+ if (cnt == 0) {
+ return 0;
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i < 4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ return (write_word(info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+#ifdef FLASH_BASE1_PRELIM
+static int write_word(flash_info_t * info, ulong dest, ulong data)
+{
+ if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMLV128U) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_S29GL128N) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_STMW320DT)) {
+ return write_word_2(info, dest, data);
+ } else {
+ return write_word_1(info, dest, data);
+ }
+}
+
+static int write_word_1(flash_info_t * info, ulong dest, ulong data)
+#else
+static int write_word(flash_info_t * info, ulong dest, ulong data)
+#endif
+{
+ volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
+ volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
+ ulong start;
+ int i;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*((vu_long *)dest) & data) != data) {
+ return 2;
+ }
+
+ for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
+ int flag;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
+
+ dest2[i] = data2[i];
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* data polling for D7 */
+ start = get_timer(0);
+ while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
+ (data2[i] & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
+
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ return 1;
+ }
+ }
+ }
+
+ return 0;
+}
+
+#ifdef FLASH_BASE1_PRELIM
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size_2(vu_long * addr, flash_info_t * info)
+{
+ short i;
+ CFG_FLASH_CHAR_SIZE value;
+ ulong base = (ulong) addr;
+ volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
+
+ DEBUGF("FLASH ADDR: %08x\n", (unsigned)addr);
+
+ /* Write auto select command: read Manufacturer ID */
+ addr2[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr2[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr2[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
+ udelay(1000);
+
+ value = (CFG_FLASH_CHAR_SIZE)addr2[0];
+ DEBUGF("FLASH MANUFACT: %x\n", value);
+
+ switch (value) {
+ case (CFG_FLASH_CHAR_SIZE) AMD_MANUFACT:
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+ case (CFG_FLASH_CHAR_SIZE) FUJ_MANUFACT:
+ info->flash_id = FLASH_MAN_FUJ;
+ break;
+ case (CFG_FLASH_CHAR_SIZE) SST_MANUFACT:
+ info->flash_id = FLASH_MAN_SST;
+ break;
+ case (CFG_FLASH_CHAR_SIZE) STM_MANUFACT:
+ info->flash_id = FLASH_MAN_STM;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ return 0; /* no or unknown flash */
+ }
+
+ value = (CFG_FLASH_CHAR_SIZE)addr2[2]; /* device ID */
+ DEBUGF("\nFLASH DEVICEID: %x\n", value);
+
+ switch (value) {
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_F040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+
+ case (CFG_FLASH_CHAR_SIZE) STM_ID_M29W040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_F016D:
+ info->flash_id += FLASH_AMD016;
+ info->sector_count = 32;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV033C:
+ info->flash_id += FLASH_AMDLV033C;
+ info->sector_count = 64;
+ info->size = 0x00400000;
+ break; /* => 4 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV400T:
+ info->flash_id += FLASH_AM400T;
+ info->sector_count = 11;
+ info->size = 0x00080000;
+ break; /* => 0.5 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV400B:
+ info->flash_id += FLASH_AM400B;
+ info->sector_count = 11;
+ info->size = 0x00080000;
+ break; /* => 0.5 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV800T:
+ info->flash_id += FLASH_AM800T;
+ info->sector_count = 19;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV800B:
+ info->flash_id += FLASH_AM800B;
+ info->sector_count = 19;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV160T:
+ info->flash_id += FLASH_AM160T;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_LV160B:
+ info->flash_id += FLASH_AM160B;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+ case (CFG_FLASH_CHAR_SIZE) AMD_ID_MIRROR:
+ if ((CFG_FLASH_CHAR_SIZE)addr2[0x1c] == (CFG_FLASH_CHAR_SIZE)AMD_ID_LV128U_2
+ && (CFG_FLASH_CHAR_SIZE)addr2[0x1e] == (CFG_FLASH_CHAR_SIZE)AMD_ID_LV128U_3) {
+ info->flash_id += FLASH_AMLV128U;
+ info->sector_count = 256;
+ info->size = 0x01000000;
+ } else if ((CFG_FLASH_CHAR_SIZE)addr2[0x1c] == (CFG_FLASH_CHAR_SIZE)AMD_ID_GL128N_2
+ && (CFG_FLASH_CHAR_SIZE)addr2[0x1e] == (CFG_FLASH_CHAR_SIZE)AMD_ID_GL128N_3 ) {
+ info->flash_id += FLASH_S29GL128N;
+ info->sector_count = 128;
+ info->size = 0x01000000;
+ }
+ else
+ info->flash_id = FLASH_UNKNOWN;
+ break; /* => 2 MB */
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ return 0; /* => no or unknown flash */
+ }
+
+ /* set up sector start address table */
+ if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) ||
+ ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMD016)) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000);
+ } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMLV128U) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000);
+ } else if ((info->flash_id & FLASH_TYPEMASK) == FLASH_S29GL128N ) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00020000);
+ } else {
+ if (info->flash_id & FLASH_BTYPE) {
+ /* set sector offsets for bottom boot block type */
+ info->start[0] = base + 0x00000000;
+ info->start[1] = base + 0x00004000;
+ info->start[2] = base + 0x00006000;
+ info->start[3] = base + 0x00008000;
+ for (i = 4; i < info->sector_count; i++) {
+ info->start[i] =
+ base + (i * 0x00010000) - 0x00030000;
+ }
+ } else {
+ /* set sector offsets for top boot block type */
+ i = info->sector_count - 1;
+ info->start[i--] = base + info->size - 0x00004000;
+ info->start[i--] = base + info->size - 0x00006000;
+ info->start[i--] = base + info->size - 0x00008000;
+ for (; i >= 0; i--) {
+ info->start[i] = base + i * 0x00010000;
+ }
+ }
+ }
+
+ /* check for protected sectors */
+ for (i = 0; i < info->sector_count; i++) {
+ /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+ /* D0 = 1 if protected */
+ addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
+
+ /* For AMD29033C flash we need to resend the command of *
+ * reading flash protection for upper 8 Mb of flash */
+ if (i == 32) {
+ addr2[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr2[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr2[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x90909090;
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+ info->protect[i] = 0;
+ else
+ info->protect[i] = (CFG_FLASH_CHAR_SIZE)addr2[4] & 1;
+ }
+
+ /* issue bank reset to return to read mode */
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0xF0F0F0F0;
+ return info->size;
+}
+
+static int wait_for_DQ7_2(flash_info_t * info, int sect)
+{
+ ulong start, now, last;
+ volatile CFG_FLASH_WORD_SIZE *addr =
+ (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
+
+ start = get_timer(0);
+ last = start;
+ while (((CFG_FLASH_WORD_SIZE)addr[0] & (CFG_FLASH_WORD_SIZE) 0x80808080) !=
+ (CFG_FLASH_WORD_SIZE) 0x80808080) {
+ if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ printf("Timeout\n");
+ return -1;
+ }
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc('.');
+ last = now;
+ }
+ }
+ return 0;
+}
+
+static int flash_erase_2(flash_info_t * info, int s_first, int s_last)
+{
+ volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *addr2;
+ int flag, prot, sect, l_sect;
+ int i;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("- missing\n");
+ } else {
+ printf("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("Can't erase unknown flash type - aborted\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ } else {
+ printf("\n");
+ }
+
+ l_sect = -1;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) {
+ addr[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x80808080;
+ addr[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x50505050; /* block erase */
+ for (i = 0; i < 50; i++)
+ udelay(1000); /* wait 1 ms */
+ } else {
+ addr[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x80808080;
+ addr[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x30303030; /* sector erase */
+ }
+ l_sect = sect;
+ /*
+ * Wait for each sector to complete, it's more
+ * reliable. According to AMD Spec, you must
+ * issue all erase commands within a specified
+ * timeout. This has been seen to fail, especially
+ * if printf()s are included (for debug)!!
+ */
+ wait_for_DQ7_2(info, sect);
+ }
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay(1000);
+
+ /* reset to read mode */
+ addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
+ addr[0] = (CFG_FLASH_WORD_SIZE) 0xF0F0F0F0; /* reset bank */
+
+ printf(" done\n");
+ return 0;
+}
+
+static int write_word_2(flash_info_t * info, ulong dest, ulong data)
+{
+ volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
+ volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) & data;
+ ulong start;
+ int i;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*((vu_long *)dest) & data) != data) {
+ return 2;
+ }
+
+ for (i = 0; i < 4 / sizeof(CFG_FLASH_WORD_SIZE); i++) {
+ int flag;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ addr2[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xAAAAAAAA;
+ addr2[CFG_FLASH_CHAR_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x55555555;
+ addr2[CFG_FLASH_CHAR_ADDR0] = (CFG_FLASH_WORD_SIZE) 0xA0A0A0A0;
+
+ dest2[i] = data2[i];
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* data polling for D7 */
+ start = get_timer(0);
+ while ((dest2[i] & (CFG_FLASH_WORD_SIZE) 0x80808080) !=
+ (data2[i] & (CFG_FLASH_WORD_SIZE) 0x80808080)) {
+
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ return 1;
+ }
+ }
+ }
+
+ return 0;
+}
+
+#endif /* FLASH_BASE1_PRELIM */
diff --git a/board/amcc/taihu/lcd.c b/board/amcc/taihu/lcd.c
new file mode 100644
index 0000000..3d042df
--- /dev/null
+++ b/board/amcc/taihu/lcd.c
@@ -0,0 +1,257 @@
+/*
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#define LCD_CMD_ADDR 0x50100002
+#define LCD_DATA_ADDR 0x50100003
+#define LCD_BLK_CTRL CPLD_REG1_ADDR
+
+static char *amcc_logo = "AMCC 405EP TAIHU EVALUATION KIT";
+static int addr_flag = 0x80;
+
+static void lcd_bl_ctrl(char val)
+{
+ out_8((u8 *) LCD_BLK_CTRL, in_8((u8 *) LCD_BLK_CTRL) | val);
+}
+
+static void lcd_putc(int val)
+{
+ int i = 100;
+ char addr;
+
+ while (i--) {
+ if ((in_8((u8 *) LCD_CMD_ADDR) & 0x80) != 0x80) { /*BF = 1 ?*/
+ udelay(50);
+ break;
+ }
+ udelay(50);
+ }
+
+ if (in_8((u8 *) LCD_CMD_ADDR) & 0x80) {
+ printf("LCD is busy\n");
+ return;
+ }
+
+ addr = in_8((u8 *) LCD_CMD_ADDR);
+ udelay(50);
+ if ((addr != 0) && (addr % 0x10 == 0)) {
+ addr_flag ^= 0x40;
+ out_8((u8 *) LCD_CMD_ADDR, addr_flag);
+ }
+
+ udelay(50);
+ out_8((u8 *) LCD_DATA_ADDR, val);
+ udelay(50);
+}
+
+static void lcd_puts(char *s)
+{
+ char *p = s;
+ int i = 100;
+
+ while (i--) {
+ if ((in_8((u8 *) LCD_CMD_ADDR) & 0x80) != 0x80) { /*BF = 1 ?*/
+ udelay(50);
+ break;
+ }
+ udelay(50);
+ }
+
+ if (in_8((u8 *) LCD_CMD_ADDR) & 0x80) {
+ printf("LCD is busy\n");
+ return;
+ }
+
+ while (*p)
+ lcd_putc(*p++);
+}
+
+static void lcd_put_logo(void)
+{
+ int i = 100;
+ char *p = amcc_logo;
+
+ while (i--) {
+ if ((in_8((u8 *) LCD_CMD_ADDR) & 0x80) != 0x80) { /*BF = 1 ?*/
+ udelay(50);
+ break;
+ }
+ udelay(50);
+ }
+
+ if (in_8((u8 *) LCD_CMD_ADDR) & 0x80) {
+ printf("LCD is busy\n");
+ return;
+ }
+
+ out_8((u8 *) LCD_CMD_ADDR, 0x80);
+ while (*p)
+ lcd_putc(*p++);
+}
+
+int lcd_init(void)
+{
+ puts("LCD: ");
+ out_8((u8 *) LCD_CMD_ADDR, 0x38); /* set function:8-bit,2-line,5x7 font type */
+ udelay(50);
+ out_8((u8 *) LCD_CMD_ADDR, 0x0f); /* set display on,cursor on,blink on */
+ udelay(50);
+ out_8((u8 *) LCD_CMD_ADDR, 0x01); /* display clear */
+ udelay(2000);
+ out_8((u8 *) LCD_CMD_ADDR, 0x06); /* set entry */
+ udelay(50);
+ lcd_bl_ctrl(0x02); /* set backlight on */
+ lcd_put_logo();
+ puts("ready\n");
+
+ return 0;
+}
+
+static int do_lcd_clear (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ out_8((u8 *) LCD_CMD_ADDR, 0x01);
+ udelay(2000);
+
+ return 0;
+}
+
+static int do_lcd_puts (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ if (argc < 2) {
+ printf("%s", cmdtp->usage);
+ return 1;
+ }
+ lcd_puts(argv[1]);
+
+ return 0;
+}
+
+static int do_lcd_putc (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ if (argc < 2) {
+ printf("%s", cmdtp->usage);
+ return 1;
+ }
+ lcd_putc((char)argv[1][0]);
+
+ return 0;
+}
+
+static int do_lcd_cur (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ ulong count;
+ ulong dir;
+ char cur_addr;
+
+ if (argc < 3) {
+ printf("%s", cmdtp->usage);
+ return 1;
+ }
+
+ count = simple_strtoul(argv[1], NULL, 16);
+ if (count > 31) {
+ printf("unable to shift > 0x20\n");
+ count = 0;
+ }
+
+ dir = simple_strtoul(argv[2], NULL, 16);
+ cur_addr = in_8((u8 *) LCD_CMD_ADDR);
+ udelay(50);
+
+ if (dir == 0x0) {
+ if (addr_flag == 0x80) {
+ if (count >= (cur_addr & 0xf)) {
+ out_8((u8 *) LCD_CMD_ADDR, 0x80);
+ udelay(50);
+ count = 0;
+ }
+ } else {
+ if (count >= ((cur_addr & 0x0f) + 0x0f)) {
+ out_8((u8 *) LCD_CMD_ADDR, 0x80);
+ addr_flag = 0x80;
+ udelay(50);
+ count = 0x0;
+ } else if (count >= ( cur_addr & 0xf)) {
+ count -= cur_addr & 0xf ;
+ out_8((u8 *) LCD_CMD_ADDR, 0x80 | 0xf);
+ addr_flag = 0x80;
+ udelay(50);
+ }
+ }
+ } else {
+ if (addr_flag == 0x80) {
+ if (count >= (0x1f - (cur_addr & 0xf))) {
+ count = 0x0;
+ addr_flag = 0xc0;
+ out_8((u8 *) LCD_CMD_ADDR, 0xc0 | 0xf);
+ udelay(50);
+ } else if ((count + (cur_addr & 0xf ))>= 0x0f) {
+ count = count + (cur_addr & 0xf) - 0x0f;
+ addr_flag = 0xc0;
+ out_8((u8 *) LCD_CMD_ADDR, 0xc0);
+ udelay(50);
+ }
+ } else if ((count + (cur_addr & 0xf )) >= 0x0f) {
+ count = 0x0;
+ out_8((u8 *) LCD_CMD_ADDR, 0xC0 | 0x0F);
+ udelay(50);
+ }
+ }
+ while (count--) {
+ if (dir == 0)
+ out_8((u8 *) LCD_CMD_ADDR, 0x10);
+ else
+ out_8((u8 *) LCD_CMD_ADDR, 0x14);
+ udelay(50);
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ lcd_cls, 1, 1, do_lcd_clear,
+ "lcd_cls - lcd clear display\n",
+ NULL
+ );
+
+U_BOOT_CMD(
+ lcd_puts, 2, 1, do_lcd_puts,
+ "lcd_puts - display string on lcd\n",
+ "<string> - <string> to be displayed\n"
+ );
+
+U_BOOT_CMD(
+ lcd_putc, 2, 1, do_lcd_putc,
+ "lcd_putc - display char on lcd\n",
+ "<char> - <char> to be displayed\n"
+ );
+
+U_BOOT_CMD(
+ lcd_cur, 3, 1, do_lcd_cur,
+ "lcd_cur - shift cursor on lcd\n",
+ "<count> <dir> - shift cursor on lcd <count> times, direction is <dir> \n"
+ " <count> - 0..31\n"
+ " <dir> - 0=backward 1=forward\n"
+ );
diff --git a/board/amcc/taihu/taihu.c b/board/amcc/taihu/taihu.c
new file mode 100644
index 0000000..ea83671
--- /dev/null
+++ b/board/amcc/taihu/taihu.c
@@ -0,0 +1,240 @@
+/*
+ * (C) Copyright 2000-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2005-2007
+ * Beijing UD Technology Co., Ltd., taihusupport@amcc.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <command.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <spi.h>
+#include <asm/gpio.h>
+
+extern int lcd_init(void);
+
+/*
+ * board_early_init_f
+ */
+int board_early_init_f(void)
+{
+ lcd_init();
+
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uicer, 0x00000000); /* disable all ints */
+ mtdcr(uiccr, 0x00000000);
+ mtdcr(uicpr, 0xFFFF7F00); /* set int polarities */
+ mtdcr(uictr, 0x00000000); /* set int trigger levels */
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
+
+ mtebc(pb3ap, CFG_EBC_PB3AP); /* memory bank 3 (CPLD_LCM) initialization */
+ mtebc(pb3cr, CFG_EBC_PB3CR);
+
+ /*
+ * Configure CPC0_PCI to enable PerWE as output
+ * and enable the internal PCI arbiter
+ */
+ mtdcr(cpc0_pci, CPC0_PCI_SPE | CPC0_PCI_HOST_CFG_EN | CPC0_PCI_ARBIT_EN);
+
+ return 0;
+}
+
+/*
+ * Check Board Identity:
+ */
+int checkboard(void)
+{
+ char *s = getenv("serial#");
+
+ puts("Board: Taihu - AMCC PPC405EP Evaluation Board");
+
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ return 0;
+}
+
+/*************************************************************************
+ * long int initdram
+ *
+ ************************************************************************/
+long int initdram(int board)
+{
+ return CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS; /* 128Mbytes */
+}
+
+static int do_sw_stat(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
+{
+ char stat;
+ int i;
+
+ stat = in_8((u8 *) CPLD_REG0_ADDR);
+ printf("SW2 status: ");
+ for (i=0; i<4; i++) /* 4-position */
+ printf("%d:%s ", i, stat & (0x08 >> i)?"on":"off");
+ printf("\n");
+ return 0;
+}
+
+U_BOOT_CMD (
+ sw2_stat, 1, 1, do_sw_stat,
+ "sw2_stat - show status of switch 2\n",
+ NULL
+ );
+
+static int do_led_ctl(cmd_tbl_t* cmd_tp, int flags, int argc, char *argv[])
+{
+ int led_no;
+
+ if (argc != 3) {
+ printf("%s", cmd_tp->usage);
+ return -1;
+ }
+
+ led_no = simple_strtoul(argv[1], NULL, 16);
+ if (led_no != 1 && led_no != 2) {
+ printf("%s", cmd_tp->usage);
+ return -1;
+ }
+
+ if (strcmp(argv[2],"off") == 0x0) {
+ if (led_no == 1)
+ gpio_write_bit(30, 1);
+ else
+ gpio_write_bit(31, 1);
+ } else if (strcmp(argv[2],"on") == 0x0) {
+ if (led_no == 1)
+ gpio_write_bit(30, 0);
+ else
+ gpio_write_bit(31, 0);
+ } else {
+ printf("%s", cmd_tp->usage);
+ return -1;
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD (
+ led_ctl, 3, 1, do_led_ctl,
+ "led_ctl - make led 1 or 2 on or off\n",
+ "<led_no> <on/off> - make led <led_no> on/off,\n"
+ "\tled_no is 1 or 2\t"
+ );
+
+#define SPI_CS_GPIO0 0
+#define SPI_SCLK_GPIO14 14
+#define SPI_DIN_GPIO15 15
+#define SPI_DOUT_GPIO16 16
+
+void spi_scl(int bit)
+{
+ gpio_write_bit(SPI_SCLK_GPIO14, bit);
+}
+
+void spi_sda(int bit)
+{
+ gpio_write_bit(SPI_DOUT_GPIO16, bit);
+}
+
+unsigned char spi_read(void)
+{
+ return (unsigned char)gpio_read_out_bit(SPI_DIN_GPIO15);
+}
+
+void taihu_spi_chipsel(int cs)
+{
+ gpio_write_bit(SPI_CS_GPIO0, cs);
+}
+
+spi_chipsel_type spi_chipsel[]= {
+ taihu_spi_chipsel
+};
+
+int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
+
+#ifdef CONFIG_PCI
+static unsigned char int_lines[32] = {
+ 29, 30, 27, 28, 29, 30, 25, 27,
+ 29, 30, 27, 28, 29, 30, 27, 28,
+ 29, 30, 27, 28, 29, 30, 27, 28,
+ 29, 30, 27, 28, 29, 30, 27, 28};
+
+static void taihu_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+ unsigned char int_line = int_lines[PCI_DEV(dev) & 31];
+
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
+}
+
+int pci_pre_init(struct pci_controller *hose)
+{
+ hose->fixup_irq = taihu_pci_fixup_irq;
+ return 1;
+}
+#endif /* CONFIG_PCI */
+
+#ifdef CFG_DRAM_TEST
+int testdram(void)
+{
+ unsigned long *mem = (unsigned long *)0;
+ const unsigned long kend = (1024 / sizeof(unsigned long));
+ unsigned long k, n;
+ unsigned long msr;
+ unsigned long total_kbytes = CFG_SDRAM_SIZE_PER_BANK * CFG_SDRAM_BANKS / 1024;
+
+ msr = mfmsr();
+ mtmsr(msr & ~(MSR_EE));
+
+ for (k = 0; k < total_kbytes ;
+ ++k, mem += (1024 / sizeof(unsigned long))) {
+ if ((k & 1023) == 0)
+ printf("%3d MB\r", k / 1024);
+
+ memset(mem, 0xaaaaaaaa, 1024);
+ for (n = 0; n < kend; ++n) {
+ if (mem[n] != 0xaaaaaaaa) {
+ printf("SDRAM test fails at: %08x\n",
+ (uint) & mem[n]);
+ return 1;
+ }
+ }
+
+ memset(mem, 0x55555555, 1024);
+ for (n = 0; n < kend; ++n) {
+ if (mem[n] != 0x55555555) {
+ printf("SDRAM test fails at: %08x\n",
+ (uint) & mem[n]);
+ return 1;
+ }
+ }
+ }
+ printf("SDRAM test passes\n");
+ mtmsr(msr);
+
+ return 0;
+}
+#endif /* CFG_DRAM_TEST */
diff --git a/board/amcc/taihu/u-boot.lds b/board/amcc/taihu/u-boot.lds
new file mode 100644
index 0000000..be03092
--- /dev/null
+++ b/board/amcc/taihu/u-boot.lds
@@ -0,0 +1,150 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ .resetvec 0xFFFFFFFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/ppc4xx/start.o (.text)
+ cpu/ppc4xx/kgdb.o (.text)
+ cpu/ppc4xx/traps.o (.text)
+ cpu/ppc4xx/interrupts.o (.text)
+ cpu/ppc4xx/serial.o (.text)
+ cpu/ppc4xx/cpu_init.o (.text)
+ cpu/ppc4xx/speed.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/crc32.o (.text)
+ lib_ppc/extable.o (.text)
+ lib_generic/zlib.o (.text)
+
+/* . = env_offset;*/
+/* common/environment.o(.text)*/
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/amcc/taihu/update.c b/board/amcc/taihu/update.c
new file mode 100644
index 0000000..55ad535
--- /dev/null
+++ b/board/amcc/taihu/update.c
@@ -0,0 +1,132 @@
+/*
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+#include <asm/processor.h>
+#include <i2c.h>
+
+#define PCI_M66EN 0x10
+
+static uchar buf_33[] =
+{
+ 0xb5, /* 0x00:hce =1, bss = 0, pae=1, ppdv= 0b10,spe = 1,ebw=0b01*/
+ 0x80, /* 0x01~0x03:ptm1ms =0x80000001 */
+ 0x00,
+ 0x00,
+ 0x00, /* 0x04~0x06:ptm1la = 0x00000000 */
+ 0x00,
+ 0x00,
+ 0x00, /* 0x07~0x09:ptm2ma = 0x00000000 */
+ 0x00,
+ 0x00,
+ 0x00, /* 0x0a~0x0c:ptm2la = 0x00000000 */
+ 0x00,
+ 0x00,
+ 0x10, /* 0x0d~0x0e:vendor id 0x1014*/
+ 0x14,
+ 0x00, /* 0x0f~0x10:device id 0x0000*/
+ 0x00,
+ 0x00, /* 0x11:revision 0x00 */
+ 0x00, /* 0x12~0x14:class 0x000000 */
+ 0x00,
+ 0x00,
+ 0x10, /* 0x15~0x16:subsystem vendor id */
+ 0xe8,
+ 0x00, /* 0x17~0x18:subsystem device id */
+ 0x00,
+ 0x61, /* 0x19: opdv=0b01,cbdv=0b10,ccdv=0b00,ptm2ms_ena=0, ptm1ms_ena=1 */
+ 0x68, /* 0x1a: rpci=1,fbmul=0b1010,epdv=0b00 */
+ 0x2d, /* 0x1b: fwdvb=0b101,fwdva=0b101 */
+ 0x82, /* 0x1c: pllr=1,sscs=0,mpdv=0b00,tun[22-23]=0b10 */
+ 0xbe, /* 0x1d: tun[24-31]=0xbe */
+ 0x00,
+ 0x00
+};
+
+static uchar buf_66[] =
+{
+ 0xb5, /* 0x00:hce =1, bss = 0, pae=1, ppdv= 0b10,spe = 1,ebw=0b01*/
+ 0x80, /* 0x01~0x03:ptm1ms =0x80000001 */
+ 0x00,
+ 0x00,
+ 0x00, /* 0x04~0x06:ptm1la = 0x00000000 */
+ 0x00,
+ 0x00,
+ 0x00, /* 0x07~0x09:ptm2ma = 0x00000000 */
+ 0x00,
+ 0x00,
+ 0x00, /* 0x0a~0x0c:ptm2la = 0x00000000 */
+ 0x00,
+ 0x00,
+ 0x10, /* 0x0d~0x0e:vendor id 0x1014*/
+ 0x14,
+ 0x00, /* 0x0f~0x10:device id 0x0000*/
+ 0x00,
+ 0x00, /* 0x11:revision 0x00 */
+ 0x00, /* 0x12~0x14:class 0x000000 */
+ 0x00,
+ 0x00,
+ 0x10, /* 0x15~0x16:subsystem vendor id */
+ 0xe8,
+ 0x00, /* 0x17~0x18:subsystem device id */
+ 0x00,
+ 0x61, /* 0x19: opdv=0b01,cbdv=0b10,ccdv=0b00,ptm2ms_ena=0, ptm1ms_ena=1 */
+ 0x68, /* 0x1a: rpci=1,fbmul=0b1010,epdv=0b00 */
+ 0x2d, /* 0x1b: fwdvb=0b101,fwdva=0b101 */
+ 0x82, /* 0x1c: pllr=1,sscs=0,mpdv=0b00,tun[22-23]=0b10 */
+ 0xbe, /* 0x1d: tun[24-31]=0xbe */
+ 0x00,
+ 0x00
+};
+
+static int update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char *argv[])
+{
+ ulong len = 0x20;
+ uchar chip = CFG_I2C_EEPROM_ADDR;
+ uchar *pbuf;
+ uchar base;
+ int i;
+
+ if ((*(volatile char*)CPLD_REG0_ADDR & PCI_M66EN) != PCI_M66EN) {
+ pbuf = buf_33;
+ base = 0x00;
+ } else {
+ pbuf = buf_66;
+ base = 0x40;
+ }
+
+ for (i = 0; i< len; i++, base++) {
+ if (i2c_write(chip, base, 1, &pbuf[i],1)!= 0) {
+ printf("i2c_write fail\n");
+ return 1;
+ }
+ udelay(11000);
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD (
+ update_boot_eeprom, 1, 1, update_boot_eeprom,
+ "update_boot_eeprom - update boot eeprom content\n",
+ NULL
+ );
diff --git a/board/amcc/taishan/taishan.c b/board/amcc/taishan/taishan.c
index 1a2e53b..f00397e 100644
--- a/board/amcc/taishan/taishan.c
+++ b/board/amcc/taishan/taishan.c
@@ -32,6 +32,8 @@
void show_reset_reg(void);
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
int lcd_init(void);
int board_early_init_f (void)
@@ -236,7 +238,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -253,7 +255,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -266,8 +268,6 @@
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*--------------------------------------------------------------------------+
* Disable everything
*--------------------------------------------------------------------------*/
diff --git a/board/amcc/yosemite/yosemite.c b/board/amcc/yosemite/yosemite.c
index c2e12ba..912f09e 100644
--- a/board/amcc/yosemite/yosemite.c
+++ b/board/amcc/yosemite/yosemite.c
@@ -385,7 +385,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
@@ -426,7 +426,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/amcc/yucca/init.S b/board/amcc/yucca/init.S
index c92dcf7..67e8f8f 100644
--- a/board/amcc/yucca/init.S
+++ b/board/amcc/yucca/init.S
@@ -70,9 +70,9 @@
tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE_BASE, SZ_16K, 0x20000000, 0xC, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x40000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x80000000, 0xC, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0xC0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x50000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x90000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0xD0000000, 0xC, AC_R|AC_W|SA_G|SA_I)
@@ -112,9 +112,9 @@
tlbentry(CFG_PCI_MEMBASE, SZ_256M, 0x10000000, 0xC, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE_MEMBASE, SZ_256M, 0xB0000000, 0xD, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE0_CFGBASE, SZ_1K, 0x00100000, 0xD, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE1_CFGBASE, SZ_1K, 0x20100000, 0xD, AC_R|AC_W|SA_G|SA_I)
- tlbentry(CFG_PCIE2_CFGBASE, SZ_1K, 0x40100000, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE0_CFGBASE, SZ_16M, 0x00000000, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE1_CFGBASE, SZ_16M, 0x20000000, 0xD, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCIE2_CFGBASE, SZ_16M, 0x40000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE0_XCFGBASE, SZ_1K, 0x10000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE1_XCFGBASE, SZ_1K, 0x30000000, 0xD, AC_R|AC_W|SA_G|SA_I)
tlbentry(CFG_PCIE2_XCFGBASE, SZ_1K, 0x50000000, 0xD, AC_R|AC_W|SA_G|SA_I)
diff --git a/board/amcc/yucca/yucca.c b/board/amcc/yucca/yucca.c
index 90eaab1..d7cc384 100644
--- a/board/amcc/yucca/yucca.c
+++ b/board/amcc/yucca/yucca.c
@@ -34,6 +34,8 @@
#include "yucca.h"
#include "../cpu/ppc4xx/440spe_pcie.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#undef PCIE_ENDPOINT
/* #define PCIE_ENDPOINT 1 */
@@ -562,6 +564,40 @@
return 0;
}
+/*
+ * Override the default functions in cpu/ppc4xx/44x_spd_ddr2.c with
+ * board specific values.
+ */
+static int ppc440spe_rev_a(void)
+{
+ if ((get_pvr() == PVR_440SPe_6_RA) || (get_pvr() == PVR_440SPe_RA))
+ return 1;
+ else
+ return 0;
+}
+
+u32 ddr_wrdtr(u32 default_val) {
+ /*
+ * Yucca boards with 440SPe rev. A need a slightly different setup
+ * for the MCIF0_WRDTR register.
+ */
+ if (ppc440spe_rev_a())
+ return (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_270_DEG_ADV);
+
+ return default_val;
+}
+
+u32 ddr_clktr(u32 default_val) {
+ /*
+ * Yucca boards with 440SPe rev. A need a slightly different setup
+ * for the MCIF0_CLKTR register.
+ */
+ if (ppc440spe_rev_a())
+ return (SDRAM_CLKTR_CLKP_180_DEG_ADV);
+
+ return default_val;
+}
+
#if defined(CFG_DRAM_TEST)
int testdram (void)
{
@@ -604,7 +640,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -621,7 +657,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -634,8 +670,6 @@
#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
void pci_target_init(struct pci_controller * hose )
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*-------------------------------------------------------------------+
* Disable everything
*-------------------------------------------------------------------*/
@@ -812,16 +846,18 @@
static struct pci_controller pcie_hose[3] = {{0},{0},{0}};
-void pcie_setup_hoses(void)
+void pcie_setup_hoses(int busno)
{
struct pci_controller *hose;
int i, bus;
+ char *env;
+ unsigned int delay;
/*
* assume we're called after the PCIX hose is initialized, which takes
* bus ID 0 and therefore start numbering PCIe's from 1.
*/
- bus = 1;
+ bus = busno;
for (i = 0; i <= 2; i++) {
/* Check for yucca card presence */
if (!yucca_pcie_card_present(i))
@@ -840,8 +876,8 @@
hose = &pcie_hose[i];
hose->first_busno = bus;
- hose->last_busno = bus;
- bus++;
+ hose->last_busno = bus;
+ hose->current_busno = bus;
/* setup mem resource */
pci_set_region(hose->regions + 0,
@@ -861,10 +897,21 @@
*/
#else
ppc440spe_setup_pcie_rootpoint(hose, i);
+
+ env = getenv ("pciscandelay");
+ if (env != NULL) {
+ delay = simple_strtoul (env, NULL, 10);
+ if (delay > 5)
+ printf ("Warning, expect noticable delay before PCIe"
+ "scan due to 'pciscandelay' value!\n");
+ mdelay (delay * 1000);
+ }
+
/*
* Config access can only go down stream
*/
hose->last_busno = pci_hose_scan(hose);
+ bus = hose->last_busno + 1;
#endif
}
}
diff --git a/board/amirix/ap1000/serial.c b/board/amirix/ap1000/serial.c
index c6ee772..5e9e3a3 100644
--- a/board/amirix/ap1000/serial.c
+++ b/board/amirix/ap1000/serial.c
@@ -84,7 +84,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void kgdb_serial_init (void)
{
}
@@ -108,4 +108,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/at91rm9200dk/Makefile b/board/at91rm9200dk/Makefile
old mode 100644
new mode 100755
index 0fcafd9..01f3bc3
--- a/board/at91rm9200dk/Makefile
+++ b/board/at91rm9200dk/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS := at91rm9200dk.o at45.o flash.o
+COBJS := at91rm9200dk.o flash.o led.o mux.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/at91rm9200dk/at45.c b/board/at91rm9200dk/at45.c
deleted file mode 100644
index f886fe4..0000000
--- a/board/at91rm9200dk/at45.c
+++ /dev/null
@@ -1,621 +0,0 @@
-/* Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/hardware.h>
-
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-
-#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
-the Continuous Array Read function */
-
-/* AC Characteristics */
-/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-#define DATAFLASH_TCSS (0xC << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
-#define AT91C_TIMEOUT_WRDY 200000
-#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */
-#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */
-
-void AT91F_SpiInit(void) {
-
-/*-------------------------------------------------------------------*/
-/* SPI DataFlash Init */
-/*-------------------------------------------------------------------*/
- /* Configure PIOs */
- AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- /* Enable CLock */
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
-
- /* Reset the SPI */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
-
- /* Configure SPI in Master Mode with No CS selected !!! */
- AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
-
- /* Configure CS0 and CS3 */
- *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
- *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
-}
-
-void AT91F_SpiEnable(int cs) {
- switch(cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS);
- break;
- case 3: /* Configure SPI CS3 for Serial DataFlash Card */
- /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
- AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */
- AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */
- /* Clear Output */
- AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
- /* Configure PCS */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
- break;
- }
-
- /* SPI_Enable */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
-}
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiWrite */
-/* \brief Set the PDC registers for a transfert */
-/*----------------------------------------------------------------------------*/
-unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
-{
- unsigned int timeout;
-
- pDesc->state = BUSY;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-
- /* Initialize the Transmit and Receive Pointer */
- AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
- AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
-
- /* Intialize the Transmit and Receive Counters */
- AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
- AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
-
- if ( pDesc->tx_data_size != 0 ) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
- AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
-
- /* Intialize the Next Transmit and Next Receive Counters */
- AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
- AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
- timeout = 0;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
- while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
- pDesc->state = IDLE;
-
- if (timeout >= CFG_SPI_WRITE_TOUT){
- printf("Error Timeout\n\r");
- return DATAFLASH_ERROR;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashSendCommand */
-/* \brief Generic function to send a command to the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
- AT91PS_DataFlash pDataFlash,
- unsigned char OpCode,
- unsigned int CmdSize,
- unsigned int DataflashAddress)
-{
- unsigned int adr;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* process the address to obtain page address and byte address */
- adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));
-
- /* fill the command buffer */
- pDataFlash->pDataFlashDesc->command[0] = OpCode;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
- } else {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- }
- pDataFlash->pDataFlashDesc->command[5] = 0;
- pDataFlash->pDataFlashDesc->command[6] = 0;
- pDataFlash->pDataFlashDesc->command[7] = 0;
-
- /* Initialize the SpiData structure for the spi write fuction */
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ;
-
- /* send the command and read the data */
- return AT91F_SpiWrite (pDataFlash->pDataFlashDesc);
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashGetStatus */
-/* \brief Read the status register of the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
- AT91S_DataFlashStatus status;
-
- /* if a transfert is in progress ==> return 0 */
- if( (pDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* first send the read status command (D7H) */
- pDesc->command[0] = DB_STATUS;
- pDesc->command[1] = 0;
-
- pDesc->DataFlash_state = GET_STATUS;
- pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
- pDesc->tx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_size = 2 ;
- pDesc->tx_cmd_size = 2 ;
- status = AT91F_SpiWrite (pDesc);
-
- pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
-
- return status;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashWaitReady */
-/* \brief wait for dataflash ready (bit7 of the status register == 1) */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout)
-{
- pDataFlashDesc->DataFlash_state = IDLE;
-
- do {
- AT91F_DataFlashGetStatus(pDataFlashDesc);
- timeout--;
- } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) );
-
- if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
- return DATAFLASH_ERROR;
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashContinuousRead */
-/* Object : Continuous stream Read */
-/* Input Parameters : DataFlash Service */
-/* : <src> = dataflash address */
-/* : <*dataBuffer> = data buffer pointer */
-/* : <sizeToRead> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
- AT91PS_DataFlash pDataFlash,
- int src,
- unsigned char *dataBuffer,
- int sizeToRead )
-{
- AT91S_DataFlashStatus status;
- /* Test the size to read in the device */
- if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
- status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
- /* Send the command to the dataflash */
- return(status);
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashPagePgmBuf */
-/* Object : Main memory page program through buffer 1 or buffer 2 */
-/* Input Parameters : DataFlash Service */
-/* : <*src> = Source buffer */
-/* : <dest> = dataflash destination address */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int SizeToWrite)
-{
- int cmdsize;
- pDataFlash->pDataFlashDesc->tx_data_pt = src ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->rx_data_pt = src;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-
- cmdsize = 4;
- /* Send the command to the dataflash */
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_MainMemoryToBufferTransfert */
-/* Object : Read a page in the SRAM Buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*----------------------------------------------------------------------------- */
-/* Function Name : AT91F_DataFlashWriteBuffer */
-/* Object : Write data to the internal sram buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to write buffer1 or buffer2 */
-/* : <*dataBuffer> = data buffer to write */
-/* : <bufferAddress> = address in the internal buffer */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned char *dataBuffer,
- unsigned int bufferAddress,
- int SizeToWrite )
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
- return DATAFLASH_BAD_COMMAND;
-
- /* buffer address must be lower than page size */
- if (bufferAddress > pDataFlash->pDevice->pages_size)
- return DATAFLASH_BAD_ADDRESS;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* Send first Write Command */
- pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
- pDataFlash->pDataFlashDesc->command[1] = 0;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[2] = 0;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- cmdsize = 5;
- } else {
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- cmdsize = 4;
- }
-
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PageErase */
-/* Object : Erase a page */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PageErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_BlockErase */
-/* Object : Erase a Block */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_BlockErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int block)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size));
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_WriteBufferToMain */
-/* Object : Write buffer to the main memory */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to send to buffer1 or buffer2 */
-/* : <dest> = main memory address */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_WriteBufferToMain (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int dest )
-{
- int cmdsize;
- /* Test if the buffer command is correct */
- if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
- (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- /* Send the command to the dataflash */
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PartialPageWrite */
-/* Object : Erase partielly a page */
-/* Input Parameters : <page> = page number */
-/* : <AdrInpage> = adr to begin the fading */
-/* : <length> = Number of bytes to erase */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PartialPageWrite (
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int size)
-{
- unsigned int page;
- unsigned int AdrInPage;
-
- page = dest / (pDataFlash->pDevice->pages_size);
- AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
- /* Read the contents of the page in the Sram Buffer */
- AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- /*Update the SRAM buffer */
- AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Erase page if a 128 Mbits device */
- if (pDataFlash->pDevice->pages_number >= 16384) {
- AT91F_PageErase(pDataFlash, page);
- /* Rewrite the modified Sram Buffer in the main memory */
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
-
- /* Rewrite the modified Sram Buffer in the main memory */
- return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size)));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashWrite */
-/* Object : */
-/* Input Parameters : <*src> = Source buffer */
-/* : <dest> = dataflash adress */
-/* : <size> = data buffer size */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- int dest,
- int size )
-{
- unsigned int length;
- unsigned int page;
- unsigned int status;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- /* If destination does not fit a page start address */
- if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
- length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
- if (size < length)
- length = size;
-
- if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= length;
- dest += length;
- src += length;
- }
-
- while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
- /* program dataflash page */
- page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
- status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- status = AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- if (!status)
- return DATAFLASH_ERROR;
-
- status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
- if(!status)
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= pDataFlash->pDevice->pages_size ;
- dest += pDataFlash->pDevice->pages_size ;
- src += pDataFlash->pDevice->pages_size ;
- }
-
- /* If still some bytes to read */
- if ( size > 0 ) {
- /* program dataflash page */
- if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashRead */
-/* Object : Read a block in dataflash */
-/* Input Parameters : */
-/* Return value : */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(
- AT91PS_DataFlash pDataFlash,
- unsigned long addr,
- unsigned long size,
- char *buffer)
-{
- unsigned long SizeToRead;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- while (size) {
- SizeToRead = (size < 0x8000)? size:0x8000;
-
- if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- if (AT91F_DataFlashContinuousRead (pDataFlash, addr, (uchar *)buffer, SizeToRead) != DATAFLASH_OK)
- return -1;
-
- size -= SizeToRead;
- addr += SizeToRead;
- buffer += SizeToRead;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashProbe */
-/* Object : */
-/* Input Parameters : */
-/* Return value : Dataflash status register */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
- AT91F_SpiEnable(cs);
- AT91F_DataFlashGetStatus(pDesc);
- return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
-}
-
-#endif
diff --git a/board/at91rm9200dk/at91rm9200dk.c b/board/at91rm9200dk/at91rm9200dk.c
index 002981a..c564f73 100644
--- a/board/at91rm9200dk/at91rm9200dk.c
+++ b/board/at91rm9200dk/at91rm9200dk.c
@@ -62,7 +62,7 @@
}
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -82,14 +82,14 @@
p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
/*
* Disk On Chip (NAND) Millenium initialization.
* The NAND lives in the CS2* space
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
extern ulong nand_probe (ulong physadr);
#define AT91_SMARTMEDIA_BASE 0x40000000 /* physical address to access memory on NCS3 */
diff --git a/board/at91rm9200dk/led.c b/board/at91rm9200dk/led.c
new file mode 100644
index 0000000..0518918
--- /dev/null
+++ b/board/at91rm9200dk/led.c
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2006
+ * Atmel Nordic AB <www.atmel.com>
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/AT91RM9200.h>
+
+#define GREEN_LED AT91C_PIO_PB0
+#define YELLOW_LED AT91C_PIO_PB1
+#define RED_LED AT91C_PIO_PB2
+
+void green_LED_on(void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ PIOB->PIO_CODR = GREEN_LED;
+}
+
+void yellow_LED_on(void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ PIOB->PIO_CODR = YELLOW_LED;
+}
+
+void red_LED_on(void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ PIOB->PIO_CODR = RED_LED;
+}
+
+void green_LED_off(void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ PIOB->PIO_SODR = GREEN_LED;
+}
+
+void yellow_LED_off(void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ PIOB->PIO_SODR = YELLOW_LED;
+}
+
+void red_LED_off(void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ PIOB->PIO_SODR = RED_LED;
+}
+
+
+void LED_init (void)
+{
+ AT91PS_PIO PIOB = AT91C_BASE_PIOB;
+ AT91PS_PMC PMC = AT91C_BASE_PMC;
+ PMC->PMC_PCER = (1 << AT91C_ID_PIOB); /* Enable PIOB clock */
+ /* Disable peripherals on LEDs */
+ PIOB->PIO_PER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+ /* Enable pins as outputs */
+ PIOB->PIO_OER = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+ /* Turn all LEDs OFF */
+ PIOB->PIO_SODR = AT91C_PIO_PB2 | AT91C_PIO_PB1 | AT91C_PIO_PB0;
+}
diff --git a/board/at91rm9200dk/mux.c b/board/at91rm9200dk/mux.c
new file mode 100644
index 0000000..767d280
--- /dev/null
+++ b/board/at91rm9200dk/mux.c
@@ -0,0 +1,37 @@
+#include <config.h>
+#include <common.h>
+#include <asm/hardware.h>
+#include <dataflash.h>
+
+int AT91F_GetMuxStatus(void) {
+#ifdef DATAFLASH_MMC_SELECT
+ AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+ AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+
+
+ if(AT91C_BASE_PIOB->PIO_ODSR & DATAFLASH_MMC_SELECT) {
+ return 1;
+ } else {
+ return 0;
+ }
+#endif
+ return 0;
+}
+
+void AT91F_SelectMMC(void) {
+#ifdef DATAFLASH_MMC_SELECT
+ AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+ AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+ /* Set Output */
+ AT91C_BASE_PIOB->PIO_SODR = DATAFLASH_MMC_SELECT;
+#endif
+}
+
+void AT91F_SelectSPI(void) {
+#ifdef DATAFLASH_MMC_SELECT
+ AT91C_BASE_PIOB->PIO_PER = DATAFLASH_MMC_SELECT; /* Set in PIO mode */
+ AT91C_BASE_PIOB->PIO_OER = DATAFLASH_MMC_SELECT; /* Configure in output */
+ /* Clear Output */
+ AT91C_BASE_PIOB->PIO_CODR = DATAFLASH_MMC_SELECT;
+#endif
+}
diff --git a/board/atc/atc.c b/board/atc/atc.c
index d2c6b3b..fe32155 100644
--- a/board/atc/atc.c
+++ b/board/atc/atc.c
@@ -379,7 +379,7 @@
return (psize);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/atc/ti113x.c b/board/atc/ti113x.c
index d5e935c..e112eca 100644
--- a/board/atc/ti113x.c
+++ b/board/atc/ti113x.c
@@ -591,7 +591,7 @@
return rc;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_off (void)
{
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
diff --git a/board/atc/u-boot.lds b/board/atc/u-boot.lds
deleted file mode 100644
index eee83d0..0000000
--- a/board/atc/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/atmel/atstk1000/eth.c b/board/atmel/atstk1000/eth.c
index 3a7916e..b2b1a12 100644
--- a/board/atmel/atstk1000/eth.c
+++ b/board/atmel/atstk1000/eth.c
@@ -27,7 +27,7 @@
extern int macb_eth_initialize(int id, void *regs, unsigned int phy_addr);
-#if defined(CONFIG_MACB) && (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_MACB) && defined(CONFIG_CMD_NET)
void atstk1000_eth_initialize(bd_t *bi)
{
int id = 0;
diff --git a/board/barco/u-boot.lds b/board/barco/u-boot.lds
deleted file mode 100644
index 7bf8531..0000000
--- a/board/barco/u-boot.lds
+++ /dev/null
@@ -1,131 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/bc3450/bc3450.c b/board/bc3450/bc3450.c
index 05bb723..56a73fe 100644
--- a/board/bc3450/bc3450.c
+++ b/board/bc3450/bc3450.c
@@ -294,7 +294,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -315,7 +315,7 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#ifdef CONFIG_POST
/*
diff --git a/board/bc3450/cmd_bc3450.c b/board/bc3450/cmd_bc3450.c
index 6bbe4e6..1455953 100644
--- a/board/bc3450/cmd_bc3450.c
+++ b/board/bc3450/cmd_bc3450.c
@@ -30,7 +30,7 @@
/*
* BC3450 specific commands
*/
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#undef DEBUG
#ifdef DEBUG
@@ -824,4 +824,4 @@
"test unit-off\n"
" - turns off the BC3450 unit\n"
" WARNING: Unsaved environment variables will be lost!\n");
-#endif /* CFG_CMD_BSP */
+#endif
diff --git a/board/bc3450/u-boot.lds b/board/bc3450/u-boot.lds
deleted file mode 100644
index 93b98a8..0000000
--- a/board/bc3450/u-boot.lds
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/bf533-ezkit/bf533-ezkit.c b/board/bf533-ezkit/bf533-ezkit.c
index 1dd4a3f..98ed6f8 100644
--- a/board/bf533-ezkit/bf533-ezkit.c
+++ b/board/bf533-ezkit/bf533-ezkit.c
@@ -30,6 +30,8 @@
#include "psd4256.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
#if (BFIN_CPU == ADSP_BF531)
@@ -46,7 +48,6 @@
long int initdram(int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
int brate;
char *tmp = getenv("baudrate");
diff --git a/board/bf533-stamp/bf533-stamp.c b/board/bf533-stamp/bf533-stamp.c
index b9dff99..69e425b 100644
--- a/board/bf533-stamp/bf533-stamp.c
+++ b/board/bf533-stamp/bf533-stamp.c
@@ -30,6 +30,8 @@
#include <asm/io.h>
#include "bf533-stamp.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define STATUS_LED_OFF 0
#define STATUS_LED_ON 1
@@ -55,7 +57,6 @@
long int initdram(int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
printf("SDRAM attributes:\n");
printf
diff --git a/board/bf537-stamp/bf537-stamp.c b/board/bf537-stamp/bf537-stamp.c
index 47f7c9e..b3d8bda 100644
--- a/board/bf537-stamp/bf537-stamp.c
+++ b/board/bf537-stamp/bf537-stamp.c
@@ -32,6 +32,8 @@
#include <asm/io.h>
#include "ether_bf537.h"
+DECLARE_GLOBAL_DATA_PTR;
+
#define POST_WORD_ADDR 0xFF903FFC
/*
@@ -132,7 +134,6 @@
long int initdram(int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
int brate;
char *tmp = getenv("baudrate");
@@ -159,7 +160,7 @@
unsigned char *pMACaddr = (unsigned char *)0x203F0000;
u8 SrcAddr[6] = { 0x02, 0x80, 0xAD, 0x20, 0x31, 0xB8 };
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/* The 0xFF check here is to make sure we don't use the address
* in flash if it's simply been erased (aka all 0xFF values) */
if (getenv("ethaddr") == NULL && is_valid_ether_addr(pMACaddr)) {
@@ -171,7 +172,7 @@
if (getenv("ethaddr")) {
SetupMacAddr(SrcAddr);
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* BFIN_BOOT_MODE == BF537_BYPASS_BOOT */
#if defined(CONFIG_BFIN_IDE)
diff --git a/board/bf537-stamp/ether_bf537.c b/board/bf537-stamp/ether_bf537.c
index f00837a..36c1536 100644
--- a/board/bf537-stamp/ether_bf537.c
+++ b/board/bf537-stamp/ether_bf537.c
@@ -42,13 +42,13 @@
#define DEBUGF(fmt,args...)
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#define RXBUF_BASE_ADDR 0xFF900000
#define TXBUF_BASE_ADDR 0xFF800000
#define TX_BUF_CNT 1
-#define TOUT_LOOP 1000000
+#define TOUT_LOOP 1000000
ADI_ETHER_BUFFER *txbuf[TX_BUF_CNT];
ADI_ETHER_BUFFER *rxbuf[PKTBUFSRX];
@@ -542,4 +542,4 @@
return 0;
}
#endif
-#endif /* CFG_CMD_NET */
+#endif
diff --git a/board/bf537-stamp/flash-defines.h b/board/bf537-stamp/flash-defines.h
index acc1e86..1fa7a10 100644
--- a/board/bf537-stamp/flash-defines.h
+++ b/board/bf537-stamp/flash-defines.h
@@ -44,9 +44,9 @@
#define ERASE_SECT 6
#define READ 7
#define GET_SECTNUM 8
-#define FLASH_START_L 0x0000
-#define FLASH_START_H 0x2000
-#define FLASH_MAN_ST 2
+#define FLASH_START_L 0x0000
+#define FLASH_START_H 0x2000
+#define FLASH_MAN_ST 2
#define RESET_VAL 0xF0
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
diff --git a/board/bf537-stamp/nand.c b/board/bf537-stamp/nand.c
index 4d6e776..f95b584 100644
--- a/board/bf537-stamp/nand.c
+++ b/board/bf537-stamp/nand.c
@@ -23,7 +23,7 @@
#include <common.h>
#include <asm/io.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
@@ -103,4 +103,4 @@
nand->dev_ready = bfin_device_ready;
nand->chip_delay = 30;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
diff --git a/board/bf537-stamp/stm_m25p64.c b/board/bf537-stamp/stm_m25p64.c
index 7077e85..d9c08ee 100644
--- a/board/bf537-stamp/stm_m25p64.c
+++ b/board/bf537-stamp/stm_m25p64.c
@@ -9,7 +9,7 @@
/* Application definitions */
-#define NUM_SECTORS 128 /* number of sectors */
+#define NUM_SECTORS 128 /* number of sectors */
#define SECTOR_SIZE 0x10000
#define NOP_NUM 1000
diff --git a/board/bf537-stamp/u-boot.lds.S b/board/bf537-stamp/u-boot.lds.S
index 3fb2d0c..8632097 100644
--- a/board/bf537-stamp/u-boot.lds.S
+++ b/board/bf537-stamp/u-boot.lds.S
@@ -33,7 +33,7 @@
__DYNAMIC = 0; */
MEMORY
{
- ram : ORIGIN = (CFG_MONITOR_BASE), LENGTH = (256 * 1024)
+ ram : ORIGIN = (CFG_MONITOR_BASE), LENGTH = (256 * 1024)
l1_code : ORIGIN = 0xFFA00000, LENGTH = 0xC000
l1_data : ORIGIN = 0xFF900000, LENGTH = 0x4000
}
@@ -47,11 +47,11 @@
.dynsym : { *(.dynsym) }
.dynstr : { *(.dynstr) }
.rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
+ .rela.text : { *(.rela.text) }
.rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
.rel.got : { *(.rel.got) }
.rela.got : { *(.rela.got) }
.rel.ctors : { *(.rel.ctors) }
@@ -68,7 +68,7 @@
.text :
{
/* WARNING - the following is hand-optimized to fit within */
- /* the sector before the environment sector. If it throws */
+ /* the sector before the environment sector. If it throws */
/* an error during compilation remove an object here to get */
/* it linked after the configuration sector. */
diff --git a/board/bf561-ezkit/bf561-ezkit.c b/board/bf561-ezkit/bf561-ezkit.c
index 989b019..2ff44a7 100644
--- a/board/bf561-ezkit/bf561-ezkit.c
+++ b/board/bf561-ezkit/bf561-ezkit.c
@@ -29,6 +29,8 @@
#include <common.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
int checkboard(void)
{
printf("CPU: ADSP BF561\n");
@@ -39,7 +41,6 @@
long int initdram(int board_type)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef DEBUG
int brate;
char *tmp = getenv("baudrate");
diff --git a/board/bmw/u-boot.lds b/board/bmw/u-boot.lds
deleted file mode 100644
index eaee3fd..0000000
--- a/board/bmw/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/c2mon/pcmcia.c b/board/c2mon/pcmcia.c
index 5e50c4d..c389c67 100644
--- a/board/c2mon/pcmcia.c
+++ b/board/c2mon/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -165,7 +165,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -193,7 +193,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/canmb/u-boot.lds b/board/canmb/u-boot.lds
deleted file mode 100644
index 88dc118..0000000
--- a/board/canmb/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cds/common/via.c b/board/cds/common/via.c
index e79bd02..4a63d77 100644
--- a/board/cds/common/via.c
+++ b/board/cds/common/via.c
@@ -28,11 +28,16 @@
pci_dev_t dev, struct pci_config_table *tab)
{
pci_dev_t bridge;
+ unsigned int cmdstat;
/* Enable USB and IDE functions */
pci_hose_write_config_byte(hose, dev, 0x48, 0x08);
- pciauto_config_device(hose, dev);
+ pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
+ cmdstat |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY| PCI_COMMAND_MASTER;
+ pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
/*
* Force the backplane P2P bridge to have a window
@@ -40,7 +45,7 @@
* This allows legacy I/O (i8259, etc) on the VIA
* southbridge to be accessed.
*/
- bridge = PCI_BDF(0,17,0);
+ bridge = PCI_BDF(0,BRIDGE_ID,0);
pci_hose_write_config_byte(hose, bridge, PCI_IO_BASE, 0);
pci_hose_write_config_word(hose, bridge, PCI_IO_BASE_UPPER16, 0);
pci_hose_write_config_byte(hose, bridge, PCI_IO_LIMIT, 0x10);
diff --git a/board/cds/mpc8541cds/mpc8541cds.c b/board/cds/mpc8541cds/mpc8541cds.c
index 4192324..558ba99 100644
--- a/board/cds/mpc8541cds/mpc8541cds.c
+++ b/board/cds/mpc8541cds/mpc8541cds.c
@@ -476,14 +476,17 @@
static struct pci_config_table pci_mpc85xxcds_config_table[] = {
{0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}},
- {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}},
- {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1,
+ {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}},
+ {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1,
mpc85xx_config_via_usbide, {0,0,0}},
- {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}},
- {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}},
- {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5,
+ {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2,
+ mpc85xx_config_via_usb, {0,0,0}},
+ {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3,
+ mpc85xx_config_via_usb2, {0,0,0}},
+ {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5,
mpc85xx_config_via_power, {0,0,0}},
- {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}},
+ {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6,
+ mpc85xx_config_via_ac97, {0,0,0}},
{},
};
diff --git a/board/cds/mpc8548cds/config.mk b/board/cds/mpc8548cds/config.mk
index 242a676..b23bc87 100644
--- a/board/cds/mpc8548cds/config.mk
+++ b/board/cds/mpc8548cds/config.mk
@@ -1,5 +1,5 @@
#
-# Copyright 2004 Freescale Semiconductor.
+# Copyright 2004, 2007 Freescale Semiconductor.
#
# See file CREDITS for list of people who contributed to this
# project.
@@ -23,7 +23,9 @@
#
# mpc8548cds board
#
+ifndef TEXT_BASE
TEXT_BASE = 0xfff80000
+endif
PLATFORM_CPPFLAGS += -DCONFIG_E500=1
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
diff --git a/board/cds/mpc8548cds/init.S b/board/cds/mpc8548cds/init.S
index d468f5b..72940b0 100644
--- a/board/cds/mpc8548cds/init.S
+++ b/board/cds/mpc8548cds/init.S
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
* Copyright 2002,2003, Motorola Inc.
*
* See file CREDITS for list of people who contributed to this
@@ -28,6 +28,12 @@
#include <config.h>
#include <mpc85xx.h>
+#define LAWAR_TRGT_PCI1 0x00000000
+#define LAWAR_TRGT_PCI2 0x00100000
+#define LAWAR_TRGT_PCIE 0x00200000
+#define LAWAR_TRGT_RIO 0x00c00000
+#define LAWAR_TRGT_LBC 0x00400000
+#define LAWAR_TRGT_DDR 0x00f00000
/*
* TLB0 and TLB1 Entries
@@ -47,8 +53,8 @@
*/
#define entry_start \
- mflr r1 ; \
- bl 0f ;
+ mflr r1 ; \
+ bl 0f ;
#define entry_end \
0: mflr r0 ; \
@@ -84,8 +90,8 @@
#endif
/*
- * TLB0 16K Cacheable, non-guarded
- * 0xd001_0000 16K Temporary Global data for initialization
+ * TLB0 16K Cacheable, guarded
+ * Temporary Global data for initialization
*
* Use four 4K TLB0 entries. These entries must be cacheable
* as they provide the bootstrap memory before the memory
@@ -97,28 +103,28 @@
.long TLB1_MAS0(0, 0, 0)
.long TLB1_MAS1(1, 0, 0, 0, 0)
.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR),
- 0,0,0,0,0,0,0,0)
+ 0,0,0,0,0,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR),
0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(0, 0, 0)
.long TLB1_MAS1(1, 0, 0, 0, 0)
.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 4 * 1024),
- 0,0,0,0,0,0,0,0)
+ 0,0,0,0,0,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 4 * 1024),
0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(0, 0, 0)
.long TLB1_MAS1(1, 0, 0, 0, 0)
.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 8 * 1024),
- 0,0,0,0,0,0,0,0)
+ 0,0,0,0,0,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 8 * 1024),
0,0,0,0,0,1,0,1,0,1)
.long TLB1_MAS0(0, 0, 0)
.long TLB1_MAS1(1, 0, 0, 0, 0)
.long TLB1_MAS2(E500_TLB_EPN(CFG_INIT_RAM_ADDR + 12 * 1024),
- 0,0,0,0,0,0,0,0)
+ 0,0,0,0,0,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_INIT_RAM_ADDR + 12 * 1024),
0,0,0,0,0,1,0,1,0,1)
@@ -130,51 +136,44 @@
*/
.long TLB1_MAS0(1, 0, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_16M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_FLASH_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
+ .long TLB1_MAS2(E500_TLB_EPN(CFG_BOOT_BLOCK), 0,0,0,0,1,0,1,0)
+ .long TLB1_MAS3(E500_TLB_RPN(CFG_BOOT_BLOCK), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLB 1: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM
+ * TLB 1: 1G Non-cacheable, guarded
+ * 0x80000000 1G PCI1/PCIE 8,9,a,b
*/
.long TLB1_MAS0(1, 1, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
+ .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1G)
+ .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI_PHYS), 0,0,0,0,1,0,1,0)
+ .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI_PHYS), 0,0,0,0,0,1,0,1,0,1)
+#ifdef CFG_RIO_MEM_PHYS
/*
* TLB 2: 256M Non-cacheable, guarded
- * 0x90000000 256M PCI2 MEM
*/
.long TLB1_MAS0(1, 2, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PCI2_MEM_BASE),
+ .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_PHYS),
0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PCI2_MEM_BASE),
- 0,0,0,0,0,1,0,1,0,1)
+ .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_PHYS), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLB 3: 1GB Non-cacheable, guarded
- * 0xa0000000 256M PEX MEM First half
- * 0xb0000000 256M PEX MEM Second half
- * 0xc0000000 256M Rapid IO MEM First half
- * 0xd0000000 256M Rapid IO MEM Second half
+ * TLB 3: 256M Non-cacheable, guarded
*/
.long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1G)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PEX_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PEX_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLB 4: Reserved for future usage
- */
-
+ .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
+ .long TLB1_MAS2(E500_TLB_EPN(CFG_RIO_MEM_PHYS + 0x10000000),
+ 0,0,0,0,1,0,1,0)
+ .long TLB1_MAS3(E500_TLB_RPN(CFG_RIO_MEM_PHYS + 0x10000000),
+ 0,0,0,0,0,1,0,1,0,1)
+#endif
/*
* TLB 5: 64M Non-cacheable, guarded
* 0xe000_0000 1M CCSRBAR
- * 0xe200_0000 8M PCI1 IO
- * 0xe280_0000 8M PCI2 IO
- * 0xe300_0000 16M PEX IO
+ * 0xe200_0000 1M PCI1 IO
+ * 0xe210_0000 1M PCI2 IO
+ * 0xe300_0000 1M PCIe IO
*/
.long TLB1_MAS0(1, 5, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
@@ -187,17 +186,18 @@
*/
.long TLB1_MAS0(1, 6, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
+ .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_CACHE_BASE), 0,0,0,0,0,0,0,0)
+ .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_CACHE_BASE), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLB 7: 1M Non-cacheable, guarded
- * 0xf8000000 1M CADMUS registers
+ * TLB 7: 64M Non-cacheable, guarded
+ * 0xf8000000 64M CADMUS registers, relocated L2SRAM
*/
.long TLB1_MAS0(1, 7, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1M)
- .long TLB1_MAS2(E500_TLB_EPN(CADMUS_BASE_ADDR), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CADMUS_BASE_ADDR), 0,0,0,0,0,1,0,1,0,1)
+ .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
+ .long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_NONCACHE_BASE), 0,0,0,0,1,0,1,0)
+ .long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_NONCACHE_BASE), 0,0,0,0,0,1,0,1,0,1)
+
2:
entry_end
@@ -205,14 +205,13 @@
* LAW(Local Access Window) configuration:
*
* 0x0000_0000 0x7fff_ffff DDR 2G
- * 0x8000_0000 0x8fff_ffff PCI1 MEM 256M
- * 0x9000_0000 0x9fff_ffff PCI2 MEM 256M
- * 0xa000_0000 0xbfff_ffff PEX MEM 512M
+ * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
+ * 0xa000_0000 0xbfff_ffff PCIe MEM 512M
* 0xc000_0000 0xdfff_ffff RapidIO 512M
* 0xe000_0000 0xe000_ffff CCSR 1M
- * 0xe200_0000 0xe27f_ffff PCI1 IO 8M
- * 0xe280_0000 0xe2ff_ffff PCI2 IO 8M
- * 0xe300_0000 0xe3ff_ffff PEX IO 16M
+ * 0xe200_0000 0xe10f_ffff PCI1 IO 1M
+ * 0xe280_0000 0xe20f_ffff PCI2 IO 1M
+ * 0xe300_0000 0xe30f_ffff PCIe IO 1M
* 0xf000_0000 0xf3ff_ffff SDRAM 64M
* 0xf800_0000 0xf80f_ffff NVRAM/CADMUS (*) 1M
* 0xff00_0000 0xff7f_ffff FLASH (2nd bank) 8M
@@ -222,47 +221,50 @@
* CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
* If flash is 8M at default position (last 8M), no LAW needed.
*
- * The defines below are 1-off of the actual LAWAR0 usage.
- * So LAWAR3 define uses the LAWAR4 register in the ECM.
+ * LAW 0 is reserved for boot mapping
*/
-#define LAWBAR0 0
-#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
-
-#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR2 ((CFG_PCI2_MEM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff)
-#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_8M))
-
-#define LAWBAR4 ((CFG_PCI2_IO_PHYS>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_8M))
-
-/* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
-#define LAWBAR5 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
-#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M))
-
-#define LAWBAR6 ((CFG_PEX_MEM_BASE>>12) & 0xfffff)
-#define LAWAR6 (LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
-#define LAWBAR7 ((CFG_PEX_IO_PHYS>>12) & 0xfffff)
-#define LAWAR7 (LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_16M))
-
-#define LAWBAR8 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
-
.section .bootpg, "ax"
.globl law_entry
-
law_entry:
entry_start
+
.long (4f-3f)/8
3:
- .long LAWBAR0,LAWAR0,LAWBAR1,LAWAR1,LAWBAR2,LAWAR2,LAWBAR3,LAWAR3
- .long LAWBAR4,LAWAR4,LAWBAR5,LAWAR5,LAWBAR6,LAWAR6,LAWBAR7,LAWAR7
- .long LAWBAR8,LAWAR8
+ .long 0
+ .long (LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN
+
+#ifdef CFG_PCI1_MEM_PHYS
+ .long (CFG_PCI1_MEM_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)
+
+ .long (CFG_PCI1_IO_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_1M)
+#endif
+
+#ifdef CFG_PCI2_MEM_PHYS
+ .long (CFG_PCI2_MEM_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)
+
+ .long (CFG_PCI2_IO_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_1M)
+#endif
+
+#ifdef CFG_PCIE1_MEM_PHYS
+ .long (CFG_PCIE1_MEM_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCIE | (LAWAR_SIZE & LAWAR_SIZE_512M)
+
+ .long (CFG_PCIE1_IO_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCIE | (LAWAR_SIZE & LAWAR_SIZE_1M)
+#endif
+
+ /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
+ .long (CFG_LBC_CACHE_BASE>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)
+
+#ifdef CFG_RIO_MEM_PHYS
+ .long (CFG_RIO_MEM_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M)
+#endif
4:
entry_end
diff --git a/board/cds/mpc8548cds/mpc8548cds.c b/board/cds/mpc8548cds/mpc8548cds.c
index 929ff2e..36d7e1e 100644
--- a/board/cds/mpc8548cds/mpc8548cds.c
+++ b/board/cds/mpc8548cds/mpc8548cds.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
*
* (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
*
@@ -26,6 +26,7 @@
#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
+#include <asm/immap_fsl_pci.h>
#include <spd.h>
#include <miiphy.h>
@@ -33,10 +34,15 @@
#include "../common/eeprom.h"
#include "../common/via.h"
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc(unsigned int dram_size);
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
extern long int spd_sdram(void);
void local_bus_init(void);
@@ -56,13 +62,6 @@
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
- uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
- uint pci1_32 = gur->pordevsr & 0x10000; /* PORDEVSR[15] */
- uint pci1_clk_sel = gur->porpllsr & 0x8000; /* PORPLLSR[16] */
- uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
-
- uint pci1_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
-
uint cpu_board_rev = get_cpu_board_revision ();
printf ("Board: CDS Version 0x%02x, PCI Slot %d\n",
@@ -71,20 +70,6 @@
printf ("CPU Board Revision %d.%d (0x%04x)\n",
MPC85XX_CPU_BOARD_MAJOR (cpu_board_rev),
MPC85XX_CPU_BOARD_MINOR (cpu_board_rev), cpu_board_rev);
-
- printf (" PCI1: %d bit, %s MHz, %s\n",
- (pci1_32) ? 32 : 64,
- (pci1_speed == 33000000) ? "33" :
- (pci1_speed == 66000000) ? "66" : "unknown",
- pci1_clk_sel ? "sync" : "async");
-
- if (pci_dual) {
- printf (" PCI2: 32 bit, 66 MHz, %s\n",
- pci2_clk_sel ? "sync" : "async");
- } else {
- printf (" PCI2: disabled\n");
- }
-
/*
* Initialize local bus.
*/
@@ -102,6 +87,8 @@
*/
gur->tsec34ioovcr = 0xe7e0; /* 1110 0111 1110 0xxx */
+ ecm->eedr = 0xffffffff; /* clear ecm errors */
+ ecm->eeer = 0xffffffff; /* enable ecm errors */
return 0;
}
@@ -176,6 +163,9 @@
lbc->lcrr |= 0x00030000;
asm("sync;isync;msync");
+
+ lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
+ lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
}
/*
@@ -301,7 +291,7 @@
}
#endif
-#if defined(CONFIG_PCI)
+#if defined(CONFIG_PCI) || defined(CONFIG_PCI1)
/* For some reason the Tundra PCI bridge shows up on itself as a
* different device. Work around that by refusing to configure it.
*/
@@ -309,32 +299,197 @@
static struct pci_config_table pci_mpc85xxcds_config_table[] = {
{0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}},
- {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}},
- {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1,
+ {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}},
+ {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1,
mpc85xx_config_via_usbide, {0,0,0}},
- {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}},
- {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}},
- {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5,
+ {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2,
+ mpc85xx_config_via_usb, {0,0,0}},
+ {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3,
+ mpc85xx_config_via_usb2, {0,0,0}},
+ {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5,
mpc85xx_config_via_power, {0,0,0}},
- {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}},
+ {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6,
+ mpc85xx_config_via_ac97, {0,0,0}},
{},
};
-static struct pci_controller hose[] = {
- { config_table: pci_mpc85xxcds_config_table,},
-#ifdef CONFIG_MPC85XX_PCI2
- {},
-#endif
-};
-
+static struct pci_controller pci1_hose = {
+ config_table: pci_mpc85xxcds_config_table};
#endif /* CONFIG_PCI */
+#ifdef CONFIG_PCI2
+static struct pci_controller pci2_hose;
+#endif /* CONFIG_PCI2 */
+
+#ifdef CONFIG_PCIE1
+static struct pci_controller pcie1_hose;
+#endif /* CONFIG_PCIE1 */
+
+int first_free_busno=0;
+
void
pci_init_board(void)
{
-#ifdef CONFIG_PCI
- pci_mpc85xx_init(&hose);
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
+ uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
+
+
+#ifdef CONFIG_PCI1
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI1_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pci1_hose;
+ struct pci_config_table *table;
+
+ uint pci_32 = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_PCI32; /* PORDEVSR[15] */
+ uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */
+ uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */
+
+ uint pci_agent = (host_agent == 3) || (host_agent == 4 ) || (host_agent == 6);
+
+ uint pci_speed = get_clock_freq (); /* PCI PSPEED in [4:5] */
+
+ if (!(gur->devdisr & MPC85xx_DEVDISR_PCI1)) {
+ printf (" PCI: %d bit, %s MHz, %s, %s, %s\n",
+ (pci_32) ? 32 : 64,
+ (pci_speed == 33333000) ? "33" :
+ (pci_speed == 66666000) ? "66" : "unknown",
+ pci_clk_sel ? "sync" : "async",
+ pci_agent ? "agent" : "host",
+ pci_arb ? "arbiter" : "external-arbiter"
+ );
+
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS,
+ CFG_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+ hose->region_count = 3;
+
+ /* relocate config table pointers */
+ hose->config_table = \
+ (struct pci_config_table *)((uint)hose->config_table + gd->reloc_off);
+ for (table = hose->config_table; table && table->vendor; table++)
+ table->config_device += gd->reloc_off;
+
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+ first_free_busno=hose->last_busno+1;
+ printf ("PCI on bus %02x - %02x\n",hose->first_busno,hose->last_busno);
+#ifdef CONFIG_PCIX_CHECK
+ if (!(gur->pordevsr & PORDEVSR_PCI)) {
+ /* PCI-X init */
+ if (CONFIG_SYS_CLK_FREQ < 66000000)
+ printf("PCI-X will only work at 66 MHz\n");
+
+ reg16 = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
+ | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
+ pci_hose_write_config_word(hose, bus, PCIX_COMMAND, reg16);
+ }
#endif
+ } else {
+ printf (" PCI: disabled\n");
+ }
+}
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
+#endif
+
+#ifdef CONFIG_PCI2
+{
+ uint pci2_clk_sel = gur->porpllsr & 0x4000; /* PORPLLSR[17] */
+ uint pci_dual = get_pci_dual (); /* PCI DUAL in CM_PCI[3] */
+ if (pci_dual) {
+ printf (" PCI2: 32 bit, 66 MHz, %s\n",
+ pci2_clk_sel ? "sync" : "async");
+ } else {
+ printf (" PCI2: disabled\n");
+ }
+}
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCI2; /* disable */
+#endif /* CONFIG_PCI2 */
+
+#ifdef CONFIG_PCIE1
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pcie1_hose;
+ int pcie_ep = (host_agent == 0) || (host_agent == 2 ) || (host_agent == 3);
+
+ int pcie_configured = io_sel >= 1;
+
+ if (pcie_configured && !(gur->devdisr & MPC85xx_DEVDISR_PCIE)){
+ printf ("\n PCIE connected to slot as %s (base address %x)",
+ pcie_ep ? "End Point" : "Root Complex",
+ (uint)pci);
+
+ if (pci->pme_msg_det) {
+ pci->pme_msg_det = 0xffffffff;
+ debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det);
+ }
+ printf ("\n");
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCIE1_MEM_BASE,
+ CFG_PCIE1_MEM_PHYS,
+ CFG_PCIE1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCIE1_IO_BASE,
+ CFG_PCIE1_IO_PHYS,
+ CFG_PCIE1_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+ printf ("PCIE on bus %d - %d\n",hose->first_busno,hose->last_busno);
+
+ first_free_busno=hose->last_busno+1;
+
+ } else {
+ printf (" PCIE: disabled\n");
+ }
+ }
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */
+#endif
+
}
int last_stage_init(void)
@@ -345,25 +500,54 @@
/* This is needed to get the RGMII working for the 1.3+
* CDS cards */
if (get_board_version() == 0x13) {
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 29, 18);
- miiphy_read(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_read(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, &temp);
temp = (temp & 0xf03f);
temp |= 2 << 9; /* 36 ohm */
temp |= 2 << 6; /* 39 ohm */
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, temp);
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 29, 3);
- miiphy_write(CONFIG_MPC85XX_TSEC1_NAME,
+ miiphy_write(CONFIG_TSEC1_NAME,
TSEC1_PHY_ADDR, 30, 0x8000);
}
return 0;
}
+
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+
+#ifdef CONFIG_PCI1
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pci1_hose.last_busno - pci1_hose.first_busno;
+ debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+
+#ifdef CONFIG_PCIE1
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
+ debug("PCI@a000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+}
+#endif
diff --git a/board/cds/mpc8548cds/u-boot.lds b/board/cds/mpc8548cds/u-boot.lds
index c1f3495..530ba5a 100644
--- a/board/cds/mpc8548cds/u-boot.lds
+++ b/board/cds/mpc8548cds/u-boot.lds
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -71,7 +71,6 @@
cpu/mpc85xx/cpu.o (.text)
drivers/tsec.o (.text)
cpu/mpc85xx/speed.o (.text)
- cpu/mpc85xx/pci.o (.text)
common/dlmalloc.o (.text)
lib_generic/crc32.o (.text)
lib_ppc/extable.o (.text)
diff --git a/board/cds/mpc8555cds/mpc8555cds.c b/board/cds/mpc8555cds/mpc8555cds.c
index 704bf03..8f16421 100644
--- a/board/cds/mpc8555cds/mpc8555cds.c
+++ b/board/cds/mpc8555cds/mpc8555cds.c
@@ -473,14 +473,17 @@
static struct pci_config_table pci_mpc85xxcds_config_table[] = {
{0x10e3, 0x0513, PCI_ANY_ID, 1, 3, PCI_ANY_ID, dummy_func, {0,0,0}},
- {0x1106, 0x0686, PCI_ANY_ID, 1, 2, 0, mpc85xx_config_via, {0,0,0}},
- {0x1106, 0x0571, PCI_ANY_ID, 1, 2, 1,
+ {0x1106, 0x0686, PCI_ANY_ID, 1, VIA_ID, 0, mpc85xx_config_via, {0,0,0}},
+ {0x1106, 0x0571, PCI_ANY_ID, 1, VIA_ID, 1,
mpc85xx_config_via_usbide, {0,0,0}},
- {0x1105, 0x3038, PCI_ANY_ID, 1, 2, 2, mpc85xx_config_via_usb, {0,0,0}},
- {0x1106, 0x3038, PCI_ANY_ID, 1, 2, 3, mpc85xx_config_via_usb2, {0,0,0}},
- {0x1106, 0x3058, PCI_ANY_ID, 1, 2, 5,
+ {0x1105, 0x3038, PCI_ANY_ID, 1, VIA_ID, 2,
+ mpc85xx_config_via_usb, {0,0,0}},
+ {0x1106, 0x3038, PCI_ANY_ID, 1, VIA_ID, 3,
+ mpc85xx_config_via_usb2, {0,0,0}},
+ {0x1106, 0x3058, PCI_ANY_ID, 1, VIA_ID, 5,
mpc85xx_config_via_power, {0,0,0}},
- {0x1106, 0x3068, PCI_ANY_ID, 1, 2, 6, mpc85xx_config_via_ac97, {0,0,0}},
+ {0x1106, 0x3068, PCI_ANY_ID, 1, VIA_ID, 6,
+ mpc85xx_config_via_ac97, {0,0,0}},
{},
};
diff --git a/board/cm5200/Makefile b/board/cm5200/Makefile
new file mode 100644
index 0000000..8ebdb1a
--- /dev/null
+++ b/board/cm5200/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2003-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o cmd_cm5200.o fwupdate.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/cm5200/cm5200.c b/board/cm5200/cm5200.c
new file mode 100644
index 0000000..b74ac08
--- /dev/null
+++ b/board/cm5200/cm5200.c
@@ -0,0 +1,425 @@
+/*
+ * (C) Copyright 2003-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004
+ * Mark Jonas, Freescale Semiconductor, mark.jonas@motorola.com.
+ *
+ * (C) Copyright 2004-2005
+ * Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de
+ *
+ * Adapted to U-Boot 1.2 by:
+ * Bartlomiej Sieka <tur@semihalf.com>:
+ * - HW ID readout from EEPROM
+ * - module detection
+ * Grzegorz Bernacki <gjb@semihalf.com>:
+ * - run-time SDRAM controller configuration
+ * - LIBFDT support
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc5xxx.h>
+#include <pci.h>
+#include <asm/processor.h>
+#include <i2c.h>
+#include <linux/ctype.h>
+
+#ifdef CONFIG_OF_LIBFDT
+#include <libfdt.h>
+#include <libfdt_env.h>
+#include <fdt_support.h>
+#endif /* CONFIG_OF_LIBFDT */
+
+
+#include "cm5200.h"
+#include "fwupdate.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static hw_id_t hw_id;
+
+
+#ifndef CFG_RAMBOOT
+/*
+ * Helper function to initialize SDRAM controller.
+ */
+static void sdram_start(int hi_addr, mem_conf_t *mem_conf)
+{
+ long hi_addr_bit = hi_addr ? 0x01000000 : 0;
+
+ /* unlock mode register */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000000 |
+ hi_addr_bit;
+
+ /* precharge all banks */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000002 |
+ hi_addr_bit;
+
+ /* auto refresh */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
+ hi_addr_bit;
+
+ /* auto refresh, second time */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | 0x80000004 |
+ hi_addr_bit;
+
+ /* set mode register */
+ *(vu_long *)MPC5XXX_SDRAM_MODE = mem_conf->mode;
+
+ /* normal operation */
+ *(vu_long *)MPC5XXX_SDRAM_CTRL = mem_conf->control | hi_addr_bit;
+}
+#endif /* CFG_RAMBOOT */
+
+
+/*
+ * Retrieve memory configuration for a given module. board_type is the index
+ * in hw_id_list[] corresponding to the module we are executing on; we return
+ * SDRAM controller settings approprate for this module.
+ */
+static mem_conf_t* get_mem_config(int board_type)
+{
+ switch(board_type){
+ case CM1_QA:
+ return memory_config[0];
+ case CM11_QA:
+ case CMU1_QA:
+ return memory_config[1];
+ default:
+ printf("ERROR: Unknown module, using a default SDRAM "
+ "configuration - things may not work!!!.\n");
+ return memory_config[0];
+ }
+}
+
+
+/*
+ * Initalize SDRAM - configure SDRAM controller, detect memory size.
+ */
+long int initdram(int board_type)
+{
+ ulong dramsize = 0;
+#ifndef CFG_RAMBOOT
+ ulong test1, test2;
+ mem_conf_t *mem_conf;
+
+ mem_conf = get_mem_config(board_type);
+
+ /* configure SDRAM start/end for detection */
+ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x0000001e; /* 2G at 0x0 */
+
+ /* setup config registers */
+ *(vu_long *)MPC5XXX_SDRAM_CONFIG1 = mem_conf->config1;
+ *(vu_long *)MPC5XXX_SDRAM_CONFIG2 = mem_conf->config2;
+
+ sdram_start(0, mem_conf);
+ test1 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+ sdram_start(1, mem_conf);
+ test2 = get_ram_size((long *)CFG_SDRAM_BASE, 0x80000000);
+ if (test1 > test2) {
+ sdram_start(0, mem_conf);
+ dramsize = test1;
+ } else
+ dramsize = test2;
+
+ /* memory smaller than 1MB is impossible */
+ if (dramsize < (1 << 20))
+ dramsize = 0;
+
+ /* set SDRAM CS0 size according to the amount of RAM found */
+ if (dramsize > 0) {
+ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0x13 +
+ __builtin_ffs(dramsize >> 20) - 1;
+ } else
+ *(vu_long *)MPC5XXX_SDRAM_CS0CFG = 0; /* disabled */
+#else /* CFG_RAMBOOT */
+ /* retrieve size of memory connected to SDRAM CS0 */
+ dramsize = *(vu_long *)MPC5XXX_SDRAM_CS0CFG & 0xFF;
+ if (dramsize >= 0x13)
+ dramsize = (1 << (dramsize - 0x13)) << 20;
+ else
+ dramsize = 0;
+#endif /* !CFG_RAMBOOT */
+
+ /*
+ * On MPC5200B we need to set the special configuration delay in the
+ * DDR controller. Refer to chapter 8.7.5 SDelay--MBAR + 0x0190 of
+ * the MPC5200B User's Manual.
+ */
+ *(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;
+ __asm__ volatile ("sync");
+
+ return dramsize;
+}
+
+
+/*
+ * Read module hardware identification data from the I2C EEPROM.
+ */
+static void read_hw_id(hw_id_t hw_id)
+{
+ int i;
+ for (i = 0; i < HW_ID_ELEM_COUNT; ++i)
+ if (i2c_read(CFG_I2C_EEPROM,
+ hw_id_format[i].offset,
+ 2,
+ (uchar *)&hw_id[i][0],
+ hw_id_format[i].length) != 0)
+ printf("ERROR: can't read HW ID from EEPROM\n");
+}
+
+
+/*
+ * Identify module we are running on, set gd->board_type to the index in
+ * hw_id_list[] corresponding to the module identifed, or to
+ * CM5200_UNKNOWN_MODULE if we can't identify the module.
+ */
+static void identify_module(hw_id_t hw_id)
+{
+ int i, j, element;
+ char match;
+ gd->board_type = CM5200_UNKNOWN_MODULE;
+ for (i = 0; i < sizeof (hw_id_list) / sizeof (char **); ++i) {
+ match = 1;
+ for (j = 0; j < sizeof (hw_id_identify) / sizeof (int); ++j) {
+ element = hw_id_identify[j];
+ if (strncmp(hw_id_list[i][element],
+ &hw_id[element][0],
+ hw_id_format[element].length) != 0) {
+ match = 0;
+ break;
+ }
+ }
+ if (match) {
+ gd->board_type = i;
+ break;
+ }
+ }
+}
+
+
+/*
+ * Compose string with module name.
+ * buf is assumed to have enough space, and be null-terminated.
+ */
+static void compose_module_name(hw_id_t hw_id, char *buf)
+{
+ char tmp[MODULE_NAME_MAXLEN];
+ strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
+ strncat(buf, ".", 1);
+ strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
+ strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
+ strncat(buf, " (", 2);
+ strncat(buf, &hw_id[IDENTIFICATION_NUMBER][0],
+ hw_id_format[IDENTIFICATION_NUMBER].length);
+ sprintf(tmp, " / %u.%u)",
+ hw_id[MAJOR_SW_VERSION][0],
+ hw_id[MINOR_SW_VERSION][0]);
+ strcat(buf, tmp);
+}
+
+
+/*
+ * Compose string with hostname.
+ * buf is assumed to have enough space, and be null-terminated.
+ */
+static void compose_hostname(hw_id_t hw_id, char *buf)
+{
+ char *p;
+ strncat(buf, &hw_id[PCB_NAME][0], hw_id_format[PCB_NAME].length);
+ strncat(buf, "_", 1);
+ strncat(buf, &hw_id[FORM][0], hw_id_format[FORM].length);
+ strncat(buf, &hw_id[VERSION][0], hw_id_format[VERSION].length);
+ for (p = buf; *p; ++p)
+ *p = tolower(*p);
+
+}
+
+
+#if defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT)
+/*
+ * Update 'model' and 'memory' properties in the blob according to the module
+ * that we are running on.
+ */
+static void ft_blob_update(void *blob, bd_t *bd)
+{
+ int len, ret, nodeoffset = 0;
+ char module_name[MODULE_NAME_MAXLEN] = {0};
+ ulong memory_data[2] = {0};
+
+ compose_module_name(hw_id, module_name);
+ len = strlen(module_name) + 1;
+
+ ret = fdt_setprop(blob, nodeoffset, "model", module_name, len);
+ if (ret < 0)
+ printf("ft_blob_update(): cannot set /model property err:%s\n",
+ fdt_strerror(ret));
+
+ memory_data[0] = cpu_to_be32(bd->bi_memstart);
+ memory_data[1] = cpu_to_be32(bd->bi_memsize);
+
+ nodeoffset = fdt_find_node_by_path (blob, "/memory");
+ if (nodeoffset >= 0) {
+ ret = fdt_setprop(blob, nodeoffset, "reg", memory_data,
+ sizeof(memory_data));
+ if (ret < 0)
+ printf("ft_blob_update): cannot set /memory/reg "
+ "property err:%s\n", fdt_strerror(ret));
+ }
+ else {
+ /* memory node is required in dts */
+ printf("ft_blob_update(): cannot find /memory node "
+ "err:%s\n", fdt_strerror(nodeoffset));
+ }
+}
+#endif /* defined(CONFIG_OF_BOARD_SETUP) && defined(CONFIG_OF_LIBFDT) */
+
+
+/*
+ * Read HW ID from I2C EEPROM and detect the modue we are running on. Note
+ * that we need to use local variable for readout, because global data is not
+ * writable yet (and we'll have to redo the readout later on).
+ */
+int checkboard(void)
+{
+ hw_id_t hw_id_tmp;
+ char module_name_tmp[MODULE_NAME_MAXLEN] = "";
+
+ /*
+ * We need I2C to access HW ID data from EEPROM, so we call i2c_init()
+ * here despite the fact that it will be called again later on. We
+ * also use a little trick to silence I2C-related output.
+ */
+ gd->flags |= GD_FLG_SILENT;
+ i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ gd->flags &= ~GD_FLG_SILENT;
+
+ read_hw_id(hw_id_tmp);
+ identify_module(hw_id_tmp); /* this sets gd->board_type */
+ compose_module_name(hw_id_tmp, module_name_tmp);
+
+ if (gd->board_type != CM5200_UNKNOWN_MODULE)
+ printf("Board: %s\n", module_name_tmp);
+ else
+ printf("Board: unrecognized cm5200 module (%s)\n",
+ module_name_tmp);
+
+ return 0;
+}
+
+
+int board_early_init_r(void)
+{
+ /*
+ * Now, when we are in RAM, enable flash write access for detection
+ * process. Note that CS_BOOT cannot be cleared when executing in
+ * flash.
+ */
+ *(vu_long *)MPC5XXX_BOOTCS_CFG &= ~0x1; /* clear RO */
+
+ /* Now that we can write to global data, read HW ID again. */
+ read_hw_id(hw_id);
+ return 0;
+}
+
+
+#ifdef CONFIG_POST
+int post_hotkeys_pressed(void)
+{
+ return 0;
+}
+#endif /* CONFIG_POST */
+
+
+#if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER)
+void post_word_store(ulong a)
+{
+ vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
+ *save_addr = a;
+}
+
+
+ulong post_word_load(void)
+{
+ vu_long *save_addr = (vu_long *)(MPC5XXX_SRAM + MPC5XXX_SRAM_POST_SIZE);
+ return *save_addr;
+}
+#endif /* CONFIG_POST || CONFIG_LOGBUFFER */
+
+
+#ifdef CONFIG_MISC_INIT_R
+int misc_init_r(void)
+{
+#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
+ uchar buf[6];
+ char str[18];
+ char hostname[MODULE_NAME_MAXLEN];
+
+ /* Read ethaddr from EEPROM */
+ if (i2c_read(CFG_I2C_EEPROM, CONFIG_MAC_OFFSET, 2, buf, 6) == 0) {
+ sprintf(str, "%02X:%02X:%02X:%02X:%02X:%02X",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+ /* Check if MAC addr is owned by Schindler */
+ if (strstr(str, "00:06:C3") != str)
+ printf(LOG_PREFIX "Warning - Illegal MAC address (%s)"
+ " in EEPROM.\n", str);
+ else {
+ printf(LOG_PREFIX "Using MAC (%s) from I2C EEPROM\n",
+ str);
+ setenv("ethaddr", str);
+ }
+ } else {
+ printf(LOG_PREFIX "Warning - Unable to read MAC from I2C"
+ " device at address %02X:%04X\n", CFG_I2C_EEPROM,
+ CONFIG_MAC_OFFSET);
+ }
+#endif /* defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C) */
+ if (!getenv("ethaddr"))
+ printf(LOG_PREFIX "MAC address not set, networking is not "
+ "operational\n");
+
+ /* set the hostname appropriate to the module we're running on */
+ compose_hostname(hw_id, hostname);
+ setenv("hostname", hostname);
+
+ return 0;
+}
+#endif /* CONFIG_MISC_INIT_R */
+
+
+#ifdef CONFIG_LAST_STAGE_INIT
+int last_stage_init(void)
+{
+#ifdef CONFIG_USB_STORAGE
+ cm5200_fwupdate();
+#endif /* CONFIG_USB_STORAGE */
+ return 0;
+}
+#endif /* CONFIG_LAST_STAGE_INIT */
+
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+ ft_blob_update(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/cm5200/cm5200.h b/board/cm5200/cm5200.h
new file mode 100644
index 0000000..b2ea5ce
--- /dev/null
+++ b/board/cm5200/cm5200.h
@@ -0,0 +1,184 @@
+/*
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * Author: Bartlomiej Sieka <tur@semihalf.com>
+ * Author: Grzegorz Bernacki <gjb@semihalf.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _CM5200_H
+#define _CM5200_H
+
+
+/*
+ * Definitions and declarations for the modules of the cm5200 platform. Mostly
+ * related to reading the hardware identification data (HW ID) from the I2C
+ * EEPROM, detection of the particular module we are executing on, and
+ * appropriate SDRAM controller initialization.
+ */
+
+
+#define CM5200_UNKNOWN_MODULE 0xffffffff
+
+enum {
+ DEVICE_NAME, /* 0 */
+ GENERATION, /* 1 */
+ PCB_NAME, /* 2 */
+ FORM, /* 3 */
+ VERSION, /* 4 */
+ IDENTIFICATION_NUMBER, /* 5 */
+ MAJOR_SW_VERSION, /* 6 */
+ MINOR_SW_VERSION, /* 7 */
+ /* add new alements above this line */
+ HW_ID_ELEM_COUNT /* count */
+};
+
+/*
+ * Sect. 4.1 "CM1.Q/CMU1.Q Supervisory Microcontroller Interface Definition"
+ */
+
+#define DEVICE_NAME_OFFSET 0x02
+#define GENERATION_OFFSET 0x0b
+#define PCB_NAME_OFFSET 0x0c
+#define FORM_OFFSET 0x15
+#define VERSION_OFFSET 0x16
+#define IDENTIFICATION_NUMBER_OFFSET 0x19
+#define MAJOR_SW_VERSION_OFFSET 0x0480
+#define MINOR_SW_VERSION_OFFSET 0x0481
+
+
+#define DEVICE_NAME_LEN 0x09
+#define GENERATION_LEN 0x01
+#define PCB_NAME_LEN 0x09
+#define FORM_LEN 0x01
+#define VERSION_LEN 0x03
+#define IDENTIFICATION_NUMBER_LEN 0x09
+#define MAJOR_SW_VERSION_LEN 0x01
+#define MINOR_SW_VERSION_LEN 0x01
+
+#define HW_ID_ELEM_MAXLEN 0x09 /* MAX(XXX_LEN) */
+
+/* entire HW ID in EEPROM is 64 bytes, so longer module name is unlikely */
+#define MODULE_NAME_MAXLEN 64
+
+
+/* storage for HW ID read from EEPROM */
+typedef char hw_id_t[HW_ID_ELEM_COUNT][HW_ID_ELEM_MAXLEN];
+
+
+/* HW ID layout in EEPROM */
+static struct {
+ unsigned int offset;
+ unsigned int length;
+} hw_id_format[HW_ID_ELEM_COUNT] = {
+ {DEVICE_NAME_OFFSET, DEVICE_NAME_LEN},
+ {GENERATION_OFFSET, GENERATION_LEN},
+ {PCB_NAME_OFFSET, PCB_NAME_LEN},
+ {FORM_OFFSET, FORM_LEN},
+ {VERSION_OFFSET, VERSION_LEN},
+ {IDENTIFICATION_NUMBER_OFFSET, IDENTIFICATION_NUMBER_LEN},
+ {MAJOR_SW_VERSION_OFFSET, MAJOR_SW_VERSION_LEN},
+ {MINOR_SW_VERSION_OFFSET, MINOR_SW_VERSION_LEN},
+};
+
+
+/* HW ID data found in EEPROM on supported modules */
+static char *cm1_qa_hw_id[HW_ID_ELEM_COUNT] = {
+ "CM", /* DEVICE_NAME */
+ "1", /* GENERATION */
+ "CM1", /* PCB_NAME */
+ "Q", /* FORM */
+ "A", /* VERSION */
+ "591881", /* IDENTIFICATION_NUMBER */
+ "", /* MAJOR_SW_VERSION */
+ "", /* MINOR_SW_VERSION */
+};
+
+static char *cm11_qa_hw_id[HW_ID_ELEM_COUNT] = {
+ "CM", /* DEVICE_NAME */
+ "1", /* GENERATION */
+ "CM11", /* PCB_NAME */
+ "Q", /* FORM */
+ "A", /* VERSION */
+ "594200", /* IDENTIFICATION_NUMBER */
+ "", /* MAJOR_SW_VERSION */
+ "", /* MINOR_SW_VERSION */
+};
+
+static char *cmu1_qa_hw_id[HW_ID_ELEM_COUNT] = {
+ "CMU", /* DEVICE_NAME */
+ "1", /* GENERATION */
+ "CMU1", /* PCB_NAME */
+ "Q", /* FORM */
+ "A", /* VERSION */
+ "594128", /* IDENTIFICATION_NUMBER */
+ "", /* MAJOR_SW_VERSION */
+ "", /* MINOR_SW_VERSION */
+};
+
+
+/* list of known modules */
+static char **hw_id_list[] = {
+ cm1_qa_hw_id,
+ cm11_qa_hw_id,
+ cmu1_qa_hw_id,
+};
+
+/* indices to the above list - keep in sync */
+enum {
+ CM1_QA,
+ CM11_QA,
+ CMU1_QA,
+};
+
+
+/* identify modules based on these hw id elements */
+static int hw_id_identify[] = {
+ PCB_NAME,
+ FORM,
+ VERSION,
+};
+
+
+/* Registers' settings for SDRAM controller intialization */
+typedef struct {
+ ulong mode;
+ ulong control;
+ ulong config1;
+ ulong config2;
+} mem_conf_t;
+
+static mem_conf_t k4s561632E = {
+ 0x00CD0000, /* CASL 3, burst length 8 */
+ 0x514F0000,
+ 0xE2333900,
+ 0x8EE70000
+};
+
+static mem_conf_t mt48lc32m16a2 = {
+ 0x00CD0000, /* CASL 3, burst length 8 */
+ 0x514F0000,
+ 0xD2322800,
+ 0x8AD70000
+};
+
+static mem_conf_t* memory_config[] = {
+ &k4s561632E,
+ &mt48lc32m16a2
+};
+
+#endif /* _CM5200_H */
diff --git a/board/cm5200/cmd_cm5200.c b/board/cm5200/cmd_cm5200.c
new file mode 100644
index 0000000..354f2bf
--- /dev/null
+++ b/board/cm5200/cmd_cm5200.c
@@ -0,0 +1,448 @@
+/*
+ * (C) Copyright 2007 Markus Kappeler <markus.kappeler@objectxp.com>
+ *
+ * Adapted for U-Boot 1.2 by Piotr Kruszynski <ppk@semihalf.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+#include <usb.h>
+
+#ifdef CONFIG_CMD_BSP
+
+int do_i2c(char *argv[])
+{
+ unsigned char temp, temp1;
+
+ printf("Starting I2C Test\n"
+ "Please set Jumper:\nI2C SDA 2-3\nI2C SCL 2-3\n\n"
+ "Please press any key to start\n\n");
+ getc();
+
+ temp = 0xf0; /* set io 0-4 as output */
+ i2c_write(CFG_I2C_IO, 3, 1, (uchar *)&temp, 1);
+
+ printf("Press I2C4-7. LED I2C0-3 should have the same state\n\n"
+ "Press any key to stop\n\n");
+
+ while (!tstc()) {
+ i2c_read(CFG_I2C_IO, 0, 1, (uchar *)&temp, 1);
+ temp1 = (temp >> 4) & 0x03;
+ temp1 |= (temp >> 3) & 0x08; /* S302 -> LED303 */
+ temp1 |= (temp >> 5) & 0x04; /* S303 -> LED302 */
+ temp = temp1;
+ i2c_write(CFG_I2C_IO, 1, 1, (uchar *)&temp, 1);
+ }
+ getc();
+
+ return 0;
+}
+
+int do_usbtest(char *argv[])
+{
+ int i;
+ static int usb_stor_curr_dev = -1; /* current device */
+
+ printf("Starting USB Test\n"
+ "Please insert USB Memmory Stick\n\n"
+ "Please press any key to start\n\n");
+ getc();
+
+ usb_stop();
+ printf("(Re)start USB...\n");
+ i = usb_init();
+#ifdef CONFIG_USB_STORAGE
+ /* try to recognize storage devices immediately */
+ if (i >= 0)
+ usb_stor_curr_dev = usb_stor_scan(1);
+#endif /* CONFIG_USB_STORAGE */
+ if (usb_stor_curr_dev >= 0)
+ printf("Found USB Storage Dev continue with Test...\n");
+ else {
+ printf("No USB Storage Device detected.. Stop Test\n");
+ return 1;
+ }
+
+ usb_stor_info();
+
+ printf("stopping USB..\n");
+ usb_stop();
+
+ return 0;
+}
+
+int do_led(char *argv[])
+{
+ int i = 0;
+ struct mpc5xxx_gpt_0_7 *gpt = (struct mpc5xxx_gpt_0_7 *)MPC5XXX_GPT;
+
+ printf("Starting LED Test\n"
+ "Please set Switch S500 all off\n\n"
+ "Please press any key to start\n\n");
+ getc();
+
+ /* configure timer 2-3 for simple GPIO output High */
+ gpt->gpt2.emsr |= 0x00000034;
+ gpt->gpt3.emsr |= 0x00000034;
+
+ (*(vu_long *)MPC5XXX_WU_GPIO_ENABLE) |= 0x80000000;
+ (*(vu_long *)MPC5XXX_WU_GPIO_DIR) |= 0x80000000;
+ printf("Please press any key to stop\n\n");
+ while (!tstc()) {
+ if (i == 1) {
+ (*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) |= 0x80000000;
+ gpt->gpt2.emsr &= ~0x00000010;
+ gpt->gpt3.emsr &= ~0x00000010;
+ } else if (i == 2) {
+ (*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) &= ~0x80000000;
+ gpt->gpt2.emsr &= ~0x00000010;
+ gpt->gpt3.emsr |= 0x00000010;
+ } else if (i >= 3) {
+ (*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) &= ~0x80000000;
+ gpt->gpt3.emsr &= ~0x00000010;
+ gpt->gpt2.emsr |= 0x00000010;
+ i = 0;
+ }
+ i++;
+ udelay(200000);
+ }
+ getc();
+
+ (*(vu_long *)MPC5XXX_WU_GPIO_DATA_O) |= 0x80000000;
+ gpt->gpt2.emsr |= 0x00000010;
+ gpt->gpt3.emsr |= 0x00000010;
+
+ return 0;
+}
+
+int do_rs232(char *argv[])
+{
+ int error_status = 0;
+ struct mpc5xxx_gpio *gpio = (struct mpc5xxx_gpio *)MPC5XXX_GPIO;
+ struct mpc5xxx_psc *psc1 = (struct mpc5xxx_psc *)MPC5XXX_PSC1;
+
+ /* Configure PSC 2-3-6 as GPIO */
+ gpio->port_config &= 0xFF0FF80F;
+
+ switch (simple_strtoul(argv[2], NULL, 10)) {
+ case 1:
+ /* check RTS <-> CTS loop */
+ /* set rts to 0 */
+ printf("Uart 1 test: RX TX tested by using U-Boot\n"
+ "Please connect RTS with CTS on Uart1 plug\n\n"
+ "Press any key to start\n\n");
+ getc();
+
+ psc1->op1 |= 0x01;
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ /* check status at cts */
+ if ((psc1->ip & 0x01) != 0) {
+ error_status = 3;
+ printf("%s: failure at rs232_1, cts status is %d "
+ "(should be 0)\n",
+ __FUNCTION__, (psc1->ip & 0x01));
+ }
+
+ /* set rts to 1 */
+ psc1->op0 |= 0x01;
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ /* check status at cts */
+ if ((psc1->ip & 0x01) != 1) {
+ error_status = 3;
+ printf("%s: failure at rs232_1, cts status is %d "
+ "(should be 1)\n",
+ __FUNCTION__, (psc1->ip & 0x01));
+ }
+ break;
+ case 2:
+ /* set PSC2_0, PSC2_2 as output and PSC2_1, PSC2_3 as input */
+ printf("Uart 2 test: Please use RS232 Loopback plug on UART2\n"
+ "\nPress any key to start\n\n");
+ getc();
+
+ gpio->simple_gpioe &= ~(0x000000F0);
+ gpio->simple_gpioe |= 0x000000F0;
+ gpio->simple_ddr &= ~(0x000000F0);
+ gpio->simple_ddr |= 0x00000050;
+
+ /* check TXD <-> RXD loop */
+ /* set TXD to 1 */
+ gpio->simple_dvo |= (1 << 4);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000020) != 0x00000020) {
+ error_status = 2;
+ printf("%s: failure at rs232_2, rxd status is %d "
+ "(should be 1)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000020) >> 5);
+ }
+
+ /* set TXD to 0 */
+ gpio->simple_dvo &= ~(1 << 4);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000020) != 0x00000000) {
+ error_status = 2;
+ printf("%s: failure at rs232_2, rxd status is %d "
+ "(should be 0)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000020) >> 5);
+ }
+
+ /* check RTS <-> CTS loop */
+ /* set RTS to 1 */
+ gpio->simple_dvo |= (1 << 6);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000080) != 0x00000080) {
+ error_status = 3;
+ printf("%s: failure at rs232_2, cts status is %d "
+ "(should be 1)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000080) >> 7);
+ }
+
+ /* set RTS to 0 */
+ gpio->simple_dvo &= ~(1 << 6);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000080) != 0x00000000) {
+ error_status = 3;
+ printf("%s: failure at rs232_2, cts status is %d "
+ "(should be 0)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000080) >> 7);
+ }
+ break;
+ case 3:
+ /* set PSC3_0, PSC3_2 as output and PSC3_1, PSC3_3 as input */
+ printf("Uart 3 test: Please use RS232 Loopback plug on UART2\n"
+ "\nPress any key to start\n\n");
+ getc();
+
+ gpio->simple_gpioe &= ~(0x00000F00);
+ gpio->simple_gpioe |= 0x00000F00;
+
+ gpio->simple_ddr &= ~(0x00000F00);
+ gpio->simple_ddr |= 0x00000500;
+
+ /* check TXD <-> RXD loop */
+ /* set TXD to 1 */
+ gpio->simple_dvo |= (1 << 8);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000200) != 0x00000200) {
+ error_status = 2;
+ printf("%s: failure at rs232_3, rxd status is %d "
+ "(should be 1)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000200) >> 9);
+ }
+
+ /* set TXD to 0 */
+ gpio->simple_dvo &= ~(1 << 8);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000200) != 0x00000000) {
+ error_status = 2;
+ printf("%s: failure at rs232_3, rxd status is %d "
+ "(should be 0)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000200) >> 9);
+ }
+
+ /* check RTS <-> CTS loop */
+ /* set RTS to 1 */
+ gpio->simple_dvo |= (1 << 10);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000800) != 0x00000800) {
+ error_status = 3;
+ printf("%s: failure at rs232_3, cts status is %d "
+ "(should be 1)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000800) >> 11);
+ }
+
+ /* set RTS to 0 */
+ gpio->simple_dvo &= ~(1 << 10);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if ((gpio->simple_ival & 0x00000800) != 0x00000000) {
+ error_status = 3;
+ printf("%s: failure at rs232_3, cts status is %d "
+ "(should be 0)\n", __FUNCTION__,
+ (gpio->simple_ival & 0x00000800) >> 11);
+ }
+ break;
+ case 4:
+ /* set PSC6_2, PSC6_3 as output and PSC6_0, PSC6_1 as input */
+ printf("Uart 4 test: Please use RS232 Loopback plug on UART2\n"
+ "\nPress any key to start\n\n");
+ getc();
+
+ gpio->simple_gpioe &= ~(0xF0000000);
+ gpio->simple_gpioe |= 0x30000000;
+
+ gpio->simple_ddr &= ~(0xf0000000);
+ gpio->simple_ddr |= 0x30000000;
+
+ (*(vu_long *)MPC5XXX_WU_GPIO_ENABLE) |= 0x30000000;
+ (*(vu_long *)MPC5XXX_WU_GPIO_DIR) &= ~(0x30000000);
+
+ /* check TXD <-> RXD loop */
+ /* set TXD to 1 */
+ gpio->simple_dvo |= (1 << 28);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x10000000) !=
+ 0x10000000) {
+ error_status = 2;
+ printf("%s: failure at rs232_4, rxd status is %d "
+ "(should be 1)\n", __FUNCTION__,
+ ((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
+ 0x10000000) >> 28);
+ }
+
+ /* set TXD to 0 */
+ gpio->simple_dvo &= ~(1 << 28);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x10000000) !=
+ 0x00000000) {
+ error_status = 2;
+ printf("%s: failure at rs232_4, rxd status is %d "
+ "(should be 0)\n", __FUNCTION__,
+ ((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
+ 0x10000000) >> 28);
+ }
+
+ /* check RTS <-> CTS loop */
+ /* set RTS to 1 */
+ gpio->simple_dvo |= (1 << 29);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x20000000) !=
+ 0x20000000) {
+ error_status = 3;
+ printf("%s: failure at rs232_4, cts status is %d "
+ "(should be 1)\n", __FUNCTION__,
+ ((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
+ 0x20000000) >> 29);
+ }
+
+ /* set RTS to 0 */
+ gpio->simple_dvo &= ~(1 << 29);
+
+ /* wait some time before requesting status */
+ udelay(10);
+
+ if (((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) & 0x20000000) !=
+ 0x00000000) {
+ error_status = 3;
+ printf("%s: failure at rs232_4, cts status is %d "
+ "(should be 0)\n", __FUNCTION__,
+ ((*(vu_long *)MPC5XXX_WU_GPIO_DATA_I) &
+ 0x20000000) >> 29);
+ }
+ break;
+ default:
+ printf("%s: invalid rs232 number %s\n", __FUNCTION__, argv[2]);
+ error_status = 1;
+ break;
+ }
+ gpio->port_config |= (CFG_GPS_PORT_CONFIG & 0xFF0FF80F);
+
+ return error_status;
+}
+
+int cmd_fkt(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int rcode = -1;
+
+ switch (argc) {
+ case 2:
+ if (strncmp(argv[1], "i2c", 3) == 0)
+ rcode = do_i2c(argv);
+ else if (strncmp(argv[1], "led", 3) == 0)
+ rcode = do_led(argv);
+ else if (strncmp(argv[1], "usb", 3) == 0)
+ rcode = do_usbtest(argv);
+ break;
+ case 3:
+ if (strncmp(argv[1], "rs232", 3) == 0)
+ rcode = do_rs232(argv);
+ break;
+ }
+
+ switch (rcode) {
+ case -1:
+ printf("Usage:\n"
+ "fkt { i2c | led | usb }\n"
+ "fkt rs232 number\n");
+ rcode = 1;
+ break;
+ case 0:
+ printf("Test passed\n");
+ break;
+ default:
+ printf("Test failed with code: %d\n", rcode);
+ }
+
+ return rcode;
+}
+
+U_BOOT_CMD(
+ fkt, 4, 1, cmd_fkt,
+ "fkt - Function test routines\n",
+ "i2c\n"
+ " - Test I2C communication\n"
+ "fkt led\n"
+ " - Test LEDs\n"
+ "fkt rs232 number\n"
+ " - Test RS232 (loopback plug(s) for RS232 required)\n"
+ "fkt usb\n"
+ " - Test USB communication\n"
+);
+#endif /* CONFIG_CMD_BSP */
diff --git a/board/cm5200/config.mk b/board/cm5200/config.mk
new file mode 100644
index 0000000..7f06139
--- /dev/null
+++ b/board/cm5200/config.mk
@@ -0,0 +1,26 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xfc000000
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
diff --git a/board/cm5200/fwupdate.c b/board/cm5200/fwupdate.c
new file mode 100644
index 0000000..19aa94a
--- /dev/null
+++ b/board/cm5200/fwupdate.c
@@ -0,0 +1,200 @@
+/*
+ * (C) Copyright 2007 Schindler Lift Inc.
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * Author: Michel Marti <mma@objectxp.com>
+ * Adapted for U-Boot 1.2 by Piotr Kruszynski <ppk@semihalf.com>:
+ * - code clean-up
+ * - bugfix for overwriting bootargs by user
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <image.h>
+#include <usb.h>
+#include <fat.h>
+
+#include "fwupdate.h"
+
+extern int do_bootm(cmd_tbl_t *, int, int, char *[]);
+extern long do_fat_read(const char *, void *, unsigned long, int);
+extern int do_fat_fsload(cmd_tbl_t *, int, int, char *[]);
+
+static int load_rescue_image(ulong);
+
+void cm5200_fwupdate(void)
+{
+ cmd_tbl_t *bcmd;
+ char *rsargs;
+ char *tmp = NULL;
+ char ka[16];
+ char *argv[3] = { "bootm", ka, NULL };
+
+ /* Check if rescue system is disabled... */
+ if (getenv("norescue")) {
+ printf(LOG_PREFIX "Rescue System disabled.\n");
+ return;
+ }
+
+ /* Check if we have a USB storage device and load image */
+ if (load_rescue_image(LOAD_ADDR))
+ return;
+
+ bcmd = find_cmd("bootm");
+ if (!bcmd)
+ return;
+
+ sprintf(ka, "%lx", LOAD_ADDR);
+
+ /* prepare our bootargs */
+ rsargs = getenv("rs-args");
+ if (!rsargs)
+ rsargs = RS_BOOTARGS;
+ else {
+ tmp = malloc(strlen(rsargs+1));
+ if (!tmp) {
+ printf(LOG_PREFIX "Memory allocation failed\n");
+ return;
+ }
+ strcpy(tmp, rsargs);
+ rsargs = tmp;
+ }
+
+ setenv("bootargs", rsargs);
+
+ if (rsargs == tmp)
+ free(rsargs);
+
+ printf(LOG_PREFIX "Starting update system (bootargs=%s)...\n", rsargs);
+ do_bootm(bcmd, 0, 2, argv);
+}
+
+static int load_rescue_image(ulong addr)
+{
+ disk_partition_t info;
+ int devno;
+ int partno;
+ int i;
+ char fwdir[64];
+ char nxri[128];
+ char *tmp;
+ char dev[7];
+ char addr_str[16];
+ char *argv[6] = { "fatload", "usb", dev, addr_str, nxri, NULL };
+ block_dev_desc_t *stor_dev = NULL;
+ cmd_tbl_t *bcmd;
+
+ /* Get name of firmware directory */
+ tmp = getenv("fw-dir");
+
+ /* Copy it into fwdir */
+ strncpy(fwdir, tmp ? tmp : FW_DIR, sizeof(fwdir));
+ fwdir[sizeof(fwdir) - 1] = 0; /* Terminate string */
+
+ printf(LOG_PREFIX "Checking for firmware image directory '%s' on USB"
+ " storage...\n", fwdir);
+ usb_stop();
+ if (usb_init() != 0)
+ return 1;
+
+ /* Check for storage device */
+ if (usb_stor_scan(1) != 0) {
+ usb_stop();
+ return 1;
+ }
+
+ /* Detect storage device */
+ for (devno = 0; devno < USB_MAX_STOR_DEV; devno++) {
+ stor_dev = usb_stor_get_dev(devno);
+ if (stor_dev->type != DEV_TYPE_UNKNOWN)
+ break;
+ }
+ if (!stor_dev || stor_dev->type == DEV_TYPE_UNKNOWN) {
+ printf(LOG_PREFIX "No valid storage device found...\n");
+ usb_stop();
+ return 1;
+ }
+
+ /* Detect partition */
+ for (partno = -1, i = 0; i < 6; i++) {
+ if (get_partition_info(stor_dev, i, &info) == 0) {
+ if (fat_register_device(stor_dev, i) == 0) {
+ /* Check if rescue image is present */
+ FW_DEBUG("Looking for firmware directory '%s'"
+ " on partition %d\n", fwdir, i);
+ if (do_fat_read(fwdir, NULL, 0, LS_NO) == -1) {
+ FW_DEBUG("No NX rescue image on "
+ "partition %d.\n", i);
+ partno = -2;
+ } else {
+ partno = i;
+ FW_DEBUG("Partition %d contains "
+ "firmware directory\n", partno);
+ break;
+ }
+ }
+ }
+ }
+
+ if (partno < 0) {
+ switch (partno) {
+ case -1:
+ printf(LOG_PREFIX "Error: No valid (FAT) partition "
+ "detected\n");
+ break;
+ case -2:
+ printf(LOG_PREFIX "Error: No NX rescue image on FAT "
+ "partition\n");
+ break;
+ default:
+ printf(LOG_PREFIX "Error: Failed with code %d\n",
+ partno);
+ }
+ usb_stop();
+ return 1;
+ }
+
+ /* Load the rescue image */
+ bcmd = find_cmd("fatload");
+ if (!bcmd) {
+ printf(LOG_PREFIX "Error - 'fatload' command not present.\n");
+ usb_stop();
+ return 1;
+ }
+
+ tmp = getenv("nx-rescue-image");
+ sprintf(nxri, "%s/%s", fwdir, tmp ? tmp : RESCUE_IMAGE);
+ sprintf(dev, "%d:%d", devno, partno);
+ sprintf(addr_str, "%lx", addr);
+
+ FW_DEBUG("fat_fsload device='%s', addr='%s', file: %s\n",
+ dev, addr_str, nxri);
+
+ if (do_fat_fsload(bcmd, 0, 5, argv) != 0) {
+ usb_stop();
+ return 1;
+ }
+
+ /* Stop USB */
+ usb_stop();
+ return 0;
+}
diff --git a/board/cm5200/fwupdate.h b/board/cm5200/fwupdate.h
new file mode 100644
index 0000000..4e3f1e1
--- /dev/null
+++ b/board/cm5200/fwupdate.h
@@ -0,0 +1,47 @@
+/*
+ * (C) Copyright 2007 Schindler Lift Inc.
+ *
+ * Author: Michel Marti <mma@objectxp.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __FW_UPDATE_H
+#define __FW_UPDATE_H
+
+/* Default prefix for output messages */
+#define LOG_PREFIX "CM5200:"
+
+/* Extra debug macro */
+#ifdef CONFIG_FWUPDATE_DEBUG
+#define FW_DEBUG(fmt...) printf(LOG_PREFIX fmt)
+#else
+#define FW_DEBUG(fmt...)
+#endif
+
+/* Name of the directory holding firmware images */
+#define FW_DIR "nx-fw"
+#define RESCUE_IMAGE "nxrs.img"
+#define LOAD_ADDR 0x400000
+#define RS_BOOTARGS "ramdisk=8192K"
+
+/* Main function for fwupdate */
+void cm5200_fwupdate(void);
+
+#endif /* __FW_UPDATE_H */
diff --git a/board/motionpro/u-boot.lds b/board/cm5200/u-boot.lds
similarity index 100%
rename from board/motionpro/u-boot.lds
rename to board/cm5200/u-boot.lds
diff --git a/board/cmc_pu2/Makefile b/board/cmc_pu2/Makefile
old mode 100644
new mode 100755
index d445f28..f7a1360
--- a/board/cmc_pu2/Makefile
+++ b/board/cmc_pu2/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS := cmc_pu2.o at45.o flash.o load_sernum_ethaddr.o
+COBJS := cmc_pu2.o flash.o load_sernum_ethaddr.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/cmc_pu2/at45.c b/board/cmc_pu2/at45.c
deleted file mode 100644
index 3c00132..0000000
--- a/board/cmc_pu2/at45.c
+++ /dev/null
@@ -1,621 +0,0 @@
-/* Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <config.h>
-#include <common.h>
-#include <asm/hardware.h>
-
-#ifdef CONFIG_HAS_DATAFLASH
-#include <dataflash.h>
-
-#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
-the Continuous Array Read function */
-
-/* AC Characteristics */
-/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
-#define DATAFLASH_TCSS (0xC << 16)
-#define DATAFLASH_TCHS (0x1 << 24)
-
-#define AT91C_TIMEOUT_WRDY 200000
-#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0 : NPCS0 %1110 */
-#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3 : NPCS3 %0111 */
-
-void AT91F_SpiInit(void) {
-
-/*-------------------------------------------------------------------*/
-/* SPI DataFlash Init */
-/*-------------------------------------------------------------------*/
- /* Configure PIOs */
- AT91C_BASE_PIOA->PIO_ASR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- AT91C_BASE_PIOA->PIO_PDR = AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI | AT91C_PA5_NPCS2 |
- AT91C_PA6_NPCS3 | AT91C_PA0_MISO | AT91C_PA2_SPCK;
- /* Enable CLock */
- AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
-
- /* Reset the SPI */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
-
- /* Configure SPI in Master Mode with No CS selected !!! */
- AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
-
- /* Configure CS0 and CS3 */
- *(AT91C_SPI_CSR + 0) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
- *(AT91C_SPI_CSR + 3) = AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) | (AT91C_SPI_DLYBCT &
- DATAFLASH_TCHS) | ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
-
-}
-
-void AT91F_SpiEnable(int cs) {
- switch(cs) {
- case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) & AT91C_SPI_PCS);
- break;
- case 3: /* Configure SPI CS3 for Serial DataFlash Card */
- /* Set up PIO SDC_TYPE to switch on DataFlash Card and not MMC/SDCard */
- AT91C_BASE_PIOB->PIO_PER = AT91C_PIO_PB7; /* Set in PIO mode */
- AT91C_BASE_PIOB->PIO_OER = AT91C_PIO_PB7; /* Configure in output */
- /* Clear Output */
- AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
- /* Configure PCS */
- AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
- AT91C_BASE_SPI->SPI_MR |= ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
- break;
- }
-
- /* SPI_Enable */
- AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN;
-}
-
-/*----------------------------------------------------------------------------*/
-/* \fn AT91F_SpiWrite */
-/* \brief Set the PDC registers for a transfert */
-/*----------------------------------------------------------------------------*/
-unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
-{
- unsigned int timeout;
-
- pDesc->state = BUSY;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
-
- /* Initialize the Transmit and Receive Pointer */
- AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
- AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
-
- /* Intialize the Transmit and Receive Counters */
- AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
- AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
-
- if ( pDesc->tx_data_size != 0 ) {
- /* Initialize the Next Transmit and Next Receive Pointer */
- AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
- AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
-
- /* Intialize the Next Transmit and Next Receive Counters */
- AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
- AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
- }
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked();
- timeout = 0;
-
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
- while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
- AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
- pDesc->state = IDLE;
-
- if (timeout >= CFG_SPI_WRITE_TOUT){
- printf("Error Timeout\n\r");
- return DATAFLASH_ERROR;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashSendCommand */
-/* \brief Generic function to send a command to the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
- AT91PS_DataFlash pDataFlash,
- unsigned char OpCode,
- unsigned int CmdSize,
- unsigned int DataflashAddress)
-{
- unsigned int adr;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* process the address to obtain page address and byte address */
- adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) << pDataFlash->pDevice->page_offset) + (DataflashAddress % (pDataFlash->pDevice->pages_size));
-
- /* fill the command buffer */
- pDataFlash->pDataFlashDesc->command[0] = OpCode;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x0F000000) >> 24);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)(adr & 0x000000FF);
- } else {
- pDataFlash->pDataFlashDesc->command[1] = (unsigned char)((adr & 0x00FF0000) >> 16);
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)((adr & 0x0000FF00) >> 8);
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(adr & 0x000000FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- }
- pDataFlash->pDataFlashDesc->command[5] = 0;
- pDataFlash->pDataFlashDesc->command[6] = 0;
- pDataFlash->pDataFlashDesc->command[7] = 0;
-
- /* Initialize the SpiData structure for the spi write fuction */
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize ;
-
- /* send the command and read the data */
- return AT91F_SpiWrite (pDataFlash->pDataFlashDesc);
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashGetStatus */
-/* \brief Read the status register of the dataflash */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
-{
- AT91S_DataFlashStatus status;
-
- /* if a transfert is in progress ==> return 0 */
- if( (pDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* first send the read status command (D7H) */
- pDesc->command[0] = DB_STATUS;
- pDesc->command[1] = 0;
-
- pDesc->DataFlash_state = GET_STATUS;
- pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */
- pDesc->tx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_pt = pDesc->command ;
- pDesc->rx_cmd_size = 2 ;
- pDesc->tx_cmd_size = 2 ;
- status = AT91F_SpiWrite (pDesc);
-
- pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
-
- return status;
-}
-
-
-/*----------------------------------------------------------------------*/
-/* \fn AT91F_DataFlashWaitReady */
-/* \brief wait for dataflash ready (bit7 of the status register == 1) */
-/*----------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc pDataFlashDesc, unsigned int timeout)
-{
- pDataFlashDesc->DataFlash_state = IDLE;
-
- do {
- AT91F_DataFlashGetStatus(pDataFlashDesc);
- timeout--;
- } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) && (timeout > 0) );
-
- if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
- return DATAFLASH_ERROR;
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashContinuousRead */
-/* Object : Continuous stream Read */
-/* Input Parameters : DataFlash Service */
-/* : <src> = dataflash address */
-/* : <*dataBuffer> = data buffer pointer */
-/* : <sizeToRead> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
- AT91PS_DataFlash pDataFlash,
- int src,
- unsigned char *dataBuffer,
- int sizeToRead )
-{
- AT91S_DataFlashStatus status;
- /* Test the size to read in the device */
- if ( (src + sizeToRead) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
- pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
-
- status = AT91F_DataFlashSendCommand (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
- /* Send the command to the dataflash */
- return(status);
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashPagePgmBuf */
-/* Object : Main memory page program through buffer 1 or buffer 2 */
-/* Input Parameters : DataFlash Service */
-/* : <*src> = Source buffer */
-/* : <dest> = dataflash destination address */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int SizeToWrite)
-{
- int cmdsize;
- pDataFlash->pDataFlashDesc->tx_data_pt = src ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->rx_data_pt = src;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
-
- cmdsize = 4;
- /* Send the command to the dataflash */
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_MainMemoryToBufferTransfert */
-/* Object : Read a page in the SRAM Buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_PAGE_2_BUF1_TRF) && (BufferCommand != DB_PAGE_2_BUF2_TRF))
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*----------------------------------------------------------------------------- */
-/* Function Name : AT91F_DataFlashWriteBuffer */
-/* Object : Write data to the internal sram buffer 1 or 2 */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to write buffer1 or buffer2 */
-/* : <*dataBuffer> = data buffer to write */
-/* : <bufferAddress> = address in the internal buffer */
-/* : <SizeToWrite> = data buffer size */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned char *dataBuffer,
- unsigned int bufferAddress,
- int SizeToWrite )
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- if ((BufferCommand != DB_BUF1_WRITE) && (BufferCommand != DB_BUF2_WRITE))
- return DATAFLASH_BAD_COMMAND;
-
- /* buffer address must be lower than page size */
- if (bufferAddress > pDataFlash->pDevice->pages_size)
- return DATAFLASH_BAD_ADDRESS;
-
- if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
- return DATAFLASH_BUSY;
-
- /* Send first Write Command */
- pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
- pDataFlash->pDataFlashDesc->command[1] = 0;
- if (pDataFlash->pDevice->pages_number >= 16384) {
- pDataFlash->pDataFlashDesc->command[2] = 0;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[4] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- cmdsize = 5;
- } else {
- pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ;
- pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ;
- pDataFlash->pDataFlashDesc->command[4] = 0;
- cmdsize = 4;
- }
-
- pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize ;
- pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ;
- pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize ;
-
- pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ;
- pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ;
- pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ;
-
- return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PageErase */
-/* Object : Erase a page */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PageErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int page)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize, page*pDataFlash->pDevice->pages_size));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_BlockErase */
-/* Object : Erase a Block */
-/* Input Parameters : DataFlash Service */
-/* : Page concerned */
-/* : */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_BlockErase(
- AT91PS_DataFlash pDataFlash,
- unsigned int block)
-{
- int cmdsize;
- /* Test if the buffer command is legal */
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize, block*8*pDataFlash->pDevice->pages_size));
-}
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_WriteBufferToMain */
-/* Object : Write buffer to the main memory */
-/* Input Parameters : DataFlash Service */
-/* : <BufferCommand> = command to send to buffer1 or buffer2 */
-/* : <dest> = main memory address */
-/* Return value : State of the dataflash */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_WriteBufferToMain (
- AT91PS_DataFlash pDataFlash,
- unsigned char BufferCommand,
- unsigned int dest )
-{
- int cmdsize;
- /* Test if the buffer command is correct */
- if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
- (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_PGM) &&
- (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
- return DATAFLASH_BAD_COMMAND;
-
- /* no data to transmit or receive */
- pDataFlash->pDataFlashDesc->tx_data_size = 0;
-
- cmdsize = 4;
- if (pDataFlash->pDevice->pages_number >= 16384)
- cmdsize = 5;
- /* Send the command to the dataflash */
- return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize, dest));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_PartialPageWrite */
-/* Object : Erase partielly a page */
-/* Input Parameters : <page> = page number */
-/* : <AdrInpage> = adr to begin the fading */
-/* : <length> = Number of bytes to erase */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_PartialPageWrite (
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- unsigned int dest,
- unsigned int size)
-{
- unsigned int page;
- unsigned int AdrInPage;
-
- page = dest / (pDataFlash->pDevice->pages_size);
- AdrInPage = dest % (pDataFlash->pDevice->pages_size);
-
- /* Read the contents of the page in the Sram Buffer */
- AT91F_MainMemoryToBufferTransfert(pDataFlash, DB_PAGE_2_BUF1_TRF, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- /*Update the SRAM buffer */
- AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, AdrInPage, size);
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Erase page if a 128 Mbits device */
- if (pDataFlash->pDevice->pages_number >= 16384) {
- AT91F_PageErase(pDataFlash, page);
- /* Rewrite the modified Sram Buffer in the main memory */
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
-
- /* Rewrite the modified Sram Buffer in the main memory */
- return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM, (page*pDataFlash->pDevice->pages_size)));
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashWrite */
-/* Object : */
-/* Input Parameters : <*src> = Source buffer */
-/* : <dest> = dataflash adress */
-/* : <size> = data buffer size */
-/*------------------------------------------------------------------------------*/
-AT91S_DataFlashStatus AT91F_DataFlashWrite(
- AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- int dest,
- int size )
-{
- unsigned int length;
- unsigned int page;
- unsigned int status;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number)))
- return DATAFLASH_MEMORY_OVERFLOW;
-
- /* If destination does not fit a page start address */
- if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) {
- length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size)));
-
- if (size < length)
- length = size;
-
- if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= length;
- dest += length;
- src += length;
- }
-
- while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
- /* program dataflash page */
- page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
-
- status = AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src, 0, pDataFlash->pDevice->pages_size);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- status = AT91F_PageErase(pDataFlash, page);
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- if (!status)
- return DATAFLASH_ERROR;
-
- status = AT91F_WriteBufferToMain (pDataFlash, DB_BUF1_PAGE_PGM, dest);
- if(!status)
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
-
- /* Update size, source and destination pointers */
- size -= pDataFlash->pDevice->pages_size ;
- dest += pDataFlash->pDevice->pages_size ;
- src += pDataFlash->pDevice->pages_size ;
- }
-
- /* If still some bytes to read */
- if ( size > 0 ) {
- /* program dataflash page */
- if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
- return DATAFLASH_ERROR;
-
- AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY);
- }
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataFlashRead */
-/* Object : Read a block in dataflash */
-/* Input Parameters : */
-/* Return value : */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataFlashRead(
- AT91PS_DataFlash pDataFlash,
- unsigned long addr,
- unsigned long size,
- char *buffer)
-{
- unsigned long SizeToRead;
-
- AT91F_SpiEnable(pDataFlash->pDevice->cs);
-
- if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- while (size) {
- SizeToRead = (size < 0x8000)? size:0x8000;
-
- if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
- return -1;
-
- if (AT91F_DataFlashContinuousRead (pDataFlash, addr, buffer, SizeToRead) != DATAFLASH_OK)
- return -1;
-
- size -= SizeToRead;
- addr += SizeToRead;
- buffer += SizeToRead;
- }
-
- return DATAFLASH_OK;
-}
-
-
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashProbe */
-/* Object : */
-/* Input Parameters : */
-/* Return value : Dataflash status register */
-/*------------------------------------------------------------------------------*/
-int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc)
-{
- AT91F_SpiEnable(cs);
- AT91F_DataFlashGetStatus(pDesc);
- return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
-}
-
-#endif
diff --git a/board/cmc_pu2/cmc_pu2.c b/board/cmc_pu2/cmc_pu2.c
index 9ae3c42..374cd07 100644
--- a/board/cmc_pu2/cmc_pu2.c
+++ b/board/cmc_pu2/cmc_pu2.c
@@ -155,7 +155,7 @@
}
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -175,5 +175,5 @@
p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/cmi/u-boot.lds b/board/cmi/u-boot.lds
deleted file mode 100644
index 5b03fef..0000000
--- a/board/cmi/u-boot.lds
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
- * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-/* . = env_start;
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
-*/
-}
diff --git a/board/cobra5272/Makefile b/board/cobra5272/Makefile
index cf07cf4..be704b7 100644
--- a/board/cobra5272/Makefile
+++ b/board/cobra5272/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o
+COBJS = $(BOARD).o flash.o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/cobra5272/cobra5272.c b/board/cobra5272/cobra5272.c
index 26adb4a..86c7ee1 100644
--- a/board/cobra5272/cobra5272.c
+++ b/board/cobra5272/cobra5272.c
@@ -22,8 +22,7 @@
*/
#include <common.h>
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
+#include <asm/immap.h>
int checkboard (void)
@@ -35,7 +34,7 @@
long int initdram (int board_type)
{
- volatile sdramctrl_t *sdp = (sdramctrl_t *) (CFG_MBAR + MCFSIM_SDCR);
+ volatile sdramctrl_t *sdp = (sdramctrl_t *) (MMAP_SDRAM);
sdp->sdram_sdtr = 0xf539;
sdp->sdram_sdcr = 0x4211;
diff --git a/board/cobra5272/mii.c b/board/cobra5272/mii.c
new file mode 100644
index 0000000..fadcbb3
--- /dev/null
+++ b/board/cobra5272/mii.c
@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ if (setclear) {
+ gpio->gpio_pbcnt |= GPIO_PBCNT_E_MDC | GPIO_PBCNT_E_RXER | GPIO_PBCNT_E_RXD1 | GPIO_PBCNT_E_RXD2 | GPIO_PBCNT_E_RXD3 | GPIO_PBCNT_E_TXD1 | GPIO_PBCNT_E_TXD2 | GPIO_PBCNT_E_TXD3;
+ } else {
+ }
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_AMD79C874VC 0x0022561B /* AMD 79C874 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_AMD79C874VC "AMD79C874VC"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ strcpy(info->phy_name,
+ STR_ID_AMD79C874VC);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ printf(STR_ID_AMD79C874VC);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+int mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/cogent/config.mk b/board/cogent/config.mk
index ee77939..35a5ed3 100644
--- a/board/cogent/config.mk
+++ b/board/cogent/config.mk
@@ -29,3 +29,5 @@
TEXT_BASE = 0xfff00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)
+
+LDSCRIPT := $(SRCTREE)/board/cogent/u-boot.lds
diff --git a/board/cogent/serial.c b/board/cogent/serial.c
index 2b595a8..d9c27be 100644
--- a/board/cogent/serial.c
+++ b/board/cogent/serial.c
@@ -90,7 +90,7 @@
#endif /* CONS_NONE */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && \
+#if defined(CONFIG_CMD_KGDB) && \
defined(CONFIG_KGDB_NONE)
#if CONFIG_KGDB_INDEX == CONFIG_CONS_INDEX
diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds
index 5ce2694..d87a39b 100644
--- a/board/cogent/u-boot.lds
+++ b/board/cogent/u-boot.lds
@@ -55,7 +55,6 @@
{
*(.text)
common/environment.o(.text)
- *(.fixup)
*(.got1)
}
_etext = .;
diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c
index 51b0085..79eb473 100644
--- a/board/cpc45/cpc45.c
+++ b/board/cpc45/cpc45.c
@@ -240,7 +240,7 @@
return (0);
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#ifdef CFG_PCMCIA_MEM_ADDR
volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
@@ -257,7 +257,7 @@
return rc;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
# ifdef CONFIG_IDE_LED
void ide_led (uchar led, uchar status)
diff --git a/board/cpc45/pd67290.c b/board/cpc45/pd67290.c
index 6ca3e7b..d8f4be5 100644
--- a/board/cpc45/pd67290.c
+++ b/board/cpc45/pd67290.c
@@ -772,7 +772,7 @@
return rc;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_off (void)
{
printf ("Disable PCMCIA " PCMCIA_SLOT_MSG "\n");
diff --git a/board/cpc45/u-boot.lds b/board/cpc45/u-boot.lds
deleted file mode 100644
index 9ea26aa..0000000
--- a/board/cpc45/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cpu86/cpu86.c b/board/cpu86/cpu86.c
index 3eb5b35..0eb94ef 100644
--- a/board/cpu86/cpu86.c
+++ b/board/cpu86/cpu86.c
@@ -312,7 +312,7 @@
return (psize);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/cpu86/u-boot.lds b/board/cpu86/u-boot.lds
deleted file mode 100644
index 05f29c6..0000000
--- a/board/cpu86/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/cpu87/cpu87.c b/board/cpu87/cpu87.c
index 9fecdd0..a2fd193 100644
--- a/board/cpu87/cpu87.c
+++ b/board/cpu87/cpu87.c
@@ -321,7 +321,7 @@
return (psize);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/cpu87/u-boot.lds b/board/cpu87/u-boot.lds
deleted file mode 100644
index fb7e665..0000000
--- a/board/cpu87/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/csb637/csb637.c b/board/csb637/csb637.c
index aeb1a13..fbc3c87 100644
--- a/board/csb637/csb637.c
+++ b/board/csb637/csb637.c
@@ -57,7 +57,7 @@
}
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -77,5 +77,5 @@
p_phyops->AutoNegotiate = bcm5221_AutoNegotiate;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/cu824/u-boot.lds b/board/cu824/u-boot.lds
deleted file mode 100644
index 7be85e4..0000000
--- a/board/cu824/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/dave/PPChameleonEVB/nand.c b/board/dave/PPChameleonEVB/nand.c
index f5c3dd9..09c0b04 100644
--- a/board/dave/PPChameleonEVB/nand.c
+++ b/board/dave/PPChameleonEVB/nand.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
@@ -115,4 +115,4 @@
nand->options = NAND_SAMSUNG_LP_OPTIONS;
return 0;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
diff --git a/board/davinci/dv-evm/Makefile b/board/davinci/dv-evm/Makefile
new file mode 100644
index 0000000..fa00138
--- /dev/null
+++ b/board/davinci/dv-evm/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := dv_board.o
+SOBJS := board_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak *~ .depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/davinci/dv-evm/board_init.S b/board/davinci/dv-evm/board_init.S
new file mode 100644
index 0000000..22d8adc
--- /dev/null
+++ b/board/davinci/dv-evm/board_init.S
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl dv_board_init
+dv_board_init:
+
+ mov pc, lr
diff --git a/board/davinci/dv-evm/config.mk b/board/davinci/dv-evm/config.mk
new file mode 100644
index 0000000..aa89d0e
--- /dev/null
+++ b/board/davinci/dv-evm/config.mk
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2003
+# Texas Instruments, <www.ti.com>
+# Swaminathan <swami.iyer@ti.com>
+#
+# Davinci EVM board (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# Davinci EVM has 1 bank of 256 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 9000'0000
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# Visioneering Corp. Sonata board (ARM926EJS) cpu
+#
+# Sonata board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu
+#
+# Schmoogie board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+#
+# we load ourself to 8108 '0000
+#
+#
+
+#Provide at least 16MB spacing between us and the Linux Kernel image
+TEXT_BASE = 0x81080000
diff --git a/board/davinci/dv-evm/dv_board.c b/board/davinci/dv-evm/dv_board.c
new file mode 100644
index 0000000..dce821b
--- /dev/null
+++ b/board/davinci/dv-evm/dv_board.c
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+#define MACH_TYPE_DAVINCI_EVM 901
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void i2c_init(int speed, int slaveaddr);
+extern void timer_init(void);
+extern int eth_hw_init(void);
+extern phy_t phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+ dv_reg_p mdstat, mdctl;
+
+ if (id >= DAVINCI_LPSC_GEM)
+ return; /* Don't work on DSP Power Domain */
+
+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+ while (REG(PSC_PTSTAT) & 0x01) {;}
+
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ /* Special treatment for some modules as for sprue14 p.7.4.2 */
+ if ( (id == DAVINCI_LPSC_VPSSSLV) ||
+ (id == DAVINCI_LPSC_EMAC) ||
+ (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
+ (id == DAVINCI_LPSC_MDIO) ||
+ (id == DAVINCI_LPSC_USB) ||
+ (id == DAVINCI_LPSC_ATA) ||
+ (id == DAVINCI_LPSC_VLYNQ) ||
+ (id == DAVINCI_LPSC_UHPI) ||
+ (id == DAVINCI_LPSC_DDR_EMIF) ||
+ (id == DAVINCI_LPSC_AEMIF) ||
+ (id == DAVINCI_LPSC_MMC_SD) ||
+ (id == DAVINCI_LPSC_MEMSTICK) ||
+ (id == DAVINCI_LPSC_McBSP) ||
+ (id == DAVINCI_LPSC_GPIO)
+ )
+ *mdctl |= 0x200;
+
+ REG(PSC_PTCMD) = 0x01;
+
+ while (REG(PSC_PTSTAT) & 0x03) {;}
+ while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */
+}
+
+void dsp_on(void)
+{
+ int i;
+
+ if (REG(PSC_PDSTAT1) & 0x1f)
+ return; /* Already on */
+
+ REG(PSC_GBLCTL) |= 0x01;
+ REG(PSC_PDCTL1) |= 0x01;
+ REG(PSC_PDCTL1) &= ~0x100;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+ REG(PSC_PTCMD) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (REG(PSC_EPCPR) & 0x02)
+ break;
+ }
+
+ REG(PSC_CHP_SHRTSW) = 0x01;
+ REG(PSC_PDCTL1) |= 0x100;
+ REG(PSC_EPCCR) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (!(REG(PSC_PTSTAT) & 0x02))
+ break;
+ }
+
+ REG(PSC_GBLCTL) &= ~0x1f;
+}
+
+
+int board_init(void)
+{
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_EVM;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /* Workaround for TMS320DM6446 errata 1.3.22 */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /* Power on required peripherals */
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+ lpsc_on(DAVINCI_LPSC_I2C);
+ lpsc_on(DAVINCI_LPSC_UART0);
+ lpsc_on(DAVINCI_LPSC_TIMER1);
+ lpsc_on(DAVINCI_LPSC_GPIO);
+
+ /* Powerup the DSP */
+ dsp_on();
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= 1;
+
+ /* Enable EMAC and AEMIF pins */
+ REG(PINMUX0) = 0x80000c1f;
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= (1 << 7);
+
+ /* Set the Bus Priority Register to appropriate value */
+ REG(VBPR) = 0x20;
+
+ timer_init();
+
+ return(0);
+}
+
+int misc_init_r (void)
+{
+ u_int8_t tmp[20], buf[10];
+ int i = 0;
+ int clk = 0;
+
+ clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+ printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
+ printf ("DDR Clock : %dMHz\n", (clk / 2));
+
+ /* Set Ethernet MAC address from EEPROM */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
+ printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
+ } else {
+ tmp[0] = 0xff;
+ for (i = 0; i < 6; i++)
+ tmp[0] &= buf[i];
+
+ if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
+ sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+ setenv("ethaddr", (char *)&tmp[0]);
+ }
+ }
+
+ if (!eth_hw_init()) {
+ printf("ethernet init failed!\n");
+ } else {
+ printf("ETH PHY : %s\n", phy.name);
+ }
+
+ i2c_read (0x39, 0x00, 1, (u_int8_t *)&i, 1);
+
+ setenv ("videostd", ((i & 0x80) ? "pal" : "ntsc"));
+
+ return(0);
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return(0);
+}
diff --git a/board/davinci/dv-evm/u-boot.lds b/board/davinci/dv-evm/u-boot.lds
new file mode 100644
index 0000000..710b2a2
--- /dev/null
+++ b/board/davinci/dv-evm/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/davinci/schmoogie/Makefile b/board/davinci/schmoogie/Makefile
new file mode 100644
index 0000000..fa00138
--- /dev/null
+++ b/board/davinci/schmoogie/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := dv_board.o
+SOBJS := board_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak *~ .depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/davinci/schmoogie/board_init.S b/board/davinci/schmoogie/board_init.S
new file mode 100644
index 0000000..22d8adc
--- /dev/null
+++ b/board/davinci/schmoogie/board_init.S
@@ -0,0 +1,29 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl dv_board_init
+dv_board_init:
+
+ mov pc, lr
diff --git a/board/davinci/schmoogie/config.mk b/board/davinci/schmoogie/config.mk
new file mode 100644
index 0000000..aa89d0e
--- /dev/null
+++ b/board/davinci/schmoogie/config.mk
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2003
+# Texas Instruments, <www.ti.com>
+# Swaminathan <swami.iyer@ti.com>
+#
+# Davinci EVM board (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# Davinci EVM has 1 bank of 256 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 9000'0000
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# Visioneering Corp. Sonata board (ARM926EJS) cpu
+#
+# Sonata board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu
+#
+# Schmoogie board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+#
+# we load ourself to 8108 '0000
+#
+#
+
+#Provide at least 16MB spacing between us and the Linux Kernel image
+TEXT_BASE = 0x81080000
diff --git a/board/davinci/schmoogie/dv_board.c b/board/davinci/schmoogie/dv_board.c
new file mode 100644
index 0000000..0a07523
--- /dev/null
+++ b/board/davinci/schmoogie/dv_board.c
@@ -0,0 +1,251 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+#define MACH_TYPE_SCHMOOGIE 1255
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void i2c_init(int speed, int slaveaddr);
+extern void timer_init(void);
+extern int eth_hw_init(void);
+extern phy_t phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+ dv_reg_p mdstat, mdctl;
+
+ if (id >= DAVINCI_LPSC_GEM)
+ return; /* Don't work on DSP Power Domain */
+
+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+ while (REG(PSC_PTSTAT) & 0x01) {;}
+
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ /* Special treatment for some modules as for sprue14 p.7.4.2 */
+ if ( (id == DAVINCI_LPSC_VPSSSLV) ||
+ (id == DAVINCI_LPSC_EMAC) ||
+ (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
+ (id == DAVINCI_LPSC_MDIO) ||
+ (id == DAVINCI_LPSC_USB) ||
+ (id == DAVINCI_LPSC_ATA) ||
+ (id == DAVINCI_LPSC_VLYNQ) ||
+ (id == DAVINCI_LPSC_UHPI) ||
+ (id == DAVINCI_LPSC_DDR_EMIF) ||
+ (id == DAVINCI_LPSC_AEMIF) ||
+ (id == DAVINCI_LPSC_MMC_SD) ||
+ (id == DAVINCI_LPSC_MEMSTICK) ||
+ (id == DAVINCI_LPSC_McBSP) ||
+ (id == DAVINCI_LPSC_GPIO)
+ )
+ *mdctl |= 0x200;
+
+ REG(PSC_PTCMD) = 0x01;
+
+ while (REG(PSC_PTSTAT) & 0x03) {;}
+ while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */
+}
+
+void dsp_on(void)
+{
+ int i;
+
+ if (REG(PSC_PDSTAT1) & 0x1f)
+ return; /* Already on */
+
+ REG(PSC_GBLCTL) |= 0x01;
+ REG(PSC_PDCTL1) |= 0x01;
+ REG(PSC_PDCTL1) &= ~0x100;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+ REG(PSC_PTCMD) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (REG(PSC_EPCPR) & 0x02)
+ break;
+ }
+
+ REG(PSC_CHP_SHRTSW) = 0x01;
+ REG(PSC_PDCTL1) |= 0x100;
+ REG(PSC_EPCCR) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (!(REG(PSC_PTSTAT) & 0x02))
+ break;
+ }
+
+ REG(PSC_GBLCTL) &= ~0x1f;
+}
+
+
+int board_init(void)
+{
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_SCHMOOGIE;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /* Workaround for TMS320DM6446 errata 1.3.22 */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /* Power on required peripherals */
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+ lpsc_on(DAVINCI_LPSC_I2C);
+ lpsc_on(DAVINCI_LPSC_UART0);
+ lpsc_on(DAVINCI_LPSC_TIMER1);
+ lpsc_on(DAVINCI_LPSC_GPIO);
+
+ /* Powerup the DSP */
+ dsp_on();
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= 1;
+
+ /* Enable EMAC and AEMIF pins */
+ REG(PINMUX0) = 0x80000c1f;
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= (1 << 7);
+
+ /* Set the Bus Priority Register to appropriate value */
+ REG(VBPR) = 0x20;
+
+ timer_init();
+
+ return(0);
+}
+
+int misc_init_r (void)
+{
+ u_int8_t tmp[20], buf[10];
+ int i = 0;
+ int clk = 0;
+
+ /* Set serial number from UID chip */
+ u_int8_t crc_tbl[256] = {
+ 0x00, 0x5e, 0xbc, 0xe2, 0x61, 0x3f, 0xdd, 0x83,
+ 0xc2, 0x9c, 0x7e, 0x20, 0xa3, 0xfd, 0x1f, 0x41,
+ 0x9d, 0xc3, 0x21, 0x7f, 0xfc, 0xa2, 0x40, 0x1e,
+ 0x5f, 0x01, 0xe3, 0xbd, 0x3e, 0x60, 0x82, 0xdc,
+ 0x23, 0x7d, 0x9f, 0xc1, 0x42, 0x1c, 0xfe, 0xa0,
+ 0xe1, 0xbf, 0x5d, 0x03, 0x80, 0xde, 0x3c, 0x62,
+ 0xbe, 0xe0, 0x02, 0x5c, 0xdf, 0x81, 0x63, 0x3d,
+ 0x7c, 0x22, 0xc0, 0x9e, 0x1d, 0x43, 0xa1, 0xff,
+ 0x46, 0x18, 0xfa, 0xa4, 0x27, 0x79, 0x9b, 0xc5,
+ 0x84, 0xda, 0x38, 0x66, 0xe5, 0xbb, 0x59, 0x07,
+ 0xdb, 0x85, 0x67, 0x39, 0xba, 0xe4, 0x06, 0x58,
+ 0x19, 0x47, 0xa5, 0xfb, 0x78, 0x26, 0xc4, 0x9a,
+ 0x65, 0x3b, 0xd9, 0x87, 0x04, 0x5a, 0xb8, 0xe6,
+ 0xa7, 0xf9, 0x1b, 0x45, 0xc6, 0x98, 0x7a, 0x24,
+ 0xf8, 0xa6, 0x44, 0x1a, 0x99, 0xc7, 0x25, 0x7b,
+ 0x3a, 0x64, 0x86, 0xd8, 0x5b, 0x05, 0xe7, 0xb9,
+ 0x8c, 0xd2, 0x30, 0x6e, 0xed, 0xb3, 0x51, 0x0f,
+ 0x4e, 0x10, 0xf2, 0xac, 0x2f, 0x71, 0x93, 0xcd,
+ 0x11, 0x4f, 0xad, 0xf3, 0x70, 0x2e, 0xcc, 0x92,
+ 0xd3, 0x8d, 0x6f, 0x31, 0xb2, 0xec, 0x0e, 0x50,
+ 0xaf, 0xf1, 0x13, 0x4d, 0xce, 0x90, 0x72, 0x2c,
+ 0x6d, 0x33, 0xd1, 0x8f, 0x0c, 0x52, 0xb0, 0xee,
+ 0x32, 0x6c, 0x8e, 0xd0, 0x53, 0x0d, 0xef, 0xb1,
+ 0xf0, 0xae, 0x4c, 0x12, 0x91, 0xcf, 0x2d, 0x73,
+ 0xca, 0x94, 0x76, 0x28, 0xab, 0xf5, 0x17, 0x49,
+ 0x08, 0x56, 0xb4, 0xea, 0x69, 0x37, 0xd5, 0x8b,
+ 0x57, 0x09, 0xeb, 0xb5, 0x36, 0x68, 0x8a, 0xd4,
+ 0x95, 0xcb, 0x29, 0x77, 0xf4, 0xaa, 0x48, 0x16,
+ 0xe9, 0xb7, 0x55, 0x0b, 0x88, 0xd6, 0x34, 0x6a,
+ 0x2b, 0x75, 0x97, 0xc9, 0x4a, 0x14, 0xf6, 0xa8,
+ 0x74, 0x2a, 0xc8, 0x96, 0x15, 0x4b, 0xa9, 0xf7,
+ 0xb6, 0xe8, 0x0a, 0x54, 0xd7, 0x89, 0x6b, 0x35
+ };
+
+ clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+ printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
+ printf ("DDR Clock : %dMHz\n", (clk / 2));
+
+ /* Set serial number from UID chip */
+ if (i2c_read(CFG_UID_ADDR, 0, 1, buf, 8)) {
+ printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR);
+ forceenv("serial#", "FAILED");
+ } else {
+ if (buf[0] != 0x70) { /* Device Family Code */
+ printf("\nUID @ 0x%02x read FAILED!!!\n", CFG_UID_ADDR);
+ forceenv("serial#", "FAILED");
+ }
+ }
+ /* Now check CRC */
+ tmp[0] = 0;
+ for (i = 0; i < 8; i++)
+ tmp[0] = crc_tbl[tmp[0] ^ buf[i]];
+
+ if (tmp[0] != 0) {
+ printf("\nUID @ 0x%02x - BAD CRC!!!\n", CFG_UID_ADDR);
+ forceenv("serial#", "FAILED");
+ } else {
+ /* CRC OK, set "serial" env variable */
+ sprintf((char *)&tmp[0], "%02x%02x%02x%02x%02x%02x",
+ buf[6], buf[5], buf[4], buf[3], buf[2], buf[1]);
+ forceenv("serial#", (char *)&tmp[0]);
+ }
+
+ if (!eth_hw_init()) {
+ printf("ethernet init failed!\n");
+ } else {
+ printf("ETH PHY : %s\n", phy.name);
+ }
+
+ return(0);
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return(0);
+}
diff --git a/board/davinci/schmoogie/u-boot.lds b/board/davinci/schmoogie/u-boot.lds
new file mode 100644
index 0000000..710b2a2
--- /dev/null
+++ b/board/davinci/schmoogie/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/davinci/sonata/Makefile b/board/davinci/sonata/Makefile
new file mode 100644
index 0000000..fa00138
--- /dev/null
+++ b/board/davinci/sonata/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := dv_board.o
+SOBJS := board_init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak *~ .depend
+
+#########################################################################
+# This is for $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/davinci/sonata/board_init.S b/board/davinci/sonata/board_init.S
new file mode 100644
index 0000000..fbb9ea7
--- /dev/null
+++ b/board/davinci/sonata/board_init.S
@@ -0,0 +1,100 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Board-specific low level initialization code. Called at the very end
+ * of cpu/arm926ejs/davinci/lowlevel_init.S. Just returns if there is no
+ * initialization required.
+ *
+ * For _OLDER_ Sonata boards sets up GPIO4 to control NAND WP line. Newer
+ * Sonata boards, AFAIK, don't use this so it's just return by default. Ask
+ * Visioneering if they reinvented the wheel once again to make sure :)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl dv_board_init
+dv_board_init:
+#ifdef SONATA_BOARD_GPIOWP
+ /* Set PINMUX0 to enable GPIO4 */
+ ldr r0, _PINMUX0
+ ldr r1, GPIO4_EN_MASK
+ ldr r2, [r0]
+ and r2, r2, r1
+ str r2, [r0]
+
+ /* Enable GPIO LPSC module */
+ ldr r0, PTSTAT
+
+gpio_ptstat_loop1:
+ ldr r2, [r0]
+ tst r2, $0x00000001
+ bne gpio_ptstat_loop1
+
+ ldr r1, MDCTL_GPIO
+ ldr r2, [r1]
+ and r2, r2, $0xfffffff8
+ orr r2, r2, $0x00000003
+ str r2, [r1]
+
+ orr r2, r2, $0x00000200
+ str r2, [r1]
+
+ ldr r1, PTCMD
+ mov r2, $0x00000001
+ str r2, [r1]
+
+gpio_ptstat_loop2:
+ ldr r2, [r0]
+ tst r2, $0x00000001
+ bne gpio_ptstat_loop2
+
+ ldr r0, MDSTAT_GPIO
+gpio_mdstat_loop:
+ ldr r2, [r0]
+ and r2, r2, $0x0000001f
+ teq r2, $0x00000003
+ bne gpio_mdstat_loop
+
+ /* GPIO4 -> output */
+ ldr r0, GPIO_DIR01
+ mov r1, $0x10
+ ldr r2, [r0]
+ bic r2, r2, r0
+ str r2, [r0]
+
+ /* Set it to 0 (Write Protect) */
+ ldr r0, GPIO_CLR_DATA01
+ str r1, [r0]
+#endif
+
+ mov pc, lr
+
+#ifdef SONATA_BOARD_GPIOWP
+.ltorg
+
+GPIO4_EN_MASK:
+ .word 0xf77fffff
+MDCTL_GPIO:
+ .word 0x01c41a68
+MDSTAT_GPIO:
+ .word 0x01c41868
+GPIO_DIR01:
+ .word 0x01c67010
+GPIO_CLR_DATA01:
+ .word 0x01c6701c
+#endif
diff --git a/board/davinci/sonata/config.mk b/board/davinci/sonata/config.mk
new file mode 100644
index 0000000..aa89d0e
--- /dev/null
+++ b/board/davinci/sonata/config.mk
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2002
+# Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+# David Mueller, ELSOFT AG, <d.mueller@elsoft.ch>
+#
+# (C) Copyright 2003
+# Texas Instruments, <www.ti.com>
+# Swaminathan <swami.iyer@ti.com>
+#
+# Davinci EVM board (ARM925EJS) cpu
+# see http://www.ti.com/ for more information on Texas Instruments
+#
+# Davinci EVM has 1 bank of 256 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 9000'0000
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# Visioneering Corp. Sonata board (ARM926EJS) cpu
+#
+# Sonata board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Razorstream, LLC. SCHMOOGIE board (ARM926EJS) cpu
+#
+# Schmoogie board has 1 bank of 128 MB DDR RAM
+# Physical Address:
+# 8000'0000 to 8800'0000
+#
+# Linux-Kernel is expected to be at 8000'8000, entry 8000'8000
+# (mem base + reserved)
+#
+# we load ourself to 8108 '0000
+#
+#
+
+#Provide at least 16MB spacing between us and the Linux Kernel image
+TEXT_BASE = 0x81080000
diff --git a/board/davinci/sonata/dv_board.c b/board/davinci/sonata/dv_board.c
new file mode 100644
index 0000000..cd2dac6
--- /dev/null
+++ b/board/davinci/sonata/dv_board.c
@@ -0,0 +1,206 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts are shamelessly stolen from various TI sources, original copyright
+ * follows:
+ * -----------------------------------------------------------------
+ *
+ * Copyright (C) 2004 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/emac_defs.h>
+
+#define MACH_TYPE_SONATA 1254
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void i2c_init(int speed, int slaveaddr);
+extern void timer_init(void);
+extern int eth_hw_init(void);
+extern phy_t phy;
+
+
+/* Works on Always On power domain only (no PD argument) */
+void lpsc_on(unsigned int id)
+{
+ dv_reg_p mdstat, mdctl;
+
+ if (id >= DAVINCI_LPSC_GEM)
+ return; /* Don't work on DSP Power Domain */
+
+ mdstat = REG_P(PSC_MDSTAT_BASE + (id * 4));
+ mdctl = REG_P(PSC_MDCTL_BASE + (id * 4));
+
+ while (REG(PSC_PTSTAT) & 0x01) {;}
+
+ if ((*mdstat & 0x1f) == 0x03)
+ return; /* Already on and enabled */
+
+ *mdctl |= 0x03;
+
+ /* Special treatment for some modules as for sprue14 p.7.4.2 */
+ if ( (id == DAVINCI_LPSC_VPSSSLV) ||
+ (id == DAVINCI_LPSC_EMAC) ||
+ (id == DAVINCI_LPSC_EMAC_WRAPPER) ||
+ (id == DAVINCI_LPSC_MDIO) ||
+ (id == DAVINCI_LPSC_USB) ||
+ (id == DAVINCI_LPSC_ATA) ||
+ (id == DAVINCI_LPSC_VLYNQ) ||
+ (id == DAVINCI_LPSC_UHPI) ||
+ (id == DAVINCI_LPSC_DDR_EMIF) ||
+ (id == DAVINCI_LPSC_AEMIF) ||
+ (id == DAVINCI_LPSC_MMC_SD) ||
+ (id == DAVINCI_LPSC_MEMSTICK) ||
+ (id == DAVINCI_LPSC_McBSP) ||
+ (id == DAVINCI_LPSC_GPIO)
+ )
+ *mdctl |= 0x200;
+
+ REG(PSC_PTCMD) = 0x01;
+
+ while (REG(PSC_PTSTAT) & 0x03) {;}
+ while ((*mdstat & 0x1f) != 0x03) {;} /* Probably an overkill... */
+}
+
+void dsp_on(void)
+{
+ int i;
+
+ if (REG(PSC_PDSTAT1) & 0x1f)
+ return; /* Already on */
+
+ REG(PSC_GBLCTL) |= 0x01;
+ REG(PSC_PDCTL1) |= 0x01;
+ REG(PSC_PDCTL1) &= ~0x100;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_GEM * 4)) &= 0xfffffeff;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) |= 0x03;
+ REG(PSC_MDCTL_BASE + (DAVINCI_LPSC_IMCOP * 4)) &= 0xfffffeff;
+ REG(PSC_PTCMD) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (REG(PSC_EPCPR) & 0x02)
+ break;
+ }
+
+ REG(PSC_CHP_SHRTSW) = 0x01;
+ REG(PSC_PDCTL1) |= 0x100;
+ REG(PSC_EPCCR) = 0x02;
+
+ for (i = 0; i < 100; i++) {
+ if (!(REG(PSC_PTSTAT) & 0x02))
+ break;
+ }
+
+ REG(PSC_GBLCTL) &= ~0x1f;
+}
+
+
+int board_init(void)
+{
+ /* arch number of the board */
+ gd->bd->bi_arch_number = MACH_TYPE_SONATA;
+
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
+
+ /* Workaround for TMS320DM6446 errata 1.3.22 */
+ REG(PSC_SILVER_BULLET) = 0;
+
+ /* Power on required peripherals */
+ lpsc_on(DAVINCI_LPSC_EMAC);
+ lpsc_on(DAVINCI_LPSC_EMAC_WRAPPER);
+ lpsc_on(DAVINCI_LPSC_MDIO);
+ lpsc_on(DAVINCI_LPSC_I2C);
+ lpsc_on(DAVINCI_LPSC_UART0);
+ lpsc_on(DAVINCI_LPSC_TIMER1);
+ lpsc_on(DAVINCI_LPSC_GPIO);
+
+ /* Powerup the DSP */
+ dsp_on();
+
+ /* Bringup UART0 out of reset */
+ REG(UART0_PWREMU_MGMT) = 0x0000e003;
+
+ /* Enable GIO3.3V cells used for EMAC */
+ REG(VDD3P3V_PWDN) = 0;
+
+ /* Enable UART0 MUX lines */
+ REG(PINMUX1) |= 1;
+
+ /* Enable EMAC and AEMIF pins */
+ REG(PINMUX0) = 0x80000c1f;
+
+ /* Enable I2C pin Mux */
+ REG(PINMUX1) |= (1 << 7);
+
+ /* Set the Bus Priority Register to appropriate value */
+ REG(VBPR) = 0x20;
+
+ timer_init();
+
+ return(0);
+}
+
+int misc_init_r (void)
+{
+ u_int8_t tmp[20], buf[10];
+ int i = 0;
+ int clk = 0;
+
+
+ clk = ((REG(PLL2_PLLM) + 1) * 27) / ((REG(PLL2_DIV2) & 0x1f) + 1);
+
+ printf ("ARM Clock : %dMHz\n", ((REG(PLL1_PLLM) + 1) * 27 ) / 2);
+ printf ("DDR Clock : %dMHz\n", (clk / 2));
+
+ /* Set Ethernet MAC address from EEPROM */
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, 0x7f00, CFG_I2C_EEPROM_ADDR_LEN, buf, 6)) {
+ printf("\nEEPROM @ 0x%02x read FAILED!!!\n", CFG_I2C_EEPROM_ADDR);
+ } else {
+ tmp[0] = 0xff;
+ for (i = 0; i < 6; i++)
+ tmp[0] &= buf[i];
+
+ if ((tmp[0] != 0xff) && (getenv("ethaddr") == NULL)) {
+ sprintf((char *)&tmp[0], "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[0], buf[1], buf[2], buf[3], buf[4], buf[5]);
+ setenv("ethaddr", (char *)&tmp[0]);
+ }
+ }
+
+ if (!eth_hw_init()) {
+ printf("ethernet init failed!\n");
+ } else {
+ printf("ETH PHY : %s\n", phy.name);
+ }
+
+ return(0);
+}
+
+int dram_init(void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return(0);
+}
diff --git a/board/davinci/sonata/u-boot.lds b/board/davinci/sonata/u-boot.lds
new file mode 100644
index 0000000..710b2a2
--- /dev/null
+++ b/board/davinci/sonata/u-boot.lds
@@ -0,0 +1,52 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm926ejs/start.o (.text)
+ *(.text)
+ }
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+ . = ALIGN(4);
+ .data : { *(.data) }
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/delta/delta.c b/board/delta/delta.c
index b127ac8..6e22774 100644
--- a/board/delta/delta.c
+++ b/board/delta/delta.c
@@ -1,10 +1,6 @@
/*
- * (C) Copyright 2002
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2002
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
+ * (C) Copyright 2006
+ * DENX Software Engineering
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -98,7 +94,6 @@
return 0;
}
-
/*
* Magic Key Handling, mainly copied from board/lwmon/lwmon.c
*/
@@ -324,6 +319,12 @@
return;
}
+ val = 0x80;
+ if(i2c_write(addr, IRQ_MASK_B, 1, &val, 1)) {
+ printf("Error accessing DA9030 via i2c.\n");
+ return;
+ }
+
i2c_reg_write(addr, REG_CONTROL_1_97, 0xfd); /* disable LDO1, enable LDO6 */
i2c_reg_write(addr, LDO2_3, 0xd1); /* LDO2 =1,9V, LDO3=3,1V */
i2c_reg_write(addr, LDO4_5, 0xcc); /* LDO2 =1,9V, LDO3=3,1V */
diff --git a/board/delta/nand.c b/board/delta/nand.c
index d170938..a635a65 100644
--- a/board/delta/nand.c
+++ b/board/delta/nand.c
@@ -22,7 +22,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#if !defined(CFG_NAND_LEGACY)
#include <nand.h>
diff --git a/board/eXalion/u-boot.lds b/board/eXalion/u-boot.lds
deleted file mode 100644
index eaee3fd..0000000
--- a/board/eXalion/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/emk/top5200/top5200.c b/board/emk/top5200/top5200.c
index d741e6b..ccbd72a 100644
--- a/board/emk/top5200/top5200.c
+++ b/board/emk/top5200/top5200.c
@@ -184,7 +184,7 @@
/*****************************************************************************
* provide the IDE Reset Function
*****************************************************************************/
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -205,4 +205,4 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
diff --git a/board/emk/top5200/u-boot.lds b/board/emk/top5200/u-boot.lds
deleted file mode 100644
index f23432e..0000000
--- a/board/emk/top5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ep8248/u-boot.lds b/board/ep8248/u-boot.lds
deleted file mode 100644
index 18c4b46..0000000
--- a/board/ep8248/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/ep8260/u-boot.lds b/board/ep8260/u-boot.lds
deleted file mode 100644
index 4250e83..0000000
--- a/board/ep8260/u-boot.lds
+++ /dev/null
@@ -1,127 +0,0 @@
-/*
- * (C) Copyright 2001, 2002, 2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/opt/cross/lib); SEARCH_DIR(/opt/cross/powerpc-linux/lib);
-/* SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); */
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
-/* common/environment.o(.text) */
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ep82xxm/u-boot.lds b/board/ep82xxm/u-boot.lds
deleted file mode 100644
index 18c4b46..0000000
--- a/board/ep82xxm/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/esd/ash405/Makefile b/board/esd/ash405/Makefile
index 4d75868..308f752 100644
--- a/board/esd/ash405/Makefile
+++ b/board/esd/ash405/Makefile
@@ -28,7 +28,9 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o ../common/misc.o
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ ../common/esd405ep_nand.o \
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/ash405/ash405.c b/board/esd/ash405/ash405.c
index 84fc3a0..8a5b03b 100644
--- a/board/esd/ash405/ash405.c
+++ b/board/esd/ash405/ash405.c
@@ -23,6 +23,7 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <command.h>
#include <malloc.h>
@@ -33,6 +34,7 @@
#endif
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+extern void lxt971_no_sleep(void);
/* fpga configuration data - gzip compressed and generated by bin2c */
const unsigned char fpgadata[] =
@@ -164,18 +166,12 @@
/*
* Reset external DUARTs
*/
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_DUART_RST);
udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_DUART_RST);
udelay(1000); /* wait 1ms */
/*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
* Enable interrupts in exar duart mcr[3]
*/
*duart0_mcr = 0x08;
@@ -218,35 +214,17 @@
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
/* ------------------------------------------------------------------------- */
-int testdram (void)
+void reset_phy(void)
{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
+#ifdef CONFIG_LXT971_NO_SLEEP
+ /*
+ * Disable sleep mode in LXT971
+ */
+ lxt971_no_sleep();
#endif
+}
diff --git a/board/esd/cms700/Makefile b/board/esd/cms700/Makefile
index df48766..0d4ab2d 100644
--- a/board/esd/cms700/Makefile
+++ b/board/esd/cms700/Makefile
@@ -33,7 +33,10 @@
../common/xilinx_jtag/micro.o \
../common/xilinx_jtag/ports.o
-COBJS = $(BOARD).o flash.o ../common/misc.o $(CPLD)
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ $(CPLD) \
+ ../common/esd405ep_nand.o \
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/cms700/cms700.c b/board/esd/cms700/cms700.c
index cb04710..2cdd7be 100644
--- a/board/esd/cms700/cms700.c
+++ b/board/esd/cms700/cms700.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2007
* Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
@@ -23,6 +23,7 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <command.h>
#include <malloc.h>
@@ -68,9 +69,9 @@
/*
* Reset CPLD via GPIO12 (CS3) pin
*/
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_PLD_RESET);
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_PLD_RESET);
udelay(1000); /* wait 1ms */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_PLD_RESET);
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_PLD_RESET);
udelay(1000); /* wait 1ms */
return 0;
@@ -94,13 +95,7 @@
/*
* Setup and enable EEPROM write protection
*/
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
-
- /*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_EEPROM_WP);
return (0);
}
@@ -153,11 +148,6 @@
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
@@ -180,17 +170,17 @@
switch (state) {
case 1:
/* Enable write access, clear bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_EEPROM_WP);
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_EEPROM_WP);
state = 0;
break;
case 0:
/* Disable write access, set bit GPIO_SINT2. */
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_EEPROM_WP);
state = 0;
break;
default:
/* Read current status back. */
- state = (0 == (in32(GPIO0_OR) & CFG_EEPROM_WP));
+ state = (0 == (in_be32((void *)GPIO0_OR) & CFG_EEPROM_WP));
break;
}
}
@@ -235,19 +225,6 @@
/* ------------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
diff --git a/board/esd/common/auto_update.c b/board/esd/common/auto_update.c
index 001fd68..a76b00f 100644
--- a/board/esd/common/auto_update.c
+++ b/board/esd/common/auto_update.c
@@ -24,14 +24,12 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
-#warning CFG_NAND_LEGACY not defined in a file using the legacy NAND support!
-#endif
-
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
+#if defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
+#endif
#include <fat.h>
#include <part.h>
@@ -39,8 +37,8 @@
#ifdef CONFIG_AUTO_UPDATE
-#if !(CONFIG_COMMANDS & CFG_CMD_FAT)
-#error "must define CFG_CMD_FAT"
+#if !defined(CONFIG_CMD_FAT)
+#error "must define CONFIG_CMD_FAT"
#endif
extern au_image_t au_image[];
@@ -73,7 +71,7 @@
extern int flash_sect_protect (int, ulong, ulong);
extern int flash_write (char *, ulong, ulong);
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
/* references to names in cmd_nand.c */
#define NANDRW_READ 0x01
#define NANDRW_WRITE 0x00
@@ -83,7 +81,7 @@
extern int nand_legacy_rw(struct nand_chip* nand, int cmd, size_t start, size_t len,
size_t * retlen, u_char * buf);
extern int nand_legacy_erase(struct nand_chip* nand, size_t ofs, size_t len, int clean);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */
+#endif
extern block_dev_desc_t ide_dev_desc[CFG_IDE_MAXDEVICE];
@@ -187,7 +185,7 @@
int off, rc;
uint nbytes;
int k;
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
int total;
#endif
@@ -261,7 +259,7 @@
debug ("flash_sect_erase(%lx, %lx);\n", start, end);
flash_sect_erase(start, end);
} else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
printf("Updating NAND FLASH with image %s\n", au_image[i].name);
debug ("nand_legacy_erase(%lx, %lx);\n", start, end);
rc = nand_legacy_erase (nand_dev_desc, start, end - start + 1, 0);
@@ -289,11 +287,13 @@
debug ("flash_write(%p, %lx %x)\n", addr, start, nbytes);
rc = flash_write((char *)addr, start, nbytes);
} else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
debug ("nand_legacy_rw(%p, %lx %x)\n", addr, start, nbytes);
rc = nand_legacy_rw(nand_dev_desc, NANDRW_WRITE | NANDRW_JFFS2,
start, nbytes, (size_t *)&total, (uchar *)addr);
debug ("nand_legacy_rw: ret=%x total=%d nbytes=%d\n", rc, total, nbytes);
+#else
+ rc = -1;
#endif
}
if (rc != 0) {
@@ -307,7 +307,7 @@
if (au_image[i].type != AU_NAND) {
rc = crc32 (0, (uchar *)(start + off), ntohl(hdr->ih_size));
} else {
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
rc = nand_legacy_rw(nand_dev_desc, NANDRW_READ | NANDRW_JFFS2 | NANDRW_JFFS2_SKIP,
start, nbytes, (size_t *)&total, (uchar *)addr);
rc = crc32 (0, (uchar *)(addr + off), ntohl(hdr->ih_size));
diff --git a/board/esd/common/cmd_loadpci.c b/board/esd/common/cmd_loadpci.c
index bf796ff..d88b387 100644
--- a/board/esd/common/cmd_loadpci.c
+++ b/board/esd/common/cmd_loadpci.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
extern int do_autoscript (cmd_tbl_t *, int, int, char *[]);
diff --git a/board/esd/common/esd405ep_nand.c b/board/esd/common/esd405ep_nand.c
new file mode 100644
index 0000000..7bf6847
--- /dev/null
+++ b/board/esd/common/esd405ep_nand.c
@@ -0,0 +1,87 @@
+/*
+ * (C) Copyright 2007
+ * Matthias Fuchs, esd gmbh germany, matthias.fuchs@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_CMD_NAND)
+#include <asm/io.h>
+#include <nand.h>
+
+/*
+ * hardware specific access to control-lines
+ */
+static void esd405ep_nand_hwcontrol(struct mtd_info *mtdinfo, int cmd)
+{
+ switch(cmd) {
+ case NAND_CTL_SETCLE:
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CLE);
+ break;
+ case NAND_CTL_CLRCLE:
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CLE);
+ break;
+ case NAND_CTL_SETALE:
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_ALE);
+ break;
+ case NAND_CTL_CLRALE:
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_ALE);
+ break;
+ case NAND_CTL_SETNCE:
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_NAND_CE);
+ break;
+ case NAND_CTL_CLRNCE:
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE);
+ break;
+ }
+}
+
+
+/*
+ * read device ready pin
+ */
+static int esd405ep_nand_device_ready(struct mtd_info *mtdinfo)
+{
+ if (in_be32((void *)GPIO0_IR) & CFG_NAND_RDY)
+ return 1;
+ return 0;
+}
+
+
+int board_nand_init(struct nand_chip *nand)
+{
+ /*
+ * Set NAND-FLASH GPIO signals to defaults
+ */
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_NAND_CE);
+
+ /*
+ * Initialize nand_chip structure
+ */
+ nand->hwcontrol = esd405ep_nand_hwcontrol;
+ nand->dev_ready = esd405ep_nand_device_ready;
+ nand->eccmode = NAND_ECC_SOFT;
+ nand->chip_delay = NAND_BIG_DELAY_US;
+ nand->options = NAND_SAMSUNG_LP_OPTIONS;
+ return 0;
+}
+#endif
diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c
index f803610..69cb8ce 100644
--- a/board/esd/cpci405/cpci405.c
+++ b/board/esd/cpci405/cpci405.c
@@ -23,13 +23,15 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <command.h>
#include <malloc.h>
#include <net.h>
+#include <pci.h>
DECLARE_GLOBAL_DATA_PTR;
-extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/
#if 0
#define FPGA_DEBUG
#endif
@@ -52,8 +54,6 @@
* include common fpga code (for esd boards)
*/
#include "../common/fpga.c"
-
-
#include "../common/auto_update.h"
#ifdef CONFIG_CPCI405AB
@@ -86,13 +86,11 @@
int N_AU_IMAGES = (sizeof(au_image) / sizeof(au_image[0]));
-
/* Prototypes */
int cpci405_version(void);
int gunzip(void *, int, unsigned char *, unsigned long *);
void lxt971_no_sleep(void);
-
int board_early_init_f (void)
{
#ifndef CONFIG_CPCI405_VER2
@@ -111,10 +109,10 @@
/*
* First pull fpga-prg pin low, to disable fpga logic (on version 2 board)
*/
- out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
- out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
+ out32(GPIO0_ODR, 0x00000000); /* no open drain pins */
+ out32(GPIO0_TCR, CFG_FPGA_PRG); /* setup for output */
out32(GPIO0_OR, CFG_FPGA_PRG); /* set output pins to high */
- out32(GPIO0_OR, 0); /* pull prg low */
+ out32(GPIO0_OR, 0); /* pull prg low */
/*
* Boot onboard FPGA
@@ -176,47 +174,48 @@
* IRQ 30 (EXT IRQ 5) PCI SLOT 3; active low; level sensitive
* IRQ 31 (EXT IRQ 6) COMPACT FLASH; active high; level sensitive
*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
- mtdcr(uicer, 0x00000000); /* disable all ints */
- mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uicer, 0x00000000); /* disable all ints */
+ mtdcr(uiccr, 0x00000000); /* set all to be non-critical*/
+#ifdef CONFIG_CPCI405_6U
if (cpci405_version() == 3) {
- mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
+ mtdcr(uicpr, 0xFFFFFF99); /* set int polarities */
} else {
- mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
+ mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
}
- mtdcr(uictr, 0x10000000); /* set int trigger levels */
- mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
- mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+#else
+ mtdcr(uicpr, 0xFFFFFF81); /* set int polarities */
+#endif
+ mtdcr(uictr, 0x10000000); /* set int trigger levels */
+ mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority*/
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
return 0;
}
-
/* ------------------------------------------------------------------------- */
int ctermm2(void)
{
#ifdef CONFIG_CPCI405_VER2
- return 0; /* no, board is cpci405 */
+ return 0; /* no, board is cpci405 */
#else
if ((*(unsigned char *)0xf0000400 == 0x00) &&
(*(unsigned char *)0xf0000401 == 0x01))
- return 0; /* no, board is cpci405 */
+ return 0; /* no, board is cpci405 */
else
- return -1; /* yes, board is cterm-m2 */
+ return -1; /* yes, board is cterm-m2 */
#endif
}
-
int cpci405_host(void)
{
if (mfdcr(strap) & PSR_PCI_ARBIT_EN)
- return -1; /* yes, board is cpci405 host */
+ return -1; /* yes, board is cpci405 host */
else
- return 0; /* no, board is cpci405 adapter */
+ return 0; /* no, board is cpci405 adapter */
}
-
int cpci405_version(void)
{
unsigned long cntrl0Reg;
@@ -227,10 +226,10 @@
*/
cntrl0Reg = mfdcr(cntrl0);
mtdcr(cntrl0, cntrl0Reg | 0x03000000);
- out32(GPIO0_ODR, in32(GPIO0_ODR) & ~0x00180000);
- out32(GPIO0_TCR, in32(GPIO0_TCR) & ~0x00180000);
- udelay(1000); /* wait some time before reading input */
- value = in32(GPIO0_IR) & 0x00180000; /* get config bits */
+ out_be32((void*)GPIO0_ODR, in_be32((void*)GPIO0_ODR) & ~0x00180000);
+ out_be32((void*)GPIO0_TCR, in_be32((void*)GPIO0_TCR) & ~0x00180000);
+ udelay(1000); /* wait some time before reading input */
+ value = in_be32((void*)GPIO0_IR) & 0x00180000; /* get config bits */
/*
* Restore GPIO settings
@@ -245,7 +244,7 @@
/* CS2==0 && CS3==1 -> version 2 */
return 2;
case 0x00100000:
- /* CS2==1 && CS3==0 -> version 3 */
+ /* CS2==1 && CS3==0 -> version 3 or 6U board */
return 3;
case 0x00000000:
/* CS2==0 && CS3==0 -> version 4 */
@@ -256,13 +255,11 @@
}
}
-
int misc_init_f (void)
{
return 0; /* dummy implementation */
}
-
int misc_init_r (void)
{
unsigned long cntrl0Reg;
@@ -283,7 +280,6 @@
* On CPCI-405 version 2 the environment is saved in eeprom!
* FPGA can be gzip compressed (malloc) and booted this late.
*/
-
if (cpci405_version() >= 2) {
/*
* Setup GPIO pins (CS6+CS7 as GPIO)
@@ -354,6 +350,7 @@
SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);
udelay(1000); /* wait 1ms */
+#ifdef CONFIG_CPCI405_6U
if (cpci405_version() == 3) {
volatile unsigned short *fpga_mode = (unsigned short *)CFG_FPGA_BASE_ADDR;
volatile unsigned char *leds = (unsigned char *)CFG_LED_ADDR;
@@ -375,6 +372,7 @@
udelay(100);
*fpga_mode &= ~(CFG_FPGA_MODE_DUART_RESET);
}
+#endif
}
else {
puts("\n*** U-Boot Version does not match Board Version!\n");
@@ -425,7 +423,6 @@
return (0);
}
-
/*
* Check Board Identity:
*/
@@ -481,7 +478,7 @@
}
#ifndef CONFIG_CPCI405_VER2
- puts ("\nFPGA: ");
+ puts ("\nFPGA: ");
/* display infos on fpgaimage */
index = 15;
@@ -493,12 +490,6 @@
#endif
putc ('\n');
-
- /*
- * Disable sleep mode in LXT971
- */
- lxt971_no_sleep();
-
return 0;
}
@@ -511,22 +502,18 @@
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
+void reset_phy(void)
{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
+#ifdef CONFIG_LXT971_NO_SLEEP
- return (0);
+ /*
+ * Disable sleep mode in LXT971
+ */
+ lxt971_no_sleep();
+#endif
}
/* ------------------------------------------------------------------------- */
@@ -551,14 +538,47 @@
#endif /* CONFIG_IDE_RESET */
#endif /* CONFIG_CPCI405_VER2 */
+#if defined(CONFIG_PCI)
+void cpci405_pci_fixup_irq(struct pci_controller *hose, pci_dev_t dev)
+{
+ unsigned char int_line = 0xff;
+
+ /*
+ * Write pci interrupt line register (cpci405 specific)
+ */
+ switch (PCI_DEV(dev) & 0x03) {
+ case 0:
+ int_line = 27 + 2;
+ break;
+ case 1:
+ int_line = 27 + 3;
+ break;
+ case 2:
+ int_line = 27 + 0;
+ break;
+ case 3:
+ int_line = 27 + 1;
+ break;
+ }
+
+ pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, int_line);
+}
+
+int pci_pre_init(struct pci_controller *hose)
+{
+ hose->fixup_irq = cpci405_pci_fixup_irq;
+ return 1;
+}
+#endif /* defined(CONFIG_PCI) */
+
#ifdef CONFIG_CPCI405AB
-#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
+#define ONE_WIRE_CLEAR (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
|= CFG_FPGA_MODE_1WIRE_DIR)
-#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
+#define ONE_WIRE_SET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_MODE) \
&= ~CFG_FPGA_MODE_1WIRE_DIR)
-#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
+#define ONE_WIRE_GET (*(volatile unsigned short *)(CFG_FPGA_BASE_ADDR + CFG_FPGA_STATUS) \
& CFG_FPGA_MODE_1WIRE)
/*
@@ -581,7 +601,6 @@
return result;
}
-
/*
* Send 1 a 1-wire write bit.
* Provide 10us recovery time.
@@ -607,7 +626,6 @@
}
}
-
/*
* Read a bit from the 1-wire bus and return it.
* Provide 10us recovery time.
@@ -627,7 +645,6 @@
return result;
}
-
void OWWriteByte(int data)
{
int loop;
@@ -638,7 +655,6 @@
}
}
-
int OWReadByte(void)
{
int loop, result = 0;
@@ -653,7 +669,6 @@
return result;
}
-
int do_onewire(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
volatile unsigned short val;
@@ -694,7 +709,6 @@
NULL
);
-
#define CFG_I2C_EEPROM_ADDR_2 0x51 /* EEPROM CAT28WC32 */
#define CFG_ENV_SIZE_2 0x800 /* 2048 bytes may be used for env vars*/
diff --git a/board/esd/cpci5200/cpci5200.c b/board/esd/cpci5200/cpci5200.c
index a925b84..adb8597 100644
--- a/board/esd/cpci5200/cpci5200.c
+++ b/board/esd/cpci5200/cpci5200.c
@@ -196,7 +196,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET)
void init_ide_reset(void)
{
@@ -217,7 +217,7 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#define MPC5XXX_SIMPLEIO_GPIO_ENABLE (MPC5XXX_GPIO + 0x0004)
#define MPC5XXX_SIMPLEIO_GPIO_DIR (MPC5XXX_GPIO + 0x000C)
diff --git a/board/esd/cpci5200/u-boot.lds b/board/esd/cpci5200/u-boot.lds
deleted file mode 100644
index f23432e..0000000
--- a/board/esd/cpci5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/cpci750/cpci750.c b/board/esd/cpci750/cpci750.c
index 17e3568..298aa6a 100644
--- a/board/esd/cpci750/cpci750.c
+++ b/board/esd/cpci750/cpci750.c
@@ -55,6 +55,71 @@
#define DP(x)
#endif
+static char show_config_tab[][15] = {{"PCI0DLL_2 "}, /* 31 */
+ {"PCI0DLL_1 "}, /* 30 */
+ {"PCI0DLL_0 "}, /* 29 */
+ {"PCI1DLL_2 "}, /* 28 */
+ {"PCI1DLL_1 "}, /* 27 */
+ {"PCI1DLL_0 "}, /* 26 */
+ {"BbEP2En "}, /* 25 */
+ {"SDRAMRdDataDel"}, /* 24 */
+ {"SDRAMRdDel "}, /* 23 */
+ {"SDRAMSync "}, /* 22 */
+ {"SDRAMPipeSel_1"}, /* 21 */
+ {"SDRAMPipeSel_0"}, /* 20 */
+ {"SDRAMAddDel "}, /* 19 */
+ {"SDRAMClkSel "}, /* 18 */
+ {"Reserved(1!) "}, /* 17 */
+ {"PCIRty "}, /* 16 */
+ {"BootCSWidth_1 "}, /* 15 */
+ {"BootCSWidth_0 "}, /* 14 */
+ {"PCI1PadsCal "}, /* 13 */
+ {"PCI0PadsCal "}, /* 12 */
+ {"MultiMVId_1 "}, /* 11 */
+ {"MultiMVId_0 "}, /* 10 */
+ {"MultiGTEn "}, /* 09 */
+ {"Int60xArb "}, /* 08 */
+ {"CPUBusConfig_1"}, /* 07 */
+ {"CPUBusConfig_0"}, /* 06 */
+ {"DefIntSpc "}, /* 05 */
+ {0 }, /* 04 */
+ {"SROMAdd_1 "}, /* 03 */
+ {"SROMAdd_0 "}, /* 02 */
+ {"DRAMPadCal "}, /* 01 */
+ {"SInitEn "}, /* 00 */
+ {0 }, /* 31 */
+ {0 }, /* 30 */
+ {0 }, /* 29 */
+ {0 }, /* 28 */
+ {0 }, /* 27 */
+ {0 }, /* 26 */
+ {0 }, /* 25 */
+ {0 }, /* 24 */
+ {0 }, /* 23 */
+ {0 }, /* 22 */
+ {"JTAGCalBy "}, /* 21 */
+ {"GB2Sel "}, /* 20 */
+ {"GB1Sel "}, /* 19 */
+ {"DRAMPLL_MDiv_5"}, /* 18 */
+ {"DRAMPLL_MDiv_4"}, /* 17 */
+ {"DRAMPLL_MDiv_3"}, /* 16 */
+ {"DRAMPLL_MDiv_2"}, /* 15 */
+ {"DRAMPLL_MDiv_1"}, /* 14 */
+ {"DRAMPLL_MDiv_0"}, /* 13 */
+ {"GB0Sel "}, /* 12 */
+ {"DRAMPLLPU "}, /* 11 */
+ {"DRAMPLL_HIKVCO"}, /* 10 */
+ {"DRAMPLLNP "}, /* 09 */
+ {"DRAMPLL_NDiv_7"}, /* 08 */
+ {"DRAMPLL_NDiv_6"}, /* 07 */
+ {"CPUPadCal "}, /* 06 */
+ {"DRAMPLL_NDiv_5"}, /* 05 */
+ {"DRAMPLL_NDiv_4"}, /* 04 */
+ {"DRAMPLL_NDiv_3"}, /* 03 */
+ {"DRAMPLL_NDiv_2"}, /* 02 */
+ {"DRAMPLL_NDiv_1"}, /* 01 */
+ {"DRAMPLL_NDiv_0"}}; /* 00 */
+
extern void flush_data_cache (void);
extern void invalidate_l1_instruction_cache (void);
extern flash_info_t flash_info[];
@@ -901,21 +966,37 @@
dcache_disable ();
}
-
-int do_show_cfg(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+int do_show_config(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
unsigned int reset_sample_low;
unsigned int reset_sample_high;
+ unsigned int l, l1, l2;
GT_REG_READ(0x3c4, &reset_sample_low);
GT_REG_READ(0x3d4, &reset_sample_high);
printf("Reset configuration 0x%08x 0x%08x\n", reset_sample_low, reset_sample_high);
+ l2 = 0;
+ for (l=0; l<63; l++) {
+ if (show_config_tab[l][0] != 0) {
+ printf("%14s:%1x ", show_config_tab[l],
+ ((reset_sample_low >> (31 - (l & 0x1f)))) & 0x01);
+ l2++;
+ if ((l2 % 4) == 0)
+ printf("\n");
+ } else {
+ l1++;
+ }
+ if (l == 32)
+ reset_sample_low = reset_sample_high;
+ }
+ printf("\n");
+
return(0);
}
U_BOOT_CMD(
- show_cfg, 1, 1, do_show_cfg,
- "show_cfg- Show Marvell strapping register\n",
+ show_config, 1, 1, do_show_config,
+ "show_config - Show Marvell strapping register\n",
"Show Marvell strapping register (ResetSampleLow ResetSampleHigh)\n"
);
diff --git a/board/esd/cpci750/ide.c b/board/esd/cpci750/ide.c
index bea99ce..0adafe2 100644
--- a/board/esd/cpci750/ide.c
+++ b/board/esd/cpci750/ide.c
@@ -25,7 +25,7 @@
#include <common.h>
-#ifdef CFG_CMD_IDE
+#if defined(CONFIG_CMD_IDE)
#include <ata.h>
#include <ide.h>
#include <pci.h>
@@ -43,6 +43,8 @@
ide_bus_offset[l] = -ATA_STATUS;
}
devbusfn = pci_find_device (0x1103, 0x0004, 0);
+ if (devbusfn == -1)
+ devbusfn = pci_find_device (0x1095, 0x3114, 0);
if (devbusfn != -1) {
status = 0;
diff --git a/board/esd/cpci750/sdram_init.c b/board/esd/cpci750/sdram_init.c
index c094755..78d1880 100644
--- a/board/esd/cpci750/sdram_init.c
+++ b/board/esd/cpci750/sdram_init.c
@@ -1252,7 +1252,7 @@
/* sets up the GT properly with information passed in */
int setup_sdram (AUX_MEM_DIMM_INFO * info)
{
- ulong tmp, check;
+ ulong tmp;
ulong tmp_sdram_mode = 0; /* 0x141c */
ulong tmp_dunit_control_low = 0; /* 0x1404 */
int i;
diff --git a/board/esd/cpci750/serial.c b/board/esd/cpci750/serial.c
index ba32ac1..e1af37e 100644
--- a/board/esd/cpci750/serial.c
+++ b/board/esd/cpci750/serial.c
@@ -80,7 +80,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void kgdb_serial_init (void)
{
}
@@ -104,4 +104,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/esd/hh405/Makefile b/board/esd/hh405/Makefile
index ce7876c..0e5e57a 100644
--- a/board/esd/hh405/Makefile
+++ b/board/esd/hh405/Makefile
@@ -28,7 +28,10 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ ../common/esd405ep_nand.o \
+ ../common/auto_update.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/hh405/hh405.c b/board/esd/hh405/hh405.c
index ea344c0..67b5d54 100644
--- a/board/esd/hh405/hh405.c
+++ b/board/esd/hh405/hh405.c
@@ -5,7 +5,7 @@
* (C) Copyright 2005
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
* Matthias Fuchs, esd GmbH, matthias.fuchs@esd-electronics.com
*
* See file CREDITS for list of people who contributed to this
@@ -477,12 +477,6 @@
out32(GPIO0_OR, in32(GPIO0_OR) | CFG_EEPROM_WP);
/*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
* Reset touch-screen controller
*/
out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_TOUCH_RST);
@@ -690,20 +684,6 @@
#endif /* CONFIG_IDE_RESET */
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
#if defined(CFG_EEPROM_WREN)
/* Input: <dev_addr> I2C address of EEPROM device to enable.
* <state> -1: deliver current state
diff --git a/board/esd/hub405/Makefile b/board/esd/hub405/Makefile
index 4d75868..308f752 100644
--- a/board/esd/hub405/Makefile
+++ b/board/esd/hub405/Makefile
@@ -28,7 +28,9 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o ../common/misc.o
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ ../common/esd405ep_nand.o \
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/hub405/hub405.c b/board/esd/hub405/hub405.c
index 1e0accb..25c8068 100644
--- a/board/esd/hub405/hub405.c
+++ b/board/esd/hub405/hub405.c
@@ -153,12 +153,6 @@
out32(GPIO0_OR, val);
/*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
* check board type and setup AP power
*/
str = getenv("bd_type"); /* this is only set on non prototype hardware */
@@ -242,33 +236,5 @@
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
-
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/esd/mecp5200/mecp5200.c b/board/esd/mecp5200/mecp5200.c
index c4b91e9..ea49f26 100644
--- a/board/esd/mecp5200/mecp5200.c
+++ b/board/esd/mecp5200/mecp5200.c
@@ -196,7 +196,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
#define GPIO_PSC1_4 0x01000000UL
@@ -218,7 +218,7 @@
else
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#define MPC5XXX_SIMPLEIO_GPIO_ENABLE (MPC5XXX_GPIO + 0x0004)
#define MPC5XXX_SIMPLEIO_GPIO_DIR (MPC5XXX_GPIO + 0x000C)
diff --git a/board/esd/mecp5200/u-boot.lds b/board/esd/mecp5200/u-boot.lds
deleted file mode 100644
index d999dd1..0000000
--- a/board/esd/mecp5200/u-boot.lds
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/ocrtc/cmd_ocrtc.c b/board/esd/ocrtc/cmd_ocrtc.c
index ffbb4ad..4177f68 100644
--- a/board/esd/ocrtc/cmd_ocrtc.c
+++ b/board/esd/ocrtc/cmd_ocrtc.c
@@ -28,7 +28,7 @@
#include <405gp_pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
/*
* Set device number on pci board
diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c
index 0315c3d..5b5ad8c 100644
--- a/board/esd/pci405/cmd_pci405.c
+++ b/board/esd/pci405/cmd_pci405.c
@@ -33,7 +33,7 @@
#include "pci405.h"
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
extern int do_bootvx (cmd_tbl_t *, int, int, char *[]);
diff --git a/board/esd/pf5200/pf5200.c b/board/esd/pf5200/pf5200.c
index 77e164b..48b80bf 100644
--- a/board/esd/pf5200/pf5200.c
+++ b/board/esd/pf5200/pf5200.c
@@ -196,7 +196,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset(void)
{
@@ -217,7 +217,7 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#define MPC5XXX_SIMPLEIO_GPIO_ENABLE (MPC5XXX_GPIO + 0x0004)
#define MPC5XXX_SIMPLEIO_GPIO_DIR (MPC5XXX_GPIO + 0x000C)
diff --git a/board/esd/pf5200/u-boot.lds b/board/esd/pf5200/u-boot.lds
deleted file mode 100644
index f23432e..0000000
--- a/board/esd/pf5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/esd/plu405/Makefile b/board/esd/plu405/Makefile
index ce7876c..0e5e57a 100644
--- a/board/esd/plu405/Makefile
+++ b/board/esd/plu405/Makefile
@@ -28,7 +28,10 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o ../common/misc.o ../common/auto_update.o
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ ../common/esd405ep_nand.o \
+ ../common/auto_update.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/plu405/fpgadata.c b/board/esd/plu405/fpgadata.c
index f6656c1..dc8c88b 100644
--- a/board/esd/plu405/fpgadata.c
+++ b/board/esd/plu405/fpgadata.c
@@ -1,1160 +1,1179 @@
- 0x1f,0x8b,0x08,0x08,0x9d,0x76,0x5c,0x3f,0x00,0x03,0x70,0x6c,0x75,0x34,0x30,0x35,
- 0x5f,0x31,0x5f,0x30,0x30,0x2e,0x62,0x69,0x74,0x00,0x94,0x9b,0x7f,0x6c,0x1d,0x55,
- 0x76,0xc7,0xcf,0xfc,0xb0,0x3d,0xf6,0x7b,0xf1,0x9b,0x24,0x76,0xeb,0x6e,0x82,0x33,
- 0xfe,0x41,0xf4,0x48,0x9f,0x5f,0x5e,0x9c,0x1f,0x18,0x63,0xec,0x89,0x13,0xed,0x5a,
- 0x4b,0xda,0x58,0x2a,0xad,0x56,0x15,0x62,0x0d,0x9b,0xad,0xa2,0xca,0x44,0xa6,0xdb,
- 0x56,0x51,0xba,0x0d,0xd7,0x71,0x20,0x06,0x7b,0x89,0xa1,0x48,0x04,0x9a,0xd2,0x17,
- 0x88,0x84,0x05,0xd6,0xea,0xe5,0x47,0x89,0x21,0x29,0x4c,0x8c,0x81,0x07,0x4d,0x83,
- 0x9b,0xa0,0x2a,0x1b,0x68,0x78,0x50,0x2f,0x98,0x10,0xb2,0xce,0x8f,0x06,0x93,0x38,
- 0x71,0xef,0x9d,0x99,0x7b,0xe7,0xce,0xaf,0x67,0xaf,0xf7,0x8f,0x3d,0x99,0x77,0x35,
- 0xdc,0x73,0xde,0x9d,0x73,0x3e,0xf3,0x3d,0xe7,0x41,0x71,0x6c,0xd2,0xfa,0x1f,0x80,
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+ 0x41,0x39,0x32,0x28,0xe5,0x63,0xf8,0xad,0x0e,0x6b,0xd6,0x78,0x01,0x9a,0xe1,0x57,
+ 0xa9,0xb1,0x11,0x5d,0xe4,0x23,0xc6,0xf9,0x70,0xdc,0x14,0xf5,0x10,0x8b,0xb7,0x1e,
+ 0x1f,0x4f,0xb3,0x74,0x7c,0x27,0x1f,0x85,0x1b,0xd9,0x80,0x2e,0xa2,0x7f,0x6a,0x02,
+ 0x34,0xb8,0x5f,0x64,0xe6,0xd2,0xc8,0x42,0x9e,0x4f,0x4f,0x11,0x0d,0xce,0x26,0x9f,
+ 0x85,0xa2,0x06,0xab,0x86,0x0f,0x05,0x45,0xca,0xa6,0x28,0x9f,0x1e,0x7d,0xa5,0x44,
+ 0x67,0xf3,0x86,0xc6,0x7a,0x41,0x3e,0x14,0xf4,0x95,0x3b,0x6b,0xb4,0x31,0xe0,0xe4,
+ 0x73,0x09,0x69,0x50,0x27,0xad,0x18,0x2e,0x21,0x28,0xbe,0x30,0x58,0x98,0xf3,0x61,
+ 0x66,0x54,0x71,0x7f,0x17,0x4b,0x72,0xb5,0x3f,0x9b,0x9c,0x09,0x83,0xd1,0x7f,0x1b,
+ 0xe7,0xfa,0x23,0x76,0xae,0xea,0x47,0xc9,0x61,0x4b,0x83,0x64,0x76,0x8d,0xf0,0x44,
+ 0x66,0x8d,0xa9,0xa4,0x91,0x62,0x7d,0x8c,0x7c,0xd8,0x36,0x58,0x28,0x46,0xa9,0x99,
+ 0x19,0x89,0xd5,0xfe,0x6d,0x34,0x17,0x33,0x62,0x9c,0xd9,0x74,0xea,0x67,0x1a,0xc7,
+ 0x4c,0xe4,0x43,0x25,0xd7,0x45,0xa2,0x97,0xed,0x58,0x3a,0x87,0xdb,0x34,0xdd,0xc3,
+ 0x08,0xf5,0x1f,0xdf,0xed,0x3f,0x0a,0xcb,0xf5,0x8a,0x0e,0x93,0xda,0x03,0xf8,0x01,
+ 0xcd,0xde,0xa4,0x16,0x0a,0xe4,0x43,0xed,0x65,0x26,0x24,0x53,0xac,0x87,0x6e,0x22,
+ 0xaf,0xb7,0xa6,0xbc,0xc5,0x35,0xd8,0x90,0xc7,0xc5,0x3e,0x1c,0xd5,0x82,0x2d,0x79,
+ 0x1d,0xcd,0x19,0xc7,0x38,0xf5,0x2c,0xbe,0x40,0x1a,0xf4,0xa2,0x0a,0xce,0x0b,0x58,
+ 0x2d,0x7b,0xb0,0x5a,0xb0,0xed,0x5c,0x25,0x2c,0xec,0x89,0x3b,0x19,0x28,0x3a,0xf9,
+ 0x60,0xfd,0x34,0x4d,0x91,0xc0,0x2d,0xa2,0xc1,0x8d,0xa5,0x12,0x1f,0xa6,0xc6,0xad,
+ 0x9f,0x05,0xa9,0x86,0x8d,0x66,0xd7,0xf3,0x2b,0x32,0xee,0xfb,0x68,0x82,0x8a,0x54,
+ 0xda,0x6f,0x76,0x8c,0xe9,0x1b,0x03,0xce,0xf5,0xc1,0xf7,0xcb,0xa0,0x11,0x4d,0x78,
+ 0xf0,0x4b,0x13,0x06,0x8d,0x1f,0x45,0x5d,0x2c,0x42,0xac,0x31,0x82,0xa6,0x19,0x0f,
+ 0x8c,0x51,0xce,0xf5,0xf1,0xa8,0xff,0x10,0x1f,0x82,0xc2,0x69,0x14,0x70,0x3e,0xf5,
+ 0xe4,0x82,0xb0,0xa0,0xa8,0xc6,0xf8,0x10,0xf3,0xd9,0x3f,0x4d,0x7c,0x88,0xcd,0x60,
+ 0x3f,0x32,0xd9,0x7c,0x0b,0xf9,0x10,0x52,0x3e,0xcc,0x41,0xd1,0xc9,0x47,0xec,0xe8,
+ 0x3f,0xa5,0xb6,0x93,0x1b,0xe7,0xfa,0xa8,0xca,0x55,0x78,0x08,0x35,0xfa,0xe2,0x40,
+ 0x32,0xf1,0x30,0x6b,0x3b,0x1e,0x99,0xf5,0xbc,0x23,0x39,0xf9,0x24,0xb8,0x4d,0x53,
+ 0xb8,0x4d,0x9a,0xf6,0x0b,0x37,0x4e,0xfb,0x5b,0x70,0x5c,0xdc,0xc2,0x48,0xbc,0x95,
+ 0xfe,0xcb,0xe9,0x3f,0x31,0x9e,0xe0,0x09,0x35,0xf5,0x4d,0xf5,0x91,0x7e,0xba,0x11,
+ 0xa9,0xba,0x5f,0x95,0x30,0x84,0x48,0x79,0x64,0x7e,0x82,0x34,0xe2,0xd4,0x33,0xbe,
+ 0x53,0x8f,0xa9,0xc9,0xb8,0x1a,0xcb,0xfb,0xd0,0x3e,0x3d,0xa9,0xaa,0x0d,0x5c,0xd6,
+ 0x06,0x2f,0x46,0xf3,0x02,0xda,0xaa,0x4e,0x66,0xd3,0xc9,0x67,0x51,0x5e,0x19,0x86,
+ 0xd1,0x52,0x08,0xdf,0xcb,0x64,0x80,0xa6,0x1e,0xa0,0x19,0x1a,0x73,0x37,0x33,0x6e,
+ 0xff,0x51,0xc4,0x87,0x83,0x0a,0x3d,0xa7,0xdc,0xf9,0xd4,0xd0,0x89,0x14,0xd7,0xa7,
+ 0xd7,0x49,0xf6,0x84,0xb5,0x25,0xa1,0x75,0xe7,0x6b,0x1f,0x41,0xb1,0x15,0xdc,0xcc,
+ 0xb0,0xf0,0x81,0x1c,0xe3,0x43,0xec,0x3f,0x9d,0x8b,0xc1,0x8c,0xec,0x9e,0xf6,0xfd,
+ 0x4e,0xec,0x37,0x64,0x57,0x04,0xca,0x1a,0x08,0x3a,0x32,0x0e,0x6c,0xc4,0xa9,0x1f,
+ 0x2a,0xc0,0xfc,0xb9,0x83,0xbf,0x36,0x81,0x25,0x09,0xb6,0x36,0x45,0x6e,0x8a,0x7a,
+ 0x00,0x69,0xb1,0x50,0x95,0xf9,0xb0,0x9f,0x19,0x1b,0x71,0xeb,0x67,0xa5,0x7a,0x41,
+ 0xdd,0x7b,0xde,0x3a,0xaa,0x57,0x2a,0x55,0xf5,0xdb,0xf3,0x83,0x47,0x27,0x57,0xc4,
+ 0x05,0x34,0xc7,0xd0,0x54,0x53,0xe3,0xe4,0x23,0x90,0x07,0x90,0x0f,0xf1,0xa6,0xff,
+ 0xf3,0x1c,0xdd,0xfd,0x2f,0x37,0x0b,0x0c,0x78,0x2b,0x0f,0x1c,0xc9,0xf8,0x70,0xf7,
+ 0xd9,0xb3,0xc4,0x87,0xcf,0xae,0x1d,0x31,0x7c,0xf8,0xc4,0xf0,0xe1,0xef,0x64,0x96,
+ 0x9d,0xe5,0x70,0x2a,0xe3,0xc3,0x93,0x37,0xce,0x13,0x1f,0x6e,0xbf,0x3e,0x65,0xc0,
+ 0xec,0x95,0xe5,0xc3,0x5f,0xb7,0x5f,0x6d,0x97,0x78,0xec,0x7d,0x65,0xb0,0xf0,0xe5,
+ 0x3a,0x1e,0xf6,0xdf,0x14,0x14,0xe7,0x1e,0x2f,0x93,0x31,0x7c,0x68,0x22,0xdf,0xba,
+ 0xeb,0x0d,0x16,0xfe,0xf3,0x37,0xa5,0x91,0x81,0xe2,0x0d,0x63,0x2c,0x1f,0x52,0xa4,
+ 0xc4,0xab,0x27,0x33,0x3e,0x3c,0xb0,0xef,0xdc,0x9f,0x77,0xda,0xb4,0xfe,0xbb,0x73,
+ 0xa3,0xcf,0xe9,0x85,0x39,0x6a,0x7e,0x78,0xf6,0x11,0x8e,0x58,0xf8,0xb6,0xc6,0xbf,
+ 0x8b,0xf5,0x0f,0x3f,0x0a,0x8b,0xc5,0x62,0xb1,0x58,0x2c,0x16,0x8b,0xc5,0xfa,0xd4,
+ 0x65,0x66,0x07,0xc9,0xb3,0x03,0x8b,0xc5,0x62,0xb1,0x58,0x2c,0x16,0x8b,0xc5,0x7a,
+ 0xb7,0xcc,0xec,0x50,0xe3,0xd9,0x81,0xc5,0x62,0xb1,0x58,0x2c,0x16,0x8b,0xc5,0x62,
+ 0xbd,0x5b,0x66,0x76,0xf0,0xcc,0xec,0xf0,0xb1,0x53,0x61,0xb1,0x58,0x2c,0x16,0x8b,
+ 0xc5,0x62,0xb1,0x58,0xff,0xa3,0x22,0xfa,0x7d,0x1c,0x3c,0xfb,0x23,0x02,0x4d,0xbf,
+ 0x5a,0xa9,0x46,0xa0,0xde,0xfb,0xf3,0x84,0xf4,0xb5,0x13,0x11,0x6c,0x88,0xe2,0x98,
+ 0x7f,0x7d,0xb9,0x73,0xdd,0x1b,0x3b,0x1c,0x29,0xc2,0xf0,0x33,0x01,0x00,
diff --git a/board/esd/plu405/plu405.c b/board/esd/plu405/plu405.c
index 59171f8..f026a7a 100644
--- a/board/esd/plu405/plu405.c
+++ b/board/esd/plu405/plu405.c
@@ -23,6 +23,7 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/io.h>
#include <command.h>
#include <malloc.h>
@@ -31,6 +32,8 @@
#define FPGA_DEBUG
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
extern void lxt971_no_sleep(void);
@@ -114,6 +117,10 @@
int index;
int i;
+ /* adjust flash start and offset */
+ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
+ gd->bd->bi_flashoffset = 0;
+
dst = malloc(CFG_FPGA_MAX_SIZE);
if (gunzip (dst, CFG_FPGA_MAX_SIZE, (uchar *)fpgadata, &len) != 0) {
printf ("GUNZIP ERROR - must RESET board to recover\n");
@@ -177,18 +184,12 @@
/*
* Reset external DUARTs
*/
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_DUART_RST); /* set reset to high */
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) | CFG_DUART_RST);
udelay(10); /* wait 10us */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_DUART_RST); /* set reset to low */
+ out_be32((void *)GPIO0_OR, in_be32((void *)GPIO0_OR) & ~CFG_DUART_RST);
udelay(1000); /* wait 1ms */
/*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
* Enable interrupts in exar duart mcr[3]
*/
*duart0_mcr = 0x08;
@@ -226,24 +227,10 @@
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-
#ifdef CONFIG_IDE_RESET
void ide_set_reset(int on)
{
@@ -262,31 +249,6 @@
#endif /* CONFIG_IDE_RESET */
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
-
-
-#ifdef CONFIG_AUTO_UPDATE_SHOW
-void board_auto_update_show(int au_active)
-{
- if (au_active) {
- printf("\n Dies ist die board-funktion: Updating!!!\n");
- } else {
- printf("\n Dies ist die board-funktion: Updating done!!!\n");
- }
-}
-#endif
-
void reset_phy(void)
{
#ifdef CONFIG_LXT971_NO_SLEEP
diff --git a/board/esd/voh405/Makefile b/board/esd/voh405/Makefile
index 4d75868..308f752 100644
--- a/board/esd/voh405/Makefile
+++ b/board/esd/voh405/Makefile
@@ -28,7 +28,9 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o ../common/misc.o
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ ../common/esd405ep_nand.o \
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/voh405/voh405.c b/board/esd/voh405/voh405.c
index 22995b5..2857a0b 100644
--- a/board/esd/voh405/voh405.c
+++ b/board/esd/voh405/voh405.c
@@ -195,12 +195,6 @@
udelay(1000); /* wait 1ms */
/*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
* Enable interrupts in exar duart mcr[3]
*/
*duart0_mcr = 0x08;
@@ -340,17 +334,3 @@
}
}
#endif /* CONFIG_IDE_RESET */
-
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/esd/wuh405/Makefile b/board/esd/wuh405/Makefile
index 4d75868..308f752 100644
--- a/board/esd/wuh405/Makefile
+++ b/board/esd/wuh405/Makefile
@@ -28,7 +28,9 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o ../common/misc.o
+COBJS = $(BOARD).o flash.o \
+ ../common/misc.o \
+ ../common/esd405ep_nand.o \
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/esd/wuh405/wuh405.c b/board/esd/wuh405/wuh405.c
index 5a1a3f3..dba3ce8 100644
--- a/board/esd/wuh405/wuh405.c
+++ b/board/esd/wuh405/wuh405.c
@@ -170,12 +170,6 @@
udelay(1000); /* wait 1ms */
/*
- * Set NAND-FLASH GPIO signals to default
- */
- out32(GPIO0_OR, in32(GPIO0_OR) & ~(CFG_NAND_CLE | CFG_NAND_ALE));
- out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);
-
- /*
* Enable interrupts in exar duart mcr[3]
*/
*duart0_mcr = 0x08;
@@ -218,35 +212,5 @@
mtdcr(memcfga, mem_mb0cf);
val = mfdcr(memcfgd);
-#if 0
- printf("\nmb0cf=%x\n", val); /* test-only */
- printf("strap=%x\n", mfdcr(strap)); /* test-only */
-#endif
-
return (4*1024*1024 << ((val & 0x000e0000) >> 17));
}
-
-/* ------------------------------------------------------------------------- */
-
-int testdram (void)
-{
- /* TODO: XXX XXX XXX */
- printf ("test: 16 MB - ok\n");
-
- return (0);
-}
-
-/* ------------------------------------------------------------------------- */
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
-#include <linux/mtd/nand_legacy.h>
-extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
-
-void nand_init(void)
-{
- nand_probe(CFG_NAND_BASE);
- if (nand_dev_desc[0].ChipID != NAND_ChipID_UNKNOWN) {
- print_size(nand_dev_desc[0].totlen, "\n");
- }
-}
-#endif
diff --git a/board/etin/debris/phantom.c b/board/etin/debris/phantom.c
index 0b81fc0..18ab500 100644
--- a/board/etin/debris/phantom.c
+++ b/board/etin/debris/phantom.c
@@ -18,7 +18,7 @@
#include <command.h>
#include <rtc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
#define RTC_BASE (CFG_NVRAM_BASE_ADDR + 0x7fff8)
diff --git a/board/etin/debris/u-boot.lds b/board/etin/debris/u-boot.lds
deleted file mode 100644
index c742bcd..0000000
--- a/board/etin/debris/u-boot.lds
+++ /dev/null
@@ -1,132 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/etin/kvme080/u-boot.lds b/board/etin/kvme080/u-boot.lds
deleted file mode 100644
index dda3687..0000000
--- a/board/etin/kvme080/u-boot.lds
+++ /dev/null
@@ -1,128 +0,0 @@
-/*
- * (C) Copyright 2001-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c
index eafa48b..add2b3d 100644
--- a/board/evb64260/eth.c
+++ b/board/evb64260/eth.c
@@ -31,7 +31,7 @@
#include "eth.h"
#include "eth_addrtbl.h"
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
#define GT6426x_ETH_BUF_SIZE 1536
@@ -797,11 +797,11 @@
eth_register(dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
gt6426x_miiphy_read, gt6426x_miiphy_write);
#endif
}
}
-#endif /* CFG_CMD_NET && CONFIG_NET_MULTI */
+#endif
diff --git a/board/evb64260/serial.c b/board/evb64260/serial.c
index 191445c..f1bcab3 100644
--- a/board/evb64260/serial.c
+++ b/board/evb64260/serial.c
@@ -153,7 +153,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void
kgdb_serial_init(void)
{
@@ -182,4 +182,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/evb64260/zuma_pbb.c b/board/evb64260/zuma_pbb.c
index d64025a..296e461 100644
--- a/board/evb64260/zuma_pbb.c
+++ b/board/evb64260/zuma_pbb.c
@@ -1,7 +1,7 @@
#include <common.h>
#include <malloc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#include <command.h>
#endif
@@ -166,7 +166,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
static int last_cmd = 4; /* write increment */
static int last_size = 64;
@@ -217,4 +217,4 @@
" - init zuma mbox\n"
);
-#endif /* CFG_CMD_BSP */
+#endif
diff --git a/board/fads/fads.c b/board/fads/fads.c
index 7b04af5..8f5736b 100644
--- a/board/fads/fads.c
+++ b/board/fads/fads.c
@@ -778,7 +778,7 @@
/* ========================================================================= */
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#ifdef CFG_PCMCIA_MEM_ADDR
volatile unsigned char *pcmcia_mem = (unsigned char*)CFG_PCMCIA_MEM_ADDR;
@@ -921,7 +921,7 @@
return 0;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
/* ========================================================================= */
diff --git a/board/fads/fads.h b/board/fads/fads.h
index 41f18b5..dea8a0d 100644
--- a/board/fads/fads.h
+++ b/board/fads/fads.h
@@ -71,7 +71,10 @@
#undef CONFIG_BOOTARGS
#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+#if !defined(CONFIG_MPC885ADS)
#define CONFIG_BZIP2 /* include support for bzip2 compressed images */
+#endif
/*
* New MPC86xADS and MPC885ADS provide two Ethernet connectivity options:
@@ -95,21 +98,33 @@
#define CFG_DISCOVER_PHY
#endif
-#ifndef CONFIG_COMMANDS
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_DHCP \
- | CFG_CMD_ECHO \
- | CFG_CMD_IMMAP \
- | CFG_CMD_JFFS2 \
- | CFG_CMD_MII \
- | CFG_CMD_PCMCIA \
- | CFG_CMD_PING \
- )
-#endif /* !CONFIG_COMMANDS */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+#if !defined(FADS_COMMANDS_ALREADY_DEFINED)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_PING
+
+#endif
+
/*
* Miscellaneous configurable options
@@ -118,7 +133,7 @@
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* #undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -214,10 +229,11 @@
#define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sector total size */
#define CFG_ENV_OFFSET CFG_ENV_SECT_SIZE
#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
#define CFG_DIRECT_FLASH_TFTP
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
/*
* JFFS2 partitions
@@ -238,7 +254,7 @@
*/
#define CFG_JFFS2_SORT_FRAGMENTS
-#endif /* CFG_CMD_JFFS2 */
+#endif
/*-----------------------------------------------------------------------
* Cache Configuration
@@ -249,7 +265,7 @@
/*-----------------------------------------------------------------------
* I2C configuration
*/
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address defaults */
#define CFG_I2C_SLAVE 0x7F
@@ -467,7 +483,7 @@
#define CONFIG_ISO_PARTITION 1
#undef CONFIG_ATAPI
-#if 0 /* does not make sense when CFG_CMD_IDE is not enabled, too */
+#if 0 /* does not make sense when CONFIG_CMD_IDE is not enabled, too */
#define CONFIG_IDE_8xx_PCCARD 1 /* Use IDE with PC Card Adapter */
#endif
#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
diff --git a/board/fads/pcmcia.c b/board/fads/pcmcia.c
index 978c16b..57a2454 100644
--- a/board/fads/pcmcia.c
+++ b/board/fads/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -73,12 +73,12 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
*((uint *)BCSR1) &= ~BCSR1_PCCEN;
return 0;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
#endif /* CONFIG_PCMCIA */
diff --git a/board/freescale/common/Makefile b/board/freescale/common/Makefile
new file mode 100644
index 0000000..44f613e
--- /dev/null
+++ b/board/freescale/common/Makefile
@@ -0,0 +1,56 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+ifneq ($(OBJTREE),$(SRCTREE))
+$(shell mkdir -p $(obj)board/$(VENDOR)/common)
+endif
+
+LIB = $(obj)lib$(VENDOR).a
+
+COBJS := sys_eeprom.o \
+ pixis.o \
+ pq-mds-pib.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/common/pixis.c b/board/freescale/common/pixis.c
index af98157..fd99a93 100644
--- a/board/freescale/common/pixis.c
+++ b/board/freescale/common/pixis.c
@@ -25,8 +25,9 @@
#include <common.h>
#include <command.h>
#include <watchdog.h>
-#include <asm/cache.h>
+#ifdef CONFIG_FSL_PIXIS
+#include <asm/cache.h>
#include "pixis.h"
@@ -321,10 +322,10 @@
mulconst = 1;
for (i = 0; i < decarr_len; i++)
mulconst *= 10;
- decval = simple_strtoul(decarr, NULL, 10);
+ decval = simple_strtoul((char *)decarr, NULL, 10);
}
- intval = simple_strtoul(intarr, NULL, 10);
+ intval = simple_strtoul((char *)intarr, NULL, 10);
intval = intval * mulconst;
retval = intval + decval;
@@ -362,7 +363,7 @@
val = set_px_sysclk(simple_strtoul(argv[2], NULL, 10));
- corepll = strfractoint(argv[3]);
+ corepll = strfractoint((uchar *)argv[3]);
val = val + set_px_corepll(corepll);
val = val + set_px_mpxpll(simple_strtoul(argv[4], NULL, 10));
if (val == 3) {
@@ -410,7 +411,7 @@
read_from_px_regs(0);
read_from_px_regs_altbank(0);
val = set_px_sysclk(simple_strtoul(argv[3], NULL, 10));
- corepll = strfractoint(argv[4]);
+ corepll = strfractoint((uchar *)argv[4]);
val = val + set_px_corepll(corepll);
val = val + set_px_mpxpll(simple_strtoul(argv[5],
NULL, 10));
@@ -470,3 +471,4 @@
" pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
" pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>\n"
);
+#endif /* CONFIG_FSL_PIXIS */
diff --git a/board/freescale/common/pq-mds-pib.c b/board/freescale/common/pq-mds-pib.c
new file mode 100644
index 0000000..d79f2eb
--- /dev/null
+++ b/board/freescale/common/pq-mds-pib.c
@@ -0,0 +1,105 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc.
+ *
+ * Tony Li <tony.li@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation;
+ */
+
+#include <common.h>
+#include <i2c.h>
+#include <asm/io.h>
+
+#ifdef CONFIG_PQ_MDS_PIB
+
+#include "pq-mds-pib.h"
+
+int pib_init(void)
+{
+ u8 val8;
+ u8 orig_i2c_bus;
+
+ /* Switch temporarily to I2C bus #2 */
+ orig_i2c_bus = i2c_get_bus_num();
+ i2c_set_bus_num(1);
+
+ val8 = 0;
+#if defined(CONFIG_PCI) && !defined(CONFIG_PCISLAVE)
+ /* Assign PIB PMC slot to desired PCI bus */
+ i2c_write(0x23, 0x6, 1, &val8, 1);
+ i2c_write(0x23, 0x7, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x23, 0x2, 1, &val8, 1);
+ i2c_write(0x23, 0x3, 1, &val8, 1);
+
+ val8 = 0;
+ i2c_write(0x26, 0x6, 1, &val8, 1);
+ val8 = 0x34;
+ i2c_write(0x26, 0x7, 1, &val8, 1);
+#if defined(CONFIG_MPC832XEMDS)
+ val8 = 0xf9; /* PMC2, PMC3 slot to PCI bus */
+#else
+ val8 = 0xf3; /* PMC1, PMC2, PMC3 slot to PCI bus */
+#endif
+ i2c_write(0x26, 0x2, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x26, 0x3, 1, &val8, 1);
+
+ val8 = 0;
+ i2c_write(0x27, 0x6, 1, &val8, 1);
+ i2c_write(0x27, 0x7, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x27, 0x2, 1, &val8, 1);
+ val8 = 0xef;
+ i2c_write(0x27, 0x3, 1, &val8, 1);
+
+ eieio();
+
+#if defined(CONFIG_MPC832XEMDS)
+ printf("PCI 32bit bus on PMC2 &PMC3\n");
+#else
+ printf("PCI 32bit bus on PMC1 & PMC2 &PMC3\n");
+#endif
+#endif
+
+#if defined(CONFIG_PQ_MDS_PIB_ATM)
+#if defined(CONFIG_MPC8360EMDS)
+ val8 = 0;
+ i2c_write(0x20, 0x6, 1, &val8, 1);
+ i2c_write(0x20, 0x7, 1, &val8, 1);
+
+ val8 = 0xdf;
+ i2c_write(0x20, 0x2, 1, &val8, 1);
+ val8 = 0xf7;
+ i2c_write(0x20, 0x3, 1, &val8, 1);
+
+ eieio();
+
+ printf("QOC3 ATM card on PMC0\n");
+#elif defined(CONFIG_MPC832XEMDS)
+ val = 0;
+ i2c_write(0x26, 0x7, 1, &val, 1);
+ val = 0xf7;
+ i2c_write(0x26, 0x3, 1, &val, 1);
+
+ val = 0;
+ i2c_write(0x21, 0x6, 1, &val, 1);
+ i2c_write(0x21, 0x7, 1, &val, 1);
+
+ val = 0xdf;
+ i2c_write(0x21, 0x2, 1, &val, 1);
+ val = 0xef;
+ i2c_write(0x21, 0x3, 1, &val, 1);
+
+ eieio();
+
+ printf("QOC3 ATM card on PMC1\n");
+#endif
+#endif
+ /* Reset to original I2C bus */
+ i2c_set_bus_num(orig_i2c_bus);
+ return 0;
+}
+#endif /* CONFIG_PQ_MDS_PIB */
diff --git a/board/freescale/common/pq-mds-pib.h b/board/freescale/common/pq-mds-pib.h
new file mode 100644
index 0000000..67066fd
--- /dev/null
+++ b/board/freescale/common/pq-mds-pib.h
@@ -0,0 +1,9 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation;
+ */
+
+extern int pib_init(void);
diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c
new file mode 100644
index 0000000..7bc663b
--- /dev/null
+++ b/board/freescale/common/sys_eeprom.c
@@ -0,0 +1,256 @@
+/*
+ * Copyright 2006 Freescale Semiconductor
+ * York Sun (yorksun@freescale.com)
+ * Haiying Wang (haiying.wang@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <i2c.h>
+#include <linux/ctype.h>
+
+#ifdef CFG_ID_EEPROM
+typedef struct {
+ unsigned char id[4]; /* 0x0000 - 0x0003 */
+ unsigned char sn[12]; /* 0x0004 - 0x000F */
+ unsigned char errata[5]; /* 0x0010 - 0x0014 */
+ unsigned char date[7]; /* 0x0015 - 0x001a */
+ unsigned char res_1[37]; /* 0x001b - 0x003f */
+ unsigned char tab_size; /* 0x0040 */
+ unsigned char tab_flag; /* 0x0041 */
+ unsigned char mac[8][6]; /* 0x0042 - 0x0071 */
+ unsigned char res_2[126]; /* 0x0072 - 0x00ef */
+ unsigned int crc; /* 0x00f0 - 0x00f3 crc32 checksum */
+} EEPROM_data;
+
+static EEPROM_data mac_data;
+
+int mac_show(void)
+{
+ int i;
+ unsigned char ethaddr[8][18];
+
+ printf("ID %c%c%c%c\n",
+ mac_data.id[0],
+ mac_data.id[1],
+ mac_data.id[2],
+ mac_data.id[3]);
+ printf("Errata %c%c%c%c%c\n",
+ mac_data.errata[0],
+ mac_data.errata[1],
+ mac_data.errata[2],
+ mac_data.errata[3],
+ mac_data.errata[4]);
+ printf("Date %c%c%c%c%c%c%c\n",
+ mac_data.date[0],
+ mac_data.date[1],
+ mac_data.date[2],
+ mac_data.date[3],
+ mac_data.date[4],
+ mac_data.date[5],
+ mac_data.date[6]);
+ for (i = 0; i < 8; i++) {
+ sprintf((char *)ethaddr[i],
+ "%02x:%02x:%02x:%02x:%02x:%02x",
+ mac_data.mac[i][0],
+ mac_data.mac[i][1],
+ mac_data.mac[i][2],
+ mac_data.mac[i][3],
+ mac_data.mac[i][4],
+ mac_data.mac[i][5]);
+ printf("MAC %d %s\n", i, ethaddr[i]);
+ }
+
+ setenv("ethaddr", (char *)ethaddr[0]);
+ setenv("eth1addr", (char *)ethaddr[1]);
+ setenv("eth2addr", (char *)ethaddr[2]);
+ setenv("eth3addr", (char *)ethaddr[3]);
+
+ return 0;
+}
+
+int mac_read(void)
+{
+ int ret, length;
+ unsigned int crc = 0;
+ unsigned char dev = ID_EEPROM_ADDR, *data;
+
+ length = sizeof(EEPROM_data);
+ ret = i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length);
+ if (ret) {
+ printf("Read failed.\n");
+ return -1;
+ }
+
+ data = (unsigned char *)(&mac_data);
+ printf("Check CRC on reading ...");
+ crc = crc32(crc, data, length - 4);
+ if (crc != mac_data.crc) {
+ printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
+ mac_data.crc, crc);
+ return -1;
+ } else {
+ printf("CRC OK\n");
+ mac_show();
+ }
+ return 0;
+}
+
+int mac_prog(void)
+{
+ int ret, i, length;
+ unsigned int crc = 0;
+ unsigned char dev = ID_EEPROM_ADDR, *ptr;
+ unsigned char *eeprom_data = (unsigned char *)(&mac_data);
+
+ for (i = 0; i < sizeof(mac_data.res_1); i++)
+ mac_data.res_1[i] = 0;
+ for (i = 0; i < sizeof(mac_data.res_2); i++)
+ mac_data.res_2[i] = 0;
+ length = sizeof(EEPROM_data);
+ crc = crc32(crc, eeprom_data, length - 4);
+ mac_data.crc = crc;
+ for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
+ ret =
+ i2c_write(dev, i, 1, ptr,
+ (length - i) < 8 ? (length - i) : 8);
+ udelay(5000); /* 5ms write cycle timing */
+ if (ret)
+ break;
+ }
+ if (ret) {
+ printf("Programming failed.\n");
+ return -1;
+ } else {
+ printf("Programming %d bytes. Reading back ...\n", length);
+ mac_read();
+ }
+ return 0;
+}
+
+int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ int i;
+ char cmd = 's';
+ unsigned long long mac_val;
+
+ if (i2c_probe(ID_EEPROM_ADDR) != 0)
+ return -1;
+
+ if (argc > 1) {
+ cmd = argv[1][0];
+ switch (cmd) {
+ case 'r': /* display */
+ mac_read();
+ break;
+ case 's': /* save */
+ mac_prog();
+ break;
+ case 'i': /* id */
+ for (i = 0; i < 4; i++) {
+ mac_data.id[i] = argv[2][i];
+ }
+ break;
+ case 'n': /* serial number */
+ for (i = 0; i < 12; i++) {
+ mac_data.sn[i] = argv[2][i];
+ }
+ break;
+ case 'e': /* errata */
+ for (i = 0; i < 5; i++) {
+ mac_data.errata[i] = argv[2][i];
+ }
+ break;
+ case 'd': /* date */
+ for (i = 0; i < 7; i++) {
+ mac_data.date[i] = argv[2][i];
+ }
+ break;
+ case 'p': /* number of ports */
+ mac_data.tab_size =
+ (unsigned char)simple_strtoul(argv[2], NULL, 16);
+ break;
+ case '0': /* mac 0 */
+ case '1': /* mac 1 */
+ case '2': /* mac 2 */
+ case '3': /* mac 3 */
+ case '4': /* mac 4 */
+ case '5': /* mac 5 */
+ case '6': /* mac 6 */
+ case '7': /* mac 7 */
+ mac_val = simple_strtoull(argv[2], NULL, 16);
+ for (i = 0; i < 6; i++) {
+ mac_data.mac[cmd - '0'][i] =
+ *((unsigned char *)
+ (((unsigned int)(&mac_val)) + i + 2));
+ }
+ break;
+ case 'h': /* help */
+ default:
+ printf("Usage:\n%s\n", cmdtp->usage);
+ break;
+ }
+ } else {
+ mac_show();
+ }
+ return 0;
+}
+
+int mac_read_from_eeprom(void)
+{
+ int length, i;
+ unsigned char dev = ID_EEPROM_ADDR;
+ unsigned char *data;
+ unsigned char ethaddr[4][18];
+ unsigned char enetvar[32];
+ unsigned int crc = 0;
+
+ length = sizeof(EEPROM_data);
+ if (i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length)) {
+ printf("Read failed.\n");
+ return -1;
+ }
+
+ data = (unsigned char *)(&mac_data);
+ crc = crc32(crc, data, length - 4);
+ if (crc != mac_data.crc) {
+ return -1;
+ } else {
+ for (i = 0; i < 4; i++) {
+ if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
+ sprintf((char *)ethaddr[i],
+ "%02x:%02x:%02x:%02x:%02x:%02x",
+ mac_data.mac[i][0],
+ mac_data.mac[i][1],
+ mac_data.mac[i][2],
+ mac_data.mac[i][3],
+ mac_data.mac[i][4],
+ mac_data.mac[i][5]);
+ sprintf((char *)enetvar,
+ i ? "eth%daddr" : "ethaddr",
+ i);
+ setenv((char *)enetvar, (char *)ethaddr[i]);
+ }
+ }
+ }
+ return 0;
+}
+#endif /* CFG_ID_EEPROM */
diff --git a/board/freescale/m5235evb/Makefile b/board/freescale/m5235evb/Makefile
new file mode 100644
index 0000000..74c2528
--- /dev/null
+++ b/board/freescale/m5235evb/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o mii.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/m5235evb/config.mk b/board/freescale/m5235evb/config.mk
new file mode 100644
index 0000000..ada38dd
--- /dev/null
+++ b/board/freescale/m5235evb/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+/*TEXT_BASE = 0xFFC00000*/
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
\ No newline at end of file
diff --git a/board/freescale/m5235evb/m5235evb.c b/board/freescale/m5235evb/m5235evb.c
new file mode 100644
index 0000000..585854c
--- /dev/null
+++ b/board/freescale/m5235evb/m5235evb.c
@@ -0,0 +1,117 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ puts("Board: ");
+ puts("Freescale M5235 EVB\n");
+ return 0;
+};
+
+long int initdram(int board_type)
+{
+ volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
+ volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO);
+ u32 dramsize, i, dramclk;
+
+ /*
+ * When booting from external Flash, the port-size is less than
+ * the port-size of SDRAM. In this case it is necessary to enable
+ * Data[15:0] on Port Address/Data.
+ */
+ gpio->par_ad =
+ GPIO_PAR_AD_ADDR23 | GPIO_PAR_AD_ADDR22 | GPIO_PAR_AD_ADDR21 |
+ GPIO_PAR_AD_DATAL;
+
+ /* Initialize PAR to enable SDRAM signals */
+ gpio->par_sdram =
+ GPIO_PAR_SDRAM_SDWE | GPIO_PAR_SDRAM_SCAS | GPIO_PAR_SDRAM_SRAS |
+ GPIO_PAR_SDRAM_SCKE | GPIO_PAR_SDRAM_SDCS(3);
+
+ dramsize = CFG_SDRAM_SIZE * 0x100000;
+ for (i = 0x13; i < 0x20; i++) {
+ if (dramsize == (1 << i))
+ break;
+ }
+ i--;
+
+ if (!(sdram->dacr0 & SDRAMC_DARCn_RE)) {
+ dramclk = gd->bus_clk / (CFG_HZ * CFG_HZ);
+
+ /* Initialize DRAM Control Register: DCR */
+ sdram->dcr = SDRAMC_DCR_RTIM_9CLKS |
+ SDRAMC_DCR_RTIM_6CLKS | SDRAMC_DCR_RC((15 * dramclk) >> 4);
+
+ /* Initialize DACR0 */
+ sdram->dacr0 =
+ SDRAMC_DARCn_BA(CFG_SDRAM_BASE) | SDRAMC_DARCn_CASL_C1 |
+ SDRAMC_DARCn_CBM_CMD20 | SDRAMC_DARCn_PS_32;
+
+ /* Initialize DMR0 */
+ sdram->dmr0 = ((dramsize - 1) & 0xFFFC0000) | SDRAMC_DMRn_V;
+
+ /* Set IP (bit 3) in DACR */
+ sdram->dacr0 |= SDRAMC_DARCn_IP;
+
+ /* Wait 30ns to allow banks to precharge */
+ for (i = 0; i < 5; i++) {
+ asm("nop");
+ }
+
+ /* Write to this block to initiate precharge */
+ *(u32 *) (CFG_SDRAM_BASE) = 0xA5A59696;
+
+ /* Set RE (bit 15) in DACR */
+ sdram->dacr0 |= SDRAMC_DARCn_RE;
+
+ /* Wait for at least 8 auto refresh cycles to occur */
+ for (i = 0; i < 0x2000; i++) {
+ asm("nop");
+ }
+
+ /* Finish the configuration by issuing the MRS. */
+ sdram->dacr0 |= SDRAMC_DARCn_IMRS;
+
+ /* Write to the SDRAM Mode Register */
+ *(u32 *) (CFG_SDRAM_BASE + 0x400) = 0xA5A59696;
+ }
+
+ return dramsize;
+};
+
+int testdram(void)
+{
+ /* TODO: XXX XXX XXX */
+ printf("DRAM test not implemented!\n");
+
+ return (0);
+}
diff --git a/board/freescale/m5235evb/mii.c b/board/freescale/m5235evb/mii.c
new file mode 100644
index 0000000..1fd4d99
--- /dev/null
+++ b/board/freescale/m5235evb/mii.c
@@ -0,0 +1,307 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ if (setclear) {
+ gpio->par_feci2c |=
+ (GPIO_PAR_FECI2C_EMDC_FECEMDC | GPIO_PAR_FECI2C_EMDIO_FECEMDIO);
+ } else {
+ gpio->par_feci2c &=
+ ~(GPIO_PAR_FECI2C_EMDC_MASK | GPIO_PAR_FECI2C_EMDIO_MASK);
+ }
+
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+#define PHY_ID_KS8721BL 0x00221619 /* Micrel KS8721BL/SL */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+#define STR_ID_KS8721BL "KS8721BL"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ strcpy(info->phy_name,
+ STR_ID_KS8721BL);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ printf(STR_ID_KS8721BL);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/freescale/m5235evb/u-boot.16 b/board/freescale/m5235evb/u-boot.16
new file mode 100644
index 0000000..8ffd326
--- /dev/null
+++ b/board/freescale/m5235evb/u-boot.16
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf523x/start.o (.text)
+ cpu/mcf523x/cpu_init.o (.text)
+ lib_m68k/traps.o (.text)
+ lib_m68k/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/m5235evb/u-boot.32 b/board/freescale/m5235evb/u-boot.32
new file mode 100644
index 0000000..9b72f66
--- /dev/null
+++ b/board/freescale/m5235evb/u-boot.32
@@ -0,0 +1,153 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf523x/start.o (.text)
+ cpu/mcf523x/cpu.o (.text)
+ cpu/mcf523x/cpu_init.o (.text)
+ cpu/mcf523x/interrupts.o (.text)
+ cpu/mcf523x/speed.o (.text)
+ lib_m68k/libm68k.a (.text)
+ common/dlmalloc.o (.text)
+ common/cmd_bootm.o (.text)
+ common/cmd_flash.o (.text)
+ common/cmd_elf.o (.text)
+ common/cmd_mem.o (.text)
+ common/console.o (.text)
+ common/main.o (.text)
+ lib_generic/libgeneric.a (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/m5235evb/u-boot.lds b/board/freescale/m5235evb/u-boot.lds
new file mode 100644
index 0000000..8ffd326
--- /dev/null
+++ b/board/freescale/m5235evb/u-boot.lds
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf523x/start.o (.text)
+ cpu/mcf523x/cpu_init.o (.text)
+ lib_m68k/traps.o (.text)
+ lib_m68k/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/m5249evb/Makefile b/board/freescale/m5249evb/Makefile
new file mode 100644
index 0000000..424ab1c
--- /dev/null
+++ b/board/freescale/m5249evb/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/m5249evb/config.mk b/board/freescale/m5249evb/config.mk
new file mode 100644
index 0000000..ccb2cf7
--- /dev/null
+++ b/board/freescale/m5249evb/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xffe00000
diff --git a/board/freescale/m5249evb/m5249evb.c b/board/freescale/m5249evb/m5249evb.c
new file mode 100644
index 0000000..e8f621b
--- /dev/null
+++ b/board/freescale/m5249evb/m5249evb.c
@@ -0,0 +1,113 @@
+/*
+ * (C) Copyright 2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <asm/immap.h>
+
+
+/* Prototypes */
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+int checkboard (void) {
+ ulong val;
+ uchar val8;
+
+ puts ("Board: ");
+ puts("Freescale M5249EVB");
+ val8 = ((uchar)~((uchar)mbar2_readLong(MCFSIM_GPIO1_READ) >> 4)) & 0xf;
+ printf(" (Switch=%1X)\n", val8);
+
+ /*
+ * Set LED on
+ */
+ val = mbar2_readLong(MCFSIM_GPIO1_OUT) & ~CFG_GPIO1_LED;
+ mbar2_writeLong(MCFSIM_GPIO1_OUT, val); /* Set LED on */
+
+ return 0;
+};
+
+
+long int initdram (int board_type) {
+ unsigned long junk = 0xa5a59696;
+
+ /*
+ * Note:
+ * RC = ([(RefreshTime/#rows) / (1/BusClk)] / 16) - 1
+ */
+
+#ifdef CFG_FAST_CLK
+ /*
+ * Busclk=70MHz, RefreshTime=64ms, #rows=4096 (4K)
+ * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=39
+ */
+ mbar_writeShort(MCFSIM_DCR, 0x8239);
+#elif CFG_PLL_BYPASS
+ /*
+ * Busclk=5.6448MHz, RefreshTime=64ms, #rows=8192 (8K)
+ * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=02
+ */
+ mbar_writeShort(MCFSIM_DCR, 0x8202);
+#else
+ /*
+ * Busclk=36MHz, RefreshTime=64ms, #rows=4096 (4K)
+ * SO=1, NAM=0, COC=0, RTIM=01 (6clk refresh), RC=22 (562 bus clock cycles)
+ */
+ mbar_writeShort(MCFSIM_DCR, 0x8222);
+#endif
+
+ /*
+ * SDRAM starts at 0x0000_0000, CASL=10, CBM=010, PS=10 (16bit port),
+ * PM=1 (continuous page mode)
+ */
+
+ /* RE=0 (keep auto-refresh disabled while setting up registers) */
+ mbar_writeLong(MCFSIM_DACR0, 0x00003324);
+
+ /* BAM=007c (bits 22,21 are bank selects; 256kB blocks) */
+ mbar_writeLong(MCFSIM_DMR0, 0x01fc0001);
+
+ /** Precharge sequence **/
+ mbar_writeLong(MCFSIM_DACR0, 0x0000332c); /* Set DACR0[IP] (bit 3) */
+ *((volatile unsigned long *) 0x00) = junk; /* write to a memory location to init. precharge */
+ udelay(0x10); /* Allow several Precharge cycles */
+
+ /** Refresh Sequence **/
+ mbar_writeLong(MCFSIM_DACR0, 0x0000b324); /* Enable the refresh bit, DACR0[RE] (bit 15) */
+ udelay(0x7d0); /* Allow gobs of refresh cycles */
+
+ /** Mode Register initialization **/
+ mbar_writeLong(MCFSIM_DACR0, 0x0000b364); /* Enable DACR0[IMRS] (bit 6); RE remains enabled */
+ *((volatile unsigned long *) 0x800) = junk; /* Access RAM to initialize the mode register */
+
+ return CFG_SDRAM_SIZE * 1024 * 1024;
+};
+
+
+int testdram (void) {
+ /* TODO: XXX XXX XXX */
+ printf ("DRAM test not implemented!\n");
+
+ return (0);
+}
diff --git a/board/freescale/m5249evb/u-boot.lds b/board/freescale/m5249evb/u-boot.lds
new file mode 100644
index 0000000..a803b1c
--- /dev/null
+++ b/board/freescale/m5249evb/u-boot.lds
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf52x2/start.o (.text)
+ lib_m68k/traps.o (.text)
+ cpu/mcf52x2/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/m5253evbe/Makefile b/board/freescale/m5253evbe/Makefile
new file mode 100644
index 0000000..424ab1c
--- /dev/null
+++ b/board/freescale/m5253evbe/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/m5253evbe/config.mk b/board/freescale/m5253evbe/config.mk
new file mode 100644
index 0000000..ccb2cf7
--- /dev/null
+++ b/board/freescale/m5253evbe/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xffe00000
diff --git a/board/freescale/m5253evbe/m5253evbe.c b/board/freescale/m5253evbe/m5253evbe.c
new file mode 100644
index 0000000..43aa84d
--- /dev/null
+++ b/board/freescale/m5253evbe/m5253evbe.c
@@ -0,0 +1,132 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Hayden Fraser (Hayden.Fraser@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/immap.h>
+
+int checkboard(void)
+{
+ puts("Board: ");
+ puts("Freescale MCF5253 EVBE\n");
+ return 0;
+};
+
+long int initdram(int board_type)
+{
+ int i;
+
+ /*
+ * Check to see if the SDRAM has already been initialized
+ * by a run control tool
+ */
+ if (!(mbar_readLong(MCFSIM_DCR) & 0x8000)) {
+ u32 RC, dramsize;
+
+ RC = (CFG_CLK / 1000000) >> 1;
+ RC = (RC * 15) >> 4;
+
+ /* Initialize DRAM Control Register: DCR */
+ mbar_writeShort(MCFSIM_DCR, (0x8400 | RC));
+
+ mbar_writeLong(MCFSIM_DACR0, 0x00003224);
+
+ /* Initialize DMR0 */
+ dramsize = ((CFG_SDRAM_SIZE << 20) - 1) & 0xFFFC0000;
+ mbar_writeLong(MCFSIM_DMR0, dramsize | 1);
+
+ mbar_writeLong(MCFSIM_DACR0, 0x0000322c);
+
+ /* Write to this block to initiate precharge */
+ *(u32 *) (CFG_SDRAM_BASE) = 0xa5a5a5a5;
+
+ /* Set RE bit in DACR */
+ mbar_writeLong(MCFSIM_DACR0,
+ mbar_readLong(MCFSIM_DACR0) | 0x8000);
+
+ /* Wait for at least 8 auto refresh cycles to occur */
+ udelay(500);
+
+ /* Finish the configuration by issuing the MRS */
+ mbar_writeLong(MCFSIM_DACR0,
+ mbar_readLong(MCFSIM_DACR0) | 0x0040);
+
+ *(u32 *) (CFG_SDRAM_BASE + 0x800) = 0xa5a5a5a5;
+ }
+
+ return CFG_SDRAM_SIZE * 1024 * 1024;
+}
+
+int testdram(void)
+{
+ /* TODO: XXX XXX XXX */
+ printf("DRAM test not implemented!\n");
+
+ return (0);
+}
+
+#ifdef CONFIG_CMD_IDE
+#include <ata.h>
+int ide_preinit(void)
+{
+ return (0);
+}
+
+void ide_set_reset(int idereset)
+{
+ volatile atac_t *ata = (atac_t *) CFG_ATA_BASE_ADDR;
+ long period;
+ /* t1, t2, t3, t4, t5, t6, t9, tRD, tA */
+ int piotms[5][9] = { {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */
+ {50, 125, 45, 20, 35, 5, 15, 0, 35}, /* PIO 1 */
+ {30, 100, 30, 15, 20, 5, 10, 0, 35}, /* PIO 2 */
+ {30, 80, 30, 10, 20, 5, 10, 0, 35}, /* PIO 3 */
+ {25, 70, 20, 10, 20, 5, 10, 0, 35} /* PIO 4 */
+ };
+
+ if (idereset) {
+ ata->cr = 0; /* control reset */
+ udelay(100);
+ } else {
+ mbar2_writeLong(CIM_MISCCR, CIM_MISCCR_CPUEND);
+
+#define CALC_TIMING(t) (t + period - 1) / period
+ period = 1000000000 / (CFG_CLK / 2); /* period in ns */
+
+ /*ata->ton = CALC_TIMING (180); */
+ ata->t1 = CALC_TIMING(piotms[2][0]);
+ ata->t2w = CALC_TIMING(piotms[2][1]);
+ ata->t2r = CALC_TIMING(piotms[2][1]);
+ ata->ta = CALC_TIMING(piotms[2][8]);
+ ata->trd = CALC_TIMING(piotms[2][7]);
+ ata->t4 = CALC_TIMING(piotms[2][3]);
+ ata->t9 = CALC_TIMING(piotms[2][6]);
+
+ ata->cr = 0x40; /* IORDY enable */
+ udelay(2000);
+ ata->cr |= 0x01; /* IORDY enable */
+ }
+}
+#endif /* CONFIG_CMD_IDE */
diff --git a/board/freescale/m5253evbe/u-boot.lds b/board/freescale/m5253evbe/u-boot.lds
new file mode 100644
index 0000000..e2fd070
--- /dev/null
+++ b/board/freescale/m5253evbe/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf52x2/start.o (.text)
+ lib_m68k/traps.o (.text)
+ cpu/mcf52x2/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/m5329evb/Makefile b/board/freescale/m5329evb/Makefile
new file mode 100644
index 0000000..ab0f11e
--- /dev/null
+++ b/board/freescale/m5329evb/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o mii.o nand.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/m5329evb/config.mk b/board/freescale/m5329evb/config.mk
new file mode 100644
index 0000000..ce014ed
--- /dev/null
+++ b/board/freescale/m5329evb/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0
diff --git a/board/freescale/m5329evb/m5329evb.c b/board/freescale/m5329evb/m5329evb.c
new file mode 100644
index 0000000..242eb1a
--- /dev/null
+++ b/board/freescale/m5329evb/m5329evb.c
@@ -0,0 +1,88 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ puts("Board: ");
+ puts("Freescale FireEngine 5329 EVB\n");
+ return 0;
+};
+
+long int initdram(int board_type)
+{
+ volatile sdram_t *sdram = (volatile sdram_t *)(MMAP_SDRAM);
+ u32 dramsize, i;
+
+ dramsize = CFG_SDRAM_SIZE * 0x100000;
+
+ for (i = 0x13; i < 0x20; i++) {
+ if (dramsize == (1 << i))
+ break;
+ }
+ i--;
+
+ sdram->cs0 = (CFG_SDRAM_BASE | i);
+ sdram->cfg1 = CFG_SDRAM_CFG1;
+ sdram->cfg2 = CFG_SDRAM_CFG2;
+
+ /* Issue PALL */
+ sdram->ctrl = CFG_SDRAM_CTRL | 2;
+
+ /* Issue LEMR */
+ sdram->mode = CFG_SDRAM_EMOD;
+ sdram->mode = (CFG_SDRAM_MODE | 0x04000000);
+
+ udelay(500);
+
+ /* Issue PALL */
+ sdram->ctrl = (CFG_SDRAM_CTRL | 2);
+
+ /* Perform two refresh cycles */
+ sdram->ctrl = CFG_SDRAM_CTRL | 4;
+ sdram->ctrl = CFG_SDRAM_CTRL | 4;
+
+ sdram->mode = CFG_SDRAM_MODE;
+
+ sdram->ctrl = (CFG_SDRAM_CTRL & ~0x80000000) | 0x10000c00;
+
+ udelay(100);
+
+ return dramsize;
+};
+
+int testdram(void)
+{
+ /* TODO: XXX XXX XXX */
+ printf("DRAM test not implemented!\n");
+
+ return (0);
+}
diff --git a/board/freescale/m5329evb/mii.c b/board/freescale/m5329evb/mii.c
new file mode 100644
index 0000000..8f6abf3
--- /dev/null
+++ b/board/freescale/m5329evb/mii.c
@@ -0,0 +1,306 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ if (setclear) {
+ gpio->par_fec |= GPIO_PAR_FEC_7W_FEC | GPIO_PAR_FEC_MII_FEC;
+ gpio->par_feci2c |=
+ GPIO_PAR_FECI2C_MDC_EMDC | GPIO_PAR_FECI2C_MDIO_EMDIO;
+ } else {
+ gpio->par_fec &= ~(GPIO_PAR_FEC_7W_FEC | GPIO_PAR_FEC_MII_FEC);
+ gpio->par_feci2c &=
+ ~(GPIO_PAR_FECI2C_MDC_EMDC | GPIO_PAR_FECI2C_MDIO_EMDIO);
+ }
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || CONFIG_CMD_MII */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_DP83848VV:
+ strcpy(info->phy_name,
+ STR_ID_DP83848VV);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_DP83848VV:
+ printf(STR_ID_DP83848VV);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/freescale/m5329evb/nand.c b/board/freescale/m5329evb/nand.c
new file mode 100644
index 0000000..fefb42e
--- /dev/null
+++ b/board/freescale/m5329evb/nand.c
@@ -0,0 +1,114 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/io.h>
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NAND)
+#include <nand.h>
+#include <linux/mtd/mtd.h>
+
+#define SET_CLE 0x10
+#define CLR_CLE ~SET_CLE
+#define SET_ALE 0x08
+#define CLR_ALE ~SET_ALE
+
+static void nand_hwcontrol(struct mtd_info *mtdinfo, int cmd)
+{
+ struct nand_chip *this = mtdinfo->priv;
+ volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
+ u32 nand_baseaddr = (u32) this->IO_ADDR_W;
+
+ switch (cmd) {
+ case NAND_CTL_SETNCE:
+ case NAND_CTL_CLRNCE:
+ break;
+ case NAND_CTL_SETCLE:
+ nand_baseaddr |= SET_CLE;
+ break;
+ case NAND_CTL_CLRCLE:
+ nand_baseaddr &= CLR_CLE;
+ break;
+ case NAND_CTL_SETALE:
+ nand_baseaddr |= SET_ALE;
+ break;
+ case NAND_CTL_CLRALE:
+ nand_baseaddr |= CLR_ALE;
+ break;
+ case NAND_CTL_SETWP:
+ fbcs->csmr2 |= CSMR_WP;
+ break;
+ case NAND_CTL_CLRWP:
+ fbcs->csmr2 &= ~CSMR_WP;
+ break;
+ }
+ this->IO_ADDR_W = (void __iomem *)(nand_baseaddr);
+}
+
+static void nand_write_byte(struct mtd_info *mtdinfo, u_char byte)
+{
+ struct nand_chip *this = mtdinfo->priv;
+ *((volatile u8 *)(this->IO_ADDR_W)) = byte;
+}
+
+static u8 nand_read_byte(struct mtd_info *mtdinfo)
+{
+ struct nand_chip *this = mtdinfo->priv;
+ return (u8) (*((volatile u8 *)this->IO_ADDR_R));
+}
+
+static int nand_dev_ready(struct mtd_info *mtdinfo)
+{
+ return 1;
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ *((volatile u16 *)CFG_LATCH_ADDR) |= 0x0004;
+
+ /* set up pin configuration */
+ gpio->par_timer &= ~GPIO_PAR_TIN3_TIN3;
+ gpio->pddr_timer |= 0x08;
+ gpio->ppd_timer |= 0x08;
+ gpio->pclrr_timer = 0;
+ gpio->podr_timer = 0;
+
+ nand->chip_delay = 50;
+ nand->eccmode = NAND_ECC_SOFT;
+ nand->hwcontrol = nand_hwcontrol;
+ nand->read_byte = nand_read_byte;
+ nand->write_byte = nand_write_byte;
+ nand->dev_ready = nand_dev_ready;
+
+ return 0;
+}
+#endif
diff --git a/board/freescale/m5329evb/u-boot.lds b/board/freescale/m5329evb/u-boot.lds
new file mode 100644
index 0000000..9b994a0
--- /dev/null
+++ b/board/freescale/m5329evb/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf532x/start.o (.text)
+ lib_m68k/traps.o (.text)
+ lib_m68k/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/m54455evb/Makefile b/board/freescale/m54455evb/Makefile
new file mode 100644
index 0000000..ca9a772
--- /dev/null
+++ b/board/freescale/m54455evb/Makefile
@@ -0,0 +1,44 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o flash.o mii.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
\ No newline at end of file
diff --git a/board/freescale/m54455evb/config.mk b/board/freescale/m54455evb/config.mk
new file mode 100644
index 0000000..ce014ed
--- /dev/null
+++ b/board/freescale/m54455evb/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2000-2003
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+# Coldfire contribution by Bernhard Kuhn <bkuhn@metrowerks.com>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0
diff --git a/board/freescale/m54455evb/flash.c b/board/freescale/m54455evb/flash.c
new file mode 100644
index 0000000..de2cca8
--- /dev/null
+++ b/board/freescale/m54455evb/flash.c
@@ -0,0 +1,974 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#include <asm/immap.h>
+
+#ifndef CFG_FLASH_CFI
+typedef unsigned char FLASH_PORT_WIDTH;
+typedef volatile unsigned char FLASH_PORT_WIDTHV;
+
+#define FPW FLASH_PORT_WIDTH
+#define FPWV FLASH_PORT_WIDTHV
+
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
+#define CFG_FLASH_NONCFI_WIDTH FLASH_CFI_8BIT
+
+/* Intel-compatible flash commands */
+#define INTEL_PROGRAM 0x00100010
+#define INTEL_ERASE 0x00200020
+#define INTEL_WRSETUP 0x00400040
+#define INTEL_CLEAR 0x00500050
+#define INTEL_LOCKBIT 0x00600060
+#define INTEL_PROTECT 0x00010001
+#define INTEL_STATUS 0x00700070
+#define INTEL_READID 0x00900090
+#define INTEL_CFIQRY 0x00980098
+#define INTEL_SUSERASE 0x00B000B0
+#define INTEL_PROTPROG 0x00C000C0
+#define INTEL_CONFIRM 0x00D000D0
+#define INTEL_WRBLK 0x00e800e8
+#define INTEL_RESET 0x00FF00FF
+
+/* Intel-compatible flash status bits */
+#define INTEL_FINISHED 0x00800080
+#define INTEL_OK 0x00800080
+#define INTEL_ERASESUS 0x00600060
+#define INTEL_WSM_SUS (INTEL_FINISHED | INTEL_ERASESUS)
+
+/* 28F160C3B CFI Data offset - This could vary */
+#define INTEL_CFI_MFG 0x00 /* Manufacturer ID */
+#define INTEL_CFI_PART 0x01 /* Product ID */
+#define INTEL_CFI_LOCK 0x02 /* */
+#define INTEL_CFI_TWPRG 0x1F /* Typical Single Word Program Timeout 2^n us */
+#define INTEL_CFI_MBUFW 0x20 /* Typical Max Buffer Write Timeout 2^n us */
+#define INTEL_CFI_TERB 0x21 /* Typical Block Erase Timeout 2^n ms */
+#define INTEL_CFI_MWPRG 0x23 /* Maximum Word program timeout 2^n us */
+#define INTEL_CFI_MERB 0x25 /* Maximum Block Erase Timeout 2^n s */
+#define INTEL_CFI_SIZE 0x27 /* Device size 2^n bytes */
+#define INTEL_CFI_CAP 0x28
+#define INTEL_CFI_WRBUF 0x2A
+#define INTEL_CFI_BANK 0x2C /* Number of Bank */
+#define INTEL_CFI_BLK1A 0x2D /* Number of Blocks */
+#define INTEL_CFI_BLK1B 0x2E /* Number of Blocks */
+#define INTEL_CFI_SZ1A 0x2F /* Block Region Size */
+#define INTEL_CFI_SZ1B 0x30
+#define INTEL_CFI_BLK2A 0x31
+#define INTEL_CFI_BLK2B 0x32
+#define INTEL_CFI_SZ2A 0x33
+#define INTEL_CFI_SZ2B 0x34
+
+#define FLASH_CYCLE1 0x0555
+#define FLASH_CYCLE2 0x0aaa
+
+#define WR_BLOCK 0x20
+
+/* not in the flash.h yet */
+#define FLASH_28F64P30T 0x00B9 /* Intel 28F64P30T ( 64M) */
+#define FLASH_28F64P30B 0x00BA /* Intel 28F64P30B ( 64M) */
+#define FLASH_28F128P30T 0x00BB /* Intel 28F128P30T ( 128M = 8M x 16 ) */
+#define FLASH_28F128P30B 0x00BC /* Intel 28F128P30B ( 128M = 8M x 16 ) */
+#define FLASH_28F256P30T 0x00BD /* Intel 28F256P30T ( 256M = 16M x 16 ) */
+#define FLASH_28F256P30B 0x00BE /* Intel 28F256P30B ( 256M = 16M x 16 ) */
+
+#define SYNC __asm__("nop")
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+
+ulong flash_get_size(FPWV * addr, flash_info_t * info);
+int flash_get_offsets(ulong base, flash_info_t * info);
+int flash_cmd_rd(volatile u16 * addr, int index);
+int write_data(flash_info_t * info, ulong dest, FPW data);
+int write_data_block(flash_info_t * info, ulong src, ulong dest);
+int write_word_atm(flash_info_t * info, volatile u8 * dest, u16 data);
+void inline spin_wheel(void);
+void flash_sync_real_protect(flash_info_t * info);
+uchar intel_sector_protected(flash_info_t * info, ushort sector);
+
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+ulong flash_init(void)
+{
+ int i;
+ ulong size = 0;
+ ulong fbase = 0;
+
+ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
+ memset(&flash_info[i], 0, sizeof(flash_info_t));
+
+ switch (i) {
+ case 0:
+ fbase = (ulong) CFG_FLASH0_BASE;
+ break;
+ case 1:
+ fbase = (ulong) CFG_FLASH1_BASE;
+ break;
+ }
+
+ flash_get_size((FPWV *) fbase, &flash_info[i]);
+ flash_get_offsets((ulong) fbase, &flash_info[i]);
+ fbase += flash_info[i].size;
+ size += flash_info[i].size;
+
+ /* get the h/w and s/w protection status in sync */
+ flash_sync_real_protect(&flash_info[i]);
+ }
+
+ /* Protect monitor and environment sectors */
+ flash_protect(FLAG_PROTECT_SET,
+ CFG_MONITOR_BASE,
+ CFG_MONITOR_BASE + monitor_flash_len - 1, &flash_info[0]);
+
+ return size;
+}
+
+int flash_get_offsets(ulong base, flash_info_t * info)
+{
+ int i, j, k;
+ int sectors, bs, banks;
+ ulong start;
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_ATM) {
+ int sect[] = CFG_ATMEL_SECT;
+ int sectsz[] = CFG_ATMEL_SECTSZ;
+
+ info->start[0] = base;
+ for (k = 0, i = 0; i < CFG_ATMEL_REGION; i++) {
+ for (j = 0; j < sect[i]; j++, k++) {
+ info->start[k + 1] = info->start[k] + sectsz[i];
+ info->protect[k] = 0;
+ }
+ }
+ }
+
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
+ volatile u16 *addr16 = (volatile u16 *)base;
+
+ *addr16 = (FPW) INTEL_RESET; /* restore read mode */
+ *addr16 = (FPW) INTEL_READID;
+
+ banks = addr16[INTEL_CFI_BANK] & 0xff;
+
+ sectors = 0;
+ info->start[0] = base;
+
+ for (k = 0, i = 0; i < banks; i++) {
+ /* Geometry y1 = y1 + 1, y2 = y2 + 1, CFI spec.
+ * To be exact, Z = [0x2f 0x30] (LE) * 256 bytes * [0x2D 0x2E] block count
+ * Z = [0x33 0x34] (LE) * 256 bytes * [0x31 0x32] block count
+ */
+ bs = ((((addr16[INTEL_CFI_SZ1B + (i * 4)] & 0xff) << 8)
+ | (addr16[INTEL_CFI_SZ1A + (i * 4)] & 0xff)) *
+ 0x100);
+ sectors =
+ (addr16[INTEL_CFI_BLK1A + (i * 4)] & 0xff) + 1;
+
+ for (j = 0; j < sectors; j++, k++) {
+ info->start[k + 1] = info->start[k] + bs;
+ }
+ }
+
+ *addr16 = (FPW) INTEL_RESET; /* restore read mode */
+ }
+
+ return ERR_OK;
+}
+
+void flash_print_info(flash_info_t * info)
+{
+ int i;
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_INTEL:
+ printf("INTEL ");
+ break;
+ case FLASH_MAN_ATM:
+ printf("ATMEL ");
+ break;
+ default:
+ printf("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_AT040:
+ printf("AT49BV040A\n");
+ break;
+ case FLASH_28F128J3A:
+ printf("Intel 28F128J3A\n");
+ break;
+ default:
+ printf("Unknown Chip Type\n");
+ return;
+ }
+
+ if (info->size > 0x100000) {
+ int remainder;
+
+ printf(" Size: %ld", info->size >> 20);
+
+ remainder = (info->size % 0x100000);
+ if (remainder) {
+ remainder >>= 10;
+ remainder = (int)((float)
+ (((float)remainder / (float)1024) *
+ 10000));
+ printf(".%d ", remainder);
+ }
+
+ printf("MB in %d Sectors\n", info->sector_count);
+ } else
+ printf(" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+
+ printf(" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ if ((i % 5) == 0)
+ printf("\n ");
+ printf(" %08lX%s",
+ info->start[i], info->protect[i] ? " (RO)" : " ");
+ }
+ printf("\n");
+}
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+ulong flash_get_size(FPWV * addr, flash_info_t * info)
+{
+ volatile u16 *addr16 = (volatile u16 *)addr;
+ int intel = 0, banks = 0;
+ u16 value;
+ int i;
+
+ addr[FLASH_CYCLE1] = (FPWV) 0x00AA00AA; /* for Atmel, Intel ignores this */
+ addr[FLASH_CYCLE2] = (FPWV) 0x00550055; /* for Atmel, Intel ignores this */
+ addr[FLASH_CYCLE1] = (FPWV) 0x00900090; /* selects Intel or Atmel */
+
+ switch (addr[0] & 0xff) {
+ case (u8) ATM_MANUFACT:
+ info->flash_id = FLASH_MAN_ATM;
+ value = addr[1];
+ break;
+ case (u8) INTEL_MANUFACT:
+ /* Terminate Atmel ID read */
+ addr[0] = (FPWV) 0x00F000F0;
+ /* Write auto select command: read Manufacturer ID */
+ /* Write auto select command sequence and test FLASH answer */
+ *addr16 = (FPW) INTEL_RESET; /* restore read mode */
+ *addr16 = (FPW) INTEL_READID;
+
+ info->flash_id = FLASH_MAN_INTEL;
+ value = (addr16[INTEL_CFI_MFG] << 8);
+ value |= addr16[INTEL_CFI_PART] & 0xff;
+ intel = 1;
+ break;
+ default:
+ printf("Unknown Flash\n");
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+
+ *addr = (FPW) 0x00F000F0;
+ *addr = (FPW) INTEL_RESET; /* restore read mode */
+ return (0); /* no or unknown flash */
+ }
+
+ switch (value) {
+ case (u8) ATM_ID_LV040:
+ info->flash_id += FLASH_AT040;
+ break;
+ case (u16) INTEL_ID_28F128J3:
+ info->flash_id += FLASH_28F128J3A;
+ break;
+ case (u16) INTEL_ID_28F64P30T:
+ info->flash_id += FLASH_28F64P30T;
+ break;
+ case (u16) INTEL_ID_28F64P30B:
+ info->flash_id += FLASH_28F64P30B;
+ break;
+ case (u16) INTEL_ID_28F128P30T:
+ info->flash_id += FLASH_28F128P30T;
+ break;
+ case (u16) INTEL_ID_28F128P30B:
+ info->flash_id += FLASH_28F128P30B;
+ break;
+ case (u16) INTEL_ID_28F256P30T:
+ info->flash_id += FLASH_28F256P30T;
+ break;
+ case (u16) INTEL_ID_28F256P30B:
+ info->flash_id += FLASH_28F256P30B;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ break;
+ }
+
+ if (intel) {
+ /* Intel spec. under CFI section */
+ u32 sz;
+ int sectors, bs;
+
+ banks = addr16[INTEL_CFI_BANK] & 0xff;
+
+ sectors = sz = 0;
+ for (i = 0; i < banks; i++) {
+ /* Geometry y1 = y1 + 1, y2 = y2 + 1, CFI spec.
+ * To be exact, Z = [0x2f 0x30] (LE) * 256 bytes * [0x2D 0x2E] block count
+ * Z = [0x33 0x34] (LE) * 256 bytes * [0x31 0x32] block count
+ */
+ bs = ((((addr16[INTEL_CFI_SZ1B + (i * 4)] & 0xff) << 8)
+ | (addr16[INTEL_CFI_SZ1A + (i * 4)] & 0xff)) *
+ 0x100);
+ sectors +=
+ (addr16[INTEL_CFI_BLK1A + (i * 4)] & 0xff) + 1;
+ sz += (bs * sectors);
+ }
+
+ info->sector_count = sectors;
+ info->size = sz;
+ *addr = (FPW) INTEL_RESET; /* restore read mode */
+ } else {
+ int sect[] = CFG_ATMEL_SECT;
+ int sectsz[] = CFG_ATMEL_SECTSZ;
+
+ info->sector_count = 0;
+ info->size = 0;
+ for (i = 0; i < CFG_ATMEL_REGION; i++) {
+ info->sector_count += sect[i];
+ info->size += sect[i] * sectsz[i];
+ }
+
+ /* reset ID mode */
+ addr[0] = (FPWV) 0x00F000F0;
+ }
+
+ if (info->sector_count > CFG_MAX_FLASH_SECT) {
+ printf("** ERROR: sector count %d > max (%d) **\n",
+ info->sector_count, CFG_MAX_FLASH_SECT);
+ info->sector_count = CFG_MAX_FLASH_SECT;
+ }
+
+ return (info->size);
+}
+
+int flash_cmd_rd(volatile u16 * addr, int index)
+{
+ return (int)addr[index];
+}
+
+/*
+ * This function gets the u-boot flash sector protection status
+ * (flash_info_t.protect[]) in sync with the sector protection
+ * status stored in hardware.
+ */
+void flash_sync_real_protect(flash_info_t * info)
+{
+ int i;
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_28F160C3B:
+ case FLASH_28F160C3T:
+ case FLASH_28F320C3B:
+ case FLASH_28F320C3T:
+ case FLASH_28F640C3B:
+ case FLASH_28F640C3T:
+ for (i = 0; i < info->sector_count; ++i) {
+ info->protect[i] = intel_sector_protected(info, i);
+ }
+ break;
+ default:
+ /* no h/w protect support */
+ break;
+ }
+}
+
+/*
+ * checks if "sector" in bank "info" is protected. Should work on intel
+ * strata flash chips 28FxxxJ3x in 8-bit mode.
+ * Returns 1 if sector is protected (or timed-out while trying to read
+ * protection status), 0 if it is not.
+ */
+uchar intel_sector_protected(flash_info_t * info, ushort sector)
+{
+ FPWV *addr;
+ FPWV *lock_conf_addr;
+ ulong start;
+ unsigned char ret;
+
+ /*
+ * first, wait for the WSM to be finished. The rationale for
+ * waiting for the WSM to become idle for at most
+ * CFG_FLASH_ERASE_TOUT is as follows. The WSM can be busy
+ * because of: (1) erase, (2) program or (3) lock bit
+ * configuration. So we just wait for the longest timeout of
+ * the (1)-(3), i.e. the erase timeout.
+ */
+
+ /* wait at least 35ns (W12) before issuing Read Status Register */
+ /*udelay(1); */
+ addr = (FPWV *) info->start[sector];
+ *addr = (FPW) INTEL_STATUS;
+
+ start = get_timer(0);
+ while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
+ if (get_timer(start) > CFG_FLASH_UNLOCK_TOUT) {
+ *addr = (FPW) INTEL_RESET; /* restore read mode */
+ printf("WSM busy too long, can't get prot status\n");
+ return 1;
+ }
+ }
+
+ /* issue the Read Identifier Codes command */
+ *addr = (FPW) INTEL_READID;
+
+ /* Intel example code uses offset of 4 for 8-bit flash */
+ lock_conf_addr = (FPWV *) info->start[sector];
+ ret = (lock_conf_addr[INTEL_CFI_LOCK] & (FPW) INTEL_PROTECT) ? 1 : 0;
+
+ /* put flash back in read mode */
+ *addr = (FPW) INTEL_RESET;
+
+ return ret;
+}
+
+int flash_erase(flash_info_t * info, int s_first, int s_last)
+{
+ int flag, prot, sect;
+ ulong type, start, last;
+ int rcode = 0, intel = 0;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN)
+ printf("- missing\n");
+ else
+ printf("- no sectors to erase\n");
+ return 1;
+ }
+
+ type = (info->flash_id & FLASH_VENDMASK);
+
+ if (type != (FLASH_MAN_INTEL & FLASH_VENDMASK)) {
+ if (type != (FLASH_MAN_ATM & FLASH_VENDMASK)) {
+ type = (info->flash_id & FLASH_VENDMASK);
+ printf
+ ("Can't erase unknown flash type %08lx - aborted\n",
+ info->flash_id);
+ return 1;
+ }
+ }
+
+ if (type == FLASH_MAN_INTEL)
+ intel = 1;
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot)
+ printf("- Warning: %d protected sectors will not be erased!\n",
+ prot);
+ else
+ printf("\n");
+
+ start = get_timer(0);
+ last = start;
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+
+ FPWV *addr = (FPWV *) (info->start[sect]);
+ int min = 0;
+
+ printf(".");
+
+ /* arm simple, non interrupt dependent timer */
+ start = get_timer(0);
+
+ if (intel) {
+ *addr = (FPW) INTEL_READID;
+ min = addr[INTEL_CFI_TERB] & 0xff;
+ min = 1 << min; /* ms */
+ min = (min / info->sector_count) * 1000;
+
+ /* start erase block */
+ *addr = (FPW) INTEL_CLEAR; /* clear status register */
+ *addr = (FPW) INTEL_ERASE; /* erase setup */
+ *addr = (FPW) INTEL_CONFIRM; /* erase confirm */
+
+ while ((*addr & (FPW) INTEL_FINISHED) !=
+ (FPW) INTEL_FINISHED) {
+
+ if (get_timer(start) >
+ CFG_FLASH_ERASE_TOUT) {
+ printf("Timeout\n");
+ *addr = (FPW) INTEL_SUSERASE; /* suspend erase */
+ *addr = (FPW) INTEL_RESET; /* reset to read mode */
+
+ rcode = 1;
+ break;
+ }
+ }
+
+ *addr = (FPW) INTEL_RESET; /* resest to read mode */
+ } else {
+ FPWV *base; /* first address in bank */
+ FPWV *atmeladdr;
+
+ flag = disable_interrupts();
+
+ atmeladdr = (FPWV *) addr; /* concatenate to 8 bit */
+ base = (FPWV *) (CFG_ATMEL_BASE); /* First sector */
+
+ base[FLASH_CYCLE1] = (u8) 0x00AA00AA; /* unlock */
+ base[FLASH_CYCLE2] = (u8) 0x00550055; /* unlock */
+ base[FLASH_CYCLE1] = (u8) 0x00800080; /* erase mode */
+ base[FLASH_CYCLE1] = (u8) 0x00AA00AA; /* unlock */
+ base[FLASH_CYCLE2] = (u8) 0x00550055; /* unlock */
+ *atmeladdr = (u8) 0x00300030; /* erase sector */
+
+ if (flag)
+ enable_interrupts();
+
+ while ((*atmeladdr & (u8) 0x00800080) !=
+ (u8) 0x00800080) {
+ if (get_timer(start) >
+ CFG_FLASH_ERASE_TOUT) {
+ printf("Timeout\n");
+ *atmeladdr = (u8) 0x00F000F0; /* reset to read mode */
+
+ rcode = 1;
+ break;
+ }
+ }
+
+ *atmeladdr = (u8) 0x00F000F0; /* reset to read mode */
+ } /* Atmel or Intel */
+ }
+ }
+ printf(" done\n");
+
+ return rcode;
+}
+
+int write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ if (info->flash_id == FLASH_UNKNOWN)
+ return 4;
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_ATM:
+ {
+ u16 data = 0;
+ int bytes; /* number of bytes to program in current word */
+ int left; /* number of bytes left to program */
+ int i, res;
+
+ for (left = cnt, res = 0;
+ left > 0 && res == 0;
+ addr += sizeof(data), left -=
+ sizeof(data) - bytes) {
+
+ bytes = addr & (sizeof(data) - 1);
+ addr &= ~(sizeof(data) - 1);
+
+ /* combine source and destination data so can program
+ * an entire word of 16 or 32 bits
+ */
+ for (i = 0; i < sizeof(data); i++) {
+ data <<= 8;
+ if (i < bytes || i - bytes >= left)
+ data += *((uchar *) addr + i);
+ else
+ data += *src++;
+ }
+
+ data = (data >> 8) | (data << 8);
+ res = write_word_atm(info, (FPWV *) addr, data);
+ }
+ return res;
+ } /* case FLASH_MAN_ATM */
+
+ case FLASH_MAN_INTEL:
+ {
+ ulong cp, wp;
+ u16 data;
+ int count, i, l, rc, port_width;
+
+ /* get lower word aligned address */
+ wp = addr;
+ port_width = sizeof(FPW);
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ for (; i < port_width && cnt > 0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+
+ for (; cnt == 0 && i < port_width; ++i, ++cp)
+ data = (data << 8) | (*(uchar *) cp);
+
+ if ((rc = write_data(info, wp, data)) != 0)
+ return (rc);
+
+ wp += port_width;
+ }
+
+ if (cnt > WR_BLOCK) {
+ /*
+ * handle word aligned part
+ */
+ count = 0;
+ while (cnt >= WR_BLOCK) {
+
+ if ((rc =
+ write_data_block(info,
+ (ulong) src,
+ wp)) != 0)
+ return (rc);
+
+ wp += WR_BLOCK;
+ src += WR_BLOCK;
+ cnt -= WR_BLOCK;
+
+ if (count++ > 0x800) {
+ spin_wheel();
+ count = 0;
+ }
+ }
+ }
+
+ /* handle word aligned part */
+ if (cnt < WR_BLOCK) {
+ /*
+ * handle word aligned part
+ */
+ count = 0;
+ while (cnt >= port_width) {
+ data = 0;
+ for (i = 0; i < port_width; ++i)
+ data = (data << 8) | *src++;
+
+ if ((rc =
+ write_data(info,
+ (ulong) ((FPWV *) wp),
+ (FPW) (data))) != 0)
+ return (rc);
+
+ wp += port_width;
+ cnt -= port_width;
+ if (count++ > 0x800) {
+ spin_wheel();
+ count = 0;
+ }
+ }
+ }
+
+ if (cnt == 0)
+ return ERR_OK;
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < port_width && cnt > 0;
+ ++i, ++cp) {
+ data = (data << 8) | (*src++);
+ --cnt;
+ }
+ for (; i < port_width; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ return write_data(info, (ulong) ((FPWV *) wp),
+ (FPW) data);
+
+ } /* case FLASH_MAN_INTEL */
+
+ } /* switch */
+
+ return ERR_OK;
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_data_block(flash_info_t * info, ulong src, ulong dest)
+{
+ FPWV *srcaddr = (FPWV *) src;
+ FPWV *dstaddr = (FPWV *) dest;
+ ulong start;
+ int flag, i;
+
+ /* Check if Flash is (sufficiently) erased */
+ for (i = 0; i < WR_BLOCK; i++)
+ if ((*dstaddr++ & 0xff) != 0xff) {
+ printf("not erased at %08lx (%lx)\n",
+ (ulong) dstaddr, *dstaddr);
+ return (2);
+ }
+
+ dstaddr = (FPWV *) dest;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ *dstaddr = (FPW) INTEL_WRBLK; /* write block setup */
+
+ if (flag)
+ enable_interrupts();
+
+ /* arm simple, non interrupt dependent timer */
+ start = get_timer(0);
+
+ /* wait while polling the status register */
+ while ((*dstaddr & (FPW) INTEL_FINISHED) != (FPW) INTEL_OK) {
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ *dstaddr = (FPW) INTEL_RESET; /* restore read mode */
+ return (1);
+ }
+ }
+
+ *dstaddr = (FPW) WR_BLOCK - 1; /* write 32 to buffer */
+ for (i = 0; i < WR_BLOCK; i++)
+ *dstaddr++ = *srcaddr++;
+
+ dstaddr -= 1;
+ *dstaddr = (FPW) INTEL_CONFIRM; /* write 32 to buffer */
+
+ /* arm simple, non interrupt dependent timer */
+ start = get_timer(0);
+
+ /* wait while polling the status register */
+ while ((*dstaddr & (FPW) INTEL_FINISHED) != (FPW) INTEL_OK) {
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ *dstaddr = (FPW) INTEL_RESET; /* restore read mode */
+ return (1);
+ }
+ }
+
+ *dstaddr = (FPW) INTEL_RESET; /* restore read mode */
+
+ return (0);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word or halfword to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_data(flash_info_t * info, ulong dest, FPW data)
+{
+ FPWV *addr = (FPWV *) dest;
+ ulong start;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*addr & data) != data) {
+ printf("not erased at %08lx (%lx)\n", (ulong) addr,
+ (ulong) * addr);
+ return (2);
+ }
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = (int)disable_interrupts();
+
+ *addr = (FPW) INTEL_CLEAR;
+ *addr = (FPW) INTEL_RESET;
+
+ *addr = (FPW) INTEL_WRSETUP; /* write setup */
+ *addr = data;
+
+ if (flag)
+ enable_interrupts();
+
+ /* arm simple, non interrupt dependent timer */
+ start = get_timer(0);
+
+ /* wait while polling the status register */
+ while ((*addr & (FPW) INTEL_OK) != (FPW) INTEL_OK) {
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ *addr = (FPW) INTEL_SUSERASE; /* suspend mode */
+ *addr = (FPW) INTEL_CLEAR; /* clear status */
+ *addr = (FPW) INTEL_RESET; /* reset */
+ return (1);
+ }
+ }
+
+ *addr = (FPW) INTEL_CLEAR; /* clear status */
+ *addr = (FPW) INTEL_RESET; /* restore read mode */
+
+ return (0);
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash for ATMEL FLASH
+ * A word is 16 bits, whichever the bus width of the flash bank
+ * (not an individual chip) is.
+ *
+ * returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+int write_word_atm(flash_info_t * info, volatile u8 * dest, u16 data)
+{
+ ulong start;
+ int flag, i;
+ int res = 0; /* result, assume success */
+ FPWV *base; /* first address in flash bank */
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*((volatile u16 *)dest) & data) != data) {
+ return (2);
+ }
+
+ base = (FPWV *) (CFG_ATMEL_BASE);
+
+ for (i = 0; i < sizeof(u16); i++) {
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ base[FLASH_CYCLE1] = (u8) 0x00AA00AA; /* unlock */
+ base[FLASH_CYCLE2] = (u8) 0x00550055; /* unlock */
+ base[FLASH_CYCLE1] = (u8) 0x00A000A0; /* selects program mode */
+
+ *dest = data; /* start programming the data */
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ start = get_timer(0);
+
+ /* data polling for D7 */
+ while (res == 0
+ && (*dest & (u8) 0x00800080) !=
+ (data & (u8) 0x00800080)) {
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ *dest = (u8) 0x00F000F0; /* reset bank */
+ res = 1;
+ }
+ }
+
+ *dest++ = (u8) 0x00F000F0; /* reset bank */
+ data >>= 8;
+ }
+
+ return (res);
+}
+
+void inline spin_wheel(void)
+{
+ static int p = 0;
+ static char w[] = "\\/-";
+
+ printf("\010%c", w[p]);
+ (++p == 3) ? (p = 0) : 0;
+}
+
+#ifdef CFG_FLASH_PROTECTION
+/*-----------------------------------------------------------------------
+ */
+int flash_real_protect(flash_info_t * info, long sector, int prot)
+{
+ int rcode = 0; /* assume success */
+ FPWV *addr; /* address of sector */
+ FPW value;
+
+ addr = (FPWV *) (info->start[sector]);
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_28F160C3B:
+ case FLASH_28F160C3T:
+ case FLASH_28F320C3B:
+ case FLASH_28F320C3T:
+ case FLASH_28F640C3B:
+ case FLASH_28F640C3T:
+ *addr = (FPW) INTEL_RESET; /* make sure in read mode */
+ *addr = (FPW) INTEL_LOCKBIT; /* lock command setup */
+
+ if (prot)
+ *addr = (FPW) INTEL_PROTECT; /* lock sector */
+ else
+ *addr = (FPW) INTEL_CONFIRM; /* unlock sector */
+
+ /* now see if it really is locked/unlocked as requested */
+ *addr = (FPW) INTEL_READID;
+
+ /* read sector protection at sector address, (A7 .. A0) = 0x02.
+ * D0 = 1 for each device if protected.
+ * If at least one device is protected the sector is marked
+ * protected, but return failure. Mixed protected and
+ * unprotected devices within a sector should never happen.
+ */
+ value = addr[2] & (FPW) INTEL_PROTECT;
+ if (value == 0)
+ info->protect[sector] = 0;
+ else if (value == (FPW) INTEL_PROTECT)
+ info->protect[sector] = 1;
+ else {
+ /* error, mixed protected and unprotected */
+ rcode = 1;
+ info->protect[sector] = 1;
+ }
+ if (info->protect[sector] != prot)
+ rcode = 1; /* failed to protect/unprotect as requested */
+
+ /* reload all protection bits from hardware for now */
+ flash_sync_real_protect(info);
+ break;
+
+ default:
+ /* no hardware protect that we support */
+ info->protect[sector] = prot;
+ break;
+ }
+
+ return rcode;
+}
+#endif
+#endif
diff --git a/board/freescale/m54455evb/m54455evb.c b/board/freescale/m54455evb/m54455evb.c
new file mode 100644
index 0000000..6a02782
--- /dev/null
+++ b/board/freescale/m54455evb/m54455evb.c
@@ -0,0 +1,164 @@
+/*
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkboard(void)
+{
+ puts("Board: ");
+ puts("Freescale M54455 EVB\n");
+ return 0;
+};
+
+long int initdram(int board_type)
+{
+ volatile sdramc_t *sdram = (volatile sdramc_t *)(MMAP_SDRAM);
+ volatile gpio_t *gpio = (volatile gpio_t *)(MMAP_GPIO);
+ u32 dramsize, i;
+
+ dramsize = CFG_SDRAM_SIZE * 0x100000 >> 1;
+
+ for (i = 0x13; i < 0x20; i++) {
+ if (dramsize == (1 << i))
+ break;
+ }
+ i--;
+
+ gpio->mscr_sdram = 0xAA;
+
+ sdram->sdcs0 = (CFG_SDRAM_BASE | i);
+ sdram->sdcs1 = (CFG_SDRAM_BASE1 | i);
+
+ sdram->sdcfg1 = CFG_SDRAM_CFG1;
+ sdram->sdcfg2 = CFG_SDRAM_CFG2;
+
+ /* Issue PALL */
+ sdram->sdcr = CFG_SDRAM_CTRL | 2;
+
+ /* Issue LEMR */
+ sdram->sdmr = CFG_SDRAM_EMOD | 0x408;
+ sdram->sdmr = CFG_SDRAM_MODE | 0x300;
+
+ udelay(500);
+
+ /* Issue PALL */
+ sdram->sdcr = CFG_SDRAM_CTRL | 2;
+
+ /* Perform two refresh cycles */
+ sdram->sdcr = CFG_SDRAM_CTRL | 4;
+ sdram->sdcr = CFG_SDRAM_CTRL | 4;
+
+ sdram->sdmr = CFG_SDRAM_MODE | 0x200;
+
+ sdram->sdcr = (CFG_SDRAM_CTRL & ~0x80000000) | 0x10000c00;
+
+ udelay(100);
+
+ return (dramsize << 1);
+};
+
+int testdram(void)
+{
+ /* TODO: XXX XXX XXX */
+ printf("DRAM test not implemented!\n");
+
+ return (0);
+}
+
+#if defined(CONFIG_CMD_IDE)
+#include <ata.h>
+
+int ide_preinit(void)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ gpio->par_fec |= (gpio->par_fec & GPIO_PAR_FEC_FEC1_MASK) | 0x10;
+ gpio->par_feci2c |=
+ (gpio->par_feci2c & 0xF0FF) | (GPIO_PAR_FECI2C_MDC1_ATA_DIOR |
+ GPIO_PAR_FECI2C_MDIO1_ATA_DIOW);
+ gpio->par_ata |=
+ (GPIO_PAR_ATA_BUFEN | GPIO_PAR_ATA_CS1 | GPIO_PAR_ATA_CS0 |
+ GPIO_PAR_ATA_DA2 | GPIO_PAR_ATA_DA1 | GPIO_PAR_ATA_DA0
+ | GPIO_PAR_ATA_RESET_RESET | GPIO_PAR_ATA_DMARQ_DMARQ |
+ GPIO_PAR_ATA_IORDY_IORDY);
+ gpio->par_pci |=
+ (GPIO_PAR_PCI_GNT3_ATA_DMACK | GPIO_PAR_PCI_REQ3_ATA_INTRQ);
+
+ return (0);
+}
+
+void ide_set_reset(int idereset)
+{
+ volatile atac_t *ata = (atac_t *) MMAP_ATA;
+ long period;
+ /* t1, t2, t3, t4, t5, t6, t9, tRD, tA */
+ int piotms[5][9] = {
+ {70, 165, 60, 30, 50, 5, 20, 0, 35}, /* PIO 0 */
+ {50, 125, 45, 20, 35, 5, 15, 0, 35}, /* PIO 1 */
+ {30, 100, 30, 15, 20, 5, 10, 0, 35}, /* PIO 2 */
+ {30, 80, 30, 10, 20, 5, 10, 0, 35}, /* PIO 3 */
+ {25, 70, 20, 10, 20, 5, 10, 0, 35}
+ }; /* PIO 4 */
+
+ if (idereset) {
+ ata->cr = 0; /* control reset */
+ udelay(10000);
+ } else {
+#define CALC_TIMING(t) (t + period - 1) / period
+ period = 1000000000 / gd->bus_clk; /* period in ns */
+
+ /*ata->ton = CALC_TIMING (180); */
+ ata->t1 = CALC_TIMING(piotms[2][0]);
+ ata->t2w = CALC_TIMING(piotms[2][1]);
+ ata->t2r = CALC_TIMING(piotms[2][1]);
+ ata->ta = CALC_TIMING(piotms[2][8]);
+ ata->trd = CALC_TIMING(piotms[2][7]);
+ ata->t4 = CALC_TIMING(piotms[2][3]);
+ ata->t9 = CALC_TIMING(piotms[2][6]);
+
+ ata->cr = 0x40; /* IORDY enable */
+ udelay(200000);
+ ata->cr |= 0x01; /* IORDY enable */
+ }
+}
+#endif
+
+#if defined(CONFIG_PCI)
+/*
+ * Initialize PCI devices, report devices found.
+ */
+static struct pci_controller hose;
+extern void pci_mcf5445x_init(struct pci_controller *hose);
+
+void pci_init_board(void)
+{
+ pci_mcf5445x_init(&hose);
+}
+#endif /* CONFIG_PCI */
diff --git a/board/freescale/m54455evb/mii.c b/board/freescale/m54455evb/mii.c
new file mode 100644
index 0000000..7a59aa0
--- /dev/null
+++ b/board/freescale/m54455evb/mii.c
@@ -0,0 +1,320 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+ struct fec_info_s *info = (struct fec_info_s *)dev->priv;
+
+ if (setclear) {
+ gpio->par_feci2c |=
+ (GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
+
+ if (info->iobase == CFG_FEC0_IOBASE)
+ gpio->par_fec |= GPIO_PAR_FEC_FEC0_RMII_GPIO;
+ else
+ gpio->par_fec |= GPIO_PAR_FEC_FEC1_RMII_ATA;
+ } else {
+ gpio->par_feci2c &=
+ ~(GPIO_PAR_FECI2C_MDC0_MDC0 | GPIO_PAR_FECI2C_MDIO0_MDIO0);
+
+ if (info->iobase == CFG_FEC0_IOBASE)
+ gpio->par_fec &= GPIO_PAR_FEC_FEC0_MASK;
+ else
+ gpio->par_fec &= GPIO_PAR_FEC_FEC1_MASK;
+ }
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ struct eth_device *dev;
+ int i, miispd;
+ u16 rst = 0;
+
+ dev = eth_get_dev();
+
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ miiphy_write(dev->name, info->phy_addr, PHY_BMCR, PHY_BMCR_RESET);
+ for (i = 0; i < FEC_RESET_DELAY; ++i) {
+ udelay(500);
+ miiphy_read(dev->name, info->phy_addr, PHY_BMCR, &rst);
+ if ((rst & PHY_BMCR_RESET) == 0)
+ break;
+ }
+ if (i == FEC_RESET_DELAY)
+ printf("Mii reset timeout %d\n", i);
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_DP83848VV:
+ strcpy(info->phy_name,
+ STR_ID_DP83848VV);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_DP83848VV:
+ printf(STR_ID_DP83848VV);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/freescale/m54455evb/u-boot.lds b/board/freescale/m54455evb/u-boot.lds
new file mode 100644
index 0000000..bda68e4
--- /dev/null
+++ b/board/freescale/m54455evb/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(m68k)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mcf5445x/start.o (.text)
+ lib_m68k/traps.o (.text)
+ lib_m68k/interrupts.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/zlib.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+
+ .reloc :
+ {
+ __got_start = .;
+ *(.got)
+ __got_end = .;
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ _sbss = .;
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ . = ALIGN(4);
+ _ebss = .;
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/freescale/mpc8313erdb/Makefile b/board/freescale/mpc8313erdb/Makefile
new file mode 100644
index 0000000..a987e510
--- /dev/null
+++ b/board/freescale/mpc8313erdb/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o sdram.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) crv $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/mpc8313erdb/config.mk b/board/freescale/mpc8313erdb/config.mk
new file mode 100644
index 0000000..f768264
--- /dev/null
+++ b/board/freescale/mpc8313erdb/config.mk
@@ -0,0 +1 @@
+TEXT_BASE = 0xFE000000
diff --git a/board/freescale/mpc8313erdb/mpc8313erdb.c b/board/freescale/mpc8313erdb/mpc8313erdb.c
new file mode 100644
index 0000000..861c143
--- /dev/null
+++ b/board/freescale/mpc8313erdb/mpc8313erdb.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
+ *
+ * Author: Scott Wood <scottwood@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+#include <pci.h>
+#include <mpc83xx.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_early_init_f(void)
+{
+#ifndef CFG_8313ERDB_BROKEN_PMC
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+
+ if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
+ gd->flags |= GD_FLG_SILENT;
+#endif
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: Freescale MPC8313ERDB\n");
+ return 0;
+}
+
+static struct pci_region pci_regions[] = {
+ {
+ bus_start: CFG_PCI1_MEM_BASE,
+ phys_start: CFG_PCI1_MEM_PHYS,
+ size: CFG_PCI1_MEM_SIZE,
+ flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
+ },
+ {
+ bus_start: CFG_PCI1_MMIO_BASE,
+ phys_start: CFG_PCI1_MMIO_PHYS,
+ size: CFG_PCI1_MMIO_SIZE,
+ flags: PCI_REGION_MEM
+ },
+ {
+ bus_start: CFG_PCI1_IO_BASE,
+ phys_start: CFG_PCI1_IO_PHYS,
+ size: CFG_PCI1_IO_SIZE,
+ flags: PCI_REGION_IO
+ }
+};
+
+void pci_init_board(void)
+{
+ volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+ volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
+ volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
+ struct pci_region *reg[] = { pci_regions };
+ int warmboot;
+
+ /* Enable all 3 PCI_CLK_OUTPUTs. */
+ clk->occr |= 0xe0000000;
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
+
+ pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
+
+ warmboot = gd->bd->bi_bootflags & BOOTFLAG_WARM;
+#ifndef CFG_8313ERDB_BROKEN_PMC
+ warmboot |= immr->pmc.pmccr1 & PMCCR1_POWER_OFF;
+#endif
+
+ mpc83xx_pci_init(1, reg, warmboot);
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_OF_FLAT_TREE)
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#endif
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/board/freescale/mpc8313erdb/sdram.c b/board/freescale/mpc8313erdb/sdram.c
new file mode 100644
index 0000000..16ec4bb
--- /dev/null
+++ b/board/freescale/mpc8313erdb/sdram.c
@@ -0,0 +1,131 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006-2007
+ *
+ * Authors: Nick.Spence@freescale.com
+ * Wilson.Lo@freescale.com
+ * scottwood@freescale.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <mpc83xx.h>
+#include <spd_sdram.h>
+
+#include <asm/bitops.h>
+#include <asm/io.h>
+
+#include <asm/processor.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifndef CFG_8313ERDB_BROKEN_PMC
+static void resume_from_sleep(void)
+{
+ u32 magic = *(u32 *)0;
+
+ typedef void (*func_t)(void);
+ func_t resume = *(func_t *)4;
+
+ if (magic == 0xf5153ae5)
+ resume();
+
+ gd->flags &= ~GD_FLG_SILENT;
+ puts("\nResume from sleep failed: bad magic word\n");
+}
+#endif
+
+/* Fixed sdram init -- doesn't use serial presence detect.
+ *
+ * This is useful for faster booting in configs where the RAM is unlikely
+ * to be changed, or for things like NAND booting where space is tight.
+ */
+static long fixed_sdram(void)
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ u32 msize = CFG_DDR_SIZE * 1024 * 1024;
+ u32 msize_log2 = __ilog2(msize);
+
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_SDRAM_BASE >> 12;
+ im->sysconf.ddrlaw[0].ar = LBLAWAR_EN | (msize_log2 - 1);
+ im->sysconf.ddrcdr = CFG_DDRCDR_VALUE;
+
+ /*
+ * Erratum DDR3 requires a 50ms delay after clearing DDRCDR[DDR_cfg],
+ * or the DDR2 controller may fail to initialize correctly.
+ */
+ udelay(50000);
+
+ im->ddr.csbnds[0].csbnds = (msize - 1) >> 24;
+ im->ddr.cs_config[0] = CFG_DDR_CONFIG;
+
+ /* Currently we use only one CS, so disable the other bank. */
+ im->ddr.cs_config[1] = 0;
+
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
+
+#ifndef CFG_8313ERDB_BROKEN_PMC
+ if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
+ im->ddr.sdram_cfg = CFG_SDRAM_CFG | SDRAM_CFG_BI;
+ else
+#endif
+ im->ddr.sdram_cfg = CFG_SDRAM_CFG;
+
+ im->ddr.sdram_cfg2 = CFG_SDRAM_CFG2;
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_mode2 = CFG_DDR_MODE_2;
+
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+ sync();
+
+ /* enable DDR controller */
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+
+ return msize;
+}
+
+long int initdram(int board_type)
+{
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile lbus83xx_t *lbc = &im->lbus;
+ u32 msize;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ msize = fixed_sdram();
+
+ /* Local Bus setup lbcr and mrtpr */
+ lbc->lbcr = CFG_LBC_LBCR;
+ lbc->mrtpr = CFG_LBC_MRTPR;
+ sync();
+
+#ifndef CFG_8313ERDB_BROKEN_PMC
+ if (im->pmc.pmccr1 & PMCCR1_POWER_OFF)
+ resume_from_sleep();
+#endif
+
+ /* return total bus SDRAM size(bytes) -- DDR */
+ return msize;
+}
diff --git a/board/freescale/mpc8323erdb/Makefile b/board/freescale/mpc8323erdb/Makefile
new file mode 100644
index 0000000..acc9544
--- /dev/null
+++ b/board/freescale/mpc8323erdb/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/freescale/mpc8323erdb/config.mk b/board/freescale/mpc8323erdb/config.mk
new file mode 100644
index 0000000..fe0d37d
--- /dev/null
+++ b/board/freescale/mpc8323erdb/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# MPC8323ERDB
+#
+
+TEXT_BASE = 0xFE000000
diff --git a/board/freescale/mpc8323erdb/mpc8323erdb.c b/board/freescale/mpc8323erdb/mpc8323erdb.c
new file mode 100644
index 0000000..e738613
--- /dev/null
+++ b/board/freescale/mpc8323erdb/mpc8323erdb.c
@@ -0,0 +1,202 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc.
+ *
+ * Michael Barkowski <michael.barkowski@freescale.com>
+ * Based on mpc832xmds file by Dave Liu <daveliu@freescale.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+#include <command.h>
+#include <libfdt.h>
+#if defined(CONFIG_PCI)
+#include <pci.h>
+#endif
+#if defined(CONFIG_SPD_EEPROM)
+#include <spd_sdram.h>
+#else
+#include <asm/mmu.h>
+#endif
+
+const qe_iop_conf_t qe_iop_conf_tab[] = {
+ /* UCC3 */
+ {1, 0, 1, 0, 1}, /* TxD0 */
+ {1, 1, 1, 0, 1}, /* TxD1 */
+ {1, 2, 1, 0, 1}, /* TxD2 */
+ {1, 3, 1, 0, 1}, /* TxD3 */
+ {1, 9, 1, 0, 1}, /* TxER */
+ {1, 12, 1, 0, 1}, /* TxEN */
+ {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */
+
+ {1, 4, 2, 0, 1}, /* RxD0 */
+ {1, 5, 2, 0, 1}, /* RxD1 */
+ {1, 6, 2, 0, 1}, /* RxD2 */
+ {1, 7, 2, 0, 1}, /* RxD3 */
+ {1, 8, 2, 0, 1}, /* RxER */
+ {1, 10, 2, 0, 1}, /* RxDV */
+ {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */
+ {1, 11, 2, 0, 1}, /* COL */
+ {1, 13, 2, 0, 1}, /* CRS */
+
+ /* UCC2 */
+ {0, 18, 1, 0, 1}, /* TxD0 */
+ {0, 19, 1, 0, 1}, /* TxD1 */
+ {0, 20, 1, 0, 1}, /* TxD2 */
+ {0, 21, 1, 0, 1}, /* TxD3 */
+ {0, 27, 1, 0, 1}, /* TxER */
+ {0, 30, 1, 0, 1}, /* TxEN */
+ {3, 23, 2, 0, 1}, /* TxCLK->CLK3 */
+
+ {0, 22, 2, 0, 1}, /* RxD0 */
+ {0, 23, 2, 0, 1}, /* RxD1 */
+ {0, 24, 2, 0, 1}, /* RxD2 */
+ {0, 25, 2, 0, 1}, /* RxD3 */
+ {0, 26, 1, 0, 1}, /* RxER */
+ {0, 28, 2, 0, 1}, /* Rx_DV */
+ {3, 21, 2, 0, 1}, /* RxCLK->CLK16 */
+ {0, 29, 2, 0, 1}, /* COL */
+ {0, 31, 2, 0, 1}, /* CRS */
+
+ {3, 4, 3, 0, 2}, /* MDIO */
+ {3, 5, 1, 0, 2}, /* MDC */
+
+ {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
+};
+
+int board_early_init_f(void)
+{
+ return 0;
+}
+
+int fixed_sdram(void);
+
+long int initdram(int board_type)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+
+ msize = fixed_sdram();
+
+ /* return total bus SDRAM size(bytes) -- DDR */
+ return (msize * 1024 * 1024);
+}
+
+/*************************************************************************
+ * fixed sdram init -- doesn't use serial presence detect.
+ ************************************************************************/
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+ u32 ddr_size;
+ u32 ddr_size_log2;
+
+ msize = CFG_DDR_SIZE;
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;
+ (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
+ if (ddr_size & 1) {
+ return -1;
+ }
+ }
+ im->sysconf.ddrlaw[0].ar =
+ LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
+ im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
+ im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
+ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
+ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_mode2 = CFG_DDR_MODE2;
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+ __asm__ __volatile__ ("sync");
+ udelay(200);
+
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+ __asm__ __volatile__ ("sync");
+ return msize;
+}
+
+int checkboard(void)
+{
+ puts("Board: Freescale MPC8323ERDB\n");
+ return 0;
+}
+
+static struct pci_region pci_regions[] = {
+ {
+ bus_start: CFG_PCI1_MEM_BASE,
+ phys_start: CFG_PCI1_MEM_PHYS,
+ size: CFG_PCI1_MEM_SIZE,
+ flags: PCI_REGION_MEM | PCI_REGION_PREFETCH
+ },
+ {
+ bus_start: CFG_PCI1_MMIO_BASE,
+ phys_start: CFG_PCI1_MMIO_PHYS,
+ size: CFG_PCI1_MMIO_SIZE,
+ flags: PCI_REGION_MEM
+ },
+ {
+ bus_start: CFG_PCI1_IO_BASE,
+ phys_start: CFG_PCI1_IO_PHYS,
+ size: CFG_PCI1_IO_SIZE,
+ flags: PCI_REGION_IO
+ }
+};
+
+void pci_init_board(void)
+{
+ volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+ volatile clk83xx_t *clk = (volatile clk83xx_t *)&immr->clk;
+ volatile law83xx_t *pci_law = immr->sysconf.pcilaw;
+ struct pci_region *reg[] = { pci_regions };
+
+ /* Enable all 3 PCI_CLK_OUTPUTs. */
+ clk->occr |= 0xe0000000;
+
+ /* Configure PCI Local Access Windows */
+ pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LBLAWAR_EN | LBLAWAR_512MB;
+
+ pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LBLAWAR_EN | LBLAWAR_1MB;
+
+ mpc83xx_pci_init(1, reg, 0);
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_OF_FLAT_TREE)
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#endif
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/board/mpc832xemds/Makefile b/board/freescale/mpc832xemds/Makefile
similarity index 100%
rename from board/mpc832xemds/Makefile
rename to board/freescale/mpc832xemds/Makefile
diff --git a/board/mpc832xemds/config.mk b/board/freescale/mpc832xemds/config.mk
similarity index 100%
rename from board/mpc832xemds/config.mk
rename to board/freescale/mpc832xemds/config.mk
diff --git a/board/freescale/mpc832xemds/mpc832xemds.c b/board/freescale/mpc832xemds/mpc832xemds.c
new file mode 100644
index 0000000..6ba25d4
--- /dev/null
+++ b/board/freescale/mpc832xemds/mpc832xemds.c
@@ -0,0 +1,187 @@
+/*
+ * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ *
+ * Dave Liu <daveliu@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+#include <command.h>
+#if defined(CONFIG_PCI)
+#include <pci.h>
+#endif
+#if defined(CONFIG_SPD_EEPROM)
+#include <spd_sdram.h>
+#else
+#include <asm/mmu.h>
+#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+#if defined(CONFIG_PQ_MDS_PIB)
+#include "../common/pq-mds-pib.h"
+#endif
+
+const qe_iop_conf_t qe_iop_conf_tab[] = {
+ /* ETH3 */
+ {1, 0, 1, 0, 1}, /* TxD0 */
+ {1, 1, 1, 0, 1}, /* TxD1 */
+ {1, 2, 1, 0, 1}, /* TxD2 */
+ {1, 3, 1, 0, 1}, /* TxD3 */
+ {1, 9, 1, 0, 1}, /* TxER */
+ {1, 12, 1, 0, 1}, /* TxEN */
+ {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */
+
+ {1, 4, 2, 0, 1}, /* RxD0 */
+ {1, 5, 2, 0, 1}, /* RxD1 */
+ {1, 6, 2, 0, 1}, /* RxD2 */
+ {1, 7, 2, 0, 1}, /* RxD3 */
+ {1, 8, 2, 0, 1}, /* RxER */
+ {1, 10, 2, 0, 1}, /* RxDV */
+ {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */
+ {1, 11, 2, 0, 1}, /* COL */
+ {1, 13, 2, 0, 1}, /* CRS */
+
+ /* ETH4 */
+ {1, 18, 1, 0, 1}, /* TxD0 */
+ {1, 19, 1, 0, 1}, /* TxD1 */
+ {1, 20, 1, 0, 1}, /* TxD2 */
+ {1, 21, 1, 0, 1}, /* TxD3 */
+ {1, 27, 1, 0, 1}, /* TxER */
+ {1, 30, 1, 0, 1}, /* TxEN */
+ {3, 6, 2, 0, 1}, /* TxCLK->CLK8 */
+
+ {1, 22, 2, 0, 1}, /* RxD0 */
+ {1, 23, 2, 0, 1}, /* RxD1 */
+ {1, 24, 2, 0, 1}, /* RxD2 */
+ {1, 25, 2, 0, 1}, /* RxD3 */
+ {1, 26, 1, 0, 1}, /* RxER */
+ {1, 28, 2, 0, 1}, /* Rx_DV */
+ {3, 31, 2, 0, 1}, /* RxCLK->CLK7 */
+ {1, 29, 2, 0, 1}, /* COL */
+ {1, 31, 2, 0, 1}, /* CRS */
+
+ {3, 4, 3, 0, 2}, /* MDIO */
+ {3, 5, 1, 0, 2}, /* MDC */
+
+ {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
+};
+
+int board_early_init_f(void)
+{
+ volatile u8 *bcsr = (volatile u8 *)CFG_BCSR;
+
+ /* Enable flash write */
+ bcsr[9] &= ~0x08;
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+#ifdef CONFIG_PQ_MDS_PIB
+ pib_init();
+#endif
+ return 0;
+}
+
+int fixed_sdram(void);
+
+long int initdram(int board_type)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+
+ msize = fixed_sdram();
+
+ /* return total bus SDRAM size(bytes) -- DDR */
+ return (msize * 1024 * 1024);
+}
+
+/*************************************************************************
+ * fixed sdram init -- doesn't use serial presence detect.
+ ************************************************************************/
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+ u32 ddr_size;
+ u32 ddr_size_log2;
+
+ msize = CFG_DDR_SIZE;
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;
+ (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
+ if (ddr_size & 1) {
+ return -1;
+ }
+ }
+ im->sysconf.ddrlaw[0].ar =
+ LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
+#if (CFG_DDR_SIZE != 128)
+#warning Currenly any ddr size other than 128 is not supported
+#endif
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
+ im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
+ im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
+ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
+ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_mode2 = CFG_DDR_MODE2;
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+ __asm__ __volatile__ ("sync");
+ udelay(200);
+
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+ __asm__ __volatile__ ("sync");
+ return msize;
+}
+
+int checkboard(void)
+{
+ puts("Board: Freescale MPC832XEMDS\n");
+ return 0;
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_OF_FLAT_TREE)
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#endif
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/board/freescale/mpc832xemds/pci.c b/board/freescale/mpc832xemds/pci.c
new file mode 100644
index 0000000..6bc35c7
--- /dev/null
+++ b/board/freescale/mpc832xemds/pci.c
@@ -0,0 +1,298 @@
+/*
+ * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/*
+ * PCI Configuration space access support for MPC83xx PCI Bridge
+ */
+#include <asm/mmu.h>
+#include <asm/io.h>
+#include <common.h>
+#include <pci.h>
+#include <i2c.h>
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+#include <asm/fsl_i2c.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_PCI)
+#define PCI_FUNCTION_CONFIG 0x44
+#define PCI_FUNCTION_CFG_LOCK 0x20
+
+/*
+ * Initialize PCI Devices, report devices found
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_mpc83xxemds_config_table[] = {
+ {
+ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMON_MEMORY | PCI_COMMAND_MASTER}
+ },
+ {}
+}
+#endif
+static struct pci_controller hose[] = {
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc83xxemds_config_table,
+#endif
+ },
+};
+
+/**********************************************************************
+ * pci_init_board()
+ *********************************************************************/
+void pci_init_board(void)
+#ifdef CONFIG_PCISLAVE
+{
+ u16 reg16;
+ volatile immap_t *immr;
+ volatile law83xx_t *pci_law;
+ volatile pot83xx_t *pci_pot;
+ volatile pcictrl83xx_t *pci_ctrl;
+ volatile pciconf83xx_t *pci_conf;
+
+ immr = (immap_t *) CFG_IMMR;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+ pci_ctrl[0].pitar0 = 0x0;
+ pci_ctrl[0].pibar0 = 0x0;
+ pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
+
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 &= ~PIWAR_EN;
+
+ pci_ctrl[0].pitar2 = 0x0;
+ pci_ctrl[0].pibar2 = 0x0;
+ pci_ctrl[0].piebar2 = 0x0;
+ pci_ctrl[0].piwar2 &= ~PIWAR_EN;
+
+ hose[0].first_busno = 0;
+ hose[0].last_busno = 0xff;
+ pci_setup_indirect(&hose[0],
+ (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
+ reg16 = 0xff;
+
+ pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_LATENCY_TIMER, 0x80);
+
+ /*
+ * Unlock configuration lock in PCI function configuration register.
+ */
+ pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_FUNCTION_CONFIG, ®16);
+ reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
+ pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_FUNCTION_CONFIG, reg16);
+
+ printf("Enabled PCI 32bit Agent Mode\n");
+}
+#else
+{
+ volatile immap_t *immr;
+ volatile clk83xx_t *clk;
+ volatile law83xx_t *pci_law;
+ volatile pot83xx_t *pci_pot;
+ volatile pcictrl83xx_t *pci_ctrl;
+ volatile pciconf83xx_t *pci_conf;
+
+ u16 reg16;
+ u32 val32;
+ u32 dev;
+
+ immr = (immap_t *) CFG_IMMR;
+ clk = (clk83xx_t *) & immr->clk;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+ /*
+ * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
+ */
+ val32 = clk->occr;
+ udelay(2000);
+#if defined(PCI_66M)
+ clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
+ printf("PCI clock is 66MHz\n");
+#elif defined(PCI_33M)
+ clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
+ OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
+ printf("PCI clock is 33MHz\n");
+#else
+ clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
+ printf("PCI clock is 66MHz\n");
+#endif
+ udelay(2000);
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
+
+ pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI mem space - prefetch */
+ pci_pot[0].potar = (CFG_PCI_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CFG_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr =
+ POCMR_EN | POCMR_SE | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI mmio - non-prefetch mem space */
+ pci_pot[1].potar = (CFG_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CFG_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI IO space */
+ pci_pot[2].potar = (CFG_PCI_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[2].pobar = (CFG_PCI_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[2].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+ pci_ctrl[0].pitar1 = (CFG_PCI_SLV_MEM_LOCAL >> 12) & PITAR_TA_MASK;
+ pci_ctrl[0].pibar1 = (CFG_PCI_SLV_MEM_BUS >> 12) & PIBAR_MASK;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 =
+ PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP |
+ PIWAR_IWS_2G;
+
+ /*
+ * Release PCI RST Output signal
+ */
+ udelay(2000);
+ pci_ctrl[0].gcr = 1;
+ udelay(2000);
+
+ hose[0].first_busno = 0;
+ hose[0].last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose[0].regions + 0,
+ CFG_PCI_MEM_BASE,
+ CFG_PCI_MEM_PHYS,
+ CFG_PCI_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose[0].regions + 1,
+ CFG_PCI_MMIO_BASE,
+ CFG_PCI_MMIO_PHYS, CFG_PCI_MMIO_SIZE, PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose[0].regions + 2,
+ CFG_PCI_IO_BASE,
+ CFG_PCI_IO_PHYS, CFG_PCI_IO_SIZE, PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose[0].regions + 3,
+ CFG_PCI_SLV_MEM_LOCAL,
+ CFG_PCI_SLV_MEM_BUS,
+ CFG_PCI_SLV_MEM_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose[0].region_count = 4;
+
+ pci_setup_indirect(&hose[0],
+ (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(0, 0, 0);
+ pci_hose_read_config_word(&hose[0], dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(&hose[0], dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(&hose[0], dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(&hose[0], dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(&hose[0], dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+}
+#endif /* CONFIG_PCISLAVE */
+
+#if defined(CONFIG_OF_LIBFDT)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int err;
+ int tmp[2];
+
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(hose[0].first_busno);
+ tmp[1] = cpu_to_be32(hose[0].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+}
+#elif defined(CONFIG_OF_FLAT_TREE)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = hose[0].first_busno;
+ p[1] = hose[0].last_busno;
+ }
+}
+#endif /* CONFIG_OF_FLAT_TREE */
+#endif /* CONFIG_PCI */
diff --git a/board/mpc8349emds/Makefile b/board/freescale/mpc8349emds/Makefile
similarity index 100%
rename from board/mpc8349emds/Makefile
rename to board/freescale/mpc8349emds/Makefile
diff --git a/board/mpc8349emds/config.mk b/board/freescale/mpc8349emds/config.mk
similarity index 100%
rename from board/mpc8349emds/config.mk
rename to board/freescale/mpc8349emds/config.mk
diff --git a/board/freescale/mpc8349emds/mpc8349emds.c b/board/freescale/mpc8349emds/mpc8349emds.c
new file mode 100644
index 0000000..39c0916
--- /dev/null
+++ b/board/freescale/mpc8349emds/mpc8349emds.c
@@ -0,0 +1,274 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <asm/mpc8349_pci.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+#if defined(CONFIG_SPD_EEPROM)
+#include <spd_sdram.h>
+#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+int fixed_sdram(void);
+void sdram_init(void);
+
+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX)
+void ddr_enable_ecc(unsigned int dram_size);
+#endif
+
+int board_early_init_f (void)
+{
+ volatile u8* bcsr = (volatile u8*)CFG_BCSR;
+
+ /* Enable flash write */
+ bcsr[1] &= ~0x01;
+
+#ifdef CFG_USE_MPC834XSYS_USB_PHY
+ /* Use USB PHY on SYS board */
+ bcsr[5] |= 0x02;
+#endif
+
+ return 0;
+}
+
+#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
+
+long int initdram (int board_type)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ u32 msize = 0;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+#if defined(CONFIG_SPD_EEPROM)
+ msize = spd_sdram();
+#else
+ msize = fixed_sdram();
+#endif
+ /*
+ * Initialize SDRAM if it is on local bus.
+ */
+ sdram_init();
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
+ /*
+ * Initialize and enable DDR ECC.
+ */
+ ddr_enable_ecc(msize * 1024 * 1024);
+#endif
+
+ /* return total bus SDRAM size(bytes) -- DDR */
+ return (msize * 1024 * 1024);
+}
+
+#if !defined(CONFIG_SPD_EEPROM)
+/*************************************************************************
+ * fixed sdram init -- doesn't use serial presence detect.
+ ************************************************************************/
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ u32 msize = 0;
+ u32 ddr_size;
+ u32 ddr_size_log2;
+
+ msize = CFG_DDR_SIZE;
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;
+ (ddr_size > 1);
+ ddr_size = ddr_size>>1, ddr_size_log2++) {
+ if (ddr_size & 1) {
+ return -1;
+ }
+ }
+ im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
+ im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
+
+#if (CFG_DDR_SIZE != 256)
+#warning Currenly any ddr size other than 256 is not supported
+#endif
+#ifdef CONFIG_DDR_II
+ im->ddr.csbnds[2].csbnds = CFG_DDR_CS2_BNDS;
+ im->ddr.cs_config[2] = CFG_DDR_CS2_CONFIG;
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
+ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
+ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_mode2 = CFG_DDR_MODE2;
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
+#else
+ im->ddr.csbnds[2].csbnds = 0x0000000f;
+ im->ddr.cs_config[2] = CFG_DDR_CONFIG;
+
+ /* currently we use only one CS, so disable the other banks */
+ im->ddr.cs_config[0] = 0;
+ im->ddr.cs_config[1] = 0;
+ im->ddr.cs_config[3] = 0;
+
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+
+ im->ddr.sdram_cfg =
+ SDRAM_CFG_SREN
+#if defined(CONFIG_DDR_2T_TIMING)
+ | SDRAM_CFG_2T_EN
+#endif
+ | 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
+#if defined (CONFIG_DDR_32BIT)
+ /* for 32-bit mode burst length is 8 */
+ im->ddr.sdram_cfg |= (SDRAM_CFG_32_BE | SDRAM_CFG_8_BE);
+#endif
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+#endif
+ udelay(200);
+
+ /* enable DDR controller */
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+ return msize;
+}
+#endif/*!CFG_SPD_EEPROM*/
+
+
+int checkboard (void)
+{
+ puts("Board: Freescale MPC8349EMDS\n");
+ return 0;
+}
+
+/*
+ * if MPC8349EMDS is soldered with SDRAM
+ */
+#if defined(CFG_BR2_PRELIM) \
+ && defined(CFG_OR2_PRELIM) \
+ && defined(CFG_LBLAWBAR2_PRELIM) \
+ && defined(CFG_LBLAWAR2_PRELIM)
+/*
+ * Initialize SDRAM memory on the Local Bus.
+ */
+
+void sdram_init(void)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile lbus83xx_t *lbc= &immap->lbus;
+ uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
+
+ /*
+ * Setup SDRAM Base and Option Registers, already done in cpu_init.c
+ */
+
+ /* setup mtrpt, lsrt and lbcr for LB bus */
+ lbc->lbcr = CFG_LBC_LBCR;
+ lbc->mrtpr = CFG_LBC_MRTPR;
+ lbc->lsrt = CFG_LBC_LSRT;
+ asm("sync");
+
+ /*
+ * Configure the SDRAM controller Machine Mode Register.
+ */
+ lbc->lsdmr = CFG_LBC_LSDMR_5; /* 0x40636733; normal operation */
+
+ lbc->lsdmr = CFG_LBC_LSDMR_1; /* 0x68636733; precharge all the banks */
+ asm("sync");
+ *sdram_addr = 0xff;
+ udelay(100);
+
+ lbc->lsdmr = CFG_LBC_LSDMR_2; /* 0x48636733; auto refresh */
+ asm("sync");
+ /*1 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*2 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*3 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*4 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*5 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*6 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*7 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+ /*8 times*/
+ *sdram_addr = 0xff;
+ udelay(100);
+
+ /* 0x58636733; mode register write operation */
+ lbc->lsdmr = CFG_LBC_LSDMR_4;
+ asm("sync");
+ *sdram_addr = 0xff;
+ udelay(100);
+
+ lbc->lsdmr = CFG_LBC_LSDMR_5; /* 0x40636733; normal operation */
+ asm("sync");
+ *sdram_addr = 0xff;
+ udelay(100);
+}
+#else
+void sdram_init(void)
+{
+}
+#endif
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_OF_FLAT_TREE)
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#endif
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/board/freescale/mpc8349emds/pci.c b/board/freescale/mpc8349emds/pci.c
new file mode 100644
index 0000000..ae94a2f
--- /dev/null
+++ b/board/freescale/mpc8349emds/pci.c
@@ -0,0 +1,446 @@
+/*
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <asm/mmu.h>
+#include <common.h>
+#include <asm/global_data.h>
+#include <pci.h>
+#include <asm/mpc8349_pci.h>
+#include <i2c.h>
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_PCI
+
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_mpc8349emds_config_table[] = {
+ {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_IDSEL_NUMBER, PCI_ANY_ID,
+ pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
+ }
+ },
+ {}
+};
+#endif
+
+static struct pci_controller pci_hose[] = {
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc8349emds_config_table,
+#endif
+ },
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc8349emds_config_table,
+#endif
+ }
+};
+
+/**************************************************************************
+ *
+ * pib_init() -- initialize the PCA9555PW IO expander on the PIB board
+ *
+ */
+void
+pib_init(void)
+{
+ u8 val8, orig_i2c_bus;
+ /*
+ * Assign PIB PMC slot to desired PCI bus
+ */
+ /* Switch temporarily to I2C bus #2 */
+ orig_i2c_bus = i2c_get_bus_num();
+ i2c_set_bus_num(1);
+
+ val8 = 0;
+ i2c_write(0x23, 0x6, 1, &val8, 1);
+ i2c_write(0x23, 0x7, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x23, 0x2, 1, &val8, 1);
+ i2c_write(0x23, 0x3, 1, &val8, 1);
+
+ val8 = 0;
+ i2c_write(0x26, 0x6, 1, &val8, 1);
+ val8 = 0x34;
+ i2c_write(0x26, 0x7, 1, &val8, 1);
+#if defined(PCI_64BIT)
+ val8 = 0xf4; /* PMC2:PCI1/64-bit */
+#elif defined(PCI_ALL_PCI1)
+ val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
+#elif defined(PCI_ONE_PCI1)
+ val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
+#else
+ val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
+#endif
+ i2c_write(0x26, 0x2, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x26, 0x3, 1, &val8, 1);
+ val8 = 0;
+ i2c_write(0x27, 0x6, 1, &val8, 1);
+ i2c_write(0x27, 0x7, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x27, 0x2, 1, &val8, 1);
+ val8 = 0xef;
+ i2c_write(0x27, 0x3, 1, &val8, 1);
+ asm("eieio");
+
+#if defined(PCI_64BIT)
+ printf("PCI1: 64-bit on PMC2\n");
+#elif defined(PCI_ALL_PCI1)
+ printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
+#elif defined(PCI_ONE_PCI1)
+ printf("PCI1: 32-bit on PMC1\n");
+ printf("PCI2: 32-bit on PMC2, PMC3\n");
+#else
+ printf("PCI1: 32-bit on PMC1, PMC2\n");
+ printf("PCI2: 32-bit on PMC3\n");
+#endif
+ /* Reset to original I2C bus */
+ i2c_set_bus_num(orig_i2c_bus);
+}
+
+/**************************************************************************
+ * pci_init_board()
+ *
+ * NOTICE: PCI2 is not currently supported
+ *
+ */
+void
+pci_init_board(void)
+{
+ volatile immap_t * immr;
+ volatile clk83xx_t * clk;
+ volatile law83xx_t * pci_law;
+ volatile pot83xx_t * pci_pot;
+ volatile pcictrl83xx_t * pci_ctrl;
+ volatile pciconf83xx_t * pci_conf;
+ u16 reg16;
+ u32 reg32;
+ u32 dev;
+ struct pci_controller * hose;
+
+ immr = (immap_t *)CFG_IMMR;
+ clk = (clk83xx_t *)&immr->clk;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+
+ hose = &pci_hose[0];
+
+ pib_init();
+
+ /*
+ * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
+ */
+
+ reg32 = clk->occr;
+ udelay(2000);
+ clk->occr = 0xff000000;
+ udelay(2000);
+
+ /*
+ * Release PCI RST Output signal
+ */
+ pci_ctrl[0].gcr = 0;
+ udelay(2000);
+ pci_ctrl[0].gcr = 1;
+
+#ifdef CONFIG_MPC83XX_PCI2
+ pci_ctrl[1].gcr = 0;
+ udelay(2000);
+ pci_ctrl[1].gcr = 1;
+#endif
+
+ /* We need to wait at least a 1sec based on PCI specs */
+ {
+ int i;
+
+ for (i = 0; i < 1000; ++i)
+ udelay (1000);
+ }
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
+
+ pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI1 mem space - prefetch */
+ pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI1 IO space */
+ pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+
+ /* PCI1 mmio - non-prefetch mem space */
+ pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[2].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE,
+ PCI_REGION_MEM|PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_MMIO_BASE,
+ CFG_PCI1_MMIO_PHYS,
+ CFG_PCI1_MMIO_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS,
+ CFG_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CFG_IMMR+0x8300),
+ (CFG_IMMR+0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word (hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+
+#ifdef CONFIG_MPC83XX_PCI2
+ hose = &pci_hose[1];
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI2 mem space - prefetch */
+ pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI2 IO space */
+ pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+
+ /* PCI2 mmio - non-prefetch mem space */
+ pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[1].pitar1 = 0x0;
+ pci_ctrl[1].pibar1 = 0x0;
+ pci_ctrl[1].piebar1 = 0x0;
+ pci_ctrl[1].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = pci_hose[0].last_busno + 1;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI2_MEM_BASE,
+ CFG_PCI2_MEM_PHYS,
+ CFG_PCI2_MEM_SIZE,
+ PCI_REGION_MEM|PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI2_MMIO_BASE,
+ CFG_PCI2_MMIO_PHYS,
+ CFG_PCI2_MMIO_SIZE,
+ PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI2_IO_BASE,
+ CFG_PCI2_IO_PHYS,
+ CFG_PCI2_IO_SIZE,
+ PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CFG_IMMR+0x8380),
+ (CFG_IMMR+0x8384));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word (hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+#endif
+
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int err;
+ int tmp[2];
+
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+#ifdef CONFIG_MPC83XX_PCI2
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8600");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(pci_hose[1].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[1].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+#endif
+}
+#elif defined(CONFIG_OF_FLAT_TREE)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[0].first_busno;
+ p[1] = pci_hose[0].last_busno;
+ }
+
+#ifdef CONFIG_MPC83XX_PCI2
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[1].first_busno;
+ p[1] = pci_hose[1].last_busno;
+ }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */
+#endif /* CONFIG_PCI */
diff --git a/board/mpc8349itx/Makefile b/board/freescale/mpc8349itx/Makefile
similarity index 100%
rename from board/mpc8349itx/Makefile
rename to board/freescale/mpc8349itx/Makefile
diff --git a/board/freescale/mpc8349itx/config.mk b/board/freescale/mpc8349itx/config.mk
new file mode 100644
index 0000000..79f1765
--- /dev/null
+++ b/board/freescale/mpc8349itx/config.mk
@@ -0,0 +1,31 @@
+#
+# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# MPC8349E-mITX and MPC8349E-mITX-GP
+#
+
+sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFEF00000
+endif
diff --git a/board/freescale/mpc8349itx/mpc8349itx.c b/board/freescale/mpc8349itx/mpc8349itx.c
new file mode 100644
index 0000000..c82f784
--- /dev/null
+++ b/board/freescale/mpc8349itx/mpc8349itx.c
@@ -0,0 +1,407 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+
+#ifdef CONFIG_PCI
+#include <asm/mpc8349_pci.h>
+#include <pci.h>
+#endif
+
+#ifdef CONFIG_SPD_EEPROM
+#include <spd_sdram.h>
+#else
+#include <asm/mmu.h>
+#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+#ifndef CONFIG_SPD_EEPROM
+/*************************************************************************
+ * fixed sdram init -- doesn't use serial presence detect.
+ ************************************************************************/
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 ddr_size; /* The size of RAM, in bytes */
+ u32 ddr_size_log2 = 0;
+
+ for (ddr_size = CFG_DDR_SIZE * 0x100000; ddr_size > 1; ddr_size >>= 1) {
+ if (ddr_size & 1) {
+ return -1;
+ }
+ ddr_size_log2++;
+ }
+
+ im->sysconf.ddrlaw[0].ar =
+ LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
+ im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff;
+
+ /* Only one CS0 for DDR */
+ im->ddr.csbnds[0].csbnds = 0x0000000f;
+ im->ddr.cs_config[0] = CFG_DDR_CONFIG;
+
+ debug("cs0_bnds = 0x%08x\n", im->ddr.csbnds[0].csbnds);
+ debug("cs0_config = 0x%08x\n", im->ddr.cs_config[0]);
+
+ debug("DDR:bar=0x%08x\n", im->sysconf.ddrlaw[0].bar);
+ debug("DDR:ar=0x%08x\n", im->sysconf.ddrlaw[0].ar);
+
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;/* Was "2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT" */
+ im->ddr.sdram_cfg = SDRAM_CFG_SREN | SDRAM_CFG_SDRAM_TYPE_DDR1;
+ im->ddr.sdram_mode =
+ (0x0000 << SDRAM_MODE_ESD_SHIFT) | (0x0032 << SDRAM_MODE_SD_SHIFT);
+ im->ddr.sdram_interval =
+ (0x0410 << SDRAM_INTERVAL_REFINT_SHIFT) | (0x0100 <<
+ SDRAM_INTERVAL_BSTOPRE_SHIFT);
+ im->ddr.sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL;
+
+ udelay(200);
+
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+
+ debug("DDR:timing_cfg_1=0x%08x\n", im->ddr.timing_cfg_1);
+ debug("DDR:timing_cfg_2=0x%08x\n", im->ddr.timing_cfg_2);
+ debug("DDR:sdram_mode=0x%08x\n", im->ddr.sdram_mode);
+ debug("DDR:sdram_interval=0x%08x\n", im->ddr.sdram_interval);
+ debug("DDR:sdram_cfg=0x%08x\n", im->ddr.sdram_cfg);
+
+ return CFG_DDR_SIZE;
+}
+#endif
+
+#ifdef CONFIG_PCI
+/*
+ * Initialize PCI Devices, report devices found
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_mpc83xxmitx_config_table[] = {
+ {
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ 0x0f,
+ PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ {
+ PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}
+ },
+ {}
+}
+#endif
+
+volatile static struct pci_controller hose[] = {
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc83xxmitx_config_table,
+#endif
+ },
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc83xxmitx_config_table,
+#endif
+ }
+};
+#endif /* CONFIG_PCI */
+
+long int initdram(int board_type)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+#ifdef CONFIG_DDR_ECC
+ volatile ddr83xx_t *ddr = &im->ddr;
+#endif
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+#ifdef CONFIG_SPD_EEPROM
+ msize = spd_sdram();
+#else
+ msize = fixed_sdram();
+#endif
+
+#ifdef CONFIG_DDR_ECC
+ if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN)
+ /* Unlike every other board, on the 83xx spd_sdram() returns
+ megabytes instead of just bytes. That's why we need to
+ multiple by 1MB when calling ddr_enable_ecc(). */
+ ddr_enable_ecc(msize * 1048576);
+#endif
+
+ /* return total bus RAM size(bytes) */
+ return msize * 1024 * 1024;
+}
+
+int checkboard(void)
+{
+#ifdef CONFIG_MPC8349ITX
+ puts("Board: Freescale MPC8349E-mITX\n");
+#else
+ puts("Board: Freescale MPC8349E-mITX-GP\n");
+#endif
+
+ return 0;
+}
+
+/*
+ * Implement a work-around for a hardware problem with compact
+ * flash.
+ *
+ * Program the UPM if compact flash is enabled.
+ */
+int misc_init_f(void)
+{
+#ifdef CONFIG_VSC7385
+ volatile u32 *vsc7385_cpuctrl;
+
+ /* 0x1c0c0 is the VSC7385 CPU Control (CPUCTRL) Register. The power up
+ default of VSC7385 L1_IRQ and L2_IRQ requests are active high. That
+ means it is 0 when the IRQ is not active. This makes the wire-AND
+ logic always assert IRQ7 to CPU even if there is no request from the
+ switch. Since the compact flash and the switch share the same IRQ,
+ the Linux kernel will think that the compact flash is requesting irq
+ and get stuck when it tries to clear the IRQ. Thus we need to set
+ the L2_IRQ0 and L2_IRQ1 to active low.
+
+ The following code sets the L1_IRQ and L2_IRQ polarity to active low.
+ Without this code, compact flash will not work in Linux because
+ unlike U-Boot, Linux uses the IRQ, so this code is necessary if we
+ don't enable compact flash for U-Boot.
+ */
+
+ vsc7385_cpuctrl = (volatile u32 *)(CFG_VSC7385_BASE + 0x1c0c0);
+ *vsc7385_cpuctrl |= 0x0c;
+#endif
+
+#ifdef CONFIG_COMPACT_FLASH
+ /* UPM Table Configuration Code */
+ static uint UPMATable[] = {
+ 0xcffffc00, 0x0fffff00, 0x0fafff00, 0x0fafff00,
+ 0x0faffd00, 0x0faffc04, 0x0ffffc00, 0x3ffffc01,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfff7fc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
+ 0xcffffc00, 0x0fffff00, 0x0ff3ff00, 0x0ff3ff00,
+ 0x0ff3fe00, 0x0ffffc00, 0x3ffffc05, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
+ 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01
+ };
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile lbus83xx_t *lbus = &immap->lbus;
+
+ lbus->bank[3].br = CFG_BR3_PRELIM;
+ lbus->bank[3].or = CFG_OR3_PRELIM;
+
+ /* Program the MAMR. RFEN=0, OP=00, UWPL=1, AM=000, DS=01, G0CL=000,
+ GPL4=0, RLF=0001, WLF=0001, TLF=0001, MAD=000000
+ */
+ lbus->mamr = 0x08404440;
+
+ upmconfig(0, UPMATable, sizeof(UPMATable) / sizeof(UPMATable[0]));
+
+ puts("UPMA: Configured for compact flash\n");
+#endif
+
+ return 0;
+}
+
+/*
+ * Make sure the EEPROM has the HRCW correctly programmed.
+ * Make sure the RTC is correctly programmed.
+ *
+ * The MPC8349E-mITX can be configured to load the HRCW from
+ * EEPROM instead of flash. This is controlled via jumpers
+ * LGPL0, 1, and 3. Normally, these jumpers are set to 000 (all
+ * jumpered), but if they're set to 001 or 010, then the HRCW is
+ * read from the "I2C EEPROM".
+ *
+ * This function makes sure that the I2C EEPROM is programmed
+ * correctly.
+ */
+int misc_init_r(void)
+{
+ int rc = 0;
+
+#ifdef CONFIG_HARD_I2C
+
+ unsigned int orig_bus = i2c_get_bus_num();
+ u8 i2c_data;
+
+#ifdef CFG_I2C_RTC_ADDR
+ u8 ds1339_data[17];
+#endif
+
+#ifdef CFG_I2C_EEPROM_ADDR
+ static u8 eeprom_data[] = /* HRCW data */
+ {
+ 0xAA, 0x55, 0xAA, /* Preamble */
+ 0x7C, /* ACS=0, BYTE_EN=1111, CONT=1 */
+ 0x02, 0x40, /* RCWL ADDR=0x0_0900 */
+ (CFG_HRCW_LOW >> 24) & 0xFF,
+ (CFG_HRCW_LOW >> 16) & 0xFF,
+ (CFG_HRCW_LOW >> 8) & 0xFF,
+ CFG_HRCW_LOW & 0xFF,
+ 0x7C, /* ACS=0, BYTE_EN=1111, CONT=1 */
+ 0x02, 0x41, /* RCWH ADDR=0x0_0904 */
+ (CFG_HRCW_HIGH >> 24) & 0xFF,
+ (CFG_HRCW_HIGH >> 16) & 0xFF,
+ (CFG_HRCW_HIGH >> 8) & 0xFF,
+ CFG_HRCW_HIGH & 0xFF
+ };
+
+ u8 data[sizeof(eeprom_data)];
+#endif
+
+ printf("Board revision: ");
+ i2c_set_bus_num(1);
+ if (i2c_read(CFG_I2C_8574A_ADDR2, 0, 0, &i2c_data, sizeof(i2c_data)) == 0)
+ printf("%u.%u (PCF8475A)\n", (i2c_data & 0x02) >> 1, i2c_data & 0x01);
+ else if (i2c_read(CFG_I2C_8574_ADDR2, 0, 0, &i2c_data, sizeof(i2c_data)) == 0)
+ printf("%u.%u (PCF8475)\n", (i2c_data & 0x02) >> 1, i2c_data & 0x01);
+ else {
+ printf("Unknown\n");
+ rc = 1;
+ }
+
+#ifdef CFG_I2C_EEPROM_ADDR
+ i2c_set_bus_num(0);
+
+ if (i2c_read(CFG_I2C_EEPROM_ADDR, 0, 2, data, sizeof(data)) == 0) {
+ if (memcmp(data, eeprom_data, sizeof(data)) != 0) {
+ if (i2c_write
+ (CFG_I2C_EEPROM_ADDR, 0, 2, eeprom_data,
+ sizeof(eeprom_data)) != 0) {
+ puts("Failure writing the HRCW to EEPROM via I2C.\n");
+ rc = 1;
+ }
+ }
+ } else {
+ puts("Failure reading the HRCW from EEPROM via I2C.\n");
+ rc = 1;
+ }
+#endif
+
+#ifdef CFG_I2C_RTC_ADDR
+ i2c_set_bus_num(1);
+
+ if (i2c_read(CFG_I2C_RTC_ADDR, 0, 1, ds1339_data, sizeof(ds1339_data))
+ == 0) {
+
+ /* Work-around for MPC8349E-mITX bug #13601.
+ If the RTC does not contain valid register values, the DS1339
+ Linux driver will not work.
+ */
+
+ /* Make sure status register bits 6-2 are zero */
+ ds1339_data[0x0f] &= ~0x7c;
+
+ /* Check for a valid day register value */
+ ds1339_data[0x03] &= ~0xf8;
+ if (ds1339_data[0x03] == 0) {
+ ds1339_data[0x03] = 1;
+ }
+
+ /* Check for a valid date register value */
+ ds1339_data[0x04] &= ~0xc0;
+ if ((ds1339_data[0x04] == 0) ||
+ ((ds1339_data[0x04] & 0x0f) > 9) ||
+ (ds1339_data[0x04] >= 0x32)) {
+ ds1339_data[0x04] = 1;
+ }
+
+ /* Check for a valid month register value */
+ ds1339_data[0x05] &= ~0x60;
+
+ if ((ds1339_data[0x05] == 0) ||
+ ((ds1339_data[0x05] & 0x0f) > 9) ||
+ ((ds1339_data[0x05] >= 0x13)
+ && (ds1339_data[0x05] <= 0x19))) {
+ ds1339_data[0x05] = 1;
+ }
+
+ /* Enable Oscillator and rate select */
+ ds1339_data[0x0e] = 0x1c;
+
+ /* Work-around for MPC8349E-mITX bug #13330.
+ Ensure that the RTC control register contains the value 0x1c.
+ This affects SATA performance.
+ */
+
+ if (i2c_write
+ (CFG_I2C_RTC_ADDR, 0, 1, ds1339_data,
+ sizeof(ds1339_data))) {
+ puts("Failure writing to the RTC via I2C.\n");
+ rc = 1;
+ }
+ } else {
+ puts("Failure reading from the RTC via I2C.\n");
+ rc = 1;
+ }
+#endif
+
+ i2c_set_bus_num(orig_bus);
+#endif
+
+ return rc;
+}
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_OF_FLAT_TREE)
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#endif
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/board/freescale/mpc8349itx/pci.c b/board/freescale/mpc8349itx/pci.c
new file mode 100644
index 0000000..5ca094d
--- /dev/null
+++ b/board/freescale/mpc8349itx/pci.c
@@ -0,0 +1,392 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_PCI
+
+#include <asm/mmu.h>
+#include <asm/global_data.h>
+#include <pci.h>
+#include <asm/mpc8349_pci.h>
+#include <i2c.h>
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* System RAM mapped to PCI space */
+#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_mpc8349itx_config_table[] = {
+ {
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ PCI_ANY_ID,
+ PCI_IDSEL_NUMBER,
+ PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ {
+ PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}
+ },
+ {}
+};
+#endif
+
+static struct pci_controller pci_hose[] = {
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc8349itx_config_table,
+#endif
+ },
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc8349itx_config_table,
+#endif
+ }
+};
+
+/**************************************************************************
+ * pci_init_board()
+ *
+ * NOTICE: PCI2 is not currently supported
+ *
+ */
+void pci_init_board(void)
+{
+ volatile immap_t *immr;
+ volatile clk83xx_t *clk;
+ volatile law83xx_t *pci_law;
+ volatile pot83xx_t *pci_pot;
+ volatile pcictrl83xx_t *pci_ctrl;
+ volatile pciconf83xx_t *pci_conf;
+ u8 reg8;
+ u16 reg16;
+ u32 reg32;
+ u32 dev;
+ struct pci_controller *hose;
+
+ immr = (immap_t *) CFG_IMMR;
+ clk = (clk83xx_t *) & immr->clk;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+
+ hose = &pci_hose[0];
+
+ /*
+ * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
+ */
+
+ reg32 = clk->occr;
+ udelay(2000);
+
+#ifdef CONFIG_HARD_I2C
+ i2c_set_bus_num(1);
+ /* Read the PCI_M66EN jumper setting */
+ if ((i2c_read(CFG_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) ||
+ (i2c_read(CFG_I2C_8574A_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0)) {
+ if (reg8 & I2C_8574_PCI66)
+ clk->occr = 0xff000000; /* 66 MHz PCI */
+ else
+ clk->occr = 0xff600001; /* 33 MHz PCI */
+ } else {
+ clk->occr = 0xff600001; /* 33 MHz PCI */
+ }
+#else
+ clk->occr = 0xff000000; /* 66 MHz PCI */
+#endif
+
+ udelay(2000);
+
+ /*
+ * Release PCI RST Output signal
+ */
+ pci_ctrl[0].gcr = 0;
+ udelay(2000);
+ pci_ctrl[0].gcr = 1;
+
+#ifdef CONFIG_MPC83XX_PCI2
+ pci_ctrl[1].gcr = 0;
+ udelay(2000);
+ pci_ctrl[1].gcr = 1;
+#endif
+
+ /* We need to wait at least a 1sec based on PCI specs */
+ {
+ int i;
+
+ for (i = 0; i < 1000; i++)
+ udelay(1000);
+ }
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
+
+ pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI1 mem space - prefetch */
+ pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | POCMR_CM_256M;
+
+ /* PCI1 IO space */
+ pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M;
+
+ /* PCI1 mmio - non-prefetch mem space */
+ pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M;
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_MMIO_BASE,
+ CFG_PCI1_MMIO_PHYS, CFG_PCI1_MMIO_SIZE, PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+
+#ifdef CONFIG_MPC83XX_PCI2
+ hose = &pci_hose[1];
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI2 mem space - prefetch */
+ pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | POCMR_CM_256M;
+
+ /* PCI2 IO space */
+ pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | POCMR_CM_16M;
+
+ /* PCI2 mmio - non-prefetch mem space */
+ pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_CM_256M;
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+
+ /* we need RAM mapped to PCI space for the devices to
+ * access main memory */
+ pci_ctrl[1].pitar1 = 0x0;
+ pci_ctrl[1].pibar1 = 0x0;
+ pci_ctrl[1].piebar1 = 0x0;
+ pci_ctrl[1].piwar1 =
+ PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP |
+ (__ilog2(gd->ram_size) - 1);
+
+ hose->first_busno = pci_hose[0].last_busno + 1;
+ hose->last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI2_MEM_BASE,
+ CFG_PCI2_MEM_PHYS,
+ CFG_PCI2_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI2_MMIO_BASE,
+ CFG_PCI2_MMIO_PHYS, CFG_PCI2_MMIO_SIZE, PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI2_IO_BASE,
+ CFG_PCI2_IO_PHYS, CFG_PCI2_IO_SIZE, PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose->regions + 3,
+ CONFIG_PCI_SYS_MEM_BUS,
+ CONFIG_PCI_SYS_MEM_PHYS,
+ gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 4;
+
+ pci_setup_indirect(hose,
+ (CFG_IMMR + 0x8380), (CFG_IMMR + 0x8384));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+#endif
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int err;
+ int tmp[2];
+
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+#ifdef CONFIG_MPC83XX_PCI2
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(pci_hose[1].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[1].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+#endif
+}
+#elif defined(CONFIG_OF_FLAT_TREE)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[0].first_busno;
+ p[1] = pci_hose[0].last_busno;
+ }
+
+#ifdef CONFIG_MPC83XX_PCI2
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+ if (p != NULL) {
+ p[0] = pci_hose[1].first_busno;
+ p[1] = pci_hose[1].last_busno;
+ }
+#endif
+}
+#endif /* CONFIG_OF_FLAT_TREE */
+#endif /* CONFIG_PCI */
diff --git a/board/mpc8360emds/Makefile b/board/freescale/mpc8360emds/Makefile
similarity index 100%
rename from board/mpc8360emds/Makefile
rename to board/freescale/mpc8360emds/Makefile
diff --git a/board/mpc8360emds/config.mk b/board/freescale/mpc8360emds/config.mk
similarity index 100%
rename from board/mpc8360emds/config.mk
rename to board/freescale/mpc8360emds/config.mk
diff --git a/board/freescale/mpc8360emds/mpc8360emds.c b/board/freescale/mpc8360emds/mpc8360emds.c
new file mode 100644
index 0000000..e050cd4
--- /dev/null
+++ b/board/freescale/mpc8360emds/mpc8360emds.c
@@ -0,0 +1,313 @@
+/*
+ * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ * Dave Liu <daveliu@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <common.h>
+#include <ioports.h>
+#include <mpc83xx.h>
+#include <i2c.h>
+#include <spd.h>
+#include <miiphy.h>
+#if defined(CONFIG_PCI)
+#include <pci.h>
+#endif
+#if defined(CONFIG_SPD_EEPROM)
+#include <spd_sdram.h>
+#else
+#include <asm/mmu.h>
+#endif
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+#if defined(CONFIG_PQ_MDS_PIB)
+#include "../common/pq-mds-pib.h"
+#endif
+
+const qe_iop_conf_t qe_iop_conf_tab[] = {
+ /* GETH1 */
+ {0, 3, 1, 0, 1}, /* TxD0 */
+ {0, 4, 1, 0, 1}, /* TxD1 */
+ {0, 5, 1, 0, 1}, /* TxD2 */
+ {0, 6, 1, 0, 1}, /* TxD3 */
+ {1, 6, 1, 0, 3}, /* TxD4 */
+ {1, 7, 1, 0, 1}, /* TxD5 */
+ {1, 9, 1, 0, 2}, /* TxD6 */
+ {1, 10, 1, 0, 2}, /* TxD7 */
+ {0, 9, 2, 0, 1}, /* RxD0 */
+ {0, 10, 2, 0, 1}, /* RxD1 */
+ {0, 11, 2, 0, 1}, /* RxD2 */
+ {0, 12, 2, 0, 1}, /* RxD3 */
+ {0, 13, 2, 0, 1}, /* RxD4 */
+ {1, 1, 2, 0, 2}, /* RxD5 */
+ {1, 0, 2, 0, 2}, /* RxD6 */
+ {1, 4, 2, 0, 2}, /* RxD7 */
+ {0, 7, 1, 0, 1}, /* TX_EN */
+ {0, 8, 1, 0, 1}, /* TX_ER */
+ {0, 15, 2, 0, 1}, /* RX_DV */
+ {0, 16, 2, 0, 1}, /* RX_ER */
+ {0, 0, 2, 0, 1}, /* RX_CLK */
+ {2, 9, 1, 0, 3}, /* GTX_CLK - CLK10 */
+ {2, 8, 2, 0, 1}, /* GTX125 - CLK9 */
+ /* GETH2 */
+ {0, 17, 1, 0, 1}, /* TxD0 */
+ {0, 18, 1, 0, 1}, /* TxD1 */
+ {0, 19, 1, 0, 1}, /* TxD2 */
+ {0, 20, 1, 0, 1}, /* TxD3 */
+ {1, 2, 1, 0, 1}, /* TxD4 */
+ {1, 3, 1, 0, 2}, /* TxD5 */
+ {1, 5, 1, 0, 3}, /* TxD6 */
+ {1, 8, 1, 0, 3}, /* TxD7 */
+ {0, 23, 2, 0, 1}, /* RxD0 */
+ {0, 24, 2, 0, 1}, /* RxD1 */
+ {0, 25, 2, 0, 1}, /* RxD2 */
+ {0, 26, 2, 0, 1}, /* RxD3 */
+ {0, 27, 2, 0, 1}, /* RxD4 */
+ {1, 12, 2, 0, 2}, /* RxD5 */
+ {1, 13, 2, 0, 3}, /* RxD6 */
+ {1, 11, 2, 0, 2}, /* RxD7 */
+ {0, 21, 1, 0, 1}, /* TX_EN */
+ {0, 22, 1, 0, 1}, /* TX_ER */
+ {0, 29, 2, 0, 1}, /* RX_DV */
+ {0, 30, 2, 0, 1}, /* RX_ER */
+ {0, 31, 2, 0, 1}, /* RX_CLK */
+ {2, 2, 1, 0, 2}, /* GTX_CLK = CLK10 */
+ {2, 3, 2, 0, 1}, /* GTX125 - CLK4 */
+
+ {0, 1, 3, 0, 2}, /* MDIO */
+ {0, 2, 1, 0, 1}, /* MDC */
+
+ {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
+};
+
+int board_early_init_f(void)
+{
+
+ u8 *bcsr = (u8 *)CFG_BCSR;
+ const immap_t *immr = (immap_t *)CFG_IMMR;
+
+ /* Enable flash write */
+ bcsr[0xa] &= ~0x04;
+
+ /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
+ if (immr->sysconf.spridr == SPR_8360_REV20 ||
+ immr->sysconf.spridr == SPR_8360E_REV20 ||
+ immr->sysconf.spridr == SPR_8360_REV21 ||
+ immr->sysconf.spridr == SPR_8360E_REV21)
+ bcsr[0xe] = 0x30;
+
+ return 0;
+}
+
+int board_early_init_r(void)
+{
+#ifdef CONFIG_PQ_MDS_PIB
+ pib_init();
+#endif
+ return 0;
+}
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+extern void ddr_enable_ecc(unsigned int dram_size);
+#endif
+int fixed_sdram(void);
+void sdram_init(void);
+
+long int initdram(int board_type)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+ return -1;
+
+ /* DDR SDRAM - Main SODIMM */
+ im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
+#if defined(CONFIG_SPD_EEPROM)
+ msize = spd_sdram();
+#else
+ msize = fixed_sdram();
+#endif
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
+ /*
+ * Initialize DDR ECC byte
+ */
+ ddr_enable_ecc(msize * 1024 * 1024);
+#endif
+ /*
+ * Initialize SDRAM if it is on local bus.
+ */
+ sdram_init();
+
+ /* return total bus SDRAM size(bytes) -- DDR */
+ return (msize * 1024 * 1024);
+}
+
+#if !defined(CONFIG_SPD_EEPROM)
+/*************************************************************************
+ * fixed sdram init -- doesn't use serial presence detect.
+ ************************************************************************/
+int fixed_sdram(void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u32 msize = 0;
+ u32 ddr_size;
+ u32 ddr_size_log2;
+
+ msize = CFG_DDR_SIZE;
+ for (ddr_size = msize << 20, ddr_size_log2 = 0;
+ (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
+ if (ddr_size & 1) {
+ return -1;
+ }
+ }
+ im->sysconf.ddrlaw[0].ar =
+ LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
+#if (CFG_DDR_SIZE != 256)
+#warning Currenly any ddr size other than 256 is not supported
+#endif
+#ifdef CONFIG_DDR_II
+ im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
+ im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
+ im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
+ im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
+ im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_mode2 = CFG_DDR_MODE2;
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+ im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
+#else
+ im->ddr.csbnds[0].csbnds = 0x00000007;
+ im->ddr.csbnds[1].csbnds = 0x0008000f;
+
+ im->ddr.cs_config[0] = CFG_DDR_CONFIG;
+ im->ddr.cs_config[1] = CFG_DDR_CONFIG;
+
+ im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
+ im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
+ im->ddr.sdram_cfg = CFG_DDR_CONTROL;
+
+ im->ddr.sdram_mode = CFG_DDR_MODE;
+ im->ddr.sdram_interval = CFG_DDR_INTERVAL;
+#endif
+ udelay(200);
+ im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
+
+ return msize;
+}
+#endif /*!CFG_SPD_EEPROM */
+
+int checkboard(void)
+{
+ puts("Board: Freescale MPC8360EMDS\n");
+ return 0;
+}
+
+/*
+ * if MPC8360EMDS is soldered with SDRAM
+ */
+#if defined(CFG_BR2_PRELIM) \
+ && defined(CFG_OR2_PRELIM) \
+ && defined(CFG_LBLAWBAR2_PRELIM) \
+ && defined(CFG_LBLAWAR2_PRELIM)
+/*
+ * Initialize SDRAM memory on the Local Bus.
+ */
+
+void sdram_init(void)
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile lbus83xx_t *lbc = &immap->lbus;
+ uint *sdram_addr = (uint *) CFG_LBC_SDRAM_BASE;
+
+ /*
+ * Setup SDRAM Base and Option Registers, already done in cpu_init.c
+ */
+ /*setup mtrpt, lsrt and lbcr for LB bus */
+ lbc->lbcr = CFG_LBC_LBCR;
+ lbc->mrtpr = CFG_LBC_MRTPR;
+ lbc->lsrt = CFG_LBC_LSRT;
+ asm("sync");
+
+ /*
+ * Configure the SDRAM controller Machine Mode Register.
+ */
+ lbc->lsdmr = CFG_LBC_LSDMR_5; /* Normal Operation */
+ lbc->lsdmr = CFG_LBC_LSDMR_1; /* Precharge All Banks */
+ asm("sync");
+ *sdram_addr = 0xff;
+ udelay(100);
+
+ /*
+ * We need do 8 times auto refresh operation.
+ */
+ lbc->lsdmr = CFG_LBC_LSDMR_2;
+ asm("sync");
+ *sdram_addr = 0xff; /* 1 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 2 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 3 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 4 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 5 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 6 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 7 times */
+ udelay(100);
+ *sdram_addr = 0xff; /* 8 times */
+ udelay(100);
+
+ /* Mode register write operation */
+ lbc->lsdmr = CFG_LBC_LSDMR_4;
+ asm("sync");
+ *(sdram_addr + 0xcc) = 0xff;
+ udelay(100);
+
+ /* Normal operation */
+ lbc->lsdmr = CFG_LBC_LSDMR_5 | 0x40000000;
+ asm("sync");
+ *sdram_addr = 0xff;
+ udelay(100);
+}
+#else
+void sdram_init(void)
+{
+}
+#endif
+
+#if defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+#if defined(CONFIG_OF_FLAT_TREE)
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#endif
+ ft_cpu_setup(blob, bd);
+#ifdef CONFIG_PCI
+ ft_pci_setup(blob, bd);
+#endif
+}
+#endif
diff --git a/board/freescale/mpc8360emds/pci.c b/board/freescale/mpc8360emds/pci.c
new file mode 100644
index 0000000..cf7ef90
--- /dev/null
+++ b/board/freescale/mpc8360emds/pci.c
@@ -0,0 +1,298 @@
+/*
+ * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+/*
+ * PCI Configuration space access support for MPC83xx PCI Bridge
+ */
+#include <asm/mmu.h>
+#include <asm/io.h>
+#include <common.h>
+#include <pci.h>
+#include <i2c.h>
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#elif defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#endif
+
+#include <asm/fsl_i2c.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_PCI)
+#define PCI_FUNCTION_CONFIG 0x44
+#define PCI_FUNCTION_CFG_LOCK 0x20
+
+/*
+ * Initialize PCI Devices, report devices found
+ */
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_mpc83xxemds_config_table[] = {
+ {
+ PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ pci_cfgfunc_config_device,
+ {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMON_MEMORY | PCI_COMMAND_MASTER}
+ },
+ {}
+}
+#endif
+static struct pci_controller hose[] = {
+ {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc83xxemds_config_table,
+#endif
+ },
+};
+
+/**********************************************************************
+ * pci_init_board()
+ *********************************************************************/
+void pci_init_board(void)
+#ifdef CONFIG_PCISLAVE
+{
+ u16 reg16;
+ volatile immap_t *immr;
+ volatile law83xx_t *pci_law;
+ volatile pot83xx_t *pci_pot;
+ volatile pcictrl83xx_t *pci_ctrl;
+ volatile pciconf83xx_t *pci_conf;
+
+ immr = (immap_t *) CFG_IMMR;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+ pci_ctrl[0].pitar0 = 0x0;
+ pci_ctrl[0].pibar0 = 0x0;
+ pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
+
+ pci_ctrl[0].pitar1 = 0x0;
+ pci_ctrl[0].pibar1 = 0x0;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 &= ~PIWAR_EN;
+
+ pci_ctrl[0].pitar2 = 0x0;
+ pci_ctrl[0].pibar2 = 0x0;
+ pci_ctrl[0].piebar2 = 0x0;
+ pci_ctrl[0].piwar2 &= ~PIWAR_EN;
+
+ hose[0].first_busno = 0;
+ hose[0].last_busno = 0xff;
+ pci_setup_indirect(&hose[0],
+ (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
+ reg16 = 0xff;
+
+ pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_LATENCY_TIMER, 0x80);
+
+ /*
+ * Unlock configuration lock in PCI function configuration register.
+ */
+ pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_FUNCTION_CONFIG, ®16);
+ reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
+ pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
+ PCI_FUNCTION_CONFIG, reg16);
+
+ printf("Enabled PCI 32bit Agent Mode\n");
+}
+#else
+{
+ volatile immap_t *immr;
+ volatile clk83xx_t *clk;
+ volatile law83xx_t *pci_law;
+ volatile pot83xx_t *pci_pot;
+ volatile pcictrl83xx_t *pci_ctrl;
+ volatile pciconf83xx_t *pci_conf;
+
+ u16 reg16;
+ u32 val32;
+ u32 dev;
+
+ immr = (immap_t *) CFG_IMMR;
+ clk = (clk83xx_t *) & immr->clk;
+ pci_law = immr->sysconf.pcilaw;
+ pci_pot = immr->ios.pot;
+ pci_ctrl = immr->pci_ctrl;
+ pci_conf = immr->pci_conf;
+ /*
+ * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
+ */
+ val32 = clk->occr;
+ udelay(2000);
+#if defined(PCI_66M)
+ clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
+ printf("PCI clock is 66MHz\n");
+#elif defined(PCI_33M)
+ clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
+ OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
+ printf("PCI clock is 33MHz\n");
+#else
+ clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
+ printf("PCI clock is 66MHz\n");
+#endif
+ udelay(2000);
+
+ /*
+ * Configure PCI Local Access Windows
+ */
+ pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR;
+ pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
+
+ pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR;
+ pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
+
+ /*
+ * Configure PCI Outbound Translation Windows
+ */
+
+ /* PCI mem space - prefetch */
+ pci_pot[0].potar = (CFG_PCI_MEM_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[0].pobar = (CFG_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[0].pocmr =
+ POCMR_EN | POCMR_SE | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI mmio - non-prefetch mem space */
+ pci_pot[1].potar = (CFG_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[1].pobar = (CFG_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[1].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
+
+ /* PCI IO space */
+ pci_pot[2].potar = (CFG_PCI_IO_BASE >> 12) & POTAR_TA_MASK;
+ pci_pot[2].pobar = (CFG_PCI_IO_PHYS >> 12) & POBAR_BA_MASK;
+ pci_pot[2].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
+
+ /*
+ * Configure PCI Inbound Translation Windows
+ */
+ pci_ctrl[0].pitar1 = (CFG_PCI_SLV_MEM_LOCAL >> 12) & PITAR_TA_MASK;
+ pci_ctrl[0].pibar1 = (CFG_PCI_SLV_MEM_BUS >> 12) & PIBAR_MASK;
+ pci_ctrl[0].piebar1 = 0x0;
+ pci_ctrl[0].piwar1 =
+ PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP |
+ PIWAR_IWS_2G;
+
+ /*
+ * Release PCI RST Output signal
+ */
+ udelay(2000);
+ pci_ctrl[0].gcr = 1;
+ udelay(2000);
+
+ hose[0].first_busno = 0;
+ hose[0].last_busno = 0xff;
+
+ /* PCI memory prefetch space */
+ pci_set_region(hose[0].regions + 0,
+ CFG_PCI_MEM_BASE,
+ CFG_PCI_MEM_PHYS,
+ CFG_PCI_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
+
+ /* PCI memory space */
+ pci_set_region(hose[0].regions + 1,
+ CFG_PCI_MMIO_BASE,
+ CFG_PCI_MMIO_PHYS, CFG_PCI_MMIO_SIZE, PCI_REGION_MEM);
+
+ /* PCI IO space */
+ pci_set_region(hose[0].regions + 2,
+ CFG_PCI_IO_BASE,
+ CFG_PCI_IO_PHYS, CFG_PCI_IO_SIZE, PCI_REGION_IO);
+
+ /* System memory space */
+ pci_set_region(hose[0].regions + 3,
+ CFG_PCI_SLV_MEM_LOCAL,
+ CFG_PCI_SLV_MEM_BUS,
+ CFG_PCI_SLV_MEM_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose[0].region_count = 4;
+
+ pci_setup_indirect(&hose[0],
+ (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
+
+ pci_register_hose(hose);
+
+ /*
+ * Write command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(0, 0, 0);
+ pci_hose_read_config_word(&hose[0], dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(&hose[0], dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(&hose[0], dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(&hose[0], dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(&hose[0], dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+}
+#endif /* CONFIG_PCISLAVE */
+
+#if defined(CONFIG_OF_LIBFDT)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int err;
+ int tmp[2];
+
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(hose[0].first_busno);
+ tmp[1] = cpu_to_be32(hose[0].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+}
+#elif defined(CONFIG_OF_FLAT_TREE)
+void
+ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p != NULL) {
+ p[0] = hose[0].first_busno;
+ p[1] = hose[0].last_busno;
+ }
+}
+#endif /* CONFIG_OF_FLAT_TREE */
+#endif /* CONFIG_PCI */
diff --git a/board/freescale/mpc8544ds/Makefile b/board/freescale/mpc8544ds/Makefile
index bec2168..006fdc9 100644
--- a/board/freescale/mpc8544ds/Makefile
+++ b/board/freescale/mpc8544ds/Makefile
@@ -24,14 +24,9 @@
include $(TOPDIR)/config.mk
-# ifneq ($(OBJTREE),$(SRCTREE))
-# $(shell mkdir -p $(obj)./common)
-# endif
-
LIB = $(obj)lib$(BOARD).a
-COBJS := $(BOARD).o \
- ../common/pixis.o
+COBJS := $(BOARD).o
SOBJS := init.o
diff --git a/board/freescale/mpc8544ds/init.S b/board/freescale/mpc8544ds/init.S
index 296fee5..68ccba7 100644
--- a/board/freescale/mpc8544ds/init.S
+++ b/board/freescale/mpc8544ds/init.S
@@ -52,8 +52,8 @@
*/
#define entry_start \
- mflr r1 ; \
- bl 0f ;
+ mflr r1 ; \
+ bl 0f ;
#define entry_end \
0: mflr r0 ; \
@@ -214,11 +214,11 @@
.long 0
.long (LAWAR_TRGT_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN
- .long (CFG_PCI1_MEM_BASE>>12) & 0xfffff
+ .long (CFG_PCI1_MEM_PHYS>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M)
.long (CFG_PCI1_IO_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M)
+ .long LAWAR_EN | LAWAR_TRGT_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_64K)
.long (CFG_LBC_CACHE_BASE>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_LBC | (LAWAR_SIZE & LAWAR_SIZE_256M)
@@ -226,18 +226,17 @@
.long (CFG_PCIE1_MEM_PHYS>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_256M)
- /* To keep to 10 LAWs, PCIE1_IO_PHYS must use top of mem region */
+ .long (CFG_PCIE1_IO_PHYS>>12) & 0xfffff
+ .long LAWAR_EN | LAWAR_TRGT_PCIE1 | (LAWAR_SIZE & LAWAR_SIZE_64K)
.long (CFG_PCIE2_MEM_PHYS>>12) & 0xfffff
.long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_512M)
.long (CFG_PCIE2_IO_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_16M)
+ .long LAWAR_EN | LAWAR_TRGT_PCIE2 | (LAWAR_SIZE & LAWAR_SIZE_64K)
+ /* contains both PCIE3 MEM & IO space */
.long (CFG_PCIE3_MEM_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_256M)
-
- .long (CFG_PCIE3_IO_PHYS>>12) & 0xfffff
- .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_16M)
+ .long LAWAR_EN | LAWAR_TRGT_PCIE3 | (LAWAR_SIZE & LAWAR_SIZE_4M)
4:
entry_end
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 4ff1da9..76d9091 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -22,8 +22,11 @@
#include <common.h>
#include <command.h>
+#include <pci.h>
#include <asm/processor.h>
#include <asm/immap_85xx.h>
+#include <asm/immap_fsl_pci.h>
+#include <asm/io.h>
#include <spd.h>
#include <miiphy.h>
@@ -51,12 +54,19 @@
{
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
+ volatile ccsr_lbc_t *lbc = &immap->im_lbc;
+ volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
if ((uint)&gur->porpllsr != 0xe00e0000) {
printf("immap size error %x\n",&gur->porpllsr);
}
printf ("Board: MPC8544DS\n");
+ lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
+ lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
+ ecm->eedr = 0xffffffff; /* Clear ecm errors */
+ ecm->eeer = 0xffffffff; /* Enable ecm errors */
+
return 0;
}
@@ -118,6 +128,321 @@
}
#endif
+#ifdef CONFIG_PCI1
+static struct pci_controller pci1_hose;
+#endif
+
+#ifdef CONFIG_PCIE1
+static struct pci_controller pcie1_hose;
+#endif
+
+#ifdef CONFIG_PCIE2
+static struct pci_controller pcie2_hose;
+#endif
+
+#ifdef CONFIG_PCIE3
+static struct pci_controller pcie3_hose;
+#endif
+
+int first_free_busno=0;
+
+void
+pci_init_board(void)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ uint devdisr = gur->devdisr;
+ uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
+ uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;
+
+ debug (" pci_init_board: devdisr=%x, io_sel=%x, host_agent=%x\n",
+ devdisr, io_sel, host_agent);
+
+ if (io_sel & 1) {
+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII1_DIS))
+ printf (" eTSEC1 is in sgmii mode.\n");
+ if (!(gur->pordevsr & MPC85xx_PORDEVSR_SGMII3_DIS))
+ printf (" eTSEC3 is in sgmii mode.\n");
+ }
+
+#ifdef CONFIG_PCIE3
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE3_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pcie3_hose;
+ int pcie_ep = (host_agent == 3);
+ int pcie_configured = io_sel >= 1;
+
+ if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
+ printf ("\n PCIE3 connected to ULI as %s (base address %x)",
+ pcie_ep ? "End Point" : "Root Complex",
+ (uint)pci);
+ if (pci->pme_msg_det) {
+ pci->pme_msg_det = 0xffffffff;
+ debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det);
+ }
+ printf ("\n");
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCIE3_MEM_BASE,
+ CFG_PCIE3_MEM_PHYS,
+ CFG_PCIE3_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCIE3_IO_BASE,
+ CFG_PCIE3_IO_PHYS,
+ CFG_PCIE3_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+#ifdef CFG_PCIE3_MEM_BASE2
+ /* outbound memory */
+ pci_set_region(hose->regions + 3,
+ CFG_PCIE3_MEM_BASE2,
+ CFG_PCIE3_MEM_PHYS2,
+ CFG_PCIE3_MEM_SIZE2,
+ PCI_REGION_MEM);
+ hose->region_count++;
+#endif
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+
+ first_free_busno=hose->last_busno+1;
+ printf (" PCIE3 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+
+ /*
+ * Activate ULI1575 legacy chip by performing a fake
+ * memory access. Needed to make ULI RTC work.
+ */
+ in_be32(CFG_PCIE3_MEM_BASE);
+ } else {
+ printf (" PCIE3: disabled\n");
+ }
+
+ }
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCIE3; /* disable */
+#endif
+
+#ifdef CONFIG_PCIE1
+ {
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE1_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pcie1_hose;
+ int pcie_ep = (host_agent == 5);
+ int pcie_configured = io_sel & 6;
+
+ if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
+ printf ("\n PCIE1 connected to Slot2 as %s (base address %x)",
+ pcie_ep ? "End Point" : "Root Complex",
+ (uint)pci);
+ if (pci->pme_msg_det) {
+ pci->pme_msg_det = 0xffffffff;
+ debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det);
+ }
+ printf ("\n");
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCIE1_MEM_BASE,
+ CFG_PCIE1_MEM_PHYS,
+ CFG_PCIE1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCIE1_IO_BASE,
+ CFG_PCIE1_IO_PHYS,
+ CFG_PCIE1_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+#ifdef CFG_PCIE1_MEM_BASE2
+ /* outbound memory */
+ pci_set_region(hose->regions + 3,
+ CFG_PCIE1_MEM_BASE2,
+ CFG_PCIE1_MEM_PHYS2,
+ CFG_PCIE1_MEM_SIZE2,
+ PCI_REGION_MEM);
+ hose->region_count++;
+#endif
+ hose->first_busno=first_free_busno;
+
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+
+ first_free_busno=hose->last_busno+1;
+ printf(" PCIE1 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+
+ } else {
+ printf (" PCIE1: disabled\n");
+ }
+
+ }
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCIE; /* disable */
+#endif
+
+#ifdef CONFIG_PCIE2
+ {
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCIE2_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pcie2_hose;
+ int pcie_ep = (host_agent == 3);
+ int pcie_configured = io_sel & 4;
+
+ if (pcie_configured && !(devdisr & MPC85xx_DEVDISR_PCIE)){
+ printf ("\n PCIE2 connected to Slot 1 as %s (base address %x)",
+ pcie_ep ? "End Point" : "Root Complex",
+ (uint)pci);
+ if (pci->pme_msg_det) {
+ pci->pme_msg_det = 0xffffffff;
+ debug (" with errors. Clearing. Now 0x%08x",pci->pme_msg_det);
+ }
+ printf ("\n");
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCIE2_MEM_BASE,
+ CFG_PCIE2_MEM_PHYS,
+ CFG_PCIE2_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCIE2_IO_BASE,
+ CFG_PCIE2_IO_PHYS,
+ CFG_PCIE2_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+#ifdef CFG_PCIE2_MEM_BASE2
+ /* outbound memory */
+ pci_set_region(hose->regions + 3,
+ CFG_PCIE2_MEM_BASE2,
+ CFG_PCIE2_MEM_PHYS2,
+ CFG_PCIE2_MEM_SIZE2,
+ PCI_REGION_MEM);
+ hose->region_count++;
+#endif
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+ first_free_busno=hose->last_busno+1;
+ printf (" PCIE2 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+
+ } else {
+ printf (" PCIE2: disabled\n");
+ }
+
+ }
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCIE2; /* disable */
+#endif
+
+
+#ifdef CONFIG_PCI1
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI1_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pci1_hose;
+
+ uint pci_agent = (host_agent == 6);
+ uint pci_speed = 66666000; /*get_clock_freq (); PCI PSPEED in [4:5] */
+ uint pci_32 = 1;
+ uint pci_arb = gur->pordevsr & MPC85xx_PORDEVSR_PCI1_ARB; /* PORDEVSR[14] */
+ uint pci_clk_sel = gur->porpllsr & MPC85xx_PORDEVSR_PCI1_SPD; /* PORPLLSR[16] */
+
+
+ if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
+ printf ("\n PCI: %d bit, %s MHz, %s, %s, %s (base address %x)\n",
+ (pci_32) ? 32 : 64,
+ (pci_speed == 33333000) ? "33" :
+ (pci_speed == 66666000) ? "66" : "unknown",
+ pci_clk_sel ? "sync" : "async",
+ pci_agent ? "agent" : "host",
+ pci_arb ? "arbiter" : "external-arbiter",
+ (uint)pci
+ );
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS,
+ CFG_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+ hose->region_count = 3;
+#ifdef CFG_PCIE3_MEM_BASE2
+ /* outbound memory */
+ pci_set_region(hose->regions + 3,
+ CFG_PCIE3_MEM_BASE2,
+ CFG_PCIE3_MEM_PHYS2,
+ CFG_PCIE3_MEM_SIZE2,
+ PCI_REGION_MEM);
+ hose->region_count++;
+#endif
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+ first_free_busno=hose->last_busno+1;
+ printf ("PCI on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+ } else {
+ printf (" PCI: disabled\n");
+ }
+}
+#else
+ gur->devdisr |= MPC85xx_DEVDISR_PCI1; /* disable */
+#endif
+}
+
+
int last_stage_init(void)
{
return 0;
@@ -197,5 +522,37 @@
*p++ = cpu_to_be32(bd->bi_memstart);
*p = cpu_to_be32(bd->bi_memsize);
}
+#ifdef CONFIG_PCI1
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pci1_hose.last_busno - pci1_hose.first_busno;
+ debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+#ifdef CONFIG_PCIE1
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@a000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pcie1_hose.last_busno - pcie1_hose.first_busno;
+ debug("PCI@a000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+#ifdef CONFIG_PCIE2
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pcie2_hose.last_busno - pcie2_hose.first_busno;
+ debug("PCI@9000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+#ifdef CONFIG_PCIE3
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@b000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pcie3_hose.last_busno - pcie3_hose.first_busno;;
+ debug("PCI@b000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
}
#endif
diff --git a/board/freescale/mpc8641hpcn/Makefile b/board/freescale/mpc8641hpcn/Makefile
new file mode 100644
index 0000000..201da3e
--- /dev/null
+++ b/board/freescale/mpc8641hpcn/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+
+SOBJS := init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(OBJS) $(SOBJS)
+
+.PHONY: distclean
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude ($obj).depend
+
+#########################################################################
diff --git a/board/freescale/mpc8641hpcn/config.mk b/board/freescale/mpc8641hpcn/config.mk
new file mode 100644
index 0000000..f778dcb
--- /dev/null
+++ b/board/freescale/mpc8641hpcn/config.mk
@@ -0,0 +1,31 @@
+# Copyright 2004 Freescale Semiconductor.
+# Modified by Jeff Brown
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# mpc8641hpcn board
+# default CCSRBAR is at 0xff700000
+# assume U-Boot is less than 0.5MB
+#
+TEXT_BASE = 0xfff00000
+
+PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
+PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1 -maltivec -mabi=altivec -msoft-float
diff --git a/board/mpc8641hpcn/init.S b/board/freescale/mpc8641hpcn/init.S
similarity index 100%
rename from board/mpc8641hpcn/init.S
rename to board/freescale/mpc8641hpcn/init.S
diff --git a/board/freescale/mpc8641hpcn/mpc8641hpcn.c b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
new file mode 100644
index 0000000..931be9f
--- /dev/null
+++ b/board/freescale/mpc8641hpcn/mpc8641hpcn.c
@@ -0,0 +1,423 @@
+/*
+ * Copyright 2006, 2007 Freescale Semiconductor.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <asm/processor.h>
+#include <asm/immap_86xx.h>
+#include <asm/immap_fsl_pci.h>
+#include <spd.h>
+#include <asm/io.h>
+
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+extern void ft_cpu_setup(void *blob, bd_t *bd);
+#endif
+
+#include "../common/pixis.h"
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
+extern void ddr_enable_ecc(unsigned int dram_size);
+#endif
+
+#if defined(CONFIG_SPD_EEPROM)
+#include "spd_sdram.h"
+#endif
+
+void sdram_init(void);
+long int fixed_sdram(void);
+
+
+int board_early_init_f(void)
+{
+ return 0;
+}
+
+int checkboard(void)
+{
+ puts("Board: MPC8641HPCN\n");
+
+ return 0;
+}
+
+
+long int
+initdram(int board_type)
+{
+ long dram_size = 0;
+
+#if defined(CONFIG_SPD_EEPROM)
+ dram_size = spd_sdram();
+#else
+ dram_size = fixed_sdram();
+#endif
+
+#if defined(CFG_RAMBOOT)
+ puts(" DDR: ");
+ return dram_size;
+#endif
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
+ /*
+ * Initialize and enable DDR ECC.
+ */
+ ddr_enable_ecc(dram_size);
+#endif
+
+ puts(" DDR: ");
+ return dram_size;
+}
+
+
+#if defined(CFG_DRAM_TEST)
+int
+testdram(void)
+{
+ uint *pstart = (uint *) CFG_MEMTEST_START;
+ uint *pend = (uint *) CFG_MEMTEST_END;
+ uint *p;
+
+ puts("SDRAM test phase 1:\n");
+ for (p = pstart; p < pend; p++)
+ *p = 0xaaaaaaaa;
+
+ for (p = pstart; p < pend; p++) {
+ if (*p != 0xaaaaaaaa) {
+ printf("SDRAM test fails at: %08x\n", (uint) p);
+ return 1;
+ }
+ }
+
+ puts("SDRAM test phase 2:\n");
+ for (p = pstart; p < pend; p++)
+ *p = 0x55555555;
+
+ for (p = pstart; p < pend; p++) {
+ if (*p != 0x55555555) {
+ printf("SDRAM test fails at: %08x\n", (uint) p);
+ return 1;
+ }
+ }
+
+ puts("SDRAM test passed.\n");
+ return 0;
+}
+#endif
+
+
+#if !defined(CONFIG_SPD_EEPROM)
+/*
+ * Fixed sdram init -- doesn't use serial presence detect.
+ */
+long int
+fixed_sdram(void)
+{
+#if !defined(CFG_RAMBOOT)
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ccsr_ddr_t *ddr = &immap->im_ddr1;
+
+ ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
+ ddr->cs0_config = CFG_DDR_CS0_CONFIG;
+ ddr->ext_refrec = CFG_DDR_EXT_REFRESH;
+ ddr->timing_cfg_0 = CFG_DDR_TIMING_0;
+ ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
+ ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
+ ddr->sdram_mode_1 = CFG_DDR_MODE_1;
+ ddr->sdram_mode_2 = CFG_DDR_MODE_2;
+ ddr->sdram_interval = CFG_DDR_INTERVAL;
+ ddr->sdram_data_init = CFG_DDR_DATA_INIT;
+ ddr->sdram_clk_cntl = CFG_DDR_CLK_CTRL;
+ ddr->sdram_ocd_cntl = CFG_DDR_OCD_CTRL;
+ ddr->sdram_ocd_status = CFG_DDR_OCD_STATUS;
+
+#if defined (CONFIG_DDR_ECC)
+ ddr->err_disable = 0x0000008D;
+ ddr->err_sbe = 0x00ff0000;
+#endif
+ asm("sync;isync");
+
+ udelay(500);
+
+#if defined (CONFIG_DDR_ECC)
+ /* Enable ECC checking */
+ ddr->sdram_cfg_1 = (CFG_DDR_CONTROL | 0x20000000);
+#else
+ ddr->sdram_cfg_1 = CFG_DDR_CONTROL;
+ ddr->sdram_cfg_2 = CFG_DDR_CONTROL2;
+#endif
+ asm("sync; isync");
+
+ udelay(500);
+#endif
+ return CFG_SDRAM_SIZE * 1024 * 1024;
+}
+#endif /* !defined(CONFIG_SPD_EEPROM) */
+
+
+#if defined(CONFIG_PCI)
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_fsl86xxads_config_table[] = {
+ {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_IDSEL_NUMBER, PCI_ANY_ID,
+ pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
+ {}
+};
+#endif
+
+
+static struct pci_controller pci1_hose = {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc86xxcts_config_table
+#endif
+};
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_PCI2
+static struct pci_controller pci2_hose;
+#endif /* CONFIG_PCI2 */
+
+int first_free_busno = 0;
+
+
+void pci_init_board(void)
+{
+ volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ uint devdisr = gur->devdisr;
+ uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
+
+#ifdef CONFIG_PCI1
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI1_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pci1_hose;
+#ifdef DEBUG
+ uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17;
+ uint pex1_agent = (host1_agent == 0) || (host1_agent == 1);
+#endif
+ if ((io_sel == 2 || io_sel == 3 || io_sel == 5
+ || io_sel == 6 || io_sel == 7 || io_sel == 0xF)
+ && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
+ debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host");
+ debug("0x%08x=0x%08x ", &pci->pme_msg_det, pci->pme_msg_det);
+ if (pci->pme_msg_det) {
+ pci->pme_msg_det = 0xffffffff;
+ debug(" with errors. Clearing. Now 0x%08x",
+ pci->pme_msg_det);
+ }
+ debug("\n");
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS,
+ CFG_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+
+ first_free_busno=hose->last_busno+1;
+ printf (" PCI-EXPRESS 1 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+
+ /*
+ * Activate ULI1575 legacy chip by performing a fake
+ * memory access. Needed to make ULI RTC work.
+ */
+ in_be32((unsigned *) ((char *)(CFG_PCI1_MEM_BASE
+ + CFG_PCI1_MEM_SIZE - 0x1000000)));
+
+ } else {
+ puts("PCI-EXPRESS 1: Disabled\n");
+ }
+}
+#else
+ puts("PCI-EXPRESS1: Disabled\n");
+#endif /* CONFIG_PCI1 */
+
+#ifdef CONFIG_PCI2
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI2_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pci2_hose;
+
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI2_MEM_BASE,
+ CFG_PCI2_MEM_PHYS,
+ CFG_PCI2_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI2_IO_BASE,
+ CFG_PCI2_IO_PHYS,
+ CFG_PCI2_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+
+ first_free_busno=hose->last_busno+1;
+ printf (" PCI-EXPRESS 2 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+}
+#else
+ puts("PCI-EXPRESS 2: Disabled\n");
+#endif /* CONFIG_PCI2 */
+
+}
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void
+ft_board_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ ft_cpu_setup(blob, bd);
+
+ p = ft_get_prop(blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32(bd->bi_memstart);
+ *p = cpu_to_be32(bd->bi_memsize);
+ }
+#ifdef CONFIG_PCI1
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@8000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pci1_hose.last_busno - pci1_hose.first_busno;
+ debug("PCI@8000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+#ifdef CONFIG_PCI2
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pcie@9000/bus-range", &len);
+ if (p != NULL) {
+ p[0] = 0;
+ p[1] = pci2_hose.last_busno - pci2_hose.first_busno;
+ debug("PCI@9000 first_busno=%d last_busno=%d\n",p[0],p[1]);
+ }
+#endif
+}
+#endif
+
+
+/*
+ * get_board_sys_clk
+ * Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
+ */
+
+unsigned long
+get_board_sys_clk(ulong dummy)
+{
+ u8 i, go_bit, rd_clks;
+ ulong val = 0;
+
+ go_bit = in8(PIXIS_BASE + PIXIS_VCTL);
+ go_bit &= 0x01;
+
+ rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0);
+ rd_clks &= 0x1C;
+
+ /*
+ * Only if both go bit and the SCLK bit in VCFGEN0 are set
+ * should we be using the AUX register. Remember, we also set the
+ * GO bit to boot from the alternate bank on the on-board flash
+ */
+
+ if (go_bit) {
+ if (rd_clks == 0x1c)
+ i = in8(PIXIS_BASE + PIXIS_AUX);
+ else
+ i = in8(PIXIS_BASE + PIXIS_SPD);
+ } else {
+ i = in8(PIXIS_BASE + PIXIS_SPD);
+ }
+
+ i &= 0x07;
+
+ switch (i) {
+ case 0:
+ val = 33000000;
+ break;
+ case 1:
+ val = 40000000;
+ break;
+ case 2:
+ val = 50000000;
+ break;
+ case 3:
+ val = 66000000;
+ break;
+ case 4:
+ val = 83000000;
+ break;
+ case 5:
+ val = 100000000;
+ break;
+ case 6:
+ val = 134000000;
+ break;
+ case 7:
+ val = 166000000;
+ break;
+ }
+
+ return val;
+}
diff --git a/board/freescale/mpc8641hpcn/u-boot.lds b/board/freescale/mpc8641hpcn/u-boot.lds
new file mode 100644
index 0000000..fd16362
--- /dev/null
+++ b/board/freescale/mpc8641hpcn/u-boot.lds
@@ -0,0 +1,136 @@
+/*
+ * Copyright 2006, 2007 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+
+SECTIONS
+{
+
+ /* Read-only sections, merged into text segment: */
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc86xx/start.o (.text)
+ board/freescale/mpc8641hpcn/init.o (.bootpg)
+ cpu/mpc86xx/traps.o (.text)
+ cpu/mpc86xx/interrupts.o (.text)
+ cpu/mpc86xx/cpu_init.o (.text)
+ cpu/mpc86xx/cpu.o (.text)
+ cpu/mpc86xx/speed.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/crc32.o (.text)
+ lib_ppc/extable.o (.text)
+ lib_generic/zlib.o (.text)
+ drivers/bios_emulator/atibios.o (.text)
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/funkwerk/vovpn-gw/m88e6060.c b/board/funkwerk/vovpn-gw/m88e6060.c
index 03a03d0..58b5b6e 100644
--- a/board/funkwerk/vovpn-gw/m88e6060.c
+++ b/board/funkwerk/vovpn-gw/m88e6060.c
@@ -31,7 +31,7 @@
#include "m88e6060.h"
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
static int prtTab[M88X_PRT_CNT] = { 8, 9, 10, 11, 12, 13 };
static int phyTab[M88X_PHY_CNT] = { 0, 1, 2, 3, 4 };
diff --git a/board/funkwerk/vovpn-gw/u-boot.lds b/board/funkwerk/vovpn-gw/u-boot.lds
deleted file mode 100644
index bf8048d..0000000
--- a/board/funkwerk/vovpn-gw/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/funkwerk/vovpn-gw/vovpn-gw.c b/board/funkwerk/vovpn-gw/vovpn-gw.c
index 97f81ee..9b5429a 100644
--- a/board/funkwerk/vovpn-gw/vovpn-gw.c
+++ b/board/funkwerk/vovpn-gw/vovpn-gw.c
@@ -184,7 +184,7 @@
void reset_phy (void)
{
volatile ioport_t *iop;
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
int i;
unsigned short val;
#endif
@@ -193,7 +193,7 @@
/* Reset the PHY */
iop->pdat &= 0xfff7ffff; /* PA12 = |SWITCH_RESET */
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
udelay(20000);
iop->pdat |= 0x00080000;
for (i=0; i<100; i++) {
diff --git a/board/g2000/g2000.c b/board/g2000/g2000.c
index 39b5c701..2dfd87c 100644
--- a/board/g2000/g2000.c
+++ b/board/g2000/g2000.c
@@ -73,7 +73,7 @@
int misc_init_r (void)
{
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
/*
* Set NAND-FLASH GPIO signals to default
*/
@@ -184,7 +184,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c
index eb73221..d448f9f 100644
--- a/board/gen860t/gen860t.c
+++ b/board/gen860t/gen860t.c
@@ -36,7 +36,7 @@
#include <status_led.h>
#endif
-#if defined(CFG_CMD_MII) && defined(CONFIG_MII)
+#if defined(CONFIG_CMD_MII) && defined(CONFIG_MII)
#include <net.h>
#endif
@@ -222,7 +222,7 @@
* Disk On Chip (DOC) Millenium initialization.
* The DOC lives in the CS2* space
*/
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
@@ -250,7 +250,7 @@
config_mpc8xx_ioports (immr);
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
mii_init ();
#endif
diff --git a/board/genietv/genietv.c b/board/genietv/genietv.c
index 5f8c899..c75507f 100644
--- a/board/genietv/genietv.c
+++ b/board/genietv/genietv.c
@@ -267,7 +267,7 @@
return (size);
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#ifdef CFG_PCMCIA_MEM_ADDR
volatile unsigned char *pcmcia_mem = (unsigned char *) CFG_PCMCIA_MEM_ADDR;
@@ -357,4 +357,4 @@
return 0;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
diff --git a/board/gth/pcmcia.c b/board/gth/pcmcia.c
index fce5492..cffcbde 100644
--- a/board/gth/pcmcia.c
+++ b/board/gth/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -83,7 +83,7 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
return 0; /* No hardware to disable */
diff --git a/board/gw8260/u-boot.lds b/board/gw8260/u-boot.lds
deleted file mode 100644
index ab65cb1..0000000
--- a/board/gw8260/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000, 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hermes/hermes.c b/board/hermes/hermes.c
index a523db1..8fd081f 100644
--- a/board/hermes/hermes.c
+++ b/board/hermes/hermes.c
@@ -597,6 +597,7 @@
{
volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ if (status < -32) status = -1; /* let things compatible */
status ^= 0x0F;
status = (status & 0x0F) << 14;
immr->im_cpm.cp_pbdat = (immr->im_cpm.cp_pbdat & ~PB_LED_ALL) | status;
diff --git a/board/hidden_dragon/u-boot.lds b/board/hidden_dragon/u-boot.lds
deleted file mode 100644
index 2a5cd2e..0000000
--- a/board/hidden_dragon/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hmi1001/config.mk b/board/hmi1001/config.mk
index 51e8e84c..4fe1831 100644
--- a/board/hmi1001/config.mk
+++ b/board/hmi1001/config.mk
@@ -39,3 +39,4 @@
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds
diff --git a/board/hmi1001/u-boot.lds b/board/hmi1001/u-boot.lds
deleted file mode 100644
index 123a14c..0000000
--- a/board/hmi1001/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xxx/start.o (.text)
- cpu/mpc5xxx/traps.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c
index 6868f26..12f1402 100644
--- a/board/hymod/bsp.c
+++ b/board/hymod/bsp.c
@@ -34,7 +34,7 @@
* Board Special Commands: FPGA load/store, EEPROM erase
*/
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#define LOAD_SUCCESS 0
#define LOAD_FAIL_NOCONF 1
@@ -402,6 +402,4 @@
return 0;
}
-#endif /* CFG_CMD_BSP */
-
-/* ------------------------------------------------------------------------- */
+#endif
diff --git a/board/hymod/config.mk b/board/hymod/config.mk
index 0a9985f..2df321f 100644
--- a/board/hymod/config.mk
+++ b/board/hymod/config.mk
@@ -30,3 +30,5 @@
PLATFORM_CPPFLAGS += -I$(TOPDIR)
OBJCFLAGS = --remove-section=.ppcenv
+
+LDSCRIPT := $(SRCTREE)/board/hymod/u-boot.lds
diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds
index 337a395..9bf0f09 100644
--- a/board/hymod/u-boot.lds
+++ b/board/hymod/u-boot.lds
@@ -69,7 +69,6 @@
common/environment.o(.text)
*(.text)
- *(.fixup)
*(.got1)
}
_etext = .;
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 2960998..07ba245 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -28,10 +28,7 @@
#include <mpc5xxx.h>
#include <pci.h>
#include <asm/processor.h>
-
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
+#include <libfdt.h>
#if defined(CONFIG_LITE5200B)
#include "mt46v32m16.h"
@@ -359,7 +356,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -384,9 +381,9 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void
ft_board_setup(void *blob, bd_t *bd)
{
diff --git a/board/icecube/u-boot.lds b/board/icecube/u-boot.lds
deleted file mode 100644
index f23432e..0000000
--- a/board/icecube/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/icu862/pcmcia.c b/board/icu862/pcmcia.c
index 20f653b..11de183 100644
--- a/board/icu862/pcmcia.c
+++ b/board/icu862/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -155,7 +155,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -183,7 +183,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/idmr/Makefile b/board/idmr/Makefile
index cf07cf4..be704b7 100644
--- a/board/idmr/Makefile
+++ b/board/idmr/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o
+COBJS = $(BOARD).o flash.o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/idmr/idmr.c b/board/idmr/idmr.c
index 58cdba1..081c375 100644
--- a/board/idmr/idmr.c
+++ b/board/idmr/idmr.c
@@ -22,8 +22,7 @@
*/
#include <common.h>
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
+#include <asm/immap.h>
int checkboard (void) {
puts ("Board: iDMR\n");
diff --git a/board/idmr/mii.c b/board/idmr/mii.c
new file mode 100644
index 0000000..f6c63c3
--- /dev/null
+++ b/board/idmr/mii.c
@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ if (setclear) {
+ /* Enable Ethernet pins */
+ mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
+ } else {
+ }
+
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+#define PHY_ID_KS8721BL 0x00221619 /* Micrel KS8721BL/SL */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+#define STR_ID_KS8721BL "KS8721BL"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ strcpy(info->phy_name,
+ STR_ID_KS8721BL);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ printf(STR_ID_KS8721BL);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+int mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/ids8247/ids8247.c b/board/ids8247/ids8247.c
index 7b9a83d..19823a4 100644
--- a/board/ids8247/ids8247.c
+++ b/board/ids8247/ids8247.c
@@ -300,7 +300,7 @@
gd->bd->bi_flashstart = 0xff800000;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
extern ulong
nand_probe (ulong physadr);
@@ -315,4 +315,4 @@
printf ("%4lu MB\n", totlen >>20);
}
-#endif /* CFG_CMD_NAND */
+#endif
diff --git a/board/ids8247/u-boot.lds b/board/ids8247/u-boot.lds
deleted file mode 100644
index 788aed3..0000000
--- a/board/ids8247/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Heiko Schocher, DENX Software Engineering, <hs@denx.de>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/inka4x0/config.mk b/board/inka4x0/config.mk
index cb19a7d..fc70efe 100644
--- a/board/inka4x0/config.mk
+++ b/board/inka4x0/config.mk
@@ -39,3 +39,4 @@
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds
diff --git a/board/inka4x0/inka4x0.c b/board/inka4x0/inka4x0.c
index d670cc3..478a331 100644
--- a/board/inka4x0/inka4x0.c
+++ b/board/inka4x0/inka4x0.c
@@ -236,7 +236,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -261,4 +261,4 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
diff --git a/board/inka4x0/u-boot.lds b/board/inka4x0/u-boot.lds
deleted file mode 100644
index 123a14c..0000000
--- a/board/inka4x0/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xxx/start.o (.text)
- cpu/mpc5xxx/traps.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/iphase4539/u-boot.lds b/board/iphase4539/u-boot.lds
deleted file mode 100644
index 4ea01ea..0000000
--- a/board/iphase4539/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ispan/u-boot.lds b/board/ispan/u-boot.lds
deleted file mode 100644
index bf8048d..0000000
--- a/board/ispan/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/ixdp425/ixdp425.c b/board/ixdp425/ixdp425.c
index eaf7cde..2a33d6d 100644
--- a/board/ixdp425/ixdp425.c
+++ b/board/ixdp425/ixdp425.c
@@ -112,7 +112,7 @@
return (0);
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined(CONFIG_PCI)
+#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
extern struct pci_controller hose;
extern void pci_ixp_init(struct pci_controller * hose);
diff --git a/board/jupiter/jupiter.c b/board/jupiter/jupiter.c
index 04fda4a..efdc333 100644
--- a/board/jupiter/jupiter.c
+++ b/board/jupiter/jupiter.c
@@ -28,11 +28,7 @@
#include <mpc5xxx.h>
#include <pci.h>
#include <asm/processor.h>
-
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-
+#include <libfdt.h>
#define SDRAM_DDR 0
#if 1
@@ -281,7 +277,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -306,9 +302,9 @@
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
void
ft_board_setup(void *blob, bd_t *bd)
{
diff --git a/board/jupiter/u-boot.lds b/board/jupiter/u-boot.lds
deleted file mode 100644
index f23432e..0000000
--- a/board/jupiter/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/kb9202/kb9202.c b/board/kb9202/kb9202.c
index ec51dca..59ed8ff 100644
--- a/board/kb9202/kb9202.c
+++ b/board/kb9202/kb9202.c
@@ -65,7 +65,7 @@
}
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
unsigned int lxt972_IsPhyConnected (AT91PS_EMAC p_mac);
UCHAR lxt972_GetLinkSpeed (AT91PS_EMAC p_mac);
@@ -90,5 +90,5 @@
p_phyops->AutoNegotiate = lxt972_AutoNegotiate;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/kup/common/pcmcia.c b/board/kup/common/pcmcia.c
index 1f61a0e..def38f1 100644
--- a/board/kup/common/pcmcia.c
+++ b/board/kup/common/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -115,7 +115,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -144,7 +144,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c
index 14fd28f..897787b 100644
--- a/board/logodl/logodl.c
+++ b/board/logodl/logodl.c
@@ -107,6 +107,7 @@
void show_boot_progress (int status)
{
+ if (status < -32) status = -1; /* let things compatible */
/*
switch(status) {
case 1: logodl_set_led(0,1); break;
diff --git a/board/lpc2292sodimm/Makefile b/board/lpc2292sodimm/Makefile
index 5a30198..18a95d7 100644
--- a/board/lpc2292sodimm/Makefile
+++ b/board/lpc2292sodimm/Makefile
@@ -1,7 +1,6 @@
#
-# (C) Copyright 2002
-# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
-# Marius Groeger <mgroeger@sysgo.de>
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
@@ -24,35 +23,29 @@
include $(TOPDIR)/config.mk
-LIB = lib$(BOARD).a
+LIB = $(obj)lib$(BOARD).a
-OBJS := lpc2292sodimm.o flash.o mmc.o spi.o mmc_hw.o eth.o
-SOBJS := lowlevel_init.o iap_entry.o
+COBJS := flash.o lpc2292sodimm.o
+SOBJTS := lowlevel_init.o
-$(LIB): $(OBJS) $(SOBJS)
+SRCS := $(SOBJTS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJTS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) crv $@ $(OBJS) $(SOBJS)
-# this MUST be compiled as thumb code!
-iap_entry.o:
- arm-linux-gcc -D__ASSEMBLY__ -g -Os -fno-strict-aliasing \
- -fno-common -ffixed-r8 -msoft-float -D__KERNEL__ \
- -DTEXT_BASE=0x81500000 -I/home/garyj/proj/LPC/u-boot/include \
- -fno-builtin -ffreestanding -nostdinc -isystem \
- /opt/eldk/arm/usr/bin/../lib/gcc/arm-linux/4.0.0/include -pipe \
- -DCONFIG_ARM -D__ARM__ -march=armv4t -mtune=arm7tdmi -mabi=apcs-gnu \
- -c -o iap_entry.o iap_entry.S
-
clean:
rm -f $(SOBJS) $(OBJS)
distclean: clean
- rm -f $(LIB) core *.bak .depend
+ rm -f $(LIB) core *.bak $(obj).depend
#########################################################################
-.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
- $(CC) -M $(CPPFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
--include .depend
+sinclude $(obj).depend
#########################################################################
diff --git a/board/lpc2292sodimm/eth.c b/board/lpc2292sodimm/eth.c
deleted file mode 100644
index 249ab04..0000000
--- a/board/lpc2292sodimm/eth.c
+++ /dev/null
@@ -1,885 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <net.h>
-#include <asm/arch/hardware.h>
-#include "spi.h"
-
-/*
- * Control Registers in Bank 0
- */
-
-#define CTL_REG_ERDPTL 0x00
-#define CTL_REG_ERDPTH 0x01
-#define CTL_REG_EWRPTL 0x02
-#define CTL_REG_EWRPTH 0x03
-#define CTL_REG_ETXSTL 0x04
-#define CTL_REG_ETXSTH 0x05
-#define CTL_REG_ETXNDL 0x06
-#define CTL_REG_ETXNDH 0x07
-#define CTL_REG_ERXSTL 0x08
-#define CTL_REG_ERXSTH 0x09
-#define CTL_REG_ERXNDL 0x0A
-#define CTL_REG_ERXNDA 0x0B
-#define CTL_REG_ERXRDPTL 0x0C
-#define CTL_REG_ERXRDPTH 0x0D
-#define CTL_REG_ERXWRPTL 0x0E
-#define CTL_REG_ERXWRPTH 0x0F
-#define CTL_REG_EDMASTL 0x10
-#define CTL_REG_EDMASTH 0x11
-#define CTL_REG_EDMANDL 0x12
-#define CTL_REG_EDMANDH 0x13
-#define CTL_REG_EDMADSTL 0x14
-#define CTL_REG_EDMADSTH 0x15
-#define CTL_REG_EDMACSL 0x16
-#define CTL_REG_EDMACSH 0x17
-/* these are common in all banks */
-#define CTL_REG_EIE 0x1B
-#define CTL_REG_EIR 0x1C
-#define CTL_REG_ESTAT 0x1D
-#define CTL_REG_ECON2 0x1E
-#define CTL_REG_ECON1 0x1F
-
-/*
- * Control Registers in Bank 1
- */
-
-#define CTL_REG_EHT0 0x00
-#define CTL_REG_EHT1 0x01
-#define CTL_REG_EHT2 0x02
-#define CTL_REG_EHT3 0x03
-#define CTL_REG_EHT4 0x04
-#define CTL_REG_EHT5 0x05
-#define CTL_REG_EHT6 0x06
-#define CTL_REG_EHT7 0x07
-#define CTL_REG_EPMM0 0x08
-#define CTL_REG_EPMM1 0x09
-#define CTL_REG_EPMM2 0x0A
-#define CTL_REG_EPMM3 0x0B
-#define CTL_REG_EPMM4 0x0C
-#define CTL_REG_EPMM5 0x0D
-#define CTL_REG_EPMM6 0x0E
-#define CTL_REG_EPMM7 0x0F
-#define CTL_REG_EPMCSL 0x10
-#define CTL_REG_EPMCSH 0x11
-#define CTL_REG_EPMOL 0x14
-#define CTL_REG_EPMOH 0x15
-#define CTL_REG_EWOLIE 0x16
-#define CTL_REG_EWOLIR 0x17
-#define CTL_REG_ERXFCON 0x18
-#define CTL_REG_EPKTCNT 0x19
-
-/*
- * Control Registers in Bank 2
- */
-
-#define CTL_REG_MACON1 0x00
-#define CTL_REG_MACON2 0x01
-#define CTL_REG_MACON3 0x02
-#define CTL_REG_MACON4 0x03
-#define CTL_REG_MABBIPG 0x04
-#define CTL_REG_MAIPGL 0x06
-#define CTL_REG_MAIPGH 0x07
-#define CTL_REG_MACLCON1 0x08
-#define CTL_REG_MACLCON2 0x09
-#define CTL_REG_MAMXFLL 0x0A
-#define CTL_REG_MAMXFLH 0x0B
-#define CTL_REG_MAPHSUP 0x0D
-#define CTL_REG_MICON 0x11
-#define CTL_REG_MICMD 0x12
-#define CTL_REG_MIREGADR 0x14
-#define CTL_REG_MIWRL 0x16
-#define CTL_REG_MIWRH 0x17
-#define CTL_REG_MIRDL 0x18
-#define CTL_REG_MIRDH 0x19
-
-/*
- * Control Registers in Bank 3
- */
-
-#define CTL_REG_MAADR1 0x00
-#define CTL_REG_MAADR0 0x01
-#define CTL_REG_MAADR3 0x02
-#define CTL_REG_MAADR2 0x03
-#define CTL_REG_MAADR5 0x04
-#define CTL_REG_MAADR4 0x05
-#define CTL_REG_EBSTSD 0x06
-#define CTL_REG_EBSTCON 0x07
-#define CTL_REG_EBSTCSL 0x08
-#define CTL_REG_EBSTCSH 0x09
-#define CTL_REG_MISTAT 0x0A
-#define CTL_REG_EREVID 0x12
-#define CTL_REG_ECOCON 0x15
-#define CTL_REG_EFLOCON 0x17
-#define CTL_REG_EPAUSL 0x18
-#define CTL_REG_EPAUSH 0x19
-
-
-/*
- * PHY Register
- */
-
-#define PHY_REG_PHID1 0x02
-#define PHY_REG_PHID2 0x03
-
-
-/*
- * Receive Filter Register (ERXFCON) bits
- */
-
-#define ENC_RFR_UCEN 0x80
-#define ENC_RFR_ANDOR 0x40
-#define ENC_RFR_CRCEN 0x20
-#define ENC_RFR_PMEN 0x10
-#define ENC_RFR_MPEN 0x08
-#define ENC_RFR_HTEN 0x04
-#define ENC_RFR_MCEN 0x02
-#define ENC_RFR_BCEN 0x01
-
-/*
- * ECON1 Register Bits
- */
-
-#define ENC_ECON1_TXRST 0x80
-#define ENC_ECON1_RXRST 0x40
-#define ENC_ECON1_DMAST 0x20
-#define ENC_ECON1_CSUMEN 0x10
-#define ENC_ECON1_TXRTS 0x08
-#define ENC_ECON1_RXEN 0x04
-#define ENC_ECON1_BSEL1 0x02
-#define ENC_ECON1_BSEL0 0x01
-
-/*
- * ECON2 Register Bits
- */
-#define ENC_ECON2_AUTOINC 0x80
-#define ENC_ECON2_PKTDEC 0x40
-#define ENC_ECON2_PWRSV 0x20
-#define ENC_ECON2_VRPS 0x08
-
-/*
- * EIR Register Bits
- */
-#define ENC_EIR_PKTIF 0x40
-#define ENC_EIR_DMAIF 0x20
-#define ENC_EIR_LINKIF 0x10
-#define ENC_EIR_TXIF 0x08
-#define ENC_EIR_WOLIF 0x04
-#define ENC_EIR_TXERIF 0x02
-#define ENC_EIR_RXERIF 0x01
-
-/*
- * ESTAT Register Bits
- */
-
-#define ENC_ESTAT_INT 0x80
-#define ENC_ESTAT_LATECOL 0x10
-#define ENC_ESTAT_RXBUSY 0x04
-#define ENC_ESTAT_TXABRT 0x02
-#define ENC_ESTAT_CLKRDY 0x01
-
-/*
- * EIE Register Bits
- */
-
-#define ENC_EIE_INTIE 0x80
-#define ENC_EIE_PKTIE 0x40
-#define ENC_EIE_DMAIE 0x20
-#define ENC_EIE_LINKIE 0x10
-#define ENC_EIE_TXIE 0x08
-#define ENC_EIE_WOLIE 0x04
-#define ENC_EIE_TXERIE 0x02
-#define ENC_EIE_RXERIE 0x01
-
-/*
- * MACON1 Register Bits
- */
-#define ENC_MACON1_LOOPBK 0x10
-#define ENC_MACON1_TXPAUS 0x08
-#define ENC_MACON1_RXPAUS 0x04
-#define ENC_MACON1_PASSALL 0x02
-#define ENC_MACON1_MARXEN 0x01
-
-
-/*
- * MACON2 Register Bits
- */
-#define ENC_MACON2_MARST 0x80
-#define ENC_MACON2_RNDRST 0x40
-#define ENC_MACON2_MARXRST 0x08
-#define ENC_MACON2_RFUNRST 0x04
-#define ENC_MACON2_MATXRST 0x02
-#define ENC_MACON2_TFUNRST 0x01
-
-/*
- * MACON3 Register Bits
- */
-#define ENC_MACON3_PADCFG2 0x80
-#define ENC_MACON3_PADCFG1 0x40
-#define ENC_MACON3_PADCFG0 0x20
-#define ENC_MACON3_TXCRCEN 0x10
-#define ENC_MACON3_PHDRLEN 0x08
-#define ENC_MACON3_HFRMEN 0x04
-#define ENC_MACON3_FRMLNEN 0x02
-#define ENC_MACON3_FULDPX 0x01
-
-/*
- * MICMD Register Bits
- */
-#define ENC_MICMD_MIISCAN 0x02
-#define ENC_MICMD_MIIRD 0x01
-
-/*
- * MISTAT Register Bits
- */
-#define ENC_MISTAT_NVALID 0x04
-#define ENC_MISTAT_SCAN 0x02
-#define ENC_MISTAT_BUSY 0x01
-
-/*
- * PHID1 and PHID2 values
- */
-#define ENC_PHID1_VALUE 0x0083
-#define ENC_PHID2_VALUE 0x1400
-#define ENC_PHID2_MASK 0xFC00
-
-
-#define ENC_SPI_SLAVE_CS 0x00010000 /* pin P1.16 */
-#define ENC_RESET 0x00020000 /* pin P1.17 */
-
-#define FAILSAFE_VALUE 5000
-
-/*
- * Controller memory layout:
- *
- * 0x0000 - 0x17ff 6k bytes receive buffer
- * 0x1800 - 0x1fff 2k bytes transmit buffer
- */
-/* Use the lower memory for receiver buffer. See errata pt. 5 */
-#define ENC_RX_BUF_START 0x0000
-#define ENC_TX_BUF_START 0x1800
-
-/* maximum frame length */
-#define ENC_MAX_FRM_LEN 1518
-
-#define enc_enable() PUT32(IO1CLR, ENC_SPI_SLAVE_CS)
-#define enc_disable() PUT32(IO1SET, ENC_SPI_SLAVE_CS)
-#define enc_cfg_spi() spi_set_cfg(0, 0, 0); spi_set_clock(8);
-
-
-static unsigned char encReadReg (unsigned char regNo);
-static void encWriteReg (unsigned char regNo, unsigned char data);
-static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c);
-static void encReadBuff (unsigned short length, unsigned char *pBuff);
-static void encWriteBuff (unsigned short length, unsigned char *pBuff);
-static void encBitSet (unsigned char regNo, unsigned char data);
-static void encBitClr (unsigned char regNo, unsigned char data);
-static void encReset (void);
-static void encInit (unsigned char *pEthAddr);
-static unsigned short phyRead (unsigned char addr);
-static void encPoll (void);
-static void encRx (void);
-
-#define m_nic_read(reg) encReadReg(reg)
-#define m_nic_write(reg, data) encWriteReg(reg, data)
-#define m_nic_write_retry(reg, data, count) encWriteRegRetry(reg, data, count)
-#define m_nic_read_data(len, buf) encReadBuff((len), (buf))
-#define m_nic_write_data(len, buf) encWriteBuff((len), (buf))
-
-/* bit field set */
-#define m_nic_bfs(reg, data) encBitSet(reg, data)
-
-/* bit field clear */
-#define m_nic_bfc(reg, data) encBitClr(reg, data)
-
-static unsigned char bank = 0; /* current bank in enc28j60 */
-static unsigned char next_pointer_lsb;
-static unsigned char next_pointer_msb;
-
-static unsigned char buffer[ENC_MAX_FRM_LEN];
-static int rxResetCounter = 0;
-
-#define RX_RESET_COUNTER 1000;
-
-/*-----------------------------------------------------------------------------
- * Returns 0 when failes otherwize 1
- */
-int eth_init (bd_t * bis)
-{
- /* configure GPIO */
- (*((volatile unsigned long *) IO1DIR)) |= ENC_SPI_SLAVE_CS;
- (*((volatile unsigned long *) IO1DIR)) |= ENC_RESET;
-
- /* CS and RESET active low */
- PUT32 (IO1SET, ENC_SPI_SLAVE_CS);
- PUT32 (IO1SET, ENC_RESET);
-
- spi_init ();
-
- /* initialize controller */
- encReset ();
- encInit (bis->bi_enetaddr);
-
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */
-
- return 0;
-}
-
-int eth_send (volatile void *packet, int length)
-{
- /* check frame length, etc. */
- /* TODO: */
-
- /* switch to bank 0 */
- m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
-
- /* set EWRPT */
- m_nic_write (CTL_REG_EWRPTL, (ENC_TX_BUF_START & 0xff));
- m_nic_write (CTL_REG_EWRPTH, (ENC_TX_BUF_START >> 8));
-
- /* set ETXST */
- m_nic_write (CTL_REG_ETXSTL, ENC_TX_BUF_START & 0xFF);
- m_nic_write (CTL_REG_ETXSTH, ENC_TX_BUF_START >> 8);
-
- /* write packet */
- m_nic_write_data (length, (unsigned char *) packet);
-
- /* set ETXND */
- m_nic_write (CTL_REG_ETXNDL, (length + ENC_TX_BUF_START) & 0xFF);
- m_nic_write (CTL_REG_ETXNDH, (length + ENC_TX_BUF_START) >> 8);
-
- /* set ECON1.TXRTS */
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_TXRTS);
-
- return 0;
-}
-
-
-/*****************************************************************************
- * This function resets the receiver only. This function may be called from
- * interrupt-context.
- */
-static void encReceiverReset (void)
-{
- unsigned char econ1;
-
- econ1 = m_nic_read (CTL_REG_ECON1);
- if ((econ1 & ENC_ECON1_RXRST) == 0) {
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXRST);
- rxResetCounter = RX_RESET_COUNTER;
- }
-}
-
-/*****************************************************************************
- * receiver reset timer
- */
-static void encReceiverResetCallback (void)
-{
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXRST);
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */
-}
-
-/*-----------------------------------------------------------------------------
- * Check for received packets. Call NetReceive for each packet. The return
- * value is ignored by the caller.
- */
-int eth_rx (void)
-{
- if (rxResetCounter > 0 && --rxResetCounter == 0) {
- encReceiverResetCallback ();
- }
-
- encPoll ();
-
- return 0;
-}
-
-void eth_halt (void)
-{
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXEN); /* disable receive */
-}
-
-/*****************************************************************************/
-
-static void encPoll (void)
-{
- unsigned char eir_reg;
- volatile unsigned char estat_reg;
- unsigned char pkt_cnt;
-
- /* clear global interrupt enable bit in enc28j60 */
- m_nic_bfc (CTL_REG_EIE, ENC_EIE_INTIE);
- estat_reg = m_nic_read (CTL_REG_ESTAT);
-
- eir_reg = m_nic_read (CTL_REG_EIR);
-
- if (eir_reg & ENC_EIR_TXIF) {
- /* clear TXIF bit in EIR */
- m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXIF);
- }
-
- /* We have to use pktcnt and not pktif bit, see errata pt. 6 */
-
- /* move to bank 1 */
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1);
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0);
-
- /* read pktcnt */
- pkt_cnt = m_nic_read (CTL_REG_EPKTCNT);
-
- if (pkt_cnt > 0) {
- if ((eir_reg & ENC_EIR_PKTIF) == 0) {
- /*printf("encPoll: pkt cnt > 0, but pktif not set\n"); */
- }
- encRx ();
- /* clear PKTIF bit in EIR, this should not need to be done but it
- seems like we get problems if we do not */
- m_nic_bfc (CTL_REG_EIR, ENC_EIR_PKTIF);
- }
-
- if (eir_reg & ENC_EIR_RXERIF) {
- printf ("encPoll: rx error\n");
- m_nic_bfc (CTL_REG_EIR, ENC_EIR_RXERIF);
- }
- if (eir_reg & ENC_EIR_TXERIF) {
- printf ("encPoll: tx error\n");
- m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXERIF);
- }
-
- /* set global interrupt enable bit in enc28j60 */
- m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE);
-}
-
-static void encRx (void)
-{
- unsigned short pkt_len;
- unsigned short copy_len;
- unsigned short status;
- unsigned char eir_reg;
- unsigned char pkt_cnt = 0;
-
- /* switch to bank 0 */
- m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
-
- m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb);
- m_nic_write (CTL_REG_ERDPTH, next_pointer_msb);
-
- do {
- m_nic_read_data (6, buffer);
- next_pointer_lsb = buffer[0];
- next_pointer_msb = buffer[1];
- pkt_len = buffer[2];
- pkt_len |= (unsigned short) buffer[3] << 8;
- status = buffer[4];
- status |= (unsigned short) buffer[5] << 8;
-
- if (pkt_len <= ENC_MAX_FRM_LEN) {
- copy_len = pkt_len;
- } else {
- copy_len = 0;
- /* p_priv->stats.rx_dropped++; */
- /* we will drop this packet */
- }
-
- if ((status & (1L << 7)) == 0) { /* check Received Ok bit */
- copy_len = 0;
- /* p_priv->stats.rx_errors++; */
- }
-
- if (copy_len > 0) {
- m_nic_read_data (copy_len, buffer);
- }
-
- /* advance read pointer to next pointer */
- m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb);
- m_nic_write (CTL_REG_ERDPTH, next_pointer_msb);
-
- /* decrease packet counter */
- m_nic_bfs (CTL_REG_ECON2, ENC_ECON2_PKTDEC);
-
- /* move to bank 1 */
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1);
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0);
-
- /* read pktcnt */
- pkt_cnt = m_nic_read (CTL_REG_EPKTCNT);
-
- /* switch to bank 0 */
- m_nic_bfc (CTL_REG_ECON1,
- (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
-
- if (copy_len == 0) {
- eir_reg = m_nic_read (CTL_REG_EIR);
- encReceiverReset ();
- printf ("eth_rx: copy_len=0\n");
- continue;
- }
-
- NetReceive ((unsigned char *) buffer, pkt_len);
-
- eir_reg = m_nic_read (CTL_REG_EIR);
- } while (pkt_cnt); /* Use EPKTCNT not EIR.PKTIF flag, see errata pt. 6 */
- m_nic_write (CTL_REG_ERXRDPTL, next_pointer_lsb);
- m_nic_write (CTL_REG_ERXRDPTH, next_pointer_msb);
-}
-
-static void encWriteReg (unsigned char regNo, unsigned char data)
-{
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0x40 | regNo); /* write in regNo */
- spi_write (data);
-
- enc_disable ();
- enc_enable ();
-
- spi_write (0x1f); /* write reg 0x1f */
-
- enc_disable ();
- spi_unlock ();
-}
-
-static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c)
-{
- unsigned char readback;
- int i;
-
- spi_lock ();
-
- for (i = 0; i < c; i++) {
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0x40 | regNo); /* write in regNo */
- spi_write (data);
-
- enc_disable ();
- enc_enable ();
-
- spi_write (0x1f); /* write reg 0x1f */
-
- enc_disable ();
-
- spi_unlock (); /* we must unlock spi first */
-
- readback = encReadReg (regNo);
-
- spi_lock ();
-
- if (readback == data)
- break;
- }
- spi_unlock ();
-
- if (i == c) {
- printf ("enc28j60: write reg %d failed\n", regNo);
- }
-}
-
-static unsigned char encReadReg (unsigned char regNo)
-{
- unsigned char rxByte;
-
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0x1f); /* read reg 0x1f */
-
- bank = spi_read () & 0x3;
-
- enc_disable ();
- enc_enable ();
-
- spi_write (regNo);
- rxByte = spi_read ();
-
- /* check if MAC or MII register */
- if (((bank == 2) && (regNo <= 0x1a)) ||
- ((bank == 3) && (regNo <= 0x05 || regNo == 0x0a))) {
- /* ignore first byte and read another byte */
- rxByte = spi_read ();
- }
-
- enc_disable ();
- spi_unlock ();
-
- return rxByte;
-}
-
-static void encReadBuff (unsigned short length, unsigned char *pBuff)
-{
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0x20 | 0x1a); /* read buffer memory */
-
- while (length--) {
- if (pBuff != NULL)
- *pBuff++ = spi_read ();
- else
- spi_write (0);
- }
-
- enc_disable ();
- spi_unlock ();
-}
-
-static void encWriteBuff (unsigned short length, unsigned char *pBuff)
-{
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0x60 | 0x1a); /* write buffer memory */
-
- spi_write (0x00); /* control byte */
-
- while (length--)
- spi_write (*pBuff++);
-
- enc_disable ();
- spi_unlock ();
-}
-
-static void encBitSet (unsigned char regNo, unsigned char data)
-{
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0x80 | regNo); /* bit field set */
- spi_write (data);
-
- enc_disable ();
- spi_unlock ();
-}
-
-static void encBitClr (unsigned char regNo, unsigned char data)
-{
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0xA0 | regNo); /* bit field clear */
- spi_write (data);
-
- enc_disable ();
- spi_unlock ();
-}
-
-static void encReset (void)
-{
- spi_lock ();
- enc_cfg_spi ();
- enc_enable ();
-
- spi_write (0xff); /* soft reset */
-
- enc_disable ();
- spi_unlock ();
-
- /* sleep 1 ms. See errata pt. 2 */
- udelay (1000);
-
-#if 0
- (*((volatile unsigned long *) IO1CLR)) &= ENC_RESET;
- mdelay (5);
- (*((volatile unsigned long *) IO1SET)) &= ENC_RESET;
-#endif
-}
-
-static void encInit (unsigned char *pEthAddr)
-{
- unsigned short phid1 = 0;
- unsigned short phid2 = 0;
-
- /* switch to bank 0 */
- m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
-
- /*
- * Setup the buffer space. The reset values are valid for the
- * other pointers.
- */
-#if 0
- /* We shall not write to ERXST, see errata pt. 5. Instead we
- have to make sure that ENC_RX_BUS_START is 0. */
- m_nic_write_retry (CTL_REG_ERXSTL, (ENC_RX_BUF_START & 0xFF), 1);
- m_nic_write_retry (CTL_REG_ERXSTH, (ENC_RX_BUF_START >> 8), 1);
-#endif
- m_nic_write_retry (CTL_REG_ERDPTL, (ENC_RX_BUF_START & 0xFF), 1);
- m_nic_write_retry (CTL_REG_ERDPTH, (ENC_RX_BUF_START >> 8), 1);
-
- next_pointer_lsb = (ENC_RX_BUF_START & 0xFF);
- next_pointer_msb = (ENC_RX_BUF_START >> 8);
-
- /*
- * For tracking purposes, the ERXRDPT registers should be programmed with
- * the same value. This is the read pointer.
- */
- m_nic_write (CTL_REG_ERXRDPTL, (ENC_RX_BUF_START & 0xFF));
- m_nic_write_retry (CTL_REG_ERXRDPTH, (ENC_RX_BUF_START >> 8), 1);
-
- /* Setup receive filters. */
-
- /* move to bank 1 */
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1);
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0);
-
- /* OR-filtering, Unicast, CRC-check and broadcast */
- m_nic_write_retry (CTL_REG_ERXFCON,
- (ENC_RFR_UCEN | ENC_RFR_CRCEN | ENC_RFR_BCEN), 1);
-
- /* Wait for Oscillator Start-up Timer (OST). */
- while ((m_nic_read (CTL_REG_ESTAT) & ENC_ESTAT_CLKRDY) == 0) {
- static int cnt = 0;
-
- if (cnt++ >= 1000) {
- cnt = 0;
- }
- }
-
- /* verify identification */
- phid1 = phyRead (PHY_REG_PHID1);
- phid2 = phyRead (PHY_REG_PHID2);
-
- if (phid1 != ENC_PHID1_VALUE
- || (phid2 & ENC_PHID2_MASK) != ENC_PHID2_VALUE) {
- printf ("ERROR: failed to identify controller\n");
- printf ("phid1 = %x, phid2 = %x\n",
- phid1, (phid2 & ENC_PHID2_MASK));
- printf ("should be phid1 = %x, phid2 = %x\n",
- ENC_PHID1_VALUE, ENC_PHID2_VALUE);
- }
-
- /*
- * --- MAC Initialization ---
- */
-
- /* Pull MAC out of Reset */
-
- /* switch to bank 2 */
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0);
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1);
- /* clear MAC reset bits */
- m_nic_write_retry (CTL_REG_MACON2, 0, 1);
-
- /* enable MAC to receive frames */
- m_nic_write_retry (CTL_REG_MACON1, ENC_MACON1_MARXEN, 10);
-
- /* configure pad, tx-crc and duplex */
- /* TODO maybe enable FRMLNEN */
- m_nic_write_retry (CTL_REG_MACON3,
- (ENC_MACON3_PADCFG0 | ENC_MACON3_TXCRCEN), 10);
-
- /* set maximum frame length */
- m_nic_write_retry (CTL_REG_MAMXFLL, (ENC_MAX_FRM_LEN & 0xff), 10);
- m_nic_write_retry (CTL_REG_MAMXFLH, (ENC_MAX_FRM_LEN >> 8), 10);
-
- /*
- * Set MAC back-to-back inter-packet gap. Recommended 0x12 for half duplex
- * and 0x15 for full duplex.
- */
- m_nic_write_retry (CTL_REG_MABBIPG, 0x12, 10);
-
- /* Set (low byte) Non-Back-to_Back Inter-Packet Gap. Recommended 0x12 */
- m_nic_write_retry (CTL_REG_MAIPGL, 0x12, 10);
-
- /*
- * Set (high byte) Non-Back-to_Back Inter-Packet Gap. Recommended
- * 0x0c for half-duplex. Nothing for full-duplex
- */
- m_nic_write_retry (CTL_REG_MAIPGH, 0x0C, 10);
-
- /* set MAC address */
-
- /* switch to bank 3 */
- m_nic_bfs (CTL_REG_ECON1, (ENC_ECON1_BSEL0 | ENC_ECON1_BSEL1));
-
- m_nic_write_retry (CTL_REG_MAADR0, pEthAddr[5], 1);
- m_nic_write_retry (CTL_REG_MAADR1, pEthAddr[4], 1);
- m_nic_write_retry (CTL_REG_MAADR2, pEthAddr[3], 1);
- m_nic_write_retry (CTL_REG_MAADR3, pEthAddr[2], 1);
- m_nic_write_retry (CTL_REG_MAADR4, pEthAddr[1], 1);
- m_nic_write_retry (CTL_REG_MAADR5, pEthAddr[0], 1);
-
- /*
- * Receive settings
- */
-
- /* auto-increment RX-pointer when reading a received packet */
- m_nic_bfs (CTL_REG_ECON2, ENC_ECON2_AUTOINC);
-
- /* enable interrupts */
- m_nic_bfs (CTL_REG_EIE, ENC_EIE_PKTIE);
- m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXIE);
- m_nic_bfs (CTL_REG_EIE, ENC_EIE_RXERIE);
- m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXERIE);
- m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE);
-}
-
-/*****************************************************************************
- *
- * Description:
- * Read PHY registers.
- *
- * NOTE! This function will change to Bank 2.
- *
- * Params:
- * [in] addr address of the register to read
- *
- * Returns:
- * The value in the register
- */
-static unsigned short phyRead (unsigned char addr)
-{
- unsigned short ret = 0;
-
- /* move to bank 2 */
- m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0);
- m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1);
-
- /* write address to MIREGADR */
- m_nic_write (CTL_REG_MIREGADR, addr);
-
- /* set MICMD.MIIRD */
- m_nic_write (CTL_REG_MICMD, ENC_MICMD_MIIRD);
-
- /* poll MISTAT.BUSY bit until operation is complete */
- while ((m_nic_read (CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) {
- static int cnt = 0;
-
- if (cnt++ >= 1000) {
- /* GJ - this seems extremely dangerous! */
- /* printf("#"); */
- cnt = 0;
- }
- }
-
- /* clear MICMD.MIIRD */
- m_nic_write (CTL_REG_MICMD, 0);
-
- ret = (m_nic_read (CTL_REG_MIRDH) << 8);
- ret |= (m_nic_read (CTL_REG_MIRDL) & 0xFF);
-
- return ret;
-}
diff --git a/board/lpc2292sodimm/flash.c b/board/lpc2292sodimm/flash.c
index 55aaabf..0fb0843 100644
--- a/board/lpc2292sodimm/flash.c
+++ b/board/lpc2292sodimm/flash.c
@@ -1,6 +1,9 @@
/*
* (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
*
+ * Modified to use the routines in cpu/arm720t/lpc2292/flash.c by
+ * Gary Jennejohn <garyj@denx,de>
+ *
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
@@ -20,84 +23,16 @@
#include <common.h>
#include <asm/arch/hardware.h>
-/* IAP commands use 32 bytes at the top of CPU internal sram, we
- use 512 bytes below that */
-#define COPY_BUFFER_LOCATION 0x40003de0
-
-#define IAP_LOCATION 0x7ffffff1
-#define IAP_CMD_PREPARE 50
-#define IAP_CMD_COPY 51
-#define IAP_CMD_ERASE 52
-#define IAP_CMD_CHECK 53
-#define IAP_CMD_ID 54
-#define IAP_CMD_VERSION 55
-#define IAP_CMD_COMPARE 56
-
-#define IAP_RET_CMD_SUCCESS 0
-
#define SST_BASEADDR 0x80000000
#define SST_ADDR1 ((volatile ushort*)(SST_BASEADDR + (0x5555 << 1)))
#define SST_ADDR2 ((volatile ushort*)(SST_BASEADDR + (0x2AAA << 1)))
-static unsigned long command[5];
-static unsigned long result[2];
-
flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-extern void iap_entry(unsigned long * command, unsigned long * result);
-
-/*-----------------------------------------------------------------------
- *
- */
-int get_flash_sector(flash_info_t * info, ulong flash_addr)
-{
- int i;
-
- for(i=1; i < (info->sector_count); i++) {
- if (flash_addr < (info->start[i]))
- break;
- }
-
- return (i-1);
-}
-
-/*-----------------------------------------------------------------------
- * This function assumes that flash_addr is aligned on 512 bytes boundary
- * in flash. This function also assumes that prepare have been called
- * for the sector in question.
- */
-int copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
-{
- int first_sector;
- int last_sector;
-
- first_sector = get_flash_sector(info, flash_addr);
- last_sector = get_flash_sector(info, flash_addr + 512 - 1);
-
- /* prepare sectors for write */
- command[0] = IAP_CMD_PREPARE;
- command[1] = first_sector;
- command[2] = last_sector;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP prepare failed\n");
- return ERR_PROG_ERROR;
- }
-
- command[0] = IAP_CMD_COPY;
- command[1] = flash_addr;
- command[2] = COPY_BUFFER_LOCATION;
- command[3] = 512;
- command[4] = CFG_SYS_CLK_FREQ >> 10;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP copy failed\n");
- return 1;
- }
-
- return 0;
-}
+extern int lpc2292_copy_buffer_to_flash(flash_info_t *, ulong);
+extern int lpc2292_flash_erase(flash_info_t *, int, int);
+extern int lpc2292_write_buff (flash_info_t *, uchar *, ulong, ulong);
/*-----------------------------------------------------------------------
*
@@ -220,56 +155,6 @@
printf ("\n");
}
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase_philips (flash_info_t * info, int s_first, int s_last)
-{
- int flag;
- int prot;
- int sect;
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
-
- flag = disable_interrupts();
-
- printf ("Erasing %d sectors starting at sector %2d.\n"
- "This make take some time ... ",
- s_last - s_first + 1, s_first);
-
- command[0] = IAP_CMD_PREPARE;
- command[1] = s_first;
- command[2] = s_last;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP prepare failed\n");
- return ERR_PROTECTED;
- }
-
- command[0] = IAP_CMD_ERASE;
- command[1] = s_first;
- command[2] = s_last;
- command[3] = CFG_SYS_CLK_FREQ >> 10;
- iap_entry(command, result);
- if (result[0] != IAP_RET_CMD_SUCCESS) {
- printf("IAP erase failed\n");
- return ERR_PROTECTED;
- }
-
- if (flag)
- enable_interrupts();
-
- return ERR_OK;
-}
-
int flash_erase_sst (flash_info_t * info, int s_first, int s_last)
{
int i;
@@ -294,7 +179,7 @@
case (SST_MANUFACT & FLASH_VENDMASK):
return flash_erase_sst(info, s_first, s_last);
case (PHILIPS_LPC2292 & FLASH_VENDMASK):
- return flash_erase_philips(info, s_first, s_last);
+ return lpc2292_flash_erase(info, s_first, s_last);
default:
return ERR_PROTECTED;
}
@@ -353,122 +238,13 @@
return ret;
}
-int write_buff_philips (flash_info_t * info,
- uchar * src,
- ulong addr,
- ulong cnt)
-{
- int first_copy_size;
- int last_copy_size;
- int first_block;
- int last_block;
- int nbr_mid_blocks;
- uchar memmap_value;
- ulong i;
- uchar* src_org;
- uchar* dst_org;
- int ret = ERR_OK;
-
- src_org = src;
- dst_org = (uchar*)addr;
-
- first_block = addr / 512;
- last_block = (addr + cnt) / 512;
- nbr_mid_blocks = last_block - first_block - 1;
-
- first_copy_size = 512 - (addr % 512);
- last_copy_size = (addr + cnt) % 512;
-
-#if 0
- printf("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
- "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
- (ulong)(first_block * 512),
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)src,
- (ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
- first_copy_size,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)(first_block * 512));
-#endif
-
- /* copy first block */
- memcpy((void*)COPY_BUFFER_LOCATION,
- (void*)(first_block * 512), 512);
- memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
- src, first_copy_size);
- copy_buffer_to_flash(info, first_block * 512);
- src += first_copy_size;
- addr += first_copy_size;
-
- /* copy middle blocks */
- for (i = 0; i < nbr_mid_blocks; i++) {
-#if 0
- printf("copy middle block: %lX -> %lX 512 bytes, "
- "%lX -> %lX 512 bytes\n",
- (ulong)src,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)addr);
-#endif
- memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
- copy_buffer_to_flash(info, addr);
- src += 512;
- addr += 512;
- }
-
-
- if (last_copy_size > 0) {
-#if 0
- printf("copy last block: (1) %lX -> %lX 0x200 bytes, "
- "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
- (ulong)(last_block * 512),
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)src,
- (ulong)(COPY_BUFFER_LOCATION),
- last_copy_size,
- (ulong)COPY_BUFFER_LOCATION,
- (ulong)addr);
-#endif
- /* copy last block */
- memcpy((void*)COPY_BUFFER_LOCATION,
- (void*)(last_block * 512), 512);
- memcpy((void*)COPY_BUFFER_LOCATION,
- src, last_copy_size);
- copy_buffer_to_flash(info, addr);
- }
-
- /* verify write */
- memmap_value = GET8(MEMMAP);
-
- disable_interrupts();
-
- PUT8(MEMMAP, 01); /* we must make sure that initial 64
- bytes are taken from flash when we
- do the compare */
-
- for (i = 0; i < cnt; i++) {
- if (*dst_org != *src_org){
- printf("Write failed. Byte %lX differs\n", i);
- ret = ERR_PROG_ERROR;
- break;
- }
- dst_org++;
- src_org++;
- }
-
- PUT8(MEMMAP, memmap_value);
- enable_interrupts();
-
- return ret;
-}
-
int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
{
switch (info->flash_id & FLASH_VENDMASK) {
case (SST_MANUFACT & FLASH_VENDMASK):
return write_buff_sst(info, src, addr, cnt);
case (PHILIPS_LPC2292 & FLASH_VENDMASK):
- return write_buff_philips(info, src, addr, cnt);
+ return lpc2292_write_buff(info, src, addr, cnt);
default:
return ERR_PROG_ERROR;
}
diff --git a/board/lpc2292sodimm/lpc2292sodimm.c b/board/lpc2292sodimm/lpc2292sodimm.c
index d212c63..9c2d1af 100644
--- a/board/lpc2292sodimm/lpc2292sodimm.c
+++ b/board/lpc2292sodimm/lpc2292sodimm.c
@@ -28,8 +28,7 @@
#include <common.h>
#include <clps7111.h>
-/* ------------------------------------------------------------------------- */
-
+DECLARE_GLOBAL_DATA_PTR;
/*
* Miscelaneous platform dependent initialisations
@@ -37,8 +36,6 @@
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Activate LED flasher */
IO_LEDFLSH = 0x40;
@@ -53,8 +50,6 @@
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
diff --git a/board/lpc2292sodimm/mmc.c b/board/lpc2292sodimm/mmc.c
deleted file mode 100644
index 1c0922f..0000000
--- a/board/lpc2292sodimm/mmc.c
+++ /dev/null
@@ -1,154 +0,0 @@
-/*
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <config.h>
-#include <common.h>
-#include <mmc.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include <part.h>
-#include <fat.h>
-#include "mmc_hw.h"
-#include "spi.h"
-
-#ifdef CONFIG_MMC
-
-#undef MMC_DEBUG
-
-static block_dev_desc_t mmc_dev;
-
-/* these are filled out by a call to mmc_hw_get_parameters */
-static int hw_size; /* in kbytes */
-static int hw_nr_sects;
-static int hw_sect_size; /* in bytes */
-
-block_dev_desc_t * mmc_get_dev(int dev)
-{
- return (block_dev_desc_t *)(&mmc_dev);
-}
-
-unsigned long mmc_block_read(int dev,
- unsigned long start,
- lbaint_t blkcnt,
- unsigned long *buffer)
-{
- unsigned long rc = 0;
- unsigned char *p = (unsigned char *)buffer;
- unsigned long i;
- unsigned long addr = start;
-
-#ifdef MMC_DEBUG
- printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
- (unsigned long)blkcnt);
-#endif
-
- for(i = 0; i < (unsigned long)blkcnt; i++) {
-#ifdef MMC_DEBUG
- printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
-#endif
- (void)mmc_read_sector(addr, p);
- rc++;
- addr++;
- p += hw_sect_size;
- }
-
- return rc;
-}
-
-/*-----------------------------------------------------------------------------
- * Read hardware paramterers (sector size, size, number of sectors)
- */
-static int mmc_hw_get_parameters(void)
-{
- unsigned char csddata[16];
- unsigned int sizemult;
- unsigned int size;
-
- mmc_read_csd(csddata);
- hw_sect_size = 1<<(csddata[5] & 0x0f);
- size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
- sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
- hw_nr_sects = (size+1)*(1<<(sizemult+2));
- hw_size = hw_nr_sects*hw_sect_size/1024;
-
-#ifdef MMC_DEBUG
- printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
- "hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
-#endif
-
- return 0;
-}
-
-int mmc_init(int verbose)
-{
- int ret = -ENODEV;
-
- if (verbose)
- printf("mmc_init\n");
-
- spi_init();
- mmc_hw_init();
-
- mmc_hw_get_parameters();
-
- mmc_dev.if_type = IF_TYPE_MMC;
- mmc_dev.part_type = PART_TYPE_DOS;
- mmc_dev.dev = 0;
- mmc_dev.lun = 0;
- mmc_dev.type = 0;
- mmc_dev.blksz = hw_sect_size;
- mmc_dev.lba = hw_nr_sects;
- sprintf((char*)mmc_dev.vendor, "Unknown vendor");
- sprintf((char*)mmc_dev.product, "Unknown product");
- sprintf((char*)mmc_dev.revision, "N/A");
- mmc_dev.removable = 0; /* should be true??? */
- mmc_dev.block_read = mmc_block_read;
-
- fat_register_device(&mmc_dev, 1);
-
- ret = 0;
-
- return ret;
-}
-
-int mmc_write(uchar * src, ulong dst, int size)
-{
-#ifdef MMC_DEBUG
- printf("mmc_write: src=%p, dst=%lu, size=%u\n", src, dst, size);
-#endif
- /* Since mmc2info always returns 0 this function will never be called */
- return 0;
-}
-
-int mmc_read(ulong src, uchar * dst, int size)
-{
-#ifdef MMC_DEBUG
- printf("mmc_read: src=%lu, dst=%p, size=%u\n", src, dst, size);
-#endif
- /* Since mmc2info always returns 0 this function will never be called */
- return 0;
-}
-
-int mmc2info(ulong addr)
-{
- /* This function is used by cmd_cp to determine if source or destination
- address resides on MMC-card or not. We do not support copy to and from
- MMC-card so we always return 0. */
- return 0;
-}
-
-#endif /* CONFIG_MMC */
diff --git a/board/lpc2292sodimm/mmc_hw.c b/board/lpc2292sodimm/mmc_hw.c
deleted file mode 100644
index 31f2a79..0000000
--- a/board/lpc2292sodimm/mmc_hw.c
+++ /dev/null
@@ -1,233 +0,0 @@
-/*
- This code was original written by Ulrich Radig and modified by
- Embedded Artists AB (www.embeddedartists.com).
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <config.h>
-#include <common.h>
-#include <asm/arch/hardware.h>
-#include "spi.h"
-
-#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
-#define MMC_Disable() PUT32(IO1SET, 1l << 22)
-#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
-
-static unsigned char Write_Command_MMC (unsigned char *CMD);
-static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
- unsigned short int Bytes);
-
-/* initialize the hardware */
-int mmc_hw_init(void)
-{
- unsigned long a;
- unsigned short int Timeout = 0;
- unsigned char b;
- unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
-
- /* set-up GPIO and SPI */
- (*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
- (*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
-
- MMC_Disable();
-
- spi_lock();
- spi_set_clock(248);
- spi_set_cfg(0, 1, 0);
- MMC_Enable();
-
- /* waste some time */
- for(a=0; a < 20000; a++)
- asm("nop");
-
- /* Put the MMC/SD-card into SPI-mode */
- for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
- spi_write(0xff);
-
- /* Sends command CMD0 to MMC/SD-card */
- while (Write_Command_MMC(CMD) != 1) {
- if (Timeout++ > 200) {
- MMC_Disable();
- spi_unlock();
- return(1); /* Abort with command 1 (return 1) */
- }
- }
- /* Sends Command CMD1 an MMC/SD-card */
- Timeout = 0;
- CMD[0] = 0x41;/* Command 1 */
- CMD[5] = 0xFF;
-
- while (Write_Command_MMC(CMD) != 0) {
- if (Timeout++ > 200) {
- MMC_Disable();
- spi_unlock();
- return (2); /* Abort with command 2 (return 2) */
- }
- }
-
- MMC_Disable();
- spi_unlock();
-
- return 0;
-}
-
-/* ############################################################################
- Sends a command to the MMC/SD-card
- ######################################################################### */
-static unsigned char Write_Command_MMC (unsigned char *CMD)
-{
- unsigned char a, tmp = 0xff;
- unsigned short int Timeout = 0;
-
- MMC_Disable();
- spi_write(0xFF);
- MMC_Enable();
-
- for (a = 0; a < 0x06; a++)
- spi_write(*CMD++);
-
- while (tmp == 0xff) {
- tmp = spi_read();
- if (Timeout++ > 5000)
- break;
- }
-
- return (tmp);
-}
-
-/* ############################################################################
- Routine to read the CID register from the MMC/SD-card (16 bytes)
- ######################################################################### */
-void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
- int Bytes)
-{
- unsigned short int a;
-
- spi_lock();
- mmc_spi_cfg();
- MMC_Enable();
-
- if (Write_Command_MMC(CMD) != 0) {
- MMC_Disable();
- spi_unlock();
- return;
- }
-
- while (spi_read() != 0xfe) {};
- for (a = 0; a < Bytes; a++)
- *Buffer++ = spi_read();
-
- /* Read the CRC-byte */
- spi_read(); /* CRC - byte is discarded */
- spi_read(); /* CRC - byte is discarded */
- /* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
- MMC_Disable();
- spi_unlock();
-
- return;
-}
-
-/* ############################################################################
- Routine to read a block (512 bytes) from the MMC/SD-card
- ######################################################################### */
-unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
-{
- /* Command 16 to read aBlocks from the MMC/SD - caed */
- unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
-
- /* The addres on the MMC/SD-card is in bytes,
- addr is transformed from blocks to bytes and the result is
- placed into the command */
-
- addr = addr << 9; /* addr = addr * 512 */
-
- CMD[1] = ((addr & 0xFF000000) >> 24);
- CMD[2] = ((addr & 0x00FF0000) >> 16);
- CMD[3] = ((addr & 0x0000FF00) >> 8 );
-
- MMC_Read_Block(CMD, Buffer, 512);
-
- return (0);
-}
-
-/* ############################################################################
- Routine to write a block (512 byte) to the MMC/SD-card
- ######################################################################### */
-unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
-{
- unsigned char tmp, a;
- unsigned short int b;
- /* Command 24 to write a block to the MMC/SD - card */
- unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
-
- /* The addres on the MMC/SD-card is in bytes,
- addr is transformed from blocks to bytes and the result is
- placed into the command */
-
- addr = addr << 9; /* addr = addr * 512 */
-
- CMD[1] = ((addr & 0xFF000000) >> 24);
- CMD[2] = ((addr & 0x00FF0000) >> 16);
- CMD[3] = ((addr & 0x0000FF00) >> 8 );
-
- spi_lock();
- mmc_spi_cfg();
- MMC_Enable();
-
- /* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
- tmp = Write_Command_MMC(CMD);
- if (tmp != 0) {
- MMC_Disable();
- spi_unlock();
- return(tmp);
- }
-
- /* Do a short delay and send a clock-pulse to the MMC/SD-card */
- for (a = 0; a < 100; a++)
- spi_read();
-
- /* Send a start byte to the MMC/SD-card */
- spi_write(0xFE);
-
- /* Write the block (512 bytes) to the MMC/SD-card */
- for (b = 0; b < 512; b++)
- spi_write(*Buffer++);
-
- /* write the CRC-Byte */
- spi_write(0xFF); /* write a dummy CRC */
- spi_write(0xFF); /* CRC code is not used */
-
- /* Wait for MMC/SD-card busy */
- while (spi_read() != 0xff) {};
-
- /* set MMC_Chip_Select to high (MMC/SD-card inactive) */
- MMC_Disable();
- spi_unlock();
- return (0);
-}
-
-/* #########################################################################
- Routine to read the CSD register from the MMC/SD-card (16 bytes)
- ######################################################################### */
-unsigned char mmc_read_csd (unsigned char *Buffer)
-{
- /* Command to read the CSD register */
- unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
-
- MMC_Read_Block(CMD, Buffer, 16);
-
- return (0);
-}
diff --git a/board/lpc2292sodimm/spi.c b/board/lpc2292sodimm/spi.c
deleted file mode 100644
index 4ba1468..0000000
--- a/board/lpc2292sodimm/spi.c
+++ /dev/null
@@ -1,40 +0,0 @@
-/*
- This module implements an interface to the SPI on the lpc22xx.
- Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
-
- This program is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
-
- This program is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
-
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-*/
-
-#include <config.h>
-#include <common.h>
-#include <asm/errno.h>
-#include <asm/arch/hardware.h>
-#include "spi.h"
-
-unsigned long spi_flags;
-unsigned char spi_idle = 0x00;
-
-int spi_init(void)
-{
- unsigned long pinsel0_value;
-
- /* activate spi pins */
- pinsel0_value = GET32(PINSEL0);
- pinsel0_value &= ~(0xFFl << 8);
- pinsel0_value |= (0x55l << 8);
- PUT32(PINSEL0, pinsel0_value);
-
- return 0;
-}
diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c
index 9e8ea2d..c68978a 100644
--- a/board/lwmon/lwmon.c
+++ b/board/lwmon/lwmon.c
@@ -761,7 +761,7 @@
/*---------------Board Special Commands: PIC read/write ---------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
/***********************************************************************
F* Function: int do_pic (cmd_tbl_t *cmdtp, int flag,
F* int argc, char *argv[]) P*A*Z*
@@ -960,7 +960,7 @@
"lsb - print current setting\n"
);
-#endif /* CFG_CMD_BSP */
+#endif
/*----------------------------- Utilities -----------------------------*/
/***********************************************************************
diff --git a/board/lwmon/pcmcia.c b/board/lwmon/pcmcia.c
index 2349286..ebca7a2 100644
--- a/board/lwmon/pcmcia.c
+++ b/board/lwmon/pcmcia.c
@@ -5,11 +5,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -127,7 +127,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -166,7 +166,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/lwmon5/Makefile b/board/lwmon5/Makefile
new file mode 100644
index 0000000..2a93571
--- /dev/null
+++ b/board/lwmon5/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2002-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o kbd.o sdram.o
+SOBJS = init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/lwmon5/config.mk b/board/lwmon5/config.mk
new file mode 100644
index 0000000..bf2b879
--- /dev/null
+++ b/board/lwmon5/config.mk
@@ -0,0 +1,39 @@
+#
+# (C) Copyright 2002
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# lwmon5 (440EPx)
+#
+
+ifndef TEXT_BASE
+TEXT_BASE = 0xFFF80000
+endif
+
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
+endif
diff --git a/board/lwmon5/init.S b/board/lwmon5/init.S
new file mode 100644
index 0000000..6798e80
--- /dev/null
+++ b/board/lwmon5/init.S
@@ -0,0 +1,90 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * Copyright (C) 2002 Scott McNutt <smcnutt@artesyncp.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppc_asm.tmpl>
+#include <config.h>
+#include <asm-ppc/mmu.h>
+
+/**************************************************************************
+ * TLB TABLE
+ *
+ * This table is used by the cpu boot code to setup the initial tlb
+ * entries. Rather than make broad assumptions in the cpu source tree,
+ * this table lets each board set things up however they like.
+ *
+ * Pointer to the table is returned in r1
+ *
+ *************************************************************************/
+ .section .bootpg,"ax"
+ .globl tlbtab
+
+tlbtab:
+ tlbtab_start
+
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
+ tlbentry(CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G)
+
+ /*
+ * TLB entries for SDRAM are not needed on this platform.
+ * They are dynamically generated in the SPD DDR(2) detection
+ * routine.
+ */
+
+#ifdef CFG_INIT_RAM_DCACHE
+ /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+ tlbentry(CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G)
+#endif
+
+ /* TLB-entry for PCI Memory */
+ tlbentry(CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I)
+ tlbentry(CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I)
+
+ /* TLB-entry for the FPGA Chip select 2 */
+ tlbentry(CFG_FPGA_BASE_0, SZ_1M, CFG_FPGA_BASE_0, 1, AC_R|AC_W|AC_X|SA_I|SA_G)
+
+ /* TLB-entry for the FPGA Chip select 3 */
+ tlbentry(CFG_FPGA_BASE_1, SZ_1M, CFG_FPGA_BASE_1, 1,AC_R|AC_W|AC_X|SA_I|SA_G)
+
+ /* TLB-entry for the LIME Controller */
+ tlbentry(CFG_LIME_BASE_0, SZ_16M, CFG_LIME_BASE_0, 1, AC_R|AC_W|AC_X|SA_I|SA_G)
+ tlbentry(CFG_LIME_BASE_1, SZ_16M, CFG_LIME_BASE_1, 1, AC_R|AC_W|AC_X|SA_I|SA_G)
+ tlbentry(CFG_LIME_BASE_2, SZ_16M, CFG_LIME_BASE_2, 1, AC_R|AC_W|AC_X|SA_I|SA_G)
+ tlbentry(CFG_LIME_BASE_3, SZ_16M, CFG_LIME_BASE_3, 1, AC_R|AC_W|AC_X|SA_I|SA_G)
+
+ /* TLB-entry for Internal Registers & OCM */
+ tlbentry(0xe0000000, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I)
+
+ /*TLB-entry PCI registers*/
+ tlbentry(0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
+
+ /* TLB-entry for peripherals */
+ tlbentry(0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
+
+ tlbtab_end
diff --git a/board/lwmon5/kbd.c b/board/lwmon5/kbd.c
new file mode 100644
index 0000000..1e5349a
--- /dev/null
+++ b/board/lwmon5/kbd.c
@@ -0,0 +1,458 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2001, 2002
+ * DENX Software Engineering
+ * Wolfgang Denk, wd@denx.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* define DEBUG for debugging output (obviously ;-)) */
+#if 0
+#define DEBUG
+#endif
+
+#include <common.h>
+#include <i2c.h>
+#include <command.h>
+#include <post.h>
+#include <serial.h>
+#include <malloc.h>
+
+#include <linux/types.h>
+#include <linux/string.h> /* for strdup */
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static void kbd_init (void);
+static int compare_magic (uchar *kbd_data, uchar *str);
+
+/*--------------------- Local macros and constants --------------------*/
+#define _NOT_USED_ 0xFFFFFFFF
+
+/*------------------------- Keyboard controller -----------------------*/
+/* command codes */
+#define KEYBD_CMD_READ_KEYS 0x01
+#define KEYBD_CMD_READ_VERSION 0x02
+#define KEYBD_CMD_READ_STATUS 0x03
+#define KEYBD_CMD_RESET_ERRORS 0x10
+
+/* status codes */
+#define KEYBD_STATUS_MASK 0x3F
+#define KEYBD_STATUS_H_RESET 0x20
+#define KEYBD_STATUS_BROWNOUT 0x10
+#define KEYBD_STATUS_WD_RESET 0x08
+#define KEYBD_STATUS_OVERLOAD 0x04
+#define KEYBD_STATUS_ILLEGAL_WR 0x02
+#define KEYBD_STATUS_ILLEGAL_RD 0x01
+
+/* Number of bytes returned from Keyboard Controller */
+#define KEYBD_VERSIONLEN 2 /* version information */
+
+/*
+ * This is different from the "old" lwmon dsPIC kbd controller
+ * implementation. Now the controller still answers with 9 bytes,
+ * but the last 3 bytes are always "0x06 0x07 0x08". So we just
+ * set the length to compare to 6 instead of 9.
+ */
+#define KEYBD_DATALEN 6 /* normal key scan data */
+
+/* maximum number of "magic" key codes that can be assigned */
+
+static uchar kbd_addr = CFG_I2C_KEYBD_ADDR;
+
+static uchar *key_match (uchar *);
+
+#define KEYBD_SET_DEBUGMODE '#' /* Magic key to enable debug output */
+
+/***********************************************************************
+F* Function: int board_postclk_init (void) P*A*Z*
+ *
+P* Parameters: none
+P*
+P* Returnvalue: int
+P* - 0 is always returned.
+ *
+Z* Intention: This function is the board_postclk_init() method implementation
+Z* for the lwmon board.
+ *
+ ***********************************************************************/
+int board_postclk_init (void)
+{
+ kbd_init();
+
+ return (0);
+}
+
+static void kbd_init (void)
+{
+ uchar kbd_data[KEYBD_DATALEN];
+ uchar tmp_data[KEYBD_DATALEN];
+ uchar val, errcd;
+ int i;
+
+ i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+
+ gd->kbd_status = 0;
+
+ /* Forced by PIC. Delays <= 175us loose */
+ udelay(1000);
+
+ /* Read initial keyboard error code */
+ val = KEYBD_CMD_READ_STATUS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, &errcd, 1);
+ /* clear unused bits */
+ errcd &= KEYBD_STATUS_MASK;
+ /* clear "irrelevant" bits. Recommended by Martin Rajek, LWN */
+ errcd &= ~(KEYBD_STATUS_H_RESET|KEYBD_STATUS_BROWNOUT);
+ if (errcd) {
+ gd->kbd_status |= errcd << 8;
+ }
+ /* Reset error code and verify */
+ val = KEYBD_CMD_RESET_ERRORS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ udelay(1000); /* delay NEEDED by keyboard PIC !!! */
+
+ val = KEYBD_CMD_READ_STATUS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, &val, 1);
+
+ val &= KEYBD_STATUS_MASK; /* clear unused bits */
+ if (val) { /* permanent error, report it */
+ gd->kbd_status |= val;
+ return;
+ }
+
+ /*
+ * Read current keyboard state.
+ *
+ * After the error reset it may take some time before the
+ * keyboard PIC picks up a valid keyboard scan - the total
+ * scan time is approx. 1.6 ms (information by Martin Rajek,
+ * 28 Sep 2002). We read a couple of times for the keyboard
+ * to stabilize, using a big enough delay.
+ * 10 times should be enough. If the data is still changing,
+ * we use what we get :-(
+ */
+
+ memset (tmp_data, 0xFF, KEYBD_DATALEN); /* impossible value */
+ for (i=0; i<10; ++i) {
+ val = KEYBD_CMD_READ_KEYS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+
+ if (memcmp(kbd_data, tmp_data, KEYBD_DATALEN) == 0) {
+ /* consistent state, done */
+ break;
+ }
+ /* remeber last state, delay, and retry */
+ memcpy (tmp_data, kbd_data, KEYBD_DATALEN);
+ udelay (5000);
+ }
+}
+
+/***********************************************************************
+F* Function: int misc_init_r (void) P*A*Z*
+ *
+P* Parameters: none
+P*
+P* Returnvalue: int
+P* - 0 is always returned, even in the case of a keyboard
+P* error.
+ *
+Z* Intention: This function is the misc_init_r() method implementation
+Z* for the lwmon board.
+Z* The keyboard controller is initialized and the result
+Z* of a read copied to the environment variable "keybd".
+Z* If KEYBD_SET_DEBUGMODE is defined, a check is made for
+Z* this key, and if found display to the LCD will be enabled.
+Z* The keys in "keybd" are checked against the magic
+Z* keycommands defined in the environment.
+Z* See also key_match().
+ *
+D* Design: wd@denx.de
+C* Coding: wd@denx.de
+V* Verification: dzu@denx.de
+ ***********************************************************************/
+int misc_init_r_kbd (void)
+{
+ uchar kbd_data[KEYBD_DATALEN];
+ char keybd_env[2 * KEYBD_DATALEN + 1];
+ uchar kbd_init_status = gd->kbd_status >> 8;
+ uchar kbd_status = gd->kbd_status;
+ uchar val;
+ char *str;
+ int i;
+
+ if (kbd_init_status) {
+ printf ("KEYBD: Error %02X\n", kbd_init_status);
+ }
+ if (kbd_status) { /* permanent error, report it */
+ printf ("*** Keyboard error code %02X ***\n", kbd_status);
+ sprintf (keybd_env, "%02X", kbd_status);
+ setenv ("keybd", keybd_env);
+ return 0;
+ }
+
+ /*
+ * Now we know that we have a working keyboard, so disable
+ * all output to the LCD except when a key press is detected.
+ */
+
+ if ((console_assign (stdout, "serial") < 0) ||
+ (console_assign (stderr, "serial") < 0)) {
+ printf ("Can't assign serial port as output device\n");
+ }
+
+ /* Read Version */
+ val = KEYBD_CMD_READ_VERSION;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_VERSIONLEN);
+ printf ("KEYBD: Version %d.%d\n", kbd_data[0], kbd_data[1]);
+
+ /* Read current keyboard state */
+ val = KEYBD_CMD_READ_KEYS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+
+ for (i = 0; i < KEYBD_DATALEN; ++i) {
+ sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
+ }
+ setenv ("keybd", keybd_env);
+
+ str = strdup ((char *)key_match (kbd_data)); /* decode keys */
+#ifdef KEYBD_SET_DEBUGMODE
+ if (kbd_data[0] == KEYBD_SET_DEBUGMODE) { /* set debug mode */
+ if ((console_assign (stdout, "lcd") < 0) ||
+ (console_assign (stderr, "lcd") < 0)) {
+ printf ("Can't assign LCD display as output device\n");
+ }
+ }
+#endif /* KEYBD_SET_DEBUGMODE */
+#ifdef CONFIG_PREBOOT /* automatically configure "preboot" command on key match */
+ setenv ("preboot", str); /* set or delete definition */
+#endif /* CONFIG_PREBOOT */
+ if (str != NULL) {
+ free (str);
+ }
+ return (0);
+}
+
+#ifdef CONFIG_PREBOOT
+
+static uchar kbd_magic_prefix[] = "key_magic";
+static uchar kbd_command_prefix[] = "key_cmd";
+
+static int compare_magic (uchar *kbd_data, uchar *str)
+{
+ uchar compare[KEYBD_DATALEN-1];
+ char *nxt;
+ int i;
+
+ /* Don't include modifier byte */
+ memcpy (compare, kbd_data+1, KEYBD_DATALEN-1);
+
+ for (; str != NULL; str = (*nxt) ? (uchar *)(nxt+1) : (uchar *)nxt) {
+ uchar c;
+ int k;
+
+ c = (uchar) simple_strtoul ((char *)str, (char **) (&nxt), 16);
+
+ if (str == (uchar *)nxt) { /* invalid character */
+ break;
+ }
+
+ /*
+ * Check if this key matches the input.
+ * Set matches to zero, so they match only once
+ * and we can find duplicates or extra keys
+ */
+ for (k = 0; k < sizeof(compare); ++k) {
+ if (compare[k] == '\0') /* only non-zero entries */
+ continue;
+ if (c == compare[k]) { /* found matching key */
+ compare[k] = '\0';
+ break;
+ }
+ }
+ if (k == sizeof(compare)) {
+ return -1; /* unmatched key */
+ }
+ }
+
+ /*
+ * A full match leaves no keys in the `compare' array,
+ */
+ for (i = 0; i < sizeof(compare); ++i) {
+ if (compare[i])
+ {
+ return -1;
+ }
+ }
+
+ return 0;
+}
+
+/***********************************************************************
+F* Function: static uchar *key_match (uchar *kbd_data) P*A*Z*
+ *
+P* Parameters: uchar *kbd_data
+P* - The keys to match against our magic definitions
+P*
+P* Returnvalue: uchar *
+P* - != NULL: Pointer to the corresponding command(s)
+P* NULL: No magic is about to happen
+ *
+Z* Intention: Check if pressed key(s) match magic sequence,
+Z* and return the command string associated with that key(s).
+Z*
+Z* If no key press was decoded, NULL is returned.
+Z*
+Z* Note: the first character of the argument will be
+Z* overwritten with the "magic charcter code" of the
+Z* decoded key(s), or '\0'.
+Z*
+Z* Note: the string points to static environment data
+Z* and must be saved before you call any function that
+Z* modifies the environment.
+ *
+D* Design: wd@denx.de
+C* Coding: wd@denx.de
+V* Verification: dzu@denx.de
+ ***********************************************************************/
+static uchar *key_match (uchar *kbd_data)
+{
+ char magic[sizeof (kbd_magic_prefix) + 1];
+ uchar *suffix;
+ char *kbd_magic_keys;
+
+ /*
+ * The following string defines the characters that can pe appended
+ * to "key_magic" to form the names of environment variables that
+ * hold "magic" key codes, i. e. such key codes that can cause
+ * pre-boot actions. If the string is empty (""), then only
+ * "key_magic" is checked (old behaviour); the string "125" causes
+ * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
+ */
+ if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
+ kbd_magic_keys = "";
+
+ /* loop over all magic keys;
+ * use '\0' suffix in case of empty string
+ */
+ for (suffix=(uchar *)kbd_magic_keys; *suffix || suffix==(uchar *)kbd_magic_keys; ++suffix) {
+ sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
+ debug ("### Check magic \"%s\"\n", magic);
+ if (compare_magic(kbd_data, (uchar *)getenv(magic)) == 0) {
+ char cmd_name[sizeof (kbd_command_prefix) + 1];
+ char *cmd;
+
+ sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
+
+ cmd = getenv (cmd_name);
+ debug ("### Set PREBOOT to $(%s): \"%s\"\n",
+ cmd_name, cmd ? cmd : "<<NULL>>");
+ *kbd_data = *suffix;
+ return ((uchar *)cmd);
+ }
+ }
+ debug ("### Delete PREBOOT\n");
+ *kbd_data = '\0';
+ return (NULL);
+}
+#endif /* CONFIG_PREBOOT */
+
+/***********************************************************************
+F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag,
+F* int argc, char *argv[]) P*A*Z*
+ *
+P* Parameters: cmd_tbl_t *cmdtp
+P* - Pointer to our command table entry
+P* int flag
+P* - If the CMD_FLAG_REPEAT bit is set, then this call is
+P* a repetition
+P* int argc
+P* - Argument count
+P* char *argv[]
+P* - Array of the actual arguments
+P*
+P* Returnvalue: int
+P* - 0 is always returned.
+ *
+Z* Intention: Implement the "kbd" command.
+Z* The keyboard status is read. The result is printed on
+Z* the console and written into the "keybd" environment
+Z* variable.
+ *
+D* Design: wd@denx.de
+C* Coding: wd@denx.de
+V* Verification: dzu@denx.de
+ ***********************************************************************/
+int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ uchar kbd_data[KEYBD_DATALEN];
+ char keybd_env[2 * KEYBD_DATALEN + 1];
+ uchar val;
+ int i;
+
+#if 0 /* Done in kbd_init */
+ i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE);
+#endif
+
+ /* Read keys */
+ val = KEYBD_CMD_READ_KEYS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+
+ puts ("Keys:");
+ for (i = 0; i < KEYBD_DATALEN; ++i) {
+ sprintf (keybd_env + i + i, "%02X", kbd_data[i]);
+ printf (" %02x", kbd_data[i]);
+ }
+ putc ('\n');
+ setenv ("keybd", keybd_env);
+ return 0;
+}
+
+U_BOOT_CMD(
+ kbd, 1, 1, do_kbd,
+ "kbd - read keyboard status\n",
+ NULL
+);
+
+/*----------------------------- Utilities -----------------------------*/
+
+#ifdef CONFIG_POST
+/*
+ * Returns 1 if keys pressed to start the power-on long-running tests
+ * Called from board_init_f().
+ */
+int post_hotkeys_pressed(void)
+{
+ uchar kbd_data[KEYBD_DATALEN];
+ uchar val;
+
+ /* Read keys */
+ val = KEYBD_CMD_READ_KEYS;
+ i2c_write (kbd_addr, 0, 0, &val, 1);
+ i2c_read (kbd_addr, 0, 0, kbd_data, KEYBD_DATALEN);
+
+ return (compare_magic(kbd_data, (uchar *)CONFIG_POST_KEY_MAGIC) == 0);
+}
+#endif
diff --git a/board/lwmon5/lwmon5.c b/board/lwmon5/lwmon5.c
new file mode 100644
index 0000000..77f9989
--- /dev/null
+++ b/board/lwmon5/lwmon5.c
@@ -0,0 +1,556 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <ppc440.h>
+#include <asm/processor.h>
+#include <asm/gpio.h>
+#include <asm/io.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+ulong flash_get_size(ulong base, int banknum);
+int misc_init_r_kbd(void);
+
+int board_early_init_f(void)
+{
+ u32 sdr0_pfc1, sdr0_pfc2;
+ u32 reg;
+
+ /* PLB Write pipelining disabled. Denali Core workaround */
+ mtdcr(plb0_acr, 0xDE000000);
+ mtdcr(plb1_acr, 0xDE000000);
+
+ /*--------------------------------------------------------------------
+ * Setup the interrupt controller polarities, triggers, etc.
+ *-------------------------------------------------------------------*/
+ mtdcr(uic0sr, 0xffffffff); /* clear all. if write with 1 then the status is cleared */
+ mtdcr(uic0er, 0x00000000); /* disable all */
+ mtdcr(uic0cr, 0x00000000); /* we have not critical interrupts at the moment */
+ mtdcr(uic0pr, 0xFFBFF1EF); /* Adjustment of the polarity */
+ mtdcr(uic0tr, 0x00000900); /* per ref-board manual */
+ mtdcr(uic0vr, 0x00000000); /* int31 highest, base=0x000 is within DDRAM */
+ mtdcr(uic0sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic1sr, 0xffffffff); /* clear all */
+ mtdcr(uic1er, 0x00000000); /* disable all */
+ mtdcr(uic1cr, 0x00000000); /* all non-critical */
+ mtdcr(uic1pr, 0xFFFFC6A5); /* Adjustment of the polarity */
+ mtdcr(uic1tr, 0x60000040); /* per ref-board manual */
+ mtdcr(uic1vr, 0x00000000); /* int31 highest, base=0x000 is within DDRAM */
+ mtdcr(uic1sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic2sr, 0xffffffff); /* clear all */
+ mtdcr(uic2er, 0x00000000); /* disable all */
+ mtdcr(uic2cr, 0x00000000); /* all non-critical */
+ mtdcr(uic2pr, 0x27C00000); /* Adjustment of the polarity */
+ mtdcr(uic2tr, 0x3C000000); /* per ref-board manual */
+ mtdcr(uic2vr, 0x00000000); /* int31 highest, base=0x000 is within DDRAM */
+ mtdcr(uic2sr, 0xffffffff); /* clear all */
+
+ /* Trace Pins are disabled. SDR0_PFC0 Register */
+ mtsdr(SDR0_PFC0, 0x0);
+
+ /* select Ethernet pins */
+ mfsdr(SDR0_PFC1, sdr0_pfc1);
+ /* SMII via ZMII */
+ sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SELECT_MASK) |
+ SDR0_PFC1_SELECT_CONFIG_6;
+ mfsdr(SDR0_PFC2, sdr0_pfc2);
+ sdr0_pfc2 = (sdr0_pfc2 & ~SDR0_PFC2_SELECT_MASK) |
+ SDR0_PFC2_SELECT_CONFIG_6;
+
+ /* enable SPI (SCP) */
+ sdr0_pfc1 = (sdr0_pfc1 & ~SDR0_PFC1_SIS_MASK) | SDR0_PFC1_SIS_SCP_SEL;
+
+ mtsdr(SDR0_PFC2, sdr0_pfc2);
+ mtsdr(SDR0_PFC1, sdr0_pfc1);
+
+ mtsdr(SDR0_PFC4, 0x80000000);
+
+ /* PCI arbiter disabled */
+ /* PCI Host Configuration disbaled */
+ mfsdr(sdr_pci0, reg);
+ reg = 0;
+ mtsdr(sdr_pci0, 0x00000000 | reg);
+
+ gpio_write_bit(CFG_GPIO_FLASH_WP, 1);
+
+ return 0;
+}
+
+/*---------------------------------------------------------------------------+
+ | misc_init_r.
+ +---------------------------------------------------------------------------*/
+int misc_init_r(void)
+{
+ u32 pbcr;
+ int size_val = 0;
+ u32 reg;
+ unsigned long usb2d0cr = 0;
+ unsigned long usb2phy0cr, usb2h0cr = 0;
+ unsigned long sdr0_pfc1;
+
+ /*
+ * FLASH stuff...
+ */
+
+ /* Re-do sizing to get full correct info */
+
+ /* adjust flash start and offset */
+ gd->bd->bi_flashstart = 0 - gd->bd->bi_flashsize;
+ gd->bd->bi_flashoffset = 0;
+
+ mfebc(pb0cr, pbcr);
+ switch (gd->bd->bi_flashsize) {
+ case 1 << 20:
+ size_val = 0;
+ break;
+ case 2 << 20:
+ size_val = 1;
+ break;
+ case 4 << 20:
+ size_val = 2;
+ break;
+ case 8 << 20:
+ size_val = 3;
+ break;
+ case 16 << 20:
+ size_val = 4;
+ break;
+ case 32 << 20:
+ size_val = 5;
+ break;
+ case 64 << 20:
+ size_val = 6;
+ break;
+ case 128 << 20:
+ size_val = 7;
+ break;
+ }
+ pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
+ mtebc(pb0cr, pbcr);
+
+ /*
+ * Re-check to get correct base address
+ */
+ flash_get_size(gd->bd->bi_flashstart, 0);
+
+ /* Monitor protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ -CFG_MONITOR_LEN,
+ 0xffffffff,
+ &flash_info[1]);
+
+ /* Env protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+ &flash_info[1]);
+
+ /*
+ * USB suff...
+ */
+ /* SDR Setting */
+ mfsdr(SDR0_PFC1, sdr0_pfc1);
+ mfsdr(SDR0_USB0, usb2d0cr);
+ mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
+ mfsdr(SDR0_USB2H0CR, usb2h0cr);
+
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/
+
+ /* An 8-bit/60MHz interface is the only possible alternative
+ when connecting the Device to the PHY */
+ usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
+ usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/
+
+ mtsdr(SDR0_PFC1, sdr0_pfc1);
+ mtsdr(SDR0_USB0, usb2d0cr);
+ mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
+ mtsdr(SDR0_USB2H0CR, usb2h0cr);
+
+ /*
+ * Clear resets
+ */
+ udelay (1000);
+ mtsdr(SDR0_SRST1, 0x00000000);
+ udelay (1000);
+ mtsdr(SDR0_SRST0, 0x00000000);
+
+ printf("USB: Host(int phy) Device(ext phy)\n");
+
+ /*
+ * Clear PLB4A0_ACR[WRP]
+ * This fix will make the MAL burst disabling patch for the Linux
+ * EMAC driver obsolete.
+ */
+ reg = mfdcr(plb4_acr) & ~PLB4_ACR_WRP;
+ mtdcr(plb4_acr, reg);
+
+ /*
+ * Reset Lime controller
+ */
+ gpio_write_bit(CFG_GPIO_LIME_S, 1);
+ udelay(500);
+ gpio_write_bit(CFG_GPIO_LIME_RST, 1);
+
+ /* Lime memory clock adjusted to 100MHz */
+ out_be32((void *)CFG_LIME_SDRAM_CLOCK, CFG_LIME_CLOCK_100MHZ);
+ /* Wait untill time expired. Because of requirements in lime manual */
+ udelay(300);
+ /* Write lime controller memory parameters */
+ out_be32((void *)CFG_LIME_MMR, CFG_LIME_MMR_VALUE);
+
+ /*
+ * Reset PHY's
+ */
+ gpio_write_bit(CFG_GPIO_PHY0_RST, 0);
+ gpio_write_bit(CFG_GPIO_PHY1_RST, 0);
+ udelay(100);
+ gpio_write_bit(CFG_GPIO_PHY0_RST, 1);
+ gpio_write_bit(CFG_GPIO_PHY1_RST, 1);
+
+ /*
+ * Init display controller
+ */
+ /* Setup dot clock (internal PLL, division rate 1/16) */
+ out_be32((void *)0xc1fd0100, 0x00000f00);
+
+ /* Lime L0 init (16 bpp, 640x480) */
+ out_be32((void *)0xc1fd0020, 0x801401df);
+ out_be32((void *)0xc1fd0024, 0x0);
+ out_be32((void *)0xc1fd0028, 0x0);
+ out_be32((void *)0xc1fd002c, 0x0);
+ out_be32((void *)0xc1fd0110, 0x0);
+ out_be32((void *)0xc1fd0114, 0x0);
+ out_be32((void *)0xc1fd0118, 0x01df0280);
+
+ /* Display timing init */
+ out_be32((void *)0xc1fd0004, 0x031f0000);
+ out_be32((void *)0xc1fd0008, 0x027f027f);
+ out_be32((void *)0xc1fd000c, 0x015f028f);
+ out_be32((void *)0xc1fd0010, 0x020c0000);
+ out_be32((void *)0xc1fd0014, 0x01df01ea);
+ out_be32((void *)0xc1fd0018, 0x0);
+ out_be32((void *)0xc1fd001c, 0x01e00280);
+
+#if 1
+ /*
+ * Clear framebuffer using Lime's drawing engine
+ * (draw blue rect. with white border around it)
+ */
+ /* Setup mode and fbbase, xres, fg, bg */
+ out_be32((void *)0xc1ff0420, 0x8300);
+ out_be32((void *)0xc1ff0440, 0x0000);
+ out_be32((void *)0xc1ff0444, 0x0280);
+ out_be32((void *)0xc1ff0480, 0x7fff);
+ out_be32((void *)0xc1ff0484, 0x0000);
+ /* Reset clipping rectangle */
+ out_be32((void *)0xc1ff0454, 0x0000);
+ out_be32((void *)0xc1ff0458, 0x0280);
+ out_be32((void *)0xc1ff045c, 0x0000);
+ out_be32((void *)0xc1ff0460, 0x01e0);
+ /* Draw white rect. */
+ out_be32((void *)0xc1ff04a0, 0x09410000);
+ out_be32((void *)0xc1ff04a0, 0x00000000);
+ out_be32((void *)0xc1ff04a0, 0x01e00280);
+ udelay(2000);
+ /* Draw blue rect. */
+ out_be32((void *)0xc1ff0480, 0x001f);
+ out_be32((void *)0xc1ff04a0, 0x09410000);
+ out_be32((void *)0xc1ff04a0, 0x00010001);
+ out_be32((void *)0xc1ff04a0, 0x01de027e);
+#endif
+ /* Display enable, L0 layer */
+ out_be32((void *)0xc1fd0100, 0x80010f00);
+
+ /* TFT-LCD enable - PWM duty, lamp on */
+ out_be32((void *)0xc4000024, 0x64);
+ out_be32((void *)0xc4000020, 0x701);
+
+ /*
+ * Init matrix keyboard
+ */
+ misc_init_r_kbd();
+
+ return 0;
+}
+
+int checkboard(void)
+{
+ char *s = getenv("serial#");
+
+ printf("Board: lwmon5");
+
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ return (0);
+}
+
+#if defined(CFG_DRAM_TEST)
+int testdram(void)
+{
+ unsigned long *mem = (unsigned long *)0;
+ const unsigned long kend = (1024 / sizeof(unsigned long));
+ unsigned long k, n;
+
+ mtmsr(0);
+
+ for (k = 0; k < CFG_MBYTES_SDRAM;
+ ++k, mem += (1024 / sizeof(unsigned long))) {
+ if ((k & 1023) == 0) {
+ printf("%3d MB\r", k / 1024);
+ }
+
+ memset(mem, 0xaaaaaaaa, 1024);
+ for (n = 0; n < kend; ++n) {
+ if (mem[n] != 0xaaaaaaaa) {
+ printf("SDRAM test fails at: %08x\n",
+ (uint) & mem[n]);
+ return 1;
+ }
+ }
+
+ memset(mem, 0x55555555, 1024);
+ for (n = 0; n < kend; ++n) {
+ if (mem[n] != 0x55555555) {
+ printf("SDRAM test fails at: %08x\n",
+ (uint) & mem[n]);
+ return 1;
+ }
+ }
+ }
+ printf("SDRAM test passes\n");
+ return 0;
+}
+#endif
+
+/*************************************************************************
+ * pci_pre_init
+ *
+ * This routine is called just prior to registering the hose and gives
+ * the board the opportunity to check things. Returning a value of zero
+ * indicates that things are bad & PCI initialization should be aborted.
+ *
+ * Different boards may wish to customize the pci controller structure
+ * (add regions, override default access routines, etc) or perform
+ * certain pre-initialization actions.
+ *
+ ************************************************************************/
+#if defined(CONFIG_PCI)
+int pci_pre_init(struct pci_controller *hose)
+{
+ unsigned long addr;
+
+ /*-------------------------------------------------------------------------+
+ | Set priority for all PLB3 devices to 0.
+ | Set PLB3 arbiter to fair mode.
+ +-------------------------------------------------------------------------*/
+ mfsdr(sdr_amp1, addr);
+ mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
+ addr = mfdcr(plb3_acr);
+ mtdcr(plb3_acr, addr | 0x80000000);
+
+ /*-------------------------------------------------------------------------+
+ | Set priority for all PLB4 devices to 0.
+ +-------------------------------------------------------------------------*/
+ mfsdr(sdr_amp0, addr);
+ mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
+ addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
+ mtdcr(plb4_acr, addr);
+
+ /*-------------------------------------------------------------------------+
+ | Set Nebula PLB4 arbiter to fair mode.
+ +-------------------------------------------------------------------------*/
+ /* Segment0 */
+ addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
+ addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
+ addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
+ addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep;
+ mtdcr(plb0_acr, addr);
+
+ /* Segment1 */
+ addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
+ addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
+ addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
+ addr = (addr & ~plb1_acr_wrp_mask) | plb1_acr_wrp_2deep;
+ mtdcr(plb1_acr, addr);
+
+ return 1;
+}
+#endif /* defined(CONFIG_PCI) */
+
+/*************************************************************************
+ * pci_target_init
+ *
+ * The bootstrap configuration provides default settings for the pci
+ * inbound map (PIM). But the bootstrap config choices are limited and
+ * may not be sufficient for a given board.
+ *
+ ************************************************************************/
+#if defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT)
+void pci_target_init(struct pci_controller *hose)
+{
+ /*--------------------------------------------------------------------------+
+ * Set up Direct MMIO registers
+ *--------------------------------------------------------------------------*/
+ /*--------------------------------------------------------------------------+
+ | PowerPC440EPX PCI Master configuration.
+ | Map one 1Gig range of PLB/processor addresses to PCI memory space.
+ | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address 0xA0000000-0xDFFFFFFF
+ | Use byte reversed out routines to handle endianess.
+ | Make this region non-prefetchable.
+ +--------------------------------------------------------------------------*/
+ out32r(PCIX0_PMM0MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
+ out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
+ out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE); /* PMM0 PCI Low Address */
+ out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
+ out32r(PCIX0_PMM0MA, 0xE0000001); /* 512M + No prefetching, and enable region */
+
+ out32r(PCIX0_PMM1MA, 0x00000000); /* PMM0 Mask/Attribute - disabled b4 setting */
+ out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
+ out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2); /* PMM0 PCI Low Address */
+ out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
+ out32r(PCIX0_PMM1MA, 0xE0000001); /* 512M + No prefetching, and enable region */
+
+ out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
+ out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
+ out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
+ out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
+
+ /*--------------------------------------------------------------------------+
+ * Set up Configuration registers
+ *--------------------------------------------------------------------------*/
+
+ /* Program the board's subsystem id/vendor id */
+ pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
+ CFG_PCI_SUBSYS_VENDORID);
+ pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
+
+ /* Configure command register as bus master */
+ pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
+
+ /* 240nS PCI clock */
+ pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
+
+ /* No error reporting */
+ pci_write_config_word(0, PCI_ERREN, 0);
+
+ pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
+
+}
+#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_TARGET_INIT) */
+
+/*************************************************************************
+ * pci_master_init
+ *
+ ************************************************************************/
+#if defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT)
+void pci_master_init(struct pci_controller *hose)
+{
+ unsigned short temp_short;
+
+ /*--------------------------------------------------------------------------+
+ | Write the PowerPC440 EP PCI Configuration regs.
+ | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
+ | Enable PowerPC440 EP to act as a PCI memory target (PTM).
+ +--------------------------------------------------------------------------*/
+ pci_read_config_word(0, PCI_COMMAND, &temp_short);
+ pci_write_config_word(0, PCI_COMMAND,
+ temp_short | PCI_COMMAND_MASTER |
+ PCI_COMMAND_MEMORY);
+}
+#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_MASTER_INIT) */
+
+/*************************************************************************
+ * is_pci_host
+ *
+ * This routine is called to determine if a pci scan should be
+ * performed. With various hardware environments (especially cPCI and
+ * PPMC) it's insufficient to depend on the state of the arbiter enable
+ * bit in the strap register, or generic host/adapter assumptions.
+ *
+ * Rather than hard-code a bad assumption in the general 440 code, the
+ * 440 pci code requires the board to decide at runtime.
+ *
+ * Return 0 for adapter mode, non-zero for host (monarch) mode.
+ *
+ *
+ ************************************************************************/
+#if defined(CONFIG_PCI)
+int is_pci_host(struct pci_controller *hose)
+{
+ /* Cactus is always configured as host. */
+ return (1);
+}
+#endif /* defined(CONFIG_PCI) */
+
+void hw_watchdog_reset(void)
+{
+ int val;
+
+ /*
+ * Toggle watchdog output
+ */
+ val = gpio_read_out_bit(CFG_GPIO_WATCHDOG) == 0 ? 1 : 0;
+ gpio_write_bit(CFG_GPIO_WATCHDOG, val);
+}
+
+int do_eeprom_wp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ if (argc < 2) {
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if ((strcmp(argv[1], "on") == 0)) {
+ gpio_write_bit(CFG_GPIO_EEPROM_EXT_WP, 1);
+ } else if ((strcmp(argv[1], "off") == 0)) {
+ gpio_write_bit(CFG_GPIO_EEPROM_EXT_WP, 0);
+ } else {
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ eepromwp, 2, 0, do_eeprom_wp,
+ "eepromwp- eeprom write protect off/on\n",
+ "<on|off> - enable (on) or disable (off) I2C EEPROM write protect\n"
+);
diff --git a/board/lwmon5/sdram.c b/board/lwmon5/sdram.c
new file mode 100644
index 0000000..d4547e2
--- /dev/null
+++ b/board/lwmon5/sdram.c
@@ -0,0 +1,648 @@
+/*
+ * (C) Copyright 2006
+ * Sylvie Gohl, AMCC/IBM, gohl.sylvie@fr.ibm.com
+ * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
+ * Thierry Roman, AMCC/IBM, thierry_roman@fr.ibm.com
+ * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
+ * Robert Snyder, AMCC/IBM, rob.snyder@fr.ibm.com
+ *
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* define DEBUG for debugging output (obviously ;-)) */
+#if 0
+#define DEBUG
+#endif
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/io.h>
+#include <ppc440.h>
+
+#include "sdram.h"
+
+/*
+ * This DDR2 setup code can dynamically setup the TLB entries for the DDR2 memory
+ * region. Right now the cache should still be disabled in U-Boot because of the
+ * EMAC driver, that need it's buffer descriptor to be located in non cached
+ * memory.
+ *
+ * If at some time this restriction doesn't apply anymore, just define
+ * CFG_ENABLE_SDRAM_CACHE in the board config file and this code should setup
+ * everything correctly.
+ */
+#ifdef CFG_ENABLE_SDRAM_CACHE
+#define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on SDRAM */
+#else
+#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
+#endif
+
+void dcbz_area(u32 start_address, u32 num_bytes);
+void dflush(void);
+
+static u32 is_ecc_enabled(void)
+{
+ u32 val;
+
+ mfsdram(DDR0_22, val);
+ val &= DDR0_22_CTRL_RAW_MASK;
+ if (val)
+ return 1;
+ else
+ return 0;
+}
+
+void board_add_ram_info(int use_default)
+{
+ PPC440_SYS_INFO board_cfg;
+ u32 val;
+
+ if (is_ecc_enabled())
+ puts(" (ECC");
+ else
+ puts(" (ECC not");
+
+ get_sys_info(&board_cfg);
+ printf(" enabled, %d MHz", (board_cfg.freqPLB * 2) / 1000000);
+
+ mfsdram(DDR0_03, val);
+ val = DDR0_03_CASLAT_DECODE(val);
+ printf(", CL%d)", val);
+}
+
+static int wait_for_dlllock(void)
+{
+ u32 val;
+ int wait = 0;
+
+ /*
+ * Wait for the DCC master delay line to finish calibration
+ */
+ mtdcr(ddrcfga, DDR0_17);
+ val = DDR0_17_DLLLOCKREG_UNLOCKED;
+
+ while (wait != 0xffff) {
+ val = mfdcr(ddrcfgd);
+ if ((val & DDR0_17_DLLLOCKREG_MASK) == DDR0_17_DLLLOCKREG_LOCKED)
+ /* dlllockreg bit on */
+ return 0;
+ else
+ wait++;
+ }
+ debug("0x%04x: DDR0_17 Value (dlllockreg bit): 0x%08x\n", wait, val);
+ debug("Waiting for dlllockreg bit to raise\n");
+
+ return -1;
+}
+
+#if defined(CONFIG_DDR_DATA_EYE)
+int wait_for_dram_init_complete(void)
+{
+ u32 val;
+ int wait = 0;
+
+ /*
+ * Wait for 'DRAM initialization complete' bit in status register
+ */
+ mtdcr(ddrcfga, DDR0_00);
+
+ while (wait != 0xffff) {
+ val = mfdcr(ddrcfgd);
+ if ((val & DDR0_00_INT_STATUS_BIT6) == DDR0_00_INT_STATUS_BIT6)
+ /* 'DRAM initialization complete' bit */
+ return 0;
+ else
+ wait++;
+ }
+
+ debug("DRAM initialization complete bit in status register did not rise\n");
+
+ return -1;
+}
+
+#define NUM_TRIES 64
+#define NUM_READS 10
+
+void denali_core_search_data_eye(u32 start_addr, u32 memory_size)
+{
+ int k, j;
+ u32 val;
+ u32 wr_dqs_shift, dqs_out_shift, dll_dqs_delay_X;
+ u32 max_passing_cases = 0, wr_dqs_shift_with_max_passing_cases = 0;
+ u32 passing_cases = 0, dll_dqs_delay_X_sw_val = 0;
+ u32 dll_dqs_delay_X_start_window = 0, dll_dqs_delay_X_end_window = 0;
+ volatile u32 *ram_pointer;
+ u32 test[NUM_TRIES] = {
+ 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
+ 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
+ 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
+ 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
+ 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
+ 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
+ 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
+ 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
+ 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
+ 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
+ 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
+ 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
+ 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55 };
+
+ ram_pointer = (volatile u32 *)start_addr;
+
+ for (wr_dqs_shift = 64; wr_dqs_shift < 96; wr_dqs_shift++) {
+ /*for (wr_dqs_shift=1; wr_dqs_shift<96; wr_dqs_shift++) {*/
+
+ /*
+ * De-assert 'start' parameter.
+ */
+ mtdcr(ddrcfga, DDR0_02);
+ val = (mfdcr(ddrcfgd) & ~DDR0_02_START_MASK) | DDR0_02_START_OFF;
+ mtdcr(ddrcfgd, val);
+
+ /*
+ * Set 'wr_dqs_shift'
+ */
+ mtdcr(ddrcfga, DDR0_09);
+ val = (mfdcr(ddrcfgd) & ~DDR0_09_WR_DQS_SHIFT_MASK)
+ | DDR0_09_WR_DQS_SHIFT_ENCODE(wr_dqs_shift);
+ mtdcr(ddrcfgd, val);
+
+ /*
+ * Set 'dqs_out_shift' = wr_dqs_shift + 32
+ */
+ dqs_out_shift = wr_dqs_shift + 32;
+ mtdcr(ddrcfga, DDR0_22);
+ val = (mfdcr(ddrcfgd) & ~DDR0_22_DQS_OUT_SHIFT_MASK)
+ | DDR0_22_DQS_OUT_SHIFT_ENCODE(dqs_out_shift);
+ mtdcr(ddrcfgd, val);
+
+ passing_cases = 0;
+
+ for (dll_dqs_delay_X = 1; dll_dqs_delay_X < 64; dll_dqs_delay_X++) {
+ /*for (dll_dqs_delay_X=1; dll_dqs_delay_X<128; dll_dqs_delay_X++) {*/
+ /*
+ * Set 'dll_dqs_delay_X'.
+ */
+ /* dll_dqs_delay_0 */
+ mtdcr(ddrcfga, DDR0_17);
+ val = (mfdcr(ddrcfgd) & ~DDR0_17_DLL_DQS_DELAY_0_MASK)
+ | DDR0_17_DLL_DQS_DELAY_0_ENCODE(dll_dqs_delay_X);
+ mtdcr(ddrcfgd, val);
+ /* dll_dqs_delay_1 to dll_dqs_delay_4 */
+ mtdcr(ddrcfga, DDR0_18);
+ val = (mfdcr(ddrcfgd) & ~DDR0_18_DLL_DQS_DELAY_X_MASK)
+ | DDR0_18_DLL_DQS_DELAY_4_ENCODE(dll_dqs_delay_X)
+ | DDR0_18_DLL_DQS_DELAY_3_ENCODE(dll_dqs_delay_X)
+ | DDR0_18_DLL_DQS_DELAY_2_ENCODE(dll_dqs_delay_X)
+ | DDR0_18_DLL_DQS_DELAY_1_ENCODE(dll_dqs_delay_X);
+ mtdcr(ddrcfgd, val);
+ /* dll_dqs_delay_5 to dll_dqs_delay_8 */
+ mtdcr(ddrcfga, DDR0_19);
+ val = (mfdcr(ddrcfgd) & ~DDR0_19_DLL_DQS_DELAY_X_MASK)
+ | DDR0_19_DLL_DQS_DELAY_8_ENCODE(dll_dqs_delay_X)
+ | DDR0_19_DLL_DQS_DELAY_7_ENCODE(dll_dqs_delay_X)
+ | DDR0_19_DLL_DQS_DELAY_6_ENCODE(dll_dqs_delay_X)
+ | DDR0_19_DLL_DQS_DELAY_5_ENCODE(dll_dqs_delay_X);
+ mtdcr(ddrcfgd, val);
+
+ ppcMsync();
+ ppcMbar();
+
+ /*
+ * Assert 'start' parameter.
+ */
+ mtdcr(ddrcfga, DDR0_02);
+ val = (mfdcr(ddrcfgd) & ~DDR0_02_START_MASK) | DDR0_02_START_ON;
+ mtdcr(ddrcfgd, val);
+
+ ppcMsync();
+ ppcMbar();
+
+ /*
+ * Wait for the DCC master delay line to finish calibration
+ */
+ if (wait_for_dlllock() != 0) {
+ printf("dlllock did not occur !!!\n");
+ printf("denali_core_search_data_eye!!!\n");
+ printf("wr_dqs_shift = %d - dll_dqs_delay_X = %d\n",
+ wr_dqs_shift, dll_dqs_delay_X);
+ hang();
+ }
+ ppcMsync();
+ ppcMbar();
+
+ if (wait_for_dram_init_complete() != 0) {
+ printf("dram init complete did not occur !!!\n");
+ printf("denali_core_search_data_eye!!!\n");
+ printf("wr_dqs_shift = %d - dll_dqs_delay_X = %d\n",
+ wr_dqs_shift, dll_dqs_delay_X);
+ hang();
+ }
+ udelay(100); /* wait 100us to ensure init is really completed !!! */
+
+ /* write values */
+ for (j=0; j<NUM_TRIES; j++) {
+ ram_pointer[j] = test[j];
+
+ /* clear any cache at ram location */
+ __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
+ }
+
+ /* read values back */
+ for (j=0; j<NUM_TRIES; j++) {
+ for (k=0; k<NUM_READS; k++) {
+ /* clear any cache at ram location */
+ __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
+
+ if (ram_pointer[j] != test[j])
+ break;
+ }
+
+ /* read error */
+ if (k != NUM_READS)
+ break;
+ }
+
+ /* See if the dll_dqs_delay_X value passed.*/
+ if (j < NUM_TRIES) {
+ /* Failed */
+ passing_cases = 0;
+ /* break; */
+ } else {
+ /* Passed */
+ if (passing_cases == 0)
+ dll_dqs_delay_X_sw_val = dll_dqs_delay_X;
+ passing_cases++;
+ if (passing_cases >= max_passing_cases) {
+ max_passing_cases = passing_cases;
+ wr_dqs_shift_with_max_passing_cases = wr_dqs_shift;
+ dll_dqs_delay_X_start_window = dll_dqs_delay_X_sw_val;
+ dll_dqs_delay_X_end_window = dll_dqs_delay_X;
+ }
+ }
+
+ /*
+ * De-assert 'start' parameter.
+ */
+ mtdcr(ddrcfga, DDR0_02);
+ val = (mfdcr(ddrcfgd) & ~DDR0_02_START_MASK) | DDR0_02_START_OFF;
+ mtdcr(ddrcfgd, val);
+
+ } /* for (dll_dqs_delay_X=0; dll_dqs_delay_X<128; dll_dqs_delay_X++) */
+
+ } /* for (wr_dqs_shift=0; wr_dqs_shift<96; wr_dqs_shift++) */
+
+ /*
+ * Largest passing window is now detected.
+ */
+
+ /* Compute dll_dqs_delay_X value */
+ dll_dqs_delay_X = (dll_dqs_delay_X_end_window + dll_dqs_delay_X_start_window) / 2;
+ wr_dqs_shift = wr_dqs_shift_with_max_passing_cases;
+
+ debug("DQS calibration - Window detected:\n");
+ debug("max_passing_cases = %d\n", max_passing_cases);
+ debug("wr_dqs_shift = %d\n", wr_dqs_shift);
+ debug("dll_dqs_delay_X = %d\n", dll_dqs_delay_X);
+ debug("dll_dqs_delay_X window = %d - %d\n",
+ dll_dqs_delay_X_start_window, dll_dqs_delay_X_end_window);
+
+ /*
+ * De-assert 'start' parameter.
+ */
+ mtdcr(ddrcfga, DDR0_02);
+ val = (mfdcr(ddrcfgd) & ~DDR0_02_START_MASK) | DDR0_02_START_OFF;
+ mtdcr(ddrcfgd, val);
+
+ /*
+ * Set 'wr_dqs_shift'
+ */
+ mtdcr(ddrcfga, DDR0_09);
+ val = (mfdcr(ddrcfgd) & ~DDR0_09_WR_DQS_SHIFT_MASK)
+ | DDR0_09_WR_DQS_SHIFT_ENCODE(wr_dqs_shift);
+ mtdcr(ddrcfgd, val);
+ debug("DDR0_09=0x%08lx\n", val);
+
+ /*
+ * Set 'dqs_out_shift' = wr_dqs_shift + 32
+ */
+ dqs_out_shift = wr_dqs_shift + 32;
+ mtdcr(ddrcfga, DDR0_22);
+ val = (mfdcr(ddrcfgd) & ~DDR0_22_DQS_OUT_SHIFT_MASK)
+ | DDR0_22_DQS_OUT_SHIFT_ENCODE(dqs_out_shift);
+ mtdcr(ddrcfgd, val);
+ debug("DDR0_22=0x%08lx\n", val);
+
+ /*
+ * Set 'dll_dqs_delay_X'.
+ */
+ /* dll_dqs_delay_0 */
+ mtdcr(ddrcfga, DDR0_17);
+ val = (mfdcr(ddrcfgd) & ~DDR0_17_DLL_DQS_DELAY_0_MASK)
+ | DDR0_17_DLL_DQS_DELAY_0_ENCODE(dll_dqs_delay_X);
+ mtdcr(ddrcfgd, val);
+ debug("DDR0_17=0x%08lx\n", val);
+
+ /* dll_dqs_delay_1 to dll_dqs_delay_4 */
+ mtdcr(ddrcfga, DDR0_18);
+ val = (mfdcr(ddrcfgd) & ~DDR0_18_DLL_DQS_DELAY_X_MASK)
+ | DDR0_18_DLL_DQS_DELAY_4_ENCODE(dll_dqs_delay_X)
+ | DDR0_18_DLL_DQS_DELAY_3_ENCODE(dll_dqs_delay_X)
+ | DDR0_18_DLL_DQS_DELAY_2_ENCODE(dll_dqs_delay_X)
+ | DDR0_18_DLL_DQS_DELAY_1_ENCODE(dll_dqs_delay_X);
+ mtdcr(ddrcfgd, val);
+ debug("DDR0_18=0x%08lx\n", val);
+
+ /* dll_dqs_delay_5 to dll_dqs_delay_8 */
+ mtdcr(ddrcfga, DDR0_19);
+ val = (mfdcr(ddrcfgd) & ~DDR0_19_DLL_DQS_DELAY_X_MASK)
+ | DDR0_19_DLL_DQS_DELAY_8_ENCODE(dll_dqs_delay_X)
+ | DDR0_19_DLL_DQS_DELAY_7_ENCODE(dll_dqs_delay_X)
+ | DDR0_19_DLL_DQS_DELAY_6_ENCODE(dll_dqs_delay_X)
+ | DDR0_19_DLL_DQS_DELAY_5_ENCODE(dll_dqs_delay_X);
+ mtdcr(ddrcfgd, val);
+ debug("DDR0_19=0x%08lx\n", val);
+
+ /*
+ * Assert 'start' parameter.
+ */
+ mtdcr(ddrcfga, DDR0_02);
+ val = (mfdcr(ddrcfgd) & ~DDR0_02_START_MASK) | DDR0_02_START_ON;
+ mtdcr(ddrcfgd, val);
+
+ ppcMsync();
+ ppcMbar();
+
+ /*
+ * Wait for the DCC master delay line to finish calibration
+ */
+ if (wait_for_dlllock() != 0) {
+ printf("dlllock did not occur !!!\n");
+ hang();
+ }
+ ppcMsync();
+ ppcMbar();
+
+ if (wait_for_dram_init_complete() != 0) {
+ printf("dram init complete did not occur !!!\n");
+ hang();
+ }
+ udelay(100); /* wait 100us to ensure init is really completed !!! */
+}
+#endif /* CONFIG_DDR_DATA_EYE */
+
+#ifdef CONFIG_DDR_ECC
+static void wait_ddr_idle(void)
+{
+ /*
+ * Controller idle status cannot be determined for Denali
+ * DDR2 code. Just return here.
+ */
+}
+
+static void blank_string(int size)
+{
+ int i;
+
+ for (i=0; i<size; i++)
+ putc('\b');
+ for (i=0; i<size; i++)
+ putc(' ');
+ for (i=0; i<size; i++)
+ putc('\b');
+}
+
+static void program_ecc(u32 start_address,
+ u32 num_bytes,
+ u32 tlb_word2_i_value)
+{
+ u32 current_address;
+ u32 end_address;
+ u32 address_increment;
+ u32 val;
+ char str[] = "ECC generation -";
+ char slash[] = "\\|/-\\|/-";
+ int loop = 0;
+ int loopi = 0;
+
+ current_address = start_address;
+
+ sync();
+ eieio();
+ wait_ddr_idle();
+
+ if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) {
+ /* ECC bit set method for non-cached memory */
+ address_increment = 4;
+ end_address = current_address + num_bytes;
+
+ puts(str);
+
+ while (current_address < end_address) {
+ *((u32 *)current_address) = 0x00000000;
+ current_address += address_increment;
+
+ if ((loop++ % (2 << 20)) == 0) {
+ putc('\b');
+ putc(slash[loopi++ % 8]);
+ }
+ }
+
+ blank_string(strlen(str));
+ } else {
+ /* ECC bit set method for cached memory */
+#if 0 /* test-only: will remove this define later, when ECC problems are solved! */
+ /*
+ * Some boards (like lwmon5) need to preserve the memory
+ * content upon ECC generation (for the log-buffer).
+ * Therefore we don't fill the memory with a pattern or
+ * just zero it, but write the same values back that are
+ * already in the memory cells.
+ */
+ address_increment = CFG_CACHELINE_SIZE;
+ end_address = current_address + num_bytes;
+
+ current_address = start_address;
+ while (current_address < end_address) {
+ /*
+ * TODO: Th following sequence doesn't work correctly.
+ * Just invalidating and flushing the cache doesn't
+ * seem to trigger the re-write of the memory.
+ */
+ ppcDcbi(current_address);
+ ppcDcbf(current_address);
+ current_address += CFG_CACHELINE_SIZE;
+ }
+#else
+ dcbz_area(start_address, num_bytes);
+ dflush();
+#endif
+ }
+
+ sync();
+ eieio();
+ wait_ddr_idle();
+
+ /* Clear error status */
+ mfsdram(DDR0_00, val);
+ mtsdram(DDR0_00, val | DDR0_00_INT_ACK_ALL);
+
+ /* Set 'int_mask' parameter to functionnal value */
+ mfsdram(DDR0_01, val);
+ mtsdram(DDR0_01, ((val &~ DDR0_01_INT_MASK_MASK) | DDR0_01_INT_MASK_ALL_OFF));
+
+ sync();
+ eieio();
+ wait_ddr_idle();
+}
+#endif
+
+/*************************************************************************
+ *
+ * initdram -- 440EPx's DDR controller is a DENALI Core
+ *
+ ************************************************************************/
+long int initdram (int board_type)
+{
+#if 0 /* test-only: will remove this define later, when ECC problems are solved! */
+ /* CL=3 */
+ mtsdram(DDR0_02, 0x00000000);
+
+ mtsdram(DDR0_00, 0x0000190A);
+ mtsdram(DDR0_01, 0x01000000);
+ mtsdram(DDR0_03, 0x02030603); /* A suitable burst length was taken. CAS is right for our board */
+
+ mtsdram(DDR0_04, 0x0A030300);
+ mtsdram(DDR0_05, 0x02020308);
+ mtsdram(DDR0_06, 0x0103C812);
+ mtsdram(DDR0_07, 0x00090100);
+ mtsdram(DDR0_08, 0x02c80001);
+ mtsdram(DDR0_09, 0x00011D5F);
+ mtsdram(DDR0_10, 0x00000300);
+ mtsdram(DDR0_11, 0x000CC800);
+ mtsdram(DDR0_12, 0x00000003);
+ mtsdram(DDR0_14, 0x00000000);
+ mtsdram(DDR0_17, 0x1e000000);
+ mtsdram(DDR0_18, 0x1e1e1e1e);
+ mtsdram(DDR0_19, 0x1e1e1e1e);
+ mtsdram(DDR0_20, 0x0B0B0B0B);
+ mtsdram(DDR0_21, 0x0B0B0B0B);
+#ifdef CONFIG_DDR_ECC
+ mtsdram(DDR0_22, 0x00267F0B | DDR0_22_CTRL_RAW_ECC_ENABLE); /* enable ECC */
+#else
+ mtsdram(DDR0_22, 0x00267F0B);
+#endif
+
+ mtsdram(DDR0_23, 0x01000000);
+ mtsdram(DDR0_24, 0x01010001);
+
+ mtsdram(DDR0_26, 0x2D93028A);
+ mtsdram(DDR0_27, 0x0784682B);
+
+ mtsdram(DDR0_28, 0x00000080);
+ mtsdram(DDR0_31, 0x00000000);
+ mtsdram(DDR0_42, 0x01000006);
+
+ mtsdram(DDR0_43, 0x030A0200);
+ mtsdram(DDR0_44, 0x00000003);
+ mtsdram(DDR0_02, 0x00000001); /* Activate the denali core */
+#else
+ /* CL=4 */
+ mtsdram(DDR0_02, 0x00000000);
+
+ mtsdram(DDR0_00, 0x0000190A);
+ mtsdram(DDR0_01, 0x01000000);
+ mtsdram(DDR0_03, 0x02040803); /* A suitable burst length was taken. CAS is right for our board */
+
+ mtsdram(DDR0_04, 0x0B030300);
+ mtsdram(DDR0_05, 0x02020308);
+ mtsdram(DDR0_06, 0x0003C812);
+ mtsdram(DDR0_07, 0x00090100);
+ mtsdram(DDR0_08, 0x03c80001);
+ mtsdram(DDR0_09, 0x00011D5F);
+ mtsdram(DDR0_10, 0x00000300);
+ mtsdram(DDR0_11, 0x000CC800);
+ mtsdram(DDR0_12, 0x00000003);
+ mtsdram(DDR0_14, 0x00000000);
+ mtsdram(DDR0_17, 0x1e000000);
+ mtsdram(DDR0_18, 0x1e1e1e1e);
+ mtsdram(DDR0_19, 0x1e1e1e1e);
+ mtsdram(DDR0_20, 0x0B0B0B0B);
+ mtsdram(DDR0_21, 0x0B0B0B0B);
+#ifdef CONFIG_DDR_ECC
+ mtsdram(DDR0_22, 0x00267F0B | DDR0_22_CTRL_RAW_ECC_ENABLE); /* enable ECC */
+#else
+ mtsdram(DDR0_22, 0x00267F0B);
+#endif
+
+ mtsdram(DDR0_23, 0x01000000);
+ mtsdram(DDR0_24, 0x01010001);
+
+ mtsdram(DDR0_26, 0x2D93028A);
+ mtsdram(DDR0_27, 0x0784682B);
+
+ mtsdram(DDR0_28, 0x00000080);
+ mtsdram(DDR0_31, 0x00000000);
+ mtsdram(DDR0_42, 0x01000008);
+
+ mtsdram(DDR0_43, 0x050A0200);
+ mtsdram(DDR0_44, 0x00000005);
+ mtsdram(DDR0_02, 0x00000001); /* Activate the denali core */
+#endif
+
+ wait_for_dlllock();
+
+ /*
+ * Program tlb entries for this size (dynamic)
+ */
+ program_tlb(0, 0, CFG_MBYTES_SDRAM << 20, MY_TLB_WORD2_I_ENABLE);
+
+ /*
+ * Setup 2nd TLB with same physical address but different virtual address
+ * with cache enabled. This is done for fast ECC generation.
+ */
+ program_tlb(0, CFG_DDR_CACHED_ADDR, CFG_MBYTES_SDRAM << 20, 0);
+
+#ifdef CONFIG_DDR_DATA_EYE
+ /*
+ * Perform data eye search if requested.
+ */
+ denali_core_search_data_eye(CFG_DDR_CACHED_ADDR, CFG_MBYTES_SDRAM << 20);
+#endif
+
+#ifdef CONFIG_DDR_ECC
+ /*
+ * If ECC is enabled, initialize the parity bits.
+ */
+ program_ecc(CFG_DDR_CACHED_ADDR, CFG_MBYTES_SDRAM << 20, 0);
+#endif
+
+ /*
+ * Clear possible errors resulting from data-eye-search.
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ set_mcsr(get_mcsr());
+
+ return (CFG_MBYTES_SDRAM << 20);
+}
diff --git a/board/lwmon5/sdram.h b/board/lwmon5/sdram.h
new file mode 100644
index 0000000..7f847aa
--- /dev/null
+++ b/board/lwmon5/sdram.h
@@ -0,0 +1,505 @@
+/*
+ * (C) Copyright 2006
+ * Sylvie Gohl, AMCC/IBM, gohl.sylvie@fr.ibm.com
+ * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
+ * Thierry Roman, AMCC/IBM, thierry_roman@fr.ibm.com
+ * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
+ * Robert Snyder, AMCC/IBM, rob.snyder@fr.ibm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _SPD_SDRAM_DENALI_H_
+#define _SPD_SDRAM_DENALI_H_
+
+#define ppcMsync sync
+#define ppcMbar eieio
+
+/* General definitions */
+#define MAX_SPD_BYTE 128 /* highest SPD byte # to read */
+#define DENALI_REG_NUMBER 45 /* 45 Regs in PPC440EPx Denali Core */
+#define SUPPORTED_DIMMS_NB 7 /* Number of supported DIMM modules types */
+#define SDRAM_NONE 0 /* No DIMM detected in Slot */
+#define MAXRANKS 2 /* 2 ranks maximum */
+
+/* Supported PLB Frequencies */
+#define PLB_FREQ_133MHZ 133333333
+#define PLB_FREQ_152MHZ 152000000
+#define PLB_FREQ_160MHZ 160000000
+#define PLB_FREQ_166MHZ 166666666
+
+/* Denali Core Registers */
+#define SDRAM_DCR_BASE 0x10
+
+#define DDR_DCR_BASE 0x10
+#define ddrcfga (DDR_DCR_BASE+0x0) /* DDR configuration address reg */
+#define ddrcfgd (DDR_DCR_BASE+0x1) /* DDR configuration data reg */
+
+/*-----------------------------------------------------------------------------+
+ | Values for ddrcfga register - indirect addressing of these regs
+ +-----------------------------------------------------------------------------*/
+
+#define DDR0_00 0x00
+#define DDR0_00_INT_ACK_MASK 0x7F000000 /* Write only */
+#define DDR0_00_INT_ACK_ALL 0x7F000000
+#define DDR0_00_INT_ACK_ENCODE(n) ((((unsigned long)(n))&0x7F)<<24)
+#define DDR0_00_INT_ACK_DECODE(n) ((((unsigned long)(n))>>24)&0x7F)
+/* Status */
+#define DDR0_00_INT_STATUS_MASK 0x00FF0000 /* Read only */
+/* Bit0. A single access outside the defined PHYSICAL memory space detected. */
+#define DDR0_00_INT_STATUS_BIT0 0x00010000
+/* Bit1. Multiple accesses outside the defined PHYSICAL memory space detected. */
+#define DDR0_00_INT_STATUS_BIT1 0x00020000
+/* Bit2. Single correctable ECC event detected */
+#define DDR0_00_INT_STATUS_BIT2 0x00040000
+/* Bit3. Multiple correctable ECC events detected. */
+#define DDR0_00_INT_STATUS_BIT3 0x00080000
+/* Bit4. Single uncorrectable ECC event detected. */
+#define DDR0_00_INT_STATUS_BIT4 0x00100000
+/* Bit5. Multiple uncorrectable ECC events detected. */
+#define DDR0_00_INT_STATUS_BIT5 0x00200000
+/* Bit6. DRAM initialization complete. */
+#define DDR0_00_INT_STATUS_BIT6 0x00400000
+/* Bit7. Logical OR of all lower bits. */
+#define DDR0_00_INT_STATUS_BIT7 0x00800000
+
+#define DDR0_00_INT_STATUS_ENCODE(n) ((((unsigned long)(n))&0xFF)<<16)
+#define DDR0_00_INT_STATUS_DECODE(n) ((((unsigned long)(n))>>16)&0xFF)
+#define DDR0_00_DLL_INCREMENT_MASK 0x00007F00
+#define DDR0_00_DLL_INCREMENT_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_00_DLL_INCREMENT_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_00_DLL_START_POINT_MASK 0x0000007F
+#define DDR0_00_DLL_START_POINT_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_00_DLL_START_POINT_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+
+#define DDR0_01 0x01
+#define DDR0_01_PLB0_DB_CS_LOWER_MASK 0x1F000000
+#define DDR0_01_PLB0_DB_CS_LOWER_ENCODE(n) ((((unsigned long)(n))&0x1F)<<24)
+#define DDR0_01_PLB0_DB_CS_LOWER_DECODE(n) ((((unsigned long)(n))>>24)&0x1F)
+#define DDR0_01_PLB0_DB_CS_UPPER_MASK 0x001F0000
+#define DDR0_01_PLB0_DB_CS_UPPER_ENCODE(n) ((((unsigned long)(n))&0x1F)<<16)
+#define DDR0_01_PLB0_DB_CS_UPPER_DECODE(n) ((((unsigned long)(n))>>16)&0x1F)
+#define DDR0_01_OUT_OF_RANGE_TYPE_MASK 0x00000700 /* Read only */
+#define DDR0_01_OUT_OF_RANGE_TYPE_ENCODE(n) ((((unsigned long)(n))&0x7)<<8)
+#define DDR0_01_OUT_OF_RANGE_TYPE_DECODE(n) ((((unsigned long)(n))>>8)&0x7)
+#define DDR0_01_INT_MASK_MASK 0x000000FF
+#define DDR0_01_INT_MASK_ENCODE(n) ((((unsigned long)(n))&0xFF)<<0)
+#define DDR0_01_INT_MASK_DECODE(n) ((((unsigned long)(n))>>0)&0xFF)
+#define DDR0_01_INT_MASK_ALL_ON 0x000000FF
+#define DDR0_01_INT_MASK_ALL_OFF 0x00000000
+
+#define DDR0_02 0x02
+#define DDR0_02_MAX_CS_REG_MASK 0x02000000 /* Read only */
+#define DDR0_02_MAX_CS_REG_ENCODE(n) ((((unsigned long)(n))&0x2)<<24)
+#define DDR0_02_MAX_CS_REG_DECODE(n) ((((unsigned long)(n))>>24)&0x2)
+#define DDR0_02_MAX_COL_REG_MASK 0x000F0000 /* Read only */
+#define DDR0_02_MAX_COL_REG_ENCODE(n) ((((unsigned long)(n))&0xF)<<16)
+#define DDR0_02_MAX_COL_REG_DECODE(n) ((((unsigned long)(n))>>16)&0xF)
+#define DDR0_02_MAX_ROW_REG_MASK 0x00000F00 /* Read only */
+#define DDR0_02_MAX_ROW_REG_ENCODE(n) ((((unsigned long)(n))&0xF)<<8)
+#define DDR0_02_MAX_ROW_REG_DECODE(n) ((((unsigned long)(n))>>8)&0xF)
+#define DDR0_02_START_MASK 0x00000001
+#define DDR0_02_START_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_02_START_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+#define DDR0_02_START_OFF 0x00000000
+#define DDR0_02_START_ON 0x00000001
+
+#define DDR0_03 0x03
+#define DDR0_03_BSTLEN_MASK 0x07000000
+#define DDR0_03_BSTLEN_ENCODE(n) ((((unsigned long)(n))&0x7)<<24)
+#define DDR0_03_BSTLEN_DECODE(n) ((((unsigned long)(n))>>24)&0x7)
+#define DDR0_03_CASLAT_MASK 0x00070000
+#define DDR0_03_CASLAT_ENCODE(n) ((((unsigned long)(n))&0x7)<<16)
+#define DDR0_03_CASLAT_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
+#define DDR0_03_CASLAT_LIN_MASK 0x00000F00
+#define DDR0_03_CASLAT_LIN_ENCODE(n) ((((unsigned long)(n))&0xF)<<8)
+#define DDR0_03_CASLAT_LIN_DECODE(n) ((((unsigned long)(n))>>8)&0xF)
+#define DDR0_03_INITAREF_MASK 0x0000000F
+#define DDR0_03_INITAREF_ENCODE(n) ((((unsigned long)(n))&0xF)<<0)
+#define DDR0_03_INITAREF_DECODE(n) ((((unsigned long)(n))>>0)&0xF)
+
+#define DDR0_04 0x04
+#define DDR0_04_TRC_MASK 0x1F000000
+#define DDR0_04_TRC_ENCODE(n) ((((unsigned long)(n))&0x1F)<<24)
+#define DDR0_04_TRC_DECODE(n) ((((unsigned long)(n))>>24)&0x1F)
+#define DDR0_04_TRRD_MASK 0x00070000
+#define DDR0_04_TRRD_ENCODE(n) ((((unsigned long)(n))&0x7)<<16)
+#define DDR0_04_TRRD_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
+#define DDR0_04_TRTP_MASK 0x00000700
+#define DDR0_04_TRTP_ENCODE(n) ((((unsigned long)(n))&0x7)<<8)
+#define DDR0_04_TRTP_DECODE(n) ((((unsigned long)(n))>>8)&0x7)
+
+#define DDR0_05 0x05
+#define DDR0_05_TMRD_MASK 0x1F000000
+#define DDR0_05_TMRD_ENCODE(n) ((((unsigned long)(n))&0x1F)<<24)
+#define DDR0_05_TMRD_DECODE(n) ((((unsigned long)(n))>>24)&0x1F)
+#define DDR0_05_TEMRS_MASK 0x00070000
+#define DDR0_05_TEMRS_ENCODE(n) ((((unsigned long)(n))&0x7)<<16)
+#define DDR0_05_TEMRS_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
+#define DDR0_05_TRP_MASK 0x00000F00
+#define DDR0_05_TRP_ENCODE(n) ((((unsigned long)(n))&0xF)<<8)
+#define DDR0_05_TRP_DECODE(n) ((((unsigned long)(n))>>8)&0xF)
+#define DDR0_05_TRAS_MIN_MASK 0x000000FF
+#define DDR0_05_TRAS_MIN_ENCODE(n) ((((unsigned long)(n))&0xFF)<<0)
+#define DDR0_05_TRAS_MIN_DECODE(n) ((((unsigned long)(n))>>0)&0xFF)
+
+#define DDR0_06 0x06
+#define DDR0_06_WRITEINTERP_MASK 0x01000000
+#define DDR0_06_WRITEINTERP_ENCODE(n) ((((unsigned long)(n))&0x1)<<24)
+#define DDR0_06_WRITEINTERP_DECODE(n) ((((unsigned long)(n))>>24)&0x1)
+#define DDR0_06_TWTR_MASK 0x00070000
+#define DDR0_06_TWTR_ENCODE(n) ((((unsigned long)(n))&0x7)<<16)
+#define DDR0_06_TWTR_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
+#define DDR0_06_TDLL_MASK 0x0000FF00
+#define DDR0_06_TDLL_ENCODE(n) ((((unsigned long)(n))&0xFF)<<8)
+#define DDR0_06_TDLL_DECODE(n) ((((unsigned long)(n))>>8)&0xFF)
+#define DDR0_06_TRFC_MASK 0x0000007F
+#define DDR0_06_TRFC_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_06_TRFC_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+#define DDR0_07 0x07
+#define DDR0_07_NO_CMD_INIT_MASK 0x01000000
+#define DDR0_07_NO_CMD_INIT_ENCODE(n) ((((unsigned long)(n))&0x1)<<24)
+#define DDR0_07_NO_CMD_INIT_DECODE(n) ((((unsigned long)(n))>>24)&0x1)
+#define DDR0_07_TFAW_MASK 0x001F0000
+#define DDR0_07_TFAW_ENCODE(n) ((((unsigned long)(n))&0x1F)<<16)
+#define DDR0_07_TFAW_DECODE(n) ((((unsigned long)(n))>>16)&0x1F)
+#define DDR0_07_AUTO_REFRESH_MODE_MASK 0x00000100
+#define DDR0_07_AUTO_REFRESH_MODE_ENCODE(n) ((((unsigned long)(n))&0x1)<<8)
+#define DDR0_07_AUTO_REFRESH_MODE_DECODE(n) ((((unsigned long)(n))>>8)&0x1)
+#define DDR0_07_AREFRESH_MASK 0x00000001
+#define DDR0_07_AREFRESH_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_07_AREFRESH_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_08 0x08
+#define DDR0_08_WRLAT_MASK 0x07000000
+#define DDR0_08_WRLAT_ENCODE(n) ((((unsigned long)(n))&0x7)<<24)
+#define DDR0_08_WRLAT_DECODE(n) ((((unsigned long)(n))>>24)&0x7)
+#define DDR0_08_TCPD_MASK 0x00FF0000
+#define DDR0_08_TCPD_ENCODE(n) ((((unsigned long)(n))&0xFF)<<16)
+#define DDR0_08_TCPD_DECODE(n) ((((unsigned long)(n))>>16)&0xFF)
+#define DDR0_08_DQS_N_EN_MASK 0x00000100
+#define DDR0_08_DQS_N_EN_ENCODE(n) ((((unsigned long)(n))&0x1)<<8)
+#define DDR0_08_DQS_N_EN_DECODE(n) ((((unsigned long)(n))>>8)&0x1)
+#define DDR0_08_DDRII_SDRAM_MODE_MASK 0x00000001
+#define DDR0_08_DDRII_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_08_DDRII_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_09 0x09
+#define DDR0_09_OCD_ADJUST_PDN_CS_0_MASK 0x1F000000
+#define DDR0_09_OCD_ADJUST_PDN_CS_0_ENCODE(n) ((((unsigned long)(n))&0x1F)<<24)
+#define DDR0_09_OCD_ADJUST_PDN_CS_0_DECODE(n) ((((unsigned long)(n))>>24)&0x1F)
+#define DDR0_09_RTT_0_MASK 0x00030000
+#define DDR0_09_RTT_0_ENCODE(n) ((((unsigned long)(n))&0x3)<<16)
+#define DDR0_09_RTT_0_DECODE(n) ((((unsigned long)(n))>>16)&0x3)
+#define DDR0_09_WR_DQS_SHIFT_BYPASS_MASK 0x00007F00
+#define DDR0_09_WR_DQS_SHIFT_BYPASS_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_09_WR_DQS_SHIFT_BYPASS_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_09_WR_DQS_SHIFT_MASK 0x0000007F
+#define DDR0_09_WR_DQS_SHIFT_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_09_WR_DQS_SHIFT_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+#define DDR0_10 0x0A
+#define DDR0_10_WRITE_MODEREG_MASK 0x00010000 /* Write only */
+#define DDR0_10_WRITE_MODEREG_ENCODE(n) ((((unsigned long)(n))&0x1)<<16)
+#define DDR0_10_WRITE_MODEREG_DECODE(n) ((((unsigned long)(n))>>16)&0x1)
+#define DDR0_10_CS_MAP_MASK 0x00000300
+#define DDR0_10_CS_MAP_NO_MEM 0x00000000
+#define DDR0_10_CS_MAP_RANK0_INSTALLED 0x00000100
+#define DDR0_10_CS_MAP_RANK1_INSTALLED 0x00000200
+#define DDR0_10_CS_MAP_ENCODE(n) ((((unsigned long)(n))&0x3)<<8)
+#define DDR0_10_CS_MAP_DECODE(n) ((((unsigned long)(n))>>8)&0x3)
+#define DDR0_10_OCD_ADJUST_PUP_CS_0_MASK 0x0000001F
+#define DDR0_10_OCD_ADJUST_PUP_CS_0_ENCODE(n) ((((unsigned long)(n))&0x1F)<<0)
+#define DDR0_10_OCD_ADJUST_PUP_CS_0_DECODE(n) ((((unsigned long)(n))>>0)&0x1F)
+
+#define DDR0_11 0x0B
+#define DDR0_11_SREFRESH_MASK 0x01000000
+#define DDR0_11_SREFRESH_ENCODE(n) ((((unsigned long)(n))&0x1)<<24)
+#define DDR0_11_SREFRESH_DECODE(n) ((((unsigned long)(n))>>24)&0x1F)
+#define DDR0_11_TXSNR_MASK 0x00FF0000
+#define DDR0_11_TXSNR_ENCODE(n) ((((unsigned long)(n))&0xFF)<<16)
+#define DDR0_11_TXSNR_DECODE(n) ((((unsigned long)(n))>>16)&0xFF)
+#define DDR0_11_TXSR_MASK 0x0000FF00
+#define DDR0_11_TXSR_ENCODE(n) ((((unsigned long)(n))&0xFF)<<8)
+#define DDR0_11_TXSR_DECODE(n) ((((unsigned long)(n))>>8)&0xFF)
+
+#define DDR0_12 0x0C
+#define DDR0_12_TCKE_MASK 0x0000007
+#define DDR0_12_TCKE_ENCODE(n) ((((unsigned long)(n))&0x7)<<0)
+#define DDR0_12_TCKE_DECODE(n) ((((unsigned long)(n))>>0)&0x7)
+
+#define DDR0_13 0x0D
+
+#define DDR0_14 0x0E
+#define DDR0_14_DLL_BYPASS_MODE_MASK 0x01000000
+#define DDR0_14_DLL_BYPASS_MODE_ENCODE(n) ((((unsigned long)(n))&0x1)<<24)
+#define DDR0_14_DLL_BYPASS_MODE_DECODE(n) ((((unsigned long)(n))>>24)&0x1)
+#define DDR0_14_REDUC_MASK 0x00010000
+#define DDR0_14_REDUC_64BITS 0x00000000
+#define DDR0_14_REDUC_32BITS 0x00010000
+#define DDR0_14_REDUC_ENCODE(n) ((((unsigned long)(n))&0x1)<<16)
+#define DDR0_14_REDUC_DECODE(n) ((((unsigned long)(n))>>16)&0x1)
+#define DDR0_14_REG_DIMM_ENABLE_MASK 0x00000100
+#define DDR0_14_REG_DIMM_ENABLE_ENCODE(n) ((((unsigned long)(n))&0x1)<<8)
+#define DDR0_14_REG_DIMM_ENABLE_DECODE(n) ((((unsigned long)(n))>>8)&0x1)
+
+#define DDR0_15 0x0F
+
+#define DDR0_16 0x10
+
+#define DDR0_17 0x11
+#define DDR0_17_DLL_DQS_DELAY_0_MASK 0x7F000000
+#define DDR0_17_DLL_DQS_DELAY_0_ENCODE(n) ((((unsigned long)(n))&0x7F)<<24)
+#define DDR0_17_DLL_DQS_DELAY_0_DECODE(n) ((((unsigned long)(n))>>24)&0x7F)
+#define DDR0_17_DLLLOCKREG_MASK 0x00010000 /* Read only */
+#define DDR0_17_DLLLOCKREG_LOCKED 0x00010000
+#define DDR0_17_DLLLOCKREG_UNLOCKED 0x00000000
+#define DDR0_17_DLLLOCKREG_ENCODE(n) ((((unsigned long)(n))&0x1)<<16)
+#define DDR0_17_DLLLOCKREG_DECODE(n) ((((unsigned long)(n))>>16)&0x1)
+#define DDR0_17_DLL_LOCK_MASK 0x00007F00 /* Read only */
+#define DDR0_17_DLL_LOCK_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_17_DLL_LOCK_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+
+#define DDR0_18 0x12
+#define DDR0_18_DLL_DQS_DELAY_X_MASK 0x7F7F7F7F
+#define DDR0_18_DLL_DQS_DELAY_4_MASK 0x7F000000
+#define DDR0_18_DLL_DQS_DELAY_4_ENCODE(n) ((((unsigned long)(n))&0x7F)<<24)
+#define DDR0_18_DLL_DQS_DELAY_4_DECODE(n) ((((unsigned long)(n))>>24)&0x7F)
+#define DDR0_18_DLL_DQS_DELAY_3_MASK 0x007F0000
+#define DDR0_18_DLL_DQS_DELAY_3_ENCODE(n) ((((unsigned long)(n))&0x7F)<<16)
+#define DDR0_18_DLL_DQS_DELAY_3_DECODE(n) ((((unsigned long)(n))>>16)&0x7F)
+#define DDR0_18_DLL_DQS_DELAY_2_MASK 0x00007F00
+#define DDR0_18_DLL_DQS_DELAY_2_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_18_DLL_DQS_DELAY_2_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_18_DLL_DQS_DELAY_1_MASK 0x0000007F
+#define DDR0_18_DLL_DQS_DELAY_1_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_18_DLL_DQS_DELAY_1_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+#define DDR0_19 0x13
+#define DDR0_19_DLL_DQS_DELAY_X_MASK 0x7F7F7F7F
+#define DDR0_19_DLL_DQS_DELAY_8_MASK 0x7F000000
+#define DDR0_19_DLL_DQS_DELAY_8_ENCODE(n) ((((unsigned long)(n))&0x7F)<<24)
+#define DDR0_19_DLL_DQS_DELAY_8_DECODE(n) ((((unsigned long)(n))>>24)&0x7F)
+#define DDR0_19_DLL_DQS_DELAY_7_MASK 0x007F0000
+#define DDR0_19_DLL_DQS_DELAY_7_ENCODE(n) ((((unsigned long)(n))&0x7F)<<16)
+#define DDR0_19_DLL_DQS_DELAY_7_DECODE(n) ((((unsigned long)(n))>>16)&0x7F)
+#define DDR0_19_DLL_DQS_DELAY_6_MASK 0x00007F00
+#define DDR0_19_DLL_DQS_DELAY_6_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_19_DLL_DQS_DELAY_6_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_19_DLL_DQS_DELAY_5_MASK 0x0000007F
+#define DDR0_19_DLL_DQS_DELAY_5_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_19_DLL_DQS_DELAY_5_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+#define DDR0_20 0x14
+#define DDR0_20_DLL_DQS_BYPASS_3_MASK 0x7F000000
+#define DDR0_20_DLL_DQS_BYPASS_3_ENCODE(n) ((((unsigned long)(n))&0x7F)<<24)
+#define DDR0_20_DLL_DQS_BYPASS_3_DECODE(n) ((((unsigned long)(n))>>24)&0x7F)
+#define DDR0_20_DLL_DQS_BYPASS_2_MASK 0x007F0000
+#define DDR0_20_DLL_DQS_BYPASS_2_ENCODE(n) ((((unsigned long)(n))&0x7F)<<16)
+#define DDR0_20_DLL_DQS_BYPASS_2_DECODE(n) ((((unsigned long)(n))>>16)&0x7F)
+#define DDR0_20_DLL_DQS_BYPASS_1_MASK 0x00007F00
+#define DDR0_20_DLL_DQS_BYPASS_1_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_20_DLL_DQS_BYPASS_1_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_20_DLL_DQS_BYPASS_0_MASK 0x0000007F
+#define DDR0_20_DLL_DQS_BYPASS_0_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_20_DLL_DQS_BYPASS_0_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+#define DDR0_21 0x15
+#define DDR0_21_DLL_DQS_BYPASS_7_MASK 0x7F000000
+#define DDR0_21_DLL_DQS_BYPASS_7_ENCODE(n) ((((unsigned long)(n))&0x7F)<<24)
+#define DDR0_21_DLL_DQS_BYPASS_7_DECODE(n) ((((unsigned long)(n))>>24)&0x7F)
+#define DDR0_21_DLL_DQS_BYPASS_6_MASK 0x007F0000
+#define DDR0_21_DLL_DQS_BYPASS_6_ENCODE(n) ((((unsigned long)(n))&0x7F)<<16)
+#define DDR0_21_DLL_DQS_BYPASS_6_DECODE(n) ((((unsigned long)(n))>>16)&0x7F)
+#define DDR0_21_DLL_DQS_BYPASS_5_MASK 0x00007F00
+#define DDR0_21_DLL_DQS_BYPASS_5_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_21_DLL_DQS_BYPASS_5_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_21_DLL_DQS_BYPASS_4_MASK 0x0000007F
+#define DDR0_21_DLL_DQS_BYPASS_4_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_21_DLL_DQS_BYPASS_4_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+#define DDR0_22 0x16
+/* ECC */
+#define DDR0_22_CTRL_RAW_MASK 0x03000000
+#define DDR0_22_CTRL_RAW_ECC_DISABLE 0x00000000 /* ECC not being used */
+#define DDR0_22_CTRL_RAW_ECC_CHECK_ONLY 0x01000000 /* ECC checking is on, but no attempts to correct*/
+#define DDR0_22_CTRL_RAW_NO_ECC_RAM 0x02000000 /* No ECC RAM storage available */
+#define DDR0_22_CTRL_RAW_ECC_ENABLE 0x03000000 /* ECC checking and correcting on */
+#define DDR0_22_CTRL_RAW_ENCODE(n) ((((unsigned long)(n))&0x3)<<24)
+#define DDR0_22_CTRL_RAW_DECODE(n) ((((unsigned long)(n))>>24)&0x3)
+
+#define DDR0_22_DQS_OUT_SHIFT_BYPASS_MASK 0x007F0000
+#define DDR0_22_DQS_OUT_SHIFT_BYPASS_ENCODE(n) ((((unsigned long)(n))&0x7F)<<16)
+#define DDR0_22_DQS_OUT_SHIFT_BYPASS_DECODE(n) ((((unsigned long)(n))>>16)&0x7F)
+#define DDR0_22_DQS_OUT_SHIFT_MASK 0x00007F00
+#define DDR0_22_DQS_OUT_SHIFT_ENCODE(n) ((((unsigned long)(n))&0x7F)<<8)
+#define DDR0_22_DQS_OUT_SHIFT_DECODE(n) ((((unsigned long)(n))>>8)&0x7F)
+#define DDR0_22_DLL_DQS_BYPASS_8_MASK 0x0000007F
+#define DDR0_22_DLL_DQS_BYPASS_8_ENCODE(n) ((((unsigned long)(n))&0x7F)<<0)
+#define DDR0_22_DLL_DQS_BYPASS_8_DECODE(n) ((((unsigned long)(n))>>0)&0x7F)
+
+
+#define DDR0_23 0x17
+#define DDR0_23_ODT_RD_MAP_CS0_MASK 0x03000000
+#define DDR0_23_ODT_RD_MAP_CS0_ENCODE(n) ((((unsigned long)(n))&0x3)<<24)
+#define DDR0_23_ODT_RD_MAP_CS0_DECODE(n) ((((unsigned long)(n))>>24)&0x3)
+#define DDR0_23_ECC_C_SYND_MASK 0x00FF0000 /* Read only */
+#define DDR0_23_ECC_C_SYND_ENCODE(n) ((((unsigned long)(n))&0xFF)<<16)
+#define DDR0_23_ECC_C_SYND_DECODE(n) ((((unsigned long)(n))>>16)&0xFF)
+#define DDR0_23_ECC_U_SYND_MASK 0x0000FF00 /* Read only */
+#define DDR0_23_ECC_U_SYND_ENCODE(n) ((((unsigned long)(n))&0xFF)<<8)
+#define DDR0_23_ECC_U_SYND_DECODE(n) ((((unsigned long)(n))>>8)&0xFF)
+#define DDR0_23_FWC_MASK 0x00000001 /* Write only */
+#define DDR0_23_FWC_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_23_FWC_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_24 0x18
+#define DDR0_24_RTT_PAD_TERMINATION_MASK 0x03000000
+#define DDR0_24_RTT_PAD_TERMINATION_ENCODE(n) ((((unsigned long)(n))&0x3)<<24)
+#define DDR0_24_RTT_PAD_TERMINATION_DECODE(n) ((((unsigned long)(n))>>24)&0x3)
+#define DDR0_24_ODT_WR_MAP_CS1_MASK 0x00030000
+#define DDR0_24_ODT_WR_MAP_CS1_ENCODE(n) ((((unsigned long)(n))&0x3)<<16)
+#define DDR0_24_ODT_WR_MAP_CS1_DECODE(n) ((((unsigned long)(n))>>16)&0x3)
+#define DDR0_24_ODT_RD_MAP_CS1_MASK 0x00000300
+#define DDR0_24_ODT_RD_MAP_CS1_ENCODE(n) ((((unsigned long)(n))&0x3)<<8)
+#define DDR0_24_ODT_RD_MAP_CS1_DECODE(n) ((((unsigned long)(n))>>8)&0x3)
+#define DDR0_24_ODT_WR_MAP_CS0_MASK 0x00000003
+#define DDR0_24_ODT_WR_MAP_CS0_ENCODE(n) ((((unsigned long)(n))&0x3)<<0)
+#define DDR0_24_ODT_WR_MAP_CS0_DECODE(n) ((((unsigned long)(n))>>0)&0x3)
+
+#define DDR0_25 0x19
+#define DDR0_25_VERSION_MASK 0xFFFF0000 /* Read only */
+#define DDR0_25_VERSION_ENCODE(n) ((((unsigned long)(n))&0xFFFF)<<16)
+#define DDR0_25_VERSION_DECODE(n) ((((unsigned long)(n))>>16)&0xFFFF)
+#define DDR0_25_OUT_OF_RANGE_LENGTH_MASK 0x000003FF /* Read only */
+#define DDR0_25_OUT_OF_RANGE_LENGTH_ENCODE(n) ((((unsigned long)(n))&0x3FF)<<0)
+#define DDR0_25_OUT_OF_RANGE_LENGTH_DECODE(n) ((((unsigned long)(n))>>0)&0x3FF)
+
+#define DDR0_26 0x1A
+#define DDR0_26_TRAS_MAX_MASK 0xFFFF0000
+#define DDR0_26_TRAS_MAX_ENCODE(n) ((((unsigned long)(n))&0xFFFF)<<16)
+#define DDR0_26_TRAS_MAX_DECODE(n) ((((unsigned long)(n))>>16)&0xFFFF)
+#define DDR0_26_TREF_MASK 0x00003FFF
+#define DDR0_26_TREF_ENCODE(n) ((((unsigned long)(n))&0x3FF)<<0)
+#define DDR0_26_TREF_DECODE(n) ((((unsigned long)(n))>>0)&0x3FF)
+
+#define DDR0_27 0x1B
+#define DDR0_27_EMRS_DATA_MASK 0x3FFF0000
+#define DDR0_27_EMRS_DATA_ENCODE(n) ((((unsigned long)(n))&0x3FFF)<<16)
+#define DDR0_27_EMRS_DATA_DECODE(n) ((((unsigned long)(n))>>16)&0x3FFF)
+#define DDR0_27_TINIT_MASK 0x0000FFFF
+#define DDR0_27_TINIT_ENCODE(n) ((((unsigned long)(n))&0xFFFF)<<0)
+#define DDR0_27_TINIT_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFF)
+
+#define DDR0_28 0x1C
+#define DDR0_28_EMRS3_DATA_MASK 0x3FFF0000
+#define DDR0_28_EMRS3_DATA_ENCODE(n) ((((unsigned long)(n))&0x3FFF)<<16)
+#define DDR0_28_EMRS3_DATA_DECODE(n) ((((unsigned long)(n))>>16)&0x3FFF)
+#define DDR0_28_EMRS2_DATA_MASK 0x00003FFF
+#define DDR0_28_EMRS2_DATA_ENCODE(n) ((((unsigned long)(n))&0x3FFF)<<0)
+#define DDR0_28_EMRS2_DATA_DECODE(n) ((((unsigned long)(n))>>0)&0x3FFF)
+
+#define DDR0_29 0x1D
+
+#define DDR0_30 0x1E
+
+#define DDR0_31 0x1F
+#define DDR0_31_XOR_CHECK_BITS_MASK 0x0000FFFF
+#define DDR0_31_XOR_CHECK_BITS_ENCODE(n) ((((unsigned long)(n))&0xFFFF)<<0)
+#define DDR0_31_XOR_CHECK_BITS_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFF)
+
+#define DDR0_32 0x20
+#define DDR0_32_OUT_OF_RANGE_ADDR_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_32_OUT_OF_RANGE_ADDR_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_32_OUT_OF_RANGE_ADDR_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_33 0x21
+#define DDR0_33_OUT_OF_RANGE_ADDR_MASK 0x00000001 /* Read only */
+#define DDR0_33_OUT_OF_RANGE_ADDR_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_33_OUT_OF_RANGE_ADDR_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_34 0x22
+#define DDR0_34_ECC_U_ADDR_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_34_ECC_U_ADDR_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_34_ECC_U_ADDR_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_35 0x23
+#define DDR0_35_ECC_U_ADDR_MASK 0x00000001 /* Read only */
+#define DDR0_35_ECC_U_ADDR_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_35_ECC_U_ADDR_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_36 0x24
+#define DDR0_36_ECC_U_DATA_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_36_ECC_U_DATA_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_36_ECC_U_DATA_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_37 0x25
+#define DDR0_37_ECC_U_DATA_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_37_ECC_U_DATA_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_37_ECC_U_DATA_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_38 0x26
+#define DDR0_38_ECC_C_ADDR_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_38_ECC_C_ADDR_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_38_ECC_C_ADDR_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_39 0x27
+#define DDR0_39_ECC_C_ADDR_MASK 0x00000001 /* Read only */
+#define DDR0_39_ECC_C_ADDR_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_39_ECC_C_ADDR_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_40 0x28
+#define DDR0_40_ECC_C_DATA_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_40_ECC_C_DATA_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_40_ECC_C_DATA_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_41 0x29
+#define DDR0_41_ECC_C_DATA_MASK 0xFFFFFFFF /* Read only */
+#define DDR0_41_ECC_C_DATA_ENCODE(n) ((((unsigned long)(n))&0xFFFFFFFF)<<0)
+#define DDR0_41_ECC_C_DATA_DECODE(n) ((((unsigned long)(n))>>0)&0xFFFFFFFF)
+
+#define DDR0_42 0x2A
+#define DDR0_42_ADDR_PINS_MASK 0x07000000
+#define DDR0_42_ADDR_PINS_ENCODE(n) ((((unsigned long)(n))&0x7)<<24)
+#define DDR0_42_ADDR_PINS_DECODE(n) ((((unsigned long)(n))>>24)&0x7)
+#define DDR0_42_CASLAT_LIN_GATE_MASK 0x0000000F
+#define DDR0_42_CASLAT_LIN_GATE_ENCODE(n) ((((unsigned long)(n))&0xF)<<0)
+#define DDR0_42_CASLAT_LIN_GATE_DECODE(n) ((((unsigned long)(n))>>0)&0xF)
+
+#define DDR0_43 0x2B
+#define DDR0_43_TWR_MASK 0x07000000
+#define DDR0_43_TWR_ENCODE(n) ((((unsigned long)(n))&0x7)<<24)
+#define DDR0_43_TWR_DECODE(n) ((((unsigned long)(n))>>24)&0x7)
+#define DDR0_43_APREBIT_MASK 0x000F0000
+#define DDR0_43_APREBIT_ENCODE(n) ((((unsigned long)(n))&0xF)<<16)
+#define DDR0_43_APREBIT_DECODE(n) ((((unsigned long)(n))>>16)&0xF)
+#define DDR0_43_COLUMN_SIZE_MASK 0x00000700
+#define DDR0_43_COLUMN_SIZE_ENCODE(n) ((((unsigned long)(n))&0x7)<<8)
+#define DDR0_43_COLUMN_SIZE_DECODE(n) ((((unsigned long)(n))>>8)&0x7)
+#define DDR0_43_EIGHT_BANK_MODE_MASK 0x00000001
+#define DDR0_43_EIGHT_BANK_MODE_8_BANKS 0x00000001
+#define DDR0_43_EIGHT_BANK_MODE_4_BANKS 0x00000000
+#define DDR0_43_EIGHT_BANK_MODE_ENCODE(n) ((((unsigned long)(n))&0x1)<<0)
+#define DDR0_43_EIGHT_BANK_MODE_DECODE(n) ((((unsigned long)(n))>>0)&0x1)
+
+#define DDR0_44 0x2C
+#define DDR0_44_TRCD_MASK 0x000000FF
+#define DDR0_44_TRCD_ENCODE(n) ((((unsigned long)(n))&0xFF)<<0)
+#define DDR0_44_TRCD_DECODE(n) ((((unsigned long)(n))>>0)&0xFF)
+
+#endif /* _SPD_SDRAM_DENALI_H_ */
diff --git a/board/lwmon5/u-boot.lds b/board/lwmon5/u-boot.lds
new file mode 100644
index 0000000..a423f98
--- /dev/null
+++ b/board/lwmon5/u-boot.lds
@@ -0,0 +1,145 @@
+/*
+ * (C) Copyright 2002
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ .resetvec 0xFFFFFFFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ .bootpg 0xFFFFF000 :
+ {
+ cpu/ppc4xx/start.o (.bootpg)
+ } = 0xffff
+
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/ppc4xx/start.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+
+ ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
+
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/m5271evb/Makefile b/board/m5271evb/Makefile
index 424ab1c..2ec71ee 100644
--- a/board/m5271evb/Makefile
+++ b/board/m5271evb/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o
+COBJS = $(BOARD).o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/m5271evb/m5271evb.c b/board/m5271evb/m5271evb.c
index c26c91d..9caad63 100644
--- a/board/m5271evb/m5271evb.c
+++ b/board/m5271evb/m5271evb.c
@@ -22,8 +22,7 @@
*/
#include <common.h>
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
+#include <asm/immap.h>
int checkboard (void) {
puts ("Board: Freescale M5271EVB\n");
diff --git a/board/m5271evb/mii.c b/board/m5271evb/mii.c
new file mode 100644
index 0000000..3830ce7
--- /dev/null
+++ b/board/m5271evb/mii.c
@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ if (setclear) {
+ /* Enable Ethernet pins */
+ mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
+ } else {
+ }
+
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+#define PHY_ID_KS8721BL 0x00221619 /* Micrel KS8721BL/SL */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+#define STR_ID_KS8721BL "KS8721BL"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ strcpy(info->phy_name,
+ STR_ID_KS8721BL);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ printf(STR_ID_KS8721BL);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/m5272c3/Makefile b/board/m5272c3/Makefile
index cf07cf4..be704b7 100644
--- a/board/m5272c3/Makefile
+++ b/board/m5272c3/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o
+COBJS = $(BOARD).o flash.o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/m5272c3/m5272c3.c b/board/m5272c3/m5272c3.c
index 0dfeaf2..6dcda4f 100644
--- a/board/m5272c3/m5272c3.c
+++ b/board/m5272c3/m5272c3.c
@@ -22,18 +22,17 @@
*/
#include <common.h>
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
+#include <asm/immap.h>
int checkboard (void) {
puts ("Board: ");
- puts("MOTOROLA MCF5272C3 EVB\n");
+ puts ("Freescale MCF5272C3 EVB\n");
return 0;
};
long int initdram (int board_type) {
- volatile sdramctrl_t * sdp = (sdramctrl_t *)(CFG_MBAR + MCFSIM_SDCR);
+ volatile sdramctrl_t * sdp = (sdramctrl_t *)(MMAP_SDRAM);
sdp->sdram_sdtr = 0xf539;
sdp->sdram_sdcr = 0x4211;
diff --git a/board/m5272c3/mii.c b/board/m5272c3/mii.c
new file mode 100644
index 0000000..0ecc44a
--- /dev/null
+++ b/board/m5272c3/mii.c
@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ if (setclear) {
+ gpio->gpio_pbcnt |= GPIO_PBCNT_E_MDC | GPIO_PBCNT_E_RXER | GPIO_PBCNT_E_RXD1 | GPIO_PBCNT_E_RXD2 | GPIO_PBCNT_E_RXD3 | GPIO_PBCNT_E_TXD1 | GPIO_PBCNT_E_TXD2 | GPIO_PBCNT_E_TXD3;
+ } else {
+ }
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_AMD79C874VC 0x0022561B /* AMD 79C874 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_AMD79C874VC "AMD79C874VC"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ strcpy(info->phy_name,
+ STR_ID_AMD79C874VC);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ printf(STR_ID_AMD79C874VC);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/m5282evb/Makefile b/board/m5282evb/Makefile
index cf07cf4..2ec71ee 100644
--- a/board/m5282evb/Makefile
+++ b/board/m5282evb/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o flash.o
+COBJS = $(BOARD).o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/m5282evb/config.mk b/board/m5282evb/config.mk
index 8484307..0aa2361 100644
--- a/board/m5282evb/config.mk
+++ b/board/m5282evb/config.mk
@@ -22,4 +22,4 @@
# MA 02111-1307 USA
#
-TEXT_BASE = 0x20000
+TEXT_BASE = 0xFFE00000
diff --git a/board/m5282evb/flash.c b/board/m5282evb/flash.c
deleted file mode 100644
index 36a7c31..0000000
--- a/board/m5282evb/flash.c
+++ /dev/null
@@ -1,378 +0,0 @@
-/*
- * (C) Copyright 2000-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#define PHYS_FLASH_1 CFG_FLASH_BASE
-#define FLASH_BANK_SIZE 0x200000
-
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
-
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case (AMD_MANUFACT & FLASH_VENDMASK):
- printf ("AMD: ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case (AMD_ID_PL160CB & FLASH_TYPEMASK):
- printf ("AM29PL160CB (16Mbit)\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- goto Done;
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; i++) {
- if ((i % 5) == 0) {
- printf ("\n ");
- }
- printf (" %08lX%s", info->start[i],
- info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
-
- Done:
- return;
-}
-
-
-unsigned long flash_init (void)
-{
- int i, j;
- ulong size = 0;
-
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- ulong flashbase = 0;
-
- flash_info[i].flash_id =
- (AMD_MANUFACT & FLASH_VENDMASK) |
- (AMD_ID_PL160CB & FLASH_TYPEMASK);
- flash_info[i].size = FLASH_BANK_SIZE;
- flash_info[i].sector_count = CFG_MAX_FLASH_SECT;
- memset (flash_info[i].protect, 0, CFG_MAX_FLASH_SECT);
- if (i == 0)
- flashbase = PHYS_FLASH_1;
- else
- panic ("configured to many flash banks!\n");
-
- for (j = 0; j < flash_info[i].sector_count; j++) {
- if (j == 0) {
- /* 1st is 16 KiB */
- flash_info[i].start[j] = flashbase;
- }
- if ((j >= 1) && (j <= 2)) {
- /* 2nd and 3rd are 8 KiB */
- flash_info[i].start[j] =
- flashbase + 0x4000 + 0x2000 * (j - 1);
- }
- if (j == 3) {
- /* 4th is 32 KiB */
- flash_info[i].start[j] = flashbase + 0x8000;
- }
- if ((j >= 4) && (j <= 34)) {
- /* rest is 256 KiB */
- flash_info[i].start[j] =
- flashbase + 0x10000 + 0x10000 * (j -
- 4);
- }
- }
- size += flash_info[i].size;
- }
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + 0xffff, &flash_info[0]);
-
- return size;
-}
-
-
-#define CMD_READ_ARRAY 0x00F0
-#define CMD_UNLOCK1 0x00AA
-#define CMD_UNLOCK2 0x0055
-#define CMD_ERASE_SETUP 0x0080
-#define CMD_ERASE_CONFIRM 0x0030
-#define CMD_PROGRAM 0x00A0
-#define CMD_UNLOCK_BYPASS 0x0020
-
-#define MEM_FLASH_ADDR1 (*(volatile u16 *)(CFG_FLASH_BASE + (0x00000555<<1)))
-#define MEM_FLASH_ADDR2 (*(volatile u16 *)(CFG_FLASH_BASE + (0x000002AA<<1)))
-
-#define BIT_ERASE_DONE 0x0080
-#define BIT_RDY_MASK 0x0080
-#define BIT_PROGRAM_ERROR 0x0020
-#define BIT_TIMEOUT 0x80000000 /* our flag */
-
-#define READY 1
-#define ERR 2
-#define TMO 4
-
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- ulong result;
- int iflag, cflag, prot, sect;
- int rc = ERR_OK;
- int chip1;
-
- /* first look for protection bits */
-
- if (info->flash_id == FLASH_UNKNOWN)
- return ERR_UNKNOWN_FLASH_TYPE;
-
- if ((s_first < 0) || (s_first > s_last)) {
- return ERR_INVAL;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) !=
- (AMD_MANUFACT & FLASH_VENDMASK)) {
- return ERR_UNKNOWN_FLASH_VENDOR;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
- if (prot)
- return ERR_PROTECTED;
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- printf ("\n");
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last && !ctrlc (); sect++) {
- printf ("Erasing sector %2d ... ", sect);
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- if (info->protect[sect] == 0) { /* not protected */
- volatile u16 *addr =
- (volatile u16 *) (info->start[sect]);
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_ERASE_SETUP;
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- *addr = CMD_ERASE_CONFIRM;
-
- /* wait until flash is ready */
- chip1 = 0;
-
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
- chip1 = TMO;
- break;
- }
-
- if (!chip1
- && (result & 0xFFFF) & BIT_ERASE_DONE)
- chip1 = READY;
-
- } while (!chip1);
-
- MEM_FLASH_ADDR1 = CMD_READ_ARRAY;
-
- if (chip1 == ERR) {
- rc = ERR_PROG_ERROR;
- goto outahere;
- }
- if (chip1 == TMO) {
- rc = ERR_TIMOUT;
- goto outahere;
- }
-
- printf ("ok.\n");
- } else { /* it was protected */
-
- printf ("protected!\n");
- }
- }
-
- if (ctrlc ())
- printf ("User Interrupt!\n");
-
- outahere:
- /* allow flash to settle - wait 10 ms */
- udelay (10000);
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-static int write_word (flash_info_t * info, ulong dest, ulong data)
-{
- volatile u16 *addr = (volatile u16 *) dest;
- ulong result;
- int rc = ERR_OK;
- int cflag, iflag;
- int chip1;
-
- /*
- * Check if Flash is (sufficiently) erased
- */
- result = *addr;
- if ((result & data) != data)
- return ERR_NOT_ERASED;
-
-
- /*
- * Disable interrupts which might cause a timeout
- * here. Remember that our exception vectors are
- * at address 0 in the flash, and we don't want a
- * (ticker) exception to happen while the flash
- * chip is in programming mode.
- */
-
- cflag = icache_status ();
- icache_disable ();
- iflag = disable_interrupts ();
-
- MEM_FLASH_ADDR1 = CMD_UNLOCK1;
- MEM_FLASH_ADDR2 = CMD_UNLOCK2;
- MEM_FLASH_ADDR1 = CMD_PROGRAM;
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- set_timer (0);
-
- /* wait until flash is ready */
- chip1 = 0;
- do {
- result = *addr;
-
- /* check timeout */
- if (get_timer (0) > CFG_FLASH_ERASE_TOUT) {
- chip1 = ERR | TMO;
- break;
- }
- if (!chip1 && ((result & 0x80) == (data & 0x80)))
- chip1 = READY;
-
- } while (!chip1);
-
- *addr = CMD_READ_ARRAY;
-
- if (chip1 == ERR || *addr != data)
- rc = ERR_PROG_ERROR;
-
- if (iflag)
- enable_interrupts ();
-
- if (cflag)
- icache_enable ();
-
- return rc;
-}
-
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong wp, data;
- int rc;
-
- if (addr & 1) {
- printf ("unaligned destination not supported\n");
- return ERR_ALIGN;
- }
-
-#if 0
- if (cnt & 1) {
- printf ("odd transfer sizes not supported\n");
- return ERR_ALIGN;
- }
-#endif
-
- wp = addr;
-
- if (addr & 1) {
- data = (*((volatile u8 *) addr) << 8) | *((volatile u8 *)
- src);
- if ((rc = write_word (info, wp - 1, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- while (cnt >= 2) {
- data = *((volatile u16 *) src);
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 2;
- wp += 2;
- cnt -= 2;
- }
-
- if (cnt == 1) {
- data = (*((volatile u8 *) src) << 8) |
- *((volatile u8 *) (wp + 1));
- if ((rc = write_word (info, wp, data)) != 0) {
- return (rc);
- }
- src += 1;
- wp += 1;
- cnt -= 1;
- }
-
- return ERR_OK;
-}
diff --git a/board/m5282evb/m5282evb.c b/board/m5282evb/m5282evb.c
index a08af68..243d6a4 100644
--- a/board/m5282evb/m5282evb.c
+++ b/board/m5282evb/m5282evb.c
@@ -22,14 +22,71 @@
*/
#include <common.h>
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
int checkboard (void)
{
- puts ("MOTOROLA M5272EVB Evaluation Board\n");
+ puts ("Board: Freescale M5282EVB Evaluation Board\n");
return 0;
}
long int initdram (int board_type)
{
- return 0x1000000;
+ u32 dramsize, i, dramclk;
+
+ dramsize = CFG_SDRAM_SIZE * 0x100000;
+ for (i = 0x13; i < 0x20; i++) {
+ if (dramsize == (1 << i))
+ break;
+ }
+ i--;
+
+ if (!(MCFSDRAMC_DACR0 & MCFSDRAMC_DACR_RE))
+ {
+ dramclk = gd->bus_clk / (CFG_HZ * CFG_HZ);
+
+ /* Initialize DRAM Control Register: DCR */
+ MCFSDRAMC_DCR = (0
+ | MCFSDRAMC_DCR_RTIM_6
+ | MCFSDRAMC_DCR_RC((15 * dramclk)>>4));
+
+ /* Initialize DACR0 */
+ MCFSDRAMC_DACR0 = (0
+ | MCFSDRAMC_DACR_BASE(CFG_SDRAM_BASE)
+ | MCFSDRAMC_DACR_CASL(1)
+ | MCFSDRAMC_DACR_CBM(3)
+ | MCFSDRAMC_DACR_PS_32);
+
+ /* Initialize DMR0 */
+ MCFSDRAMC_DMR0 = (0
+ | ((dramsize - 1) & 0xFFFC0000)
+ | MCFSDRAMC_DMR_V);
+
+ /* Set IP (bit 3) in DACR */
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IP;
+
+ /* Wait 30ns to allow banks to precharge */
+ for (i = 0; i < 5; i++) {
+ asm ("nop");
+ }
+
+ /* Write to this block to initiate precharge */
+ *(u32 *)(CFG_SDRAM_BASE) = 0xA5A59696;
+
+ /* Set RE (bit 15) in DACR */
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_RE;
+
+ /* Wait for at least 8 auto refresh cycles to occur */
+ for (i = 0; i < 2000; i++) {
+ asm(" nop");
+ }
+
+ /* Finish the configuration by issuing the IMRS. */
+ MCFSDRAMC_DACR0 |= MCFSDRAMC_DACR_IMRS;
+
+ /* Write to the SDRAM Mode Register */
+ *(u32 *)(CFG_SDRAM_BASE + 0x400) = 0xA5A59696;
+ }
}
diff --git a/board/m5282evb/mii.c b/board/m5282evb/mii.c
new file mode 100644
index 0000000..d7c6d1f
--- /dev/null
+++ b/board/m5282evb/mii.c
@@ -0,0 +1,304 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ if (setclear) {
+ MCFGPIO_PASPAR |= 0x0F00;
+ MCFGPIO_PEHLPAR = CFG_PEHLPAR;
+ } else {
+ MCFGPIO_PASPAR &= 0xF0FF;
+ MCFGPIO_PEHLPAR &= ~CFG_PEHLPAR;
+ }
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_AMD79C874VC 0x0022561B /* AMD 79C874 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_AMD79C874VC "AMD79C874VC"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ strcpy(info->phy_name,
+ STR_ID_AMD79C874VC);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_AMD79C874VC:
+ printf(STR_ID_AMD79C874VC);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+void mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/mbx8xx/pcmcia.c b/board/mbx8xx/pcmcia.c
index 132a688..a02c848 100644
--- a/board/mbx8xx/pcmcia.c
+++ b/board/mbx8xx/pcmcia.c
@@ -6,11 +6,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -156,11 +156,11 @@
return (0);
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable (int slot)
{
return 0; /* No hardware to disable */
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
#endif /* CONFIG_PCMCIA */
diff --git a/board/mcc200/auto_update.c b/board/mcc200/auto_update.c
index 90d03ec..28e4c87 100644
--- a/board/mcc200/auto_update.c
+++ b/board/mcc200/auto_update.c
@@ -44,8 +44,8 @@
#error "must define CFG_HUSH_PARSER"
#endif
-#if !(CONFIG_COMMANDS & CFG_CMD_FAT)
-#error "must define CFG_CMD_FAT"
+#if !defined(CONFIG_CMD_FAT)
+#error "must define CONFIG_CMD_FAT"
#endif
#undef AU_DEBUG
@@ -330,6 +330,8 @@
int i, res = 0, bitmap_first, cnt, old_ctrlc, got_ctrlc;
char *env;
long start, end;
+
+#if 0 /* disable key-press detection to speed up boot-up time */
uchar keypad_status1[2] = {0,0}, keypad_status2[2] = {0,0};
/*
@@ -347,6 +349,7 @@
return 0;
}
+#endif
au_usb_stor_curr_dev = -1;
/* start USB */
if (usb_stop() < 0) {
@@ -364,18 +367,21 @@
au_usb_stor_curr_dev = usb_stor_scan(0);
if (au_usb_stor_curr_dev == -1) {
debug ("No device found. Not initialized?\n");
- return -1;
+ res = -1;
+ goto xit;
}
/* check whether it has a partition table */
stor_dev = get_dev("usb", 0);
if (stor_dev == NULL) {
debug ("uknown device type\n");
- return -1;
+ res = -1;
+ goto xit;
}
if (fat_register_device(stor_dev, 1) != 0) {
debug ("Unable to use USB %d:%d for fatls\n",
au_usb_stor_curr_dev, 1);
- return -1;
+ res = -1;
+ goto xit;
}
if (file_fat_detectfs() != 0) {
debug ("file_fat_detectfs failed\n");
@@ -504,7 +510,7 @@
} while (res < 0);
#endif
}
- usb_stop();
+
/* restore the old state */
disable_ctrlc(old_ctrlc);
#ifdef CONFIG_PROGRESSBAR
@@ -517,6 +523,8 @@
lcd_enable();
}
#endif
- return 0;
+ xit:
+ usb_stop();
+ return res;
}
#endif /* CONFIG_AUTO_UPDATE */
diff --git a/board/mcc200/mcc200.c b/board/mcc200/mcc200.c
index af047e2..a4c4644 100644
--- a/board/mcc200/mcc200.c
+++ b/board/mcc200/mcc200.c
@@ -307,7 +307,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -320,9 +320,9 @@
debug ("ide_reset(%d)\n", idereset);
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/mcc200/u-boot.lds b/board/mcc200/u-boot.lds
deleted file mode 100644
index 4fdea6b..0000000
--- a/board/mcc200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ml2/serial.c b/board/ml2/serial.c
index 74687f1..6593145 100644
--- a/board/ml2/serial.c
+++ b/board/ml2/serial.c
@@ -88,7 +88,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void kgdb_serial_init (void)
{
}
@@ -112,4 +112,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/motionpro/motionpro.c b/board/motionpro/motionpro.c
index d60d233..f83998e 100644
--- a/board/motionpro/motionpro.c
+++ b/board/motionpro/motionpro.c
@@ -28,7 +28,12 @@
#include <common.h>
#include <mpc5xxx.h>
+#include <miiphy.h>
+#include <libfdt.h>
+#if defined(CONFIG_STATUS_LED)
+#include <status_led.h>
+#endif /* CONFIG_STATUS_LED */
/* Kollmorgen DPR initialization data */
struct init_elem {
@@ -75,11 +80,27 @@
}
+/*
+ * Additional PHY intialization. After being reset in mpc5xxx_fec_init_phy(),
+ * PHY goes into FX mode. To take it out of the FX mode and switch into
+ * desired TX operation, one needs to clear the FX_SEL bit of Mode Control
+ * Register.
+ */
+void reset_phy(void)
+{
+ unsigned short mode_control;
+
+ miiphy_read("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15, &mode_control);
+ miiphy_write("FEC ETHERNET", CONFIG_PHY_ADDR, 0x15,
+ mode_control & 0xfffe);
+ return;
+}
+
#ifndef CFG_RAMBOOT
/*
* Helper function to initialize SDRAM controller.
*/
-static void sdram_start (int hi_addr)
+static void sdram_start(int hi_addr)
{
long hi_addr_bit = hi_addr ? 0x01000000 : 0;
@@ -111,7 +132,7 @@
/*
* Initalize SDRAM - configure SDRAM controller, detect memory size.
*/
-long int initdram (int board_type)
+long int initdram(int board_type)
{
ulong dramsize = 0;
#ifndef CFG_RAMBOOT
@@ -165,8 +186,43 @@
}
-int checkboard (void)
+int checkboard(void)
{
- puts("Board: Promess Motion-PRO board\n");
+ uchar rev = *(vu_char *)CPLD_REV_REGISTER;
+ printf("Board: Promess Motion-PRO board (CPLD rev. 0x%02x)\n", rev);
return 0;
}
+
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
+
+
+#if defined(CONFIG_STATUS_LED)
+void __led_init(led_id_t regaddr, int state)
+{
+ *((vu_long *) regaddr) |= ENABLE_GPIO_OUT;
+
+ if (state == STATUS_LED_ON)
+ *((vu_long *) regaddr) |= LED_ON;
+ else
+ *((vu_long *) regaddr) &= ~LED_ON;
+}
+
+void __led_set(led_id_t regaddr, int state)
+{
+ if (state == STATUS_LED_ON)
+ *((vu_long *) regaddr) |= LED_ON;
+ else
+ *((vu_long *) regaddr) &= ~LED_ON;
+}
+
+void __led_toggle(led_id_t regaddr)
+{
+ *((vu_long *) regaddr) ^= LED_ON;
+}
+#endif /* CONFIG_STATUS_LED */
diff --git a/board/mousse/config.mk b/board/mousse/config.mk
index 64cffa4..933e6b3 100644
--- a/board/mousse/config.mk
+++ b/board/mousse/config.mk
@@ -26,3 +26,5 @@
#
TEXT_BASE = 0xFFF00000
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE)
+
+LDSCRIPT := $(SRCTREE)/board/mousse/u-boot.lds
diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds
index 57358b8..eb4d8e4 100644
--- a/board/mousse/u-boot.lds
+++ b/board/mousse/u-boot.lds
@@ -60,7 +60,6 @@
lib_generic/crc32.o (.text)
lib_generic/zlib.o (.text)
- *(.fixup)
*(.got1)
. = ALIGN(16);
*(.rodata)
diff --git a/board/mp2usb/mp2usb.c b/board/mp2usb/mp2usb.c
index 486d44c..dcda699 100644
--- a/board/mp2usb/mp2usb.c
+++ b/board/mp2usb/mp2usb.c
@@ -61,7 +61,7 @@
}
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -81,5 +81,5 @@
p_phyops->AutoNegotiate = dm9161_AutoNegotiate;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/board/mpc7448hpc2/mpc7448hpc2.c b/board/mpc7448hpc2/mpc7448hpc2.c
index 63c99de..81846eb 100644
--- a/board/mpc7448hpc2/mpc7448hpc2.c
+++ b/board/mpc7448hpc2/mpc7448hpc2.c
@@ -38,6 +38,8 @@
#undef DEBUG
+DECLARE_GLOBAL_DATA_PTR;
+
extern void flush_data_cache (void);
extern void invalidate_l1_instruction_cache (void);
extern void tsi108_init_f (void);
@@ -46,8 +48,6 @@
void after_reloc (ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/*
* Jump to the main U-Boot board init code
*/
diff --git a/board/mpc7448hpc2/tsi108_init.c b/board/mpc7448hpc2/tsi108_init.c
index 8a7efef..30ae17d 100644
--- a/board/mpc7448hpc2/tsi108_init.c
+++ b/board/mpc7448hpc2/tsi108_init.c
@@ -33,6 +33,8 @@
#include <asm/processor.h>
#include <tsi108.h>
+DECLARE_GLOBAL_DATA_PTR;
+
extern void mpicInit (int verbose);
/*
@@ -141,7 +143,6 @@
int board_early_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong i;
gd->mem_clk = 0;
@@ -583,7 +584,6 @@
int misc_init_r (void)
{
- DECLARE_GLOBAL_DATA_PTR;
#ifdef CFG_CLK_SPREAD /* Initialize Spread-Spectrum Clock generation */
ulong i;
diff --git a/board/mpc8260ads/u-boot.lds b/board/mpc8260ads/u-boot.lds
deleted file mode 100644
index bf8048d..0000000
--- a/board/mpc8260ads/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2003
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8266ads/u-boot.lds b/board/mpc8266ads/u-boot.lds
deleted file mode 100644
index 2220758..0000000
--- a/board/mpc8266ads/u-boot.lds
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpc832xemds/mpc832xemds.c b/board/mpc832xemds/mpc832xemds.c
deleted file mode 100644
index 772da67..0000000
--- a/board/mpc832xemds/mpc832xemds.c
+++ /dev/null
@@ -1,176 +0,0 @@
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- *
- * Dave Liu <daveliu@freescale.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#include <command.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#else
-#include <asm/mmu.h>
-#endif
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-
-const qe_iop_conf_t qe_iop_conf_tab[] = {
- /* ETH3 */
- {1, 0, 1, 0, 1}, /* TxD0 */
- {1, 1, 1, 0, 1}, /* TxD1 */
- {1, 2, 1, 0, 1}, /* TxD2 */
- {1, 3, 1, 0, 1}, /* TxD3 */
- {1, 9, 1, 0, 1}, /* TxER */
- {1, 12, 1, 0, 1}, /* TxEN */
- {3, 24, 2, 0, 1}, /* TxCLK->CLK10 */
-
- {1, 4, 2, 0, 1}, /* RxD0 */
- {1, 5, 2, 0, 1}, /* RxD1 */
- {1, 6, 2, 0, 1}, /* RxD2 */
- {1, 7, 2, 0, 1}, /* RxD3 */
- {1, 8, 2, 0, 1}, /* RxER */
- {1, 10, 2, 0, 1}, /* RxDV */
- {0, 13, 2, 0, 1}, /* RxCLK->CLK9 */
- {1, 11, 2, 0, 1}, /* COL */
- {1, 13, 2, 0, 1}, /* CRS */
-
- /* ETH4 */
- {1, 18, 1, 0, 1}, /* TxD0 */
- {1, 19, 1, 0, 1}, /* TxD1 */
- {1, 20, 1, 0, 1}, /* TxD2 */
- {1, 21, 1, 0, 1}, /* TxD3 */
- {1, 27, 1, 0, 1}, /* TxER */
- {1, 30, 1, 0, 1}, /* TxEN */
- {3, 6, 2, 0, 1}, /* TxCLK->CLK8 */
-
- {1, 22, 2, 0, 1}, /* RxD0 */
- {1, 23, 2, 0, 1}, /* RxD1 */
- {1, 24, 2, 0, 1}, /* RxD2 */
- {1, 25, 2, 0, 1}, /* RxD3 */
- {1, 26, 1, 0, 1}, /* RxER */
- {1, 28, 2, 0, 1}, /* Rx_DV */
- {3, 31, 2, 0, 1}, /* RxCLK->CLK7 */
- {1, 29, 2, 0, 1}, /* COL */
- {1, 31, 2, 0, 1}, /* CRS */
-
- {3, 4, 3, 0, 2}, /* MDIO */
- {3, 5, 1, 0, 2}, /* MDC */
-
- {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
-};
-
-int board_early_init_f(void)
-{
- volatile u8 *bcsr = (volatile u8 *)CFG_BCSR;
-
- /* Enable flash write */
- bcsr[9] &= ~0x08;
-
- return 0;
-}
-
-int fixed_sdram(void);
-
-long int initdram(int board_type)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- u32 msize = 0;
-
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
- return -1;
-
- /* DDR SDRAM - Main SODIMM */
- im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
-
- msize = fixed_sdram();
-
- puts("\n DDR RAM: ");
-
- /* return total bus SDRAM size(bytes) -- DDR */
- return (msize * 1024 * 1024);
-}
-
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- u32 msize = 0;
- u32 ddr_size;
- u32 ddr_size_log2;
-
- msize = CFG_DDR_SIZE;
- for (ddr_size = msize << 20, ddr_size_log2 = 0;
- (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
- if (ddr_size & 1) {
- return -1;
- }
- }
- im->sysconf.ddrlaw[0].ar =
- LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-#if (CFG_DDR_SIZE != 128)
-#warning Currenly any ddr size other than 128 is not supported
-#endif
- im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
- im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
- im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
- im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
- im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
- im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
- im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
- im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
- im->ddr.sdram_mode = CFG_DDR_MODE;
- im->ddr.sdram_mode2 = CFG_DDR_MODE2;
- im->ddr.sdram_interval = CFG_DDR_INTERVAL;
- __asm__ __volatile__ ("sync");
- udelay(200);
-
- im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
- __asm__ __volatile__ ("sync");
- return msize;
-}
-
-int checkboard(void)
-{
- puts("Board: Freescale MPC832XEMDS\n");
- return 0;
-}
-
-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
-#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
-#endif
- ft_cpu_setup(blob, bd);
-
- p = ft_get_prop(blob, "/memory/reg", &len);
- if (p != NULL) {
- *p++ = cpu_to_be32(bd->bi_memstart);
- *p = cpu_to_be32(bd->bi_memsize);
- }
-}
-#endif
diff --git a/board/mpc832xemds/pci.c b/board/mpc832xemds/pci.c
deleted file mode 100644
index d0a407a..0000000
--- a/board/mpc832xemds/pci.c
+++ /dev/null
@@ -1,316 +0,0 @@
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-/*
- * PCI Configuration space access support for MPC83xx PCI Bridge
- */
-#include <asm/mmu.h>
-#include <asm/io.h>
-#include <common.h>
-#include <pci.h>
-#include <i2c.h>
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-
-#include <asm/fsl_i2c.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_PCI)
-#define PCI_FUNCTION_CONFIG 0x44
-#define PCI_FUNCTION_CFG_LOCK 0x20
-
-/*
- * Initialize PCI Devices, report devices found
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc83xxemds_config_table[] = {
- {
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- pci_cfgfunc_config_device,
- {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMON_MEMORY | PCI_COMMAND_MASTER}
- },
- {}
-}
-#endif
-static struct pci_controller hose[] = {
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc83xxemds_config_table,
-#endif
- },
-};
-
-/**********************************************************************
- * pci_init_board()
- *********************************************************************/
-void pci_init_board(void)
-#ifdef CONFIG_PCISLAVE
-{
- u16 reg16;
- volatile immap_t *immr;
- volatile law83xx_t *pci_law;
- volatile pot83xx_t *pci_pot;
- volatile pcictrl83xx_t *pci_ctrl;
- volatile pciconf83xx_t *pci_conf;
-
- immr = (immap_t *) CFG_IMMR;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
- /*
- * Configure PCI Inbound Translation Windows
- */
- pci_ctrl[0].pitar0 = 0x0;
- pci_ctrl[0].pibar0 = 0x0;
- pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
- PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
-
- pci_ctrl[0].pitar1 = 0x0;
- pci_ctrl[0].pibar1 = 0x0;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 &= ~PIWAR_EN;
-
- pci_ctrl[0].pitar2 = 0x0;
- pci_ctrl[0].pibar2 = 0x0;
- pci_ctrl[0].piebar2 = 0x0;
- pci_ctrl[0].piwar2 &= ~PIWAR_EN;
-
- hose[0].first_busno = 0;
- hose[0].last_busno = 0xff;
- pci_setup_indirect(&hose[0],
- (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
- reg16 = 0xff;
-
- pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(&hose[0], PCI_BDF(0, 0, 0),
- PCI_LATENCY_TIMER, 0x80);
-
- /*
- * Unlock configuration lock in PCI function configuration register.
- */
- pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_FUNCTION_CONFIG, ®16);
- reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
- pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_FUNCTION_CONFIG, reg16);
-
- printf("Enabled PCI 32bit Agent Mode\n");
-}
-#else
-{
- volatile immap_t *immr;
- volatile clk83xx_t *clk;
- volatile law83xx_t *pci_law;
- volatile pot83xx_t *pci_pot;
- volatile pcictrl83xx_t *pci_ctrl;
- volatile pciconf83xx_t *pci_conf;
-
- u8 val8, orig_i2c_bus;
- u16 reg16;
- u32 val32;
- u32 dev;
-
- immr = (immap_t *) CFG_IMMR;
- clk = (clk83xx_t *) & immr->clk;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
- /*
- * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
- */
- val32 = clk->occr;
- udelay(2000);
-#if defined(PCI_66M)
- clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
- printf("PCI clock is 66MHz\n");
-#elif defined(PCI_33M)
- clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
- OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
- printf("PCI clock is 33MHz\n");
-#else
- clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
- printf("PCI clock is 66MHz\n");
-#endif
- udelay(2000);
-
- /*
- * Configure PCI Local Access Windows
- */
- pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
-
- pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI mem space - prefetch */
- pci_pot[0].potar = (CFG_PCI_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[0].pobar = (CFG_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[0].pocmr =
- POCMR_EN | POCMR_SE | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /* PCI mmio - non-prefetch mem space */
- pci_pot[1].potar = (CFG_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[1].pobar = (CFG_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[1].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /* PCI IO space */
- pci_pot[2].potar = (CFG_PCI_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[2].pobar = (CFG_PCI_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[2].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
-
- /*
- * Configure PCI Inbound Translation Windows
- */
- pci_ctrl[0].pitar1 = (CFG_PCI_SLV_MEM_LOCAL >> 12) & PITAR_TA_MASK;
- pci_ctrl[0].pibar1 = (CFG_PCI_SLV_MEM_BUS >> 12) & PIBAR_MASK;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 =
- PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP |
- PIWAR_IWS_2G;
-
- /*
- * Assign PIB PMC slot to desired PCI bus
- */
-
- /* Switch temporarily to I2C bus #2 */
- orig_i2c_bus = i2c_get_bus_num();
- i2c_set_bus_num(1);
-
- val8 = 0;
- i2c_write(0x23, 0x6, 1, &val8, 1);
- i2c_write(0x23, 0x7, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x23, 0x2, 1, &val8, 1);
- i2c_write(0x23, 0x3, 1, &val8, 1);
-
- val8 = 0;
- i2c_write(0x26, 0x6, 1, &val8, 1);
- val8 = 0x34;
- i2c_write(0x26, 0x7, 1, &val8, 1);
-
- val8 = 0xf9; /* PMC2, PMC3 slot to PCI bus */
- i2c_write(0x26, 0x2, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x26, 0x3, 1, &val8, 1);
-
- val8 = 0;
- i2c_write(0x27, 0x6, 1, &val8, 1);
- i2c_write(0x27, 0x7, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x27, 0x2, 1, &val8, 1);
- val8 = 0xef;
- i2c_write(0x27, 0x3, 1, &val8, 1);
- asm("eieio");
-
- /* Reset to original I2C bus */
- i2c_set_bus_num(orig_i2c_bus);
-
- /*
- * Release PCI RST Output signal
- */
- udelay(2000);
- pci_ctrl[0].gcr = 1;
- udelay(2000);
-
- hose[0].first_busno = 0;
- hose[0].last_busno = 0xff;
-
- /* PCI memory prefetch space */
- pci_set_region(hose[0].regions + 0,
- CFG_PCI_MEM_BASE,
- CFG_PCI_MEM_PHYS,
- CFG_PCI_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
-
- /* PCI memory space */
- pci_set_region(hose[0].regions + 1,
- CFG_PCI_MMIO_BASE,
- CFG_PCI_MMIO_PHYS, CFG_PCI_MMIO_SIZE, PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose[0].regions + 2,
- CFG_PCI_IO_BASE,
- CFG_PCI_IO_PHYS, CFG_PCI_IO_SIZE, PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose[0].regions + 3,
- CFG_PCI_SLV_MEM_LOCAL,
- CFG_PCI_SLV_MEM_BUS,
- CFG_PCI_SLV_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose[0].region_count = 4;
-
- pci_setup_indirect(&hose[0],
- (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
-
- pci_register_hose(hose);
-
- /*
- * Write command register
- */
- reg16 = 0xff;
- dev = PCI_BDF(0, 0, 0);
- pci_hose_read_config_word(&hose[0], dev, PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(&hose[0], dev, PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(&hose[0], dev, PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(&hose[0], dev, PCI_LATENCY_TIMER, 0x80);
- pci_hose_write_config_byte(&hose[0], dev, PCI_CACHE_LINE_SIZE, 0x08);
-
- printf("PCI 32bit bus on PMC2 & PMC3\n");
-
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-}
-#endif /* CONFIG_PCISLAVE */
-
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
- p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
- if (p != NULL) {
- p[0] = hose[0].first_busno;
- p[1] = hose[0].last_busno;
- }
-}
-#endif /* CONFIG_OF_FLAT_TREE */
-#endif /* CONFIG_PCI */
diff --git a/board/mpc832xemds/u-boot.lds b/board/mpc832xemds/u-boot.lds
deleted file mode 100644
index 937c87a..0000000
--- a/board/mpc832xemds/u-boot.lds
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8349emds/mpc8349emds.c b/board/mpc8349emds/mpc8349emds.c
deleted file mode 100644
index 071591e..0000000
--- a/board/mpc8349emds/mpc8349emds.c
+++ /dev/null
@@ -1,605 +0,0 @@
-/*
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <asm/mpc8349_pci.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#include <command.h>
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#endif
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-
-int fixed_sdram(void);
-void sdram_init(void);
-
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_MPC83XX)
-void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-int board_early_init_f (void)
-{
- volatile u8* bcsr = (volatile u8*)CFG_BCSR;
-
- /* Enable flash write */
- bcsr[1] &= ~0x01;
-
-#ifdef CFG_USE_MPC834XSYS_USB_PHY
- /* Use USB PHY on SYS board */
- bcsr[5] |= 0x02;
-#endif
-
- return 0;
-}
-
-#define ns2clk(ns) (ns / (1000000000 / CONFIG_8349_CLKIN) + 1)
-
-long int initdram (int board_type)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- u32 msize = 0;
-
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
- return -1;
-
- puts("Initializing\n");
-
- /* DDR SDRAM - Main SODIMM */
- im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
-#if defined(CONFIG_SPD_EEPROM)
- msize = spd_sdram();
-#else
- msize = fixed_sdram();
-#endif
- /*
- * Initialize SDRAM if it is on local bus.
- */
- sdram_init();
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(msize * 1024 * 1024);
-#endif
- puts(" DDR RAM: ");
- /* return total bus SDRAM size(bytes) -- DDR */
- return (msize * 1024 * 1024);
-}
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
- volatile immap_t *im = (immap_t *)CFG_IMMR;
- u32 msize = 0;
- u32 ddr_size;
- u32 ddr_size_log2;
-
- msize = CFG_DDR_SIZE;
- for (ddr_size = msize << 20, ddr_size_log2 = 0;
- (ddr_size > 1);
- ddr_size = ddr_size>>1, ddr_size_log2++) {
- if (ddr_size & 1) {
- return -1;
- }
- }
- im->sysconf.ddrlaw[0].bar = ((CFG_DDR_SDRAM_BASE>>12) & 0xfffff);
- im->sysconf.ddrlaw[0].ar = LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-
-#if (CFG_DDR_SIZE != 256)
-#warning Currenly any ddr size other than 256 is not supported
-#endif
-#ifdef CONFIG_DDR_II
- im->ddr.csbnds[2].csbnds = CFG_DDR_CS2_BNDS;
- im->ddr.cs_config[2] = CFG_DDR_CS2_CONFIG;
- im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
- im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
- im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
- im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
- im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
- im->ddr.sdram_mode = CFG_DDR_MODE;
- im->ddr.sdram_mode2 = CFG_DDR_MODE2;
- im->ddr.sdram_interval = CFG_DDR_INTERVAL;
- im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
-#else
- im->ddr.csbnds[2].csbnds = 0x0000000f;
- im->ddr.cs_config[2] = CFG_DDR_CONFIG;
-
- /* currently we use only one CS, so disable the other banks */
- im->ddr.cs_config[0] = 0;
- im->ddr.cs_config[1] = 0;
- im->ddr.cs_config[3] = 0;
-
- im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
-
- im->ddr.sdram_cfg =
- SDRAM_CFG_SREN
-#if defined(CONFIG_DDR_2T_TIMING)
- | SDRAM_CFG_2T_EN
-#endif
- | 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
-#if defined (CONFIG_DDR_32BIT)
- /* for 32-bit mode burst length is 8 */
- im->ddr.sdram_cfg |= (SDRAM_CFG_32_BE | SDRAM_CFG_8_BE);
-#endif
- im->ddr.sdram_mode = CFG_DDR_MODE;
-
- im->ddr.sdram_interval = CFG_DDR_INTERVAL;
-#endif
- udelay(200);
-
- /* enable DDR controller */
- im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
- return msize;
-}
-#endif/*!CFG_SPD_EEPROM*/
-
-
-int checkboard (void)
-{
- puts("Board: Freescale MPC8349EMDS\n");
- return 0;
-}
-
-/*
- * if MPC8349EMDS is soldered with SDRAM
- */
-#if defined(CFG_BR2_PRELIM) \
- && defined(CFG_OR2_PRELIM) \
- && defined(CFG_LBLAWBAR2_PRELIM) \
- && defined(CFG_LBLAWAR2_PRELIM)
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-
-void sdram_init(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile lbus83xx_t *lbc= &immap->lbus;
- uint *sdram_addr = (uint *)CFG_LBC_SDRAM_BASE;
-
- puts("\n SDRAM on Local Bus: ");
- print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
-
- /*
- * Setup SDRAM Base and Option Registers, already done in cpu_init.c
- */
-
- /* setup mtrpt, lsrt and lbcr for LB bus */
- lbc->lbcr = CFG_LBC_LBCR;
- lbc->mrtpr = CFG_LBC_MRTPR;
- lbc->lsrt = CFG_LBC_LSRT;
- asm("sync");
-
- /*
- * Configure the SDRAM controller Machine Mode Register.
- */
- lbc->lsdmr = CFG_LBC_LSDMR_5; /* 0x40636733; normal operation */
-
- lbc->lsdmr = CFG_LBC_LSDMR_1; /* 0x68636733; precharge all the banks */
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_2; /* 0x48636733; auto refresh */
- asm("sync");
- /*1 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*2 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*3 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*4 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*5 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*6 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*7 times*/
- *sdram_addr = 0xff;
- udelay(100);
- /*8 times*/
- *sdram_addr = 0xff;
- udelay(100);
-
- /* 0x58636733; mode register write operation */
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-
- lbc->lsdmr = CFG_LBC_LSDMR_5; /* 0x40636733; normal operation */
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-}
-#else
-void sdram_init(void)
-{
- puts(" SDRAM on Local Bus is NOT available!\n");
-}
-#endif
-
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD)
-/*
- * ECC user commands
- */
-void ecc_print_status(void)
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ddr83xx_t *ddr = &immap->ddr;
-
- printf("\nECC mode: %s\n\n", (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");
-
- /* Interrupts */
- printf("Memory Error Interrupt Enable:\n");
- printf(" Multiple-Bit Error Interrupt Enable: %d\n",
- (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0);
- printf(" Single-Bit Error Interrupt Enable: %d\n",
- (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0);
- printf(" Memory Select Error Interrupt Enable: %d\n\n",
- (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0);
-
- /* Error disable */
- printf("Memory Error Disable:\n");
- printf(" Multiple-Bit Error Disable: %d\n",
- (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0);
- printf(" Sinle-Bit Error Disable: %d\n",
- (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0);
- printf(" Memory Select Error Disable: %d\n\n",
- (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);
-
- /* Error injection */
- printf("Memory Data Path Error Injection Mask High/Low: %08lx %08lx\n",
- ddr->data_err_inject_hi, ddr->data_err_inject_lo);
-
- printf("Memory Data Path Error Injection Mask ECC:\n");
- printf(" ECC Mirror Byte: %d\n",
- (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0);
- printf(" ECC Injection Enable: %d\n",
- (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0);
- printf(" ECC Error Injection Mask: 0x%02x\n\n",
- ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM);
-
- /* SBE counter/threshold */
- printf("Memory Single-Bit Error Management (0..255):\n");
- printf(" Single-Bit Error Threshold: %d\n",
- (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT);
- printf(" Single-Bit Error Counter: %d\n\n",
- (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT);
-
- /* Error detect */
- printf("Memory Error Detect:\n");
- printf(" Multiple Memory Errors: %d\n",
- (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0);
- printf(" Multiple-Bit Error: %d\n",
- (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0);
- printf(" Single-Bit Error: %d\n",
- (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0);
- printf(" Memory Select Error: %d\n\n",
- (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);
-
- /* Capture data */
- printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address);
- printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n",
- ddr->capture_data_hi, ddr->capture_data_lo);
- printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",
- ddr->capture_ecc & CAPTURE_ECC_ECE);
-
- printf("Memory Error Attributes Capture:\n");
- printf(" Data Beat Number: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >> ECC_CAPT_ATTR_BNUM_SHIFT);
- printf(" Transaction Size: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >> ECC_CAPT_ATTR_TSIZ_SHIFT);
- printf(" Transaction Source: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >> ECC_CAPT_ATTR_TSRC_SHIFT);
- printf(" Transaction Type: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >> ECC_CAPT_ATTR_TTYP_SHIFT);
- printf(" Error Information Valid: %d\n\n",
- ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
-}
-
-int do_ecc ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
-{
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
- volatile ddr83xx_t *ddr = &immap->ddr;
- volatile u32 val;
- u64 *addr, count, val64;
- register u64 *i;
-
- if (argc > 4) {
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if (argc == 2) {
- if (strcmp(argv[1], "status") == 0) {
- ecc_print_status();
- return 0;
- } else if (strcmp(argv[1], "captureclear") == 0) {
- ddr->capture_address = 0;
- ddr->capture_data_hi = 0;
- ddr->capture_data_lo = 0;
- ddr->capture_ecc = 0;
- ddr->capture_attributes = 0;
- return 0;
- }
- }
-
- if (argc == 3) {
- if (strcmp(argv[1], "sbecnt") == 0) {
- val = simple_strtoul(argv[2], NULL, 10);
- if (val > 255) {
- printf("Incorrect Counter value, should be 0..255\n");
- return 1;
- }
-
- val = (val << ECC_ERROR_MAN_SBEC_SHIFT);
- val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET);
-
- ddr->err_sbe = val;
- return 0;
- } else if (strcmp(argv[1], "sbethr") == 0) {
- val = simple_strtoul(argv[2], NULL, 10);
- if (val > 255) {
- printf("Incorrect Counter value, should be 0..255\n");
- return 1;
- }
-
- val = (val << ECC_ERROR_MAN_SBET_SHIFT);
- val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC);
-
- ddr->err_sbe = val;
- return 0;
- } else if (strcmp(argv[1], "errdisable") == 0) {
- val = ddr->err_disable;
-
- if (strcmp(argv[2], "+sbe") == 0) {
- val |= ECC_ERROR_DISABLE_SBED;
- } else if (strcmp(argv[2], "+mbe") == 0) {
- val |= ECC_ERROR_DISABLE_MBED;
- } else if (strcmp(argv[2], "+mse") == 0) {
- val |= ECC_ERROR_DISABLE_MSED;
- } else if (strcmp(argv[2], "+all") == 0) {
- val |= (ECC_ERROR_DISABLE_SBED |
- ECC_ERROR_DISABLE_MBED |
- ECC_ERROR_DISABLE_MSED);
- } else if (strcmp(argv[2], "-sbe") == 0) {
- val &= ~ECC_ERROR_DISABLE_SBED;
- } else if (strcmp(argv[2], "-mbe") == 0) {
- val &= ~ECC_ERROR_DISABLE_MBED;
- } else if (strcmp(argv[2], "-mse") == 0) {
- val &= ~ECC_ERROR_DISABLE_MSED;
- } else if (strcmp(argv[2], "-all") == 0) {
- val &= ~(ECC_ERROR_DISABLE_SBED |
- ECC_ERROR_DISABLE_MBED |
- ECC_ERROR_DISABLE_MSED);
- } else {
- printf("Incorrect err_disable field\n");
- return 1;
- }
-
- ddr->err_disable = val;
- __asm__ __volatile__ ("sync");
- __asm__ __volatile__ ("isync");
- return 0;
- } else if (strcmp(argv[1], "errdetectclr") == 0) {
- val = ddr->err_detect;
-
- if (strcmp(argv[2], "mme") == 0) {
- val |= ECC_ERROR_DETECT_MME;
- } else if (strcmp(argv[2], "sbe") == 0) {
- val |= ECC_ERROR_DETECT_SBE;
- } else if (strcmp(argv[2], "mbe") == 0) {
- val |= ECC_ERROR_DETECT_MBE;
- } else if (strcmp(argv[2], "mse") == 0) {
- val |= ECC_ERROR_DETECT_MSE;
- } else if (strcmp(argv[2], "all") == 0) {
- val |= (ECC_ERROR_DETECT_MME |
- ECC_ERROR_DETECT_MBE |
- ECC_ERROR_DETECT_SBE |
- ECC_ERROR_DETECT_MSE);
- } else {
- printf("Incorrect err_detect field\n");
- return 1;
- }
-
- ddr->err_detect = val;
- return 0;
- } else if (strcmp(argv[1], "injectdatahi") == 0) {
- val = simple_strtoul(argv[2], NULL, 16);
-
- ddr->data_err_inject_hi = val;
- return 0;
- } else if (strcmp(argv[1], "injectdatalo") == 0) {
- val = simple_strtoul(argv[2], NULL, 16);
-
- ddr->data_err_inject_lo = val;
- return 0;
- } else if (strcmp(argv[1], "injectecc") == 0) {
- val = simple_strtoul(argv[2], NULL, 16);
- if (val > 0xff) {
- printf("Incorrect ECC inject mask, should be 0x00..0xff\n");
- return 1;
- }
- val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM);
-
- ddr->ecc_err_inject = val;
- return 0;
- } else if (strcmp(argv[1], "inject") == 0) {
- val = ddr->ecc_err_inject;
-
- if (strcmp(argv[2], "en") == 0)
- val |= ECC_ERR_INJECT_EIEN;
- else if (strcmp(argv[2], "dis") == 0)
- val &= ~ECC_ERR_INJECT_EIEN;
- else
- printf("Incorrect command\n");
-
- ddr->ecc_err_inject = val;
- __asm__ __volatile__ ("sync");
- __asm__ __volatile__ ("isync");
- return 0;
- } else if (strcmp(argv[1], "mirror") == 0) {
- val = ddr->ecc_err_inject;
-
- if (strcmp(argv[2], "en") == 0)
- val |= ECC_ERR_INJECT_EMB;
- else if (strcmp(argv[2], "dis") == 0)
- val &= ~ECC_ERR_INJECT_EMB;
- else
- printf("Incorrect command\n");
-
- ddr->ecc_err_inject = val;
- return 0;
- }
- }
-
- if (argc == 4) {
- if (strcmp(argv[1], "test") == 0) {
- addr = (u64 *)simple_strtoul(argv[2], NULL, 16);
- count = simple_strtoul(argv[3], NULL, 16);
-
- if ((u32)addr % 8) {
- printf("Address not alligned on double word boundary\n");
- return 1;
- }
-
- disable_interrupts();
- icache_disable();
-
- for (i = addr; i < addr + count; i++) {
- /* enable injects */
- ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__ ("sync");
- __asm__ __volatile__ ("isync");
-
- /* write memory location injecting errors */
- *i = 0x1122334455667788ULL;
- __asm__ __volatile__ ("sync");
-
- /* disable injects */
- ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__ ("sync");
- __asm__ __volatile__ ("isync");
-
- /* read data, this generates ECC error */
- val64 = *i;
- __asm__ __volatile__ ("sync");
-
- /* disable errors for ECC */
- ddr->err_disable |= ~ECC_ERROR_ENABLE;
- __asm__ __volatile__ ("sync");
- __asm__ __volatile__ ("isync");
-
- /* re-initialize memory, write the location again
- * NOT injecting errors this time */
- *i = 0xcafecafecafecafeULL;
- __asm__ __volatile__ ("sync");
-
- /* enable errors for ECC */
- ddr->err_disable &= ECC_ERROR_ENABLE;
- __asm__ __volatile__ ("sync");
- __asm__ __volatile__ ("isync");
- }
-
- icache_enable();
- enable_interrupts();
-
- return 0;
- }
- }
-
- printf ("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD(
- ecc, 4, 0, do_ecc,
- "ecc - support for DDR ECC features\n",
- "status - print out status info\n"
- "ecc captureclear - clear capture regs data\n"
- "ecc sbecnt <val> - set Single-Bit Error counter\n"
- "ecc sbethr <val> - set Single-Bit Threshold\n"
- "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n"
- " [-|+]sbe - Single-Bit Error\n"
- " [-|+]mbe - Multiple-Bit Error\n"
- " [-|+]mse - Memory Select Error\n"
- " [-|+]all - all errors\n"
- "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n"
- " mme - Multiple Memory Errors\n"
- " sbe - Single-Bit Error\n"
- " mbe - Multiple-Bit Error\n"
- " mse - Memory Select Error\n"
- " all - all errors\n"
- "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n"
- "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n"
- "ecc injectecc <ecc> - set ECC Error Injection Mask\n"
- "ecc inject <en|dis> - enable/disable error injection\n"
- "ecc mirror <en|dis> - enable/disable mirror byte\n"
- "ecc test <addr> <cnt> - test mem region:\n"
- " - enables injects\n"
- " - writes pattern injecting errors\n"
- " - disables injects\n"
- " - reads pattern back, generates error\n"
- " - re-inits memory"
-);
-#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
-
-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
-#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
-#endif
- ft_cpu_setup(blob, bd);
-
- p = ft_get_prop(blob, "/memory/reg", &len);
- if (p != NULL) {
- *p++ = cpu_to_be32(bd->bi_memstart);
- *p = cpu_to_be32(bd->bi_memsize);
- }
-}
-#endif
diff --git a/board/mpc8349emds/pci.c b/board/mpc8349emds/pci.c
deleted file mode 100644
index d6a12b8..0000000
--- a/board/mpc8349emds/pci.c
+++ /dev/null
@@ -1,407 +0,0 @@
-/*
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-
-#include <asm/mmu.h>
-#include <common.h>
-#include <asm/global_data.h>
-#include <pci.h>
-#include <asm/mpc8349_pci.h>
-#include <i2c.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#ifdef CONFIG_PCI
-
-/* System RAM mapped to PCI space */
-#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc8349emds_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER
- }
- },
- {}
-};
-#endif
-
-static struct pci_controller pci_hose[] = {
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc8349emds_config_table,
-#endif
- },
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc8349emds_config_table,
-#endif
- }
-};
-
-/**************************************************************************
- *
- * pib_init() -- initialize the PCA9555PW IO expander on the PIB board
- *
- */
-void
-pib_init(void)
-{
- u8 val8, orig_i2c_bus;
- /*
- * Assign PIB PMC slot to desired PCI bus
- */
- /* Switch temporarily to I2C bus #2 */
- orig_i2c_bus = i2c_get_bus_num();
- i2c_set_bus_num(1);
-
- val8 = 0;
- i2c_write(0x23, 0x6, 1, &val8, 1);
- i2c_write(0x23, 0x7, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x23, 0x2, 1, &val8, 1);
- i2c_write(0x23, 0x3, 1, &val8, 1);
-
- val8 = 0;
- i2c_write(0x26, 0x6, 1, &val8, 1);
- val8 = 0x34;
- i2c_write(0x26, 0x7, 1, &val8, 1);
-#if defined(PCI_64BIT)
- val8 = 0xf4; /* PMC2:PCI1/64-bit */
-#elif defined(PCI_ALL_PCI1)
- val8 = 0xf3; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI1 */
-#elif defined(PCI_ONE_PCI1)
- val8 = 0xf9; /* PMC1:PCI1 PMC2:PCI2 PMC3:PCI2 */
-#else
- val8 = 0xf5; /* PMC1:PCI1 PMC2:PCI1 PMC3:PCI2 */
-#endif
- i2c_write(0x26, 0x2, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x26, 0x3, 1, &val8, 1);
- val8 = 0;
- i2c_write(0x27, 0x6, 1, &val8, 1);
- i2c_write(0x27, 0x7, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x27, 0x2, 1, &val8, 1);
- val8 = 0xef;
- i2c_write(0x27, 0x3, 1, &val8, 1);
- asm("eieio");
-
-#if defined(PCI_64BIT)
- printf("PCI1: 64-bit on PMC2\n");
-#elif defined(PCI_ALL_PCI1)
- printf("PCI1: 32-bit on PMC1, PMC2, PMC3\n");
-#elif defined(PCI_ONE_PCI1)
- printf("PCI1: 32-bit on PMC1\n");
- printf("PCI2: 32-bit on PMC2, PMC3\n");
-#else
- printf("PCI1: 32-bit on PMC1, PMC2\n");
- printf("PCI2: 32-bit on PMC3\n");
-#endif
- /* Reset to original I2C bus */
- i2c_set_bus_num(orig_i2c_bus);
-}
-
-/**************************************************************************
- * pci_init_board()
- *
- * NOTICE: PCI2 is not currently supported
- *
- */
-void
-pci_init_board(void)
-{
- volatile immap_t * immr;
- volatile clk83xx_t * clk;
- volatile law83xx_t * pci_law;
- volatile pot83xx_t * pci_pot;
- volatile pcictrl83xx_t * pci_ctrl;
- volatile pciconf83xx_t * pci_conf;
- u16 reg16;
- u32 reg32;
- u32 dev;
- struct pci_controller * hose;
-
- immr = (immap_t *)CFG_IMMR;
- clk = (clk83xx_t *)&immr->clk;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
-
- hose = &pci_hose[0];
-
- pib_init();
-
- /*
- * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
- */
-
- reg32 = clk->occr;
- udelay(2000);
- clk->occr = 0xff000000;
- udelay(2000);
-
- /*
- * Release PCI RST Output signal
- */
- pci_ctrl[0].gcr = 0;
- udelay(2000);
- pci_ctrl[0].gcr = 1;
-
-#ifdef CONFIG_MPC83XX_PCI2
- pci_ctrl[1].gcr = 0;
- udelay(2000);
- pci_ctrl[1].gcr = 1;
-#endif
-
- /* We need to wait at least a 1sec based on PCI specs */
- {
- int i;
-
- for (i = 0; i < 1000; ++i)
- udelay (1000);
- }
-
- /*
- * Configure PCI Local Access Windows
- */
- pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
-
- pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_4M;
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI1 mem space - prefetch */
- pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /* PCI1 IO space */
- pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[1].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
-
- /* PCI1 mmio - non-prefetch mem space */
- pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[2].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /*
- * Configure PCI Inbound Translation Windows
- */
-
- /* we need RAM mapped to PCI space for the devices to
- * access main memory */
- pci_ctrl[0].pitar1 = 0x0;
- pci_ctrl[0].pibar1 = 0x0;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* PCI memory prefetch space */
- pci_set_region(hose->regions + 0,
- CFG_PCI1_MEM_BASE,
- CFG_PCI1_MEM_PHYS,
- CFG_PCI1_MEM_SIZE,
- PCI_REGION_MEM|PCI_REGION_PREFETCH);
-
- /* PCI memory space */
- pci_set_region(hose->regions + 1,
- CFG_PCI1_MMIO_BASE,
- CFG_PCI1_MMIO_PHYS,
- CFG_PCI1_MMIO_SIZE,
- PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose->regions + 2,
- CFG_PCI1_IO_BASE,
- CFG_PCI1_IO_PHYS,
- CFG_PCI1_IO_SIZE,
- PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose->regions + 3,
- CONFIG_PCI_SYS_MEM_BUS,
- CONFIG_PCI_SYS_MEM_PHYS,
- gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose->region_count = 4;
-
- pci_setup_indirect(hose,
- (CFG_IMMR+0x8300),
- (CFG_IMMR+0x8304));
-
- pci_register_hose(hose);
-
- /*
- * Write to Command register
- */
- reg16 = 0xff;
- dev = PCI_BDF(hose->first_busno, 0, 0);
- pci_hose_read_config_word (hose, dev, PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
- pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-
-#ifdef CONFIG_MPC83XX_PCI2
- hose = &pci_hose[1];
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI2 mem space - prefetch */
- pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /* PCI2 IO space */
- pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
-
- /* PCI2 mmio - non-prefetch mem space */
- pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /*
- * Configure PCI Inbound Translation Windows
- */
-
- /* we need RAM mapped to PCI space for the devices to
- * access main memory */
- pci_ctrl[1].pitar1 = 0x0;
- pci_ctrl[1].pibar1 = 0x0;
- pci_ctrl[1].piebar1 = 0x0;
- pci_ctrl[1].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
-
- hose->first_busno = pci_hose[0].last_busno + 1;
- hose->last_busno = 0xff;
-
- /* PCI memory prefetch space */
- pci_set_region(hose->regions + 0,
- CFG_PCI2_MEM_BASE,
- CFG_PCI2_MEM_PHYS,
- CFG_PCI2_MEM_SIZE,
- PCI_REGION_MEM|PCI_REGION_PREFETCH);
-
- /* PCI memory space */
- pci_set_region(hose->regions + 1,
- CFG_PCI2_MMIO_BASE,
- CFG_PCI2_MMIO_PHYS,
- CFG_PCI2_MMIO_SIZE,
- PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose->regions + 2,
- CFG_PCI2_IO_BASE,
- CFG_PCI2_IO_PHYS,
- CFG_PCI2_IO_SIZE,
- PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose->regions + 3,
- CONFIG_PCI_SYS_MEM_BUS,
- CONFIG_PCI_SYS_MEM_PHYS,
- gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose->region_count = 4;
-
- pci_setup_indirect(hose,
- (CFG_IMMR+0x8380),
- (CFG_IMMR+0x8384));
-
- pci_register_hose(hose);
-
- /*
- * Write to Command register
- */
- reg16 = 0xff;
- dev = PCI_BDF(hose->first_busno, 0, 0);
- pci_hose_read_config_word (hose, dev, PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
- pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
-
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-#endif
-
-}
-
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
- p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
- if (p != NULL) {
- p[0] = pci_hose[0].first_busno;
- p[1] = pci_hose[0].last_busno;
- }
-
-#ifdef CONFIG_MPC83XX_PCI2
- p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
- if (p != NULL) {
- p[0] = pci_hose[1].first_busno;
- p[1] = pci_hose[1].last_busno;
- }
-#endif
-}
-#endif /* CONFIG_OF_FLAT_TREE */
-#endif /* CONFIG_PCI */
diff --git a/board/mpc8349emds/u-boot.lds b/board/mpc8349emds/u-boot.lds
deleted file mode 100644
index 937c87a..0000000
--- a/board/mpc8349emds/u-boot.lds
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8349itx/config.mk b/board/mpc8349itx/config.mk
deleted file mode 100644
index 1901fdc..0000000
--- a/board/mpc8349itx/config.mk
+++ /dev/null
@@ -1,37 +0,0 @@
-#
-# Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# MPC8349E-mITX and MPC8349E-mITX-GP
-#
-
-sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp
-
-ifndef TEXT_BASE
-TEXT_BASE = 0xFEF00000
-endif
-
-ifneq ($(OBJTREE),$(SRCTREE))
-# We are building u-boot in a separate directory, use generated
-# .lds script from OBJTREE directory.
-LDSCRIPT := $(OBJTREE)/board/$(BOARDDIR)/u-boot.lds
-endif
diff --git a/board/mpc8349itx/mpc8349itx.c b/board/mpc8349itx/mpc8349itx.c
deleted file mode 100644
index 2b3ded1..0000000
--- a/board/mpc8349itx/mpc8349itx.c
+++ /dev/null
@@ -1,407 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS for A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-
-#ifdef CONFIG_PCI
-#include <asm/mpc8349_pci.h>
-#include <pci.h>
-#endif
-
-#ifdef CONFIG_SPD_EEPROM
-#include <spd_sdram.h>
-#else
-#include <asm/mmu.h>
-#endif
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-
-#ifndef CONFIG_SPD_EEPROM
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- u32 ddr_size; /* The size of RAM, in bytes */
- u32 ddr_size_log2 = 0;
-
- for (ddr_size = CFG_DDR_SIZE * 0x100000; ddr_size > 1; ddr_size >>= 1) {
- if (ddr_size & 1) {
- return -1;
- }
- ddr_size_log2++;
- }
-
- im->sysconf.ddrlaw[0].ar =
- LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
- im->sysconf.ddrlaw[0].bar = (CFG_DDR_SDRAM_BASE >> 12) & 0xfffff;
-
- /* Only one CS0 for DDR */
- im->ddr.csbnds[0].csbnds = 0x0000000f;
- im->ddr.cs_config[0] = CFG_DDR_CONFIG;
-
- debug("cs0_bnds = 0x%08x\n", im->ddr.csbnds[0].csbnds);
- debug("cs0_config = 0x%08x\n", im->ddr.cs_config[0]);
-
- debug("DDR:bar=0x%08x\n", im->sysconf.ddrlaw[0].bar);
- debug("DDR:ar=0x%08x\n", im->sysconf.ddrlaw[0].ar);
-
- im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;/* Was "2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT" */
- im->ddr.sdram_cfg = SDRAM_CFG_SREN | SDRAM_CFG_SDRAM_TYPE_DDR;
- im->ddr.sdram_mode =
- (0x0000 << SDRAM_MODE_ESD_SHIFT) | (0x0032 << SDRAM_MODE_SD_SHIFT);
- im->ddr.sdram_interval =
- (0x0410 << SDRAM_INTERVAL_REFINT_SHIFT) | (0x0100 <<
- SDRAM_INTERVAL_BSTOPRE_SHIFT);
- im->ddr.sdram_clk_cntl =
- DDR_SDRAM_CLK_CNTL_SS_EN | DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05;
-
- udelay(200);
-
- im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-
- debug("DDR:timing_cfg_1=0x%08x\n", im->ddr.timing_cfg_1);
- debug("DDR:timing_cfg_2=0x%08x\n", im->ddr.timing_cfg_2);
- debug("DDR:sdram_mode=0x%08x\n", im->ddr.sdram_mode);
- debug("DDR:sdram_interval=0x%08x\n", im->ddr.sdram_interval);
- debug("DDR:sdram_cfg=0x%08x\n", im->ddr.sdram_cfg);
-
- return CFG_DDR_SIZE;
-}
-#endif
-
-#ifdef CONFIG_PCI
-/*
- * Initialize PCI Devices, report devices found
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc83xxmitx_config_table[] = {
- {
- PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_ANY_ID,
- 0x0f,
- PCI_ANY_ID,
- pci_cfgfunc_config_device,
- {
- PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}
- },
- {}
-}
-#endif
-
-volatile static struct pci_controller hose[] = {
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc83xxmitx_config_table,
-#endif
- },
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc83xxmitx_config_table,
-#endif
- }
-};
-#endif /* CONFIG_PCI */
-
-long int initdram(int board_type)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- u32 msize = 0;
-#ifdef CONFIG_DDR_ECC
- volatile ddr83xx_t *ddr = &im->ddr;
-#endif
-
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
- return -1;
-
- /* DDR SDRAM - Main SODIMM */
- im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
-#ifdef CONFIG_SPD_EEPROM
- msize = spd_sdram();
-#else
- msize = fixed_sdram();
-#endif
-
-#ifdef CONFIG_DDR_ECC
- if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN)
- /* Unlike every other board, on the 83xx spd_sdram() returns
- megabytes instead of just bytes. That's why we need to
- multiple by 1MB when calling ddr_enable_ecc(). */
- ddr_enable_ecc(msize * 1048576);
-#endif
-
- puts(" DDR RAM: ");
- /* return total bus RAM size(bytes) */
- return msize * 1024 * 1024;
-}
-
-int checkboard(void)
-{
-#ifdef CONFIG_MPC8349ITX
- puts("Board: Freescale MPC8349E-mITX\n");
-#else
- puts("Board: Freescale MPC8349E-mITX-GP\n");
-#endif
-
- return 0;
-}
-
-/*
- * Implement a work-around for a hardware problem with compact
- * flash.
- *
- * Program the UPM if compact flash is enabled.
- */
-int misc_init_f(void)
-{
-#ifdef CONFIG_VSC7385
- volatile u32 *vsc7385_cpuctrl;
-
- /* 0x1c0c0 is the VSC7385 CPU Control (CPUCTRL) Register. The power up
- default of VSC7385 L1_IRQ and L2_IRQ requests are active high. That
- means it is 0 when the IRQ is not active. This makes the wire-AND
- logic always assert IRQ7 to CPU even if there is no request from the
- switch. Since the compact flash and the switch share the same IRQ,
- the Linux kernel will think that the compact flash is requesting irq
- and get stuck when it tries to clear the IRQ. Thus we need to set
- the L2_IRQ0 and L2_IRQ1 to active low.
-
- The following code sets the L1_IRQ and L2_IRQ polarity to active low.
- Without this code, compact flash will not work in Linux because
- unlike U-Boot, Linux uses the IRQ, so this code is necessary if we
- don't enable compact flash for U-Boot.
- */
-
- vsc7385_cpuctrl = (volatile u32 *)(CFG_VSC7385_BASE + 0x1c0c0);
- *vsc7385_cpuctrl |= 0x0c;
-#endif
-
-#ifdef CONFIG_COMPACT_FLASH
- /* UPM Table Configuration Code */
- static uint UPMATable[] = {
- 0xcffffc00, 0x0fffff00, 0x0fafff00, 0x0fafff00,
- 0x0faffd00, 0x0faffc04, 0x0ffffc00, 0x3ffffc01,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfff7fc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
- 0xcffffc00, 0x0fffff00, 0x0ff3ff00, 0x0ff3ff00,
- 0x0ff3fe00, 0x0ffffc00, 0x3ffffc05, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc00,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01,
- 0xfffffc00, 0xfffffc00, 0xfffffc00, 0xfffffc01
- };
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile lbus83xx_t *lbus = &immap->lbus;
-
- lbus->bank[3].br = CFG_BR3_PRELIM;
- lbus->bank[3].or = CFG_OR3_PRELIM;
-
- /* Program the MAMR. RFEN=0, OP=00, UWPL=1, AM=000, DS=01, G0CL=000,
- GPL4=0, RLF=0001, WLF=0001, TLF=0001, MAD=000000
- */
- lbus->mamr = 0x08404440;
-
- upmconfig(0, UPMATable, sizeof(UPMATable) / sizeof(UPMATable[0]));
-
- puts("UPMA: Configured for compact flash\n");
-#endif
-
- return 0;
-}
-
-/*
- * Make sure the EEPROM has the HRCW correctly programmed.
- * Make sure the RTC is correctly programmed.
- *
- * The MPC8349E-mITX can be configured to load the HRCW from
- * EEPROM instead of flash. This is controlled via jumpers
- * LGPL0, 1, and 3. Normally, these jumpers are set to 000 (all
- * jumpered), but if they're set to 001 or 010, then the HRCW is
- * read from the "I2C EEPROM".
- *
- * This function makes sure that the I2C EEPROM is programmed
- * correctly.
- */
-int misc_init_r(void)
-{
- int rc = 0;
-
-#ifdef CONFIG_HARD_I2C
-
- unsigned int orig_bus = i2c_get_bus_num();
- u8 i2c_data;
-
-#ifdef CFG_I2C_RTC_ADDR
- u8 ds1339_data[17];
-#endif
-
-#ifdef CFG_I2C_EEPROM_ADDR
- static u8 eeprom_data[] = /* HRCW data */
- {
- 0xAA, 0x55, 0xAA, /* Preamble */
- 0x7C, /* ACS=0, BYTE_EN=1111, CONT=1 */
- 0x02, 0x40, /* RCWL ADDR=0x0_0900 */
- (CFG_HRCW_LOW >> 24) & 0xFF,
- (CFG_HRCW_LOW >> 16) & 0xFF,
- (CFG_HRCW_LOW >> 8) & 0xFF,
- CFG_HRCW_LOW & 0xFF,
- 0x7C, /* ACS=0, BYTE_EN=1111, CONT=1 */
- 0x02, 0x41, /* RCWH ADDR=0x0_0904 */
- (CFG_HRCW_HIGH >> 24) & 0xFF,
- (CFG_HRCW_HIGH >> 16) & 0xFF,
- (CFG_HRCW_HIGH >> 8) & 0xFF,
- CFG_HRCW_HIGH & 0xFF
- };
-
- u8 data[sizeof(eeprom_data)];
-#endif
-
- printf("Board revision: ");
- i2c_set_bus_num(1);
- if (i2c_read(CFG_I2C_8574A_ADDR2, 0, 0, &i2c_data, sizeof(i2c_data)) == 0)
- printf("%u.%u (PCF8475A)\n", (i2c_data & 0x02) >> 1, i2c_data & 0x01);
- else if (i2c_read(CFG_I2C_8574_ADDR2, 0, 0, &i2c_data, sizeof(i2c_data)) == 0)
- printf("%u.%u (PCF8475)\n", (i2c_data & 0x02) >> 1, i2c_data & 0x01);
- else {
- printf("Unknown\n");
- rc = 1;
- }
-
-#ifdef CFG_I2C_EEPROM_ADDR
- i2c_set_bus_num(0);
-
- if (i2c_read(CFG_I2C_EEPROM_ADDR, 0, 2, data, sizeof(data)) == 0) {
- if (memcmp(data, eeprom_data, sizeof(data)) != 0) {
- if (i2c_write
- (CFG_I2C_EEPROM_ADDR, 0, 2, eeprom_data,
- sizeof(eeprom_data)) != 0) {
- puts("Failure writing the HRCW to EEPROM via I2C.\n");
- rc = 1;
- }
- }
- } else {
- puts("Failure reading the HRCW from EEPROM via I2C.\n");
- rc = 1;
- }
-#endif
-
-#ifdef CFG_I2C_RTC_ADDR
- i2c_set_bus_num(1);
-
- if (i2c_read(CFG_I2C_RTC_ADDR, 0, 1, ds1339_data, sizeof(ds1339_data))
- == 0) {
-
- /* Work-around for MPC8349E-mITX bug #13601.
- If the RTC does not contain valid register values, the DS1339
- Linux driver will not work.
- */
-
- /* Make sure status register bits 6-2 are zero */
- ds1339_data[0x0f] &= ~0x7c;
-
- /* Check for a valid day register value */
- ds1339_data[0x03] &= ~0xf8;
- if (ds1339_data[0x03] == 0) {
- ds1339_data[0x03] = 1;
- }
-
- /* Check for a valid date register value */
- ds1339_data[0x04] &= ~0xc0;
- if ((ds1339_data[0x04] == 0) ||
- ((ds1339_data[0x04] & 0x0f) > 9) ||
- (ds1339_data[0x04] >= 0x32)) {
- ds1339_data[0x04] = 1;
- }
-
- /* Check for a valid month register value */
- ds1339_data[0x05] &= ~0x60;
-
- if ((ds1339_data[0x05] == 0) ||
- ((ds1339_data[0x05] & 0x0f) > 9) ||
- ((ds1339_data[0x05] >= 0x13)
- && (ds1339_data[0x05] <= 0x19))) {
- ds1339_data[0x05] = 1;
- }
-
- /* Enable Oscillator and rate select */
- ds1339_data[0x0e] = 0x1c;
-
- /* Work-around for MPC8349E-mITX bug #13330.
- Ensure that the RTC control register contains the value 0x1c.
- This affects SATA performance.
- */
-
- if (i2c_write
- (CFG_I2C_RTC_ADDR, 0, 1, ds1339_data,
- sizeof(ds1339_data))) {
- puts("Failure writing to the RTC via I2C.\n");
- rc = 1;
- }
- } else {
- puts("Failure reading from the RTC via I2C.\n");
- rc = 1;
- }
-#endif
-
- i2c_set_bus_num(orig_bus);
-#endif
-
- return rc;
-}
-
-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
-#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
-#endif
- ft_cpu_setup(blob, bd);
-
- p = ft_get_prop(blob, "/memory/reg", &len);
- if (p != NULL) {
- *p++ = cpu_to_be32(bd->bi_memstart);
- *p = cpu_to_be32(bd->bi_memsize);
- }
-}
-#endif
diff --git a/board/mpc8349itx/pci.c b/board/mpc8349itx/pci.c
deleted file mode 100644
index e81ad27..0000000
--- a/board/mpc8349itx/pci.c
+++ /dev/null
@@ -1,357 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-
-#ifdef CONFIG_PCI
-
-#include <asm/mmu.h>
-#include <asm/global_data.h>
-#include <pci.h>
-#include <asm/mpc8349_pci.h>
-#include <i2c.h>
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* System RAM mapped to PCI space */
-#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
-#define CONFIG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc8349itx_config_table[] = {
- {
- PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_ANY_ID,
- PCI_IDSEL_NUMBER,
- PCI_ANY_ID,
- pci_cfgfunc_config_device,
- {
- PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}
- },
- {}
-};
-#endif
-
-static struct pci_controller pci_hose[] = {
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc8349itx_config_table,
-#endif
- },
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc8349itx_config_table,
-#endif
- }
-};
-
-/**************************************************************************
- * pci_init_board()
- *
- * NOTICE: PCI2 is not currently supported
- *
- */
-void pci_init_board(void)
-{
- volatile immap_t *immr;
- volatile clk83xx_t *clk;
- volatile law83xx_t *pci_law;
- volatile pot83xx_t *pci_pot;
- volatile pcictrl83xx_t *pci_ctrl;
- volatile pciconf83xx_t *pci_conf;
- u8 reg8;
- u16 reg16;
- u32 reg32;
- u32 dev;
- struct pci_controller *hose;
-
- immr = (immap_t *) CFG_IMMR;
- clk = (clk83xx_t *) & immr->clk;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
-
- hose = &pci_hose[0];
-
- /*
- * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
- */
-
- reg32 = clk->occr;
- udelay(2000);
-
-#ifdef CONFIG_HARD_I2C
- i2c_set_bus_num(1);
- /* Read the PCI_M66EN jumper setting */
- if ((i2c_read(CFG_I2C_8574_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0) ||
- (i2c_read(CFG_I2C_8574A_ADDR2, 0, 0, ®8, sizeof(reg8)) == 0)) {
- if (reg8 & I2C_8574_PCI66)
- clk->occr = 0xff000000; /* 66 MHz PCI */
- else
- clk->occr = 0xff600001; /* 33 MHz PCI */
- } else {
- clk->occr = 0xff600001; /* 33 MHz PCI */
- }
-#else
- clk->occr = 0xff000000; /* 66 MHz PCI */
-#endif
-
- udelay(2000);
-
- /*
- * Release PCI RST Output signal
- */
- pci_ctrl[0].gcr = 0;
- udelay(2000);
- pci_ctrl[0].gcr = 1;
-
-#ifdef CONFIG_MPC83XX_PCI2
- pci_ctrl[1].gcr = 0;
- udelay(2000);
- pci_ctrl[1].gcr = 1;
-#endif
-
- /* We need to wait at least a 1sec based on PCI specs */
- {
- int i;
-
- for (i = 0; i < 1000; i++)
- udelay(1000);
- }
-
- /*
- * Configure PCI Local Access Windows
- */
- pci_law[0].bar = CFG_PCI1_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_1G;
-
- pci_law[1].bar = CFG_PCI1_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_32M;
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI1 mem space - prefetch */
- pci_pot[0].potar = (CFG_PCI1_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[0].pobar = (CFG_PCI1_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[0].pocmr = POCMR_EN | POCMR_PREFETCH_EN | POCMR_CM_256M;
-
- /* PCI1 IO space */
- pci_pot[1].potar = (CFG_PCI1_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[1].pobar = (CFG_PCI1_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[1].pocmr = POCMR_EN | POCMR_IO | POCMR_CM_16M;
-
- /* PCI1 mmio - non-prefetch mem space */
- pci_pot[2].potar = (CFG_PCI1_MMIO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[2].pobar = (CFG_PCI1_MMIO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[2].pocmr = POCMR_EN | POCMR_CM_256M;
-
- /*
- * Configure PCI Inbound Translation Windows
- */
-
- /* we need RAM mapped to PCI space for the devices to
- * access main memory */
- pci_ctrl[0].pitar1 = 0x0;
- pci_ctrl[0].pibar1 = 0x0;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
- PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
-
- hose->first_busno = 0;
- hose->last_busno = 0xff;
-
- /* PCI memory prefetch space */
- pci_set_region(hose->regions + 0,
- CFG_PCI1_MEM_BASE,
- CFG_PCI1_MEM_PHYS,
- CFG_PCI1_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
-
- /* PCI memory space */
- pci_set_region(hose->regions + 1,
- CFG_PCI1_MMIO_BASE,
- CFG_PCI1_MMIO_PHYS, CFG_PCI1_MMIO_SIZE, PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose->regions + 2,
- CFG_PCI1_IO_BASE,
- CFG_PCI1_IO_PHYS, CFG_PCI1_IO_SIZE, PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose->regions + 3,
- CONFIG_PCI_SYS_MEM_BUS,
- CONFIG_PCI_SYS_MEM_PHYS,
- gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose->region_count = 4;
-
- pci_setup_indirect(hose,
- (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
-
- pci_register_hose(hose);
-
- /*
- * Write to Command register
- */
- reg16 = 0xff;
- dev = PCI_BDF(hose->first_busno, 0, 0);
- pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
- pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
-
-#ifdef CONFIG_PCI_SCAN_SHOW
- printf("PCI: Bus Dev VenId DevId Class Int\n");
-#endif
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-
-#ifdef CONFIG_MPC83XX_PCI2
- hose = &pci_hose[1];
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI2 mem space - prefetch */
- pci_pot[3].potar = (CFG_PCI2_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[3].pobar = (CFG_PCI2_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[3].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_PREFETCH_EN | POCMR_CM_256M;
-
- /* PCI2 IO space */
- pci_pot[4].potar = (CFG_PCI2_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[4].pobar = (CFG_PCI2_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[4].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_IO | POCMR_CM_16M;
-
- /* PCI2 mmio - non-prefetch mem space */
- pci_pot[5].potar = (CFG_PCI2_MMIO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[5].pobar = (CFG_PCI2_MMIO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[5].pocmr = POCMR_EN | POCMR_PCI2 | POCMR_CM_256M;
-
- /*
- * Configure PCI Inbound Translation Windows
- */
-
- /* we need RAM mapped to PCI space for the devices to
- * access main memory */
- pci_ctrl[1].pitar1 = 0x0;
- pci_ctrl[1].pibar1 = 0x0;
- pci_ctrl[1].piebar1 = 0x0;
- pci_ctrl[1].piwar1 =
- PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP |
- (__ilog2(gd->ram_size) - 1);
-
- hose->first_busno = pci_hose[0].last_busno + 1;
- hose->last_busno = 0xff;
-
- /* PCI memory prefetch space */
- pci_set_region(hose->regions + 0,
- CFG_PCI2_MEM_BASE,
- CFG_PCI2_MEM_PHYS,
- CFG_PCI2_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
-
- /* PCI memory space */
- pci_set_region(hose->regions + 1,
- CFG_PCI2_MMIO_BASE,
- CFG_PCI2_MMIO_PHYS, CFG_PCI2_MMIO_SIZE, PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose->regions + 2,
- CFG_PCI2_IO_BASE,
- CFG_PCI2_IO_PHYS, CFG_PCI2_IO_SIZE, PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose->regions + 3,
- CONFIG_PCI_SYS_MEM_BUS,
- CONFIG_PCI_SYS_MEM_PHYS,
- gd->ram_size, PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose->region_count = 4;
-
- pci_setup_indirect(hose,
- (CFG_IMMR + 0x8380), (CFG_IMMR + 0x8384));
-
- pci_register_hose(hose);
-
- /*
- * Write to Command register
- */
- reg16 = 0xff;
- dev = PCI_BDF(hose->first_busno, 0, 0);
- pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
- pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
-
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-#endif
-}
-
-#endif /* CONFIG_PCI */
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
- p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
- if (p != NULL) {
- p[0] = pci_hose[0].first_busno;
- p[1] = pci_hose[0].last_busno;
- }
-
-#ifdef CONFIG_MPC83XX_PCI2
- p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
- if (p != NULL) {
- p[0] = pci_hose[1].first_busno;
- p[1] = pci_hose[1].last_busno;
- }
-#endif
-}
-#endif /* CONFIG_OF_FLAT_TREE */
diff --git a/board/mpc8349itx/u-boot.lds b/board/mpc8349itx/u-boot.lds
deleted file mode 100644
index f044c0f..0000000
--- a/board/mpc8349itx/u-boot.lds
+++ /dev/null
@@ -1,120 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor, Inc. 2006. All rights reserved.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8360emds/mpc8360emds.c b/board/mpc8360emds/mpc8360emds.c
deleted file mode 100644
index 562eb8b..0000000
--- a/board/mpc8360emds/mpc8360emds.c
+++ /dev/null
@@ -1,706 +0,0 @@
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- *
- * Dave Liu <daveliu@freescale.com>
- * based on board/mpc8349emds/mpc8349emds.c
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-#include <common.h>
-#include <ioports.h>
-#include <mpc83xx.h>
-#include <i2c.h>
-#include <spd.h>
-#include <miiphy.h>
-#include <command.h>
-#if defined(CONFIG_PCI)
-#include <pci.h>
-#endif
-#if defined(CONFIG_SPD_EEPROM)
-#include <spd_sdram.h>
-#else
-#include <asm/mmu.h>
-#endif
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-#if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
-#include <libfdt_env.h>
-#endif
-
-const qe_iop_conf_t qe_iop_conf_tab[] = {
- /* GETH1 */
- {0, 3, 1, 0, 1}, /* TxD0 */
- {0, 4, 1, 0, 1}, /* TxD1 */
- {0, 5, 1, 0, 1}, /* TxD2 */
- {0, 6, 1, 0, 1}, /* TxD3 */
- {1, 6, 1, 0, 3}, /* TxD4 */
- {1, 7, 1, 0, 1}, /* TxD5 */
- {1, 9, 1, 0, 2}, /* TxD6 */
- {1, 10, 1, 0, 2}, /* TxD7 */
- {0, 9, 2, 0, 1}, /* RxD0 */
- {0, 10, 2, 0, 1}, /* RxD1 */
- {0, 11, 2, 0, 1}, /* RxD2 */
- {0, 12, 2, 0, 1}, /* RxD3 */
- {0, 13, 2, 0, 1}, /* RxD4 */
- {1, 1, 2, 0, 2}, /* RxD5 */
- {1, 0, 2, 0, 2}, /* RxD6 */
- {1, 4, 2, 0, 2}, /* RxD7 */
- {0, 7, 1, 0, 1}, /* TX_EN */
- {0, 8, 1, 0, 1}, /* TX_ER */
- {0, 15, 2, 0, 1}, /* RX_DV */
- {0, 16, 2, 0, 1}, /* RX_ER */
- {0, 0, 2, 0, 1}, /* RX_CLK */
- {2, 9, 1, 0, 3}, /* GTX_CLK - CLK10 */
- {2, 8, 2, 0, 1}, /* GTX125 - CLK9 */
- /* GETH2 */
- {0, 17, 1, 0, 1}, /* TxD0 */
- {0, 18, 1, 0, 1}, /* TxD1 */
- {0, 19, 1, 0, 1}, /* TxD2 */
- {0, 20, 1, 0, 1}, /* TxD3 */
- {1, 2, 1, 0, 1}, /* TxD4 */
- {1, 3, 1, 0, 2}, /* TxD5 */
- {1, 5, 1, 0, 3}, /* TxD6 */
- {1, 8, 1, 0, 3}, /* TxD7 */
- {0, 23, 2, 0, 1}, /* RxD0 */
- {0, 24, 2, 0, 1}, /* RxD1 */
- {0, 25, 2, 0, 1}, /* RxD2 */
- {0, 26, 2, 0, 1}, /* RxD3 */
- {0, 27, 2, 0, 1}, /* RxD4 */
- {1, 12, 2, 0, 2}, /* RxD5 */
- {1, 13, 2, 0, 3}, /* RxD6 */
- {1, 11, 2, 0, 2}, /* RxD7 */
- {0, 21, 1, 0, 1}, /* TX_EN */
- {0, 22, 1, 0, 1}, /* TX_ER */
- {0, 29, 2, 0, 1}, /* RX_DV */
- {0, 30, 2, 0, 1}, /* RX_ER */
- {0, 31, 2, 0, 1}, /* RX_CLK */
- {2, 2, 1, 0, 2}, /* GTX_CLK = CLK10 */
- {2, 3, 2, 0, 1}, /* GTX125 - CLK4 */
-
- {0, 1, 3, 0, 2}, /* MDIO */
- {0, 2, 1, 0, 1}, /* MDC */
-
- {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
-};
-
-int board_early_init_f(void)
-{
-
- u8 *bcsr = (u8 *)CFG_BCSR;
- const immap_t *immr = (immap_t *)CFG_IMMR;
-
- /* Enable flash write */
- bcsr[0xa] &= ~0x04;
-
- /* Disable G1TXCLK, G2TXCLK h/w buffers (rev.2 h/w bug workaround) */
- if (immr->sysconf.spridr == SPR_8360_REV20 ||
- immr->sysconf.spridr == SPR_8360E_REV20)
- bcsr[0xe] = 0x30;
-
- return 0;
-}
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-int fixed_sdram(void);
-void sdram_init(void);
-
-long int initdram(int board_type)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- u32 msize = 0;
-
- if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
- return -1;
-
- /* DDR SDRAM - Main SODIMM */
- im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
-#if defined(CONFIG_SPD_EEPROM)
- msize = spd_sdram();
-#else
- msize = fixed_sdram();
-#endif
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRC)
- /*
- * Initialize DDR ECC byte
- */
- ddr_enable_ecc(msize * 1024 * 1024);
-#endif
- /*
- * Initialize SDRAM if it is on local bus.
- */
- sdram_init();
- puts(" DDR RAM: ");
- /* return total bus SDRAM size(bytes) -- DDR */
- return (msize * 1024 * 1024);
-}
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*************************************************************************
- * fixed sdram init -- doesn't use serial presence detect.
- ************************************************************************/
-int fixed_sdram(void)
-{
- volatile immap_t *im = (immap_t *) CFG_IMMR;
- u32 msize = 0;
- u32 ddr_size;
- u32 ddr_size_log2;
-
- msize = CFG_DDR_SIZE;
- for (ddr_size = msize << 20, ddr_size_log2 = 0;
- (ddr_size > 1); ddr_size = ddr_size >> 1, ddr_size_log2++) {
- if (ddr_size & 1) {
- return -1;
- }
- }
- im->sysconf.ddrlaw[0].ar =
- LAWAR_EN | ((ddr_size_log2 - 1) & LAWAR_SIZE);
-#if (CFG_DDR_SIZE != 256)
-#warning Currenly any ddr size other than 256 is not supported
-#endif
-#ifdef CONFIG_DDR_II
- im->ddr.csbnds[0].csbnds = CFG_DDR_CS0_BNDS;
- im->ddr.cs_config[0] = CFG_DDR_CS0_CONFIG;
- im->ddr.timing_cfg_0 = CFG_DDR_TIMING_0;
- im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
- im->ddr.timing_cfg_3 = CFG_DDR_TIMING_3;
- im->ddr.sdram_cfg = CFG_DDR_SDRAM_CFG;
- im->ddr.sdram_cfg2 = CFG_DDR_SDRAM_CFG2;
- im->ddr.sdram_mode = CFG_DDR_MODE;
- im->ddr.sdram_mode2 = CFG_DDR_MODE2;
- im->ddr.sdram_interval = CFG_DDR_INTERVAL;
- im->ddr.sdram_clk_cntl = CFG_DDR_CLK_CNTL;
-#else
- im->ddr.csbnds[0].csbnds = 0x00000007;
- im->ddr.csbnds[1].csbnds = 0x0008000f;
-
- im->ddr.cs_config[0] = CFG_DDR_CONFIG;
- im->ddr.cs_config[1] = CFG_DDR_CONFIG;
-
- im->ddr.timing_cfg_1 = CFG_DDR_TIMING_1;
- im->ddr.timing_cfg_2 = CFG_DDR_TIMING_2;
- im->ddr.sdram_cfg = CFG_DDR_CONTROL;
-
- im->ddr.sdram_mode = CFG_DDR_MODE;
- im->ddr.sdram_interval = CFG_DDR_INTERVAL;
-#endif
- udelay(200);
- im->ddr.sdram_cfg |= SDRAM_CFG_MEM_EN;
-
- return msize;
-}
-#endif /*!CFG_SPD_EEPROM */
-
-int checkboard(void)
-{
- puts("Board: Freescale MPC8360EMDS\n");
- return 0;
-}
-
-/*
- * if MPC8360EMDS is soldered with SDRAM
- */
-#if defined(CFG_BR2_PRELIM) \
- && defined(CFG_OR2_PRELIM) \
- && defined(CFG_LBLAWBAR2_PRELIM) \
- && defined(CFG_LBLAWAR2_PRELIM)
-/*
- * Initialize SDRAM memory on the Local Bus.
- */
-
-void sdram_init(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile lbus83xx_t *lbc = &immap->lbus;
- uint *sdram_addr = (uint *) CFG_LBC_SDRAM_BASE;
-
- puts("\n SDRAM on Local Bus: ");
- print_size(CFG_LBC_SDRAM_SIZE * 1024 * 1024, "\n");
- /*
- * Setup SDRAM Base and Option Registers, already done in cpu_init.c
- */
- /*setup mtrpt, lsrt and lbcr for LB bus */
- lbc->lbcr = CFG_LBC_LBCR;
- lbc->mrtpr = CFG_LBC_MRTPR;
- lbc->lsrt = CFG_LBC_LSRT;
- asm("sync");
-
- /*
- * Configure the SDRAM controller Machine Mode Register.
- */
- lbc->lsdmr = CFG_LBC_LSDMR_5; /* Normal Operation */
- lbc->lsdmr = CFG_LBC_LSDMR_1; /* Precharge All Banks */
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-
- /*
- * We need do 8 times auto refresh operation.
- */
- lbc->lsdmr = CFG_LBC_LSDMR_2;
- asm("sync");
- *sdram_addr = 0xff; /* 1 times */
- udelay(100);
- *sdram_addr = 0xff; /* 2 times */
- udelay(100);
- *sdram_addr = 0xff; /* 3 times */
- udelay(100);
- *sdram_addr = 0xff; /* 4 times */
- udelay(100);
- *sdram_addr = 0xff; /* 5 times */
- udelay(100);
- *sdram_addr = 0xff; /* 6 times */
- udelay(100);
- *sdram_addr = 0xff; /* 7 times */
- udelay(100);
- *sdram_addr = 0xff; /* 8 times */
- udelay(100);
-
- /* Mode register write operation */
- lbc->lsdmr = CFG_LBC_LSDMR_4;
- asm("sync");
- *(sdram_addr + 0xcc) = 0xff;
- udelay(100);
-
- /* Normal operation */
- lbc->lsdmr = CFG_LBC_LSDMR_5 | 0x40000000;
- asm("sync");
- *sdram_addr = 0xff;
- udelay(100);
-}
-#else
-void sdram_init(void)
-{
- puts("SDRAM on Local Bus is NOT available!\n");
-}
-#endif
-
-#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD)
-/*
- * ECC user commands
- */
-void ecc_print_status(void)
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ddr83xx_t *ddr = &immap->ddr;
-
- printf("\nECC mode: %s\n\n",
- (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");
-
- /* Interrupts */
- printf("Memory Error Interrupt Enable:\n");
- printf(" Multiple-Bit Error Interrupt Enable: %d\n",
- (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0);
- printf(" Single-Bit Error Interrupt Enable: %d\n",
- (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0);
- printf(" Memory Select Error Interrupt Enable: %d\n\n",
- (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0);
-
- /* Error disable */
- printf("Memory Error Disable:\n");
- printf(" Multiple-Bit Error Disable: %d\n",
- (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0);
- printf(" Sinle-Bit Error Disable: %d\n",
- (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0);
- printf(" Memory Select Error Disable: %d\n\n",
- (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);
-
- /* Error injection */
- printf("Memory Data Path Error Injection Mask High/Low: %08lx %08lx\n",
- ddr->data_err_inject_hi, ddr->data_err_inject_lo);
-
- printf("Memory Data Path Error Injection Mask ECC:\n");
- printf(" ECC Mirror Byte: %d\n",
- (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0);
- printf(" ECC Injection Enable: %d\n",
- (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0);
- printf(" ECC Error Injection Mask: 0x%02x\n\n",
- ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM);
-
- /* SBE counter/threshold */
- printf("Memory Single-Bit Error Management (0..255):\n");
- printf(" Single-Bit Error Threshold: %d\n",
- (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT);
- printf(" Single-Bit Error Counter: %d\n\n",
- (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT);
-
- /* Error detect */
- printf("Memory Error Detect:\n");
- printf(" Multiple Memory Errors: %d\n",
- (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0);
- printf(" Multiple-Bit Error: %d\n",
- (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0);
- printf(" Single-Bit Error: %d\n",
- (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0);
- printf(" Memory Select Error: %d\n\n",
- (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);
-
- /* Capture data */
- printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address);
- printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n",
- ddr->capture_data_hi, ddr->capture_data_lo);
- printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",
- ddr->capture_ecc & CAPTURE_ECC_ECE);
-
- printf("Memory Error Attributes Capture:\n");
- printf(" Data Beat Number: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >>
- ECC_CAPT_ATTR_BNUM_SHIFT);
- printf(" Transaction Size: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >>
- ECC_CAPT_ATTR_TSIZ_SHIFT);
- printf(" Transaction Source: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >>
- ECC_CAPT_ATTR_TSRC_SHIFT);
- printf(" Transaction Type: %d\n",
- (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >>
- ECC_CAPT_ATTR_TTYP_SHIFT);
- printf(" Error Information Valid: %d\n\n",
- ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
-}
-
-int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ddr83xx_t *ddr = &immap->ddr;
- volatile u32 val;
- u64 *addr;
- u32 count;
- register u64 *i;
- u32 ret[2];
- u32 pattern[2];
- u32 writeback[2];
-
- /* The pattern is written into memory to generate error */
- pattern[0] = 0xfedcba98UL;
- pattern[1] = 0x76543210UL;
-
- /* After injecting error, re-initialize the memory with the value */
- writeback[0] = 0x01234567UL;
- writeback[1] = 0x89abcdefUL;
-
- if (argc > 4) {
- printf("Usage:\n%s\n", cmdtp->usage);
- return 1;
- }
-
- if (argc == 2) {
- if (strcmp(argv[1], "status") == 0) {
- ecc_print_status();
- return 0;
- } else if (strcmp(argv[1], "captureclear") == 0) {
- ddr->capture_address = 0;
- ddr->capture_data_hi = 0;
- ddr->capture_data_lo = 0;
- ddr->capture_ecc = 0;
- ddr->capture_attributes = 0;
- return 0;
- }
- }
- if (argc == 3) {
- if (strcmp(argv[1], "sbecnt") == 0) {
- val = simple_strtoul(argv[2], NULL, 10);
- if (val > 255) {
- printf("Incorrect Counter value, "
- "should be 0..255\n");
- return 1;
- }
-
- val = (val << ECC_ERROR_MAN_SBEC_SHIFT);
- val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET);
-
- ddr->err_sbe = val;
- return 0;
- } else if (strcmp(argv[1], "sbethr") == 0) {
- val = simple_strtoul(argv[2], NULL, 10);
- if (val > 255) {
- printf("Incorrect Counter value, "
- "should be 0..255\n");
- return 1;
- }
-
- val = (val << ECC_ERROR_MAN_SBET_SHIFT);
- val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC);
-
- ddr->err_sbe = val;
- return 0;
- } else if (strcmp(argv[1], "errdisable") == 0) {
- val = ddr->err_disable;
-
- if (strcmp(argv[2], "+sbe") == 0) {
- val |= ECC_ERROR_DISABLE_SBED;
- } else if (strcmp(argv[2], "+mbe") == 0) {
- val |= ECC_ERROR_DISABLE_MBED;
- } else if (strcmp(argv[2], "+mse") == 0) {
- val |= ECC_ERROR_DISABLE_MSED;
- } else if (strcmp(argv[2], "+all") == 0) {
- val |= (ECC_ERROR_DISABLE_SBED |
- ECC_ERROR_DISABLE_MBED |
- ECC_ERROR_DISABLE_MSED);
- } else if (strcmp(argv[2], "-sbe") == 0) {
- val &= ~ECC_ERROR_DISABLE_SBED;
- } else if (strcmp(argv[2], "-mbe") == 0) {
- val &= ~ECC_ERROR_DISABLE_MBED;
- } else if (strcmp(argv[2], "-mse") == 0) {
- val &= ~ECC_ERROR_DISABLE_MSED;
- } else if (strcmp(argv[2], "-all") == 0) {
- val &= ~(ECC_ERROR_DISABLE_SBED |
- ECC_ERROR_DISABLE_MBED |
- ECC_ERROR_DISABLE_MSED);
- } else {
- printf("Incorrect err_disable field\n");
- return 1;
- }
-
- ddr->err_disable = val;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
- return 0;
- } else if (strcmp(argv[1], "errdetectclr") == 0) {
- val = ddr->err_detect;
-
- if (strcmp(argv[2], "mme") == 0) {
- val |= ECC_ERROR_DETECT_MME;
- } else if (strcmp(argv[2], "sbe") == 0) {
- val |= ECC_ERROR_DETECT_SBE;
- } else if (strcmp(argv[2], "mbe") == 0) {
- val |= ECC_ERROR_DETECT_MBE;
- } else if (strcmp(argv[2], "mse") == 0) {
- val |= ECC_ERROR_DETECT_MSE;
- } else if (strcmp(argv[2], "all") == 0) {
- val |= (ECC_ERROR_DETECT_MME |
- ECC_ERROR_DETECT_MBE |
- ECC_ERROR_DETECT_SBE |
- ECC_ERROR_DETECT_MSE);
- } else {
- printf("Incorrect err_detect field\n");
- return 1;
- }
-
- ddr->err_detect = val;
- return 0;
- } else if (strcmp(argv[1], "injectdatahi") == 0) {
- val = simple_strtoul(argv[2], NULL, 16);
-
- ddr->data_err_inject_hi = val;
- return 0;
- } else if (strcmp(argv[1], "injectdatalo") == 0) {
- val = simple_strtoul(argv[2], NULL, 16);
-
- ddr->data_err_inject_lo = val;
- return 0;
- } else if (strcmp(argv[1], "injectecc") == 0) {
- val = simple_strtoul(argv[2], NULL, 16);
- if (val > 0xff) {
- printf("Incorrect ECC inject mask, "
- "should be 0x00..0xff\n");
- return 1;
- }
- val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM);
-
- ddr->ecc_err_inject = val;
- return 0;
- } else if (strcmp(argv[1], "inject") == 0) {
- val = ddr->ecc_err_inject;
-
- if (strcmp(argv[2], "en") == 0)
- val |= ECC_ERR_INJECT_EIEN;
- else if (strcmp(argv[2], "dis") == 0)
- val &= ~ECC_ERR_INJECT_EIEN;
- else
- printf("Incorrect command\n");
-
- ddr->ecc_err_inject = val;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
- return 0;
- } else if (strcmp(argv[1], "mirror") == 0) {
- val = ddr->ecc_err_inject;
-
- if (strcmp(argv[2], "en") == 0)
- val |= ECC_ERR_INJECT_EMB;
- else if (strcmp(argv[2], "dis") == 0)
- val &= ~ECC_ERR_INJECT_EMB;
- else
- printf("Incorrect command\n");
-
- ddr->ecc_err_inject = val;
- return 0;
- }
- }
- if (argc == 4) {
- if (strcmp(argv[1], "testdw") == 0) {
- addr = (u64 *) simple_strtoul(argv[2], NULL, 16);
- count = simple_strtoul(argv[3], NULL, 16);
-
- if ((u32) addr % 8) {
- printf("Address not alligned on "
- "double word boundary\n");
- return 1;
- }
- disable_interrupts();
-
- for (i = addr; i < addr + count; i++) {
-
- /* enable injects */
- ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
-
- /* write memory location injecting errors */
- ppcDWstore((u32 *) i, pattern);
- __asm__ __volatile__("sync");
-
- /* disable injects */
- ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
-
- /* read data, this generates ECC error */
- ppcDWload((u32 *) i, ret);
- __asm__ __volatile__("sync");
-
- /* re-initialize memory, double word write the location again,
- * generates new ECC code this time */
- ppcDWstore((u32 *) i, writeback);
- __asm__ __volatile__("sync");
- }
- enable_interrupts();
- return 0;
- }
- if (strcmp(argv[1], "testword") == 0) {
- addr = (u64 *) simple_strtoul(argv[2], NULL, 16);
- count = simple_strtoul(argv[3], NULL, 16);
-
- if ((u32) addr % 8) {
- printf("Address not alligned on "
- "double word boundary\n");
- return 1;
- }
- disable_interrupts();
-
- for (i = addr; i < addr + count; i++) {
-
- /* enable injects */
- ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
-
- /* write memory location injecting errors */
- *(u32 *) i = 0xfedcba98UL;
- __asm__ __volatile__("sync");
-
- /* sub double word write,
- * bus will read-modify-write,
- * generates ECC error */
- *((u32 *) i + 1) = 0x76543210UL;
- __asm__ __volatile__("sync");
-
- /* disable injects */
- ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
- __asm__ __volatile__("sync");
- __asm__ __volatile__("isync");
-
- /* re-initialize memory,
- * double word write the location again,
- * generates new ECC code this time */
- ppcDWstore((u32 *) i, writeback);
- __asm__ __volatile__("sync");
- }
- enable_interrupts();
- return 0;
- }
- }
- printf("Usage:\n%s\n", cmdtp->usage);
- return 1;
-}
-
-U_BOOT_CMD(ecc, 4, 0, do_ecc,
- "ecc - support for DDR ECC features\n",
- "status - print out status info\n"
- "ecc captureclear - clear capture regs data\n"
- "ecc sbecnt <val> - set Single-Bit Error counter\n"
- "ecc sbethr <val> - set Single-Bit Threshold\n"
- "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n"
- " [-|+]sbe - Single-Bit Error\n"
- " [-|+]mbe - Multiple-Bit Error\n"
- " [-|+]mse - Memory Select Error\n"
- " [-|+]all - all errors\n"
- "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n"
- " mme - Multiple Memory Errors\n"
- " sbe - Single-Bit Error\n"
- " mbe - Multiple-Bit Error\n"
- " mse - Memory Select Error\n"
- " all - all errors\n"
- "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n"
- "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n"
- "ecc injectecc <ecc> - set ECC Error Injection Mask\n"
- "ecc inject <en|dis> - enable/disable error injection\n"
- "ecc mirror <en|dis> - enable/disable mirror byte\n"
- "ecc testdw <addr> <cnt> - test mem region with double word access:\n"
- " - enables injects\n"
- " - writes pattern injecting errors with double word access\n"
- " - disables injects\n"
- " - reads pattern back with double word access, generates error\n"
- " - re-inits memory\n"
- "ecc testword <addr> <cnt> - test mem region with word access:\n"
- " - enables injects\n"
- " - writes pattern injecting errors with word access\n"
- " - writes pattern with word access, generates error\n"
- " - disables injects\n" " - re-inits memory");
-#endif /* if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD) */
-
-#if (defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)) \
- && defined(CONFIG_OF_BOARD_SETUP)
-
-/*
- * Prototypes of functions that we use.
- */
-void ft_cpu_setup(void *blob, bd_t *bd);
-
-#ifdef CONFIG_PCI
-void ft_pci_setup(void *blob, bd_t *bd);
-#endif
-
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
-#if defined(CONFIG_OF_LIBFDT)
- int nodeoffset;
- int tmp[2];
-
- nodeoffset = fdt_path_offset (fdt, "/memory");
- if (nodeoffset >= 0) {
- tmp[0] = cpu_to_be32(bd->bi_memstart);
- tmp[1] = cpu_to_be32(bd->bi_memsize);
- fdt_setprop(fdt, nodeoffset, "reg", tmp, sizeof(tmp));
- }
-#else
- u32 *p;
- int len;
-
- p = ft_get_prop(blob, "/memory/reg", &len);
- if (p != NULL) {
- *p++ = cpu_to_be32(bd->bi_memstart);
- *p = cpu_to_be32(bd->bi_memsize);
- }
-#endif
-
-#ifdef CONFIG_PCI
- ft_pci_setup(blob, bd);
-#endif
- ft_cpu_setup(blob, bd);
-}
-#endif /* CONFIG_OF_x */
diff --git a/board/mpc8360emds/pci.c b/board/mpc8360emds/pci.c
deleted file mode 100644
index 158effe..0000000
--- a/board/mpc8360emds/pci.c
+++ /dev/null
@@ -1,336 +0,0 @@
-/*
- * Copyright (C) 2006 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- */
-
-/*
- * PCI Configuration space access support for MPC83xx PCI Bridge
- */
-#include <asm/mmu.h>
-#include <asm/io.h>
-#include <common.h>
-#include <pci.h>
-#include <i2c.h>
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-#endif
-#if defined(CONFIG_OF_LIBFDT)
-#include <libfdt.h>
-#include <libfdt_env.h>
-#endif
-
-#include <asm/fsl_i2c.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_PCI)
-#define PCI_FUNCTION_CONFIG 0x44
-#define PCI_FUNCTION_CFG_LOCK 0x20
-
-/*
- * Initialize PCI Devices, report devices found
- */
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_mpc83xxemds_config_table[] = {
- {
- PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- pci_cfgfunc_config_device,
- {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMON_MEMORY | PCI_COMMAND_MASTER}
- },
- {}
-}
-#endif
-static struct pci_controller hose[] = {
- {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc83xxemds_config_table,
-#endif
- },
-};
-
-/**********************************************************************
- * pci_init_board()
- *********************************************************************/
-void pci_init_board(void)
-#ifdef CONFIG_PCISLAVE
-{
- u16 reg16;
- volatile immap_t *immr;
- volatile law83xx_t *pci_law;
- volatile pot83xx_t *pci_pot;
- volatile pcictrl83xx_t *pci_ctrl;
- volatile pciconf83xx_t *pci_conf;
-
- immr = (immap_t *) CFG_IMMR;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
- /*
- * Configure PCI Inbound Translation Windows
- */
- pci_ctrl[0].pitar0 = 0x0;
- pci_ctrl[0].pibar0 = 0x0;
- pci_ctrl[0].piwar0 = PIWAR_EN | PIWAR_RTT_SNOOP |
- PIWAR_WTT_SNOOP | PIWAR_IWS_4K;
-
- pci_ctrl[0].pitar1 = 0x0;
- pci_ctrl[0].pibar1 = 0x0;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 &= ~PIWAR_EN;
-
- pci_ctrl[0].pitar2 = 0x0;
- pci_ctrl[0].pibar2 = 0x0;
- pci_ctrl[0].piebar2 = 0x0;
- pci_ctrl[0].piwar2 &= ~PIWAR_EN;
-
- hose[0].first_busno = 0;
- hose[0].last_busno = 0xff;
- pci_setup_indirect(&hose[0],
- (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
- reg16 = 0xff;
-
- pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(&hose[0], PCI_BDF(0, 0, 0),
- PCI_LATENCY_TIMER, 0x80);
-
- /*
- * Unlock configuration lock in PCI function configuration register.
- */
- pci_hose_read_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_FUNCTION_CONFIG, ®16);
- reg16 &= ~(PCI_FUNCTION_CFG_LOCK);
- pci_hose_write_config_word(&hose[0], PCI_BDF(0, 0, 0),
- PCI_FUNCTION_CONFIG, reg16);
-
- printf("Enabled PCI 32bit Agent Mode\n");
-}
-#else
-{
- volatile immap_t *immr;
- volatile clk83xx_t *clk;
- volatile law83xx_t *pci_law;
- volatile pot83xx_t *pci_pot;
- volatile pcictrl83xx_t *pci_ctrl;
- volatile pciconf83xx_t *pci_conf;
-
- u8 val8, orig_i2c_bus;
- u16 reg16;
- u32 val32;
- u32 dev;
-
- immr = (immap_t *) CFG_IMMR;
- clk = (clk83xx_t *) & immr->clk;
- pci_law = immr->sysconf.pcilaw;
- pci_pot = immr->ios.pot;
- pci_ctrl = immr->pci_ctrl;
- pci_conf = immr->pci_conf;
- /*
- * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
- */
- val32 = clk->occr;
- udelay(2000);
-#if defined(PCI_66M)
- clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
- printf("PCI clock is 66MHz\n");
-#elif defined(PCI_33M)
- clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2 |
- OCCR_PCICD0 | OCCR_PCICD1 | OCCR_PCICD2 | OCCR_PCICR;
- printf("PCI clock is 33MHz\n");
-#else
- clk->occr = OCCR_PCICOE0 | OCCR_PCICOE1 | OCCR_PCICOE2;
- printf("PCI clock is 66MHz\n");
-#endif
- udelay(2000);
-
- /*
- * Configure PCI Local Access Windows
- */
- pci_law[0].bar = CFG_PCI_MEM_PHYS & LAWBAR_BAR;
- pci_law[0].ar = LAWAR_EN | LAWAR_SIZE_512M;
-
- pci_law[1].bar = CFG_PCI_IO_PHYS & LAWBAR_BAR;
- pci_law[1].ar = LAWAR_EN | LAWAR_SIZE_1M;
-
- /*
- * Configure PCI Outbound Translation Windows
- */
-
- /* PCI mem space - prefetch */
- pci_pot[0].potar = (CFG_PCI_MEM_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[0].pobar = (CFG_PCI_MEM_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[0].pocmr =
- POCMR_EN | POCMR_SE | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /* PCI mmio - non-prefetch mem space */
- pci_pot[1].potar = (CFG_PCI_MMIO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[1].pobar = (CFG_PCI_MMIO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[1].pocmr = POCMR_EN | (POCMR_CM_256M & POCMR_CM_MASK);
-
- /* PCI IO space */
- pci_pot[2].potar = (CFG_PCI_IO_BASE >> 12) & POTAR_TA_MASK;
- pci_pot[2].pobar = (CFG_PCI_IO_PHYS >> 12) & POBAR_BA_MASK;
- pci_pot[2].pocmr = POCMR_EN | POCMR_IO | (POCMR_CM_1M & POCMR_CM_MASK);
-
- /*
- * Configure PCI Inbound Translation Windows
- */
- pci_ctrl[0].pitar1 = (CFG_PCI_SLV_MEM_LOCAL >> 12) & PITAR_TA_MASK;
- pci_ctrl[0].pibar1 = (CFG_PCI_SLV_MEM_BUS >> 12) & PIBAR_MASK;
- pci_ctrl[0].piebar1 = 0x0;
- pci_ctrl[0].piwar1 =
- PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP |
- PIWAR_IWS_2G;
-
- /*
- * Assign PIB PMC slot to desired PCI bus
- */
-
- /* Switch temporarily to I2C bus #2 */
- orig_i2c_bus = i2c_get_bus_num();
- i2c_set_bus_num(1);
-
- val8 = 0;
- i2c_write(0x23, 0x6, 1, &val8, 1);
- i2c_write(0x23, 0x7, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x23, 0x2, 1, &val8, 1);
- i2c_write(0x23, 0x3, 1, &val8, 1);
-
- val8 = 0;
- i2c_write(0x26, 0x6, 1, &val8, 1);
- val8 = 0x34;
- i2c_write(0x26, 0x7, 1, &val8, 1);
-
- val8 = 0xf3; /*PMC1, PMC2, PMC3 slot to PCI bus */
- i2c_write(0x26, 0x2, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x26, 0x3, 1, &val8, 1);
-
- val8 = 0;
- i2c_write(0x27, 0x6, 1, &val8, 1);
- i2c_write(0x27, 0x7, 1, &val8, 1);
- val8 = 0xff;
- i2c_write(0x27, 0x2, 1, &val8, 1);
- val8 = 0xef;
- i2c_write(0x27, 0x3, 1, &val8, 1);
- asm("eieio");
-
- /* Reset to original I2C bus */
- i2c_set_bus_num(orig_i2c_bus);
-
- /*
- * Release PCI RST Output signal
- */
- udelay(2000);
- pci_ctrl[0].gcr = 1;
- udelay(2000);
-
- hose[0].first_busno = 0;
- hose[0].last_busno = 0xff;
-
- /* PCI memory prefetch space */
- pci_set_region(hose[0].regions + 0,
- CFG_PCI_MEM_BASE,
- CFG_PCI_MEM_PHYS,
- CFG_PCI_MEM_SIZE, PCI_REGION_MEM | PCI_REGION_PREFETCH);
-
- /* PCI memory space */
- pci_set_region(hose[0].regions + 1,
- CFG_PCI_MMIO_BASE,
- CFG_PCI_MMIO_PHYS, CFG_PCI_MMIO_SIZE, PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose[0].regions + 2,
- CFG_PCI_IO_BASE,
- CFG_PCI_IO_PHYS, CFG_PCI_IO_SIZE, PCI_REGION_IO);
-
- /* System memory space */
- pci_set_region(hose[0].regions + 3,
- CFG_PCI_SLV_MEM_LOCAL,
- CFG_PCI_SLV_MEM_BUS,
- CFG_PCI_SLV_MEM_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- hose[0].region_count = 4;
-
- pci_setup_indirect(&hose[0],
- (CFG_IMMR + 0x8300), (CFG_IMMR + 0x8304));
-
- pci_register_hose(hose);
-
- /*
- * Write command register
- */
- reg16 = 0xff;
- dev = PCI_BDF(0, 0, 0);
- pci_hose_read_config_word(&hose[0], dev, PCI_COMMAND, ®16);
- reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
- pci_hose_write_config_word(&hose[0], dev, PCI_COMMAND, reg16);
-
- /*
- * Clear non-reserved bits in status register.
- */
- pci_hose_write_config_word(&hose[0], dev, PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(&hose[0], dev, PCI_LATENCY_TIMER, 0x80);
- pci_hose_write_config_byte(&hose[0], dev, PCI_CACHE_LINE_SIZE, 0x08);
-
- printf("PCI 32bit bus on PMC1 & PMC2 & PMC3\n");
-
- /*
- * Hose scan.
- */
- hose->last_busno = pci_hose_scan(hose);
-}
-#endif /* CONFIG_PCISLAVE */
-
-#if defined(CONFIG_OF_LIBFDT)
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
- int nodeoffset;
- int err;
- int tmp[2];
-
- nodeoffset = fdt_path_offset (fdt, "/" OF_SOC "/pci@8500");
- if (nodeoffset >= 0) {
- tmp[0] = cpu_to_be32(hose[0].first_busno);
- tmp[1] = cpu_to_be32(hose[0].last_busno);
- err = fdt_setprop(fdt, nodeoffset, "bus-range", tmp, sizeof(tmp));
- }
-}
-#endif /* CONFIG_OF_LIBFDT */
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_pci_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
- p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
- if (p != NULL) {
- p[0] = hose[0].first_busno;
- p[1] = hose[0].last_busno;
- }
-}
-#endif /* CONFIG_OF_FLAT_TREE */
-#endif /* CONFIG_PCI */
diff --git a/board/mpc8360emds/u-boot.lds b/board/mpc8360emds/u-boot.lds
deleted file mode 100644
index 937c87a..0000000
--- a/board/mpc8360emds/u-boot.lds
+++ /dev/null
@@ -1,123 +0,0 @@
-/*
- * (C) Copyright 2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/mpc8560ads/mpc8560ads.c b/board/mpc8560ads/mpc8560ads.c
index d19bad6..eef524b 100644
--- a/board/mpc8560ads/mpc8560ads.c
+++ b/board/mpc8560ads/mpc8560ads.c
@@ -550,8 +550,33 @@
#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
void
+ft_soc_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ p = ft_get_prop(blob, "/" OF_SOC "/cpm@e0000000/brg-frequency", &len);
+
+ if (p != NULL)
+ *p = cpu_to_be32(bd->bi_brgfreq);
+
+ p = ft_get_prop(blob,
+ "/" OF_SOC "/cpm@e0000000/scc@91a00/current-speed",
+ &len);
+ if (p != NULL)
+ *p = cpu_to_be32(bd->bi_baudrate);
+
+ p = ft_get_prop(blob,
+ "/" OF_SOC "/cpm@e0000000/scc@91a20/current-speed",
+ &len);
+ if (p != NULL)
+ *p = cpu_to_be32(bd->bi_baudrate);
+}
+
+void
ft_board_setup(void *blob, bd_t *bd)
{
ft_cpu_setup(blob, bd);
+ ft_soc_setup(blob, bd);
}
#endif
diff --git a/board/mpc8568mds/bcsr.c b/board/mpc8568mds/bcsr.c
index 2e2e8cd..aae0f98 100644
--- a/board/mpc8568mds/bcsr.c
+++ b/board/mpc8568mds/bcsr.c
@@ -47,3 +47,10 @@
bcsr[9] &= ~(0x01);
}
+
+void enable_8568mds_qe_mdio()
+{
+ u8 *bcsr = (u8 *)(CFG_BCSR);
+
+ bcsr[7] |= 0x01;
+}
diff --git a/board/mpc8568mds/bcsr.h b/board/mpc8568mds/bcsr.h
index 8d4cb2f..aefd9bf 100644
--- a/board/mpc8568mds/bcsr.h
+++ b/board/mpc8568mds/bcsr.h
@@ -95,5 +95,6 @@
void enable_8568mds_duart(void);
void enable_8568mds_flash_write(void);
void disable_8568mds_flash_write(void);
+void enable_8568mds_qe_mdio(void);
#endif /* __BCSR_H_ */
diff --git a/board/mpc8568mds/init.S b/board/mpc8568mds/init.S
index 0d87982..972a7d4 100644
--- a/board/mpc8568mds/init.S
+++ b/board/mpc8568mds/init.S
@@ -143,54 +143,42 @@
.long TLB1_MAS3(E500_TLB_RPN(CFG_FLASH_BASE), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLBe 2: 256M Non-cacheable, guarded
- * 0x80000000 256M PCI1 MEM
+ * TLBe 2: 1G Non-cacheable, guarded
+ * 0x80000000 512M PCI1 MEM
+ * 0xa0000000 512M PCIe MEM
*/
.long TLB1_MAS0(1, 2, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
+ .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_1G)
.long TLB1_MAS2(E500_TLB_EPN(CFG_PCI1_MEM_BASE), 0,0,0,0,1,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_PCI1_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLBe 3: 256M Non-cacheable, guarded
- * 0xa0000000 256M PCIe Mem
- */
- .long TLB1_MAS0(1, 3, 0)
- .long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256M)
- .long TLB1_MAS2(E500_TLB_EPN(CFG_PEX_MEM_BASE), 0,0,0,0,1,0,1,0)
- .long TLB1_MAS3(E500_TLB_RPN(CFG_PEX_MEM_BASE), 0,0,0,0,0,1,0,1,0,1)
-
- /*
- * TLBe 4: Reserved for future usage
- */
-
- /*
- * TLBe 5: 64M Non-cacheable, guarded
+ * TLBe 3: 64M Non-cacheable, guarded
* 0xe000_0000 1M CCSRBAR
* 0xe200_0000 8M PCI1 IO
* 0xe280_0000 8M PCIe IO
*/
- .long TLB1_MAS0(1, 5, 0)
+ .long TLB1_MAS0(1, 3, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
.long TLB1_MAS2(E500_TLB_EPN(CFG_CCSRBAR), 0,0,0,0,1,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_CCSRBAR), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLBe 6: 64M Cacheable, non-guarded
+ * TLBe 4: 64M Cacheable, non-guarded
* 0xf000_0000 64M LBC SDRAM
*/
- .long TLB1_MAS0(1, 6, 0)
+ .long TLB1_MAS0(1, 4, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_64M)
.long TLB1_MAS2(E500_TLB_EPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,0,0,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_LBC_SDRAM_BASE), 0,0,0,0,0,1,0,1,0,1)
/*
- * TLBe 7: 256K Non-cacheable, guarded
+ * TLBe 5: 256K Non-cacheable, guarded
* 0xf8000000 32K BCSR
* 0xf8008000 32K PIB (CS4)
* 0xf8010000 32K PIB (CS5)
*/
- .long TLB1_MAS0(1, 7, 0)
+ .long TLB1_MAS0(1, 5, 0)
.long TLB1_MAS1(1, 1, 0, 0, BOOKE_PAGESZ_256K)
.long TLB1_MAS2(E500_TLB_EPN(CFG_BCSR_BASE), 0,0,0,0,1,0,1,0)
.long TLB1_MAS3(E500_TLB_RPN(CFG_BCSR_BASE), 0,0,0,0,0,1,0,1,0,1)
@@ -202,12 +190,12 @@
* LAW(Local Access Window) configuration:
*
*0) 0x0000_0000 0x7fff_ffff DDR 2G
- *1) 0x8000_0000 0x9fff_ffff PCI1 MEM 256MB
- *2) 0xa000_0000 0xbfff_ffff PCIe MEM 256MB
- *5) 0xc000_0000 0xdfff_ffff SRIO 256MB
+ *1) 0x8000_0000 0x9fff_ffff PCI1 MEM 512MB
+ *2) 0xa000_0000 0xbfff_ffff PCIe MEM 512MB
*-) 0xe000_0000 0xe00f_ffff CCSR 1M
*3) 0xe200_0000 0xe27f_ffff PCI1 I/O 8M
- *4) 0xe280_0000 0xe2ff_ffff PCIe I/0 8M
+ *4) 0xe280_0000 0xe2ff_ffff PCIe I/O 8M
+ *5) 0xc000_0000 0xdfff_ffff SRIO 512MB
*6.a) 0xf000_0000 0xf3ff_ffff SDRAM 64MB
*6.b) 0xf800_0000 0xf800_7fff BCSR 32KB
*6.c) 0xf800_8000 0xf800_ffff PIB (CS4) 32KB
@@ -226,20 +214,20 @@
#define LAWAR0 ((LAWAR_TRGT_IF_DDR | (LAWAR_SIZE & LAWAR_SIZE_128M)) & ~LAWAR_EN)
#define LAWBAR1 ((CFG_PCI1_MEM_BASE>>12) & 0xfffff)
-#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
+#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
#define LAWBAR2 ((CFG_PEX_MEM_BASE>>12) & 0xfffff)
-#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_256M))
+#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_512M))
#define LAWBAR3 ((CFG_PCI1_IO_PHYS>>12) & 0xfffff)
#define LAWAR3 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_8M))
#define LAWBAR4 ((CFG_PEX_IO_PHYS>>12) & 0xfffff)
-#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_16M))
+#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_PEX | (LAWAR_SIZE & LAWAR_SIZE_8M))
#define LAWBAR5 ((CFG_SRIO_MEM_BASE>>12) & 0xfffff)
-#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_256M))
+#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
/* LBC window - maps 256M. That's SDRAM, BCSR, PIBs, and Flash */
#define LAWBAR6 ((CFG_LBC_SDRAM_BASE>>12) & 0xfffff)
diff --git a/board/mpc8568mds/mpc8568mds.c b/board/mpc8568mds/mpc8568mds.c
index 9c7960d..818ff13 100644
--- a/board/mpc8568mds/mpc8568mds.c
+++ b/board/mpc8568mds/mpc8568mds.c
@@ -27,9 +27,66 @@
#include <asm/processor.h>
#include <asm/immap_85xx.h>
#include <spd.h>
+#include <i2c.h>
+#include <ioports.h>
#include "bcsr.h"
+const qe_iop_conf_t qe_iop_conf_tab[] = {
+ /* GETH1 */
+ {4, 10, 1, 0, 2}, /* TxD0 */
+ {4, 9, 1, 0, 2}, /* TxD1 */
+ {4, 8, 1, 0, 2}, /* TxD2 */
+ {4, 7, 1, 0, 2}, /* TxD3 */
+ {4, 23, 1, 0, 2}, /* TxD4 */
+ {4, 22, 1, 0, 2}, /* TxD5 */
+ {4, 21, 1, 0, 2}, /* TxD6 */
+ {4, 20, 1, 0, 2}, /* TxD7 */
+ {4, 15, 2, 0, 2}, /* RxD0 */
+ {4, 14, 2, 0, 2}, /* RxD1 */
+ {4, 13, 2, 0, 2}, /* RxD2 */
+ {4, 12, 2, 0, 2}, /* RxD3 */
+ {4, 29, 2, 0, 2}, /* RxD4 */
+ {4, 28, 2, 0, 2}, /* RxD5 */
+ {4, 27, 2, 0, 2}, /* RxD6 */
+ {4, 26, 2, 0, 2}, /* RxD7 */
+ {4, 11, 1, 0, 2}, /* TX_EN */
+ {4, 24, 1, 0, 2}, /* TX_ER */
+ {4, 16, 2, 0, 2}, /* RX_DV */
+ {4, 30, 2, 0, 2}, /* RX_ER */
+ {4, 17, 2, 0, 2}, /* RX_CLK */
+ {4, 19, 1, 0, 2}, /* GTX_CLK */
+ {1, 31, 2, 0, 3}, /* GTX125 */
+
+ /* GETH2 */
+ {5, 10, 1, 0, 2}, /* TxD0 */
+ {5, 9, 1, 0, 2}, /* TxD1 */
+ {5, 8, 1, 0, 2}, /* TxD2 */
+ {5, 7, 1, 0, 2}, /* TxD3 */
+ {5, 23, 1, 0, 2}, /* TxD4 */
+ {5, 22, 1, 0, 2}, /* TxD5 */
+ {5, 21, 1, 0, 2}, /* TxD6 */
+ {5, 20, 1, 0, 2}, /* TxD7 */
+ {5, 15, 2, 0, 2}, /* RxD0 */
+ {5, 14, 2, 0, 2}, /* RxD1 */
+ {5, 13, 2, 0, 2}, /* RxD2 */
+ {5, 12, 2, 0, 2}, /* RxD3 */
+ {5, 29, 2, 0, 2}, /* RxD4 */
+ {5, 28, 2, 0, 2}, /* RxD5 */
+ {5, 27, 2, 0, 3}, /* RxD6 */
+ {5, 26, 2, 0, 2}, /* RxD7 */
+ {5, 11, 1, 0, 2}, /* TX_EN */
+ {5, 24, 1, 0, 2}, /* TX_ER */
+ {5, 16, 2, 0, 2}, /* RX_DV */
+ {5, 30, 2, 0, 2}, /* RX_ER */
+ {5, 17, 2, 0, 2}, /* RX_CLK */
+ {5, 19, 1, 0, 2}, /* GTX_CLK */
+ {1, 31, 2, 0, 3}, /* GTX125 */
+ {4, 6, 3, 0, 2}, /* MDIO */
+ {4, 5, 1, 0, 2}, /* MDC */
+ {0, 0, 0, 0, QE_IOP_TAB_END}, /* END of table */
+};
+
#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
extern void ddr_enable_ecc(unsigned int dram_size);
@@ -49,6 +106,18 @@
enable_8568mds_duart();
enable_8568mds_flash_write();
+#if defined(CONFIG_QE) && !defined(CONFIG_eTSEC_MDIO_BUS)
+ enable_8568mds_qe_mdio();
+#endif
+
+#ifdef CFG_I2C2_OFFSET
+ /* Enable I2C2_SCL and I2C2_SDA */
+ volatile struct par_io *port_c;
+ port_c = (struct par_io*)(CFG_IMMR + 0xe0140);
+ port_c->cpdir2 |= 0x0f000000;
+ port_c->cppar2 &= ~0x0f000000;
+ port_c->cppar2 |= 0x0a000000;
+#endif
return 0;
}
@@ -269,20 +338,62 @@
#endif
static struct pci_controller hose[] = {
+ {
#ifndef CONFIG_PCI_PNP
- { config_table: pci_mpc8568mds_config_table,},
+ config_table: pci_mpc8568mds_config_table,
#endif
-#ifdef CONFIG_MPC85XX_PCI2
- {},
-#endif
+ }
};
#endif /* CONFIG_PCI */
+/*
+ * pib_init() -- Initialize the PCA9555 IO expander on the PIB board
+ */
+void
+pib_init(void)
+{
+ u8 val8, orig_i2c_bus;
+ /*
+ * Assign PIB PMC2/3 to PCI bus
+ */
+
+ /*switch temporarily to I2C bus #2 */
+ orig_i2c_bus = i2c_get_bus_num();
+ i2c_set_bus_num(1);
+
+ val8 = 0x00;
+ i2c_write(0x23, 0x6, 1, &val8, 1);
+ i2c_write(0x23, 0x7, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x23, 0x2, 1, &val8, 1);
+ i2c_write(0x23, 0x3, 1, &val8, 1);
+
+ val8 = 0x00;
+ i2c_write(0x26, 0x6, 1, &val8, 1);
+ val8 = 0x34;
+ i2c_write(0x26, 0x7, 1, &val8, 1);
+ val8 = 0xf9;
+ i2c_write(0x26, 0x2, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x26, 0x3, 1, &val8, 1);
+
+ val8 = 0x00;
+ i2c_write(0x27, 0x6, 1, &val8, 1);
+ i2c_write(0x27, 0x7, 1, &val8, 1);
+ val8 = 0xff;
+ i2c_write(0x27, 0x2, 1, &val8, 1);
+ val8 = 0xef;
+ i2c_write(0x27, 0x3, 1, &val8, 1);
+
+ asm("eieio");
+}
+
void
pci_init_board(void)
{
#ifdef CONFIG_PCI
- pci_mpc85xx_init(&hose);
+ pib_init();
+ pci_mpc85xx_init(hose);
#endif
}
diff --git a/board/mpc8641hpcn/Makefile b/board/mpc8641hpcn/Makefile
deleted file mode 100644
index 9625211..0000000
--- a/board/mpc8641hpcn/Makefile
+++ /dev/null
@@ -1,54 +0,0 @@
-#
-# (C) Copyright 2001
-# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-include $(TOPDIR)/config.mk
-
-LIB = $(obj)lib$(BOARD).a
-
-COBJS := $(BOARD).o sys_eeprom.o \
- ../freescale/common/pixis.o
-
-SOBJS := init.o
-
-SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
-OBJS := $(addprefix $(obj),$(COBJS))
-SOBJS := $(addprefix $(obj),$(SOBJS))
-
-$(LIB): $(obj).depend $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $(OBJS)
-
-clean:
- rm -f $(OBJS) $(SOBJS)
-
-.PHONY: distclean
-distclean: clean
- rm -f $(LIB) core *.bak .depend
-
-#########################################################################
-
-# defines $(obj).depend target
-include $(SRCTREE)/rules.mk
-
-sinclude ($obj).depend
-
-#########################################################################
diff --git a/board/mpc8641hpcn/config.mk b/board/mpc8641hpcn/config.mk
deleted file mode 100644
index 989a40b..0000000
--- a/board/mpc8641hpcn/config.mk
+++ /dev/null
@@ -1,31 +0,0 @@
-# Copyright 2004 Freescale Semiconductor.
-# Modified by Jeff Brown
-#
-# See file CREDITS for list of people who contributed to this
-# project.
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License as
-# published by the Free Software Foundation; either version 2 of
-# the License, or (at your option) any later version.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
-# MA 02111-1307 USA
-#
-
-#
-# mpc8641hpcn board
-# default CCSRBAR is at 0xff700000
-# assume U-Boot is less than 0.5MB
-#
-TEXT_BASE = 0xfff01000
-
-PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
-PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1 -maltivec -mabi=altivec -msoft-float
diff --git a/board/mpc8641hpcn/mpc8641hpcn.c b/board/mpc8641hpcn/mpc8641hpcn.c
deleted file mode 100644
index 7d7e2af..0000000
--- a/board/mpc8641hpcn/mpc8641hpcn.c
+++ /dev/null
@@ -1,319 +0,0 @@
-/*
- * Copyright 2006, 2007 Freescale Semiconductor.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/processor.h>
-#include <asm/immap_86xx.h>
-#include <spd.h>
-#include <asm/io.h>
-
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
-extern void ft_cpu_setup(void *blob, bd_t *bd);
-#endif
-
-#include "../freescale/common/pixis.h"
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
-extern void ddr_enable_ecc(unsigned int dram_size);
-#endif
-
-#if defined(CONFIG_SPD_EEPROM)
-#include "spd_sdram.h"
-#endif
-
-void sdram_init(void);
-long int fixed_sdram(void);
-
-
-int board_early_init_f(void)
-{
- return 0;
-}
-
-int checkboard(void)
-{
- puts("Board: MPC8641HPCN\n");
-
-#ifdef CONFIG_PCI
-
- volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
- volatile ccsr_gur_t *gur = &immap->im_gur;
- volatile ccsr_pex_t *pex1 = &immap->im_pex1;
-
- uint devdisr = gur->devdisr;
- uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
- uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17;
- uint pex1_agent = (host1_agent == 0) || (host1_agent == 1);
-
- if ((io_sel == 2 || io_sel == 3 || io_sel == 5
- || io_sel == 6 || io_sel == 7 || io_sel == 0xF)
- && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
- debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host");
- debug("0x%08x=0x%08x ", &pex1->pme_msg_det, pex1->pme_msg_det);
- if (pex1->pme_msg_det) {
- pex1->pme_msg_det = 0xffffffff;
- debug(" with errors. Clearing. Now 0x%08x",
- pex1->pme_msg_det);
- }
- debug("\n");
- } else {
- puts("PCI-EXPRESS 1: Disabled\n");
- }
-
-#else
- puts("PCI-EXPRESS1: Disabled\n");
-#endif
-
- return 0;
-}
-
-
-long int
-initdram(int board_type)
-{
- long dram_size = 0;
-
-#if defined(CONFIG_SPD_EEPROM)
- dram_size = spd_sdram();
-#else
- dram_size = fixed_sdram();
-#endif
-
-#if defined(CFG_RAMBOOT)
- puts(" DDR: ");
- return dram_size;
-#endif
-
-#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
- /*
- * Initialize and enable DDR ECC.
- */
- ddr_enable_ecc(dram_size);
-#endif
-
- puts(" DDR: ");
- return dram_size;
-}
-
-
-#if defined(CFG_DRAM_TEST)
-int
-testdram(void)
-{
- uint *pstart = (uint *) CFG_MEMTEST_START;
- uint *pend = (uint *) CFG_MEMTEST_END;
- uint *p;
-
- puts("SDRAM test phase 1:\n");
- for (p = pstart; p < pend; p++)
- *p = 0xaaaaaaaa;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0xaaaaaaaa) {
- printf("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- puts("SDRAM test phase 2:\n");
- for (p = pstart; p < pend; p++)
- *p = 0x55555555;
-
- for (p = pstart; p < pend; p++) {
- if (*p != 0x55555555) {
- printf("SDRAM test fails at: %08x\n", (uint) p);
- return 1;
- }
- }
-
- puts("SDRAM test passed.\n");
- return 0;
-}
-#endif
-
-
-#if !defined(CONFIG_SPD_EEPROM)
-/*
- * Fixed sdram init -- doesn't use serial presence detect.
- */
-long int
-fixed_sdram(void)
-{
-#if !defined(CFG_RAMBOOT)
- volatile immap_t *immap = (immap_t *) CFG_IMMR;
- volatile ccsr_ddr_t *ddr = &immap->im_ddr1;
-
- ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
- ddr->cs0_config = CFG_DDR_CS0_CONFIG;
- ddr->ext_refrec = CFG_DDR_EXT_REFRESH;
- ddr->timing_cfg_0 = CFG_DDR_TIMING_0;
- ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
- ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
- ddr->sdram_mode_1 = CFG_DDR_MODE_1;
- ddr->sdram_mode_2 = CFG_DDR_MODE_2;
- ddr->sdram_interval = CFG_DDR_INTERVAL;
- ddr->sdram_data_init = CFG_DDR_DATA_INIT;
- ddr->sdram_clk_cntl = CFG_DDR_CLK_CTRL;
- ddr->sdram_ocd_cntl = CFG_DDR_OCD_CTRL;
- ddr->sdram_ocd_status = CFG_DDR_OCD_STATUS;
-
-#if defined (CONFIG_DDR_ECC)
- ddr->err_disable = 0x0000008D;
- ddr->err_sbe = 0x00ff0000;
-#endif
- asm("sync;isync");
-
- udelay(500);
-
-#if defined (CONFIG_DDR_ECC)
- /* Enable ECC checking */
- ddr->sdram_cfg_1 = (CFG_DDR_CONTROL | 0x20000000);
-#else
- ddr->sdram_cfg_1 = CFG_DDR_CONTROL;
- ddr->sdram_cfg_2 = CFG_DDR_CONTROL2;
-#endif
- asm("sync; isync");
-
- udelay(500);
-#endif
- return CFG_SDRAM_SIZE * 1024 * 1024;
-}
-#endif /* !defined(CONFIG_SPD_EEPROM) */
-
-
-#if defined(CONFIG_PCI)
-/*
- * Initialize PCI Devices, report devices found.
- */
-
-#ifndef CONFIG_PCI_PNP
-static struct pci_config_table pci_fsl86xxads_config_table[] = {
- {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
- PCI_IDSEL_NUMBER, PCI_ANY_ID,
- pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
- PCI_ENET0_MEMADDR,
- PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
- {}
-};
-#endif
-
-
-static struct pci_controller hose = {
-#ifndef CONFIG_PCI_PNP
- config_table:pci_mpc86xxcts_config_table,
-#endif
-};
-
-#endif /* CONFIG_PCI */
-
-void pci_init_board(void)
-{
-#ifdef CONFIG_PCI
- extern void pci_mpc86xx_init(struct pci_controller *hose);
-
- pci_mpc86xx_init(&hose);
-#endif /* CONFIG_PCI */
-}
-
-#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
-void
-ft_board_setup(void *blob, bd_t *bd)
-{
- u32 *p;
- int len;
-
- ft_cpu_setup(blob, bd);
-
- p = ft_get_prop(blob, "/memory/reg", &len);
- if (p != NULL) {
- *p++ = cpu_to_be32(bd->bi_memstart);
- *p = cpu_to_be32(bd->bi_memsize);
- }
-}
-#endif
-
-
-/*
- * get_board_sys_clk
- * Reads the FPGA on board for CONFIG_SYS_CLK_FREQ
- */
-
-unsigned long
-get_board_sys_clk(ulong dummy)
-{
- u8 i, go_bit, rd_clks;
- ulong val = 0;
-
- go_bit = in8(PIXIS_BASE + PIXIS_VCTL);
- go_bit &= 0x01;
-
- rd_clks = in8(PIXIS_BASE + PIXIS_VCFGEN0);
- rd_clks &= 0x1C;
-
- /*
- * Only if both go bit and the SCLK bit in VCFGEN0 are set
- * should we be using the AUX register. Remember, we also set the
- * GO bit to boot from the alternate bank on the on-board flash
- */
-
- if (go_bit) {
- if (rd_clks == 0x1c)
- i = in8(PIXIS_BASE + PIXIS_AUX);
- else
- i = in8(PIXIS_BASE + PIXIS_SPD);
- } else {
- i = in8(PIXIS_BASE + PIXIS_SPD);
- }
-
- i &= 0x07;
-
- switch (i) {
- case 0:
- val = 33000000;
- break;
- case 1:
- val = 40000000;
- break;
- case 2:
- val = 50000000;
- break;
- case 3:
- val = 66000000;
- break;
- case 4:
- val = 83000000;
- break;
- case 5:
- val = 100000000;
- break;
- case 6:
- val = 134000000;
- break;
- case 7:
- val = 166000000;
- break;
- }
-
- return val;
-}
diff --git a/board/mpc8641hpcn/sys_eeprom.c b/board/mpc8641hpcn/sys_eeprom.c
deleted file mode 100644
index 74e2a3d..0000000
--- a/board/mpc8641hpcn/sys_eeprom.c
+++ /dev/null
@@ -1,256 +0,0 @@
-/*
- * Copyright 2006 Freescale Semiconductor
- * York Sun (yorksun@freescale.com)
- * Haiying Wang (haiying.wang@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <i2c.h>
-#include <linux/ctype.h>
-
-#ifdef CFG_ID_EEPROM
-typedef struct {
- unsigned char id[4]; /* 0x0000 - 0x0003 */
- unsigned char sn[12]; /* 0x0004 - 0x000F */
- unsigned char errata[5]; /* 0x0010 - 0x0014 */
- unsigned char date[7]; /* 0x0015 - 0x001a */
- unsigned char res_1[37]; /* 0x001b - 0x003f */
- unsigned char tab_size; /* 0x0040 */
- unsigned char tab_flag; /* 0x0041 */
- unsigned char mac[8][6]; /* 0x0042 - 0x0071 */
- unsigned char res_2[126]; /* 0x0072 - 0x00ef */
- unsigned int crc; /* 0x00f0 - 0x00f3 crc32 checksum */
-} EEPROM_data;
-
-static EEPROM_data mac_data;
-
-int mac_show(void)
-{
- int i;
- unsigned char ethaddr[8][18];
-
- printf("ID %c%c%c%c\n",
- mac_data.id[0],
- mac_data.id[1],
- mac_data.id[2],
- mac_data.id[3]);
- printf("Errata %c%c%c%c%c\n",
- mac_data.errata[0],
- mac_data.errata[1],
- mac_data.errata[2],
- mac_data.errata[3],
- mac_data.errata[4]);
- printf("Date %c%c%c%c%c%c%c\n",
- mac_data.date[0],
- mac_data.date[1],
- mac_data.date[2],
- mac_data.date[3],
- mac_data.date[4],
- mac_data.date[5],
- mac_data.date[6]);
- for (i = 0; i < 8; i++) {
- sprintf(ethaddr[i],
- "%02x:%02x:%02x:%02x:%02x:%02x",
- mac_data.mac[i][0],
- mac_data.mac[i][1],
- mac_data.mac[i][2],
- mac_data.mac[i][3],
- mac_data.mac[i][4],
- mac_data.mac[i][5]);
- printf("MAC %d %s\n", i, ethaddr[i]);
- }
-
- setenv("ethaddr", ethaddr[0]);
- setenv("eth1addr", ethaddr[1]);
- setenv("eth2addr", ethaddr[2]);
- setenv("eth3addr", ethaddr[3]);
-
- return 0;
-}
-
-int mac_read(void)
-{
- int ret, length;
- unsigned int crc = 0;
- unsigned char dev = ID_EEPROM_ADDR, *data;
-
- length = sizeof(EEPROM_data);
- ret = i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length);
- if (ret) {
- printf("Read failed.\n");
- return -1;
- }
-
- data = (unsigned char *)(&mac_data);
- printf("Check CRC on reading ...");
- crc = crc32(crc, data, length - 4);
- if (crc != mac_data.crc) {
- printf("CRC checksum is invalid, in EEPROM CRC is %x, calculated CRC is %x\n",
- mac_data.crc, crc);
- return -1;
- } else {
- printf("CRC OK\n");
- mac_show();
- }
- return 0;
-}
-
-int mac_prog(void)
-{
- int ret, i, length;
- unsigned int crc = 0;
- unsigned char dev = ID_EEPROM_ADDR, *ptr;
- unsigned char *eeprom_data = (unsigned char *)(&mac_data);
-
- for (i = 0; i < sizeof(mac_data.res_1); i++)
- mac_data.res_1[i] = 0;
- for (i = 0; i < sizeof(mac_data.res_2); i++)
- mac_data.res_2[i] = 0;
- length = sizeof(EEPROM_data);
- crc = crc32(crc, eeprom_data, length - 4);
- mac_data.crc = crc;
- for (i = 0, ptr = eeprom_data; i < length; i += 8, ptr += 8) {
- ret =
- i2c_write(dev, i, 1, ptr,
- (length - i) < 8 ? (length - i) : 8);
- udelay(5000); /* 5ms write cycle timing */
- if (ret)
- break;
- }
- if (ret) {
- printf("Programming failed.\n");
- return -1;
- } else {
- printf("Programming %d bytes. Reading back ...\n", length);
- mac_read();
- }
- return 0;
-}
-
-int do_mac(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
-{
- int i;
- char cmd = 's';
- unsigned long long mac_val;
-
- if (i2c_probe(ID_EEPROM_ADDR) != 0)
- return -1;
-
- if (argc > 1) {
- cmd = argv[1][0];
- switch (cmd) {
- case 'r': /* display */
- mac_read();
- break;
- case 's': /* save */
- mac_prog();
- break;
- case 'i': /* id */
- for (i = 0; i < 4; i++) {
- mac_data.id[i] = argv[2][i];
- }
- break;
- case 'n': /* serial number */
- for (i = 0; i < 12; i++) {
- mac_data.sn[i] = argv[2][i];
- }
- break;
- case 'e': /* errata */
- for (i = 0; i < 5; i++) {
- mac_data.errata[i] = argv[2][i];
- }
- break;
- case 'd': /* date */
- for (i = 0; i < 7; i++) {
- mac_data.date[i] = argv[2][i];
- }
- break;
- case 'p': /* number of ports */
- mac_data.tab_size =
- (unsigned char)simple_strtoul(argv[2], NULL, 16);
- break;
- case '0': /* mac 0 */
- case '1': /* mac 1 */
- case '2': /* mac 2 */
- case '3': /* mac 3 */
- case '4': /* mac 4 */
- case '5': /* mac 5 */
- case '6': /* mac 6 */
- case '7': /* mac 7 */
- mac_val = simple_strtoull(argv[2], NULL, 16);
- for (i = 0; i < 6; i++) {
- mac_data.mac[cmd - '0'][i] =
- *((unsigned char *)
- (((unsigned int)(&mac_val)) + i + 2));
- }
- break;
- case 'h': /* help */
- default:
- printf("Usage:\n%s\n", cmdtp->usage);
- break;
- }
- } else {
- mac_show();
- }
- return 0;
-}
-
-int mac_read_from_eeprom(void)
-{
- int length, i;
- unsigned char dev = ID_EEPROM_ADDR;
- unsigned char *data;
- unsigned char ethaddr[4][18];
- unsigned char enetvar[32];
- unsigned int crc = 0;
-
- length = sizeof(EEPROM_data);
- if (i2c_read(dev, 0, 1, (unsigned char *)(&mac_data), length)) {
- printf("Read failed.\n");
- return -1;
- }
-
- data = (unsigned char *)(&mac_data);
- crc = crc32(crc, data, length - 4);
- if (crc != mac_data.crc) {
- return -1;
- } else {
- for (i = 0; i < 4; i++) {
- if (memcmp(&mac_data.mac[i], "\0\0\0\0\0\0", 6)) {
- sprintf(ethaddr[i],
- "%02x:%02x:%02x:%02x:%02x:%02x",
- mac_data.mac[i][0],
- mac_data.mac[i][1],
- mac_data.mac[i][2],
- mac_data.mac[i][3],
- mac_data.mac[i][4],
- mac_data.mac[i][5]);
- sprintf(enetvar,
- i ? "eth%daddr" : "ethaddr",
- i);
- setenv(enetvar, ethaddr[i]);
- }
- }
- }
- return 0;
-}
-#endif /* CFG_ID_EEPROM */
diff --git a/board/mpc8641hpcn/u-boot.lds b/board/mpc8641hpcn/u-boot.lds
deleted file mode 100644
index 13c1acf..0000000
--- a/board/mpc8641hpcn/u-boot.lds
+++ /dev/null
@@ -1,150 +0,0 @@
-/*
- * (C) Copyright 2004, Freescale, Inc.
- * (C) Copyright 2002,2003, Motorola,Inc.
- * Jeff Brown
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- .resetvec 0xFFF00100 :
- {
- *(.resetvec)
- } = 0xffff
-
- .bootpg 0xFFF70000 :
- {
- cpu/mpc86xx/start.o (.bootpg)
- board/mpc8641hpcn/init.o (.bootpg)
- } = 0xffff
-
- /* Read-only sections, merged into text segment: */
- . = + 1024;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc86xx/start.o (.text)
- board/mpc8641hpcn/init.o (.text)
- cpu/mpc86xx/traps.o (.text)
- cpu/mpc86xx/interrupts.o (.text)
- cpu/mpc86xx/cpu_init.o (.text)
- cpu/mpc86xx/cpu.o (.text)
- cpu/mpc86xx/speed.o (.text)
- cpu/mpc86xx/pci.o (.text)
- common/dlmalloc.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/extable.o (.text)
- lib_generic/zlib.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c
index 06d021a..278ad5c 100644
--- a/board/mpl/common/common_util.c
+++ b/board/mpl/common/common_util.c
@@ -471,7 +471,7 @@
if (strcmp(argv[1], "flash") == 0)
{
-#if (CONFIG_COMMANDS & CFG_CMD_FDC)
+#if defined(CONFIG_CMD_FDC)
if (strcmp(argv[2], "floppy") == 0) {
char *local_args[3];
extern int do_fdcboot (cmd_tbl_t *, int, int, char *[]);
@@ -491,7 +491,7 @@
result=mpl_prg_image((uchar *)ld_addr);
return result;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_FDC) */
+#endif
if (strcmp(argv[2], "mem") == 0) {
if(argc==4) {
ld_addr=simple_strtoul(argv[3], NULL, 16);
@@ -564,7 +564,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe(ulong physadr);
void doc_init (void)
{
diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h
index 8f2ec03..d4b1f68 100644
--- a/board/mpl/common/common_util.h
+++ b/board/mpl/common/common_util.h
@@ -39,7 +39,7 @@
void show_stdio_dev(void);
void check_env(void);
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
void doc_init (void);
#endif
diff --git a/board/mpl/pati/u-boot.lds b/board/mpl/pati/u-boot.lds
deleted file mode 100644
index 5b03fef..0000000
--- a/board/mpl/pati/u-boot.lds
+++ /dev/null
@@ -1,140 +0,0 @@
-/*
- * (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
- * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xx/start.o (.text)
-
- *(.text)
- *(.fixup)
- *(.got1)
- }
- _etext = .;
- PROVIDE (etext = .);
- .rodata :
- {
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x00FF) & 0xFFFFFF00;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
- __fixup_entries = (. - _FIXUP_TABLE_)>>2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(256);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(256);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-/* . = env_start;
- .ppcenv :
- {
- common/environment.o (.ppcenv)
- }
-*/
-}
diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c
index 44b4112..227c492 100644
--- a/board/mpl/vcma9/cmd_vcma9.c
+++ b/board/mpl/vcma9/cmd_vcma9.c
@@ -40,6 +40,8 @@
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
extern void print_vcma9_info(void);
extern int vcma9_cantest(int);
extern int vcma9_nandtest(void);
@@ -53,8 +55,6 @@
int do_vcma9(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (strcmp(argv[1], "info") == 0)
{
print_vcma9_info();
diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c
index 0d2003d..45ab654 100644
--- a/board/mpl/vcma9/vcma9.c
+++ b/board/mpl/vcma9/vcma9.c
@@ -132,7 +132,7 @@
/*
* NAND flash initialization.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
extern ulong
nand_probe(ulong physadr);
diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h
index c0167d5..7a32343 100644
--- a/board/mpl/vcma9/vcma9.h
+++ b/board/mpl/vcma9/vcma9.h
@@ -31,7 +31,7 @@
void print_vcma9_info(void);
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
typedef enum {
NFCE_LOW,
NFCE_HIGH
diff --git a/board/musenki/u-boot.lds b/board/musenki/u-boot.lds
deleted file mode 100644
index 7c05109..0000000
--- a/board/musenki/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/mvblue/u-boot.lds b/board/mvblue/u-boot.lds
deleted file mode 100644
index 7c05109..0000000
--- a/board/mvblue/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/nc650/nand.c b/board/nc650/nand.c
index 6bb7c31..8617f74 100644
--- a/board/nc650/nand.c
+++ b/board/nc650/nand.c
@@ -24,7 +24,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
@@ -115,4 +115,4 @@
/* nand->options = NAND_SAMSUNG_LP_OPTIONS;*/
return 0;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
diff --git a/board/netphone/netphone.c b/board/netphone/netphone.c
index 297de97..ccc8b3e 100644
--- a/board/netphone/netphone.c
+++ b/board/netphone/netphone.c
@@ -597,7 +597,7 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
diff --git a/board/netstal/common/hcu_flash.c b/board/netstal/common/hcu_flash.c
new file mode 100644
index 0000000..be2cb37
--- /dev/null
+++ b/board/netstal/common/hcu_flash.c
@@ -0,0 +1,528 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ *
+ * Modified 6/6/2007
+ * Added isync
+ * Niklaus Giger, Netstal Maschinen, niklaus.giger@netstal.com
+ *
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+#if CFG_MAX_FLASH_BANKS != 1
+#error "CFG_MAX_FLASH_BANKS must be 1"
+#endif
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static int write_word (flash_info_t * info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+#define ADDR0 0x5555
+#define ADDR1 0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+
+/*-----------------------------------------------------------------------*/
+
+unsigned long flash_init (void)
+{
+ unsigned long size_b0;
+
+ /* Init: no FLASHes known */
+ flash_info[0].flash_id = FLASH_UNKNOWN;
+
+ /* Static FLASH Bank configuration here - FIXME XXX */
+
+ size_b0 = flash_get_size ((vu_long *) FLASH_BASE0_PRELIM,
+ &flash_info[0]);
+
+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+ printf ("## Unknown FLASH on Bank 0- Size=0x%08lx=%ld MB\n",
+ size_b0, size_b0 << 20);
+ }
+
+ /* Only one bank */
+ /* Setup offsets */
+ flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+ /* Monitor protection ON by default */
+ (void) flash_protect (FLAG_PROTECT_SET,
+ FLASH_BASE0_PRELIM,
+ FLASH_BASE0_PRELIM + monitor_flash_len - 1,
+ &flash_info[0]);
+ flash_info[0].size = size_b0;
+
+ return size_b0;
+}
+
+
+/*-----------------------------------------------------------------------*/
+/*
+ * This implementation assumes that the flash chips are uniform sector
+ * devices. This is true for all likely flash devices on a HCUx.
+ */
+static void flash_get_offsets (ulong base, flash_info_t * info)
+{
+ unsigned idx;
+ unsigned long sector_size = info->size / info->sector_count;
+
+ for (idx = 0; idx < info->sector_count; idx += 1) {
+ info->start[idx] = base + (idx * sector_size);
+ }
+}
+
+/*-----------------------------------------------------------------------*/
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+ int k;
+ int size;
+ int erased;
+ volatile unsigned long *flash;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_AMD:
+ printf ("AMD ");
+ break;
+ case FLASH_MAN_FUJ:
+ printf ("FUJITSU ");
+ break;
+ case FLASH_MAN_SST:
+ printf ("SST ");
+ break;
+ case FLASH_MAN_STM:
+ printf ("ST Micro ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ /* (Reduced table of only parts expected in HCUx boards.) */
+ switch (info->flash_id) {
+ case FLASH_MAN_AMD | FLASH_AM040:
+ printf ("AM29F040 (512 Kbit, uniform sector size)\n");
+ break;
+ case FLASH_MAN_STM | FLASH_AM040:
+ printf ("MM29W040W (512 Kbit, uniform sector size)\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+
+ printf (" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ /*
+ * Check if whole sector is erased
+ */
+ if (i != (info->sector_count - 1))
+ size = info->start[i + 1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned long *) info->start[i];
+ size = size >> 2; /* divide by 4 for longword access */
+ for (k = 0; k < size; k++) {
+ if (*flash++ != 0xffffffff) {
+ erased = 0;
+ break;
+ }
+ }
+
+ if ((i % 5) == 0)
+ printf ("\n ");
+ printf (" %08lX%s%s",
+ info->start[i],
+ erased ? " E" : " ", info->protect[i] ? "RO " : " "
+ );
+ }
+ printf ("\n");
+ return;
+}
+
+/*-----------------------------------------------------------------------*/
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info)
+{
+ short i;
+ FLASH_WORD_SIZE value;
+ ulong base = (ulong) addr;
+ volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
+
+ /* Write auto select command: read Manufacturer ID */
+ asm("isync");
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ asm("isync");
+ addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ asm("isync");
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090;
+ asm("isync");
+
+ value = addr2[0];
+ asm("isync");
+
+ switch (value) {
+ case (FLASH_WORD_SIZE) AMD_MANUFACT:
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+ case (FLASH_WORD_SIZE) FUJ_MANUFACT:
+ info->flash_id = FLASH_MAN_FUJ;
+ break;
+ case (FLASH_WORD_SIZE) SST_MANUFACT:
+ info->flash_id = FLASH_MAN_SST;
+ break;
+ case (FLASH_WORD_SIZE)STM_MANUFACT:
+ info->flash_id = FLASH_MAN_STM;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ printf("Unknown flash manufacturer code: 0x%x at %p\n",
+ value, addr);
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0;
+ return (0); /* no or unknown flash */
+ }
+
+ value = addr2[1]; /* device ID */
+
+ switch (value) {
+ case (FLASH_WORD_SIZE) AMD_ID_F040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+ case (FLASH_WORD_SIZE) AMD_ID_LV040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+ case (FLASH_WORD_SIZE)STM_ID_M29W040B: /* most likele HCU5 chip */
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ return (0); /* => no or unknown flash */
+
+ }
+
+ /* Calculate the sector offsets (Use HCUx Optimized code). */
+ flash_get_offsets(base, info);
+
+ /* check for protected sectors */
+ for (i = 0; i < info->sector_count; i++) {
+ /* read sector protection at sector address,
+ *(A7 .. A0) = 0x02
+ * D0 = 1 if protected
+ */
+ addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+ info->protect[i] = 0;
+ else
+ info->protect[i] = addr2[2] & 1;
+ }
+
+ /*
+ * Prevent writes to uninitialized FLASH.
+ */
+ if (info->flash_id != FLASH_UNKNOWN) {
+ addr2 = (FLASH_WORD_SIZE *) info->start[0];
+ *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+ }
+
+ return (info->size);
+}
+
+int wait_for_DQ7 (flash_info_t * info, int sect)
+{
+ ulong start, now, last;
+ volatile FLASH_WORD_SIZE *addr =
+ (FLASH_WORD_SIZE *) (info->start[sect]);
+
+ start = get_timer (0);
+ last = start;
+ while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
+ (FLASH_WORD_SIZE) 0x00800080) {
+ if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ return -1;
+ }
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc ('.');
+ last = now;
+ }
+ }
+ return 0;
+}
+
+/*-----------------------------------------------------------------------*/
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
+ volatile FLASH_WORD_SIZE *addr2;
+ int flag, prot, sect, l_sect;
+ int i;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("Can't erase unknown flash type - aborted\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors not erased!\n",
+ prot);
+ } else {
+ printf ("\n");
+ }
+
+ l_sect = -1;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+ printf ("Erasing sector %p\n", addr2); /* CLH */
+
+ if ((info->flash_id & FLASH_VENDMASK) ==
+ FLASH_MAN_SST) {
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ /* block erase */
+ addr2[0] = (FLASH_WORD_SIZE) 0x00500050;
+ for (i = 0; i < 50; i++) udelay (1000);
+ } else {
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ /* sector erase */
+ addr2[0] = (FLASH_WORD_SIZE) 0x00300030;
+ }
+ l_sect = sect;
+ /*
+ * Wait for each sector to complete, it's more
+ * reliable. According to AMD Spec, you must
+ * issue all erase commands within a specified
+ * timeout. This has been seen to fail, especially
+ * if printf()s are included (for debug)!!
+ */
+ wait_for_DQ7 (info, sect);
+ }
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts ();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay (1000);
+
+#if 0
+ /*
+ * We wait for the last triggered sector
+ */
+ if (l_sect < 0)
+ goto DONE;
+ wait_for_DQ7 (info, l_sect);
+
+DONE:
+#endif
+ /* reset to read mode */
+ addr = (FLASH_WORD_SIZE *) info->start[0];
+ addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+
+ printf (" done\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong cp, wp, data;
+ int i, l, rc;
+
+ wp = (addr & ~3); /* get lower word aligned address */
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+ for (; i < 4 && cnt > 0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt == 0 && i < 4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 4;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= 4) {
+ data = 0;
+ for (i = 0; i < 4; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 4;
+ cnt -= 4;
+ }
+
+ if (cnt == 0) {
+ return (0);
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i < 4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ return (write_word (info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+ volatile FLASH_WORD_SIZE *addr2 =
+ (FLASH_WORD_SIZE *) (info->start[0]);
+ volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
+ volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
+ ulong start;
+ int i;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*((volatile FLASH_WORD_SIZE *) dest) &
+ (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
+ return (2);
+ }
+
+ for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
+ int flag;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
+
+ dest2[i] = data2[i];
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts ();
+
+ /* data polling for D7 */
+ start = get_timer (0);
+ while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
+ (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
+
+ if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ return (1);
+ }
+ }
+ }
+
+ return (0);
+}
diff --git a/board/netstal/common/nm_bsp.c b/board/netstal/common/nm_bsp.c
new file mode 100644
index 0000000..a9de45e
--- /dev/null
+++ b/board/netstal/common/nm_bsp.c
@@ -0,0 +1,41 @@
+/*
+ *(C) Copyright 2005-2007 Netstal Maschinen AG
+ * Niklaus Giger (Niklaus.Giger@netstal.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+#ifdef CONFIG_CMD_BSP
+/*
+ * Command nm_bsp: Netstal Maschinen BSP specific command
+ */
+int nm_bsp(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ printf("%s: flag %d, argc %d, argv[0] %s\n", __FUNCTION__,
+ flag, argc, argv[0]);
+ printf("Netstal Maschinen BSP specific command. None at the moment.\n");
+ return 0;
+}
+
+U_BOOT_CMD(
+ nm_bsp, 1, 1, nm_bsp,
+ "nm_bsp - Netstal Maschinen BSP specific command. \n",
+ "Help for Netstal Maschinen BSP specific command.\n"
+ );
+#endif
diff --git a/board/netstal/hcu4/Makefile b/board/netstal/hcu4/Makefile
new file mode 100644
index 0000000..af90821
--- /dev/null
+++ b/board/netstal/hcu4/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2007 Netstal Maschinen AG
+# Niklaus Giger (ng@netstal.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+vpath hcu_flash.c ../common
+
+# NOBJS : Netstal common objects
+NOBJS = hcu_flash.o
+COBJS = $(BOARD).o
+SOBJS =
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+NOBJS := $(addprefix $(obj),$(NOBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS) $(NOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/netstal/hcu4/README.txt b/board/netstal/hcu4/README.txt
new file mode 100644
index 0000000..1e9c64a
--- /dev/null
+++ b/board/netstal/hcu4/README.txt
@@ -0,0 +1,59 @@
+HCU4 Configuration Details
+
+Memory Bank 0 -- Flash chip
+---------------------------
+
+0xfff00000 - 0xffffffff
+
+The flash chip is really only 512Kbytes, but the high address bit of
+the 1Meg region is ignored, so the flash is replicated through the
+region. Thus, this is consistent with a flash base address 0xfff80000.
+
+The placement at the end is to be consistent with reset behavior,
+where the processor itself initially uses this bus to load the branch
+vector and start running.
+
+On-Chip Memory
+--------------
+
+0xf4000000 - 0xf4000fff
+
+The 405GPr includes a 4K on-chip memory that can be placed however
+software chooses. I choose to place the memory at this address, to
+keep it out of the cachable areas.
+
+
+Internal Peripherals
+--------------------
+
+0xef600300 - 0xef6008ff
+
+These are scattered various peripherals internal to the PPC405GPr
+chip.
+
+Chip-Select 2: Flash Memory
+---------------------------
+
+0x70000000
+
+Chip-Select 3: CAN Interface
+----------------------------
+0x7800000
+
+
+Chip-Select 4: IMC-bus standard
+-------------------------------
+
+Our IO-Bus (slow version)
+
+
+Chip-Select 5: IMC-bus fast (inactive)
+--------------------------------------
+
+Our IO-Bus (fast, but not yet use)
+
+
+Memory Bank 1 -- SDRAM
+-------------------------------------
+
+0x00000000 - 0x1ffffff # Default 32 MB
diff --git a/board/netstal/hcu4/config.mk b/board/netstal/hcu4/config.mk
new file mode 100644
index 0000000..376609a
--- /dev/null
+++ b/board/netstal/hcu4/config.mk
@@ -0,0 +1,28 @@
+#
+# (C) Copyright 2005 Netstal Maschinen AG
+# Niklaus Giger (ng@netstal.com)
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Netstal Maschinen AG: HCU4 boards
+#
+
+TEXT_BASE = 0xFFFa0000
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG -g
+endif
diff --git a/board/netstal/hcu4/hcu4.c b/board/netstal/hcu4/hcu4.c
new file mode 100644
index 0000000..48a3f13
--- /dev/null
+++ b/board/netstal/hcu4/hcu4.c
@@ -0,0 +1,402 @@
+/*
+ *(C) Copyright 2005-2007 Netstal Maschinen AG
+ * Niklaus Giger (Niklaus.Giger@netstal.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm-ppc/u-boot.h>
+#include "../common/nm_bsp.c"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define HCU_MACH_VERSIONS_REGISTER (0x7C000000 + 0xF00000)
+
+#define SDRAM_LEN 32*1024*1024 /* 32 MB -RAM */
+
+#define DO_UGLY_SDRAM_WORKAROUND
+
+enum {
+ /* HW_GENERATION_HCU wird nicht mehr unterstuetzt */
+ HW_GENERATION_HCU2 = 0x10,
+ HW_GENERATION_HCU3 = 0x10,
+ HW_GENERATION_HCU4 = 0x20,
+ HW_GENERATION_MCU = 0x08,
+ HW_GENERATION_MCU20 = 0x0a,
+ HW_GENERATION_MCU25 = 0x09,
+};
+
+void hcu_led_set(u32 value);
+long int spd_sdram(int(read_spd)(uint addr));
+
+#ifdef CONFIG_SPD_EEPROM
+#define DEBUG
+#endif
+
+#if defined(DEBUG)
+void show_sdram_registers(void);
+#endif
+
+/*
+ * This function is run very early, out of flash, and before devices are
+ * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * of being in the init_sequence array.
+ *
+ * The SDRAM has been initialized already -- start.S:start called
+ * init.S:init_sdram early on -- but it is not yet being used for
+ * anything, not even stack. So be careful.
+ */
+
+#define CPC0_CR0 0xb1 /* Chip control register 0 */
+#define CPC0_CR1 0xb2 /* Chip control register 1 */
+/* Attention: If you want 1 microsecs times from the external oscillator
+ * use 0x00804051. But this causes problems with u-boot and linux!
+ */
+#define CPC0_CR1_VALUE 0x00004051
+#define CPC0_ECR 0xaa /* Edge condition register */
+#define EBC0_CFG 0x23 /* External Peripheral Control Register */
+#define CPC0_EIRR 0xb6 /* External Interrupt Register */
+
+
+int board_early_init_f (void)
+{
+ /*-------------------------------------------------------------------+
+ | Interrupt controller setup for the HCU4 board.
+ | Note: IRQ 0-15 405GP internally generated; high; level sensitive
+ | IRQ 16 405GP internally generated; low; level sensitive
+ | IRQ 17-24 RESERVED/UNUSED
+ | IRQ 31 (EXT IRQ 6) (unused)
+ +-------------------------------------------------------------------*/
+ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (uicer, 0x00000000); /* disable all ints */
+ mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
+ mtdcr (uicpr, 0xFFFFFF87); /* set int polarities */
+ mtdcr (uictr, 0x10000000); /* set int trigger levels */
+ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+
+ mtdcr(CPC0_CR1, CPC0_CR1_VALUE);
+ mtdcr(CPC0_ECR, 0x60606000);
+ mtdcr(CPC0_EIRR, 0x7c000000);
+
+ return 0;
+}
+
+#ifdef CONFIG_BOARD_PRE_INIT
+int board_pre_init (void)
+{
+ return board_early_init_f ();
+}
+#endif
+
+int checkboard (void)
+{
+ unsigned int j;
+ u16 *boardVersReg = (u16 *) HCU_MACH_VERSIONS_REGISTER;
+ u16 generation = *boardVersReg & 0xf0;
+ u16 index = *boardVersReg & 0x0f;
+
+ /* Force /RTS to active. The board it not wired quite
+ correctly to use cts/rtc flow control, so just force the
+ /RST active and forget about it. */
+ writeb (readb (0xef600404) | 0x03, 0xef600404);
+ printf ("\nNetstal Maschinen AG ");
+ if (generation == HW_GENERATION_HCU3)
+ printf ("HCU3: index %d\n\n", index);
+ else if (generation == HW_GENERATION_HCU4)
+ printf ("HCU4: index %d\n\n", index);
+ hcu_led_set(0);
+ for (j = 0; j < 7; j++) {
+ hcu_led_set(1 << j);
+ udelay(50 * 1000);
+ }
+
+ return 0;
+}
+
+u32 hcu_led_get(void)
+{
+ return (~((*(u32 *)GPIO0_OR)) >> 23) & 0xff;
+}
+
+/*---------------------------------------------------------------------------+
+ * hcu_led_set value to be placed into the LEDs (max 6 bit)
+ *---------------------------------------------------------------------------*/
+void hcu_led_set(u32 value)
+{
+ u32 tmp = ~value;
+ u32 *ledReg;
+
+ tmp = (tmp << 23) | 0x7FFFFF;
+ ledReg = (u32 *)GPIO0_OR;
+ *ledReg = tmp;
+}
+
+/*
+ * sdram_init - Dummy implementation for start.S, spd_sdram or initdram
+ * used for HCUx
+ */
+void sdram_init(void)
+{
+ return;
+}
+
+#if defined(DEBUG)
+void show_sdram_registers(void)
+{
+ u32 value;
+
+ printf ("SDRAM Controller Registers --\n");
+ mfsdram(mem_mcopt1, value);
+ printf (" SDRAM0_CFG : 0x%08x\n", value);
+ mfsdram(mem_status, value);
+ printf (" SDRAM0_STATUS: 0x%08x\n", value);
+ mfsdram(mem_mb0cf, value);
+ printf (" SDRAM0_B0CR : 0x%08x\n", value);
+ mfsdram(mem_mb1cf, value);
+ printf (" SDRAM0_B1CR : 0x%08x\n", value);
+ mfsdram(mem_sdtr1, value);
+ printf (" SDRAM0_TR : 0x%08x\n", value);
+ mfsdram(mem_rtr, value);
+ printf (" SDRAM0_RTR : 0x%08x\n", value);
+}
+#endif
+
+/*
+ * this is even after checkboard. It returns the size of the SDRAM
+ * that we have installed. This function is called by board_init_f
+ * in lib_ppc/board.c to initialize the memory and return what I
+ * found. These are default value, which will be overridden later.
+ */
+
+long int fixed_hcu4_sdram (int board_type)
+{
+#ifdef DEBUG
+ printf (__FUNCTION__);
+#endif
+ /* disable memory controller */
+ mtdcr (memcfga, mem_mcopt1);
+ mtdcr (memcfgd, 0x00000000);
+
+ udelay (500);
+
+ /* Clear SDRAM0_BESR0 (Bus Error Syndrome Register) */
+ mtdcr (memcfga, mem_besra);
+ mtdcr (memcfgd, 0xffffffff);
+
+ /* Clear SDRAM0_BESR1 (Bus Error Syndrome Register) */
+ mtdcr (memcfga, mem_besrb);
+ mtdcr (memcfgd, 0xffffffff);
+
+ /* Clear SDRAM0_ECCCFG (disable ECC) */
+ mtdcr (memcfga, mem_ecccf);
+ mtdcr (memcfgd, 0x00000000);
+
+ /* Clear SDRAM0_ECCESR (ECC Error Syndrome Register) */
+ mtdcr (memcfga, mem_eccerr);
+ mtdcr (memcfgd, 0xffffffff);
+
+ /* Timing register: CASL=2, PTA=2, CTP=2, LDF=1, RFTA=5, RCD=2
+ * TODO ngngng
+ */
+ mtdcr (memcfga, mem_sdtr1);
+ mtdcr (memcfgd, 0x008a4015);
+
+ /* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1
+ * TODO ngngng
+ */
+ mtdcr (memcfga, mem_mb0cf);
+ mtdcr (memcfgd, 0x00062001);
+
+ /* refresh timer = 0x400 */
+ mtdcr (memcfga, mem_rtr);
+ mtdcr (memcfgd, 0x04000000);
+
+ /* Power management idle timer set to the default. */
+ mtdcr (memcfga, mem_pmit);
+ mtdcr (memcfgd, 0x07c00000);
+
+ udelay (500);
+
+ /* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) TODO */
+ mtdcr (memcfga, mem_mcopt1);
+ mtdcr (memcfgd, 0x90800000);
+
+#ifdef DEBUG
+ printf ("%s: done\n", __FUNCTION__);
+#endif
+ return SDRAM_LEN;
+}
+
+/*---------------------------------------------------------------------------+
+ * hcu_serial_number
+ *---------------------------------------------------------------------------*/
+static u32 hcu_serial_number(void)
+{
+ u32 *serial = (u32 *)CFG_FLASH_BASE;
+
+ if (*serial == 0xffffffff)
+ return get_ticks();
+
+ return *serial;
+}
+
+
+/*---------------------------------------------------------------------------+
+ * misc_init_r.
+ *---------------------------------------------------------------------------*/
+
+int misc_init_r(void)
+{
+ char *s = getenv("ethaddr");
+ char *e;
+ int i;
+ u32 serial = hcu_serial_number();
+
+ for (i = 0; i < 6; ++i) {
+ gd->bd->bi_enetaddr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+
+ if (gd->bd->bi_enetaddr[3] == 0 &&
+ gd->bd->bi_enetaddr[4] == 0 &&
+ gd->bd->bi_enetaddr[5] == 0) {
+ char ethaddr[22];
+ /* [0..3] Must be in sync with CONFIG_ETHADDR */
+ gd->bd->bi_enetaddr[0] = 0x00;
+ gd->bd->bi_enetaddr[1] = 0x60;
+ gd->bd->bi_enetaddr[2] = 0x13;
+ gd->bd->bi_enetaddr[3] = (serial >> 16) & 0xff;
+ gd->bd->bi_enetaddr[4] = (serial >> 8) & 0xff;
+ gd->bd->bi_enetaddr[5] = (serial >> 0) & 0xff;
+ sprintf (ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X\0",
+ gd->bd->bi_enetaddr[0], gd->bd->bi_enetaddr[1],
+ gd->bd->bi_enetaddr[2], gd->bd->bi_enetaddr[3],
+ gd->bd->bi_enetaddr[4], gd->bd->bi_enetaddr[5]) ;
+ printf("%s: Setting eth %s serial 0x%x\n", __FUNCTION__,
+ ethaddr, serial);
+ setenv ("ethaddr", ethaddr);
+ }
+ return 0;
+}
+
+#ifdef DO_UGLY_SDRAM_WORKAROUND
+#include "i2c.h"
+
+void set_spd_default_value(unsigned int spd_addr,uchar def_val)
+{
+ uchar value;
+ int res = i2c_read(SPD_EEPROM_ADDRESS, spd_addr, 1, &value, 1) ;
+
+ if (res == 0 && value == 0xff) {
+ res = i2c_write(SPD_EEPROM_ADDRESS,
+ spd_addr, 1, &def_val, 1) ;
+#ifdef DEBUG
+ printf("%s: Setting spd offset %3d to %3d res %d\n",
+ __FUNCTION__, spd_addr, def_val, res);
+#endif
+ }
+}
+#endif
+
+long int initdram(int board_type)
+{
+ long dram_size = 0;
+
+#if !defined(CONFIG_SPD_EEPROM)
+ dram_size = fixed_hcu4_sdram();
+#else
+#ifdef DO_UGLY_SDRAM_WORKAROUND
+ /* Workaround if you have no working I2C-EEPROM-SPD-configuration */
+ i2c_init(CFG_I2C_SPEED, CFG_I2C_SLAVE);
+ set_spd_default_value(2, 4); /* SDRAM Type */
+ set_spd_default_value(7, 0); /* module width, high byte */
+ set_spd_default_value(12, 1); /* Refresh or 0x81 */
+
+ /* Only correct for HCU3 with 32 MB RAM*/
+ /* Number of bytes used by module manufacturer */
+ set_spd_default_value( 0, 128);
+ set_spd_default_value( 1, 11 ); /* Total SPD memory size */
+ set_spd_default_value( 2, 4 ); /* Memory type */
+ set_spd_default_value( 3, 12 ); /* Number of row address bits */
+ set_spd_default_value( 4, 9 ); /* Number of column address bits */
+ set_spd_default_value( 5, 1 ); /* Number of module rows */
+ set_spd_default_value( 6, 32 ); /* Module data width, LSB */
+ set_spd_default_value( 7, 0 ); /* Module data width, MSB */
+ set_spd_default_value( 8, 1 ); /* Module interface signal levels */
+ /* SDRAM cycle time for highest CL (Tclk) */
+ set_spd_default_value( 9, 112);
+ /* SDRAM access time from clock for highest CL (Tac) */
+ set_spd_default_value(10, 84 );
+ set_spd_default_value(11, 2 ); /* Module configuration type */
+ set_spd_default_value(12, 128); /* Refresh rate/type */
+ set_spd_default_value(13, 16 ); /* Primary SDRAM width */
+ set_spd_default_value(14, 8 ); /* Error Checking SDRAM width */
+ /* SDRAM device attributes, min clock delay for back to back */
+ /*random column addresses (Tccd) */
+ set_spd_default_value(15, 1 );
+ /* SDRAM device attributes, burst lengths supported */
+ set_spd_default_value(16, 143);
+ /* SDRAM device attributes, number of banks on SDRAM device */
+ set_spd_default_value(17, 4 );
+ /* SDRAM device attributes, CAS latency */
+ set_spd_default_value(18, 6 );
+ /* SDRAM device attributes, CS latency */
+ set_spd_default_value(19, 1 );
+ /* SDRAM device attributes, WE latency */
+ set_spd_default_value(20, 1 );
+ set_spd_default_value(21, 0 ); /* SDRAM module attributes */
+ /* SDRAM device attributes, general */
+ set_spd_default_value(22, 14 );
+ /* SDRAM cycle time for 2nd highest CL (Tclk) */
+ set_spd_default_value(23, 117);
+ /* SDRAM access time from clock for2nd highest CL (Tac) */
+ set_spd_default_value(24, 84 );
+ /* SDRAM cycle time for 3rd highest CL (Tclk) */
+ set_spd_default_value(25, 0 );
+ /* SDRAM access time from clock for3rd highest CL (Tac) */
+ set_spd_default_value(26, 0 );
+ set_spd_default_value(27, 15 ); /* Minimum row precharge time (Trp) */
+ /* Minimum row active to row active delay (Trrd) */
+ set_spd_default_value(28, 14 );
+ set_spd_default_value(29, 15 ); /* Minimum CAS to RAS delay (Trcd) */
+ set_spd_default_value(30, 37 ); /* Minimum RAS pulse width (Tras) */
+ set_spd_default_value(31, 8 ); /* Module bank density */
+ /* Command and Address signal input setup time */
+ set_spd_default_value(32, 21 );
+ /* Command and Address signal input hold time */
+ set_spd_default_value(33, 8 );
+ set_spd_default_value(34, 21 ); /* Data signal input setup time */
+ set_spd_default_value(35, 8 ); /* Data signal input hold time */
+#endif /* DO_UGLY_SDRAM_WORKAROUND */
+ dram_size = spd_sdram(0);
+#endif
+
+#ifdef DEBUG
+ show_sdram_registers();
+#endif
+
+#if defined(CFG_DRAM_TEST)
+ bcu4_testdram(dram_size);
+ printf("%s %d MB of SDRAM\n", __FUNCTION__, dram_size/(1024*1024));
+#endif
+
+ return dram_size;
+}
diff --git a/board/netstal/hcu4/u-boot.lds b/board/netstal/hcu4/u-boot.lds
new file mode 100644
index 0000000..b6e28f8
--- /dev/null
+++ b/board/netstal/hcu4/u-boot.lds
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ .resetvec 0xFFFFFFFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text : {
+ /* The start.o file includes the initial jump vector that
+ must be located in the beginning. It is the basic run-
+ time function that calls all other functions. */
+ cpu/ppc4xx/start.o (.text)
+
+/* . = env_offset;*/
+/* common/environment.o(.text)*/
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/netstal/hcu5/Makefile b/board/netstal/hcu5/Makefile
new file mode 100644
index 0000000..27398b9
--- /dev/null
+++ b/board/netstal/hcu5/Makefile
@@ -0,0 +1,53 @@
+#
+# (C) Copyright 2007 Netstal Maschinen AG
+# Niklaus Giger (ng@netstal.com)
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+vpath hcu_flash.c ../common
+
+# NOBJS : Netstal common objects
+NOBJS = hcu_flash.o
+COBJS = $(BOARD).o sdram.o
+SOBJS = init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) ../common/$(NOBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+NOBJS := $(addprefix $(obj),$(NOBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS) $(NOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) $(NOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/netstal/hcu5/README.txt b/board/netstal/hcu5/README.txt
new file mode 100644
index 0000000..3118da9
--- /dev/null
+++ b/board/netstal/hcu5/README.txt
@@ -0,0 +1,174 @@
+HCU5 configuration details and startup sequence
+
+(C) Copyright 2007 Netstal Maschinen AG
+ Niklaus Giger (Niklaus.Giger@netstal.com)
+
+TODO:
+-----
+- Fix error: Waiting for PHY auto negotiation to complete..... TIMEOUT !
+ - Does not occur if both EMAC are connected
+- Fix RTS/CTS problem (HW?)
+ CONFIG_SERIAL_MULTI/CONFIG_SERIAL_SOFTWARE_FIFO hangs after
+ Switching to interrupt driven serial input mode
+- Make vxWorks start from u-boot. Possible reasons
+ - Does vxWorks need an entry for the Machine Check interrupt like this
+ tlbentry( 0x40000000, SZ_256M, 0, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) ?
+
+Caveats:
+--------
+Errata CHIP_8: Incorrect Write to DDR SDRAM. (was not applied to sequoia.c)
+see hcu5.c.
+
+
+Memory Bank 0 -- Flash chip
+---------------------------
+
+0xfff00000 - 0xffffffff
+
+The flash chip is really only 512Kbytes, but the high address bit of
+the 1Meg region is ignored, so the flash is replicated through the
+region. Thus, this is consistent with a flash base address 0xfff80000.
+
+The placement at the end is to be consistent with reset behavior,
+where the processor itself initially uses this bus to load the branch
+vector and start running.
+
+On-Chip Memory
+--------------
+
+0xe0010000- 0xe0013fff CFG_OCM_BASE
+The 440EPx includes a 16K on-chip memory that can be placed however
+software chooses.
+
+Internal Peripherals
+--------------------
+
+0xef600300 - 0xef6008ff
+
+These are scattered various peripherals internal to the PPC440EPX
+chip.
+
+Chip-Select 2: Flash Memory
+---------------------------
+
+Not used
+
+Chip-Select 3: CAN Interface
+----------------------------
+0xc800000: 2 Intel 82527 CAN-Controller
+
+
+Chip-Select 4: IMC-bus standard
+-------------------------------
+
+0xcc00000: Netstal specific IO-Bus
+
+
+Chip-Select 5: IMC-bus fast (inactive)
+--------------------------------------
+
+0xce00000: Netstal specific IO-Bus (fast, but not yet used)
+
+
+Memory Bank 1 -- DDR2
+-------------------------------------
+
+0x00000000 - 0xfffffff # Default 256 MB
+
+PCI ??
+
+USB ??
+Only USB_STORAGE is enabled to load vxWorks
+from a memory stick.
+
+System-LEDs ??? (Analog zu HCU4 ???)
+
+Startup sequence
+----------------
+
+(cpu/ppc4xx/resetvec.S)
+depending on configs option
+call _start_440 _start_pci oder _start
+
+(cpu/ppc4xx/start.S)
+
+_start_440:
+ initialize register like
+ CCR0
+ debug
+ setup interrupt vectors
+ configure cache regions
+ clear and setup TLB
+ enable internal RAM
+ jump start_ram
+ which in turn will jump to start
+_start:
+ Clear and set up some registers.
+ Debug setup
+ Setup the internal SRAM
+ Setup the stack in internal SRAM
+ setup stack pointer (r1)
+ setup GOT
+ call cpu_init_f /* run low-level CPU init code (from Flash) */
+
+ call cpu_init_f
+ board_init_f: (lib_ppc\board.c)
+ init_sequence defines a list of function to be called
+ board_early_init_f: (board/netstal/hcu5/hcu5.c)
+ We are using Bootstrap-Option A
+ if CPR0_ICFG_RLI_MASK == 0 then set some registers and reboot
+ Setup the GPIO pins
+ Setup the interrupt controller polarities, triggers, etc.
+ Ethernet, PCI, USB enable
+ setup BOOT FLASH (Chip timing)
+ init_baudrate,
+ serial_init
+ checkcpu
+ misc_init_f #ifdef
+ init_func_i2c #ifdef
+ post_init_f #ifdef
+ init_func_ram -> calls init_dram board/netstal/hcu5/sdram.c
+ (EYE function removed!!)
+ test_dram call
+
+ * Reserve memory at end of RAM for (top down in that order):
+ * - kernel log buffer
+ * - protected RAM
+ * - LCD framebuffer
+ * - monitor code
+ * - board info struct
+ Save local variables to board info struct
+ call relocate_code() does not return
+ relocate_code: (cpu/ppc4xx/start.S)
+-------------------------------------------------------
+From now on our copy is in RAM and we will run from there,
+ starting with board_init_r
+-------------------------------------------------------
+ board_init_r: (lib_ppc\board.c)
+ setup bd function pointers
+ trap_init
+ flash_init: (board/netstal/hcu5/flash.c)
+ /* setup for u-boot erase, update */
+ setup bd flash info
+ cpu_init_r: (cpu/ppc4xx/cpu_init.c)
+ peripheral chip select in using defines like
+ CFG_EBC_PB0A, CFG_EBC_PB0C from hcu5.h
+ mem_malloc_init
+ malloc_bin_reloc
+ spi_init (r or f)??? (CFG_ENV_IS_IN_EEPROM)
+ env_relocated
+ misc_init_r(bd): (board/netstal/hcu5.c)
+ ethaddr mit serial number ergänzen
+ Then we will somehow go into the command loop
+
+Most of the HW specific code for the HCU5 may be found in
+include/configs/hcu5.h
+board/netstal/hcu5/*
+cpu/ppc4xx/*
+lib_ppc/*
+include/ppc440.h
+
+Drivers for serial etc are found under drivers/
+
+Don't ask question if you did not look at the README !!
+Most CFG_* and CONFIG_* switches are mentioned/explained there.
diff --git a/board/netstal/hcu5/config.mk b/board/netstal/hcu5/config.mk
new file mode 100644
index 0000000..cfd5744
--- /dev/null
+++ b/board/netstal/hcu5/config.mk
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2005 Netstal Maschinen AG
+# Niklaus Giger (ng@netstal.com)
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Netstal Maschinen AG: HCU5 boards
+#
+
+TEXT_BASE = 0xFFFa0000
+
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG -g
+endif
diff --git a/board/netstal/hcu5/hcu5.c b/board/netstal/hcu5/hcu5.c
new file mode 100644
index 0000000..b9b10fd
--- /dev/null
+++ b/board/netstal/hcu5/hcu5.c
@@ -0,0 +1,554 @@
+/*
+ *(C) Copyright 2005-2007 Netstal Maschinen AG
+ * Niklaus Giger (Niklaus.Giger@netstal.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+#include <ppc440.h>
+#include <asm/mmu.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+void hcu_led_set(u32 value);
+
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+#undef BOOTSTRAP_OPTION_A_ACTIVE
+
+#define SDR0_CP440 0x0180
+
+#define SYSTEM_RESET 0x30000000
+#define CHIP_RESET 0x20000000
+
+#define SDR0_ECID0 0x0080
+#define SDR0_ECID1 0x0081
+#define SDR0_ECID2 0x0082
+#define SDR0_ECID3 0x0083
+
+#define SYS_IO_ADDRESS (CFG_CS_2 + 0x00e00000)
+#define SYS_SLOT_ADDRESS (CFG_CPLD + 0x00400000)
+
+#define DEFAULT_ETH_ADDR "ethaddr"
+/* ethaddr for first or etha1ddr for second ethernet */
+
+enum {
+ /* HW_GENERATION_HCU1 is no longer supported */
+ HW_GENERATION_HCU2 = 0x10,
+ HW_GENERATION_HCU3 = 0x10,
+ HW_GENERATION_HCU4 = 0x20,
+ HW_GENERATION_HCU5 = 0x30,
+ HW_GENERATION_MCU = 0x08,
+ HW_GENERATION_MCU20 = 0x0a,
+ HW_GENERATION_MCU25 = 0x09,
+};
+
+
+/*
+ * This function is run very early, out of flash, and before devices are
+ * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * of being in the init_sequence array.
+ *
+ * The SDRAM has been initialized already -- start.S:start called
+ * init.S:init_sdram early on -- but it is not yet being used for
+ * anything, not even stack. So be careful.
+ */
+
+int board_early_init_f(void)
+{
+ u32 reg;
+
+#ifdef BOOTSTRAP_OPTION_A_ACTIVE
+ /* Booting with Bootstrap Option A
+ * First boot, with CPR0_ICFG_RLI_MASK == 0
+ * no we setup varios boot strapping register,
+ * then we do reset the PPC440 using a chip reset
+ * Unfortunately, we cannot use this option, as Nto1 is not set
+ * with Bootstrap Option A and cannot be changed later on by SW
+ * There are no other possible boostrap options with a 8 bit ROM
+ * See Errata (Version 1.04) CHIP_9
+ */
+
+ u32 cpr0icfg;
+ u32 dbcr;
+
+ mfcpr(CPR0_ICFG, cpr0icfg);
+ if (!(cpr0icfg & CPR0_ICFG_RLI_MASK)) {
+ mtcpr(CPR0_MALD, 0x02000000);
+ mtcpr(CPR0_OPBD, 0x02000000);
+ mtcpr(CPR0_PERD, 0x05000000); /* 1:5 */
+ mtcpr(CPR0_PLLC, 0x40000238);
+ mtcpr(CPR0_PLLD, 0x01010414);
+ mtcpr(CPR0_PRIMAD, 0x01000000);
+ mtcpr(CPR0_PRIMBD, 0x01000000);
+ mtcpr(CPR0_SPCID, 0x03000000);
+ mtsdr(SDR0_PFC0, 0x00003E00); /* [CTE] = 0 */
+ mtsdr(SDR0_CP440, 0x0EAAEA02); /* [Nto1] = 1*/
+ mtcpr(CPR0_ICFG, cpr0icfg | CPR0_ICFG_RLI_MASK);
+
+ /*
+ * Initiate system reset in debug control register DBCR
+ */
+ dbcr = mfspr(dbcr0);
+ mtspr(dbcr0, dbcr | CHIP_RESET);
+ }
+ mtsdr(SDR0_CP440, 0x0EAAEA02); /* [Nto1] = 1*/
+#endif
+ mtdcr(ebccfga, xbcfg);
+ mtdcr(ebccfgd, 0xb8400000);
+
+ /*--------------------------------------------------------------------
+ * Setup the GPIO pins
+ *-------------------------------------------------------------------*/
+ /* test-only: take GPIO init from pcs440ep ???? in config file */
+ out32(GPIO0_OR, 0x00000000);
+ out32(GPIO0_TCR, 0x7C2FF1CF);
+ out32(GPIO0_OSRL, 0x40055000);
+ out32(GPIO0_OSRH, 0x00000000);
+ out32(GPIO0_TSRL, 0x40055000);
+ out32(GPIO0_TSRH, 0x00000400);
+ out32(GPIO0_ISR1L, 0x40000000);
+ out32(GPIO0_ISR1H, 0x00000000);
+ out32(GPIO0_ISR2L, 0x00000000);
+ out32(GPIO0_ISR2H, 0x00000000);
+ out32(GPIO0_ISR3L, 0x00000000);
+ out32(GPIO0_ISR3H, 0x00000000);
+
+ out32(GPIO1_OR, 0x00000000);
+ out32(GPIO1_TCR, 0xC6007FFF);
+ out32(GPIO1_OSRL, 0x00140000);
+ out32(GPIO1_OSRH, 0x00000000);
+ out32(GPIO1_TSRL, 0x00000000);
+ out32(GPIO1_TSRH, 0x00000000);
+ out32(GPIO1_ISR1L, 0x05415555);
+ out32(GPIO1_ISR1H, 0x40000000);
+ out32(GPIO1_ISR2L, 0x00000000);
+ out32(GPIO1_ISR2H, 0x00000000);
+ out32(GPIO1_ISR3L, 0x00000000);
+ out32(GPIO1_ISR3H, 0x00000000);
+
+ /*--------------------------------------------------------------------
+ * Setup the interrupt controller polarities, triggers, etc.
+ *-------------------------------------------------------------------*/
+ mtdcr(uic0sr, 0xffffffff); /* clear all */
+ mtdcr(uic0er, 0x00000000); /* disable all */
+ mtdcr(uic0cr, 0x00000005); /* ATI & UIC1 crit are critical */
+ mtdcr(uic0pr, 0xfffff7ff); /* per ref-board manual */
+ mtdcr(uic0tr, 0x00000000); /* per ref-board manual */
+ mtdcr(uic0vr, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(uic0sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic1sr, 0xffffffff); /* clear all */
+ mtdcr(uic1er, 0x00000000); /* disable all */
+ mtdcr(uic1cr, 0x00000000); /* all non-critical */
+ mtdcr(uic1pr, 0xffffffff); /* per ref-board manual */
+ mtdcr(uic1tr, 0x00000000); /* per ref-board manual */
+ mtdcr(uic1vr, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(uic1sr, 0xffffffff); /* clear all */
+
+ mtdcr(uic2sr, 0xffffffff); /* clear all */
+ mtdcr(uic2er, 0x00000000); /* disable all */
+ mtdcr(uic2cr, 0x00000000); /* all non-critical */
+ mtdcr(uic2pr, 0xffffffff); /* per ref-board manual */
+ mtdcr(uic2tr, 0x00000000); /* per ref-board manual */
+ mtdcr(uic2vr, 0x00000000); /* int31 highest, base=0x000 */
+ mtdcr(uic2sr, 0xffffffff); /* clear all */
+ mtsdr(sdr_pfc0, 0x00003E00); /* Pin function: */
+ mtsdr(sdr_pfc1, 0x00848000); /* Pin function: UART0 has 4 pins */
+
+ /* PCI arbiter enabled */
+ mfsdr(sdr_pci0, reg);
+ mtsdr(sdr_pci0, 0x80000000 | reg);
+
+ pci_pre_init(0);
+
+ /* setup BOOT FLASH */
+ mtsdr(SDR0_CUST0, 0xC0082350);
+
+ return 0;
+}
+
+#ifdef CONFIG_BOARD_PRE_INIT
+int board_pre_init(void)
+{
+ return board_early_init_f();
+}
+
+#endif
+
+int checkboard(void)
+{
+ unsigned int j;
+ u16 *hwVersReg = (u16 *) HCU_HW_VERSION_REGISTER;
+ u16 *boardVersReg = (u16 *) HCU_CPLD_VERSION_REGISTER;
+ u16 generation = *boardVersReg & 0xf0;
+ u16 index = *boardVersReg & 0x0f;
+ u32 ecid0, ecid1, ecid2, ecid3;
+
+ printf("Netstal Maschinen AG: ");
+ if (generation == HW_GENERATION_HCU3)
+ printf("HCU3: index %d", index);
+ else if (generation == HW_GENERATION_HCU4)
+ printf("HCU4: index %d", index);
+ else if (generation == HW_GENERATION_HCU5)
+ printf("HCU5: index %d", index);
+ printf(" HW 0x%02x\n", *hwVersReg & 0xff);
+ mfsdr(SDR0_ECID0, ecid0);
+ mfsdr(SDR0_ECID1, ecid1);
+ mfsdr(SDR0_ECID2, ecid2);
+ mfsdr(SDR0_ECID3, ecid3);
+
+ printf("Chip ID 0x%x 0x%x 0x%x 0x%x\n", ecid0, ecid1, ecid2, ecid3);
+ for (j = 0;j < 6; j++) {
+ hcu_led_set(1 << j);
+ udelay(200 * 1000);
+ }
+
+ return 0;
+}
+
+u32 hcu_led_get(void)
+{
+ return in16(SYS_IO_ADDRESS) & 0x3f;
+}
+
+/*---------------------------------------------------------------------------+
+ * hcu_led_set value to be placed into the LEDs (max 6 bit)
+ *---------------------------------------------------------------------------*/
+void hcu_led_set(u32 value)
+{
+ out16(SYS_IO_ADDRESS, value);
+}
+
+/*---------------------------------------------------------------------------+
+ * get_serial_number
+ *---------------------------------------------------------------------------*/
+static u32 get_serial_number(void)
+{
+ u32 *serial = (u32 *)CFG_FLASH_BASE;
+
+ if (*serial == 0xffffffff)
+ return 0;
+
+ return *serial;
+}
+
+
+/*---------------------------------------------------------------------------+
+ * hcu_get_slot
+ *---------------------------------------------------------------------------*/
+u32 hcu_get_slot(void)
+{
+ u16 *slot = (u16 *)SYS_SLOT_ADDRESS;
+ return (*slot) & 0x7f;
+}
+
+
+/*---------------------------------------------------------------------------+
+ * misc_init_r.
+ *---------------------------------------------------------------------------*/
+int misc_init_r(void)
+{
+ char *s = getenv(DEFAULT_ETH_ADDR);
+ char *e;
+ int i;
+ u32 serial = get_serial_number();
+ unsigned long usb2d0cr = 0;
+ unsigned long usb2phy0cr, usb2h0cr = 0;
+ unsigned long sdr0_pfc1;
+
+ for (i = 0; i < 6; ++i) {
+ gd->bd->bi_enetaddr[i] = s ? simple_strtoul(s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+
+ if (gd->bd->bi_enetaddr[3] == 0 &&
+ gd->bd->bi_enetaddr[4] == 0 &&
+ gd->bd->bi_enetaddr[5] == 0) {
+ char ethaddr[22];
+
+ /* Must be in sync with CONFIG_ETHADDR */
+ gd->bd->bi_enetaddr[0] = 0x00;
+ gd->bd->bi_enetaddr[1] = 0x60;
+ gd->bd->bi_enetaddr[2] = 0x13;
+ gd->bd->bi_enetaddr[3] = (serial >> 16) & 0xff;
+ gd->bd->bi_enetaddr[4] = (serial >> 8) & 0xff;
+ gd->bd->bi_enetaddr[5] = hcu_get_slot();
+ sprintf(ethaddr, "%02X:%02X:%02X:%02X:%02X:%02X\0",
+ gd->bd->bi_enetaddr[0], gd->bd->bi_enetaddr[1],
+ gd->bd->bi_enetaddr[2], gd->bd->bi_enetaddr[3],
+ gd->bd->bi_enetaddr[4], gd->bd->bi_enetaddr[5]) ;
+ printf("%s: Setting eth %s serial 0x%x\n", __FUNCTION__,
+ ethaddr, serial);
+ setenv(DEFAULT_ETH_ADDR, ethaddr);
+ }
+
+ /* IP-Adress update */
+ {
+ IPaddr_t ipaddr;
+ char *ipstring;
+
+ ipstring = getenv("ipaddr");
+ if (ipstring == 0)
+ ipaddr = string_to_ip("172.25.1.99");
+ else
+ ipaddr = string_to_ip(ipstring);
+ if ((ipaddr & 0xff) != (32 + hcu_get_slot())) {
+ char tmp[22];
+
+ ipaddr = (ipaddr & 0xffffff00) + 32 + hcu_get_slot();
+ ip_to_string (ipaddr, tmp);
+ printf("%s: enforce %s\n", __FUNCTION__, tmp);
+ setenv("ipaddr", tmp);
+ }
+ }
+#ifdef CFG_ENV_IS_IN_FLASH
+ /* Monitor protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ -CFG_MONITOR_LEN,
+ 0xffffffff,
+ &flash_info[0]);
+
+ /* Env protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+ &flash_info[0]);
+#endif
+
+ /*
+ * USB stuff...
+ */
+
+ /* SDR Setting */
+ mfsdr(SDR0_PFC1, sdr0_pfc1);
+ mfsdr(SDR0_USB2D0CR, usb2d0cr);
+ mfsdr(SDR0_USB2PHY0CR, usb2phy0cr);
+ mfsdr(SDR0_USB2H0CR, usb2h0cr);
+
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_XOCLK_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_XOCLK_EXTERNAL; /*0*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_WDINT_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_WDINT_16BIT_30MHZ; /*1*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DVBUS_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DVBUS_PURDIS; /*0*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_DWNSTR_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_DWNSTR_HOST; /*1*/
+ usb2phy0cr = usb2phy0cr &~SDR0_USB2PHY0CR_UTMICN_MASK;
+ usb2phy0cr = usb2phy0cr | SDR0_USB2PHY0CR_UTMICN_HOST; /*1*/
+
+ /* An 8-bit/60MHz interface is the only possible alternative
+ when connecting the Device to the PHY */
+ usb2h0cr = usb2h0cr &~SDR0_USB2H0CR_WDINT_MASK;
+ usb2h0cr = usb2h0cr | SDR0_USB2H0CR_WDINT_16BIT_30MHZ; /*1*/
+
+ /* To enable the USB 2.0 Device function through the UTMI interface */
+ usb2d0cr = usb2d0cr &~SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK;
+ usb2d0cr = usb2d0cr | SDR0_USB2D0CR_USB2DEV_SELECTION; /*1*/
+
+ sdr0_pfc1 = sdr0_pfc1 &~SDR0_PFC1_UES_MASK;
+ sdr0_pfc1 = sdr0_pfc1 | SDR0_PFC1_UES_USB2D_SEL; /*0*/
+
+ mtsdr(SDR0_PFC1, sdr0_pfc1);
+ mtsdr(SDR0_USB2D0CR, usb2d0cr);
+ mtsdr(SDR0_USB2PHY0CR, usb2phy0cr);
+ mtsdr(SDR0_USB2H0CR, usb2h0cr);
+
+ /*clear resets*/
+ udelay(1000);
+ mtsdr(SDR0_SRST1, 0x00000000);
+ udelay(1000);
+ mtsdr(SDR0_SRST0, 0x00000000);
+
+ printf("USB: Host(int phy) Device(ext phy)\n");
+
+ return 0;
+}
+
+#if defined(CONFIG_PCI)
+/*************************************************************************
+ * pci_pre_init
+ *
+ * This routine is called just prior to registering the hose and gives
+ * the board the opportunity to check things. Returning a value of zero
+ * indicates that things are bad & PCI initialization should be aborted.
+ *
+ * Different boards may wish to customize the pci controller structure
+ * (add regions, override default access routines, etc) or perform
+ * certain pre-initialization actions.
+ *
+ ************************************************************************/
+int pci_pre_init(struct pci_controller *hose)
+{
+ unsigned long addr;
+
+ /*-------------------------------------------------------------------+
+ * As of errata version 0.4, CHIP_8: Incorrect Write to DDR SDRAM.
+ * Workaround: Disable write pipelining to DDR SDRAM by setting
+ * PLB0_ACR[WRP] = 0.
+ *-------------------------------------------------------------------*/
+
+ /*-------------------------------------------------------------------+
+ | Set priority for all PLB3 devices to 0.
+ | Set PLB3 arbiter to fair mode.
+ +-------------------------------------------------------------------*/
+ mfsdr(sdr_amp1, addr);
+ mtsdr(sdr_amp1, (addr & 0x000000FF) | 0x0000FF00);
+ addr = mfdcr(plb3_acr);
+ /* mtdcr(plb3_acr, addr & ~plb1_acr_wrp_mask); */ /* ngngng */
+ mtdcr(plb3_acr, addr | 0x80000000); /* Sequoia */
+
+ /*-------------------------------------------------------------------+
+ | Set priority for all PLB4 devices to 0.
+ +-------------------------------------------------------------------*/
+ mfsdr(sdr_amp0, addr);
+ mtsdr(sdr_amp0, (addr & 0x000000FF) | 0x0000FF00);
+ addr = mfdcr(plb4_acr) | 0xa0000000; /* Was 0x8---- */
+ /* mtdcr(plb4_acr, addr & ~plb1_acr_wrp_mask); */ /* ngngng */
+ mtdcr(plb4_acr, addr); /* Sequoia */
+
+ /*-------------------------------------------------------------------+
+ | Set Nebula PLB4 arbiter to fair mode.
+ +-------------------------------------------------------------------*/
+ /* Segment0 */
+ addr = (mfdcr(plb0_acr) & ~plb0_acr_ppm_mask) | plb0_acr_ppm_fair;
+ addr = (addr & ~plb0_acr_hbu_mask) | plb0_acr_hbu_enabled;
+ addr = (addr & ~plb0_acr_rdp_mask) | plb0_acr_rdp_4deep;
+ /* addr = (addr & ~plb0_acr_wrp_mask); */ /* ngngng */
+ addr = (addr & ~plb0_acr_wrp_mask) | plb0_acr_wrp_2deep; /* Sequoia */
+
+ /* mtdcr(plb0_acr, addr); */ /* Sequoia */
+ mtdcr(plb0_acr, 0); /* PATCH HAB: WRITE PIPELINING OFF */
+
+ /* Segment1 */
+ addr = (mfdcr(plb1_acr) & ~plb1_acr_ppm_mask) | plb1_acr_ppm_fair;
+ addr = (addr & ~plb1_acr_hbu_mask) | plb1_acr_hbu_enabled;
+ addr = (addr & ~plb1_acr_rdp_mask) | plb1_acr_rdp_4deep;
+ addr = (addr & ~plb1_acr_wrp_mask) ;
+ /* mtdcr(plb1_acr, addr); */ /* Sequoia */
+ mtdcr(plb1_acr, 0); /* PATCH HAB: WRITE PIPELINING OFF */
+
+ return 1;
+}
+
+/*************************************************************************
+ * pci_target_init
+ *
+ * The bootstrap configuration provides default settings for the pci
+ * inbound map (PIM). But the bootstrap config choices are limited and
+ * may not be sufficient for a given board.
+ *
+ ************************************************************************/
+void pci_target_init(struct pci_controller *hose)
+{
+ /*-------------------------------------------------------------+
+ * Set up Direct MMIO registers
+ *-------------------------------------------------------------*/
+ /*-------------------------------------------------------------+
+ | PowerPC440EPX PCI Master configuration.
+ | Map one 1Gig range of PLB/processor addresses to PCI memory space.
+ | PLB address 0xA0000000-0xDFFFFFFF ==> PCI address
+ | 0xA0000000-0xDFFFFFFF
+ | Use byte reversed out routines to handle endianess.
+ | Make this region non-prefetchable.
+ +-------------------------------------------------------------*/
+ /* PMM0 Mask/Attribute - disabled b4 setting */
+ out32r(PCIX0_PMM0MA, 0x00000000);
+ out32r(PCIX0_PMM0LA, CFG_PCI_MEMBASE); /* PMM0 Local Address */
+ /* PMM0 PCI Low Address */
+ out32r(PCIX0_PMM0PCILA, CFG_PCI_MEMBASE);
+ out32r(PCIX0_PMM0PCIHA, 0x00000000); /* PMM0 PCI High Address */
+ /* 512M + No prefetching, and enable region */
+ out32r(PCIX0_PMM0MA, 0xE0000001);
+
+ /* PMM0 Mask/Attribute - disabled b4 setting */
+ out32r(PCIX0_PMM1MA, 0x00000000);
+ out32r(PCIX0_PMM1LA, CFG_PCI_MEMBASE2); /* PMM0 Local Address */
+ /* PMM0 PCI Low Address */
+ out32r(PCIX0_PMM1PCILA, CFG_PCI_MEMBASE2);
+ out32r(PCIX0_PMM1PCIHA, 0x00000000); /* PMM0 PCI High Address */
+ /* 512M + No prefetching, and enable region */
+ out32r(PCIX0_PMM1MA, 0xE0000001);
+
+ out32r(PCIX0_PTM1MS, 0x00000001); /* Memory Size/Attribute */
+ out32r(PCIX0_PTM1LA, 0); /* Local Addr. Reg */
+ out32r(PCIX0_PTM2MS, 0); /* Memory Size/Attribute */
+ out32r(PCIX0_PTM2LA, 0); /* Local Addr. Reg */
+
+ /*------------------------------------------------------------------+
+ * Set up Configuration registers
+ *------------------------------------------------------------------*/
+
+ /* Program the board's subsystem id/vendor id */
+ pci_write_config_word(0, PCI_SUBSYSTEM_VENDOR_ID,
+ CFG_PCI_SUBSYS_VENDORID);
+ pci_write_config_word(0, PCI_SUBSYSTEM_ID, CFG_PCI_SUBSYS_ID);
+
+ /* Configure command register as bus master */
+ pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MASTER);
+
+ /* 240nS PCI clock */
+ pci_write_config_word(0, PCI_LATENCY_TIMER, 1);
+
+ /* No error reporting */
+ pci_write_config_word(0, PCI_ERREN, 0);
+
+ pci_write_config_dword(0, PCI_BRDGOPT2, 0x00000101);
+}
+
+/*************************************************************************
+ * pci_master_init
+ *
+ ************************************************************************/
+void pci_master_init(struct pci_controller *hose)
+{
+ unsigned short temp_short;
+
+ /*---------------------------------------------------------------+
+ | Write the PowerPC440 EP PCI Configuration regs.
+ | Enable PowerPC440 EP to be a master on the PCI bus (PMM).
+ | Enable PowerPC440 EP to act as a PCI memory target (PTM).
+ +--------------------------------------------------------------*/
+ pci_read_config_word(0, PCI_COMMAND, &temp_short);
+ pci_write_config_word(0, PCI_COMMAND,
+ temp_short | PCI_COMMAND_MASTER |
+ PCI_COMMAND_MEMORY);
+}
+
+/*************************************************************************
+ * is_pci_host
+ *
+ * This routine is called to determine if a pci scan should be
+ * performed. With various hardware environments (especially cPCI and
+ * PPMC) it's insufficient to depend on the state of the arbiter enable
+ * bit in the strap register, or generic host/adapter assumptions.
+ *
+ * Rather than hard-code a bad assumption in the general 440 code, the
+ * 440 pci code requires the board to decide at runtime.
+ *
+ * Return 0 for adapter mode, non-zero for host (monarch) mode.
+ *
+ *
+ ************************************************************************/
+int is_pci_host(struct pci_controller *hose)
+{
+ return 1;
+}
+#endif /* defined(CONFIG_PCI) */
diff --git a/board/netstal/hcu5/init.S b/board/netstal/hcu5/init.S
new file mode 100644
index 0000000..5ab6cd2
--- /dev/null
+++ b/board/netstal/hcu5/init.S
@@ -0,0 +1,79 @@
+/*
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppc_asm.tmpl>
+#include <config.h>
+#include <asm/mmu.h>
+
+/**************************************************************************
+ * TLB TABLE
+ *
+ * This table is used by the cpu boot code to setup the initial tlb
+ * entries. Rather than make broad assumptions in the cpu source tree,
+ * this table lets each board set things up however they like.
+ *
+ * Pointer to the table is returned in r1
+ *
+ *************************************************************************/
+ .section .bootpg,"ax"
+ .globl tlbtab
+
+tlbtab:
+ tlbtab_start
+
+ /* vxWorks needs this entry for the Machine Check interrupt, */
+ /* tlbentry( 0x40000000, SZ_256M, 0, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) */
+
+ /*
+ * BOOT_CS (FLASH) must be second. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
+ tlbentry( CFG_BOOT_BASE_ADDR, SZ_1M, CFG_BOOT_BASE_ADDR, 1, AC_R|AC_W|AC_X|SA_G )
+
+ /* TLB-entry for PCI Memory */
+ tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 1, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 1, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 1, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 1, AC_R|AC_W|SA_G|SA_I )
+
+ /* TLB-entry for EBC (CFG_CPLD) */
+ /* tlbentry( CFG_CPLD, SZ_1K, CFG_CPLD, 1, AC_R|AC_W|AC_X|SA_G|SA_I ) */
+ /* CAN */
+ tlbentry( CFG_CS_1, SZ_16M, CFG_CS_1, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+ /* IMC + CPLD */
+ tlbentry( CFG_CS_2, SZ_16M, CFG_CS_2, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+ tlbentry( CFG_CS_2 + 0x1000000, SZ_16M, CFG_CS_2 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+ /* IMC-Fast */
+ tlbentry( CFG_CS_3, SZ_16M, CFG_CS_3, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+ tlbentry( CFG_CS_3 + 0x1000000, SZ_16M, CFG_CS_3 + 0x1000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+
+ /* TLB-entry for Internal Registers & OCM */
+ tlbentry( CFG_PCI_BASE, SZ_16M, 0xe0000000, 0, AC_R|AC_W|AC_X|SA_I )
+
+ /*TLB-entry PCI registers*/
+ tlbentry( 0xEEC00000, SZ_1K, 0xEEC00000, 1, AC_R|AC_W|AC_X|SA_G|SA_I )
+
+ /* TLB-entry for peripherals */
+ tlbentry( 0xEF000000, SZ_16M, 0xEF000000, 1, AC_R|AC_W|AC_X|SA_G|SA_I)
+
+ /* TLB for SDRAM will be added by initdram (sdram.c) */
+
+ tlbtab_end
diff --git a/board/netstal/hcu5/sdram.c b/board/netstal/hcu5/sdram.c
new file mode 100644
index 0000000..9ee9ab5
--- /dev/null
+++ b/board/netstal/hcu5/sdram.c
@@ -0,0 +1,309 @@
+/*
+ * (C) Copyright 2007
+ * Niklaus Giger (Niklaus.Giger@netstal.com)
+ * (C) Copyright 2006
+ * Sylvie Gohl, AMCC/IBM, gohl.sylvie@fr.ibm.com
+ * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
+ * Thierry Roman, AMCC/IBM, thierry_roman@fr.ibm.com
+ * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
+ * Robert Snyder, AMCC/IBM, rob.snyder@fr.ibm.com
+ *
+ * (C) Copyright 2006
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* define DEBUG for debug output */
+#undef DEBUG
+
+#include <common.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/mmu.h>
+#include <ppc440.h>
+
+void hcu_led_set(u32 value);
+void dcbz_area(u32 start_address, u32 num_bytes);
+void dflush(void);
+
+#define DDR_DCR_BASE 0x10
+#define ddrcfga (DDR_DCR_BASE+0x0) /* DDR configuration address reg */
+#define ddrcfgd (DDR_DCR_BASE+0x1) /* DDR configuration data reg */
+
+#define DDR0_01_INT_MASK_MASK 0x000000FF
+#define DDR0_00_INT_ACK_ALL 0x7F000000
+#define DDR0_01_INT_MASK_ALL_ON 0x000000FF
+#define DDR0_01_INT_MASK_ALL_OFF 0x00000000
+
+#define DDR0_17_DLLLOCKREG_MASK 0x00010000 /* Read only */
+#define DDR0_17_DLLLOCKREG_UNLOCKED 0x00000000
+#define DDR0_17_DLLLOCKREG_LOCKED 0x00010000
+
+#define DDR0_22 0x16
+/* ECC */
+#define DDR0_22_CTRL_RAW_MASK 0x03000000
+#define DDR0_22_CTRL_RAW_ECC_DISABLE 0x00000000 /* ECC not enabled */
+#define DDR0_22_CTRL_RAW_ECC_CHECK_ONLY 0x01000000 /* ECC no correction */
+#define DDR0_22_CTRL_RAW_NO_ECC_RAM 0x02000000 /* Not a ECC RAM*/
+#define DDR0_22_CTRL_RAW_ECC_ENABLE 0x03000000 /* ECC correcting on */
+#define DDR0_03_CASLAT_DECODE(n) ((((unsigned long)(n))>>16)&0x7)
+
+#ifdef CFG_ENABLE_SDRAM_CACHE
+#define MY_TLB_WORD2_I_ENABLE 0 /* enable caching on DDR2 */
+#else
+#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on DDR2 */
+#endif
+
+void program_tlb(u32 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value);
+
+void board_add_ram_info(int use_default)
+{
+ PPC440_SYS_INFO board_cfg;
+ u32 val;
+ mfsdram(DDR0_22, val);
+ val &= DDR0_22_CTRL_RAW_MASK;
+ switch (val) {
+ case DDR0_22_CTRL_RAW_ECC_DISABLE:
+ puts(" (ECC disabled");
+ break;
+ case DDR0_22_CTRL_RAW_ECC_CHECK_ONLY:
+ puts(" (ECC check only");
+ break;
+ case DDR0_22_CTRL_RAW_NO_ECC_RAM:
+ puts(" (no ECC ram");
+ break;
+ case DDR0_22_CTRL_RAW_ECC_ENABLE:
+ puts(" (ECC enabled");
+ break;
+ }
+
+ get_sys_info(&board_cfg);
+ printf(", %d MHz", (board_cfg.freqPLB * 2) / 1000000);
+
+ mfsdram(DDR0_03, val);
+ val = DDR0_03_CASLAT_DECODE(val);
+ printf(", CL%d)", val);
+}
+
+/*--------------------------------------------------------------------
+ * wait_for_dlllock.
+ *--------------------------------------------------------------------*/
+static int wait_for_dlllock(void)
+{
+ unsigned long val;
+ int wait = 0;
+
+ /* -----------------------------------------------------------+
+ * Wait for the DCC master delay line to finish calibration
+ * ----------------------------------------------------------*/
+ mtdcr(ddrcfga, DDR0_17);
+ val = DDR0_17_DLLLOCKREG_UNLOCKED;
+
+ while (wait != 0xffff) {
+ val = mfdcr(ddrcfgd);
+ if ((val & DDR0_17_DLLLOCKREG_MASK) ==
+ DDR0_17_DLLLOCKREG_LOCKED)
+ /* dlllockreg bit on */
+ return 0;
+ else
+ wait++;
+ }
+ debug("0x%04x: DDR0_17 Value (dlllockreg bit): 0x%08x\n", wait, val);
+ debug("Waiting for dlllockreg bit to raise\n");
+
+ return -1;
+}
+
+/***********************************************************************
+ *
+ * sdram_panic -- Panic if we cannot configure the sdram correctly
+ *
+ ************************************************************************/
+void sdram_panic(const char *reason)
+{
+ printf("\n%s: reason %s", __FUNCTION__, reason);
+ hcu_led_set(0xff);
+ while (1) {
+ }
+ /* Never return */
+}
+
+#ifdef CONFIG_DDR_ECC
+static void blank_string(int size)
+{
+ int i;
+
+ for (i=0; i<size; i++)
+ putc('\b');
+ for (i=0; i<size; i++)
+ putc(' ');
+ for (i=0; i<size; i++)
+ putc('\b');
+}
+/*---------------------------------------------------------------------------+
+ * program_ecc.
+ *---------------------------------------------------------------------------*/
+static void program_ecc(unsigned long start_address, unsigned long num_bytes,
+ unsigned long tlb_word2_i_value)
+{
+ unsigned long current_address= start_address;
+ int loopi = 0;
+ u32 val;
+
+ char str[] = "ECC generation -";
+ char slash[] = "\\|/-\\|/-";
+
+ sync();
+ eieio();
+
+ puts(str);
+
+ if (tlb_word2_i_value == TLB_WORD2_I_ENABLE) {
+ /* ECC bit set method for non-cached memory */
+ /* This takes various seconds */
+ for(current_address = 0; current_address < num_bytes;
+ current_address += sizeof(u32)) {
+ *(u32 *)current_address = 0;
+ if ((current_address % (2 << 20)) == 0) {
+ putc('\b');
+ putc(slash[loopi++ % 8]);
+ }
+ }
+ } else {
+ /* ECC bit set method for cached memory */
+ /* Fast method, no noticeable delay */
+ dcbz_area(start_address, num_bytes);
+ dflush();
+ }
+ blank_string(strlen(str));
+
+ /* Clear error status */
+ mfsdram(DDR0_00, val);
+ mtsdram(DDR0_00, val | DDR0_00_INT_ACK_ALL);
+
+ /*
+ * Clear possible errors
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ mtspr(mcsr, mfspr(mcsr));
+
+ /* Set 'int_mask' parameter to functionnal value */
+ mfsdram(DDR0_01, val);
+ mtsdram(DDR0_01, ((val &~ DDR0_01_INT_MASK_MASK) |
+ DDR0_01_INT_MASK_ALL_OFF));
+
+ return;
+}
+
+#endif
+
+/***********************************************************************
+ *
+ * initdram -- 440EPx's DDR controller is a DENALI Core
+ *
+ ************************************************************************/
+long int initdram (int board_type)
+{
+#define HCU_HW_SDRAM_CONFIG_MASK 0x7
+#define INVALID_HW_CONFIG "Invalid HW-Config"
+ u16 *hwVersReg = (u16 *) HCU_HW_VERSION_REGISTER;
+ unsigned int dram_size = 0;
+
+ mtsdram(DDR0_02, 0x00000000);
+
+ /* Values must be kept in sync with Excel-table <<A0001492.>> ! */
+ mtsdram(DDR0_00, 0x0000190A);
+ mtsdram(DDR0_01, 0x01000000);
+ mtsdram(DDR0_03, 0x02030602);
+ mtsdram(DDR0_04, 0x0A020200);
+ mtsdram(DDR0_05, 0x02020307);
+ switch (*hwVersReg & HCU_HW_SDRAM_CONFIG_MASK) {
+ case 0:
+ dram_size = 128 * 1024 * 1024 ;
+ mtsdram(DDR0_06, 0x0102C80D); /* 128MB RAM */
+ mtsdram(DDR0_11, 0x000FC800); /* 128MB RAM */
+ mtsdram(DDR0_43, 0x030A0300); /* 128MB RAM */
+ break;
+ case 1:
+ dram_size = 256 * 1024 * 1024 ;
+ mtsdram(DDR0_06, 0x0102C812); /* 256MB RAM */
+ mtsdram(DDR0_11, 0x0014C800); /* 256MB RAM */
+ mtsdram(DDR0_43, 0x030A0200); /* 256MB RAM */
+ break;
+ default:
+ sdram_panic(INVALID_HW_CONFIG);
+ break;
+ }
+ mtsdram(DDR0_07, 0x00090100);
+ /*
+ * TCPD=200 cycles of clock input is required to lock the DLL.
+ * CKE must be HIGH the entire time.mtsdram(DDR0_08, 0x02C80001);
+ */
+ mtsdram(DDR0_08, 0x02C80001);
+ mtsdram(DDR0_09, 0x00011D5F);
+ mtsdram(DDR0_10, 0x00000100);
+ mtsdram(DDR0_12, 0x00000003);
+ mtsdram(DDR0_14, 0x00000000);
+ mtsdram(DDR0_17, 0x1D000000);
+ mtsdram(DDR0_18, 0x1D1D1D1D);
+ mtsdram(DDR0_19, 0x1D1D1D1D);
+ mtsdram(DDR0_20, 0x0B0B0B0B);
+ mtsdram(DDR0_21, 0x0B0B0B0B);
+ #define ECC_RAM 0x03267F0B
+ #define NO_ECC_RAM 0x00267F0B
+#ifdef CONFIG_DDR_ECC
+ mtsdram(DDR0_22, ECC_RAM);
+#else
+ mtsdram(DDR0_22, NO_ECC_RAM);
+#endif
+
+ mtsdram(DDR0_23, 0x00000000);
+ mtsdram(DDR0_24, 0x01020001);
+ mtsdram(DDR0_26, 0x2D930517);
+ mtsdram(DDR0_27, 0x00008236);
+ mtsdram(DDR0_28, 0x00000000);
+ mtsdram(DDR0_31, 0x00000000);
+ mtsdram(DDR0_42, 0x01000006);
+ mtsdram(DDR0_44, 0x00000003);
+ mtsdram(DDR0_02, 0x00000001);
+ wait_for_dlllock();
+ mtsdram(DDR0_00, 0x40000000); /* Zero init bit */
+
+ /*
+ * Program tlb entries for this size (dynamic)
+ */
+ remove_tlb(CFG_SDRAM_BASE, 256 << 20);
+ program_tlb(0, 0, dram_size, MY_TLB_WORD2_I_ENABLE);
+
+ /*
+ * Setup 2nd TLB with same physical address but different virtual
+ * address with cache enabled. This is done for fast ECC generation.
+ */
+ program_tlb(0, CFG_DDR_CACHED_ADDR, dram_size, 0);
+
+ /* Diminish RAM to initialize */
+ dram_size = dram_size - 32 ;
+#ifdef CONFIG_DDR_ECC
+ /*
+ * If ECC is enabled, initialize the parity bits.
+ */
+ program_ecc(CFG_DDR_CACHED_ADDR, dram_size, 0);
+#endif
+
+ return (dram_size);
+}
diff --git a/board/netstal/hcu5/u-boot.lds b/board/netstal/hcu5/u-boot.lds
new file mode 100644
index 0000000..6d255a9
--- /dev/null
+++ b/board/netstal/hcu5/u-boot.lds
@@ -0,0 +1,144 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+
+SECTIONS
+{
+ .resetvec 0xFFFFFFFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ .bootpg 0xFFFFF000 :
+ {
+ cpu/ppc4xx/start.o (.bootpg)
+ } = 0xffff
+
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/ppc4xx/start.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+
+ ppcenv_assert = ASSERT(. < 0xFFFF8000, ".bss section too big, overlaps .ppcenv section. Please update your confguration: CFG_MONITOR_BASE, CFG_MONITOR_LEN and TEXT_BASE may need to be modified.");
+
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/netstar/nand.c b/board/netstar/nand.c
index 7852365..d47e1d8 100644
--- a/board/netstar/nand.c
+++ b/board/netstar/nand.c
@@ -22,7 +22,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
diff --git a/board/netta/netta.c b/board/netta/netta.c
index 4923e3a..5a75e53 100644
--- a/board/netta/netta.c
+++ b/board/netta/netta.c
@@ -555,7 +555,7 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
@@ -570,7 +570,7 @@
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_init(void)
{
diff --git a/board/netta/pcmcia.c b/board/netta/pcmcia.c
index a3709f7..86b3cfb 100644
--- a/board/netta/pcmcia.c
+++ b/board/netta/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -264,7 +264,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -291,7 +291,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/netta2/netta2.c b/board/netta2/netta2.c
index 3ca7bd3..b216c5a 100644
--- a/board/netta2/netta2.c
+++ b/board/netta2/netta2.c
@@ -595,7 +595,7 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
diff --git a/board/netvia/netvia.c b/board/netvia/netvia.c
index 3e6c616..856b776 100644
--- a/board/netvia/netvia.c
+++ b/board/netvia/netvia.c
@@ -416,7 +416,7 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
diff --git a/board/o2dnt/u-boot.lds b/board/o2dnt/u-boot.lds
deleted file mode 100644
index 88dc118..0000000
--- a/board/o2dnt/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/omap2420h4/flash.c b/board/omap2420h4/flash.c
deleted file mode 100644
index d5e106a..0000000
--- a/board/omap2420h4/flash.c
+++ /dev/null
@@ -1,537 +0,0 @@
-/*
- * (C) Copyright 2001
- * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
- *
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2003
- * Texas Instruments, <www.ti.com>
- * Kshitij Gupta <Kshitij@ti.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <asm/arch/sizes.h>
-#include <linux/byteorder/swab.h>
-
-#define PHYS_FLASH_SECT_SIZE SZ_128K
-flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-
-/* Board support for 1 or 2 flash devices */
-#undef FLASH_PORT_WIDTH32
-#define FLASH_PORT_WIDTH16
-
-#ifdef FLASH_PORT_WIDTH16
-# define FLASH_PORT_WIDTH ushort
-# define FLASH_PORT_WIDTHV vu_short
-# define SWAP(x) __swab16(x)
-#else
-# define FLASH_PORT_WIDTH ulong
-# define FLASH_PORT_WIDTHV vu_long
-# define SWAP(x) __swab32(x)
-#endif
-
-#define FPW FLASH_PORT_WIDTH
-#define FPWV FLASH_PORT_WIDTHV
-
-#define mb() __asm__ __volatile__ ("" : : : "memory")
-
-
-/* Flash Organization Structure */
-typedef struct OrgDef {
- unsigned int sector_number;
- unsigned int sector_size;
-} OrgDef;
-
-
-/* Flash Organizations */
-OrgDef OrgIntel_28F256L18T[] = {
- {4, SZ_32K}, /* 4 * 32kBytes sectors */
- {255, SZ_128K}, /* 255 * 128kBytes sectors */
-};
-
-
-/*-----------------------------------------------------------------------
- * Functions
- */
-unsigned long flash_init (void);
-static ulong flash_get_size (FPW * addr, flash_info_t * info);
-static int write_data (flash_info_t * info, ulong dest, FPW data);
-static void flash_get_offsets (ulong base, flash_info_t * info);
-void inline spin_wheel (void);
-void flash_print_info (flash_info_t * info);
-void flash_unprotect_sectors (FPWV * addr);
-int flash_erase (flash_info_t * info, int s_first, int s_last);
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt);
-void flash_unlock(flash_info_t * info, int bank);
-int flash_probe(void);
-
-/*-----------------------------------------------------------------------
- */
-
-/* see if flash is ok */
-int flash_probe(void)
-{
- return(flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[0]));
-}
-
-unsigned long flash_init (void)
-{
- int i;
- ulong size = 0;
- for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
- switch (i) {
- case 0:
- flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_1, &flash_info[i]);
- /* to reset the lock bit */
- flash_unlock(&flash_info[i],i);
- break;
- case 1:
- flash_get_size ((FPW *) PHYS_FLASH_2, &flash_info[i]);
- flash_get_offsets (PHYS_FLASH_2, &flash_info[i]);
- /* to reset the lock bit */
- flash_unlock(&flash_info[i],i);
- break;
-
- default:
- panic ("configured too many flash banks!\n");
- break;
- }
- size += flash_info[i].size;
- }
-
-#ifdef CFG_ENV_IS_IN_FLASH
- /* Protect monitor and environment sectors
- */
- flash_protect (FLAG_PROTECT_SET,
- CFG_FLASH_BASE,
- CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]);
-
- flash_protect (FLAG_PROTECT_SET,
- CFG_ENV_ADDR,
- CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]);
-#endif
- return size;
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_unlock(flash_info_t * info, int bank)
-{
- int j;
- if (!bank)
- j=2; /* leave 0,1 locked for boot bank */
- else
- j=0; /* get the whole bank for #2 */
-
- for (;j<CFG_MAX_FLASH_SECT;j++) {
- FPWV *addr = (FPWV *) (info->start[j]);
- if (addr == NULL) {
- printf("Warning Flash probe failed\n");
- break;
- }
- flash_unprotect_sectors (addr);
- *addr = (FPW) 0x00500050;/* clear status register */
- *addr = (FPW) 0x00FF00FF;/* resest to read mode */
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-static void flash_get_offsets (ulong base, flash_info_t * info)
-{
- int i;
- volatile int r; /* gcc 3.4.0-1 strangeness, need to follow up.*/
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return;
- }
-
- if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
- for (i = 0; i < info->sector_count; i++) {
- if (i > 254) { /* 255,256,257,258 */
- r=i;
- info->start[i] = base + (((r-(int)255) * SZ_32K) + (255*PHYS_FLASH_SECT_SIZE));
- info->protect[i] = 0;
- } else {
- info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
- info->protect[i] = 0;
- }
- }
- }
-}
-
-/*-----------------------------------------------------------------------
- */
-void flash_print_info (flash_info_t * info)
-{
- int i;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("missing or unknown FLASH type\n");
- return;
- }
-
- switch (info->flash_id & FLASH_VENDMASK) {
- case FLASH_MAN_INTEL:
- printf ("INTEL ");
- break;
- default:
- printf ("Unknown Vendor ");
- break;
- }
-
- switch (info->flash_id & FLASH_TYPEMASK) {
- case FLASH_28F256L18T:
- printf ("FLASH 28F256L18T\n");
- break;
- default:
- printf ("Unknown Chip Type\n");
- break;
- }
-
- printf (" Size: %ld MB in %d Sectors\n",
- info->size >> 20, info->sector_count);
-
- printf (" Sector Start Addresses:");
- for (i = 0; i < info->sector_count; ++i) {
- if ((i % 5) == 0)
- printf ("\n ");
- printf (" %08lX%s",
- info->start[i], info->protect[i] ? " (RO)" : " ");
- }
- printf ("\n");
- return;
-}
-
-/*
- * The following code cannot be run from FLASH!
- */
-static ulong flash_get_size (FPW * addr, flash_info_t * info)
-{
- volatile FPW value;
- /* mb(); this one makes ARM11 err go away, but I want it :) as a guide to problems */
-
- /* Write auto select command: read Manufacturer ID */
- addr[0x5555] = (FPW) 0x00AA00AA;
- addr[0x2AAA] = (FPW) 0x00550055;
- addr[0x5555] = (FPW) 0x00900090;
-
- mb ();
- value = addr[0] & 0xFF; /* just looking for 89 (8989 is hw pat)*/
-
- switch (value) {
-
- case (FPW) INTEL_MANUFACT:
- info->flash_id = FLASH_MAN_INTEL;
- break;
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- info->sector_count = 0;
- info->size = 0;
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
- return(0); /* no or unknown flash */
- }
-
- mb ();
- value = addr[1]; /* device ID */
- switch (value) {
-
- case (FPW) (INTEL_ID_28F256L18T): /* 880D */
- info->flash_id += FLASH_28F256L18T;
- info->sector_count = 259; /*0-258*/
- info->size = SZ_32M;
- break; /* => 32 MB */
-
- default:
- info->flash_id = FLASH_UNKNOWN;
- break;
- }
-
- if (info->sector_count > CFG_MAX_FLASH_SECT) {
- printf ("** ERROR: sector count %d > max (%d) **\n",
- info->sector_count, CFG_MAX_FLASH_SECT);
- info->sector_count = CFG_MAX_FLASH_SECT;
- }
-
- addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
-
- return(info->size);
-}
-
-
-/* unprotects a sector for write and erase
- * on some intel parts, this unprotects the entire chip, but it
- * wont hurt to call this additional times per sector...
- */
-void flash_unprotect_sectors (FPWV * addr)
-{
-#define PD_FINTEL_WSMS_READY_MASK 0x0080
-
- *addr = (FPW) 0x00500050; /* clear status register */
-
- /* this sends the clear lock bit command */
- *addr = (FPW) 0x00600060;
- *addr = (FPW) 0x00D000D0;
-}
-
-
-/*-----------------------------------------------------------------------
- */
-
-int flash_erase (flash_info_t * info, int s_first, int s_last)
-{
- int prot, sect;
- ulong type, start, last;
- int rcode = 0;
-#ifdef CONFIG_USE_IRQ
- int iflag;
-#endif
-
- if ((s_first < 0) || (s_first > s_last)) {
- if (info->flash_id == FLASH_UNKNOWN) {
- printf ("- missing\n");
- } else {
- printf ("- no sectors to erase\n");
- }
- return 1;
- }
-
- type = (info->flash_id & FLASH_VENDMASK);
- if ((type != FLASH_MAN_INTEL)) {
- printf ("Can't erase unknown flash type %08lx - aborted\n",
- info->flash_id);
- return 1;
- }
-
- prot = 0;
- for (sect = s_first; sect <= s_last; ++sect) {
- if (info->protect[sect]) {
- prot++;
- }
- }
-
- if (prot) {
- printf ("- Warning: %d protected sectors will not be erased!\n",
- prot);
- } else {
- printf ("\n");
- }
-
-
- start = get_timer (0);
- last = start;
-
-#ifdef CONFIG_USE_IRQ
- /* Disable interrupts which might cause a timeout here */
- iflag = disable_interrupts ();
-#endif
-
- /* Start erase on unprotected sectors */
- for (sect = s_first; sect <= s_last; sect++) {
- if (info->protect[sect] == 0) { /* not protected */
- FPWV *addr = (FPWV *) (info->start[sect]);
- FPW status;
-
- printf ("Erasing sector %2d ... ", sect);
-
- flash_unprotect_sectors (addr);
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- *addr = (FPW) 0x00500050;/* clear status register */
- *addr = (FPW) 0x00200020;/* erase setup */
- *addr = (FPW) 0x00D000D0;/* erase confirm */
-
- while (((status =
- *addr) & (FPW) 0x00800080) !=
- (FPW) 0x00800080) {
- if (get_timer_masked () >
- CFG_FLASH_ERASE_TOUT) {
- printf ("Timeout\n");
- /* suspend erase */
- *addr = (FPW) 0x00B000B0;
- /* reset to read mode */
- *addr = (FPW) 0x00FF00FF;
- rcode = 1;
- break;
- }
- }
-
- /* clear status register cmd. */
- *addr = (FPW) 0x00500050;
- *addr = (FPW) 0x00FF00FF;/* resest to read mode */
- printf (" done\n");
- }
- }
-#ifdef CONFIG_USE_IRQ
- if (iflag)
- enable_interrupts();
-#endif
-
- return rcode;
-}
-
-/*-----------------------------------------------------------------------
- * Copy memory to flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- * 4 - Flash not identified
- */
-
-int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
-{
- ulong cp, wp;
- FPW data;
- int count, i, l, rc, port_width;
-
- if (info->flash_id == FLASH_UNKNOWN) {
- return 4;
- }
-/* get lower word aligned address */
-#ifdef FLASH_PORT_WIDTH16
- wp = (addr & ~1);
- port_width = 2;
-#else
- wp = (addr & ~3);
- port_width = 4;
-#endif
-
- /*
- * handle unaligned start bytes
- */
- if ((l = addr - wp) != 0) {
- data = 0;
- for (i = 0, cp = wp; i < l; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
- for (; i < port_width && cnt > 0; ++i) {
- data = (data << 8) | *src++;
- --cnt;
- ++cp;
- }
- for (; cnt == 0 && i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return(rc);
- }
- wp += port_width;
- }
-
- /*
- * handle word aligned part
- */
- count = 0;
- while (cnt >= port_width) {
- data = 0;
- for (i = 0; i < port_width; ++i) {
- data = (data << 8) | *src++;
- }
- if ((rc = write_data (info, wp, SWAP (data))) != 0) {
- return(rc);
- }
- wp += port_width;
- cnt -= port_width;
- if (count++ > 0x800) {
- spin_wheel ();
- count = 0;
- }
- }
-
- if (cnt == 0) {
- return(0);
- }
-
- /*
- * handle unaligned tail bytes
- */
- data = 0;
- for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
- data = (data << 8) | *src++;
- --cnt;
- }
- for (; i < port_width; ++i, ++cp) {
- data = (data << 8) | (*(uchar *) cp);
- }
-
- return(write_data (info, wp, SWAP (data)));
-}
-
-/*-----------------------------------------------------------------------
- * Write a word or halfword to Flash, returns:
- * 0 - OK
- * 1 - write timeout
- * 2 - Flash not erased
- */
-static int write_data (flash_info_t * info, ulong dest, FPW data)
-{
- FPWV *addr = (FPWV *) dest;
- ulong status;
-#ifdef CONFIG_USE_IRQ
- int iflag;
-#endif
-
- /* Check if Flash is (sufficiently) erased */
- if ((*addr & data) != data) {
- printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr);
- return(2);
- }
- /* Disable interrupts which might cause a timeout here */
-#ifdef CONFIG_USE_IRQ
- iflag = disable_interrupts ();
-#endif
- *addr = (FPW) 0x00400040; /* write setup */
- *addr = data;
-
- /* arm simple, non interrupt dependent timer */
- reset_timer_masked ();
-
- /* wait while polling the status register */
- while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
- if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) {
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
- return(1);
- }
- }
- *addr = (FPW) 0x00FF00FF; /* restore read mode */
-
-#ifdef CONFIG_USE_IRQ
- if (iflag)
- enable_interrupts();
-#endif
-
- return(0);
-}
-
-void inline spin_wheel (void)
-{
- static int p = 0;
- static char w[] = "\\/-";
-
- printf ("\010%c", w[p]);
- (++p == 3) ? (p = 0) : 0;
-}
diff --git a/board/omap2420h4/omap2420h4.c b/board/omap2420h4/omap2420h4.c
index f7f75e0..1b917b3 100644
--- a/board/omap2420h4/omap2420h4.c
+++ b/board/omap2420h4/omap2420h4.c
@@ -31,7 +31,7 @@
#include <asm/arch/mem.h>
#include <i2c.h>
#include <asm/mach-types.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
#endif
@@ -847,7 +847,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
void nand_init(void)
{
extern flash_info_t flash_info[];
diff --git a/board/oxc/u-boot.lds b/board/oxc/u-boot.lds
deleted file mode 100644
index 2a5cd2e..0000000
--- a/board/oxc/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c
index a216c55..1148c6a 100644
--- a/board/pcippc2/pcippc2.c
+++ b/board/pcippc2/pcippc2.c
@@ -202,7 +202,7 @@
enable_interrupts ();
}
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
switch (argc) {
@@ -241,5 +241,5 @@
"wd - print current status\n"
);
-#endif /* CFG_CMD_BSP */
+#endif
#endif /* CONFIG_WATCHDOG */
diff --git a/board/pcs440ep/config.mk b/board/pcs440ep/config.mk
index 319c4fa..4d942eb 100644
--- a/board/pcs440ep/config.mk
+++ b/board/pcs440ep/config.mk
@@ -25,6 +25,9 @@
# PCS440EP board
#
+# Check the U-Boot Image with a SHA1 checksum
+ALL += $(obj)u-boot.sha1
+
#TEXT_BASE = 0x00001000
ifeq ($(ramsym),1)
diff --git a/board/pcs440ep/flash.c b/board/pcs440ep/flash.c
index ece5478..c5a62e2 100644
--- a/board/pcs440ep/flash.c
+++ b/board/pcs440ep/flash.c
@@ -82,7 +82,9 @@
case FLASH_MAN_AMD: printf ("AMD "); break;
case FLASH_MAN_FUJ: printf ("FUJITSU "); break;
case FLASH_MAN_SST: printf ("SST "); break;
+ case FLASH_MAN_STM: printf ("ST Micro"); break;
case FLASH_MAN_EXCEL: printf ("Excel Semiconductor "); break;
+ case FLASH_MAN_MX: printf ("MXIC "); break;
default: printf ("Unknown Vendor "); break;
}
@@ -117,6 +119,8 @@
break;
case FLASH_SST040: printf ("SST39LF/VF040 (4 Mbit, uniform sector size)\n");
break;
+ case STM_ID_M29W040B: printf ("ST Micro M29W040B (4 Mbit, uniform sector size)\n");
+ break;
default: printf ("Unknown Chip Type\n");
break;
}
@@ -192,9 +196,15 @@
case (CFG_FLASH_WORD_SIZE)SST_MANUFACT:
info->flash_id = FLASH_MAN_SST;
break;
+ case (CFG_FLASH_WORD_SIZE)STM_MANUFACT:
+ info->flash_id = FLASH_MAN_STM;
+ break;
case (CFG_FLASH_WORD_SIZE)EXCEL_MANUFACT:
info->flash_id = FLASH_MAN_EXCEL;
break;
+ case (CFG_FLASH_WORD_SIZE)MX_MANUFACT:
+ info->flash_id = FLASH_MAN_MX;
+ break;
default:
info->flash_id = FLASH_UNKNOWN;
info->sector_count = 0;
@@ -222,6 +232,11 @@
info->sector_count = 8;
info->size = 0x0080000; /* => 0.5 MB */
break;
+ case (CFG_FLASH_WORD_SIZE)STM_ID_M29W040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 0,5 MB */
+ break;
case (CFG_FLASH_WORD_SIZE)AMD_ID_LV800T:
info->flash_id += FLASH_AM800T;
diff --git a/board/pcs440ep/init.S b/board/pcs440ep/init.S
index 0eee4d8..36a40c9 100644
--- a/board/pcs440ep/init.S
+++ b/board/pcs440ep/init.S
@@ -87,27 +87,32 @@
.globl tlbtab
tlbtab:
- tlbtab_start
+ tlbtab_start
- /*
- * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
- * speed up boot process. It is patched after relocation to enable SA_I
- */
- tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
+ /*
+ * BOOT_CS (FLASH) must be first. Before relocation SA_I can be off to use the
+ * speed up boot process. It is patched after relocation to enable SA_I
+ */
+ tlbentry( CFG_BOOT_BASE_ADDR, SZ_256M, CFG_BOOT_BASE_ADDR, 0, AC_R|AC_W|AC_X|SA_G/*|SA_I*/)
- /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
- tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
+ /* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
+ tlbentry( CFG_INIT_RAM_ADDR, SZ_64K, CFG_INIT_RAM_ADDR, 0, AC_R|AC_W|AC_X|SA_G )
- tlbentry( CFG_SDRAM_BASE, SZ_256M, CFG_SDRAM_BASE, 0, AC_R|AC_W|AC_X|SA_G|SA_I )
- tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
+ /*
+ * TLB entries for SDRAM are not needed on this platform.
+ * They are dynamically generated in the SPD DDR detection
+ * routine.
+ */
- /* PCI */
- tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
- tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_BASE, SZ_256M, CFG_PCI_BASE, 0, AC_R|AC_W|SA_G|SA_I )
- /* USB 2.0 Device */
- tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
+ /* PCI */
+ tlbentry( CFG_PCI_MEMBASE, SZ_256M, CFG_PCI_MEMBASE, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE1, SZ_256M, CFG_PCI_MEMBASE1, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE2, SZ_256M, CFG_PCI_MEMBASE2, 0, AC_R|AC_W|SA_G|SA_I )
+ tlbentry( CFG_PCI_MEMBASE3, SZ_256M, CFG_PCI_MEMBASE3, 0, AC_R|AC_W|SA_G|SA_I )
- tlbtab_end
+ /* USB 2.0 Device */
+ tlbentry( CFG_USB_DEVICE, SZ_1K, 0x50000000, 0, AC_R|AC_W|SA_G|SA_I )
+
+ tlbtab_end
diff --git a/board/pcs440ep/pcs440ep.c b/board/pcs440ep/pcs440ep.c
index 8858f0a..90e99d3 100644
--- a/board/pcs440ep/pcs440ep.c
+++ b/board/pcs440ep/pcs440ep.c
@@ -23,20 +23,116 @@
#include <common.h>
#include <ppc4xx.h>
+#include <malloc.h>
+#include <command.h>
+#include <crc.h>
#include <asm/processor.h>
#include <spd_sdram.h>
+#include <status_led.h>
+#include <sha1.h>
+#include <asm/io.h>
DECLARE_GLOBAL_DATA_PTR;
extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
-static void set_leds(int val)
+unsigned char sha1_checksum[SHA1_SUM_LEN];
+
+/* swap 4 Bits (Bit0 = Bit3, Bit1 = Bit2, Bit2 = Bit1 and Bit3 = Bit0) */
+unsigned char swapbits[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
+ 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
+
+static void set_leds (int val)
{
- unsigned char led[16] = {0x0, 0x8, 0x4, 0xc, 0x2, 0xa, 0x6, 0xe,
- 0x1, 0x9, 0x5, 0xd, 0x3, 0xb, 0x7, 0xf};
- out32(GPIO0_OR, (in32(GPIO0_OR) & ~0x78000000) | (led[val] << 27));
+ out32(GPIO0_OR, (in32 (GPIO0_OR) & ~0x78000000) | (val << 27));
}
+#define GET_LEDS ((in32 (GPIO0_OR) & 0x78000000) >> 27)
+
+void __led_init (led_id_t mask, int state)
+{
+ int val = GET_LEDS;
+
+ if (state == STATUS_LED_ON)
+ val |= mask;
+ else
+ val &= ~mask;
+ set_leds (val);
+}
+
+void __led_set (led_id_t mask, int state)
+{
+ int val = GET_LEDS;
+
+ if (state == STATUS_LED_ON)
+ val |= mask;
+ else if (state == STATUS_LED_OFF)
+ val &= ~mask;
+ set_leds (val);
+}
+
+void __led_toggle (led_id_t mask)
+{
+ int val = GET_LEDS;
+
+ val ^= mask;
+ set_leds (val);
+}
+
+static void status_led_blink (void)
+{
+ int i;
+ int val = GET_LEDS;
+
+ /* set all LED which are on, to state BLINKING */
+ for (i = 0; i < 4; i++) {
+ if (val & 0x01) status_led_set (3 - i, STATUS_LED_BLINKING);
+ else status_led_set (3 - i, STATUS_LED_OFF);
+ val = val >> 1;
+ }
+}
+
+#if defined(CONFIG_SHOW_BOOT_PROGRESS)
+void show_boot_progress (int val)
+{
+ /* find all valid Codes for val in README */
+ if (val == -30) return;
+ if (val < 0) {
+ /* smthing goes wrong */
+ status_led_blink ();
+ return;
+ }
+ switch (val) {
+ case 1:
+ /* validating Image */
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_ON);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+ case 15:
+ /* booting */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_ON);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+#if 0
+ case 64:
+ /* starting Ethernet configuration */
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_OFF);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+#endif
+ case 80:
+ /* loading Image */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_OFF);
+ status_led_set (2, STATUS_LED_ON);
+ break;
+ }
+}
+#endif
+
int board_early_init_f(void)
{
register uint reg;
@@ -85,6 +181,266 @@
return 0;
}
+#define EEPROM_LEN 256
+void load_sernum_ethaddr (void)
+{
+ int ret;
+ char buf[EEPROM_LEN];
+ char mac[32];
+ char *use_eeprom;
+ u16 checksumcrc16 = 0;
+
+ /* read the MACs from EEprom */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_ON);
+ ret = eeprom_read (CFG_I2C_EEPROM_ADDR, 0, (uchar *)buf, EEPROM_LEN);
+ if (ret == 0) {
+ checksumcrc16 = cyg_crc16 ((uchar *)buf, EEPROM_LEN - 2);
+ /* check, if the EEprom is programmed:
+ * - The Prefix(Byte 0,1,2) is equal to "ATR"
+ * - The checksum, stored in the last 2 Bytes, is correct
+ */
+ if ((strncmp (buf,"ATR",3) != 0) ||
+ ((checksumcrc16 >> 8) != buf[EEPROM_LEN - 2]) ||
+ ((checksumcrc16 & 0xff) != buf[EEPROM_LEN - 1])) {
+ /* EEprom is not programmed */
+ printf("%s: EEPROM Checksum not OK\n", __FUNCTION__);
+ } else {
+ /* get the MACs */
+ sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[3],
+ buf[4],
+ buf[5],
+ buf[6],
+ buf[7],
+ buf[8]);
+ setenv ("ethaddr", (char *) mac);
+ sprintf (mac, "%02x:%02x:%02x:%02x:%02x:%02x",
+ buf[9],
+ buf[10],
+ buf[11],
+ buf[12],
+ buf[13],
+ buf[14]);
+ setenv ("eth1addr", (char *) mac);
+ return;
+ }
+ }
+
+ /* some error reading the EEprom */
+ if ((use_eeprom = getenv ("use_eeprom_ethaddr")) == NULL) {
+ /* dont use bootcmd */
+ setenv("bootdelay", "-1");
+ return;
+ }
+ /* == default ? use standard */
+ if (strncmp (use_eeprom, "default", 7) == 0) {
+ return;
+ }
+ /* Env doesnt exist -> hang */
+ status_led_blink ();
+ /* here we do this "handy" because we have no interrupts
+ at this time */
+ puts ("### EEPROM ERROR ### Please RESET the board ###\n");
+ for (;;) {
+ __led_toggle (12);
+ udelay (100000);
+ }
+ return;
+}
+
+#ifdef CONFIG_PREBOOT
+
+static uchar kbd_magic_prefix[] = "key_magic";
+static uchar kbd_command_prefix[] = "key_cmd";
+
+struct kbd_data_t {
+ char s1;
+ char s2;
+};
+
+struct kbd_data_t* get_keys (struct kbd_data_t *kbd_data)
+{
+ char *val;
+ unsigned long tmp;
+
+ /* use the DIPs for some bootoptions */
+ val = getenv (ENV_NAME_DIP);
+ tmp = simple_strtoul (val, NULL, 16);
+
+ kbd_data->s2 = (tmp & 0x0f);
+ kbd_data->s1 = (tmp & 0xf0) >> 4;
+ return kbd_data;
+}
+
+static int compare_magic (const struct kbd_data_t *kbd_data, char *str)
+{
+ char s1 = str[0];
+
+ if (s1 >= '0' && s1 <= '9')
+ s1 -= '0';
+ else if (s1 >= 'a' && s1 <= 'f')
+ s1 = s1 - 'a' + 10;
+ else if (s1 >= 'A' && s1 <= 'F')
+ s1 = s1 - 'A' + 10;
+ else
+ return -1;
+
+ if (s1 != kbd_data->s1) return -1;
+
+ s1 = str[1];
+ if (s1 >= '0' && s1 <= '9')
+ s1 -= '0';
+ else if (s1 >= 'a' && s1 <= 'f')
+ s1 = s1 - 'a' + 10;
+ else if (s1 >= 'A' && s1 <= 'F')
+ s1 = s1 - 'A' + 10;
+ else
+ return -1;
+
+ if (s1 != kbd_data->s2) return -1;
+ return 0;
+}
+
+static char *key_match (const struct kbd_data_t *kbd_data)
+{
+ char magic[sizeof (kbd_magic_prefix) + 1];
+ char *suffix;
+ char *kbd_magic_keys;
+
+ /*
+ * The following string defines the characters that can be appended
+ * to "key_magic" to form the names of environment variables that
+ * hold "magic" key codes, i. e. such key codes that can cause
+ * pre-boot actions. If the string is empty (""), then only
+ * "key_magic" is checked (old behaviour); the string "125" causes
+ * checks for "key_magic1", "key_magic2" and "key_magic5", etc.
+ */
+ if ((kbd_magic_keys = getenv ("magic_keys")) == NULL)
+ kbd_magic_keys = "";
+
+ /* loop over all magic keys;
+ * use '\0' suffix in case of empty string
+ */
+ for (suffix = kbd_magic_keys; *suffix ||
+ suffix == kbd_magic_keys; ++suffix) {
+ sprintf (magic, "%s%c", kbd_magic_prefix, *suffix);
+ if (compare_magic (kbd_data, getenv (magic)) == 0) {
+ char cmd_name[sizeof (kbd_command_prefix) + 1];
+ char *cmd;
+
+ sprintf (cmd_name, "%s%c", kbd_command_prefix, *suffix);
+ cmd = getenv (cmd_name);
+
+ return (cmd);
+ }
+ }
+ return (NULL);
+}
+
+#endif /* CONFIG_PREBOOT */
+
+static int pcs440ep_readinputs (void)
+{
+ int i;
+ char value[20];
+
+ /* read the inputs and set the Envvars */
+ /* Revision Level Bit 26 - 29 */
+ i = ((in32 (GPIO0_IR) & 0x0000003c) >> 2);
+ i = swapbits[i];
+ sprintf (value, "%02x", i);
+ setenv (ENV_NAME_REVLEV, value);
+ /* Solder Switch Bit 30 - 33 */
+ i = (in32 (GPIO0_IR) & 0x00000003) << 2;
+ i += (in32 (GPIO1_IR) & 0xc0000000) >> 30;
+ i = swapbits[i];
+ sprintf (value, "%02x", i);
+ setenv (ENV_NAME_SOLDER, value);
+ /* DIP Switch Bit 49 - 56 */
+ i = ((in32 (GPIO1_IR) & 0x00007f80) >> 7);
+ i = (swapbits[i & 0x0f] << 4) + swapbits[(i & 0xf0) >> 4];
+ sprintf (value, "%02x", i);
+ setenv (ENV_NAME_DIP, value);
+ return 0;
+}
+
+
+#if defined(CONFIG_SHA1_CHECK_UB_IMG)
+/*************************************************************************
+ * calculate a SHA1 sum for the U-Boot image in Flash.
+ *
+ ************************************************************************/
+static int pcs440ep_sha1 (int docheck)
+{
+ unsigned char *data;
+ unsigned char *ptroff;
+ unsigned char output[20];
+ unsigned char org[20];
+ int i, len = CONFIG_SHA1_LEN;
+
+ memcpy ((char *)CFG_LOAD_ADDR, (char *)CONFIG_SHA1_START, len);
+ data = (unsigned char *)CFG_LOAD_ADDR;
+ ptroff = &data[len + SHA1_SUM_POS];
+
+ for (i = 0; i < SHA1_SUM_LEN; i++) {
+ org[i] = ptroff[i];
+ ptroff[i] = 0;
+ }
+
+ sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
+
+ if (docheck == 2) {
+ for (i = 0; i < 20 ; i++) {
+ printf("%02X ", output[i]);
+ }
+ printf("\n");
+ }
+ if (docheck == 1) {
+ for (i = 0; i < 20 ; i++) {
+ if (org[i] != output[i]) return 1;
+ }
+ }
+ return 0;
+}
+
+/*************************************************************************
+ * do some checks after the SHA1 checksum from the U-Boot Image was
+ * calculated.
+ *
+ ************************************************************************/
+static void pcs440ep_checksha1 (void)
+{
+ int ret;
+ char *cs_test;
+
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_OFF);
+ status_led_set (2, STATUS_LED_ON);
+ ret = pcs440ep_sha1 (1);
+ if (ret == 0) return;
+
+ if ((cs_test = getenv ("cs_test")) == NULL) {
+ /* Env doesnt exist -> hang */
+ status_led_blink ();
+ /* here we do this "handy" because we have no interrupts
+ at this time */
+ puts ("### SHA1 ERROR ### Please RESET the board ###\n");
+ for (;;) {
+ __led_toggle (2);
+ udelay (100000);
+ }
+ }
+
+ if (strncmp (cs_test, "off", 3) == 0) {
+ printf ("SHA1 U-Boot sum NOT ok!\n");
+ setenv ("bootdelay", "-1");
+ }
+}
+#else
+static __inline__ void pcs440ep_checksha1 (void) { do {} while (0);}
+#endif
+
int misc_init_r (void)
{
uint pbcr;
@@ -139,6 +495,18 @@
CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
&flash_info[1]);
+ pcs440ep_readinputs ();
+ pcs440ep_checksha1 ();
+#ifdef CONFIG_PREBOOT
+ {
+ struct kbd_data_t kbd_data;
+ /* Decode keys */
+ char *str = strdup (key_match (get_keys (&kbd_data)));
+ /* Set or delete definition */
+ setenv ("preboot", str);
+ free (str);
+ }
+#endif /* CONFIG_PREBOOT */
return 0;
}
@@ -156,13 +524,31 @@
return (0);
}
+void spd_ddr_init_hang (void)
+{
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_ON);
+ /* we cannot use hang() because we are still running from
+ Flash, and so the status_led driver is not initialized */
+ puts ("### SDRAM ERROR ### Please RESET the board ###\n");
+ for (;;) {
+ __led_toggle (4);
+ udelay (100000);
+ }
+}
+
long int initdram (int board_type)
{
long dram_size = 0;
- set_leds(1); /* display boot info counter */
+ status_led_set (0, STATUS_LED_ON);
+ status_led_set (1, STATUS_LED_OFF);
dram_size = spd_sdram();
- set_leds(2); /* display boot info counter */
+ status_led_set (0, STATUS_LED_OFF);
+ status_led_set (1, STATUS_LED_ON);
+ if (dram_size == 0) {
+ hang();
+ }
return dram_size;
}
@@ -217,7 +603,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long addr;
@@ -258,7 +644,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
@@ -377,3 +763,155 @@
}
#endif
+
+/*************************************************************************
+ * "led" Commando for the U-Boot shell
+ *
+ ************************************************************************/
+int do_led (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int rcode = 0, i;
+ ulong pattern = 0;
+
+ pattern = simple_strtoul (argv[1], NULL, 16);
+ if (pattern > 0x400) {
+ int val = GET_LEDS;
+ printf ("led: %x\n", val);
+ return rcode;
+ }
+ if (pattern > 0x200) {
+ status_led_blink ();
+ hang ();
+ return rcode;
+ }
+ if (pattern > 0x100) {
+ status_led_blink ();
+ return rcode;
+ }
+ pattern &= 0x0f;
+ for (i = 0; i < 4; i++) {
+ if (pattern & 0x01) status_led_set (i, STATUS_LED_ON);
+ else status_led_set (i, STATUS_LED_OFF);
+ pattern = pattern >> 1;
+ }
+ return rcode;
+}
+
+U_BOOT_CMD(
+ led, 2, 1, do_led,
+ "led [bitmask] - set the DIAG-LED\n",
+ "[bitmask] 0x01 = DIAG 1 on\n"
+ " 0x02 = DIAG 2 on\n"
+ " 0x04 = DIAG 3 on\n"
+ " 0x08 = DIAG 4 on\n"
+ " > 0x100 set the LED, who are on, to state blinking\n"
+);
+
+#if defined(CONFIG_SHA1_CHECK_UB_IMG)
+/*************************************************************************
+ * "sha1" Commando for the U-Boot shell
+ *
+ ************************************************************************/
+int do_sha1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int rcode = -1;
+
+ if (argc < 2) {
+ usage:
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if (argc >= 3) {
+ unsigned char *data;
+ unsigned char output[20];
+ int len;
+ int i;
+
+ data = (unsigned char *)simple_strtoul (argv[1], NULL, 16);
+ len = simple_strtoul (argv[2], NULL, 16);
+ sha1_csum (data, len, (unsigned char *)output);
+ printf ("U-Boot sum:\n");
+ for (i = 0; i < 20 ; i++) {
+ printf ("%02X ", output[i]);
+ }
+ printf ("\n");
+ if (argc == 4) {
+ data = (unsigned char *)simple_strtoul (argv[3], NULL, 16);
+ memcpy (data, output, 20);
+ }
+ return 0;
+ }
+ if (argc == 2) {
+ char *ptr = argv[1];
+ if (*ptr != '-') goto usage;
+ ptr++;
+ if ((*ptr == 'c') || (*ptr == 'C')) {
+ rcode = pcs440ep_sha1 (1);
+ printf ("SHA1 U-Boot sum %sok!\n", (rcode != 0) ? "not " : "");
+ } else if ((*ptr == 'p') || (*ptr == 'P')) {
+ rcode = pcs440ep_sha1 (2);
+ } else {
+ rcode = pcs440ep_sha1 (0);
+ }
+ return rcode;
+ }
+ return rcode;
+}
+
+U_BOOT_CMD(
+ sha1, 4, 1, do_sha1,
+ "sha1 - calculate the SHA1 Sum\n",
+ "address len [addr] calculate the SHA1 sum [save at addr]\n"
+ " -p calculate the SHA1 sum from the U-Boot image in flash and print\n"
+ " -c check the U-Boot image in flash\n"
+);
+#endif
+
+#if defined (CONFIG_CMD_IDE)
+/* These addresses need to be shifted one place to the left
+ * ( bus per_addr 20 -30 is connectsd on CF bus A10-A0)
+ * These values are shifted
+ */
+extern ulong *ide_bus_offset;
+void inline ide_outb(int dev, int port, unsigned char val)
+{
+ debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
+ dev, port, val, (ATA_CURR_BASE(dev)+port));
+
+ out_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)), val);
+}
+unsigned char inline ide_inb(int dev, int port)
+{
+ uchar val;
+ val = in_be16((u16 *)(ATA_CURR_BASE(dev)+(port << 1)));
+ debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
+ dev, port, (ATA_CURR_BASE(dev)+port), val);
+ return (val);
+}
+#endif
+
+#ifdef CONFIG_IDE_PREINIT
+int ide_preinit (void)
+{
+ /* Set True IDE Mode */
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00100000));
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
+ out32 (GPIO1_OR, (in32 (GPIO1_OR) & ~0x00008040));
+ udelay (100000);
+ return 0;
+}
+#endif
+
+#if defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+void ide_set_reset (int idereset)
+{
+ debug ("ide_reset(%d)\n", idereset);
+ if (idereset == 0) {
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) | 0x00200000));
+ } else {
+ out32 (GPIO0_OR, (in32 (GPIO0_OR) & ~0x00200000));
+ }
+ udelay (10000);
+}
+#endif /* defined (CONFIG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
diff --git a/board/pcs440ep/u-boot.lds b/board/pcs440ep/u-boot.lds
index 6ab476a..6506ccd 100644
--- a/board/pcs440ep/u-boot.lds
+++ b/board/pcs440ep/u-boot.lds
@@ -65,6 +65,7 @@
{
cpu/ppc4xx/start.o (.text)
board/pcs440ep/init.o (.text)
+ lib_generic/sha1.o (.text)
*(.text)
*(.fixup)
diff --git a/board/pm520/pm520.c b/board/pm520/pm520.c
index 65c5291..14c3f1d 100644
--- a/board/pm520/pm520.c
+++ b/board/pm520/pm520.c
@@ -299,7 +299,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset (void)
{
@@ -312,9 +312,9 @@
debug ("ide_reset(%d)\n", idereset);
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/pm520/u-boot.lds b/board/pm520/u-boot.lds
deleted file mode 100644
index 3cc2968..0000000
--- a/board/pm520/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pm826/pm826.c b/board/pm826/pm826.c
index 7514cd7..1420e64 100644
--- a/board/pm826/pm826.c
+++ b/board/pm826/pm826.c
@@ -310,7 +310,7 @@
return (psize);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/pm826/u-boot.lds b/board/pm826/u-boot.lds
deleted file mode 100644
index 05f29c6..0000000
--- a/board/pm826/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pm828/pm828.c b/board/pm828/pm828.c
index 3193274..98cd80b 100644
--- a/board/pm828/pm828.c
+++ b/board/pm828/pm828.c
@@ -343,7 +343,7 @@
return (psize);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/pm828/u-boot.lds b/board/pm828/u-boot.lds
deleted file mode 100644
index 928c1cf..0000000
--- a/board/pm828/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/pn62/cmd_pn62.c b/board/pn62/cmd_pn62.c
index 3ea068d..ffa20cd 100644
--- a/board/pn62/cmd_pn62.c
+++ b/board/pn62/cmd_pn62.c
@@ -29,7 +29,7 @@
#include <command.h>
#include "pn62.h"
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
diff --git a/board/pn62/u-boot.lds b/board/pn62/u-boot.lds
deleted file mode 100644
index eaee3fd..0000000
--- a/board/pn62/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/ppmc8260/u-boot.lds b/board/ppmc8260/u-boot.lds
deleted file mode 100644
index 84d4b78..0000000
--- a/board/ppmc8260/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/prodrive/alpr/alpr.c b/board/prodrive/alpr/alpr.c
index 5abc87d..b764499 100644
--- a/board/prodrive/alpr/alpr.c
+++ b/board/prodrive/alpr/alpr.c
@@ -172,7 +172,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -192,7 +192,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/prodrive/alpr/nand.c b/board/prodrive/alpr/nand.c
index d66b088..097e183 100644
--- a/board/prodrive/alpr/nand.c
+++ b/board/prodrive/alpr/nand.c
@@ -26,7 +26,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <asm/processor.h>
#include <nand.h>
diff --git a/board/prodrive/p3mx/serial.c b/board/prodrive/p3mx/serial.c
index ba32ac1..e1af37e 100644
--- a/board/prodrive/p3mx/serial.c
+++ b/board/prodrive/p3mx/serial.c
@@ -80,7 +80,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void kgdb_serial_init (void)
{
}
@@ -104,4 +104,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/prodrive/p3p440/p3p440.c b/board/prodrive/p3p440/p3p440.c
index 2f28e9d..1a8aacb 100644
--- a/board/prodrive/p3p440/p3p440.c
+++ b/board/prodrive/p3p440/p3p440.c
@@ -176,7 +176,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller *hose)
{
unsigned long strap;
@@ -193,7 +193,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/prodrive/pdnb3/nand.c b/board/prodrive/pdnb3/nand.c
index 92f9c01..b1e7041 100644
--- a/board/prodrive/pdnb3/nand.c
+++ b/board/prodrive/pdnb3/nand.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
diff --git a/board/prodrive/pdnb3/pdnb3.c b/board/prodrive/pdnb3/pdnb3.c
index e2fed5d..a1a310a 100644
--- a/board/prodrive/pdnb3/pdnb3.c
+++ b/board/prodrive/pdnb3/pdnb3.c
@@ -236,7 +236,7 @@
"address size\n - boot FPGA with gzipped image at <address>\n"
);
-#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined(CONFIG_PCI)
+#if defined(CONFIG_CMD_PCI) || defined(CONFIG_PCI)
extern struct pci_controller hose;
extern void pci_ixp_init(struct pci_controller * hose);
diff --git a/board/r360mpi/pcmcia.c b/board/r360mpi/pcmcia.c
index 7d34ac8..a83ca8d 100644
--- a/board/r360mpi/pcmcia.c
+++ b/board/r360mpi/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -123,7 +123,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -150,7 +150,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/r5200/Makefile b/board/r5200/Makefile
index 424ab1c..2ec71ee 100644
--- a/board/r5200/Makefile
+++ b/board/r5200/Makefile
@@ -25,7 +25,7 @@
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o
+COBJS = $(BOARD).o mii.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/board/r5200/mii.c b/board/r5200/mii.c
new file mode 100644
index 0000000..706c90f
--- /dev/null
+++ b/board/r5200/mii.c
@@ -0,0 +1,303 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <config.h>
+#include <net.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#undef MII_DEBUG
+#undef ET_DEBUG
+
+int fecpin_setclear(struct eth_device *dev, int setclear)
+{
+ if (setclear) {
+ /* Enable Ethernet pins */
+ mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
+ } else {
+ }
+
+ return 0;
+}
+
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_CMD_MII)
+#include <miiphy.h>
+
+/* Make MII read/write commands for the FEC. */
+#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | (REG & 0x1f) << 18))
+
+#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | (REG & 0x1f) << 18) | (VAL & 0xffff))
+
+/* PHY identification */
+#define PHY_ID_LXT970 0x78100000 /* LXT970 */
+#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
+#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
+#define PHY_ID_QS6612 0x01814400 /* QS6612 */
+#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
+#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
+#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
+#define PHY_ID_DP83848VV 0x20005C90 /* National 83848 */
+#define PHY_ID_DP83849 0x20005CA2 /* National 82849 */
+#define PHY_ID_KS8721BL 0x00221619 /* Micrel KS8721BL/SL */
+
+#define STR_ID_LXT970 "LXT970"
+#define STR_ID_LXT971 "LXT971"
+#define STR_ID_82555 "Intel82555"
+#define STR_ID_QS6612 "QS6612"
+#define STR_ID_AMD79C784 "AMD79C784"
+#define STR_ID_LSI80225 "LSI80225"
+#define STR_ID_LSI80225B "LSI80225/B"
+#define STR_ID_DP83848VV "N83848"
+#define STR_ID_DP83849 "N83849"
+#define STR_ID_KS8721BL "KS8721BL"
+
+/****************************************************************************
+ * mii_init -- Initialize the MII for MII command without ethernet
+ * This function is a subset of eth_init
+ ****************************************************************************
+ */
+void mii_reset(struct fec_info_s *info)
+{
+ volatile fec_t *fecp = (fec_t *) (info->miibase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+/* send command to phy using mii, wait for result */
+uint mii_send(uint mii_cmd)
+{
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ volatile fec_t *ep;
+ uint mii_reply;
+ int j = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ ep = (fec_t *) info->miibase;
+
+ ep->mmfr = mii_cmd; /* command to phy */
+
+ /* wait for mii complete */
+ while (!(ep->eir & FEC_EIR_MII) && (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("MII not complete\n");
+ return -1;
+ }
+
+ mii_reply = ep->mmfr; /* result from phy */
+ ep->eir = FEC_EIR_MII; /* clear MII complete */
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
+ __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
+#endif
+
+ return (mii_reply & 0xffff); /* data read from phy */
+}
+#endif /* CFG_DISCOVER_PHY || (CONFIG_CMD_MII) */
+
+#if defined(CFG_DISCOVER_PHY)
+int mii_discover_phy(struct eth_device *dev)
+{
+#define MAX_PHY_PASSES 11
+ struct fec_info_s *info = dev->priv;
+ int phyaddr, pass;
+ uint phyno, phytype;
+
+ if (info->phyname_init)
+ return info->phy_addr;
+
+ phyaddr = -1; /* didn't find a PHY yet */
+ for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
+ if (pass > 1) {
+ /* PHY may need more time to recover from reset.
+ * The LXT970 needs 50ms typical, no maximum is
+ * specified, so wait 10ms before try again.
+ * With 11 passes this gives it 100ms to wake up.
+ */
+ udelay(10000); /* wait 10ms */
+ }
+
+ for (phyno = 0; phyno < 32 && phyaddr < 0; ++phyno) {
+
+ phytype = mii_send(mk_mii_read(phyno, PHY_PHYIDR1));
+#ifdef ET_DEBUG
+ printf("PHY type 0x%x pass %d type\n", phytype, pass);
+#endif
+ if (phytype != 0xffff) {
+ phyaddr = phyno;
+ phytype <<= 16;
+ phytype |=
+ mii_send(mk_mii_read(phyno, PHY_PHYIDR2));
+
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ strcpy(info->phy_name,
+ STR_ID_KS8721BL);
+ info->phyname_init = 1;
+ break;
+ default:
+ strcpy(info->phy_name, "unknown");
+ info->phyname_init = 1;
+ break;
+ }
+
+#ifdef ET_DEBUG
+ printf("PHY @ 0x%x pass %d type ", phyno, pass);
+ switch (phytype & 0xffffffff) {
+ case PHY_ID_KS8721BL:
+ printf(STR_ID_KS8721BL);
+ break;
+ default:
+ printf("0x%08x\n", phytype);
+ break;
+ }
+#endif
+ }
+ }
+ }
+ if (phyaddr < 0)
+ printf("No PHY device found.\n");
+
+ return phyaddr;
+}
+#endif /* CFG_DISCOVER_PHY */
+
+int mii_init(void) __attribute__((weak,alias("__mii_init")));
+
+void __mii_init(void)
+{
+ volatile fec_t *fecp;
+ struct fec_info_s *info;
+ struct eth_device *dev;
+ int miispd = 0, i = 0;
+ u16 autoneg = 0;
+
+ /* retrieve from register structure */
+ dev = eth_get_dev();
+ info = dev->priv;
+
+ fecp = (fec_t *) info->miibase;
+
+ fecpin_setclear(dev, 1);
+
+ mii_reset(info);
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set MII speed */
+ miispd = (gd->bus_clk / 1000000) / 5;
+ fecp->mscr = miispd << 1;
+
+ info->phy_addr = mii_discover_phy(dev);
+
+#define AUTONEGLINK (PHY_BMSR_AUTN_COMP | PHY_BMSR_LS)
+ while (i < MCFFEC_TOUT_LOOP) {
+ autoneg = 0;
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &autoneg);
+ i++;
+
+ if ((autoneg & AUTONEGLINK) == AUTONEGLINK)
+ break;
+
+ udelay(500);
+ }
+ if (i >= MCFFEC_TOUT_LOOP) {
+ printf("Auto Negotiation not complete\n");
+ }
+
+ /* adapt to the half/full speed settings */
+ info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16;
+ info->dup_spd |= miiphy_speed(dev->name, info->phy_addr);
+}
+
+/*****************************************************************************
+ * Read and write a MII PHY register, routines used by MII Utilities
+ *
+ * FIXME: These routines are expected to return 0 on success, but mii_send
+ * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
+ * no PHY connected...
+ * For now always return 0.
+ * FIXME: These routines only work after calling eth_init() at least once!
+ * Otherwise they hang in mii_send() !!! Sorry!
+ *****************************************************************************/
+
+int mcffec_miiphy_read(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short *value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
+#endif
+ rdreg = mii_send(mk_mii_read(addr, reg));
+
+ *value = rdreg;
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", *value);
+#endif
+
+ return 0;
+}
+
+int mcffec_miiphy_write(char *devname, unsigned char addr, unsigned char reg,
+ unsigned short value)
+{
+ short rdreg; /* register working value */
+
+#ifdef MII_DEBUG
+ printf("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
+#endif
+
+ rdreg = mii_send(mk_mii_write(addr, reg, value));
+
+#ifdef MII_DEBUG
+ printf("0x%04x\n", value);
+#endif
+
+ return 0;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
diff --git a/board/rattler/u-boot.lds b/board/rattler/u-boot.lds
deleted file mode 100644
index 522e6da..0000000
--- a/board/rattler/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/rpxsuper/u-boot.lds b/board/rpxsuper/u-boot.lds
deleted file mode 100644
index 9e623d0..0000000
--- a/board/rpxsuper/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
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- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/rsdproto/config.mk b/board/rsdproto/config.mk
index 5844ec1..35c3d8c 100644
--- a/board/rsdproto/config.mk
+++ b/board/rsdproto/config.mk
@@ -31,3 +31,5 @@
TEXT_BASE = 0xff000000
/*TEXT_BASE = 0x00200000 */
+
+LDSCRIPT := $(SRCTREE)/board/rsdproto/u-boot.lds
diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds
index 70fc3a5..9bd6248 100644
--- a/board/rsdproto/u-boot.lds
+++ b/board/rsdproto/u-boot.lds
@@ -55,7 +55,6 @@
{
cpu/mpc8260/start.o (.text)
*(.text)
- *(.fixup)
*(.got1)
/*. = env_offset; */
}
diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c
index e50b747..25209e0 100644
--- a/board/sacsng/sacsng.c
+++ b/board/sacsng/sacsng.c
@@ -837,7 +837,7 @@
/*
* The following are used to control the SPI chip selects for the SPI command.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_SPI)
+#if defined(CONFIG_CMD_SPI)
#define SPI_ADC_CS_MASK 0x00000800
#define SPI_DAC_CS_MASK 0x00001000
@@ -873,7 +873,7 @@
};
int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-#endif /* CFG_CMD_SPI */
+#endif
#endif /* CONFIG_MISC_INIT_R */
diff --git a/board/sacsng/u-boot.lds b/board/sacsng/u-boot.lds
deleted file mode 100644
index 9e623d0..0000000
--- a/board/sacsng/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
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- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
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- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sandburst/common/sb_common.c b/board/sandburst/common/sb_common.c
index 7816472..8a831fa 100644
--- a/board/sandburst/common/sb_common.c
+++ b/board/sandburst/common/sb_common.c
@@ -313,7 +313,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -330,7 +330,7 @@
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/sandpoint/u-boot.lds b/board/sandpoint/u-boot.lds
deleted file mode 100644
index 2a5cd2e..0000000
--- a/board/sandpoint/u-boot.lds
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc2410x/sbc2410x.c b/board/sbc2410x/sbc2410x.c
index 7030985..6c894a3 100644
--- a/board/sbc2410x/sbc2410x.c
+++ b/board/sbc2410x/sbc2410x.c
@@ -31,11 +31,11 @@
#include <common.h>
#include <s3c2410.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand.h>
#endif
-/* ------------------------------------------------------------------------- */
+DECLARE_GLOBAL_DATA_PTR;
#define FCLK_SPEED 1
@@ -74,7 +74,6 @@
int board_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
@@ -128,15 +127,13 @@
int dram_init (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
extern ulong nand_probe(ulong physadr);
static inline void NF_Reset(void)
@@ -180,4 +177,4 @@
#endif
printf ("%4lu MB\n", nand_probe((ulong)nand) >> 20);
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
+#endif
diff --git a/board/sbc8240/u-boot.lds b/board/sbc8240/u-boot.lds
deleted file mode 100644
index 7be85e4..0000000
--- a/board/sbc8240/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc8260/u-boot.lds b/board/sbc8260/u-boot.lds
deleted file mode 100644
index 9e623d0..0000000
--- a/board/sbc8260/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2000
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/sbc8349/sbc8349.c b/board/sbc8349/sbc8349.c
index 4cd447e..86166ea 100644
--- a/board/sbc8349/sbc8349.c
+++ b/board/sbc8349/sbc8349.c
@@ -64,8 +64,6 @@
if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32)im)
return -1;
- puts("Initializing\n");
-
/* DDR SDRAM - Main SODIMM */
im->sysconf.ddrlaw[0].bar = CFG_DDR_BASE & LAWBAR_BAR;
#if defined(CONFIG_SPD_EEPROM)
@@ -84,7 +82,6 @@
*/
ddr_enable_ecc(msize * 1024 * 1024);
#endif
- puts(" DDR RAM: ");
/* return total bus SDRAM size(bytes) -- DDR */
return (msize * 1024 * 1024);
}
@@ -130,7 +127,7 @@
#if defined(CONFIG_DDR_2T_TIMING)
| SDRAM_CFG_2T_EN
#endif
- | 2 << SDRAM_CFG_SDRAM_TYPE_SHIFT;
+ | SDRAM_CFG_SDRAM_TYPE_DDR1;
#if defined (CONFIG_DDR_32BIT)
/* for 32-bit mode burst length is 8 */
im->ddr.sdram_cfg |= (SDRAM_CFG_32_BE | SDRAM_CFG_8_BE);
diff --git a/board/sbc8349/u-boot.lds b/board/sbc8349/u-boot.lds
deleted file mode 100644
index e32c075..0000000
--- a/board/sbc8349/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * Copyright (c) 2006 Wind River Systems, Inc.
- * u-boot.lds for WindRiver SBC8349.
- *
- * Based on the MPC8349 u-boot.lds
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
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- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/sbc8641d/Makefile b/board/sbc8641d/Makefile
new file mode 100644
index 0000000..a90b725
--- /dev/null
+++ b/board/sbc8641d/Makefile
@@ -0,0 +1,52 @@
+#
+# (C) Copyright 2001
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := $(BOARD).o
+SOBJS := init.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+clean:
+ rm -f $(OBJS) $(SOBJS)
+
+.PHONY: distclean
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude ($obj).depend
+
+#########################################################################
diff --git a/board/sbc8641d/config.mk b/board/sbc8641d/config.mk
new file mode 100644
index 0000000..dd1754d
--- /dev/null
+++ b/board/sbc8641d/config.mk
@@ -0,0 +1,30 @@
+# Copyright 2004 Freescale Semiconductor.
+# Modified by Jeff Brown
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# sbc8641 board
+# default CCSRBAR is at 0xff700000
+#
+TEXT_BASE = 0xfff00000
+
+PLATFORM_CPPFLAGS += -DCONFIG_MPC86xx=1
+PLATFORM_CPPFLAGS += -DCONFIG_MPC8641=1 -maltivec -mabi=altivec -msoft-float
diff --git a/board/sbc8641d/init.S b/board/sbc8641d/init.S
new file mode 100644
index 0000000..c151d7e
--- /dev/null
+++ b/board/sbc8641d/init.S
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2007 Wind River Systemes, Inc. <www.windriver.com>
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman joe.hamman@embeddedspecialties.com
+ *
+ * Copyright 2004 Freescale Semiconductor.
+ * Jeff Brown
+ * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <asm/cache.h>
+#include <asm/mmu.h>
+#include <config.h>
+#include <mpc86xx.h>
+
+/*
+ * LAW(Local Access Window) configuration:
+ *
+ * 0x0000_0000 0x0fff_ffff DDR1 256M
+ * 0x1000_0000 0x1fff_ffff DDR2 256M
+ * 0xe000_0000 0xffff_ffff LBC 512M
+ *
+ * Notes:
+ * CCSRBAR doesn't need a configured Local Access Window.
+ * If flash is 8M at default position (last 8M), no LAW needed.
+ */
+
+# DDR Bank 1
+# #define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
+# #define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
+
+# DDR Bank 2
+# #define LAWBAR2 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff)
+# #define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
+
+# LBC
+# #define LAWBAR3 ((0xe0000000>>12) & 0xffffff)
+# #define LAWAR3 (LAWAR_EN & (LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_512M)))
+
+/*
+ * LAW (Local Access Window) configuration:
+ *
+ * 0x0000_0000 DDR 256M
+ * 0x1000_0000 DDR2 256M
+ * 0x8000_0000 PCI1 MEM 512M
+ * 0xa000_0000 PCI2 MEM 512M
+ * 0xc000_0000 RapidIO 512M
+ * 0xe200_0000 PCI1 IO 16M
+ * 0xe300_0000 PCI2 IO 16M
+ * 0xf800_0000 CCSRBAR 2M
+ * 0xfe00_0000 FLASH (boot bank) 32M
+ *
+ */
+
+#define LAWBAR1 ((CFG_DDR_SDRAM_BASE>>12) & 0xffffff)
+#define LAWAR1 (LAWAR_EN | LAWAR_TRGT_IF_DDR1 | (LAWAR_SIZE & LAWAR_SIZE_256M))
+
+#define LAWBAR2 ((CFG_PCI1_MEM_BASE>>12) & 0xffffff)
+#define LAWAR2 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_512M))
+
+#define LAWBAR3 ((CFG_PCI2_MEM_BASE>>12) & 0xffffff)
+#define LAWAR3 (~LAWAR_EN & (LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_512M)))
+
+#define LAWBAR4 ((0xf8000000>>12) & 0xffffff)
+#define LAWAR4 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_2M))
+
+#define LAWBAR5 ((CFG_PCI1_IO_BASE>>12) & 0xffffff)
+#define LAWAR5 (LAWAR_EN | LAWAR_TRGT_IF_PCI1 | (LAWAR_SIZE & LAWAR_SIZE_16M))
+
+#define LAWBAR6 ((CFG_PCI2_IO_BASE>>12) & 0xffffff)
+#define LAWAR6 (~LAWAR_EN &( LAWAR_TRGT_IF_PCI2 | (LAWAR_SIZE & LAWAR_SIZE_16M)))
+
+#define LAWBAR7 ((0xfe000000 >>12) & 0xffffff)
+#define LAWAR7 (LAWAR_EN | LAWAR_TRGT_IF_LBC | (LAWAR_SIZE & LAWAR_SIZE_32M))
+
+#define LAWBAR8 ((CFG_DDR_SDRAM_BASE2>>12) & 0xffffff)
+#define LAWAR8 (LAWAR_EN | LAWAR_TRGT_IF_DDR2 | (LAWAR_SIZE & LAWAR_SIZE_256M))
+
+#define LAWBAR9 ((CFG_RIO_MEM_BASE>>12) & 0xfffff)
+#define LAWAR9 (LAWAR_EN | LAWAR_TRGT_IF_RIO | (LAWAR_SIZE & LAWAR_SIZE_512M))
+
+ .section .bootpg, "ax"
+ .globl law_entry
+law_entry:
+ lis r7,CFG_CCSRBAR@h
+ ori r7,r7,CFG_CCSRBAR@l
+
+ addi r4,r7,0
+ addi r5,r7,0
+
+ /* Skip LAWAR0, start at LAWAR1 */
+ lis r6,LAWBAR1@h
+ ori r6,r6,LAWBAR1@l
+ stwu r6, 0xc28(r4)
+
+ lis r6,LAWAR1@h
+ ori r6,r6,LAWAR1@l
+ stwu r6, 0xc30(r5)
+
+ /* LAWBAR2, LAWAR2 */
+ lis r6,LAWBAR2@h
+ ori r6,r6,LAWBAR2@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR2@h
+ ori r6,r6,LAWAR2@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR3, LAWAR3 */
+ lis r6,LAWBAR3@h
+ ori r6,r6,LAWBAR3@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR3@h
+ ori r6,r6,LAWAR3@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR4, LAWAR4 */
+ lis r6,LAWBAR4@h
+ ori r6,r6,LAWBAR4@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR4@h
+ ori r6,r6,LAWAR4@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR5, LAWAR5 */
+ lis r6,LAWBAR5@h
+ ori r6,r6,LAWBAR5@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR5@h
+ ori r6,r6,LAWAR5@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR6, LAWAR6 */
+ lis r6,LAWBAR6@h
+ ori r6,r6,LAWBAR6@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR6@h
+ ori r6,r6,LAWAR6@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR7, LAWAR7 */
+ lis r6,LAWBAR7@h
+ ori r6,r6,LAWBAR7@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR7@h
+ ori r6,r6,LAWAR7@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR8, LAWAR8 */
+ lis r6,LAWBAR8@h
+ ori r6,r6,LAWBAR8@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR8@h
+ ori r6,r6,LAWAR8@l
+ stwu r6, 0x20(r5)
+
+ /* LAWBAR9, LAWAR9 */
+ lis r6,LAWBAR9@h
+ ori r6,r6,LAWBAR9@l
+ stwu r6, 0x20(r4)
+
+ lis r6,LAWAR9@h
+ ori r6,r6,LAWAR9@l
+ stwu r6, 0x20(r5)
+
+ blr
diff --git a/board/sbc8641d/sbc8641d.c b/board/sbc8641d/sbc8641d.c
new file mode 100644
index 0000000..7adc42f
--- /dev/null
+++ b/board/sbc8641d/sbc8641d.c
@@ -0,0 +1,406 @@
+/*
+ * Copyright 2007 Wind River Systemes, Inc. <www.windriver.com>
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman joe.hamman@embeddedspecialties.com
+ *
+ * Copyright 2004 Freescale Semiconductor.
+ * Jeff Brown
+ * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
+ *
+ * (C) Copyright 2002 Scott McNutt <smcnutt@artesyncp.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <pci.h>
+#include <asm/processor.h>
+#include <asm/immap_86xx.h>
+#include <asm/immap_fsl_pci.h>
+#include <spd.h>
+
+#if defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+extern void ft_cpu_setup (void *blob, bd_t * bd);
+#endif
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
+extern void ddr_enable_ecc (unsigned int dram_size);
+#endif
+
+#if defined(CONFIG_SPD_EEPROM)
+#include "spd_sdram.h"
+#endif
+
+void sdram_init (void);
+long int fixed_sdram (void);
+
+int board_early_init_f (void)
+{
+ return 0;
+}
+
+int checkboard (void)
+{
+ puts ("Board: Wind River SBC8641D\n");
+
+ return 0;
+}
+
+long int initdram (int board_type)
+{
+ long dram_size = 0;
+
+#if defined(CONFIG_SPD_EEPROM)
+ dram_size = spd_sdram ();
+#else
+ dram_size = fixed_sdram ();
+#endif
+
+#if defined(CFG_RAMBOOT)
+ puts (" DDR: ");
+ return dram_size;
+#endif
+
+#if defined(CONFIG_DDR_ECC) && !defined(CONFIG_ECC_INIT_VIA_DDRCONTROLLER)
+ /*
+ * Initialize and enable DDR ECC.
+ */
+ ddr_enable_ecc (dram_size);
+#endif
+
+ puts (" DDR: ");
+ return dram_size;
+}
+
+#if defined(CFG_DRAM_TEST)
+int testdram (void)
+{
+ uint *pstart = (uint *) CFG_MEMTEST_START;
+ uint *pend = (uint *) CFG_MEMTEST_END;
+ uint *p;
+
+ puts ("SDRAM test phase 1:\n");
+ for (p = pstart; p < pend; p++)
+ *p = 0xaaaaaaaa;
+
+ for (p = pstart; p < pend; p++) {
+ if (*p != 0xaaaaaaaa) {
+ printf ("SDRAM test fails at: %08x\n", (uint) p);
+ return 1;
+ }
+ }
+
+ puts ("SDRAM test phase 2:\n");
+ for (p = pstart; p < pend; p++)
+ *p = 0x55555555;
+
+ for (p = pstart; p < pend; p++) {
+ if (*p != 0x55555555) {
+ printf ("SDRAM test fails at: %08x\n", (uint) p);
+ return 1;
+ }
+ }
+
+ puts ("SDRAM test passed.\n");
+ return 0;
+}
+#endif
+
+#if !defined(CONFIG_SPD_EEPROM)
+/*
+ * Fixed sdram init -- doesn't use serial presence detect.
+ */
+long int fixed_sdram (void)
+{
+#if !defined(CFG_RAMBOOT)
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ccsr_ddr_t *ddr = &immap->im_ddr1;
+
+ ddr->cs0_bnds = CFG_DDR_CS0_BNDS;
+ ddr->cs1_bnds = CFG_DDR_CS1_BNDS;
+ ddr->cs2_bnds = CFG_DDR_CS2_BNDS;
+ ddr->cs3_bnds = CFG_DDR_CS3_BNDS;
+ ddr->cs0_config = CFG_DDR_CS0_CONFIG;
+ ddr->cs1_config = CFG_DDR_CS1_CONFIG;
+ ddr->cs2_config = CFG_DDR_CS2_CONFIG;
+ ddr->cs3_config = CFG_DDR_CS3_CONFIG;
+ ddr->ext_refrec = CFG_DDR_EXT_REFRESH;
+ ddr->timing_cfg_0 = CFG_DDR_TIMING_0;
+ ddr->timing_cfg_1 = CFG_DDR_TIMING_1;
+ ddr->timing_cfg_2 = CFG_DDR_TIMING_2;
+ ddr->sdram_cfg_1 = CFG_DDR_CFG_1A;
+ ddr->sdram_cfg_2 = CFG_DDR_CFG_2;
+ ddr->sdram_mode_1 = CFG_DDR_MODE_1;
+ ddr->sdram_mode_2 = CFG_DDR_MODE_2;
+ ddr->sdram_mode_cntl = CFG_DDR_MODE_CTL;
+ ddr->sdram_interval = CFG_DDR_INTERVAL;
+ ddr->sdram_data_init = CFG_DDR_DATA_INIT;
+ ddr->sdram_clk_cntl = CFG_DDR_CLK_CTRL;
+
+ asm ("sync;isync");
+
+ udelay (500);
+
+ ddr->sdram_cfg_1 = CFG_DDR_CFG_1B;
+ asm ("sync; isync");
+
+ udelay (500);
+ ddr = &immap->im_ddr2;
+
+ ddr->cs0_bnds = CFG_DDR2_CS0_BNDS;
+ ddr->cs1_bnds = CFG_DDR2_CS1_BNDS;
+ ddr->cs2_bnds = CFG_DDR2_CS2_BNDS;
+ ddr->cs3_bnds = CFG_DDR2_CS3_BNDS;
+ ddr->cs0_config = CFG_DDR2_CS0_CONFIG;
+ ddr->cs1_config = CFG_DDR2_CS1_CONFIG;
+ ddr->cs2_config = CFG_DDR2_CS2_CONFIG;
+ ddr->cs3_config = CFG_DDR2_CS3_CONFIG;
+ ddr->ext_refrec = CFG_DDR2_EXT_REFRESH;
+ ddr->timing_cfg_0 = CFG_DDR2_TIMING_0;
+ ddr->timing_cfg_1 = CFG_DDR2_TIMING_1;
+ ddr->timing_cfg_2 = CFG_DDR2_TIMING_2;
+ ddr->sdram_cfg_1 = CFG_DDR2_CFG_1A;
+ ddr->sdram_cfg_2 = CFG_DDR2_CFG_2;
+ ddr->sdram_mode_1 = CFG_DDR2_MODE_1;
+ ddr->sdram_mode_2 = CFG_DDR2_MODE_2;
+ ddr->sdram_mode_cntl = CFG_DDR2_MODE_CTL;
+ ddr->sdram_interval = CFG_DDR2_INTERVAL;
+ ddr->sdram_data_init = CFG_DDR2_DATA_INIT;
+ ddr->sdram_clk_cntl = CFG_DDR2_CLK_CTRL;
+
+ asm ("sync;isync");
+
+ udelay (500);
+
+ ddr->sdram_cfg_1 = CFG_DDR2_CFG_1B;
+ asm ("sync; isync");
+
+ udelay (500);
+#endif
+ return CFG_SDRAM_SIZE * 1024 * 1024;
+}
+#endif /* !defined(CONFIG_SPD_EEPROM) */
+
+#if defined(CONFIG_PCI)
+/*
+ * Initialize PCI Devices, report devices found.
+ */
+
+#ifndef CONFIG_PCI_PNP
+static struct pci_config_table pci_fsl86xxads_config_table[] = {
+ {PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
+ PCI_IDSEL_NUMBER, PCI_ANY_ID,
+ pci_cfgfunc_config_device, {PCI_ENET0_IOADDR,
+ PCI_ENET0_MEMADDR,
+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER}},
+ {}
+};
+#endif
+
+static struct pci_controller pci1_hose = {
+#ifndef CONFIG_PCI_PNP
+ config_table:pci_mpc86xxcts_config_table
+#endif
+};
+#endif /* CONFIG_PCI */
+
+#ifdef CONFIG_PCI2
+static struct pci_controller pci2_hose;
+#endif /* CONFIG_PCI2 */
+
+int first_free_busno = 0;
+
+void pci_init_board(void)
+{
+ volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
+ volatile ccsr_gur_t *gur = &immap->im_gur;
+ uint devdisr = gur->devdisr;
+ uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
+
+#ifdef CONFIG_PCI1
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI1_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pci1_hose;
+#ifdef DEBUG
+ uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17;
+ uint pex1_agent = (host1_agent == 0) || (host1_agent == 1);
+#endif
+ if ((io_sel == 2 || io_sel == 3 || io_sel == 5
+ || io_sel == 6 || io_sel == 7 || io_sel == 0xF)
+ && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
+ debug("PCI-EXPRESS 1: %s \n", pex1_agent ? "Agent" : "Host");
+ debug("0x%08x=0x%08x ", &pci->pme_msg_det, pci->pme_msg_det);
+ if (pci->pme_msg_det) {
+ pci->pme_msg_det = 0xffffffff;
+ debug(" with errors. Clearing. Now 0x%08x",
+ pci->pme_msg_det);
+ }
+ debug("\n");
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI1_MEM_BASE,
+ CFG_PCI1_MEM_PHYS,
+ CFG_PCI1_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI1_IO_BASE,
+ CFG_PCI1_IO_PHYS,
+ CFG_PCI1_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+
+ first_free_busno=hose->last_busno+1;
+ printf (" PCI-EXPRESS 1 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+
+ } else {
+ puts("PCI-EXPRESS 1: Disabled\n");
+ }
+}
+#else
+ puts("PCI-EXPRESS1: Disabled\n");
+#endif /* CONFIG_PCI1 */
+
+#ifdef CONFIG_PCI2
+{
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) CFG_PCI2_ADDR;
+ extern void fsl_pci_init(struct pci_controller *hose);
+ struct pci_controller *hose = &pci2_hose;
+
+
+ /* inbound */
+ pci_set_region(hose->regions + 0,
+ CFG_PCI_MEMORY_BUS,
+ CFG_PCI_MEMORY_PHYS,
+ CFG_PCI_MEMORY_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ /* outbound memory */
+ pci_set_region(hose->regions + 1,
+ CFG_PCI2_MEM_BASE,
+ CFG_PCI2_MEM_PHYS,
+ CFG_PCI2_MEM_SIZE,
+ PCI_REGION_MEM);
+
+ /* outbound io */
+ pci_set_region(hose->regions + 2,
+ CFG_PCI2_IO_BASE,
+ CFG_PCI2_IO_PHYS,
+ CFG_PCI2_IO_SIZE,
+ PCI_REGION_IO);
+
+ hose->region_count = 3;
+
+ hose->first_busno=first_free_busno;
+ pci_setup_indirect(hose, (int) &pci->cfg_addr, (int) &pci->cfg_data);
+
+ fsl_pci_init(hose);
+
+ first_free_busno=hose->last_busno+1;
+ printf (" PCI-EXPRESS 2 on bus %02x - %02x\n",
+ hose->first_busno,hose->last_busno);
+}
+#else
+ puts("PCI-EXPRESS 2: Disabled\n");
+#endif /* CONFIG_PCI2 */
+
+}
+
+#if defined(CONFIG_OF_FLAT_TREE) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup (void *blob, bd_t * bd)
+{
+ u32 *p;
+ int len;
+
+ ft_cpu_setup (blob, bd);
+
+ p = ft_get_prop (blob, "/memory/reg", &len);
+ if (p != NULL) {
+ *p++ = cpu_to_be32 (bd->bi_memstart);
+ *p = cpu_to_be32 (bd->bi_memsize);
+ }
+}
+#endif
+
+void sbc8641d_reset_board (void)
+{
+ puts ("Resetting board....\n");
+}
+
+/*
+ * get_board_sys_clk
+ * Clock is fixed at 1GHz on this board. Used for CONFIG_SYS_CLK_FREQ
+ */
+
+unsigned long get_board_sys_clk (ulong dummy)
+{
+ int i;
+ ulong val = 0;
+
+ i = 5;
+ i &= 0x07;
+
+ switch (i) {
+ case 0:
+ val = 33000000;
+ break;
+ case 1:
+ val = 40000000;
+ break;
+ case 2:
+ val = 50000000;
+ break;
+ case 3:
+ val = 66000000;
+ break;
+ case 4:
+ val = 83000000;
+ break;
+ case 5:
+ val = 100000000;
+ break;
+ case 6:
+ val = 134000000;
+ break;
+ case 7:
+ val = 166000000;
+ break;
+ }
+
+ return val;
+}
diff --git a/board/sbc8641d/u-boot.lds b/board/sbc8641d/u-boot.lds
new file mode 100644
index 0000000..fd0f350
--- /dev/null
+++ b/board/sbc8641d/u-boot.lds
@@ -0,0 +1,135 @@
+/*
+ * Copyright 2006, 2007 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+
+SECTIONS
+{
+
+ /* Read-only sections, merged into text segment: */
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc86xx/start.o (.text)
+ board/sbc8641d/init.o (.bootpg)
+ cpu/mpc86xx/traps.o (.text)
+ cpu/mpc86xx/interrupts.o (.text)
+ cpu/mpc86xx/cpu_init.o (.text)
+ cpu/mpc86xx/cpu.o (.text)
+ cpu/mpc86xx/speed.o (.text)
+ common/dlmalloc.o (.text)
+ lib_generic/crc32.o (.text)
+ lib_ppc/extable.o (.text)
+ lib_generic/zlib.o (.text)
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/sc3/sc3nand.c b/board/sc3/sc3nand.c
index 7daa877..009567b 100644
--- a/board/sc3/sc3nand.c
+++ b/board/sc3/sc3nand.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
#include <asm/processor.h>
diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c
index b6add59..f6f0e72 100644
--- a/board/sc520_cdp/sc520_cdp.c
+++ b/board/sc520_cdp/sc520_cdp.c
@@ -507,6 +507,7 @@
void show_boot_progress(int val)
{
+ if (val < -32) val = -1; /* let things compatible */
outb(val&0xff, 0x80);
outb((val&0xff00)>>8, 0x680);
}
diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c
index ed226fd..d119a7d 100644
--- a/board/sc520_spunk/sc520_spunk.c
+++ b/board/sc520_spunk/sc520_spunk.c
@@ -507,6 +507,7 @@
{
int version = read_mmcr_byte(SC520_SYSINFO);
+ if (val < -32) val = -1; /* let things compatible */
if (version == 0) {
/* PIO31-PIO16 Data */
write_mmcr_word(SC520_PIODATA31_16,
diff --git a/board/siemens/SCM/u-boot.lds b/board/siemens/SCM/u-boot.lds
deleted file mode 100644
index 05f29c6..0000000
--- a/board/siemens/SCM/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/siemens/SMN42/Makefile b/board/siemens/SMN42/Makefile
new file mode 100644
index 0000000..2c7b54b
--- /dev/null
+++ b/board/siemens/SMN42/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := flash.o smn42.o
+SOBJTS := lowlevel_init.o
+
+SRCS := $(SOBJTS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJTS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/siemens/SMN42/config.mk b/board/siemens/SMN42/config.mk
new file mode 100644
index 0000000..b28f418
--- /dev/null
+++ b/board/siemens/SMN42/config.mk
@@ -0,0 +1,30 @@
+#
+# (C) Copyright 2000
+# Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+# Marius Groeger <mgroeger@sysgo.de>
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#address where u-boot will be relocated
+#TEXT_BASE = 0x0
+TEXT_BASE = 0x81500000
diff --git a/board/siemens/SMN42/flash.c b/board/siemens/SMN42/flash.c
new file mode 100644
index 0000000..7d4977e
--- /dev/null
+++ b/board/siemens/SMN42/flash.c
@@ -0,0 +1,475 @@
+/*
+ * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
+ *
+ * (C) Copyright 2007 Gary Jennejohn garyj@denx.de
+ * Modified to use the routines in cpu/arm720t/lpc2292/flash.c.
+ * Heavily modified to support the SMN42 board from Siemens
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/byteorder.h>
+#include <asm/arch/hardware.h>
+
+static unsigned long flash_addr_table[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS];
+
+extern int lpc2292_copy_buffer_to_flash(flash_info_t *, ulong);
+extern int lpc2292_flash_erase(flash_info_t *, int, int);
+extern int lpc2292_write_buff (flash_info_t *, uchar *, ulong, ulong);
+static unsigned long ext_flash_init(void);
+static int ext_flash_erase(flash_info_t *, int, int);
+static int ext_write_buff(flash_info_t *, uchar *, ulong, ulong);
+
+/*-----------------------------------------------------------------------
+ */
+
+ulong flash_init (void)
+{
+ int j, k;
+ ulong size = 0;
+ ulong flashbase = 0;
+
+ flash_info[0].flash_id = PHILIPS_LPC2292;
+ flash_info[0].size = 0x003E000; /* 256 - 8 KB */
+ flash_info[0].sector_count = 17;
+ memset (flash_info[0].protect, 0, 17);
+ flashbase = 0x00000000;
+ for (j = 0, k = 0; j < 8; j++, k++) {
+ flash_info[0].start[k] = flashbase;
+ flashbase += 0x00002000;
+ }
+ for (j = 0; j < 2; j++, k++) {
+ flash_info[0].start[k] = flashbase;
+ flashbase += 0x00010000;
+ }
+ for (j = 0; j < 7; j++, k++) {
+ flash_info[0].start[k] = flashbase;
+ flashbase += 0x00002000;
+ }
+ size += flash_info[0].size;
+
+ /* Protect monitor and environment sectors */
+ flash_protect (FLAG_PROTECT_SET,
+ 0x0,
+ 0x0 + monitor_flash_len - 1,
+ &flash_info[0]);
+
+ flash_protect (FLAG_PROTECT_SET,
+ CFG_ENV_ADDR,
+ CFG_ENV_ADDR + CFG_ENV_SIZE - 1,
+ &flash_info[0]);
+
+ size += ext_flash_init();
+
+ return size;
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+ int erased = 0;
+ unsigned long j;
+ unsigned long count;
+ unsigned char *p;
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case (PHILIPS_LPC2292 & FLASH_VENDMASK):
+ printf("Philips: ");
+ break;
+ case FLASH_MAN_AMD:
+ printf("AMD: ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case (PHILIPS_LPC2292 & FLASH_TYPEMASK):
+ printf("LPC2292 internal flash\n");
+ break;
+ case FLASH_S29GL128N:
+ printf ("S29GL128N (128 Mbit, uniform sector size)\n");
+ break;
+ default:
+ printf("Unknown Chip Type\n");
+ return;
+ }
+
+ printf (" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; i++) {
+ if ((i % 5) == 0) {
+ printf ("\n ");
+ }
+ if (i < (info->sector_count - 1)) {
+ count = info->start[i+1] - info->start[i];
+ }
+ else {
+ count = info->start[0] + info->size - info->start[i];
+ }
+ p = (unsigned char*)(info->start[i]);
+ erased = 1;
+ for (j = 0; j < count; j++) {
+ if (*p != 0xFF) {
+ erased = 0;
+ break;
+ }
+ p++;
+ }
+ printf (" %08lX%s%s", info->start[i], info->protect[i] ? " RO" : " ",
+ erased ? " E" : " ");
+ }
+ printf ("\n");
+}
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case (PHILIPS_LPC2292 & FLASH_TYPEMASK):
+ return lpc2292_flash_erase(info, s_first, s_last);
+ case FLASH_S29GL128N:
+ return ext_flash_erase(info, s_first, s_last);
+ default:
+ return ERR_PROTECTED;
+ }
+ return ERR_PROTECTED;
+}
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case (PHILIPS_LPC2292 & FLASH_TYPEMASK):
+ return lpc2292_write_buff(info, src, addr, cnt);
+ case FLASH_S29GL128N:
+ return ext_write_buff(info, src, addr, cnt);
+ default:
+ return ERR_PROG_ERROR;
+ }
+ return ERR_PROG_ERROR;
+}
+
+/*--------------------------------------------------------------------------
+ * From here on is code for the external S29GL128N taken from cam5200_flash.c
+ */
+
+#define CFG_FLASH_WORD_SIZE unsigned short
+
+static int wait_for_DQ7_32(flash_info_t * info, int sect)
+{
+ ulong start, now, last;
+ volatile CFG_FLASH_WORD_SIZE *addr =
+ (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
+
+ start = get_timer(0);
+ last = start;
+ while ((addr[0] & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
+ (CFG_FLASH_WORD_SIZE) 0x00800080) {
+ if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) {
+ printf("Timeout\n");
+ return -1;
+ }
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc('.');
+ last = now;
+ }
+ }
+ return 0;
+}
+
+int ext_flash_erase(flash_info_t * info, int s_first, int s_last)
+{
+ volatile CFG_FLASH_WORD_SIZE *addr = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *addr2;
+ int flag, prot, sect, l_sect, ret;
+
+ ret = 0;
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN)
+ printf("- missing\n");
+ else
+ printf("- no sectors to erase\n");
+ return 1;
+ }
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf("Can't erase unknown flash type - aborted\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect])
+ prot++;
+ }
+
+ if (prot)
+ printf("- Warning: %d protected sectors will not be erased!", prot);
+
+ printf("\n");
+
+ l_sect = -1;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[sect]);
+
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00800080;
+ addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00300030; /* sector erase */
+
+ l_sect = sect;
+ /*
+ * Wait for each sector to complete, it's more
+ * reliable. According to AMD Spec, you must
+ * issue all erase commands within a specified
+ * timeout. This has been seen to fail, especially
+ * if printf()s are included (for debug)!!
+ */
+ ret = wait_for_DQ7_32(info, sect);
+ if (ret) {
+ ret = ERR_PROTECTED;
+ break;
+ }
+ }
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay(1000);
+
+ /* reset to read mode */
+ addr = (CFG_FLASH_WORD_SIZE *) info->start[0];
+ addr[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+
+ if (ret)
+ printf(" error\n");
+ else
+ printf(" done\n");
+ return ret;
+}
+
+static ulong flash_get_size(vu_long * addr, flash_info_t * info)
+{
+ short i;
+ CFG_FLASH_WORD_SIZE value;
+ ulong base = (ulong) addr;
+ volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) addr;
+
+ /* Write auto select command: read Manufacturer ID */
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00900090;
+ udelay(1000);
+
+ value = addr2[0];
+
+ switch (value) {
+ case (CFG_FLASH_WORD_SIZE) AMD_MANUFACT:
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ return (0); /* no or unknown flash */
+ }
+
+ value = addr2[1]; /* device ID */
+
+ switch (value) {
+ case (CFG_FLASH_WORD_SIZE)AMD_ID_MIRROR:
+ value = addr2[14];
+ switch(value) {
+ case (CFG_FLASH_WORD_SIZE)AMD_ID_GL128N_2:
+ value = addr2[15];
+ if (value != (CFG_FLASH_WORD_SIZE)AMD_ID_GL128N_3) {
+ info->flash_id = FLASH_UNKNOWN;
+ } else {
+ info->flash_id += FLASH_S29GL128N;
+ info->sector_count = 128;
+ info->size = 0x01000000;
+ }
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ return(0);
+ }
+ break;
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ return (0); /* => no or unknown flash */
+ }
+
+ /* set up sector start address table */
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00020000);
+
+ /* check for protected sectors */
+ for (i = 0; i < info->sector_count; i++) {
+ /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+ /* D0 = 1 if protected */
+ addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]);
+
+ info->protect[i] = addr2[2] & 1;
+ }
+
+ /* issue bank reset to return to read mode */
+ addr2[0] = (CFG_FLASH_WORD_SIZE) 0x00F000F0;
+
+ return (info->size);
+}
+
+static unsigned long ext_flash_init(void)
+{
+ unsigned long total_b = 0;
+ unsigned long size_b[CFG_MAX_FLASH_BANKS];
+ int i;
+
+ /* Init: no FLASHes known */
+ for (i = 1; i < CFG_MAX_FLASH_BANKS; ++i) {
+ flash_info[i].flash_id = FLASH_UNKNOWN;
+ flash_info[i].sector_count = -1;
+ flash_info[i].size = 0;
+
+ /* call flash_get_size() to initialize sector address */
+ size_b[i] = flash_get_size((vu_long *) flash_addr_table[i],
+ &flash_info[i]);
+
+ flash_info[i].size = size_b[i];
+
+ if (flash_info[i].flash_id == FLASH_UNKNOWN) {
+ printf("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
+ i+1, size_b[i], size_b[i] << 20);
+ flash_info[i].sector_count = -1;
+ flash_info[i].size = 0;
+ }
+
+ total_b += flash_info[i].size;
+ }
+
+ return total_b;
+}
+
+static int write_word(flash_info_t * info, ulong dest, ushort data)
+{
+ volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *) (info->start[0]);
+ volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *) dest;
+ volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *) &data;
+ ulong start;
+ int flag;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*dest2 & *data2) != *data2) {
+ return (2);
+ }
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts();
+
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE) 0x00550055;
+ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE) 0x00A000A0;
+ *dest2 = *data2;
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts();
+
+ /* data polling for D7 */
+ start = get_timer(0);
+ while ((*dest2 & (CFG_FLASH_WORD_SIZE) 0x00800080) !=
+ (*data2 & (CFG_FLASH_WORD_SIZE) 0x00800080)) {
+
+ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) {
+ printf("WRITE_TOUT\n");
+ return (1);
+ }
+ }
+ return (0);
+}
+
+/*-----------------------------------------------------------------------
+ * This is taken from the original flash.c for the LPC2292 SODIMM board
+ * and modified to suit.
+ */
+
+int ext_write_buff(flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ushort tmp;
+ ulong i;
+ uchar* src_org;
+ uchar* dst_org;
+ ulong cnt_org = cnt;
+ int ret = ERR_OK;
+
+ src_org = src;
+ dst_org = (uchar*)addr;
+
+ if (addr & 1) { /* if odd address */
+ tmp = *((uchar*)(addr - 1)); /* little endian */
+ tmp |= (*src << 8);
+ if (write_word(info, addr - 1, tmp))
+ return ERR_PROG_ERROR;
+ addr += 1;
+ cnt -= 1;
+ src++;
+ }
+ while (cnt > 1) {
+ tmp = ((*(src+1)) << 8) + (*src); /* little endian */
+ if (write_word(info, addr, tmp))
+ return ERR_PROG_ERROR;
+ addr += 2;
+ src += 2;
+ cnt -= 2;
+ }
+ if (cnt > 0) {
+ tmp = (*((uchar*)(addr + 1))) << 8;
+ tmp |= *src;
+ if (write_word(info, addr, tmp))
+ return ERR_PROG_ERROR;
+ }
+
+ for (i = 0; i < cnt_org; i++) {
+ if (*dst_org != *src_org) {
+ printf("Write failed. Byte %lX differs\n", i);
+ ret = ERR_PROG_ERROR;
+ break;
+ }
+ dst_org++;
+ src_org++;
+ }
+
+ return ret;
+}
diff --git a/board/siemens/SMN42/lowlevel_init.S b/board/siemens/SMN42/lowlevel_init.S
new file mode 100644
index 0000000..11abb63
--- /dev/null
+++ b/board/siemens/SMN42/lowlevel_init.S
@@ -0,0 +1,123 @@
+/*
+ * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
+ *
+ * Slight modifications made to support the SMN42 board from Siemens.
+ * 2007 Gary Jennejohn garyj@denx.de
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/hardware.h>
+
+/* some parameters for the board */
+/* setting up the CPU-internal memory */
+#define SRAM_START 0x40000000
+#define SRAM_SIZE 0x00004000
+#define BCFG0_VALUE 0x1000ffef
+#define BCFG1_VALUE 0x10005D2F
+#define BCFG2_VALUE 0x10005D2F
+/*
+ * For P0.18 to set ZZ to the SRAMs to 1. Also set P0.2 (SCL) and P0.3 (SDA)
+ * for the bit-banger I2C driver correctly.
+ */
+#define IO0_VALUE 0x4000C
+
+_TEXT_BASE:
+ .word TEXT_BASE
+MEMMAP_ADR:
+ .word MEMMAP
+BCFG0_ADR:
+ .word BCFG0
+_BCFG0_VALUE:
+ .word BCFG0_VALUE
+BCFG1_ADR:
+ .word BCFG1
+_BCFG1_VALUE:
+ .word BCFG1_VALUE
+BCFG2_ADR:
+ .word BCFG2
+_BCFG2_VALUE:
+ .word BCFG2_VALUE
+IO0DIR_ADR:
+ .word IO0DIR
+_IO0DIR_VALUE:
+ .word IO0_VALUE
+IO0SET_ADR:
+ .word IO0SET
+_IO0SET_VALUE:
+ .word IO0_VALUE
+PINSEL2_ADR:
+ .word PINSEL2
+PINSEL2_MASK:
+ .word 0x00000000
+PINSEL2_VALUE:
+ .word 0x0F804914
+
+.extern _start
+
+.globl lowlevel_init
+lowlevel_init:
+ /* set up memory control register for bank 0 */
+ ldr r0, _BCFG0_VALUE
+ ldr r1, BCFG0_ADR
+ str r0, [r1]
+
+ /* set up memory control register for bank 1 */
+ ldr r0, _BCFG1_VALUE
+ ldr r1, BCFG1_ADR
+ str r0, [r1]
+
+ /* set up memory control register for bank 2 */
+ ldr r0, _BCFG2_VALUE
+ ldr r1, BCFG2_ADR
+ str r0, [r1]
+
+ /* set IO0DIR to make P0.2, P0.3 and P0.18 outputs */
+ ldr r0, _IO0DIR_VALUE
+ ldr r1, IO0DIR_ADR
+ str r0, [r1]
+
+ /* set P0.18 to 1 */
+ ldr r0, _IO0SET_VALUE
+ ldr r1, IO0SET_ADR
+ str r0, [r1]
+
+ /* set up PINSEL2 for bus-pins */
+ ldr r0, PINSEL2_ADR
+ ldr r1, [r0]
+ ldr r2, PINSEL2_MASK
+ ldr r3, PINSEL2_VALUE
+ and r1, r1, r2
+ orr r1, r1, r3
+ str r1, [r0]
+
+ /* move vectors to beginning of SRAM */
+ mov r2, #SRAM_START
+ mov r0, #0 /*_start*/
+ ldmneia r0!, {r3-r10}
+ stmneia r2!, {r3-r10}
+ ldmneia r0, {r3-r9}
+ stmneia r2, {r3-r9}
+
+ /* Set-up MEMMAP register, so vectors are taken from SRAM */
+ ldr r0, MEMMAP_ADR
+ mov r1, #0x02 /* vectors re-mapped to static RAM */
+ str r1, [r0]
+
+ /* everything is fine now */
+ mov pc, lr
diff --git a/board/siemens/SMN42/smn42.c b/board/siemens/SMN42/smn42.c
new file mode 100644
index 0000000..52d1d7e
--- /dev/null
+++ b/board/siemens/SMN42/smn42.c
@@ -0,0 +1,57 @@
+/*
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2005 Rowel Atienza <rowel@diwalabs.com>
+ * Armadillo board HT1070
+ *
+ * (C) Copyright 2007 Gary Jennejohn <garyj@denx.de>
+ * Siemens board SMN42
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <clps7111.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Miscellaneous platform dependent initialisations
+ */
+
+int board_init (void)
+{
+ /* arch number MACH_TYPE_ARMADILLO - not official*/
+ gd->bd->bi_arch_number = 83;
+
+ /* location of boot parameters */
+ gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x00000100;
+
+ return 0;
+}
+
+int dram_init (void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+
+ return (0);
+}
diff --git a/board/siemens/SMN42/u-boot.lds b/board/siemens/SMN42/u-boot.lds
new file mode 100644
index 0000000..64d946c
--- /dev/null
+++ b/board/siemens/SMN42/u-boot.lds
@@ -0,0 +1,55 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/arm720t/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/siemens/common/fpga.c b/board/siemens/common/fpga.c
index e9941cd..f022ed6 100644
--- a/board/siemens/common/fpga.c
+++ b/board/siemens/common/fpga.c
@@ -219,7 +219,7 @@
return 1;
}
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
@@ -299,7 +299,7 @@
"fpga load [name] addr - load FPGA configuration data\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_BSP */
+#endif
/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
diff --git a/board/siemens/pcu_e/pcu_e.c b/board/siemens/pcu_e/pcu_e.c
index 3f05e4a..2309069 100644
--- a/board/siemens/pcu_e/pcu_e.c
+++ b/board/siemens/pcu_e/pcu_e.c
@@ -368,7 +368,7 @@
/*-----------------------------------------------------------------------
* Board Special Commands: access functions for "PUMA" FPGA
*/
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#define PUMA_READ_MODE 0
#define PUMA_LOAD_MODE 1
@@ -408,7 +408,7 @@
"status - print PUMA status\n"
"puma load addr len - load PUMA configuration data\n");
-#endif /* CFG_CMD_BSP */
+#endif
/* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */
diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c
index a4cb4dc..798e185 100644
--- a/board/sixnet/sixnet.c
+++ b/board/sixnet/sixnet.c
@@ -33,7 +33,7 @@
# include <status_led.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
#endif
@@ -75,9 +75,9 @@
/* ------------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#error "SXNI855T has no PCMCIA port"
-#endif /* CFG_CMD_PCMCIA */
+#endif
/* ------------------------------------------------------------------------- */
@@ -327,7 +327,7 @@
return (0);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
void nand_init(void)
{
unsigned long totlen = nand_probe(CFG_DFLASH_BASE);
diff --git a/board/sl8245/u-boot.lds b/board/sl8245/u-boot.lds
deleted file mode 100644
index acb9ffd..0000000
--- a/board/sl8245/u-boot.lds
+++ /dev/null
@@ -1,135 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/smdk2400/lowlevel_init.S b/board/smdk2400/lowlevel_init.S
index a5de806..a7959f3 100644
--- a/board/smdk2400/lowlevel_init.S
+++ b/board/smdk2400/lowlevel_init.S
@@ -117,7 +117,7 @@
#define TREFMD 0x0 /* CBR(CAS before RAS)/auto refresh */
#define Trp 0x0 /* 2 clk */
#define Trc 0x3 /* 7 clk */
-#define Tchr 0x2 /* 3 clk */
+#define Tchr 0x2 /* 3 clk */
#define REFCNT 1113 /* period=15.6 us, HCLK=60Mhz, (2048+1-15.6*66) */
diff --git a/board/sorcery/u-boot.lds b/board/sorcery/u-boot.lds
deleted file mode 100644
index 889bc77..0000000
--- a/board/sorcery/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8220/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/spc1920/hpi.c b/board/spc1920/hpi.c
index 3c36f79..cd7799b 100644
--- a/board/spc1920/hpi.c
+++ b/board/spc1920/hpi.c
@@ -122,7 +122,9 @@
#define TINY_AUTOINC_BASE_ADDR 0x0
static int hpi_activate(void);
+#if 0
static void hpi_inactivate(void);
+#endif
static void dsp_reset(void);
static int hpi_write_inc(u32 addr, u32 *data, u32 count);
@@ -133,7 +135,9 @@
int hpi_test(void);
static int hpi_write_addr_test(u32 addr);
static int hpi_read_write_test(u32 addr, u32 data);
+#ifdef DO_TINY_TEST
static int hpi_tiny_autoinc_test(void);
+#endif /* DO_TINY_TEST */
#endif /* CONFIG_SPC1920_HPI_TEST */
@@ -185,6 +189,7 @@
return 0;
}
+#if 0
/* turn off the host port interface */
static void hpi_inactivate(void)
{
@@ -200,6 +205,7 @@
/* currently always on TBD */
}
+#endif
/* reset the DSP */
static void dsp_reset(void)
@@ -570,6 +576,7 @@
return 0;
}
+#ifdef DO_TINY_TEST
static int hpi_tiny_autoinc_test(void)
{
int i;
@@ -599,5 +606,6 @@
}
return 0;
}
+#endif /* DO_TINY_TEST */
#endif /* CONFIG_SPC1920_HPI_TEST */
diff --git a/board/ssv/adnpesc1/adnpesc1.c b/board/ssv/adnpesc1/adnpesc1.c
index 2f704a0..2ec3a72 100644
--- a/board/ssv/adnpesc1/adnpesc1.c
+++ b/board/ssv/adnpesc1/adnpesc1.c
@@ -65,7 +65,7 @@
/*
* The following are used to control the SPI chip selects for the SPI command.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_SPI) && CONFIG_NIOS_SPI
+#if defined(CONFIG_CMD_SPI) && CONFIG_NIOS_SPI
#define SPI_RTC_CS_MASK 0x00000001
@@ -89,7 +89,7 @@
};
int spi_chipsel_cnt = sizeof(spi_chipsel) / sizeof(spi_chipsel[0]);
-#endif /* CFG_CMD_SPI */
+#endif
#if defined(CONFIG_POST)
/*
diff --git a/board/ssv/common/cmd_sled.c b/board/ssv/common/cmd_sled.c
index d61fa3e..713ed65 100644
--- a/board/ssv/common/cmd_sled.c
+++ b/board/ssv/common/cmd_sled.c
@@ -46,7 +46,7 @@
extern led_dev_t led_dev[];
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
int do_sled (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
int led_id = 0;
@@ -158,5 +158,5 @@
U_BOOT_CMD (sled, 3, 0, do_sled,
"sled - check and set status led\n",
"sled [name [state]]\n" __NAME_STR " - state: on|off|blink\n");
-#endif /* CFG_CMD_BSP */
+#endif
#endif /* CONFIG_STATUS_LED */
diff --git a/board/ssv/common/wd_pio.c b/board/ssv/common/wd_pio.c
index 3215ac9..9945c59 100644
--- a/board/ssv/common/wd_pio.c
+++ b/board/ssv/common/wd_pio.c
@@ -112,7 +112,7 @@
enable_interrupts ();
}
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
nios_pio_t *ena_piop = (nios_pio_t*)CONFIG_HW_WDENA_BASE;
@@ -156,5 +156,5 @@
"wd off - switch watchdog off\n"
"wd - print current status\n"
);
-#endif /* CFG_CMD_BSP */
+#endif
#endif /* CONFIG_HW_WATCHDOG */
diff --git a/board/stxssa/config.mk b/board/stxssa/config.mk
index 30f42c5..5f4fc740 100644
--- a/board/stxssa/config.mk
+++ b/board/stxssa/config.mk
@@ -22,13 +22,12 @@
# MA 02111-1307 USA
#
-#
# default CCARBAR is at 0xff700000
# assume U-Boot is less than 0.5MB
# U-Boot is less than 256K, so push
# it further up into the flash
#
-TEXT_BASE = 0xfffC0000
+TEXT_BASE = 0xFFFC0000
PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1
PLATFORM_CPPFLAGS += -DCONFIG_E500=1
diff --git a/board/stxssa/stxssa.c b/board/stxssa/stxssa.c
index 0fb233d..9bacb98 100644
--- a/board/stxssa/stxssa.c
+++ b/board/stxssa/stxssa.c
@@ -52,147 +52,147 @@
const iop_conf_t iop_conf_tab[4][32] = {
/* Port A configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
- /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
- /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
- /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
- /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
- /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
- /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
- /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
- /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
- /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
- /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
- /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
- /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
- /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
- /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
- /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
- /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
- /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
- /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
- /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
- /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
- /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
- /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
- /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
- /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
- /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
- /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
- /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
- /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
+ { /* conf ppar psor pdir podr pdat */
+ /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */
+ /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */
+ /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */
+ /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */
+ /* PA27 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxSOC */
+ /* PA26 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 RxClav */
+ /* PA25 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[0] */
+ /* PA24 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[1] */
+ /* PA23 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[2] */
+ /* PA22 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[3] */
+ /* PA21 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[4] */
+ /* PA20 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[5] */
+ /* PA19 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[6] */
+ /* PA18 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXD[7] */
+ /* PA17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[7] */
+ /* PA16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[6] */
+ /* PA15 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[5] */
+ /* PA14 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[4] */
+ /* PA13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[3] */
+ /* PA12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[2] */
+ /* PA11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[1] */
+ /* PA10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXD[0] */
+ /* PA9 */ { 0, 1, 1, 1, 0, 0 }, /* FCC1 L1TXD */
+ /* PA8 */ { 0, 1, 1, 0, 0, 0 }, /* FCC1 L1RXD */
+ /* PA7 */ { 0, 0, 0, 1, 0, 0 }, /* PA7 */
+ /* PA6 */ { 0, 1, 1, 1, 0, 0 }, /* TDM A1 L1RSYNC */
+ /* PA5 */ { 0, 0, 0, 1, 0, 0 }, /* PA5 */
+ /* PA4 */ { 0, 0, 0, 1, 0, 0 }, /* PA4 */
+ /* PA3 */ { 0, 0, 0, 1, 0, 0 }, /* PA3 */
+ /* PA2 */ { 0, 0, 0, 1, 0, 0 }, /* PA2 */
+ /* PA1 */ { 1, 0, 0, 0, 0, 0 }, /* FREERUN */
+ /* PA0 */ { 0, 0, 0, 1, 0, 0 } /* PA0 */
},
/* Port B configuration */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
+ { /* conf ppar psor pdir podr pdat */
+ /* PB31 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
+ /* PB30 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
+ /* PB29 */ { 1, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
+ /* PB28 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
+ /* PB27 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
+ /* PB26 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
+ /* PB25 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
+ /* PB24 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
+ /* PB23 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
+ /* PB22 */ { 1, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
+ /* PB21 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
+ /* PB20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
+ /* PB19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
+ /* PB18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
+ /* PB17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
+ /* PB16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
+ /* PB15 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
+ /* PB14 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
+ /* PB13 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:COL */
+ /* PB12 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
+ /* PB11 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
+ /* PB10 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
+ /* PB9 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
+ /* PB8 */ { 0, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
+ /* PB7 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
+ /* PB6 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
+ /* PB5 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
+ /* PB4 */ { 0, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
+ /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
+ /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
+ /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
+ /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
},
/* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
- /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
- /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
- /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
- /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
- /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
- /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
- /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
- /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
- /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
- /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
- /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
- /* PC15 */ { 0, 1, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
- /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
- /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
- /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
- /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FETHMDC */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FETHMDIO */
- /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
- /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
- /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
- /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
+ { /* conf ppar psor pdir podr pdat */
+ /* PC31 */ { 0, 0, 0, 1, 0, 0 }, /* PC31 */
+ /* PC30 */ { 0, 0, 0, 1, 0, 0 }, /* PC30 */
+ /* PC29 */ { 0, 1, 1, 0, 0, 0 }, /* SCC1 EN *CLSN */
+ /* PC28 */ { 0, 0, 0, 1, 0, 0 }, /* PC28 */
+ /* PC27 */ { 0, 0, 0, 1, 0, 0 }, /* UART Clock in */
+ /* PC26 */ { 0, 0, 0, 1, 0, 0 }, /* PC26 */
+ /* PC25 */ { 0, 0, 0, 1, 0, 0 }, /* PC25 */
+ /* PC24 */ { 0, 0, 0, 1, 0, 0 }, /* PC24 */
+ /* PC23 */ { 0, 1, 0, 1, 0, 0 }, /* ATMTFCLK */
+ /* PC22 */ { 0, 1, 0, 0, 0, 0 }, /* ATMRFCLK */
+ /* PC21 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RXCLK */
+ /* PC20 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN TXCLK */
+ /* PC19 */ { 1, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_CLK CLK13 */
+ /* PC18 */ { 1, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK14) */
+ /* PC17 */ { 0, 0, 0, 1, 0, 0 }, /* PC17 */
+ /* PC16 */ { 0, 1, 0, 0, 0, 0 }, /* FCC Tx Clock (CLK16) */
+ /* PC15 */ { 0, 1, 0, 0, 0, 0 }, /* PC15 */
+ /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN *CD */
+ /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* PC13 */
+ /* PC12 */ { 0, 1, 0, 1, 0, 0 }, /* PC12 */
+ /* PC11 */ { 0, 0, 0, 1, 0, 0 }, /* LXT971 transmit control */
+ /* PC10 */ { 0, 0, 0, 1, 0, 0 }, /* FETHMDC */
+ /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* FETHMDIO */
+ /* PC8 */ { 0, 0, 0, 1, 0, 0 }, /* PC8 */
+ /* PC7 */ { 0, 0, 0, 1, 0, 0 }, /* PC7 */
+ /* PC6 */ { 0, 0, 0, 1, 0, 0 }, /* PC6 */
+ /* PC5 */ { 0, 0, 0, 1, 0, 0 }, /* PC5 */
+ /* PC4 */ { 0, 0, 0, 1, 0, 0 }, /* PC4 */
+ /* PC3 */ { 0, 0, 0, 1, 0, 0 }, /* PC3 */
+ /* PC2 */ { 0, 0, 0, 1, 0, 1 }, /* ENET FDE */
+ /* PC1 */ { 0, 0, 0, 1, 0, 0 }, /* ENET DSQE */
+ /* PC0 */ { 0, 0, 0, 1, 0, 0 }, /* ENET LBK */
},
/* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
- /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
- /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RxD */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TxD */
- /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
- /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
- /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
- /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
- /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
- /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
- /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
- /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 0, 0 }, /* I2C CLK */
- /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
- /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
- /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
- /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
- /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
+ { /* conf ppar psor pdir podr pdat */
+ /* PD31 */ { 0, 1, 0, 0, 0, 0 }, /* SCC1 EN RxD */
+ /* PD30 */ { 0, 1, 1, 1, 0, 0 }, /* SCC1 EN TxD */
+ /* PD29 */ { 0, 1, 0, 1, 0, 0 }, /* SCC1 EN TENA */
+ /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RxD */
+ /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TxD */
+ /* PD26 */ { 0, 0, 0, 1, 0, 0 }, /* PD26 */
+ /* PD25 */ { 0, 0, 0, 1, 0, 0 }, /* PD25 */
+ /* PD24 */ { 0, 0, 0, 1, 0, 0 }, /* PD24 */
+ /* PD23 */ { 0, 0, 0, 1, 0, 0 }, /* PD23 */
+ /* PD22 */ { 0, 0, 0, 1, 0, 0 }, /* PD22 */
+ /* PD21 */ { 0, 0, 0, 1, 0, 0 }, /* PD21 */
+ /* PD20 */ { 0, 0, 0, 1, 0, 0 }, /* PD20 */
+ /* PD19 */ { 0, 0, 0, 1, 0, 0 }, /* PD19 */
+ /* PD18 */ { 0, 0, 0, 1, 0, 0 }, /* PD18 */
+ /* PD17 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 ATMRXPRTY */
+ /* PD16 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 ATMTXPRTY */
+ /* PD15 */ { 1, 1, 1, 0, 1, 0 }, /* I2C SDA */
+ /* PD14 */ { 1, 1, 1, 0, 0, 0 }, /* I2C CLK */
+ /* PD13 */ { 0, 0, 0, 0, 0, 0 }, /* PD13 */
+ /* PD12 */ { 0, 0, 0, 0, 0, 0 }, /* PD12 */
+ /* PD11 */ { 0, 0, 0, 0, 0, 0 }, /* PD11 */
+ /* PD10 */ { 0, 0, 0, 0, 0, 0 }, /* PD10 */
+ /* PD9 */ { 0, 1, 0, 1, 0, 0 }, /* SMC1 TXD */
+ /* PD8 */ { 0, 1, 0, 0, 0, 0 }, /* SMC1 RXD */
+ /* PD7 */ { 0, 0, 0, 1, 0, 1 }, /* PD7 */
+ /* PD6 */ { 0, 0, 0, 1, 0, 1 }, /* PD6 */
+ /* PD5 */ { 0, 0, 0, 1, 0, 1 }, /* PD5 */
+ /* PD4 */ { 0, 0, 0, 1, 0, 1 }, /* PD4 */
+ /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
+ /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
+ /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */
+ /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* pin doesn't exist */
}
};
@@ -227,12 +227,12 @@
#if (CONFIG_ETHER_INDEX == 2)
bcsr->bcsr2 &= ~FETH2_RST;
udelay(2);
- bcsr->bcsr2 |= FETH2_RST;
+ bcsr->bcsr2 |= FETH2_RST;
udelay(1000);
#elif (CONFIG_ETHER_INDEX == 3)
bcsr->bcsr3 &= ~FETH3_RST;
udelay(2);
- bcsr->bcsr3 |= FETH3_RST;
+ bcsr->bcsr3 |= FETH3_RST;
udelay(1000);
#endif
#if defined(CONFIG_MII) && defined(CONFIG_ETHER_ON_FCC)
@@ -252,10 +252,10 @@
board_early_init_f(void)
{
#if defined(CONFIG_PCI)
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- volatile ccsr_pcix_t *pci = &immr->im_pcix;
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ volatile ccsr_pcix_t *pci = &immr->im_pcix;
- pci->peer &= 0xfffffffdf; /* disable master abort */
+ pci->peer &= 0xffffffdf; /* disable master abort */
#endif
/* Why is the phy reset done _after_ the ethernet
@@ -378,9 +378,14 @@
#endif
-static struct pci_controller hose = {
+static struct pci_controller hose[] = {
#ifndef CONFIG_PCI_PNP
- config_table: pci_stxgp3_config_table,
+ { config_table: pci_stxgp3_config_table,},
+#else
+ {},
+#endif
+#ifdef CONFIG_MPC85XX_PCI2
+ {},
#endif
};
@@ -393,6 +398,6 @@
#ifdef CONFIG_PCI
extern void pci_mpc85xx_init(struct pci_controller *hose);
- pci_mpc85xx_init(&hose);
+ pci_mpc85xx_init(hose);
#endif /* CONFIG_PCI */
}
diff --git a/board/stxssa/u-boot.lds b/board/stxssa/u-boot.lds
index 95ecf66..65e1bcf 100644
--- a/board/stxssa/u-boot.lds
+++ b/board/stxssa/u-boot.lds
@@ -145,6 +145,7 @@
. = ALIGN(256);
__init_end = .;
+ . = .;
__bss_start = .;
.bss :
{
diff --git a/board/stxxtc/stxxtc.c b/board/stxxtc/stxxtc.c
index 7caf06a..87a2022 100644
--- a/board/stxxtc/stxxtc.c
+++ b/board/stxxtc/stxxtc.c
@@ -574,7 +574,7 @@
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
diff --git a/board/svm_sc8xx/svm_sc8xx.c b/board/svm_sc8xx/svm_sc8xx.c
index 9bb9fd0..b900e6b 100644
--- a/board/svm_sc8xx/svm_sc8xx.c
+++ b/board/svm_sc8xx/svm_sc8xx.c
@@ -153,7 +153,7 @@
return (size_b0 );
}
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
extern void doc_probe (ulong physadr);
void doc_init (void)
{
diff --git a/board/total5200/total5200.c b/board/total5200/total5200.c
index 1a35187..f32dadf 100644
--- a/board/total5200/total5200.c
+++ b/board/total5200/total5200.c
@@ -109,7 +109,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
/* IRDA_1 aka PSC6_3 (pin C13) */
#define GPIO_IRDA_1 0x20000000UL
@@ -133,7 +133,7 @@
*(vu_long *) MPC5XXX_GPIO_DATA_O |= GPIO_IRDA_1;
}
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#ifdef CONFIG_VIDEO_SED13806
#include <sed13806.h>
diff --git a/board/total5200/u-boot.lds b/board/total5200/u-boot.lds
deleted file mode 100644
index 3cc2968..0000000
--- a/board/total5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm5200/cmd_stk52xx.c b/board/tqm5200/cmd_stk52xx.c
old mode 100755
new mode 100644
index 7af69f2..b746679
--- a/board/tqm5200/cmd_stk52xx.c
+++ b/board/tqm5200/cmd_stk52xx.c
@@ -29,7 +29,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
#define DEFAULT_VOL 45
@@ -1241,4 +1241,4 @@
" - loopback plug(s) for X21/X22 required\n"
);
#endif
-#endif /* CFG_CMD_BSP */
+#endif
diff --git a/board/tqm5200/cmd_tb5200.c b/board/tqm5200/cmd_tb5200.c
index 8784b1f..214dca6 100644
--- a/board/tqm5200/cmd_tb5200.c
+++ b/board/tqm5200/cmd_tb5200.c
@@ -29,7 +29,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#if defined (CONFIG_TB5200)
#define SM501_PANEL_DISPLAY_CONTROL 0x00080000UL
@@ -101,4 +101,4 @@
);
#endif /* CONFIG_STK52XX */
-#endif /* CFG_CMD_BSP */
+#endif
diff --git a/board/tqm5200/tqm5200.c b/board/tqm5200/tqm5200.c
index a4322b6..29d6f00 100644
--- a/board/tqm5200/tqm5200.c
+++ b/board/tqm5200/tqm5200.c
@@ -31,6 +31,7 @@
#include <mpc5xxx.h>
#include <pci.h>
#include <asm/processor.h>
+#include <libfdt.h>
#ifdef CONFIG_VIDEO_SM501
#include <sm501.h>
@@ -42,6 +43,8 @@
#include "mt48lc16m16a2-75.h"
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifdef CONFIG_PS2MULT
void ps2mult_early_init(void);
#endif
@@ -332,7 +335,7 @@
}
#endif
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
#if defined (CONFIG_MINIFAP)
#define SM501_POWER_MODE0_GATE 0x00000040UL
@@ -385,7 +388,7 @@
}
#endif
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#ifdef CONFIG_POST
/*
@@ -476,8 +479,6 @@
int board_early_init_f (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
if (silent_boot())
gd->flags |= GD_FLG_SILENT;
@@ -775,3 +776,10 @@
}
#endif /* CONFIG_VIDEO_SM501 */
+
+#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
+void ft_board_setup(void *blob, bd_t *bd)
+{
+ ft_cpu_setup(blob, bd);
+}
+#endif /* defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP) */
diff --git a/board/tqm5200/u-boot.lds b/board/tqm5200/u-boot.lds
deleted file mode 100644
index 3cc2968..0000000
--- a/board/tqm5200/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm8260/u-boot.lds b/board/tqm8260/u-boot.lds
deleted file mode 100644
index 05f29c6..0000000
--- a/board/tqm8260/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm8272/tqm8272.c b/board/tqm8272/tqm8272.c
index 70d1bb8..7bd6401 100644
--- a/board/tqm8272/tqm8272.c
+++ b/board/tqm8272/tqm8272.c
@@ -1065,7 +1065,7 @@
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <nand.h>
#include <linux/mtd/mtd.h>
@@ -1212,7 +1212,7 @@
return 0;
}
-#endif /* CFG_CMD_NAND */
+#endif
#ifdef CONFIG_PCI
struct pci_controller hose;
diff --git a/board/tqm8272/u-boot.lds b/board/tqm8272/u-boot.lds
deleted file mode 100644
index 05f29c6..0000000
--- a/board/tqm8272/u-boot.lds
+++ /dev/null
@@ -1,126 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- common/environment.o(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/tqm834x/tqm834x.c b/board/tqm834x/tqm834x.c
index 9c35e22..7d0b055 100644
--- a/board/tqm834x/tqm834x.c
+++ b/board/tqm834x/tqm834x.c
@@ -114,7 +114,7 @@
/* enable DDR controller */
im->ddr.sdram_cfg = (SDRAM_CFG_MEM_EN |
SDRAM_CFG_SREN |
- SDRAM_CFG_SDRAM_TYPE_DDR);
+ SDRAM_CFG_SDRAM_TYPE_DDR1);
SYNC;
/* size detection */
@@ -388,7 +388,7 @@
/* don't enable DDR controller yet */
im->ddr.sdram_cfg =
SDRAM_CFG_SREN |
- SDRAM_CFG_SDRAM_TYPE_DDR;
+ SDRAM_CFG_SDRAM_TYPE_DDR1;
SYNC;
/* Set SDRAM mode */
diff --git a/board/tqm834x/u-boot.lds b/board/tqm834x/u-boot.lds
deleted file mode 100644
index 020cfa6..0000000
--- a/board/tqm834x/u-boot.lds
+++ /dev/null
@@ -1,122 +0,0 @@
-/*
- * Copyright 2004 Freescale Semiconductor, Inc.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc83xx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/trab/Makefile b/board/trab/Makefile
index 868ca42..fbe1c36 100644
--- a/board/trab/Makefile
+++ b/board/trab/Makefile
@@ -50,7 +50,6 @@
$(obj)trab_fkt.srec: $(OBJS_FKT) $(LIB)
$(LD) -g -Ttext $(LOAD_ADDR) -o $(<:.o=) -e trab_fkt $^ $(LIB) \
-L$(obj)../../examples -lstubs \
- -L$(obj)../../lib_generic -lgeneric \
-L$(gcclibdir) -lgcc
$(OBJCOPY) -O srec $(<:.o=) $@
diff --git a/board/trab/auto_update.c b/board/trab/auto_update.c
index f4074ae..54d3645 100644
--- a/board/trab/auto_update.c
+++ b/board/trab/auto_update.c
@@ -34,7 +34,7 @@
#ifdef CONFIG_AUTO_UPDATE
-#ifndef CONFIG_USB_OHCI
+#ifndef CONFIG_USB_OHCI_NEW
#error "must define CONFIG_USB_OHCI"
#endif
@@ -46,8 +46,8 @@
#error "must define CFG_HUSH_PARSER"
#endif
-#if !(CONFIG_COMMANDS & CFG_CMD_FAT)
-#error "must define CFG_CMD_FAT"
+#if !defined(CONFIG_CMD_FAT)
+#error "must define CONFIG_CMD_FAT"
#endif
/*
@@ -450,7 +450,7 @@
{
block_dev_desc_t *stor_dev;
long sz;
- int i, res, bitmap_first, cnt, old_ctrlc, got_ctrlc;
+ int i, res = 0, bitmap_first, cnt, old_ctrlc, got_ctrlc;
char *env;
long start, end;
@@ -477,18 +477,21 @@
au_usb_stor_curr_dev = usb_stor_scan(0);
if (au_usb_stor_curr_dev == -1) {
debug ("No device found. Not initialized?\n");
- return -1;
+ res = -1;
+ goto xit;
}
/* check whether it has a partition table */
stor_dev = get_dev("usb", 0);
if (stor_dev == NULL) {
debug ("uknown device type\n");
- return -1;
+ res = -1;
+ goto xit;
}
if (fat_register_device(stor_dev, 1) != 0) {
debug ("Unable to use USB %d:%d for fatls\n",
au_usb_stor_curr_dev, 1);
- return -1;
+ res = -1;
+ goto xit;
}
if (file_fat_detectfs() != 0) {
debug ("file_fat_detectfs failed\n");
@@ -648,9 +651,10 @@
/* enable the power switch */
*CPLD_VFD_BK &= ~POWER_OFF;
}
- usb_stop();
/* restore the old state */
disable_ctrlc(old_ctrlc);
- return 0;
+xit:
+ usb_stop();
+ return res;
}
#endif /* CONFIG_AUTO_UPDATE */
diff --git a/board/trab/cmd_trab.c b/board/trab/cmd_trab.c
index b82c8ed..daa6aee 100644
--- a/board/trab/cmd_trab.c
+++ b/board/trab/cmd_trab.c
@@ -32,7 +32,7 @@
* TRAB board specific commands. Especially commands for burn-in and function
* test.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
/* limits for valid range of VCC5V in mV */
#define VCC5V_MIN 4500
@@ -846,7 +846,7 @@
{
int contact_temp;
int delay = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
struct rtc_time tm;
#endif
@@ -862,7 +862,7 @@
spi_init ();
while (1) {
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
rtc_get (&tm);
printf ("%4d-%02d-%02d %2d:%02d:%02d - ",
tm.tm_year, tm.tm_mon, tm.tm_mday,
@@ -893,4 +893,4 @@
" For each measurment a timestamp is printeted\n"
);
-#endif /* CFG_CMD_BSP */
+#endif
diff --git a/board/trab/trab_fkt.c b/board/trab/trab_fkt.c
index 71be6e0..7273ef9 100644
--- a/board/trab/trab_fkt.c
+++ b/board/trab/trab_fkt.c
@@ -148,14 +148,14 @@
static unsigned short updcrc(unsigned short icrc, unsigned char *icp,
unsigned int icnt);
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
static int trab_eeprom_read (char **argv);
static int trab_eeprom_write (char **argv);
int i2c_write_multiple (uchar chip, uint addr, int alen, uchar *buffer,
int len);
int i2c_read_multiple ( uchar chip, uint addr, int alen, uchar *buffer,
int len);
-#endif /* CFG_CMD_I2C */
+#endif
/*
* TRAB board specific commands. Especially commands for burn-in and function
@@ -959,7 +959,7 @@
static int touch_write_clibration_values (int calib_point, int x, int y)
{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
int x_verify = 0;
int y_verify = 0;
@@ -1019,10 +1019,10 @@
}
return 1;
#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
+ printf ("No I2C support enabled (CONFIG_CMD_I2C), could not write "
"to EEPROM\n");
return (1);
-#endif /* CFG_CMD_I2C */
+#endif
}
@@ -1105,7 +1105,7 @@
int do_serial_number (char **argv)
{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
unsigned int serial_number;
if (strcmp (argv[2], "read") == 0) {
@@ -1130,16 +1130,16 @@
printf ("%s: unknown command %s\n", __FUNCTION__, argv[2]);
return (1); /* unknown command, return error */
#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
+ printf ("No I2C support enabled (CONFIG_CMD_I2C), could not write "
"to EEPROM\n");
return (1);
-#endif /* CFG_CMD_I2C */
+#endif
}
int do_crc16 (void)
{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
int crc;
unsigned char buf[EEPROM_MAX_CRC_BUF];
@@ -1160,10 +1160,10 @@
}
return (0);
#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
+ printf ("No I2C support enabled (CONFIG_CMD_I2C), could not write "
"to EEPROM\n");
return (1);
-#endif /* CFG_CMD_I2C */
+#endif
}
@@ -1260,7 +1260,7 @@
int do_eeprom (char **argv)
{
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
if (strcmp (argv[2], "read") == 0) {
return (trab_eeprom_read (argv));
}
@@ -1272,13 +1272,13 @@
printf ("%s: invalid parameter %s\n", __FUNCTION__, argv[2]);
return (1);
#else
- printf ("No I2C support enabled (CFG_CMD_I2C), could not write "
+ printf ("No I2C support enabled (CONFIG_CMD_I2C), could not write "
"to EEPROM\n");
return (1);
-#endif /* CFG_CMD_I2C */
+#endif
}
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
static int trab_eeprom_read (char **argv)
{
int i;
@@ -1408,4 +1408,4 @@
}
return (0);
}
-#endif /* CFG_CMD_I2C */
+#endif
diff --git a/board/trizepsiv/Makefile b/board/trizepsiv/Makefile
new file mode 100644
index 0000000..115e17d
--- /dev/null
+++ b/board/trizepsiv/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS := conxs.o eeprom.o
+SOBJS := lowlevel_init.o pxavoltage.o
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(obj).depend $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/trizepsiv/config.mk b/board/trizepsiv/config.mk
new file mode 100644
index 0000000..4486f6b
--- /dev/null
+++ b/board/trizepsiv/config.mk
@@ -0,0 +1,3 @@
+TEXT_BASE =0xa1f00000
+# 0xa1700000
+#TEXT_BASE = 0
diff --git a/board/trizepsiv/conxs.c b/board/trizepsiv/conxs.c
new file mode 100644
index 0000000..7c6c855
--- /dev/null
+++ b/board/trizepsiv/conxs.c
@@ -0,0 +1,146 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Gmbh, sbabic@denx.de
+ *
+ * (C) Copyright 2004
+ * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
+ *
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/pxa-regs.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define RH_A_PSM (1 << 8) /* power switching mode */
+#define RH_A_NPS (1 << 9) /* no power switching */
+
+extern struct serial_device serial_ffuart_device;
+extern struct serial_device serial_btuart_device;
+extern struct serial_device serial_stuart_device;
+
+/* ------------------------------------------------------------------------- */
+
+/*
+ * Miscelaneous platform dependent initialisations
+ */
+
+void usb_board_init(void)
+{
+ UHCHR = (UHCHR | UHCHR_PCPL | UHCHR_PSPL) &
+ ~(UHCHR_SSEP0 | UHCHR_SSEP1 | UHCHR_SSEP2 | UHCHR_SSE);
+
+ UHCHR |= UHCHR_FSBIR;
+
+ while (UHCHR & UHCHR_FSBIR);
+
+ UHCHR &= ~UHCHR_SSE;
+ UHCHIE = (UHCHIE_UPRIE | UHCHIE_RWIE);
+
+ /* Clear any OTG Pin Hold */
+ if (PSSR & PSSR_OTGPH)
+ PSSR |= PSSR_OTGPH;
+
+ UHCRHDA &= ~(RH_A_NPS);
+ UHCRHDA |= RH_A_PSM;
+
+ /* Set port power control mask bits, only 3 ports. */
+ UHCRHDB |= (0x7<<17);
+}
+
+void usb_board_init_fail(void)
+{
+ return;
+}
+
+void usb_board_stop(void)
+{
+ UHCHR |= UHCHR_FHR;
+ udelay(11);
+ UHCHR &= ~UHCHR_FHR;
+
+ UHCCOMS |= 1;
+ udelay(10);
+
+ CKEN &= ~CKEN10_USBHOST;
+
+ puts("Called USB STOP\n");
+ return;
+}
+
+int board_init (void)
+{
+ /* memory and cpu-speed are setup before relocation */
+ /* so we do _nothing_ here */
+
+ /* arch number of ConXS Board */
+ gd->bd->bi_arch_number = 776;
+
+ /* adress of boot parameters */
+ gd->bd->bi_boot_params = 0xa000003c;
+
+ return 0;
+}
+
+int board_late_init(void)
+{
+#if defined(CONFIG_SERIAL_MULTI)
+ char *console=getenv("boot_console");
+
+ if ((strcmp(console,"serial_btuart") == 0) ||
+ (strcmp(console,"serial_stuart") == 0) ||
+ (strcmp(console,"serial_ffuart") == 0)) {
+ setenv("stdout",console);
+ setenv("stdin", console);
+ setenv("stderr",console);
+ } else {
+ setenv("stdout", "serial");
+ setenv("stdin", "serial");
+ setenv("stderr", "serial");
+ }
+#endif
+ return 0;
+}
+
+struct serial_device *default_serial_console (void)
+{
+ return &serial_ffuart_device;
+}
+
+int dram_init (void)
+{
+ gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
+ gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
+ gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
+ gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
+ gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
+ gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
+ gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
+ gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
+
+ return 0;
+}
diff --git a/board/trizepsiv/eeprom.c b/board/trizepsiv/eeprom.c
new file mode 100644
index 0000000..3d3bc00
--- /dev/null
+++ b/board/trizepsiv/eeprom.c
@@ -0,0 +1,85 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+
+static unsigned char srom[128];
+extern u16 read_srom_word(int);
+extern void write_srom_word(int offset, u16 val);
+
+static int do_read_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
+ int i;
+
+ for (i=0; i < 0x40; i++) {
+ if (!(i % 0x10))
+ printf("\n%08lx:", i);
+ printf(" %04x", read_srom_word(i));
+ }
+ printf ("\n");
+ return (0);
+}
+
+static int do_write_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
+ int offset,value;
+
+ if (argc < 4) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ offset=simple_strtoul(argv[2],NULL,16);
+ value=simple_strtoul(argv[3],NULL,16);
+ if (offset > 0x40) {
+ printf("Wrong offset : 0x%x\n",offset);
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+ write_srom_word(offset, value);
+ return (0);
+}
+
+int do_dm9000_eeprom ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) {
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if (strcmp (argv[1],"read") == 0) {
+ return (do_read_dm9000_eeprom(cmdtp,flag,argc,argv));
+ } else if (strcmp (argv[1],"write") == 0) {
+ return (do_write_dm9000_eeprom(cmdtp,flag,argc,argv));
+ } else {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+}
+
+U_BOOT_CMD(
+ dm9000ee,4,1,do_dm9000_eeprom,
+ "dm9000ee- Read/Write eeprom connected to Ethernet Controller\n",
+ "\ndm9000ee write <word offset> <value> \n"
+ "\tdm9000ee read \n"
+ "\tword:\t\t00-02 : MAC Address\n"
+ "\t\t\t03-07 : DM9000 Configuration\n"
+ "\t\t\t08-63 : User data\n");
diff --git a/board/trizepsiv/lowlevel_init.S b/board/trizepsiv/lowlevel_init.S
new file mode 100644
index 0000000..d886938
--- /dev/null
+++ b/board/trizepsiv/lowlevel_init.S
@@ -0,0 +1,503 @@
+/*
+ * This was originally from the Lubbock u-boot port.
+ *
+ * Most of this taken from Redboot hal_platform_setup.h with cleanup
+ *
+ * NOTE: I haven't clean this up considerably, just enough to get it
+ * running. See hal_platform_setup.h for the source. See
+ * board/cradle/lowlevel_init.S for another PXA250 setup that is
+ * much cleaner.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/arch/pxa-regs.h>
+
+/* wait for coprocessor write complete */
+ .macro CPWAIT reg
+ mrc p15,0,\reg,c2,c0,0
+ mov \reg,\reg
+ sub pc,pc,#4
+ .endm
+
+
+/*
+ * Memory setup
+ */
+
+.globl lowlevel_init
+lowlevel_init:
+
+ /* Set up GPIO pins first ----------------------------------------- */
+
+ ldr r0, =GPSR0
+ ldr r1, =CFG_GPSR0_VAL
+ str r1, [r0]
+
+ ldr r0, =GPSR1
+ ldr r1, =CFG_GPSR1_VAL
+ str r1, [r0]
+
+ ldr r0, =GPSR2
+ ldr r1, =CFG_GPSR2_VAL
+ str r1, [r0]
+
+ ldr r0, =GPSR3
+ ldr r1, =CFG_GPSR3_VAL
+ str r1, [r0]
+
+ ldr r0, =GPCR0
+ ldr r1, =CFG_GPCR0_VAL
+ str r1, [r0]
+
+ ldr r0, =GPCR1
+ ldr r1, =CFG_GPCR1_VAL
+ str r1, [r0]
+
+ ldr r0, =GPCR2
+ ldr r1, =CFG_GPCR2_VAL
+ str r1, [r0]
+
+ ldr r0, =GPCR3
+ ldr r1, =CFG_GPCR3_VAL
+ str r1, [r0]
+
+ ldr r0, =GRER0
+ ldr r1, =CFG_GRER0_VAL
+ str r1, [r0]
+
+ ldr r0, =GRER1
+ ldr r1, =CFG_GRER1_VAL
+ str r1, [r0]
+
+ ldr r0, =GRER2
+ ldr r1, =CFG_GRER2_VAL
+ str r1, [r0]
+
+ ldr r0, =GRER3
+ ldr r1, =CFG_GRER3_VAL
+ str r1, [r0]
+
+ ldr r0, =GFER0
+ ldr r1, =CFG_GFER0_VAL
+ str r1, [r0]
+
+ ldr r0, =GFER1
+ ldr r1, =CFG_GFER1_VAL
+ str r1, [r0]
+
+ ldr r0, =GFER2
+ ldr r1, =CFG_GFER2_VAL
+ str r1, [r0]
+
+ ldr r0, =GFER3
+ ldr r1, =CFG_GFER3_VAL
+ str r1, [r0]
+
+ ldr r0, =GPDR0
+ ldr r1, =CFG_GPDR0_VAL
+ str r1, [r0]
+
+ ldr r0, =GPDR1
+ ldr r1, =CFG_GPDR1_VAL
+ str r1, [r0]
+
+ ldr r0, =GPDR2
+ ldr r1, =CFG_GPDR2_VAL
+ str r1, [r0]
+
+ ldr r0, =GPDR3
+ ldr r1, =CFG_GPDR3_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR0_L
+ ldr r1, =CFG_GAFR0_L_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR0_U
+ ldr r1, =CFG_GAFR0_U_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR1_L
+ ldr r1, =CFG_GAFR1_L_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR1_U
+ ldr r1, =CFG_GAFR1_U_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR2_L
+ ldr r1, =CFG_GAFR2_L_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR2_U
+ ldr r1, =CFG_GAFR2_U_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR3_L
+ ldr r1, =CFG_GAFR3_L_VAL
+ str r1, [r0]
+
+ ldr r0, =GAFR3_U
+ ldr r1, =CFG_GAFR3_U_VAL
+ str r1, [r0]
+
+ ldr r0, =PSSR /* enable GPIO pins */
+ ldr r1, =CFG_PSSR_VAL
+ str r1, [r0]
+
+ /* ---------------------------------------------------------------- */
+ /* Enable memory interface */
+ /* */
+ /* The sequence below is based on the recommended init steps */
+ /* detailed in the Intel PXA250 Operating Systems Developers Guide, */
+ /* Chapter 10. */
+ /* ---------------------------------------------------------------- */
+
+ /* ---------------------------------------------------------------- */
+ /* Step 1: Wait for at least 200 microsedonds to allow internal */
+ /* clocks to settle. Only necessary after hard reset... */
+ /* FIXME: can be optimized later */
+ /* ---------------------------------------------------------------- */
+
+ ldr r3, =OSCR /* reset the OS Timer Count to zero */
+ mov r2, #0
+ str r2, [r3]
+ ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
+ /* so 0x300 should be plenty */
+1:
+ ldr r2, [r3]
+ cmp r4, r2
+ bgt 1b
+
+mem_init:
+
+ ldr r1, =MEMC_BASE /* get memory controller base addr. */
+
+ /* ---------------------------------------------------------------- */
+ /* Step 2a: Initialize Asynchronous static memory controller */
+ /* ---------------------------------------------------------------- */
+
+ /* MSC registers: timing, bus width, mem type */
+
+ /* MSC0: nCS(0,1) */
+ ldr r2, =CFG_MSC0_VAL
+ str r2, [r1, #MSC0_OFFSET]
+ ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */
+ /* that data latches */
+ /* MSC1: nCS(2,3) */
+ ldr r2, =CFG_MSC1_VAL
+ str r2, [r1, #MSC1_OFFSET]
+ ldr r2, [r1, #MSC1_OFFSET]
+
+ /* MSC2: nCS(4,5) */
+ ldr r2, =CFG_MSC2_VAL
+ str r2, [r1, #MSC2_OFFSET]
+ ldr r2, [r1, #MSC2_OFFSET]
+
+ /* ---------------------------------------------------------------- */
+ /* Step 2b: Initialize Card Interface */
+ /* ---------------------------------------------------------------- */
+
+ /* MECR: Memory Expansion Card Register */
+ ldr r2, =CFG_MECR_VAL
+ str r2, [r1, #MECR_OFFSET]
+ ldr r2, [r1, #MECR_OFFSET]
+
+ /* MCMEM0: Card Interface slot 0 timing */
+ ldr r2, =CFG_MCMEM0_VAL
+ str r2, [r1, #MCMEM0_OFFSET]
+ ldr r2, [r1, #MCMEM0_OFFSET]
+
+ /* MCMEM1: Card Interface slot 1 timing */
+ ldr r2, =CFG_MCMEM1_VAL
+ str r2, [r1, #MCMEM1_OFFSET]
+ ldr r2, [r1, #MCMEM1_OFFSET]
+
+ /* MCATT0: Card Interface Attribute Space Timing, slot 0 */
+ ldr r2, =CFG_MCATT0_VAL
+ str r2, [r1, #MCATT0_OFFSET]
+ ldr r2, [r1, #MCATT0_OFFSET]
+
+ /* MCATT1: Card Interface Attribute Space Timing, slot 1 */
+ ldr r2, =CFG_MCATT1_VAL
+ str r2, [r1, #MCATT1_OFFSET]
+ ldr r2, [r1, #MCATT1_OFFSET]
+
+ /* MCIO0: Card Interface I/O Space Timing, slot 0 */
+ ldr r2, =CFG_MCIO0_VAL
+ str r2, [r1, #MCIO0_OFFSET]
+ ldr r2, [r1, #MCIO0_OFFSET]
+
+ /* MCIO1: Card Interface I/O Space Timing, slot 1 */
+ ldr r2, =CFG_MCIO1_VAL
+ str r2, [r1, #MCIO1_OFFSET]
+ ldr r2, [r1, #MCIO1_OFFSET]
+
+ /* ---------------------------------------------------------------- */
+ /* Step 2c: Write FLYCNFG FIXME: what's that??? */
+ /* ---------------------------------------------------------------- */
+ ldr r2, =CFG_FLYCNFG_VAL
+ str r2, [r1, #FLYCNFG_OFFSET]
+ str r2, [r1, #FLYCNFG_OFFSET]
+
+ /* ---------------------------------------------------------------- */
+ /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */
+ /* ---------------------------------------------------------------- */
+
+ /* Before accessing MDREFR we need a valid DRI field, so we set */
+ /* this to power on defaults + DRI field. */
+
+ ldr r4, [r1, #MDREFR_OFFSET]
+ ldr r2, =0xFFF
+ bic r4, r4, r2
+
+ ldr r3, =CFG_MDREFR_VAL
+ and r3, r3, r2
+
+ orr r4, r4, r3
+ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
+
+ orr r4, r4, #MDREFR_K0RUN
+ orr r4, r4, #MDREFR_K0DB4
+ orr r4, r4, #MDREFR_K0FREE
+ orr r4, r4, #MDREFR_K0DB2
+ orr r4, r4, #MDREFR_K1DB2
+ bic r4, r4, #MDREFR_K1FREE
+ bic r4, r4, #MDREFR_K2FREE
+
+ str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */
+ ldr r4, [r1, #MDREFR_OFFSET]
+
+ /* Note: preserve the mdrefr value in r4 */
+
+
+ /* ---------------------------------------------------------------- */
+ /* Step 3: Initialize Synchronous Static Memory (Flash/Peripherals) */
+ /* ---------------------------------------------------------------- */
+
+ /* Initialize SXCNFG register. Assert the enable bits */
+
+ /* Write SXMRS to cause an MRS command to all enabled banks of */
+ /* synchronous static memory. Note that SXLCR need not be written */
+ /* at this time. */
+
+ ldr r2, =CFG_SXCNFG_VAL
+ str r2, [r1, #SXCNFG_OFFSET]
+
+ /* ---------------------------------------------------------------- */
+ /* Step 4: Initialize SDRAM */
+ /* ---------------------------------------------------------------- */
+
+ bic r4, r4, #(MDREFR_K2FREE |MDREFR_K1FREE | MDREFR_K0FREE)
+
+ orr r4, r4, #MDREFR_K1RUN
+ bic r4, r4, #MDREFR_K2DB2
+ str r4, [r1, #MDREFR_OFFSET]
+ ldr r4, [r1, #MDREFR_OFFSET]
+
+ bic r4, r4, #MDREFR_SLFRSH
+ str r4, [r1, #MDREFR_OFFSET]
+ ldr r4, [r1, #MDREFR_OFFSET]
+
+ orr r4, r4, #MDREFR_E1PIN
+ str r4, [r1, #MDREFR_OFFSET]
+ ldr r4, [r1, #MDREFR_OFFSET]
+
+ nop
+ nop
+
+
+ /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */
+ /* configure but not enable each SDRAM partition pair. */
+
+ ldr r4, =CFG_MDCNFG_VAL
+ bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1)
+ bic r4, r4, #(MDCNFG_DE2|MDCNFG_DE3)
+
+ str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */
+ ldr r4, [r1, #MDCNFG_OFFSET]
+
+
+ /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */
+ /* 100..200 µsec. */
+
+ ldr r3, =OSCR /* reset the OS Timer Count to zero */
+ mov r2, #0
+ str r2, [r3]
+ ldr r4, =0x300 /* really 0x2E1 is about 200usec, */
+ /* so 0x300 should be plenty */
+1:
+ ldr r2, [r3]
+ cmp r4, r2
+ bgt 1b
+
+
+ /* Step 4f: Trigger a number (usually 8) refresh cycles by */
+ /* attempting non-burst read or write accesses to disabled */
+ /* SDRAM, as commonly specified in the power up sequence */
+ /* documented in SDRAM data sheets. The address(es) used */
+ /* for this purpose must not be cacheable. */
+
+ ldr r3, =CFG_DRAM_BASE
+ str r2, [r3]
+ str r2, [r3]
+ str r2, [r3]
+ str r2, [r3]
+ str r2, [r3]
+ str r2, [r3]
+ str r2, [r3]
+ str r2, [r3]
+
+
+ /* Step 4g: Write MDCNFG with enable bits asserted */
+ /* (MDCNFG:DEx set to 1). */
+
+ ldr r3, [r1, #MDCNFG_OFFSET]
+ mov r4, r3
+ orr r3, r3, #MDCNFG_DE0
+ str r3, [r1, #MDCNFG_OFFSET]
+ mov r0, r3
+
+ /* Step 4h: Write MDMRS. */
+
+ ldr r2, =CFG_MDMRS_VAL
+ str r2, [r1, #MDMRS_OFFSET]
+
+ /* enable APD */
+ ldr r3, [r1, #MDREFR_OFFSET]
+ orr r3, r3, #MDREFR_APD
+ str r3, [r1, #MDREFR_OFFSET]
+
+ /* We are finished with Intel's memory controller initialisation */
+
+
+setvoltage:
+
+ mov r10, lr
+ bl initPXAvoltage /* In case the board is rebooting with a */
+ mov lr, r10 /* low voltage raise it up to a good one. */
+
+#if 1
+ b initirqs
+#endif
+
+wakeup:
+ /* Are we waking from sleep? */
+ ldr r0, =RCSR
+ ldr r1, [r0]
+ and r1, r1, #(RCSR_GPR | RCSR_SMR | RCSR_WDR | RCSR_HWR)
+ str r1, [r0]
+ teq r1, #RCSR_SMR
+
+ bne initirqs
+
+ ldr r0, =PSSR
+ mov r1, #PSSR_PH
+ str r1, [r0]
+
+ /* if so, resume at PSPR */
+ ldr r0, =PSPR
+ ldr r1, [r0]
+ mov pc, r1
+
+ /* ---------------------------------------------------------------- */
+ /* Disable (mask) all interrupts at interrupt controller */
+ /* ---------------------------------------------------------------- */
+
+initirqs:
+
+ mov r1, #0 /* clear int. level register (IRQ, not FIQ) */
+ ldr r2, =ICLR
+ str r1, [r2]
+
+ ldr r2, =ICMR /* mask all interrupts at the controller */
+ str r1, [r2]
+
+ /* ---------------------------------------------------------------- */
+ /* Clock initialisation */
+ /* ---------------------------------------------------------------- */
+
+initclks:
+
+ /* Disable the peripheral clocks, and set the core clock frequency */
+
+ /* Turn Off on-chip peripheral clocks (except for memory) */
+ /* for re-configuration. */
+ ldr r1, =CKEN
+ ldr r2, =CFG_CKEN
+ str r2, [r1]
+
+ /* ... and write the core clock config register */
+ ldr r2, =CFG_CCCR
+ ldr r1, =CCCR
+ str r2, [r1]
+
+ /* Turn on turbo mode */
+ mrc p14, 0, r2, c6, c0, 0
+ orr r2, r2, #0xB /* Turbo, Fast-Bus, Freq change**/
+ mcr p14, 0, r2, c6, c0, 0
+
+ /* Re-write MDREFR */
+ ldr r1, =MEMC_BASE
+ ldr r2, [r1, #MDREFR_OFFSET]
+ str r2, [r1, #MDREFR_OFFSET]
+#ifdef RTC
+ /* enable the 32Khz oscillator for RTC and PowerManager */
+ ldr r1, =OSCC
+ mov r2, #OSCC_OON
+ str r2, [r1]
+
+ /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */
+ /* has settled. */
+60:
+ ldr r2, [r1]
+ ands r2, r2, #1
+ beq 60b
+#else
+#error "RTC not defined"
+#endif
+
+ /* Interrupt init: Mask all interrupts */
+ ldr r0, =ICMR /* enable no sources */
+ mov r1, #0
+ str r1, [r0]
+ /* FIXME */
+
+#ifdef NODEBUG
+ /*Disable software and data breakpoints */
+ mov r0,#0
+ mcr p15,0,r0,c14,c8,0 /* ibcr0 */
+ mcr p15,0,r0,c14,c9,0 /* ibcr1 */
+ mcr p15,0,r0,c14,c4,0 /* dbcon */
+
+ /*Enable all debug functionality */
+ mov r0,#0x80000000
+ mcr p14,0,r0,c10,c0,0 /* dcsr */
+#endif
+
+ /* ---------------------------------------------------------------- */
+ /* End lowlevel_init */
+ /* ---------------------------------------------------------------- */
+
+endlowlevel_init:
+
+ mov pc, lr
diff --git a/board/trizepsiv/pxavoltage.S b/board/trizepsiv/pxavoltage.S
new file mode 100644
index 0000000..9659c2b
--- /dev/null
+++ b/board/trizepsiv/pxavoltage.S
@@ -0,0 +1,29 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Gmbh, sbabic@denx.de
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <asm/arch/pxa-regs.h>
+
+ .global initPXAvoltage
+
+initPXAvoltage:
+ mov pc, lr
diff --git a/board/trizepsiv/u-boot.lds b/board/trizepsiv/u-boot.lds
new file mode 100644
index 0000000..f010239
--- /dev/null
+++ b/board/trizepsiv/u-boot.lds
@@ -0,0 +1,56 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ . = 0x00000000;
+
+ . = ALIGN(4);
+ .text :
+ {
+ cpu/pxa/start.o (.text)
+ *(.text)
+ }
+
+ . = ALIGN(4);
+ .rodata : { *(.rodata) }
+
+ . = ALIGN(4);
+ .data : { *(.data) }
+
+ . = ALIGN(4);
+ .got : { *(.got) }
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = ALIGN(4);
+ __bss_start = .;
+ .bss : { *(.bss) }
+ _end = .;
+}
diff --git a/board/uc100/pcmcia.c b/board/uc100/pcmcia.c
index 6e4b6d6..407bdb7 100644
--- a/board/uc100/pcmcia.c
+++ b/board/uc100/pcmcia.c
@@ -4,11 +4,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if (defined(CONFIG_CMD_IDE)) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -123,7 +123,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
volatile immap_t *immap;
@@ -149,7 +149,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
diff --git a/board/uc101/config.mk b/board/uc101/config.mk
index 51e8e84c..4fe1831 100644
--- a/board/uc101/config.mk
+++ b/board/uc101/config.mk
@@ -39,3 +39,4 @@
endif
PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -I$(TOPDIR)/board
+LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot-customlayout.lds
diff --git a/board/uc101/u-boot.lds b/board/uc101/u-boot.lds
deleted file mode 100644
index 123a14c..0000000
--- a/board/uc101/u-boot.lds
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * (C) Copyright 2003-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- /* WARNING - the following is hand-optimized to fit within */
- /* the sector layout of our flash chips! XXX FIXME XXX */
-
- cpu/mpc5xxx/start.o (.text)
- cpu/mpc5xxx/traps.o (.text)
- lib_generic/crc32.o (.text)
- lib_ppc/cache.o (.text)
- lib_ppc/time.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.ppcenv)
-
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/utx8245/u-boot.lds b/board/utx8245/u-boot.lds
deleted file mode 100644
index 45f3018..0000000
--- a/board/utx8245/u-boot.lds
+++ /dev/null
@@ -1,141 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * (C) Copyright 2002
- * Gregory E. Allen, gallen@arlut.utexas.edu
- * Matthew E. Karger, karger@arlut.utexas.edu
- * Applied Research Laboratories, The University of Texas at Austin
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc824x/start.o (.text)
- lib_ppc/board.o (.text)
- lib_ppc/ppcstring.o (.text)
- lib_generic/vsprintf.o (.text)
- lib_generic/crc32.o (.text)
- lib_generic/zlib.o (.text)
-
- . = DEFINED(env_offset) ? env_offset : .;
- common/environment.o (.text)
-
- *(.text)
-
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
-
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/v38b/u-boot.lds b/board/v38b/u-boot.lds
deleted file mode 100644
index 4fdea6b..0000000
--- a/board/v38b/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2003-2006
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
-/* Do we need any of these for elf?
- __DYNAMIC = 0; */
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc5xxx/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
diff --git a/board/v38b/v38b.c b/board/v38b/v38b.c
index ace4aa2..ec032ee 100644
--- a/board/v38b/v38b.c
+++ b/board/v38b/v38b.c
@@ -224,7 +224,7 @@
}
-#if defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_RESET)
void init_ide_reset(void)
{
debug("init_ide_reset\n");
@@ -248,7 +248,7 @@
} else
*(vu_long *) MPC5XXX_WU_GPIO_DATA_O |= GPIO_PSC1_4;
}
-#endif /* defined (CFG_CMD_IDE) && defined (CONFIG_IDE_RESET) */
+#endif
#ifdef CONFIG_HW_WATCHDOG
diff --git a/board/w7o/cmd_vpd.c b/board/w7o/cmd_vpd.c
index 449089e..fdd6ceb 100644
--- a/board/w7o/cmd_vpd.c
+++ b/board/w7o/cmd_vpd.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BSP)
+#if defined(CONFIG_CMD_BSP)
#include "vpd.h"
@@ -63,4 +63,4 @@
" - Read VPD Data from default address, or device address 'dev_addr'.\n"
);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BSP) */
+#endif
diff --git a/board/xilinx/ml300/serial.c b/board/xilinx/ml300/serial.c
index 9b03f89..ba41f85 100644
--- a/board/xilinx/ml300/serial.c
+++ b/board/xilinx/ml300/serial.c
@@ -122,7 +122,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void
kgdb_serial_init(void)
{
@@ -151,4 +151,4 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/board/xilinx/ml401/config.mk b/board/xilinx/ml401/config.mk
index 807f169..c75daaf 100644
--- a/board/xilinx/ml401/config.mk
+++ b/board/xilinx/ml401/config.mk
@@ -25,7 +25,7 @@
# Version: Xilinx EDK 6.3 EDK_Gmm.12.3
#
-TEXT_BASE = 0x12000000
+TEXT_BASE = 0x29000000
PLATFORM_CPPFLAGS += -mno-xl-soft-mul
PLATFORM_CPPFLAGS += -mno-xl-soft-div
diff --git a/board/xilinx/ml401/ml401.c b/board/xilinx/ml401/ml401.c
index b48103f..955936d 100644
--- a/board/xilinx/ml401/ml401.c
+++ b/board/xilinx/ml401/ml401.c
@@ -27,6 +27,8 @@
#include <common.h>
#include <config.h>
+#include <asm/microblaze_intc.h>
+#include <asm/asm.h>
void do_reset (void)
{
@@ -43,7 +45,25 @@
int gpio_init (void)
{
#ifdef CFG_GPIO_0
- *((unsigned long *)(CFG_GPIO_0_ADDR)) = 0x0;
+ *((unsigned long *)(CFG_GPIO_0_ADDR)) = 0xFFFFFFFF;
#endif
return 0;
}
+
+#ifdef CFG_FSL_2
+void fsl_isr2 (void *arg) {
+ volatile int num;
+ *((unsigned int *)(CFG_GPIO_0_ADDR + 0x4)) =
+ ++(*((unsigned int *)(CFG_GPIO_0_ADDR + 0x4)));
+ GET (num, 2);
+ NGET (num, 2);
+ puts("*");
+}
+
+void fsl_init2 (void) {
+ puts("fsl_init2\n");
+ install_interrupt_handler (FSL_INTR_2,\
+ fsl_isr2,\
+ NULL);
+}
+#endif
diff --git a/board/xilinx/ml401/xparameters.h b/board/xilinx/ml401/xparameters.h
index 18d24f9..1a116ea 100644
--- a/board/xilinx/ml401/xparameters.h
+++ b/board/xilinx/ml401/xparameters.h
@@ -21,47 +21,55 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*
- *
* CAUTION: This file is automatically generated by libgen.
- * Version: Xilinx EDK 6.3 EDK_Gmm.12.3
+ * Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
*/
/* System Clock Frequency */
-#define XILINX_CLOCK_FREQ 66666667
+#define XILINX_CLOCK_FREQ 100000000
-/* Interrupt controller is intc_0 */
-#define XILINX_INTC_BASEADDR 0xd1000fc0
-#define XILINX_INTC_NUM_INTR_INPUTS 12
+/* Microblaze is microblaze_0 */
+#define XILINX_USE_MSR_INSTR 1
+#define XILINX_FSL_NUMBER 3
-/* Timer pheriphery is opb_timer_0 */
-#define XILINX_TIMER_BASEADDR 0xa2000000
+/* Interrupt controller is opb_intc_0 */
+#define XILINX_INTC_BASEADDR 0x41200000
+#define XILINX_INTC_NUM_INTR_INPUTS 6
+
+/* Timer pheriphery is opb_timer_1 */
+#define XILINX_TIMER_BASEADDR 0x41c00000
#define XILINX_TIMER_IRQ 0
-/* Uart pheriphery is console_uart */
-#define XILINX_UART_BASEADDR 0xa0000000
+/* Uart pheriphery is RS232_Uart */
+#define XILINX_UART_BASEADDR 0x40600000
#define XILINX_UART_BAUDRATE 115200
-/* GPIO is opb_gpio_0*/
-#define XILINX_GPIO_BASEADDR 0x90000000
+/* IIC pheriphery is IIC_EEPROM */
+#define XILINX_IIC_0_BASEADDR 0x40800000
+#define XILINX_IIC_0_FREQ 100000
+#define XILINX_IIC_0_BIT 0
-/* Flash Memory is opb_emc_0 */
-#define XILINX_FLASH_START 0x28000000
+/* GPIO is LEDs_4Bit*/
+#define XILINX_GPIO_BASEADDR 0x40000000
+
+/* Flash Memory is FLASH_2Mx32 */
+#define XILINX_FLASH_START 0x2c000000
#define XILINX_FLASH_SIZE 0x00800000
-/* Main Memory is plb_ddr_0 */
-#define XILINX_RAM_START 0x10000000
-#define XILINX_RAM_SIZE 0x10000000
+/* Main Memory is DDR_SDRAM_64Mx32 */
+#define XILINX_RAM_START 0x28000000
+#define XILINX_RAM_SIZE 0x04000000
-/* Sysace Controller is opb_sysace_0 */
-#define XILINX_SYSACE_BASEADDR 0xCF000000
-#define XILINX_SYSACE_HIGHADDR 0xCF0001FF
+/* Sysace Controller is SysACE_CompactFlash */
+#define XILINX_SYSACE_BASEADDR 0x41800000
+#define XILINX_SYSACE_HIGHADDR 0x4180ffff
#define XILINX_SYSACE_MEM_WIDTH 16
-/* Ethernet controller is opb_ethernet_0 */
+/* Ethernet controller is Ethernet_MAC */
#define XPAR_XEMAC_NUM_INSTANCES 1
#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x60000000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x60003FFF
+#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000
+#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff
#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
diff --git a/board/xpedite1k/xpedite1k.c b/board/xpedite1k/xpedite1k.c
index a569b53..8411cf0 100644
--- a/board/xpedite1k/xpedite1k.c
+++ b/board/xpedite1k/xpedite1k.c
@@ -209,7 +209,7 @@
* certain pre-initialization actions.
*
************************************************************************/
-#if defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI)
int pci_pre_init(struct pci_controller * hose )
{
unsigned long strap;
@@ -227,7 +227,7 @@
#endif
return 1;
}
-#endif /* defined(CONFIG_PCI) && defined(CFG_PCI_PRE_INIT) */
+#endif /* defined(CONFIG_PCI) */
/*************************************************************************
* pci_target_init
diff --git a/board/zeus/Makefile b/board/zeus/Makefile
new file mode 100644
index 0000000..f0d4e9f
--- /dev/null
+++ b/board/zeus/Makefile
@@ -0,0 +1,51 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(BOARD).a
+
+COBJS = $(BOARD).o update.o
+SOBJS =
+
+SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+SOBJS := $(addprefix $(obj),$(SOBJS))
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/board/zeus/config.mk b/board/zeus/config.mk
new file mode 100644
index 0000000..1bdf5e4
--- /dev/null
+++ b/board/zeus/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2000
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+TEXT_BASE = 0xFFFC0000
diff --git a/board/zeus/u-boot.lds b/board/zeus/u-boot.lds
new file mode 100644
index 0000000..73b83eb
--- /dev/null
+++ b/board/zeus/u-boot.lds
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2000
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ .resetvec 0xFFFFFFFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/ppc4xx/start.o (.text)
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/board/zeus/update.c b/board/zeus/update.c
new file mode 100644
index 0000000..c76519f
--- /dev/null
+++ b/board/zeus/update.c
@@ -0,0 +1,105 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <command.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+#include <i2c.h>
+
+#if defined(CONFIG_ZEUS)
+
+u8 buf_zeus_ce[] = {
+/*00 01 02 03 04 05 06 07 */
+ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*08 09 0a 0b 0c 0d 0e 0f */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*10 11 12 13 14 15 16 17 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*18 19 1a 1b 1c 1d 1e 1f */
+ 0x00, 0xc0, 0x50, 0x12, 0x72, 0x3e, 0x00, 0x00 };
+
+u8 buf_zeus_pe[] = {
+
+/* CPU_CLOCK_DIV 1 = 00
+ CPU_PLB_FREQ_DIV 3 = 10
+ OPB_PLB_FREQ_DIV 2 = 01
+ EBC_PLB_FREQ_DIV 2 = 00
+ MAL_PLB_FREQ_DIV 1 = 00
+ PCI_PLB_FRQ_DIV 3 = 10
+ PLL_PLLOUTA = IS SET
+ PLL_OPERATING = IS NOT SET
+ PLL_FDB_MUL 10 = 1010
+ PLL_FWD_DIV_A 3 = 101
+ PLL_FWD_DIV_B 3 = 101
+ TUNE = 0x2be */
+/*00 01 02 03 04 05 06 07 */
+ 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*08 09 0a 0b 0c 0d 0e 0f */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*10 11 12 13 14 15 16 17 */
+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+/*18 19 1a 1b 1c 1d 1e 1f */
+ 0x00, 0x60, 0x68, 0x2d, 0x42, 0xbe, 0x00, 0x00 };
+
+static int update_boot_eeprom(void)
+{
+ u32 len = 0x20;
+ u8 chip = CFG_I2C_EEPROM_ADDR;
+ u8 *pbuf;
+ u8 base;
+ int i;
+
+ if (in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_ZEUS_PE)) {
+ pbuf = buf_zeus_pe;
+ base = 0x40;
+ } else {
+ pbuf = buf_zeus_ce;
+ base = 0x00;
+ }
+
+ for (i = 0; i < len; i++, base++) {
+ if (i2c_write(chip, base, 1, &pbuf[i], 1) != 0) {
+ printf("i2c_write fail\n");
+ return 1;
+ }
+ udelay(11000);
+ }
+
+ return 0;
+}
+
+int do_update_boot_eeprom(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[])
+{
+ return update_boot_eeprom();
+}
+
+U_BOOT_CMD (
+ update_boot_eeprom, 1, 1, do_update_boot_eeprom,
+ "update_boot_eeprom - update boot eeprom content\n",
+ NULL
+);
+
+#endif
diff --git a/board/zeus/zeus.c b/board/zeus/zeus.c
new file mode 100644
index 0000000..4ab853f
--- /dev/null
+++ b/board/zeus/zeus.c
@@ -0,0 +1,511 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <command.h>
+#include <malloc.h>
+#include <environment.h>
+#include <logbuff.h>
+#include <post.h>
+
+#include <asm/processor.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define REBOOT_MAGIC 0x07081967
+#define REBOOT_NOP 0x00000000
+#define REBOOT_DO_POST 0x00000001
+
+extern flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+extern env_t *env_ptr;
+extern uchar default_environment[];
+
+ulong flash_get_size(ulong base, int banknum);
+void env_crc_update(void);
+int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+
+static u32 start_time;
+
+int board_early_init_f(void)
+{
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uicer, 0x00000000); /* disable all ints */
+ mtdcr(uiccr, 0x00000000);
+ mtdcr(uicpr, 0xFFFF7F00); /* set int polarities */
+ mtdcr(uictr, 0x00000000); /* set int trigger levels */
+ mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest priority */
+
+ /*
+ * Configure CPC0_PCI to enable PerWE as output
+ */
+ mtdcr(cpc0_pci, CPC0_PCI_SPE);
+
+ return 0;
+}
+
+int misc_init_r(void)
+{
+ u32 pbcr;
+ int size_val = 0;
+ u32 post_magic;
+ u32 post_val;
+
+ post_magic = in_be32((void *)CFG_POST_MAGIC);
+ post_val = in_be32((void *)CFG_POST_VAL);
+ if ((post_magic == REBOOT_MAGIC) && (post_val == REBOOT_DO_POST)) {
+ /*
+ * Set special bootline bootparameter to pass this POST boot
+ * mode to Linux to reset the username/password
+ */
+ setenv("addmisc", "setenv bootargs \\${bootargs} factory_reset=yes");
+
+ /*
+ * Normally don't run POST tests, only when enabled
+ * via the sw-reset button. So disable further tests
+ * upon next bootup here.
+ */
+ out_be32((void *)CFG_POST_VAL, REBOOT_NOP);
+ } else {
+ /*
+ * Only run POST when initiated via the sw-reset button mechanism
+ */
+ post_word_store(0);
+ }
+
+ /*
+ * Get current time
+ */
+ start_time = get_timer(0);
+
+ /*
+ * FLASH stuff...
+ */
+
+ /* Re-do sizing to get full correct info */
+
+ /* adjust flash start and offset */
+ mfebc(pb0cr, pbcr);
+ switch (gd->bd->bi_flashsize) {
+ case 1 << 20:
+ size_val = 0;
+ break;
+ case 2 << 20:
+ size_val = 1;
+ break;
+ case 4 << 20:
+ size_val = 2;
+ break;
+ case 8 << 20:
+ size_val = 3;
+ break;
+ case 16 << 20:
+ size_val = 4;
+ break;
+ case 32 << 20:
+ size_val = 5;
+ break;
+ case 64 << 20:
+ size_val = 6;
+ break;
+ case 128 << 20:
+ size_val = 7;
+ break;
+ }
+ pbcr = (pbcr & 0x0001ffff) | gd->bd->bi_flashstart | (size_val << 17);
+ mtebc(pb0cr, pbcr);
+
+ /*
+ * Re-check to get correct base address
+ */
+ flash_get_size(gd->bd->bi_flashstart, 0);
+
+ /* Monitor protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ -CFG_MONITOR_LEN,
+ 0xffffffff,
+ &flash_info[0]);
+
+ /* Env protection ON by default */
+ (void)flash_protect(FLAG_PROTECT_SET,
+ CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+ &flash_info[0]);
+
+ return 0;
+}
+
+/*
+ * Check Board Identity:
+ */
+int checkboard(void)
+{
+ char *s = getenv("serial#");
+
+ puts("Board: Zeus-");
+
+ if (in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_ZEUS_PE))
+ puts("PE");
+ else
+ puts("CE");
+
+ puts(" of BulletEndPoint");
+
+ if (s != NULL) {
+ puts(", serial# ");
+ puts(s);
+ }
+ putc('\n');
+
+ /* both LED's off */
+ gpio_write_bit(CFG_GPIO_LED_RED, 0);
+ gpio_write_bit(CFG_GPIO_LED_GREEN, 0);
+ udelay(10000);
+ /* and on again */
+ gpio_write_bit(CFG_GPIO_LED_RED, 1);
+ gpio_write_bit(CFG_GPIO_LED_GREEN, 1);
+
+ return (0);
+}
+
+static u32 detect_sdram_size(void)
+{
+ u32 val;
+ u32 size;
+
+ mfsdram(mem_mb0cf, val);
+ size = (4 << 20) << ((val & 0x000e0000) >> 17);
+
+ /*
+ * Check if 2nd bank is enabled too
+ */
+ mfsdram(mem_mb1cf, val);
+ if (val & 1)
+ size += (4 << 20) << ((val & 0x000e0000) >> 17);
+
+ return size;
+}
+
+long int initdram (int board_type)
+{
+ return detect_sdram_size();
+}
+
+#if defined(CFG_DRAM_TEST)
+int testdram(void)
+{
+ unsigned long *mem = (unsigned long *)0;
+ const unsigned long kend = (1024 / sizeof(unsigned long));
+ unsigned long k, n;
+ unsigned long msr;
+ unsigned long total_kbytes;
+
+ total_kbytes = detect_sdram_size();
+
+ msr = mfmsr();
+ mtmsr(msr & ~(MSR_EE));
+
+ for (k = 0; k < total_kbytes ;
+ ++k, mem += (1024 / sizeof(unsigned long))) {
+ if ((k & 1023) == 0) {
+ printf("%3d MB\r", k / 1024);
+ }
+
+ memset(mem, 0xaaaaaaaa, 1024);
+ for (n = 0; n < kend; ++n) {
+ if (mem[n] != 0xaaaaaaaa) {
+ printf("SDRAM test fails at: %08x\n",
+ (uint) & mem[n]);
+ return 1;
+ }
+ }
+
+ memset(mem, 0x55555555, 1024);
+ for (n = 0; n < kend; ++n) {
+ if (mem[n] != 0x55555555) {
+ printf("SDRAM test fails at: %08x\n",
+ (uint) & mem[n]);
+ return 1;
+ }
+ }
+ }
+ printf("SDRAM test passes\n");
+ mtmsr(msr);
+
+ return 0;
+}
+#endif
+
+static int default_env_var(char *buf, char *var)
+{
+ char *ptr;
+ char *val;
+
+ /*
+ * Find env variable
+ */
+ ptr = strstr(buf + 4, var);
+ if (ptr == NULL) {
+ printf("ERROR: %s not found!\n", var);
+ return -1;
+ }
+ ptr += strlen(var) + 1;
+
+ /*
+ * Now the ethaddr needs to be updated in the "normal"
+ * environment storage -> redundant flash.
+ */
+ val = ptr;
+ setenv(var, val);
+ printf("Updated %s from eeprom to %s!\n", var, val);
+
+ return 0;
+}
+
+static int restore_default(void)
+{
+ char *buf;
+ char *buf_save;
+ u32 crc;
+
+ /*
+ * Unprotect and erase environment area
+ */
+ flash_protect(FLAG_PROTECT_CLEAR,
+ CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1,
+ &flash_info[0]);
+
+ flash_sect_erase(CFG_ENV_ADDR_REDUND,
+ CFG_ENV_ADDR_REDUND + 2*CFG_ENV_SECT_SIZE - 1);
+
+ /*
+ * Now restore default environment from U-Boot image
+ * -> ipaddr, serverip...
+ */
+ memset(env_ptr, 0, sizeof(env_t));
+ memcpy(env_ptr->data, default_environment, ENV_SIZE);
+#ifdef CFG_REDUNDAND_ENVIRONMENT
+ env_ptr->flags = 0xFF;
+#endif
+ env_crc_update();
+ gd->env_valid = 1;
+
+ /*
+ * Read board specific values from I2C EEPROM
+ * and set env variables accordingly
+ * -> ethaddr, eth1addr, serial#
+ */
+ buf = buf_save = malloc(FACTORY_RESET_ENV_SIZE);
+ if (eeprom_read(FACTORY_RESET_I2C_EEPROM, FACTORY_RESET_ENV_OFFS,
+ (u8 *)buf, FACTORY_RESET_ENV_SIZE)) {
+ puts("\nError reading EEPROM!\n");
+ } else {
+ crc = crc32(0, (u8 *)(buf + 4), FACTORY_RESET_ENV_SIZE - 4);
+ if (crc != *(u32 *)buf) {
+ printf("ERROR: crc mismatch %08lx %08lx\n", crc, *(u32 *)buf);
+ return -1;
+ }
+
+ default_env_var(buf, "ethaddr");
+ buf += 8 + 18;
+ default_env_var(buf, "eth1addr");
+ buf += 9 + 18;
+ default_env_var(buf, "serial#");
+ }
+
+ /*
+ * Finally save updated env variables back to flash
+ */
+ saveenv();
+
+ free(buf_save);
+
+ return 0;
+}
+
+int do_set_default(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ char *buf;
+ char *buf_save;
+ char str[32];
+ u32 crc;
+ char var[32];
+
+ if (argc < 4) {
+ puts("ERROR!\n");
+ return -1;
+ }
+
+ buf = buf_save = malloc(FACTORY_RESET_ENV_SIZE);
+ memset(buf, 0, FACTORY_RESET_ENV_SIZE);
+
+ strcpy(var, "ethaddr");
+ printf("Setting %s to %s\n", var, argv[1]);
+ sprintf(str, "%s=%s", var, argv[1]);
+ strcpy(buf + 4, str);
+ buf += strlen(str) + 1;
+
+ strcpy(var, "eth1addr");
+ printf("Setting %s to %s\n", var, argv[2]);
+ sprintf(str, "%s=%s", var, argv[2]);
+ strcpy(buf + 4, str);
+ buf += strlen(str) + 1;
+
+ strcpy(var, "serial#");
+ printf("Setting %s to %s\n", var, argv[3]);
+ sprintf(str, "%s=%s", var, argv[3]);
+ strcpy(buf + 4, str);
+
+ crc = crc32(0, (u8 *)(buf_save + 4), FACTORY_RESET_ENV_SIZE - 4);
+ *(u32 *)buf_save = crc;
+
+ if (eeprom_write(FACTORY_RESET_I2C_EEPROM, FACTORY_RESET_ENV_OFFS,
+ (u8 *)buf_save, FACTORY_RESET_ENV_SIZE)) {
+ puts("\nError writing EEPROM!\n");
+ return -1;
+ }
+
+ free(buf_save);
+
+ return 0;
+}
+
+U_BOOT_CMD(
+ setdef, 4, 1, do_set_default,
+ "setdef - write board-specific values to EEPROM (ethaddr...)\n",
+ "ethaddr eth1addr serial#\n - write board-specific values to EEPROM\n"
+ );
+
+static inline int sw_reset_pressed(void)
+{
+ return !(in_be32((void *)GPIO0_IR) & GPIO_VAL(CFG_GPIO_SW_RESET));
+}
+
+int do_chkreset(cmd_tbl_t* cmdtp, int flag, int argc, char* argv[])
+{
+ int delta;
+ int count = 0;
+ int post = 0;
+ int factory_reset = 0;
+
+ if (!sw_reset_pressed()) {
+ printf("SW-Reset already high (Button released)\n");
+ printf("-> No action taken!\n");
+ return 0;
+ }
+
+ printf("Waiting for SW-Reset button to be released.");
+
+ while (1) {
+ delta = get_timer(start_time);
+ if (!sw_reset_pressed())
+ break;
+
+ if ((delta > CFG_TIME_POST) && !post) {
+ printf("\nWhen released now, POST tests will be started.");
+ gpio_write_bit(CFG_GPIO_LED_GREEN, 0);
+ post = 1;
+ }
+
+ if ((delta > CFG_TIME_FACTORY_RESET) && !factory_reset) {
+ printf("\nWhen released now, factory default values"
+ " will be restored.");
+ gpio_write_bit(CFG_GPIO_LED_RED, 0);
+ factory_reset = 1;
+ }
+
+ udelay(1000);
+ if (!(count++ % 1000))
+ printf(".");
+ }
+
+
+ printf("\nSW-Reset Button released after %d milli-seconds!\n", delta);
+
+ if (delta > CFG_TIME_FACTORY_RESET) {
+ printf("Starting factory reset value restoration...\n");
+
+ /*
+ * Restore default setting
+ */
+ restore_default();
+
+ /*
+ * Reset the board for default to become valid
+ */
+ do_reset(NULL, 0, 0, NULL);
+
+ return 0;
+ }
+
+ if (delta > CFG_TIME_POST) {
+ printf("Starting POST configuration...\n");
+
+ /*
+ * Enable POST upon next bootup
+ */
+ out_be32((void *)CFG_POST_MAGIC, REBOOT_MAGIC);
+ out_be32((void *)CFG_POST_VAL, REBOOT_DO_POST);
+ post_bootmode_init();
+
+ /*
+ * Reset the logbuffer for a clean start
+ */
+ logbuff_reset();
+
+ do_reset(NULL, 0, 0, NULL);
+
+ return 0;
+ }
+
+ return 0;
+}
+
+U_BOOT_CMD (
+ chkreset, 1, 1, do_chkreset,
+ "chkreset- Check for status of SW-reset button and act accordingly\n",
+ NULL
+);
+
+#if defined(CONFIG_POST)
+/*
+ * Returns 1 if keys pressed to start the power-on long-running tests
+ * Called from board_init_f().
+ */
+int post_hotkeys_pressed(void)
+{
+ u32 post_magic;
+ u32 post_val;
+
+ post_magic = in_be32((void *)CFG_POST_MAGIC);
+ post_val = in_be32((void *)CFG_POST_VAL);
+
+ if ((post_magic == REBOOT_MAGIC) && (post_val == REBOOT_DO_POST))
+ return 1;
+ else
+ return 0;
+}
+#endif /* CONFIG_POST */
diff --git a/board/zpc1900/u-boot.lds b/board/zpc1900/u-boot.lds
deleted file mode 100644
index 18c4b46..0000000
--- a/board/zpc1900/u-boot.lds
+++ /dev/null
@@ -1,125 +0,0 @@
-/*
- * (C) Copyright 2001
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * Modified by Yuli Barcohen <yuli@arabellasw.com>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-OUTPUT_ARCH(powerpc)
-SECTIONS
-{
- /* Read-only sections, merged into text segment: */
- . = + SIZEOF_HEADERS;
- .interp : { *(.interp) }
- .hash : { *(.hash) }
- .dynsym : { *(.dynsym) }
- .dynstr : { *(.dynstr) }
- .rel.text : { *(.rel.text) }
- .rela.text : { *(.rela.text) }
- .rel.data : { *(.rel.data) }
- .rela.data : { *(.rela.data) }
- .rel.rodata : { *(.rel.rodata) }
- .rela.rodata : { *(.rela.rodata) }
- .rel.got : { *(.rel.got) }
- .rela.got : { *(.rela.got) }
- .rel.ctors : { *(.rel.ctors) }
- .rela.ctors : { *(.rela.ctors) }
- .rel.dtors : { *(.rel.dtors) }
- .rela.dtors : { *(.rela.dtors) }
- .rel.bss : { *(.rel.bss) }
- .rela.bss : { *(.rela.bss) }
- .rel.plt : { *(.rel.plt) }
- .rela.plt : { *(.rela.plt) }
- .init : { *(.init) }
- .plt : { *(.plt) }
- .text :
- {
- cpu/mpc8260/start.o (.text)
- *(.text)
- *(.fixup)
- *(.got1)
- . = ALIGN(16);
- *(.rodata)
- *(.rodata1)
- *(.rodata.str1.4)
- *(.eh_frame)
- }
- .fini : { *(.fini) } =0
- .ctors : { *(.ctors) }
- .dtors : { *(.dtors) }
-
- /* Read-write section, merged into data segment: */
- . = (. + 0x0FFF) & 0xFFFFF000;
- _erotext = .;
- PROVIDE (erotext = .);
- .reloc :
- {
- *(.got)
- _GOT2_TABLE_ = .;
- *(.got2)
- _FIXUP_TABLE_ = .;
- *(.fixup)
- }
- __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
- __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
-
- .data :
- {
- *(.data)
- *(.data1)
- *(.sdata)
- *(.sdata2)
- *(.dynamic)
- CONSTRUCTORS
- }
- _edata = .;
- PROVIDE (edata = .);
-
- . = .;
- __u_boot_cmd_start = .;
- .u_boot_cmd : { *(.u_boot_cmd) }
- __u_boot_cmd_end = .;
-
-
- . = .;
- __start___ex_table = .;
- __ex_table : { *(__ex_table) }
- __stop___ex_table = .;
-
- . = ALIGN(4096);
- __init_begin = .;
- .text.init : { *(.text.init) }
- .data.init : { *(.data.init) }
- . = ALIGN(4096);
- __init_end = .;
-
- __bss_start = .;
- .bss :
- {
- *(.sbss) *(.scommon)
- *(.dynbss)
- *(.bss)
- *(COMMON)
- }
- _end = . ;
- PROVIDE (end = .);
-}
-ENTRY(_start)
diff --git a/board/zylonite/nand.c b/board/zylonite/nand.c
index a417143..aa3932a 100644
--- a/board/zylonite/nand.c
+++ b/board/zylonite/nand.c
@@ -22,7 +22,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#ifdef CONFIG_NEW_NAND_CODE
#include <nand.h>
diff --git a/common/Makefile b/common/Makefile
index 5dfd3a8..ef7d097 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -38,8 +38,8 @@
cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \
cmd_nand.o cmd_net.o cmd_nvedit.o \
cmd_pci.o cmd_pcmcia.o cmd_portio.o \
- cmd_reginfo.o cmd_reiser.o cmd_scsi.o cmd_spi.o cmd_universe.o \
- cmd_usb.o cmd_vfd.o \
+ cmd_reginfo.o cmd_reiser.o cmd_sata.o cmd_scsi.o cmd_spi.o \
+ cmd_universe.o cmd_usb.o cmd_vfd.o \
command.o console.o cyclon2.o devices.o dlmalloc.o docecc.o \
environment.o env_common.o \
env_nand.o env_dataflash.o env_flash.o env_eeprom.o \
@@ -50,7 +50,7 @@
memsize.o miiphybb.o miiphyutil.o \
s_record.o serial.o soft_i2c.o soft_spi.o spartan2.o spartan3.o \
usb.o usb_kbd.o usb_storage.o \
- virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o
+ virtex2.o xilinx.o crc16.o xyzModem.o cmd_mac.o cmd_mfsl.o
SRCS := $(AOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(AOBJS) $(COBJS))
diff --git a/common/bedbug.c b/common/bedbug.c
index 6966de7..3bf1fc3 100644
--- a/common/bedbug.c
+++ b/common/bedbug.c
@@ -2,7 +2,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
#include <linux/ctype.h>
#include <bedbug/bedbug.h>
@@ -1253,4 +1253,4 @@
* purpose.
*/
-#endif /* CONFIG_COMMANDS & CFG_CMD_BEDBUG */
+#endif
diff --git a/common/cmd_autoscript.c b/common/cmd_autoscript.c
index e325302..a6038a6 100644
--- a/common/cmd_autoscript.c
+++ b/common/cmd_autoscript.c
@@ -47,8 +47,7 @@
#include <hush.h>
#endif
-#if defined(CONFIG_AUTOSCRIPT) || \
- (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT )
+#if defined(CONFIG_AUTOSCRIPT) || defined(CONFIG_CMD_AUTOSCRIPT)
extern image_header_t header; /* from cmd_bootm.c */
int
@@ -150,9 +149,10 @@
return rcode;
}
-#endif /* CONFIG_AUTOSCRIPT || CFG_CMD_AUTOSCRIPT */
+#endif
+
/**************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+#if defined(CONFIG_CMD_AUTOSCRIPT)
int
do_autoscript (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -170,13 +170,13 @@
return rcode;
}
-#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT)
+#if defined(CONFIG_CMD_AUTOSCRIPT)
U_BOOT_CMD(
autoscr, 2, 0, do_autoscript,
"autoscr - run script from memory\n",
"[addr] - run script starting at addr"
" - A valid autoscr header must be present\n"
);
-#endif /* CFG_CMD_AUTOSCRIPT */
+#endif
-#endif /* CONFIG_AUTOSCRIPT || CFG_CMD_AUTOSCRIPT */
+#endif
diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c
index d97c09e..ef15a00 100644
--- a/common/cmd_bdinfo.c
+++ b/common/cmd_bdinfo.c
@@ -30,7 +30,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_BDI)
+#if defined(CONFIG_CMD_BDI)
static void print_num(const char *, ulong);
#ifndef CONFIG_ARM /* PowerPC and other */
@@ -167,7 +167,7 @@
print_num ("sram size", (ulong)bd->bi_sramsize);
#endif
-#if defined(CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
puts ("ethaddr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
@@ -195,7 +195,7 @@
print_num ("sram start ", (ulong)bd->bi_sramstart);
print_num ("sram size ", (ulong)bd->bi_sramsize);
#endif
-#if defined(CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
puts ("ethaddr =");
for (i=0; i<6; ++i) {
printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
@@ -207,6 +207,71 @@
return 0;
}
+#elif defined(CONFIG_M68K) /* M68K */
+static void print_str(const char *, const char *);
+
+int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+{
+ int i;
+ bd_t *bd = gd->bd;
+ char buf[32];
+
+ print_num ("memstart", (ulong)bd->bi_memstart);
+ print_num ("memsize", (ulong)bd->bi_memsize);
+ print_num ("flashstart", (ulong)bd->bi_flashstart);
+ print_num ("flashsize", (ulong)bd->bi_flashsize);
+ print_num ("flashoffset", (ulong)bd->bi_flashoffset);
+#if defined(CFG_INIT_RAM_ADDR)
+ print_num ("sramstart", (ulong)bd->bi_sramstart);
+ print_num ("sramsize", (ulong)bd->bi_sramsize);
+#endif
+#if defined(CFG_MBAR)
+ print_num ("mbar", bd->bi_mbar_base);
+#endif
+ print_str ("busfreq", strmhz(buf, bd->bi_busfreq));
+#ifdef CONFIG_PCI
+ print_str ("pcifreq", strmhz(buf, bd->bi_pcifreq));
+#endif
+#ifdef CONFIG_EXTRA_CLOCK
+ print_str ("flbfreq", strmhz(buf, bd->bi_flbfreq));
+ print_str ("inpfreq", strmhz(buf, bd->bi_inpfreq));
+ print_str ("vcofreq", strmhz(buf, bd->bi_vcofreq));
+#endif
+#if defined(CONFIG_CMD_NET)
+ puts ("ethaddr =");
+ for (i=0; i<6; ++i) {
+ printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]);
+ }
+
+#if defined(CONFIG_HAS_ETH1)
+ puts ("\neth1addr =");
+ for (i=0; i<6; ++i) {
+ printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]);
+ }
+#endif
+
+#if defined(CONFIG_HAS_ETH2)
+ puts ("\neth2addr =");
+ for (i=0; i<6; ++i) {
+ printf ("%c%02X", i ? ':' : ' ', bd->bi_enet2addr[i]);
+ }
+#endif
+
+#if defined(CONFIG_HAS_ETH3)
+ puts ("\neth3addr =");
+ for (i=0; i<6; ++i) {
+ printf ("%c%02X", i ? ':' : ' ', bd->bi_enet3addr[i]);
+ }
+#endif
+
+ puts ("\nip_addr = ");
+ print_IPaddr (bd->bi_ip_addr);
+#endif
+ printf ("\nbaudrate = %d bps\n", bd->bi_baudrate);
+
+ return 0;
+}
+
#else /* ! PPC, which leaves MIPS */
int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
@@ -270,7 +335,7 @@
printf ("%-12s= 0x%08lX\n", name, value);
}
-#ifdef CONFIG_PPC
+#if defined(CONFIG_PPC) || defined(CONFIG_M68K)
static void print_str(const char *name, const char *str)
{
printf ("%-12s= %6s MHz\n", name, str);
@@ -285,4 +350,4 @@
"bdinfo - print Board Info structure\n",
NULL
);
-#endif /* CFG_CMD_BDI */
+#endif
diff --git a/common/cmd_bedbug.c b/common/cmd_bedbug.c
index 48086a6..1c3547a 100644
--- a/common/cmd_bedbug.c
+++ b/common/cmd_bedbug.c
@@ -13,7 +13,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
#ifndef MAX
#define MAX(a,b) ((a) > (b) ? (a) : (b))
@@ -413,7 +413,7 @@
U_BOOT_CMD (rdump, 1, 1, do_bedbug_rdump,
"rdump - Show registers.\n", " - Show registers.\n");
/* ====================================================================== */
-#endif /* CFG_CMD_BEDBUG */
+#endif
/*
diff --git a/common/cmd_bmp.c b/common/cmd_bmp.c
index ad412c8..241aa83 100644
--- a/common/cmd_bmp.c
+++ b/common/cmd_bmp.c
@@ -31,7 +31,7 @@
#include <asm/byteorder.h>
#include <malloc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BMP)
+#if defined(CONFIG_CMD_BMP)
static int bmp_info (ulong addr);
static int bmp_display (ulong addr, int x, int y);
@@ -188,4 +188,4 @@
#endif
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) */
+#endif /* defined(CONFIG_CMD_BMP) */
diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c
index 8af0589..2fa906b 100644
--- a/common/cmd_bootm.c
+++ b/common/cmd_bootm.c
@@ -45,10 +45,10 @@
DECLARE_GLOBAL_DATA_PTR;
- /*cmd_boot.c*/
- extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
+/*cmd_boot.c*/
+extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
-#if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
+#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE)
#include <rtc.h>
#endif
@@ -56,13 +56,6 @@
#include <hush.h>
#endif
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
#ifdef CFG_INIT_RAM_LOCK
#include <asm/cache.h>
#endif
@@ -89,11 +82,11 @@
static void *zalloc(void *, unsigned, unsigned);
static void zfree(void *, void *, unsigned);
-#if (CONFIG_COMMANDS & CFG_CMD_IMI)
+#if defined(CONFIG_CMD_IMI)
static int image_info (unsigned long addr);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IMLS)
+#if defined(CONFIG_CMD_IMLS)
#include <flash.h>
extern flash_info_t flash_info[]; /* info for FLASH chips */
static int do_imls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -133,12 +126,12 @@
#endif
static boot_os_Fcn do_bootm_netbsd;
static boot_os_Fcn do_bootm_rtems;
-#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+#if defined(CONFIG_CMD_ELF)
static boot_os_Fcn do_bootm_vxworks;
static boot_os_Fcn do_bootm_qnxelf;
int do_bootvx ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] );
int do_bootelf (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] );
-#endif /* CFG_CMD_ELF */
+#endif
#if defined(CONFIG_ARTOS) && defined(CONFIG_PPC)
static boot_os_Fcn do_bootm_artos;
#endif
@@ -176,7 +169,7 @@
addr = simple_strtoul(argv[1], NULL, 16);
}
- SHOW_BOOT_PROGRESS (1);
+ show_boot_progress (1);
printf ("## Booting image at %08lx ...\n", addr);
/* Copy header so we can blank CRC field for re-calculation */
@@ -200,11 +193,11 @@
#endif /* __I386__ */
{
puts ("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-1);
return 1;
}
}
- SHOW_BOOT_PROGRESS (2);
+ show_boot_progress (2);
data = (ulong)&header;
len = sizeof(image_header_t);
@@ -214,10 +207,10 @@
if (crc32 (0, (uchar *)data, len) != checksum) {
puts ("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS (-2);
+ show_boot_progress (-2);
return 1;
}
- SHOW_BOOT_PROGRESS (3);
+ show_boot_progress (3);
#ifdef CONFIG_HAS_DATAFLASH
if (addr_dataflash(addr)){
@@ -238,12 +231,12 @@
puts (" Verifying Checksum ... ");
if (crc32 (0, (uchar *)data, len) != ntohl(hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS (-3);
+ show_boot_progress (-3);
return 1;
}
puts ("OK\n");
}
- SHOW_BOOT_PROGRESS (4);
+ show_boot_progress (4);
len_ptr = (ulong *)data;
@@ -274,10 +267,10 @@
#endif
{
printf ("Unsupported Architecture 0x%x\n", hdr->ih_arch);
- SHOW_BOOT_PROGRESS (-4);
+ show_boot_progress (-4);
return 1;
}
- SHOW_BOOT_PROGRESS (5);
+ show_boot_progress (5);
switch (hdr->ih_type) {
case IH_TYPE_STANDALONE:
@@ -299,10 +292,10 @@
data += 4;
break;
default: printf ("Wrong Image Type for %s command\n", cmdtp->name);
- SHOW_BOOT_PROGRESS (-5);
+ show_boot_progress (-5);
return 1;
}
- SHOW_BOOT_PROGRESS (6);
+ show_boot_progress (6);
/*
* We have reached the point of no return: we are going to
@@ -353,7 +346,7 @@
if (gunzip ((void *)ntohl(hdr->ih_load), unc_len,
(uchar *)data, &len) != 0) {
puts ("GUNZIP ERROR - must RESET board to recover\n");
- SHOW_BOOT_PROGRESS (-6);
+ show_boot_progress (-6);
do_reset (cmdtp, flag, argc, argv);
}
break;
@@ -370,8 +363,7 @@
CFG_MALLOC_LEN < (4096 * 1024), 0);
if (i != BZ_OK) {
printf ("BUNZIP2 ERROR %d - must RESET board to recover\n", i);
- SHOW_BOOT_PROGRESS (-6);
- udelay(100000);
+ show_boot_progress (-6);
do_reset (cmdtp, flag, argc, argv);
}
break;
@@ -380,11 +372,11 @@
if (iflag)
enable_interrupts();
printf ("Unimplemented compression type %d\n", hdr->ih_comp);
- SHOW_BOOT_PROGRESS (-7);
+ show_boot_progress (-7);
return 1;
}
puts ("OK\n");
- SHOW_BOOT_PROGRESS (7);
+ show_boot_progress (7);
switch (hdr->ih_type) {
case IH_TYPE_STANDALONE:
@@ -411,10 +403,10 @@
if (iflag)
enable_interrupts();
printf ("Can't boot image type %d\n", hdr->ih_type);
- SHOW_BOOT_PROGRESS (-8);
+ show_boot_progress (-8);
return 1;
}
- SHOW_BOOT_PROGRESS (8);
+ show_boot_progress (8);
switch (hdr->ih_os) {
default: /* handled by (original) Linux case */
@@ -442,7 +434,7 @@
addr, len_ptr, verify);
break;
-#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+#if defined(CONFIG_CMD_ELF)
case IH_OS_VXWORKS:
do_bootm_vxworks (cmdtp, flag, argc, argv,
addr, len_ptr, verify);
@@ -451,7 +443,7 @@
do_bootm_qnxelf (cmdtp, flag, argc, argv,
addr, len_ptr, verify);
break;
-#endif /* CFG_CMD_ELF */
+#endif
#ifdef CONFIG_ARTOS
case IH_OS_ARTOS:
do_bootm_artos (cmdtp, flag, argc, argv,
@@ -460,7 +452,7 @@
#endif
}
- SHOW_BOOT_PROGRESS (-9);
+ show_boot_progress (-9);
#ifdef DEBUG
puts ("\n## Control returned to monitor - resetting...\n");
do_reset (cmdtp, flag, argc, argv);
@@ -639,7 +631,7 @@
#endif
if (argc >= 3) {
debug ("Not skipping initrd\n");
- SHOW_BOOT_PROGRESS (9);
+ show_boot_progress (9);
addr = simple_strtoul(argv[2], NULL, 16);
@@ -650,7 +642,7 @@
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
puts ("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS (-10);
+ show_boot_progress (-10);
do_reset (cmdtp, flag, argc, argv);
}
@@ -662,11 +654,11 @@
if (crc32 (0, (uchar *)data, len) != checksum) {
puts ("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS (-11);
+ show_boot_progress (-11);
do_reset (cmdtp, flag, argc, argv);
}
- SHOW_BOOT_PROGRESS (10);
+ show_boot_progress (10);
print_image_hdr (hdr);
@@ -699,19 +691,19 @@
if (csum != ntohl(hdr->ih_dcrc)) {
puts ("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS (-12);
+ show_boot_progress (-12);
do_reset (cmdtp, flag, argc, argv);
}
puts ("OK\n");
}
- SHOW_BOOT_PROGRESS (11);
+ show_boot_progress (11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_PPC) ||
(hdr->ih_type != IH_TYPE_RAMDISK) ) {
puts ("No Linux PPC Ramdisk Image\n");
- SHOW_BOOT_PROGRESS (-13);
+ show_boot_progress (-13);
do_reset (cmdtp, flag, argc, argv);
}
@@ -722,7 +714,7 @@
u_long tail = ntohl(len_ptr[0]) % 4;
int i;
- SHOW_BOOT_PROGRESS (13);
+ show_boot_progress (13);
/* skip kernel length and terminator */
data = (ulong)(&len_ptr[2]);
@@ -741,7 +733,7 @@
/*
* no initrd image
*/
- SHOW_BOOT_PROGRESS (14);
+ show_boot_progress (14);
len = data = 0;
}
@@ -750,59 +742,65 @@
if(argc > 3) {
of_flat_tree = (char *) simple_strtoul(argv[3], NULL, 16);
hdr = (image_header_t *)of_flat_tree;
-#if defined(CONFIG_OF_LIBFDT)
- if (fdt_check_header(of_flat_tree) == 0) {
+#if defined(CONFIG_OF_FLAT_TREE)
+ if (*((ulong *)(of_flat_tree + sizeof(image_header_t))) != OF_DT_HEADER) {
#else
- if (*(ulong *)of_flat_tree == OF_DT_HEADER) {
+ if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) != 0) {
#endif
#ifndef CFG_NO_FLASH
if (addr2info((ulong)of_flat_tree) != NULL)
of_data = (ulong)of_flat_tree;
#endif
} else if (ntohl(hdr->ih_magic) == IH_MAGIC) {
- printf("## Flat Device Tree Image at %08lX\n", hdr);
+ printf("## Flat Device Tree at %08lX\n", hdr);
print_image_hdr(hdr);
if ((ntohl(hdr->ih_load) < ((unsigned long)hdr + ntohl(hdr->ih_size) + sizeof(hdr))) &&
((ntohl(hdr->ih_load) + ntohl(hdr->ih_size)) > (unsigned long)hdr)) {
- printf ("ERROR: Load address overwrites Flat Device Tree uImage\n");
- return;
+ puts ("ERROR: fdt overwritten - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
- printf(" Verifying Checksum ... ");
+ puts (" Verifying Checksum ... ");
memmove (&header, (char *)hdr, sizeof(image_header_t));
checksum = ntohl(header.ih_hcrc);
header.ih_hcrc = 0;
if(checksum != crc32(0, (uchar *)&header, sizeof(image_header_t))) {
- printf("ERROR: Flat Device Tree header checksum is invalid\n");
- return;
+ puts ("ERROR: fdt header checksum invalid - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
checksum = ntohl(hdr->ih_dcrc);
addr = (ulong)((uchar *)(hdr) + sizeof(image_header_t));
if(checksum != crc32(0, (uchar *)addr, ntohl(hdr->ih_size))) {
- printf("ERROR: Flat Device Tree checksum is invalid\n");
- return;
+ puts ("ERROR: fdt checksum invalid - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
- printf("OK\n");
+ puts ("OK\n");
if (ntohl(hdr->ih_type) != IH_TYPE_FLATDT) {
- printf ("ERROR: uImage not Flat Device Tree type\n");
- return;
+ puts ("ERROR: uImage is not a fdt - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
if (ntohl(hdr->ih_comp) != IH_COMP_NONE) {
- printf("ERROR: uImage is not uncompressed\n");
- return;
+ puts ("ERROR: uImage is compressed - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
-#if defined(CONFIG_OF_LIBFDT)
- if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) == 0) {
-#else
+#if defined(CONFIG_OF_FLAT_TREE)
if (*((ulong *)(of_flat_tree + sizeof(image_header_t))) != OF_DT_HEADER) {
+#else
+ if (fdt_check_header(of_flat_tree + sizeof(image_header_t)) != 0) {
#endif
- printf ("ERROR: uImage data is not a flat device tree\n");
- return;
+ puts ("ERROR: uImage data is not a fdt - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
memmove((void *)ntohl(hdr->ih_load),
@@ -810,49 +808,61 @@
ntohl(hdr->ih_size));
of_flat_tree = (char *)ntohl(hdr->ih_load);
} else {
- printf ("Did not find a flat flat device tree at address %08lX\n", of_flat_tree);
- return;
+ puts ("Did not find a flat Flat Device Tree.\n"
+ "Must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
- printf (" Booting using flat device tree at 0x%x\n",
+ printf (" Booting using the fdt at 0x%x\n",
of_flat_tree);
} else if ((hdr->ih_type==IH_TYPE_MULTI) && (len_ptr[1]) && (len_ptr[2])) {
u_long tail = ntohl(len_ptr[0]) % 4;
int i;
/* skip kernel length, initrd length, and terminator */
- of_data = (ulong)(&len_ptr[3]);
+ of_flat_tree = (char *)(&len_ptr[3]);
/* skip any additional image length fields */
for (i=2; len_ptr[i]; ++i)
- of_data += 4;
+ of_flat_tree += 4;
/* add kernel length, and align */
- of_data += ntohl(len_ptr[0]);
+ of_flat_tree += ntohl(len_ptr[0]);
if (tail) {
- of_data += 4 - tail;
+ of_flat_tree += 4 - tail;
}
/* add initrd length, and align */
tail = ntohl(len_ptr[1]) % 4;
- of_data += ntohl(len_ptr[1]);
+ of_flat_tree += ntohl(len_ptr[1]);
if (tail) {
- of_data += 4 - tail;
+ of_flat_tree += 4 - tail;
}
-#if defined(CONFIG_OF_LIBFDT)
- if (fdt_check_header((void *)of_data) != 0) {
-#else
- if (((struct boot_param_header *)of_data)->magic != OF_DT_HEADER) {
+#ifndef CFG_NO_FLASH
+ /* move the blob if it is in flash (set of_data to !null) */
+ if (addr2info ((ulong)of_flat_tree) != NULL)
+ of_data = (ulong)of_flat_tree;
#endif
- printf ("ERROR: image is not a flat device tree\n");
- return;
+
+
+#if defined(CONFIG_OF_FLAT_TREE)
+ if (*((ulong *)(of_flat_tree)) != OF_DT_HEADER) {
+#else
+ if (fdt_check_header (of_flat_tree) != 0) {
+#endif
+ puts ("ERROR: image is not a fdt - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
-#if defined(CONFIG_OF_LIBFDT)
- if (be32_to_cpu(fdt_totalsize(of_data)) != ntohl(len_ptr[2])) {
+#if defined(CONFIG_OF_FLAT_TREE)
+ if (((struct boot_param_header *)of_flat_tree)->totalsize !=
+ ntohl (len_ptr[2])) {
#else
- if (((struct boot_param_header *)of_data)->totalsize != ntohl(len_ptr[2])) {
+ if (be32_to_cpu (fdt_totalsize (of_flat_tree)) !=
+ ntohl(len_ptr[2])) {
#endif
- printf ("ERROR: flat device tree size does not agree with image\n");
- return;
+ puts ("ERROR: fdt size != image size - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
}
#endif
@@ -892,7 +902,7 @@
initrd_start = nsp;
}
- SHOW_BOOT_PROGRESS (12);
+ show_boot_progress (12);
debug ("## initrd at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n",
data, data + len - 1, len, len);
@@ -925,27 +935,26 @@
initrd_end = 0;
}
- debug ("## Transferring control to Linux (at address %08lx) ...\n",
- (ulong)kernel);
+#if defined(CONFIG_OF_LIBFDT)
- SHOW_BOOT_PROGRESS (15);
-
-#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
- unlock_ram_in_cache();
+#ifdef CFG_BOOTMAPSZ
+ /*
+ * The blob must be within CFG_BOOTMAPSZ,
+ * so we flag it to be copied if it is not.
+ */
+ if (of_flat_tree >= (char *)CFG_BOOTMAPSZ)
+ of_data = (ulong)of_flat_tree;
#endif
-#if defined(CONFIG_OF_LIBFDT)
/* move of_flat_tree if needed */
if (of_data) {
int err;
ulong of_start, of_len;
of_len = be32_to_cpu(fdt_totalsize(of_data));
- /* position on a 4K boundary before the initrd/kbd */
- if (initrd_start)
- of_start = initrd_start - of_len;
- else
- of_start = (ulong)kbd - of_len;
+
+ /* position on a 4K boundary before the kbd */
+ of_start = (ulong)kbd - of_len;
of_start &= ~(4096 - 1); /* align on page */
debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n",
of_data, of_data + of_len - 1, of_len, of_len);
@@ -953,42 +962,61 @@
of_flat_tree = (char *)of_start;
printf (" Loading Device Tree to %08lx, end %08lx ... ",
of_start, of_start + of_len - 1);
- err = fdt_open_into((void *)of_start, (void *)of_data, of_len);
+ err = fdt_open_into((void *)of_data, (void *)of_start, of_len);
if (err != 0) {
- printf ("libfdt: %s " __FILE__ " %d\n", fdt_strerror(err), __LINE__);
+ puts ("ERROR: fdt move failed - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
- /*
- * Add the chosen node if it doesn't exist, add the env and bd_t
- * if the user wants it (the logic is in the subroutines).
- */
+ puts ("OK\n");
+ }
+ /*
+ * Add the chosen node if it doesn't exist, add the env and bd_t
+ * if the user wants it (the logic is in the subroutines).
+ */
+ if (of_flat_tree) {
if (fdt_chosen(of_flat_tree, initrd_start, initrd_end, 0) < 0) {
- printf("Failed creating the /chosen node (0x%08X), aborting.\n", of_flat_tree);
- return;
+ puts ("ERROR: /chosen node create failed - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
#ifdef CONFIG_OF_HAS_UBOOT_ENV
if (fdt_env(of_flat_tree) < 0) {
- printf("Failed creating the /u-boot-env node, aborting.\n");
- return;
+ puts ("ERROR: /u-boot-env node create failed - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
#endif
#ifdef CONFIG_OF_HAS_BD_T
if (fdt_bd_t(of_flat_tree) < 0) {
- printf("Failed creating the /bd_t node, aborting.\n");
- return;
+ puts ("ERROR: /bd_t node create failed - "
+ "must RESET the board to recover.\n");
+ do_reset (cmdtp, flag, argc, argv);
}
#endif
- }
+#ifdef CONFIG_OF_BOARD_SETUP
+ /* Call the board-specific fixup routine */
+ ft_board_setup(of_flat_tree, gd->bd);
#endif
+ }
+#endif /* CONFIG_OF_LIBFDT */
#if defined(CONFIG_OF_FLAT_TREE)
+#ifdef CFG_BOOTMAPSZ
+ /*
+ * The blob must be within CFG_BOOTMAPSZ,
+ * so we flag it to be copied if it is not.
+ */
+ if (of_flat_tree >= (char *)CFG_BOOTMAPSZ)
+ of_data = (ulong)of_flat_tree;
+#endif
+
/* move of_flat_tree if needed */
if (of_data) {
ulong of_start, of_len;
of_len = ((struct boot_param_header *)of_data)->totalsize;
+
/* provide extra 8k pad */
- if (initrd_start)
- of_start = initrd_start - of_len - 8192;
- else
- of_start = (ulong)kbd - of_len - 8192;
+ of_start = (ulong)kbd - of_len - 8192;
of_start &= ~(4096 - 1); /* align on page */
debug ("## device tree at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n",
of_data, of_data + of_len - 1, of_len, of_len);
@@ -997,9 +1025,38 @@
printf (" Loading Device Tree to %08lx, end %08lx ... ",
of_start, of_start + of_len - 1);
memmove ((void *)of_start, (void *)of_data, of_len);
+ puts ("OK\n");
}
+ /*
+ * Create the /chosen node and modify the blob with board specific
+ * values as needed.
+ */
+ ft_setup(of_flat_tree, kbd, initrd_start, initrd_end);
+ /* ft_dump_blob(of_flat_tree); */
+#endif
+ debug ("## Transferring control to Linux (at address %08lx) ...\n",
+ (ulong)kernel);
+
+ show_boot_progress (15);
+
+#if defined(CFG_INIT_RAM_LOCK) && !defined(CONFIG_E500)
+ unlock_ram_in_cache();
#endif
+#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)
+ if (of_flat_tree) { /* device tree; boot new style */
+ /*
+ * Linux Kernel Parameters (passing device tree):
+ * r3: pointer to the fdt, followed by the board info data
+ * r4: physical pointer to the kernel itself
+ * r5: NULL
+ * r6: NULL
+ * r7: NULL
+ */
+ (*kernel) ((bd_t *)of_flat_tree, (ulong)kernel, 0, 0, 0);
+ /* does not return */
+ }
+#endif
/*
* Linux Kernel Parameters (passing board info data):
* r3: ptr to board info data
@@ -1008,46 +1065,8 @@
* r6: Start of command line string
* r7: End of command line string
*/
-#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)
- if (!of_flat_tree) /* no device tree; boot old style */
-#endif
- (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
- /* does not return */
-
-#if defined(CONFIG_OF_FLAT_TREE) || defined(CONFIG_OF_LIBFDT)
- /*
- * Linux Kernel Parameters (passing device tree):
- * r3: ptr to OF flat tree, followed by the board info data
- * r4: physical pointer to the kernel itself
- * r5: NULL
- * r6: NULL
- * r7: NULL
- */
-#if defined(CONFIG_OF_FLAT_TREE)
- ft_setup(of_flat_tree, kbd, initrd_start, initrd_end);
- /* ft_dump_blob(of_flat_tree); */
-#endif
-#if defined(CONFIG_OF_LIBFDT)
- if (fdt_chosen(of_flat_tree, initrd_start, initrd_end, 0) < 0) {
- printf("Failed creating the /chosen node (0x%08X), aborting.\n", of_flat_tree);
- return;
- }
-#ifdef CONFIG_OF_HAS_UBOOT_ENV
- if (fdt_env(of_flat_tree) < 0) {
- printf("Failed creating the /u-boot-env node, aborting.\n");
- return;
- }
-#endif
-#ifdef CONFIG_OF_HAS_BD_T
- if (fdt_bd_t(of_flat_tree) < 0) {
- printf("Failed creating the /bd_t node, aborting.\n");
- return;
- }
-#endif
-#endif /* if defined(CONFIG_OF_LIBFDT) */
-
- (*kernel) ((bd_t *)of_flat_tree, (ulong)kernel, 0, 0, 0);
-#endif
+ (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
+ /* does not return */
}
#endif /* CONFIG_PPC */
@@ -1117,7 +1136,7 @@
printf ("## Transferring control to NetBSD stage-2 loader (at address %08lx) ...\n",
(ulong)loader);
- SHOW_BOOT_PROGRESS (15);
+ show_boot_progress (15);
/*
* NetBSD Stage-2 Loader Parameters:
@@ -1221,7 +1240,7 @@
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_BOOTD)
+#if defined(CONFIG_CMD_BOOTD)
int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int rcode = 0;
@@ -1249,7 +1268,7 @@
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IMI)
+#if defined(CONFIG_CMD_IMI)
int do_iminfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int arg;
@@ -1317,9 +1336,9 @@
" image contents (magic number, header and payload checksums)\n"
);
-#endif /* CFG_CMD_IMI */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IMLS)
+#if defined(CONFIG_CMD_IMLS)
/*-----------------------------------------------------------------------
* List all images found in flash.
*/
@@ -1375,23 +1394,23 @@
" - Prints information about all images found at sector\n"
" boundaries in flash.\n"
);
-#endif /* CFG_CMD_IMLS */
+#endif
void
print_image_hdr (image_header_t *hdr)
{
-#if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
+#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE)
time_t timestamp = (time_t)ntohl(hdr->ih_time);
struct rtc_time tm;
#endif
printf (" Image Name: %.*s\n", IH_NMLEN, hdr->ih_name);
-#if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
+#if defined(CONFIG_TIMESTAMP) || defined(CONFIG_CMD_DATE)
to_tm (timestamp, &tm);
printf (" Created: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
tm.tm_year, tm.tm_mon, tm.tm_mday,
tm.tm_hour, tm.tm_min, tm.tm_sec);
-#endif /* CFG_CMD_DATE, CONFIG_TIMESTAMP */
+#endif
puts (" Image Type: "); print_type(hdr);
printf ("\n Data Size: %d Bytes = ", ntohl(hdr->ih_size));
print_size (ntohl(hdr->ih_size), "\n");
@@ -1580,7 +1599,7 @@
printf ("## Transferring control to RTEMS (at address %08lx) ...\n",
(ulong)entry_point);
- SHOW_BOOT_PROGRESS (15);
+ show_boot_progress (15);
/*
* RTEMS Parameters:
@@ -1590,7 +1609,7 @@
(*entry_point ) ( gd->bd );
}
-#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+#if defined(CONFIG_CMD_ELF)
static void
do_bootm_vxworks (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[],
ulong addr, ulong *len_ptr, int verify)
@@ -1616,7 +1635,7 @@
local_args[1] = str; /* and provide it via the arguments */
do_bootelf(cmdtp, 0, 2, local_args);
}
-#endif /* CFG_CMD_ELF */
+#endif
#ifdef CONFIG_LYNXKDI
static void
diff --git a/common/cmd_cache.c b/common/cmd_cache.c
index 6c250bc..675d43f 100644
--- a/common/cmd_cache.c
+++ b/common/cmd_cache.c
@@ -27,7 +27,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
+#if defined(CONFIG_CMD_CACHE)
static int on_off (const char *);
@@ -109,4 +109,4 @@
" - enable or disable data (writethrough) cache\n"
);
-#endif /* CFG_CMD_CACHE */
+#endif
diff --git a/common/cmd_console.c b/common/cmd_console.c
index 1bd3709..5e0f990 100644
--- a/common/cmd_console.c
+++ b/common/cmd_console.c
@@ -28,7 +28,7 @@
#include <command.h>
#include <devices.h>
-#if (CONFIG_COMMANDS & CFG_CMD_CONSOLE)
+#if defined(CONFIG_CMD_CONSOLE)
extern void _do_coninfo (void);
int do_coninfo (cmd_tbl_t * cmd, int flag, int argc, char *argv[])
@@ -68,4 +68,4 @@
""
);
-#endif /* CFG_CMD_CONSOLE */
+#endif
diff --git a/common/cmd_date.c b/common/cmd_date.c
index 33d2e56..4a42534 100644
--- a/common/cmd_date.c
+++ b/common/cmd_date.c
@@ -31,7 +31,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
const char *weekdays[] = {
"Sun", "Mon", "Tues", "Wednes", "Thurs", "Fri", "Satur",
@@ -211,4 +211,4 @@
" - with 'reset' argument: reset the RTC\n"
);
-#endif /* CFG_CMD_DATE */
+#endif
diff --git a/common/cmd_dcr.c b/common/cmd_dcr.c
index 7221a86..12fa9db 100644
--- a/common/cmd_dcr.c
+++ b/common/cmd_dcr.c
@@ -29,7 +29,7 @@
#include <config.h>
#include <command.h>
-#if defined(CONFIG_4xx) && (CONFIG_COMMANDS & CFG_CMD_SETGETDCR)
+#if defined(CONFIG_4xx) && defined(CONFIG_CMD_SETGETDCR)
unsigned long get_dcr (unsigned short);
unsigned long set_dcr (unsigned short, unsigned long);
@@ -246,4 +246,4 @@
"adr_dcrn[.dat_dcrn] offset value - write offset to adr_dcrn, write value to dat_dcrn.\n"
);
-#endif /* CONFIG_4xx & CFG_CMD_SETGETDCR */
+#endif
diff --git a/common/cmd_diag.c b/common/cmd_diag.c
index 45c4b31..cb99b77 100644
--- a/common/cmd_diag.c
+++ b/common/cmd_diag.c
@@ -28,7 +28,7 @@
#include <command.h>
#include <post.h>
-#if (CONFIG_COMMANDS & CFG_CMD_DIAG) && defined(CONFIG_POST)
+#if defined(CONFIG_CMD_DIAG) && defined(CONFIG_POST)
int do_diag (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
@@ -77,4 +77,4 @@
" - run specified tests\n"
);
-#endif /* CFG_CMD_DIAG */
+#endif
diff --git a/common/cmd_display.c b/common/cmd_display.c
index abee844..d19f412 100644
--- a/common/cmd_display.c
+++ b/common/cmd_display.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_DISPLAY)
+#if defined(CONFIG_CMD_DISPLAY)
#undef DEBUG_DISP
@@ -79,4 +79,4 @@
" - without arguments: clear dot matrix display\n"
);
-#endif /* CFG_CMD_DISPLAY */
+#endif
diff --git a/common/cmd_doc.c b/common/cmd_doc.c
index ab37516..d6d3aff 100644
--- a/common/cmd_doc.c
+++ b/common/cmd_doc.c
@@ -12,14 +12,7 @@
#include <malloc.h>
#include <asm/io.h>
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
#include <linux/mtd/nftl.h>
#include <linux/mtd/doc2000.h>
@@ -216,6 +209,7 @@
image_header_t *hdr;
int rcode = 0;
+ show_boot_progress (34);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
@@ -236,24 +230,27 @@
break;
default:
printf ("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-35);
return 1;
}
+ show_boot_progress (35);
if (!boot_device) {
puts ("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-36);
return 1;
}
+ show_boot_progress (36);
dev = simple_strtoul(boot_device, &ep, 16);
if ((dev >= CFG_MAX_DOC_DEVICE) ||
(doc_dev_desc[dev].ChipID == DOC_ChipID_UNKNOWN)) {
printf ("\n** Device %d not available\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-37);
return 1;
}
+ show_boot_progress (37);
printf ("\nLoading from device %d: %s at 0x%lX (offset 0x%lX)\n",
dev, doc_dev_desc[dev].name, doc_dev_desc[dev].physadr,
@@ -262,9 +259,10 @@
if (doc_rw (doc_dev_desc + dev, 1, offset,
SECTORSIZE, NULL, (u_char *)addr)) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-38);
return 1;
}
+ show_boot_progress (38);
hdr = (image_header_t *)addr;
@@ -276,16 +274,18 @@
cnt -= SECTORSIZE;
} else {
puts ("\n** Bad Magic Number **\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-39);
return 1;
}
+ show_boot_progress (39);
if (doc_rw (doc_dev_desc + dev, 1, offset + SECTORSIZE, cnt,
NULL, (u_char *)(addr+SECTORSIZE))) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-40);
return 1;
}
+ show_boot_progress (40);
/* Loading ok, update default load address */
@@ -1608,4 +1608,4 @@
}
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_DOC) */
+#endif
diff --git a/common/cmd_dtt.c b/common/cmd_dtt.c
index 4f7b049..8da95bf 100644
--- a/common/cmd_dtt.c
+++ b/common/cmd_dtt.c
@@ -25,7 +25,7 @@
#include <config.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_DTT)
+#if defined(CONFIG_CMD_DTT)
#include <dtt.h>
#include <i2c.h>
@@ -61,4 +61,4 @@
" - Read temperature from digital thermometer and thermostat.\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_DTT */
+#endif
diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c
index d15a412..e5000e9 100644
--- a/common/cmd_eeprom.c
+++ b/common/cmd_eeprom.c
@@ -42,7 +42,7 @@
#include <command.h>
#include <i2c.h>
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
+#if defined(CFG_ENV_IS_IN_EEPROM) || defined(CONFIG_CMD_EEPROM)
extern void eeprom_init (void);
extern int eeprom_read (unsigned dev_addr, unsigned offset,
@@ -62,7 +62,7 @@
/* ------------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
+#if defined(CONFIG_CMD_EEPROM)
int do_eeprom ( cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
const char *const fmt =
@@ -110,7 +110,7 @@
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
-#endif /* CFG_CMD_EEPROM */
+#endif
/*-----------------------------------------------------------------------
*
@@ -121,7 +121,7 @@
* 0x00000nxx for EEPROM address selectors and page number at n.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) || defined(CFG_ENV_IS_IN_EEPROM)
+#if defined(CFG_ENV_IS_IN_EEPROM) || defined(CONFIG_CMD_EEPROM)
#ifndef CONFIG_SPI
#if !defined(CFG_I2C_EEPROM_ADDR_LEN) || CFG_I2C_EEPROM_ADDR_LEN < 1 || CFG_I2C_EEPROM_ADDR_LEN > 2
@@ -422,10 +422,11 @@
}
/*-----------------------------------------------------------------------
*/
-#endif /* CFG_CMD_EEPROM */
+#endif
+
/***************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
+#if defined(CONFIG_CMD_EEPROM)
#ifdef CFG_I2C_MULTI_EEPROMS
U_BOOT_CMD(
@@ -445,4 +446,4 @@
);
#endif /* CFG_I2C_MULTI_EEPROMS */
-#endif /* CFG_CMD_EEPROM */
+#endif
diff --git a/common/cmd_elf.c b/common/cmd_elf.c
index 0e3d56f..63a5593 100644
--- a/common/cmd_elf.c
+++ b/common/cmd_elf.c
@@ -23,7 +23,7 @@
DECLARE_GLOBAL_DATA_PTR;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_ELF)
+#if defined(CONFIG_CMD_ELF)
#ifndef MAX
#define MAX(a,b) ((a) > (b) ? (a) : (b))
@@ -101,7 +101,7 @@
else
addr = simple_strtoul (argv[1], NULL, 16);
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/* Check to see if we need to tftp the image ourselves before starting */
if ((argc == 2) && (strcmp (argv[1], "tftp") == 0)) {
@@ -324,4 +324,4 @@
" [address] - load address of vxWorks ELF image.\n"
);
-#endif /* CFG_CMD_ELF */
+#endif
diff --git a/common/cmd_ext2.c b/common/cmd_ext2.c
index 94bd9b6..8bd2b47 100644
--- a/common/cmd_ext2.c
+++ b/common/cmd_ext2.c
@@ -35,14 +35,14 @@
#include <common.h>
#include <part.h>
-#if (CONFIG_COMMANDS & CFG_CMD_EXT2)
+#if defined(CONFIG_CMD_EXT2)
#include <config.h>
#include <command.h>
#include <image.h>
#include <linux/ctype.h>
#include <asm/byteorder.h>
#include <ext2fs.h>
-#if ((CONFIG_COMMANDS & CFG_CMD_USB) && defined(CONFIG_USB_STORAGE))
+#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
#include <usb.h>
#endif
@@ -260,4 +260,4 @@
" to address 'addr' from ext2 filesystem\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_EXT2 */
+#endif
diff --git a/common/cmd_fat.c b/common/cmd_fat.c
index afaf299..54f0f9f 100644
--- a/common/cmd_fat.c
+++ b/common/cmd_fat.c
@@ -31,7 +31,7 @@
#include <ata.h>
#include <part.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+#if defined(CONFIG_CMD_FAT)
#undef DEBUG
@@ -324,4 +324,4 @@
}
#endif /* NOT_IMPLEMENTED_YET */
-#endif /* CFG_CMD_FAT */
+#endif
diff --git a/common/cmd_fdc.c b/common/cmd_fdc.c
index 03f4ce6..7349412 100644
--- a/common/cmd_fdc.c
+++ b/common/cmd_fdc.c
@@ -47,11 +47,11 @@
#endif
-/*#if (CONFIG_COMMANDS & CFG_CMD_DATE) */
+/*#if defined(CONFIG_CMD_DATE) */
/*#include <rtc.h> */
/*#endif */
-#if ((CONFIG_COMMANDS & CFG_CMD_FDC) || (CONFIG_COMMANDS & CFG_CMD_FDOS))
+#if defined(CONFIG_CMD_FDC) || defined(CONFIG_CMD_FDOS)
typedef struct {
@@ -707,9 +707,9 @@
return TRUE;
}
-#endif /* ((CONFIG_COMMANDS & CFG_CMD_FDC)||(CONFIG_COMMANDS & CFG_CMD_FDOS))*/
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
/* Low level functions for the Floppy-DOS layer */
@@ -772,9 +772,9 @@
return (fdc_read_data (buffer, len, pCMD, pFG));
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_FDOS) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_FDC)
+#if defined(CONFIG_CMD_FDC)
/****************************************************************************
* main routine do_fdcboot
*/
@@ -880,13 +880,13 @@
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_FDC */
+#endif
/***************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_FDC)
+#if defined(CONFIG_CMD_FDC)
U_BOOT_CMD(
fdcboot, 3, 1, do_fdcboot,
diff --git a/common/cmd_fdos.c b/common/cmd_fdos.c
index dc02b35..f9da98d 100644
--- a/common/cmd_fdos.c
+++ b/common/cmd_fdos.c
@@ -31,7 +31,7 @@
#include <command.h>
#include <fdc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
/*-----------------------------------------------------------------------------
* do_fdosboot --
@@ -154,4 +154,4 @@
"[directory]\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_FDOS */
+#endif
diff --git a/common/cmd_fdt.c b/common/cmd_fdt.c
index 08fe351..571b8f1 100644
--- a/common/cmd_fdt.c
+++ b/common/cmd_fdt.c
@@ -37,46 +37,32 @@
#include <fdt_support.h>
#define MAX_LEVEL 32 /* how deeply nested we will go */
-#define SCRATCHPAD 1024 /* bytes of scratchpad memory */
+#define SCRATCHPAD 1024 /* bytes of scratchpad memory */
/*
* Global data (for the gd->bd)
*/
DECLARE_GLOBAL_DATA_PTR;
-/*
- * Scratchpad memory.
- */
-static char data[SCRATCHPAD];
-
-
-/*
- * Function prototypes/declarations.
- */
static int fdt_valid(void);
-static void print_data(const void *data, int len);
-
+static int fdt_parse_prop(char *pathp, char *prop, char *newval,
+ char *data, int *len);
+static int fdt_print(char *pathp, char *prop, int depth);
/*
* Flattened Device Tree command, see the help for parameter definitions.
*/
int do_fdt (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
- char op;
-
if (argc < 2) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
- /*
- * Figure out which subcommand was given
- */
- op = argv[1][0];
/********************************************************************
* Set the address of the fdt
********************************************************************/
- if (op == 'a') {
+ if (argv[1][0] == 'a') {
/*
* Set the address [and length] of the fdt.
*/
@@ -94,7 +80,8 @@
*/
len = simple_strtoul(argv[3], NULL, 16);
if (len < fdt_totalsize(fdt)) {
- printf ("New length %d < existing length %d, ignoring.\n",
+ printf ("New length %d < existing length %d, "
+ "ignoring.\n",
len, fdt_totalsize(fdt));
} else {
/*
@@ -102,7 +89,8 @@
*/
err = fdt_open_into(fdt, fdt, len);
if (err != 0) {
- printf ("libfdt: %s\n", fdt_strerror(err));
+ printf ("libfdt fdt_open_into(): %s\n",
+ fdt_strerror(err));
}
}
}
@@ -110,12 +98,12 @@
/********************************************************************
* Move the fdt
********************************************************************/
- } else if (op == 'm') {
+ } else if ((argv[1][0] == 'm') && (argv[1][1] == 'o')) {
struct fdt_header *newaddr;
int len;
int err;
- if (argc != 5) {
+ if (argc < 4) {
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
@@ -128,12 +116,22 @@
return 1;
}
- newaddr = (struct fdt_header *)simple_strtoul(argv[3], NULL, 16);
- len = simple_strtoul(argv[4], NULL, 16);
- if (len < fdt_totalsize(fdt)) {
- printf ("New length %d < existing length %d, aborting.\n",
- len, fdt_totalsize(fdt));
- return 1;
+ newaddr = (struct fdt_header *)simple_strtoul(argv[3],NULL,16);
+
+ /*
+ * If the user specifies a length, use that. Otherwise use the
+ * current length.
+ */
+ if (argc <= 4) {
+ len = fdt_totalsize(fdt);
+ } else {
+ len = simple_strtoul(argv[4], NULL, 16);
+ if (len < fdt_totalsize(fdt)) {
+ printf ("New length 0x%X < existing length "
+ "0x%X, aborting.\n",
+ len, fdt_totalsize(fdt));
+ return 1;
+ }
}
/*
@@ -141,26 +139,59 @@
*/
err = fdt_open_into(fdt, newaddr, len);
if (err != 0) {
- printf ("libfdt: %s\n", fdt_strerror(err));
+ printf ("libfdt fdt_open_into(): %s\n",
+ fdt_strerror(err));
return 1;
}
fdt = newaddr;
/********************************************************************
- * Set the value of a node in the fdt.
+ * Make a new node
********************************************************************/
- } else if (op == 's') {
+ } else if ((argv[1][0] == 'm') && (argv[1][1] == 'k')) {
char *pathp; /* path */
- char *prop; /* property */
- struct fdt_property *nodep; /* node struct pointer */
- char *newval; /* value from the user (as a string) */
- char *vp; /* temporary value pointer */
- char *cp; /* temporary char pointer */
+ char *nodep; /* new node to add */
int nodeoffset; /* node offset from libfdt */
- int len; /* new length of the property */
- int oldlen; /* original length of the property */
- unsigned long tmp; /* holds converted values */
- int ret; /* return value */
+ int err;
+
+ /*
+ * Parameters: Node path, new node to be appended to the path.
+ */
+ if (argc < 4) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ pathp = argv[2];
+ nodep = argv[3];
+
+ nodeoffset = fdt_find_node_by_path (fdt, pathp);
+ if (nodeoffset < 0) {
+ /*
+ * Not found or something else bad happened.
+ */
+ printf ("libfdt fdt_find_node_by_path() returned %s\n",
+ fdt_strerror(nodeoffset));
+ return 1;
+ }
+ err = fdt_add_subnode(fdt, nodeoffset, nodep);
+ if (err < 0) {
+ printf ("libfdt fdt_add_subnode(): %s\n",
+ fdt_strerror(err));
+ return 1;
+ }
+
+ /********************************************************************
+ * Set the value of a property in the fdt.
+ ********************************************************************/
+ } else if (argv[1][0] == 's') {
+ char *pathp; /* path */
+ char *prop; /* property */
+ char *newval; /* value from the user (as a string) */
+ int nodeoffset; /* node offset from libfdt */
+ static char data[SCRATCHPAD]; /* storage for the property */
+ int len; /* new length of the property */
+ int ret; /* return value */
/*
* Parameters: Node path, property, value.
@@ -174,121 +205,38 @@
prop = argv[3];
newval = argv[4];
- if (strcmp(pathp, "/") == 0) {
- nodeoffset = 0;
- } else {
- nodeoffset = fdt_path_offset (fdt, pathp);
- if (nodeoffset < 0) {
- /*
- * Not found or something else bad happened.
- */
- printf ("libfdt: %s\n", fdt_strerror(nodeoffset));
- return 1;
- }
+ nodeoffset = fdt_find_node_by_path (fdt, pathp);
+ if (nodeoffset < 0) {
+ /*
+ * Not found or something else bad happened.
+ */
+ printf ("libfdt fdt_find_node_by_path() returned %s\n",
+ fdt_strerror(nodeoffset));
+ return 1;
}
- nodep = fdt_getprop (fdt, nodeoffset, prop, &oldlen);
- if (oldlen < 0) {
- printf ("libfdt %s\n", fdt_strerror(oldlen));
- return 1;
- } else if (oldlen == 0) {
- /*
- * The specified property has no value
- */
- printf("%s has no value, cannot set one (yet).\n", prop);
- return 1;
- } else {
- /*
- * Convert the new property
- */
- vp = data;
- if (*newval == '<') {
- /*
- * Bigger values than bytes.
- */
- len = 0;
- newval++;
- while ((*newval != '>') && (*newval != '\0')) {
- cp = newval;
- tmp = simple_strtoul(cp, &newval, 16);
- if ((newval - cp) <= 2) {
- *vp = tmp & 0xFF;
- vp += 1;
- len += 1;
- } else if ((newval - cp) <= 4) {
- *(uint16_t *)vp = __cpu_to_be16(tmp);
- vp += 2;
- len += 2;
- } else if ((newval - cp) <= 8) {
- *(uint32_t *)vp = __cpu_to_be32(tmp);
- vp += 4;
- len += 4;
- } else {
- printf("Sorry, I could not convert \"%s\"\n", cp);
- return 1;
- }
- while (*newval == ' ')
- newval++;
- }
- if (*newval != '>') {
- printf("Unexpected character '%c'\n", *newval);
- return 1;
- }
- } else if (*newval == '[') {
- /*
- * Byte stream. Convert the values.
- */
- len = 0;
- newval++;
- while ((*newval != ']') && (*newval != '\0')) {
- tmp = simple_strtoul(newval, &newval, 16);
- *vp++ = tmp & 0xFF;
- len++;
- while (*newval == ' ')
- newval++;
- }
- if (*newval != ']') {
- printf("Unexpected character '%c'\n", *newval);
- return 1;
- }
- } else {
- /*
- * Assume it is a string. Copy it into our data area for
- * convenience (including the terminating '\0').
- */
- len = strlen(newval) + 1;
- strcpy(data, newval);
- }
+ ret = fdt_parse_prop(pathp, prop, newval, data, &len);
+ if (ret != 0)
+ return ret;
- ret = fdt_setprop(fdt, nodeoffset, prop, data, len);
- if (ret < 0) {
- printf ("libfdt %s\n", fdt_strerror(ret));
- return 1;
- }
+ ret = fdt_setprop(fdt, nodeoffset, prop, data, len);
+ if (ret < 0) {
+ printf ("libfdt fdt_setprop(): %s\n", fdt_strerror(ret));
+ return 1;
}
/********************************************************************
* Print (recursive) / List (single level)
********************************************************************/
- } else if ((op == 'p') || (op == 'l')) {
- /*
- * Recursively print (a portion of) the fdt.
- */
- static int offstack[MAX_LEVEL];
- static char tabs[MAX_LEVEL+1] = "\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t";
+ } else if ((argv[1][0] == 'p') || (argv[1][0] == 'l')) {
int depth = MAX_LEVEL; /* how deep to print */
char *pathp; /* path */
- char *prop; /* property */
- void *nodep; /* property node pointer */
- int nodeoffset; /* node offset from libfdt */
- int nextoffset; /* next node offset from libfdt */
- uint32_t tag; /* tag */
- int len; /* length of the property */
- int level = 0; /* keep track of nesting level */
+ char *prop; /* property */
+ int ret; /* return value */
/*
* list is an alias for print, but limited to 1 level
*/
- if (op == 'l') {
+ if (argv[1][0] == 'l') {
depth = 1;
}
@@ -302,99 +250,14 @@
else
prop = NULL;
- if (strcmp(pathp, "/") == 0) {
- nodeoffset = 0;
- printf("/");
- } else {
- nodeoffset = fdt_path_offset (fdt, pathp);
- if (nodeoffset < 0) {
- /*
- * Not found or something else bad happened.
- */
- printf ("libfdt %s\n", fdt_strerror(nodeoffset));
- return 1;
- }
- }
- /*
- * The user passed in a property as well as node path. Print only
- * the given property and then return.
- */
- if (prop) {
- nodep = fdt_getprop (fdt, nodeoffset, prop, &len);
- if (len == 0) {
- printf("%s %s\n", pathp, prop); /* no property value */
- return 0;
- } else if (len > 0) {
- printf("%s=", prop);
- print_data (nodep, len);
- printf("\n");
- return 0;
- } else {
- printf ("libfdt %s\n", fdt_strerror(len));
- return 1;
- }
- }
-
- /*
- * The user passed in a node path and no property, print the node
- * and all subnodes.
- */
- offstack[0] = nodeoffset;
-
- while(level >= 0) {
- tag = fdt_next_tag(fdt, nodeoffset, &nextoffset, &pathp);
- switch(tag) {
- case FDT_BEGIN_NODE:
- if(level <= depth)
- printf("%s%s {\n", &tabs[MAX_LEVEL - level], pathp);
- level++;
- offstack[level] = nodeoffset;
- if (level >= MAX_LEVEL) {
- printf("Aaaiii <splat> nested too deep.\n");
- return 1;
- }
- break;
- case FDT_END_NODE:
- level--;
- if(level <= depth)
- printf("%s};\n", &tabs[MAX_LEVEL - level]);
- if (level == 0) {
- level = -1; /* exit the loop */
- }
- break;
- case FDT_PROP:
- nodep = fdt_getprop (fdt, offstack[level], pathp, &len);
- if (len < 0) {
- printf ("libfdt %s\n", fdt_strerror(len));
- return 1;
- } else if (len == 0) {
- /* the property has no value */
- if(level <= depth)
- printf("%s%s;\n", &tabs[MAX_LEVEL - level], pathp);
- } else {
- if(level <= depth) {
- printf("%s%s=", &tabs[MAX_LEVEL - level], pathp);
- print_data (nodep, len);
- printf(";\n");
- }
- }
- break;
- case FDT_NOP:
- break;
- case FDT_END:
- return 1;
- default:
- if(level <= depth)
- printf("Unknown tag 0x%08X\n", tag);
- return 1;
- }
- nodeoffset = nextoffset;
- }
+ ret = fdt_print(pathp, prop, depth);
+ if (ret != 0)
+ return ret;
/********************************************************************
* Remove a property/node
********************************************************************/
- } else if (op == 'r') {
+ } else if (argv[1][0] == 'r') {
int nodeoffset; /* node offset from libfdt */
int err;
@@ -402,17 +265,14 @@
* Get the path. The root node is an oddball, the offset
* is zero and has no name.
*/
- if (strcmp(argv[2], "/") == 0) {
- nodeoffset = 0;
- } else {
- nodeoffset = fdt_path_offset (fdt, argv[2]);
- if (nodeoffset < 0) {
- /*
- * Not found or something else bad happened.
- */
- printf ("libfdt %s\n", fdt_strerror(nodeoffset));
- return 1;
- }
+ nodeoffset = fdt_find_node_by_path (fdt, argv[2]);
+ if (nodeoffset < 0) {
+ /*
+ * Not found or something else bad happened.
+ */
+ printf ("libfdt fdt_find_node_by_path() returned %s\n",
+ fdt_strerror(nodeoffset));
+ return 1;
}
/*
* Do the delete. A fourth parameter means delete a property,
@@ -421,39 +281,40 @@
if (argc > 3) {
err = fdt_delprop(fdt, nodeoffset, argv[3]);
if (err < 0) {
- printf("fdt_delprop libfdt: %s\n", fdt_strerror(err));
+ printf("libfdt fdt_delprop(): %s\n",
+ fdt_strerror(err));
return err;
}
} else {
err = fdt_del_node(fdt, nodeoffset);
if (err < 0) {
- printf("fdt_del_node libfdt: %s\n", fdt_strerror(err));
+ printf("libfdt fdt_del_node(): %s\n",
+ fdt_strerror(err));
return err;
}
}
-
- /********************************************************************
- * Create a chosen node
- ********************************************************************/
- } else if (op == 'c') {
+ }
+#ifdef CONFIG_OF_BOARD_SETUP
+ /* Call the board-specific fixup routine */
+ else if (argv[1][0] == 'b')
+ ft_board_setup(fdt, gd->bd);
+#endif
+ /* Create a chosen node */
+ else if (argv[1][0] == 'c')
fdt_chosen(fdt, 0, 0, 1);
- /********************************************************************
- * Create a u-boot-env node
- ********************************************************************/
- } else if (op == 'e') {
+#ifdef CONFIG_OF_HAS_UBOOT_ENV
+ /* Create a u-boot-env node */
+ else if (argv[1][0] == 'e')
fdt_env(fdt);
-
- /********************************************************************
- * Create a bd_t node
- ********************************************************************/
- } else if (op == 'b') {
+#endif
+#ifdef CONFIG_OF_HAS_BD_T
+ /* Create a bd_t node */
+ else if (argv[1][0] == 'b')
fdt_bd_t(fdt);
-
- /********************************************************************
- * Unrecognized command
- ********************************************************************/
- } else {
+#endif
+ else {
+ /* Unrecognized command */
printf ("Usage:\n%s\n", cmdtp->usage);
return 1;
}
@@ -461,7 +322,7 @@
return 0;
}
-/********************************************************************/
+/****************************************************************************/
static int fdt_valid(void)
{
@@ -477,19 +338,21 @@
return 1; /* valid */
if (err < 0) {
- printf("libfdt: %s", fdt_strerror(err));
+ printf("libfdt fdt_check_header(): %s", fdt_strerror(err));
/*
* Be more informative on bad version.
*/
if (err == -FDT_ERR_BADVERSION) {
if (fdt_version(fdt) < FDT_FIRST_SUPPORTED_VERSION) {
printf (" - too old, fdt $d < %d",
- fdt_version(fdt), FDT_FIRST_SUPPORTED_VERSION);
+ fdt_version(fdt),
+ FDT_FIRST_SUPPORTED_VERSION);
fdt = NULL;
}
if (fdt_last_comp_version(fdt) > FDT_LAST_SUPPORTED_VERSION) {
printf (" - too new, fdt $d > %d",
- fdt_version(fdt), FDT_LAST_SUPPORTED_VERSION);
+ fdt_version(fdt),
+ FDT_LAST_SUPPORTED_VERSION);
fdt = NULL;
}
return 0;
@@ -500,13 +363,91 @@
return 1;
}
-/********************************************************************/
+/****************************************************************************/
/*
- * OF flat tree handling
- * Written by: Pantelis Antoniou <pantelis.antoniou@gmail.com>
- * Updated by: Matthew McClintock <msm@freescale.com>
- * Converted to libfdt by: Gerald Van Baren <vanbaren@cideas.com>
+ * Parse the user's input, partially heuristic. Valid formats:
+ * <00> - hex byte
+ * <0011> - hex half word (16 bits)
+ * <00112233> - hex word (32 bits)
+ * - hex double words (64 bits) are not supported, must use
+ * a byte stream instead.
+ * [00 11 22 .. nn] - byte stream
+ * "string" - If the the value doesn't start with "<" or "[", it is
+ * treated as a string. Note that the quotes are
+ * stripped by the parser before we get the string.
+ */
+static int fdt_parse_prop(char *pathp, char *prop, char *newval,
+ char *data, int *len)
+{
+ char *cp; /* temporary char pointer */
+ unsigned long tmp; /* holds converted values */
+
+ if (*newval == '<') {
+ /*
+ * Bigger values than bytes.
+ */
+ *len = 0;
+ newval++;
+ while ((*newval != '>') && (*newval != '\0')) {
+ cp = newval;
+ tmp = simple_strtoul(cp, &newval, 16);
+ if ((newval - cp) <= 2) {
+ *data = tmp & 0xFF;
+ data += 1;
+ *len += 1;
+ } else if ((newval - cp) <= 4) {
+ *(uint16_t *)data = __cpu_to_be16(tmp);
+ data += 2;
+ *len += 2;
+ } else if ((newval - cp) <= 8) {
+ *(uint32_t *)data = __cpu_to_be32(tmp);
+ data += 4;
+ *len += 4;
+ } else {
+ printf("Sorry, I could not convert \"%s\"\n",
+ cp);
+ return 1;
+ }
+ while (*newval == ' ')
+ newval++;
+ }
+ if (*newval != '>') {
+ printf("Unexpected character '%c'\n", *newval);
+ return 1;
+ }
+ } else if (*newval == '[') {
+ /*
+ * Byte stream. Convert the values.
+ */
+ *len = 0;
+ newval++;
+ while ((*newval != ']') && (*newval != '\0')) {
+ tmp = simple_strtoul(newval, &newval, 16);
+ *data++ = tmp & 0xFF;
+ *len = *len + 1;
+ while (*newval == ' ')
+ newval++;
+ }
+ if (*newval != ']') {
+ printf("Unexpected character '%c'\n", *newval);
+ return 1;
+ }
+ } else {
+ /*
+ * Assume it is a string. Copy it into our data area for
+ * convenience (including the terminating '\0').
+ */
+ *len = strlen(newval) + 1;
+ strcpy(data, newval);
+ }
+ return 0;
+}
+
+/****************************************************************************/
+
+/*
+ * Heuristic to guess if this is a string or concatenated strings.
*/
static int is_printable_string(const void *data, int len)
@@ -546,6 +487,12 @@
return 1;
}
+
+/*
+ * Print the property in the best format, a heuristic guess. Print as
+ * a string, concatenated strings, a byte, word, double word, or (if all
+ * else fails) it is printed as a stream of bytes.
+ */
static void print_data(const void *data, int len)
{
int j;
@@ -601,32 +548,146 @@
}
}
+/****************************************************************************/
+
+/*
+ * Recursively print (a portion of) the fdt. The depth parameter
+ * determines how deeply nested the fdt is printed.
+ */
+static int fdt_print(char *pathp, char *prop, int depth)
+{
+ static int offstack[MAX_LEVEL];
+ static char tabs[MAX_LEVEL+1] =
+ "\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t"
+ "\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t\t";
+ void *nodep; /* property node pointer */
+ int nodeoffset; /* node offset from libfdt */
+ int nextoffset; /* next node offset from libfdt */
+ uint32_t tag; /* tag */
+ int len; /* length of the property */
+ int level = 0; /* keep track of nesting level */
+
+ nodeoffset = fdt_find_node_by_path (fdt, pathp);
+ if (nodeoffset < 0) {
+ /*
+ * Not found or something else bad happened.
+ */
+ printf ("libfdt fdt_find_node_by_path() returned %s\n",
+ fdt_strerror(nodeoffset));
+ return 1;
+ }
+ /*
+ * The user passed in a property as well as node path.
+ * Print only the given property and then return.
+ */
+ if (prop) {
+ nodep = fdt_getprop (fdt, nodeoffset, prop, &len);
+ if (len == 0) {
+ /* no property value */
+ printf("%s %s\n", pathp, prop);
+ return 0;
+ } else if (len > 0) {
+ printf("%s=", prop);
+ print_data (nodep, len);
+ printf("\n");
+ return 0;
+ } else {
+ printf ("libfdt fdt_getprop(): %s\n",
+ fdt_strerror(len));
+ return 1;
+ }
+ }
+
+ /*
+ * The user passed in a node path and no property,
+ * print the node and all subnodes.
+ */
+ offstack[0] = nodeoffset;
+
+ while(level >= 0) {
+ tag = fdt_next_tag(fdt, nodeoffset, &nextoffset, &pathp);
+ switch(tag) {
+ case FDT_BEGIN_NODE:
+ if(level <= depth)
+ printf("%s%s {\n",
+ &tabs[MAX_LEVEL - level], pathp);
+ level++;
+ offstack[level] = nodeoffset;
+ if (level >= MAX_LEVEL) {
+ printf("Aaaiii <splat> nested too deep. "
+ "Aborting.\n");
+ return 1;
+ }
+ break;
+ case FDT_END_NODE:
+ level--;
+ if(level <= depth)
+ printf("%s};\n", &tabs[MAX_LEVEL - level]);
+ if (level == 0) {
+ level = -1; /* exit the loop */
+ }
+ break;
+ case FDT_PROP:
+ nodep = fdt_getprop (fdt, offstack[level], pathp, &len);
+ if (len < 0) {
+ printf ("libfdt fdt_getprop(): %s\n",
+ fdt_strerror(len));
+ return 1;
+ } else if (len == 0) {
+ /* the property has no value */
+ if(level <= depth)
+ printf("%s%s;\n",
+ &tabs[MAX_LEVEL - level],
+ pathp);
+ } else {
+ if(level <= depth) {
+ printf("%s%s=",
+ &tabs[MAX_LEVEL - level],
+ pathp);
+ print_data (nodep, len);
+ printf(";\n");
+ }
+ }
+ break;
+ case FDT_NOP:
+ break;
+ case FDT_END:
+ return 1;
+ default:
+ if(level <= depth)
+ printf("Unknown tag 0x%08X\n", tag);
+ return 1;
+ }
+ nodeoffset = nextoffset;
+ }
+ return 0;
+}
+
/********************************************************************/
U_BOOT_CMD(
fdt, 5, 0, do_fdt,
"fdt - flattened device tree utility commands\n",
"addr <addr> [<length>] - Set the fdt location to <addr>\n"
+#ifdef CONFIG_OF_BOARD_SETUP
+ "fdt boardsetup - Do board-specific set up\n"
+#endif
"fdt move <fdt> <newaddr> <length> - Copy the fdt to <addr>\n"
"fdt print <path> [<prop>] - Recursive print starting at <path>\n"
"fdt list <path> [<prop>] - Print one level starting at <path>\n"
"fdt set <path> <prop> [<val>] - Set <property> [to <val>]\n"
"fdt mknode <path> <node> - Create a new node after <path>\n"
"fdt rm <path> [<prop>] - Delete the node or <property>\n"
- "fdt chosen - Add/update the \"/chosen\" branch in the tree\n"
+ "fdt chosen - Add/update the /chosen branch in the tree\n"
#ifdef CONFIG_OF_HAS_UBOOT_ENV
- "fdt env - Add/replace the \"/u-boot-env\" branch in the tree\n"
+ "fdt env - Add/replace the /u-boot-env branch in the tree\n"
#endif
#ifdef CONFIG_OF_HAS_BD_T
- "fdt bd_t - Add/replace the \"/bd_t\" branch in the tree\n"
+ "fdt bd_t - Add/replace the /bd_t branch in the tree\n"
#endif
"Hints:\n"
- " * Set a larger length with the fdt addr command to add to the blob.\n"
- " * If the property you are setting/printing has a '#' character,\n"
- " you MUST escape it with a \\ character or quote it with \" or\n"
- " it will be ignored as a comment.\n"
- " * If the value has spaces in it, you MUST escape the spaces with\n"
- " \\ characters or quote it with \"\"\n"
+ " If the property you are setting/printing has a '#' character or spaces,\n"
+ " you MUST escape it with a \\ character or quote it with \".\n"
"Examples: fdt print / # print the whole tree\n"
" fdt print /cpus \"#address-cells\"\n"
" fdt set /cpus \"#address-cells\" \"[00 00 00 01]\"\n"
diff --git a/common/cmd_flash.c b/common/cmd_flash.c
index cb1c5bb..11c8857 100644
--- a/common/cmd_flash.c
+++ b/common/cmd_flash.c
@@ -31,9 +31,9 @@
#include <dataflash.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
#include <jffs2/jffs2.h>
/* parition handling routines */
@@ -311,7 +311,7 @@
flash_info_t *info;
ulong bank, addr_first, addr_last;
int n, sect_first, sect_last;
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
struct mtd_device *dev;
struct part_info *part;
u8 dev_type, dev_num, pnum;
@@ -343,7 +343,7 @@
return rcode;
}
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
/* erase <part-id> - erase partition */
if ((argc == 2) && (id_parse(argv[1], NULL, &dev_type, &dev_num) == 0)) {
mtdparts_init();
@@ -447,7 +447,7 @@
flash_info_t *info;
ulong bank, addr_first, addr_last;
int i, p, n, sect_first, sect_last;
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
struct mtd_device *dev;
struct part_info *part;
u8 dev_type, dev_num, pnum;
@@ -539,7 +539,7 @@
return rcode;
}
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
/* protect on/off <part-id> */
if ((argc == 3) && (id_parse(argv[2], NULL, &dev_type, &dev_num) == 0)) {
mtdparts_init();
@@ -672,7 +672,7 @@
/**************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
# define TMP_ERASE "erase <part-id>\n - erase partition\n"
# define TMP_PROT_ON "protect on <part-id>\n - protect partition\n"
# define TMP_PROT_OFF "protect off <part-id>\n - make partition writable\n"
@@ -690,7 +690,7 @@
);
U_BOOT_CMD(
- erase, 3, 1, do_flerase,
+ erase, 3, 0, do_flerase,
"erase - erase FLASH memory\n",
"start end\n"
" - erase FLASH from addr 'start' to addr 'end'\n"
@@ -704,7 +704,7 @@
);
U_BOOT_CMD(
- protect, 4, 1, do_protect,
+ protect, 4, 0, do_protect,
"protect - enable or disable FLASH write protection\n",
"on start end\n"
" - protect FLASH from addr 'start' to addr 'end'\n"
@@ -732,4 +732,4 @@
#undef TMP_PROT_ON
#undef TMP_PROT_OFF
-#endif /* CFG_CMD_FLASH */
+#endif
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 3444091..3fc4fca 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -27,7 +27,7 @@
*/
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#include <net.h>
#endif
#include <fpga.h>
@@ -43,7 +43,7 @@
#define PRINTF(fmt,args...)
#endif
-#if defined (CONFIG_FPGA) && ( CONFIG_COMMANDS & CFG_CMD_FPGA )
+#if defined (CONFIG_FPGA) && defined(CONFIG_CMD_FPGA)
/* Local functions */
static void fpga_usage (cmd_tbl_t * cmdtp);
@@ -321,4 +321,4 @@
"\tloadb\tLoad device from bitstream buffer (Xilinx devices only)\n"
"\tloadmk\tLoad device generated with mkimage\n"
"\tdump\tLoad device to memory buffer\n");
-#endif /* CONFIG_FPGA && CONFIG_COMMANDS & CFG_CMD_FPGA */
+#endif
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 755810d..a684a58 100644
--- a/common/cmd_i2c.c
+++ b/common/cmd_i2c.c
@@ -86,7 +86,7 @@
#include <i2c.h>
#include <asm/byteorder.h>
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
/* Display values from last command.
@@ -657,7 +657,7 @@
* The SDRAM command is separately configured because many
* (most?) embedded boards don't use SDRAM DIMMs.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
+#if defined(CONFIG_CMD_SDRAM)
/*
* Syntax:
@@ -877,7 +877,7 @@
return 0;
}
-#endif /* CFG_CMD_SDRAM */
+#endif
#if defined(CONFIG_I2C_CMD_TREE)
#if defined(CONFIG_I2C_MULTI_BUS)
@@ -938,10 +938,10 @@
return do_i2c_probe(cmdtp, flag, --argc, ++argv);
if (!strncmp(argv[1], "lo", 2))
return do_i2c_loop(cmdtp, flag, --argc, ++argv);
-#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
+#if defined(CONFIG_CMD_SDRAM)
if (!strncmp(argv[1], "sd", 2))
return do_sdram(cmdtp, flag, --argc, ++argv);
-#endif /* CFG_CMD_SDRAM */
+#endif
else
printf ("Usage:\n%s\n", cmdtp->usage);
return 0;
@@ -965,9 +965,9 @@
"i2c crc32 chip address[.0, .1, .2] count - compute CRC32 checksum\n"
"i2c probe - show devices on the I2C bus\n"
"i2c loop chip address[.0, .1, .2] [# of objects] - looping read of device\n"
-#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
+#if defined(CONFIG_CMD_SDRAM)
"i2c sdram chip - print SDRAM configuration information\n"
-#endif /* CFG_CMD_SDRAM */
+#endif
);
#endif /* CONFIG_I2C_CMD_TREE */
U_BOOT_CMD(
@@ -1016,7 +1016,7 @@
" - loop, reading a set of addresses\n"
);
-#if (CONFIG_COMMANDS & CFG_CMD_SDRAM)
+#if defined(CONFIG_CMD_SDRAM)
U_BOOT_CMD(
isdram, 2, 1, do_sdram,
"isdram - print SDRAM configuration information\n",
@@ -1025,4 +1025,4 @@
);
#endif
-#endif /* CFG_CMD_I2C */
+#endif
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index ce99a41..bb064ea 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -31,6 +31,7 @@
#include <command.h>
#include <image.h>
#include <asm/byteorder.h>
+#include <asm/io.h>
#if defined(CONFIG_IDE_8xx_DIRECT) || defined(CONFIG_IDE_PCMCIA)
# include <pcmcia.h>
@@ -59,13 +60,6 @@
#endif
#endif
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
#ifdef CONFIG_IDE_8xx_DIRECT
DECLARE_GLOBAL_DATA_PTR;
#endif
@@ -78,7 +72,7 @@
# define SYNC /* nothing */
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
#ifdef CONFIG_IDE_8xx_DIRECT
/* Timings for IDE Interface
@@ -135,8 +129,6 @@
};
-#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
-
#ifndef CONFIG_AMIGAONEG3SE
static int ide_bus_ok[CFG_IDE_MAXBUS];
#else
@@ -179,12 +171,15 @@
#define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
-static void __inline__ ide_outb(int dev, int port, unsigned char val);
-static unsigned char __inline__ ide_inb(int dev, int port);
+void inline ide_outb(int dev, int port, unsigned char val);
+unsigned char inline ide_inb(int dev, int port);
static void input_data(int dev, ulong *sect_buf, int words);
static void output_data(int dev, ulong *sect_buf, int words);
static void ident_cpy (unsigned char *dest, unsigned char *src, unsigned int len);
+#ifndef CFG_ATA_PORT_ADDR
+#define CFG_ATA_PORT_ADDR(port) (port)
+#endif
#ifdef CONFIG_ATAPI
static void atapi_inquiry(block_dev_desc_t *dev_desc);
@@ -382,6 +377,7 @@
image_header_t *hdr;
int rcode = 0;
+ show_boot_progress (41);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
@@ -397,44 +393,50 @@
break;
default:
printf ("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-42);
return 1;
}
+ show_boot_progress (42);
if (!boot_device) {
puts ("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-43);
return 1;
}
+ show_boot_progress (43);
dev = simple_strtoul(boot_device, &ep, 16);
if (ide_dev_desc[dev].type==DEV_TYPE_UNKNOWN) {
printf ("\n** Device %d not available\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-44);
return 1;
}
+ show_boot_progress (44);
if (*ep) {
if (*ep != ':') {
puts ("\n** Invalid boot device, use `dev[:part]' **\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-45);
return 1;
}
part = simple_strtoul(++ep, NULL, 16);
}
+ show_boot_progress (45);
if (get_partition_info (&ide_dev_desc[dev], part, &info)) {
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-46);
return 1;
}
+ show_boot_progress (46);
if ((strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) &&
(strncmp((char *)info.type, BOOT_PART_COMP, sizeof(info.type)) != 0)) {
printf ("\n** Invalid partition type \"%.32s\""
" (expect \"" BOOT_PART_TYPE "\")\n",
info.type);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-47);
return 1;
}
+ show_boot_progress (47);
printf ("\nLoading from IDE device %d, partition %d: "
"Name: %.32s Type: %.32s\n",
@@ -445,26 +447,29 @@
if (ide_dev_desc[dev].block_read (dev, info.start, 1, (ulong *)addr) != 1) {
printf ("** Read error on %d:%d\n", dev, part);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-48);
return 1;
}
+ show_boot_progress (48);
hdr = (image_header_t *)addr;
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
printf("\n** Bad Magic Number **\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-49);
return 1;
}
+ show_boot_progress (49);
checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
if (crc32 (0, (uchar *)hdr, sizeof(image_header_t)) != checksum) {
puts ("\n** Bad Header Checksum **\n");
- SHOW_BOOT_PROGRESS (-2);
+ show_boot_progress (-50);
return 1;
}
+ show_boot_progress (50);
hdr->ih_hcrc = htonl(checksum); /* restore checksum for later use */
print_image_hdr (hdr);
@@ -477,9 +482,10 @@
if (ide_dev_desc[dev].block_read (dev, info.start+1, cnt,
(ulong *)(addr+info.blksz)) != cnt) {
printf ("** Read error on %d:%d\n", dev, part);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-51);
return 1;
}
+ show_boot_progress (51);
/* Loading ok, update default load address */
@@ -514,11 +520,11 @@
unsigned char c;
int i, bus;
#if defined(CONFIG_AMIGAONEG3SE) || defined(CONFIG_SC3)
- unsigned int ata_reset_time;
+ unsigned int ata_reset_time = ATA_RESET_TIME;
+ char *s;
#endif
#ifdef CONFIG_AMIGAONEG3SE
unsigned int max_bus_scan;
- char *s;
#endif
#ifdef CONFIG_IDE_8xx_PCCARD
extern int pcmcia_on (void);
@@ -798,45 +804,27 @@
/* ------------------------------------------------------------------------- */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
-static void __inline__
-ide_outb(int dev, int port, unsigned char val)
+void inline
+__ide_outb(int dev, int port, unsigned char val)
{
debug ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
- dev, port, val, (ATA_CURR_BASE(dev)+port));
-
- /* Ensure I/O operations complete */
- EIEIO;
- *((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
+ dev, port, val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
+ outb(val, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
}
-#else /* ! __PPC__ */
-static void __inline__
-ide_outb(int dev, int port, unsigned char val)
-{
- outb(val, ATA_CURR_BASE(dev)+port);
-}
-#endif /* __PPC__ */
+void inline ide_outb (int dev, int port, unsigned char val)
+ __attribute__((weak, alias("__ide_outb")));
-
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
-static unsigned char __inline__
-ide_inb(int dev, int port)
+unsigned char inline
+__ide_inb(int dev, int port)
{
uchar val;
- /* Ensure I/O operations complete */
- EIEIO;
- val = *((uchar *)(ATA_CURR_BASE(dev)+port));
+ val = inb((ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)));
debug ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
- dev, port, (ATA_CURR_BASE(dev)+port), val);
- return (val);
+ dev, port, (ATA_CURR_BASE(dev)+CFG_ATA_PORT_ADDR(port)), val);
+ return val;
}
-#else /* ! __PPC__ */
-static unsigned char __inline__
-ide_inb(int dev, int port)
-{
- return inb(ATA_CURR_BASE(dev)+port);
-}
-#endif /* __PPC__ */
+unsigned char inline ide_inb(int dev, int port)
+ __attribute__((weak, alias("__ide_inb")));
#ifdef __PPC__
# ifdef CONFIG_AMIGAONEG3SE
@@ -891,6 +879,9 @@
#ifdef __MIPS__
*dbuf++ = swab16p((u16*)pbuf);
*dbuf++ = swab16p((u16*)pbuf);
+#elif defined(CONFIG_PCS440EP)
+ *dbuf++ = *pbuf;
+ *dbuf++ = *pbuf;
#else
*dbuf++ = ld_le16(pbuf);
*dbuf++ = ld_le16(pbuf);
@@ -930,10 +921,18 @@
pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
dbuf = (ushort *)sect_buf;
while (words--) {
+#if defined(CONFIG_PCS440EP)
+ /* not tested, because CF was write protected */
+ EIEIO;
+ *pbuf = ld_le16(dbuf++);
+ EIEIO;
+ *pbuf = ld_le16(dbuf++);
+#else
EIEIO;
*pbuf = *dbuf++;
EIEIO;
*pbuf = *dbuf++;
+#endif
}
#endif
}
@@ -981,10 +980,17 @@
debug("in input data base for read is %lx\n", (unsigned long) pbuf);
while (words--) {
+#if defined(CONFIG_PCS440EP)
+ EIEIO;
+ *dbuf++ = ld_le16(pbuf);
+ EIEIO;
+ *dbuf++ = ld_le16(pbuf);
+#else
EIEIO;
*dbuf++ = *pbuf;
EIEIO;
*dbuf++ = *pbuf;
+#endif
}
#endif
}
@@ -2080,4 +2086,4 @@
"loadAddr dev:part\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
+#endif
diff --git a/common/cmd_immap.c b/common/cmd_immap.c
index fa79b45..ae95758 100644
--- a/common/cmd_immap.c
+++ b/common/cmd_immap.c
@@ -28,7 +28,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_IMMAP) && \
+#if defined(CONFIG_CMD_IMMAP) && \
(defined(CONFIG_8xx) || defined(CONFIG_8260))
#if defined(CONFIG_8xx)
@@ -720,4 +720,4 @@
);
-#endif /* CFG_CMD_IMMAP && (CONFIG_8xx || CONFIG_8260) */
+#endif
diff --git a/common/cmd_itest.c b/common/cmd_itest.c
index 8ad134f..8e20517 100644
--- a/common/cmd_itest.c
+++ b/common/cmd_itest.c
@@ -32,7 +32,7 @@
#include <config.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_ITEST)
+#if defined(CONFIG_CMD_ITEST)
#define EQ 0
#define NE 1
@@ -197,4 +197,4 @@
"itest\t- return true/false on integer compare\n",
"[.b, .w, .l, .s] [*]value1 <op> [*]value2\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_ITEST */
+#endif
diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c
index 7fd1fa3..513a226 100644
--- a/common/cmd_jffs2.c
+++ b/common/cmd_jffs2.c
@@ -94,18 +94,18 @@
#include <linux/list.h>
#include <linux/ctype.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <cramfs/cramfs_fs.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#ifdef CFG_NAND_LEGACY
#include <linux/mtd/nand_legacy.h>
#else /* !CFG_NAND_LEGACY */
#include <linux/mtd/nand.h>
#include <nand.h>
#endif /* !CFG_NAND_LEGACY */
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
/* enable/disable debugging messages */
#define DEBUG_JFFS
#undef DEBUG_JFFS
@@ -321,7 +321,7 @@
*/
static int part_validate_nor(struct mtdids *id, struct part_info *part)
{
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
/* info for FLASH chips */
extern flash_info_t flash_info[];
flash_info_t *flash;
@@ -370,7 +370,7 @@
*/
static int part_validate_nand(struct mtdids *id, struct part_info *part)
{
-#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
/* info for NAND chips */
nand_info_t *nand;
@@ -719,7 +719,7 @@
static int device_validate(u8 type, u8 num, u32 *size)
{
if (type == MTD_DEV_TYPE_NOR) {
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
if (num < CFG_MAX_FLASH_BANKS) {
extern flash_info_t flash_info[];
*size = flash_info[num].size;
@@ -733,7 +733,7 @@
printf("support for FLASH devices not present\n");
#endif
} else if (type == MTD_DEV_TYPE_NAND) {
-#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
if (num < CFG_MAX_NAND_DEVICE) {
#ifndef CFG_NAND_LEGACY
*size = nand_info[num].size;
@@ -2192,4 +2192,4 @@
/***************************************************/
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/common/cmd_load.c b/common/cmd_load.c
index f63b8e8..204c3eb 100644
--- a/common/cmd_load.c
+++ b/common/cmd_load.c
@@ -33,24 +33,24 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_LOADB)
+#if defined(CONFIG_CMD_LOADB)
static ulong load_serial_ymodem (ulong offset);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_LOADS)
+#if defined(CONFIG_CMD_LOADS)
static ulong load_serial (ulong offset);
static int read_record (char *buf, ulong len);
-# if (CONFIG_COMMANDS & CFG_CMD_SAVES)
+# if defined(CONFIG_CMD_SAVES)
static int save_serial (ulong offset, ulong size);
static int write_record (char *buf);
-# endif /* CFG_CMD_SAVES */
+#endif
static int do_echo = 1;
-#endif /* CFG_CMD_LOADS */
+#endif
/* -------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_LOADS)
+#if defined(CONFIG_CMD_LOADS)
int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
ulong offset = 0;
@@ -253,7 +253,7 @@
return (p - buf);
}
-#if (CONFIG_COMMANDS & CFG_CMD_SAVES)
+#if defined(CONFIG_CMD_SAVES)
int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -399,13 +399,15 @@
}
return (0);
}
-# endif /* CFG_CMD_SAVES */
+# endif
-#endif /* CFG_CMD_LOADS */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_LOADB) /* loadb command (load binary) included */
-
+#if defined(CONFIG_CMD_LOADB)
+/*
+ * loadb command (load binary) included
+ */
#define XON_CHAR 17
#define XOFF_CHAR 19
#define START_CHAR 0x01
@@ -1036,11 +1038,11 @@
return offset;
}
-#endif /* CFG_CMD_LOADB */
+#endif
/* -------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_LOADS)
+#if defined(CONFIG_CMD_LOADS)
#ifdef CFG_LOADS_BAUD_CHANGE
U_BOOT_CMD(
@@ -1065,7 +1067,7 @@
*/
-#if (CONFIG_COMMANDS & CFG_CMD_SAVES)
+#if defined(CONFIG_CMD_SAVES)
#ifdef CFG_LOADS_BAUD_CHANGE
U_BOOT_CMD(
saves, 4, 0, do_save_serial,
@@ -1082,11 +1084,11 @@
" - save S-Record file over serial line with offset 'off' and size 'size'\n"
);
#endif /* CFG_LOADS_BAUD_CHANGE */
-#endif /* CFG_CMD_SAVES */
-#endif /* CFG_CMD_LOADS */
+#endif
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_LOADB)
+#if defined(CONFIG_CMD_LOADB)
U_BOOT_CMD(
loadb, 3, 0, do_load_serial_bin,
"loadb - load binary file over serial line (kermit mode)\n",
@@ -1103,11 +1105,11 @@
" with offset 'off' and baudrate 'baud'\n"
);
-#endif /* CFG_CMD_LOADB */
+#endif
/* -------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_HWFLOW)
+#if defined(CONFIG_CMD_HWFLOW)
int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
extern int hwflow_onoff(int);
@@ -1133,4 +1135,4 @@
"[on|off]\n - change RTS/CTS hardware flow control over serial line\n"
);
-#endif /* CFG_CMD_HWFLOW */
+#endif
diff --git a/common/cmd_log.c b/common/cmd_log.c
index 042a403..fba8bd8 100644
--- a/common/cmd_log.c
+++ b/common/cmd_log.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2002
+ * (C) Copyright 2002-2007
* Detlev Zundel, DENX Software Engineering, dzu@denx.de.
*
* Code used from linux/kernel/printk.c
@@ -60,45 +60,40 @@
/* This combination will not print messages with the default loglevel */
static unsigned console_loglevel = 3;
static unsigned default_message_loglevel = 4;
-static unsigned char *log_buf = NULL;
-static unsigned long *ext_log_size;
-static unsigned long *ext_log_start;
-static unsigned long *ext_logged_chars;
-#define log_size (*ext_log_size)
-#define log_start (*ext_log_start)
-#define logged_chars (*ext_logged_chars)
+static unsigned log_version = 1;
+static logbuff_t *log;
-/* Forced by code, eh! */
-#define LOGBUFF_MAGIC 0xc0de4ced
-
-/* The mapping used here has to be the same as in setup_ext_logbuff ()
- in linux/kernel/printk */
void logbuff_init_ptrs (void)
{
- unsigned long *ext_tag;
- unsigned long post_word;
+ unsigned long tag, post_word;
char *s;
- log_buf = (unsigned char *)(gd->bd->bi_memsize-LOGBUFF_LEN);
- ext_tag = (unsigned long *)(log_buf)-4;
- ext_log_start = (unsigned long *)(log_buf)-3;
- ext_log_size = (unsigned long *)(log_buf)-2;
- ext_logged_chars = (unsigned long *)(log_buf)-1;
+ log = (logbuff_t *)(gd->bd->bi_memsize-LOGBUFF_LEN) - 1;
+
+ /* Set up log version */
+ if ((s = getenv ("logversion")) != NULL)
+ log_version = (int)simple_strtoul (s, NULL, 10);
+
+ if (log_version == 2)
+ tag = log->v2.tag;
+ else
+ tag = log->v1.tag;
post_word = post_word_load();
#ifdef CONFIG_POST
/* The post routines have setup the word so we can simply test it */
- if (post_word_load () & POST_COLDBOOT) {
- logged_chars = log_size = log_start = 0;
- *ext_tag = LOGBUFF_MAGIC;
- }
+ if (tag != LOGBUFF_MAGIC || (post_word & POST_COLDBOOT)) {
+ logbuff_reset ();
+ }
#else
/* No post routines, so we do our own checking */
- if (post_word != LOGBUFF_MAGIC) {
- logged_chars = log_size = log_start = 0;
+ if (tag != LOGBUFF_MAGIC || post_word != LOGBUFF_MAGIC) {
+ logbuff_reset ();
post_word_store (LOGBUFF_MAGIC);
- *ext_tag = LOGBUFF_MAGIC;
- }
+ }
#endif
+ if (log_version == 2 && (long)log->v2.start > (long)log->v2.con)
+ log->v2.start = log->v2.con;
+
/* Initialize default loglevel if present */
if ((s = getenv ("loglevel")) != NULL)
console_loglevel = (int)simple_strtoul (s, NULL, 10);
@@ -106,6 +101,15 @@
gd->post_log_word |= LOGBUFF_INITIALIZED;
}
+void logbuff_reset (void)
+{
+ memset (log, 0, sizeof (logbuff_t));
+ if (log_version == 2)
+ log->v2.tag = LOGBUFF_MAGIC;
+ else
+ log->v1.tag = LOGBUFF_MAGIC;
+}
+
int drv_logbuff_init (void)
{
device_t logdev;
@@ -162,7 +166,7 @@
int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
char *s;
- unsigned long i;
+ unsigned long i, start, size;
if (strcmp(argv[1],"append") == 0) {
/* Log concatenation of all arguments separated by spaces */
@@ -177,21 +181,34 @@
case 2:
if (strcmp(argv[1],"show") == 0) {
- for (i=0; i < (log_size&LOGBUFF_MASK); i++) {
- s = (char *)log_buf+((log_start+i)&LOGBUFF_MASK);
+ if (log_version == 2) {
+ start = log->v2.start;
+ size = log->v2.end - log->v2.start;
+ }
+ else {
+ start = log->v1.start;
+ size = log->v1.size;
+ }
+ for (i=0; i < (size&LOGBUFF_MASK); i++) {
+ s = (char *)log->buf+((start+i)&LOGBUFF_MASK);
putc (*s);
}
return 0;
} else if (strcmp(argv[1],"reset") == 0) {
- log_start = 0;
- log_size = 0;
- logged_chars = 0;
+ logbuff_reset ();
return 0;
} else if (strcmp(argv[1],"info") == 0) {
- printf ("Logbuffer at %08lx\n", (unsigned long)log_buf);
- printf ("log_start = %08lx\n", log_start);
- printf ("log_size = %08lx\n", log_size);
- printf ("logged_chars = %08lx\n", logged_chars);
+ printf ("Logbuffer at %08lx\n", (unsigned long)log->buf);
+ if (log_version == 2) {
+ printf ("log_start = %08lx\n", log->v2.start);
+ printf ("log_end = %08lx\n", log->v2.end);
+ printf ("logged_chars = %08lx\n", log->v2.chars);
+ }
+ else {
+ printf ("log_start = %08lx\n", log->v1.start);
+ printf ("log_size = %08lx\n", log->v1.size);
+ printf ("logged_chars = %08lx\n", log->v1.chars);
+ }
return 0;
}
printf ("Usage:\n%s\n", cmdtp->usage);
@@ -202,7 +219,7 @@
return 1;
}
}
-#if defined(CONFIG_LOGBUFFER)
+
U_BOOT_CMD(
log, 255, 1, do_log,
"log - manipulate logbuffer\n",
@@ -211,7 +228,7 @@
"log show - show contents\n"
"log append <msg> - append <msg> to the logbuffer\n"
);
-#endif /* CONFIG_LOGBUFFER */
+
static int logbuff_printk(const char *line)
{
int i;
@@ -241,13 +258,22 @@
}
line_feed = 0;
for (; p < buf_end; p++) {
- log_buf[(log_start+log_size) & LOGBUFF_MASK] = *p;
- if (log_size < LOGBUFF_LEN)
- log_size++;
- else
- log_start++;
-
- logged_chars++;
+ if (log_version == 2) {
+ log->buf[log->v2.end & LOGBUFF_MASK] = *p;
+ log->v2.end++;
+ if (log->v2.end - log->v2.start > LOGBUFF_LEN)
+ log->v2.start++;
+ log->v2.chars++;
+ }
+ else {
+ log->buf[(log->v1.start + log->v1.size) &
+ LOGBUFF_MASK] = *p;
+ if (log->v1.size < LOGBUFF_LEN)
+ log->v1.size++;
+ else
+ log->v1.start++;
+ log->v1.chars++;
+ }
if (*p == '\n') {
line_feed = 1;
break;
diff --git a/common/cmd_mem.c b/common/cmd_mem.c
index fcbb023..a994211 100644
--- a/common/cmd_mem.c
+++ b/common/cmd_mem.c
@@ -29,18 +29,19 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+#if defined(CONFIG_CMD_MMC)
#include <mmc.h>
#endif
#ifdef CONFIG_HAS_DATAFLASH
#include <dataflash.h>
#endif
-#if (CONFIG_COMMANDS & (CFG_CMD_MEMORY | \
- CFG_CMD_I2C | \
- CFG_CMD_ITEST | \
- CFG_CMD_PCI | \
- CMD_CMD_PORTIO ) )
+#if defined(CONFIG_CMD_MEMORY) \
+ || defined(CONFIG_CMD_I2C) \
+ || defined(CONFIG_CMD_ITEST) \
+ || defined(CONFIG_CMD_PCI) \
+ || defined(CONFIG_CMD_PORTIO)
+
int cmd_get_data_size(char* arg, int default_size)
{
/* Check for a size specification .b, .w or .l.
@@ -64,7 +65,7 @@
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_MEMORY)
+#if defined(CONFIG_CMD_MEMORY)
#ifdef CMD_MEM_DEBUG
#define PRINTF(fmt,args...) printf (fmt ,##args)
@@ -403,7 +404,7 @@
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+#if defined(CONFIG_CMD_MMC)
if (mmc2info(dest)) {
int rc;
@@ -1149,7 +1150,7 @@
#endif /* CONFIG_CRC32_VERIFY */
/**************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_MEMORY)
+#if defined(CONFIG_CMD_MEMORY)
U_BOOT_CMD(
md, 3, 1, do_mem_md,
"md - memory display\n",
@@ -1252,4 +1253,4 @@
#endif /* CONFIG_MX_CYCLIC */
#endif
-#endif /* CFG_CMD_MEMORY */
+#endif
diff --git a/common/cmd_mfsl.c b/common/cmd_mfsl.c
new file mode 100644
index 0000000..8d4c1a3
--- /dev/null
+++ b/common/cmd_mfsl.c
@@ -0,0 +1,417 @@
+/*
+ * (C) Copyright 2007 Michal Simek
+ *
+ * Michal SIMEK <monstr@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Microblaze FSL support
+ */
+
+#include <common.h>
+#include <config.h>
+#include <command.h>
+
+#if defined(CONFIG_CMD_MFSL)
+#include <asm/asm.h>
+
+int do_frd (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned int fslnum;
+ unsigned int num;
+ unsigned int blocking;
+
+ if (argc < 2) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ fslnum = (unsigned int)simple_strtoul (argv[1], NULL, 16);
+ blocking = (unsigned int)simple_strtoul (argv[2], NULL, 16);
+ if (fslnum < 0 || fslnum >= XILINX_FSL_NUMBER) {
+ puts ("Bad number of FSL\n");
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ switch (fslnum) {
+#if (XILINX_FSL_NUMBER > 0)
+ case 0:
+ switch (blocking) {
+ case 0: NGET (num, 0);
+ break;
+ case 1: NCGET (num, 0);
+ break;
+ case 2: GET (num, 0);
+ break;
+ case 3: CGET (num, 0);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 1)
+ case 1:
+ switch (blocking) {
+ case 0: NGET (num, 1);
+ break;
+ case 1: NCGET (num, 1);
+ break;
+ case 2: GET (num, 1);
+ break;
+ case 3: CGET (num, 1);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 2)
+ case 2:
+ switch (blocking) {
+ case 0: NGET (num, 2);
+ break;
+ case 1: NCGET (num, 2);
+ break;
+ case 2: GET (num, 2);
+ break;
+ case 3: CGET (num, 2);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 3)
+ case 3:
+ switch (blocking) {
+ case 0: NGET (num, 3);
+ break;
+ case 1: NCGET (num, 3);
+ break;
+ case 2: GET (num, 3);
+ break;
+ case 3: CGET (num, 3);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 4)
+ case 4:
+ switch (blocking) {
+ case 0: NGET (num, 4);
+ break;
+ case 1: NCGET (num, 4);
+ break;
+ case 2: GET (num, 4);
+ break;
+ case 3: CGET (num, 4);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 5)
+ case 5:
+ switch (blocking) {
+ case 0: NGET (num, 5);
+ break;
+ case 1: NCGET (num, 5);
+ break;
+ case 2: GET (num, 5);
+ break;
+ case 3: CGET (num, 5);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 6)
+ case 6:
+ switch (blocking) {
+ case 0: NGET (num, 6);
+ break;
+ case 1: NCGET (num, 6);
+ break;
+ case 2: GET (num, 6);
+ break;
+ case 3: CGET (num, 6);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 7)
+ case 7:
+ switch (blocking) {
+ case 0: NGET (num, 7);
+ break;
+ case 1: NCGET (num, 7);
+ break;
+ case 2: GET (num, 7);
+ break;
+ case 3: CGET (num, 7);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+ default:
+ return 1;
+ }
+
+ printf ("%01x: 0x%08lx - %s %s read\n", fslnum, num,
+ blocking < 2 ? "non blocking" : "blocking",
+ ((blocking == 1) || (blocking == 3)) ? "control" : "data" );
+ return 0;
+}
+
+int do_fwr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned int fslnum;
+ unsigned int num;
+ unsigned int blocking;
+
+ if (argc < 3) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ fslnum = (unsigned int)simple_strtoul (argv[1], NULL, 16);
+ num = (unsigned int)simple_strtoul (argv[2], NULL, 16);
+ blocking = (unsigned int)simple_strtoul (argv[3], NULL, 16);
+ if (fslnum < 0 || fslnum >= XILINX_FSL_NUMBER) {
+ printf ("Bad number of FSL\nUsage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ switch (fslnum) {
+#if (XILINX_FSL_NUMBER > 0)
+ case 0:
+ switch (blocking) {
+ case 0: NPUT (num, 0);
+ break;
+ case 1: NCPUT (num, 0);
+ break;
+ case 2: PUT (num, 0);
+ break;
+ case 3: CPUT (num, 0);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 1)
+ case 1:
+ switch (blocking) {
+ case 0: NPUT (num, 1);
+ break;
+ case 1: NCPUT (num, 1);
+ break;
+ case 2: PUT (num, 1);
+ break;
+ case 3: CPUT (num, 1);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 2)
+ case 2:
+ switch (blocking) {
+ case 0: NPUT (num, 2);
+ break;
+ case 1: NCPUT (num, 2);
+ break;
+ case 2: PUT (num, 2);
+ break;
+ case 3: CPUT (num, 2);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 3)
+ case 3:
+ switch (blocking) {
+ case 0: NPUT (num, 3);
+ break;
+ case 1: NCPUT (num, 3);
+ break;
+ case 2: PUT (num, 3);
+ break;
+ case 3: CPUT (num, 3);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 4)
+ case 4:
+ switch (blocking) {
+ case 0: NPUT (num, 4);
+ break;
+ case 1: NCPUT (num, 4);
+ break;
+ case 2: PUT (num, 4);
+ break;
+ case 3: CPUT (num, 4);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 5)
+ case 5:
+ switch (blocking) {
+ case 0: NPUT (num, 5);
+ break;
+ case 1: NCPUT (num, 5);
+ break;
+ case 2: PUT (num, 5);
+ break;
+ case 3: CPUT (num, 5);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 6)
+ case 6:
+ switch (blocking) {
+ case 0: NPUT (num, 6);
+ break;
+ case 1: NCPUT (num, 6);
+ break;
+ case 2: PUT (num, 6);
+ break;
+ case 3: CPUT (num, 6);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+#if (XILINX_FSL_NUMBER > 7)
+ case 7:
+ switch (blocking) {
+ case 0: NPUT (num, 7);
+ break;
+ case 1: NCPUT (num, 7);
+ break;
+ case 2: PUT (num, 7);
+ break;
+ case 3: CPUT (num, 7);
+ break;
+ default:
+ return 2;
+ }
+ break;
+#endif
+ default:
+ return 1;
+ }
+
+ printf ("%01x: 0x%08lx - %s %s write\n", fslnum, num,
+ blocking < 2 ? "non blocking" : "blocking",
+ ((blocking == 1) || (blocking == 3)) ? "control" : "data" );
+ return 0;
+
+}
+
+int do_rspr (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ unsigned int reg = 0;
+ unsigned int val = 0;
+
+ reg = (unsigned int)simple_strtoul (argv[1], NULL, 16);
+ val = (unsigned int)simple_strtoul (argv[2], NULL, 16);
+ if (argc < 1) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+ switch (reg) {
+ case 0x1:
+ if (argc > 2) {
+ MTS (val, rmsr);
+ NOP;
+ MFS (val, rmsr);
+
+ } else {
+ MFS (val, rmsr);
+ }
+ puts ("MSR");
+ break;
+ case 0x3:
+ MFS (val, rear);
+ puts ("EAR");
+ break;
+ case 0x5:
+ MFS (val, resr);
+ puts ("ESR");
+ break;
+ default:
+ return 1;
+ }
+ printf (": 0x%08lx\n", val);
+ return 0;
+}
+
+/***************************************************/
+
+U_BOOT_CMD (frd, 3, 1, do_frd,
+ "frd - read data from FSL\n",
+ "- [fslnum [0|1|2|3]]\n"
+ " 0 - non blocking data read\n"
+ " 1 - non blocking control read\n"
+ " 2 - blocking data read\n"
+ " 3 - blocking control read\n");
+
+
+U_BOOT_CMD (fwr, 4, 1, do_fwr,
+ "fwr - write data to FSL\n",
+ "- [fslnum [0|1|2|3]]\n"
+ " 0 - non blocking data write\n"
+ " 1 - non blocking control write\n"
+ " 2 - blocking data write\n"
+ " 3 - blocking control write\n");
+
+U_BOOT_CMD (rspr, 3, 1, do_rspr,
+ "rmsr - read/write special purpose register\n",
+ "- reg_num [write value] read/write special purpose register\n"
+ " 0 - MSR - Machine status register\n"
+ " 1 - EAR - Exception address register\n"
+ " 2 - ESR - Exception status register\n");
+
+#endif
diff --git a/common/cmd_mii.c b/common/cmd_mii.c
index e659536..72e11d5 100644
--- a/common/cmd_mii.c
+++ b/common/cmd_mii.c
@@ -28,7 +28,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
#include <miiphy.h>
#ifdef CONFIG_TERSE_MII
@@ -438,7 +438,7 @@
int rcode = 0;
char *devname;
-#ifdef CONFIG_8xx
+#if defined(CONFIG_8xx) || defined(CONFIG_MCF532x)
mii_init ();
#endif
@@ -595,4 +595,4 @@
#endif /* CONFIG_TERSE_MII */
-#endif /* CFG_CMD_MII */
+#endif
diff --git a/common/cmd_misc.c b/common/cmd_misc.c
index 67ee9e8..c0c6b8f 100644
--- a/common/cmd_misc.c
+++ b/common/cmd_misc.c
@@ -27,7 +27,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_MISC)
+#if defined(CONFIG_CMD_MISC)
int do_sleep (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -52,7 +52,7 @@
}
/* Implemented in $(CPU)/interrupts.c */
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
U_BOOT_CMD(
@@ -60,13 +60,13 @@
"irqinfo - print information about IRQs\n",
NULL
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
U_BOOT_CMD(
- sleep , 2, 2, do_sleep,
+ sleep , 2, 1, do_sleep,
"sleep - delay execution for some time\n",
"N\n"
" - delay execution for N seconds (N is _decimal_ !!!)\n"
);
-#endif /* CFG_CMD_MISC */
+#endif
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 573eb97..069c6d0 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -24,7 +24,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_MMC)
+#if defined(CONFIG_CMD_MMC)
#include <mmc.h>
@@ -43,4 +43,4 @@
NULL
);
-#endif /* CFG_CMD_MMC */
+#endif
diff --git a/common/cmd_nand.c b/common/cmd_nand.c
index b011b5e..1fdd7a6 100644
--- a/common/cmd_nand.c
+++ b/common/cmd_nand.c
@@ -19,24 +19,16 @@
*/
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <command.h>
#include <watchdog.h>
#include <malloc.h>
#include <asm/byteorder.h>
-
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
#include <jffs2/jffs2.h>
#include <nand.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
/* parition handling routines */
int mtdparts_init(void);
@@ -104,7 +96,7 @@
arg_off_size(int argc, char *argv[], nand_info_t *nand, ulong *off, ulong *size)
{
int idx = nand_curr_device;
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
struct mtd_device *dev;
struct part_info *part;
u8 pnum;
@@ -152,7 +144,7 @@
*size = nand->size - *off;
}
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
out:
#endif
printf("device %d ", idx);
@@ -169,7 +161,11 @@
ulong addr, off, size;
char *cmd, *s;
nand_info_t *nand;
+#ifdef CFG_NAND_QUIET
+ int quiet = CFG_NAND_QUIET;
+#else
int quiet = 0;
+#endif
const char *quiet_str = getenv("quiet");
/* at least two arguments please */
@@ -460,7 +456,7 @@
"info - show available NAND devices\n"
"nand device [dev] - show or set current device\n"
"nand read[.jffs2] - addr off|partition size\n"
- "nand write[.jffs2] - addr off|partiton size - read/write `size' bytes starting\n"
+ "nand write[.jffs2] - addr off|partition size - read/write `size' bytes starting\n"
" at offset `off' to/from memory address `addr'\n"
"nand erase [clean] [off size] - erase `size' bytes from\n"
" offset `off' (entire device if not specified)\n"
@@ -476,38 +472,68 @@
ulong offset, ulong addr, char *cmd)
{
int r;
- char *ep;
+ char *ep, *s;
ulong cnt;
image_header_t *hdr;
+ int jffs2 = 0;
+
+ s = strchr(cmd, '.');
+ if (s != NULL &&
+ (!strcmp(s, ".jffs2") || !strcmp(s, ".e") || !strcmp(s, ".i")))
+ jffs2 = 1;
printf("\nLoading from %s, offset 0x%lx\n", nand->name, offset);
cnt = nand->oobblock;
- r = nand_read(nand, offset, &cnt, (u_char *) addr);
+ if (jffs2) {
+ nand_read_options_t opts;
+ memset(&opts, 0, sizeof(opts));
+ opts.buffer = (u_char*) addr;
+ opts.length = cnt;
+ opts.offset = offset;
+ opts.quiet = 1;
+ r = nand_read_opts(nand, &opts);
+ } else {
+ r = nand_read(nand, offset, &cnt, (u_char *) addr);
+ }
+
if (r) {
puts("** Read error\n");
- SHOW_BOOT_PROGRESS(-1);
+ show_boot_progress (-56);
return 1;
}
+ show_boot_progress (56);
hdr = (image_header_t *) addr;
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
printf("\n** Bad Magic Number 0x%x **\n", hdr->ih_magic);
- SHOW_BOOT_PROGRESS(-1);
+ show_boot_progress (-57);
return 1;
}
+ show_boot_progress (57);
print_image_hdr(hdr);
cnt = (ntohl(hdr->ih_size) + sizeof (image_header_t));
+ if (jffs2) {
+ nand_read_options_t opts;
+ memset(&opts, 0, sizeof(opts));
+ opts.buffer = (u_char*) addr;
+ opts.length = cnt;
+ opts.offset = offset;
+ opts.quiet = 1;
+ r = nand_read_opts(nand, &opts);
+ } else {
+ r = nand_read(nand, offset, &cnt, (u_char *) addr);
+ }
- r = nand_read(nand, offset, &cnt, (u_char *) addr);
if (r) {
puts("** Read error\n");
- SHOW_BOOT_PROGRESS(-1);
+ show_boot_progress (-58);
return 1;
}
+ show_boot_progress (58);
/* Loading ok, update default load address */
@@ -534,7 +560,7 @@
char *boot_device = NULL;
int idx;
ulong addr, offset = 0;
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
struct mtd_device *dev;
struct part_info *part;
u8 pnum;
@@ -550,7 +576,7 @@
if (argc > 3)
goto usage;
if (argc == 3)
- addr = simple_strtoul(argv[2], NULL, 16);
+ addr = simple_strtoul(argv[1], NULL, 16);
else
addr = CFG_LOAD_ADDR;
return nand_load_image(cmdtp, &nand_info[dev->id->num],
@@ -559,6 +585,7 @@
}
#endif
+ show_boot_progress(52);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
@@ -578,36 +605,39 @@
offset = simple_strtoul(argv[3], NULL, 16);
break;
default:
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_CMDLINE)
usage:
#endif
printf("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS(-1);
+ show_boot_progress(-53);
return 1;
}
+ show_boot_progress(53);
if (!boot_device) {
puts("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS(-1);
+ show_boot_progress(-54);
return 1;
}
+ show_boot_progress(54);
idx = simple_strtoul(boot_device, NULL, 16);
if (idx < 0 || idx >= CFG_MAX_NAND_DEVICE || !nand_info[idx].name) {
printf("\n** Device %d not available\n", idx);
- SHOW_BOOT_PROGRESS(-1);
+ show_boot_progress(-55);
return 1;
}
+ show_boot_progress(55);
return nand_load_image(cmdtp, &nand_info[idx], offset, addr, argv[0]);
}
U_BOOT_CMD(nboot, 4, 1, do_nandboot,
"nboot - boot from NAND device\n",
- "[partition] | [[[loadAddr] dev] offset]\n");
+ "[.jffs2] [partition] | [[[loadAddr] dev] offset]\n");
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
#else /* CFG_NAND_LEGACY */
/*
@@ -620,14 +650,14 @@
#include <asm/io.h>
#include <watchdog.h>
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
+#ifdef CONFIG_show_boot_progress
# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
+# define show_boot_progress(arg) show_boot_progress(arg)
#else
-# define SHOW_BOOT_PROGRESS(arg)
+# define show_boot_progress(arg)
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#include <linux/mtd/nand_legacy.h>
#if 0
#include <linux/mtd/nand_ids.h>
@@ -887,6 +917,7 @@
ulong offset = 0;
image_header_t *hdr;
int rcode = 0;
+ show_boot_progress (52);
switch (argc) {
case 1:
addr = CFG_LOAD_ADDR;
@@ -907,24 +938,27 @@
break;
default:
printf ("Usage:\n%s\n", cmdtp->usage);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-53);
return 1;
}
+ show_boot_progress (53);
if (!boot_device) {
puts ("\n** No boot device **\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-54);
return 1;
}
+ show_boot_progress (54);
dev = simple_strtoul(boot_device, &ep, 16);
if ((dev >= CFG_MAX_NAND_DEVICE) ||
(nand_dev_desc[dev].ChipID == NAND_ChipID_UNKNOWN)) {
printf ("\n** Device %d not available\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-55);
return 1;
}
+ show_boot_progress (55);
printf ("\nLoading from device %d: %s at 0x%lx (offset 0x%lx)\n",
dev, nand_dev_desc[dev].name, nand_dev_desc[dev].IO_ADDR,
@@ -933,9 +967,10 @@
if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ, offset,
SECTORSIZE, NULL, (u_char *)addr)) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-56);
return 1;
}
+ show_boot_progress (56);
hdr = (image_header_t *)addr;
@@ -947,17 +982,19 @@
cnt -= SECTORSIZE;
} else {
printf ("\n** Bad Magic Number 0x%x **\n", ntohl(hdr->ih_magic));
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-57);
return 1;
}
+ show_boot_progress (57);
if (nand_legacy_rw (nand_dev_desc + dev, NANDRW_READ,
offset + SECTORSIZE, cnt, NULL,
(u_char *)(addr+SECTORSIZE))) {
printf ("** Read error on %d\n", dev);
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-58);
return 1;
}
+ show_boot_progress (58);
/* Loading ok, update default load address */
@@ -985,6 +1022,6 @@
"loadAddr dev\n"
);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
#endif /* CFG_NAND_LEGACY */
diff --git a/common/cmd_net.c b/common/cmd_net.c
index 2cb2c5d..0715fbc 100644
--- a/common/cmd_net.c
+++ b/common/cmd_net.c
@@ -28,8 +28,7 @@
#include <command.h>
#include <net.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
-
+#if defined(CONFIG_CMD_NET)
extern int do_bootm (cmd_tbl_t *, int, int, char *[]);
@@ -68,7 +67,7 @@
"[loadAddress] [bootfilename]\n"
);
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
return netboot_common(DHCP, cmdtp, argc, argv);
@@ -79,9 +78,9 @@
"dhcp\t- invoke DHCP client to obtain IP/boot params\n",
"\n"
);
-#endif /* CFG_CMD_DHCP */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
int do_nfs (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
return netboot_common(NFS, cmdtp, argc, argv);
@@ -92,7 +91,7 @@
"nfs\t- boot image via network using NFS protocol\n",
"[loadAddress] [host ip addr:bootfilename]\n"
);
-#endif /* CFG_CMD_NFS */
+#endif
static void netboot_update_env (void)
{
@@ -128,7 +127,7 @@
ip_to_string (NetOurDNSIP, tmp);
setenv ("dnsip", tmp);
}
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS2)
+#if defined(CONFIG_BOOTP_DNS2)
if (NetOurDNS2IP) {
ip_to_string (NetOurDNS2IP, tmp);
setenv ("dnsip2", tmp);
@@ -137,13 +136,15 @@
if (NetOurNISDomain[0])
setenv ("domain", NetOurNISDomain);
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP) && (CONFIG_BOOTP_MASK & CONFIG_BOOTP_TIMEOFFSET)
+#if defined(CONFIG_CMD_SNTP) \
+ && defined(CONFIG_BOOTP_TIMEOFFSET)
if (NetTimeOffset) {
sprintf (tmp, "%d", NetTimeOffset);
setenv ("timeoffset", tmp);
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP) && (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NTPSERVER)
+#if defined(CONFIG_CMD_SNTP) \
+ && defined(CONFIG_BOOTP_NTPSERVER)
if (NetNtpServerIP) {
ip_to_string (NetNtpServerIP, tmp);
setenv ("ntpserverip", tmp);
@@ -184,18 +185,25 @@
break;
default: printf ("Usage:\n%s\n", cmdtp->usage);
+ show_boot_progress (-80);
return 1;
}
- if ((size = NetLoop(proto)) < 0)
+ show_boot_progress (80);
+ if ((size = NetLoop(proto)) < 0) {
+ show_boot_progress (-81);
return 1;
+ }
+ show_boot_progress (81);
/* NetLoop ok, update environment */
netboot_update_env();
/* done if no file was loaded (no errors though) */
- if (size == 0)
+ if (size == 0) {
+ show_boot_progress (-82);
return 0;
+ }
/* flush cache */
flush_cache(load_addr, size);
@@ -208,19 +216,25 @@
printf ("Automatic boot of image at addr 0x%08lX ...\n",
load_addr);
+ show_boot_progress (82);
rcode = do_bootm (cmdtp, 0, 1, local_args);
}
#ifdef CONFIG_AUTOSCRIPT
if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) {
printf("Running autoscript at addr 0x%08lX ...\n", load_addr);
+ show_boot_progress (83);
rcode = autoscript (load_addr);
}
#endif
+ if (rcode < 0)
+ show_boot_progress (-83);
+ else
+ show_boot_progress (84);
return rcode;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
int do_ping (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
if (argc < 2)
@@ -247,9 +261,9 @@
"ping\t- send ICMP ECHO_REQUEST to network host\n",
"pingAddress\n"
);
-#endif /* CFG_CMD_PING */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
static void cdp_update_env(void)
{
@@ -290,9 +304,9 @@
cdp, 1, 1, do_cdp,
"cdp\t- Perform CDP network configuration\n",
);
-#endif /* CFG_CMD_CDP */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
int do_sntp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
char *toff;
@@ -328,6 +342,6 @@
"sntp\t- synchronize RTC via network\n",
"[NTP server IP]\n"
);
-#endif /* CFG_CMD_SNTP */
+#endif
-#endif /* CFG_CMD_NET */
+#endif
diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c
index 977ec5b..1db0fc3 100644
--- a/common/cmd_nvedit.c
+++ b/common/cmd_nvedit.c
@@ -46,7 +46,7 @@
#include <serial.h>
#include <linux/stddef.h>
#include <asm/byteorder.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#include <net.h>
#endif
@@ -193,7 +193,12 @@
* Ethernet Address and serial# can be set only once,
* ver is readonly.
*/
+#ifdef CONFIG_HAS_UID
+ /* Allow serial# forced overwrite with 0xdeaf4add flag */
+ if ( ((strcmp (name, "serial#") == 0) && (flag != 0xdeaf4add)) ||
+#else
if ( (strcmp (name, "serial#") == 0) ||
+#endif
((strcmp (name, "ethaddr") == 0)
#if defined(CONFIG_OVERWRITE_ETHADDR_ONCE) && defined(CONFIG_ETHADDR)
&& (strcmp ((char *)env_get_addr(oldval),MK_STR(CONFIG_ETHADDR)) != 0)
@@ -367,12 +372,12 @@
load_addr = simple_strtoul(argv[2], NULL, 16);
return 0;
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if (strcmp(argv[1],"bootfile") == 0) {
copy_filename (BootFile, argv[2], sizeof(BootFile));
return 0;
}
-#endif /* CFG_CMD_NET */
+#endif
#ifdef CONFIG_AMIGAONEG3SE
if (strcmp(argv[1], "vga_fg_color") == 0 ||
@@ -397,7 +402,15 @@
_do_setenv (0, 3, argv);
}
-int do_setenv ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
+#ifdef CONFIG_HAS_UID
+void forceenv (char *varname, char *varvalue)
+{
+ char *argv[4] = { "forceenv", varname, varvalue, NULL };
+ _do_setenv (0xdeaf4add, 3, argv);
+}
+#endif
+
+int do_setenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
if (argc < 2) {
printf ("Usage:\n%s\n", cmdtp->usage);
@@ -411,7 +424,7 @@
* Prompt for environment variable
*/
-#if (CONFIG_COMMANDS & CFG_CMD_ASKENV)
+#if defined(CONFIG_CMD_ASKENV)
int do_askenv ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
extern char console_buffer[CFG_CBSIZE];
@@ -483,7 +496,7 @@
/* Continue calling setenv code */
return _do_setenv (flag, len, local_args);
}
-#endif /* CFG_CMD_ASKENV */
+#endif
/************************************************************************
* Look up variable from environment,
@@ -538,11 +551,9 @@
return (-1);
}
-#if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) || \
- ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_FLASH)) == \
- (CFG_CMD_ENV|CFG_CMD_FLASH)) || \
- ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_NAND)) == \
- (CFG_CMD_ENV|CFG_CMD_NAND))
+#if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \
+ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \
+ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND))
int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
extern char * env_name_spec;
@@ -552,7 +563,6 @@
return (saveenv() ? 1 : 0);
}
-
#endif
@@ -596,20 +606,18 @@
" - delete environment variable 'name'\n"
);
-#if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) || \
- ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_FLASH)) == \
- (CFG_CMD_ENV|CFG_CMD_FLASH)) || \
- ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_NAND)) == \
- (CFG_CMD_ENV|CFG_CMD_NAND))
+#if defined(CFG_ENV_IS_IN_NVRAM) || defined(CFG_ENV_IS_IN_EEPROM) \
+ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)) \
+ || (defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND))
U_BOOT_CMD(
saveenv, 1, 0, do_saveenv,
"saveenv - save environment variables to persistent storage\n",
NULL
);
-#endif /* CFG_CMD_ENV */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_ASKENV)
+#if defined(CONFIG_CMD_ASKENV)
U_BOOT_CMD(
askenv, CFG_MAXARGS, 1, do_askenv,
@@ -624,9 +632,9 @@
" - display 'message' string and get environment variable 'name'"
"from stdin (max 'size' chars)\n"
);
-#endif /* CFG_CMD_ASKENV */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_RUN)
+#if defined(CONFIG_CMD_RUN)
int do_run (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
U_BOOT_CMD(
run, CFG_MAXARGS, 1, do_run,
@@ -634,4 +642,4 @@
"var [...]\n"
" - run the commands in the environment variable(s) 'var'\n"
);
-#endif /* CFG_CMD_RUN */
+#endif
diff --git a/common/cmd_pci.c b/common/cmd_pci.c
index 4508546..8be6da9 100644
--- a/common/cmd_pci.c
+++ b/common/cmd_pci.c
@@ -38,7 +38,7 @@
#include <asm/io.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_PCI)
+#if defined(CONFIG_CMD_PCI)
extern int cmd_get_data_size(char* arg, int default_size);
@@ -565,6 +565,6 @@
" - write to CFG address\n"
);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_PCI) */
+#endif
#endif /* CONFIG_PCI */
diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c
index 2eb5b26..dcd07c0 100644
--- a/common/cmd_pcmcia.c
+++ b/common/cmd_pcmcia.c
@@ -61,7 +61,7 @@
/* -------------------------------------------------------------------- */
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
extern int pcmcia_on (void);
extern int pcmcia_off (void);
@@ -87,19 +87,19 @@
}
U_BOOT_CMD(
- pinit, 2, 1, do_pinit,
+ pinit, 2, 0, do_pinit,
"pinit - PCMCIA sub-system\n",
"on - power on PCMCIA socket\n"
"pinit off - power off PCMCIA socket\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */
+#endif
/* -------------------------------------------------------------------- */
#undef CHECK_IDE_DEVICE
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CHECK_IDE_DEVICE
#endif
diff --git a/common/cmd_portio.c b/common/cmd_portio.c
index d2e4c4b..bfe33e3 100644
--- a/common/cmd_portio.c
+++ b/common/cmd_portio.c
@@ -30,7 +30,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_PORTIO)
+#if defined(CONFIG_CMD_PORTIO)
extern int cmd_get_data_size (char *arg, int default_size);
@@ -166,4 +166,4 @@
" - read datum from IO port\n"
);
-#endif /* CFG_CMD_PORTIO */
+#endif
diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c
index f428f7e..17e9cd9 100644
--- a/common/cmd_reginfo.c
+++ b/common/cmd_reginfo.c
@@ -32,7 +32,8 @@
#elif defined (CONFIG_MPC5200)
#include <mpc5xxx.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_REGINFO)
+
+#if defined(CONFIG_CMD_REGINFO)
int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
@@ -334,14 +335,14 @@
return 0;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_REGINFO */
+#endif
/**************************************************/
#if ( defined(CONFIG_8xx) || defined(CONFIG_405GP) || \
defined(CONFIG_405EP) || defined(CONFIG_MPC5200) ) && \
- (CONFIG_COMMANDS & CFG_CMD_REGINFO)
+ defined(CONFIG_CMD_REGINFO)
U_BOOT_CMD(
reginfo, 2, 1, do_reginfo,
diff --git a/common/cmd_reiser.c b/common/cmd_reiser.c
index 09c86e6..1ba3929 100644
--- a/common/cmd_reiser.c
+++ b/common/cmd_reiser.c
@@ -28,7 +28,7 @@
*/
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+#if defined(CONFIG_CMD_REISER)
#include <config.h>
#include <command.h>
#include <image.h>
@@ -90,7 +90,7 @@
}
if (!reiserfs_mount(part_length)) {
- printf ("** Bad Reisefs partition or disk - %s %d:%d **\n", argv[1], dev, part);
+ printf ("** Bad Reiserfs partition or disk - %s %d:%d **\n", argv[1], dev, part);
return 1;
}
@@ -183,7 +183,7 @@
return 1;
}
- if (strncmp(info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) {
+ if (strncmp((char *)info.type, BOOT_PART_TYPE, sizeof(info.type)) != 0) {
printf ("\n** Invalid partition type \"%.32s\""
" (expect \"" BOOT_PART_TYPE "\")\n",
info.type);
@@ -204,7 +204,7 @@
}
if (!reiserfs_mount(part_length)) {
- printf ("** Bad Reisefs partition or disk - %s %d:%d **\n", argv[1], dev, part);
+ printf ("** Bad Reiserfs partition or disk - %s %d:%d **\n", argv[1], dev, part);
return 1;
}
@@ -240,4 +240,4 @@
" to address 'addr' from dos filesystem\n"
);
-#endif /* CONFIG_COMMANDS & CFG_CMD_REISER */
+#endif
diff --git a/common/cmd_sata.c b/common/cmd_sata.c
new file mode 100644
index 0000000..bd4c11f
--- /dev/null
+++ b/common/cmd_sata.c
@@ -0,0 +1,712 @@
+/*
+ * Copyright (C) Procsys. All rights reserved.
+ * Author: Mushtaq Khan <mushtaq_k@procsys.com>
+ * <mushtaqk_921@yahoo.co.in>
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * with the reference to libata in kernel 2.4.32
+ *
+ */
+
+/*
+ * File contains SATA read-write and other utility functions.
+ */
+#include <common.h>
+#include <asm/io.h>
+#include <pci.h>
+#include <command.h>
+#include <config.h>
+#include <ide.h>
+#include <ata.h>
+
+#ifdef CFG_SATA_SUPPORTED
+/*For debug prints set macro DEBUG_SATA to 1 */
+#define DEBUG_SATA 0
+/*Macro for SATA library specific declarations */
+#define SATA_DECL
+#include <sata.h>
+#undef SATA_DECL
+
+static u8 __inline__
+sata_inb (unsigned long ioaddr)
+{
+ return inb (ioaddr);
+}
+
+static void __inline__
+sata_outb (unsigned char val, unsigned long ioaddr)
+{
+ outb (val, ioaddr);
+}
+
+static void
+output_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
+{
+ outsw (ioaddr->data_addr, sect_buf, words << 1);
+}
+
+static int
+input_data (struct sata_ioports *ioaddr, ulong * sect_buf, int words)
+{
+ insw (ioaddr->data_addr, sect_buf, words << 1);
+ return 0;
+}
+
+static void
+sata_cpy (unsigned char *dst, unsigned char *src, unsigned int len)
+{
+ unsigned char *end, *last;
+
+ last = dst;
+ end = src + len - 1;
+
+ /* reserve space for '\0' */
+ if (len < 2)
+ goto OUT;
+
+ /* skip leading white space */
+ while ((*src) && (src < end) && (*src == ' '))
+ ++src;
+
+ /* copy string, omitting trailing white space */
+ while ((*src) && (src < end)) {
+ *dst++ = *src;
+ if (*src++ != ' ')
+ last = dst;
+ }
+ OUT:
+ *last = '\0';
+}
+
+int
+sata_bus_softreset (int num)
+{
+ u8 dev = 0, status = 0, i;
+
+ port[num].dev_mask = 0;
+
+ for (i = 0; i < CFG_SATA_DEVS_PER_BUS; i++) {
+ if (!(sata_devchk (&port[num].ioaddr, i))) {
+ PRINTF ("dev_chk failed for dev#%d\n", i);
+ } else {
+ port[num].dev_mask |= (1 << i);
+ PRINTF ("dev_chk passed for dev#%d\n", i);
+ }
+ }
+
+ if (!(port[num].dev_mask)) {
+ printf ("no devices on port%d\n", num);
+ return 1;
+ }
+
+ dev_select (&port[num].ioaddr, dev);
+
+ port[num].ctl_reg = 0x08; /*Default value of control reg */
+ sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
+ udelay (10);
+ sata_outb (port[num].ctl_reg | ATA_SRST, port[num].ioaddr.ctl_addr);
+ udelay (10);
+ sata_outb (port[num].ctl_reg, port[num].ioaddr.ctl_addr);
+
+ /* spec mandates ">= 2ms" before checking status.
+ * We wait 150ms, because that was the magic delay used for
+ * ATAPI devices in Hale Landis's ATADRVR, for the period of time
+ * between when the ATA command register is written, and then
+ * status is checked. Because waiting for "a while" before
+ * checking status is fine, post SRST, we perform this magic
+ * delay here as well.
+ */
+ msleep (150);
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 300);
+ while ((status & ATA_BUSY)) {
+ msleep (100);
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 3);
+ }
+
+ if (status & ATA_BUSY)
+ printf ("ata%u is slow to respond,plz be patient\n", port);
+
+ while ((status & ATA_BUSY)) {
+ msleep (100);
+ status = sata_chk_status (&port[num].ioaddr);
+ }
+
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond : ", port);
+ printf ("bus reset failed\n");
+ return 1;
+ }
+ return 0;
+}
+
+void
+sata_identify (int num, int dev)
+{
+ u8 cmd = 0, status = 0, devno = num * CFG_SATA_DEVS_PER_BUS + dev;
+ u16 iobuf[ATA_SECT_SIZE];
+ u64 n_sectors = 0;
+ u8 mask = 0;
+
+ memset (iobuf, 0, sizeof (iobuf));
+ hd_driveid_t *iop = (hd_driveid_t *) iobuf;
+
+ if (dev == 0)
+ mask = 0x01;
+ else
+ mask = 0x02;
+
+ if (!(port[num].dev_mask & mask)) {
+ printf ("dev%d is not present on port#%d\n", dev, num);
+ return;
+ }
+
+ printf ("port=%d dev=%d\n", num, dev);
+
+ dev_select (&port[num].ioaddr, dev);
+
+ status = 0;
+ cmd = ATA_CMD_IDENT; /*Device Identify Command */
+ sata_outb (cmd, port[num].ioaddr.command_addr);
+ sata_inb (port[num].ioaddr.altstatus_addr);
+ udelay (10);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 1000);
+ if (status & ATA_ERR) {
+ printf ("\ndevice not responding\n");
+ port[num].dev_mask &= ~mask;
+ return;
+ }
+
+ input_data (&port[num].ioaddr, (ulong *) iobuf, ATA_SECTORWORDS);
+
+ PRINTF ("\nata%u: dev %u cfg 49:%04x 82:%04x 83:%04x 84:%04x85:%04x"
+ "86:%04x" "87:%04x 88:%04x\n", num, dev, iobuf[49],
+ iobuf[82], iobuf[83], iobuf[84], iobuf[85], iobuf[86],
+ iobuf[87], iobuf[88]);
+
+ /* we require LBA and DMA support (bits 8 & 9 of word 49) */
+ if (!ata_id_has_dma (iobuf) || !ata_id_has_lba (iobuf)) {
+ PRINTF ("ata%u: no dma/lba\n", num);
+ }
+ ata_dump_id (iobuf);
+
+ if (ata_id_has_lba48 (iobuf)) {
+ n_sectors = ata_id_u64 (iobuf, 100);
+ } else {
+ n_sectors = ata_id_u32 (iobuf, 60);
+ }
+ PRINTF ("no. of sectors %u\n", ata_id_u64 (iobuf, 100));
+ PRINTF ("no. of sectors %u\n", ata_id_u32 (iobuf, 60));
+
+ if (n_sectors == 0) {
+ port[num].dev_mask &= ~mask;
+ return;
+ }
+
+ sata_cpy (sata_dev_desc[devno].revision, iop->fw_rev,
+ sizeof (sata_dev_desc[devno].revision));
+ sata_cpy (sata_dev_desc[devno].vendor, iop->model,
+ sizeof (sata_dev_desc[devno].vendor));
+ sata_cpy (sata_dev_desc[devno].product, iop->serial_no,
+ sizeof (sata_dev_desc[devno].product));
+ strswab (sata_dev_desc[devno].revision);
+ strswab (sata_dev_desc[devno].vendor);
+
+ if ((iop->config & 0x0080) == 0x0080) {
+ sata_dev_desc[devno].removable = 1;
+ } else {
+ sata_dev_desc[devno].removable = 0;
+ }
+
+ sata_dev_desc[devno].lba = iop->lba_capacity;
+ PRINTF ("lba=0x%x", sata_dev_desc[devno].lba);
+
+#ifdef CONFIG_LBA48
+ if (iop->command_set_2 & 0x0400) {
+ sata_dev_desc[devno].lba48 = 1;
+ lba = (unsigned long long) iop->lba48_capacity[0] |
+ ((unsigned long long) iop->lba48_capacity[1] << 16) |
+ ((unsigned long long) iop->lba48_capacity[2] << 32) |
+ ((unsigned long long) iop->lba48_capacity[3] << 48);
+ } else {
+ sata_dev_desc[devno].lba48 = 0;
+ }
+#endif
+
+ /* assuming HD */
+ sata_dev_desc[devno].type = DEV_TYPE_HARDDISK;
+ sata_dev_desc[devno].blksz = ATA_BLOCKSIZE;
+ sata_dev_desc[devno].lun = 0; /* just to fill something in... */
+}
+
+void
+set_Feature_cmd (int num, int dev)
+{
+ u8 mask = 0x00, status = 0;
+
+ if (dev == 0)
+ mask = 0x01;
+ else
+ mask = 0x02;
+
+ if (!(port[num].dev_mask & mask)) {
+ PRINTF ("dev%d is not present on port#%d\n", dev, num);
+ return;
+ }
+
+ dev_select (&port[num].ioaddr, dev);
+
+ sata_outb (SETFEATURES_XFER, port[num].ioaddr.feature_addr);
+ sata_outb (XFER_PIO_4, port[num].ioaddr.nsect_addr);
+ sata_outb (0, port[num].ioaddr.lbal_addr);
+ sata_outb (0, port[num].ioaddr.lbam_addr);
+ sata_outb (0, port[num].ioaddr.lbah_addr);
+
+ sata_outb (ATA_DEVICE_OBS, port[num].ioaddr.device_addr);
+ sata_outb (ATA_CMD_SETF, port[num].ioaddr.command_addr);
+
+ udelay (50);
+ msleep (150);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 5000);
+ if ((status & (ATA_STAT_BUSY | ATA_STAT_ERR))) {
+ printf ("Error : status 0x%02x\n", status);
+ port[num].dev_mask &= ~mask;
+ }
+}
+
+void
+sata_port (struct sata_ioports *ioport)
+{
+ ioport->data_addr = ioport->cmd_addr + ATA_REG_DATA;
+ ioport->error_addr = ioport->cmd_addr + ATA_REG_ERR;
+ ioport->feature_addr = ioport->cmd_addr + ATA_REG_FEATURE;
+ ioport->nsect_addr = ioport->cmd_addr + ATA_REG_NSECT;
+ ioport->lbal_addr = ioport->cmd_addr + ATA_REG_LBAL;
+ ioport->lbam_addr = ioport->cmd_addr + ATA_REG_LBAM;
+ ioport->lbah_addr = ioport->cmd_addr + ATA_REG_LBAH;
+ ioport->device_addr = ioport->cmd_addr + ATA_REG_DEVICE;
+ ioport->status_addr = ioport->cmd_addr + ATA_REG_STATUS;
+ ioport->command_addr = ioport->cmd_addr + ATA_REG_CMD;
+}
+
+int
+sata_devchk (struct sata_ioports *ioaddr, int dev)
+{
+ u8 nsect, lbal;
+
+ dev_select (ioaddr, dev);
+
+ sata_outb (0x55, ioaddr->nsect_addr);
+ sata_outb (0xaa, ioaddr->lbal_addr);
+
+ sata_outb (0xaa, ioaddr->nsect_addr);
+ sata_outb (0x55, ioaddr->lbal_addr);
+
+ sata_outb (0x55, ioaddr->nsect_addr);
+ sata_outb (0xaa, ioaddr->lbal_addr);
+
+ nsect = sata_inb (ioaddr->nsect_addr);
+ lbal = sata_inb (ioaddr->lbal_addr);
+
+ if ((nsect == 0x55) && (lbal == 0xaa))
+ return 1; /* we found a device */
+ else
+ return 0; /* nothing found */
+}
+
+void
+dev_select (struct sata_ioports *ioaddr, int dev)
+{
+ u8 tmp = 0;
+
+ if (dev == 0)
+ tmp = ATA_DEVICE_OBS;
+ else
+ tmp = ATA_DEVICE_OBS | ATA_DEV1;
+
+ sata_outb (tmp, ioaddr->device_addr);
+ sata_inb (ioaddr->altstatus_addr);
+ udelay (5);
+}
+
+u8
+sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max)
+{
+ u8 status;
+
+ do {
+ udelay (1000);
+ status = sata_chk_status (ioaddr);
+ max--;
+ } while ((status & bits) && (max > 0));
+
+ return status;
+}
+
+u8
+sata_chk_status (struct sata_ioports * ioaddr)
+{
+ return sata_inb (ioaddr->status_addr);
+}
+
+void
+msleep (int count)
+{
+ int i;
+
+ for (i = 0; i < count; i++)
+ udelay (1000);
+}
+
+ulong
+sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buff)
+{
+ ulong n = 0, *buffer = (ulong *)buff;
+ u8 dev = 0, num = 0, mask = 0, status = 0;
+
+#ifdef CONFIG_LBA48
+ unsigned char lba48 = 0;
+
+ if (blknr & 0x0000fffff0000000) {
+ if (!sata_dev_desc[devno].lba48) {
+ printf ("Drive doesn't support 48-bit addressing\n");
+ return 0;
+ }
+ /* more than 28 bits used, use 48bit mode */
+ lba48 = 1;
+ }
+#endif
+ /*Port Number */
+ num = device / CFG_SATA_DEVS_PER_BUS;
+ /*dev on the port */
+ if (device >= CFG_SATA_DEVS_PER_BUS)
+ dev = device - CFG_SATA_DEVS_PER_BUS;
+ else
+ dev = device;
+
+ if (dev == 0)
+ mask = 0x01;
+ else
+ mask = 0x02;
+
+ if (!(port[num].dev_mask & mask)) {
+ printf ("dev%d is not present on port#%d\n", dev, num);
+ return 0;
+ }
+
+ /* Select device */
+ dev_select (&port[num].ioaddr, dev);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond\n", port[num].port_no);
+ return n;
+ }
+ while (blkcnt-- > 0) {
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond\n", 0);
+ return n;
+ }
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ /* write high bits */
+ sata_outb (0, port[num].ioaddr.nsect_addr);
+ sata_outb ((blknr >> 24) & 0xFF,
+ port[num].ioaddr.lbal_addr);
+ sata_outb ((blknr >> 32) & 0xFF,
+ port[num].ioaddr.lbam_addr);
+ sata_outb ((blknr >> 40) & 0xFF,
+ port[num].ioaddr.lbah_addr);
+ }
+#endif
+ sata_outb (1, port[num].ioaddr.nsect_addr);
+ sata_outb (((blknr) >> 0) & 0xFF,
+ port[num].ioaddr.lbal_addr);
+ sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
+ sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
+
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ sata_outb (ATA_LBA, port[num].ioaddr.device_addr);
+ sata_outb (ATA_CMD_READ_EXT,
+ port[num].ioaddr.command_addr);
+ } else
+#endif
+ {
+ sata_outb (ATA_LBA | ((blknr >> 24) & 0xF),
+ port[num].ioaddr.device_addr);
+ sata_outb (ATA_CMD_READ,
+ port[num].ioaddr.command_addr);
+ }
+
+ msleep (50);
+ /*may take up to 4 sec */
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000);
+
+ if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
+ != ATA_STAT_DRQ) {
+ u8 err = 0;
+
+ printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
+ device, (ulong) blknr, status);
+ err = sata_inb (port[num].ioaddr.error_addr);
+ printf ("Error reg = 0x%x\n", err);
+ return (n);
+ }
+ input_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS);
+ sata_inb (port[num].ioaddr.altstatus_addr);
+ udelay (50);
+
+ ++n;
+ ++blknr;
+ buffer += ATA_SECTORWORDS;
+ }
+ return n;
+}
+
+ulong
+sata_write (int device, ulong blknr,lbaint_t blkcnt, void * buff)
+{
+ ulong n = 0, *buffer = (ulong *)buff;
+ unsigned char status = 0, num = 0, dev = 0, mask = 0;
+
+#ifdef CONFIG_LBA48
+ unsigned char lba48 = 0;
+
+ if (blknr & 0x0000fffff0000000) {
+ if (!sata_dev_desc[devno].lba48) {
+ printf ("Drive doesn't support 48-bit addressing\n");
+ return 0;
+ }
+ /* more than 28 bits used, use 48bit mode */
+ lba48 = 1;
+ }
+#endif
+ /*Port Number */
+ num = device / CFG_SATA_DEVS_PER_BUS;
+ /*dev on the Port */
+ if (device >= CFG_SATA_DEVS_PER_BUS)
+ dev = device - CFG_SATA_DEVS_PER_BUS;
+ else
+ dev = device;
+
+ if (dev == 0)
+ mask = 0x01;
+ else
+ mask = 0x02;
+
+ /* Select device */
+ dev_select (&port[num].ioaddr, dev);
+
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond\n", port[num].port_no);
+ return n;
+ }
+
+ while (blkcnt-- > 0) {
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 500);
+ if (status & ATA_BUSY) {
+ printf ("ata%u failed to respond\n",
+ port[num].port_no);
+ return n;
+ }
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ /* write high bits */
+ sata_outb (0, port[num].ioaddr.nsect_addr);
+ sata_outb ((blknr >> 24) & 0xFF,
+ port[num].ioaddr.lbal_addr);
+ sata_outb ((blknr >> 32) & 0xFF,
+ port[num].ioaddr.lbam_addr);
+ sata_outb ((blknr >> 40) & 0xFF,
+ port[num].ioaddr.lbah_addr);
+ }
+#endif
+ sata_outb (1, port[num].ioaddr.nsect_addr);
+ sata_outb ((blknr >> 0) & 0xFF, port[num].ioaddr.lbal_addr);
+ sata_outb ((blknr >> 8) & 0xFF, port[num].ioaddr.lbam_addr);
+ sata_outb ((blknr >> 16) & 0xFF, port[num].ioaddr.lbah_addr);
+#ifdef CONFIG_LBA48
+ if (lba48) {
+ sata_outb (ATA_LBA, port[num].ioaddr.device_addr);
+ sata_outb (ATA_CMD_WRITE_EXT,
+ port[num].ioaddr.command_addr);
+ } else
+#endif
+ {
+ sata_outb (ATA_LBA | ((blknr >> 24) & 0xF),
+ port[num].ioaddr.device_addr);
+ sata_outb (ATA_CMD_WRITE,
+ port[num].ioaddr.command_addr);
+ }
+
+ msleep (50);
+ /*may take up to 4 sec */
+ status = sata_busy_wait (&port[num].ioaddr, ATA_BUSY, 4000);
+ if ((status & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR))
+ != ATA_STAT_DRQ) {
+ printf ("Error no DRQ dev %d blk %ld: sts 0x%02x\n",
+ device, (ulong) blknr, status);
+ return (n);
+ }
+
+ output_data (&port[num].ioaddr, buffer, ATA_SECTORWORDS);
+ sata_inb (port[num].ioaddr.altstatus_addr);
+ udelay (50);
+
+ ++n;
+ ++blknr;
+ buffer += ATA_SECTORWORDS;
+ }
+ return n;
+}
+
+block_dev_desc_t *sata_get_dev (int dev);
+
+block_dev_desc_t *
+sata_get_dev (int dev)
+{
+ return ((block_dev_desc_t *) & sata_dev_desc[dev]);
+}
+
+int
+do_sata (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+
+ switch (argc) {
+ case 0:
+ case 1:
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ case 2:
+ if (strncmp (argv[1], "init", 4) == 0) {
+ int rcode = 0;
+
+ rcode = init_sata ();
+ if (rcode)
+ printf ("Sata initialization Failed\n");
+ return rcode;
+ } else if (strncmp (argv[1], "inf", 3) == 0) {
+ int i;
+
+ putc ('\n');
+ for (i = 0; i < CFG_SATA_MAXDEVICES; ++i) {
+ /*List only known devices */
+ if (sata_dev_desc[i].type ==
+ DEV_TYPE_UNKNOWN)
+ continue;
+ printf ("sata dev %d: ", i);
+ dev_print (&sata_dev_desc[i]);
+ }
+ return 0;
+ }
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ case 3:
+ if (strcmp (argv[1], "dev") == 0) {
+ int dev = (int) simple_strtoul (argv[2], NULL, 10);
+
+ if (dev >= CFG_SATA_MAXDEVICES) {
+ printf ("\nSata dev %d not available\n",
+ dev);
+ return 1;
+ }
+ printf ("\nSATA dev %d: ", dev);
+ dev_print (&sata_dev_desc[dev]);
+ if (sata_dev_desc[dev].type == DEV_TYPE_UNKNOWN)
+ return 1;
+ curr_dev = dev;
+ return 0;
+ } else if (strcmp (argv[1], "part") == 0) {
+ int dev = (int) simple_strtoul (argv[2], NULL, 10);
+
+ if (dev >= CFG_SATA_MAXDEVICES) {
+ printf ("\nSata dev %d not available\n",
+ dev);
+ return 1;
+ }
+ PRINTF ("\nSATA dev %d: ", dev);
+ if (sata_dev_desc[dev].part_type !=
+ PART_TYPE_UNKNOWN) {
+ print_part (&sata_dev_desc[dev]);
+ } else {
+ printf ("\nSata dev %d partition type "
+ "unknown\n", dev);
+ return 1;
+ }
+ return 0;
+ }
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ default:
+ if (argc < 5) {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+ if (strcmp (argv[1], "read") == 0) {
+ ulong addr = simple_strtoul (argv[2], NULL, 16);
+ ulong cnt = simple_strtoul (argv[4], NULL, 16);
+ ulong n;
+ lbaint_t blk = simple_strtoul (argv[3], NULL, 16);
+
+ memset ((int *) addr, 0, cnt * 512);
+ printf ("\nSATA read: dev %d blk # %ld,"
+ "count %ld ... ", curr_dev, blk, cnt);
+ n = sata_read (curr_dev, blk, cnt, (ulong *) addr);
+ /* flush cache after read */
+ flush_cache (addr, cnt * 512);
+ printf ("%ld blocks read: %s\n", n,
+ (n == cnt) ? "OK" : "ERR");
+ if (n == cnt)
+ return 1;
+ else
+ return 0;
+ } else if (strcmp (argv[1], "write") == 0) {
+ ulong addr = simple_strtoul (argv[2], NULL, 16);
+ ulong cnt = simple_strtoul (argv[4], NULL, 16);
+ ulong n;
+ lbaint_t blk = simple_strtoul (argv[3], NULL, 16);
+
+ printf ("\nSata write: dev %d blk # %ld,"
+ "count %ld ... ", curr_dev, blk, cnt);
+ n = sata_write (curr_dev, blk, cnt, (ulong *) addr);
+ printf ("%ld blocks written: %s\n", n,
+ (n == cnt) ? "OK" : "ERR");
+ if (n == cnt)
+ return 1;
+ else
+ return 0;
+ } else {
+ printf ("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+ } /*End OF SWITCH */
+}
+
+U_BOOT_CMD (sata, 5, 1, do_sata,
+ "sata init\n"
+ "sata info\n"
+ "sata part device\n"
+ "sata dev device\n"
+ "sata read addr blk# cnt\n"
+ "sata write addr blk# cnt\n", "cmd for init,rw and dev-info\n");
+
+#endif
diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c
index 00b84fa..f563931 100644
--- a/common/cmd_scsi.c
+++ b/common/cmd_scsi.c
@@ -34,7 +34,7 @@
#include <image.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#if defined(CONFIG_CMD_SCSI)
#ifdef CONFIG_SCSI_SYM53C8XX
#define SCSI_VEND_ID 0x1000
@@ -609,4 +609,4 @@
"loadAddr dev:part\n"
);
-#endif /* #if (CONFIG_COMMANDS & CFG_CMD_SCSI) */
+#endif
diff --git a/common/cmd_spi.c b/common/cmd_spi.c
index a6fdf7f..3118d27 100644
--- a/common/cmd_spi.c
+++ b/common/cmd_spi.c
@@ -29,7 +29,7 @@
#include <command.h>
#include <spi.h>
-#if (CONFIG_COMMANDS & CFG_CMD_SPI)
+#if defined(CONFIG_CMD_SPI)
/*-----------------------------------------------------------------------
* Definitions
@@ -140,4 +140,4 @@
"<dout> - Hexadecimal string that gets sent\n"
);
-#endif /* CFG_CMD_SPI */
+#endif
diff --git a/common/cmd_universe.c b/common/cmd_universe.c
index 8d7b6fe..8bf0b1f 100644
--- a/common/cmd_universe.c
+++ b/common/cmd_universe.c
@@ -28,7 +28,7 @@
#include <universe.h>
-#if (CONFIG_COMMANDS & CFG_CMD_UNIVERSE)
+#if defined(CONFIG_CMD_UNIVERSE)
#define PCI_VENDOR PCI_VENDOR_ID_TUNDRA
#define PCI_DEVICE PCI_DEVICE_ID_TUNDRA_CA91C042
@@ -387,4 +387,4 @@
" 03 -> D32 Data Width\n"
);
-#endif /* (CONFIG_COMMANDS & CFG_CMD_UNIVERSE) */
+#endif
diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 904df71..45e07f1 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -30,7 +30,7 @@
#include <asm/byteorder.h>
#include <part.h>
-#if (CONFIG_COMMANDS & CFG_CMD_USB)
+#if defined(CONFIG_CMD_USB)
#include <usb.h>
@@ -609,10 +609,10 @@
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_USB) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_USB)
+#if defined(CONFIG_CMD_USB)
#ifdef CONFIG_USB_STORAGE
U_BOOT_CMD(
diff --git a/common/cmd_vfd.c b/common/cmd_vfd.c
index 5e623a2..29c349d 100644
--- a/common/cmd_vfd.c
+++ b/common/cmd_vfd.c
@@ -35,7 +35,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_VFD)
+#if defined(CONFIG_CMD_VFD)
#include <vfd_logo.h>
#define VFD_TEST_LOGO_BMPNR 0
@@ -73,7 +73,7 @@
"vfd ADDR\n"
" - load bitmap at address ADDR\n"
);
-#endif /* CFG_CMD_VFD */
+#endif
#ifdef CONFIG_VFD
int trab_vfd (ulong bitmap)
diff --git a/common/cmd_ximg.c b/common/cmd_ximg.c
index 8359153..52e0614 100644
--- a/common/cmd_ximg.c
+++ b/common/cmd_ximg.c
@@ -24,7 +24,7 @@
* MA 02111-1307 USA
*/
-#if (CONFIG_COMMANDS & CFG_CMD_XIMG)
+#if defined(CONFIG_CMD_XIMG)
/*
* Multi Image extract
@@ -141,4 +141,4 @@
"addr part [dest]\n"
" - extract <part> from image at <addr> and copy to <dest>\n");
-#endif /* CONFIG_COMMANDS & CFG_CMD_XIMG */
+#endif
diff --git a/common/command.c b/common/command.c
index e917975..af2f8cb 100644
--- a/common/command.c
+++ b/common/command.c
@@ -42,7 +42,7 @@
NULL
);
-#if (CONFIG_COMMANDS & CFG_CMD_ECHO)
+#if defined(CONFIG_CMD_ECHO)
int
do_echo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
@@ -76,7 +76,7 @@
" - echo args to console; \\c suppresses newline\n"
);
-#endif /* CFG_CMD_ECHO */
+#endif
#ifdef CFG_HUSH_PARSER
@@ -409,7 +409,7 @@
{
install_auto_complete_handler("printenv", var_complete);
install_auto_complete_handler("setenv", var_complete);
-#if (CONFIG_COMMANDS & CFG_CMD_RUN)
+#if defined(CONFIG_CMD_RUN)
install_auto_complete_handler("run", var_complete);
#endif
}
diff --git a/common/docecc.c b/common/docecc.c
index 79adb48..5daa6fc 100644
--- a/common/docecc.c
+++ b/common/docecc.c
@@ -31,7 +31,7 @@
#undef ECC_DEBUG
#undef PSYCHO_DEBUG
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
#include <linux/mtd/doc2000.h>
@@ -514,4 +514,4 @@
return nb_errors;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_DOC) */
+#endif
diff --git a/common/env_common.c b/common/env_common.c
index eb33422..a494812 100644
--- a/common/env_common.c
+++ b/common/env_common.c
@@ -30,13 +30,6 @@
#include <linux/stddef.h>
#include <malloc.h>
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
DECLARE_GLOBAL_DATA_PTR;
#ifdef CONFIG_AMIGAONEG3SE
@@ -232,7 +225,7 @@
puts ("Using default environment\n\n");
#else
puts ("*** Warning - bad CRC, using default environment\n\n");
- SHOW_BOOT_PROGRESS (-1);
+ show_boot_progress (-60);
#endif
if (sizeof(default_environment) > ENV_SIZE)
diff --git a/common/env_flash.c b/common/env_flash.c
index 1674b30..eccfb62 100644
--- a/common/env_flash.c
+++ b/common/env_flash.c
@@ -37,10 +37,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH))
+#if defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_FLASH)
#define CMD_SAVEENV
#elif defined(CFG_ENV_ADDR_REDUND)
-#error Cannot use CFG_ENV_ADDR_REDUND without CFG_CMD_ENV & CFG_CMD_FLASH
+#error Cannot use CFG_ENV_ADDR_REDUND without CONFIG_CMD_ENV & CONFIG_CMD_FLASH
#endif
#if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND < CFG_ENV_SIZE)
@@ -107,13 +107,6 @@
ulong addr1 = (ulong)&(flash_addr->data);
ulong addr2 = (ulong)&(flash_addr_new->data);
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
- goto bad_flash;
-#endif
-
crc1_ok = (crc32(0, flash_addr->data, ENV_SIZE) == flash_addr->crc);
crc2_ok = (crc32(0, flash_addr_new->data, ENV_SIZE) == flash_addr_new->crc);
@@ -143,9 +136,6 @@
gd->env_valid = 2;
}
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
return (0);
}
@@ -259,20 +249,12 @@
int env_init(void)
{
-#ifdef CONFIG_OMAP2420H4
- int flash_probe(void);
-
- if(flash_probe() == 0)
- goto bad_flash;
-#endif
if (crc32(0, env_ptr->data, ENV_SIZE) == env_ptr->crc) {
gd->env_addr = (ulong)&(env_ptr->data);
gd->env_valid = 1;
return(0);
}
-#ifdef CONFIG_OMAP2420H4
-bad_flash:
-#endif
+
gd->env_addr = (ulong)&default_environment[0];
gd->env_valid = 0;
return (0);
diff --git a/common/env_nand.c b/common/env_nand.c
index 67c4a4e..38a07f8 100644
--- a/common/env_nand.c
+++ b/common/env_nand.c
@@ -39,10 +39,10 @@
#include <malloc.h>
#include <nand.h>
-#if ((CONFIG_COMMANDS&(CFG_CMD_ENV|CFG_CMD_NAND)) == (CFG_CMD_ENV|CFG_CMD_NAND))
+#if defined(CONFIG_CMD_ENV) && defined(CONFIG_CMD_NAND)
#define CMD_SAVEENV
#elif defined(CFG_ENV_OFFSET_REDUND)
-#error Cannot use CFG_ENV_OFFSET_REDUND without CFG_CMD_ENV & CFG_CMD_NAND
+#error Cannot use CFG_ENV_OFFSET_REDUND without CONFIG_CMD_ENV & CONFIG_CMD_NAND
#endif
#if defined(CFG_ENV_SIZE_REDUND) && (CFG_ENV_SIZE_REDUND != CFG_ENV_SIZE)
diff --git a/common/environment.c b/common/environment.c
index 1d425a7..24257f7 100644
--- a/common/environment.c
+++ b/common/environment.c
@@ -51,18 +51,7 @@
* a seperate section. Note that ENV_CRC is only defined when building
* U-Boot itself.
*/
-#if (defined(CONFIG_CMI) || \
- defined(CONFIG_FADS) || \
- defined(CONFIG_HYMOD) || \
- defined(CONFIG_ICU862) || \
- defined(CONFIG_R360MPI) || \
- defined(CONFIG_TQM8xxL) || \
- defined(CONFIG_RRVISION) || \
- defined(CONFIG_TRAB) || \
- defined(CONFIG_PPCHAMELEONEVB) || \
- defined(CONFIG_M5271EVB) || \
- defined(CONFIG_IDMR) || \
- defined(CONFIG_NAND_U_BOOT)) && \
+#if (defined(CFG_USE_PPCENV) || defined(CONFIG_NAND_U_BOOT)) && \
defined(ENV_CRC) /* Environment embedded in U-Boot .ppcenv section */
/* XXX - This only works with GNU C */
# define __PPCENV__ __attribute__ ((section(".ppcenv")))
diff --git a/common/exports.c b/common/exports.c
index 0cb4396..ec4656b 100644
--- a/common/exports.c
+++ b/common/exports.c
@@ -28,12 +28,14 @@
gd->jt[XF_get_timer] = (void *) get_timer;
gd->jt[XF_simple_strtoul] = (void *) simple_strtoul;
gd->jt[XF_udelay] = (void *) udelay;
+ gd->jt[XF_simple_strtol] = (void *) simple_strtol;
+ gd->jt[XF_strcmp] = (void *) strcmp;
#if defined(CONFIG_I386) || defined(CONFIG_PPC)
gd->jt[XF_install_hdlr] = (void *) irq_install_handler;
gd->jt[XF_free_hdlr] = (void *) irq_free_handler;
#endif /* I386 || PPC */
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
gd->jt[XF_i2c_write] = (void *) i2c_write;
gd->jt[XF_i2c_read] = (void *) i2c_read;
-#endif /* CFG_CMD_I2C */
+#endif
}
diff --git a/common/fdt_support.c b/common/fdt_support.c
index 69099c4..175d59e 100644
--- a/common/fdt_support.c
+++ b/common/fdt_support.c
@@ -37,21 +37,23 @@
*/
DECLARE_GLOBAL_DATA_PTR;
+/*
+ * fdt points to our working device tree.
+ */
+struct fdt_header *fdt;
/********************************************************************/
int fdt_chosen(void *fdt, ulong initrd_start, ulong initrd_end, int force)
{
- bd_t *bd = gd->bd;
int nodeoffset;
int err;
- u32 tmp; /* used to set 32 bit integer properties */
- char *str; /* used to set string properties */
- ulong clock;
+ u32 tmp; /* used to set 32 bit integer properties */
+ char *str; /* used to set string properties */
err = fdt_check_header(fdt);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_chosen: %s\n", fdt_strerror(err));
return err;
}
@@ -63,11 +65,12 @@
err = fdt_num_reservemap(fdt, &used, &total);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_chosen: %s\n", fdt_strerror(err));
return err;
}
if (used >= total) {
- printf("fdt_chosen: no room in the reserved map (%d of %d)\n",
+ printf("WARNING: "
+ "no room in the reserved map (%d of %d)\n",
used, total);
return -1;
}
@@ -84,7 +87,7 @@
err = fdt_replace_reservemap_entry(fdt, j,
initrd_start, initrd_end - initrd_start + 1);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_chosen: %s\n", fdt_strerror(err));
return err;
}
}
@@ -92,7 +95,7 @@
/*
* Find the "chosen" node.
*/
- nodeoffset = fdt_path_offset (fdt, "/chosen");
+ nodeoffset = fdt_find_node_by_path (fdt, "/chosen");
/*
* If we have a "chosen" node already the "force the writing"
@@ -110,7 +113,8 @@
*/
nodeoffset = fdt_add_subnode(fdt, 0, "chosen");
if (nodeoffset < 0) {
- printf("libfdt: %s\n", fdt_strerror(nodeoffset));
+ printf("WARNING: could not create /chosen %s.\n",
+ fdt_strerror(nodeoffset));
return nodeoffset;
}
}
@@ -120,42 +124,35 @@
*/
str = getenv("bootargs");
if (str != NULL) {
- err = fdt_setprop(fdt, nodeoffset, "bootargs", str, strlen(str)+1);
+ err = fdt_setprop(fdt, nodeoffset,
+ "bootargs", str, strlen(str)+1);
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: could not set bootargs %s.\n",
+ fdt_strerror(err));
}
if (initrd_start && initrd_end) {
tmp = __cpu_to_be32(initrd_start);
- err = fdt_setprop(fdt, nodeoffset, "linux,initrd-start", &tmp, sizeof(tmp));
+ err = fdt_setprop(fdt, nodeoffset,
+ "linux,initrd-start", &tmp, sizeof(tmp));
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: "
+ "could not set linux,initrd-start %s.\n",
+ fdt_strerror(err));
tmp = __cpu_to_be32(initrd_end);
- err = fdt_setprop(fdt, nodeoffset, "linux,initrd-end", &tmp, sizeof(tmp));
+ err = fdt_setprop(fdt, nodeoffset,
+ "linux,initrd-end", &tmp, sizeof(tmp));
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: could not set linux,initrd-end %s.\n",
+ fdt_strerror(err));
}
#ifdef OF_STDOUT_PATH
- err = fdt_setprop(fdt, nodeoffset, "linux,stdout-path", OF_STDOUT_PATH, strlen(OF_STDOUT_PATH)+1);
+ err = fdt_setprop(fdt, nodeoffset,
+ "linux,stdout-path", OF_STDOUT_PATH, strlen(OF_STDOUT_PATH)+1);
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: could not set linux,stdout-path %s.\n",
+ fdt_strerror(err));
#endif
- nodeoffset = fdt_path_offset (fdt, "/cpus");
- if (nodeoffset >= 0) {
- clock = cpu_to_be32(bd->bi_intfreq);
- err = fdt_setprop(fdt, nodeoffset, "clock-frequency", &clock, 4);
- if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
- }
-#ifdef OF_TBCLK
- nodeoffset = fdt_path_offset (fdt, "/cpus/" OF_CPU "/timebase-frequency");
- if (nodeoffset >= 0) {
- clock = cpu_to_be32(OF_TBCLK);
- err = fdt_setprop(fdt, nodeoffset, "clock-frequency", &clock, 4);
- if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
- }
-#endif
return err;
}
@@ -177,7 +174,7 @@
err = fdt_check_header(fdt);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_env: %s\n", fdt_strerror(err));
return err;
}
@@ -185,11 +182,11 @@
* See if we already have a "u-boot-env" node, delete it if so.
* Then create a new empty node.
*/
- nodeoffset = fdt_path_offset (fdt, "/u-boot-env");
+ nodeoffset = fdt_find_node_by_path (fdt, "/u-boot-env");
if (nodeoffset >= 0) {
err = fdt_del_node(fdt, nodeoffset);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_env: %s\n", fdt_strerror(err));
return err;
}
}
@@ -198,7 +195,8 @@
*/
nodeoffset = fdt_add_subnode(fdt, 0, "u-boot-env");
if (nodeoffset < 0) {
- printf("libfdt: %s\n", fdt_strerror(nodeoffset));
+ printf("WARNING: could not create /u-boot-env %s.\n",
+ fdt_strerror(nodeoffset));
return nodeoffset;
}
@@ -226,7 +224,8 @@
continue;
err = fdt_setprop(fdt, nodeoffset, lval, rval, strlen(rval)+1);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: could not set %s %s.\n",
+ lval, fdt_strerror(err));
return err;
}
}
@@ -292,12 +291,12 @@
bd_t *bd = gd->bd;
int nodeoffset;
int err;
- u32 tmp; /* used to set 32 bit integer properties */
+ u32 tmp; /* used to set 32 bit integer properties */
int i;
err = fdt_check_header(fdt);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_bd_t: %s\n", fdt_strerror(err));
return err;
}
@@ -305,11 +304,11 @@
* See if we already have a "bd_t" node, delete it if so.
* Then create a new empty node.
*/
- nodeoffset = fdt_path_offset (fdt, "/bd_t");
+ nodeoffset = fdt_find_node_by_path (fdt, "/bd_t");
if (nodeoffset >= 0) {
err = fdt_del_node(fdt, nodeoffset);
if (err < 0) {
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("fdt_bd_t: %s\n", fdt_strerror(err));
return err;
}
}
@@ -318,7 +317,9 @@
*/
nodeoffset = fdt_add_subnode(fdt, 0, "bd_t");
if (nodeoffset < 0) {
- printf("libfdt: %s\n", fdt_strerror(nodeoffset));
+ printf("WARNING: could not create /bd_t %s.\n",
+ fdt_strerror(nodeoffset));
+ printf("fdt_bd_t: %s\n", fdt_strerror(nodeoffset));
return nodeoffset;
}
/*
@@ -326,20 +327,23 @@
*/
for (i = 0; i < sizeof(bd_map)/sizeof(bd_map[0]); i++) {
tmp = cpu_to_be32(getenv("bootargs"));
- err = fdt_setprop(fdt, nodeoffset, bd_map[i].name, &tmp, sizeof(tmp));
+ err = fdt_setprop(fdt, nodeoffset,
+ bd_map[i].name, &tmp, sizeof(tmp));
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: could not set %s %s.\n",
+ bd_map[i].name, fdt_strerror(err));
}
/*
* Add a couple of oddball entries...
*/
err = fdt_setprop(fdt, nodeoffset, "enetaddr", &bd->bi_enetaddr, 6);
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
+ printf("WARNING: could not set enetaddr %s.\n",
+ fdt_strerror(err));
err = fdt_setprop(fdt, nodeoffset, "ethspeed", &bd->bi_ethspeed, 4);
if (err < 0)
- printf("libfdt: %s\n", fdt_strerror(err));
-
+ printf("WARNING: could not set ethspeed %s.\n",
+ fdt_strerror(err));
return 0;
}
#endif /* ifdef CONFIG_OF_HAS_BD_T */
diff --git a/common/flash.c b/common/flash.c
index a64bc98..888ff9c 100644
--- a/common/flash.c
+++ b/common/flash.c
@@ -47,16 +47,16 @@
short s_end = info->sector_count - 1; /* index of last sector */
int i;
- debug ("flash_protect %s: from 0x%08lX to 0x%08lX\n",
- (flag & FLAG_PROTECT_SET) ? "ON" :
- (flag & FLAG_PROTECT_CLEAR) ? "OFF" : "???",
- from, to);
-
/* Do nothing if input data is bad. */
if (info->sector_count == 0 || info->size == 0 || to < from) {
return;
}
+ debug ("flash_protect %s: from 0x%08lX to 0x%08lX\n",
+ (flag & FLAG_PROTECT_SET) ? "ON" :
+ (flag & FLAG_PROTECT_CLEAR) ? "OFF" : "???",
+ from, to);
+
/* There is nothing to do if we have no data about the flash
* or the protect range and flash range don't overlap.
*/
diff --git a/common/hush.c b/common/hush.c
index feb5627..582635c 100644
--- a/common/hush.c
+++ b/common/hush.c
@@ -1682,7 +1682,7 @@
return -1; /* give up after bad command */
} else {
int rcode;
-#if (CONFIG_COMMANDS & CFG_CMD_BOOTD)
+#if defined(CONFIG_CMD_BOOTD)
extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
/* avoid "bootd" recursion */
@@ -1694,7 +1694,7 @@
else
flag |= CMD_FLAG_BOOTD;
}
-#endif /* CFG_CMD_BOOTD */
+#endif
/* found - check max args */
if ((child->argc - i) > cmdtp->maxargs) {
printf ("Usage:\n%s\n", cmdtp->usage);
diff --git a/common/kgdb.c b/common/kgdb.c
index 6de6ec9..1d34669 100644
--- a/common/kgdb.c
+++ b/common/kgdb.c
@@ -92,7 +92,7 @@
#include <kgdb.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef KGDB_DEBUG
@@ -591,4 +591,4 @@
int kgdb_not_configured = 1;
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/common/lcd.c b/common/lcd.c
index eaed2ab..914dc2e 100644
--- a/common/lcd.c
+++ b/common/lcd.c
@@ -571,7 +571,7 @@
#endif /* CONFIG_LCD_LOGO */
/*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
+#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
/*
* Display the BMP file located at address bmp_image.
* Only uncompressed.
@@ -700,7 +700,7 @@
return (0);
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */
+#endif
static void *lcd_logo (void)
diff --git a/common/main.c b/common/main.c
index d8c0054..379695c 100644
--- a/common/main.c
+++ b/common/main.c
@@ -44,6 +44,12 @@
DECLARE_GLOBAL_DATA_PTR;
#endif
+/*
+ * Board-specific Platform code can reimplement show_boot_progress () if needed
+ */
+void inline __show_boot_progress (int val) {}
+void inline show_boot_progress (int val) __attribute__((weak, alias("__show_boot_progress")));
+
#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY)
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */
#endif
@@ -113,7 +119,7 @@
u_int i;
# ifdef CONFIG_AUTOBOOT_PROMPT
- printf (CONFIG_AUTOBOOT_PROMPT, bootdelay);
+ printf(CONFIG_AUTOBOOT_PROMPT, bootdelay);
# endif
# ifdef CONFIG_AUTOBOOT_DELAY_STR
@@ -187,7 +193,7 @@
}
# if DEBUG_BOOTKEYS
if (!abort)
- puts ("key timeout\n");
+ puts("key timeout\n");
# endif
#ifdef CONFIG_SILENT_CONSOLE
@@ -244,13 +250,13 @@
# endif
break;
}
- udelay (10000);
+ udelay(10000);
}
- printf ("\b\b\b%2d ", bootdelay);
+ printf("\b\b\b%2d ", bootdelay);
}
- putc ('\n');
+ putc('\n');
#ifdef CONFIG_SILENT_CONSOLE
if (abort)
@@ -962,7 +968,7 @@
n = 0;
continue;
- case 0x17: /* ^W - erase word */
+ case 0x17: /* ^W - erase word */
p=delete_char(console_buffer, p, &col, &n, plen);
while ((n > 0) && (*p != ' ')) {
p=delete_char(console_buffer, p, &col, &n, plen);
@@ -1191,6 +1197,8 @@
if (outputcnt)
*output = 0;
+ else
+ *(output - 1) = 0;
#ifdef DEBUG_PARSER
printf ("[PROCESS_MACROS] OUTPUT len %d: \"%s\"\n",
@@ -1309,7 +1317,7 @@
continue;
}
-#if (CONFIG_COMMANDS & CFG_CMD_BOOTD)
+#if defined(CONFIG_CMD_BOOTD)
/* avoid "bootd" recursion */
if (cmdtp->cmd == do_bootd) {
#ifdef DEBUG_PARSER
@@ -1323,7 +1331,7 @@
flag |= CMD_FLAG_BOOTD;
}
}
-#endif /* CFG_CMD_BOOTD */
+#endif
/* OK - call function to do the command */
if ((cmdtp->cmd) (cmdtp, flag, argc, argv) != 0) {
@@ -1334,7 +1342,7 @@
/* Did the user stop this? */
if (had_ctrlc ())
- return 0; /* if stopped then not repeatable */
+ return -1; /* if stopped then not repeatable */
}
return rc ? rc : repeatable;
@@ -1342,7 +1350,7 @@
/****************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_RUN)
+#if defined(CONFIG_CMD_RUN)
int do_run (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
int i;
@@ -1370,4 +1378,4 @@
}
return 0;
}
-#endif /* CFG_CMD_RUN */
+#endif
diff --git a/common/miiphyutil.c b/common/miiphyutil.c
index e411e57..c69501f 100644
--- a/common/miiphyutil.c
+++ b/common/miiphyutil.c
@@ -29,7 +29,7 @@
#include <common.h>
#include <miiphy.h>
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
#include <asm/types.h>
#include <linux/list.h>
#include <malloc.h>
@@ -470,4 +470,4 @@
}
#endif
-#endif /* CONFIG_MII || (CONFIG_COMMANDS & CFG_CMD_MII) */
+#endif /* CONFIG_MII */
diff --git a/common/serial.c b/common/serial.c
index 13e9f30..dee1cc0 100644
--- a/common/serial.c
+++ b/common/serial.c
@@ -32,7 +32,7 @@
static struct serial_device *serial_devices = NULL;
static struct serial_device *serial_current = NULL;
-#ifndef CONFIG_LWMON
+#if !defined(CONFIG_LWMON) && !defined(CONFIG_PXA27X)
struct serial_device *default_serial_console (void)
{
#if defined(CONFIG_8xx_CONS_SMC1) || defined(CONFIG_8xx_CONS_SMC2)
@@ -65,7 +65,7 @@
}
#endif
-static int serial_register (struct serial_device *dev)
+int serial_register (struct serial_device *dev)
{
dev->init += gd->reloc_off;
dev->setbrg += gd->reloc_off;
@@ -110,6 +110,15 @@
serial_register(&eserial4_device);
#endif
#endif /* CFG_NS16550_SERIAL */
+#if defined (CONFIG_FFUART)
+ serial_register(&serial_ffuart_device);
+#endif
+#if defined (CONFIG_BTUART)
+ serial_register(&serial_btuart_device);
+#endif
+#if defined (CONFIG_STUART)
+ serial_register(&serial_stuart_device);
+#endif
serial_assign (default_serial_console ()->name);
}
diff --git a/common/soft_i2c.c b/common/soft_i2c.c
index edad51b..c5d7e20 100644
--- a/common/soft_i2c.c
+++ b/common/soft_i2c.c
@@ -29,13 +29,16 @@
#ifdef CONFIG_MPC8260 /* only valid for MPC8260 */
#include <ioports.h>
#endif
-#ifdef CONFIG_AT91RM9200DK /* need this for the at91rm9200dk */
+#ifdef CONFIG_AT91RM9200 /* need this for the at91rm9200 */
#include <asm/io.h>
#include <asm/arch/hardware.h>
#endif
#ifdef CONFIG_IXP425 /* only valid for IXP425 */
#include <asm/arch/ixp425.h>
#endif
+#ifdef CONFIG_LPC2292
+#include <asm/arch/hardware.h>
+#endif
#include <i2c.h>
#if defined(CONFIG_SOFT_I2C)
diff --git a/common/soft_spi.c b/common/soft_spi.c
index 00a57de..e425061 100644
--- a/common/soft_spi.c
+++ b/common/soft_spi.c
@@ -79,7 +79,9 @@
*/
int spi_xfer(spi_chipsel_type chipsel, int bitlen, uchar *dout, uchar *din)
{
+#ifdef CFG_IMMR
volatile immap_t *immr = (immap_t *)CFG_IMMR;
+#endif
uchar tmpdin = 0;
uchar tmpdout = 0;
int j;
diff --git a/common/usb.c b/common/usb.c
index 0857494..933afa9 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -49,7 +49,7 @@
#include <asm/processor.h>
#include <linux/ctype.h>
-#if (CONFIG_COMMANDS & CFG_CMD_USB)
+#if defined(CONFIG_CMD_USB)
#include <usb.h>
#ifdef CONFIG_4xx
@@ -1247,6 +1247,6 @@
return ret;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_USB) */
+#endif
/* EOF */
diff --git a/common/usb_kbd.c b/common/usb_kbd.c
index 56c2166..aec558a 100644
--- a/common/usb_kbd.c
+++ b/common/usb_kbd.c
@@ -129,7 +129,11 @@
static int usb_kbd_getc(void)
{
char c;
- while(usb_in_pointer==usb_out_pointer);
+ while(usb_in_pointer==usb_out_pointer) {
+#ifdef CFG_USB_EVENT_POLL
+ usb_event_poll();
+#endif
+ }
if((usb_out_pointer+1)==USB_KBD_BUFFER_LEN)
usb_out_pointer=0;
else
diff --git a/common/usb_storage.c b/common/usb_storage.c
index 196ceb7..0f79f36 100644
--- a/common/usb_storage.c
+++ b/common/usb_storage.c
@@ -55,7 +55,7 @@
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_USB)
+#if defined(CONFIG_CMD_USB)
#include <part.h>
#include <usb.h>
@@ -1249,4 +1249,4 @@
}
#endif /* CONFIG_USB_STORAGE */
-#endif /* CFG_CMD_USB */
+#endif
diff --git a/cpu/74xx_7xx/kgdb.S b/cpu/74xx_7xx/kgdb.S
index e838513..4f23122 100644
--- a/cpu/74xx_7xx/kgdb.S
+++ b/cpu/74xx_7xx/kgdb.S
@@ -31,7 +31,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
/*
* cache flushing routines for kgdb
@@ -74,4 +74,4 @@
SYNC
blr
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S
index 1143038..b5834b9 100644
--- a/cpu/74xx_7xx/start.S
+++ b/cpu/74xx_7xx/start.S
@@ -125,7 +125,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -143,7 +143,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/74xx_7xx/traps.c b/cpu/74xx_7xx/traps.c
index 50c5eeb..b066227 100644
--- a/cpu/74xx_7xx/traps.c
+++ b/cpu/74xx_7xx/traps.c
@@ -40,7 +40,7 @@
DECLARE_GLOBAL_DATA_PTR;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -133,7 +133,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -166,7 +166,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -181,7 +181,7 @@
unsigned char *p = regs ? (unsigned char *)(regs->nip) : NULL;
int i, j;
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -204,7 +204,7 @@
void
SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -217,7 +217,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
diff --git a/cpu/arm1136/config.mk b/cpu/arm1136/config.mk
index e39e774..6ab0dd3 100644
--- a/cpu/arm1136/config.mk
+++ b/cpu/arm1136/config.mk
@@ -31,4 +31,5 @@
#
# =========================================================================
PLATFORM_CPPFLAGS +=$(call cc-option,-mapcs-32,-mabi=apcs-gnu)
+PLATFORM_CPPFLAGS +=$(call cc-option,-mno-thumb-interwork,)
PLATFORM_RELFLAGS +=$(call cc-option,-mshort-load-bytes,$(call cc-option,-malignment-traps,))
diff --git a/cpu/arm720t/lpc2292/Makefile b/cpu/arm720t/lpc2292/Makefile
new file mode 100644
index 0000000..240f1e3
--- /dev/null
+++ b/cpu/arm720t/lpc2292/Makefile
@@ -0,0 +1,50 @@
+#
+# (C) Copyright 2000-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(SOC).a
+
+COBJS = flash.o mmc.o mmc_hw.o spi.o
+SOBJS = $(obj)iap_entry.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(obj).depend $(LIB)
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
+
+# this MUST be compiled as thumb code!
+$(SOBJS):
+ $(CC) $(AFLAGS) -march=armv4t -c -o $(SOBJS) iap_entry.S
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/arm720t/lpc2292/flash.c b/cpu/arm720t/lpc2292/flash.c
new file mode 100644
index 0000000..e5c8697
--- /dev/null
+++ b/cpu/arm720t/lpc2292/flash.c
@@ -0,0 +1,249 @@
+/*
+ * (C) Copyright 2006 Embedded Artists AB <www.embeddedartists.com>
+ *
+ * Modified to remove all but the IAP-command related code by
+ * Gary Jennejohn <garyj@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/arch/hardware.h>
+
+/* IAP commands use 32 bytes at the top of CPU internal sram, we
+ use 512 bytes below that */
+#define COPY_BUFFER_LOCATION 0x40003de0
+
+#define IAP_LOCATION 0x7ffffff1
+#define IAP_CMD_PREPARE 50
+#define IAP_CMD_COPY 51
+#define IAP_CMD_ERASE 52
+#define IAP_CMD_CHECK 53
+#define IAP_CMD_ID 54
+#define IAP_CMD_VERSION 55
+#define IAP_CMD_COMPARE 56
+
+#define IAP_RET_CMD_SUCCESS 0
+
+static unsigned long command[5];
+static unsigned long result[2];
+
+extern void iap_entry(unsigned long * command, unsigned long * result);
+
+/*-----------------------------------------------------------------------
+ *
+ */
+static int get_flash_sector(flash_info_t * info, ulong flash_addr)
+{
+ int i;
+
+ for(i = 1; i < (info->sector_count); i++) {
+ if (flash_addr < (info->start[i]))
+ break;
+ }
+
+ return (i-1);
+}
+
+/*-----------------------------------------------------------------------
+ * This function assumes that flash_addr is aligned on 512 bytes boundary
+ * in flash. This function also assumes that prepare have been called
+ * for the sector in question.
+ */
+int lpc2292_copy_buffer_to_flash(flash_info_t * info, ulong flash_addr)
+{
+ int first_sector;
+ int last_sector;
+
+ first_sector = get_flash_sector(info, flash_addr);
+ last_sector = get_flash_sector(info, flash_addr + 512 - 1);
+
+ /* prepare sectors for write */
+ command[0] = IAP_CMD_PREPARE;
+ command[1] = first_sector;
+ command[2] = last_sector;
+ iap_entry(command, result);
+ if (result[0] != IAP_RET_CMD_SUCCESS) {
+ printf("IAP prepare failed\n");
+ return ERR_PROG_ERROR;
+ }
+
+ command[0] = IAP_CMD_COPY;
+ command[1] = flash_addr;
+ command[2] = COPY_BUFFER_LOCATION;
+ command[3] = 512;
+ command[4] = CFG_SYS_CLK_FREQ >> 10;
+ iap_entry(command, result);
+ if (result[0] != IAP_RET_CMD_SUCCESS) {
+ printf("IAP copy failed\n");
+ return 1;
+ }
+
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int lpc2292_flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ int flag;
+ int prot;
+ int sect;
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+ if (prot)
+ return ERR_PROTECTED;
+
+
+ flag = disable_interrupts();
+
+ printf ("Erasing %d sectors starting at sector %2d.\n"
+ "This make take some time ... ",
+ s_last - s_first + 1, s_first);
+
+ command[0] = IAP_CMD_PREPARE;
+ command[1] = s_first;
+ command[2] = s_last;
+ iap_entry(command, result);
+ if (result[0] != IAP_RET_CMD_SUCCESS) {
+ printf("IAP prepare failed\n");
+ return ERR_PROTECTED;
+ }
+
+ command[0] = IAP_CMD_ERASE;
+ command[1] = s_first;
+ command[2] = s_last;
+ command[3] = CFG_SYS_CLK_FREQ >> 10;
+ iap_entry(command, result);
+ if (result[0] != IAP_RET_CMD_SUCCESS) {
+ printf("IAP erase failed\n");
+ return ERR_PROTECTED;
+ }
+
+ if (flag)
+ enable_interrupts();
+
+ return ERR_OK;
+}
+
+int lpc2292_write_buff (flash_info_t * info, uchar * src, ulong addr,
+ ulong cnt)
+{
+ int first_copy_size;
+ int last_copy_size;
+ int first_block;
+ int last_block;
+ int nbr_mid_blocks;
+ uchar memmap_value;
+ ulong i;
+ uchar* src_org;
+ uchar* dst_org;
+ int ret = ERR_OK;
+
+ src_org = src;
+ dst_org = (uchar*)addr;
+
+ first_block = addr / 512;
+ last_block = (addr + cnt) / 512;
+ nbr_mid_blocks = last_block - first_block - 1;
+
+ first_copy_size = 512 - (addr % 512);
+ last_copy_size = (addr + cnt) % 512;
+
+ debug("\ncopy first block: (1) %lX -> %lX 0x200 bytes, "
+ "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX 0x200 bytes\n",
+ (ulong)(first_block * 512),
+ (ulong)COPY_BUFFER_LOCATION,
+ (ulong)src,
+ (ulong)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
+ first_copy_size,
+ (ulong)COPY_BUFFER_LOCATION,
+ (ulong)(first_block * 512));
+
+ /* copy first block */
+ memcpy((void*)COPY_BUFFER_LOCATION,
+ (void*)(first_block * 512), 512);
+ memcpy((void*)(COPY_BUFFER_LOCATION + 512 - first_copy_size),
+ src, first_copy_size);
+ lpc2292_copy_buffer_to_flash(info, first_block * 512);
+ src += first_copy_size;
+ addr += first_copy_size;
+
+ /* copy middle blocks */
+ for (i = 0; i < nbr_mid_blocks; i++) {
+ debug("copy middle block: %lX -> %lX 512 bytes, "
+ "%lX -> %lX 512 bytes\n",
+ (ulong)src,
+ (ulong)COPY_BUFFER_LOCATION,
+ (ulong)COPY_BUFFER_LOCATION,
+ (ulong)addr);
+
+ memcpy((void*)COPY_BUFFER_LOCATION, src, 512);
+ lpc2292_copy_buffer_to_flash(info, addr);
+ src += 512;
+ addr += 512;
+ }
+
+
+ if (last_copy_size > 0) {
+ debug("copy last block: (1) %lX -> %lX 0x200 bytes, "
+ "(2) %lX -> %lX 0x%X bytes, (3) %lX -> %lX x200 bytes\n",
+ (ulong)(last_block * 512),
+ (ulong)COPY_BUFFER_LOCATION,
+ (ulong)src,
+ (ulong)(COPY_BUFFER_LOCATION),
+ last_copy_size,
+ (ulong)COPY_BUFFER_LOCATION,
+ (ulong)addr);
+
+ /* copy last block */
+ memcpy((void*)COPY_BUFFER_LOCATION,
+ (void*)(last_block * 512), 512);
+ memcpy((void*)COPY_BUFFER_LOCATION,
+ src, last_copy_size);
+ lpc2292_copy_buffer_to_flash(info, addr);
+ }
+
+ /* verify write */
+ memmap_value = GET8(MEMMAP);
+
+ disable_interrupts();
+
+ PUT8(MEMMAP, 01); /* we must make sure that initial 64
+ bytes are taken from flash when we
+ do the compare */
+
+ for (i = 0; i < cnt; i++) {
+ if (*dst_org != *src_org){
+ printf("Write failed. Byte %lX differs\n", i);
+ ret = ERR_PROG_ERROR;
+ break;
+ }
+ dst_org++;
+ src_org++;
+ }
+
+ PUT8(MEMMAP, memmap_value);
+ enable_interrupts();
+
+ return ret;
+}
diff --git a/board/lpc2292sodimm/iap_entry.S b/cpu/arm720t/lpc2292/iap_entry.S
similarity index 100%
rename from board/lpc2292sodimm/iap_entry.S
rename to cpu/arm720t/lpc2292/iap_entry.S
diff --git a/cpu/arm720t/lpc2292/mmc.c b/cpu/arm720t/lpc2292/mmc.c
new file mode 100644
index 0000000..fd7f149b
--- /dev/null
+++ b/cpu/arm720t/lpc2292/mmc.c
@@ -0,0 +1,157 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#include <mmc.h>
+#include <asm/errno.h>
+#include <asm/arch/hardware.h>
+#include <part.h>
+#include <fat.h>
+#include "mmc_hw.h"
+#include <asm/arch/spi.h>
+
+#ifdef CONFIG_MMC
+
+#undef MMC_DEBUG
+
+static block_dev_desc_t mmc_dev;
+
+/* these are filled out by a call to mmc_hw_get_parameters */
+static int hw_size; /* in kbytes */
+static int hw_nr_sects;
+static int hw_sect_size; /* in bytes */
+
+block_dev_desc_t * mmc_get_dev(int dev)
+{
+ return (block_dev_desc_t *)(&mmc_dev);
+}
+
+unsigned long mmc_block_read(int dev,
+ unsigned long start,
+ lbaint_t blkcnt,
+ void *buffer)
+{
+ unsigned long rc = 0;
+ unsigned char *p = (unsigned char *)buffer;
+ unsigned long i;
+ unsigned long addr = start;
+
+#ifdef MMC_DEBUG
+ printf("mmc_block_read: start=%lu, blkcnt=%lu\n", start,
+ (unsigned long)blkcnt);
+#endif
+
+ for(i = 0; i < (unsigned long)blkcnt; i++) {
+#ifdef MMC_DEBUG
+ printf("mmc_read_sector: addr=%lu, buffer=%p\n", addr, p);
+#endif
+ (void)mmc_read_sector(addr, p);
+ rc++;
+ addr++;
+ p += hw_sect_size;
+ }
+
+ return rc;
+}
+
+/*-----------------------------------------------------------------------------
+ * Read hardware paramterers (sector size, size, number of sectors)
+ */
+static int mmc_hw_get_parameters(void)
+{
+ unsigned char csddata[16];
+ unsigned int sizemult;
+ unsigned int size;
+
+ mmc_read_csd(csddata);
+ hw_sect_size = 1<<(csddata[5] & 0x0f);
+ size = ((csddata[6]&0x03)<<10)+(csddata[7]<<2)+(csddata[8]&0xc0);
+ sizemult = ((csddata[10] & 0x80)>>7)+((csddata[9] & 0x03)<<1);
+ hw_nr_sects = (size+1)*(1<<(sizemult+2));
+ hw_size = hw_nr_sects*hw_sect_size/1024;
+
+#ifdef MMC_DEBUG
+ printf("mmc_hw_get_parameters: hw_sect_size=%d, hw_nr_sects=%d, "
+ "hw_size=%d\n", hw_sect_size, hw_nr_sects, hw_size);
+#endif
+
+ return 0;
+}
+
+int mmc_init(int verbose)
+{
+ int ret = -ENODEV;
+
+ if (verbose)
+ printf("mmc_init\n");
+
+ spi_init();
+ /* this meeds to be done twice */
+ mmc_hw_init();
+ udelay(1000);
+ mmc_hw_init();
+
+ mmc_hw_get_parameters();
+
+ mmc_dev.if_type = IF_TYPE_MMC;
+ mmc_dev.part_type = PART_TYPE_DOS;
+ mmc_dev.dev = 0;
+ mmc_dev.lun = 0;
+ mmc_dev.type = 0;
+ mmc_dev.blksz = hw_sect_size;
+ mmc_dev.lba = hw_nr_sects;
+ sprintf((char*)mmc_dev.vendor, "Unknown vendor");
+ sprintf((char*)mmc_dev.product, "Unknown product");
+ sprintf((char*)mmc_dev.revision, "N/A");
+ mmc_dev.removable = 0; /* should be true??? */
+ mmc_dev.block_read = mmc_block_read;
+
+ fat_register_device(&mmc_dev, 1);
+
+ ret = 0;
+
+ return ret;
+}
+
+int mmc_write(uchar * src, ulong dst, int size)
+{
+#ifdef MMC_DEBUG
+ printf("mmc_write: src=%p, dst=%lu, size=%u\n", src, dst, size);
+#endif
+ /* Since mmc2info always returns 0 this function will never be called */
+ return 0;
+}
+
+int mmc_read(ulong src, uchar * dst, int size)
+{
+#ifdef MMC_DEBUG
+ printf("mmc_read: src=%lu, dst=%p, size=%u\n", src, dst, size);
+#endif
+ /* Since mmc2info always returns 0 this function will never be called */
+ return 0;
+}
+
+int mmc2info(ulong addr)
+{
+ /* This function is used by cmd_cp to determine if source or destination
+ address resides on MMC-card or not. We do not support copy to and from
+ MMC-card so we always return 0. */
+ return 0;
+}
+
+#endif /* CONFIG_MMC */
diff --git a/cpu/arm720t/lpc2292/mmc_hw.c b/cpu/arm720t/lpc2292/mmc_hw.c
new file mode 100644
index 0000000..b4dc4a6
--- /dev/null
+++ b/cpu/arm720t/lpc2292/mmc_hw.c
@@ -0,0 +1,233 @@
+/*
+ This code was original written by Ulrich Radig and modified by
+ Embedded Artists AB (www.embeddedartists.com).
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+#include <config.h>
+#include <common.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spi.h>
+
+#define MMC_Enable() PUT32(IO1CLR, 1l << 22)
+#define MMC_Disable() PUT32(IO1SET, 1l << 22)
+#define mmc_spi_cfg() spi_set_clock(8); spi_set_cfg(0, 1, 0);
+
+static unsigned char Write_Command_MMC (unsigned char *CMD);
+static void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer,
+ unsigned short int Bytes);
+
+/* initialize the hardware */
+int mmc_hw_init(void)
+{
+ unsigned long a;
+ unsigned short int Timeout = 0;
+ unsigned char b;
+ unsigned char CMD[] = {0x40, 0x00, 0x00, 0x00, 0x00, 0x95};
+
+ /* set-up GPIO and SPI */
+ (*((volatile unsigned long *)PINSEL2)) &= ~(1l << 3); /* clear bit 3 */
+ (*((volatile unsigned long *)IO1DIR)) |= (1l << 22); /* set bit 22 (output) */
+
+ MMC_Disable();
+
+ spi_lock();
+ spi_set_clock(248);
+ spi_set_cfg(0, 1, 0);
+ MMC_Enable();
+
+ /* waste some time */
+ for(a=0; a < 20000; a++)
+ asm("nop");
+
+ /* Put the MMC/SD-card into SPI-mode */
+ for (b = 0; b < 10; b++) /* Sends min 74+ clocks to the MMC/SD-card */
+ spi_write(0xff);
+
+ /* Sends command CMD0 to MMC/SD-card */
+ while (Write_Command_MMC(CMD) != 1) {
+ if (Timeout++ > 200) {
+ MMC_Disable();
+ spi_unlock();
+ return(1); /* Abort with command 1 (return 1) */
+ }
+ }
+ /* Sends Command CMD1 an MMC/SD-card */
+ Timeout = 0;
+ CMD[0] = 0x41;/* Command 1 */
+ CMD[5] = 0xFF;
+
+ while (Write_Command_MMC(CMD) != 0) {
+ if (Timeout++ > 200) {
+ MMC_Disable();
+ spi_unlock();
+ return (2); /* Abort with command 2 (return 2) */
+ }
+ }
+
+ MMC_Disable();
+ spi_unlock();
+
+ return 0;
+}
+
+/* ############################################################################
+ Sends a command to the MMC/SD-card
+ ######################################################################### */
+static unsigned char Write_Command_MMC (unsigned char *CMD)
+{
+ unsigned char a, tmp = 0xff;
+ unsigned short int Timeout = 0;
+
+ MMC_Disable();
+ spi_write(0xFF);
+ MMC_Enable();
+
+ for (a = 0; a < 0x06; a++)
+ spi_write(*CMD++);
+
+ while (tmp == 0xff) {
+ tmp = spi_read();
+ if (Timeout++ > 5000)
+ break;
+ }
+
+ return (tmp);
+}
+
+/* ############################################################################
+ Routine to read the CID register from the MMC/SD-card (16 bytes)
+ ######################################################################### */
+void MMC_Read_Block(unsigned char *CMD, unsigned char *Buffer, unsigned short
+ int Bytes)
+{
+ unsigned short int a;
+
+ spi_lock();
+ mmc_spi_cfg();
+ MMC_Enable();
+
+ if (Write_Command_MMC(CMD) != 0) {
+ MMC_Disable();
+ spi_unlock();
+ return;
+ }
+
+ while (spi_read() != 0xfe) {};
+ for (a = 0; a < Bytes; a++)
+ *Buffer++ = spi_read();
+
+ /* Read the CRC-byte */
+ spi_read(); /* CRC - byte is discarded */
+ spi_read(); /* CRC - byte is discarded */
+ /* set MMC_Chip_Select to high (MMC/SD-card Inaktiv) */
+ MMC_Disable();
+ spi_unlock();
+
+ return;
+}
+
+/* ############################################################################
+ Routine to read a block (512 bytes) from the MMC/SD-card
+ ######################################################################### */
+unsigned char mmc_read_sector (unsigned long addr,unsigned char *Buffer)
+{
+ /* Command 16 to read aBlocks from the MMC/SD - caed */
+ unsigned char CMD[] = {0x51,0x00,0x00,0x00,0x00,0xFF};
+
+ /* The addres on the MMC/SD-card is in bytes,
+ addr is transformed from blocks to bytes and the result is
+ placed into the command */
+
+ addr = addr << 9; /* addr = addr * 512 */
+
+ CMD[1] = ((addr & 0xFF000000) >> 24);
+ CMD[2] = ((addr & 0x00FF0000) >> 16);
+ CMD[3] = ((addr & 0x0000FF00) >> 8 );
+
+ MMC_Read_Block(CMD, Buffer, 512);
+
+ return (0);
+}
+
+/* ############################################################################
+ Routine to write a block (512 byte) to the MMC/SD-card
+ ######################################################################### */
+unsigned char mmc_write_sector (unsigned long addr,unsigned char *Buffer)
+{
+ unsigned char tmp, a;
+ unsigned short int b;
+ /* Command 24 to write a block to the MMC/SD - card */
+ unsigned char CMD[] = {0x58, 0x00, 0x00, 0x00, 0x00, 0xFF};
+
+ /* The addres on the MMC/SD-card is in bytes,
+ addr is transformed from blocks to bytes and the result is
+ placed into the command */
+
+ addr = addr << 9; /* addr = addr * 512 */
+
+ CMD[1] = ((addr & 0xFF000000) >> 24);
+ CMD[2] = ((addr & 0x00FF0000) >> 16);
+ CMD[3] = ((addr & 0x0000FF00) >> 8 );
+
+ spi_lock();
+ mmc_spi_cfg();
+ MMC_Enable();
+
+ /* Send command CMD24 to the MMC/SD-card (Write 1 Block/512 Bytes) */
+ tmp = Write_Command_MMC(CMD);
+ if (tmp != 0) {
+ MMC_Disable();
+ spi_unlock();
+ return(tmp);
+ }
+
+ /* Do a short delay and send a clock-pulse to the MMC/SD-card */
+ for (a = 0; a < 100; a++)
+ spi_read();
+
+ /* Send a start byte to the MMC/SD-card */
+ spi_write(0xFE);
+
+ /* Write the block (512 bytes) to the MMC/SD-card */
+ for (b = 0; b < 512; b++)
+ spi_write(*Buffer++);
+
+ /* write the CRC-Byte */
+ spi_write(0xFF); /* write a dummy CRC */
+ spi_write(0xFF); /* CRC code is not used */
+
+ /* Wait for MMC/SD-card busy */
+ while (spi_read() != 0xff) {};
+
+ /* set MMC_Chip_Select to high (MMC/SD-card inactive) */
+ MMC_Disable();
+ spi_unlock();
+ return (0);
+}
+
+/* #########################################################################
+ Routine to read the CSD register from the MMC/SD-card (16 bytes)
+ ######################################################################### */
+unsigned char mmc_read_csd (unsigned char *Buffer)
+{
+ /* Command to read the CSD register */
+ unsigned char CMD[] = {0x49, 0x00, 0x00, 0x00, 0x00, 0xFF};
+
+ MMC_Read_Block(CMD, Buffer, 16);
+
+ return (0);
+}
diff --git a/board/lpc2292sodimm/mmc_hw.h b/cpu/arm720t/lpc2292/mmc_hw.h
similarity index 100%
rename from board/lpc2292sodimm/mmc_hw.h
rename to cpu/arm720t/lpc2292/mmc_hw.h
diff --git a/cpu/arm720t/lpc2292/spi.c b/cpu/arm720t/lpc2292/spi.c
new file mode 100644
index 0000000..d296bda
--- /dev/null
+++ b/cpu/arm720t/lpc2292/spi.c
@@ -0,0 +1,40 @@
+/*
+ This module implements an interface to the SPI on the lpc22xx.
+ Copyright (C) 2006 Embedded Artists AB (www.embeddedartists.com)
+
+ This program is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 2 of the License, or
+ (at your option) any later version.
+
+ This program is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program; if not, write to the Free Software
+ Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+*/
+
+#include <config.h>
+#include <common.h>
+#include <asm/errno.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spi.h>
+
+unsigned long spi_flags;
+unsigned char spi_idle = 0x00;
+
+int spi_init(void)
+{
+ unsigned long pinsel0_value;
+
+ /* activate spi pins */
+ pinsel0_value = GET32(PINSEL0);
+ pinsel0_value &= ~(0xFFl << 8);
+ pinsel0_value |= (0x55l << 8);
+ PUT32(PINSEL0, pinsel0_value);
+
+ return 0;
+}
diff --git a/cpu/arm720t/serial.c b/cpu/arm720t/serial.c
index 15c54af..27eb73a 100644
--- a/cpu/arm720t/serial.c
+++ b/cpu/arm720t/serial.c
@@ -129,8 +129,6 @@
void serial_setbrg (void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned short divisor = 0;
switch (gd->baudrate) {
diff --git a/cpu/arm920t/at91rm9200/Makefile b/cpu/arm920t/at91rm9200/Makefile
index 8d4e478..ab4c52c 100644
--- a/cpu/arm920t/at91rm9200/Makefile
+++ b/cpu/arm920t/at91rm9200/Makefile
@@ -26,7 +26,7 @@
LIB = $(obj)lib$(SOC).a
COBJS = bcm5221.o dm9161.o ether.o i2c.o interrupts.o \
- lxt972.o serial.o usb_ohci.o
+ lxt972.o serial.o usb.o spi.o
SOBJS = lowlevel_init.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/arm920t/at91rm9200/bcm5221.c b/cpu/arm920t/at91rm9200/bcm5221.c
index 6db1435..b52c615 100644
--- a/cpu/arm920t/at91rm9200/bcm5221.c
+++ b/cpu/arm920t/at91rm9200/bcm5221.c
@@ -32,7 +32,7 @@
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -227,6 +227,6 @@
return FALSE;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/cpu/arm920t/at91rm9200/dm9161.c b/cpu/arm920t/at91rm9200/dm9161.c
index 4b13c23..1beb6e8 100644
--- a/cpu/arm920t/at91rm9200/dm9161.c
+++ b/cpu/arm920t/at91rm9200/dm9161.c
@@ -27,7 +27,7 @@
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -95,7 +95,7 @@
return TRUE;
}
- if ((stat1 & DM9161_100BASE_T4_HD) && (stat2 & DM9161_100HDX)) {
+ if ((stat1 & DM9161_100BASE_TX_HD) && (stat2 & DM9161_100HDX)) {
/*set MII for 100BaseTX and Half Duplex */
p_mac->EMAC_CFG = (p_mac->EMAC_CFG &
~(AT91C_EMAC_SPD | AT91C_EMAC_FD))
@@ -140,7 +140,7 @@
at91rm9200_EmacReadPhy (p_mac, DM9161_MDINTR, &IntValue);
/* set FDX, SPD, Link, INTR masks */
IntValue |= (DM9161_FDX_MASK | DM9161_SPD_MASK |
- DM9161_LINK_MASK | DM9161_INTR_MASK);
+ DM9161_LINK_MASK | DM9161_INTR_MASK);
at91rm9200_EmacWritePhy (p_mac, DM9161_MDINTR, &IntValue);
at91rm9200_EmacDisableMDIO (p_mac);
@@ -174,10 +174,11 @@
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_BMCR, &value))
return FALSE;
- /* Set the Auto_negotiation Advertisement Register */
- /* MII advertising for Next page, 100BaseTxFD and HD, 10BaseTFD and HD, IEEE 802.3 */
+ /* Set the Auto_negotiation Advertisement Register */
+ /* MII advertising for Next page, 100BaseTxFD and HD, */
+ /* 10BaseTFD and HD, IEEE 802.3 */
PhyAnar = DM9161_NP | DM9161_TX_FDX | DM9161_TX_HDX |
- DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3;
+ DM9161_10_FDX | DM9161_10_HDX | DM9161_AN_IEEE_802_3;
if (!at91rm9200_EmacWritePhy (p_mac, DM9161_ANAR, &PhyAnar))
return FALSE;
@@ -220,6 +221,6 @@
return FALSE;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/cpu/arm920t/at91rm9200/ether.c b/cpu/arm920t/at91rm9200/ether.c
index 67008d0..c8f56aa 100644
--- a/cpu/arm920t/at91rm9200/ether.c
+++ b/cpu/arm920t/at91rm9200/ether.c
@@ -50,7 +50,7 @@
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/* alignment as per Errata #11 (64 bytes) is insufficient! */
rbf_t rbfdt[RBF_FRAMEMAX] __attribute((aligned(512)));
@@ -265,7 +265,7 @@
{
};
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
int at91rm9200_miiphy_read(char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
@@ -284,16 +284,16 @@
return 0;
}
-#endif /* defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) */
+#endif
int at91rm9200_miiphy_initialize(bd_t *bis)
{
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register("at91rm9200phy", at91rm9200_miiphy_read, at91rm9200_miiphy_write);
#endif
return 0;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/cpu/arm920t/at91rm9200/lxt972.c b/cpu/arm920t/at91rm9200/lxt972.c
index f12c59c..4edcc9a 100644
--- a/cpu/arm920t/at91rm9200/lxt972.c
+++ b/cpu/arm920t/at91rm9200/lxt972.c
@@ -33,7 +33,7 @@
#ifdef CONFIG_DRIVER_ETHER
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*
* Name:
@@ -186,6 +186,6 @@
return (lxt972_GetLinkSpeed (p_mac));
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NET */
+#endif
#endif /* CONFIG_DRIVER_ETHER */
diff --git a/cpu/arm920t/at91rm9200/spi.c b/cpu/arm920t/at91rm9200/spi.c
new file mode 100644
index 0000000..265d185
--- /dev/null
+++ b/cpu/arm920t/at91rm9200/spi.c
@@ -0,0 +1,151 @@
+/* Driver for ATMEL DataFlash support
+ * Author : Hamid Ikdoumi (Atmel)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+#include <asm/hardware.h>
+
+#ifdef CONFIG_HAS_DATAFLASH
+#include <dataflash.h>
+
+#define AT91C_SPI_CLK 10000000 /* Max Value = 10MHz to be compliant to
+ the Continuous Array Read function */
+
+/* AC Characteristics */
+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
+#define DATAFLASH_TCSS (0xC << 16)
+#define DATAFLASH_TCHS (0x1 << 24)
+
+#define AT91C_TIMEOUT_WRDY 200000
+#define AT91C_SPI_PCS0_SERIAL_DATAFLASH 0xE /* Chip Select 0: NPCS0%1110 */
+#define AT91C_SPI_PCS3_DATAFLASH_CARD 0x7 /* Chip Select 3: NPCS3%0111 */
+
+/*-------------------------------------------------------------------*/
+/* SPI DataFlash Init */
+/*-------------------------------------------------------------------*/
+void AT91F_SpiInit(void)
+{
+ /* Configure PIOs */
+ AT91C_BASE_PIOA->PIO_ASR =
+ AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI |
+ AT91C_PA5_NPCS2 | AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
+ AT91C_PA2_SPCK;
+ AT91C_BASE_PIOA->PIO_PDR =
+ AT91C_PA3_NPCS0 | AT91C_PA4_NPCS1 | AT91C_PA1_MOSI |
+ AT91C_PA5_NPCS2 | AT91C_PA6_NPCS3 | AT91C_PA0_MISO |
+ AT91C_PA2_SPCK;
+ /* Enable CLock */
+ AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_SPI;
+
+ /* Reset the SPI */
+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST;
+
+ /* Configure SPI in Master Mode with No CS selected !!! */
+ AT91C_BASE_SPI->SPI_MR =
+ AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS;
+
+ /* Configure CS0 and CS3 */
+ *(AT91C_SPI_CSR + 0) =
+ AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
+ (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
+ ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
+
+ *(AT91C_SPI_CSR + 3) =
+ AT91C_SPI_CPOL | (AT91C_SPI_DLYBS & DATAFLASH_TCSS) |
+ (AT91C_SPI_DLYBCT & DATAFLASH_TCHS) |
+ ((AT91C_MASTER_CLOCK / (2*AT91C_SPI_CLK)) << 8);
+}
+
+void AT91F_SpiEnable(int cs)
+{
+ switch(cs) {
+ case 0: /* Configure SPI CS0 for Serial DataFlash AT45DBxx */
+ AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
+ AT91C_BASE_SPI->SPI_MR |=
+ ((AT91C_SPI_PCS0_SERIAL_DATAFLASH<<16) &
+ AT91C_SPI_PCS);
+ break;
+ case 3: /* Configure SPI CS3 for Serial DataFlash Card */
+ /* Set up PIO SDC_TYPE to switch on DataFlash Card */
+ /* and not MMC/SDCard */
+ AT91C_BASE_PIOB->PIO_PER =
+ AT91C_PIO_PB7; /* Set in PIO mode */
+ AT91C_BASE_PIOB->PIO_OER =
+ AT91C_PIO_PB7; /* Configure in output */
+ /* Clear Output */
+ AT91C_BASE_PIOB->PIO_CODR = AT91C_PIO_PB7;
+ /* Configure PCS */
+ AT91C_BASE_SPI->SPI_MR &= 0xFFF0FFFF;
+ AT91C_BASE_SPI->SPI_MR |=
+ ((AT91C_SPI_PCS3_DATAFLASH_CARD<<16) & AT91C_SPI_PCS);
+ break;
+ }
+
+ /* SPI_Enable */
+ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SPIEN; }
+
+/*---------------------------------------------------------------------------*/
+/* \fn AT91F_SpiWrite */
+/* \brief Set the PDC registers for a transfert */
+/*---------------------------------------------------------------------------*/
+unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc )
+{
+ unsigned int timeout;
+
+ pDesc->state = BUSY;
+
+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+
+ /* Initialize the Transmit and Receive Pointer */
+ AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ;
+ AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ;
+
+ /* Intialize the Transmit and Receive Counters */
+ AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size;
+ AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size;
+
+ if ( pDesc->tx_data_size != 0 ) {
+ /* Initialize the Next Transmit and Next Receive Pointer */
+ AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ;
+ AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ;
+
+ /* Intialize the Next Transmit and Next Receive Counters */
+ AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ;
+ AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ;
+ }
+
+ /* arm simple, non interrupt dependent timer */
+ reset_timer_masked();
+ timeout = 0;
+
+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN;
+ while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) &&
+ ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT));
+ AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS;
+ pDesc->state = IDLE;
+
+ if (timeout >= CFG_SPI_WRITE_TOUT){
+ printf("Error Timeout\n\r");
+ return DATAFLASH_ERROR;
+ }
+
+ return DATAFLASH_OK;
+}
+#endif
diff --git a/cpu/arm920t/at91rm9200/usb.c b/cpu/arm920t/at91rm9200/usb.c
new file mode 100644
index 0000000..366262e
--- /dev/null
+++ b/cpu/arm920t/at91rm9200/usb.c
@@ -0,0 +1,53 @@
+/*
+ * (C) Copyright 2006
+ * DENX Software Engineering <mk@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+# ifdef CONFIG_AT91RM9200
+
+#include <asm/arch/hardware.h>
+
+int usb_cpu_init()
+{
+ /* Enable USB host clock. */
+ *AT91C_PMC_SCER = AT91C_PMC_UHP; /* 48MHz clock enabled for UHP */
+ *AT91C_PMC_PCER = 1 << AT91C_ID_UHP; /* Peripheral Clock Enable Register */
+ return 0;
+}
+
+int usb_cpu_stop()
+{
+ /* Initialization failed */
+ *AT91C_PMC_PCDR = 1 << AT91C_ID_UHP; /* Peripheral Clock Disable Register */
+ *AT91C_PMC_SCDR = AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
+ return 0;
+}
+
+int usb_cpu_init_fail()
+{
+ usb_cpu_stop();
+}
+
+# endif /* CONFIG_AT91RM9200 */
+#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/cpu/arm920t/at91rm9200/usb_ohci.c b/cpu/arm920t/at91rm9200/usb_ohci.c
deleted file mode 100644
index 5b2c56c..0000000
--- a/cpu/arm920t/at91rm9200/usb_ohci.c
+++ /dev/null
@@ -1,1635 +0,0 @@
-/*
- * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200.
- *
- * (C) Copyright 2003
- * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
- *
- * Note: Much of this code has been derived from Linux 2.4
- * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
- * (C) Copyright 2000-2002 David Brownell
- *
- * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
- * ebenard@eukrea.com - based on s3c24x0's driver
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- *
- */
-/*
- * IMPORTANT NOTES
- * 1 - you MUST define LITTLEENDIAN in the configuration file for the
- * board or this driver will NOT work!
- * 2 - this driver is intended for use with USB Mass Storage Devices
- * (BBB) ONLY. There is NO support for Interrupt or Isochronous pipes!
- * 3 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
- * to activate workaround for bug #41 or this driver will NOT work!
- */
-
-#include <common.h>
-/* #include <pci.h> no PCI on the S3C24X0 */
-
-#ifdef CONFIG_USB_OHCI
-
-#include <asm/arch/hardware.h>
-
-#include <malloc.h>
-#include <usb.h>
-#include "usb_ohci.h"
-
-#define OHCI_USE_NPS /* force NoPowerSwitching mode */
-#undef OHCI_VERBOSE_DEBUG /* not always helpful */
-
-/* For initializing controller (mask in an HCFS mode too) */
-#define OHCI_CONTROL_INIT \
- (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
-
-#define readl(a) (*((vu_long *)(a)))
-#define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
-
-#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
-
-#undef DEBUG
-#ifdef DEBUG
-#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
-#else
-#define dbg(format, arg...) do {} while(0)
-#endif /* DEBUG */
-#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
-#undef SHOW_INFO
-#ifdef SHOW_INFO
-#define info(format, arg...) printf("INFO: " format "\n", ## arg)
-#else
-#define info(format, arg...) do {} while(0)
-#endif
-
-#define m16_swap(x) swap_16(x)
-#define m32_swap(x) swap_32(x)
-
-/* global ohci_t */
-static ohci_t gohci;
-/* this must be aligned to a 256 byte boundary */
-struct ohci_hcca ghcca[1];
-/* a pointer to the aligned storage */
-struct ohci_hcca *phcca;
-/* this allocates EDs for all possible endpoints */
-struct ohci_device ohci_dev;
-/* urb_priv */
-urb_priv_t urb_priv;
-/* RHSC flag */
-int got_rhsc;
-/* device which was disconnected */
-struct usb_device *devgone;
-
-/*-------------------------------------------------------------------------*/
-
-/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
- * The erratum (#4) description is incorrect. AMD's workaround waits
- * till some bits (mostly reserved) are clear; ok for all revs.
- */
-#define OHCI_QUIRK_AMD756 0xabcd
-#define read_roothub(hc, register, mask) ({ \
- u32 temp = readl (&hc->regs->roothub.register); \
- if (hc->flags & OHCI_QUIRK_AMD756) \
- while (temp & mask) \
- temp = readl (&hc->regs->roothub.register); \
- temp; })
-
-static u32 roothub_a (struct ohci *hc)
- { return read_roothub (hc, a, 0xfc0fe000); }
-static inline u32 roothub_b (struct ohci *hc)
- { return readl (&hc->regs->roothub.b); }
-static inline u32 roothub_status (struct ohci *hc)
- { return readl (&hc->regs->roothub.status); }
-static u32 roothub_portstatus (struct ohci *hc, int i)
- { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
-
-
-/* forward declaration */
-static int hc_interrupt (void);
-static void
-td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
- int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
-
-/*-------------------------------------------------------------------------*
- * URB support functions
- *-------------------------------------------------------------------------*/
-
-/* free HCD-private data associated with this URB */
-
-static void urb_free_priv (urb_priv_t * urb)
-{
- int i;
- int last;
- struct td * td;
-
- last = urb->length - 1;
- if (last >= 0) {
- for (i = 0; i <= last; i++) {
- td = urb->td[i];
- if (td) {
- td->usb_dev = NULL;
- urb->td[i] = NULL;
- }
- }
- }
-}
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef DEBUG
-static int sohci_get_current_frame_number (struct usb_device * dev);
-
-/* debug| print the main components of an URB
- * small: 0) header + data packets 1) just header */
-
-static void pkt_print (struct usb_device * dev, unsigned long pipe, void * buffer,
- int transfer_len, struct devrequest * setup, char * str, int small)
-{
- urb_priv_t * purb = &urb_priv;
-
- dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
- str,
- sohci_get_current_frame_number (dev),
- usb_pipedevice (pipe),
- usb_pipeendpoint (pipe),
- usb_pipeout (pipe)? 'O': 'I',
- usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
- (usb_pipecontrol (pipe)? "CTRL": "BULK"),
- purb->actual_length,
- transfer_len, dev->status);
-#ifdef OHCI_VERBOSE_DEBUG
- if (!small) {
- int i, len;
-
- if (usb_pipecontrol (pipe)) {
- printf (__FILE__ ": cmd(8):");
- for (i = 0; i < 8 ; i++)
- printf (" %02x", ((__u8 *) setup) [i]);
- printf ("\n");
- }
- if (transfer_len > 0 && buffer) {
- printf (__FILE__ ": data(%d/%d):",
- purb->actual_length,
- transfer_len);
- len = usb_pipeout (pipe)?
- transfer_len: purb->actual_length;
- for (i = 0; i < 16 && i < len; i++)
- printf (" %02x", ((__u8 *) buffer) [i]);
- printf ("%s\n", i < len? "...": "");
- }
- }
-#endif
-}
-
-/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
-void ep_print_int_eds (ohci_t *ohci, char * str) {
- int i, j;
- __u32 * ed_p;
- for (i= 0; i < 32; i++) {
- j = 5;
- ed_p = &(ohci->hcca->int_table [i]);
- if (*ed_p == 0)
- continue;
- printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
- while (*ed_p != 0 && j--) {
- ed_t *ed = (ed_t *)m32_swap(ed_p);
- printf (" ed: %4x;", ed->hwINFO);
- ed_p = &ed->hwNextED;
- }
- printf ("\n");
- }
-}
-
-static void ohci_dump_intr_mask (char *label, __u32 mask)
-{
- dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
- label,
- mask,
- (mask & OHCI_INTR_MIE) ? " MIE" : "",
- (mask & OHCI_INTR_OC) ? " OC" : "",
- (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
- (mask & OHCI_INTR_FNO) ? " FNO" : "",
- (mask & OHCI_INTR_UE) ? " UE" : "",
- (mask & OHCI_INTR_RD) ? " RD" : "",
- (mask & OHCI_INTR_SF) ? " SF" : "",
- (mask & OHCI_INTR_WDH) ? " WDH" : "",
- (mask & OHCI_INTR_SO) ? " SO" : ""
- );
-}
-
-static void maybe_print_eds (char *label, __u32 value)
-{
- ed_t *edp = (ed_t *)value;
-
- if (value) {
- dbg ("%s %08x", label, value);
- dbg ("%08x", edp->hwINFO);
- dbg ("%08x", edp->hwTailP);
- dbg ("%08x", edp->hwHeadP);
- dbg ("%08x", edp->hwNextED);
- }
-}
-
-static char * hcfs2string (int state)
-{
- switch (state) {
- case OHCI_USB_RESET: return "reset";
- case OHCI_USB_RESUME: return "resume";
- case OHCI_USB_OPER: return "operational";
- case OHCI_USB_SUSPEND: return "suspend";
- }
- return "?";
-}
-
-/* dump control and status registers */
-static void ohci_dump_status (ohci_t *controller)
-{
- struct ohci_regs *regs = controller->regs;
- __u32 temp;
-
- temp = readl (®s->revision) & 0xff;
- if (temp != 0x10)
- dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
-
- temp = readl (®s->control);
- dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
- (temp & OHCI_CTRL_RWE) ? " RWE" : "",
- (temp & OHCI_CTRL_RWC) ? " RWC" : "",
- (temp & OHCI_CTRL_IR) ? " IR" : "",
- hcfs2string (temp & OHCI_CTRL_HCFS),
- (temp & OHCI_CTRL_BLE) ? " BLE" : "",
- (temp & OHCI_CTRL_CLE) ? " CLE" : "",
- (temp & OHCI_CTRL_IE) ? " IE" : "",
- (temp & OHCI_CTRL_PLE) ? " PLE" : "",
- temp & OHCI_CTRL_CBSR
- );
-
- temp = readl (®s->cmdstatus);
- dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
- (temp & OHCI_SOC) >> 16,
- (temp & OHCI_OCR) ? " OCR" : "",
- (temp & OHCI_BLF) ? " BLF" : "",
- (temp & OHCI_CLF) ? " CLF" : "",
- (temp & OHCI_HCR) ? " HCR" : ""
- );
-
- ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
- ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
-
- maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
-
- maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
- maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
-
- maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
- maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
-
- maybe_print_eds ("donehead", readl (®s->donehead));
-}
-
-static void ohci_dump_roothub (ohci_t *controller, int verbose)
-{
- __u32 temp, ndp, i;
-
- temp = roothub_a (controller);
- ndp = (temp & RH_A_NDP);
-#ifdef CONFIG_AT91C_PQFP_UHPBUG
- ndp = (ndp == 2) ? 1:0;
-#endif
- if (verbose) {
- dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
- ((temp & RH_A_POTPGT) >> 24) & 0xff,
- (temp & RH_A_NOCP) ? " NOCP" : "",
- (temp & RH_A_OCPM) ? " OCPM" : "",
- (temp & RH_A_DT) ? " DT" : "",
- (temp & RH_A_NPS) ? " NPS" : "",
- (temp & RH_A_PSM) ? " PSM" : "",
- ndp
- );
- temp = roothub_b (controller);
- dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
- temp,
- (temp & RH_B_PPCM) >> 16,
- (temp & RH_B_DR)
- );
- temp = roothub_status (controller);
- dbg ("roothub.status: %08x%s%s%s%s%s%s",
- temp,
- (temp & RH_HS_CRWE) ? " CRWE" : "",
- (temp & RH_HS_OCIC) ? " OCIC" : "",
- (temp & RH_HS_LPSC) ? " LPSC" : "",
- (temp & RH_HS_DRWE) ? " DRWE" : "",
- (temp & RH_HS_OCI) ? " OCI" : "",
- (temp & RH_HS_LPS) ? " LPS" : ""
- );
- }
-
- for (i = 0; i < ndp; i++) {
- temp = roothub_portstatus (controller, i);
- dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
- i,
- temp,
- (temp & RH_PS_PRSC) ? " PRSC" : "",
- (temp & RH_PS_OCIC) ? " OCIC" : "",
- (temp & RH_PS_PSSC) ? " PSSC" : "",
- (temp & RH_PS_PESC) ? " PESC" : "",
- (temp & RH_PS_CSC) ? " CSC" : "",
-
- (temp & RH_PS_LSDA) ? " LSDA" : "",
- (temp & RH_PS_PPS) ? " PPS" : "",
- (temp & RH_PS_PRS) ? " PRS" : "",
- (temp & RH_PS_POCI) ? " POCI" : "",
- (temp & RH_PS_PSS) ? " PSS" : "",
-
- (temp & RH_PS_PES) ? " PES" : "",
- (temp & RH_PS_CCS) ? " CCS" : ""
- );
- }
-}
-
-static void ohci_dump (ohci_t *controller, int verbose)
-{
- dbg ("OHCI controller usb-%s state", controller->slot_name);
-
- /* dumps some of the state we know about */
- ohci_dump_status (controller);
- if (verbose)
- ep_print_int_eds (controller, "hcca");
- dbg ("hcca frame #%04x", controller->hcca->frame_no);
- ohci_dump_roothub (controller, 1);
-}
-
-
-#endif /* DEBUG */
-
-/*-------------------------------------------------------------------------*
- * Interface functions (URB)
- *-------------------------------------------------------------------------*/
-
-/* get a transfer request */
-
-int sohci_submit_job(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup, int interval)
-{
- ohci_t *ohci;
- ed_t * ed;
- urb_priv_t *purb_priv;
- int i, size = 0;
-
- ohci = &gohci;
-
- /* when controller's hung, permit only roothub cleanup attempts
- * such as powering down ports */
- if (ohci->disabled) {
- err("sohci_submit_job: EPIPE");
- return -1;
- }
-
- /* every endpoint has a ed, locate and fill it */
- if (!(ed = ep_add_ed (dev, pipe))) {
- err("sohci_submit_job: ENOMEM");
- return -1;
- }
-
- /* for the private part of the URB we need the number of TDs (size) */
- switch (usb_pipetype (pipe)) {
- case PIPE_BULK: /* one TD for every 4096 Byte */
- size = (transfer_len - 1) / 4096 + 1;
- break;
- case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
- size = (transfer_len == 0)? 2:
- (transfer_len - 1) / 4096 + 3;
- break;
- }
-
- if (size >= (N_URB_TD - 1)) {
- err("need %d TDs, only have %d", size, N_URB_TD);
- return -1;
- }
- purb_priv = &urb_priv;
- purb_priv->pipe = pipe;
-
- /* fill the private part of the URB */
- purb_priv->length = size;
- purb_priv->ed = ed;
- purb_priv->actual_length = 0;
-
- /* allocate the TDs */
- /* note that td[0] was allocated in ep_add_ed */
- for (i = 0; i < size; i++) {
- purb_priv->td[i] = td_alloc (dev);
- if (!purb_priv->td[i]) {
- purb_priv->length = i;
- urb_free_priv (purb_priv);
- err("sohci_submit_job: ENOMEM");
- return -1;
- }
- }
-
- if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
- urb_free_priv (purb_priv);
- err("sohci_submit_job: EINVAL");
- return -1;
- }
-
- /* link the ed into a chain if is not already */
- if (ed->state != ED_OPER)
- ep_link (ohci, ed);
-
- /* fill the TDs and link it to the ed */
- td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
-
- return 0;
-}
-
-/*-------------------------------------------------------------------------*/
-
-#ifdef DEBUG
-/* tell us the current USB frame number */
-
-static int sohci_get_current_frame_number (struct usb_device *usb_dev)
-{
- ohci_t *ohci = &gohci;
-
- return m16_swap (ohci->hcca->frame_no);
-}
-#endif
-
-/*-------------------------------------------------------------------------*
- * ED handling functions
- *-------------------------------------------------------------------------*/
-
-/* link an ed into one of the HC chains */
-
-static int ep_link (ohci_t *ohci, ed_t *edi)
-{
- volatile ed_t *ed = edi;
-
- ed->state = ED_OPER;
-
- switch (ed->type) {
- case PIPE_CONTROL:
- ed->hwNextED = 0;
- if (ohci->ed_controltail == NULL) {
- writel (ed, &ohci->regs->ed_controlhead);
- } else {
- ohci->ed_controltail->hwNextED = m32_swap (ed);
- }
- ed->ed_prev = ohci->ed_controltail;
- if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
- !ohci->ed_rm_list[1] && !ohci->sleeping) {
- ohci->hc_control |= OHCI_CTRL_CLE;
- writel (ohci->hc_control, &ohci->regs->control);
- }
- ohci->ed_controltail = edi;
- break;
-
- case PIPE_BULK:
- ed->hwNextED = 0;
- if (ohci->ed_bulktail == NULL) {
- writel (ed, &ohci->regs->ed_bulkhead);
- } else {
- ohci->ed_bulktail->hwNextED = m32_swap (ed);
- }
- ed->ed_prev = ohci->ed_bulktail;
- if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
- !ohci->ed_rm_list[1] && !ohci->sleeping) {
- ohci->hc_control |= OHCI_CTRL_BLE;
- writel (ohci->hc_control, &ohci->regs->control);
- }
- ohci->ed_bulktail = edi;
- break;
- }
- return 0;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* unlink an ed from one of the HC chains.
- * just the link to the ed is unlinked.
- * the link from the ed still points to another operational ed or 0
- * so the HC can eventually finish the processing of the unlinked ed */
-
-static int ep_unlink (ohci_t *ohci, ed_t *ed)
-{
- ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
-
- switch (ed->type) {
- case PIPE_CONTROL:
- if (ed->ed_prev == NULL) {
- if (!ed->hwNextED) {
- ohci->hc_control &= ~OHCI_CTRL_CLE;
- writel (ohci->hc_control, &ohci->regs->control);
- }
- writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
- } else {
- ed->ed_prev->hwNextED = ed->hwNextED;
- }
- if (ohci->ed_controltail == ed) {
- ohci->ed_controltail = ed->ed_prev;
- } else {
- ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
- }
- break;
-
- case PIPE_BULK:
- if (ed->ed_prev == NULL) {
- if (!ed->hwNextED) {
- ohci->hc_control &= ~OHCI_CTRL_BLE;
- writel (ohci->hc_control, &ohci->regs->control);
- }
- writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
- } else {
- ed->ed_prev->hwNextED = ed->hwNextED;
- }
- if (ohci->ed_bulktail == ed) {
- ohci->ed_bulktail = ed->ed_prev;
- } else {
- ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
- }
- break;
- }
- ed->state = ED_UNLINK;
- return 0;
-}
-
-
-/*-------------------------------------------------------------------------*/
-
-/* add/reinit an endpoint; this should be done once at the usb_set_configuration command,
- * but the USB stack is a little bit stateless so we do it at every transaction
- * if the state of the ed is ED_NEW then a dummy td is added and the state is changed to ED_UNLINK
- * in all other cases the state is left unchanged
- * the ed info fields are setted anyway even though most of them should not change */
-
-static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe)
-{
- td_t *td;
- ed_t *ed_ret;
- volatile ed_t *ed;
-
- ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
- (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
-
- if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
- err("ep_add_ed: pending delete");
- /* pending delete request */
- return NULL;
- }
-
- if (ed->state == ED_NEW) {
- ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
- /* dummy td; end of td list for ed */
- td = td_alloc (usb_dev);
- ed->hwTailP = m32_swap (td);
- ed->hwHeadP = ed->hwTailP;
- ed->state = ED_UNLINK;
- ed->type = usb_pipetype (pipe);
- ohci_dev.ed_cnt++;
- }
-
- ed->hwINFO = m32_swap (usb_pipedevice (pipe)
- | usb_pipeendpoint (pipe) << 7
- | (usb_pipeisoc (pipe)? 0x8000: 0)
- | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
- | usb_pipeslow (pipe) << 13
- | usb_maxpacket (usb_dev, pipe) << 16);
-
- return ed_ret;
-}
-
-/*-------------------------------------------------------------------------*
- * TD handling functions
- *-------------------------------------------------------------------------*/
-
-/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
-
-static void td_fill (ohci_t *ohci, unsigned int info,
- void *data, int len,
- struct usb_device *dev, int index, urb_priv_t *urb_priv)
-{
- volatile td_t *td, *td_pt;
-#ifdef OHCI_FILL_TRACE
- int i;
-#endif
-
- if (index > urb_priv->length) {
- err("index > length");
- return;
- }
- /* use this td as the next dummy */
- td_pt = urb_priv->td [index];
- td_pt->hwNextTD = 0;
-
- /* fill the old dummy TD */
- td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
-
- td->ed = urb_priv->ed;
- td->next_dl_td = NULL;
- td->index = index;
- td->data = (__u32)data;
-#ifdef OHCI_FILL_TRACE
- if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
- for (i = 0; i < len; i++)
- printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
- printf("\n");
- }
-#endif
- if (!len)
- data = 0;
-
- td->hwINFO = m32_swap (info);
- td->hwCBP = m32_swap (data);
- if (data)
- td->hwBE = m32_swap (data + len - 1);
- else
- td->hwBE = 0;
- td->hwNextTD = m32_swap (td_pt);
- td->hwPSW [0] = m16_swap (((__u32)data & 0x0FFF) | 0xE000);
-
- /* append to queue */
- td->ed->hwTailP = td->hwNextTD;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* prepare all TDs of a transfer */
-
-static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
-{
- ohci_t *ohci = &gohci;
- int data_len = transfer_len;
- void *data;
- int cnt = 0;
- __u32 info = 0;
- unsigned int toggle = 0;
-
- /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
- if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
- toggle = TD_T_TOGGLE;
- } else {
- toggle = TD_T_DATA0;
- usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
- }
- urb->td_cnt = 0;
- if (data_len)
- data = buffer;
- else
- data = 0;
-
- switch (usb_pipetype (pipe)) {
- case PIPE_BULK:
- info = usb_pipeout (pipe)?
- TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
- while(data_len > 4096) {
- td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
- data += 4096; data_len -= 4096; cnt++;
- }
- info = usb_pipeout (pipe)?
- TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
- td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
- cnt++;
-
- if (!ohci->sleeping)
- writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
- break;
-
- case PIPE_CONTROL:
- info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
- td_fill (ohci, info, setup, 8, dev, cnt++, urb);
- if (data_len > 0) {
- info = usb_pipeout (pipe)?
- TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
- /* NOTE: mishandles transfers >8K, some >4K */
- td_fill (ohci, info, data, data_len, dev, cnt++, urb);
- }
- info = usb_pipeout (pipe)?
- TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
- td_fill (ohci, info, data, 0, dev, cnt++, urb);
- if (!ohci->sleeping)
- writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
- break;
- }
- if (urb->length != cnt)
- dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
-}
-
-/*-------------------------------------------------------------------------*
- * Done List handling functions
- *-------------------------------------------------------------------------*/
-
-
-/* calculate the transfer length and update the urb */
-
-static void dl_transfer_length(td_t * td)
-{
- __u32 tdINFO, tdBE, tdCBP;
- urb_priv_t *lurb_priv = &urb_priv;
-
- tdINFO = m32_swap (td->hwINFO);
- tdBE = m32_swap (td->hwBE);
- tdCBP = m32_swap (td->hwCBP);
-
-
- if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
- ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
- if (tdBE != 0) {
- if (td->hwCBP == 0)
- lurb_priv->actual_length += tdBE - td->data + 1;
- else
- lurb_priv->actual_length += tdCBP - td->data;
- }
- }
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* replies to the request have to be on a FIFO basis so
- * we reverse the reversed done-list */
-
-static td_t * dl_reverse_done_list (ohci_t *ohci)
-{
- __u32 td_list_hc;
- td_t *td_rev = NULL;
- td_t *td_list = NULL;
- urb_priv_t *lurb_priv = NULL;
-
- td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
- ohci->hcca->done_head = 0;
-
- while (td_list_hc) {
- td_list = (td_t *)td_list_hc;
-
- if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
- lurb_priv = &urb_priv;
- dbg(" USB-error/status: %x : %p",
- TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
- if (td_list->ed->hwHeadP & m32_swap (0x1)) {
- if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
- td_list->ed->hwHeadP =
- (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
- (td_list->ed->hwHeadP & m32_swap (0x2));
- lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
- } else
- td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
- }
- }
-
- td_list->next_dl_td = td_rev;
- td_rev = td_list;
- td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
- }
- return td_list;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* td done list */
-static int dl_done_list (ohci_t *ohci, td_t *td_list)
-{
- td_t *td_list_next = NULL;
- ed_t *ed;
- int cc = 0;
- int stat = 0;
- /* urb_t *urb; */
- urb_priv_t *lurb_priv;
- __u32 tdINFO, edHeadP, edTailP;
-
- while (td_list) {
- td_list_next = td_list->next_dl_td;
-
- lurb_priv = &urb_priv;
- tdINFO = m32_swap (td_list->hwINFO);
-
- ed = td_list->ed;
-
- dl_transfer_length(td_list);
-
- /* error code of transfer */
- cc = TD_CC_GET (tdINFO);
- if (cc != 0) {
- dbg("ConditionCode %#x", cc);
- stat = cc_to_error[cc];
- }
-
- if (ed->state != ED_NEW) {
- edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
- edTailP = m32_swap (ed->hwTailP);
-
- /* unlink eds if they are not busy */
- if ((edHeadP == edTailP) && (ed->state == ED_OPER))
- ep_unlink (ohci, ed);
- }
-
- td_list = td_list_next;
- }
- return stat;
-}
-
-/*-------------------------------------------------------------------------*
- * Virtual Root Hub
- *-------------------------------------------------------------------------*/
-
-/* Device descriptor */
-static __u8 root_hub_dev_des[] =
-{
- 0x12, /* __u8 bLength; */
- 0x01, /* __u8 bDescriptorType; Device */
- 0x10, /* __u16 bcdUSB; v1.1 */
- 0x01,
- 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
- 0x00, /* __u8 bDeviceSubClass; */
- 0x00, /* __u8 bDeviceProtocol; */
- 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
- 0x00, /* __u16 idVendor; */
- 0x00,
- 0x00, /* __u16 idProduct; */
- 0x00,
- 0x00, /* __u16 bcdDevice; */
- 0x00,
- 0x00, /* __u8 iManufacturer; */
- 0x01, /* __u8 iProduct; */
- 0x00, /* __u8 iSerialNumber; */
- 0x01 /* __u8 bNumConfigurations; */
-};
-
-
-/* Configuration descriptor */
-static __u8 root_hub_config_des[] =
-{
- 0x09, /* __u8 bLength; */
- 0x02, /* __u8 bDescriptorType; Configuration */
- 0x19, /* __u16 wTotalLength; */
- 0x00,
- 0x01, /* __u8 bNumInterfaces; */
- 0x01, /* __u8 bConfigurationValue; */
- 0x00, /* __u8 iConfiguration; */
- 0x40, /* __u8 bmAttributes;
- Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
- 0x00, /* __u8 MaxPower; */
-
- /* interface */
- 0x09, /* __u8 if_bLength; */
- 0x04, /* __u8 if_bDescriptorType; Interface */
- 0x00, /* __u8 if_bInterfaceNumber; */
- 0x00, /* __u8 if_bAlternateSetting; */
- 0x01, /* __u8 if_bNumEndpoints; */
- 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
- 0x00, /* __u8 if_bInterfaceSubClass; */
- 0x00, /* __u8 if_bInterfaceProtocol; */
- 0x00, /* __u8 if_iInterface; */
-
- /* endpoint */
- 0x07, /* __u8 ep_bLength; */
- 0x05, /* __u8 ep_bDescriptorType; Endpoint */
- 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
- 0x03, /* __u8 ep_bmAttributes; Interrupt */
- 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
- 0x00,
- 0xff /* __u8 ep_bInterval; 255 ms */
-};
-
-static unsigned char root_hub_str_index0[] =
-{
- 0x04, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 0x09, /* __u8 lang ID */
- 0x04, /* __u8 lang ID */
-};
-
-static unsigned char root_hub_str_index1[] =
-{
- 28, /* __u8 bLength; */
- 0x03, /* __u8 bDescriptorType; String-descriptor */
- 'O', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'C', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'I', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'R', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'o', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 't', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- ' ', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'H', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'u', /* __u8 Unicode */
- 0, /* __u8 Unicode */
- 'b', /* __u8 Unicode */
- 0, /* __u8 Unicode */
-};
-
-/* Hub class-specific descriptor is constructed dynamically */
-
-
-/*-------------------------------------------------------------------------*/
-
-#define OK(x) len = (x); break
-#ifdef DEBUG
-#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
-#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
-#else
-#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
-#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
-#endif
-#define RD_RH_STAT roothub_status(&gohci)
-#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
-
-/* request to virtual root hub */
-
-int rh_check_port_status(ohci_t *controller)
-{
- __u32 temp, ndp, i;
- int res;
-
- res = -1;
- temp = roothub_a (controller);
- ndp = (temp & RH_A_NDP);
-#ifdef CONFIG_AT91C_PQFP_UHPBUG
- ndp = (ndp == 2) ? 1:0;
-#endif
-
- for (i = 0; i < ndp; i++) {
- temp = roothub_portstatus (controller, i);
- /* check for a device disconnect */
- if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
- (RH_PS_PESC | RH_PS_CSC)) &&
- ((temp & RH_PS_CCS) == 0)) {
- res = i;
- break;
- }
- }
- return res;
-}
-
-static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
- void *buffer, int transfer_len, struct devrequest *cmd)
-{
- void * data = buffer;
- int leni = transfer_len;
- int len = 0;
- int stat = 0;
- __u32 datab[4];
- __u8 *data_buf = (__u8 *)datab;
- __u16 bmRType_bReq;
- __u16 wValue;
- __u16 wIndex;
- __u16 wLength;
-
-#ifdef DEBUG
-urb_priv.actual_length = 0;
-pkt_print(dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
-#else
- wait_ms(1);
-#endif
- if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
- info("Root-Hub submit IRQ: NOT implemented");
- return 0;
- }
-
- bmRType_bReq = cmd->requesttype | (cmd->request << 8);
- wValue = m16_swap (cmd->value);
- wIndex = m16_swap (cmd->index);
- wLength = m16_swap (cmd->length);
-
- info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
- dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
-
- switch (bmRType_bReq) {
- /* Request Destination:
- without flags: Device,
- RH_INTERFACE: interface,
- RH_ENDPOINT: endpoint,
- RH_CLASS means HUB here,
- RH_OTHER | RH_CLASS almost ever means HUB_PORT here
- */
-
- case RH_GET_STATUS:
- *(__u16 *) data_buf = m16_swap (1); OK (2);
- case RH_GET_STATUS | RH_INTERFACE:
- *(__u16 *) data_buf = m16_swap (0); OK (2);
- case RH_GET_STATUS | RH_ENDPOINT:
- *(__u16 *) data_buf = m16_swap (0); OK (2);
- case RH_GET_STATUS | RH_CLASS:
- *(__u32 *) data_buf = m32_swap (
- RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
- OK (4);
- case RH_GET_STATUS | RH_OTHER | RH_CLASS:
- *(__u32 *) data_buf = m32_swap (RD_RH_PORTSTAT); OK (4);
-
- case RH_CLEAR_FEATURE | RH_ENDPOINT:
- switch (wValue) {
- case (RH_ENDPOINT_STALL): OK (0);
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_CLASS:
- switch (wValue) {
- case RH_C_HUB_LOCAL_POWER:
- OK(0);
- case (RH_C_HUB_OVER_CURRENT):
- WR_RH_STAT(RH_HS_OCIC); OK (0);
- }
- break;
-
- case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
- switch (wValue) {
- case (RH_PORT_ENABLE):
- WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
- case (RH_PORT_SUSPEND):
- WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
- case (RH_PORT_POWER):
- WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
- case (RH_C_PORT_CONNECTION):
- WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
- case (RH_C_PORT_ENABLE):
- WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
- case (RH_C_PORT_SUSPEND):
- WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
- case (RH_C_PORT_OVER_CURRENT):
- WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
- case (RH_C_PORT_RESET):
- WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
- }
- break;
-
- case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
- switch (wValue) {
- case (RH_PORT_SUSPEND):
- WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
- case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
- if (RD_RH_PORTSTAT & RH_PS_CCS)
- WR_RH_PORTSTAT (RH_PS_PRS);
- OK (0);
- case (RH_PORT_POWER):
- WR_RH_PORTSTAT (RH_PS_PPS ); OK (0);
- case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
- if (RD_RH_PORTSTAT & RH_PS_CCS)
- WR_RH_PORTSTAT (RH_PS_PES );
- OK (0);
- }
- break;
-
- case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
-
- case RH_GET_DESCRIPTOR:
- switch ((wValue & 0xff00) >> 8) {
- case (0x01): /* device descriptor */
- len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_dev_des),
- wLength));
- data_buf = root_hub_dev_des; OK(len);
- case (0x02): /* configuration descriptor */
- len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_config_des),
- wLength));
- data_buf = root_hub_config_des; OK(len);
- case (0x03): /* string descriptors */
- if(wValue==0x0300) {
- len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_str_index0),
- wLength));
- data_buf = root_hub_str_index0;
- OK(len);
- }
- if(wValue==0x0301) {
- len = min_t(unsigned int,
- leni,
- min_t(unsigned int,
- sizeof (root_hub_str_index1),
- wLength));
- data_buf = root_hub_str_index1;
- OK(len);
- }
- default:
- stat = USB_ST_STALLED;
- }
- break;
-
- case RH_GET_DESCRIPTOR | RH_CLASS:
- {
- __u32 temp = roothub_a (&gohci);
-
- data_buf [0] = 9; /* min length; */
- data_buf [1] = 0x29;
- data_buf [2] = temp & RH_A_NDP;
-#ifdef CONFIG_AT91C_PQFP_UHPBUG
- data_buf [2] = (data_buf [2] == 2) ? 1:0;
-#endif
- data_buf [3] = 0;
- if (temp & RH_A_PSM) /* per-port power switching? */
- data_buf [3] |= 0x1;
- if (temp & RH_A_NOCP) /* no overcurrent reporting? */
- data_buf [3] |= 0x10;
- else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
- data_buf [3] |= 0x8;
-
- /* corresponds to data_buf[4-7] */
- datab [1] = 0;
- data_buf [5] = (temp & RH_A_POTPGT) >> 24;
- temp = roothub_b (&gohci);
- data_buf [7] = temp & RH_B_DR;
- if (data_buf [2] < 7) {
- data_buf [8] = 0xff;
- } else {
- data_buf [0] += 2;
- data_buf [8] = (temp & RH_B_DR) >> 8;
- data_buf [10] = data_buf [9] = 0xff;
- }
-
- len = min_t(unsigned int, leni,
- min_t(unsigned int, data_buf [0], wLength));
- OK (len);
- }
-
- case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
-
- case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
-
- default:
- dbg ("unsupported root hub command");
- stat = USB_ST_STALLED;
- }
-
-#ifdef DEBUG
- ohci_dump_roothub (&gohci, 1);
-#else
- wait_ms(1);
-#endif
-
- len = min_t(int, len, leni);
- if (data != data_buf)
- memcpy (data, data_buf, len);
- dev->act_len = len;
- dev->status = stat;
-
-#ifdef DEBUG
- if (transfer_len)
- urb_priv.actual_length = transfer_len;
- pkt_print(dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
-#else
- wait_ms(1);
-#endif
-
- return stat;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* common code for handling submit messages - used for all but root hub */
-/* accesses. */
-int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup, int interval)
-{
- int stat = 0;
- int maxsize = usb_maxpacket(dev, pipe);
- int timeout;
-
- /* device pulled? Shortcut the action. */
- if (devgone == dev) {
- dev->status = USB_ST_CRC_ERR;
- return 0;
- }
-
-#ifdef DEBUG
- urb_priv.actual_length = 0;
- pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
-#else
- wait_ms(1);
-#endif
- if (!maxsize) {
- err("submit_common_message: pipesize for pipe %lx is zero",
- pipe);
- return -1;
- }
-
- if (sohci_submit_job(dev, pipe, buffer, transfer_len, setup, interval) < 0) {
- err("sohci_submit_job failed");
- return -1;
- }
-
- wait_ms(10);
- /* ohci_dump_status(&gohci); */
-
- /* allow more time for a BULK device to react - some are slow */
-#define BULK_TO 5000 /* timeout in milliseconds */
- if (usb_pipetype (pipe) == PIPE_BULK)
- timeout = BULK_TO;
- else
- timeout = 100;
-
- /* wait for it to complete */
- for (;;) {
- /* check whether the controller is done */
- stat = hc_interrupt();
- if (stat < 0) {
- stat = USB_ST_CRC_ERR;
- break;
- }
- if (stat >= 0 && stat != 0xff) {
- /* 0xff is returned for an SF-interrupt */
- break;
- }
- if (--timeout) {
- wait_ms(1);
- } else {
- err("CTL:TIMEOUT ");
- stat = USB_ST_CRC_ERR;
- break;
- }
- }
- /* we got an Root Hub Status Change interrupt */
- if (got_rhsc) {
-#ifdef DEBUG
- ohci_dump_roothub (&gohci, 1);
-#endif
- got_rhsc = 0;
- /* abuse timeout */
- timeout = rh_check_port_status(&gohci);
- if (timeout >= 0) {
-#if 0 /* this does nothing useful, but leave it here in case that changes */
- /* the called routine adds 1 to the passed value */
- usb_hub_port_connect_change(gohci.rh.dev, timeout - 1);
-#endif
- /*
- * XXX
- * This is potentially dangerous because it assumes
- * that only one device is ever plugged in!
- */
- devgone = dev;
- }
- }
-
- dev->status = stat;
- dev->act_len = transfer_len;
-
-#ifdef DEBUG
- pkt_print(dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
-#else
- wait_ms(1);
-#endif
-
- /* free TDs in urb_priv */
- urb_free_priv (&urb_priv);
- return 0;
-}
-
-/* submit routines called from usb.c */
-int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len)
-{
- info("submit_bulk_msg");
- return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
-}
-
-int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, struct devrequest *setup)
-{
- int maxsize = usb_maxpacket(dev, pipe);
-
- info("submit_control_msg");
-#ifdef DEBUG
- urb_priv.actual_length = 0;
- pkt_print(dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
-#else
- wait_ms(1);
-#endif
- if (!maxsize) {
- err("submit_control_message: pipesize for pipe %lx is zero",
- pipe);
- return -1;
- }
- if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
- gohci.rh.dev = dev;
- /* root hub - redirect */
- return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
- setup);
- }
-
- return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
-}
-
-int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
- int transfer_len, int interval)
-{
- info("submit_int_msg");
- return -1;
-}
-
-/*-------------------------------------------------------------------------*
- * HC functions
- *-------------------------------------------------------------------------*/
-
-/* reset the HC and BUS */
-
-static int hc_reset (ohci_t *ohci)
-{
- int timeout = 30;
- int smm_timeout = 50; /* 0,5 sec */
-
- dbg("%s\n", __FUNCTION__);
-
- if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
- writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
- info("USB HC TakeOver from SMM");
- while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
- wait_ms (10);
- if (--smm_timeout == 0) {
- err("USB HC TakeOver failed!");
- return -1;
- }
- }
- }
-
- /* Disable HC interrupts */
- writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
-
- dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
- ohci->slot_name,
- readl(&ohci->regs->control));
-
- /* Reset USB (needed by some controllers) */
- writel (0, &ohci->regs->control);
-
- /* HC Reset requires max 10 us delay */
- writel (OHCI_HCR, &ohci->regs->cmdstatus);
- while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
- if (--timeout == 0) {
- err("USB HC reset timed out!");
- return -1;
- }
- udelay (1);
- }
- return 0;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* Start an OHCI controller, set the BUS operational
- * enable interrupts
- * connect the virtual root hub */
-
-static int hc_start (ohci_t * ohci)
-{
- __u32 mask;
- unsigned int fminterval;
-
- ohci->disabled = 1;
-
- /* Tell the controller where the control and bulk lists are
- * The lists are empty now. */
-
- writel (0, &ohci->regs->ed_controlhead);
- writel (0, &ohci->regs->ed_bulkhead);
-
- writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
-
- fminterval = 0x2edf;
- writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
- fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
- writel (fminterval, &ohci->regs->fminterval);
- writel (0x628, &ohci->regs->lsthresh);
-
- /* start controller operations */
- ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
- ohci->disabled = 0;
- writel (ohci->hc_control, &ohci->regs->control);
-
- /* disable all interrupts */
- mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
- OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
- OHCI_INTR_OC | OHCI_INTR_MIE);
- writel (mask, &ohci->regs->intrdisable);
- /* clear all interrupts */
- mask &= ~OHCI_INTR_MIE;
- writel (mask, &ohci->regs->intrstatus);
- /* Choose the interrupts we care about now - but w/o MIE */
- mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
- writel (mask, &ohci->regs->intrenable);
-
-#ifdef OHCI_USE_NPS
- /* required for AMD-756 and some Mac platforms */
- writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
- &ohci->regs->roothub.a);
- writel (RH_HS_LPSC, &ohci->regs->roothub.status);
-#endif /* OHCI_USE_NPS */
-
-#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
- /* POTPGT delay is bits 24-31, in 2 ms units. */
- mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
-
- /* connect the virtual root hub */
- ohci->rh.devnum = 0;
-
- return 0;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/* an interrupt happens */
-
-static int
-hc_interrupt (void)
-{
- ohci_t *ohci = &gohci;
- struct ohci_regs *regs = ohci->regs;
- int ints;
- int stat = -1;
-
- if ((ohci->hcca->done_head != 0) && !(m32_swap (ohci->hcca->done_head) & 0x01)) {
- ints = OHCI_INTR_WDH;
- } else {
- ints = readl (®s->intrstatus);
- }
-
- /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
-
- if (ints & OHCI_INTR_RHSC) {
- got_rhsc = 1;
- }
-
- if (ints & OHCI_INTR_UE) {
- ohci->disabled++;
- err ("OHCI Unrecoverable Error, controller usb-%s disabled",
- ohci->slot_name);
- /* e.g. due to PCI Master/Target Abort */
-
-#ifdef DEBUG
- ohci_dump (ohci, 1);
-#else
- wait_ms(1);
-#endif
- /* FIXME: be optimistic, hope that bug won't repeat often. */
- /* Make some non-interrupt context restart the controller. */
- /* Count and limit the retries though; either hardware or */
- /* software errors can go forever... */
- hc_reset (ohci);
- return -1;
- }
-
- if (ints & OHCI_INTR_WDH) {
- wait_ms(1);
- writel (OHCI_INTR_WDH, ®s->intrdisable);
- stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
- writel (OHCI_INTR_WDH, ®s->intrenable);
- }
-
- if (ints & OHCI_INTR_SO) {
- dbg("USB Schedule overrun\n");
- writel (OHCI_INTR_SO, ®s->intrenable);
- stat = -1;
- }
-
- /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
- if (ints & OHCI_INTR_SF) {
- unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
- wait_ms(1);
- writel (OHCI_INTR_SF, ®s->intrdisable);
- if (ohci->ed_rm_list[frame] != NULL)
- writel (OHCI_INTR_SF, ®s->intrenable);
- stat = 0xff;
- }
-
- writel (ints, ®s->intrstatus);
- return stat;
-}
-
-/*-------------------------------------------------------------------------*/
-
-/*-------------------------------------------------------------------------*/
-
-/* De-allocate all resources.. */
-
-static void hc_release_ohci (ohci_t *ohci)
-{
- dbg ("USB HC release ohci usb-%s", ohci->slot_name);
-
- if (!ohci->disabled)
- hc_reset (ohci);
-}
-
-/*-------------------------------------------------------------------------*/
-
-/*
- * low level initalisation routine, called from usb.c
- */
-static char ohci_inited = 0;
-
-int usb_lowlevel_init(void)
-{
- /*
- * Enable USB host clock.
- */
- *AT91C_PMC_SCER = AT91C_PMC_UHP; /* 48MHz clock enabled for UHP */
- *AT91C_PMC_PCER = 1 << AT91C_ID_UHP; /* Peripheral Clock Enable Register */
-
- memset (&gohci, 0, sizeof (ohci_t));
- memset (&urb_priv, 0, sizeof (urb_priv_t));
-
- /* align the storage */
- if ((__u32)&ghcca[0] & 0xff) {
- err("HCCA not aligned!!");
- return -1;
- }
- phcca = &ghcca[0];
- info("aligned ghcca %p", phcca);
- memset(&ohci_dev, 0, sizeof(struct ohci_device));
- if ((__u32)&ohci_dev.ed[0] & 0x7) {
- err("EDs not aligned!!");
- return -1;
- }
- memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
- if ((__u32)gtd & 0x7) {
- err("TDs not aligned!!");
- return -1;
- }
- ptd = gtd;
- gohci.hcca = phcca;
- memset (phcca, 0, sizeof (struct ohci_hcca));
-
- gohci.disabled = 1;
- gohci.sleeping = 0;
- gohci.irq = -1;
- gohci.regs = (struct ohci_regs *)AT91_USB_HOST_BASE;
-
- gohci.flags = 0;
- gohci.slot_name = "at91rm9200";
-
- if (hc_reset (&gohci) < 0) {
- hc_release_ohci (&gohci);
- /* Initialization failed */
- *AT91C_PMC_PCER = AT91C_ID_UHP;
- *AT91C_PMC_SCDR = 1 << AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
- return -1;
- }
-
- /* FIXME this is a second HC reset; why?? */
-/* writel (gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
- wait_ms (10);*/
-
- if (hc_start (&gohci) < 0) {
- err ("can't start usb-%s", gohci.slot_name);
- hc_release_ohci (&gohci);
- /* Initialization failed */
- *AT91C_PMC_PCER = AT91C_ID_UHP;
- *AT91C_PMC_SCDR = 1 << AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
- return -1;
- }
-
-#ifdef DEBUG
- ohci_dump (&gohci, 1);
-#else
- wait_ms(1);
-#endif
- ohci_inited = 1;
- return 0;
-}
-
-int usb_lowlevel_stop(void)
-{
- /* this gets called really early - before the controller has */
- /* even been initialized! */
- if (!ohci_inited)
- return 0;
- /* TODO release any interrupts, etc. */
- /* call hc_release_ohci() here ? */
- hc_reset (&gohci);
- /* may not want to do this */
- *AT91C_PMC_PCER = 1 << AT91C_ID_UHP;
- *AT91C_PMC_SCDR = 1 << AT91C_PMC_UHP; /* 48MHz clock disabled for UHP */
- return 0;
-}
-
-#endif /* CONFIG_USB_OHCI */
diff --git a/cpu/arm920t/at91rm9200/usb_ohci.h b/cpu/arm920t/at91rm9200/usb_ohci.h
deleted file mode 100644
index ecb4e93..0000000
--- a/cpu/arm920t/at91rm9200/usb_ohci.h
+++ /dev/null
@@ -1,419 +0,0 @@
-/*
- * URB OHCI HCD (Host Controller Driver) for USB.
- *
- * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
- * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
- *
- * usb-ohci.h
- */
-
-
-static int cc_to_error[16] = {
-
-/* mapping of the OHCI CC status to error codes */
- /* No Error */ 0,
- /* CRC Error */ USB_ST_CRC_ERR,
- /* Bit Stuff */ USB_ST_BIT_ERR,
- /* Data Togg */ USB_ST_CRC_ERR,
- /* Stall */ USB_ST_STALLED,
- /* DevNotResp */ -1,
- /* PIDCheck */ USB_ST_BIT_ERR,
- /* UnExpPID */ USB_ST_BIT_ERR,
- /* DataOver */ USB_ST_BUF_ERR,
- /* DataUnder */ USB_ST_BUF_ERR,
- /* reservd */ -1,
- /* reservd */ -1,
- /* BufferOver */ USB_ST_BUF_ERR,
- /* BuffUnder */ USB_ST_BUF_ERR,
- /* Not Access */ -1,
- /* Not Access */ -1
-};
-
-/* ED States */
-
-#define ED_NEW 0x00
-#define ED_UNLINK 0x01
-#define ED_OPER 0x02
-#define ED_DEL 0x04
-#define ED_URB_DEL 0x08
-
-/* usb_ohci_ed */
-struct ed {
- __u32 hwINFO;
- __u32 hwTailP;
- __u32 hwHeadP;
- __u32 hwNextED;
-
- struct ed *ed_prev;
- __u8 int_period;
- __u8 int_branch;
- __u8 int_load;
- __u8 int_interval;
- __u8 state;
- __u8 type;
- __u16 last_iso;
- struct ed *ed_rm_list;
-
- struct usb_device *usb_dev;
- __u32 unused[3];
-} __attribute((aligned(16)));
-typedef struct ed ed_t;
-
-
-/* TD info field */
-#define TD_CC 0xf0000000
-#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
-#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
-#define TD_EC 0x0C000000
-#define TD_T 0x03000000
-#define TD_T_DATA0 0x02000000
-#define TD_T_DATA1 0x03000000
-#define TD_T_TOGGLE 0x00000000
-#define TD_R 0x00040000
-#define TD_DI 0x00E00000
-#define TD_DI_SET(X) (((X) & 0x07)<< 21)
-#define TD_DP 0x00180000
-#define TD_DP_SETUP 0x00000000
-#define TD_DP_IN 0x00100000
-#define TD_DP_OUT 0x00080000
-
-#define TD_ISO 0x00010000
-#define TD_DEL 0x00020000
-
-/* CC Codes */
-#define TD_CC_NOERROR 0x00
-#define TD_CC_CRC 0x01
-#define TD_CC_BITSTUFFING 0x02
-#define TD_CC_DATATOGGLEM 0x03
-#define TD_CC_STALL 0x04
-#define TD_DEVNOTRESP 0x05
-#define TD_PIDCHECKFAIL 0x06
-#define TD_UNEXPECTEDPID 0x07
-#define TD_DATAOVERRUN 0x08
-#define TD_DATAUNDERRUN 0x09
-#define TD_BUFFEROVERRUN 0x0C
-#define TD_BUFFERUNDERRUN 0x0D
-#define TD_NOTACCESSED 0x0F
-
-
-#define MAXPSW 1
-
-struct td {
- __u32 hwINFO;
- __u32 hwCBP; /* Current Buffer Pointer */
- __u32 hwNextTD; /* Next TD Pointer */
- __u32 hwBE; /* Memory Buffer End Pointer */
-
- __u16 hwPSW[MAXPSW];
- __u8 unused;
- __u8 index;
- struct ed *ed;
- struct td *next_dl_td;
- struct usb_device *usb_dev;
- int transfer_len;
- __u32 data;
-
- __u32 unused2[2];
-} __attribute((aligned(32)));
-typedef struct td td_t;
-
-#define OHCI_ED_SKIP (1 << 14)
-
-/*
- * The HCCA (Host Controller Communications Area) is a 256 byte
- * structure defined in the OHCI spec. that the host controller is
- * told the base address of. It must be 256-byte aligned.
- */
-
-#define NUM_INTS 32 /* part of the OHCI standard */
-struct ohci_hcca {
- __u32 int_table[NUM_INTS]; /* Interrupt ED table */
- __u16 frame_no; /* current frame number */
- __u16 pad1; /* set to 0 on each frame_no change */
- __u32 done_head; /* info returned for an interrupt */
- u8 reserved_for_hc[116];
-} __attribute((aligned(256)));
-
-
-/*
- * Maximum number of root hub ports.
- */
-#define MAX_ROOT_PORTS 15 /* maximum OHCI root hub ports */
-
-/*
- * This is the structure of the OHCI controller's memory mapped I/O
- * region. This is Memory Mapped I/O. You must use the readl() and
- * writel() macros defined in asm/io.h to access these!!
- */
-struct ohci_regs {
- /* control and status registers */
- __u32 revision;
- __u32 control;
- __u32 cmdstatus;
- __u32 intrstatus;
- __u32 intrenable;
- __u32 intrdisable;
- /* memory pointers */
- __u32 hcca;
- __u32 ed_periodcurrent;
- __u32 ed_controlhead;
- __u32 ed_controlcurrent;
- __u32 ed_bulkhead;
- __u32 ed_bulkcurrent;
- __u32 donehead;
- /* frame counters */
- __u32 fminterval;
- __u32 fmremaining;
- __u32 fmnumber;
- __u32 periodicstart;
- __u32 lsthresh;
- /* Root hub ports */
- struct ohci_roothub_regs {
- __u32 a;
- __u32 b;
- __u32 status;
- __u32 portstatus[MAX_ROOT_PORTS];
- } roothub;
-} __attribute((aligned(32)));
-
-
-/* OHCI CONTROL AND STATUS REGISTER MASKS */
-
-/*
- * HcControl (control) register masks
- */
-#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */
-#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */
-#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */
-#define OHCI_CTRL_CLE (1 << 4) /* control list enable */
-#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */
-#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */
-#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
-#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
-#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */
-
-/* pre-shifted values for HCFS */
-# define OHCI_USB_RESET (0 << 6)
-# define OHCI_USB_RESUME (1 << 6)
-# define OHCI_USB_OPER (2 << 6)
-# define OHCI_USB_SUSPEND (3 << 6)
-
-/*
- * HcCommandStatus (cmdstatus) register masks
- */
-#define OHCI_HCR (1 << 0) /* host controller reset */
-#define OHCI_CLF (1 << 1) /* control list filled */
-#define OHCI_BLF (1 << 2) /* bulk list filled */
-#define OHCI_OCR (1 << 3) /* ownership change request */
-#define OHCI_SOC (3 << 16) /* scheduling overrun count */
-
-/*
- * masks used with interrupt registers:
- * HcInterruptStatus (intrstatus)
- * HcInterruptEnable (intrenable)
- * HcInterruptDisable (intrdisable)
- */
-#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */
-#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */
-#define OHCI_INTR_SF (1 << 2) /* start frame */
-#define OHCI_INTR_RD (1 << 3) /* resume detect */
-#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */
-#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */
-#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */
-#define OHCI_INTR_OC (1 << 30) /* ownership change */
-#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
-
-
-/* Virtual Root HUB */
-struct virt_root_hub {
- int devnum; /* Address of Root Hub endpoint */
- void *dev; /* was urb */
- void *int_addr;
- int send;
- int interval;
-};
-
-/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
-
-/* destination of request */
-#define RH_INTERFACE 0x01
-#define RH_ENDPOINT 0x02
-#define RH_OTHER 0x03
-
-#define RH_CLASS 0x20
-#define RH_VENDOR 0x40
-
-/* Requests: bRequest << 8 | bmRequestType */
-#define RH_GET_STATUS 0x0080
-#define RH_CLEAR_FEATURE 0x0100
-#define RH_SET_FEATURE 0x0300
-#define RH_SET_ADDRESS 0x0500
-#define RH_GET_DESCRIPTOR 0x0680
-#define RH_SET_DESCRIPTOR 0x0700
-#define RH_GET_CONFIGURATION 0x0880
-#define RH_SET_CONFIGURATION 0x0900
-#define RH_GET_STATE 0x0280
-#define RH_GET_INTERFACE 0x0A80
-#define RH_SET_INTERFACE 0x0B00
-#define RH_SYNC_FRAME 0x0C80
-/* Our Vendor Specific Request */
-#define RH_SET_EP 0x2000
-
-
-/* Hub port features */
-#define RH_PORT_CONNECTION 0x00
-#define RH_PORT_ENABLE 0x01
-#define RH_PORT_SUSPEND 0x02
-#define RH_PORT_OVER_CURRENT 0x03
-#define RH_PORT_RESET 0x04
-#define RH_PORT_POWER 0x08
-#define RH_PORT_LOW_SPEED 0x09
-
-#define RH_C_PORT_CONNECTION 0x10
-#define RH_C_PORT_ENABLE 0x11
-#define RH_C_PORT_SUSPEND 0x12
-#define RH_C_PORT_OVER_CURRENT 0x13
-#define RH_C_PORT_RESET 0x14
-
-/* Hub features */
-#define RH_C_HUB_LOCAL_POWER 0x00
-#define RH_C_HUB_OVER_CURRENT 0x01
-
-#define RH_DEVICE_REMOTE_WAKEUP 0x00
-#define RH_ENDPOINT_STALL 0x01
-
-#define RH_ACK 0x01
-#define RH_REQ_ERR -1
-#define RH_NACK 0x00
-
-
-/* OHCI ROOT HUB REGISTER MASKS */
-
-/* roothub.portstatus [i] bits */
-#define RH_PS_CCS 0x00000001 /* current connect status */
-#define RH_PS_PES 0x00000002 /* port enable status*/
-#define RH_PS_PSS 0x00000004 /* port suspend status */
-#define RH_PS_POCI 0x00000008 /* port over current indicator */
-#define RH_PS_PRS 0x00000010 /* port reset status */
-#define RH_PS_PPS 0x00000100 /* port power status */
-#define RH_PS_LSDA 0x00000200 /* low speed device attached */
-#define RH_PS_CSC 0x00010000 /* connect status change */
-#define RH_PS_PESC 0x00020000 /* port enable status change */
-#define RH_PS_PSSC 0x00040000 /* port suspend status change */
-#define RH_PS_OCIC 0x00080000 /* over current indicator change */
-#define RH_PS_PRSC 0x00100000 /* port reset status change */
-
-/* roothub.status bits */
-#define RH_HS_LPS 0x00000001 /* local power status */
-#define RH_HS_OCI 0x00000002 /* over current indicator */
-#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
-#define RH_HS_LPSC 0x00010000 /* local power status change */
-#define RH_HS_OCIC 0x00020000 /* over current indicator change */
-#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
-
-/* roothub.b masks */
-#define RH_B_DR 0x0000ffff /* device removable flags */
-#define RH_B_PPCM 0xffff0000 /* port power control mask */
-
-/* roothub.a masks */
-#define RH_A_NDP (0xff << 0) /* number of downstream ports */
-#define RH_A_PSM (1 << 8) /* power switching mode */
-#define RH_A_NPS (1 << 9) /* no power switching */
-#define RH_A_DT (1 << 10) /* device type (mbz) */
-#define RH_A_OCPM (1 << 11) /* over current protection mode */
-#define RH_A_NOCP (1 << 12) /* no over current protection */
-#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
-
-/* urb */
-#define N_URB_TD 48
-typedef struct
-{
- ed_t *ed;
- __u16 length; /* number of tds associated with this request */
- __u16 td_cnt; /* number of tds already serviced */
- int state;
- unsigned long pipe;
- int actual_length;
- td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
-} urb_priv_t;
-#define URB_DEL 1
-
-/*
- * This is the full ohci controller description
- *
- * Note how the "proper" USB information is just
- * a subset of what the full implementation needs. (Linus)
- */
-
-
-typedef struct ohci {
- struct ohci_hcca *hcca; /* hcca */
- /*dma_addr_t hcca_dma;*/
-
- int irq;
- int disabled; /* e.g. got a UE, we're hung */
- int sleeping;
- unsigned long flags; /* for HC bugs */
-
- struct ohci_regs *regs; /* OHCI controller's memory */
-
- ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
- ed_t *ed_bulktail; /* last endpoint of bulk list */
- ed_t *ed_controltail; /* last endpoint of control list */
- int intrstatus;
- __u32 hc_control; /* copy of the hc control reg */
- struct usb_device *dev[32];
- struct virt_root_hub rh;
-
- const char *slot_name;
-} ohci_t;
-
-#define NUM_EDS 8 /* num of preallocated endpoint descriptors */
-
-struct ohci_device {
- ed_t ed[NUM_EDS];
- int ed_cnt;
-};
-
-/* hcd */
-/* endpoint */
-static int ep_link(ohci_t * ohci, ed_t * ed);
-static int ep_unlink(ohci_t * ohci, ed_t * ed);
-static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned long pipe);
-
-/*-------------------------------------------------------------------------*/
-
-/* we need more TDs than EDs */
-#define NUM_TD 64
-
-/* +1 so we can align the storage */
-td_t gtd[NUM_TD+1];
-/* pointers to aligned storage */
-td_t *ptd;
-
-/* TDs ... */
-static inline struct td *
-td_alloc (struct usb_device *usb_dev)
-{
- int i;
- struct td *td;
-
- td = NULL;
- for (i = 0; i < NUM_TD; i++)
- {
- if (ptd[i].usb_dev == NULL)
- {
- td = &ptd[i];
- td->usb_dev = usb_dev;
- break;
- }
- }
-
- return td;
-}
-
-static inline void
-ed_free (struct ed *ed)
-{
- ed->usb_dev = NULL;
-}
diff --git a/cpu/arm920t/s3c24x0/Makefile b/cpu/arm920t/s3c24x0/Makefile
index 3a7c4b3..0ff36c5 100644
--- a/cpu/arm920t/s3c24x0/Makefile
+++ b/cpu/arm920t/s3c24x0/Makefile
@@ -26,7 +26,7 @@
LIB = $(obj)lib$(SOC).a
COBJS = i2c.o interrupts.o serial.o speed.o \
- usb_ohci.o
+ usb.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/arm920t/s3c24x0/usb.c b/cpu/arm920t/s3c24x0/usb.c
new file mode 100644
index 0000000..ef5d5bf
--- /dev/null
+++ b/cpu/arm920t/s3c24x0/usb.c
@@ -0,0 +1,72 @@
+/*
+ * (C) Copyright 2006
+ * DENX Software Engineering <mk@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+# if defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410)
+
+#if defined(CONFIG_S3C2400)
+# include <s3c2400.h>
+#elif defined(CONFIG_S3C2410)
+# include <s3c2410.h>
+#endif
+
+int usb_cpu_init (void)
+{
+
+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ S3C24X0_GPIO * const gpio = S3C24X0_GetBase_GPIO();
+
+ /*
+ * Set the 48 MHz UPLL clocking. Values are taken from
+ * "PLL value selection guide", 6-23, s3c2400_UM.pdf.
+ */
+ clk_power->UPLLCON = ((40 << 12) + (1 << 4) + 2);
+ gpio->MISCCR |= 0x8; /* 1 = use pads related USB for USB host */
+
+ /*
+ * Enable USB host clock.
+ */
+ clk_power->CLKCON |= (1 << 4);
+
+ return 0;
+}
+
+int usb_cpu_stop (void)
+{
+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ /* may not want to do this */
+ clk_power->CLKCON &= ~(1 << 4);
+ return 0;
+}
+
+int usb_cpu_init_fail (void)
+{
+ S3C24X0_CLOCK_POWER * const clk_power = S3C24X0_GetBase_CLOCK_POWER();
+ clk_power->CLKCON &= ~(1 << 4);
+ return 0;
+}
+
+# endif /* defined(CONFIG_S3C2400) || defined(CONFIG_S3C2410) */
+#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S
index 346f0d0..b9c364b 100644
--- a/cpu/arm920t/start.S
+++ b/cpu/arm920t/start.S
@@ -27,7 +27,9 @@
#include <config.h>
#include <version.h>
-
+#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+#include <led.h>
+#endif
/*
*************************************************************************
@@ -116,6 +118,69 @@
orr r0,r0,#0xd3
msr cpsr,r0
+#if CONFIG_AT91RM9200
+#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+ bl LED_init
+ bl red_LED_on
+#endif
+
+#ifdef CONFIG_BOOTBINFUNC
+/* code based on entry.S from ATMEL */
+#define AT91C_BASE_CKGR 0xFFFFFC20
+#define CKGR_MOR 0
+ /* Get the CKGR Base Address */
+ ldr r1, =AT91C_BASE_CKGR
+
+/* Main oscillator Enable register APMC_MOR : Enable main oscillator , OSCOUNT = 0xFF */
+/* ldr r0, = AT91C_CKGR_MOSCEN:OR:AT91C_CKGR_OSCOUNT */
+ ldr r0, =0x0000FF01
+ str r0, [r1, #CKGR_MOR]
+ /* Add loop to compensate Main Oscillator startup time */
+ ldr r0, =0x00000010
+LoopOsc:
+ subs r0, r0, #1
+ bhi LoopOsc
+ /* scratch stack */
+ ldr r1, =0x00204000
+ /* Insure word alignment */
+ bic r1, r1, #3
+ /* Init stack SYS */
+ mov sp, r1
+ /*
+ * This does a lot more than just set up the memory, which
+ * is why it's called lowlevelinit
+ */
+ bl lowlevelinit /* in memsetup.S */
+ bl icache_enable;
+ /* ------------------------------------
+ * Read/modify/write CP15 control register
+ * -------------------------------------
+ * read cp15 control register (cp15 r1) in r0
+ * ------------------------------------
+ */
+ mrc p15, 0, r0, c1, c0, 0
+ /* Reset bit :Little Endian end fast bus mode */
+ ldr r3, =0xC0000080
+ /* Set bit :Asynchronous clock mode, Not Fast Bus */
+ ldr r4, =0xC0000000
+ bic r0, r0, r3
+ orr r0, r0, r4
+ /* write r0 in cp15 control register (cp15 r1) */
+ mcr p15, 0, r0, c1, c0, 0
+#endif /* CONFIG_BOOTBINFUNC */
+ /*
+ * relocate exeception table
+ */
+ ldr r0, =_start
+ ldr r1, =0x0
+ mov r2, #16
+copyex:
+ subs r2, r2, #1
+ ldr r3, [r0], #4
+ str r3, [r1], #4
+ bne copyex
+#endif
+
/* turn off the watchdog */
#if defined(CONFIG_S3C2400)
# define pWTCON 0x15300000
@@ -160,6 +225,26 @@
bl cpu_init_crit
#endif
+#ifdef CONFIG_AT91RM9200
+#ifdef CONFIG_BOOTBINFUNC
+relocate: /* relocate U-Boot to RAM */
+ adr r0, _start /* r0 <- current position of code */
+ ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
+ cmp r0, r1 /* don't reloc during debug */
+ beq stack_setup
+
+ ldr r2, _armboot_start
+ ldr r3, _bss_start
+ sub r2, r3, r2 /* r2 <- size of armboot */
+ add r2, r0, r2 /* r2 <- source end address */
+
+copy_loop:
+ ldmia r0!, {r3-r10} /* copy from source address [r0] */
+ stmia r1!, {r3-r10} /* copy to target address [r1] */
+ cmp r0, r2 /* until source end addreee [r2] */
+ ble copy_loop
+#endif /* CONFIG_BOOTBINFUNC */
+#else
#ifndef CONFIG_SKIP_RELOCATE_UBOOT
relocate: /* relocate U-Boot to RAM */
adr r0, _start /* r0 <- current position of code */
@@ -178,7 +263,7 @@
cmp r0, r2 /* until source end addreee [r2] */
ble copy_loop
#endif /* CONFIG_SKIP_RELOCATE_UBOOT */
-
+#endif
/* Set up the stack */
stack_setup:
ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
@@ -262,7 +347,11 @@
* find a lowlevel_init.S in your board directory.
*/
mov ip, lr
+#if defined(CONFIG_AT91RM9200DK) || defined(CONFIG_AT91RM9200EK) || defined(CONFIG_AT91RM9200DF)
+
+#else
bl lowlevel_init
+#endif
mov lr, ip
mov pc, lr
#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
diff --git a/cpu/arm926ejs/davinci/Makefile b/cpu/arm926ejs/davinci/Makefile
new file mode 100644
index 0000000..0f77f40
--- /dev/null
+++ b/cpu/arm926ejs/davinci/Makefile
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2000-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(SOC).a
+
+COBJS = timer.o ether.o lxt972.o dp83848.o i2c.o nand.o
+SOBJS = lowlevel_init.o reset.o
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS) $(SOBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/arm926ejs/davinci/dp83848.c b/cpu/arm926ejs/davinci/dp83848.c
new file mode 100644
index 0000000..5719845
--- /dev/null
+++ b/cpu/arm926ejs/davinci/dp83848.c
@@ -0,0 +1,156 @@
+/*
+ * National Semiconductor DP83848 PHY Driver for TI DaVinci
+ * (TMS320DM644x) based boards.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * --------------------------------------------------------
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <net.h>
+#include <dp83848.h>
+#include <asm/arch/emac_defs.h>
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+
+#ifdef CONFIG_CMD_NET
+
+int dp83848_is_phy_connected(int phy_addr)
+{
+ u_int16_t id1, id2;
+
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_PHYID1_REG, &id1))
+ return(0);
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_PHYID2_REG, &id2))
+ return(0);
+
+ if ((id1 == DP83848_PHYID1_OUI) && (id2 == DP83848_PHYID2_OUI))
+ return(1);
+
+ return(0);
+}
+
+int dp83848_get_link_speed(int phy_addr)
+{
+ u_int16_t tmp;
+ volatile emac_regs* emac = (emac_regs *)EMAC_BASE_ADDR;
+
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp))
+ return(0);
+
+ if (!(tmp & DP83848_LINK_STATUS)) /* link up? */
+ return(0);
+
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_PHY_STAT_REG, &tmp))
+ return(0);
+
+ /* Speed doesn't matter, there is no setting for it in EMAC... */
+ if (tmp & DP83848_SPEED) {
+ if (tmp & DP83848_DUPLEX) {
+ /* set DM644x EMAC for Full Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+ } else {
+ /*set DM644x EMAC for Half Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
+ }
+
+ return(1);
+ } else {
+ if (tmp & DP83848_DUPLEX) {
+ /* set DM644x EMAC for Full Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+ } else {
+ /*set DM644x EMAC for Half Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
+ }
+
+ return(1);
+ }
+
+ return(0);
+}
+
+
+int dp83848_init_phy(int phy_addr)
+{
+ int ret = 1;
+
+ if (!dp83848_get_link_speed(phy_addr)) {
+ /* Try another time */
+ udelay(100000);
+ ret = dp83848_get_link_speed(phy_addr);
+ }
+
+ /* Disable PHY Interrupts */
+ dm644x_eth_phy_write(phy_addr, DP83848_PHY_INTR_CTRL_REG, 0);
+
+ return(ret);
+}
+
+
+int dp83848_auto_negotiate(int phy_addr)
+{
+ u_int16_t tmp;
+
+
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp))
+ return(0);
+
+ /* Restart Auto_negotiation */
+ tmp &= ~DP83848_AUTONEG; /* remove autonegotiation enable */
+ tmp |= DP83848_ISOLATE; /* Electrically isolate PHY */
+ dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
+
+ /* Set the Auto_negotiation Advertisement Register
+ * MII advertising for Next page, 100BaseTxFD and HD,
+ * 10BaseTFD and HD, IEEE 802.3
+ */
+ tmp = DP83848_NP | DP83848_TX_FDX | DP83848_TX_HDX |
+ DP83848_10_FDX | DP83848_10_HDX | DP83848_AN_IEEE_802_3;
+ dm644x_eth_phy_write(phy_addr, DP83848_ANA_REG, tmp);
+
+
+ /* Read Control Register */
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_CTL_REG, &tmp))
+ return(0);
+
+ tmp |= DP83848_SPEED_SELECT | DP83848_AUTONEG | DP83848_DUPLEX_MODE;
+ dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
+
+ /* Restart Auto_negotiation */
+ tmp |= DP83848_RESTART_AUTONEG;
+ dm644x_eth_phy_write(phy_addr, DP83848_CTL_REG, tmp);
+
+ /*check AutoNegotiate complete */
+ udelay(10000);
+ if (!dm644x_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp))
+ return(0);
+
+ if (!(tmp & DP83848_AUTONEG_COMP))
+ return(0);
+
+ return (dp83848_get_link_speed(phy_addr));
+}
+
+#endif /* CONFIG_CMD_NET */
+
+#endif /* CONFIG_DRIVER_ETHER */
diff --git a/cpu/arm926ejs/davinci/ether.c b/cpu/arm926ejs/davinci/ether.c
new file mode 100644
index 0000000..766bc7d
--- /dev/null
+++ b/cpu/arm926ejs/davinci/ether.c
@@ -0,0 +1,650 @@
+/*
+ * Ethernet driver for TI TMS320DM644x (DaVinci) chips.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts shamelessly stolen from TI's dm644x_emac.c. Original copyright
+ * follows:
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * dm644x_emac.c
+ *
+ * TI DaVinci (DM644X) EMAC peripheral driver source for DV-EVM
+ *
+ * Copyright (C) 2005 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+
+ * Modifications:
+ * ver. 1.0: Sep 2005, Anant Gole - Created EMAC version for uBoot.
+ * ver 1.1: Nov 2005, Anant Gole - Extended the RX logic for multiple descriptors
+ *
+ */
+#include <common.h>
+#include <command.h>
+#include <net.h>
+#include <miiphy.h>
+#include <asm/arch/emac_defs.h>
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+
+#ifdef CONFIG_CMD_NET
+
+unsigned int emac_dbg = 0;
+#define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args)
+
+/* Internal static functions */
+static int dm644x_eth_hw_init (void);
+static int dm644x_eth_open (void);
+static int dm644x_eth_close (void);
+static int dm644x_eth_send_packet (volatile void *packet, int length);
+static int dm644x_eth_rcv_packet (void);
+static void dm644x_eth_mdio_enable(void);
+
+static int gen_init_phy(int phy_addr);
+static int gen_is_phy_connected(int phy_addr);
+static int gen_get_link_speed(int phy_addr);
+static int gen_auto_negotiate(int phy_addr);
+
+/* Wrappers exported to the U-Boot proper */
+int eth_hw_init(void)
+{
+ return(dm644x_eth_hw_init());
+}
+
+int eth_init(bd_t * bd)
+{
+ return(dm644x_eth_open());
+}
+
+void eth_halt(void)
+{
+ dm644x_eth_close();
+}
+
+int eth_send(volatile void *packet, int length)
+{
+ return(dm644x_eth_send_packet(packet, length));
+}
+
+int eth_rx(void)
+{
+ return(dm644x_eth_rcv_packet());
+}
+
+void eth_mdio_enable(void)
+{
+ dm644x_eth_mdio_enable();
+}
+/* End of wrappers */
+
+
+static u_int8_t dm644x_eth_mac_addr[] = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
+
+/*
+ * This function must be called before emac_open() if you want to override
+ * the default mac address.
+ */
+void dm644x_eth_set_mac_addr(const u_int8_t *addr)
+{
+ int i;
+
+ for (i = 0; i < sizeof (dm644x_eth_mac_addr); i++) {
+ dm644x_eth_mac_addr[i] = addr[i];
+ }
+}
+
+/* EMAC Addresses */
+static volatile emac_regs *adap_emac = (emac_regs *)EMAC_BASE_ADDR;
+static volatile ewrap_regs *adap_ewrap = (ewrap_regs *)EMAC_WRAPPER_BASE_ADDR;
+static volatile mdio_regs *adap_mdio = (mdio_regs *)EMAC_MDIO_BASE_ADDR;
+
+/* EMAC descriptors */
+static volatile emac_desc *emac_rx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_RX_DESC_BASE);
+static volatile emac_desc *emac_tx_desc = (emac_desc *)(EMAC_WRAPPER_RAM_ADDR + EMAC_TX_DESC_BASE);
+static volatile emac_desc *emac_rx_active_head = 0;
+static volatile emac_desc *emac_rx_active_tail = 0;
+static int emac_rx_queue_active = 0;
+
+/* Receive packet buffers */
+static unsigned char emac_rx_buffers[EMAC_MAX_RX_BUFFERS * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
+
+/* PHY address for a discovered PHY (0xff - not found) */
+static volatile u_int8_t active_phy_addr = 0xff;
+
+phy_t phy;
+
+static void dm644x_eth_mdio_enable(void)
+{
+ u_int32_t clkdiv;
+
+ clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
+
+ adap_mdio->CONTROL = (clkdiv & 0xff) |
+ MDIO_CONTROL_ENABLE |
+ MDIO_CONTROL_FAULT |
+ MDIO_CONTROL_FAULT_ENABLE;
+
+ while (adap_mdio->CONTROL & MDIO_CONTROL_IDLE) {;}
+}
+
+/*
+ * Tries to find an active connected PHY. Returns 1 if address if found.
+ * If no active PHY (or more than one PHY) found returns 0.
+ * Sets active_phy_addr variable.
+ */
+static int dm644x_eth_phy_detect(void)
+{
+ u_int32_t phy_act_state;
+ int i;
+
+ active_phy_addr = 0xff;
+
+ if ((phy_act_state = adap_mdio->ALIVE) == 0)
+ return(0); /* No active PHYs */
+
+ debug_emac("dm644x_eth_phy_detect(), ALIVE = 0x%08x\n", phy_act_state);
+
+ for (i = 0; i < 32; i++) {
+ if (phy_act_state & (1 << i)) {
+ if (phy_act_state & ~(1 << i))
+ return(0); /* More than one PHY */
+ else {
+ active_phy_addr = i;
+ return(1);
+ }
+ }
+ }
+
+ return(0); /* Just to make GCC happy */
+}
+
+
+/* Read a PHY register via MDIO inteface. Returns 1 on success, 0 otherwise */
+int dm644x_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data)
+{
+ int tmp;
+
+ while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
+
+ adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO |
+ MDIO_USERACCESS0_WRITE_READ |
+ ((reg_num & 0x1f) << 21) |
+ ((phy_addr & 0x1f) << 16);
+
+ /* Wait for command to complete */
+ while ((tmp = adap_mdio->USERACCESS0) & MDIO_USERACCESS0_GO) {;}
+
+ if (tmp & MDIO_USERACCESS0_ACK) {
+ *data = tmp & 0xffff;
+ return(1);
+ }
+
+ *data = -1;
+ return(0);
+}
+
+/* Write to a PHY register via MDIO inteface. Blocks until operation is complete. */
+int dm644x_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data)
+{
+
+ while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
+
+ adap_mdio->USERACCESS0 = MDIO_USERACCESS0_GO |
+ MDIO_USERACCESS0_WRITE_WRITE |
+ ((reg_num & 0x1f) << 21) |
+ ((phy_addr & 0x1f) << 16) |
+ (data & 0xffff);
+
+ /* Wait for command to complete */
+ while (adap_mdio->USERACCESS0 & MDIO_USERACCESS0_GO) {;}
+
+ return(1);
+}
+
+/* PHY functions for a generic PHY */
+static int gen_init_phy(int phy_addr)
+{
+ int ret = 1;
+
+ if (gen_get_link_speed(phy_addr)) {
+ /* Try another time */
+ ret = gen_get_link_speed(phy_addr);
+ }
+
+ return(ret);
+}
+
+static int gen_is_phy_connected(int phy_addr)
+{
+ u_int16_t dummy;
+
+ return(dm644x_eth_phy_read(phy_addr, PHY_PHYIDR1, &dummy));
+}
+
+static int gen_get_link_speed(int phy_addr)
+{
+ u_int16_t tmp;
+
+ if (dm644x_eth_phy_read(phy_addr, MII_STATUS_REG, &tmp) && (tmp & 0x04))
+ return(1);
+
+ return(0);
+}
+
+static int gen_auto_negotiate(int phy_addr)
+{
+ u_int16_t tmp;
+
+ if (!dm644x_eth_phy_read(phy_addr, PHY_BMCR, &tmp))
+ return(0);
+
+ /* Restart Auto_negotiation */
+ tmp |= PHY_BMCR_AUTON;
+ dm644x_eth_phy_write(phy_addr, PHY_BMCR, tmp);
+
+ /*check AutoNegotiate complete */
+ udelay (10000);
+ if (!dm644x_eth_phy_read(phy_addr, PHY_BMSR, &tmp))
+ return(0);
+
+ if (!(tmp & PHY_BMSR_AUTN_COMP))
+ return(0);
+
+ return(gen_get_link_speed(phy_addr));
+}
+/* End of generic PHY functions */
+
+
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+static int dm644x_mii_phy_read(char *devname, unsigned char addr, unsigned char reg, unsigned short *value)
+{
+ return(dm644x_eth_phy_read(addr, reg, value) ? 0 : 1);
+}
+
+static int dm644x_mii_phy_write(char *devname, unsigned char addr, unsigned char reg, unsigned short value)
+{
+ return(dm644x_eth_phy_write(addr, reg, value) ? 0 : 1);
+}
+
+int dm644x_eth_miiphy_initialize(bd_t *bis)
+{
+ miiphy_register(phy.name, dm644x_mii_phy_read, dm644x_mii_phy_write);
+
+ return(1);
+}
+#endif
+
+/*
+ * This function initializes the emac hardware. It does NOT initialize
+ * EMAC modules power or pin multiplexors, that is done by board_init()
+ * much earlier in bootup process. Returns 1 on success, 0 otherwise.
+ */
+static int dm644x_eth_hw_init(void)
+{
+ u_int32_t phy_id;
+ u_int16_t tmp;
+ int i;
+
+ dm644x_eth_mdio_enable();
+
+ for (i = 0; i < 256; i++) {
+ if (adap_mdio->ALIVE)
+ break;
+ udelay(10);
+ }
+
+ if (i >= 256) {
+ printf("No ETH PHY detected!!!\n");
+ return(0);
+ }
+
+ /* Find if a PHY is connected and get it's address */
+ if (!dm644x_eth_phy_detect())
+ return(0);
+
+ /* Get PHY ID and initialize phy_ops for a detected PHY */
+ if (!dm644x_eth_phy_read(active_phy_addr, PHY_PHYIDR1, &tmp)) {
+ active_phy_addr = 0xff;
+ return(0);
+ }
+
+ phy_id = (tmp << 16) & 0xffff0000;
+
+ if (!dm644x_eth_phy_read(active_phy_addr, PHY_PHYIDR2, &tmp)) {
+ active_phy_addr = 0xff;
+ return(0);
+ }
+
+ phy_id |= tmp & 0x0000ffff;
+
+ switch (phy_id) {
+ case PHY_LXT972:
+ sprintf(phy.name, "LXT972 @ 0x%02x", active_phy_addr);
+ phy.init = lxt972_init_phy;
+ phy.is_phy_connected = lxt972_is_phy_connected;
+ phy.get_link_speed = lxt972_get_link_speed;
+ phy.auto_negotiate = lxt972_auto_negotiate;
+ break;
+ case PHY_DP83848:
+ sprintf(phy.name, "DP83848 @ 0x%02x", active_phy_addr);
+ phy.init = dp83848_init_phy;
+ phy.is_phy_connected = dp83848_is_phy_connected;
+ phy.get_link_speed = dp83848_get_link_speed;
+ phy.auto_negotiate = dp83848_auto_negotiate;
+ break;
+ default:
+ sprintf(phy.name, "GENERIC @ 0x%02x", active_phy_addr);
+ phy.init = gen_init_phy;
+ phy.is_phy_connected = gen_is_phy_connected;
+ phy.get_link_speed = gen_get_link_speed;
+ phy.auto_negotiate = gen_auto_negotiate;
+ }
+
+ return(1);
+}
+
+
+/* Eth device open */
+static int dm644x_eth_open(void)
+{
+ dv_reg_p addr;
+ u_int32_t clkdiv, cnt;
+ volatile emac_desc *rx_desc;
+
+ debug_emac("+ emac_open\n");
+
+ /* Reset EMAC module and disable interrupts in wrapper */
+ adap_emac->SOFTRESET = 1;
+ while (adap_emac->SOFTRESET != 0) {;}
+ adap_ewrap->EWCTL = 0;
+ for (cnt = 0; cnt < 5; cnt++) {
+ clkdiv = adap_ewrap->EWCTL;
+ }
+
+ rx_desc = emac_rx_desc;
+
+ adap_emac->TXCONTROL = 0x01;
+ adap_emac->RXCONTROL = 0x01;
+
+ /* Set MAC Addresses & Init multicast Hash to 0 (disable any multicast receive) */
+ /* Using channel 0 only - other channels are disabled */
+ adap_emac->MACINDEX = 0;
+ adap_emac->MACADDRHI =
+ (dm644x_eth_mac_addr[3] << 24) |
+ (dm644x_eth_mac_addr[2] << 16) |
+ (dm644x_eth_mac_addr[1] << 8) |
+ (dm644x_eth_mac_addr[0]);
+ adap_emac->MACADDRLO =
+ (dm644x_eth_mac_addr[5] << 8) |
+ (dm644x_eth_mac_addr[4]);
+
+ adap_emac->MACHASH1 = 0;
+ adap_emac->MACHASH2 = 0;
+
+ /* Set source MAC address - REQUIRED */
+ adap_emac->MACSRCADDRHI =
+ (dm644x_eth_mac_addr[3] << 24) |
+ (dm644x_eth_mac_addr[2] << 16) |
+ (dm644x_eth_mac_addr[1] << 8) |
+ (dm644x_eth_mac_addr[0]);
+ adap_emac->MACSRCADDRLO =
+ (dm644x_eth_mac_addr[4] << 8) |
+ (dm644x_eth_mac_addr[5]);
+
+ /* Set DMA 8 TX / 8 RX Head pointers to 0 */
+ addr = &adap_emac->TX0HDP;
+ for(cnt = 0; cnt < 16; cnt++)
+ *addr++ = 0;
+
+ addr = &adap_emac->RX0HDP;
+ for(cnt = 0; cnt < 16; cnt++)
+ *addr++ = 0;
+
+ /* Clear Statistics (do this before setting MacControl register) */
+ addr = &adap_emac->RXGOODFRAMES;
+ for(cnt = 0; cnt < EMAC_NUM_STATS; cnt++)
+ *addr++ = 0;
+
+ /* No multicast addressing */
+ adap_emac->MACHASH1 = 0;
+ adap_emac->MACHASH2 = 0;
+
+ /* Create RX queue and set receive process in place */
+ emac_rx_active_head = emac_rx_desc;
+ for (cnt = 0; cnt < EMAC_MAX_RX_BUFFERS; cnt++) {
+ rx_desc->next = (u_int32_t)(rx_desc + 1);
+ rx_desc->buffer = &emac_rx_buffers[cnt * (EMAC_MAX_ETHERNET_PKT_SIZE + EMAC_PKT_ALIGN)];
+ rx_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
+ rx_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
+ rx_desc++;
+ }
+
+ /* Set the last descriptor's "next" parameter to 0 to end the RX desc list */
+ rx_desc--;
+ rx_desc->next = 0;
+ emac_rx_active_tail = rx_desc;
+ emac_rx_queue_active = 1;
+
+ /* Enable TX/RX */
+ adap_emac->RXMAXLEN = EMAC_MAX_ETHERNET_PKT_SIZE;
+ adap_emac->RXBUFFEROFFSET = 0;
+
+ /* No fancy configs - Use this for promiscous for debug - EMAC_RXMBPENABLE_RXCAFEN_ENABLE */
+ adap_emac->RXMBPENABLE = EMAC_RXMBPENABLE_RXBROADEN;
+
+ /* Enable ch 0 only */
+ adap_emac->RXUNICASTSET = 0x01;
+
+ /* Enable MII interface and Full duplex mode */
+ adap_emac->MACCONTROL = (EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE);
+
+ /* Init MDIO & get link state */
+ clkdiv = (EMAC_MDIO_BUS_FREQ / EMAC_MDIO_CLOCK_FREQ) - 1;
+ adap_mdio->CONTROL = ((clkdiv & 0xff) | MDIO_CONTROL_ENABLE | MDIO_CONTROL_FAULT);
+
+ if (!phy.get_link_speed(active_phy_addr))
+ return(0);
+
+ /* Start receive process */
+ adap_emac->RX0HDP = (u_int32_t)emac_rx_desc;
+
+ debug_emac("- emac_open\n");
+
+ return(1);
+}
+
+/* EMAC Channel Teardown */
+static void dm644x_eth_ch_teardown(int ch)
+{
+ dv_reg dly = 0xff;
+ dv_reg cnt;
+
+ debug_emac("+ emac_ch_teardown\n");
+
+ if (ch == EMAC_CH_TX) {
+ /* Init TX channel teardown */
+ adap_emac->TXTEARDOWN = 1;
+ for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->TX0CP) {
+ /* Wait here for Tx teardown completion interrupt to occur
+ * Note: A task delay can be called here to pend rather than
+ * occupying CPU cycles - anyway it has been found that teardown
+ * takes very few cpu cycles and does not affect functionality */
+ dly--;
+ udelay(1);
+ if (dly == 0)
+ break;
+ }
+ adap_emac->TX0CP = cnt;
+ adap_emac->TX0HDP = 0;
+ } else {
+ /* Init RX channel teardown */
+ adap_emac->RXTEARDOWN = 1;
+ for(cnt = 0; cnt != 0xfffffffc; cnt = adap_emac->RX0CP) {
+ /* Wait here for Rx teardown completion interrupt to occur
+ * Note: A task delay can be called here to pend rather than
+ * occupying CPU cycles - anyway it has been found that teardown
+ * takes very few cpu cycles and does not affect functionality */
+ dly--;
+ udelay(1);
+ if (dly == 0)
+ break;
+ }
+ adap_emac->RX0CP = cnt;
+ adap_emac->RX0HDP = 0;
+ }
+
+ debug_emac("- emac_ch_teardown\n");
+}
+
+/* Eth device close */
+static int dm644x_eth_close(void)
+{
+ debug_emac("+ emac_close\n");
+
+ dm644x_eth_ch_teardown(EMAC_CH_TX); /* TX Channel teardown */
+ dm644x_eth_ch_teardown(EMAC_CH_RX); /* RX Channel teardown */
+
+ /* Reset EMAC module and disable interrupts in wrapper */
+ adap_emac->SOFTRESET = 1;
+ adap_ewrap->EWCTL = 0;
+
+ debug_emac("- emac_close\n");
+ return(1);
+}
+
+static int tx_send_loop = 0;
+
+/*
+ * This function sends a single packet on the network and returns
+ * positive number (number of bytes transmitted) or negative for error
+ */
+static int dm644x_eth_send_packet(volatile void *packet, int length)
+{
+ int ret_status = -1;
+ tx_send_loop = 0;
+
+ /* Return error if no link */
+ if (!phy.get_link_speed(active_phy_addr))
+ {
+ printf("WARN: emac_send_packet: No link\n");
+ return (ret_status);
+ }
+
+ /* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
+ if (length < EMAC_MIN_ETHERNET_PKT_SIZE)
+ {
+ length = EMAC_MIN_ETHERNET_PKT_SIZE;
+ }
+
+ /* Populate the TX descriptor */
+ emac_tx_desc->next = 0;
+ emac_tx_desc->buffer = (u_int8_t *)packet;
+ emac_tx_desc->buff_off_len = (length & 0xffff);
+ emac_tx_desc->pkt_flag_len = ((length & 0xffff) |
+ EMAC_CPPI_SOP_BIT |
+ EMAC_CPPI_OWNERSHIP_BIT |
+ EMAC_CPPI_EOP_BIT);
+ /* Send the packet */
+ adap_emac->TX0HDP = (unsigned int)emac_tx_desc;
+
+ /* Wait for packet to complete or link down */
+ while (1) {
+ if (!phy.get_link_speed(active_phy_addr)) {
+ dm644x_eth_ch_teardown(EMAC_CH_TX);
+ return (ret_status);
+ }
+ if (adap_emac->TXINTSTATRAW & 0x01) {
+ ret_status = length;
+ break;
+ }
+ tx_send_loop++;
+ }
+
+ return(ret_status);
+}
+
+/*
+ * This function handles receipt of a packet from the network
+ */
+static int dm644x_eth_rcv_packet(void)
+{
+ volatile emac_desc *rx_curr_desc;
+ volatile emac_desc *curr_desc;
+ volatile emac_desc *tail_desc;
+ int status, ret = -1;
+
+ rx_curr_desc = emac_rx_active_head;
+ status = rx_curr_desc->pkt_flag_len;
+ if ((rx_curr_desc) && ((status & EMAC_CPPI_OWNERSHIP_BIT) == 0)) {
+ if (status & EMAC_CPPI_RX_ERROR_FRAME) {
+ /* Error in packet - discard it and requeue desc */
+ printf("WARN: emac_rcv_pkt: Error in packet\n");
+ } else {
+ NetReceive(rx_curr_desc->buffer, (rx_curr_desc->buff_off_len & 0xffff));
+ ret = rx_curr_desc->buff_off_len & 0xffff;
+ }
+
+ /* Ack received packet descriptor */
+ adap_emac->RX0CP = (unsigned int)rx_curr_desc;
+ curr_desc = rx_curr_desc;
+ emac_rx_active_head = (volatile emac_desc *)rx_curr_desc->next;
+
+ if (status & EMAC_CPPI_EOQ_BIT) {
+ if (emac_rx_active_head) {
+ adap_emac->RX0HDP = (unsigned int)emac_rx_active_head;
+ } else {
+ emac_rx_queue_active = 0;
+ printf("INFO:emac_rcv_packet: RX Queue not active\n");
+ }
+ }
+
+ /* Recycle RX descriptor */
+ rx_curr_desc->buff_off_len = EMAC_MAX_ETHERNET_PKT_SIZE;
+ rx_curr_desc->pkt_flag_len = EMAC_CPPI_OWNERSHIP_BIT;
+ rx_curr_desc->next = 0;
+
+ if (emac_rx_active_head == 0) {
+ printf("INFO: emac_rcv_pkt: active queue head = 0\n");
+ emac_rx_active_head = curr_desc;
+ emac_rx_active_tail = curr_desc;
+ if (emac_rx_queue_active != 0) {
+ adap_emac->RX0HDP = (unsigned int)emac_rx_active_head;
+ printf("INFO: emac_rcv_pkt: active queue head = 0, HDP fired\n");
+ emac_rx_queue_active = 1;
+ }
+ } else {
+ tail_desc = emac_rx_active_tail;
+ emac_rx_active_tail = curr_desc;
+ tail_desc->next = (unsigned int)curr_desc;
+ status = tail_desc->pkt_flag_len;
+ if (status & EMAC_CPPI_EOQ_BIT) {
+ adap_emac->RX0HDP = (unsigned int)curr_desc;
+ status &= ~EMAC_CPPI_EOQ_BIT;
+ tail_desc->pkt_flag_len = status;
+ }
+ }
+ return(ret);
+ }
+ return(0);
+}
+
+#endif /* CONFIG_CMD_NET */
+
+#endif /* CONFIG_DRIVER_TI_EMAC */
diff --git a/cpu/arm926ejs/davinci/i2c.c b/cpu/arm926ejs/davinci/i2c.c
new file mode 100644
index 0000000..af9dc03
--- /dev/null
+++ b/cpu/arm926ejs/davinci/i2c.c
@@ -0,0 +1,351 @@
+/*
+ * TI DaVinci (TMS320DM644x) I2C driver.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * --------------------------------------------------------
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_DRIVER_DAVINCI_I2C
+
+#include <i2c.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/i2c_defs.h>
+
+#define CHECK_NACK() \
+ do {\
+ if (tmp & (I2C_TIMEOUT | I2C_STAT_NACK)) {\
+ REG(I2C_CON) = 0;\
+ return(1);\
+ }\
+ } while (0)
+
+
+static int wait_for_bus(void)
+{
+ int stat, timeout;
+
+ REG(I2C_STAT) = 0xffff;
+
+ for (timeout = 0; timeout < 10; timeout++) {
+ if (!((stat = REG(I2C_STAT)) & I2C_STAT_BB)) {
+ REG(I2C_STAT) = 0xffff;
+ return(0);
+ }
+
+ REG(I2C_STAT) = stat;
+ udelay(50000);
+ }
+
+ REG(I2C_STAT) = 0xffff;
+ return(1);
+}
+
+
+static int poll_i2c_irq(int mask)
+{
+ int stat, timeout;
+
+ for (timeout = 0; timeout < 10; timeout++) {
+ udelay(1000);
+ stat = REG(I2C_STAT);
+ if (stat & mask) {
+ return(stat);
+ }
+ }
+
+ REG(I2C_STAT) = 0xffff;
+ return(stat | I2C_TIMEOUT);
+}
+
+
+void flush_rx(void)
+{
+ int dummy;
+
+ while (1) {
+ if (!(REG(I2C_STAT) & I2C_STAT_RRDY))
+ break;
+
+ dummy = REG(I2C_DRR);
+ REG(I2C_STAT) = I2C_STAT_RRDY;
+ udelay(1000);
+ }
+}
+
+
+void i2c_init(int speed, int slaveadd)
+{
+ u_int32_t div, psc;
+
+ if (REG(I2C_CON) & I2C_CON_EN) {
+ REG(I2C_CON) = 0;
+ udelay (50000);
+ }
+
+ psc = 2;
+ div = (CFG_HZ_CLOCK / ((psc + 1) * speed)) - 10; /* SCLL + SCLH */
+ REG(I2C_PSC) = psc; /* 27MHz / (2 + 1) = 9MHz */
+ REG(I2C_SCLL) = (div * 50) / 100; /* 50% Duty */
+ REG(I2C_SCLH) = div - REG(I2C_SCLL);
+
+ REG(I2C_OA) = slaveadd;
+ REG(I2C_CNT) = 0;
+
+ /* Interrupts must be enabled or I2C module won't work */
+ REG(I2C_IE) = I2C_IE_SCD_IE | I2C_IE_XRDY_IE |
+ I2C_IE_RRDY_IE | I2C_IE_ARDY_IE | I2C_IE_NACK_IE;
+
+ /* Now enable I2C controller (get it out of reset) */
+ REG(I2C_CON) = I2C_CON_EN;
+
+ udelay(1000);
+}
+
+
+int i2c_probe(u_int8_t chip)
+{
+ int rc = 1;
+
+ if (chip == REG(I2C_OA)) {
+ return(rc);
+ }
+
+ REG(I2C_CON) = 0;
+ if (wait_for_bus()) {return(1);}
+
+ /* try to read one byte from current (or only) address */
+ REG(I2C_CNT) = 1;
+ REG(I2C_SA) = chip;
+ REG(I2C_CON) = (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP);
+ udelay (50000);
+
+ if (!(REG(I2C_STAT) & I2C_STAT_NACK)) {
+ rc = 0;
+ flush_rx();
+ REG(I2C_STAT) = 0xffff;
+ } else {
+ REG(I2C_STAT) = 0xffff;
+ REG(I2C_CON) |= I2C_CON_STP;
+ udelay(20000);
+ if (wait_for_bus()) {return(1);}
+ }
+
+ flush_rx();
+ REG(I2C_STAT) = 0xffff;
+ REG(I2C_CNT) = 0;
+ return(rc);
+}
+
+
+int i2c_read(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len)
+{
+ u_int32_t tmp;
+ int i;
+
+ if ((alen < 0) || (alen > 2)) {
+ printf("%s(): bogus address length %x\n", __FUNCTION__, alen);
+ return(1);
+ }
+
+ if (wait_for_bus()) {return(1);}
+
+ if (alen != 0) {
+ /* Start address phase */
+ tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX;
+ REG(I2C_CNT) = alen;
+ REG(I2C_SA) = chip;
+ REG(I2C_CON) = tmp;
+
+ tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
+
+ CHECK_NACK();
+
+ switch (alen) {
+ case 2:
+ /* Send address MSByte */
+ if (tmp & I2C_STAT_XRDY) {
+ REG(I2C_DXR) = (addr >> 8) & 0xff;
+ } else {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+
+ tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
+
+ CHECK_NACK();
+ /* No break, fall through */
+ case 1:
+ /* Send address LSByte */
+ if (tmp & I2C_STAT_XRDY) {
+ REG(I2C_DXR) = addr & 0xff;
+ } else {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+
+ tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK | I2C_STAT_ARDY);
+
+ CHECK_NACK();
+
+ if (!(tmp & I2C_STAT_ARDY)) {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+ }
+ }
+
+ /* Address phase is over, now read 'len' bytes and stop */
+ tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP;
+ REG(I2C_CNT) = len & 0xffff;
+ REG(I2C_SA) = chip;
+ REG(I2C_CON) = tmp;
+
+ for (i = 0; i < len; i++) {
+ tmp = poll_i2c_irq(I2C_STAT_RRDY | I2C_STAT_NACK | I2C_STAT_ROVR);
+
+ CHECK_NACK();
+
+ if (tmp & I2C_STAT_RRDY) {
+ buf[i] = REG(I2C_DRR);
+ } else {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+ }
+
+ tmp = poll_i2c_irq(I2C_STAT_SCD | I2C_STAT_NACK);
+
+ CHECK_NACK();
+
+ if (!(tmp & I2C_STAT_SCD)) {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+
+ flush_rx();
+ REG(I2C_STAT) = 0xffff;
+ REG(I2C_CNT) = 0;
+ REG(I2C_CON) = 0;
+
+ return(0);
+}
+
+
+int i2c_write(u_int8_t chip, u_int32_t addr, int alen, u_int8_t *buf, int len)
+{
+ u_int32_t tmp;
+ int i;
+
+ if ((alen < 0) || (alen > 2)) {
+ printf("%s(): bogus address length %x\n", __FUNCTION__, alen);
+ return(1);
+ }
+ if (len < 0) {
+ printf("%s(): bogus length %x\n", __FUNCTION__, len);
+ return(1);
+ }
+
+ if (wait_for_bus()) {return(1);}
+
+ /* Start address phase */
+ tmp = I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX | I2C_CON_STP;
+ REG(I2C_CNT) = (alen == 0) ? len & 0xffff : (len & 0xffff) + alen;
+ REG(I2C_SA) = chip;
+ REG(I2C_CON) = tmp;
+
+ switch (alen) {
+ case 2:
+ /* Send address MSByte */
+ tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
+
+ CHECK_NACK();
+
+ if (tmp & I2C_STAT_XRDY) {
+ REG(I2C_DXR) = (addr >> 8) & 0xff;
+ } else {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+ /* No break, fall through */
+ case 1:
+ /* Send address LSByte */
+ tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
+
+ CHECK_NACK();
+
+ if (tmp & I2C_STAT_XRDY) {
+ REG(I2C_DXR) = addr & 0xff;
+ } else {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+ }
+
+ for (i = 0; i < len; i++) {
+ tmp = poll_i2c_irq(I2C_STAT_XRDY | I2C_STAT_NACK);
+
+ CHECK_NACK();
+
+ if (tmp & I2C_STAT_XRDY) {
+ REG(I2C_DXR) = buf[i];
+ } else {
+ return(1);
+ }
+ }
+
+ tmp = poll_i2c_irq(I2C_STAT_SCD | I2C_STAT_NACK);
+
+ CHECK_NACK();
+
+ if (!(tmp & I2C_STAT_SCD)) {
+ REG(I2C_CON) = 0;
+ return(1);
+ }
+
+ flush_rx();
+ REG(I2C_STAT) = 0xffff;
+ REG(I2C_CNT) = 0;
+ REG(I2C_CON) = 0;
+
+ return(0);
+}
+
+
+u_int8_t i2c_reg_read(u_int8_t chip, u_int8_t reg)
+{
+ u_int8_t tmp;
+
+ i2c_read(chip, reg, 1, &tmp, 1);
+ return(tmp);
+}
+
+
+void i2c_reg_write(u_int8_t chip, u_int8_t reg, u_int8_t val)
+{
+ u_int8_t tmp;
+
+ i2c_write(chip, reg, 1, &tmp, 1);
+}
+
+#endif /* CONFIG_DRIVER_DAVINCI_I2C */
diff --git a/cpu/arm926ejs/davinci/lowlevel_init.S b/cpu/arm926ejs/davinci/lowlevel_init.S
new file mode 100644
index 0000000..a87c112
--- /dev/null
+++ b/cpu/arm926ejs/davinci/lowlevel_init.S
@@ -0,0 +1,707 @@
+/*
+ * Low-level board setup code for TI DaVinci SoC based boards.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Partially based on TI sources, original copyrights follow:
+ */
+
+/*
+ * Board specific setup info
+ *
+ * (C) Copyright 2003
+ * Texas Instruments, <www.ti.com>
+ * Kshitij Gupta <Kshitij@ti.com>
+ *
+ * Modified for OMAP 1610 H2 board by Nishant Kamat, Jan 2004
+ *
+ * Modified for OMAP 5912 OSK board by Rishi Bhattacharya, Apr 2004
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * Modified for DV-EVM board by Rishi Bhattacharya, Apr 2005
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * Modified for DV-EVM board by Swaminathan S, Nov 2005
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+.globl lowlevel_init
+lowlevel_init:
+
+ /*-------------------------------------------------------*
+ * Mask all IRQs by setting all bits in the EINT default *
+ *-------------------------------------------------------*/
+ mov r1, $0
+ ldr r0, =EINT_ENABLE0
+ str r1, [r0]
+ ldr r0, =EINT_ENABLE1
+ str r1, [r0]
+
+ /*------------------------------------------------------*
+ * Put the GEM in reset *
+ *------------------------------------------------------*/
+
+ /* Put the GEM in reset */
+ ldr r8, PSC_GEM_FLAG_CLEAR
+ ldr r6, MDCTL_GEM
+ ldr r7, [r6]
+ and r7, r7, r8
+ str r7, [r6]
+
+ /* Enable the Power Domain Transition Command */
+ ldr r6, PTCMD
+ ldr r7, [r6]
+ orr r7, r7, $0x02
+ str r7, [r6]
+
+ /* Check for Transition Complete(PTSTAT) */
+checkStatClkStopGem:
+ ldr r6, PTSTAT
+ ldr r7, [r6]
+ ands r7, r7, $0x02
+ bne checkStatClkStopGem
+
+ /* Check for GEM Reset Completion */
+checkGemStatClkStop:
+ ldr r6, MDSTAT_GEM
+ ldr r7, [r6]
+ ands r7, r7, $0x100
+ bne checkGemStatClkStop
+
+ /* Do this for enabling a WDT initiated reset this is a workaround
+ for a chip bug. Not required under normal situations */
+ ldr r6, P1394
+ mov r10, $0
+ str r10, [r6]
+
+ /*------------------------------------------------------*
+ * Enable L1 & L2 Memories in Fast mode *
+ *------------------------------------------------------*/
+ ldr r6, DFT_ENABLE
+ mov r10, $0x01
+ str r10, [r6]
+
+ ldr r6, MMARG_BRF0
+ ldr r10, MMARG_BRF0_VAL
+ str r10, [r6]
+
+ ldr r6, DFT_ENABLE
+ mov r10, $0
+ str r10, [r6]
+
+ /*------------------------------------------------------*
+ * DDR2 PLL Initialization *
+ *------------------------------------------------------*/
+
+ /* Select the Clock Mode Depending on the Value written in the Boot Table by the run script */
+ mov r10, $0
+ ldr r6, PLL2_CTL
+ ldr r7, PLL_CLKSRC_MASK
+ ldr r8, [r6]
+ and r8, r8, r7
+ mov r9, r10, lsl $8
+ orr r8, r8, r9
+ str r8, [r6]
+
+ /* Select the PLLEN source */
+ ldr r7, PLL_ENSRC_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Bypass the PLL */
+ ldr r7, PLL_BYPASS_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Wait for few cycles to allow PLLEN Mux switch properly to bypass Clock */
+ mov r10, $0x20
+WaitPPL2Loop:
+ subs r10, r10, $1
+ bne WaitPPL2Loop
+
+ /* Reset the PLL */
+ ldr r7, PLL_RESET_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Power up the PLL */
+ ldr r7, PLL_PWRUP_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Enable the PLL from Disable Mode */
+ ldr r7, PLL_DISABLE_ENABLE_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Program the PLL Multiplier */
+ ldr r6, PLL2_PLLM
+ mov r2, $0x17 /* 162 MHz */
+ str r2, [r6]
+
+ /* Program the PLL2 Divisor Value */
+ ldr r6, PLL2_DIV2
+ mov r3, $0x01
+ str r3, [r6]
+
+ /* Program the PLL2 Divisor Value */
+ ldr r6, PLL2_DIV1
+ mov r4, $0x0b /* 54 MHz */
+ str r4, [r6]
+
+ /* PLL2 DIV2 MMR */
+ ldr r8, PLL2_DIV_MASK
+ ldr r6, PLL2_DIV2
+ ldr r9, [r6]
+ and r8, r8, r9
+ mov r9, $0x01
+ mov r9, r9, lsl $15
+ orr r8, r8, r9
+ str r8, [r6]
+
+ /* Program the GOSET bit to take new divider values */
+ ldr r6, PLL2_PLLCMD
+ ldr r7, [r6]
+ orr r7, r7, $0x01
+ str r7, [r6]
+
+ /* Wait for Done */
+ ldr r6, PLL2_PLLSTAT
+doneLoop_0:
+ ldr r7, [r6]
+ ands r7, r7, $0x01
+ bne doneLoop_0
+
+ /* PLL2 DIV1 MMR */
+ ldr r8, PLL2_DIV_MASK
+ ldr r6, PLL2_DIV1
+ ldr r9, [r6]
+ and r8, r8, r9
+ mov r9, $0x01
+ mov r9, r9, lsl $15
+ orr r8, r8, r9
+ str r8, [r6]
+
+ /* Program the GOSET bit to take new divider values */
+ ldr r6, PLL2_PLLCMD
+ ldr r7, [r6]
+ orr r7, r7, $0x01
+ str r7, [r6]
+
+ /* Wait for Done */
+ ldr r6, PLL2_PLLSTAT
+doneLoop:
+ ldr r7, [r6]
+ ands r7, r7, $0x01
+ bne doneLoop
+
+ /* Wait for PLL to Reset Properly */
+ mov r10, $0x218
+ResetPPL2Loop:
+ subs r10, r10, $1
+ bne ResetPPL2Loop
+
+ /* Bring PLL out of Reset */
+ ldr r6, PLL2_CTL
+ ldr r8, [r6]
+ orr r8, r8, $0x08
+ str r8, [r6]
+
+ /* Wait for PLL to Lock */
+ ldr r10, PLL_LOCK_COUNT
+PLL2Lock:
+ subs r10, r10, $1
+ bne PLL2Lock
+
+ /* Enable the PLL */
+ ldr r6, PLL2_CTL
+ ldr r8, [r6]
+ orr r8, r8, $0x01
+ str r8, [r6]
+
+ /*------------------------------------------------------*
+ * Issue Soft Reset to DDR Module *
+ *------------------------------------------------------*/
+
+ /* Shut down the DDR2 LPSC Module */
+ ldr r8, PSC_FLAG_CLEAR
+ ldr r6, MDCTL_DDR2
+ ldr r7, [r6]
+ and r7, r7, r8
+ orr r7, r7, $0x03
+ str r7, [r6]
+
+ /* Enable the Power Domain Transition Command */
+ ldr r6, PTCMD
+ ldr r7, [r6]
+ orr r7, r7, $0x01
+ str r7, [r6]
+
+ /* Check for Transition Complete(PTSTAT) */
+checkStatClkStop:
+ ldr r6, PTSTAT
+ ldr r7, [r6]
+ ands r7, r7, $0x01
+ bne checkStatClkStop
+
+ /* Check for DDR2 Controller Enable Completion */
+checkDDRStatClkStop:
+ ldr r6, MDSTAT_DDR2
+ ldr r7, [r6]
+ and r7, r7, $0x1f
+ cmp r7, $0x03
+ bne checkDDRStatClkStop
+
+ /*------------------------------------------------------*
+ * Program DDR2 MMRs for 162MHz Setting *
+ *------------------------------------------------------*/
+
+ /* Program PHY Control Register */
+ ldr r6, DDRCTL
+ ldr r7, DDRCTL_VAL
+ str r7, [r6]
+
+ /* Program SDRAM Bank Config Register */
+ ldr r6, SDCFG
+ ldr r7, SDCFG_VAL
+ str r7, [r6]
+
+ /* Program SDRAM TIM-0 Config Register */
+ ldr r6, SDTIM0
+ ldr r7, SDTIM0_VAL_162MHz
+ str r7, [r6]
+
+ /* Program SDRAM TIM-1 Config Register */
+ ldr r6, SDTIM1
+ ldr r7, SDTIM1_VAL_162MHz
+ str r7, [r6]
+
+ /* Program the SDRAM Bank Config Control Register */
+ ldr r10, MASK_VAL
+ ldr r8, SDCFG
+ ldr r9, SDCFG_VAL
+ and r9, r9, r10
+ str r9, [r8]
+
+ /* Program SDRAM SDREF Config Register */
+ ldr r6, SDREF
+ ldr r7, SDREF_VAL
+ str r7, [r6]
+
+ /*------------------------------------------------------*
+ * Issue Soft Reset to DDR Module *
+ *------------------------------------------------------*/
+
+ /* Issue a Dummy DDR2 read/write */
+ ldr r8, DDR2_START_ADDR
+ ldr r7, DUMMY_VAL
+ str r7, [r8]
+ ldr r7, [r8]
+
+ /* Shut down the DDR2 LPSC Module */
+ ldr r8, PSC_FLAG_CLEAR
+ ldr r6, MDCTL_DDR2
+ ldr r7, [r6]
+ and r7, r7, r8
+ orr r7, r7, $0x01
+ str r7, [r6]
+
+ /* Enable the Power Domain Transition Command */
+ ldr r6, PTCMD
+ ldr r7, [r6]
+ orr r7, r7, $0x01
+ str r7, [r6]
+
+ /* Check for Transition Complete(PTSTAT) */
+checkStatClkStop2:
+ ldr r6, PTSTAT
+ ldr r7, [r6]
+ ands r7, r7, $0x01
+ bne checkStatClkStop2
+
+ /* Check for DDR2 Controller Enable Completion */
+checkDDRStatClkStop2:
+ ldr r6, MDSTAT_DDR2
+ ldr r7, [r6]
+ and r7, r7, $0x1f
+ cmp r7, $0x01
+ bne checkDDRStatClkStop2
+
+ /*------------------------------------------------------*
+ * Turn DDR2 Controller Clocks On *
+ *------------------------------------------------------*/
+
+ /* Enable the DDR2 LPSC Module */
+ ldr r6, MDCTL_DDR2
+ ldr r7, [r6]
+ orr r7, r7, $0x03
+ str r7, [r6]
+
+ /* Enable the Power Domain Transition Command */
+ ldr r6, PTCMD
+ ldr r7, [r6]
+ orr r7, r7, $0x01
+ str r7, [r6]
+
+ /* Check for Transition Complete(PTSTAT) */
+checkStatClkEn2:
+ ldr r6, PTSTAT
+ ldr r7, [r6]
+ ands r7, r7, $0x01
+ bne checkStatClkEn2
+
+ /* Check for DDR2 Controller Enable Completion */
+checkDDRStatClkEn2:
+ ldr r6, MDSTAT_DDR2
+ ldr r7, [r6]
+ and r7, r7, $0x1f
+ cmp r7, $0x03
+ bne checkDDRStatClkEn2
+
+ /* DDR Writes and Reads */
+ ldr r6, CFGTEST
+ mov r3, $0x01
+ str r3, [r6]
+
+ /*------------------------------------------------------*
+ * System PLL Initialization *
+ *------------------------------------------------------*/
+
+ /* Select the Clock Mode Depending on the Value written in the Boot Table by the run script */
+ mov r2, $0
+ ldr r6, PLL1_CTL
+ ldr r7, PLL_CLKSRC_MASK
+ ldr r8, [r6]
+ and r8, r8, r7
+ mov r9, r2, lsl $8
+ orr r8, r8, r9
+ str r8, [r6]
+
+ /* Select the PLLEN source */
+ ldr r7, PLL_ENSRC_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Bypass the PLL */
+ ldr r7, PLL_BYPASS_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Wait for few cycles to allow PLLEN Mux switch properly to bypass Clock */
+ mov r10, $0x20
+
+WaitLoop:
+ subs r10, r10, $1
+ bne WaitLoop
+
+ /* Reset the PLL */
+ ldr r7, PLL_RESET_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Disable the PLL */
+ orr r8, r8, $0x10
+ str r8, [r6]
+
+ /* Power up the PLL */
+ ldr r7, PLL_PWRUP_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Enable the PLL from Disable Mode */
+ ldr r7, PLL_DISABLE_ENABLE_MASK
+ and r8, r8, r7
+ str r8, [r6]
+
+ /* Program the PLL Multiplier */
+ ldr r6, PLL1_PLLM
+ mov r3, $0x15 /* For 594MHz */
+ str r3, [r6]
+
+ /* Wait for PLL to Reset Properly */
+ mov r10, $0xff
+
+ResetLoop:
+ subs r10, r10, $1
+ bne ResetLoop
+
+ /* Bring PLL out of Reset */
+ ldr r6, PLL1_CTL
+ orr r8, r8, $0x08
+ str r8, [r6]
+
+ /* Wait for PLL to Lock */
+ ldr r10, PLL_LOCK_COUNT
+
+PLL1Lock:
+ subs r10, r10, $1
+ bne PLL1Lock
+
+ /* Enable the PLL */
+ orr r8, r8, $0x01
+ str r8, [r6]
+
+ nop
+ nop
+ nop
+ nop
+
+ /*------------------------------------------------------*
+ * AEMIF configuration for NOR Flash (double check) *
+ *------------------------------------------------------*/
+ ldr r0, _PINMUX0
+ ldr r1, _DEV_SETTING
+ str r1, [r0]
+
+ ldr r0, WAITCFG
+ ldr r1, WAITCFG_VAL
+ ldr r2, [r0]
+ orr r2, r2, r1
+ str r2, [r0]
+
+ ldr r0, ACFG3
+ ldr r1, ACFG3_VAL
+ ldr r2, [r0]
+ and r1, r2, r1
+ str r1, [r0]
+
+ ldr r0, ACFG4
+ ldr r1, ACFG4_VAL
+ ldr r2, [r0]
+ and r1, r2, r1
+ str r1, [r0]
+
+ ldr r0, ACFG5
+ ldr r1, ACFG5_VAL
+ ldr r2, [r0]
+ and r1, r2, r1
+ str r1, [r0]
+
+ /*--------------------------------------*
+ * VTP manual Calibration *
+ *--------------------------------------*/
+ ldr r0, VTPIOCR
+ ldr r1, VTP_MMR0
+ str r1, [r0]
+
+ ldr r0, VTPIOCR
+ ldr r1, VTP_MMR1
+ str r1, [r0]
+
+ /* Wait for 33 VTP CLK cycles. VRP operates at 27 MHz */
+ ldr r10, VTP_LOCK_COUNT
+VTPLock:
+ subs r10, r10, $1
+ bne VTPLock
+
+ ldr r6, DFT_ENABLE
+ mov r10, $0x01
+ str r10, [r6]
+
+ ldr r6, DDRVTPR
+ ldr r7, [r6]
+ and r7, r7, $0x1f
+ and r8, r7, $0x3e0
+ orr r8, r7, r8
+ ldr r7, VTP_RECAL
+ orr r8, r7, r8
+ ldr r7, VTP_EN
+ orr r8, r7, r8
+ str r8, [r0]
+
+
+ /* Wait for 33 VTP CLK cycles. VRP operates at 27 MHz */
+ ldr r10, VTP_LOCK_COUNT
+VTP1Lock:
+ subs r10, r10, $1
+ bne VTP1Lock
+
+ ldr r1, [r0]
+ ldr r2, VTP_MASK
+ and r2, r1, r2
+ str r2, [r0]
+
+ ldr r6, DFT_ENABLE
+ mov r10, $0
+ str r10, [r6]
+
+ /*
+ * Call board-specific lowlevel init.
+ * That MUST be present and THAT returns
+ * back to arch calling code with "mov pc, lr."
+ */
+ b dv_board_init
+
+.ltorg
+
+_PINMUX0:
+ .word 0x01c40000 /* Device Configuration Registers */
+_PINMUX1:
+ .word 0x01c40004 /* Device Configuration Registers */
+
+_DEV_SETTING:
+ .word 0x00000c1f
+
+WAITCFG:
+ .word 0x01e00004
+WAITCFG_VAL:
+ .word 0
+ACFG3:
+ .word 0x01e00014
+ACFG3_VAL:
+ .word 0x3ffffffd
+ACFG4:
+ .word 0x01e00018
+ACFG4_VAL:
+ .word 0x3ffffffd
+ACFG5:
+ .word 0x01e0001c
+ACFG5_VAL:
+ .word 0x3ffffffd
+
+MDCTL_DDR2:
+ .word 0x01c41a34
+MDSTAT_DDR2:
+ .word 0x01c41834
+
+PTCMD:
+ .word 0x01c41120
+PTSTAT:
+ .word 0x01c41128
+
+EINT_ENABLE0:
+ .word 0x01c48018
+EINT_ENABLE1:
+ .word 0x01c4801c
+
+PSC_FLAG_CLEAR:
+ .word 0xffffffe0
+PSC_GEM_FLAG_CLEAR:
+ .word 0xfffffeff
+
+/* DDR2 MMR & CONFIGURATION VALUES, 162 MHZ clock */
+DDRCTL:
+ .word 0x200000e4
+DDRCTL_VAL:
+ .word 0x50006405
+SDREF:
+ .word 0x2000000c
+SDREF_VAL:
+ .word 0x000005c3
+SDCFG:
+ .word 0x20000008
+SDCFG_VAL:
+#ifdef DDR_4BANKS
+ .word 0x00178622
+#elif defined DDR_8BANKS
+ .word 0x00178632
+#else
+#error "Unknown DDR configuration!!!"
+#endif
+SDTIM0:
+ .word 0x20000010
+SDTIM0_VAL_162MHz:
+ .word 0x28923211
+SDTIM1:
+ .word 0x20000014
+SDTIM1_VAL_162MHz:
+ .word 0x0016c722
+VTPIOCR:
+ .word 0x200000f0 /* VTP IO Control register */
+DDRVTPR:
+ .word 0x01c42030 /* DDR VPTR MMR */
+VTP_MMR0:
+ .word 0x201f
+VTP_MMR1:
+ .word 0xa01f
+DFT_ENABLE:
+ .word 0x01c4004c
+VTP_LOCK_COUNT:
+ .word 0x5b0
+VTP_MASK:
+ .word 0xffffdfff
+VTP_RECAL:
+ .word 0x40000
+VTP_EN:
+ .word 0x02000
+CFGTEST:
+ .word 0x80010000
+MASK_VAL:
+ .word 0x00000fff
+
+/* GEM Power Up & LPSC Control Register */
+MDCTL_GEM:
+ .word 0x01c41a9c
+MDSTAT_GEM:
+ .word 0x01c4189c
+
+/* For WDT reset chip bug */
+P1394:
+ .word 0x01c41a20
+
+PLL_CLKSRC_MASK:
+ .word 0xfffffeff /* Mask the Clock Mode bit */
+PLL_ENSRC_MASK:
+ .word 0xffffffdf /* Select the PLLEN source */
+PLL_BYPASS_MASK:
+ .word 0xfffffffe /* Put the PLL in BYPASS */
+PLL_RESET_MASK:
+ .word 0xfffffff7 /* Put the PLL in Reset Mode */
+PLL_PWRUP_MASK:
+ .word 0xfffffffd /* PLL Power up Mask Bit */
+PLL_DISABLE_ENABLE_MASK:
+ .word 0xffffffef /* Enable the PLL from Disable */
+PLL_LOCK_COUNT:
+ .word 0x2000
+
+/* PLL1-SYSTEM PLL MMRs */
+PLL1_CTL:
+ .word 0x01c40900
+PLL1_PLLM:
+ .word 0x01c40910
+
+/* PLL2-SYSTEM PLL MMRs */
+PLL2_CTL:
+ .word 0x01c40d00
+PLL2_PLLM:
+ .word 0x01c40d10
+PLL2_DIV1:
+ .word 0x01c40d18
+PLL2_DIV2:
+ .word 0x01c40d1c
+PLL2_PLLCMD:
+ .word 0x01c40d38
+PLL2_PLLSTAT:
+ .word 0x01c40d3c
+PLL2_DIV_MASK:
+ .word 0xffff7fff
+
+MMARG_BRF0:
+ .word 0x01c42010 /* BRF margin mode 0 (R/W)*/
+MMARG_BRF0_VAL:
+ .word 0x00444400
+
+DDR2_START_ADDR:
+ .word 0x80000000
+DUMMY_VAL:
+ .word 0xa55aa55a
diff --git a/cpu/arm926ejs/davinci/lxt972.c b/cpu/arm926ejs/davinci/lxt972.c
new file mode 100644
index 0000000..6eeb6e5
--- /dev/null
+++ b/cpu/arm926ejs/davinci/lxt972.c
@@ -0,0 +1,142 @@
+/*
+ * Intel LXT971/LXT972 PHY Driver for TI DaVinci
+ * (TMS320DM644x) based boards.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * --------------------------------------------------------
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <net.h>
+#include <lxt971a.h>
+#include <asm/arch/emac_defs.h>
+
+#ifdef CONFIG_DRIVER_TI_EMAC
+
+#ifdef CONFIG_CMD_NET
+
+int lxt972_is_phy_connected(int phy_addr)
+{
+ u_int16_t id1, id2;
+
+ if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_ID1, &id1))
+ return(0);
+ if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_ID2, &id2))
+ return(0);
+
+ if ((id1 == (0x0013)) && ((id2 & 0xfff0) == 0x78e0))
+ return(1);
+
+ return(0);
+}
+
+int lxt972_get_link_speed(int phy_addr)
+{
+ u_int16_t stat1, tmp;
+ volatile emac_regs* emac = (emac_regs *)EMAC_BASE_ADDR;
+
+ if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1))
+ return(0);
+
+ if (!(stat1 & PHY_LXT971_STAT2_LINK)) /* link up? */
+ return(0);
+
+ if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
+ return(0);
+
+ tmp |= PHY_LXT971_DIG_CFG_MII_DRIVE;
+
+ dm644x_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp);
+ /* Read back */
+ if (!dm644x_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp))
+ return(0);
+
+
+ /* Speed doesn't matter, there is no setting for it in EMAC... */
+ if (stat1 & PHY_LXT971_STAT2_100BTX) {
+ if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
+ /* set DM644x EMAC for Full Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+ } else {
+ /*set DM644x EMAC for Half Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
+ }
+
+ return(1);
+ } else {
+ if (stat1 & PHY_LXT971_STAT2_DUPLEX_MODE) {
+ /* set DM644x EMAC for Full Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE | EMAC_MACCONTROL_FULLDUPLEX_ENABLE;
+ } else {
+ /*set DM644x EMAC for Half Duplex */
+ emac->MACCONTROL = EMAC_MACCONTROL_MIIEN_ENABLE;
+ }
+
+ return(1);
+ }
+
+ return(0);
+}
+
+
+int lxt972_init_phy(int phy_addr)
+{
+ int ret = 1;
+
+ if (!lxt972_get_link_speed(phy_addr)) {
+ /* Try another time */
+ ret = lxt972_get_link_speed(phy_addr);
+ }
+
+ /* Disable PHY Interrupts */
+ dm644x_eth_phy_write(phy_addr, PHY_LXT971_INT_ENABLE, 0);
+
+ return(ret);
+}
+
+
+int lxt972_auto_negotiate(int phy_addr)
+{
+ u_int16_t tmp;
+
+
+ if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_CTRL, &tmp))
+ return(0);
+
+ /* Restart Auto_negotiation */
+ tmp |= PHY_COMMON_CTRL_RES_AUTO;
+ dm644x_eth_phy_write(phy_addr, PHY_COMMON_CTRL, tmp);
+
+ /*check AutoNegotiate complete */
+ udelay (10000);
+ if (!dm644x_eth_phy_read(phy_addr, PHY_COMMON_STAT, &tmp))
+ return(0);
+
+ if (!(tmp & PHY_COMMON_STAT_AN_COMP))
+ return(0);
+
+ return (lxt972_get_link_speed(phy_addr));
+}
+
+#endif /* CONFIG_CMD_NET */
+
+#endif /* CONFIG_DRIVER_ETHER */
diff --git a/cpu/arm926ejs/davinci/nand.c b/cpu/arm926ejs/davinci/nand.c
new file mode 100644
index 0000000..127be9f
--- /dev/null
+++ b/cpu/arm926ejs/davinci/nand.c
@@ -0,0 +1,389 @@
+/*
+ * NAND driver for TI DaVinci based boards.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Based on Linux DaVinci NAND driver by TI. Original copyright follows:
+ */
+
+/*
+ *
+ * linux/drivers/mtd/nand/nand_davinci.c
+ *
+ * NAND Flash Driver
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+ *
+ * Overview:
+ * This is a device driver for the NAND flash device found on the
+ * DaVinci board which utilizes the Samsung k9k2g08 part.
+ *
+ Modifications:
+ ver. 1.0: Feb 2005, Vinod/Sudhakar
+ -
+ *
+ */
+
+#include <common.h>
+
+#ifdef CFG_USE_NAND
+#if !defined(CFG_NAND_LEGACY)
+
+#include <nand.h>
+#include <asm/arch/nand_defs.h>
+#include <asm/arch/emif_defs.h>
+
+extern struct nand_chip nand_dev_desc[CFG_MAX_NAND_DEVICE];
+
+static void nand_davinci_hwcontrol(struct mtd_info *mtd, int cmd)
+{
+ struct nand_chip *this = mtd->priv;
+ u_int32_t IO_ADDR_W = (u_int32_t)this->IO_ADDR_W;
+
+ IO_ADDR_W &= ~(MASK_ALE|MASK_CLE);
+
+ switch (cmd) {
+ case NAND_CTL_SETCLE:
+ IO_ADDR_W |= MASK_CLE;
+ break;
+ case NAND_CTL_SETALE:
+ IO_ADDR_W |= MASK_ALE;
+ break;
+ }
+
+ this->IO_ADDR_W = (void *)IO_ADDR_W;
+}
+
+/* Set WP on deselect, write enable on select */
+static void nand_davinci_select_chip(struct mtd_info *mtd, int chip)
+{
+#define GPIO_SET_DATA01 0x01c67018
+#define GPIO_CLR_DATA01 0x01c6701c
+#define GPIO_NAND_WP (1 << 4)
+#ifdef SONATA_BOARD_GPIOWP
+ if (chip < 0) {
+ REG(GPIO_CLR_DATA01) |= GPIO_NAND_WP;
+ } else {
+ REG(GPIO_SET_DATA01) |= GPIO_NAND_WP;
+ }
+#endif
+}
+
+#ifdef CFG_NAND_HW_ECC
+#ifdef CFG_NAND_LARGEPAGE
+static struct nand_oobinfo davinci_nand_oobinfo = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 12,
+ .eccpos = {8, 9, 10, 24, 25, 26, 40, 41, 42, 56, 57, 58},
+ .oobfree = { {2, 6}, {12, 12}, {28, 12}, {44, 12}, {60, 4} }
+};
+#elif defined(CFG_NAND_SMALLPAGE)
+static struct nand_oobinfo davinci_nand_oobinfo = {
+ .useecc = MTD_NANDECC_AUTOPLACE,
+ .eccbytes = 3,
+ .eccpos = {0, 1, 2},
+ .oobfree = { {6, 2}, {8, 8} }
+};
+#else
+#error "Either CFG_NAND_LARGEPAGE or CFG_NAND_SMALLPAGE must be defined!"
+#endif
+
+static void nand_davinci_enable_hwecc(struct mtd_info *mtd, int mode)
+{
+ emifregs emif_addr;
+ int dummy;
+
+ emif_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
+
+ dummy = emif_addr->NANDF1ECC;
+ dummy = emif_addr->NANDF2ECC;
+ dummy = emif_addr->NANDF3ECC;
+ dummy = emif_addr->NANDF4ECC;
+
+ emif_addr->NANDFCR |= (1 << 8);
+}
+
+static u_int32_t nand_davinci_readecc(struct mtd_info *mtd, u_int32_t region)
+{
+ u_int32_t ecc = 0;
+ emifregs emif_base_addr;
+
+ emif_base_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
+
+ if (region == 1)
+ ecc = emif_base_addr->NANDF1ECC;
+ else if (region == 2)
+ ecc = emif_base_addr->NANDF2ECC;
+ else if (region == 3)
+ ecc = emif_base_addr->NANDF3ECC;
+ else if (region == 4)
+ ecc = emif_base_addr->NANDF4ECC;
+
+ return(ecc);
+}
+
+static int nand_davinci_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
+{
+ u_int32_t tmp;
+ int region, n;
+ struct nand_chip *this = mtd->priv;
+
+ n = (this->eccmode == NAND_ECC_HW12_2048) ? 4 : 1;
+
+ region = 1;
+ while (n--) {
+ tmp = nand_davinci_readecc(mtd, region);
+ *ecc_code++ = tmp;
+ *ecc_code++ = tmp >> 16;
+ *ecc_code++ = ((tmp >> 8) & 0x0f) | ((tmp >> 20) & 0xf0);
+ region++;
+ }
+ return(0);
+}
+
+static void nand_davinci_gen_true_ecc(u_int8_t *ecc_buf)
+{
+ u_int32_t tmp = ecc_buf[0] | (ecc_buf[1] << 16) | ((ecc_buf[2] & 0xf0) << 20) | ((ecc_buf[2] & 0x0f) << 8);
+
+ ecc_buf[0] = ~(P64o(tmp) | P64e(tmp) | P32o(tmp) | P32e(tmp) | P16o(tmp) | P16e(tmp) | P8o(tmp) | P8e(tmp));
+ ecc_buf[1] = ~(P1024o(tmp) | P1024e(tmp) | P512o(tmp) | P512e(tmp) | P256o(tmp) | P256e(tmp) | P128o(tmp) | P128e(tmp));
+ ecc_buf[2] = ~( P4o(tmp) | P4e(tmp) | P2o(tmp) | P2e(tmp) | P1o(tmp) | P1e(tmp) | P2048o(tmp) | P2048e(tmp));
+}
+
+static int nand_davinci_compare_ecc(u_int8_t *ecc_nand, u_int8_t *ecc_calc, u_int8_t *page_data)
+{
+ u_int32_t i;
+ u_int8_t tmp0_bit[8], tmp1_bit[8], tmp2_bit[8];
+ u_int8_t comp0_bit[8], comp1_bit[8], comp2_bit[8];
+ u_int8_t ecc_bit[24];
+ u_int8_t ecc_sum = 0;
+ u_int8_t find_bit = 0;
+ u_int32_t find_byte = 0;
+ int is_ecc_ff;
+
+ is_ecc_ff = ((*ecc_nand == 0xff) && (*(ecc_nand + 1) == 0xff) && (*(ecc_nand + 2) == 0xff));
+
+ nand_davinci_gen_true_ecc(ecc_nand);
+ nand_davinci_gen_true_ecc(ecc_calc);
+
+ for (i = 0; i <= 2; i++) {
+ *(ecc_nand + i) = ~(*(ecc_nand + i));
+ *(ecc_calc + i) = ~(*(ecc_calc + i));
+ }
+
+ for (i = 0; i < 8; i++) {
+ tmp0_bit[i] = *ecc_nand % 2;
+ *ecc_nand = *ecc_nand / 2;
+ }
+
+ for (i = 0; i < 8; i++) {
+ tmp1_bit[i] = *(ecc_nand + 1) % 2;
+ *(ecc_nand + 1) = *(ecc_nand + 1) / 2;
+ }
+
+ for (i = 0; i < 8; i++) {
+ tmp2_bit[i] = *(ecc_nand + 2) % 2;
+ *(ecc_nand + 2) = *(ecc_nand + 2) / 2;
+ }
+
+ for (i = 0; i < 8; i++) {
+ comp0_bit[i] = *ecc_calc % 2;
+ *ecc_calc = *ecc_calc / 2;
+ }
+
+ for (i = 0; i < 8; i++) {
+ comp1_bit[i] = *(ecc_calc + 1) % 2;
+ *(ecc_calc + 1) = *(ecc_calc + 1) / 2;
+ }
+
+ for (i = 0; i < 8; i++) {
+ comp2_bit[i] = *(ecc_calc + 2) % 2;
+ *(ecc_calc + 2) = *(ecc_calc + 2) / 2;
+ }
+
+ for (i = 0; i< 6; i++)
+ ecc_bit[i] = tmp2_bit[i + 2] ^ comp2_bit[i + 2];
+
+ for (i = 0; i < 8; i++)
+ ecc_bit[i + 6] = tmp0_bit[i] ^ comp0_bit[i];
+
+ for (i = 0; i < 8; i++)
+ ecc_bit[i + 14] = tmp1_bit[i] ^ comp1_bit[i];
+
+ ecc_bit[22] = tmp2_bit[0] ^ comp2_bit[0];
+ ecc_bit[23] = tmp2_bit[1] ^ comp2_bit[1];
+
+ for (i = 0; i < 24; i++)
+ ecc_sum += ecc_bit[i];
+
+ switch (ecc_sum) {
+ case 0:
+ /* Not reached because this function is not called if
+ ECC values are equal */
+ return 0;
+ case 1:
+ /* Uncorrectable error */
+ DEBUG (MTD_DEBUG_LEVEL0, "ECC UNCORRECTED_ERROR 1\n");
+ return(-1);
+ case 12:
+ /* Correctable error */
+ find_byte = (ecc_bit[23] << 8) +
+ (ecc_bit[21] << 7) +
+ (ecc_bit[19] << 6) +
+ (ecc_bit[17] << 5) +
+ (ecc_bit[15] << 4) +
+ (ecc_bit[13] << 3) +
+ (ecc_bit[11] << 2) +
+ (ecc_bit[9] << 1) +
+ ecc_bit[7];
+
+ find_bit = (ecc_bit[5] << 2) + (ecc_bit[3] << 1) + ecc_bit[1];
+
+ DEBUG (MTD_DEBUG_LEVEL0, "Correcting single bit ECC error at offset: %d, bit: %d\n", find_byte, find_bit);
+
+ page_data[find_byte] ^= (1 << find_bit);
+
+ return(0);
+ default:
+ if (is_ecc_ff) {
+ if (ecc_calc[0] == 0 && ecc_calc[1] == 0 && ecc_calc[2] == 0)
+ return(0);
+ }
+ DEBUG (MTD_DEBUG_LEVEL0, "UNCORRECTED_ERROR default\n");
+ return(-1);
+ }
+}
+
+static int nand_davinci_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
+{
+ struct nand_chip *this;
+ int block_count = 0, i, rc;
+
+ this = mtd->priv;
+ block_count = (this->eccmode == NAND_ECC_HW12_2048) ? 4 : 1;
+ for (i = 0; i < block_count; i++) {
+ if (memcmp(read_ecc, calc_ecc, 3) != 0) {
+ rc = nand_davinci_compare_ecc(read_ecc, calc_ecc, dat);
+ if (rc < 0) {
+ return(rc);
+ }
+ }
+ read_ecc += 3;
+ calc_ecc += 3;
+ dat += 512;
+ }
+ return(0);
+}
+#endif
+
+static int nand_davinci_dev_ready(struct mtd_info *mtd)
+{
+ emifregs emif_addr;
+
+ emif_addr = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
+
+ return(emif_addr->NANDFSR & 0x1);
+}
+
+static int nand_davinci_waitfunc(struct mtd_info *mtd, struct nand_chip *this, int state)
+{
+ while(!nand_davinci_dev_ready(mtd)) {;}
+ *NAND_CE0CLE = NAND_STATUS;
+ return(*NAND_CE0DATA);
+}
+
+static void nand_flash_init(void)
+{
+ u_int32_t acfg1 = 0x3ffffffc;
+ u_int32_t acfg2 = 0x3ffffffc;
+ u_int32_t acfg3 = 0x3ffffffc;
+ u_int32_t acfg4 = 0x3ffffffc;
+ emifregs emif_regs;
+
+ /*------------------------------------------------------------------*
+ * NAND FLASH CHIP TIMEOUT @ 459 MHz *
+ * *
+ * AEMIF.CLK freq = PLL1/6 = 459/6 = 76.5 MHz *
+ * AEMIF.CLK period = 1/76.5 MHz = 13.1 ns *
+ * *
+ *------------------------------------------------------------------*/
+ acfg1 = 0
+ | (0 << 31 ) /* selectStrobe */
+ | (0 << 30 ) /* extWait */
+ | (1 << 26 ) /* writeSetup 10 ns */
+ | (3 << 20 ) /* writeStrobe 40 ns */
+ | (1 << 17 ) /* writeHold 10 ns */
+ | (1 << 13 ) /* readSetup 10 ns */
+ | (5 << 7 ) /* readStrobe 60 ns */
+ | (1 << 4 ) /* readHold 10 ns */
+ | (3 << 2 ) /* turnAround ?? ns */
+ | (0 << 0 ) /* asyncSize 8-bit bus */
+ ;
+
+ emif_regs = (emifregs)DAVINCI_ASYNC_EMIF_CNTRL_BASE;
+
+ emif_regs->AWCCR |= 0x10000000;
+ emif_regs->AB1CR = acfg1; /* 0x08244128 */;
+ emif_regs->AB2CR = acfg2;
+ emif_regs->AB3CR = acfg3;
+ emif_regs->AB4CR = acfg4;
+ emif_regs->NANDFCR = 0x00000101;
+}
+
+int board_nand_init(struct nand_chip *nand)
+{
+ nand->IO_ADDR_R = (void __iomem *)NAND_CE0DATA;
+ nand->IO_ADDR_W = (void __iomem *)NAND_CE0DATA;
+ nand->chip_delay = 0;
+ nand->select_chip = nand_davinci_select_chip;
+#ifdef CFG_NAND_USE_FLASH_BBT
+ nand->options = NAND_USE_FLASH_BBT;
+#endif
+#ifdef CFG_NAND_HW_ECC
+#ifdef CFG_NAND_LARGEPAGE
+ nand->eccmode = NAND_ECC_HW12_2048;
+#elif defined(CFG_NAND_SMALLPAGE)
+ nand->eccmode = NAND_ECC_HW3_512;
+#else
+#error "Either CFG_NAND_LARGEPAGE or CFG_NAND_SMALLPAGE must be defined!"
+#endif
+ nand->autooob = &davinci_nand_oobinfo;
+ nand->calculate_ecc = nand_davinci_calculate_ecc;
+ nand->correct_data = nand_davinci_correct_data;
+ nand->enable_hwecc = nand_davinci_enable_hwecc;
+#else
+ nand->eccmode = NAND_ECC_SOFT;
+#endif
+
+ /* Set address of hardware control function */
+ nand->hwcontrol = nand_davinci_hwcontrol;
+
+ nand->dev_ready = nand_davinci_dev_ready;
+ nand->waitfunc = nand_davinci_waitfunc;
+
+ nand_flash_init();
+
+ return(0);
+}
+
+#else
+#error "U-Boot legacy NAND support not available for DaVinci chips"
+#endif
+#endif /* CFG_USE_NAND */
diff --git a/cpu/arm926ejs/davinci/reset.S b/cpu/arm926ejs/davinci/reset.S
new file mode 100644
index 0000000..a687d44
--- /dev/null
+++ b/cpu/arm926ejs/davinci/reset.S
@@ -0,0 +1,77 @@
+/*
+ * Processor reset using WDT for TI TMS320DM644x SoC.
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * -----------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+.globl reset_cpu
+reset_cpu:
+ ldr r0, WDT_TGCR
+ mov r1, $0x08
+ str r1, [r0]
+ ldr r1, [r0]
+ orr r1, r1, $0x03
+ str r1, [r0]
+ mov r1, $0
+ ldr r0, WDT_TIM12
+ str r1, [r0]
+ ldr r0, WDT_TIM34
+ str r1, [r0]
+ ldr r0, WDT_PRD12
+ str r1, [r0]
+ ldr r0, WDT_PRD34
+ str r1, [r0]
+ ldr r0, WDT_TCR
+ ldr r1, [r0]
+ orr r1, r1, $0x40
+ str r1, [r0]
+ ldr r0, WDT_WDTCR
+ ldr r1, [r0]
+ orr r1, r1, $0x4000
+ str r1, [r0]
+ ldr r1, WDTCR_VAL1
+ str r1, [r0]
+ ldr r1, WDTCR_VAL2
+ str r1, [r0]
+ nop
+ nop
+ nop
+ nop
+reset_cpu_loop:
+ b reset_cpu_loop
+
+WDT_TGCR:
+ .word 0x01c21c24
+WDT_TIM12:
+ .word 0x01c21c10
+WDT_TIM34:
+ .word 0x01c21c14
+WDT_PRD12:
+ .word 0x01c21c18
+WDT_PRD34:
+ .word 0x01c21c1c
+WDT_TCR:
+ .word 0x01c21c20
+WDT_WDTCR:
+ .word 0x01c21c28
+WDTCR_VAL1:
+ .word 0xa5c64000
+WDTCR_VAL2:
+ .word 0xda7e4000
diff --git a/cpu/arm926ejs/davinci/timer.c b/cpu/arm926ejs/davinci/timer.c
new file mode 100644
index 0000000..c6b1dda
--- /dev/null
+++ b/cpu/arm926ejs/davinci/timer.c
@@ -0,0 +1,165 @@
+/*
+ * (C) Copyright 2003
+ * Texas Instruments <www.ti.com>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Alex Zuepke <azu@sysgo.de>
+ *
+ * (C) Copyright 2002-2004
+ * Gary Jennejohn, DENX Software Engineering, <gj@denx.de>
+ *
+ * (C) Copyright 2004
+ * Philippe Robin, ARM Ltd. <philippe.robin@arm.com>
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <arm926ejs.h>
+
+typedef volatile struct {
+ u_int32_t pid12;
+ u_int32_t emumgt_clksped;
+ u_int32_t gpint_en;
+ u_int32_t gpdir_dat;
+ u_int32_t tim12;
+ u_int32_t tim34;
+ u_int32_t prd12;
+ u_int32_t prd34;
+ u_int32_t tcr;
+ u_int32_t tgcr;
+ u_int32_t wdtcr;
+ u_int32_t tlgc;
+ u_int32_t tlmr;
+} davinci_timer;
+
+davinci_timer *timer = (davinci_timer *)CFG_TIMERBASE;
+
+#define TIMER_LOAD_VAL (CFG_HZ_CLOCK / CFG_HZ)
+#define READ_TIMER timer->tim34
+
+static ulong timestamp;
+static ulong lastinc;
+
+int timer_init(void)
+{
+ /* We are using timer34 in unchained 32-bit mode, full speed */
+ timer->tcr = 0x0;
+ timer->tgcr = 0x0;
+ timer->tgcr = 0x06;
+ timer->tim34 = 0x0;
+ timer->prd34 = TIMER_LOAD_VAL;
+ lastinc = 0;
+ timer->tcr = 0x80 << 16;
+ timestamp = 0;
+
+ return(0);
+}
+
+void reset_timer(void)
+{
+ reset_timer_masked();
+}
+
+ulong get_timer(ulong base)
+{
+ return(get_timer_masked() - base);
+}
+
+void set_timer(ulong t)
+{
+ timestamp = t;
+}
+
+void udelay(unsigned long usec)
+{
+ udelay_masked(usec);
+}
+
+void reset_timer_masked(void)
+{
+ lastinc = READ_TIMER;
+ timestamp = 0;
+}
+
+ulong get_timer_raw(void)
+{
+ ulong now = READ_TIMER;
+
+ if (now >= lastinc) {
+ /* normal mode */
+ timestamp += now - lastinc;
+ } else {
+ /* overflow ... */
+ timestamp += now + TIMER_LOAD_VAL - lastinc;
+ }
+ lastinc = now;
+ return timestamp;
+}
+
+ulong get_timer_masked(void)
+{
+ return(get_timer_raw() / TIMER_LOAD_VAL);
+}
+
+void udelay_masked(unsigned long usec)
+{
+ ulong tmo;
+ ulong endtime;
+ signed long diff;
+
+ tmo = CFG_HZ_CLOCK / 1000;
+ tmo *= usec;
+ tmo /= 1000;
+
+ endtime = get_timer_raw() + tmo;
+
+ do {
+ ulong now = get_timer_raw();
+ diff = endtime - now;
+ } while (diff >= 0);
+}
+
+/*
+ * This function is derived from PowerPC code (read timebase as long long).
+ * On ARM it just returns the timer value.
+ */
+unsigned long long get_ticks(void)
+{
+ return(get_timer(0));
+}
+
+/*
+ * This function is derived from PowerPC code (timebase clock frequency).
+ * On ARM it returns the number of timer ticks per second.
+ */
+ulong get_tbclk(void)
+{
+ ulong tbclk;
+
+ tbclk = CFG_HZ;
+ return(tbclk);
+}
diff --git a/cpu/at32ap/atmel_mci.c b/cpu/at32ap/atmel_mci.c
index 9f62c0f..cf48be1 100644
--- a/cpu/at32ap/atmel_mci.c
+++ b/cpu/at32ap/atmel_mci.c
@@ -56,6 +56,7 @@
#define MMC_DEFAULT_RCA 1
static unsigned int mmc_rca;
+static int mmc_card_is_sd;
static block_dev_desc_t mmc_blkdev;
block_dev_desc_t *mmc_get_dev(int dev)
@@ -82,7 +83,9 @@
blklen &= 0xfffc;
mmci_writel(MR, (MMCI_BF(CLKDIV, clkdiv)
- | MMCI_BF(BLKLEN, blklen)));
+ | MMCI_BF(BLKLEN, blklen)
+ | MMCI_BIT(RDPROOF)
+ | MMCI_BIT(WRPROOF)));
}
#define RESP_NO_CRC 1
@@ -225,7 +228,7 @@
*buffer++ = data;
wordcount++;
}
- } while(wordcount < (512 / 4));
+ } while(wordcount < (mmc_blkdev.blksz / 4));
pr_debug("mmc: read %u words, waiting for BLKE\n", wordcount);
@@ -243,7 +246,7 @@
fail:
mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, R1 | NCR);
- printf("mmc: bread failed, card status = ", card_status);
+ printf("mmc: bread failed, card status = %08x\n", card_status);
goto out;
}
@@ -371,6 +374,7 @@
mmc_rca = resp[0] >> 16;
if (verbose)
printf("SD Card detected (RCA %u)\n", mmc_rca);
+ mmc_card_is_sd = 1;
return 0;
}
@@ -405,10 +409,64 @@
return ret;
}
+static void mci_set_data_timeout(struct mmc_csd *csd)
+{
+ static const unsigned int dtomul_to_shift[] = {
+ 0, 4, 7, 8, 10, 12, 16, 20,
+ };
+ static const unsigned int taac_exp[] = {
+ 1, 10, 100, 1000, 10000, 100000, 1000000, 10000000,
+ };
+ static const unsigned int taac_mant[] = {
+ 0, 10, 12, 13, 15, 60, 25, 30,
+ 35, 40, 45, 50, 55, 60, 70, 80,
+ };
+ unsigned int timeout_ns, timeout_clks;
+ unsigned int e, m;
+ unsigned int dtocyc, dtomul;
+ unsigned int shift;
+ u32 dtor;
+
+ e = csd->taac & 0x07;
+ m = (csd->taac >> 3) & 0x0f;
+
+ timeout_ns = (taac_exp[e] * taac_mant[m] + 9) / 10;
+ timeout_clks = csd->nsac * 100;
+
+ timeout_clks += (((timeout_ns + 9) / 10)
+ * ((CFG_MMC_CLK_PP + 99999) / 100000) + 9999) / 10000;
+ if (!mmc_card_is_sd)
+ timeout_clks *= 10;
+ else
+ timeout_clks *= 100;
+
+ dtocyc = timeout_clks;
+ dtomul = 0;
+ while (dtocyc > 15 && dtomul < 8) {
+ dtomul++;
+ shift = dtomul_to_shift[dtomul];
+ dtocyc = (timeout_clks + (1 << shift) - 1) >> shift;
+ }
+
+ if (dtomul >= 8) {
+ dtomul = 7;
+ dtocyc = 15;
+ puts("Warning: Using maximum data timeout\n");
+ }
+
+ dtor = (MMCI_BF(DTOMUL, dtomul)
+ | MMCI_BF(DTOCYC, dtocyc));
+ mmci_writel(DTOR, dtor);
+
+ printf("mmc: Using %u cycles data timeout (DTOR=0x%x)\n",
+ dtocyc << shift, dtor);
+}
+
int mmc_init(int verbose)
{
struct mmc_cid cid;
struct mmc_csd csd;
+ unsigned int max_blksz;
int ret;
/* Initialize controller */
@@ -418,6 +476,8 @@
mmci_writel(IDR, ~0UL);
mci_set_mode(CFG_MMC_CLK_OD, MMC_DEFAULT_BLKLEN);
+ mmc_card_is_sd = 0;
+
ret = sd_init_card(&cid, verbose);
if (ret) {
mmc_rca = MMC_DEFAULT_RCA;
@@ -433,6 +493,8 @@
if (verbose)
mmc_dump_csd(&csd);
+ mci_set_data_timeout(&csd);
+
/* Initialize the blockdev structure */
mmc_blkdev.if_type = IF_TYPE_MMC;
mmc_blkdev.part_type = PART_TYPE_DOS;
@@ -444,7 +506,17 @@
sizeof(mmc_blkdev.product));
sprintf((char *)mmc_blkdev.revision, "%x %x",
cid.prv >> 4, cid.prv & 0x0f);
- mmc_blkdev.blksz = 1 << csd.read_bl_len;
+
+ /*
+ * If we can't use 512 byte blocks, refuse to deal with the
+ * card. Tons of code elsewhere seems to depend on this.
+ */
+ max_blksz = 1 << csd.read_bl_len;
+ if (max_blksz < 512 || (max_blksz > 512 && !csd.read_bl_partial)) {
+ printf("Card does not support 512 byte reads, aborting.\n");
+ return -ENODEV;
+ }
+ mmc_blkdev.blksz = 512;
mmc_blkdev.lba = (csd.c_size + 1) * (1 << (csd.c_size_mult + 2));
mci_set_mode(CFG_MMC_CLK_PP, mmc_blkdev.blksz);
diff --git a/cpu/at32ap/atmel_mci.h b/cpu/at32ap/atmel_mci.h
index 0ffbc4f..5b4f5c9 100644
--- a/cpu/at32ap/atmel_mci.h
+++ b/cpu/at32ap/atmel_mci.h
@@ -57,6 +57,10 @@
#define MMCI_CLKDIV_SIZE 8
#define MMCI_PWSDIV_OFFSET 8
#define MMCI_PWSDIV_SIZE 3
+#define MMCI_RDPROOF_OFFSET 11
+#define MMCI_RDPROOF_SIZE 1
+#define MMCI_WRPROOF_OFFSET 12
+#define MMCI_WRPROOF_SIZE 1
#define MMCI_PDCPADV_OFFSET 14
#define MMCI_PDCPADV_SIZE 1
#define MMCI_PDCMODE_OFFSET 15
diff --git a/cpu/at32ap/interrupts.c b/cpu/at32ap/interrupts.c
index c9e0499..bef1f30 100644
--- a/cpu/at32ap/interrupts.c
+++ b/cpu/at32ap/interrupts.c
@@ -20,8 +20,8 @@
* MA 02111-1307 USA
*/
#include <common.h>
+#include <div64.h>
-#include <asm/div64.h>
#include <asm/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
diff --git a/cpu/bf533/serial.c b/cpu/bf533/serial.c
index 6cab5da..8ac6e3f 100644
--- a/cpu/bf533/serial.c
+++ b/cpu/bf533/serial.c
@@ -76,7 +76,6 @@
void serial_setbrg(void)
{
int i;
- DECLARE_GLOBAL_DATA_PTR;
calc_baud();
diff --git a/cpu/bf537/i2c.c b/cpu/bf537/i2c.c
index 3b0d026..0daba63 100644
--- a/cpu/bf537/i2c.c
+++ b/cpu/bf537/i2c.c
@@ -22,6 +22,8 @@
#include <i2c.h>
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
#define bfin_read16(addr) ({ unsigned __v; \
__asm__ __volatile__ (\
"%0 = w[%1] (z);\n\t"\
@@ -68,7 +70,6 @@
#ifdef DEBUG_I2C
#define PRINTD(fmt,args...) do { \
- DECLARE_GLOBAL_DATA_PTR; \
if (gd->have_console) \
printf(fmt ,##args); \
} while (0)
diff --git a/cpu/bf537/serial.c b/cpu/bf537/serial.c
index e04d08a..f7a2483 100644
--- a/cpu/bf537/serial.c
+++ b/cpu/bf537/serial.c
@@ -52,6 +52,8 @@
#include <asm/io.h>
#include "serial.h"
+DECLARE_GLOBAL_DATA_PTR;
+
unsigned long pll_div_fact;
void calc_baud(void)
@@ -74,7 +76,6 @@
void serial_setbrg(void)
{
int i;
- DECLARE_GLOBAL_DATA_PTR;
calc_baud();
diff --git a/cpu/bf561/serial.c b/cpu/bf561/serial.c
index 7f5c695..bc5a4f5 100644
--- a/cpu/bf561/serial.c
+++ b/cpu/bf561/serial.c
@@ -52,6 +52,8 @@
#include "serial.h"
#include <asm/io.h>
+DECLARE_GLOBAL_DATA_PTR;
+
unsigned long pll_div_fact;
void calc_baud(void)
@@ -74,7 +76,6 @@
void serial_setbrg(void)
{
int i;
- DECLARE_GLOBAL_DATA_PTR;
calc_baud();
diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c
index e7299a7..baf35e5 100644
--- a/cpu/i386/serial.c
+++ b/cpu/i386/serial.c
@@ -394,7 +394,7 @@
#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
/*
AS HARNOIS : according to CONFIG_KGDB_SER_INDEX kgdb uses serial port
number 0 or number 1
@@ -500,4 +500,4 @@
return;
}
#endif /* (CONFIG_KGDB_SER_INDEX & 2) */
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/cpu/i386/start.S b/cpu/i386/start.S
index afcbb24..1a54dd1 100644
--- a/cpu/i386/start.S
+++ b/cpu/i386/start.S
@@ -149,7 +149,7 @@
.progress3:
/* clear bss section in ram, size must be 4-byte aligned */
- movl $_i386boot_bss_start, %eax /* BSS start */
+ movl $_i386boot_bss_start, %edi /* MK_CHG BSS start */
movl $_i386boot_bss_size, %ecx /* BSS size */
movl %ecx, %eax
andl $3, %eax
diff --git a/cpu/ixp/cpu.c b/cpu/ixp/cpu.c
index 7f9f334..2c7d5a0 100644
--- a/cpu/ixp/cpu.c
+++ b/cpu/ixp/cpu.c
@@ -85,7 +85,7 @@
FIQ_STACK_START = IRQ_STACK_START - CONFIG_STACKSIZE_IRQ;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_PCI) || defined (CONFIG_PCI)
+#if defined(CONFIG_CMD_PCI) || defined (CONFIG_PCI)
pci_init();
#endif
return 0;
diff --git a/cpu/ixp/npe/npe.c b/cpu/ixp/npe/npe.c
index ab7ca8b..7e4af44 100644
--- a/cpu/ixp/npe/npe.c
+++ b/cpu/ixp/npe/npe.c
@@ -682,7 +682,7 @@
eth_register(dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name, npe_miiphy_read, npe_miiphy_write);
#endif
diff --git a/cpu/mcf523x/Makefile b/cpu/mcf523x/Makefile
new file mode 100644
index 0000000..d0e9b45
--- /dev/null
+++ b/cpu/mcf523x/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+# CFLAGS += -DET_DEBUG
+
+LIB = lib$(CPU).a
+
+START = start.o
+COBJS = cpu.o speed.o cpu_init.o interrupts.o
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/mcf523x/config.mk b/cpu/mcf523x/config.mk
new file mode 100644
index 0000000..ba324a8
--- /dev/null
+++ b/cpu/mcf523x/config.mk
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+PLATFORM_CPPFLAGS += -m5307 -fPIC
diff --git a/cpu/mcf523x/cpu.c b/cpu/mcf523x/cpu.c
new file mode 100644
index 0000000..f0d954b
--- /dev/null
+++ b/cpu/mcf523x/cpu.c
@@ -0,0 +1,109 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <command.h>
+
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+ volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
+
+ ccm->rcr = CCM_RCR_SOFTRST;
+ /* we don't return! */
+ return 0;
+};
+
+int checkcpu(void)
+{
+ volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
+ u16 msk;
+ u16 id = 0;
+ u8 ver;
+
+ puts("CPU: ");
+ msk = (ccm->cir >> 6);
+ ver = (ccm->cir & 0x003f);
+ switch (msk) {
+ case 0x31:
+ id = 5235;
+ break;
+ }
+
+ if (id) {
+ printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
+ ver);
+ printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
+ (int)(gd->cpu_clk / 1000000),
+ (int)(gd->bus_clk / 1000000));
+ }
+
+ return 0;
+};
+
+#if defined(CONFIG_WATCHDOG)
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+
+ wdp->sr = 0x5555; /* Count register */
+ asm("nop");
+ wdp->sr = 0xAAAA; /* Count register */
+}
+
+int watchdog_disable(void)
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+
+ /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
+ wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
+
+ puts("WATCHDOG:disabled\n");
+ return (0);
+}
+
+int watchdog_init(void)
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+ u32 wdog_module = 0;
+
+ /* set timeout and enable watchdog */
+ wdog_module = ((CFG_CLK / CFG_HZ) * CONFIG_WATCHDOG_TIMEOUT);
+ wdog_module |= (wdog_module / 8192);
+ wdp->mr = wdog_module;
+
+ wdp->cr = WTM_WCR_EN;
+ puts("WATCHDOG:enabled\n");
+
+ return (0);
+}
+#endif /* CONFIG_WATCHDOG */
diff --git a/cpu/mcf523x/cpu_init.c b/cpu/mcf523x/cpu_init.c
new file mode 100644
index 0000000..55c9cd3
--- /dev/null
+++ b/cpu/mcf523x/cpu_init.c
@@ -0,0 +1,145 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+
+#include <asm/immap.h>
+
+/*
+ * Breath some life into the CPU...
+ *
+ * Set up the memory map,
+ * initialize a bunch of registers,
+ * initialize the UPM's
+ */
+void cpu_init_f(void)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+ volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
+ volatile wdog_t *wdog = (wdog_t *) MMAP_WDOG;
+ volatile scm_t *scm = (scm_t *) MMAP_SCM;
+
+ /* watchdog is enabled by default - disable the watchdog */
+#ifndef CONFIG_WATCHDOG
+ wdog->cr = 0;
+#endif
+
+ scm->rambar = (CFG_INIT_RAM_ADDR | SCM_RAMBAR_BDE);
+
+ /* Port configuration */
+ gpio->par_cs = 0;
+
+#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL))
+ fbcs->csar0 = CFG_CS0_BASE;
+ fbcs->cscr0 = CFG_CS0_CTRL;
+ fbcs->csmr0 = CFG_CS0_MASK;
+#endif
+
+#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS1;
+ fbcs->csar1 = CFG_CS1_BASE;
+ fbcs->cscr1 = CFG_CS1_CTRL;
+ fbcs->csmr1 = CFG_CS1_MASK;
+#endif
+
+#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS2;
+ fbcs->csar2 = CFG_CS2_BASE;
+ fbcs->cscr2 = CFG_CS2_CTRL;
+ fbcs->csmr2 = CFG_CS2_MASK;
+#endif
+
+#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS3;
+ fbcs->csar3 = CFG_CS3_BASE;
+ fbcs->cscr3 = CFG_CS3_CTRL;
+ fbcs->csmr3 = CFG_CS3_MASK;
+#endif
+
+#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS4;
+ fbcs->csar4 = CFG_CS4_BASE;
+ fbcs->cscr4 = CFG_CS4_CTRL;
+ fbcs->csmr4 = CFG_CS4_MASK;
+#endif
+
+#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS5;
+ fbcs->csar5 = CFG_CS5_BASE;
+ fbcs->cscr5 = CFG_CS5_CTRL;
+ fbcs->csmr5 = CFG_CS5_MASK;
+#endif
+
+#if (defined(CFG_CS6_BASE) && defined(CFG_CS6_MASK) && defined(CFG_CS6_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS6;
+ fbcs->csar6 = CFG_CS6_BASE;
+ fbcs->cscr6 = CFG_CS6_CTRL;
+ fbcs->csmr6 = CFG_CS6_MASK;
+#endif
+
+#if (defined(CFG_CS7_BASE) && defined(CFG_CS7_MASK) && defined(CFG_CS7_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS_CS7;
+ fbcs->csar7 = CFG_CS7_BASE;
+ fbcs->cscr7 = CFG_CS7_CTRL;
+ fbcs->csmr7 = CFG_CS7_MASK;
+#endif
+
+#ifdef CONFIG_FSL_I2C
+ gpio->par_feci2c &= ~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK);
+ gpio->par_feci2c |= (GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA);
+#endif
+
+ icache_enable();
+}
+
+/*
+ * initialize higher level parts of CPU like timers
+ */
+int cpu_init_r(void)
+{
+ return (0);
+}
+
+void uart_port_conf(void)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ gpio->par_uart = (GPIO_PAR_UART_U0RXD | GPIO_PAR_UART_U0TXD);
+ break;
+ case 1:
+ gpio->par_uart =
+ (GPIO_PAR_UART_U1RXD_U1RXD | GPIO_PAR_UART_U1TXD_U1TXD);
+ break;
+ case 2:
+ gpio->par_timer = (GPIO_PAR_UART_U2RXD | GPIO_PAR_UART_U2TXD);
+ break;
+ }
+}
diff --git a/cpu/mcf523x/interrupts.c b/cpu/mcf523x/interrupts.c
new file mode 100644
index 0000000..125c53b
--- /dev/null
+++ b/cpu/mcf523x/interrupts.c
@@ -0,0 +1,49 @@
+/*
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* CPU specific interrupt routine */
+#include <common.h>
+#include <asm/immap.h>
+
+int interrupt_init(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ /* Make sure all interrupts are disabled */
+ intp->imrl0 |= 0x1;
+
+ enable_interrupts();
+ return 0;
+}
+
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
+ intp->imrl0 &= ~INTC_IPRL_INT0;
+ intp->imrl0 &= ~CFG_TMRINTR_MASK;
+}
+#endif
diff --git a/cpu/mcf523x/speed.c b/cpu/mcf523x/speed.c
new file mode 100644
index 0000000..247d318
--- /dev/null
+++ b/cpu/mcf523x/speed.c
@@ -0,0 +1,49 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+/*
+ * get_clocks() fills in gd->cpu_clock and gd->bus_clk
+ */
+int get_clocks(void)
+{
+ volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
+
+ pll->syncr = PLL_SYNCR_MFD(1);
+
+ while (!(pll->synsr & PLL_SYNSR_LOCK));
+
+ gd->bus_clk = CFG_CLK;
+ gd->cpu_clk = (gd->bus_clk * 2);
+
+ return (0);
+}
diff --git a/cpu/mcf523x/start.S b/cpu/mcf523x/start.S
new file mode 100644
index 0000000..2bd603d
--- /dev/null
+++ b/cpu/mcf523x/start.S
@@ -0,0 +1,340 @@
+/*
+ * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include "version.h"
+
+#ifndef CONFIG_IDENT_STRING
+#define CONFIG_IDENT_STRING ""
+#endif
+
+#define _START _start
+#define _FAULT _fault
+
+#define SAVE_ALL \
+ move.w #0x2700,%sr; /* disable intrs */ \
+ subl #60,%sp; /* space for 15 regs */ \
+ moveml %d0-%d7/%a0-%a6,%sp@;
+
+#define RESTORE_ALL \
+ moveml %sp@,%d0-%d7/%a0-%a6; \
+ addl #60,%sp; /* space for 15 regs */ \
+ rte;
+
+.text
+/*
+ * Vector table. This is used for initial platform startup.
+ * These vectors are to catch any un-intended traps.
+ */
+_vectors:
+
+INITSP: .long 0x00000000 /* Initial SP */
+INITPC: .long _START /* Initial PC */
+vector02: .long _FAULT /* Access Error */
+vector03: .long _FAULT /* Address Error */
+vector04: .long _FAULT /* Illegal Instruction */
+vector05: .long _FAULT /* Reserved */
+vector06: .long _FAULT /* Reserved */
+vector07: .long _FAULT /* Reserved */
+vector08: .long _FAULT /* Privilege Violation */
+vector09: .long _FAULT /* Trace */
+vector0A: .long _FAULT /* Unimplemented A-Line */
+vector0B: .long _FAULT /* Unimplemented F-Line */
+vector0C: .long _FAULT /* Debug Interrupt */
+vector0D: .long _FAULT /* Reserved */
+vector0E: .long _FAULT /* Format Error */
+vector0F: .long _FAULT /* Unitialized Int. */
+
+/* Reserved */
+vector10_17:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector18: .long _FAULT /* Spurious Interrupt */
+vector19: .long _FAULT /* Autovector Level 1 */
+vector1A: .long _FAULT /* Autovector Level 2 */
+vector1B: .long _FAULT /* Autovector Level 3 */
+vector1C: .long _FAULT /* Autovector Level 4 */
+vector1D: .long _FAULT /* Autovector Level 5 */
+vector1E: .long _FAULT /* Autovector Level 6 */
+vector1F: .long _FAULT /* Autovector Level 7 */
+
+/* TRAP #0 - #15 */
+vector20_2F:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+/* Reserved */
+vector30_3F:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector64_127:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector128_191:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector192_255:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+ .text
+
+ .globl _start
+_start:
+ nop
+ nop
+ move.w #0x2700,%sr /* Mask off Interrupt */
+
+ /* Set vector base register at the beginning of the Flash */
+ move.l #CFG_FLASH_BASE, %d0
+ movec %d0, %VBR
+
+ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
+ movec %d0, %RAMBAR1
+
+ /* invalidate and disable cache */
+ move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ nop
+ move.l #0, %d0
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+
+ /* initialize general use internal ram */
+ move.l #0, %d0
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a2
+ move.l %d0, (%a1)
+ move.l %d0, (%a2)
+
+ /* set stackpointer to end of internal ram to get some stackspace for the
+ first c-code */
+ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
+ clr.l %sp@-
+
+ move.l #__got_start, %a5 /* put relocation table address to a5 */
+
+ bsr cpu_init_f /* run low-level CPU init code (from flash) */
+ bsr board_init_f /* run low-level board init code (from flash) */
+
+ /* board_init_f() does not return */
+
+/*------------------------------------------------------------------------------*/
+
+/*
+ * void relocate_code (addr_sp, gd, addr_moni)
+ *
+ * This "function" does not return, instead it continues in RAM
+ * after relocating the monitor code.
+ *
+ * r3 = dest
+ * r4 = src
+ * r5 = length in bytes
+ * r6 = cachelinesize
+ */
+ .globl relocate_code
+relocate_code:
+ link.w %a6,#0
+ move.l 8(%a6), %sp /* set new stack pointer */
+
+ move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
+ move.l 16(%a6), %a0 /* Save copy of Destination Address */
+
+ move.l #CFG_MONITOR_BASE, %a1
+ move.l #__init_end, %a2
+ move.l %a0, %a3
+
+ /* copy the code to RAM */
+1:
+ move.l (%a1)+, (%a3)+
+ cmp.l %a1,%a2
+ bgt.s 1b
+
+/*
+ * We are done. Do not return, instead branch to second part of board
+ * initialization, now running from RAM.
+ */
+ move.l %a0, %a1
+ add.l #(in_ram - CFG_MONITOR_BASE), %a1
+ jmp (%a1)
+
+in_ram:
+
+clear_bss:
+ /*
+ * Now clear BSS segment
+ */
+ move.l %a0, %a1
+ add.l #(_sbss - CFG_MONITOR_BASE),%a1
+ move.l %a0, %d1
+ add.l #(_ebss - CFG_MONITOR_BASE),%d1
+6:
+ clr.l (%a1)+
+ cmp.l %a1,%d1
+ bgt.s 6b
+
+ /*
+ * fix got table in RAM
+ */
+ move.l %a0, %a1
+ add.l #(__got_start - CFG_MONITOR_BASE),%a1
+ move.l %a1,%a5 /* * fix got pointer register a5 */
+
+ move.l %a0, %a2
+ add.l #(__got_end - CFG_MONITOR_BASE),%a2
+
+7:
+ move.l (%a1),%d1
+ sub.l #_start,%d1
+ add.l %a0,%d1
+ move.l %d1,(%a1)+
+ cmp.l %a2, %a1
+ bne 7b
+
+ /* calculate relative jump to board_init_r in ram */
+ move.l %a0, %a1
+ add.l #(board_init_r - CFG_MONITOR_BASE), %a1
+
+ /* set parameters for board_init_r */
+ move.l %a0,-(%sp) /* dest_addr */
+ move.l %d0,-(%sp) /* gd */
+ jsr (%a1)
+
+/*------------------------------------------------------------------------------*/
+/* exception code */
+ .globl _fault
+_fault:
+ jmp _fault
+ .globl _exc_handler
+
+_exc_handler:
+ SAVE_ALL
+ movel %sp,%sp@-
+ bsr exc_handler
+ addql #4,%sp
+ RESTORE_ALL
+
+ .globl _int_handler
+_int_handler:
+ SAVE_ALL
+ movel %sp,%sp@-
+ bsr int_handler
+ addql #4,%sp
+ RESTORE_ALL
+
+/*------------------------------------------------------------------------------*/
+/* cache functions */
+ .globl icache_enable
+icache_enable:
+ move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ nop
+ move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
+ movec %d0, %ACR0 /* Enable cache */
+ move.l #(CFG_FLASH_BASE + 0xc000), %d0 /* Setup cache mask */
+ movec %d0, %ACR1 /* Enable cache */
+
+ move.l #0x80400100, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable cache */
+ nop
+
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl icache_disable
+icache_disable:
+ move.l #0x00000100, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Disable cache */
+ clr.l %d0 /* Setup cache mask */
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ moveq #0, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl icache_status
+icache_status:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ move.l (%a1), %d0
+ rts
+
+ .globl icache_invalid
+icache_invalid:
+ move.l #0x80600100, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable cache */
+ nop
+ rts
+
+ .globl dcache_enable
+dcache_enable:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+
+ /* No dcache, just a dummy function */
+ .globl dcache_disable
+dcache_disable:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+ moveq #0, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl dcache_status
+dcache_status:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+ move.l (%a1), %d0
+ rts
+
+/*------------------------------------------------------------------------------*/
+
+ .globl version_string
+version_string:
+ .ascii U_BOOT_VERSION
+ .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii CONFIG_IDENT_STRING, "\0"
diff --git a/cpu/mcf52x2/Makefile b/cpu/mcf52x2/Makefile
index 70d57cf..937cdd0 100644
--- a/cpu/mcf52x2/Makefile
+++ b/cpu/mcf52x2/Makefile
@@ -27,8 +27,8 @@
LIB = $(obj)lib$(CPU).a
-START =
-COBJS = serial.o interrupts.o cpu.o speed.o cpu_init.o fec.o
+START = start.o
+COBJS = interrupts.o cpu.o speed.o cpu_init.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mcf52x2/cpu.c b/cpu/mcf52x2/cpu.c
index ce59d39..71ea408 100644
--- a/cpu/mcf52x2/cpu.c
+++ b/cpu/mcf52x2/cpu.c
@@ -28,33 +28,15 @@
#include <common.h>
#include <watchdog.h>
#include <command.h>
+#include <asm/immap.h>
#ifdef CONFIG_M5271
-#include <asm/immap_5271.h>
-#include <asm/m5271.h>
-#endif
-
-#ifdef CONFIG_M5272
-#include <asm/immap_5272.h>
-#include <asm/m5272.h>
-#endif
-
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
-#include <asm/immap_5282.h>
-#endif
-
-#ifdef CONFIG_M5249
-#include <asm/m5249.h>
-#endif
-
-#ifdef CONFIG_M5271
/*
* Both MCF5270 and MCF5271 are members of the MPC5271 family. Try to
* determine which one we are running on, based on the Chip Identification
* Register (CIR).
*/
-int checkcpu (void)
+int checkcpu(void)
{
char buf[32];
unsigned short cir; /* Chip Identification Register */
@@ -80,156 +62,194 @@
if (cpu_model)
printf("CPU: Freescale ColdFire MCF%s rev. %hu, at %s MHz\n",
- cpu_model, prn, strmhz(buf, CFG_CLK));
+ cpu_model, prn, strmhz(buf, CFG_CLK));
else
printf("CPU: Unknown - Freescale ColdFire MCF5271 family"
- " (PIN: 0x%x) rev. %hu, at %s MHz\n",
- pin, prn, strmhz(buf, CFG_CLK));
+ " (PIN: 0x%x) rev. %hu, at %s MHz\n",
+ pin, prn, strmhz(buf, CFG_CLK));
return 0;
}
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
mbar_writeByte(MCF_RCM_RCR,
- MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
+ MCF_RCM_RCR_SOFTRST | MCF_RCM_RCR_FRCRSTOUT);
return 0;
};
#if defined(CONFIG_WATCHDOG)
-void watchdog_reset (void)
+void watchdog_reset(void)
{
mbar_writeShort(MCF_WTM_WSR, 0x5555);
mbar_writeShort(MCF_WTM_WSR, 0xAAAA);
}
-int watchdog_disable (void)
+int watchdog_disable(void)
{
mbar_writeShort(MCF_WTM_WCR, 0);
return (0);
}
-int watchdog_init (void)
+int watchdog_init(void)
{
mbar_writeShort(MCF_WTM_WCR, MCF_WTM_WCR_EN);
return (0);
}
-#endif /* #ifdef CONFIG_WATCHDOG */
+#endif /* #ifdef CONFIG_WATCHDOG */
#endif
#ifdef CONFIG_M5272
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
- volatile wdog_t * wdp = (wdog_t *)(CFG_MBAR + MCFSIM_WRRR);
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
wdp->wdog_wrrr = 0;
- udelay (1000);
+ udelay(1000);
/* enable watchdog, set timeout to 0 and wait */
wdp->wdog_wrrr = 1;
- while (1);
+ while (1) ;
/* we don't return! */
return 0;
};
-int checkcpu(void) {
- ulong *dirp = (ulong *)(CFG_MBAR + MCFSIM_DIR);
+int checkcpu(void)
+{
+ volatile sysctrl_t *sysctrl = (sysctrl_t *) (MMAP_CFG);
uchar msk;
- char *suf;
+ char *suf;
- puts ("CPU: ");
- msk = (*dirp > 28) & 0xf;
+ puts("CPU: ");
+ msk = (sysctrl->sc_dir > 28) & 0xf;
switch (msk) {
- case 0x2: suf = "1K75N"; break;
- case 0x4: suf = "3K75N"; break;
- default:
- suf = NULL;
- printf ("Freescale MCF5272 (Mask:%01x)\n", msk);
- break;
- }
+ case 0x2:
+ suf = "1K75N";
+ break;
+ case 0x4:
+ suf = "3K75N";
+ break;
+ default:
+ suf = NULL;
+ printf("Freescale MCF5272 (Mask:%01x)\n", msk);
+ break;
+ }
if (suf)
- printf ("Freescale MCF5272 %s\n", suf);
+ printf("Freescale MCF5272 %s\n", suf);
return 0;
};
#if defined(CONFIG_WATCHDOG)
/* Called by macro WATCHDOG_RESET */
-void watchdog_reset (void)
+void watchdog_reset(void)
{
- volatile immap_t * regp = (volatile immap_t *)CFG_MBAR;
- regp->wdog_reg.wdog_wcr = 0;
+ volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
+ wdt->wdog_wcr = 0;
}
-int watchdog_disable (void)
+int watchdog_disable(void)
{
- volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
+ volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
- regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
- regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
- regp->wdog_reg.wdog_wrrr = 0; /* disable watchdog timer */
+ wdt->wdog_wcr = 0; /* reset watchdog counter */
+ wdt->wdog_wirr = 0; /* disable watchdog interrupt */
+ wdt->wdog_wrrr = 0; /* disable watchdog timer */
- puts ("WATCHDOG:disabled\n");
+ puts("WATCHDOG:disabled\n");
return (0);
}
-int watchdog_init (void)
+int watchdog_init(void)
{
- volatile immap_t *regp = (volatile immap_t *)CFG_MBAR;
+ volatile wdog_t *wdt = (volatile wdog_t *)(MMAP_WDOG);
- regp->wdog_reg.wdog_wirr = 0; /* disable watchdog interrupt */
+ wdt->wdog_wirr = 0; /* disable watchdog interrupt */
/* set timeout and enable watchdog */
- regp->wdog_reg.wdog_wrrr = ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
- regp->wdog_reg.wdog_wcr = 0; /* reset watchdog counter */
+ wdt->wdog_wrrr =
+ ((CONFIG_WATCHDOG_TIMEOUT * CFG_HZ) / (32768 * 1000)) - 1;
+ wdt->wdog_wcr = 0; /* reset watchdog counter */
- puts ("WATCHDOG:enabled\n");
+ puts("WATCHDOG:enabled\n");
return (0);
}
-#endif /* #ifdef CONFIG_WATCHDOG */
+#endif /* #ifdef CONFIG_WATCHDOG */
-#endif /* #ifdef CONFIG_M5272 */
-
+#endif /* #ifdef CONFIG_M5272 */
#ifdef CONFIG_M5282
-int checkcpu (void)
+int checkcpu(void)
{
unsigned char resetsource = MCFRESET_RSR;
- printf ("CPU: Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
- MCFCCM_CIR>>8,MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
- printf ("Reset:%s%s%s%s%s%s%s\n",
- (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
- (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
- (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
- (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
- (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
- (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
- (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : ""
- );
+ printf("CPU: Freescale Coldfire MCF5282 (PIN: %2.2x REV: %2.2x)\n",
+ MCFCCM_CIR >> 8, MCFCCM_CIR & MCFCCM_CIR_PRN_MASK);
+ printf("Reset:%s%s%s%s%s%s%s\n",
+ (resetsource & MCFRESET_RSR_LOL) ? " Loss of Lock" : "",
+ (resetsource & MCFRESET_RSR_LOC) ? " Loss of Clock" : "",
+ (resetsource & MCFRESET_RSR_EXT) ? " External" : "",
+ (resetsource & MCFRESET_RSR_POR) ? " Power On" : "",
+ (resetsource & MCFRESET_RSR_WDR) ? " Watchdog" : "",
+ (resetsource & MCFRESET_RSR_SOFT) ? " Software" : "",
+ (resetsource & MCFRESET_RSR_LVD) ? " Low Voltage" : "");
return 0;
}
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
{
MCFRESET_RCR = MCFRESET_RCR_SOFTRST;
return 0;
};
#endif
-#ifdef CONFIG_M5249 /* test-only: todo... */
-int checkcpu (void)
+#ifdef CONFIG_M5249
+int checkcpu(void)
{
char buf[32];
- printf ("CPU: Freescale Coldfire MCF5249 at %s MHz\n", strmhz(buf, CFG_CLK));
+ printf("CPU: Freescale Coldfire MCF5249 at %s MHz\n",
+ strmhz(buf, CFG_CLK));
return 0;
}
-int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) {
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
/* enable watchdog, set timeout to 0 and wait */
mbar_writeByte(MCFSIM_SYPCR, 0xc0);
- while (1);
+ while (1) ;
+
+ /* we don't return! */
+ return 0;
+};
+#endif
+
+#ifdef CONFIG_M5253
+int checkcpu(void)
+{
+ char buf[32];
+
+ unsigned char resetsource = mbar_readLong(SIM_RSR);
+ printf("CPU: Freescale Coldfire MCF5253 at %s MHz\n",
+ strmhz(buf, CFG_CLK));
+
+ if ((resetsource & SIM_RSR_HRST) || (resetsource & SIM_RSR_SWTR)) {
+ printf("Reset:%s%s\n",
+ (resetsource & SIM_RSR_HRST) ? " Hardware/ System Reset"
+ : "",
+ (resetsource & SIM_RSR_SWTR) ? " Software Watchdog" :
+ "");
+ }
+ return 0;
+}
+
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+ /* enable watchdog, set timeout to 0 and wait */
+ mbar_writeByte(SIM_SYPCR, 0xc0);
+ while (1) ;
/* we don't return! */
return 0;
diff --git a/cpu/mcf52x2/cpu_init.c b/cpu/mcf52x2/cpu_init.c
index 1748ea9..458b85e 100644
--- a/cpu/mcf52x2/cpu_init.c
+++ b/cpu/mcf52x2/cpu_init.c
@@ -6,6 +6,10 @@
* (C) Copyright 2005
* BuS Elektronik GmbH & Co. KG <esw@bus-elektronik.de>
*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ * Hayden Fraser (Hayden.Fraser@freescale.com)
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -27,28 +31,78 @@
#include <common.h>
#include <watchdog.h>
+#include <asm/immap.h>
-#ifdef CONFIG_M5271
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
-#endif
+#if defined(CONFIG_M5253)
+/*
+ * Breath some life into the CPU...
+ *
+ * Set up the memory map,
+ * initialize a bunch of registers,
+ * initialize the UPM's
+ */
+void cpu_init_f(void)
+{
+ mbar_writeByte(MCFSIM_MPARK, 0x40); /* 5249 Internal Core takes priority over DMA */
+ mbar_writeByte(MCFSIM_SYPCR, 0x00);
+ mbar_writeByte(MCFSIM_SWIVR, 0x0f);
+ mbar_writeByte(MCFSIM_SWSR, 0x00);
+ mbar_writeByte(MCFSIM_SWDICR, 0x00);
+ mbar_writeByte(MCFSIM_TIMER1ICR, 0x00);
+ mbar_writeByte(MCFSIM_TIMER2ICR, 0x88);
+ mbar_writeByte(MCFSIM_I2CICR, 0x00);
+ mbar_writeByte(MCFSIM_UART1ICR, 0x00);
+ mbar_writeByte(MCFSIM_UART2ICR, 0x00);
+ mbar_writeByte(MCFSIM_ICR6, 0x00);
+ mbar_writeByte(MCFSIM_ICR7, 0x00);
+ mbar_writeByte(MCFSIM_ICR8, 0x00);
+ mbar_writeByte(MCFSIM_ICR9, 0x00);
+ mbar_writeByte(MCFSIM_QSPIICR, 0x00);
-#ifdef CONFIG_M5272
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-#endif
+ mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080);
+ mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
+ mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
-#include <asm/immap_5282.h>
-#endif
+ /*mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); */ /* Enable a 1 cycle pre-drive cycle on CS1 */
-#ifdef CONFIG_M5249
-#include <asm/m5249.h>
-#endif
+ /*
+ * Setup chip selects...
+ */
+
+ mbar_writeShort(MCFSIM_CSAR1, CFG_CSAR1);
+ mbar_writeShort(MCFSIM_CSCR1, CFG_CSCR1);
+ mbar_writeLong(MCFSIM_CSMR1, CFG_CSMR1);
+
+ mbar_writeShort(MCFSIM_CSAR0, CFG_CSAR0);
+ mbar_writeShort(MCFSIM_CSCR0, CFG_CSCR0);
+ mbar_writeLong(MCFSIM_CSMR0, CFG_CSMR0);
+
+ /* enable instruction cache now */
+ icache_enable();
+}
+
+/*initialize higher level parts of CPU like timers */
+int cpu_init_r(void)
+{
+ return (0);
+}
+
+void uart_port_conf(void)
+{
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ break;
+ case 1:
+ break;
+ case 2:
+ break;
+ }
+}
+#endif /* #if defined(CONFIG_M5253) */
#if defined(CONFIG_M5271)
-void cpu_init_f (void)
+void cpu_init_f(void)
{
#ifndef CONFIG_WATCHDOG
/* Disable the watchdog if we aren't using it */
@@ -58,25 +112,35 @@
/* Set clockspeed to 100MHz */
mbar_writeShort(MCF_FMPLL_SYNCR,
MCF_FMPLL_SYNCR_MFD(0) | MCF_FMPLL_SYNCR_RFD(0));
- while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK);
-
- /* Enable UART pins */
- mbar_writeShort(MCF_GPIO_PAR_UART, MCF_GPIO_PAR_UART_U0TXD |
- MCF_GPIO_PAR_UART_U0RXD |
- MCF_GPIO_PAR_UART_U1RXD_UART1 |
- MCF_GPIO_PAR_UART_U1TXD_UART1);
-
- /* Enable Ethernet pins */
- mbar_writeByte(MCF_GPIO_PAR_FECI2C, CFG_FECI2C);
+ while (!mbar_readByte(MCF_FMPLL_SYNSR) & MCF_FMPLL_SYNSR_LOCK) ;
}
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r(void)
{
return (0);
}
+
+void uart_port_conf(void)
+{
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ mbar_writeShort(MCF_GPIO_PAR_UART, MCF_GPIO_PAR_UART_U0TXD |
+ MCF_GPIO_PAR_UART_U0RXD);
+ break;
+ case 1:
+ mbar_writeShort(MCF_GPIO_PAR_UART,
+ MCF_GPIO_PAR_UART_U1RXD_UART1 |
+ MCF_GPIO_PAR_UART_U1TXD_UART1);
+ break;
+ case 2:
+ mbar_writeShort(MCF_GPIO_PAR_UART, 0x3000);
+ break;
+ }
+}
#endif
#if defined(CONFIG_M5272)
@@ -87,69 +151,68 @@
* initialize a bunch of registers,
* initialize the UPM's
*/
-void cpu_init_f (void)
+void cpu_init_f(void)
{
/* if we come from RAM we assume the CPU is
* already initialized.
*/
#ifndef CONFIG_MONITOR_IS_IN_RAM
- volatile immap_t *regp = (immap_t *)CFG_MBAR;
+ volatile sysctrl_t *sysctrl = (sysctrl_t *) (CFG_MBAR);
+ volatile gpio_t *gpio = (gpio_t *) (MMAP_GPIO);
+ volatile csctrl_t *csctrl = (csctrl_t *) (MMAP_FBCS);
- volatile unsigned char *mbar;
- mbar = (volatile unsigned char *) CFG_MBAR;
-
- regp->sysctrl_reg.sc_scr = CFG_SCR;
- regp->sysctrl_reg.sc_spr = CFG_SPR;
+ sysctrl->sc_scr = CFG_SCR;
+ sysctrl->sc_spr = CFG_SPR;
/* Setup Ports: */
- regp->gpio_reg.gpio_pacnt = CFG_PACNT;
- regp->gpio_reg.gpio_paddr = CFG_PADDR;
- regp->gpio_reg.gpio_padat = CFG_PADAT;
- regp->gpio_reg.gpio_pbcnt = CFG_PBCNT;
- regp->gpio_reg.gpio_pbddr = CFG_PBDDR;
- regp->gpio_reg.gpio_pbdat = CFG_PBDAT;
- regp->gpio_reg.gpio_pdcnt = CFG_PDCNT;
+ gpio->gpio_pacnt = CFG_PACNT;
+ gpio->gpio_paddr = CFG_PADDR;
+ gpio->gpio_padat = CFG_PADAT;
+ gpio->gpio_pbcnt = CFG_PBCNT;
+ gpio->gpio_pbddr = CFG_PBDDR;
+ gpio->gpio_pbdat = CFG_PBDAT;
+ gpio->gpio_pdcnt = CFG_PDCNT;
/* Memory Controller: */
- regp->csctrl_reg.cs_br0 = CFG_BR0_PRELIM;
- regp->csctrl_reg.cs_or0 = CFG_OR0_PRELIM;
+ csctrl->cs_br0 = CFG_BR0_PRELIM;
+ csctrl->cs_or0 = CFG_OR0_PRELIM;
#if (defined(CFG_OR1_PRELIM) && defined(CFG_BR1_PRELIM))
- regp->csctrl_reg.cs_br1 = CFG_BR1_PRELIM;
- regp->csctrl_reg.cs_or1 = CFG_OR1_PRELIM;
+ csctrl->cs_br1 = CFG_BR1_PRELIM;
+ csctrl->cs_or1 = CFG_OR1_PRELIM;
#endif
#if defined(CFG_OR2_PRELIM) && defined(CFG_BR2_PRELIM)
- regp->csctrl_reg.cs_br2 = CFG_BR2_PRELIM;
- regp->csctrl_reg.cs_or2 = CFG_OR2_PRELIM;
+ csctrl->cs_br2 = CFG_BR2_PRELIM;
+ csctrl->cs_or2 = CFG_OR2_PRELIM;
#endif
#if defined(CFG_OR3_PRELIM) && defined(CFG_BR3_PRELIM)
- regp->csctrl_reg.cs_br3 = CFG_BR3_PRELIM;
- regp->csctrl_reg.cs_or3 = CFG_OR3_PRELIM;
+ csctrl->cs_br3 = CFG_BR3_PRELIM;
+ csctrl->cs_or3 = CFG_OR3_PRELIM;
#endif
#if defined(CFG_OR4_PRELIM) && defined(CFG_BR4_PRELIM)
- regp->csctrl_reg.cs_br4 = CFG_BR4_PRELIM;
- regp->csctrl_reg.cs_or4 = CFG_OR4_PRELIM;
+ csctrl->cs_br4 = CFG_BR4_PRELIM;
+ csctrl->cs_or4 = CFG_OR4_PRELIM;
#endif
#if defined(CFG_OR5_PRELIM) && defined(CFG_BR5_PRELIM)
- regp->csctrl_reg.cs_br5 = CFG_BR5_PRELIM;
- regp->csctrl_reg.cs_or5 = CFG_OR5_PRELIM;
+ csctrl->cs_br5 = CFG_BR5_PRELIM;
+ csctrl->cs_or5 = CFG_OR5_PRELIM;
#endif
#if defined(CFG_OR6_PRELIM) && defined(CFG_BR6_PRELIM)
- regp->csctrl_reg.cs_br6 = CFG_BR6_PRELIM;
- regp->csctrl_reg.cs_or6 = CFG_OR6_PRELIM;
+ csctrl->cs_br6 = CFG_BR6_PRELIM;
+ csctrl->cs_or6 = CFG_OR6_PRELIM;
#endif
#if defined(CFG_OR7_PRELIM) && defined(CFG_BR7_PRELIM)
- regp->csctrl_reg.cs_br7 = CFG_BR7_PRELIM;
- regp->csctrl_reg.cs_or7 = CFG_OR7_PRELIM;
+ csctrl->cs_br7 = CFG_BR7_PRELIM;
+ csctrl->cs_or7 = CFG_OR7_PRELIM;
#endif
-#endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */
+#endif /* #ifndef CONFIG_MONITOR_IS_IN_RAM */
/* enable instruction cache now */
icache_enable();
@@ -159,14 +222,30 @@
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r(void)
{
return (0);
}
-#endif /* #if defined(CONFIG_M5272) */
+void uart_port_conf(void)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
-#ifdef CONFIG_M5282
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ gpio->gpio_pbcnt &= ~(GPIO_PBCNT_PB0MSK | GPIO_PBCNT_PB1MSK);
+ gpio->gpio_pbcnt |= (GPIO_PBCNT_URT0_TXD | GPIO_PBCNT_URT0_RXD);
+ break;
+ case 1:
+ gpio->gpio_pdcnt &= ~(GPIO_PDCNT_PD1MSK | GPIO_PDCNT_PD4MSK);
+ gpio->gpio_pdcnt |= (GPIO_PDCNT_URT1_RXD | GPIO_PDCNT_URT1_TXD);
+ break;
+ }
+}
+#endif /* #if defined(CONFIG_M5272) */
+
+#if defined(CONFIG_M5282)
/*
* Breath some life into the CPU...
*
@@ -174,7 +253,7 @@
* initialize a bunch of registers,
* initialize the UPM's
*/
-void cpu_init_f (void)
+void cpu_init_f(void)
{
#ifndef CONFIG_WATCHDOG
/* disable watchdog if we aren't using it */
@@ -183,7 +262,11 @@
#ifndef CONFIG_MONITOR_IS_IN_RAM
/* Set speed /PLL */
- MCFCLOCK_SYNCR = MCFCLOCK_SYNCR_MFD(CFG_MFD) | MCFCLOCK_SYNCR_RFD(CFG_RFD);
+ MCFCLOCK_SYNCR =
+ MCFCLOCK_SYNCR_MFD(CFG_MFD) | MCFCLOCK_SYNCR_RFD(CFG_RFD);
+ while (!(MCFCLOCK_SYNSR & MCFCLOCK_SYNSR_LOCK)) ;
+
+ MCFGPIO_PBCDPAR = 0xc0;
/* Set up the GPIO ports */
#ifdef CFG_PEPAR
@@ -228,29 +311,28 @@
defined(CFG_CS0_WIDTH) & defined(CFG_CS0_RO) & \
defined(CFG_CS0_WS)
- MCFCSM_CSAR0 = (CFG_CS0_BASE >> 16) & 0xFFFF;
+ MCFCSM_CSAR0 = (CFG_CS0_BASE >> 16) & 0xFFFF;
- #if (CFG_CS0_WIDTH == 8)
- #define CFG_CS0_PS MCFCSM_CSCR_PS_8
- #elif (CFG_CS0_WIDTH == 16)
- #define CFG_CS0_PS MCFCSM_CSCR_PS_16
- #elif (CFG_CS0_WIDTH == 32)
- #define CFG_CS0_PS MCFCSM_CSCR_PS_32
- #else
- #error "CFG_CS0_WIDTH: Fault - wrong bus with for CS0"
- #endif
- MCFCSM_CSCR0 = MCFCSM_CSCR_WS(CFG_CS0_WS)
- |CFG_CS0_PS
- |MCFCSM_CSCR_AA;
-
- #if (CFG_CS0_RO != 0)
- MCFCSM_CSMR0 = MCFCSM_CSMR_BAM(CFG_CS0_SIZE-1)
- |MCFCSM_CSMR_WP|MCFCSM_CSMR_V;
- #else
- MCFCSM_CSMR0 = MCFCSM_CSMR_BAM(CFG_CS0_SIZE-1)|MCFCSM_CSMR_V;
- #endif
+#if (CFG_CS0_WIDTH == 8)
+#define CFG_CS0_PS MCFCSM_CSCR_PS_8
+#elif (CFG_CS0_WIDTH == 16)
+#define CFG_CS0_PS MCFCSM_CSCR_PS_16
+#elif (CFG_CS0_WIDTH == 32)
+#define CFG_CS0_PS MCFCSM_CSCR_PS_32
#else
- #waring "Chip Select 0 are not initialized/used"
+#error "CFG_CS0_WIDTH: Fault - wrong bus with for CS0"
+#endif
+ MCFCSM_CSCR0 = MCFCSM_CSCR_WS(CFG_CS0_WS)
+ | CFG_CS0_PS | MCFCSM_CSCR_AA;
+
+#if (CFG_CS0_RO != 0)
+ MCFCSM_CSMR0 = MCFCSM_CSMR_BAM(CFG_CS0_SIZE - 1)
+ | MCFCSM_CSMR_WP | MCFCSM_CSMR_V;
+#else
+ MCFCSM_CSMR0 = MCFCSM_CSMR_BAM(CFG_CS0_SIZE - 1) | MCFCSM_CSMR_V;
+#endif
+#else
+#waring "Chip Select 0 are not initialized/used"
#endif
#if defined(CFG_CS1_BASE) & defined(CFG_CS1_SIZE) & \
@@ -259,29 +341,27 @@
MCFCSM_CSAR1 = (CFG_CS1_BASE >> 16) & 0xFFFF;
- #if (CFG_CS1_WIDTH == 8)
- #define CFG_CS1_PS MCFCSM_CSCR_PS_8
- #elif (CFG_CS1_WIDTH == 16)
- #define CFG_CS1_PS MCFCSM_CSCR_PS_16
- #elif (CFG_CS1_WIDTH == 32)
- #define CFG_CS1_PS MCFCSM_CSCR_PS_32
- #else
- #error "CFG_CS1_WIDTH: Fault - wrong bus with for CS1"
- #endif
- MCFCSM_CSCR1 = MCFCSM_CSCR_WS(CFG_CS1_WS)
- |CFG_CS1_PS
- |MCFCSM_CSCR_AA;
-
- #if (CFG_CS1_RO != 0)
- MCFCSM_CSMR1 = MCFCSM_CSMR_BAM(CFG_CS1_SIZE-1)
- |MCFCSM_CSMR_WP
- |MCFCSM_CSMR_V;
- #else
- MCFCSM_CSMR1 = MCFCSM_CSMR_BAM(CFG_CS1_SIZE-1)
- |MCFCSM_CSMR_V;
- #endif
+#if (CFG_CS1_WIDTH == 8)
+#define CFG_CS1_PS MCFCSM_CSCR_PS_8
+#elif (CFG_CS1_WIDTH == 16)
+#define CFG_CS1_PS MCFCSM_CSCR_PS_16
+#elif (CFG_CS1_WIDTH == 32)
+#define CFG_CS1_PS MCFCSM_CSCR_PS_32
#else
- #warning "Chip Select 1 are not initialized/used"
+#error "CFG_CS1_WIDTH: Fault - wrong bus with for CS1"
+#endif
+ MCFCSM_CSCR1 = MCFCSM_CSCR_WS(CFG_CS1_WS)
+ | CFG_CS1_PS | MCFCSM_CSCR_AA;
+
+#if (CFG_CS1_RO != 0)
+ MCFCSM_CSMR1 = MCFCSM_CSMR_BAM(CFG_CS1_SIZE - 1)
+ | MCFCSM_CSMR_WP | MCFCSM_CSMR_V;
+#else
+ MCFCSM_CSMR1 = MCFCSM_CSMR_BAM(CFG_CS1_SIZE - 1)
+ | MCFCSM_CSMR_V;
+#endif
+#else
+#warning "Chip Select 1 are not initialized/used"
#endif
#if defined(CFG_CS2_BASE) & defined(CFG_CS2_SIZE) & \
@@ -290,29 +370,27 @@
MCFCSM_CSAR2 = (CFG_CS2_BASE >> 16) & 0xFFFF;
- #if (CFG_CS2_WIDTH == 8)
- #define CFG_CS2_PS MCFCSM_CSCR_PS_8
- #elif (CFG_CS2_WIDTH == 16)
- #define CFG_CS2_PS MCFCSM_CSCR_PS_16
- #elif (CFG_CS2_WIDTH == 32)
- #define CFG_CS2_PS MCFCSM_CSCR_PS_32
- #else
- #error "CFG_CS2_WIDTH: Fault - wrong bus with for CS2"
- #endif
- MCFCSM_CSCR2 = MCFCSM_CSCR_WS(CFG_CS2_WS)
- |CFG_CS2_PS
- |MCFCSM_CSCR_AA;
-
- #if (CFG_CS2_RO != 0)
- MCFCSM_CSMR2 = MCFCSM_CSMR_BAM(CFG_CS2_SIZE-1)
- |MCFCSM_CSMR_WP
- |MCFCSM_CSMR_V;
- #else
- MCFCSM_CSMR2 = MCFCSM_CSMR_BAM(CFG_CS2_SIZE-1)
- |MCFCSM_CSMR_V;
- #endif
+#if (CFG_CS2_WIDTH == 8)
+#define CFG_CS2_PS MCFCSM_CSCR_PS_8
+#elif (CFG_CS2_WIDTH == 16)
+#define CFG_CS2_PS MCFCSM_CSCR_PS_16
+#elif (CFG_CS2_WIDTH == 32)
+#define CFG_CS2_PS MCFCSM_CSCR_PS_32
#else
- #warning "Chip Select 2 are not initialized/used"
+#error "CFG_CS2_WIDTH: Fault - wrong bus with for CS2"
+#endif
+ MCFCSM_CSCR2 = MCFCSM_CSCR_WS(CFG_CS2_WS)
+ | CFG_CS2_PS | MCFCSM_CSCR_AA;
+
+#if (CFG_CS2_RO != 0)
+ MCFCSM_CSMR2 = MCFCSM_CSMR_BAM(CFG_CS2_SIZE - 1)
+ | MCFCSM_CSMR_WP | MCFCSM_CSMR_V;
+#else
+ MCFCSM_CSMR2 = MCFCSM_CSMR_BAM(CFG_CS2_SIZE - 1)
+ | MCFCSM_CSMR_V;
+#endif
+#else
+#warning "Chip Select 2 are not initialized/used"
#endif
#if defined(CFG_CS3_BASE) & defined(CFG_CS3_SIZE) & \
@@ -321,32 +399,30 @@
MCFCSM_CSAR3 = (CFG_CS3_BASE >> 16) & 0xFFFF;
- #if (CFG_CS3_WIDTH == 8)
- #define CFG_CS3_PS MCFCSM_CSCR_PS_8
- #elif (CFG_CS3_WIDTH == 16)
- #define CFG_CS3_PS MCFCSM_CSCR_PS_16
- #elif (CFG_CS3_WIDTH == 32)
- #define CFG_CS3_PS MCFCSM_CSCR_PS_32
- #else
- #error "CFG_CS3_WIDTH: Fault - wrong bus with for CS1"
- #endif
- MCFCSM_CSCR3 = MCFCSM_CSCR_WS(CFG_CS3_WS)
- |CFG_CS3_PS
- |MCFCSM_CSCR_AA;
-
- #if (CFG_CS3_RO != 0)
- MCFCSM_CSMR3 = MCFCSM_CSMR_BAM(CFG_CS3_SIZE-1)
- |MCFCSM_CSMR_WP
- |MCFCSM_CSMR_V;
- #else
- MCFCSM_CSMR3 = MCFCSM_CSMR_BAM(CFG_CS3_SIZE-1)
- |MCFCSM_CSMR_V;
- #endif
+#if (CFG_CS3_WIDTH == 8)
+#define CFG_CS3_PS MCFCSM_CSCR_PS_8
+#elif (CFG_CS3_WIDTH == 16)
+#define CFG_CS3_PS MCFCSM_CSCR_PS_16
+#elif (CFG_CS3_WIDTH == 32)
+#define CFG_CS3_PS MCFCSM_CSCR_PS_32
#else
- #warning "Chip Select 3 are not initialized/used"
+#error "CFG_CS3_WIDTH: Fault - wrong bus with for CS1"
+#endif
+ MCFCSM_CSCR3 = MCFCSM_CSCR_WS(CFG_CS3_WS)
+ | CFG_CS3_PS | MCFCSM_CSCR_AA;
+
+#if (CFG_CS3_RO != 0)
+ MCFCSM_CSMR3 = MCFCSM_CSMR_BAM(CFG_CS3_SIZE - 1)
+ | MCFCSM_CSMR_WP | MCFCSM_CSMR_V;
+#else
+ MCFCSM_CSMR3 = MCFCSM_CSMR_BAM(CFG_CS3_SIZE - 1)
+ | MCFCSM_CSMR_V;
+#endif
+#else
+#warning "Chip Select 3 are not initialized/used"
#endif
-#endif /* CONFIG_MONITOR_IS_IN_RAM */
+#endif /* CONFIG_MONITOR_IS_IN_RAM */
/* defer enabling cache until boot (see do_go) */
/* icache_enable(); */
@@ -355,10 +431,29 @@
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r(void)
{
return (0);
}
+
+void uart_port_conf(void)
+{
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ MCFGPIO_PUAPAR &= 0xFc;
+ MCFGPIO_PUAPAR |= 0x03;
+ break;
+ case 1:
+ MCFGPIO_PUAPAR &= 0xF3;
+ MCFGPIO_PUAPAR |= 0x0C;
+ break;
+ case 2:
+ MCFGPIO_PASPAR &= 0xFF0F;
+ MCFGPIO_PASPAR |= 0x00A0;
+ break;
+ }
+}
#endif
#if defined(CONFIG_M5249)
@@ -369,33 +464,13 @@
* initialize a bunch of registers,
* initialize the UPM's
*/
-void cpu_init_f (void)
+void cpu_init_f(void)
{
-#ifndef CFG_PLL_BYPASS
- /*
- * Setup the PLL to run at the specified speed
- *
- */
- volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR);
- unsigned long pllcr;
-#ifdef CFG_FAST_CLK
- pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */
-#else
- pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */
-#endif
- cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */
- mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */
- mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */
- pllcr ^= 0x00000001; /* Set pll bypass to 1 */
- mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */
- udelay(0x20); /* Wait for a lock ... */
-#endif /* #ifndef CFG_PLL_BYPASS */
-
/*
* NOTE: by setting the GPIO_FUNCTION registers, we ensure that the UART pins
- * (UART0: gpio 30,27, UART1: gpio 31, 28) will be used as UART pins
- * which is their primary function.
- * ~Jeremy
+ * (UART0: gpio 30,27, UART1: gpio 31, 28) will be used as UART pins
+ * which is their primary function.
+ * ~Jeremy
*/
mbar2_writeLong(MCFSIM_GPIO_FUNC, CFG_GPIO_FUNC);
mbar2_writeLong(MCFSIM_GPIO1_FUNC, CFG_GPIO1_FUNC);
@@ -411,7 +486,7 @@
* ~Jeremy
*
*/
- mbar_writeByte(MCFSIM_MPARK, 0x30); /* 5249 Internal Core takes priority over DMA */
+ mbar_writeByte(MCFSIM_MPARK, 0x30); /* 5249 Internal Core takes priority over DMA */
mbar_writeByte(MCFSIM_SYPCR, 0x00);
mbar_writeByte(MCFSIM_SWIVR, 0x0f);
mbar_writeByte(MCFSIM_SWSR, 0x00);
@@ -431,7 +506,7 @@
mbar2_writeLong(MCFSIM_GPIO_INT_EN, 0x00000080);
mbar2_writeByte(MCFSIM_INTBASE, 0x40); /* Base interrupts at 64 */
mbar2_writeByte(MCFSIM_SPURVEC, 0x00);
- mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); /* Enable a 1 cycle pre-drive cycle on CS1 */
+ mbar2_writeLong(MCFSIM_IDECONFIG1, 0x00000020); /* Enable a 1 cycle pre-drive cycle on CS1 */
/* Setup interrupt priorities for gpio7 */
/* mbar2_writeLong(MCFSIM_INTLEV5, 0x70000000); */
@@ -459,8 +534,19 @@
/*
* initialize higher level parts of CPU like timers
*/
-int cpu_init_r (void)
+int cpu_init_r(void)
{
return (0);
}
-#endif /* #if defined(CONFIG_M5249) */
+
+void uart_port_conf(void)
+{
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ break;
+ case 1:
+ break;
+ }
+}
+#endif /* #if defined(CONFIG_M5249) */
diff --git a/cpu/mcf52x2/fec.c b/cpu/mcf52x2/fec.c
deleted file mode 100644
index b6540b5..0000000
--- a/cpu/mcf52x2/fec.c
+++ /dev/null
@@ -1,605 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <malloc.h>
-#include <asm/fec.h>
-
-#ifdef CONFIG_M5271
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
-#endif
-
-#ifdef CONFIG_M5272
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-#endif
-
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
-#include <asm/immap_5282.h>
-#endif
-
-#include <net.h>
-#include <command.h>
-
-#ifdef CONFIG_M5272
-#define FEC_ADDR (CFG_MBAR + 0x840)
-#endif
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
-#define FEC_ADDR (CFG_MBAR + 0x1000)
-#endif
-
-#undef ET_DEBUG
-#undef MII_DEBUG
-
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(FEC_ENET)
-
-#ifdef CFG_DISCOVER_PHY
-#include <miiphy.h>
-static void mii_discover_phy (void);
-#endif
-
-/* Ethernet Transmit and Receive Buffers */
-#define DBUF_LENGTH 1520
-
-#define TX_BUF_CNT 2
-
-#define TOUT_LOOP 100
-
-#define PKT_MAXBUF_SIZE 1518
-#define PKT_MINBUF_SIZE 64
-#define PKT_MAXBLR_SIZE 1520
-
-
-static char txbuf[DBUF_LENGTH];
-
-static uint rxIdx; /* index of the current RX buffer */
-static uint txIdx; /* index of the current TX buffer */
-
-/*
- * FEC Ethernet Tx and Rx buffer descriptors allocated at the
- * immr->udata_bd address on Dual-Port RAM
- * Provide for Double Buffering
- */
-
-typedef volatile struct CommonBufferDescriptor {
- cbd_t rxbd[PKTBUFSRX]; /* Rx BD */
- cbd_t txbd[TX_BUF_CNT]; /* Tx BD */
-} RTXBD;
-
-static RTXBD *rtx = NULL;
-
-int eth_send (volatile void *packet, int length)
-{
- int j, rc;
- volatile fec_t *fecp = (fec_t *) (FEC_ADDR);
-
- /* section 16.9.23.3
- * Wait for ready
- */
- j = 0;
- while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY)
- && (j < TOUT_LOOP)) {
- udelay (1);
- j++;
- }
- if (j >= TOUT_LOOP) {
- printf ("TX not ready\n");
- }
-
- rtx->txbd[txIdx].cbd_bufaddr = (uint) packet;
- rtx->txbd[txIdx].cbd_datlen = length;
- rtx->txbd[txIdx].cbd_sc |= BD_ENET_TX_READY | BD_ENET_TX_LAST;
-
- /* Activate transmit Buffer Descriptor polling */
- fecp->fec_x_des_active = 0x01000000; /* Descriptor polling active */
-
- j = 0;
- while ((rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY)
- && (j < TOUT_LOOP)) {
- udelay (1);
- j++;
- }
- if (j >= TOUT_LOOP) {
- printf ("TX timeout\n");
- }
-#ifdef ET_DEBUG
- printf ("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
- __FILE__, __LINE__, __FUNCTION__, j, rtx->txbd[txIdx].cbd_sc,
- (rtx->txbd[txIdx].cbd_sc & 0x003C) >> 2);
-#endif
-
- /* return only status bits */ ;
- rc = (rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_STATS);
-
- txIdx = (txIdx + 1) % TX_BUF_CNT;
-
- return rc;
-}
-
-int eth_rx (void)
-{
- int length;
- volatile fec_t *fecp = (fec_t *) FEC_ADDR;
-
- for (;;) {
- /* section 16.9.23.2 */
- if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
- length = -1;
- break; /* nothing received - leave for() loop */
- }
-
- length = rtx->rxbd[rxIdx].cbd_datlen;
-
- if (rtx->rxbd[rxIdx].cbd_sc & 0x003f) {
-#ifdef ET_DEBUG
- printf ("%s[%d] err: %x\n",
- __FUNCTION__, __LINE__,
- rtx->rxbd[rxIdx].cbd_sc);
-#endif
- } else {
- /* Pass the packet up to the protocol layers. */
- NetReceive (NetRxPackets[rxIdx], length - 4);
- }
-
- /* Give the buffer back to the FEC. */
- rtx->rxbd[rxIdx].cbd_datlen = 0;
-
- /* wrap around buffer index when necessary */
- if ((rxIdx + 1) >= PKTBUFSRX) {
- rtx->rxbd[PKTBUFSRX - 1].cbd_sc =
- (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY);
- rxIdx = 0;
- } else {
- rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
- rxIdx++;
- }
-
- /* Try to fill Buffer Descriptors */
- fecp->fec_r_des_active = 0x01000000; /* Descriptor polling active */
- }
-
- return length;
-}
-
-/**************************************************************
- *
- * FEC Ethernet Initialization Routine
- *
- *************************************************************/
-#define FEC_ECNTRL_ETHER_EN 0x00000002
-#define FEC_ECNTRL_RESET 0x00000001
-
-#define FEC_RCNTRL_BC_REJ 0x00000010
-#define FEC_RCNTRL_PROM 0x00000008
-#define FEC_RCNTRL_MII_MODE 0x00000004
-#define FEC_RCNTRL_DRT 0x00000002
-#define FEC_RCNTRL_LOOP 0x00000001
-
-#define FEC_TCNTRL_FDEN 0x00000004
-#define FEC_TCNTRL_HBC 0x00000002
-#define FEC_TCNTRL_GTS 0x00000001
-
-#define FEC_RESET_DELAY 50000
-
-int eth_init (bd_t * bd)
-{
-#ifndef CFG_ENET_BD_BASE
- DECLARE_GLOBAL_DATA_PTR;
-#endif
- int i;
- volatile fec_t *fecp = (fec_t *) (FEC_ADDR);
-
- /* Whack a reset.
- * A delay is required between a reset of the FEC block and
- * initialization of other FEC registers because the reset takes
- * some time to complete. If you don't delay, subsequent writes
- * to FEC registers might get killed by the reset routine which is
- * still in progress.
- */
- fecp->fec_ecntrl = FEC_ECNTRL_RESET;
- for (i = 0;
- (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay (1);
- }
- if (i == FEC_RESET_DELAY) {
- printf ("FEC_RESET_DELAY timeout\n");
- return 0;
- }
-
- /* We use strictly polling mode only
- */
- fecp->fec_imask = 0;
-
- /* Clear any pending interrupt */
- fecp->fec_ievent = 0xffffffff;
-
- /* Set station address */
-#define ea bd->bi_enetaddr
- fecp->fec_addr_low = (ea[0] << 24) | (ea[1] << 16) |
- (ea[2] << 8) | (ea[3]);
- fecp->fec_addr_high = (ea[4] << 24) | (ea[5] << 16);
-#ifdef ET_DEBUG
- printf ("Eth Addrs: %02x:%02x:%02x:%02x:%02x:%02x\n",
- ea[0], ea[1], ea[2], ea[3], ea[4], ea[5]);
-#endif
-#undef ea
-
-#ifdef CONFIG_M5271
- /* Clear multicast address hash table
- */
- fecp->fec_ghash_table_high = 0;
- fecp->fec_ghash_table_low = 0;
-
- /* Clear individual address hash table
- */
- fecp->fec_ihash_table_high = 0;
- fecp->fec_ihash_table_low = 0;
-#else
- /* Clear multicast address hash table
- */
-#ifdef CONFIG_M5282
- fecp->fec_ihash_table_high = 0;
- fecp->fec_ihash_table_low = 0;
-#else
- fecp->fec_hash_table_high = 0;
- fecp->fec_hash_table_low = 0;
-#endif
-#endif
-
- /* Set maximum receive buffer size.
- */
- fecp->fec_r_buff_size = PKT_MAXBLR_SIZE;
-
- /*
- * Setup Buffers and Buffer Desriptors
- */
- rxIdx = 0;
- txIdx = 0;
-
- if (!rtx) {
-#ifdef CFG_ENET_BD_BASE
- rtx = (RTXBD *) CFG_ENET_BD_BASE;
-#else
- rtx = (RTXBD *) (CFG_MONITOR_BASE+gd->reloc_off -
- (((PKTBUFSRX+TX_BUF_CNT)*+sizeof(cbd_t)
- +0xFF)
- & ~0xFF)
- );
- debug("set ENET_DB_BASE to %lX\n",(long) rtx);
-#endif
- }
-
- /*
- * Setup Receiver Buffer Descriptors (13.14.24.18)
- * Settings:
- * Empty, Wrap
- */
- for (i = 0; i < PKTBUFSRX; i++) {
- rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
- rtx->rxbd[i].cbd_datlen = 0; /* Reset */
- rtx->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i];
- }
- rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
-
- /*
- * Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
- * Settings:
- * Last, Tx CRC
- */
- for (i = 0; i < TX_BUF_CNT; i++) {
- rtx->txbd[i].cbd_sc = BD_ENET_TX_LAST | BD_ENET_TX_TC;
- rtx->txbd[i].cbd_datlen = 0; /* Reset */
- rtx->txbd[i].cbd_bufaddr = (uint) (&txbuf[0]);
- }
- rtx->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
-
- /* Set receive and transmit descriptor base
- */
- fecp->fec_r_des_start = (unsigned int) (&rtx->rxbd[0]);
- fecp->fec_x_des_start = (unsigned int) (&rtx->txbd[0]);
-
- /* Enable MII mode
- */
-
-#if 0 /* Full duplex mode */
- fecp->fec_r_cntrl = FEC_RCNTRL_MII_MODE;
- fecp->fec_x_cntrl = FEC_TCNTRL_FDEN;
-#else /* Half duplex mode */
- fecp->fec_r_cntrl = (PKT_MAXBUF_SIZE << 16); /* set max frame length */
- fecp->fec_r_cntrl |= FEC_RCNTRL_MII_MODE | FEC_RCNTRL_DRT;
- fecp->fec_x_cntrl = 0;
-#endif
- /* Set MII speed */
- fecp->fec_mii_speed = (((CFG_CLK / 2) / (2500000 / 10)) + 5) / 10;
- fecp->fec_mii_speed *= 2;
-
- /* Configure port B for MII.
- */
- /* port initialization was already made in cpu_init_f() */
-
- /* Now enable the transmit and receive processing
- */
- fecp->fec_ecntrl = FEC_ECNTRL_ETHER_EN;
-
-#ifdef CFG_DISCOVER_PHY
- /* wait for the PHY to wake up after reset */
- mii_discover_phy ();
-#endif
-
- /* And last, try to fill Rx Buffer Descriptors */
- fecp->fec_r_des_active = 0x01000000; /* Descriptor polling active */
-
- return 1;
-}
-
-void eth_halt (void)
-{
- volatile fec_t *fecp = (fec_t *) FEC_ADDR;
-
- fecp->fec_ecntrl = 0;
-}
-
-
-#if defined(CFG_DISCOVER_PHY) || (CONFIG_COMMANDS & CFG_CMD_MII)
-
-static int phyaddr = -1; /* didn't find a PHY yet */
-static uint phytype;
-
-/* Make MII read/write commands for the FEC.
-*/
-
-#define mk_mii_read(ADDR, REG) (0x60020000 | ((ADDR << 23) | \
- (REG & 0x1f) << 18))
-
-#define mk_mii_write(ADDR, REG, VAL) (0x50020000 | ((ADDR << 23) | \
- (REG & 0x1f) << 18) | \
- (VAL & 0xffff))
-
-/* Interrupt events/masks.
-*/
-#define FEC_ENET_HBERR ((uint)0x80000000) /* Heartbeat error */
-#define FEC_ENET_BABR ((uint)0x40000000) /* Babbling receiver */
-#define FEC_ENET_BABT ((uint)0x20000000) /* Babbling transmitter */
-#define FEC_ENET_GRA ((uint)0x10000000) /* Graceful stop complete */
-#define FEC_ENET_TXF ((uint)0x08000000) /* Full frame transmitted */
-#define FEC_ENET_TXB ((uint)0x04000000) /* A buffer was transmitted */
-#define FEC_ENET_RXF ((uint)0x02000000) /* Full frame received */
-#define FEC_ENET_RXB ((uint)0x01000000) /* A buffer was received */
-#define FEC_ENET_MII ((uint)0x00800000) /* MII interrupt */
-#define FEC_ENET_EBERR ((uint)0x00400000) /* SDMA bus error */
-
-/* PHY identification
- */
-#define PHY_ID_LXT970 0x78100000 /* LXT970 */
-#define PHY_ID_LXT971 0x001378e0 /* LXT971 and 972 */
-#define PHY_ID_82555 0x02a80150 /* Intel 82555 */
-#define PHY_ID_QS6612 0x01814400 /* QS6612 */
-#define PHY_ID_AMD79C784 0x00225610 /* AMD 79C784 */
-#define PHY_ID_LSI80225 0x0016f870 /* LSI 80225 */
-#define PHY_ID_LSI80225B 0x0016f880 /* LSI 80225/B */
-
-/* send command to phy using mii, wait for result */
-static uint mii_send (uint mii_cmd)
-{
- uint mii_reply;
- volatile fec_t *ep = (fec_t *) (FEC_ADDR);
-
- ep->fec_mii_data = mii_cmd; /* command to phy */
-
- /* wait for mii complete */
- while (!(ep->fec_ievent & FEC_ENET_MII)); /* spin until done */
- mii_reply = ep->fec_mii_data; /* result from phy */
- ep->fec_ievent = FEC_ENET_MII; /* clear MII complete */
-#ifdef ET_DEBUG
- printf ("%s[%d] %s: sent=0x%8.8x, reply=0x%8.8x\n",
- __FILE__, __LINE__, __FUNCTION__, mii_cmd, mii_reply);
-#endif
- return (mii_reply & 0xffff); /* data read from phy */
-}
-#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CFG_CMD_MII) */
-
-#if defined(CFG_DISCOVER_PHY)
-static void mii_discover_phy (void)
-{
-#define MAX_PHY_PASSES 11
- uint phyno;
- int pass;
-
- phyaddr = -1; /* didn't find a PHY yet */
- for (pass = 1; pass <= MAX_PHY_PASSES && phyaddr < 0; ++pass) {
- if (pass > 1) {
- /* PHY may need more time to recover from reset.
- * The LXT970 needs 50ms typical, no maximum is
- * specified, so wait 10ms before try again.
- * With 11 passes this gives it 100ms to wake up.
- */
- udelay (10000); /* wait 10ms */
- }
- for (phyno = 1; phyno < 32 && phyaddr < 0; ++phyno) {
- phytype = mii_send (mk_mii_read (phyno, PHY_PHYIDR1));
-#ifdef ET_DEBUG
- printf ("PHY type 0x%x pass %d type ", phytype, pass);
-#endif
- if (phytype != 0xffff) {
- phyaddr = phyno;
- phytype <<= 16;
- phytype |= mii_send (mk_mii_read (phyno,
- PHY_PHYIDR2));
-
-#ifdef ET_DEBUG
- printf ("PHY @ 0x%x pass %d type ", phyno,
- pass);
- switch (phytype & 0xfffffff0) {
- case PHY_ID_LXT970:
- printf ("LXT970\n");
- break;
- case PHY_ID_LXT971:
- printf ("LXT971\n");
- break;
- case PHY_ID_82555:
- printf ("82555\n");
- break;
- case PHY_ID_QS6612:
- printf ("QS6612\n");
- break;
- case PHY_ID_AMD79C784:
- printf ("AMD79C784\n");
- break;
- case PHY_ID_LSI80225B:
- printf ("LSI L80225/B\n");
- break;
- default:
- printf ("0x%08x\n", phytype);
- break;
- }
-#endif
- }
- }
- }
- if (phyaddr < 0) {
- printf ("No PHY device found.\n");
- }
-}
-#endif /* CFG_DISCOVER_PHY */
-
-#if (CONFIG_COMMANDS & CFG_CMD_MII) && !defined(CONFIG_BITBANGMII)
-
-static int mii_init_done = 0;
-
-/****************************************************************************
- * mii_init -- Initialize the MII for MII command without ethernet
- * This function is a subset of eth_init
- ****************************************************************************
- */
-void mii_init (void)
-{
- volatile fec_t *fecp = (fec_t *) (FEC_ADDR);
-
- int i;
-
- if (mii_init_done != 0) {
- return;
- }
-
- /* Whack a reset.
- * A delay is required between a reset of the FEC block and
- * initialization of other FEC registers because the reset takes
- * some time to complete. If you don't delay, subsequent writes
- * to FEC registers might get killed by the reset routine which is
- * still in progress.
- */
-
- fecp->fec_ecntrl = FEC_ECNTRL_RESET;
- for (i = 0;
- (fecp->fec_ecntrl & FEC_ECNTRL_RESET) && (i < FEC_RESET_DELAY);
- ++i) {
- udelay (1);
- }
- if (i == FEC_RESET_DELAY) {
- printf ("FEC_RESET_DELAY timeout\n");
- return;
- }
-
- /* We use strictly polling mode only
- */
- fecp->fec_imask = 0;
-
- /* Clear any pending interrupt
- */
- fecp->fec_ievent = 0xffffffff;
-
- /* Set MII speed */
- fecp->fec_mii_speed = 0x0e;
-
- /* Configure port B for MII.
- */
- /* port initialization was already made in cpu_init_f() */
-
- /* Now enable the transmit and receive processing */
- fecp->fec_ecntrl = FEC_ECNTRL_ETHER_EN;
-
- mii_init_done = 1;
-}
-
-/*****************************************************************************
- * Read and write a MII PHY register, routines used by MII Utilities
- *
- * FIXME: These routines are expected to return 0 on success, but mii_send
- * does _not_ return an error code. Maybe 0xFFFF means error, i.e.
- * no PHY connected...
- * For now always return 0.
- * FIXME: These routines only work after calling eth_init() at least once!
- * Otherwise they hang in mii_send() !!! Sorry!
- *****************************************************************************/
-
-int mcf52x2_miiphy_read (char *devname, unsigned char addr,
- unsigned char reg, unsigned short *value)
-{
- short rdreg; /* register working value */
-
-#ifdef MII_DEBUG
- printf ("miiphy_read(0x%x) @ 0x%x = ", reg, addr);
-#endif
- rdreg = mii_send (mk_mii_read (addr, reg));
-
- *value = rdreg;
-
-#ifdef MII_DEBUG
- printf ("0x%04x\n", *value);
-#endif
-
- return 0;
-}
-
-int mcf52x2_miiphy_write (char *devname, unsigned char addr,
- unsigned char reg, unsigned short value)
-{
- short rdreg; /* register working value */
-
-#ifdef MII_DEBUG
- printf ("miiphy_write(0x%x) @ 0x%x = ", reg, addr);
-#endif
-
- rdreg = mii_send (mk_mii_write (addr, reg, value));
-
-#ifdef MII_DEBUG
- printf ("0x%04x\n", value);
-#endif
-
- return 0;
-}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_MII) && !defined(CONFIG_BITBANGMII) */
-#endif /* CFG_CMD_NET, FEC_ENET */
-
-int mcf52x2_miiphy_initialize(bd_t *bis)
-{
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(FEC_ENET)
-#if (CONFIG_COMMANDS & CFG_CMD_MII) && !defined(CONFIG_BITBANGMII)
- miiphy_register("mcf52x2phy", mcf52x2_miiphy_read, mcf52x2_miiphy_write);
-#endif
-#endif
- return 0;
-}
diff --git a/cpu/mcf52x2/interrupts.c b/cpu/mcf52x2/interrupts.c
index 116747a..2ccbde5 100644
--- a/cpu/mcf52x2/interrupts.c
+++ b/cpu/mcf52x2/interrupts.c
@@ -1,9 +1,10 @@
/*
- * (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
- *
* (C) Copyright 2000-2004
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -26,140 +27,12 @@
#include <common.h>
#include <watchdog.h>
#include <asm/processor.h>
-
-#ifdef CONFIG_M5271
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
-#endif
+#include <asm/immap.h>
#ifdef CONFIG_M5272
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-#endif
-
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
-#include <asm/immap_5282.h>
-#endif
-
-#ifdef CONFIG_M5249
-#include <asm/m5249.h>
-#endif
-
-
-#define NR_IRQS 31
-
-/*
- * Interrupt vector functions.
- */
-struct interrupt_action {
- interrupt_handler_t *handler;
- void *arg;
-};
-
-static struct interrupt_action irq_vecs[NR_IRQS];
-
-static __inline__ unsigned short get_sr (void)
+int interrupt_init(void)
{
- unsigned short sr;
-
- asm volatile ("move.w %%sr,%0":"=r" (sr):);
-
- return sr;
-}
-
-static __inline__ void set_sr (unsigned short sr)
-{
- asm volatile ("move.w %0,%%sr"::"r" (sr));
-}
-
-/************************************************************************/
-/*
- * Install and free an interrupt handler
- */
-void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
-{
-#ifdef CONFIG_M5272
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
-#endif
- int vec_base = 0;
-
-#ifdef CONFIG_M5272
- vec_base = intp->int_pivr & 0xe0;
-#endif
-
- if ((vec < vec_base) || (vec > vec_base + NR_IRQS)) {
- printf ("irq_install_handler: wrong interrupt vector %d\n",
- vec);
- return;
- }
-
- irq_vecs[vec - vec_base].handler = handler;
- irq_vecs[vec - vec_base].arg = arg;
-}
-
-void irq_free_handler (int vec)
-{
-#ifdef CONFIG_M5272
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
-#endif
- int vec_base = 0;
-
-#ifdef CONFIG_M5272
- vec_base = intp->int_pivr & 0xe0;
-#endif
-
- if ((vec < vec_base) || (vec > vec_base + NR_IRQS)) {
- return;
- }
-
- irq_vecs[vec - vec_base].handler = NULL;
- irq_vecs[vec - vec_base].arg = NULL;
-}
-
-void enable_interrupts (void)
-{
- unsigned short sr;
-
- sr = get_sr ();
- set_sr (sr & ~0x0700);
-}
-
-int disable_interrupts (void)
-{
- unsigned short sr;
-
- sr = get_sr ();
- set_sr (sr | 0x0700);
-
- return ((sr & 0x0700) == 0); /* return TRUE, if interrupts were enabled before */
-}
-
-void int_handler (struct pt_regs *fp)
-{
-#ifdef CONFIG_M5272
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
-#endif
- int vec, vec_base = 0;
-
- vec = (fp->vector >> 2) & 0xff;
-#ifdef CONFIG_M5272
- vec_base = intp->int_pivr & 0xe0;
-#endif
-
- if (irq_vecs[vec - vec_base].handler != NULL) {
- irq_vecs[vec -
- vec_base].handler (irq_vecs[vec - vec_base].arg);
- } else {
- printf ("\nBogus External Interrupt Vector %d\n", vec);
- }
-}
-
-
-#ifdef CONFIG_M5272
-int interrupt_init (void)
-{
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
+ volatile intctrl_t *intp = (intctrl_t *) (MMAP_INTC);
/* disable all external interrupts */
intp->int_icr1 = 0x88888888;
@@ -170,24 +43,59 @@
/* initialize vector register */
intp->int_pivr = 0x40;
- enable_interrupts ();
+ enable_interrupts();
return 0;
}
-#endif
+
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
+{
+ volatile intctrl_t *intp = (intctrl_t *) (CFG_INTR_BASE);
+
+ intp->int_icr1 &= ~INT_ICR1_TMR3MASK;
+ intp->int_icr1 |= CFG_TMRINTR_PRI;
+}
+#endif /* CONFIG_MCFTMR */
+#endif /* CONFIG_M5272 */
#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
-int interrupt_init (void)
+int interrupt_init(void)
{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ /* Make sure all interrupts are disabled */
+ intp->imrl0 |= 0x1;
+
+ enable_interrupts();
return 0;
}
-#endif
-#ifdef CONFIG_M5249
-int interrupt_init (void)
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
{
- enable_interrupts ();
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
+ intp->imrl0 &= ~0xFFFFFFFE;
+ intp->imrl0 &= ~CFG_TMRINTR_MASK;
+}
+#endif /* CONFIG_MCFTMR */
+#endif /* CONFIG_M5282 | CONFIG_M5271 */
+
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
+int interrupt_init(void)
+{
+ enable_interrupts();
return 0;
}
-#endif
+
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
+{
+ mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
+ mbar_writeByte(MCFSIM_TIMER2ICR, CFG_TMRINTR_PRI);
+}
+#endif /* CONFIG_MCFTMR */
+#endif /* CONFIG_M5249 || CONFIG_M5253 */
diff --git a/cpu/mcf52x2/serial.c b/cpu/mcf52x2/serial.c
deleted file mode 100644
index 8be09e3..0000000
--- a/cpu/mcf52x2/serial.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * (C) Copyright 2000-2004
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-#include <common.h>
-#include <command.h>
-#include <watchdog.h>
-
-#include <asm/mcfuart.h>
-
-#ifdef CONFIG_M5271
-#include <asm/m5271.h>
-#endif
-
-#ifdef CONFIG_M5272
-#include <asm/m5272.h>
-#endif
-
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
-#endif
-
-#ifdef CONFIG_M5249
-#include <asm/m5249.h>
-#endif
-
-DECLARE_GLOBAL_DATA_PTR;
-
-#if defined(CONFIG_M5249) || defined(CONFIG_M5271)
-#define DoubleClock(a) ((double)(CFG_CLK/2) / 32.0 / (double)(a))
-#else
-#define DoubleClock(a) ((double)(CFG_CLK) / 32.0 / (double)(a))
-#endif
-
-void rs_serial_setbaudrate(int port,int baudrate)
-{
-#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
- volatile unsigned char *uartp;
-# ifndef CONFIG_M5271
- double fraction;
-# endif
- double clock;
-
- if (port == 0)
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
- else
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
-
- clock = DoubleClock(baudrate); /* Set baud above */
-
- uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
- uartp[MCFUART_UBG2] = ((int)clock & 0xff); /* set lsb baud */
-
-# ifndef CONFIG_M5271
- fraction = ((clock - (int)clock) * 16.0) + 0.5;
- uartp[MCFUART_UFPD] = ((int)fraction & 0xf); /* set baud fraction adjust */
-# endif
-#endif
-
-#if defined(CONFIG_M5282)
- volatile unsigned char *uartp;
- long clock;
-
- switch (port) {
- case 1:
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
- break;
- case 2:
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE3);
- break;
- default:
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
- }
-
- clock = (long) CFG_CLK / ((long) 32 * baudrate); /* Set baud above */
-
- uartp[MCFUART_UBG1] = (((int)clock >> 8) & 0xff); /* set msb baud */
- uartp[MCFUART_UBG2] = ((int) clock & 0xff); /* set lsb baud */
-
-#endif
-};
-
-void rs_serial_init (int port, int baudrate)
-{
- volatile unsigned char *uartp;
-
- /*
- * Reset UART, get it into known state...
- */
- switch (port) {
- case 1:
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE2);
- break;
-#if defined(CONFIG_M5282)
- case 2:
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE3);
- break;
-#endif
- default:
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
- }
-
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETTX; /* reset TX */
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETRX; /* reset RX */
-
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETMRPTR; /* reset MR pointer */
- uartp[MCFUART_UCR] = MCFUART_UCR_CMDRESETERR; /* reset Error pointer */
-
- /*
- * Set port for CONSOLE_BAUD_RATE, 8 data bits, 1 stop bit, no parity.
- */
- uartp[MCFUART_UMR] = MCFUART_MR1_PARITYNONE | MCFUART_MR1_CS8;
- uartp[MCFUART_UMR] = MCFUART_MR2_STOP1;
-
- /* Mask UART interrupts */
- uartp[MCFUART_UIMR] = 0;
-
- /* Set clock Select Register: Tx/Rx clock is timer */
- uartp[MCFUART_UCSR] = MCFUART_UCSR_RXCLKTIMER | MCFUART_UCSR_TXCLKTIMER;
-
- rs_serial_setbaudrate (port, baudrate);
-
- /* Enable Tx/Rx */
- uartp[MCFUART_UCR] = MCFUART_UCR_RXENABLE | MCFUART_UCR_TXENABLE;
-
- return;
-}
-
-/****************************************************************************/
-/*
- * Output a single character, using UART polled mode.
- * This is used for console output.
- */
-
-void rs_put_char(char ch)
-{
- volatile unsigned char *uartp;
- int i;
-
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
-
- for (i = 0; (i < 0x10000); i++) {
- if (uartp[MCFUART_USR] & MCFUART_USR_TXREADY)
- break;
- }
- uartp[MCFUART_UTB] = ch;
- return;
-}
-
-int rs_is_char(void)
-{
- volatile unsigned char *uartp;
-
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
- return((uartp[MCFUART_USR] & MCFUART_USR_RXREADY) ? 1 : 0);
-}
-
-int rs_get_char(void)
-{
- volatile unsigned char *uartp;
-
- uartp = (volatile unsigned char *) (CFG_MBAR + MCFUART_BASE1);
- return(uartp[MCFUART_URB]);
-}
-
-void serial_setbrg(void) {
- rs_serial_setbaudrate(0,gd->bd->bi_baudrate);
-}
-
-int serial_init(void) {
- rs_serial_init(0,gd->baudrate);
- return 0;
-}
-
-
-void serial_putc(const char c) {
- if (c == '\n')
- serial_putc ('\r');
- rs_put_char(c);
-}
-
-void serial_puts (const char *s) {
- while (*s)
- serial_putc(*s++);
-}
-
-int serial_getc(void) {
- while(!rs_is_char())
- WATCHDOG_RESET();
-
- return rs_get_char();
-}
-
-int serial_tstc() {
- return rs_is_char();
-}
diff --git a/cpu/mcf52x2/speed.c b/cpu/mcf52x2/speed.c
index ac860b2..bc1e200 100644
--- a/cpu/mcf52x2/speed.c
+++ b/cpu/mcf52x2/speed.c
@@ -2,6 +2,9 @@
* (C) Copyright 2003
* Josef Baumgartner <josef.baumgartner@telex.de>
*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Hayden Fraser (Hayden.Fraser@freescale.com)
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -23,6 +26,7 @@
#include <common.h>
#include <asm/processor.h>
+#include <asm/immap.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -31,8 +35,37 @@
*/
int get_clocks (void)
{
- gd->cpu_clk = CFG_CLK;
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
+ volatile unsigned long cpll = mbar2_readLong(MCFSIM_PLLCR);
+ unsigned long pllcr;
+
+#ifndef CFG_PLL_BYPASS
+
#ifdef CONFIG_M5249
+ /* Setup the PLL to run at the specified speed */
+#ifdef CFG_FAST_CLK
+ pllcr = 0x925a3100; /* ~140MHz clock (PLL bypass = 0) */
+#else
+ pllcr = 0x135a4140; /* ~72MHz clock (PLL bypass = 0) */
+#endif
+#endif /* CONFIG_M5249 */
+
+#ifdef CONFIG_M5253
+ pllcr = CFG_PLLCR;
+#endif /* CONFIG_M5253 */
+
+ cpll = cpll & 0xfffffffe; /* Set PLL bypass mode = 0 (PSTCLK = crystal) */
+ mbar2_writeLong(MCFSIM_PLLCR, cpll); /* Set the PLL to bypass mode (PSTCLK = crystal) */
+ mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* set the clock speed */
+ pllcr ^= 0x00000001; /* Set pll bypass to 1 */
+ mbar2_writeLong(MCFSIM_PLLCR, pllcr); /* Start locking (pll bypass = 1) */
+ udelay(0x20); /* Wait for a lock ... */
+#endif /* #ifndef CFG_PLL_BYPASS */
+
+#endif /* CONFIG_M5249 || CONFIG_M5253 */
+
+ gd->cpu_clk = CFG_CLK;
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
gd->bus_clk = gd->cpu_clk / 2;
#else
gd->bus_clk = gd->cpu_clk;
diff --git a/cpu/mcf52x2/start.S b/cpu/mcf52x2/start.S
index 7c9a7d2..686e2a5 100644
--- a/cpu/mcf52x2/start.S
+++ b/cpu/mcf52x2/start.S
@@ -121,7 +121,7 @@
nop
move.w #0x2700,%sr
-#if defined(CONFIG_M5272) || defined(CONFIG_M5249)
+#if defined(CONFIG_M5272) || defined(CONFIG_M5249) || defined(CONFIG_M5253)
move.l #(CFG_MBAR + 1), %d0 /* set MBAR address + valid flag */
move.c %d0, %MBAR
@@ -133,7 +133,7 @@
move.l #(CFG_INIT_RAM_ADDR + 1), %d0
movec %d0, %RAMBAR0
-#endif /* #if defined(CONFIG_M5272) || defined(CONFIG_M5249) */
+#endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
/* Initialize IPSBAR */
@@ -159,7 +159,7 @@
_flashbar_setup:
/* Initialize FLASHBAR: locate internal Flash and validate it */
- move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
+ move.l #(CFG_INT_FLASH_BASE + CFG_INT_FLASH_ENABLE), %d0
movec %d0, %RAMBAR0
jmp _after_flashbar_copy.L /* Force jump to absolute address */
_flashbar_setup_end:
@@ -167,7 +167,7 @@
_after_flashbar_copy:
#else
/* Setup code to initialize FLASHBAR, if start from external Memory */
- move.l #(CFG_INT_FLASH_BASE + 0x21), %d0
+ move.l #(CFG_INT_FLASH_BASE + CFG_INT_FLASH_ENABLE), %d0
movec %d0, %RAMBAR0
#endif /* (TEXT_BASE == CFG_INT_FLASH_BASE) */
@@ -326,10 +326,10 @@
/* set parameters for board_init_r */
move.l %a0,-(%sp) /* dest_addr */
move.l %d0,-(%sp) /* gd */
- #if defined(DEBUG) && (TEXT_BASE != CFG_INT_FLASH_BASE) && \
- defined(CFG_HALT_BEFOR_RAM_JUMP)
- halt
- #endif
+#if defined(DEBUG) && (TEXT_BASE != CFG_INT_FLASH_BASE) && \
+ defined(CFG_HALT_BEFOR_RAM_JUMP)
+ halt
+#endif
jsr (%a1)
/*------------------------------------------------------------------------------*/
@@ -356,6 +356,24 @@
/*------------------------------------------------------------------------------*/
/* cache functions */
+#ifdef CONFIG_M5271
+ .globl icache_enable
+icache_enable:
+ move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup cache mask */
+ movec %d0, %ACR0 /* Enable cache */
+
+ move.l #0x80000200, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable cache */
+ nop
+
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+#endif
+
#ifdef CONFIG_M5272
.globl icache_enable
icache_enable:
@@ -389,7 +407,7 @@
rts
#endif
-#ifdef CONFIG_M5249
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
.globl icache_enable
icache_enable:
/*
@@ -426,13 +444,29 @@
.globl icache_status
icache_status:
icache_state_access_3:
- move.l icache_state, %d0
+ move.l #(icache_state), %a0
+ move.l (%a0), %d0
rts
.data
icache_state:
.long 0 /* cache is diabled on inirialization */
+ .globl dcache_enable
+dcache_enable:
+ /* dummy function */
+ rts
+
+ .globl dcache_disable
+dcache_disable:
+ /* dummy function */
+ rts
+
+ .globl dcache_status
+dcache_status:
+ /* dummy function */
+ rts
+
/*------------------------------------------------------------------------------*/
.globl version_string
diff --git a/cpu/mcf532x/Makefile b/cpu/mcf532x/Makefile
new file mode 100644
index 0000000..6790d90
--- /dev/null
+++ b/cpu/mcf532x/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+# CFLAGS += -DET_DEBUG
+
+LIB = lib$(CPU).a
+
+START =
+COBJS = cpu.o speed.o cpu_init.o interrupts.o
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/mcf532x/config.mk b/cpu/mcf532x/config.mk
new file mode 100644
index 0000000..ba324a8
--- /dev/null
+++ b/cpu/mcf532x/config.mk
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+PLATFORM_CPPFLAGS += -m5307 -fPIC
diff --git a/cpu/mcf532x/cpu.c b/cpu/mcf532x/cpu.c
new file mode 100644
index 0000000..2f62e95
--- /dev/null
+++ b/cpu/mcf532x/cpu.c
@@ -0,0 +1,119 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <command.h>
+
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+
+ wdp->cr = 0;
+ udelay(1000);
+
+ /* enable watchdog, set timeout to 0 and wait */
+ wdp->cr = WTM_WCR_EN;
+ while (1) ;
+
+ /* we don't return! */
+ return 0;
+};
+
+int checkcpu(void)
+{
+ volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
+ u16 msk;
+ u16 id = 0;
+ u8 ver;
+
+ puts("CPU: ");
+ msk = (ccm->cir >> 6);
+ ver = (ccm->cir & 0x003f);
+ switch (msk) {
+ case 0x54:
+ id = 5329;
+ break;
+ case 0x59:
+ id = 5328;
+ break;
+ case 0x61:
+ id = 5327;
+ break;
+ }
+
+ if (id) {
+ printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
+ ver);
+ printf(" CPU CLK %d Mhz BUS CLK %d Mhz\n",
+ (int)(gd->cpu_clk / 1000000),
+ (int)(gd->bus_clk / 1000000));
+ }
+
+ return 0;
+};
+
+#if defined(CONFIG_WATCHDOG)
+/* Called by macro WATCHDOG_RESET */
+void watchdog_reset(void)
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+
+ wdp->sr = 0x5555; /* Count register */
+}
+
+int watchdog_disable(void)
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+
+ /* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
+ wdp->cr |= WTM_WCR_HALTED; /* halted watchdog timer */
+
+ puts("WATCHDOG:disabled\n");
+ return (0);
+}
+
+int watchdog_init(void)
+{
+ volatile wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
+ u32 wdog_module = 0;
+
+ /* set timeout and enable watchdog */
+ wdog_module = ((CFG_CLK / 1000) * CONFIG_WATCHDOG_TIMEOUT);
+ wdog_module |= (wdog_module / 8192);
+ wdp->mr = wdog_module;
+
+ wdp->cr = WTM_WCR_EN;
+ puts("WATCHDOG:enabled\n");
+
+ return (0);
+}
+#endif /* CONFIG_WATCHDOG */
diff --git a/cpu/mcf532x/cpu_init.c b/cpu/mcf532x/cpu_init.c
new file mode 100644
index 0000000..93086f7
--- /dev/null
+++ b/cpu/mcf532x/cpu_init.c
@@ -0,0 +1,141 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+
+#include <asm/immap.h>
+
+/*
+ * Breath some life into the CPU...
+ *
+ * Set up the memory map,
+ * initialize a bunch of registers,
+ * initialize the UPM's
+ */
+void cpu_init_f(void)
+{
+ volatile scm1_t *scm1 = (scm1_t *) MMAP_SCM1;
+ volatile scm2_t *scm2 = (scm2_t *) MMAP_SCM2;
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+ volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
+ volatile wdog_t *wdog = (wdog_t *) MMAP_WDOG;
+
+ /* watchdog is enabled by default - disable the watchdog */
+#ifndef CONFIG_WATCHDOG
+ wdog->cr = 0;
+#endif
+
+ scm1->mpr0 = 0x77777777;
+ scm2->pacra = 0;
+ scm2->pacrb = 0;
+ scm2->pacrc = 0;
+ scm2->pacrd = 0;
+ scm2->pacre = 0;
+ scm2->pacrf = 0;
+ scm2->pacrg = 0;
+ scm1->pacrh = 0;
+
+ /* Port configuration */
+ gpio->par_cs = 0;
+
+#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL))
+ fbcs->csar0 = CFG_CS0_BASE;
+ fbcs->cscr0 = CFG_CS0_CTRL;
+ fbcs->csmr0 = CFG_CS0_MASK;
+#endif
+
+#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
+ /* Latch chipselect */
+ gpio->par_cs |= GPIO_PAR_CS1;
+ fbcs->csar1 = CFG_CS1_BASE;
+ fbcs->cscr1 = CFG_CS1_CTRL;
+ fbcs->csmr1 = CFG_CS1_MASK;
+#endif
+
+#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS2;
+ fbcs->csar2 = CFG_CS2_BASE;
+ fbcs->cscr2 = CFG_CS2_CTRL;
+ fbcs->csmr2 = CFG_CS2_MASK;
+#endif
+
+#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS3;
+ fbcs->csar3 = CFG_CS3_BASE;
+ fbcs->cscr3 = CFG_CS3_CTRL;
+ fbcs->csmr3 = CFG_CS3_MASK;
+#endif
+
+#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS4;
+ fbcs->csar4 = CFG_CS4_BASE;
+ fbcs->cscr4 = CFG_CS4_CTRL;
+ fbcs->csmr4 = CFG_CS4_MASK;
+#endif
+
+#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL))
+ gpio->par_cs |= GPIO_PAR_CS5;
+ fbcs->csar5 = CFG_CS5_BASE;
+ fbcs->cscr5 = CFG_CS5_CTRL;
+ fbcs->csmr5 = CFG_CS5_MASK;
+#endif
+
+#ifdef CONFIG_FSL_I2C
+ gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA;
+#endif
+
+ icache_enable();
+}
+
+/*
+ * initialize higher level parts of CPU like timers
+ */
+int cpu_init_r(void)
+{
+ return (0);
+}
+
+void uart_port_conf(void)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ gpio->par_uart = (GPIO_PAR_UART_TXD0 | GPIO_PAR_UART_RXD0);
+ break;
+ case 1:
+ gpio->par_uart =
+ (GPIO_PAR_UART_TXD1(3) | GPIO_PAR_UART_RXD1(3));
+ break;
+ case 2:
+ gpio->par_timer &= 0x0F;
+ gpio->par_timer |= (GPIO_PAR_TIN3_URXD2 | GPIO_PAR_TIN2_UTXD2);
+ break;
+ }
+}
diff --git a/cpu/mcf532x/interrupts.c b/cpu/mcf532x/interrupts.c
new file mode 100644
index 0000000..ff50d7d
--- /dev/null
+++ b/cpu/mcf532x/interrupts.c
@@ -0,0 +1,49 @@
+/*
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* CPU specific interrupt routine */
+#include <common.h>
+#include <asm/immap.h>
+
+int interrupt_init(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ /* Make sure all interrupts are disabled */
+ intp->imrh0 |= 0xFFFFFFFF;
+ intp->imrl0 |= 0xFFFFFFFF;
+
+ enable_interrupts();
+ return 0;
+}
+
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
+ intp->imrh0 &= ~CFG_TMRINTR_MASK;
+}
+#endif
diff --git a/cpu/mcf532x/speed.c b/cpu/mcf532x/speed.c
new file mode 100644
index 0000000..001b9f4
--- /dev/null
+++ b/cpu/mcf532x/speed.c
@@ -0,0 +1,216 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/* PLL min/max specifications */
+#define MAX_FVCO 500000 /* KHz */
+#define MAX_FSYS 80000 /* KHz */
+#define MIN_FSYS 58333 /* KHz */
+#define FREF 16000 /* KHz */
+#define MAX_MFD 135 /* Multiplier */
+#define MIN_MFD 88 /* Multiplier */
+#define BUSDIV 6 /* Divider */
+/*
+ * Low Power Divider specifications
+ */
+#define MIN_LPD (1 << 0) /* Divider (not encoded) */
+#define MAX_LPD (1 << 15) /* Divider (not encoded) */
+#define DEFAULT_LPD (1 << 1) /* Divider (not encoded) */
+
+/*
+ * Get the value of the current system clock
+ *
+ * Parameters:
+ * none
+ *
+ * Return Value:
+ * The current output system frequency
+ */
+int get_sys_clock(void)
+{
+ volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
+ volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
+ int divider;
+
+ /* Test to see if device is in LIMP mode */
+ if (ccm->misccr & CCM_MISCCR_LIMP) {
+ divider = ccm->cdr & CCM_CDR_LPDIV(0xF);
+ return (FREF / (2 << divider));
+ } else {
+ return ((FREF * pll->pfdr) / (BUSDIV * 4));
+ }
+}
+
+/*
+ * Initialize the Low Power Divider circuit
+ *
+ * Parameters:
+ * div Desired system frequency divider
+ *
+ * Return Value:
+ * The resulting output system frequency
+ */
+int clock_limp(int div)
+{
+ volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
+ u32 temp;
+
+ /* Check bounds of divider */
+ if (div < MIN_LPD)
+ div = MIN_LPD;
+ if (div > MAX_LPD)
+ div = MAX_LPD;
+
+ /* Save of the current value of the SSIDIV so we don't overwrite the value */
+ temp = (ccm->cdr & CCM_CDR_SSIDIV(0xF));
+
+ /* Apply the divider to the system clock */
+ ccm->cdr = (CCM_CDR_LPDIV(div) | CCM_CDR_SSIDIV(temp));
+
+ ccm->misccr |= CCM_MISCCR_LIMP;
+
+ return (FREF / (3 * (1 << div)));
+}
+
+/*
+ * Exit low power LIMP mode
+ *
+ * Parameters:
+ * div Desired system frequency divider
+ *
+ * Return Value:
+ * The resulting output system frequency
+ */
+int clock_exit_limp(void)
+{
+ volatile ccm_t *ccm = (volatile ccm_t *)(MMAP_CCM);
+ int fout;
+
+ /* Exit LIMP mode */
+ ccm->misccr &= (~CCM_MISCCR_LIMP);
+
+ /* Wait for PLL to lock */
+ while (!(ccm->misccr & CCM_MISCCR_PLL_LOCK)) ;
+
+ fout = get_sys_clock();
+
+ return fout;
+}
+
+/* Initialize the PLL
+ *
+ * Parameters:
+ * fref PLL reference clock frequency in KHz
+ * fsys Desired PLL output frequency in KHz
+ * flags Operating parameters
+ *
+ * Return Value:
+ * The resulting output system frequency
+ */
+int clock_pll(int fsys, int flags)
+{
+ volatile u32 *sdram_workaround = (volatile u32 *)(MMAP_SDRAM + 0x80);
+ volatile pll_t *pll = (volatile pll_t *)(MMAP_PLL);
+ int fref, temp, fout, mfd;
+ u32 i;
+
+ fref = FREF;
+
+ if (fsys == 0) {
+ /* Return current PLL output */
+ mfd = pll->pfdr;
+
+ return (fref * mfd / (BUSDIV * 4));
+ }
+
+ /* Check bounds of requested system clock */
+ if (fsys > MAX_FSYS)
+ fsys = MAX_FSYS;
+
+ if (fsys < MIN_FSYS)
+ fsys = MIN_FSYS;
+
+ /* Multiplying by 100 when calculating the temp value,
+ and then dividing by 100 to calculate the mfd allows
+ for exact values without needing to include floating
+ point libraries. */
+ temp = (100 * fsys) / fref;
+ mfd = (4 * BUSDIV * temp) / 100;
+
+ /* Determine the output frequency for selected values */
+ fout = ((fref * mfd) / (BUSDIV * 4));
+
+ /*
+ * Check to see if the SDRAM has already been initialized.
+ * If it has then the SDRAM needs to be put into self refresh
+ * mode before reprogramming the PLL.
+ */
+
+ /*
+ * Initialize the PLL to generate the new system clock frequency.
+ * The device must be put into LIMP mode to reprogram the PLL.
+ */
+
+ /* Enter LIMP mode */
+ clock_limp(DEFAULT_LPD);
+
+ /* Reprogram PLL for desired fsys */
+ pll->podr = (PLL_PODR_CPUDIV(BUSDIV / 3) | PLL_PODR_BUSDIV(BUSDIV));
+
+ pll->pfdr = mfd;
+
+ /* Exit LIMP mode */
+ clock_exit_limp();
+
+ /*
+ * Return the SDRAM to normal operation if it is in use.
+ */
+
+ /* software workaround for SDRAM opeartion after exiting LIMP mode errata */
+ *sdram_workaround = CFG_SDRAM_BASE;
+
+ /* wait for DQS logic to relock */
+ for (i = 0; i < 0x200; i++) ;
+
+ return fout;
+}
+
+/*
+ * get_clocks() fills in gd->cpu_clock and gd->bus_clk
+ */
+int get_clocks(void)
+{
+ gd->bus_clk = clock_pll(CFG_CLK / 1000, 0) * 1000;
+ gd->cpu_clk = (gd->bus_clk * 3);
+ return (0);
+}
diff --git a/cpu/mcf532x/start.S b/cpu/mcf532x/start.S
new file mode 100644
index 0000000..5cc1c87
--- /dev/null
+++ b/cpu/mcf532x/start.S
@@ -0,0 +1,335 @@
+/*
+ * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include "version.h"
+
+#ifndef CONFIG_IDENT_STRING
+#define CONFIG_IDENT_STRING ""
+#endif
+
+#define _START _start
+#define _FAULT _fault
+
+#define SAVE_ALL \
+ move.w #0x2700,%sr; /* disable intrs */ \
+ subl #60,%sp; /* space for 15 regs */ \
+ moveml %d0-%d7/%a0-%a6,%sp@;
+
+#define RESTORE_ALL \
+ moveml %sp@,%d0-%d7/%a0-%a6; \
+ addl #60,%sp; /* space for 15 regs */ \
+ rte;
+
+.text
+/*
+ * Vector table. This is used for initial platform startup.
+ * These vectors are to catch any un-intended traps.
+ */
+_vectors:
+
+INITSP: .long 0x00000000 /* Initial SP */
+INITPC: .long _START /* Initial PC */
+vector02: .long _FAULT /* Access Error */
+vector03: .long _FAULT /* Address Error */
+vector04: .long _FAULT /* Illegal Instruction */
+vector05: .long _FAULT /* Reserved */
+vector06: .long _FAULT /* Reserved */
+vector07: .long _FAULT /* Reserved */
+vector08: .long _FAULT /* Privilege Violation */
+vector09: .long _FAULT /* Trace */
+vector0A: .long _FAULT /* Unimplemented A-Line */
+vector0B: .long _FAULT /* Unimplemented F-Line */
+vector0C: .long _FAULT /* Debug Interrupt */
+vector0D: .long _FAULT /* Reserved */
+vector0E: .long _FAULT /* Format Error */
+vector0F: .long _FAULT /* Unitialized Int. */
+
+/* Reserved */
+vector10_17:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector18: .long _FAULT /* Spurious Interrupt */
+vector19: .long _FAULT /* Autovector Level 1 */
+vector1A: .long _FAULT /* Autovector Level 2 */
+vector1B: .long _FAULT /* Autovector Level 3 */
+vector1C: .long _FAULT /* Autovector Level 4 */
+vector1D: .long _FAULT /* Autovector Level 5 */
+vector1E: .long _FAULT /* Autovector Level 6 */
+vector1F: .long _FAULT /* Autovector Level 7 */
+
+/* TRAP #0 - #15 */
+vector20_2F:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+/* Reserved */
+vector30_3F:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector64_127:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector128_191:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector192_255:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+ .text
+
+ .globl _start
+_start:
+ nop
+ nop
+ move.w #0x2700,%sr /* Mask off Interrupt */
+
+ /* Set vector base register at the beginning of the Flash */
+ move.l #CFG_FLASH_BASE, %d0
+ movec %d0, %VBR
+
+ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
+ movec %d0, %RAMBAR0
+
+ /* invalidate and disable cache */
+ move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ move.l #0, %d0
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+
+ /* initialize general use internal ram */
+ move.l #0, %d0
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a2
+ move.l %d0, (%a1)
+ move.l %d0, (%a2)
+
+ /* set stackpointer to end of internal ram to get some stackspace for the
+ first c-code */
+ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
+ clr.l %sp@-
+
+ move.l #__got_start, %a5 /* put relocation table address to a5 */
+
+ bsr cpu_init_f /* run low-level CPU init code (from flash) */
+ bsr board_init_f /* run low-level board init code (from flash) */
+
+ /* board_init_f() does not return */
+
+/*------------------------------------------------------------------------------*/
+
+/*
+ * void relocate_code (addr_sp, gd, addr_moni)
+ *
+ * This "function" does not return, instead it continues in RAM
+ * after relocating the monitor code.
+ *
+ * r3 = dest
+ * r4 = src
+ * r5 = length in bytes
+ * r6 = cachelinesize
+ */
+ .globl relocate_code
+relocate_code:
+ link.w %a6,#0
+ move.l 8(%a6), %sp /* set new stack pointer */
+
+ move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
+ move.l 16(%a6), %a0 /* Save copy of Destination Address */
+
+ move.l #CFG_MONITOR_BASE, %a1
+ move.l #__init_end, %a2
+ move.l %a0, %a3
+
+ /* copy the code to RAM */
+1:
+ move.l (%a1)+, (%a3)+
+ cmp.l %a1,%a2
+ bgt.s 1b
+
+/*
+ * We are done. Do not return, instead branch to second part of board
+ * initialization, now running from RAM.
+ */
+ move.l %a0, %a1
+ add.l #(in_ram - CFG_MONITOR_BASE), %a1
+ jmp (%a1)
+
+in_ram:
+
+clear_bss:
+ /*
+ * Now clear BSS segment
+ */
+ move.l %a0, %a1
+ add.l #(_sbss - CFG_MONITOR_BASE),%a1
+ move.l %a0, %d1
+ add.l #(_ebss - CFG_MONITOR_BASE),%d1
+6:
+ clr.l (%a1)+
+ cmp.l %a1,%d1
+ bgt.s 6b
+
+ /*
+ * fix got table in RAM
+ */
+ move.l %a0, %a1
+ add.l #(__got_start - CFG_MONITOR_BASE),%a1
+ move.l %a1,%a5 /* * fix got pointer register a5 */
+
+ move.l %a0, %a2
+ add.l #(__got_end - CFG_MONITOR_BASE),%a2
+
+7:
+ move.l (%a1),%d1
+ sub.l #_start,%d1
+ add.l %a0,%d1
+ move.l %d1,(%a1)+
+ cmp.l %a2, %a1
+ bne 7b
+
+ /* calculate relative jump to board_init_r in ram */
+ move.l %a0, %a1
+ add.l #(board_init_r - CFG_MONITOR_BASE), %a1
+
+ /* set parameters for board_init_r */
+ move.l %a0,-(%sp) /* dest_addr */
+ move.l %d0,-(%sp) /* gd */
+ jsr (%a1)
+
+/*------------------------------------------------------------------------------*/
+/* exception code */
+ .globl _fault
+_fault:
+ jmp _fault
+ .globl _exc_handler
+
+_exc_handler:
+ SAVE_ALL
+ movel %sp,%sp@-
+ bsr exc_handler
+ addql #4,%sp
+ RESTORE_ALL
+
+ .globl _int_handler
+_int_handler:
+ SAVE_ALL
+ movel %sp,%sp@-
+ bsr int_handler
+ addql #4,%sp
+ RESTORE_ALL
+
+/*------------------------------------------------------------------------------*/
+/* cache functions */
+ .globl icache_enable
+icache_enable:
+ move.l #0x01000000, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ move.l #(CFG_SDRAM_BASE + 0xc000 + ((CFG_SDRAM_SIZE & 0x1fe0) << 11)), %d0
+ movec %d0, %ACR0 /* Enable cache */
+
+ move.l #0x80000200, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable cache */
+ nop
+
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl icache_disable
+icache_disable:
+ move.l #0x01000000, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Disable cache */
+ clr.l %d0 /* Setup cache mask */
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ moveq #0, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl icache_status
+icache_status:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-8), %a1
+ move.l (%a1), %d0
+ rts
+
+ .globl icache_invalid
+icache_invalid:
+ move.l #0x81000200, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable cache */
+ rts
+
+ .globl dcache_enable
+dcache_enable:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+
+ /* No dcache, just a dummy function */
+ .globl dcache_disable
+dcache_disable:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+ moveq #0, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl dcache_status
+dcache_status:
+ move.l #(CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-4), %a1
+ move.l (%a1), %d0
+ rts
+
+/*------------------------------------------------------------------------------*/
+
+ .globl version_string
+version_string:
+ .ascii U_BOOT_VERSION
+ .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii CONFIG_IDENT_STRING, "\0"
diff --git a/cpu/mcf5445x/Makefile b/cpu/mcf5445x/Makefile
new file mode 100644
index 0000000..26ec298
--- /dev/null
+++ b/cpu/mcf5445x/Makefile
@@ -0,0 +1,48 @@
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+# CFLAGS += -DET_DEBUG
+
+LIB = lib$(CPU).a
+
+START = start.o
+COBJS = cpu.o speed.o cpu_init.o interrupts.o pci.o
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/mcf5445x/config.mk b/cpu/mcf5445x/config.mk
new file mode 100644
index 0000000..d0c72fb
--- /dev/null
+++ b/cpu/mcf5445x/config.mk
@@ -0,0 +1,27 @@
+#
+# (C) Copyright 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+#
+# (C) Copyright 2000-2004
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+PLATFORM_RELFLAGS += -ffixed-d7 -msep-data
+PLATFORM_CPPFLAGS += -m5407 -fPIC
diff --git a/cpu/mcf5445x/cpu.c b/cpu/mcf5445x/cpu.c
new file mode 100644
index 0000000..e601b89
--- /dev/null
+++ b/cpu/mcf5445x/cpu.c
@@ -0,0 +1,97 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <command.h>
+
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int do_reset(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
+{
+ volatile rcm_t *rcm = (rcm_t *) (MMAP_RCM);
+ udelay(1000);
+ rcm->rcr |= RCM_RCR_SOFTRST;
+
+ /* we don't return! */
+ return 0;
+};
+
+int checkcpu(void)
+{
+ volatile ccm_t *ccm = (ccm_t *) MMAP_CCM;
+ u16 msk;
+ u16 id = 0;
+ u8 ver;
+
+ puts("CPU: ");
+ msk = (ccm->cir >> 6);
+ ver = (ccm->cir & 0x003f);
+ switch (msk) {
+ case 0x48:
+ id = 54455;
+ break;
+ case 0x49:
+ id = 54454;
+ break;
+ case 0x4a:
+ id = 54453;
+ break;
+ case 0x4b:
+ id = 54452;
+ break;
+ case 0x4d:
+ id = 54451;
+ break;
+ case 0x4f:
+ id = 54450;
+ break;
+ }
+
+ if (id) {
+ printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
+ ver);
+ printf(" CPU CLK %d Mhz BUS CLK %d Mhz FLB CLK %d Mhz\n",
+ (int)(gd->cpu_clk / 1000000),
+ (int)(gd->bus_clk / 1000000),
+ (int)(gd->flb_clk / 1000000));
+#ifdef CONFIG_PCI
+ printf(" PCI CLK %d Mhz INP CLK %d Mhz VCO CLK %d Mhz\n",
+ (int)(gd->pci_clk / 1000000),
+ (int)(gd->inp_clk / 1000000),
+ (int)(gd->vco_clk / 1000000));
+#else
+ printf(" INP CLK %d Mhz VCO CLK %d Mhz\n",
+ (int)(gd->inp_clk / 1000000),
+ (int)(gd->vco_clk / 1000000));
+#endif
+ }
+
+ return 0;
+}
diff --git a/cpu/mcf5445x/cpu_init.c b/cpu/mcf5445x/cpu_init.c
new file mode 100644
index 0000000..6622eee
--- /dev/null
+++ b/cpu/mcf5445x/cpu_init.c
@@ -0,0 +1,140 @@
+/*
+ *
+ * (C) Copyright 2000-2003
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+
+#include <asm/immap.h>
+#include <asm/rtc.h>
+
+/*
+ * Breath some life into the CPU...
+ *
+ * Set up the memory map,
+ * initialize a bunch of registers,
+ * initialize the UPM's
+ */
+void cpu_init_f(void)
+{
+ volatile scm1_t *scm1 = (scm1_t *) MMAP_SCM1;
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+ volatile fbcs_t *fbcs = (fbcs_t *) MMAP_FBCS;
+
+ scm1->mpr = 0x77777777;
+ scm1->pacra = 0;
+ scm1->pacrb = 0;
+ scm1->pacrc = 0;
+ scm1->pacrd = 0;
+ scm1->pacre = 0;
+ scm1->pacrf = 0;
+ scm1->pacrg = 0;
+
+ /* FlexBus */
+ gpio->par_be =
+ GPIO_PAR_BE_BE3_BE3 | GPIO_PAR_BE_BE2_BE2 | GPIO_PAR_BE_BE1_BE1 |
+ GPIO_PAR_BE_BE0_BE0;
+ gpio->par_fbctl =
+ GPIO_PAR_FBCTL_OE | GPIO_PAR_FBCTL_TA_TA | GPIO_PAR_FBCTL_RW_RW |
+ GPIO_PAR_FBCTL_TS_TS;
+
+#if (defined(CFG_CS0_BASE) && defined(CFG_CS0_MASK) && defined(CFG_CS0_CTRL))
+ fbcs->csar0 = CFG_CS0_BASE;
+ fbcs->cscr0 = CFG_CS0_CTRL;
+ fbcs->csmr0 = CFG_CS0_MASK;
+#endif
+
+#if (defined(CFG_CS1_BASE) && defined(CFG_CS1_MASK) && defined(CFG_CS1_CTRL))
+ /* Latch chipselect */
+ fbcs->csar1 = CFG_CS1_BASE;
+ fbcs->cscr1 = CFG_CS1_CTRL;
+ fbcs->csmr1 = CFG_CS1_MASK;
+#endif
+
+#if (defined(CFG_CS2_BASE) && defined(CFG_CS2_MASK) && defined(CFG_CS2_CTRL))
+ fbcs->csar2 = CFG_CS2_BASE;
+ fbcs->cscr2 = CFG_CS2_CTRL;
+ fbcs->csmr2 = CFG_CS2_MASK;
+#endif
+
+#if (defined(CFG_CS3_BASE) && defined(CFG_CS3_MASK) && defined(CFG_CS3_CTRL))
+ fbcs->csar3 = CFG_CS3_BASE;
+ fbcs->cscr3 = CFG_CS3_CTRL;
+ fbcs->csmr3 = CFG_CS3_MASK;
+#endif
+
+#if (defined(CFG_CS4_BASE) && defined(CFG_CS4_MASK) && defined(CFG_CS4_CTRL))
+ fbcs->csar4 = CFG_CS4_BASE;
+ fbcs->cscr4 = CFG_CS4_CTRL;
+ fbcs->csmr4 = CFG_CS4_MASK;
+#endif
+
+#if (defined(CFG_CS5_BASE) && defined(CFG_CS5_MASK) && defined(CFG_CS5_CTRL))
+ fbcs->csar5 = CFG_CS5_BASE;
+ fbcs->cscr5 = CFG_CS5_CTRL;
+ fbcs->csmr5 = CFG_CS5_MASK;
+#endif
+
+#ifdef CONFIG_FSL_I2C
+ gpio->par_feci2c = GPIO_PAR_FECI2C_SCL_SCL | GPIO_PAR_FECI2C_SDA_SDA;
+#endif
+
+ icache_enable();
+}
+
+/*
+ * initialize higher level parts of CPU like timers
+ */
+int cpu_init_r(void)
+{
+#ifdef CONFIG_MCFTMR
+ volatile rtc_t *rtc = (volatile rtc_t *)(CFG_MCFRTC_BASE);
+ volatile rtcex_t *rtcex = (volatile rtcex_t *)&rtc->extended;
+ u32 oscillator = CFG_RTC_OSCILLATOR;
+
+ rtcex->gocu = (CFG_RTC_OSCILLATOR >> 16) & 0xFFFF;
+ rtcex->gocl = CFG_RTC_OSCILLATOR & 0xFFFF;
+#endif
+
+ return (0);
+}
+
+void uart_port_conf(void)
+{
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+
+ /* Setup Ports: */
+ switch (CFG_UART_PORT) {
+ case 0:
+ gpio->par_uart =
+ (GPIO_PAR_UART_U0TXD_U0TXD | GPIO_PAR_UART_U0RXD_U0RXD);
+ break;
+ case 1:
+ gpio->par_uart =
+ (GPIO_PAR_UART_U1TXD_U1TXD | GPIO_PAR_UART_U1RXD_U1RXD);
+ break;
+ }
+}
diff --git a/cpu/mcf5445x/interrupts.c b/cpu/mcf5445x/interrupts.c
new file mode 100644
index 0000000..9572a7b
--- /dev/null
+++ b/cpu/mcf5445x/interrupts.c
@@ -0,0 +1,52 @@
+/*
+ *
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* CPU specific interrupt routine */
+#include <common.h>
+#include <asm/immap.h>
+
+int interrupt_init(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ /* Make sure all interrupts are disabled */
+ intp->imrh0 |= 0xFFFFFFFF;
+ intp->imrl0 |= 0xFFFFFFFF;
+
+ enable_interrupts();
+ return 0;
+}
+
+#if defined(CONFIG_MCFTMR)
+void dtimer_intr_setup(void)
+{
+ volatile int0_t *intp = (int0_t *) (CFG_INTR_BASE);
+
+ intp->icr0[CFG_TMRINTR_NO] = CFG_TMRINTR_PRI;
+ intp->imrh0 &= ~CFG_TMRINTR_MASK;
+}
+#endif
diff --git a/cpu/mcf5445x/pci.c b/cpu/mcf5445x/pci.c
new file mode 100644
index 0000000..8ace536
--- /dev/null
+++ b/cpu/mcf5445x/pci.c
@@ -0,0 +1,189 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * PCI Configuration space access support
+ */
+#include <common.h>
+#include <pci.h>
+#include <asm/io.h>
+#include <asm/immap.h>
+
+#if defined(CONFIG_PCI)
+/* System RAM mapped over PCI */
+#define CFG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
+#define CFG_PCI_SYS_MEM_PHYS CFG_SDRAM_BASE
+#define CFG_PCI_SYS_MEM_SIZE (1024 * 1024 * 1024)
+
+#define cfg_read(val, addr, type, op) *val = op((type)(addr));
+#define cfg_write(val, addr, type, op) op((type *)(addr), (val));
+
+#define PCI_OP(rw, size, type, op, mask) \
+int pci_##rw##_cfg_##size(struct pci_controller *hose, \
+ pci_dev_t dev, int offset, type val) \
+{ \
+ u32 addr = 0; \
+ u16 cfg_type = 0; \
+ addr = ((offset & 0xfc) | cfg_type | (dev) | 0x80000000); \
+ out_be32(hose->cfg_addr, addr); \
+ __asm__ __volatile__("nop"); \
+ cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
+ out_be32(hose->cfg_addr, addr & 0x7fffffff); \
+ __asm__ __volatile__("nop"); \
+ return 0; \
+}
+
+PCI_OP(read, byte, u8 *, in_8, 3)
+PCI_OP(read, word, u16 *, in_le16, 2)
+PCI_OP(write, byte, u8, out_8, 3)
+PCI_OP(write, word, u16, out_le16, 2)
+PCI_OP(write, dword, u32, out_le32, 0)
+
+int pci_read_cfg_dword(struct pci_controller *hose, pci_dev_t dev,
+ int offset, u32 * val)
+{
+ u32 addr;
+ u32 tmpv;
+ u32 mask = 2; /* word access */
+ /* Read lower 16 bits */
+ addr = ((offset & 0xfc) | (dev) | 0x80000000);
+ out_be32(hose->cfg_addr, addr);
+ __asm__ __volatile__("nop");
+ *val = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask)));
+ out_be32(hose->cfg_addr, addr & 0x7fffffff);
+ __asm__ __volatile__("nop");
+
+ /* Read upper 16 bits */
+ offset += 2;
+ addr = ((offset & 0xfc) | 1 | (dev) | 0x80000000);
+ out_be32(hose->cfg_addr, addr);
+ __asm__ __volatile__("nop");
+ tmpv = (u32) in_le16((u16 *) (hose->cfg_data + (offset & mask)));
+ out_be32(hose->cfg_addr, addr & 0x7fffffff);
+ __asm__ __volatile__("nop");
+
+ /* combine results into dword value */
+ *val = (tmpv << 16) | *val;
+
+ return 0;
+}
+
+void pci_mcf5445x_init(struct pci_controller *hose)
+{
+ volatile pci_t *pci = (volatile pci_t *)MMAP_PCI;
+ volatile pciarb_t *pciarb = (volatile pciarb_t *)MMAP_PCIARB;
+ volatile gpio_t *gpio = (gpio_t *) MMAP_GPIO;
+ u32 barEn = 0;
+
+ pciarb->acr = 0x001f001f;
+
+ /* Set PCIGNT1, PCIREQ1, PCIREQ0/PCIGNTIN, PCIGNT0/PCIREQOUT,
+ PCIREQ2, PCIGNT2 */
+ gpio->par_pci =
+ GPIO_PAR_PCI_GNT3_GNT3 | GPIO_PAR_PCI_GNT2 | GPIO_PAR_PCI_GNT1 |
+ GPIO_PAR_PCI_GNT0 | GPIO_PAR_PCI_REQ3_REQ3 | GPIO_PAR_PCI_REQ2 |
+ GPIO_PAR_PCI_REQ1 | GPIO_PAR_PCI_REQ0;
+
+ pci->tcr1 |= PCI_TCR1_P;
+
+ /* Initiator windows */
+ pci->iw0btar = CFG_PCI_MEM_PHYS;
+ pci->iw1btar = CFG_PCI_IO_PHYS;
+ pci->iw2btar = CFG_PCI_CFG_PHYS;
+
+ pci->iwcr =
+ PCI_IWCR_W0C_EN | PCI_IWCR_W1C_EN | PCI_IWCR_W1C_IO |
+ PCI_IWCR_W2C_EN | PCI_IWCR_W2C_IO;
+
+ /* Enable bus master and mem access */
+ pci->scr = PCI_SCR_MW | PCI_SCR_B | PCI_SCR_M;
+
+ /* Cache line size and master latency */
+ pci->cr1 = PCI_CR1_CLS(8) | PCI_CR1_LTMR(0xFF);
+ pci->cr2 = 0;
+
+#ifdef CFG_PCI_BAR0
+ pci->bar0 = PCI_BAR_BAR0(CFG_PCI_BAR0);
+ pci->tbatr0 = CFG_PCI_TBATR0 | PCI_TBATR_EN;
+ barEn |= PCI_TCR1_B0E;
+#endif
+#ifdef CFG_PCI_BAR1
+ pci->bar1 = PCI_BAR_BAR1(CFG_PCI_BAR1);
+ pci->tbatr1 = CFG_PCI_TBATR1 | PCI_TBATR_EN;
+ barEn |= PCI_TCR1_B1E;
+#endif
+#ifdef CFG_PCI_BAR2
+ pci->bar2 = PCI_BAR_BAR2(CFG_PCI_BAR2);
+ pci->tbatr2 = CFG_PCI_TBATR2 | PCI_TBATR_EN;
+ barEn |= PCI_TCR1_B2E;
+#endif
+#ifdef CFG_PCI_BAR3
+ pci->bar3 = PCI_BAR_BAR3(CFG_PCI_BAR3);
+ pci->tbatr3 = CFG_PCI_TBATR3 | PCI_TBATR_EN;
+ barEn |= PCI_TCR1_B3E;
+#endif
+#ifdef CFG_PCI_BAR4
+ pci->bar4 = PCI_BAR_BAR4(CFG_PCI_BAR4);
+ pci->tbatr4 = CFG_PCI_TBATR4 | PCI_TBATR_EN;
+ barEn |= PCI_TCR1_B4E;
+#endif
+#ifdef CFG_PCI_BAR5
+ pci->bar5 = PCI_BAR_BAR5(CFG_PCI_BAR5);
+ pci->tbatr5 = CFG_PCI_TBATR5 | PCI_TBATR_EN;
+ barEn |= PCI_TCR1_B5E;
+#endif
+
+ pci->tcr2 = barEn;
+
+ /* Deassert reset bit */
+ pci->gscr &= ~PCI_GSCR_PR;
+ udelay(1000);
+
+ /* Enable PCI bus master support */
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ pci_set_region(hose->regions + 0, CFG_PCI_MEM_BUS, CFG_PCI_MEM_PHYS,
+ CFG_PCI_MEM_SIZE, PCI_REGION_MEM);
+
+ pci_set_region(hose->regions + 1, CFG_PCI_IO_BUS, CFG_PCI_IO_PHYS,
+ CFG_PCI_IO_SIZE, PCI_REGION_IO);
+
+ pci_set_region(hose->regions + 2, CFG_PCI_SYS_MEM_BUS,
+ CFG_PCI_SYS_MEM_PHYS, CFG_PCI_SYS_MEM_SIZE,
+ PCI_REGION_MEM | PCI_REGION_MEMORY);
+
+ hose->region_count = 3;
+
+ hose->cfg_addr = &(pci->car);
+ hose->cfg_data = (volatile unsigned char *)CFG_PCI_CFG_BUS;
+
+ pci_set_ops(hose, pci_read_cfg_byte, pci_read_cfg_word,
+ pci_read_cfg_dword, pci_write_cfg_byte, pci_write_cfg_word,
+ pci_write_cfg_dword);
+
+ /* Hose scan */
+ pci_register_hose(hose);
+ hose->last_busno = pci_hose_scan(hose);
+}
+#endif /* CONFIG_PCI */
diff --git a/cpu/mcf5445x/speed.c b/cpu/mcf5445x/speed.c
new file mode 100644
index 0000000..967becf
--- /dev/null
+++ b/cpu/mcf5445x/speed.c
@@ -0,0 +1,186 @@
+/*
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+#include <asm/immap.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Low Power Divider specifications
+ */
+#define CLOCK_LPD_MIN (1 << 0) /* Divider (decoded) */
+#define CLOCK_LPD_MAX (1 << 15) /* Divider (decoded) */
+
+#define CLOCK_PLL_FVCO_MAX 540000000
+#define CLOCK_PLL_FVCO_MIN 300000000
+
+#define CLOCK_PLL_FSYS_MAX 266666666
+#define CLOCK_PLL_FSYS_MIN 100000000
+#define MHZ 1000000
+
+void clock_enter_limp(int lpdiv)
+{
+ volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
+ int i, j;
+
+ /* Check bounds of divider */
+ if (lpdiv < CLOCK_LPD_MIN)
+ lpdiv = CLOCK_LPD_MIN;
+ if (lpdiv > CLOCK_LPD_MAX)
+ lpdiv = CLOCK_LPD_MAX;
+
+ /* Round divider down to nearest power of two */
+ for (i = 0, j = lpdiv; j != 1; j >>= 1, i++) ;
+
+ /* Apply the divider to the system clock */
+ ccm->cdr = (ccm->cdr & 0xF0FF) | CCM_CDR_LPDIV(i);
+
+ /* Enable Limp Mode */
+ ccm->misccr |= CCM_MISCCR_LIMP;
+}
+
+/*
+ * brief Exit Limp mode
+ * warning The PLL should be set and locked prior to exiting Limp mode
+ */
+void clock_exit_limp(void)
+{
+ volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
+ volatile pll_t *pll = (volatile pll_t *)MMAP_PLL;
+
+ /* Exit Limp mode */
+ ccm->misccr &= ~CCM_MISCCR_LIMP;
+
+ /* Wait for the PLL to lock */
+ while (!(pll->psr & PLL_PSR_LOCK)) ;
+}
+
+/*
+ * get_clocks() fills in gd->cpu_clock and gd->bus_clk
+ */
+int get_clocks(void)
+{
+ volatile ccm_t *ccm = (volatile ccm_t *)MMAP_CCM;
+ volatile pll_t *pll = (volatile pll_t *)MMAP_PLL;
+ volatile u8 *cpld = (volatile u8 *)(CFG_CS2_BASE + 3);
+ volatile u8 *fpga = (volatile u8 *)(CFG_CS3_BASE + 14);
+ int pllmult_nopci[] = { 20, 10, 24, 18, 12, 6, 16, 8 };
+ int pllmult_pci[] = { 12, 6, 16, 8 };
+ int vco, bPci, temp, fbtemp, pcrvalue;
+ int *pPllmult = NULL;
+ u16 fbpll_mask;
+ u8 cpldmode;
+
+ /* To determine PCI is present or not */
+ if (((ccm->ccr & CCM_CCR_360_FBCONFIG_MASK) == 0x00e0) ||
+ ((ccm->ccr & CCM_CCR_360_FBCONFIG_MASK) == 0x0060)) {
+ pPllmult = &pllmult_pci[0];
+ fbpll_mask = 3;
+ bPci = 1;
+ } else {
+ pPllmult = &pllmult_nopci[0];
+ fbpll_mask = 7;
+#ifdef CONFIG_PCI
+ gd->pci_clk = 0;
+#endif
+ bPci = 0;
+ }
+
+#ifdef CONFIG_M54455EVB
+ /* Temporary place here, belongs in board/freescale/... */
+ /* Temporary read from CCR- fixed fb issue, must be the same clock
+ as pci or input clock, causing cpld/fpga read inconsistancy */
+ fbtemp = pPllmult[ccm->ccr & fbpll_mask];
+
+ /* Break down into small pieces, code still in flex bus */
+ pcrvalue = pll->pcr & 0xFFFFF0FF;
+ temp = fbtemp - 1;
+ pcrvalue |= PLL_PCR_OUTDIV3(temp);
+
+ pll->pcr = pcrvalue;
+
+ cpldmode = *cpld & 0x03;
+ if (cpldmode == 0) {
+ /* RCON mode */
+ vco = pPllmult[ccm->rcon & fbpll_mask] * CFG_INPUT_CLKSRC;
+
+ if ((vco < CLOCK_PLL_FVCO_MIN) || (vco > CLOCK_PLL_FVCO_MAX)) {
+ /* invaild range, re-set in PCR */
+ int temp = ((pll->pcr & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
+ int i, j, bus;
+
+ j = (pll->pcr & 0xFF000000) >> 24;
+ for (i = j; i < 0xFF; i++) {
+ vco = i * CFG_INPUT_CLKSRC;
+ if (vco >= CLOCK_PLL_FVCO_MIN) {
+ bus = vco / temp;
+ if (bus <= CLOCK_PLL_FSYS_MIN - MHZ)
+ continue;
+ else
+ break;
+ }
+ }
+ pcrvalue = pll->pcr & 0x00FF00FF;
+ fbtemp = ((i - 1) << 8) | ((i - 1) << 12);
+ pcrvalue |= ((i << 24) | fbtemp);
+
+ pll->pcr = pcrvalue;
+ }
+ gd->vco_clk = vco; /* Vco clock */
+ } else if (cpldmode == 2) {
+ /* Normal mode */
+ vco = pPllmult[ccm->ccr & fbpll_mask] * CFG_INPUT_CLKSRC;
+ gd->vco_clk = vco; /* Vco clock */
+ } else if (cpldmode == 3) {
+ /* serial mode */
+ }
+#endif /* CONFIG_M54455EVB */
+
+ if ((ccm->ccr & CCM_MISCCR_LIMP) == CCM_MISCCR_LIMP) {
+ /* Limp mode */
+ } else {
+ gd->inp_clk = CFG_INPUT_CLKSRC; /* Input clock */
+
+ temp = (pll->pcr & PLL_PCR_OUTDIV1_MASK) + 1;
+ gd->cpu_clk = vco / temp; /* cpu clock */
+
+ temp = ((pll->pcr & PLL_PCR_OUTDIV2_MASK) >> 4) + 1;
+ gd->bus_clk = vco / temp; /* bus clock */
+
+ temp = ((pll->pcr & PLL_PCR_OUTDIV3_MASK) >> 8) + 1;
+ gd->flb_clk = vco / temp; /* FlexBus clock */
+
+#ifdef CONFIG_PCI
+ if (bPci) {
+ temp = ((pll->pcr & PLL_PCR_OUTDIV4_MASK) >> 12) + 1;
+ gd->pci_clk = vco / temp; /* PCI clock */
+ }
+#endif
+ }
+
+ return (0);
+}
diff --git a/cpu/mcf5445x/start.S b/cpu/mcf5445x/start.S
new file mode 100644
index 0000000..cd989ab
--- /dev/null
+++ b/cpu/mcf5445x/start.S
@@ -0,0 +1,388 @@
+/*
+ * Copyright (C) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
+ * Based on code from Bernhard Kuhn <bkuhn@metrowerks.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include "version.h"
+
+#ifndef CONFIG_IDENT_STRING
+#define CONFIG_IDENT_STRING ""
+#endif
+
+/* last three long word reserved for cache status */
+#define CACR_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END-12)
+#define ICACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 8)
+#define DCACHE_STATUS (CFG_INIT_RAM_ADDR+CFG_INIT_RAM_END- 4)
+
+#define _START _start
+#define _FAULT _fault
+
+#define SAVE_ALL \
+ move.w #0x2700,%sr; /* disable intrs */ \
+ subl #60,%sp; /* space for 15 regs */ \
+ moveml %d0-%d7/%a0-%a6,%sp@;
+
+#define RESTORE_ALL \
+ moveml %sp@,%d0-%d7/%a0-%a6; \
+ addl #60,%sp; /* space for 15 regs */ \
+ rte;
+
+.text
+/*
+ * Vector table. This is used for initial platform startup.
+ * These vectors are to catch any un-intended traps.
+ */
+_vectors:
+
+INITSP: .long 0x00000000 /* Initial SP */
+INITPC: .long _START /* Initial PC */
+vector02: .long _FAULT /* Access Error */
+vector03: .long _FAULT /* Address Error */
+vector04: .long _FAULT /* Illegal Instruction */
+vector05: .long _FAULT /* Reserved */
+vector06: .long _FAULT /* Reserved */
+vector07: .long _FAULT /* Reserved */
+vector08: .long _FAULT /* Privilege Violation */
+vector09: .long _FAULT /* Trace */
+vector0A: .long _FAULT /* Unimplemented A-Line */
+vector0B: .long _FAULT /* Unimplemented F-Line */
+vector0C: .long _FAULT /* Debug Interrupt */
+vector0D: .long _FAULT /* Reserved */
+vector0E: .long _FAULT /* Format Error */
+vector0F: .long _FAULT /* Unitialized Int. */
+
+/* Reserved */
+vector10_17:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector18: .long _FAULT /* Spurious Interrupt */
+vector19: .long _FAULT /* Autovector Level 1 */
+vector1A: .long _FAULT /* Autovector Level 2 */
+vector1B: .long _FAULT /* Autovector Level 3 */
+vector1C: .long _FAULT /* Autovector Level 4 */
+vector1D: .long _FAULT /* Autovector Level 5 */
+vector1E: .long _FAULT /* Autovector Level 6 */
+vector1F: .long _FAULT /* Autovector Level 7 */
+
+/* TRAP #0 - #15 */
+vector20_2F:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+/* Reserved */
+vector30_3F:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector64_127:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector128_191:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+vector192_255:
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+.long _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT, _FAULT
+
+ .text
+
+ .globl _start
+_start:
+ nop
+ nop
+ move.w #0x2700,%sr /* Mask off Interrupt */
+
+ /* Set vector base register at the beginning of the Flash */
+ move.l #CFG_FLASH_BASE, %d0
+ movec %d0, %VBR
+
+ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_RAM_CTRL), %d0
+ movec %d0, %RAMBAR0
+
+ /* initialize general use internal ram */
+ move.l #0, %d0
+ move.l #(CACR_STATUS), %a1 /* CACR */
+ move.l #(ICACHE_STATUS), %a2 /* icache */
+ move.l #(DCACHE_STATUS), %a3 /* dcache */
+ move.l %d0, (%a1)
+ move.l %d0, (%a2)
+ move.l %d0, (%a3)
+
+ /* invalidate and disable cache */
+ move.l #0x01004100, %d0 /* Invalidate cache cmd */
+ movec %d0, %CACR /* Invalidate cache */
+ move.l #0, %d0
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+ movec %d0, %ACR2
+ movec %d0, %ACR3
+
+ /* set stackpointer to end of internal ram to get some stackspace for
+ the first c-code */
+ move.l #(CFG_INIT_RAM_ADDR + CFG_INIT_SP_OFFSET), %sp
+ clr.l %sp@-
+
+ move.l #__got_start, %a5 /* put relocation table address to a5 */
+
+ bsr cpu_init_f /* run low-level CPU init code (from flash) */
+ bsr board_init_f /* run low-level board init code (from flash) */
+
+ /* board_init_f() does not return */
+
+/*------------------------------------------------------------------------------*/
+
+/*
+ * void relocate_code (addr_sp, gd, addr_moni)
+ *
+ * This "function" does not return, instead it continues in RAM
+ * after relocating the monitor code.
+ *
+ * r3 = dest
+ * r4 = src
+ * r5 = length in bytes
+ * r6 = cachelinesize
+ */
+ .globl relocate_code
+relocate_code:
+ link.w %a6,#0
+ move.l 8(%a6), %sp /* set new stack pointer */
+
+ move.l 12(%a6), %d0 /* Save copy of Global Data pointer */
+ move.l 16(%a6), %a0 /* Save copy of Destination Address */
+
+ move.l #CFG_MONITOR_BASE, %a1
+ move.l #__init_end, %a2
+ move.l %a0, %a3
+
+ /* copy the code to RAM */
+1:
+ move.l (%a1)+, (%a3)+
+ cmp.l %a1,%a2
+ bgt.s 1b
+
+/*
+ * We are done. Do not return, instead branch to second part of board
+ * initialization, now running from RAM.
+ */
+ move.l %a0, %a1
+ add.l #(in_ram - CFG_MONITOR_BASE), %a1
+ jmp (%a1)
+
+in_ram:
+
+clear_bss:
+ /*
+ * Now clear BSS segment
+ */
+ move.l %a0, %a1
+ add.l #(_sbss - CFG_MONITOR_BASE),%a1
+ move.l %a0, %d1
+ add.l #(_ebss - CFG_MONITOR_BASE),%d1
+6:
+ clr.l (%a1)+
+ cmp.l %a1,%d1
+ bgt.s 6b
+
+ /*
+ * fix got table in RAM
+ */
+ move.l %a0, %a1
+ add.l #(__got_start - CFG_MONITOR_BASE),%a1
+ move.l %a1,%a5 /* * fix got pointer register a5 */
+
+ move.l %a0, %a2
+ add.l #(__got_end - CFG_MONITOR_BASE),%a2
+
+7:
+ move.l (%a1),%d1
+ sub.l #_start,%d1
+ add.l %a0,%d1
+ move.l %d1,(%a1)+
+ cmp.l %a2, %a1
+ bne 7b
+
+ /* calculate relative jump to board_init_r in ram */
+ move.l %a0, %a1
+ add.l #(board_init_r - CFG_MONITOR_BASE), %a1
+
+ /* set parameters for board_init_r */
+ move.l %a0,-(%sp) /* dest_addr */
+ move.l %d0,-(%sp) /* gd */
+ jsr (%a1)
+
+/*------------------------------------------------------------------------------*/
+/* exception code */
+ .globl _fault
+_fault:
+ jmp _fault
+ .globl _exc_handler
+
+_exc_handler:
+ SAVE_ALL
+ movel %sp,%sp@-
+ bsr exc_handler
+ addql #4,%sp
+ RESTORE_ALL
+
+ .globl _int_handler
+_int_handler:
+ SAVE_ALL
+ movel %sp,%sp@-
+ bsr int_handler
+ addql #4,%sp
+ RESTORE_ALL
+
+/*------------------------------------------------------------------------------*/
+/* cache functions */
+ .globl icache_enable
+icache_enable:
+ move.l #(CACR_STATUS), %a1 /* read CACR Status */
+ move.l (%a1), %d1
+
+ move.l #0x00040100, %d0 /* Invalidate icache */
+ or.l %d1, %d0
+ movec %d0, %CACR
+
+ move.l #(CFG_SDRAM_BASE + 0xc000), %d0 /* Setup icache */
+ movec %d0, %ACR2
+
+ or.l #0x00088400, %d1 /* Enable bcache and icache */
+ movec %d1, %CACR
+
+ move.l #(ICACHE_STATUS), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl icache_disable
+icache_disable:
+ move.l #(CACR_STATUS), %a1 /* read CACR Status */
+ move.l (%a1), %d0
+
+ and.l #0xFFF77BFF, %d0
+ or.l #0x00040100, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Invalidate icache */
+ clr.l %d0
+ movec %d0, %ACR2
+ movec %d0, %ACR3
+
+ move.l #(ICACHE_STATUS), %a1
+ moveq #0, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl icache_status
+icache_status:
+ move.l #(ICACHE_STATUS), %a1
+ move.l (%a1), %d0
+ rts
+
+ .globl icache_invalid
+icache_invalid:
+ move.l #(CACR_STATUS), %a1 /* read CACR Status */
+ move.l (%a1), %d0
+
+ or.l #0x00040100, %d0 /* Invalidate icache */
+ movec %d0, %CACR /* Enable and invalidate cache */
+ rts
+
+ .globl dcache_enable
+dcache_enable:
+ move.l #(CACR_STATUS), %a1 /* read CACR Status */
+ move.l (%a1), %d1
+
+ move.l #0x01000000, %d0
+ or.l %d1, %d0
+ movec %d0, %CACR /* Invalidate dcache */
+
+ move.l #(CFG_SDRAM_BASE + 0xc000), %d0
+ movec %d0, %ACR0
+ move.l #0, %d0
+ movec %d0, %ACR1
+
+ or.l #0x80000000, %d1 /* Enable bcache and icache */
+ movec %d1, %CACR
+
+ move.l #(DCACHE_STATUS), %a1
+ moveq #1, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl dcache_disable
+dcache_disable:
+ move.l #(CACR_STATUS), %a1 /* read CACR Status */
+ move.l (%a1), %d0
+
+ and.l #0x7FFFFFFF, %d0
+ or.l #0x01000000, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Disable dcache */
+ clr.l %d0
+ movec %d0, %ACR0
+ movec %d0, %ACR1
+
+ move.l #(DCACHE_STATUS), %a1
+ moveq #0, %d0
+ move.l %d0, (%a1)
+ rts
+
+ .globl dcache_invalid
+dcache_invalid:
+ move.l #(CACR_STATUS), %a1 /* read CACR Status */
+ move.l (%a1), %d0
+
+ or.l #0x01000000, %d0 /* Setup cache mask */
+ movec %d0, %CACR /* Enable and invalidate cache */
+ rts
+
+ .globl dcache_status
+dcache_status:
+ move.l #(DCACHE_STATUS), %a1
+ move.l (%a1), %d0
+ rts
+
+/*------------------------------------------------------------------------------*/
+
+ .globl version_string
+version_string:
+ .ascii U_BOOT_VERSION
+ .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii CONFIG_IDENT_STRING, "\0"
diff --git a/cpu/microblaze/Makefile b/cpu/microblaze/Makefile
index db1afa5..9d54201 100644
--- a/cpu/microblaze/Makefile
+++ b/cpu/microblaze/Makefile
@@ -26,7 +26,7 @@
LIB = $(obj)lib$(CPU).a
START = start.o
-SOBJS = dcache.o icache.o irq.o disable_int.o enable_int.o
+SOBJS = irq.o
COBJS = cpu.o interrupts.o cache.o exception.o timer.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/microblaze/cache.c b/cpu/microblaze/cache.c
index fc388eb..6ce0b55 100644
--- a/cpu/microblaze/cache.c
+++ b/cpu/microblaze/cache.c
@@ -23,8 +23,9 @@
*/
#include <common.h>
+#include <asm/asm.h>
-#if (CONFIG_COMMANDS & CFG_CMD_CACHE)
+#if defined(CONFIG_CMD_CACHE)
int dcache_status (void)
{
@@ -45,4 +46,20 @@
__asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory");
return i;
}
+
+void icache_enable (void) {
+ MSRSET(0x20);
+}
+
+void icache_disable(void) {
+ MSRCLR(0x20);
+}
+
+void dcache_enable (void) {
+ MSRSET(0x80);
+}
+
+void dcache_disable(void) {
+ MSRCLR(0x80);
+}
#endif
diff --git a/cpu/microblaze/dcache.S b/cpu/microblaze/dcache.S
deleted file mode 100644
index eaf9671..0000000
--- a/cpu/microblaze/dcache.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
- .text
- .globl dcache_enable
- .ent dcache_enable
- .align 2
-dcache_enable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Set the instruction enable bit */
- ori r12, r12, 0x80
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end dcache_enable
-
- .text
- .globl dcache_disable
- .ent dcache_disable
- .align 2
-dcache_disable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Clear the data cache enable bit */
- andi r12, r12, ~0x80
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end dcache_disable
diff --git a/cpu/microblaze/disable_int.S b/cpu/microblaze/disable_int.S
deleted file mode 100644
index aecd795..0000000
--- a/cpu/microblaze/disable_int.S
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- .text
- .globl microblaze_disable_interrupts
- .ent microblaze_disable_interrupts
- .align 2
-microblaze_disable_interrupts:
- #Make space on stack for a temporary
- addi r1, r1, -4
- #Save register r12
- swi r12, r1, 0
- #Read the MSR register
- mfs r12, rmsr
- #Clear the interrupt enable bit
- andi r12, r12, ~2
- #Save the MSR register
- mts rmsr, r12
- #Load register r12
- lwi r12, r1, 0
- #Return
- rtsd r15, 8
- #Update stack in the delay slot
- addi r1, r1, 4
- .end microblaze_disable_interrupts
diff --git a/cpu/microblaze/enable_int.S b/cpu/microblaze/enable_int.S
deleted file mode 100644
index c096c6c..0000000
--- a/cpu/microblaze/enable_int.S
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstrmonstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- .text
- .globl microblaze_enable_interrupts
- .ent microblaze_enable_interrupts
- .align 2
-microblaze_enable_interrupts:
- addi r1, r1, -4
- swi r12, r1, 0
- mfs r12, rmsr
- ori r12, r12, 2
- mts rmsr, r12
- lwi r12, r1, 0
- rtsd r15, 8
- addi r1, r1, 4
- .end microblaze_enable_interrupts
diff --git a/cpu/microblaze/exception.c b/cpu/microblaze/exception.c
index b135acb..d76b05a 100644
--- a/cpu/microblaze/exception.c
+++ b/cpu/microblaze/exception.c
@@ -23,15 +23,16 @@
*/
#include <common.h>
+#include <asm/asm.h>
void _hw_exception_handler (void)
{
int address = 0;
int state = 0;
/* loading address of exception EAR */
- __asm__ __volatile ("mfs %0,rear"::"r" (address):"memory");
+ MFS (address, rear);
/* loading excetpion state register ESR */
- __asm__ __volatile ("mfs %0,resr"::"r" (state):"memory");
+ MFS (state, resr);
printf ("Hardware exception at 0x%x address\n", address);
switch (state & 0x1f) { /* mask on exception cause */
case 0x1:
@@ -49,6 +50,11 @@
case 0x5:
puts ("Divide by zero exception\n");
break;
+#ifdef MICROBLAZE_V5
+ case 0x1000:
+ puts ("Exception in delay slot\n");
+ break;
+#endif
default:
puts ("Undefined cause\n");
break;
diff --git a/cpu/microblaze/icache.S b/cpu/microblaze/icache.S
deleted file mode 100644
index 25940d1..0000000
--- a/cpu/microblaze/icache.S
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * (C) Copyright 2007 Michal Simek
- *
- * Michal SIMEK <monstr@monstr.eu>
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
- .text
- .globl icache_enable
- .ent icache_enable
- .align 2
-icache_enable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Set the instruction enable bit */
- ori r12, r12, 0x20
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end icache_enable
-
- .text
- .globl icache_disable
- .ent icache_disable
- .align 2
-icache_disable:
- /* Make space on stack for a temporary */
- addi r1, r1, -4
- /* Save register r12 */
- swi r12, r1, 0
- /* Read the MSR register */
- mfs r12, rmsr
- /* Clear the instruction enable bit */
- andi r12, r12, ~0x20
- /* Save the MSR register */
- mts rmsr, r12
- /* Load register r12 */
- lwi r12, r1, 0
- /* Return */
- rtsd r15, 8
- /* Update stack in the delay slot */
- addi r1, r1, 4
- .end icache_disable
diff --git a/cpu/microblaze/interrupts.c b/cpu/microblaze/interrupts.c
index 2db847c..3f04b29 100644
--- a/cpu/microblaze/interrupts.c
+++ b/cpu/microblaze/interrupts.c
@@ -27,6 +27,7 @@
#include <common.h>
#include <command.h>
#include <asm/microblaze_intc.h>
+#include <asm/asm.h>
#undef DEBUG_INT
@@ -35,12 +36,12 @@
void enable_interrupts (void)
{
- microblaze_enable_interrupts ();
+ MSRSET(0x2);
}
int disable_interrupts (void)
{
- microblaze_disable_interrupts ();
+ MSRCLR(0x2);
return 0;
}
@@ -48,6 +49,10 @@
#ifdef CFG_TIMER_0
extern void timer_init (void);
#endif
+#ifdef CFG_FSL_2
+extern void fsl_init2 (void);
+#endif
+
static struct irq_action vecs[CFG_INTC_0_NUM];
@@ -106,7 +111,6 @@
act->count = 0;
enable_one_interrupt (irq);
} else { /* disable */
-
act->handler = (interrupt_handler_t *) def_hdlr;
act->arg = (void *)irq;
disable_one_interrupt (irq);
@@ -141,18 +145,22 @@
#ifdef CFG_TIMER_0
timer_init ();
#endif
+#ifdef CFG_FSL_2
+ fsl_init2 ();
+#endif
enable_interrupts ();
return 0;
}
void interrupt_handler (void)
{
- int irqs;
- irqs = (intc->isr & intc->ier); /* find active interrupt */
-
+ int irqs = (intc->isr & intc->ier); /* find active interrupt */
+ int i = 1;
#ifdef DEBUG_INT
+ int value;
printf ("INTC isr %x, ier %x, iar %x, mer %x\n", intc->isr, intc->ier,
intc->iar, intc->mer);
+ R14(value);
printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
struct irq_action *act = vecs;
@@ -165,20 +173,24 @@
#endif
act->handler (act->arg);
act->count++;
+ intc->iar = i;
+ return;
}
irqs >>= 1;
act++;
+ i <<= 1;
}
- intc->iar = 0xFFFFFFFF; /* erase all events */
-#ifdef DEBUG
+
+#ifdef DEBUG_INT
printf ("Dump INTC reg, isr %x, ier %x, iar %x, mer %x\n", intc->isr,
intc->ier, intc->iar, intc->mer);
- printf ("Interrupt handler on %x line, r14\n", irqs);
+ R14(value);
+ printf ("Interrupt handler on %x line, r14 %x\n", irqs, value);
#endif
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
#ifdef CFG_INTC_0
int do_irqinfo (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
@@ -205,4 +217,4 @@
puts ("Undefined interrupt controller\n");
}
#endif
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/microblaze/irq.S b/cpu/microblaze/irq.S
index a4e3fbf..e1fc190 100644
--- a/cpu/microblaze/irq.S
+++ b/cpu/microblaze/irq.S
@@ -23,6 +23,7 @@
*/
#include <config.h>
+#include <asm/asm.h>
.text
.global _interrupt_handler
_interrupt_handler:
@@ -151,6 +152,11 @@
addi r1, r1, 4
/* enable_interrupt */
+#ifdef XILINX_USE_MSR_INSTR
+ msrset r0, 2
+#else
+ /* FIXME unstable in stressed mode - two irqs */
+ nop
addi r1, r1, -4
swi r12, r1, 0
mfs r12, rmsr
@@ -159,6 +165,7 @@
lwi r12, r1, 0
addi r1, r1, 4
nop
+#endif
bra r14
nop
nop
diff --git a/cpu/microblaze/start.S b/cpu/microblaze/start.S
index ca3befc..3c027ff 100644
--- a/cpu/microblaze/start.S
+++ b/cpu/microblaze/start.S
@@ -117,3 +117,36 @@
3: /* jumping to board_init */
brai board_init
1: bri 1b
+
+/*
+ * Read 16bit little endian
+ */
+ .text
+ .global in16
+ .ent in16
+ .align 2
+in16: lhu r3, r0, r5
+ bslli r4, r3, 8
+ bsrli r3, r3, 8
+ andi r4, r4, 0xffff
+ or r3, r3, r4
+ rtsd r15, 8
+ sext16 r3, r3
+ .end in16
+
+/*
+ * Write 16bit little endian
+ * first parameter(r5) - address, second(r6) - short value
+ */
+ .text
+ .global out16
+ .ent out16
+ .align 2
+out16: bslli r3, r6, 8
+ bsrli r6, r6, 8
+ andi r3, r3, 0xffff
+ or r3, r3, r6
+ sh r3, r0, r5
+ rtsd r15, 8
+ or r0, r0, r0
+ .end out16
diff --git a/cpu/microblaze/timer.c b/cpu/microblaze/timer.c
index be4fd57..ab1cb12 100644
--- a/cpu/microblaze/timer.c
+++ b/cpu/microblaze/timer.c
@@ -24,6 +24,7 @@
#include <common.h>
#include <asm/microblaze_timer.h>
+#include <asm/microblaze_intc.h>
volatile int timestamp = 0;
@@ -44,9 +45,6 @@
#ifdef CFG_INTC_0
#ifdef CFG_TIMER_0
-extern void install_interrupt_handler (int irq, interrupt_handler_t * hdlr,
- void *arg);
-
microblaze_timer_t *tmr = (microblaze_timer_t *) (CFG_TIMER_0_ADDR);
void timer_isr (void *arg)
diff --git a/cpu/mips/au1x00_eth.c b/cpu/mips/au1x00_eth.c
index 078e832..b69741a 100644
--- a/cpu/mips/au1x00_eth.c
+++ b/cpu/mips/au1x00_eth.c
@@ -63,7 +63,7 @@
#include <asm/io.h>
#include <asm/au1x00.h>
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
#include <miiphy.h>
#endif
@@ -241,7 +241,7 @@
eth_register(dev);
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
au1x00_miiphy_read, au1x00_miiphy_write);
#endif
@@ -249,7 +249,7 @@
return 1;
}
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
int au1x00_miiphy_read(char *devname, unsigned char addr,
unsigned char reg, unsigned short * value)
{
@@ -306,6 +306,6 @@
*mii_control_reg = mii_control;
return 0;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_MII */
+#endif
#endif /* CONFIG_AU1X00 */
diff --git a/cpu/mpc512x/Makefile b/cpu/mpc512x/Makefile
new file mode 100644
index 0000000..2be35b2
--- /dev/null
+++ b/cpu/mpc512x/Makefile
@@ -0,0 +1,46 @@
+#
+# (C) Copyright 2007 DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = $(obj)lib$(CPU).a
+
+START = start.o
+COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o serial.o fec.o i2c.o
+
+SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+START := $(addprefix $(obj),$(START))
+
+all: $(obj).depend $(START) $(LIB)
+
+$(LIB): $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/cpu/mpc512x/config.mk b/cpu/mpc512x/config.mk
new file mode 100644
index 0000000..3259d53
--- /dev/null
+++ b/cpu/mpc512x/config.mk
@@ -0,0 +1,25 @@
+#
+# (C) Copyright 2007 DENX Software Engineering
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
+
+PLATFORM_CPPFLAGS += -DCONFIG_MPC512X -DCONFIG_E300 \
+ -ffixed-r2 -ffixed-r29 -msoft-float -mcpu=603e
diff --git a/cpu/mpc512x/cpu.c b/cpu/mpc512x/cpu.c
new file mode 100644
index 0000000..accae6e
--- /dev/null
+++ b/cpu/mpc512x/cpu.c
@@ -0,0 +1,127 @@
+/*
+ * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * CPU specific code for the MPC512x family.
+ *
+ * Derived from the MPC83xx code.
+ */
+
+#include <common.h>
+#include <command.h>
+#include <mpc512x.h>
+#include <asm/processor.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int checkcpu (void)
+{
+ volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ ulong clock = gd->cpu_clk;
+ u32 pvr = get_pvr ();
+ u32 spridr = immr->sysconf.spridr;
+ char buf[32];
+
+ puts ("CPU: ");
+
+ switch (spridr & 0xffff0000) {
+ case SPR_5121E:
+ puts ("MPC5121e ");
+ break;
+ default:
+ printf ("Unknown part ID %08x ", spridr & 0xffff0000);
+ }
+ printf ("rev. %d.%d, Core ", SVR_MJREV (spridr), SVR_MNREV (spridr));
+
+ switch (pvr & 0xffff0000) {
+ case PVR_E300C4:
+ puts ("e300c4 ");
+ break;
+ default:
+ puts ("unknown ");
+ }
+ printf ("at %s MHz, CSB at %3d MHz\n", strmhz(buf, clock),
+ gd->csb_clk / 1000000);
+ return 0;
+}
+
+
+int
+do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ ulong msr;
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+
+ /* Interrupts and MMU off */
+ __asm__ __volatile__ ("mfmsr %0":"=r" (msr):);
+
+ msr &= ~( MSR_EE | MSR_IR | MSR_DR);
+ __asm__ __volatile__ ("mtmsr %0"::"r" (msr));
+
+ /*
+ * Enable Reset Control Reg - "RSTE" is the magic word that let us go
+ */
+ immap->reset.rpr = 0x52535445;
+
+ /* Verify Reset Control Reg is enabled */
+ while (!((immap->reset.rcer) & RCER_CRE))
+ ;
+
+ printf ("Resetting the board.\n");
+ udelay(200);
+
+ /* Perform reset */
+ immap->reset.rcr = RCR_SWHR;
+
+ /* Unreached... */
+ return 1;
+}
+
+
+/*
+ * Get timebase clock frequency (like cpu_clk in Hz)
+ */
+unsigned long get_tbclk (void)
+{
+ ulong tbclk;
+
+ tbclk = (gd->bus_clk + 3L) / 4L;
+
+ return tbclk;
+}
+
+
+#if defined(CONFIG_WATCHDOG)
+void watchdog_reset (void)
+{
+ int re_enable = disable_interrupts ();
+
+ /* Reset watchdog */
+ volatile immap_t *immr = (immap_t *) CFG_IMMR;
+ immr->wdt.swsrr = 0x556c;
+ immr->wdt.swsrr = 0xaa39;
+
+ if (re_enable)
+ enable_interrupts ();
+}
+#endif
diff --git a/cpu/mpc512x/cpu_init.c b/cpu/mpc512x/cpu_init.c
new file mode 100644
index 0000000..d6949f6
--- /dev/null
+++ b/cpu/mpc512x/cpu_init.c
@@ -0,0 +1,87 @@
+/*
+ * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Derived from the MPC83xx code.
+ *
+ */
+
+#include <common.h>
+#include <mpc512x.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+/*
+ * Set up the memory map, initialize registers,
+ */
+void cpu_init_f (volatile immap_t * im)
+{
+ u32 ips_div;
+
+ /* Pointer is writable since we allocated a register for it */
+ gd = (gd_t *) (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET);
+
+ /* Clear initial global data */
+ memset ((void *) gd, 0, sizeof (gd_t));
+
+ /* system performance tweaking */
+
+#ifdef CFG_ACR_PIPE_DEP
+ /* Arbiter pipeline depth */
+ im->arbiter.acr = (im->arbiter.acr & ~ACR_PIPE_DEP) |
+ (CFG_ACR_PIPE_DEP << ACR_PIPE_DEP_SHIFT);
+#endif
+
+#ifdef CFG_ACR_RPTCNT
+ /* Arbiter repeat count */
+ im->arbiter.acr = ((im->arbiter.acr & ~(ACR_RPTCNT)) |
+ (CFG_ACR_RPTCNT << ACR_RPTCNT_SHIFT));
+#endif
+
+ /* RSR - Reset Status Register - clear all status */
+ gd->reset_status = im->reset.rsr;
+ im->reset.rsr = ~(RSR_RES);
+
+ /*
+ * RMR - Reset Mode Register - enable checkstop reset
+ */
+ im->reset.rmr = (RMR_CSRE & (1 << RMR_CSRE_SHIFT));
+
+ /* Set IPS-CSB divider: IPS = 1/2 CSB */
+ ips_div = im->clk.scfr[0];
+ ips_div &= ~(SCFR1_IPS_DIV_MASK);
+ ips_div |= SCFR1_IPS_DIV << SCFR1_IPS_DIV_SHIFT;
+ im->clk.scfr[0] = ips_div;
+
+ /*
+ * Enable Time Base/Decrementer
+ *
+ * NOTICE: TB needs to be enabled as early as possible in order to
+ * have udelay() working; if not enabled, usually leads to a hang, like
+ * during FLASH chip identification etc.
+ */
+ im->sysconf.spcr |= SPCR_TBEN;
+}
+
+int cpu_init_r (void)
+{
+ return 0;
+}
diff --git a/cpu/mpc512x/fec.c b/cpu/mpc512x/fec.c
new file mode 100644
index 0000000..675b7a2
--- /dev/null
+++ b/cpu/mpc512x/fec.c
@@ -0,0 +1,809 @@
+/*
+ * (C) Copyright 2003-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Derived from the MPC8xx FEC driver.
+ * Adapted for MPC512x by Grzegorz Bernacki <gjb@semihalf.com>
+ */
+
+#include <common.h>
+#include <mpc512x.h>
+#include <malloc.h>
+#include <net.h>
+#include <miiphy.h>
+#include "fec.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define DEBUG 0
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
+ defined(CONFIG_MPC512x_FEC)
+
+#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
+#error "CONFIG_MII has to be defined!"
+#endif
+
+#if (DEBUG & 0x40)
+static uint32 local_crc32(char *string, unsigned int crc_value, int len);
+#endif
+
+int fec512x_miiphy_read(char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal);
+int fec512x_miiphy_write(char *devname, uint8 phyAddr, uint8 regAddr, uint16 data);
+int mpc512x_fec_init_phy(struct eth_device *dev, bd_t * bis);
+
+static uchar rx_buff[FEC_BUFFER_SIZE];
+static int rx_buff_idx = 0;
+
+/********************************************************************/
+#if (DEBUG & 0x2)
+static void mpc512x_fec_phydump (char *devname)
+{
+ uint16 phyStatus, i;
+ uint8 phyAddr = CONFIG_PHY_ADDR;
+ uint8 reg_mask[] = {
+ /* regs to print: 0...8, 21,27,31 */
+ 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 0, 1,
+ };
+
+ for (i = 0; i < 32; i++) {
+ if (reg_mask[i]) {
+ miiphy_read (devname, phyAddr, i, &phyStatus);
+ printf ("Mii reg %d: 0x%04x\n", i, phyStatus);
+ }
+ }
+}
+#endif
+
+/********************************************************************/
+static int mpc512x_fec_bd_init (mpc512x_fec_priv *fec)
+{
+ int ix;
+
+ /*
+ * Receive BDs init
+ */
+ for (ix = 0; ix < FEC_RBD_NUM; ix++) {
+ fec->bdBase->rbd[ix].dataPointer = (uint32)&fec->bdBase->recv_frames[ix];
+ fec->bdBase->rbd[ix].status = FEC_RBD_EMPTY;
+ fec->bdBase->rbd[ix].dataLength = 0;
+ }
+
+ /*
+ * have the last RBD to close the ring
+ */
+ fec->bdBase->rbd[ix - 1].status |= FEC_RBD_WRAP;
+ fec->rbdIndex = 0;
+
+ /*
+ * Trasmit BDs init
+ */
+ for (ix = 0; ix < FEC_TBD_NUM; ix++) {
+ fec->bdBase->tbd[ix].status = 0;
+ }
+
+ /*
+ * Have the last TBD to close the ring
+ */
+ fec->bdBase->tbd[ix - 1].status |= FEC_TBD_WRAP;
+
+ /*
+ * Initialize some indices
+ */
+ fec->tbdIndex = 0;
+ fec->usedTbdIndex = 0;
+ fec->cleanTbdNum = FEC_TBD_NUM;
+
+ return 0;
+}
+
+/********************************************************************/
+static void mpc512x_fec_rbd_clean (mpc512x_fec_priv *fec, volatile FEC_RBD * pRbd)
+{
+ /*
+ * Reset buffer descriptor as empty
+ */
+ if ((fec->rbdIndex) == (FEC_RBD_NUM - 1))
+ pRbd->status = (FEC_RBD_WRAP | FEC_RBD_EMPTY);
+ else
+ pRbd->status = FEC_RBD_EMPTY;
+
+ pRbd->dataLength = 0;
+
+ /*
+ * Increment BD count
+ */
+ fec->rbdIndex = (fec->rbdIndex + 1) % FEC_RBD_NUM;
+
+ /*
+ * Now, we have an empty RxBD, notify FEC
+ */
+ fec->eth->r_des_active = 0x01000000; /* Descriptor polling active */
+}
+
+/********************************************************************/
+static void mpc512x_fec_tbd_scrub (mpc512x_fec_priv *fec)
+{
+ volatile FEC_TBD *pUsedTbd;
+
+#if (DEBUG & 0x1)
+ printf ("tbd_scrub: fec->cleanTbdNum = %d, fec->usedTbdIndex = %d\n",
+ fec->cleanTbdNum, fec->usedTbdIndex);
+#endif
+
+ /*
+ * process all the consumed TBDs
+ */
+ while (fec->cleanTbdNum < FEC_TBD_NUM) {
+ pUsedTbd = &fec->bdBase->tbd[fec->usedTbdIndex];
+ if (pUsedTbd->status & FEC_TBD_READY) {
+#if (DEBUG & 0x20)
+ printf ("Cannot clean TBD %d, in use\n", fec->usedTbdIndex);
+#endif
+ return;
+ }
+
+ /*
+ * clean this buffer descriptor
+ */
+ if (fec->usedTbdIndex == (FEC_TBD_NUM - 1))
+ pUsedTbd->status = FEC_TBD_WRAP;
+ else
+ pUsedTbd->status = 0;
+
+ /*
+ * update some indeces for a correct handling of the TBD ring
+ */
+ fec->cleanTbdNum++;
+ fec->usedTbdIndex = (fec->usedTbdIndex + 1) % FEC_TBD_NUM;
+ }
+}
+
+/********************************************************************/
+static void mpc512x_fec_set_hwaddr (mpc512x_fec_priv *fec, char *mac)
+{
+ uint8 currByte; /* byte for which to compute the CRC */
+ int byte; /* loop - counter */
+ int bit; /* loop - counter */
+ uint32 crc = 0xffffffff; /* initial value */
+
+ /*
+ * The algorithm used is the following:
+ * we loop on each of the six bytes of the provided address,
+ * and we compute the CRC by left-shifting the previous
+ * value by one position, so that each bit in the current
+ * byte of the address may contribute the calculation. If
+ * the latter and the MSB in the CRC are different, then
+ * the CRC value so computed is also ex-ored with the
+ * "polynomium generator". The current byte of the address
+ * is also shifted right by one bit at each iteration.
+ * This is because the CRC generatore in hardware is implemented
+ * as a shift-register with as many ex-ores as the radixes
+ * in the polynomium. This suggests that we represent the
+ * polynomiumm itself as a 32-bit constant.
+ */
+ for (byte = 0; byte < 6; byte++) {
+ currByte = mac[byte];
+ for (bit = 0; bit < 8; bit++) {
+ if ((currByte & 0x01) ^ (crc & 0x01)) {
+ crc >>= 1;
+ crc = crc ^ 0xedb88320;
+ } else {
+ crc >>= 1;
+ }
+ currByte >>= 1;
+ }
+ }
+
+ crc = crc >> 26;
+
+ /*
+ * Set individual hash table register
+ */
+ if (crc >= 32) {
+ fec->eth->iaddr1 = (1 << (crc - 32));
+ fec->eth->iaddr2 = 0;
+ } else {
+ fec->eth->iaddr1 = 0;
+ fec->eth->iaddr2 = (1 << crc);
+ }
+
+ /*
+ * Set physical address
+ */
+ fec->eth->paddr1 = (mac[0] << 24) + (mac[1] << 16) + (mac[2] << 8) + mac[3];
+ fec->eth->paddr2 = (mac[4] << 24) + (mac[5] << 16) + 0x8808;
+}
+
+/********************************************************************/
+static int mpc512x_fec_init (struct eth_device *dev, bd_t * bis)
+{
+ mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv;
+
+#if (DEBUG & 0x1)
+ printf ("mpc512x_fec_init... Begin\n");
+#endif
+
+ /* Set interrupt mask register */
+ fec->eth->imask = 0x00000000;
+
+ /* Clear FEC-Lite interrupt event register(IEVENT) */
+ fec->eth->ievent = 0xffffffff;
+
+ /* Set transmit fifo watermark register(X_WMRK), default = 64 */
+ fec->eth->x_wmrk = 0x0;
+
+ /* Set Opcode/Pause Duration Register */
+ fec->eth->op_pause = 0x00010020;
+
+ /* Frame length=1522; MII mode */
+ fec->eth->r_cntrl = (FEC_MAX_FRAME_LEN << 16) | 0x24;
+
+ /* Half-duplex, heartbeat disabled */
+ fec->eth->x_cntrl = 0x00000000;
+
+ /* Enable MIB counters */
+ fec->eth->mib_control = 0x0;
+
+ /* Setup recv fifo start and buff size */
+ fec->eth->r_fstart = 0x500;
+ fec->eth->r_buff_size = FEC_BUFFER_SIZE;
+
+ /* Setup BD base addresses */
+ fec->eth->r_des_start = (uint32)fec->bdBase->rbd;
+ fec->eth->x_des_start = (uint32)fec->bdBase->tbd;
+
+ /* DMA Control */
+ fec->eth->dma_control = 0xc0000000;
+
+ /* Enable FEC */
+ fec->eth->ecntrl |= 0x00000006;
+
+ /* Initilize addresses and status words of BDs */
+ mpc512x_fec_bd_init (fec);
+
+ /* Descriptor polling active */
+ fec->eth->r_des_active = 0x01000000;
+
+#if (DEBUG & 0x1)
+ printf("mpc512x_fec_init... Done \n");
+#endif
+ return 1;
+}
+
+/********************************************************************/
+int mpc512x_fec_init_phy (struct eth_device *dev, bd_t * bis)
+{
+ mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv;
+ const uint8 phyAddr = CONFIG_PHY_ADDR; /* Only one PHY */
+ int timeout = 1;
+ uint16 phyStatus;
+
+#if (DEBUG & 0x1)
+ printf ("mpc512x_fec_init_phy... Begin\n");
+#endif
+
+ /*
+ * Clear FEC-Lite interrupt event register(IEVENT)
+ */
+ fec->eth->ievent = 0xffffffff;
+
+ /*
+ * Set interrupt mask register
+ */
+ fec->eth->imask = 0x00000000;
+
+ if (fec->xcv_type != SEVENWIRE) {
+ /*
+ * Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
+ * and do not drop the Preamble.
+ */
+ fec->eth->mii_speed = (((gd->ipb_clk / 1000000) / 5) + 1) << 1;
+
+ /*
+ * Reset PHY, then delay 300ns
+ */
+ miiphy_write (dev->name, phyAddr, 0x0, 0x8000);
+ udelay (1000);
+
+ if (fec->xcv_type == MII10) {
+ /*
+ * Force 10Base-T, FDX operation
+ */
+#if (DEBUG & 0x2)
+ printf ("Forcing 10 Mbps ethernet link... ");
+#endif
+ miiphy_read (dev->name, phyAddr, 0x1, &phyStatus);
+
+ miiphy_write (dev->name, phyAddr, 0x0, 0x0180);
+
+ timeout = 20;
+ do { /* wait for link status to go down */
+ udelay (10000);
+ if ((timeout--) == 0) {
+#if (DEBUG & 0x2)
+ printf ("hmmm, should not have waited...");
+#endif
+ break;
+ }
+ miiphy_read (dev->name, phyAddr, 0x1, &phyStatus);
+#if (DEBUG & 0x2)
+ printf ("=");
+#endif
+ } while ((phyStatus & 0x0004)); /* !link up */
+
+ timeout = 1000;
+ do { /* wait for link status to come back up */
+ udelay (10000);
+ if ((timeout--) == 0) {
+ printf ("failed. Link is down.\n");
+ break;
+ }
+ miiphy_read (dev->name, phyAddr, 0x1, &phyStatus);
+#if (DEBUG & 0x2)
+ printf ("+");
+#endif
+ } while (!(phyStatus & 0x0004)); /* !link up */
+
+#if (DEBUG & 0x2)
+ printf ("done.\n");
+#endif
+ } else { /* MII100 */
+ /*
+ * Set the auto-negotiation advertisement register bits
+ */
+ miiphy_write (dev->name, phyAddr, 0x4, 0x01e1);
+
+ /*
+ * Set MDIO bit 0.12 = 1(&& bit 0.9=1?) to enable auto-negotiation
+ */
+ miiphy_write (dev->name, phyAddr, 0x0, 0x1200);
+
+ /*
+ * Wait for AN completion
+ */
+ timeout = 50000;
+ do {
+ udelay (1000);
+
+ if ((timeout--) == 0) {
+#if (DEBUG & 0x2)
+ printf ("PHY auto neg 0 failed...\n");
+#endif
+ return -1;
+ }
+
+ if (miiphy_read (dev->name, phyAddr, 0x1, &phyStatus) != 0) {
+#if (DEBUG & 0x2)
+ printf ("PHY auto neg 1 failed 0x%04x...\n", phyStatus);
+#endif
+ return -1;
+ }
+ } while (!(phyStatus & 0x0004));
+
+#if (DEBUG & 0x2)
+ printf ("PHY auto neg complete! \n");
+#endif
+ }
+ }
+
+#if (DEBUG & 0x2)
+ if (fec->xcv_type != SEVENWIRE)
+ mpc512x_fec_phydump (dev->name);
+#endif
+
+#if (DEBUG & 0x1)
+ printf ("mpc512x_fec_init_phy... Done \n");
+#endif
+ return 1;
+}
+
+/********************************************************************/
+static void mpc512x_fec_halt (struct eth_device *dev)
+{
+ mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv;
+ int counter = 0xffff;
+
+#if (DEBUG & 0x2)
+ if (fec->xcv_type != SEVENWIRE)
+ mpc512x_fec_phydump (dev->name);
+#endif
+
+ /*
+ * mask FEC chip interrupts
+ */
+ fec->eth->imask = 0;
+
+ /*
+ * issue graceful stop command to the FEC transmitter if necessary
+ */
+ fec->eth->x_cntrl |= 0x00000001;
+
+ /*
+ * wait for graceful stop to register
+ */
+ while ((counter--) && (!(fec->eth->ievent & 0x10000000))) ;
+
+ /*
+ * Disable the Ethernet Controller
+ */
+ fec->eth->ecntrl &= 0xfffffffd;
+
+ /*
+ * Issue a reset command to the FEC chip
+ */
+ fec->eth->ecntrl |= 0x1;
+
+ /*
+ * wait at least 16 clock cycles
+ */
+ udelay (10);
+#if (DEBUG & 0x3)
+ printf ("Ethernet task stopped\n");
+#endif
+}
+
+/********************************************************************/
+
+static int mpc512x_fec_send (struct eth_device *dev, volatile void *eth_data,
+ int data_length)
+{
+ /*
+ * This routine transmits one frame. This routine only accepts
+ * 6-byte Ethernet addresses.
+ */
+ mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv;
+ volatile FEC_TBD *pTbd;
+
+#if (DEBUG & 0x20)
+ printf("tbd status: 0x%04x\n", fec->tbdBase[fec->tbdIndex].status);
+#endif
+
+ /*
+ * Clear Tx BD ring at first
+ */
+ mpc512x_fec_tbd_scrub (fec);
+
+ /*
+ * Check for valid length of data.
+ */
+ if ((data_length > 1500) || (data_length <= 0)) {
+ return -1;
+ }
+
+ /*
+ * Check the number of vacant TxBDs.
+ */
+ if (fec->cleanTbdNum < 1) {
+#if (DEBUG & 0x20)
+ printf ("No available TxBDs ...\n");
+#endif
+ return -1;
+ }
+
+ /*
+ * Get the first TxBD to send the mac header
+ */
+ pTbd = &fec->bdBase->tbd[fec->tbdIndex];
+ pTbd->dataLength = data_length;
+ pTbd->dataPointer = (uint32)eth_data;
+ pTbd->status |= FEC_TBD_LAST | FEC_TBD_TC | FEC_TBD_READY;
+ fec->tbdIndex = (fec->tbdIndex + 1) % FEC_TBD_NUM;
+
+ /* Activate transmit Buffer Descriptor polling */
+ fec->eth->x_des_active = 0x01000000; /* Descriptor polling active */
+
+#if (DEBUG & 0x8)
+ printf ( "+" );
+#endif
+
+ fec->cleanTbdNum -= 1;
+
+ /*
+ * wait until frame is sent .
+ */
+ while (pTbd->status & FEC_TBD_READY) {
+ udelay (10);
+#if (DEBUG & 0x8)
+ printf ("TDB status = %04x\n", pTbd->status);
+#endif
+ }
+
+ return 0;
+}
+
+
+/********************************************************************/
+static int mpc512x_fec_recv (struct eth_device *dev)
+{
+ /*
+ * This command pulls one frame from the card
+ */
+ mpc512x_fec_priv *fec = (mpc512x_fec_priv *)dev->priv;
+ volatile FEC_RBD *pRbd = &fec->bdBase->rbd[fec->rbdIndex];
+ unsigned long ievent;
+ int frame_length = 0;
+
+#if (DEBUG & 0x1)
+ printf ("mpc512x_fec_recv %d Start...\n", fec->rbdIndex);
+#endif
+#if (DEBUG & 0x8)
+ printf( "-" );
+#endif
+
+ /*
+ * Check if any critical events have happened
+ */
+ ievent = fec->eth->ievent;
+ fec->eth->ievent = ievent;
+ if (ievent & 0x20060000) {
+ /* BABT, Rx/Tx FIFO errors */
+ mpc512x_fec_halt (dev);
+ mpc512x_fec_init (dev, NULL);
+ return 0;
+ }
+ if (ievent & 0x80000000) {
+ /* Heartbeat error */
+ fec->eth->x_cntrl |= 0x00000001;
+ }
+ if (ievent & 0x10000000) {
+ /* Graceful stop complete */
+ if (fec->eth->x_cntrl & 0x00000001) {
+ mpc512x_fec_halt (dev);
+ fec->eth->x_cntrl &= ~0x00000001;
+ mpc512x_fec_init (dev, NULL);
+ }
+ }
+
+ if (!(pRbd->status & FEC_RBD_EMPTY)) {
+ if (!(pRbd->status & FEC_RBD_ERR) &&
+ ((pRbd->dataLength - 4) > 14)) {
+
+ /*
+ * Get buffer size
+ */
+ if (pRbd->status & FEC_RBD_LAST)
+ frame_length = pRbd->dataLength - 4;
+ else
+ frame_length = pRbd->dataLength;
+#if (DEBUG & 0x20)
+ {
+ int i;
+ printf ("recv data length 0x%08x data hdr: ",
+ pRbd->dataLength);
+ for (i = 0; i < 14; i++)
+ printf ("%x ", *((uint8*)pRbd->dataPointer + i));
+ printf("\n");
+ }
+#endif
+ /*
+ * Fill the buffer and pass it to upper layers
+ */
+ memcpy (&rx_buff[rx_buff_idx], (void*)pRbd->dataPointer,
+ frame_length - rx_buff_idx);
+ rx_buff_idx = frame_length;
+
+ if (pRbd->status & FEC_RBD_LAST) {
+ NetReceive ((uchar*)rx_buff, frame_length);
+ rx_buff_idx = 0;
+ }
+ }
+
+ /*
+ * Reset buffer descriptor as empty
+ */
+ mpc512x_fec_rbd_clean (fec, pRbd);
+ }
+
+ /* Try to fill Buffer Descriptors */
+ fec->eth->r_des_active = 0x01000000; /* Descriptor polling active */
+ return frame_length;
+}
+
+/********************************************************************/
+int mpc512x_fec_initialize (bd_t * bis)
+{
+
+ immap_t *im = (immap_t*) CFG_IMMR;
+ mpc512x_fec_priv *fec;
+ struct eth_device *dev;
+ int i;
+ char *tmp, *end, env_enetaddr[6];
+ uint32 *reg;
+ void * bd;
+
+ fec = (mpc512x_fec_priv *) malloc (sizeof(*fec));
+ dev = (struct eth_device *) malloc (sizeof(*dev));
+ memset (dev, 0, sizeof *dev);
+
+ fec->eth = (ethernet_regs *) MPC512X_FEC;
+
+# ifndef CONFIG_FEC_10MBIT
+ fec->xcv_type = MII100;
+# else
+ fec->xcv_type = MII10;
+# endif
+ dev->priv = (void *)fec;
+ dev->iobase = MPC512X_FEC;
+ dev->init = mpc512x_fec_init;
+ dev->halt = mpc512x_fec_halt;
+ dev->send = mpc512x_fec_send;
+ dev->recv = mpc512x_fec_recv;
+
+ sprintf (dev->name, "FEC ETHERNET");
+ eth_register (dev);
+
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+ miiphy_register (dev->name,
+ fec512x_miiphy_read, fec512x_miiphy_write);
+#endif
+
+ /*
+ * Initialize I\O pins
+ */
+ reg = (uint32 *) &(im->io_ctrl.regs[PSC0_0_IDX]);
+
+ for (i = 0; i < 15; i++)
+ reg[i] = IOCTRL_MUX_FEC | 0x00000001;
+
+ im->io_ctrl.regs[SPDIF_TXCLOCK_IDX] = IOCTRL_MUX_FEC | 0x00000001;
+ im->io_ctrl.regs[SPDIF_TX_IDX] = IOCTRL_MUX_FEC | 0x00000001;
+ im->io_ctrl.regs[SPDIF_RX_IDX] = IOCTRL_MUX_FEC | 0x00000001;
+
+ /* Clean up space FEC's MIB and FIFO RAM ...*/
+ memset ((void *) MPC512X_FEC + 0x200, 0x00, 0x400);
+
+ /*
+ * Malloc space for BDs (must be quad word-aligned)
+ * this pointer is lost, so cannot be freed
+ */
+ bd = malloc (sizeof(mpc512x_buff_descs) + 0x1f);
+ fec->bdBase = (mpc512x_buff_descs*)((uint32)bd & 0xfffffff0);
+ memset ((void *) bd, 0x00, sizeof(mpc512x_buff_descs) + 0x1f);
+
+ /*
+ * Set interrupt mask register
+ */
+ fec->eth->imask = 0x00000000;
+
+ /*
+ * Clear FEC-Lite interrupt event register(IEVENT)
+ */
+ fec->eth->ievent = 0xffffffff;
+
+ /*
+ * Try to set the mac address now. The fec mac address is
+ * a garbage after reset. When not using fec for booting
+ * the Linux fec driver will try to work with this garbage.
+ */
+ tmp = getenv ("ethaddr");
+ if (tmp) {
+ for (i=0; i<6; i++) {
+ env_enetaddr[i] = tmp ? simple_strtoul (tmp, &end, 16) : 0;
+ if (tmp)
+ tmp = (*end) ? end+1 : end;
+ }
+ mpc512x_fec_set_hwaddr (fec, env_enetaddr);
+ fec->eth->gaddr1 = 0x00000000;
+ fec->eth->gaddr2 = 0x00000000;
+ }
+
+ mpc512x_fec_init_phy (dev, bis);
+
+ return 1;
+}
+
+/* MII-interface related functions */
+/********************************************************************/
+int fec512x_miiphy_read (char *devname, uint8 phyAddr, uint8 regAddr, uint16 * retVal)
+{
+ ethernet_regs *eth = (ethernet_regs *) MPC512X_FEC;
+ uint32 reg; /* convenient holder for the PHY register */
+ uint32 phy; /* convenient holder for the PHY */
+ int timeout = 0xffff;
+
+ /*
+ * reading from any PHY's register is done by properly
+ * programming the FEC's MII data register.
+ */
+ reg = regAddr << FEC_MII_DATA_RA_SHIFT;
+ phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
+
+ eth->mii_data = (FEC_MII_DATA_ST | FEC_MII_DATA_OP_RD | FEC_MII_DATA_TA | phy | reg);
+
+ /*
+ * wait for the related interrupt
+ */
+ while ((timeout--) && (!(eth->ievent & 0x00800000))) ;
+
+ if (timeout == 0) {
+#if (DEBUG & 0x2)
+ printf ("Read MDIO failed...\n");
+#endif
+ return -1;
+ }
+
+ /*
+ * clear mii interrupt bit
+ */
+ eth->ievent = 0x00800000;
+
+ /*
+ * it's now safe to read the PHY's register
+ */
+ *retVal = (uint16) eth->mii_data;
+
+ return 0;
+}
+
+/********************************************************************/
+int fec512x_miiphy_write (char *devname, uint8 phyAddr, uint8 regAddr, uint16 data)
+{
+ ethernet_regs *eth = (ethernet_regs *) MPC512X_FEC;
+ uint32 reg; /* convenient holder for the PHY register */
+ uint32 phy; /* convenient holder for the PHY */
+ int timeout = 0xffff;
+
+ reg = regAddr << FEC_MII_DATA_RA_SHIFT;
+ phy = phyAddr << FEC_MII_DATA_PA_SHIFT;
+
+ eth->mii_data = (FEC_MII_DATA_ST | FEC_MII_DATA_OP_WR |
+ FEC_MII_DATA_TA | phy | reg | data);
+
+ /*
+ * wait for the MII interrupt
+ */
+ while ((timeout--) && (!(eth->ievent & 0x00800000))) ;
+
+ if (timeout == 0) {
+#if (DEBUG & 0x2)
+ printf ("Write MDIO failed...\n");
+#endif
+ return -1;
+ }
+
+ /*
+ * clear MII interrupt bit
+ */
+ eth->ievent = 0x00800000;
+
+ return 0;
+}
+
+#if (DEBUG & 0x40)
+static uint32 local_crc32 (char *string, unsigned int crc_value, int len)
+{
+ int i;
+ char c;
+ unsigned int crc, count;
+
+ /*
+ * crc32 algorithm
+ */
+ /*
+ * crc = 0xffffffff; * The initialized value should be 0xffffffff
+ */
+ crc = crc_value;
+
+ for (i = len; --i >= 0;) {
+ c = *string++;
+ for (count = 0; count < 8; count++) {
+ if ((c & 0x01) ^ (crc & 0x01)) {
+ crc >>= 1;
+ crc = crc ^ 0xedb88320;
+ } else {
+ crc >>= 1;
+ }
+ c >>= 1;
+ }
+ }
+
+ /*
+ * In big endian system, do byte swaping for crc value
+ */
+ /**/ return crc;
+}
+#endif /* DEBUG */
+
+#endif /* CONFIG_MPC512x_FEC */
diff --git a/cpu/mpc512x/fec.h b/cpu/mpc512x/fec.h
new file mode 100644
index 0000000..9c38502
--- /dev/null
+++ b/cpu/mpc512x/fec.h
@@ -0,0 +1,227 @@
+/*
+ * (C) Copyright 2003 - 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Derived from the MPC8xx driver's header file.
+ */
+
+#ifndef __MPC512X_FEC_H
+#define __MPC512X_FEC_H
+
+#include <common.h>
+#include <mpc512x.h>
+
+typedef unsigned long uint32;
+typedef unsigned short uint16;
+typedef unsigned char uint8;
+
+typedef struct ethernet_register_set {
+
+/* [10:2]addr = 00 */
+
+/* Control and status Registers (offset 000-1FF) */
+
+ volatile uint32 fec_id; /* MBAR_ETH + 0x000 */
+ volatile uint32 ievent; /* MBAR_ETH + 0x004 */
+ volatile uint32 imask; /* MBAR_ETH + 0x008 */
+
+ volatile uint32 RES0[1]; /* MBAR_ETH + 0x00C */
+ volatile uint32 r_des_active; /* MBAR_ETH + 0x010 */
+ volatile uint32 x_des_active; /* MBAR_ETH + 0x014 */
+
+ volatile uint32 RES1[3]; /* MBAR_ETH + 0x018-020 */
+ volatile uint32 ecntrl; /* MBAR_ETH + 0x024 */
+
+ volatile uint32 RES2[6]; /* MBAR_ETH + 0x028-03C */
+ volatile uint32 mii_data; /* MBAR_ETH + 0x040 */
+ volatile uint32 mii_speed; /* MBAR_ETH + 0x044 */
+
+ volatile uint32 RES3[7]; /* MBAR_ETH + 0x048-060 */
+ volatile uint32 mib_control; /* MBAR_ETH + 0x064 */
+
+ volatile uint32 RES4[7]; /* MBAR_ETH + 0x068-80 */
+ volatile uint32 r_cntrl; /* MBAR_ETH + 0x084 */
+ volatile uint32 r_hash; /* MBAR_ETH + 0x088 */
+
+ volatile uint32 RES5[14]; /* MBAR_ETH + 0x08c-0C0 */
+ volatile uint32 x_cntrl; /* MBAR_ETH + 0x0C4 */
+
+ volatile uint32 RES6[7]; /* MBAR_ETH + 0x0C8-0E0 */
+ volatile uint32 paddr1; /* MBAR_ETH + 0x0E4 */
+ volatile uint32 paddr2; /* MBAR_ETH + 0x0E8 */
+ volatile uint32 op_pause; /* MBAR_ETH + 0x0EC */
+
+ volatile uint32 RES7[10]; /* MBAR_ETH + 0x0F0-114 */
+ volatile uint32 iaddr1; /* MBAR_ETH + 0x118 */
+ volatile uint32 iaddr2; /* MBAR_ETH + 0x11C */
+ volatile uint32 gaddr1; /* MBAR_ETH + 0x120 */
+ volatile uint32 gaddr2; /* MBAR_ETH + 0x124 */
+
+ volatile uint32 RES8[6]; /* MBAR_ETH + 0x128-13C */
+ volatile uint32 fifo_id; /* MBAR_ETH + 0x140 */
+ volatile uint32 x_wmrk; /* MBAR_ETH + 0x144 */
+ volatile uint32 RES9[1]; /* MBAR_ETH + 0x148 */
+ volatile uint32 r_bound; /* MBAR_ETH + 0x14C */
+ volatile uint32 r_fstart; /* MBAR_ETH + 0x150 */
+
+ volatile uint32 RES10[11]; /* MBAR_ETH + 0x154-17C */
+ volatile uint32 r_des_start; /* MBAR_ETH + 0x180 */
+ volatile uint32 x_des_start; /* MBAR_ETH + 0x184 */
+ volatile uint32 r_buff_size; /* MBAR_ETH + 0x188 */
+ volatile uint32 RES11[26]; /* MBAR_ETH + 0x18C-1F0 */
+ volatile uint32 dma_control; /* MBAR_ETH + 0x1F4 */
+ volatile uint32 RES12[2]; /* MBAR_ETH + 0x1F8-1FC */
+
+/* MIB COUNTERS (Offset 200-2FF) */
+
+ volatile uint32 rmon_t_drop; /* MBAR_ETH + 0x200 */
+ volatile uint32 rmon_t_packets; /* MBAR_ETH + 0x204 */
+ volatile uint32 rmon_t_bc_pkt; /* MBAR_ETH + 0x208 */
+ volatile uint32 rmon_t_mc_pkt; /* MBAR_ETH + 0x20C */
+ volatile uint32 rmon_t_crc_align; /* MBAR_ETH + 0x210 */
+ volatile uint32 rmon_t_undersize; /* MBAR_ETH + 0x214 */
+ volatile uint32 rmon_t_oversize; /* MBAR_ETH + 0x218 */
+ volatile uint32 rmon_t_frag; /* MBAR_ETH + 0x21C */
+ volatile uint32 rmon_t_jab; /* MBAR_ETH + 0x220 */
+ volatile uint32 rmon_t_col; /* MBAR_ETH + 0x224 */
+ volatile uint32 rmon_t_p64; /* MBAR_ETH + 0x228 */
+ volatile uint32 rmon_t_p65to127; /* MBAR_ETH + 0x22C */
+ volatile uint32 rmon_t_p128to255; /* MBAR_ETH + 0x230 */
+ volatile uint32 rmon_t_p256to511; /* MBAR_ETH + 0x234 */
+ volatile uint32 rmon_t_p512to1023; /* MBAR_ETH + 0x238 */
+ volatile uint32 rmon_t_p1024to2047; /* MBAR_ETH + 0x23C */
+ volatile uint32 rmon_t_p_gte2048; /* MBAR_ETH + 0x240 */
+ volatile uint32 rmon_t_octets; /* MBAR_ETH + 0x244 */
+ volatile uint32 ieee_t_drop; /* MBAR_ETH + 0x248 */
+ volatile uint32 ieee_t_frame_ok; /* MBAR_ETH + 0x24C */
+ volatile uint32 ieee_t_1col; /* MBAR_ETH + 0x250 */
+ volatile uint32 ieee_t_mcol; /* MBAR_ETH + 0x254 */
+ volatile uint32 ieee_t_def; /* MBAR_ETH + 0x258 */
+ volatile uint32 ieee_t_lcol; /* MBAR_ETH + 0x25C */
+ volatile uint32 ieee_t_excol; /* MBAR_ETH + 0x260 */
+ volatile uint32 ieee_t_macerr; /* MBAR_ETH + 0x264 */
+ volatile uint32 ieee_t_cserr; /* MBAR_ETH + 0x268 */
+ volatile uint32 ieee_t_sqe; /* MBAR_ETH + 0x26C */
+ volatile uint32 t_fdxfc; /* MBAR_ETH + 0x270 */
+ volatile uint32 ieee_t_octets_ok; /* MBAR_ETH + 0x274 */
+
+ volatile uint32 RES13[2]; /* MBAR_ETH + 0x278-27C */
+ volatile uint32 rmon_r_drop; /* MBAR_ETH + 0x280 */
+ volatile uint32 rmon_r_packets; /* MBAR_ETH + 0x284 */
+ volatile uint32 rmon_r_bc_pkt; /* MBAR_ETH + 0x288 */
+ volatile uint32 rmon_r_mc_pkt; /* MBAR_ETH + 0x28C */
+ volatile uint32 rmon_r_crc_align; /* MBAR_ETH + 0x290 */
+ volatile uint32 rmon_r_undersize; /* MBAR_ETH + 0x294 */
+ volatile uint32 rmon_r_oversize; /* MBAR_ETH + 0x298 */
+ volatile uint32 rmon_r_frag; /* MBAR_ETH + 0x29C */
+ volatile uint32 rmon_r_jab; /* MBAR_ETH + 0x2A0 */
+
+ volatile uint32 rmon_r_resvd_0; /* MBAR_ETH + 0x2A4 */
+
+ volatile uint32 rmon_r_p64; /* MBAR_ETH + 0x2A8 */
+ volatile uint32 rmon_r_p65to127; /* MBAR_ETH + 0x2AC */
+ volatile uint32 rmon_r_p128to255; /* MBAR_ETH + 0x2B0 */
+ volatile uint32 rmon_r_p256to511; /* MBAR_ETH + 0x2B4 */
+ volatile uint32 rmon_r_p512to1023; /* MBAR_ETH + 0x2B8 */
+ volatile uint32 rmon_r_p1024to2047; /* MBAR_ETH + 0x2BC */
+ volatile uint32 rmon_r_p_gte2048; /* MBAR_ETH + 0x2C0 */
+ volatile uint32 rmon_r_octets; /* MBAR_ETH + 0x2C4 */
+ volatile uint32 ieee_r_drop; /* MBAR_ETH + 0x2C8 */
+ volatile uint32 ieee_r_frame_ok; /* MBAR_ETH + 0x2CC */
+ volatile uint32 ieee_r_crc; /* MBAR_ETH + 0x2D0 */
+ volatile uint32 ieee_r_align; /* MBAR_ETH + 0x2D4 */
+ volatile uint32 r_macerr; /* MBAR_ETH + 0x2D8 */
+ volatile uint32 r_fdxfc; /* MBAR_ETH + 0x2DC */
+ volatile uint32 ieee_r_octets_ok; /* MBAR_ETH + 0x2E0 */
+
+ volatile uint32 RES14[6]; /* MBAR_ETH + 0x2E4-2FC */
+
+ volatile uint32 RES15[64]; /* MBAR_ETH + 0x300-3FF */
+} ethernet_regs;
+
+/* Receive & Transmit Buffer Descriptor definitions */
+typedef struct BufferDescriptor {
+ uint16 status;
+ uint16 dataLength;
+ uint32 dataPointer;
+} FEC_RBD;
+
+typedef struct {
+ uint16 status;
+ uint16 dataLength;
+ uint32 dataPointer;
+} FEC_TBD;
+
+/* private structure */
+typedef enum {
+ SEVENWIRE, /* 7-wire */
+ MII10, /* MII 10Mbps */
+ MII100 /* MII 100Mbps */
+} xceiver_type;
+
+/* BD Numer definitions */
+#define FEC_TBD_NUM 48 /* The user can adjust this value */
+#define FEC_RBD_NUM 32 /* The user can adjust this value */
+
+/* packet size limit */
+#define FEC_MAX_FRAME_LEN 1522 /* recommended default value */
+
+/* Buffer size must be evenly divisible by 16 */
+#define FEC_BUFFER_SIZE ((FEC_MAX_FRAME_LEN + 0x10) & (~0xf))
+
+typedef struct {
+ uint8 frame[FEC_BUFFER_SIZE];
+} mpc512x_frame;
+
+typedef struct {
+ FEC_RBD rbd[FEC_RBD_NUM]; /* RBD ring */
+ FEC_TBD tbd[FEC_TBD_NUM]; /* TBD ring */
+ mpc512x_frame recv_frames[FEC_RBD_NUM]; /* receive buff */
+} mpc512x_buff_descs;
+
+typedef struct {
+ ethernet_regs *eth;
+ xceiver_type xcv_type; /* transceiver type */
+ mpc512x_buff_descs *bdBase; /* BD rings and recv buffer */
+ uint16 rbdIndex; /* next receive BD to read */
+ uint16 tbdIndex; /* next transmit BD to send */
+ uint16 usedTbdIndex; /* next transmit BD to clean */
+ uint16 cleanTbdNum; /* the number of available transmit BDs */
+} mpc512x_fec_priv;
+
+/* RBD bits definitions */
+#define FEC_RBD_EMPTY 0x8000 /* Buffer is empty */
+#define FEC_RBD_WRAP 0x2000 /* Last BD in ring */
+#define FEC_RBD_LAST 0x0800 /* Buffer is last in frame(useless) */
+#define FEC_RBD_MISS 0x0100 /* Miss bit for prom mode */
+#define FEC_RBD_BC 0x0080 /* The received frame is broadcast frame */
+#define FEC_RBD_MC 0x0040 /* The received frame is multicast frame */
+#define FEC_RBD_LG 0x0020 /* Frame length violation */
+#define FEC_RBD_NO 0x0010 /* Nonoctet align frame */
+#define FEC_RBD_SH 0x0008 /* Short frame */
+#define FEC_RBD_CR 0x0004 /* CRC error */
+#define FEC_RBD_OV 0x0002 /* Receive FIFO overrun */
+#define FEC_RBD_TR 0x0001 /* Frame is truncated */
+#define FEC_RBD_ERR (FEC_RBD_LG | FEC_RBD_NO | FEC_RBD_CR | \
+ FEC_RBD_OV | FEC_RBD_TR)
+
+/* TBD bits definitions */
+#define FEC_TBD_READY 0x8000 /* Buffer is ready */
+#define FEC_TBD_WRAP 0x2000 /* Last BD in ring */
+#define FEC_TBD_LAST 0x0800 /* Buffer is last in frame */
+#define FEC_TBD_TC 0x0400 /* Transmit the CRC */
+#define FEC_TBD_ABC 0x0200 /* Append bad CRC */
+
+/* MII-related definitios */
+#define FEC_MII_DATA_ST 0x40000000 /* Start of frame delimiter */
+#define FEC_MII_DATA_OP_RD 0x20000000 /* Perform a read operation */
+#define FEC_MII_DATA_OP_WR 0x10000000 /* Perform a write operation */
+#define FEC_MII_DATA_PA_MSK 0x0f800000 /* PHY Address field mask */
+#define FEC_MII_DATA_RA_MSK 0x007c0000 /* PHY Register field mask */
+#define FEC_MII_DATA_TA 0x00020000 /* Turnaround */
+#define FEC_MII_DATA_DATAMSK 0x0000ffff /* PHY data field */
+
+#define FEC_MII_DATA_RA_SHIFT 18 /* MII Register address bits */
+#define FEC_MII_DATA_PA_SHIFT 23 /* MII PHY address bits */
+
+#endif /* __MPC512X_FEC_H */
diff --git a/cpu/mpc512x/i2c.c b/cpu/mpc512x/i2c.c
new file mode 100644
index 0000000..00e28d6
--- /dev/null
+++ b/cpu/mpc512x/i2c.c
@@ -0,0 +1,431 @@
+/*
+ * (C) Copyright 2003 - 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Based on the MPC5xxx code.
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_HARD_I2C
+
+#include <mpc512x.h>
+#include <i2c.h>
+
+#define immr ((immap_t *)CFG_IMMR)
+
+/* by default set I2C bus 0 active */
+static unsigned int bus_num = 0;
+
+#define I2C_TIMEOUT 100
+#define I2C_RETRIES 3
+
+struct mpc512x_i2c_tap {
+ int scl2tap;
+ int tap2tap;
+};
+
+static int mpc_reg_in(volatile u32 *reg);
+static void mpc_reg_out(volatile u32 *reg, int val, int mask);
+static int wait_for_bb(void);
+static int wait_for_pin(int *status);
+static int do_address(uchar chip, char rdwr_flag);
+static int send_bytes(uchar chip, char *buf, int len);
+static int receive_bytes(uchar chip, char *buf, int len);
+static int mpc_get_fdr(int);
+
+static int mpc_reg_in (volatile u32 *reg)
+{
+ int ret = *reg >> 24;
+ __asm__ __volatile__ ("eieio");
+ return ret;
+}
+
+static void mpc_reg_out (volatile u32 *reg, int val, int mask)
+{
+ int tmp;
+
+ if (!mask) {
+ *reg = val << 24;
+ } else {
+ tmp = mpc_reg_in (reg);
+ *reg = ((tmp & ~mask) | (val & mask)) << 24;
+ }
+ __asm__ __volatile__ ("eieio");
+
+ return;
+}
+
+static int wait_for_bb (void)
+{
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int timeout = I2C_TIMEOUT;
+ int status;
+
+ status = mpc_reg_in (®s->msr);
+
+ while (timeout-- && (status & I2C_BB)) {
+ volatile int temp;
+ mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
+ temp = mpc_reg_in (®s->mdr);
+ mpc_reg_out (®s->mcr, 0, I2C_STA);
+ mpc_reg_out (®s->mcr, 0, 0);
+ mpc_reg_out (®s->mcr, I2C_EN, 0);
+
+ udelay (1000);
+ status = mpc_reg_in (®s->msr);
+ }
+
+ return (status & I2C_BB);
+}
+
+static int wait_for_pin (int *status)
+{
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int timeout = I2C_TIMEOUT;
+
+ *status = mpc_reg_in (®s->msr);
+
+ while (timeout-- && !(*status & I2C_IF)) {
+ udelay (1000);
+ *status = mpc_reg_in (®s->msr);
+ }
+
+ if (!(*status & I2C_IF)) {
+ return -1;
+ }
+
+ mpc_reg_out (®s->msr, 0, I2C_IF);
+
+ return 0;
+}
+
+static int do_address (uchar chip, char rdwr_flag)
+{
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int status;
+
+ chip <<= 1;
+
+ if (rdwr_flag) {
+ chip |= 1;
+ }
+
+ mpc_reg_out (®s->mcr, I2C_TX, I2C_TX);
+ mpc_reg_out (®s->mdr, chip, 0);
+
+ if (wait_for_pin (&status)) {
+ return -2;
+ }
+
+ if (status & I2C_RXAK) {
+ return -3;
+ }
+
+ return 0;
+}
+
+static int send_bytes (uchar chip, char *buf, int len)
+{
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int wrcount;
+ int status;
+
+ for (wrcount = 0; wrcount < len; ++wrcount) {
+
+ mpc_reg_out (®s->mdr, buf[wrcount], 0);
+
+ if (wait_for_pin (&status)) {
+ break;
+ }
+
+ if (status & I2C_RXAK) {
+ break;
+ }
+
+ }
+
+ return !(wrcount == len);
+}
+
+static int receive_bytes (uchar chip, char *buf, int len)
+{
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int dummy = 1;
+ int rdcount = 0;
+ int status;
+ int i;
+
+ mpc_reg_out (®s->mcr, 0, I2C_TX);
+
+ for (i = 0; i < len; ++i) {
+ buf[rdcount] = mpc_reg_in (®s->mdr);
+
+ if (dummy) {
+ dummy = 0;
+ } else {
+ rdcount++;
+ }
+
+ if (wait_for_pin (&status)) {
+ return -4;
+ }
+ }
+
+ mpc_reg_out (®s->mcr, I2C_TXAK, I2C_TXAK);
+ buf[rdcount++] = mpc_reg_in (®s->mdr);
+
+ if (wait_for_pin (&status)) {
+ return -5;
+ }
+
+ mpc_reg_out (®s->mcr, 0, I2C_TXAK);
+
+ return 0;
+}
+
+/**************** I2C API ****************/
+
+void i2c_init (int speed, int saddr)
+{
+ int i;
+ for(i = 0; i < I2C_BUS_CNT; i++){
+ i2c512x_dev_t *regs = &immr->i2c.dev[i];
+ mpc_reg_out (®s->mcr, 0, 0);
+
+ /* Set clock */
+ mpc_reg_out (®s->mfdr, mpc_get_fdr (speed), 0);
+ mpc_reg_out (®s->madr, saddr << 1, 0);
+
+ /* Enable module */
+ mpc_reg_out (®s->mcr, I2C_EN, I2C_INIT_MASK);
+ mpc_reg_out (®s->msr, 0, I2C_IF);
+ }
+
+ /* Disable interrupts */
+ immr->i2c.icr = 0;
+ /* Turn off filters */
+ immr->i2c.mifr = 0;
+ return;
+}
+
+static int mpc_get_fdr (int speed)
+{
+ static int fdr = -1;
+
+ if (fdr == -1) {
+ ulong best_speed = 0;
+ ulong divider;
+ ulong ipb, scl;
+ ulong bestmatch = 0xffffffffUL;
+ int best_i = 0, best_j = 0, i, j;
+ int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
+ struct mpc512x_i2c_tap scltap[] = {
+ {4, 1},
+ {4, 2},
+ {6, 4},
+ {6, 8},
+ {14, 16},
+ {30, 32},
+ {62, 64},
+ {126, 128}
+ };
+
+ ipb = gd->ipb_clk;
+ for (i = 7; i >= 0; i--) {
+ for (j = 7; j >= 0; j--) {
+ scl = 2 * (scltap[j].scl2tap +
+ (SCL_Tap[i] - 1) * scltap[j].tap2tap
+ + 2);
+ if (ipb <= speed*scl) {
+ if ((speed*scl - ipb) < bestmatch) {
+ bestmatch = speed*scl - ipb;
+ best_i = i;
+ best_j = j;
+ best_speed = ipb/scl;
+ }
+ }
+ }
+ }
+ divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
+ if (gd->flags & GD_FLG_RELOC) {
+ fdr = divider;
+ } else {
+ debug("%ld kHz, \n", best_speed / 1000);
+ return divider;
+ }
+ }
+
+ return fdr;
+}
+
+int i2c_probe (uchar chip)
+{
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int i;
+
+ for (i = 0; i < I2C_RETRIES; i++) {
+ mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
+
+ if (! do_address (chip, 0)) {
+ mpc_reg_out (®s->mcr, 0, I2C_STA);
+ udelay (500);
+ break;
+ }
+
+ mpc_reg_out (®s->mcr, 0, I2C_STA);
+ udelay (500);
+ }
+
+ return (i == I2C_RETRIES);
+}
+
+int i2c_read (uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ char xaddr[4];
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int ret = -1;
+
+ xaddr[0] = (addr >> 24) & 0xFF;
+ xaddr[1] = (addr >> 16) & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
+
+ if (wait_for_bb ()) {
+ printf ("i2c_read: bus is busy\n");
+ goto Done;
+ }
+
+ mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
+ if (do_address (chip, 0)) {
+ printf ("i2c_read: failed to address chip\n");
+ goto Done;
+ }
+
+ if (send_bytes (chip, &xaddr[4-alen], alen)) {
+ printf ("i2c_read: send_bytes failed\n");
+ goto Done;
+ }
+
+ mpc_reg_out (®s->mcr, I2C_RSTA, I2C_RSTA);
+ if (do_address (chip, 1)) {
+ printf ("i2c_read: failed to address chip\n");
+ goto Done;
+ }
+
+ if (receive_bytes (chip, (char *)buf, len)) {
+ printf ("i2c_read: receive_bytes failed\n");
+ goto Done;
+ }
+
+ ret = 0;
+Done:
+ mpc_reg_out (®s->mcr, 0, I2C_STA);
+ return ret;
+}
+
+int i2c_write (uchar chip, uint addr, int alen, uchar *buf, int len)
+{
+ char xaddr[4];
+ i2c512x_dev_t *regs = &immr->i2c.dev[bus_num];
+ int ret = -1;
+
+ xaddr[0] = (addr >> 24) & 0xFF;
+ xaddr[1] = (addr >> 16) & 0xFF;
+ xaddr[2] = (addr >> 8) & 0xFF;
+ xaddr[3] = addr & 0xFF;
+
+ if (wait_for_bb ()) {
+ printf ("i2c_write: bus is busy\n");
+ goto Done;
+ }
+
+ mpc_reg_out (®s->mcr, I2C_STA, I2C_STA);
+ if (do_address (chip, 0)) {
+ printf ("i2c_write: failed to address chip\n");
+ goto Done;
+ }
+
+ if (send_bytes (chip, &xaddr[4-alen], alen)) {
+ printf ("i2c_write: send_bytes failed\n");
+ goto Done;
+ }
+
+ if (send_bytes (chip, (char *)buf, len)) {
+ printf ("i2c_write: send_bytes failed\n");
+ goto Done;
+ }
+
+ ret = 0;
+Done:
+ mpc_reg_out (®s->mcr, 0, I2C_STA);
+ return ret;
+}
+
+uchar i2c_reg_read (uchar chip, uchar reg)
+{
+ uchar buf;
+
+ i2c_read (chip, reg, 1, &buf, 1);
+
+ return buf;
+}
+
+void i2c_reg_write (uchar chip, uchar reg, uchar val)
+{
+ i2c_write (chip, reg, 1, &val, 1);
+
+ return;
+}
+
+
+int i2c_set_bus_num (unsigned int bus)
+{
+ if (bus >= I2C_BUS_CNT) {
+ return -1;
+ }
+ bus_num = bus;
+
+ return 0;
+}
+
+unsigned int i2c_get_bus_num (void)
+{
+ return bus_num;
+}
+
+/* TODO */
+unsigned int i2c_get_bus_speed (void)
+{
+ return -1;
+}
+
+int i2c_set_bus_speed (unsigned int speed)
+{
+ if (speed != CFG_I2C_SPEED)
+ return -1;
+
+ return 0;
+}
+
+#endif /* CONFIG_HARD_I2C */
diff --git a/cpu/mpc512x/interrupts.c b/cpu/mpc512x/interrupts.c
new file mode 100644
index 0000000..8cc241c
--- /dev/null
+++ b/cpu/mpc512x/interrupts.c
@@ -0,0 +1,61 @@
+/*
+ * (C) Copyright 2000-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright 2004 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Derived from the MPC83xx code.
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+struct irq_action {
+ interrupt_handler_t *handler;
+ void *arg;
+ ulong count;
+};
+
+int interrupt_init_cpu (unsigned *decrementer_count)
+{
+ *decrementer_count = get_tbclk () / CFG_HZ;
+
+ return 0;
+}
+
+/*
+ * Install and free an interrupt handler.
+ */
+void
+irq_install_handler (int irq, interrupt_handler_t * handler, void *arg)
+{
+}
+
+void irq_free_handler (int irq)
+{
+}
+
+void timer_interrupt_cpu (struct pt_regs *regs)
+{
+ /* nothing to do here */
+ return;
+}
diff --git a/cpu/mpc512x/serial.c b/cpu/mpc512x/serial.c
new file mode 100644
index 0000000..200ff2c
--- /dev/null
+++ b/cpu/mpc512x/serial.c
@@ -0,0 +1,197 @@
+/*
+ * (C) Copyright 2000 - 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Based ont the MPC5200 PSC driver.
+ * Adapted for MPC512x by Jan Wrobel <wrr@semihalf.com>
+ */
+
+/*
+ * Minimal serial functions needed to use one of the PSC ports
+ * as serial console interface.
+ */
+
+#include <common.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_PSC_CONSOLE)
+
+static void fifo_init (volatile psc512x_t *psc)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+
+ /* reset Rx & Tx fifo slice */
+ psc->rfcmd = PSC_FIFO_RESET_SLICE;
+ psc->tfcmd = PSC_FIFO_RESET_SLICE;
+
+ /* disable Tx & Rx FIFO interrupts */
+ psc->rfintmask = 0;
+ psc->tfintmask = 0;
+
+ psc->tfsize = CONSOLE_FIFO_TX_SIZE | (CONSOLE_FIFO_TX_ADDR << 16);
+ psc->rfsize = CONSOLE_FIFO_RX_SIZE | (CONSOLE_FIFO_RX_ADDR << 16);
+
+ /* enable Tx & Rx FIFO slice */
+ psc->rfcmd = PSC_FIFO_ENABLE_SLICE;
+ psc->tfcmd = PSC_FIFO_ENABLE_SLICE;
+
+ im->fifoc.fifoc_cmd = FIFOC_DISABLE_CLOCK_GATE;
+ __asm__ volatile ("sync");
+}
+
+int serial_init(void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ unsigned long baseclk;
+ int div;
+
+ fifo_init (psc);
+
+ /* set MR register to point to MR1 */
+ psc->command = PSC_SEL_MODE_REG_1;
+
+ /* disable Tx/Rx */
+ psc->command = PSC_TX_DISABLE | PSC_RX_DISABLE;
+
+ /* choose the prescaler by 16 for the Tx/Rx clock generation */
+ psc->psc_clock_select = 0xdd00;
+
+ /* switch to UART mode */
+ psc->sicr = 0;
+
+ /* mode register points to mr1 */
+ /* configure parity, bit length and so on in mode register 1*/
+ psc->mode = PSC_MODE_8_BITS | PSC_MODE_PARNONE;
+ /* now, mode register points to mr2 */
+ psc->mode = PSC_MODE_1_STOPBIT;
+
+ /* calculate dividor for setting PSC CTUR and CTLR registers */
+ baseclk = (gd->ipb_clk + 8) / 16;
+ div = (baseclk + (gd->baudrate / 2)) / gd->baudrate;
+
+ psc->ctur = (div >> 8) & 0xff;
+ /* set baudrate */
+ psc->ctlr = div & 0xff;
+
+ /* disable all interrupts */
+ psc->psc_imr = 0;
+
+ /* reset and enable Rx/Tx */
+ psc->command = PSC_RST_RX;
+ psc->command = PSC_RST_TX;
+ psc->command = PSC_RX_ENABLE | PSC_TX_ENABLE;
+
+ return 0;
+}
+
+void serial_putc (const char c)
+{
+ volatile immap_t *im = (immap_t *)CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+
+ if (c == '\n')
+ serial_putc ('\r');
+
+ /* Wait for last character to go. */
+ while (!(psc->psc_status & PSC_SR_TXEMP))
+ ;
+
+ psc->tfdata_8 = c;
+}
+
+void serial_putc_raw (const char c)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+
+ /* Wait for last character to go. */
+ while (!(psc->psc_status & PSC_SR_TXEMP))
+ ;
+
+ psc->tfdata_8 = c;
+}
+
+
+void serial_puts (const char *s)
+{
+ while (*s) {
+ serial_putc (*s++);
+ }
+}
+
+int serial_getc (void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+
+ /* Wait for a character to arrive. */
+ while (psc->rfstat & PSC_FIFO_EMPTY)
+ ;
+
+ return psc->rfdata_8;
+}
+
+int serial_tstc (void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+
+ return !(psc->rfstat & PSC_FIFO_EMPTY);
+}
+
+void serial_setbrg (void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+ unsigned long baseclk, div;
+
+ baseclk = (gd->csb_clk + 8) / 16;
+ div = (baseclk + (gd->baudrate / 2)) / gd->baudrate;
+
+ psc->ctur = (div >> 8) & 0xFF;
+ psc->ctlr = div & 0xff; /* set baudrate */
+}
+
+void serial_setrts(int s)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+
+ if (s) {
+ /* Assert RTS (become LOW) */
+ psc->op1 = 0x1;
+ }
+ else {
+ /* Negate RTS (become HIGH) */
+ psc->op0 = 0x1;
+ }
+}
+
+int serial_getcts(void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ volatile psc512x_t *psc = (psc512x_t *) &im->psc[CONFIG_PSC_CONSOLE];
+
+ return (psc->ip & 0x1) ? 0 : 1;
+}
+#endif /* CONFIG_PSC_CONSOLE */
diff --git a/cpu/mpc512x/speed.c b/cpu/mpc512x/speed.c
new file mode 100644
index 0000000..a609827
--- /dev/null
+++ b/cpu/mpc512x/speed.c
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2000-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Based on the MPC83xx code.
+ */
+
+#include <common.h>
+#include <mpc512x.h>
+#include <command.h>
+#include <asm/processor.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static int spmf_mult[] = {
+ 68, 1, 12, 16,
+ 20, 24, 28, 32,
+ 36, 40, 44, 48,
+ 52, 56, 60, 64
+};
+
+static int cpmf_mult[][2] = {
+ {0, 1}, {0, 1}, /* 0 and 1 are not valid */
+ {1, 1}, {3, 2},
+ {2, 1}, {5, 2},
+ {3, 1}, {7, 2},
+ {0, 1}, {0, 1}, /* and all above 7 are not valid too */
+ {0, 1}, {0, 1},
+ {0, 1}, {0, 1},
+ {0, 1}, {0, 1}
+};
+
+static int sys_dividors[][2] = {
+ {2, 1}, {5, 2}, {3, 1}, {7, 2}, {4, 1},
+ {9, 2}, {5, 1}, {7, 1}, {6, 1}, {8, 1},
+ {9, 1}, {11, 1}, {10, 1}, {12, 1}, {13, 1},
+ {15, 1}, {14, 1}, {16, 1}, {17, 1}, {19, 1},
+ {18, 1}, {20, 1}, {21, 1}, {23, 1}, {22, 1},
+ {24, 1}, {25, 1}, {27, 1}, {26, 1}, {28, 1},
+ {29, 1}, {31, 1}, {30, 1}, {32, 1}, {33, 1}
+};
+
+int get_clocks (void)
+{
+ volatile immap_t *im = (immap_t *) CFG_IMMR;
+ u8 spmf;
+ u8 cpmf;
+ u8 sys_div;
+ u8 ips_div;
+ u32 ref_clk = CFG_MPC512X_CLKIN;
+ u32 spll;
+ u32 sys_clk;
+ u32 core_clk;
+ u32 csb_clk;
+ u32 ips_clk;
+
+ if ((im->sysconf.immrbar & IMMRBAR_BASE_ADDR) != (u32) im)
+ return -1;
+
+ spmf = (im->clk.spmr & SPMR_SPMF) >> SPMR_SPMF_SHIFT;
+ spll = ref_clk * spmf_mult[spmf];
+
+ sys_div = (im->clk.scfr[1] & SCFR2_SYS_DIV) >> SCFR2_SYS_DIV_SHIFT;
+ sys_clk = (spll * sys_dividors[sys_div][1]) / sys_dividors[sys_div][0];
+
+ csb_clk = sys_clk / 2;
+
+ cpmf = (im->clk.spmr & SPMR_CPMF) >> SPMR_CPMF_SHIFT;
+ core_clk = (csb_clk * cpmf_mult[cpmf][0]) / cpmf_mult[cpmf][1];
+
+ ips_div = (im->clk.scfr[0] & SCFR1_IPS_DIV_MASK) >> SCFR1_IPS_DIV_SHIFT;
+ if (ips_div != 0) {
+ ips_clk = csb_clk / ips_div;
+ } else {
+ /* in case we cannot get a sane IPS divisor, fail gracefully */
+ ips_clk = 0;
+ }
+
+ gd->ipb_clk = ips_clk;
+ gd->csb_clk = csb_clk;
+ gd->cpu_clk = core_clk;
+ gd->bus_clk = csb_clk;
+ return 0;
+
+}
+
+/********************************************
+ * get_bus_freq
+ * return system bus freq in Hz
+ *********************************************/
+ulong get_bus_freq (ulong dummy)
+{
+ return gd->csb_clk;
+}
+
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ printf ("Clock configuration:\n");
+ printf (" CPU: %4d MHz\n", gd->cpu_clk / 1000000);
+ printf (" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
+ printf (" IPS Bus: %4d MHz\n", gd->ipb_clk / 1000000);
+ printf (" DDR: %4d MHz\n", 2 * gd->csb_clk / 1000000);
+ return 0;
+}
+
+U_BOOT_CMD(clocks, 1, 0, do_clocks,
+ "clocks - print clock configuration\n",
+ " clocks\n"
+);
+
+int prt_mpc512x_clks (void)
+{
+ do_clocks (NULL, 0, 0, NULL);
+ return (0);
+}
diff --git a/cpu/mpc512x/start.S b/cpu/mpc512x/start.S
new file mode 100644
index 0000000..244c69b
--- /dev/null
+++ b/cpu/mpc512x/start.S
@@ -0,0 +1,780 @@
+/*
+ * Copyright (C) 1998 Dan Malek <dmalek@jlc.net>
+ * Copyright (C) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
+ * Copyright (C) 2000, 2001, 2002, 2007 Wolfgang Denk <wd@denx.de>
+ * Copyright Freescale Semiconductor, Inc. 2004, 2006. All rights reserved.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Based on the MPC83xx code.
+ */
+
+/*
+ * U-Boot - Startup Code for MPC512x based Embedded Boards
+ */
+
+#include <config.h>
+#include <mpc512x.h>
+#include <version.h>
+
+#define CONFIG_521X 1 /* needed for Linux kernel header files*/
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+#include <asm/cache.h>
+#include <asm/mmu.h>
+
+#ifndef CONFIG_IDENT_STRING
+#define CONFIG_IDENT_STRING "MPC512X"
+#endif
+
+/*
+ * Floating Point enable, Machine Check and Recoverable Interr.
+ */
+#undef MSR_KERNEL
+#ifdef DEBUG
+#define MSR_KERNEL (MSR_FP|MSR_RI)
+#else
+#define MSR_KERNEL (MSR_FP|MSR_ME|MSR_RI)
+#endif
+
+/* Macros for manipulating CSx_START/STOP */
+#define START_REG(start) ((start) >> 16)
+#define STOP_REG(start, size) (((start) + (size) - 1) >> 16)
+
+/*
+ * Set up GOT: Global Offset Table
+ *
+ * Use r14 to access the GOT
+ */
+ START_GOT
+ GOT_ENTRY(_GOT2_TABLE_)
+ GOT_ENTRY(_FIXUP_TABLE_)
+
+ GOT_ENTRY(_start)
+ GOT_ENTRY(_start_of_vectors)
+ GOT_ENTRY(_end_of_vectors)
+ GOT_ENTRY(transfer_to_handler)
+
+ GOT_ENTRY(__init_end)
+ GOT_ENTRY(_end)
+ GOT_ENTRY(__bss_start)
+ END_GOT
+
+/*
+ * Magic number and version string
+ */
+ .long 0x27051956 /* U-Boot Magic Number */
+ .globl version_string
+version_string:
+ .ascii U_BOOT_VERSION
+ .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii " ", CONFIG_IDENT_STRING, "\0"
+
+/*
+ * Vector Table
+ */
+ .text
+ . = EXC_OFF_SYS_RESET
+
+ .globl _start
+ /* Start from here after reset/power on */
+_start:
+ li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */
+ b boot_cold
+
+ .globl _start_of_vectors
+_start_of_vectors:
+
+/* Machine check */
+ STD_EXCEPTION(0x200, MachineCheck, MachineCheckException)
+
+/* Data Storage exception. */
+ STD_EXCEPTION(0x300, DataStorage, UnknownException)
+
+/* Instruction Storage exception. */
+ STD_EXCEPTION(0x400, InstStorage, UnknownException)
+
+/* External Interrupt exception. */
+ STD_EXCEPTION(0x500, ExtInterrupt, UnknownException)
+
+/* Alignment exception. */
+ . = 0x600
+Alignment:
+ EXCEPTION_PROLOG(SRR0, SRR1)
+ mfspr r4,DAR
+ stw r4,_DAR(r21)
+ mfspr r5,DSISR
+ stw r5,_DSISR(r21)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ li r20,MSR_KERNEL
+ rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
+ rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
+ lwz r6,GOT(transfer_to_handler)
+ mtlr r6
+ blrl
+.L_Alignment:
+ .long AlignmentException - _start + EXC_OFF_SYS_RESET
+ .long int_return - _start + EXC_OFF_SYS_RESET
+
+/* Program check exception */
+ . = 0x700
+ProgramCheck:
+ EXCEPTION_PROLOG(SRR0, SRR1)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ li r20,MSR_KERNEL
+ rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
+ rlwimi r20,r23,0,25,25 /* copy IP bit from saved MSR */
+ lwz r6,GOT(transfer_to_handler)
+ mtlr r6
+ blrl
+.L_ProgramCheck:
+ .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
+ .long int_return - _start + EXC_OFF_SYS_RESET
+
+/* Floating Point Unit unavailable exception */
+ STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
+
+/* Decrementer */
+ STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
+
+/* Critical interrupt */
+ STD_EXCEPTION(0xa00, Critical, UnknownException)
+
+/* System Call */
+ STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+
+/* Trace interrupt */
+ STD_EXCEPTION(0xd00, Trace, UnknownException)
+
+/* Performance Monitor interrupt */
+ STD_EXCEPTION(0xf00, PerfMon, UnknownException)
+
+/* Intruction Translation Miss */
+ STD_EXCEPTION(0x1000, InstructionTLBMiss, UnknownException)
+
+/* Data Load Translation Miss */
+ STD_EXCEPTION(0x1100, DataLoadTLBMiss, UnknownException)
+
+/* Data Store Translation Miss */
+ STD_EXCEPTION(0x1200, DataStoreTLBMiss, UnknownException)
+
+/* Instruction Address Breakpoint */
+ STD_EXCEPTION(0x1300, InstructionAddrBreakpoint, DebugException)
+
+/* System Management interrupt */
+ STD_EXCEPTION(0x1400, SystemMgmtInterrupt, UnknownException)
+
+ .globl _end_of_vectors
+_end_of_vectors:
+
+ . = 0x3000
+boot_cold:
+ /* Save msr contents */
+ mfmsr r5
+
+ /* Set IMMR area to our preferred location */
+ lis r4, CONFIG_DEFAULT_IMMR@h
+ lis r3, CFG_IMMR@h
+ ori r3, r3, CFG_IMMR@l
+ stw r3, IMMRBAR(r4)
+ mtspr MBAR, r3 /* IMMRBAR is mirrored into the MBAR SPR (311) */
+
+ /* Initialise the machine */
+ bl cpu_early_init
+
+ /*
+ * Set up Local Access Windows:
+ *
+ * 1) Boot/CS0 (boot FLASH)
+ * 2) On-chip SRAM (initial stack purposes)
+ */
+
+ /* Boot CS/CS0 window range */
+ lis r3, CFG_IMMR@h
+ ori r3, r3, CFG_IMMR@l
+
+ lis r4, START_REG(CFG_FLASH_BASE)
+ ori r4, r4, STOP_REG(CFG_FLASH_BASE, CFG_FLASH_SIZE)
+ stw r4, LPCS0AW(r3)
+
+ /*
+ * The SRAM window has a fixed size (256K), so only the start address
+ * is necessary
+ */
+ lis r4, START_REG(CFG_SRAM_BASE) & 0xff00
+ stw r4, SRAMBAR(r3)
+
+ /*
+ * According to MPC5121e RM, configuring local access windows should
+ * be followed by a dummy read of the config register that was
+ * modified last and an isync
+ */
+ lwz r4, SRAMBAR(r3)
+ isync
+
+ /*
+ * Set configuration of the Boot/CS0, the SRAM window does not have a
+ * config register so no params can be set for it
+ */
+ lis r3, (CFG_IMMR + LPC_OFFSET)@h
+ ori r3, r3, (CFG_IMMR + LPC_OFFSET)@l
+
+ lis r4, CFG_CS0_CFG@h
+ ori r4, r4, CFG_CS0_CFG@l
+ stw r4, CS0_CONFIG(r3)
+
+ /* Master enable all CS's */
+ lis r4, CS_CTRL_ME@h
+ ori r4, r4, CS_CTRL_ME@l
+ stw r4, CS_CTRL(r3)
+
+ lis r4, (CFG_MONITOR_BASE)@h
+ ori r4, r4, (CFG_MONITOR_BASE)@l
+ addi r5, r4, in_flash - _start + EXC_OFF_SYS_RESET
+ mtlr r5
+ blr
+
+in_flash:
+ lis r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@h
+ ori r1, r1, (CFG_INIT_RAM_ADDR + CFG_GBL_DATA_OFFSET)@l
+
+ li r0, 0 /* Make room for stack frame header and */
+ stwu r0, -4(r1) /* clear final stack frame so that */
+ stwu r0, -4(r1) /* stack backtraces terminate cleanly */
+
+ /* let the C-code set up the rest */
+ /* */
+ /* Be careful to keep code relocatable & stack humble */
+ /*------------------------------------------------------*/
+
+ GET_GOT /* initialize GOT access */
+
+ /* r3: IMMR */
+ lis r3, CFG_IMMR@h
+ /* run low-level CPU init code (in Flash) */
+ bl cpu_init_f
+
+ /* r3: BOOTFLAG */
+ mr r3, r21
+ /* run 1st part of board init code (in Flash) */
+ bl board_init_f
+
+ /* NOTREACHED - board_init_f() does not return */
+
+/*
+ * This code finishes saving the registers to the exception frame
+ * and jumps to the appropriate handler for the exception.
+ * Register r21 is pointer into trap frame, r1 has new stack pointer.
+ */
+ .globl transfer_to_handler
+transfer_to_handler:
+ stw r22,_NIP(r21)
+ lis r22,MSR_POW@h
+ andc r23,r23,r22
+ stw r23,_MSR(r21)
+ SAVE_GPR(7, r21)
+ SAVE_4GPRS(8, r21)
+ SAVE_8GPRS(12, r21)
+ SAVE_8GPRS(24, r21)
+ mflr r23
+ andi. r24,r23,0x3f00 /* get vector offset */
+ stw r24,TRAP(r21)
+ li r22,0
+ stw r22,RESULT(r21)
+ lwz r24,0(r23) /* virtual address of handler */
+ lwz r23,4(r23) /* where to go when done */
+ mtspr SRR0,r24
+ mtspr SRR1,r20
+ mtlr r23
+ SYNC
+ rfi /* jump to handler, enable MMU */
+
+int_return:
+ mfmsr r28 /* Disable interrupts */
+ li r4,0
+ ori r4,r4,MSR_EE
+ andc r28,r28,r4
+ SYNC /* Some chip revs need this... */
+ mtmsr r28
+ SYNC
+ lwz r2,_CTR(r1)
+ lwz r0,_LINK(r1)
+ mtctr r2
+ mtlr r0
+ lwz r2,_XER(r1)
+ lwz r0,_CCR(r1)
+ mtspr XER,r2
+ mtcrf 0xFF,r0
+ REST_10GPRS(3, r1)
+ REST_10GPRS(13, r1)
+ REST_8GPRS(23, r1)
+ REST_GPR(31, r1)
+ lwz r2,_NIP(r1) /* Restore environment */
+ lwz r0,_MSR(r1)
+ mtspr SRR0,r2
+ mtspr SRR1,r0
+ lwz r0,GPR0(r1)
+ lwz r2,GPR2(r1)
+ lwz r1,GPR1(r1)
+ SYNC
+ rfi
+
+/*
+ * This code initialises the machine, it expects original MSR contents to be in r5.
+ */
+cpu_early_init:
+ /* Initialize machine status; enable machine check interrupt */
+ /*-----------------------------------------------------------*/
+
+ li r3, MSR_KERNEL /* Set ME and RI flags */
+ rlwimi r3, r5, 0, 25, 25 /* preserve IP bit */
+#ifdef DEBUG
+ rlwimi r3, r5, 0, 21, 22 /* debugger might set SE, BE bits */
+#endif
+ mtmsr r3
+ SYNC
+ mtspr SRR1, r3 /* Mirror current MSR state in SRR1 */
+
+ lis r3, CFG_IMMR@h
+
+#if defined(CONFIG_WATCHDOG)
+ /* Initialise the watchdog and reset it */
+ /*--------------------------------------*/
+ lis r4, CFG_WATCHDOG_VALUE
+ ori r4, r4, (SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)
+ stw r4, SWCRR(r3)
+
+ /* reset */
+ li r4, 0x556C
+ sth r4, SWSRR@l(r3)
+ li r4, 0x0
+ ori r4, r4, 0xAA39
+ sth r4, SWSRR@l(r3)
+#else
+ /* Disable the watchdog */
+ /*----------------------*/
+ lwz r4, SWCRR(r3)
+ /*
+ * Check to see if it's enabled for disabling: once disabled by s/w
+ * it's not possible to re-enable it
+ */
+ andi. r4, r4, 0x4
+ beq 1f
+ xor r4, r4, r4
+ stw r4, SWCRR(r3)
+1:
+#endif /* CONFIG_WATCHDOG */
+
+ /* Initialize the Hardware Implementation-dependent Registers */
+ /* HID0 also contains cache control */
+ /*------------------------------------------------------*/
+ lis r3, CFG_HID0_INIT@h
+ ori r3, r3, CFG_HID0_INIT@l
+ SYNC
+ mtspr HID0, r3
+
+ lis r3, CFG_HID0_FINAL@h
+ ori r3, r3, CFG_HID0_FINAL@l
+ SYNC
+ mtspr HID0, r3
+
+ lis r3, CFG_HID2@h
+ ori r3, r3, CFG_HID2@l
+ SYNC
+ mtspr HID2, r3
+ sync
+ blr
+
+
+/* Cache functions.
+ *
+ * Note: requires that all cache bits in
+ * HID0 are in the low half word.
+ */
+ .globl icache_enable
+icache_enable:
+ mfspr r3, HID0
+ ori r3, r3, HID0_ICE
+ lis r4, 0
+ ori r4, r4, HID0_ILOCK
+ andc r3, r3, r4
+ ori r4, r3, HID0_ICFI
+ isync
+ mtspr HID0, r4 /* sets enable and invalidate, clears lock */
+ isync
+ mtspr HID0, r3 /* clears invalidate */
+ blr
+
+ .globl icache_disable
+icache_disable:
+ mfspr r3, HID0
+ lis r4, 0
+ ori r4, r4, HID0_ICE|HID0_ILOCK
+ andc r3, r3, r4
+ ori r4, r3, HID0_ICFI
+ isync
+ mtspr HID0, r4 /* sets invalidate, clears enable and lock*/
+ isync
+ mtspr HID0, r3 /* clears invalidate */
+ blr
+
+ .globl icache_status
+icache_status:
+ mfspr r3, HID0
+ rlwinm r3, r3, (31 - HID0_ICE_SHIFT + 1), 31, 31
+ blr
+
+ .globl dcache_enable
+dcache_enable:
+ mfspr r3, HID0
+ li r5, HID0_DCFI|HID0_DLOCK
+ andc r3, r3, r5
+ mtspr HID0, r3 /* no invalidate, unlock */
+ ori r3, r3, HID0_DCE
+ ori r5, r3, HID0_DCFI
+ mtspr HID0, r5 /* enable + invalidate */
+ mtspr HID0, r3 /* enable */
+ sync
+ blr
+
+ .globl dcache_disable
+dcache_disable:
+ mfspr r3, HID0
+ lis r4, 0
+ ori r4, r4, HID0_DCE|HID0_DLOCK
+ andc r3, r3, r4
+ ori r4, r3, HID0_DCI
+ sync
+ mtspr HID0, r4 /* sets invalidate, clears enable and lock */
+ sync
+ mtspr HID0, r3 /* clears invalidate */
+ blr
+
+ .globl dcache_status
+dcache_status:
+ mfspr r3, HID0
+ rlwinm r3, r3, (31 - HID0_DCE_SHIFT + 1), 31, 31
+ blr
+
+ .globl get_pvr
+get_pvr:
+ mfspr r3, PVR
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: ppcDcbf */
+/* Description: Data Cache block flush */
+/* Input: r3 = effective address */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcDcbf
+ppcDcbf:
+ dcbf r0,r3
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: ppcDcbi */
+/* Description: Data Cache block Invalidate */
+/* Input: r3 = effective address */
+/* Output: none. */
+/*------------------------------------------------------------------------------- */
+ .globl ppcDcbi
+ppcDcbi:
+ dcbi r0,r3
+ blr
+
+/*--------------------------------------------------------------------------
+ * Function: ppcDcbz
+ * Description: Data Cache block zero.
+ * Input: r3 = effective address
+ * Output: none.
+ *-------------------------------------------------------------------------- */
+
+ .globl ppcDcbz
+ppcDcbz:
+ dcbz r0,r3
+ blr
+
+ .globl ppcDWstore
+ppcDWstore:
+ lfd 1, 0(r4)
+ stfd 1, 0(r3)
+ blr
+
+ .globl ppcDWload
+ppcDWload:
+ lfd 1, 0(r3)
+ stfd 1, 0(r4)
+ blr
+
+/*-------------------------------------------------------------------*/
+
+/*
+ * void relocate_code (addr_sp, gd, addr_moni)
+ *
+ * This "function" does not return, instead it continues in RAM
+ * after relocating the monitor code.
+ *
+ * r3 = dest
+ * r4 = src
+ * r5 = length in bytes
+ * r6 = cachelinesize
+ */
+ .globl relocate_code
+relocate_code:
+ mr r1, r3 /* Set new stack pointer */
+ mr r9, r4 /* Save copy of Global Data pointer */
+ mr r10, r5 /* Save copy of Destination Address */
+
+ mr r3, r5 /* Destination Address */
+ lis r4, CFG_MONITOR_BASE@h /* Source Address */
+ ori r4, r4, CFG_MONITOR_BASE@l
+ lwz r5, GOT(__init_end)
+ sub r5, r5, r4
+ li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
+
+ /*
+ * Fix GOT pointer:
+ *
+ * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE)
+ * + Destination Address
+ *
+ * Offset:
+ */
+ sub r15, r10, r4
+
+ /* First our own GOT */
+ add r14, r14, r15
+ /* then the one used by the C code */
+ add r30, r30, r15
+
+ /*
+ * Now relocate code
+ */
+ cmplw cr1,r3,r4
+ addi r0,r5,3
+ srwi. r0,r0,2
+ beq cr1,4f /* In place copy is not necessary */
+ beq 7f /* Protect against 0 count */
+ mtctr r0
+ bge cr1,2f
+ la r8,-4(r4)
+ la r7,-4(r3)
+
+ /* copy */
+1: lwzu r0,4(r8)
+ stwu r0,4(r7)
+ bdnz 1b
+
+ addi r0,r5,3
+ srwi. r0,r0,2
+ mtctr r0
+ la r8,-4(r4)
+ la r7,-4(r3)
+
+ /* and compare */
+20: lwzu r20,4(r8)
+ lwzu r21,4(r7)
+ xor. r22, r20, r21
+ bne 30f
+ bdnz 20b
+ b 4f
+
+ /* compare failed */
+30: li r3, 0
+ blr
+
+2: slwi r0,r0,2 /* re copy in reverse order ... y do we needed it? */
+ add r8,r4,r0
+ add r7,r3,r0
+3: lwzu r0,-4(r8)
+ stwu r0,-4(r7)
+ bdnz 3b
+
+/*
+ * Now flush the cache: note that we must start from a cache aligned
+ * address. Otherwise we might miss one cache line.
+ */
+4: cmpwi r6,0
+ add r5,r3,r5
+ beq 7f /* Always flush prefetch queue in any case */
+ subi r0,r6,1
+ andc r3,r3,r0
+ mr r4,r3
+5: dcbst 0,r4
+ add r4,r4,r6
+ cmplw r4,r5
+ blt 5b
+ sync /* Wait for all dcbst to complete on bus */
+ mr r4,r3
+6: icbi 0,r4
+ add r4,r4,r6
+ cmplw r4,r5
+ blt 6b
+7: sync /* Wait for all icbi to complete on bus */
+ isync
+
+/*
+ * We are done. Do not return, instead branch to second part of board
+ * initialization, now running from RAM.
+ */
+ addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
+ mtlr r0
+ blr
+
+in_ram:
+ /*
+ * Relocation Function, r14 point to got2+0x8000
+ *
+ * Adjust got2 pointers, no need to check for 0, this code
+ * already puts a few entries in the table.
+ */
+ li r0,__got2_entries@sectoff@l
+ la r3,GOT(_GOT2_TABLE_)
+ lwz r11,GOT(_GOT2_TABLE_)
+ mtctr r0
+ sub r11,r3,r11
+ addi r3,r3,-4
+1: lwzu r0,4(r3)
+ add r0,r0,r11
+ stw r0,0(r3)
+ bdnz 1b
+
+ /*
+ * Now adjust the fixups and the pointers to the fixups
+ * in case we need to move ourselves again.
+ */
+2: li r0,__fixup_entries@sectoff@l
+ lwz r3,GOT(_FIXUP_TABLE_)
+ cmpwi r0,0
+ mtctr r0
+ addi r3,r3,-4
+ beq 4f
+3: lwzu r4,4(r3)
+ lwzux r0,r4,r11
+ add r0,r0,r11
+ stw r10,0(r3)
+ stw r0,0(r4)
+ bdnz 3b
+4:
+clear_bss:
+ /*
+ * Now clear BSS segment
+ */
+ lwz r3,GOT(__bss_start)
+ lwz r4,GOT(_end)
+
+ cmplw 0, r3, r4
+ beq 6f
+
+ li r0, 0
+5:
+ stw r0, 0(r3)
+ addi r3, r3, 4
+ cmplw 0, r3, r4
+ bne 5b
+6:
+ mr r3, r9 /* Global Data pointer */
+ mr r4, r10 /* Destination Address */
+ bl board_init_r
+
+ /*
+ * Copy exception vector code to low memory
+ *
+ * r3: dest_addr
+ * r7: source address, r8: end address, r9: target address
+ */
+ .globl trap_init
+trap_init:
+ lwz r7, GOT(_start)
+ lwz r8, GOT(_end_of_vectors)
+
+ li r9, 0x100 /* reset vector at 0x100 */
+
+ cmplw 0, r7, r8
+ bgelr /* return if r7>=r8 - just in case */
+
+ mflr r4 /* save link register */
+1:
+ lwz r0, 0(r7)
+ stw r0, 0(r9)
+ addi r7, r7, 4
+ addi r9, r9, 4
+ cmplw 0, r7, r8
+ bne 1b
+
+ /*
+ * relocate `hdlr' and `int_return' entries
+ */
+ li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
+ li r8, Alignment - _start + EXC_OFF_SYS_RESET
+2:
+ bl trap_reloc
+ addi r7, r7, 0x100 /* next exception vector */
+ cmplw 0, r7, r8
+ blt 2b
+
+ li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
+ bl trap_reloc
+
+ li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
+ bl trap_reloc
+
+ li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
+ li r8, SystemCall - _start + EXC_OFF_SYS_RESET
+3:
+ bl trap_reloc
+ addi r7, r7, 0x100 /* next exception vector */
+ cmplw 0, r7, r8
+ blt 3b
+
+ li r7, .L_Trace - _start + EXC_OFF_SYS_RESET
+ li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+4:
+ bl trap_reloc
+ addi r7, r7, 0x100 /* next exception vector */
+ cmplw 0, r7, r8
+ blt 4b
+
+ mfmsr r3 /* now that the vectors have */
+ lis r7, MSR_IP@h /* relocated into low memory */
+ ori r7, r7, MSR_IP@l /* MSR[IP] can be turned off */
+ andc r3, r3, r7 /* (if it was on) */
+ SYNC /* Some chip revs need this... */
+ mtmsr r3
+ SYNC
+
+ mtlr r4 /* restore link register */
+ blr
+
+ /*
+ * Function: relocate entries for one exception vector
+ */
+trap_reloc:
+ lwz r0, 0(r7) /* hdlr ... */
+ add r0, r0, r3 /* ... += dest_addr */
+ stw r0, 0(r7)
+
+ lwz r0, 4(r7) /* int_return ... */
+ add r0, r0, r3 /* ... += dest_addr */
+ stw r0, 4(r7)
+
+ blr
diff --git a/cpu/mpc512x/traps.c b/cpu/mpc512x/traps.c
new file mode 100644
index 0000000..8455c92
--- /dev/null
+++ b/cpu/mpc512x/traps.c
@@ -0,0 +1,205 @@
+/*
+ * (C) Copyright 2000 - 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Derived from the MPC83xx code.
+ */
+
+/*
+ * This file handles the architecture-dependent parts of hardware
+ * exceptions
+ */
+
+#include <common.h>
+#include <asm/processor.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern unsigned long search_exception_table(unsigned long);
+
+#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
+
+/*
+ * Trap & Exception support
+ */
+
+void
+print_backtrace (unsigned long *sp)
+{
+ int cnt = 0;
+ unsigned long i;
+
+ puts ("Call backtrace: ");
+ while (sp) {
+ if ((uint)sp > END_OF_MEM)
+ break;
+
+ i = sp[1];
+ if (cnt++ % 7 == 0)
+ putc ('\n');
+ printf ("%08lX ", i);
+ if (cnt > 32) break;
+ sp = (unsigned long *) *sp;
+ }
+ putc ('\n');
+}
+
+void show_regs (struct pt_regs * regs)
+{
+ int i;
+
+ printf ("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
+ regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
+ printf ("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
+ regs->msr, regs->msr & MSR_EE ? 1 : 0, regs->msr & MSR_PR ? 1 : 0,
+ regs->msr & MSR_FP ? 1 : 0,regs->msr & MSR_ME ? 1 : 0,
+ regs->msr & MSR_IR ? 1 : 0,
+ regs->msr & MSR_DR ? 1 : 0);
+
+ putc ('\n');
+ for (i = 0; i < 32; i++) {
+ if ((i % 8) == 0) {
+ printf ("GPR%02d: ", i);
+ }
+
+ printf ("%08lX ", regs->gpr[i]);
+ if ((i % 8) == 7) {
+ putc ('\n');
+ }
+ }
+}
+
+
+void
+_exception (int signr, struct pt_regs *regs)
+{
+ show_regs (regs);
+ print_backtrace ((unsigned long *)regs->gpr[1]);
+ panic ("Exception at pc %lx signal %d", regs->nip,signr);
+}
+
+
+void
+MachineCheckException (struct pt_regs *regs)
+{
+ unsigned long fixup;
+
+ if ((fixup = search_exception_table (regs->nip)) != 0) {
+ regs->nip = fixup;
+ return;
+ }
+
+#ifdef CONFIG_CMD_KGDB
+ if (debugger_exception_handler && (*debugger_exception_handler)(regs))
+ return;
+#endif
+
+ puts ("Machine check.\nCaused by (from msr): ");
+ printf ("regs %p ",regs);
+ switch (regs->msr & 0x00FF0000) {
+ case (0x80000000 >> 10):
+ puts ("Instruction cache parity signal\n");
+ break;
+ case (0x80000000 >> 11):
+ puts ("Data cache parity signal\n");
+ break;
+ case (0x80000000 >> 12):
+ puts ("Machine check signal\n");
+ break;
+ case (0x80000000 >> 13):
+ puts ("Transfer error ack signal\n");
+ break;
+ case (0x80000000 >> 14):
+ puts ("Data parity signal\n");
+ break;
+ case (0x80000000 >> 15):
+ puts ("Address parity signal\n");
+ break;
+ default:
+ puts ("Unknown values in msr\n");
+ }
+ show_regs (regs);
+ print_backtrace ((unsigned long *)regs->gpr[1]);
+
+ panic ("machine check");
+}
+
+void
+AlignmentException (struct pt_regs *regs)
+{
+#ifdef CONFIG_CMD_KGDB
+ if (debugger_exception_handler && (*debugger_exception_handler)(regs))
+ return;
+#endif
+ show_regs (regs);
+ print_backtrace ((unsigned long *)regs->gpr[1]);
+ panic ("Alignment Exception");
+}
+
+void
+ProgramCheckException (struct pt_regs *regs)
+{
+#ifdef CONFIG_CMD_KGDB
+ if (debugger_exception_handler && (*debugger_exception_handler)(regs))
+ return;
+#endif
+ show_regs (regs);
+ print_backtrace ((unsigned long *)regs->gpr[1]);
+ panic ("Program Check Exception");
+}
+
+void
+SoftEmuException (struct pt_regs *regs)
+{
+#ifdef CONFIG_CMD_KGDB
+ if (debugger_exception_handler && (*debugger_exception_handler)(regs))
+ return;
+#endif
+ show_regs (regs);
+ print_backtrace ((unsigned long *)regs->gpr[1]);
+ panic ("Software Emulation Exception");
+}
+
+
+void
+UnknownException (struct pt_regs *regs)
+{
+#ifdef CONFIG_CMD_KGDB
+ if (debugger_exception_handler && (*debugger_exception_handler)(regs))
+ return;
+#endif
+ printf ("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
+ regs->nip, regs->msr, regs->trap);
+ _exception (0, regs);
+}
+
+#ifdef CONFIG_CMD_BEDBUG
+extern void do_bedbug_breakpoint (struct pt_regs *);
+#endif
+
+void
+DebugException (struct pt_regs *regs)
+{
+ printf ("Debugger trap at @ %lx\n", regs->nip );
+ show_regs (regs);
+#ifdef CONFIG_CMD_BEDBUG
+ do_bedbug_breakpoint (regs);
+#endif
+}
diff --git a/cpu/mpc5xx/config.mk b/cpu/mpc5xx/config.mk
index 5b26a76..e95b8a1 100644
--- a/cpu/mpc5xx/config.mk
+++ b/cpu/mpc5xx/config.mk
@@ -28,6 +28,9 @@
#
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -ffixed-r29 -mpowerpc -msoft-float
+
+# Use default linker script. Board port can override in board/*/config.mk
+LDSCRIPT := $(SRCTREE)/cpu/mpc5xx/u-boot.lds
diff --git a/cpu/mpc5xx/interrupts.c b/cpu/mpc5xx/interrupts.c
index 7f6e136..a4f47c7 100644
--- a/cpu/mpc5xx/interrupts.c
+++ b/cpu/mpc5xx/interrupts.c
@@ -178,7 +178,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
/*******************************************************************************
*
* irqinfo - print information about IRQs
@@ -204,4 +204,4 @@
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S
index 087435e..0637003 100644
--- a/cpu/mpc5xx/start.S
+++ b/cpu/mpc5xx/start.S
@@ -155,7 +155,7 @@
/* Initialize some SPRs that are hard to access from C */
/*----------------------------------------------------------------------*/
- lis r3, CFG_IMMR@h /* Pass IMMR as arg1 to C routine */
+ lis r3, CFG_IMMR@h /* Pass IMMR as arg1 to C routine */
lis r2, CFG_INIT_SP_ADDR@h
ori r1, r2, CFG_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */
/* Note: R0 is still 0 here */
@@ -210,7 +210,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -228,7 +228,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/mpc5xx/traps.c b/cpu/mpc5xx/traps.c
index 14fd59e..d22b89a 100644
--- a/cpu/mpc5xx/traps.c
+++ b/cpu/mpc5xx/traps.c
@@ -36,11 +36,11 @@
#include <command.h>
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -131,7 +131,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -165,7 +165,7 @@
*/
void AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -179,7 +179,7 @@
*/
void ProgramCheckException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -193,7 +193,7 @@
*/
void SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -208,7 +208,7 @@
*/
void UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -224,7 +224,7 @@
{
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/mpc5xx/u-boot.lds b/cpu/mpc5xx/u-boot.lds
new file mode 100644
index 0000000..10001b1
--- /dev/null
+++ b/cpu/mpc5xx/u-boot.lds
@@ -0,0 +1,139 @@
+/*
+ * (C) Copyright 2001 Wolfgang Denk, DENX Software Engineering, wd@denx.de
+ * (C) Copyright 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mpc5xx/start.o (.text)
+
+ *(.text)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+
+ _end = . ;
+ PROVIDE (end = .);
+/* . = env_start;
+ .ppcenv :
+ {
+ common/environment.o (.ppcenv)
+ }
+*/
+}
diff --git a/cpu/mpc5xxx/Makefile b/cpu/mpc5xxx/Makefile
index 235adb7..312b0bf 100644
--- a/cpu/mpc5xxx/Makefile
+++ b/cpu/mpc5xxx/Makefile
@@ -28,7 +28,7 @@
START = start.o
SOBJS = io.o firmware_sc_task_bestcomm.impl.o firmware_sc_task.impl.o
COBJS = i2c.o traps.o cpu.o cpu_init.o fec.o ide.o interrupts.o \
- loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o
+ loadtask.o pci_mpc5200.o serial.o speed.o usb_ohci.o usb.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mpc5xxx/config.mk b/cpu/mpc5xxx/config.mk
index ecd94e9..0e861c4 100644
--- a/cpu/mpc5xxx/config.mk
+++ b/cpu/mpc5xxx/config.mk
@@ -21,7 +21,10 @@
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
PLATFORM_CPPFLAGS += -DCONFIG_MPC5xxx -ffixed-r2 -ffixed-r29 \
-mstring -mcpu=603e -mmultiple
+
+# Use default linker script. Board port can override in board/*/config.mk
+LDSCRIPT := $(SRCTREE)/cpu/mpc5xxx/u-boot.lds
diff --git a/cpu/mpc5xxx/cpu.c b/cpu/mpc5xxx/cpu.c
index 1eac2bb..7f16b92 100644
--- a/cpu/mpc5xxx/cpu.c
+++ b/cpu/mpc5xxx/cpu.c
@@ -29,10 +29,12 @@
#include <watchdog.h>
#include <command.h>
#include <mpc5xxx.h>
+#include <asm/io.h>
#include <asm/processor.h>
-#if defined(CONFIG_OF_FLAT_TREE)
-#include <ft_build.h>
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#include <libfdt_env.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
@@ -111,29 +113,43 @@
/* ------------------------------------------------------------------------- */
-#ifdef CONFIG_OF_FLAT_TREE
-void
-ft_cpu_setup(void *blob, bd_t *bd)
+#ifdef CONFIG_OF_LIBFDT
+static void do_fixup(void *fdt, const char *node, const char *prop,
+ const void *val, int len, int create)
{
- u32 *p;
- int len;
+#if defined(DEBUG)
+ int i;
+ debug("Updating property '%s/%s' = ", node, prop);
+ for (i = 0; i < len; i++)
+ debug(" %.2x", *(u8*)(val+i));
+ debug("\n");
+#endif
+ int rc = fdt_find_and_setprop(fdt, node, prop, val, len, create);
+ if (rc)
+ printf("Unable to update property %s:%s, err=%s\n",
+ node, prop, fdt_strerror(rc));
+}
- /* Core XLB bus frequency */
- p = ft_get_prop(blob, "/cpus/" OF_CPU "/bus-frequency", &len);
- if (p != NULL)
- *p = cpu_to_be32(bd->bi_busfreq);
+static void do_fixup_u32(void *fdt, const char *node, const char *prop,
+ u32 val, int create)
+{
+ val = cpu_to_fdt32(val);
+ do_fixup(fdt, node, prop, &val, sizeof(val), create);
+}
- /* SOC peripherals use the IPB bus frequency */
- p = ft_get_prop(blob, "/" OF_SOC "/bus-frequency", &len);
- if (p != NULL)
- *p = cpu_to_be32(bd->bi_ipbfreq);
+void ft_cpu_setup(void *blob, bd_t *bd)
+{
+ int div = in_8((void*)CFG_MBAR + 0x204) & 0x0020 ? 8 : 4;
+ char * cpu_path = "/cpus/" OF_CPU;
+ char * eth_path = "/" OF_SOC "/ethernet@3000";
- p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/mac-address", &len);
- if (p != NULL)
- memcpy(p, bd->bi_enetaddr, 6);
-
- p = ft_get_prop(blob, "/" OF_SOC "/ethernet@3000/local-mac-address", &len);
- if (p != NULL)
- memcpy(p, bd->bi_enetaddr, 6);
+ do_fixup_u32(blob, cpu_path, "timebase-frequency", OF_TBCLK, 1);
+ do_fixup_u32(blob, cpu_path, "bus-frequency", bd->bi_busfreq, 1);
+ do_fixup_u32(blob, cpu_path, "clock-frequency", bd->bi_intfreq, 1);
+ do_fixup_u32(blob, "/" OF_SOC, "bus-frequency", bd->bi_ipbfreq, 1);
+ do_fixup_u32(blob, "/" OF_SOC, "system-frequency",
+ bd->bi_busfreq*div, 1);
+ do_fixup(blob, eth_path, "mac-address", bd->bi_enetaddr, 6, 0);
+ do_fixup(blob, eth_path, "local-mac-address", bd->bi_enetaddr, 6, 0);
}
#endif
diff --git a/cpu/mpc5xxx/cpu_init.c b/cpu/mpc5xxx/cpu_init.c
index 7e65821..bc6201e 100644
--- a/cpu/mpc5xxx/cpu_init.c
+++ b/cpu/mpc5xxx/cpu_init.c
@@ -156,21 +156,21 @@
*(vu_long *)(MPC5XXX_XLBARB + 0x40) |= (1 << 15);
*(vu_long *)(MPC5XXX_XLBARB + 0x70) = CFG_SDRAM_BASE | 0x1d;
-# if defined(CFG_IPBSPEED_133)
+# if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/* Motorola reports IPB should better run at 133 MHz. */
*(vu_long *)MPC5XXX_ADDECR |= 1;
/* pci_clk_sel = 0x02, ipb_clk_sel = 0x00; */
addecr = *(vu_long *)MPC5XXX_CDM_CFG;
addecr &= ~0x103;
-# if defined(CFG_PCISPEED_66)
+# if defined(CFG_PCICLK_EQUALS_IPBCLK_DIV2)
/* pci_clk_sel = 0x01 -> IPB_CLK/2 */
addecr |= 0x01;
# else
/* pci_clk_sel = 0x02 -> XLB_CLK/4 = IPB_CLK/4 */
addecr |= 0x02;
-# endif /* CFG_PCISPEED_66 */
+# endif /* CFG_PCICLK_EQUALS_IPBCLK_DIV2 */
*(vu_long *)MPC5XXX_CDM_CFG = addecr;
-# endif /* CFG_IPBSPEED_133 */
+# endif /* CFG_IPBCLK_EQUALS_XLBCLK */
/* Configure the XLB Arbiter */
*(vu_long *)MPC5XXX_XLBARB_MPRIEN = 0xff;
*(vu_long *)MPC5XXX_XLBARB_MPRIVAL = 0x11111111;
@@ -198,7 +198,7 @@
/* route critical ints to normal ints */
*(vu_long *)MPC5XXX_ICTL_EXT |= 0x00000001;
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_MPC5xxx_FEC)
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_MPC5xxx_FEC)
/* load FEC microcode */
loadtask(0, 2);
#endif
diff --git a/cpu/mpc5xxx/fec.c b/cpu/mpc5xxx/fec.c
index e59bd85..1d3da77 100644
--- a/cpu/mpc5xxx/fec.c
+++ b/cpu/mpc5xxx/fec.c
@@ -18,10 +18,10 @@
/* #define DEBUG 0x28 */
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
defined(CONFIG_MPC5xxx_FEC)
-#if !(defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII))
+#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
#error "CONFIG_MII has to be defined!"
#endif
@@ -428,6 +428,13 @@
*/
fec->eth->imask = 0x00000000;
+/*
+ * In original Promess-provided code PHY initialization is disabled with the
+ * following comment: "Phy initialization is DISABLED for now. There was a
+ * problem with running 100 Mbps on PRO board". Thus we temporarily disable
+ * PHY initialization for the Motion-PRO board, until a proper fix is found.
+ */
+
if (fec->xcv_type != SEVENWIRE) {
/*
* Set MII_SPEED = (1/(mii_speed * 2)) * System Clock
@@ -882,13 +889,20 @@
fec->eth = (ethernet_regs *)MPC5XXX_FEC;
fec->tbdBase = (FEC_TBD *)FEC_BD_BASE;
fec->rbdBase = (FEC_RBD *)(FEC_BD_BASE + FEC_TBD_NUM * sizeof(FEC_TBD));
-#if defined(CONFIG_CANMB) || defined(CONFIG_HMI1001) || \
- defined(CONFIG_ICECUBE) || defined(CONFIG_INKA4X0) || \
- defined(CONFIG_JUPITER) || defined(CONFIG_MCC200) || \
- defined(CONFIG_MOTIONPRO)|| defined(CONFIG_O2DNT) || \
- defined(CONFIG_PM520) || defined(CONFIG_TOP5200) || \
- defined(CONFIG_TQM5200) || defined(CONFIG_UC101) || \
- defined(CONFIG_V38B)
+#if defined(CONFIG_CANMB) || \
+ defined(CONFIG_CM5200) || \
+ defined(CONFIG_HMI1001) || \
+ defined(CONFIG_ICECUBE) || \
+ defined(CONFIG_INKA4X0) || \
+ defined(CONFIG_JUPITER) || \
+ defined(CONFIG_MCC200) || \
+ defined(CONFIG_MOTIONPRO) || \
+ defined(CONFIG_O2DNT) || \
+ defined(CONFIG_PM520) || \
+ defined(CONFIG_TOP5200) || \
+ defined(CONFIG_TQM5200) || \
+ defined(CONFIG_UC101) || \
+ defined(CONFIG_V38B)
# ifndef CONFIG_FEC_10MBIT
fec->xcv_type = MII100;
# else
@@ -910,7 +924,7 @@
sprintf(dev->name, "FEC ETHERNET");
eth_register(dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register (dev->name,
fec5xxx_miiphy_read, fec5xxx_miiphy_write);
#endif
diff --git a/cpu/mpc5xxx/ide.c b/cpu/mpc5xxx/ide.c
index 29b99f6..df5b4ac 100644
--- a/cpu/mpc5xxx/ide.c
+++ b/cpu/mpc5xxx/ide.c
@@ -24,7 +24,7 @@
*/
#include <common.h>
-#ifdef CFG_CMD_IDE
+#if defined(CONFIG_CMD_IDE)
#include <mpc5xxx.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -54,11 +54,19 @@
/* All sample codes do that... */
*(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0;
+#if defined(CONFIG_UC101)
+ /* Configure and reset host */
+ *(vu_long *) MPC5XXX_ATA_HOST_CONFIG =
+ MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
+ udelay (10);
+ *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = 0;
+#else
/* Configure and reset host */
*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY |
MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR;
udelay (10);
*(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY;
+#endif
/* Disable prefetch on Commbus */
psdma->PtdCntrl |= 1;
@@ -85,4 +93,4 @@
return (0);
}
-#endif /* CFG_CMD_IDE */
+#endif
diff --git a/cpu/mpc5xxx/interrupts.c b/cpu/mpc5xxx/interrupts.c
index beeb222..8816dd1 100644
--- a/cpu/mpc5xxx/interrupts.c
+++ b/cpu/mpc5xxx/interrupts.c
@@ -310,7 +310,7 @@
/****************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
void do_irqinfo(cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[])
{
int irq, re_enable;
diff --git a/cpu/mpc5xxx/start.S b/cpu/mpc5xxx/start.S
index 3936b55..9b1bd48 100644
--- a/cpu/mpc5xxx/start.S
+++ b/cpu/mpc5xxx/start.S
@@ -208,7 +208,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -227,7 +227,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/mpc5xxx/traps.c b/cpu/mpc5xxx/traps.c
index 2ee782b..daa1ec6 100644
--- a/cpu/mpc5xxx/traps.c
+++ b/cpu/mpc5xxx/traps.c
@@ -37,7 +37,7 @@
#include <command.h>
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -123,7 +123,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -158,7 +158,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -170,7 +170,7 @@
void
ProgramCheckException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -182,7 +182,7 @@
void
SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -195,7 +195,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -204,7 +204,7 @@
_exception(0, regs);
}
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -214,7 +214,7 @@
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/mpc5xxx/u-boot-customlayout.lds b/cpu/mpc5xxx/u-boot-customlayout.lds
new file mode 100644
index 0000000..1107943
--- /dev/null
+++ b/cpu/mpc5xxx/u-boot-customlayout.lds
@@ -0,0 +1,135 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ /* WARNING - the following is hand-optimized to fit within */
+ /* the sector layout of our flash chips! XXX FIXME XXX */
+
+ cpu/mpc5xxx/start.o (.text)
+ cpu/mpc5xxx/traps.o (.text)
+ lib_generic/crc32.o (.text)
+ lib_ppc/cache.o (.text)
+ lib_ppc/time.o (.text)
+
+ . = DEFINED(env_offset) ? env_offset : .;
+ common/environment.o (.ppcenv)
+
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/cpu/mpc5xxx/u-boot.lds b/cpu/mpc5xxx/u-boot.lds
new file mode 100644
index 0000000..a28a3af
--- /dev/null
+++ b/cpu/mpc5xxx/u-boot.lds
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2003-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc5xxx/start.o (.text)
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/cpu/mpc5xxx/usb.c b/cpu/mpc5xxx/usb.c
new file mode 100644
index 0000000..ed467ab
--- /dev/null
+++ b/cpu/mpc5xxx/usb.c
@@ -0,0 +1,54 @@
+/*
+ * (C) Copyright 2007
+ * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+
+#include <mpc5xxx.h>
+
+int usb_cpu_init(void)
+{
+ /* Set the USB Clock */
+ *(vu_long *)MPC5XXX_CDM_48_FDC = CONFIG_USB_CLOCK;
+
+ /* remove all USB bits first before ORing in ours */
+ *(vu_long *)MPC5XXX_GPS_PORT_CONFIG &= ~0x00807000;
+
+ /* Activate USB port */
+ *(vu_long *)MPC5XXX_GPS_PORT_CONFIG |= CONFIG_USB_CONFIG;
+
+ return 0;
+}
+
+int usb_cpu_stop(void)
+{
+ return 0;
+}
+
+int usb_cpu_init_fail(void)
+{
+ return 0;
+}
+
+#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/cpu/mpc8220/config.mk b/cpu/mpc8220/config.mk
index 6fec5df..c41cafe 100644
--- a/cpu/mpc8220/config.mk
+++ b/cpu/mpc8220/config.mk
@@ -21,7 +21,10 @@
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
PLATFORM_CPPFLAGS += -DCONFIG_MPC8220 -ffixed-r2 -ffixed-r29 \
-mstring -mcpu=603e -mmultiple
+
+# Use default linker script. Board port can override in board/*/config.mk
+LDSCRIPT := $(SRCTREE)/cpu/mpc8220/u-boot.lds
diff --git a/cpu/mpc8220/cpu_init.c b/cpu/mpc8220/cpu_init.c
index 3cf5f66..0daac5b 100644
--- a/cpu/mpc8220/cpu_init.c
+++ b/cpu/mpc8220/cpu_init.c
@@ -128,7 +128,7 @@
/* route critical ints to normal ints */
*(vu_long *) 0xf0000710 |= 0x00000001;
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_MPC8220_FEC)
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_MPC8220_FEC)
/* load FEC microcode */
loadtask (0, 2);
#endif
diff --git a/cpu/mpc8220/fec.c b/cpu/mpc8220/fec.c
index 1201e79..992e0ff 100644
--- a/cpu/mpc8220/fec.c
+++ b/cpu/mpc8220/fec.c
@@ -15,10 +15,10 @@
#include "fec.h"
#undef DEBUG
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
defined(CONFIG_MPC8220_FEC)
-#if !(defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII))
+#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
#error "CONFIG_MII has to be defined!"
#endif
@@ -847,7 +847,7 @@
sprintf (dev->name, "FEC ETHERNET");
eth_register (dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register (dev->name,
fec8220_miiphy_read, fec8220_miiphy_write);
#endif
diff --git a/cpu/mpc8220/start.S b/cpu/mpc8220/start.S
index 5233202..b5145ca 100644
--- a/cpu/mpc8220/start.S
+++ b/cpu/mpc8220/start.S
@@ -169,7 +169,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -188,7 +188,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/mpc8220/traps.c b/cpu/mpc8220/traps.c
index cdee2be..89cca1d 100644
--- a/cpu/mpc8220/traps.c
+++ b/cpu/mpc8220/traps.c
@@ -37,7 +37,7 @@
#include <command.h>
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler) (struct pt_regs *) = 0;
#endif
@@ -118,7 +118,7 @@
regs->nip = fixup;
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler
&& (*debugger_exception_handler) (regs))
return;
@@ -152,7 +152,7 @@
void AlignmentException (struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler
&& (*debugger_exception_handler) (regs))
return;
@@ -164,7 +164,7 @@
void ProgramCheckException (struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler
&& (*debugger_exception_handler) (regs))
return;
@@ -176,7 +176,7 @@
void SoftEmuException (struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler
&& (*debugger_exception_handler) (regs))
return;
@@ -189,7 +189,7 @@
void UnknownException (struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler
&& (*debugger_exception_handler) (regs))
return;
@@ -199,7 +199,7 @@
_exception (0, regs);
}
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint (struct pt_regs *);
#endif
@@ -208,7 +208,7 @@
printf ("Debugger trap at @ %lx\n", regs->nip);
show_regs (regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint (regs);
#endif
}
diff --git a/cpu/mpc8220/u-boot.lds b/cpu/mpc8220/u-boot.lds
new file mode 100644
index 0000000..a199a64
--- /dev/null
+++ b/cpu/mpc8220/u-boot.lds
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2003-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc8220/start.o (.text)
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/cpu/mpc824x/config.mk b/cpu/mpc824x/config.mk
index dac61d8..17fdb21 100644
--- a/cpu/mpc824x/config.mk
+++ b/cpu/mpc824x/config.mk
@@ -21,6 +21,9 @@
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing -mrelocatable
PLATFORM_CPPFLAGS += -DCONFIG_MPC824X -ffixed-r2 -ffixed-r29 -mstring -mcpu=603e -msoft-float
+
+# Use default linker script. Board port can override in board/*/config.mk
+LDSCRIPT := $(SRCTREE)/cpu/mpc824x/u-boot.lds
diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S
index 9ff052c..784edc3 100644
--- a/cpu/mpc824x/start.S
+++ b/cpu/mpc824x/start.S
@@ -220,7 +220,7 @@
/* Alignment exception. */
. = EXC_OFF_ALIGN
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -238,7 +238,7 @@
/* Program check exception */
. = EXC_OFF_PROGRAM
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/mpc824x/traps.c b/cpu/mpc824x/traps.c
index 071d003..0a72430 100644
--- a/cpu/mpc824x/traps.c
+++ b/cpu/mpc824x/traps.c
@@ -175,7 +175,7 @@
_exception(0, regs);
}
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -185,7 +185,7 @@
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/mpc824x/u-boot.lds b/cpu/mpc824x/u-boot.lds
new file mode 100644
index 0000000..8cbef4a
--- /dev/null
+++ b/cpu/mpc824x/u-boot.lds
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2001-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc824x/start.o (.text)
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/cpu/mpc8260/bedbug_603e.c b/cpu/mpc8260/bedbug_603e.c
index be09cfb..f1be485 100644
--- a/cpu/mpc8260/bedbug_603e.c
+++ b/cpu/mpc8260/bedbug_603e.c
@@ -10,7 +10,8 @@
#include <bedbug/regs.h>
#include <bedbug/ppc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && (defined(CONFIG_MPC824X) || defined(CONFIG_MPC8260))
+#if defined(CONFIG_CMD_BEDBUG) \
+ && (defined(CONFIG_MPC824X) || defined(CONFIG_MPC8260))
#define MAX_BREAK_POINTS 1
diff --git a/cpu/mpc8260/config.mk b/cpu/mpc8260/config.mk
index dd7a71f..d401e4c 100644
--- a/cpu/mpc8260/config.mk
+++ b/cpu/mpc8260/config.mk
@@ -21,7 +21,10 @@
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
PLATFORM_CPPFLAGS += -DCONFIG_8260 -DCONFIG_CPM2 -ffixed-r2 -ffixed-r29 \
-mstring -mcpu=603e -mmultiple
+
+# Use default linker script. Board port can override in board/*/config.mk
+LDSCRIPT := $(SRCTREE)/cpu/mpc8260/u-boot.lds
diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c
index 380d7af..36fc1eb 100644
--- a/cpu/mpc8260/cpu_init.c
+++ b/cpu/mpc8260/cpu_init.c
@@ -182,7 +182,7 @@
#endif
/* now restrict to preliminary range */
- /* the PS came from the HRCW, don´t change it */
+ /* the PS came from the HRCW, don´t change it */
memctl->memc_br0 = SET_VAL_MASK(memctl->memc_br0 , CFG_BR0_PRELIM, BRx_PS_MSK);
memctl->memc_or0 = CFG_OR0_PRELIM;
diff --git a/cpu/mpc8260/ether_fcc.c b/cpu/mpc8260/ether_fcc.c
index 584c40f..37bf445 100644
--- a/cpu/mpc8260/ether_fcc.c
+++ b/cpu/mpc8260/ether_fcc.c
@@ -47,13 +47,13 @@
#include <config.h>
#include <net.h>
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
#include <miiphy.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET) && \
+#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET) && \
defined(CONFIG_NET_MULTI)
static struct ether_fcc_info_s
@@ -393,7 +393,7 @@
eth_register(dev);
-#if (defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) \
+#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
miiphy_register(dev->name,
bb_miiphy_read, bb_miiphy_write);
@@ -1187,4 +1187,4 @@
#endif /* CONFIG_ETHER_LOOPBACK_TEST */
-#endif /* CONFIG_ETHER_ON_FCC && CFG_CMD_NET && CONFIG_NET_MULTI */
+#endif
diff --git a/cpu/mpc8260/ether_scc.c b/cpu/mpc8260/ether_scc.c
index a733b45..e56839d 100644
--- a/cpu/mpc8260/ether_scc.c
+++ b/cpu/mpc8260/ether_scc.c
@@ -36,7 +36,7 @@
#include <command.h>
#include <config.h>
-#if defined(CONFIG_ETHER_ON_SCC) && (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_ETHER_ON_SCC) && defined(CONFIG_CMD_NET)
#if (CONFIG_ETHER_INDEX == 1)
# define PROFF_ENET PROFF_SCC1
@@ -353,4 +353,4 @@
}
#endif
-#endif /* CONFIG_ETHER_ON_SCC && CFG_CMD_NET */
+#endif
diff --git a/cpu/mpc8260/interrupts.c b/cpu/mpc8260/interrupts.c
index 56e9a72..bf0d4d0 100644
--- a/cpu/mpc8260/interrupts.c
+++ b/cpu/mpc8260/interrupts.c
@@ -246,7 +246,7 @@
/****************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
/* ripped this out of ppc4xx/interrupts.c */
@@ -276,4 +276,4 @@
enable_interrupts ();
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/mpc8260/kgdb.S b/cpu/mpc8260/kgdb.S
index 2a25024..dae87bb 100644
--- a/cpu/mpc8260/kgdb.S
+++ b/cpu/mpc8260/kgdb.S
@@ -34,7 +34,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
/*
* cache flushing routines for kgdb
@@ -69,4 +69,4 @@
SYNC
blr
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S
index 2e93bbb..7f5dc81 100644
--- a/cpu/mpc8260/start.S
+++ b/cpu/mpc8260/start.S
@@ -279,7 +279,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -298,7 +298,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
@@ -676,13 +676,13 @@
bdnz 1b
/* Load the Instruction Address Breakpoint Register (IABR). */
- /* */
+ /* */
/* The address to load is stored in the first word of dual port */
/* ram and should be preserved while the power is on, so you */
/* can plug addresses into that location then reset the cpu and */
/* this code will load that address into the IABR after the */
/* reset. */
- /* */
+ /* */
/* When the program counter matches the contents of the IABR, */
/* an exception is generated (before the instruction at that */
/* location completes). The vector for this exception is 0x1300 */
diff --git a/cpu/mpc8260/traps.c b/cpu/mpc8260/traps.c
index 0c39e43..b5d416c 100644
--- a/cpu/mpc8260/traps.c
+++ b/cpu/mpc8260/traps.c
@@ -37,7 +37,7 @@
#include <asm/processor.h>
#include <asm/m8260_pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -150,7 +150,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -186,7 +186,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -198,7 +198,7 @@
void
ProgramCheckException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -210,7 +210,7 @@
void
SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -223,7 +223,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -232,7 +232,7 @@
_exception(0, regs);
}
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -242,7 +242,7 @@
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/mpc8260/u-boot.lds b/cpu/mpc8260/u-boot.lds
new file mode 100644
index 0000000..b8abc17
--- /dev/null
+++ b/cpu/mpc8260/u-boot.lds
@@ -0,0 +1,124 @@
+/*
+ * (C) Copyright 2001-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc8260/start.o (.text)
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/cpu/mpc83xx/Makefile b/cpu/mpc83xx/Makefile
index 4b9dcc8..2329970 100644
--- a/cpu/mpc83xx/Makefile
+++ b/cpu/mpc83xx/Makefile
@@ -29,7 +29,7 @@
START = start.o
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \
- spd_sdram.o qe_io.o
+ spd_sdram.o ecc.o qe_io.o pci.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mpc83xx/config.mk b/cpu/mpc83xx/config.mk
index 8b4ff92..2ec395d 100644
--- a/cpu/mpc83xx/config.mk
+++ b/cpu/mpc83xx/config.mk
@@ -20,7 +20,10 @@
# MA 02111-1307 USA
#
-PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi
+PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -mrelocatable
PLATFORM_CPPFLAGS += -DCONFIG_MPC83XX -DCONFIG_E300 \
-ffixed-r2 -ffixed-r29 -msoft-float
+
+# Use default linker script. Board port can override in board/*/config.mk
+LDSCRIPT := $(SRCTREE)/cpu/mpc83xx/u-boot.lds
diff --git a/cpu/mpc83xx/cpu.c b/cpu/mpc83xx/cpu.c
index e934ba6..e634f0a 100644
--- a/cpu/mpc83xx/cpu.c
+++ b/cpu/mpc83xx/cpu.c
@@ -33,15 +33,12 @@
#include <asm/processor.h>
#if defined(CONFIG_OF_FLAT_TREE)
#include <ft_build.h>
-#endif
-#if defined(CONFIG_OF_LIBFDT)
+#elif defined(CONFIG_OF_LIBFDT)
#include <libfdt.h>
-#include <libfdt_env.h>
#endif
DECLARE_GLOBAL_DATA_PTR;
-
int checkcpu(void)
{
volatile immap_t *immr;
@@ -52,13 +49,26 @@
immr = (immap_t *)CFG_IMMR;
- if ((pvr & 0xFFFF0000) != PVR_83xx) {
- puts("Not MPC83xx Family!!!\n");
- return -1;
+ puts("CPU: ");
+
+ switch (pvr & 0xffff0000) {
+ case PVR_E300C1:
+ printf("e300c1, ");
+ break;
+
+ case PVR_E300C2:
+ printf("e300c2, ");
+ break;
+
+ case PVR_E300C3:
+ printf("e300c3, ");
+ break;
+
+ default:
+ printf("Unknown core, ");
}
spridr = immr->sysconf.spridr;
- puts("CPU: ");
switch(spridr) {
case SPR_8349E_REV10:
case SPR_8349E_REV11:
@@ -100,12 +110,14 @@
case SPR_8360E_REV11:
case SPR_8360E_REV12:
case SPR_8360E_REV20:
+ case SPR_8360E_REV21:
puts("MPC8360E, ");
break;
case SPR_8360_REV10:
case SPR_8360_REV11:
case SPR_8360_REV12:
case SPR_8360_REV20:
+ case SPR_8360_REV21:
puts("MPC8360, ");
break;
case SPR_8323E_REV10:
@@ -124,8 +136,21 @@
case SPR_8321_REV11:
puts("MPC8321, ");
break;
+ case SPR_8311_REV10:
+ puts("MPC8311, ");
+ break;
+ case SPR_8311E_REV10:
+ puts("MPC8311E, ");
+ break;
+ case SPR_8313_REV10:
+ puts("MPC8313, ");
+ break;
+ case SPR_8313E_REV10:
+ puts("MPC8313E, ");
+ break;
default:
- puts("Rev: Unknown revision number.\nWarning: Unsupported cpu revision!\n");
+ printf("Rev: Unknown revision number:%08x\n"
+ "Warning: Unsupported cpu revision!\n",spridr);
return 0;
}
@@ -133,10 +158,12 @@
/* Multiple revisons of 834x processors may have the same SPRIDR value.
* So use PVR to identify the revision number.
*/
- printf("Rev: %02x at %s MHz\n", PVR_MAJ(pvr)<<4 | PVR_MIN(pvr), strmhz(buf, clock));
+ printf("Rev: %02x at %s MHz", PVR_MAJ(pvr)<<4 | PVR_MIN(pvr), strmhz(buf, clock));
#else
- printf("Rev: %02x at %s MHz\n", spridr & 0x0000FFFF, strmhz(buf, clock));
+ printf("Rev: %02x at %s MHz", spridr & 0x0000FFFF, strmhz(buf, clock));
#endif
+ printf(", CSB: %4d MHz\n", gd->csb_clk / 1000000);
+
return 0;
}
@@ -302,178 +329,237 @@
/*
* "Setter" functions used to add/modify FDT entries.
*/
-static int fdt_set_eth0(void *fdt, int nodeoffset, const char *name, bd_t *bd)
+static int fdt_set_eth0(void *blob, int nodeoffset, const char *name, bd_t *bd)
{
- /*
- * Fix it up if it exists, don't create it if it doesn't exist.
- */
- if (fdt_get_property(fdt, nodeoffset, name, 0)) {
- return fdt_setprop(fdt, nodeoffset, name, bd->bi_enetaddr, 6);
+ /* Fix it up if it exists, don't create it if it doesn't exist */
+ if (fdt_get_property(blob, nodeoffset, name, 0)) {
+ return fdt_setprop(blob, nodeoffset, name, bd->bi_enetaddr, 6);
}
- return -FDT_ERR_NOTFOUND;
+ return 0;
}
#ifdef CONFIG_HAS_ETH1
/* second onboard ethernet port */
-static int fdt_set_eth1(void *fdt, int nodeoffset, const char *name, bd_t *bd)
+static int fdt_set_eth1(void *blob, int nodeoffset, const char *name, bd_t *bd)
{
- /*
- * Fix it up if it exists, don't create it if it doesn't exist.
- */
- if (fdt_get_property(fdt, nodeoffset, name, 0)) {
- return fdt_setprop(fdt, nodeoffset, name, bd->bi_enet1addr, 6);
+ /* Fix it up if it exists, don't create it if it doesn't exist */
+ if (fdt_get_property(blob, nodeoffset, name, 0)) {
+ return fdt_setprop(blob, nodeoffset, name, bd->bi_enet1addr, 6);
}
- return -FDT_ERR_NOTFOUND;
+ return 0;
}
#endif
#ifdef CONFIG_HAS_ETH2
/* third onboard ethernet port */
-static int fdt_set_eth2(void *fdt, int nodeoffset, const char *name, bd_t *bd)
+static int fdt_set_eth2(void *blob, int nodeoffset, const char *name, bd_t *bd)
{
- /*
- * Fix it up if it exists, don't create it if it doesn't exist.
- */
- if (fdt_get_property(fdt, nodeoffset, name, 0)) {
- return fdt_setprop(fdt, nodeoffset, name, bd->bi_enet2addr, 6);
+ /* Fix it up if it exists, don't create it if it doesn't exist */
+ if (fdt_get_property(blob, nodeoffset, name, 0)) {
+ return fdt_setprop(blob, nodeoffset, name, bd->bi_enet2addr, 6);
}
- return -FDT_ERR_NOTFOUND;
+ return 0;
}
#endif
#ifdef CONFIG_HAS_ETH3
/* fourth onboard ethernet port */
-static int fdt_set_eth3(void *fdt, int nodeoffset, const char *name, bd_t *bd)
+static int fdt_set_eth3(void *blob, int nodeoffset, const char *name, bd_t *bd)
{
- /*
- * Fix it up if it exists, don't create it if it doesn't exist.
- */
- if (fdt_get_property(fdt, nodeoffset, name, 0)) {
- return fdt_setprop(fdt, nodeoffset, name, bd->bi_enet3addr, 6);
+ /* Fix it up if it exists, don't create it if it doesn't exist */
+ if (fdt_get_property(blob, nodeoffset, name, 0)) {
+ return fdt_setprop(blob, nodeoffset, name, bd->bi_enet3addr, 6);
}
- return -FDT_ERR_NOTFOUND;
+ return 0;
}
#endif
-static int fdt_set_busfreq(void *fdt, int nodeoffset, const char *name, bd_t *bd)
+static int fdt_set_busfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
{
u32 tmp;
- /*
- * Create or update the property.
- */
+ /* Create or update the property */
tmp = cpu_to_be32(bd->bi_busfreq);
- return fdt_setprop(fdt, nodeoffset, name, &tmp, sizeof(tmp));
+ return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
}
+static int fdt_set_tbfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+ u32 tmp;
+ /* Create or update the property */
+ tmp = cpu_to_be32(OF_TBCLK);
+ return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+
+static int fdt_set_clockfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+ u32 tmp;
+ /* Create or update the property */
+ tmp = cpu_to_be32(gd->core_clk);
+ return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+#ifdef CONFIG_QE
+static int fdt_set_qe_busfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+ u32 tmp;
+ /* Create or update the property */
+ tmp = cpu_to_be32(gd->qe_clk);
+ return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+
+static int fdt_set_qe_brgfreq(void *blob, int nodeoffset, const char *name, bd_t *bd)
+{
+ u32 tmp;
+ /* Create or update the property */
+ tmp = cpu_to_be32(gd->brg_clk);
+ return fdt_setprop(blob, nodeoffset, name, &tmp, sizeof(tmp));
+}
+#endif
+
/*
- * Fixups to the fdt. If "create" is TRUE, the node is created
- * unconditionally. If "create" is FALSE, the node is updated
- * only if it already exists.
+ * Fixups to the fdt.
*/
static const struct {
char *node;
char *prop;
- int (*set_fn)(void *fdt, int nodeoffset, const char *name, bd_t *bd);
+ int (*set_fn)(void *blob, int nodeoffset, const char *name, bd_t *bd);
} fixup_props[] = {
{ "/cpus/" OF_CPU,
- "bus-frequency",
- fdt_set_busfreq
+ "timebase-frequency",
+ fdt_set_tbfreq
},
- { "/cpus/" OF_SOC,
+ { "/cpus/" OF_CPU,
"bus-frequency",
fdt_set_busfreq
},
- { "/" OF_SOC "/serial@4500/",
+ { "/cpus/" OF_CPU,
+ "clock-frequency",
+ fdt_set_clockfreq
+ },
+ { "/" OF_SOC,
+ "bus-frequency",
+ fdt_set_busfreq
+ },
+ { "/" OF_SOC "/serial@4500",
"clock-frequency",
fdt_set_busfreq
},
- { "/" OF_SOC "/serial@4600/",
+ { "/" OF_SOC "/serial@4600",
"clock-frequency",
fdt_set_busfreq
},
-#ifdef CONFIG_MPC83XX_TSEC1
- { "/" OF_SOC "/ethernet@24000,
+#ifdef CONFIG_TSEC1
+ { "/" OF_SOC "/ethernet@24000",
"mac-address",
fdt_set_eth0
},
- { "/" OF_SOC "/ethernet@24000,
+ { "/" OF_SOC "/ethernet@24000",
"local-mac-address",
fdt_set_eth0
},
#endif
-#ifdef CONFIG_MPC83XX_TSEC2
- { "/" OF_SOC "/ethernet@25000,
+#ifdef CONFIG_TSEC2
+ { "/" OF_SOC "/ethernet@25000",
"mac-address",
fdt_set_eth1
},
- { "/" OF_SOC "/ethernet@25000,
+ { "/" OF_SOC "/ethernet@25000",
"local-mac-address",
fdt_set_eth1
},
#endif
+#ifdef CONFIG_QE
+ { "/" OF_QE,
+ "brg-frequency",
+ fdt_set_qe_brgfreq
+ },
+ { "/" OF_QE,
+ "bus-frequency",
+ fdt_set_qe_busfreq
+ },
#ifdef CONFIG_UEC_ETH1
#if CFG_UEC1_UCC_NUM == 0 /* UCC1 */
- { "/" OF_QE "/ucc@2000/mac-address",
+ { "/" OF_QE "/ucc@2000",
"mac-address",
fdt_set_eth0
},
- { "/" OF_QE "/ucc@2000/mac-address",
+ { "/" OF_QE "/ucc@2000",
"local-mac-address",
fdt_set_eth0
},
#elif CFG_UEC1_UCC_NUM == 2 /* UCC3 */
- { "/" OF_QE "/ucc@2200/mac-address",
+ { "/" OF_QE "/ucc@2200",
"mac-address",
fdt_set_eth0
},
- { "/" OF_QE "/ucc@2200/mac-address",
+ { "/" OF_QE "/ucc@2200",
"local-mac-address",
fdt_set_eth0
},
#endif
-#endif
+#endif /* CONFIG_UEC_ETH1 */
#ifdef CONFIG_UEC_ETH2
#if CFG_UEC2_UCC_NUM == 1 /* UCC2 */
- { "/" OF_QE "/ucc@3000/mac-address",
+ { "/" OF_QE "/ucc@3000",
"mac-address",
fdt_set_eth1
},
- { "/" OF_QE "/ucc@3000/mac-address",
+ { "/" OF_QE "/ucc@3000",
"local-mac-address",
fdt_set_eth1
},
-#elif CFG_UEC1_UCC_NUM == 3 /* UCC4 */
- { "/" OF_QE "/ucc@3200/mac-address",
+#elif CFG_UEC2_UCC_NUM == 3 /* UCC4 */
+ { "/" OF_QE "/ucc@3200",
"mac-address",
fdt_set_eth1
},
- { "/" OF_QE "/ucc@3200/mac-address",
+ { "/" OF_QE "/ucc@3200",
"local-mac-address",
fdt_set_eth1
},
#endif
-#endif
+#endif /* CONFIG_UEC_ETH2 */
+#endif /* CONFIG_QE */
};
void
ft_cpu_setup(void *blob, bd_t *bd)
{
- int nodeoffset;
- int err;
- int j;
+ int nodeoffset;
+ int err;
+ int j;
+ int tmp[2];
for (j = 0; j < (sizeof(fixup_props) / sizeof(fixup_props[0])); j++) {
- nodeoffset = fdt_path_offset(fdt, fixup_props[j].node);
+ nodeoffset = fdt_find_node_by_path(blob, fixup_props[j].node);
if (nodeoffset >= 0) {
- err = (*fixup_props[j].set_fn)(blob, nodeoffset, fixup_props[j].prop, bd);
+ err = fixup_props[j].set_fn(blob, nodeoffset,
+ fixup_props[j].prop, bd);
if (err < 0)
- printf("set_fn/libfdt: %s %s returned %s\n",
- fixup_props[j].node,
- fixup_props[j].prop,
- fdt_strerror(err));
+ debug("Problem setting %s = %s: %s\n",
+ fixup_props[j].node, fixup_props[j].prop,
+ fdt_strerror(err));
+ } else {
+ debug("Couldn't find %s: %s\n",
+ fixup_props[j].node, fdt_strerror(nodeoffset));
}
}
-}
-#endif
-#if defined(CONFIG_OF_FLAT_TREE)
+ /* update, or add and update /memory node */
+ nodeoffset = fdt_find_node_by_path(blob, "/memory");
+ if (nodeoffset < 0) {
+ nodeoffset = fdt_add_subnode(blob, 0, "memory");
+ if (nodeoffset < 0)
+ debug("failed to add /memory node: %s\n",
+ fdt_strerror(nodeoffset));
+ }
+ if (nodeoffset >= 0) {
+ fdt_setprop(blob, nodeoffset, "device_type",
+ "memory", sizeof("memory"));
+ tmp[0] = cpu_to_be32(bd->bi_memstart);
+ tmp[1] = cpu_to_be32(bd->bi_memsize);
+ fdt_setprop(blob, nodeoffset, "reg", tmp, sizeof(tmp));
+ }
+}
+#elif defined(CONFIG_OF_FLAT_TREE)
void
ft_cpu_setup(void *blob, bd_t *bd)
{
@@ -498,7 +584,7 @@
if (p != NULL)
*p = cpu_to_be32(clock);
-#ifdef CONFIG_MPC83XX_TSEC1
+#ifdef CONFIG_TSEC1
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
if (p != NULL)
memcpy(p, bd->bi_enetaddr, 6);
@@ -508,7 +594,7 @@
memcpy(p, bd->bi_enetaddr, 6);
#endif
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len);
if (p != NULL)
memcpy(p, bd->bi_enet1addr, 6);
diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 3ac9161..7224979 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -83,20 +83,30 @@
im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC2EP) | (CFG_SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT);
#endif
-#ifdef CONFIG_MPC834X
#ifdef CFG_SCCR_TSEC1CM
/* TSEC1 clock mode */
im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1CM) | (CFG_SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT);
#endif
+
#ifdef CFG_SCCR_TSEC2CM
/* TSEC2 & I2C1 clock mode */
im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2CM) | (CFG_SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT);
#endif
+
+#ifdef CFG_SCCR_TSEC1ON
+ /* TSEC1 clock switch */
+ im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1ON) | (CFG_SCCR_TSEC1ON << SCCR_TSEC1ON_SHIFT);
+#endif
+
+#ifdef CFG_SCCR_TSEC2ON
+ /* TSEC2 clock switch */
+ im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2ON) | (CFG_SCCR_TSEC2ON << SCCR_TSEC2ON_SHIFT);
+#endif
+
#ifdef CFG_SCCR_USBMPHCM
/* USB MPH clock mode */
im->clk.sccr = (im->clk.sccr & ~SCCR_USBMPHCM) | (CFG_SCCR_USBMPHCM << SCCR_USBMPHCM_SHIFT);
#endif
-#endif /* CONFIG_MPC834X */
#ifdef CFG_SCCR_PCICM
/* PCI & DMA clock mode */
@@ -247,3 +257,39 @@
#endif
return 0;
}
+
+/*
+ * Figure out the cause of the reset
+ */
+int prt_83xx_rsr(void)
+{
+ static struct {
+ ulong mask;
+ char *desc;
+ } bits[] = {
+ {
+ RSR_SWSR, "Software Soft"}, {
+ RSR_SWHR, "Software Hard"}, {
+ RSR_JSRS, "JTAG Soft"}, {
+ RSR_CSHR, "Check Stop"}, {
+ RSR_SWRS, "Software Watchdog"}, {
+ RSR_BMRS, "Bus Monitor"}, {
+ RSR_SRS, "External/Internal Soft"}, {
+ RSR_HRS, "External/Internal Hard"}
+ };
+ static int n = sizeof bits / sizeof bits[0];
+ ulong rsr = gd->reset_status;
+ int i;
+ char *sep;
+
+ puts("Reset Status:");
+
+ sep = " ";
+ for (i = 0; i < n; i++)
+ if (rsr & bits[i].mask) {
+ printf("%s%s", sep, bits[i].desc);
+ sep = ", ";
+ }
+ puts("\n\n");
+ return 0;
+}
diff --git a/cpu/mpc83xx/ecc.c b/cpu/mpc83xx/ecc.c
new file mode 100644
index 0000000..6f13094
--- /dev/null
+++ b/cpu/mpc83xx/ecc.c
@@ -0,0 +1,390 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc.
+ *
+ * Dave Liu <daveliu@freescale.com>
+ * based on the contribution of Marian Balakowicz <m8@semihalf.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ */
+
+#include <common.h>
+#include <mpc83xx.h>
+#include <command.h>
+
+#if defined(CONFIG_DDR_ECC) && defined(CONFIG_DDR_ECC_CMD)
+void ecc_print_status(void)
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ddr83xx_t *ddr = &immap->ddr;
+
+ printf("\nECC mode: %s\n\n",
+ (ddr->sdram_cfg & SDRAM_CFG_ECC_EN) ? "ON" : "OFF");
+
+ /* Interrupts */
+ printf("Memory Error Interrupt Enable:\n");
+ printf(" Multiple-Bit Error Interrupt Enable: %d\n",
+ (ddr->err_int_en & ECC_ERR_INT_EN_MBEE) ? 1 : 0);
+ printf(" Single-Bit Error Interrupt Enable: %d\n",
+ (ddr->err_int_en & ECC_ERR_INT_EN_SBEE) ? 1 : 0);
+ printf(" Memory Select Error Interrupt Enable: %d\n\n",
+ (ddr->err_int_en & ECC_ERR_INT_EN_MSEE) ? 1 : 0);
+
+ /* Error disable */
+ printf("Memory Error Disable:\n");
+ printf(" Multiple-Bit Error Disable: %d\n",
+ (ddr->err_disable & ECC_ERROR_DISABLE_MBED) ? 1 : 0);
+ printf(" Sinle-Bit Error Disable: %d\n",
+ (ddr->err_disable & ECC_ERROR_DISABLE_SBED) ? 1 : 0);
+ printf(" Memory Select Error Disable: %d\n\n",
+ (ddr->err_disable & ECC_ERROR_DISABLE_MSED) ? 1 : 0);
+
+ /* Error injection */
+ printf("Memory Data Path Error Injection Mask High/Low: %08lx %08lx\n",
+ ddr->data_err_inject_hi, ddr->data_err_inject_lo);
+
+ printf("Memory Data Path Error Injection Mask ECC:\n");
+ printf(" ECC Mirror Byte: %d\n",
+ (ddr->ecc_err_inject & ECC_ERR_INJECT_EMB) ? 1 : 0);
+ printf(" ECC Injection Enable: %d\n",
+ (ddr->ecc_err_inject & ECC_ERR_INJECT_EIEN) ? 1 : 0);
+ printf(" ECC Error Injection Mask: 0x%02x\n\n",
+ ddr->ecc_err_inject & ECC_ERR_INJECT_EEIM);
+
+ /* SBE counter/threshold */
+ printf("Memory Single-Bit Error Management (0..255):\n");
+ printf(" Single-Bit Error Threshold: %d\n",
+ (ddr->err_sbe & ECC_ERROR_MAN_SBET) >> ECC_ERROR_MAN_SBET_SHIFT);
+ printf(" Single-Bit Error Counter: %d\n\n",
+ (ddr->err_sbe & ECC_ERROR_MAN_SBEC) >> ECC_ERROR_MAN_SBEC_SHIFT);
+
+ /* Error detect */
+ printf("Memory Error Detect:\n");
+ printf(" Multiple Memory Errors: %d\n",
+ (ddr->err_detect & ECC_ERROR_DETECT_MME) ? 1 : 0);
+ printf(" Multiple-Bit Error: %d\n",
+ (ddr->err_detect & ECC_ERROR_DETECT_MBE) ? 1 : 0);
+ printf(" Single-Bit Error: %d\n",
+ (ddr->err_detect & ECC_ERROR_DETECT_SBE) ? 1 : 0);
+ printf(" Memory Select Error: %d\n\n",
+ (ddr->err_detect & ECC_ERROR_DETECT_MSE) ? 1 : 0);
+
+ /* Capture data */
+ printf("Memory Error Address Capture: 0x%08lx\n", ddr->capture_address);
+ printf("Memory Data Path Read Capture High/Low: %08lx %08lx\n",
+ ddr->capture_data_hi, ddr->capture_data_lo);
+ printf("Memory Data Path Read Capture ECC: 0x%02x\n\n",
+ ddr->capture_ecc & CAPTURE_ECC_ECE);
+
+ printf("Memory Error Attributes Capture:\n");
+ printf(" Data Beat Number: %d\n",
+ (ddr->capture_attributes & ECC_CAPT_ATTR_BNUM) >>
+ ECC_CAPT_ATTR_BNUM_SHIFT);
+ printf(" Transaction Size: %d\n",
+ (ddr->capture_attributes & ECC_CAPT_ATTR_TSIZ) >>
+ ECC_CAPT_ATTR_TSIZ_SHIFT);
+ printf(" Transaction Source: %d\n",
+ (ddr->capture_attributes & ECC_CAPT_ATTR_TSRC) >>
+ ECC_CAPT_ATTR_TSRC_SHIFT);
+ printf(" Transaction Type: %d\n",
+ (ddr->capture_attributes & ECC_CAPT_ATTR_TTYP) >>
+ ECC_CAPT_ATTR_TTYP_SHIFT);
+ printf(" Error Information Valid: %d\n\n",
+ ddr->capture_attributes & ECC_CAPT_ATTR_VLD);
+}
+
+int do_ecc(cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ddr83xx_t *ddr = &immap->ddr;
+ volatile u32 val;
+ u64 *addr;
+ u32 count;
+ register u64 *i;
+ u32 ret[2];
+ u32 pattern[2];
+ u32 writeback[2];
+
+ /* The pattern is written into memory to generate error */
+ pattern[0] = 0xfedcba98UL;
+ pattern[1] = 0x76543210UL;
+
+ /* After injecting error, re-initialize the memory with the value */
+ writeback[0] = 0x01234567UL;
+ writeback[1] = 0x89abcdefUL;
+
+ if (argc > 4) {
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+ }
+
+ if (argc == 2) {
+ if (strcmp(argv[1], "status") == 0) {
+ ecc_print_status();
+ return 0;
+ } else if (strcmp(argv[1], "captureclear") == 0) {
+ ddr->capture_address = 0;
+ ddr->capture_data_hi = 0;
+ ddr->capture_data_lo = 0;
+ ddr->capture_ecc = 0;
+ ddr->capture_attributes = 0;
+ return 0;
+ }
+ }
+ if (argc == 3) {
+ if (strcmp(argv[1], "sbecnt") == 0) {
+ val = simple_strtoul(argv[2], NULL, 10);
+ if (val > 255) {
+ printf("Incorrect Counter value, "
+ "should be 0..255\n");
+ return 1;
+ }
+
+ val = (val << ECC_ERROR_MAN_SBEC_SHIFT);
+ val |= (ddr->err_sbe & ECC_ERROR_MAN_SBET);
+
+ ddr->err_sbe = val;
+ return 0;
+ } else if (strcmp(argv[1], "sbethr") == 0) {
+ val = simple_strtoul(argv[2], NULL, 10);
+ if (val > 255) {
+ printf("Incorrect Counter value, "
+ "should be 0..255\n");
+ return 1;
+ }
+
+ val = (val << ECC_ERROR_MAN_SBET_SHIFT);
+ val |= (ddr->err_sbe & ECC_ERROR_MAN_SBEC);
+
+ ddr->err_sbe = val;
+ return 0;
+ } else if (strcmp(argv[1], "errdisable") == 0) {
+ val = ddr->err_disable;
+
+ if (strcmp(argv[2], "+sbe") == 0) {
+ val |= ECC_ERROR_DISABLE_SBED;
+ } else if (strcmp(argv[2], "+mbe") == 0) {
+ val |= ECC_ERROR_DISABLE_MBED;
+ } else if (strcmp(argv[2], "+mse") == 0) {
+ val |= ECC_ERROR_DISABLE_MSED;
+ } else if (strcmp(argv[2], "+all") == 0) {
+ val |= (ECC_ERROR_DISABLE_SBED |
+ ECC_ERROR_DISABLE_MBED |
+ ECC_ERROR_DISABLE_MSED);
+ } else if (strcmp(argv[2], "-sbe") == 0) {
+ val &= ~ECC_ERROR_DISABLE_SBED;
+ } else if (strcmp(argv[2], "-mbe") == 0) {
+ val &= ~ECC_ERROR_DISABLE_MBED;
+ } else if (strcmp(argv[2], "-mse") == 0) {
+ val &= ~ECC_ERROR_DISABLE_MSED;
+ } else if (strcmp(argv[2], "-all") == 0) {
+ val &= ~(ECC_ERROR_DISABLE_SBED |
+ ECC_ERROR_DISABLE_MBED |
+ ECC_ERROR_DISABLE_MSED);
+ } else {
+ printf("Incorrect err_disable field\n");
+ return 1;
+ }
+
+ ddr->err_disable = val;
+ __asm__ __volatile__("sync");
+ __asm__ __volatile__("isync");
+ return 0;
+ } else if (strcmp(argv[1], "errdetectclr") == 0) {
+ val = ddr->err_detect;
+
+ if (strcmp(argv[2], "mme") == 0) {
+ val |= ECC_ERROR_DETECT_MME;
+ } else if (strcmp(argv[2], "sbe") == 0) {
+ val |= ECC_ERROR_DETECT_SBE;
+ } else if (strcmp(argv[2], "mbe") == 0) {
+ val |= ECC_ERROR_DETECT_MBE;
+ } else if (strcmp(argv[2], "mse") == 0) {
+ val |= ECC_ERROR_DETECT_MSE;
+ } else if (strcmp(argv[2], "all") == 0) {
+ val |= (ECC_ERROR_DETECT_MME |
+ ECC_ERROR_DETECT_MBE |
+ ECC_ERROR_DETECT_SBE |
+ ECC_ERROR_DETECT_MSE);
+ } else {
+ printf("Incorrect err_detect field\n");
+ return 1;
+ }
+
+ ddr->err_detect = val;
+ return 0;
+ } else if (strcmp(argv[1], "injectdatahi") == 0) {
+ val = simple_strtoul(argv[2], NULL, 16);
+
+ ddr->data_err_inject_hi = val;
+ return 0;
+ } else if (strcmp(argv[1], "injectdatalo") == 0) {
+ val = simple_strtoul(argv[2], NULL, 16);
+
+ ddr->data_err_inject_lo = val;
+ return 0;
+ } else if (strcmp(argv[1], "injectecc") == 0) {
+ val = simple_strtoul(argv[2], NULL, 16);
+ if (val > 0xff) {
+ printf("Incorrect ECC inject mask, "
+ "should be 0x00..0xff\n");
+ return 1;
+ }
+ val |= (ddr->ecc_err_inject & ~ECC_ERR_INJECT_EEIM);
+
+ ddr->ecc_err_inject = val;
+ return 0;
+ } else if (strcmp(argv[1], "inject") == 0) {
+ val = ddr->ecc_err_inject;
+
+ if (strcmp(argv[2], "en") == 0)
+ val |= ECC_ERR_INJECT_EIEN;
+ else if (strcmp(argv[2], "dis") == 0)
+ val &= ~ECC_ERR_INJECT_EIEN;
+ else
+ printf("Incorrect command\n");
+
+ ddr->ecc_err_inject = val;
+ __asm__ __volatile__("sync");
+ __asm__ __volatile__("isync");
+ return 0;
+ } else if (strcmp(argv[1], "mirror") == 0) {
+ val = ddr->ecc_err_inject;
+
+ if (strcmp(argv[2], "en") == 0)
+ val |= ECC_ERR_INJECT_EMB;
+ else if (strcmp(argv[2], "dis") == 0)
+ val &= ~ECC_ERR_INJECT_EMB;
+ else
+ printf("Incorrect command\n");
+
+ ddr->ecc_err_inject = val;
+ return 0;
+ }
+ }
+ if (argc == 4) {
+ if (strcmp(argv[1], "testdw") == 0) {
+ addr = (u64 *) simple_strtoul(argv[2], NULL, 16);
+ count = simple_strtoul(argv[3], NULL, 16);
+
+ if ((u32) addr % 8) {
+ printf("Address not alligned on "
+ "double word boundary\n");
+ return 1;
+ }
+ disable_interrupts();
+
+ for (i = addr; i < addr + count; i++) {
+
+ /* enable injects */
+ ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
+ __asm__ __volatile__("sync");
+ __asm__ __volatile__("isync");
+
+ /* write memory location injecting errors */
+ ppcDWstore((u32 *) i, pattern);
+ __asm__ __volatile__("sync");
+
+ /* disable injects */
+ ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
+ __asm__ __volatile__("sync");
+ __asm__ __volatile__("isync");
+
+ /* read data, this generates ECC error */
+ ppcDWload((u32 *) i, ret);
+ __asm__ __volatile__("sync");
+
+ /* re-initialize memory, double word write the location again,
+ * generates new ECC code this time */
+ ppcDWstore((u32 *) i, writeback);
+ __asm__ __volatile__("sync");
+ }
+ enable_interrupts();
+ return 0;
+ }
+ if (strcmp(argv[1], "testword") == 0) {
+ addr = (u64 *) simple_strtoul(argv[2], NULL, 16);
+ count = simple_strtoul(argv[3], NULL, 16);
+
+ if ((u32) addr % 8) {
+ printf("Address not alligned on "
+ "double word boundary\n");
+ return 1;
+ }
+ disable_interrupts();
+
+ for (i = addr; i < addr + count; i++) {
+
+ /* enable injects */
+ ddr->ecc_err_inject |= ECC_ERR_INJECT_EIEN;
+ __asm__ __volatile__("sync");
+ __asm__ __volatile__("isync");
+
+ /* write memory location injecting errors */
+ *(u32 *) i = 0xfedcba98UL;
+ __asm__ __volatile__("sync");
+
+ /* sub double word write,
+ * bus will read-modify-write,
+ * generates ECC error */
+ *((u32 *) i + 1) = 0x76543210UL;
+ __asm__ __volatile__("sync");
+
+ /* disable injects */
+ ddr->ecc_err_inject &= ~ECC_ERR_INJECT_EIEN;
+ __asm__ __volatile__("sync");
+ __asm__ __volatile__("isync");
+
+ /* re-initialize memory,
+ * double word write the location again,
+ * generates new ECC code this time */
+ ppcDWstore((u32 *) i, writeback);
+ __asm__ __volatile__("sync");
+ }
+ enable_interrupts();
+ return 0;
+ }
+ }
+ printf("Usage:\n%s\n", cmdtp->usage);
+ return 1;
+}
+
+U_BOOT_CMD(ecc, 4, 0, do_ecc,
+ "ecc - support for DDR ECC features\n",
+ "status - print out status info\n"
+ "ecc captureclear - clear capture regs data\n"
+ "ecc sbecnt <val> - set Single-Bit Error counter\n"
+ "ecc sbethr <val> - set Single-Bit Threshold\n"
+ "ecc errdisable <flag> - clear/set disable Memory Error Disable, flag:\n"
+ " [-|+]sbe - Single-Bit Error\n"
+ " [-|+]mbe - Multiple-Bit Error\n"
+ " [-|+]mse - Memory Select Error\n"
+ " [-|+]all - all errors\n"
+ "ecc errdetectclr <flag> - clear Memory Error Detect, flag:\n"
+ " mme - Multiple Memory Errors\n"
+ " sbe - Single-Bit Error\n"
+ " mbe - Multiple-Bit Error\n"
+ " mse - Memory Select Error\n"
+ " all - all errors\n"
+ "ecc injectdatahi <hi> - set Memory Data Path Error Injection Mask High\n"
+ "ecc injectdatalo <lo> - set Memory Data Path Error Injection Mask Low\n"
+ "ecc injectecc <ecc> - set ECC Error Injection Mask\n"
+ "ecc inject <en|dis> - enable/disable error injection\n"
+ "ecc mirror <en|dis> - enable/disable mirror byte\n"
+ "ecc testdw <addr> <cnt> - test mem region with double word access:\n"
+ " - enables injects\n"
+ " - writes pattern injecting errors with double word access\n"
+ " - disables injects\n"
+ " - reads pattern back with double word access, generates error\n"
+ " - re-inits memory\n"
+ "ecc testword <addr> <cnt> - test mem region with word access:\n"
+ " - enables injects\n"
+ " - writes pattern injecting errors with word access\n"
+ " - writes pattern with word access, generates error\n"
+ " - disables injects\n" " - re-inits memory");
+#endif
diff --git a/cpu/mpc83xx/interrupts.c b/cpu/mpc83xx/interrupts.c
index bb1fe1a..98ed21c 100644
--- a/cpu/mpc83xx/interrupts.c
+++ b/cpu/mpc83xx/interrupts.c
@@ -81,7 +81,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
/* ripped this out of ppc4xx/interrupts.c */
@@ -94,4 +94,4 @@
{
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/mpc83xx/pci.c b/cpu/mpc83xx/pci.c
new file mode 100644
index 0000000..5675afe
--- /dev/null
+++ b/cpu/mpc83xx/pci.c
@@ -0,0 +1,235 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2007
+ *
+ * Author: Scott Wood <scottwood@freescale.com>,
+ * with some bits from older board-specific PCI initialization.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <pci.h>
+
+#if defined(CONFIG_OF_LIBFDT)
+#include <libfdt.h>
+#elif defined(CONFIG_OF_FLAT_TREE)
+#include <ft_build.h>
+#endif
+
+#include <asm/mpc8349_pci.h>
+
+#ifdef CONFIG_83XX_GENERIC_PCI
+#define MAX_BUSES 2
+
+DECLARE_GLOBAL_DATA_PTR;
+
+static struct pci_controller pci_hose[MAX_BUSES];
+static int pci_num_buses;
+
+static void pci_init_bus(int bus, struct pci_region *reg)
+{
+ volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+ volatile pot83xx_t *pot = immr->ios.pot;
+ volatile pcictrl83xx_t *pci_ctrl = &immr->pci_ctrl[bus];
+ struct pci_controller *hose = &pci_hose[bus];
+ u32 dev;
+ u16 reg16;
+ int i;
+
+ if (bus == 1)
+ pot += 3;
+
+ /* Setup outbound translation windows */
+ for (i = 0; i < 3; i++, reg++, pot++) {
+ if (reg->size == 0)
+ break;
+
+ hose->regions[i] = *reg;
+ hose->region_count++;
+
+ pot->potar = reg->bus_start >> 12;
+ pot->pobar = reg->phys_start >> 12;
+ pot->pocmr = ~(reg->size - 1) >> 12;
+
+ if (reg->flags & PCI_REGION_IO)
+ pot->pocmr |= POCMR_IO;
+#ifdef CONFIG_83XX_PCI_STREAMING
+ else if (reg->flags & PCI_REGION_PREFETCH)
+ pot->pocmr |= POCMR_SE;
+#endif
+
+ if (bus == 1)
+ pot->pocmr |= POCMR_DST;
+
+ pot->pocmr |= POCMR_EN;
+ }
+
+ /* Point inbound translation at RAM */
+ pci_ctrl->pitar1 = 0;
+ pci_ctrl->pibar1 = 0;
+ pci_ctrl->piebar1 = 0;
+ pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP |
+ PIWAR_WTT_SNOOP | (__ilog2(gd->ram_size) - 1);
+
+ i = hose->region_count++;
+ hose->regions[i].bus_start = 0;
+ hose->regions[i].phys_start = 0;
+ hose->regions[i].size = gd->ram_size;
+ hose->regions[i].flags = PCI_REGION_MEM | PCI_REGION_MEMORY;
+
+ hose->first_busno = 0;
+ hose->last_busno = 0xff;
+
+ pci_setup_indirect(hose, CFG_IMMR + 0x8300 + bus * 0x80,
+ CFG_IMMR + 0x8304 + bus * 0x80);
+
+ pci_register_hose(hose);
+
+ /*
+ * Write to Command register
+ */
+ reg16 = 0xff;
+ dev = PCI_BDF(hose->first_busno, 0, 0);
+ pci_hose_read_config_word(hose, dev, PCI_COMMAND, ®16);
+ reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
+ pci_hose_write_config_word(hose, dev, PCI_COMMAND, reg16);
+
+ /*
+ * Clear non-reserved bits in status register.
+ */
+ pci_hose_write_config_word(hose, dev, PCI_STATUS, 0xffff);
+ pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+
+#ifdef CONFIG_PCI_SCAN_SHOW
+ printf("PCI: Bus Dev VenId DevId Class Int\n");
+#endif
+ /*
+ * Hose scan.
+ */
+ hose->last_busno = pci_hose_scan(hose);
+}
+
+/*
+ * The caller must have already set OCCR, and the PCI_LAW BARs
+ * must have been set to cover all of the requested regions.
+ *
+ * If fewer than three regions are requested, then the region
+ * list is terminated with a region of size 0.
+ */
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot)
+{
+ volatile immap_t *immr = (volatile immap_t *)CFG_IMMR;
+ int i;
+
+ if (num_buses > MAX_BUSES) {
+ printf("%d PCI buses requsted, %d supported\n",
+ num_buses, MAX_BUSES);
+
+ num_buses = MAX_BUSES;
+ }
+
+ pci_num_buses = num_buses;
+
+ /*
+ * Release PCI RST Output signal.
+ * Power on to RST high must be at least 100 ms as per PCI spec.
+ * On warm boots only 1 ms is required.
+ */
+ udelay(warmboot ? 1000 : 100000);
+
+ for (i = 0; i < num_buses; i++)
+ immr->pci_ctrl[i].gcr = 1;
+
+ /*
+ * RST high to first config access must be at least 2^25 cycles
+ * as per PCI spec. This could be cut in half if we know we're
+ * running at 66MHz. This could be insufficiently long if we're
+ * running the PCI bus at significantly less than 33MHz.
+ */
+ udelay(1020000);
+
+ for (i = 0; i < num_buses; i++)
+ pci_init_bus(i, reg[i]);
+}
+
+#if defined(CONFIG_OF_LIBFDT)
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+ int nodeoffset;
+ int err;
+ int tmp[2];
+
+ if (pci_num_buses < 1)
+ return;
+
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8500");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+
+ if (pci_num_buses < 2)
+ return;
+
+ nodeoffset = fdt_find_node_by_path(blob, "/" OF_SOC "/pci@8600");
+ if (nodeoffset >= 0) {
+ tmp[0] = cpu_to_be32(pci_hose[0].first_busno);
+ tmp[1] = cpu_to_be32(pci_hose[0].last_busno);
+ err = fdt_setprop(blob, nodeoffset, "bus-range",
+ tmp, sizeof(tmp));
+
+ tmp[0] = cpu_to_be32(gd->pci_clk);
+ err = fdt_setprop(blob, nodeoffset, "clock-frequency",
+ tmp, sizeof(tmp[0]));
+ }
+}
+#elif CONFIG_OF_FLAT_TREE
+void ft_pci_setup(void *blob, bd_t *bd)
+{
+ u32 *p;
+ int len;
+
+ if (pci_num_buses < 1)
+ return;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8500/bus-range", &len);
+ if (p) {
+ p[0] = pci_hose[0].first_busno;
+ p[1] = pci_hose[0].last_busno;
+ }
+
+ if (pci_num_buses < 2)
+ return;
+
+ p = (u32 *)ft_get_prop(blob, "/" OF_SOC "/pci@8600/bus-range", &len);
+ if (p) {
+ p[0] = pci_hose[1].first_busno;
+ p[1] = pci_hose[1].last_busno;
+ }
+}
+#endif /* CONFIG_OF_FLAT_TREE */
+
+#endif /* CONFIG_83XX_GENERIC_PCI */
diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c
index d9b8753..ee2d038 100644
--- a/cpu/mpc83xx/spd_sdram.c
+++ b/cpu/mpc83xx/spd_sdram.c
@@ -34,6 +34,30 @@
#include <asm/mmu.h>
#include <spd_sdram.h>
+void board_add_ram_info(int use_default)
+{
+ volatile immap_t *immap = (immap_t *) CFG_IMMR;
+ volatile ddr83xx_t *ddr = &immap->ddr;
+
+ printf(" (DDR%d", ((ddr->sdram_cfg & SDRAM_CFG_SDRAM_TYPE_MASK)
+ >> SDRAM_CFG_SDRAM_TYPE_SHIFT) - 1);
+
+ if (ddr->sdram_cfg & SDRAM_CFG_32_BE)
+ puts(", 32-bit");
+ else
+ puts(", 64-bit");
+
+ if (ddr->sdram_cfg & SDRAM_CFG_ECC_EN)
+ puts(", ECC on)");
+ else
+ puts(", ECC off)");
+
+#if defined(CFG_LB_SDRAM) && defined(CFG_LBC_SDRAM_SIZE)
+ puts("\nSDRAM: ");
+ print_size (CFG_LBC_SDRAM_SIZE * 1024 * 1024, " (local bus)");
+#endif
+}
+
#ifdef CONFIG_SPD_EEPROM
DECLARE_GLOBAL_DATA_PTR;
@@ -58,8 +82,8 @@
int clks;
ddr_bus_clk = gd->ddr_clk >> 1;
- clks = picos / ((1000000000 / ddr_bus_clk) * 1000);
- if (picos % ((1000000000 / ddr_bus_clk) * 1000) != 0)
+ clks = picos / (1000000000 / (ddr_bus_clk / 1000));
+ if (picos % (1000000000 / (ddr_bus_clk / 1000)) != 0)
clks++;
return clks;
@@ -109,7 +133,7 @@
unsigned int n_ranks;
unsigned int odt_rd_cfg, odt_wr_cfg;
unsigned char twr_clk, twtr_clk;
- unsigned char sdram_type;
+ unsigned int sdram_type;
unsigned int memsize;
unsigned int law_size;
unsigned char caslat, caslat_ctrl;
@@ -137,7 +161,7 @@
#endif
/* Check the memory type */
if (spd.mem_type != SPD_MEMTYPE_DDR && spd.mem_type != SPD_MEMTYPE_DDR2) {
- printf("DDR: Module mem type is %02X\n", spd.mem_type);
+ debug("DDR: Module mem type is %02X\n", spd.mem_type);
return 0;
}
@@ -574,18 +598,21 @@
/* Check DIMM data bus width */
if (spd.dataw_lsb == 0x20) {
- burstlen = 0x03; /* 32 bit data bus, burst len is 8 */
- printf("\n DDR DIMM: data bus width is 32 bit");
+ if (spd.mem_type == SPD_MEMTYPE_DDR)
+ burstlen = 0x03; /* 32 bit data bus, burst len is 8 */
+ else
+ burstlen = 0x02; /* 32 bit data bus, burst len is 4 */
+ debug("\n DDR DIMM: data bus width is 32 bit");
} else {
burstlen = 0x02; /* Others act as 64 bit bus, burst len is 4 */
- printf("\n DDR DIMM: data bus width is 64 bit");
+ debug("\n DDR DIMM: data bus width is 64 bit");
}
/* Is this an ECC DDR chip? */
if (spd.config == 0x02)
- printf(" with ECC\n");
+ debug(" with ECC\n");
else
- printf(" without ECC\n");
+ debug(" without ECC\n");
/* Burst length is always 4 for 64 bit data bus, 8 for 32 bit data bus,
Burst type is sequential
@@ -624,7 +651,7 @@
| (1 << (16 + 10)) /* DQS Differential disable */
| (add_lat << (16 + 3)) /* Additive Latency in EMRS1 */
| (mode_odt_enable << 16) /* ODT Enable in EMRS1 */
- | ((twr_clk >> 1) << 9) /* Write Recovery Autopre */
+ | ((twr_clk - 1) << 9) /* Write Recovery Autopre */
| (caslat << 4) /* caslat */
| (burstlen << 0) /* Burst length */
);
@@ -693,11 +720,6 @@
#ifdef CFG_DDR_SDRAM_CLK_CNTL /* Optional platform specific value */
ddr->sdram_clk_cntl = CFG_DDR_SDRAM_CLK_CNTL;
-#else
- /* SS_EN = 0, source synchronous disable
- * CLK_ADJST = 0, MCK/MCK# is launched aligned with addr/cmd
- */
- ddr->sdram_clk_cntl = 0x00000000;
#endif
debug("DDR:sdram_clk_cntl=0x%08x\n", ddr->sdram_clk_cntl);
@@ -720,23 +742,27 @@
* sdram_cfg[13] = 0 (8_BE =0, 4-beat bursts)
*/
if (spd.mem_type == SPD_MEMTYPE_DDR)
- sdram_type = 2;
+ sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR1;
else
- sdram_type = 3;
+ sdram_type = SDRAM_CFG_SDRAM_TYPE_DDR2;
sdram_cfg = (0
- | (1 << 31) /* DDR enable */
- | (1 << 30) /* Self refresh */
- | (sdram_type << 24) /* SDRAM type */
+ | SDRAM_CFG_MEM_EN /* DDR enable */
+ | SDRAM_CFG_SREN /* Self refresh */
+ | sdram_type /* SDRAM type */
);
/* sdram_cfg[3] = RD_EN - registered DIMM enable */
if (spd.mod_attr & 0x02)
- sdram_cfg |= 0x10000000;
+ sdram_cfg |= SDRAM_CFG_RD_EN;
/* The DIMM is 32bit width */
- if (spd.dataw_lsb == 0x20)
- sdram_cfg |= 0x000C0000;
+ if (spd.dataw_lsb == 0x20) {
+ if (spd.mem_type == SPD_MEMTYPE_DDR)
+ sdram_cfg |= SDRAM_CFG_32_BE | SDRAM_CFG_8_BE;
+ if (spd.mem_type == SPD_MEMTYPE_DDR2)
+ sdram_cfg |= SDRAM_CFG_32_BE;
+ }
ddrc_ecc_enable = 0;
@@ -756,7 +782,7 @@
debug("DDR:err_disable=0x%08x\n", ddr->err_disable);
debug("DDR:err_sbe=0x%08x\n", ddr->err_sbe);
#endif
- printf(" DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF");
+ debug(" DDRC ECC mode: %s\n", ddrc_ecc_enable ? "ON":"OFF");
#if defined(CONFIG_DDR_2T_TIMING)
/*
diff --git a/cpu/mpc83xx/speed.c b/cpu/mpc83xx/speed.c
index c759930..cba57fa 100644
--- a/cpu/mpc83xx/speed.c
+++ b/cpu/mpc83xx/speed.c
@@ -25,6 +25,7 @@
#include <common.h>
#include <mpc83xx.h>
+#include <command.h>
#include <asm/processor.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -99,12 +100,14 @@
u32 lcrr;
u32 csb_clk;
-#if defined(CONFIG_MPC834X)
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X)
u32 tsec1_clk;
u32 tsec2_clk;
- u32 usbmph_clk;
u32 usbdr_clk;
#endif
+#ifdef CONFIG_MPC834X
+ u32 usbmph_clk;
+#endif
u32 core_clk;
u32 i2c1_clk;
#if !defined(CONFIG_MPC832X)
@@ -148,7 +151,7 @@
sccr = im->clk.sccr;
-#if defined(CONFIG_MPC834X)
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X)
switch ((sccr & SCCR_TSEC1CM) >> SCCR_TSEC1CM_SHIFT) {
case 0:
tsec1_clk = 0;
@@ -167,6 +170,26 @@
return -4;
}
+ switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) {
+ case 0:
+ usbdr_clk = 0;
+ break;
+ case 1:
+ usbdr_clk = csb_clk;
+ break;
+ case 2:
+ usbdr_clk = csb_clk / 2;
+ break;
+ case 3:
+ usbdr_clk = csb_clk / 3;
+ break;
+ default:
+ /* unkown SCCR_USBDRCM value */
+ return -8;
+ }
+#endif
+
+#if defined(CONFIG_MPC834X)
switch ((sccr & SCCR_TSEC2CM) >> SCCR_TSEC2CM_SHIFT) {
case 0:
tsec2_clk = 0;
@@ -205,24 +228,6 @@
return -7;
}
- switch ((sccr & SCCR_USBDRCM) >> SCCR_USBDRCM_SHIFT) {
- case 0:
- usbdr_clk = 0;
- break;
- case 1:
- usbdr_clk = csb_clk;
- break;
- case 2:
- usbdr_clk = csb_clk / 2;
- break;
- case 3:
- usbdr_clk = csb_clk / 3;
- break;
- default:
- /* unkown SCCR_USBDRCM value */
- return -8;
- }
-
if (usbmph_clk != 0 && usbdr_clk != 0 && usbmph_clk != usbdr_clk) {
/* if USB MPH clock is not disabled and
* USB DR clock is not disabled then
@@ -230,8 +235,16 @@
*/
return -9;
}
+#elif defined(CONFIG_MPC831X)
+ tsec2_clk = tsec1_clk;
+
+ if (!(sccr & SCCR_TSEC1ON))
+ tsec1_clk = 0;
+ if (!(sccr & SCCR_TSEC2ON))
+ tsec2_clk = 0;
#endif
-#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
+
+#if !defined(CONFIG_MPC834X)
i2c1_clk = csb_clk;
#endif
#if !defined(CONFIG_MPC832X)
@@ -314,12 +327,14 @@
#endif
gd->csb_clk = csb_clk;
-#if defined(CONFIG_MPC834X)
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X)
gd->tsec1_clk = tsec1_clk;
gd->tsec2_clk = tsec2_clk;
- gd->usbmph_clk = usbmph_clk;
gd->usbdr_clk = usbdr_clk;
#endif
+#if defined(CONFIG_MPC834X)
+ gd->usbmph_clk = usbmph_clk;
+#endif
gd->core_clk = core_clk;
gd->i2c1_clk = i2c1_clk;
#if !defined(CONFIG_MPC832X)
@@ -336,6 +351,7 @@
gd->qe_clk = qe_clk;
gd->brg_clk = brg_clk;
#endif
+ gd->pci_clk = pci_sync_in;
gd->cpu_clk = gd->core_clk;
gd->bus_clk = gd->csb_clk;
return 0;
@@ -351,11 +367,11 @@
return gd->csb_clk;
}
-int print_clock_conf(void)
+int do_clocks (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[])
{
printf("Clock configuration:\n");
- printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
printf(" Core: %4d MHz\n", gd->core_clk / 1000000);
+ printf(" Coherent System Bus: %4d MHz\n", gd->csb_clk / 1000000);
#if defined(CONFIG_MPC8360) || defined(CONFIG_MPC832X)
printf(" QE: %4d MHz\n", gd->qe_clk / 1000000);
printf(" BRG: %4d MHz\n", gd->brg_clk / 1000000);
@@ -371,11 +387,18 @@
#if !defined(CONFIG_MPC832X)
printf(" I2C2: %4d MHz\n", gd->i2c2_clk / 1000000);
#endif
-#if defined(CONFIG_MPC834X)
+#if defined(CONFIG_MPC834X) || defined(CONFIG_MPC831X)
printf(" TSEC1: %4d MHz\n", gd->tsec1_clk / 1000000);
printf(" TSEC2: %4d MHz\n", gd->tsec2_clk / 1000000);
- printf(" USB MPH: %4d MHz\n", gd->usbmph_clk / 1000000);
printf(" USB DR: %4d MHz\n", gd->usbdr_clk / 1000000);
#endif
+#if defined(CONFIG_MPC834X)
+ printf(" USB MPH: %4d MHz\n", gd->usbmph_clk / 1000000);
+#endif
return 0;
}
+
+U_BOOT_CMD(clocks, 1, 0, do_clocks,
+ "clocks - print clock configuration\n",
+ " clocks\n"
+);
diff --git a/cpu/mpc83xx/start.S b/cpu/mpc83xx/start.S
index 6ee9ec9..496c8a5 100644
--- a/cpu/mpc83xx/start.S
+++ b/cpu/mpc83xx/start.S
@@ -263,7 +263,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -282,7 +282,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/mpc83xx/traps.c b/cpu/mpc83xx/traps.c
index 152fa73..dfd6c03 100644
--- a/cpu/mpc83xx/traps.c
+++ b/cpu/mpc83xx/traps.c
@@ -140,7 +140,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -176,7 +176,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -188,7 +188,7 @@
void
ProgramCheckException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -200,7 +200,7 @@
void
SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -213,7 +213,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -222,7 +222,7 @@
_exception(0, regs);
}
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -231,7 +231,7 @@
{
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/mpc83xx/u-boot.lds b/cpu/mpc83xx/u-boot.lds
new file mode 100644
index 0000000..ca663bc
--- /dev/null
+++ b/cpu/mpc83xx/u-boot.lds
@@ -0,0 +1,122 @@
+/*
+ * (C) Copyright 2006
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SECTIONS
+{
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text :
+ {
+ cpu/mpc83xx/start.o (.text)
+ *(.text)
+ *(.got1)
+ . = ALIGN(16);
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ *(.eh_frame)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x0FFF) & 0xFFFFF000;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >> 2;
+ __fixup_entries = (. - _FIXUP_TABLE_) >> 2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ . = .;
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ . = .;
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(4096);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(4096);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
+ENTRY(_start)
diff --git a/cpu/mpc85xx/Makefile b/cpu/mpc85xx/Makefile
index ff67dcd..32091fa 100644
--- a/cpu/mpc85xx/Makefile
+++ b/cpu/mpc85xx/Makefile
@@ -30,7 +30,7 @@
START = start.o resetvec.o
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \
- pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o
+ pci.o serial_scc.o commproc.o ether_fcc.o spd_sdram.o qe_io.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index 7735a52..08e0468 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -280,7 +280,7 @@
if (p != NULL)
*p = cpu_to_be32(clock);
-#if defined(CONFIG_MPC85XX_TSEC1)
+#if defined(CONFIG_HAS_ETH0)
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
if (p)
memcpy(p, bd->bi_enetaddr, 6);
@@ -308,6 +308,17 @@
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/local-mac-address", &len);
if (p)
memcpy(p, bd->bi_enet2addr, 6);
+
+#ifdef CONFIG_UEC_ETH
+ p = ft_get_prop(blob, "/" OF_QE "/ucc@2000/mac-address", &len);
+ if (p)
+ memcpy(p, bd->bi_enet2addr, 6);
+
+ p = ft_get_prop(blob, "/" OF_QE "/ucc@2000/local-mac-address", &len);
+ if (p)
+ memcpy(p, bd->bi_enet2addr, 6);
+
+#endif
#endif
#if defined(CONFIG_HAS_ETH3)
@@ -318,6 +329,17 @@
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/local-mac-address", &len);
if (p)
memcpy(p, bd->bi_enet3addr, 6);
+
+#ifdef CONFIG_UEC_ETH
+ p = ft_get_prop(blob, "/" OF_QE "/ucc@3000/mac-address", &len);
+ if (p)
+ memcpy(p, bd->bi_enet3addr, 6);
+
+ p = ft_get_prop(blob, "/" OF_QE "/ucc@3000/local-mac-address", &len);
+ if (p)
+ memcpy(p, bd->bi_enet3addr, 6);
+
+#endif
#endif
}
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index 9517146..79ad20c 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -1,4 +1,6 @@
/*
+ * Copyright 2007 Freescale Semiconductor.
+ *
* (C) Copyright 2003 Motorola Inc.
* Modified by Xianghua Xiao, X.Xiao@motorola.com
*
@@ -32,6 +34,29 @@
DECLARE_GLOBAL_DATA_PTR;
+#ifdef CONFIG_QE
+extern qe_iop_conf_t qe_iop_conf_tab[];
+extern void qe_config_iopin(u8 port, u8 pin, int dir,
+ int open_drain, int assign);
+extern void qe_init(uint qe_base);
+extern void qe_reset(void);
+
+static void config_qe_ioports(void)
+{
+ u8 port, pin;
+ int dir, open_drain, assign;
+ int i;
+
+ for (i = 0; qe_iop_conf_tab[i].assign != QE_IOP_TAB_END; i++) {
+ port = qe_iop_conf_tab[i].port;
+ pin = qe_iop_conf_tab[i].pin;
+ dir = qe_iop_conf_tab[i].dir;
+ open_drain = qe_iop_conf_tab[i].open_drain;
+ assign = qe_iop_conf_tab[i].assign;
+ qe_config_iopin(port, pin, dir, open_drain, assign);
+ }
+}
+#endif
#ifdef CONFIG_CPM2
static void config_8560_ioports (volatile immap_t * immr)
@@ -133,15 +158,18 @@
#endif
/* now restrict to preliminary range */
+ /* if cs1 is already set via debugger, leave cs0/cs1 alone */
+ if (! memctl->br1 & 1) {
#if defined(CFG_BR0_PRELIM) && defined(CFG_OR0_PRELIM)
- memctl->br0 = CFG_BR0_PRELIM;
- memctl->or0 = CFG_OR0_PRELIM;
+ memctl->br0 = CFG_BR0_PRELIM;
+ memctl->or0 = CFG_OR0_PRELIM;
#endif
#if defined(CFG_BR1_PRELIM) && defined(CFG_OR1_PRELIM)
- memctl->or1 = CFG_OR1_PRELIM;
- memctl->br1 = CFG_BR1_PRELIM;
+ memctl->or1 = CFG_OR1_PRELIM;
+ memctl->br1 = CFG_BR1_PRELIM;
#endif
+ }
#if defined(CFG_BR2_PRELIM) && defined(CFG_OR2_PRELIM)
memctl->or2 = CFG_OR2_PRELIM;
@@ -176,6 +204,11 @@
#if defined(CONFIG_CPM2)
m8560_cpm_reset();
#endif
+#ifdef CONFIG_QE
+ /* Config QE ioports */
+ config_qe_ioports();
+#endif
+
}
@@ -185,16 +218,25 @@
* The newer 8548, etc, parts have twice as much cache, but
* use the same bit-encoding as the older 8555, etc, parts.
*
- * FIXME: Use PVR_VER(pvr) == 1 test here instead of SVR_VER()?
*/
int cpu_init_r(void)
{
+#if defined(CONFIG_CLEAR_LAW0) || defined(CONFIG_L2_CACHE)
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+#endif
+#ifdef CONFIG_CLEAR_LAW0
+ volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
+
+ /* clear alternate boot location LAW (used for sdram, or ddr bank) */
+ ecm->lawar0 = 0;
+#endif
+
#if defined(CONFIG_L2_CACHE)
- volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_l2cache_t *l2cache = &immap->im_l2cache;
volatile uint cache_ctl;
uint svr, ver;
+ uint l2srbar;
svr = get_svr();
ver = SVR_VER(svr);
@@ -204,33 +246,55 @@
switch (cache_ctl & 0x30000000) {
case 0x20000000:
- if (ver == SVR_8548 || ver == SVR_8548_E) {
+ if (ver == SVR_8548 || ver == SVR_8548_E ||
+ ver == SVR_8544 || ver == SVR_8568_E) {
printf ("L2 cache 512KB:");
+ /* set L2E=1, L2I=1, & L2SRAM=0 */
+ cache_ctl = 0xc0000000;
} else {
printf ("L2 cache 256KB:");
+ /* set L2E=1, L2I=1, & L2BLKSZ=2 (256 Kbyte) */
+ cache_ctl = 0xc8000000;
}
break;
- case 0x00000000:
case 0x10000000:
+ printf ("L2 cache 256KB:");
+ if (ver == SVR_8544 || ver == SVR_8544_E) {
+ cache_ctl = 0xc0000000; /* set L2E=1, L2I=1, & L2SRAM=0 */
+ }
+ break;
case 0x30000000:
+ case 0x00000000:
default:
printf ("L2 cache unknown size (0x%08x)\n", cache_ctl);
return -1;
}
- asm("msync;isync");
- l2cache->l2ctl = 0x68000000; /* invalidate */
- cache_ctl = l2cache->l2ctl;
- asm("msync;isync");
-
- l2cache->l2ctl = 0xa8000000; /* enable 256KB L2 cache */
- cache_ctl = l2cache->l2ctl;
- asm("msync;isync");
-
- printf(" enabled\n");
+ if (l2cache->l2ctl & 0x80000000) {
+ printf(" already enabled.");
+ l2srbar = l2cache->l2srbar0;
+#ifdef CFG_INIT_L2_ADDR
+ if (l2cache->l2ctl & 0x00010000 && l2srbar >= CFG_FLASH_BASE) {
+ l2srbar = CFG_INIT_L2_ADDR;
+ l2cache->l2srbar0 = l2srbar;
+ printf(" Moving to 0x%08x", CFG_INIT_L2_ADDR);
+ }
+#endif /* CFG_INIT_L2_ADDR */
+ puts("\n");
+ } else {
+ asm("msync;isync");
+ l2cache->l2ctl = cache_ctl; /* invalidate & enable */
+ asm("msync;isync");
+ printf(" enabled\n");
+ }
#else
printf("L2 cache: disabled\n");
#endif
+#ifdef CONFIG_QE
+ uint qe_base = CFG_IMMR + 0x00080000; /* QE immr base */
+ qe_init(qe_base);
+ qe_reset();
+#endif
return 0;
}
diff --git a/cpu/mpc85xx/ether_fcc.c b/cpu/mpc85xx/ether_fcc.c
index d15d242..5b23a80 100644
--- a/cpu/mpc85xx/ether_fcc.c
+++ b/cpu/mpc85xx/ether_fcc.c
@@ -48,13 +48,13 @@
#include <config.h>
#include <net.h>
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
#include <miiphy.h>
#endif
#if defined(CONFIG_CPM2)
-#if defined(CONFIG_ETHER_ON_FCC) && (CONFIG_COMMANDS & CFG_CMD_NET) && \
+#if defined(CONFIG_ETHER_ON_FCC) && defined(CONFIG_CMD_NET) && \
defined(CONFIG_NET_MULTI)
static struct ether_fcc_info_s
@@ -458,7 +458,7 @@
eth_register(dev);
-#if (defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) \
+#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) \
&& defined(CONFIG_BITBANGMII)
miiphy_register(dev->name,
bb_miiphy_read, bb_miiphy_write);
@@ -468,6 +468,6 @@
return 1;
}
-#endif /* CONFIG_ETHER_ON_FCC && CFG_CMD_NET && CONFIG_NET_MULTI */
+#endif
#endif /* CONFIG_CPM2 */
diff --git a/cpu/mpc85xx/interrupts.c b/cpu/mpc85xx/interrupts.c
index 832781b..bf737d6 100644
--- a/cpu/mpc85xx/interrupts.c
+++ b/cpu/mpc85xx/interrupts.c
@@ -89,6 +89,39 @@
mtspr(SPRN_TCR, TCR_PIE);
set_dec (decrementer_count);
set_msr (get_msr () | MSR_EE);
+
+#ifdef CONFIG_INTERRUPTS
+ volatile ccsr_pic_t *pic = &immr->im_pic;
+
+ pic->iivpr1 = 0x810002; /* 50220 enable ecm interrupts */
+ debug("iivpr1@%x = %x\n",&pic->iivpr1, pic->iivpr1);
+
+ pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
+ debug("iivpr2@%x = %x\n",&pic->iivpr2, pic->iivpr2);
+
+ pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
+ debug("iivpr3@%x = %x\n",&pic->iivpr3, pic->iivpr3);
+
+#ifdef CONFIG_PCI1
+ pic->iivpr8 = 0x810008; /* enable pci1 interrupts */
+ debug("iivpr8@%x = %x\n",&pic->iivpr8, pic->iivpr8);
+#endif
+#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
+ pic->iivpr9 = 0x810009; /* enable pci1 interrupts */
+ debug("iivpr9@%x = %x\n",&pic->iivpr9, pic->iivpr9);
+#endif
+#ifdef CONFIG_PCIE1
+ pic->iivpr10 = 0x81000a; /* enable pcie1 interrupts */
+ debug("iivpr10@%x = %x\n",&pic->iivpr10, pic->iivpr10);
+#endif
+#ifdef CONFIG_PCIE3
+ pic->iivpr11 = 0x81000b; /* enable pcie3 interrupts */
+ debug("iivpr11@%x = %x\n",&pic->iivpr11, pic->iivpr11);
+#endif
+
+ pic->ctpr=0; /* 40080 clear current task priority register */
+#endif
+
return (0);
}
@@ -144,7 +177,7 @@
timestamp = t;
}
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
/*******************************************************************************
*
@@ -159,4 +192,4 @@
return 0;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/mpc85xx/pci.c b/cpu/mpc85xx/pci.c
index 3c1a323..db09e45 100644
--- a/cpu/mpc85xx/pci.c
+++ b/cpu/mpc85xx/pci.c
@@ -142,7 +142,7 @@
u8 header_type;
pci_hose_read_config_byte(hose,
- PCI_BDF(0,17,0),
+ PCI_BDF(0,BRIDGE_ID,0),
PCI_HEADER_TYPE,
&header_type);
}
diff --git a/cpu/mpc85xx/qe_io.c b/cpu/mpc85xx/qe_io.c
new file mode 100644
index 0000000..8878bc5
--- /dev/null
+++ b/cpu/mpc85xx/qe_io.c
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2006 Freescale Semiconductor, Inc.
+ *
+ * Dave Liu <daveliu@freescale.com>
+ * based on source code of Shlomi Gridish
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include "common.h"
+#include "asm/errno.h"
+#include "asm/io.h"
+#include "asm/immap_85xx.h"
+
+#if defined(CONFIG_QE)
+#define NUM_OF_PINS 32
+void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
+{
+ u32 pin_2bit_mask;
+ u32 pin_2bit_dir;
+ u32 pin_2bit_assign;
+ u32 pin_1bit_mask;
+ u32 tmp_val;
+ volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
+ volatile par_io_t *par_io = (volatile par_io_t *)
+ &(im->im_gur.qe_par_io);
+
+ /* Caculate pin location and 2bit mask and dir */
+ pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
+ pin_2bit_dir = (u32)(dir << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));
+
+ /* Setup the direction */
+ tmp_val = (pin > (NUM_OF_PINS/2) - 1) ? \
+ in_be32(&par_io[port].cpdir2) :
+ in_be32(&par_io[port].cpdir1);
+
+ if (pin > (NUM_OF_PINS/2) -1) {
+ out_be32(&par_io[port].cpdir2, ~pin_2bit_mask & tmp_val);
+ out_be32(&par_io[port].cpdir2, pin_2bit_dir | tmp_val);
+ } else {
+ out_be32(&par_io[port].cpdir1, ~pin_2bit_mask & tmp_val);
+ out_be32(&par_io[port].cpdir1, pin_2bit_dir | tmp_val);
+ }
+
+ /* Calculate pin location for 1bit mask */
+ pin_1bit_mask = (u32)(1 << (NUM_OF_PINS - (pin+1)));
+
+ /* Setup the open drain */
+ tmp_val = in_be32(&par_io[port].cpodr);
+ if (open_drain)
+ out_be32(&par_io[port].cpodr, pin_1bit_mask | tmp_val);
+ else
+ out_be32(&par_io[port].cpodr, ~pin_1bit_mask & tmp_val);
+
+ /* Setup the assignment */
+ tmp_val = (pin > (NUM_OF_PINS/2) - 1) ?
+ in_be32(&par_io[port].cppar2):
+ in_be32(&par_io[port].cppar1);
+ pin_2bit_assign = (u32)(assign
+ << (NUM_OF_PINS - (pin%(NUM_OF_PINS/2)+1)*2));
+
+ /* Clear and set 2 bits mask */
+ if (pin > (NUM_OF_PINS/2) - 1) {
+ out_be32(&par_io[port].cppar2, ~pin_2bit_mask & tmp_val);
+ out_be32(&par_io[port].cppar2, pin_2bit_assign | tmp_val);
+ } else {
+ out_be32(&par_io[port].cppar1, ~pin_2bit_mask & tmp_val);
+ out_be32(&par_io[port].cppar1, pin_2bit_assign | tmp_val);
+ }
+}
+
+#endif /* CONFIG_QE */
diff --git a/cpu/mpc85xx/spd_sdram.c b/cpu/mpc85xx/spd_sdram.c
index 3777f49..5dc223a 100644
--- a/cpu/mpc85xx/spd_sdram.c
+++ b/cpu/mpc85xx/spd_sdram.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
* (C) Copyright 2003 Motorola Inc.
* Xianghua Xiao (X.Xiao@motorola.com)
*
@@ -173,11 +173,10 @@
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_ddr_t *ddr = &immap->im_ddr;
- volatile ccsr_gur_t *gur = &immap->im_gur;
spd_eeprom_t spd;
unsigned int n_ranks;
unsigned int rank_density;
- unsigned int odt_rd_cfg, odt_wr_cfg;
+ unsigned int odt_rd_cfg, odt_wr_cfg, ba_bits;
unsigned int odt_cfg, mode_odt_enable;
unsigned int refresh_clk;
#ifdef MPC85xx_DDR_SDRAM_CLK_CNTL
@@ -189,7 +188,7 @@
unsigned int max_data_rate, effective_data_rate;
unsigned int busfreq;
unsigned sdram_cfg;
- unsigned int memsize;
+ unsigned int memsize = 0;
unsigned char caslat, caslat_ctrl;
unsigned int trfc, trfc_clk, trfc_low, trfc_high;
unsigned int trcd_clk;
@@ -204,6 +203,46 @@
unsigned int mode_caslat;
unsigned char sdram_type;
unsigned char d_init;
+ unsigned int bnds;
+
+ /*
+ * Skip configuration if already configured.
+ * memsize is determined from last configured chip select.
+ */
+ if (ddr->cs0_config & 0x80000000) {
+ debug(" cs0 already configured, bnds=%x\n",ddr->cs0_bnds);
+ bnds = 0xfff & ddr->cs0_bnds;
+ if (bnds < 0xff) { /* do not add if at top of 4G */
+ memsize = (bnds + 1) << 4;
+ }
+ }
+ if (ddr->cs1_config & 0x80000000) {
+ debug(" cs1 already configured, bnds=%x\n",ddr->cs1_bnds);
+ bnds = 0xfff & ddr->cs1_bnds;
+ if (bnds < 0xff) { /* do not add if at top of 4G */
+ memsize = (bnds + 1) << 4; /* assume ordered bnds */
+ }
+ }
+ if (ddr->cs2_config & 0x80000000) {
+ debug(" cs2 already configured, bnds=%x\n",ddr->cs2_bnds);
+ bnds = 0xfff & ddr->cs2_bnds;
+ if (bnds < 0xff) { /* do not add if at top of 4G */
+ memsize = (bnds + 1) << 4;
+ }
+ }
+ if (ddr->cs3_config & 0x80000000) {
+ debug(" cs3 already configured, bnds=%x\n",ddr->cs3_bnds);
+ bnds = 0xfff & ddr->cs3_bnds;
+ if (bnds < 0xff) { /* do not add if at top of 4G */
+ memsize = (bnds + 1) << 4;
+ }
+ }
+
+ if (memsize) {
+ printf(" Reusing current %dMB configuration\n",memsize);
+ memsize = setup_laws_and_tlbs(memsize);
+ return memsize << 20;
+ }
/*
* Read SPD information.
@@ -262,6 +301,7 @@
return 0;
}
+#ifdef CONFIG_MPC8548
/*
* Adjust DDR II IO voltage biasing.
* Only 8548 rev 1 needs the fix
@@ -269,9 +309,11 @@
if ((SVR_VER(get_svr()) == SVR_8548_E) &&
(SVR_MJREV(get_svr()) == 1) &&
(spd.mem_type == SPD_MEMTYPE_DDR2)) {
+ volatile ccsr_gur_t *gur = &immap->im_gur;
gur->ddrioovcr = (0x80000000 /* Enable */
| 0x10000000);/* VSEL to 1.8V */
}
+#endif
/*
* Determine the size of each Rank in bytes.
@@ -299,9 +341,14 @@
#endif
}
+ ba_bits = 0;
+ if (spd.nbanks == 0x8)
+ ba_bits = 1;
+
ddr->cs0_config = ( 1 << 31
| (odt_rd_cfg << 20)
| (odt_wr_cfg << 16)
+ | (ba_bits << 14)
| (spd.nrow_addr - 12) << 8
| (spd.ncol_addr - 8) );
debug("\n");
@@ -645,13 +692,10 @@
*/
cpo = 0;
if (spd.mem_type == SPD_MEMTYPE_DDR2) {
- if (effective_data_rate == 266 || effective_data_rate == 333) {
+ if (effective_data_rate <= 333) {
cpo = 0x7; /* READ_LAT + 5/4 */
- } else if (effective_data_rate == 400) {
- cpo = 0x9; /* READ_LAT + 7/4 */
} else {
- /* Pure speculation */
- cpo = 0xb;
+ cpo = 0x9; /* READ_LAT + 7/4 */
}
}
@@ -858,7 +902,12 @@
if (spd.mem_type == SPD_MEMTYPE_DDR)
clk_adjust = 0x6;
else
+#ifdef CONFIG_MPC8568
+ /* Empirally setting clk_adjust */
+ clk_adjust = 0x6;
+#else
clk_adjust = 0x7;
+#endif
ddr->sdram_clk_cntl = (0
| 0x80000000
diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S
index 20c7ebc..2c98c2a 100644
--- a/cpu/mpc85xx/start.S
+++ b/cpu/mpc85xx/start.S
@@ -1,7 +1,6 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
* Copyright (C) 2003 Motorola,Inc.
- * Xianghua Xiao<X.Xiao@motorola.com>
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -46,7 +45,7 @@
#endif
#undef MSR_KERNEL
-#define MSR_KERNEL ( MSR_ME ) /* Machine Check */
+#define MSR_KERNEL ( MSR_ME ) /* Machine Check */
/*
* Set up GOT: Global Offset Table
@@ -80,110 +79,37 @@
*
*/
- .section .bootpg,"ax"
- .globl _start_e500
+ .section .bootpg,"ax"
+ .globl _start_e500
_start_e500:
- mfspr r0, PVR
- lis r1, PVR_85xx_REV1@h
- ori r1, r1, PVR_85xx_REV1@l
- cmpw r0, r1
- bne 1f
- /* Semi-bogus errata fixup for Rev 1 */
- li r0,0x2000
- mtspr 977,r0
+/* clear registers/arrays not reset by hardware */
- /*
- * Before invalidating MMU L1/L2, read TLB1 Entry 0 and then
- * write it back immediately to fixup a Rev 1 bug (Errata CPU4)
- * for this initial TLB1 entry 0, otherwise the TLB1 entry 0
- * will be invalidated (incorrectly).
- */
- lis r2,0x1000
- mtspr MAS0,r2
- tlbre
- tlbwe
- isync
-
-1:
- /*
- * Clear and set up some registers.
- * Note: Some registers need strict synchronization by
- * sync/mbar/msync/isync when being "mtspr".
- * BookE: isync before PID,tlbivax,tlbwe
- * BookE: isync after MSR,PID; msync_isync after tlbivax & tlbwe
- * E500: msync,isync before L1CSR0
- * E500: isync after BBEAR,BBTAR,BUCSR,DBCR0,DBCR1,HID0,HID1,
- * L1CSR0, L1CSR1, MAS[0,1,2,3,4,6],MMUCSR0, PID[0,1,2],
- * SPEFCSR
- */
-
- /* invalidate d-cache */
- mfspr r0,L1CSR0
- ori r0,r0,0x0002
- msync
- isync
- mtspr L1CSR0,r0
- isync
-
- /* disable d-cache */
- li r0,0x0
- mtspr L1CSR0,r0
-
- /* invalidate i-cache */
- mfspr r0,L1CSR1
- ori r0,r0,0x0002
- mtspr L1CSR1,r0
- isync
-
- /* disable i-cache */
- li r0,0x0
- mtspr L1CSR1,r0
- isync
-
- /* clear registers */
- li r0,0
- mtspr SRR0,r0
- mtspr SRR1,r0
- mtspr CSRR0,r0
- mtspr CSRR1,r0
- mtspr MCSRR0,r0
- mtspr MCSRR1,r0
-
- mtspr ESR,r0
- mtspr MCSR,r0
- mtspr DEAR,r0
-
- /* not needed and conflicts with some debuggers */
- /* mtspr DBCR0,r0 */
- mtspr DBCR1,r0
- mtspr DBCR2,r0
- /* not needed and conflicts with some debuggers */
- /* mtspr IAC1,r0 */
- /* mtspr IAC2,r0 */
- mtspr DAC1,r0
- mtspr DAC2,r0
+ /* L1 */
+ li r0,2
+ mtspr L1CSR0,r0 /* invalidate d-cache */
+ mtspr L1CSR1,r0 /* invalidate i-cache */
mfspr r1,DBSR
mtspr DBSR,r1 /* Clear all valid bits */
- mtspr PID0,r0
- mtspr PID1,r0
- mtspr PID2,r0
- mtspr TCR,r0
+ /*
+ * Enable L1 Caches early
+ *
+ */
- mtspr BUCSR,r0 /* disable branch prediction */
- mtspr MAS4,r0
- mtspr MAS6,r0
-#if defined(CONFIG_ENABLE_36BIT_PHYS)
- mtspr MAS7,r0
-#endif
+ lis r2,L1CSR0_CPE@H /* enable parity */
+ ori r2,r2,L1CSR0_DCE
+ mtspr L1CSR0,r2 /* enable L1 Dcache */
isync
+ mtspr L1CSR1,r2 /* enable L1 Icache */
+ isync
+ msync
/* Setup interrupt vectors */
lis r1,TEXT_BASE@h
- mtspr IVPR, r1
+ mtspr IVPR,r1
li r1,0x0100
mtspr IVOR0,r1 /* 0: Critical input */
@@ -217,26 +143,6 @@
li r1,0x0f00
mtspr IVOR15,r1 /* 15: Debug */
- /*
- * Invalidate MMU L1/L2
- *
- * Note: There is a fixup earlier for Errata CPU4 on
- * Rev 1 parts that must precede this MMU invalidation.
- */
- li r2, 0x001e
- mtspr MMUCSR0, r2
- isync
-
- /*
- * Invalidate all TLB0 entries.
- */
- li r3,4
- li r4,0
- tlbivax r4,r3
- /*
- * To avoid REV1 Errata CPU6 issues, make sure
- * the instruction following tlbivax is not a store.
- */
/*
* After reset, CCSRBAR is located at CFG_CCSRBAR_DEFAULT, i.e.
@@ -254,14 +160,14 @@
lwzu r4,0(r5) /* how many TLB1 entries we actually use */
mtctr r4
-0: lwzu r0,4(r5)
- lwzu r1,4(r5)
- lwzu r2,4(r5)
- lwzu r3,4(r5)
- mtspr MAS0,r0
- mtspr MAS1,r1
- mtspr MAS2,r2
- mtspr MAS3,r3
+0: lwzu r6,4(r5)
+ lwzu r7,4(r5)
+ lwzu r8,4(r5)
+ lwzu r9,4(r5)
+ mtspr MAS0,r6
+ mtspr MAS1,r7
+ mtspr MAS2,r8
+ mtspr MAS3,r9
isync
msync
tlbwe
@@ -271,22 +177,22 @@
1:
#if (CFG_CCSRBAR_DEFAULT != CFG_CCSRBAR)
/* Special sequence needed to update CCSRBAR itself */
- lis r4, CFG_CCSRBAR_DEFAULT@h
- ori r4, r4, CFG_CCSRBAR_DEFAULT@l
+ lis r4,CFG_CCSRBAR_DEFAULT@h
+ ori r4,r4,CFG_CCSRBAR_DEFAULT@l
- lis r5, CFG_CCSRBAR@h
- ori r5, r5, CFG_CCSRBAR@l
+ lis r5,CFG_CCSRBAR@h
+ ori r5,r5,CFG_CCSRBAR@l
srwi r6,r5,12
- stw r6, 0(r4)
+ stw r6,0(r4)
isync
- lis r5, 0xffff
+ lis r5,0xffff
ori r5,r5,0xf000
- lwz r5, 0(r5)
+ lwz r5,0(r5)
isync
- lis r3, CFG_CCSRBAR@h
- lwz r5, CFG_CCSRBAR@l(r3)
+ lis r3,CFG_CCSRBAR@h
+ lwz r5,CFG_CCSRBAR@l(r3)
isync
#endif
@@ -300,8 +206,8 @@
lwzu r5,0(r6) /* how many windows we actually use */
mtctr r5
- li r2,0x0c28 /* the first pair is reserved for boot-over-rio-or-pci */
- li r1,0x0c30
+ li r2,0x0c28 /* the first pair is reserved for */
+ li r1,0x0c30 /* boot-over-rio-or-pci */
0: lwzu r4,4(r6)
lwzu r3,4(r6)
@@ -311,31 +217,6 @@
addi r1,r1,0x0020
bdnz 0b
- /* Jump out the last 4K page and continue to 'normal' start */
-1: bl 3f
- b _start
-
-3: li r0,0
- mtspr SRR1,r0 /* Keep things disabled for now */
- mflr r1
- mtspr SRR0,r1
- rfi
-
-/*
- * r3 - 1st arg to board_init(): IMMP pointer
- * r4 - 2nd arg to board_init(): boot flag
- */
- .text
- .long 0x27051956 /* U-BOOT Magic Number */
- .globl version_string
-version_string:
- .ascii U_BOOT_VERSION
- .ascii " (", __DATE__, " - ", __TIME__, ")"
- .ascii CONFIG_IDENT_STRING, "\0"
-
- . = EXC_OFF_SYS_RESET
- .globl _start
-_start:
/* Clear and set up some registers. */
li r0,0x0000
lis r1,0xffff
@@ -354,17 +235,14 @@
/* Enable Time Base and Select Time Base Clock */
lis r0,HID0_EMCP@h /* Enable machine check */
- ori r0,r0,0x4000 /* time base is processor clock */
#if defined(CONFIG_ENABLE_36BIT_PHYS)
- ori r0,r0,0x0080 /* enable MAS7 updates */
+ ori r0,r0,(HID0_TBEN|HID0_ENMAS7)@l /* Enable Timebase & MAS7 */
+#else
+ ori r0,r0,HID0_TBEN@l /* enable Timebase */
#endif
mtspr HID0,r0
-#if defined(CONFIG_ADDR_STREAMING)
- li r0,0x3000
-#else
- li r0,0x1000
-#endif
+ li r0,(HID1_ASTME|HID1_ABE)@l /* Addr streaming & broadcast */
mtspr HID1,r0
/* Enable Branch Prediction */
@@ -383,37 +261,53 @@
#endif
/* L1 DCache is used for initial RAM */
- mfspr r2, L1CSR0
- ori r2, r2, 0x0003
- oris r2, r2, 0x0001
- mtspr L1CSR0, r2 /* enable/invalidate L1 Dcache */
- isync
/* Allocate Initial RAM in data cache.
*/
- lis r3, CFG_INIT_RAM_ADDR@h
- ori r3, r3, CFG_INIT_RAM_ADDR@l
- li r2, 512 /* 512*32=16K */
+ lis r3,CFG_INIT_RAM_ADDR@h
+ ori r3,r3,CFG_INIT_RAM_ADDR@l
+ li r2,512 /* 512*32=16K */
mtctr r2
- li r0, 0
+ li r0,0
1:
- dcbz r0, r3
- dcbtls 0,r0, r3
- addi r3, r3, 32
+ dcbz r0,r3
+ dcbtls 0,r0,r3
+ addi r3,r3,32
bdnz 1b
-#ifndef CFG_RAMBOOT
+ /* Jump out the last 4K page and continue to 'normal' start */
+#ifdef CFG_RAMBOOT
+ bl 3f
+ b _start_cont
+#else
/* Calculate absolute address in FLASH and jump there */
/*--------------------------------------------------------------*/
- lis r3, CFG_MONITOR_BASE@h
- ori r3, r3, CFG_MONITOR_BASE@l
- addi r3, r3, in_flash - _start + EXC_OFF_SYS_RESET
+ lis r3,CFG_MONITOR_BASE@h
+ ori r3,r3,CFG_MONITOR_BASE@l
+ addi r3,r3,_start_cont - _start + _START_OFFSET
mtlr r3
- blr
+#endif
-in_flash:
-#endif /* CFG_RAMBOOT */
+3: li r0,0
+ mtspr SRR1,r0 /* Keep things disabled for now */
+ mflr r1
+ mtspr SRR0,r1
+ rfi
+ isync
+ .text
+ .globl _start
+_start:
+ .long 0x27051956 /* U-BOOT Magic Number */
+ .globl version_string
+version_string:
+ .ascii U_BOOT_VERSION
+ .ascii " (", __DATE__, " - ", __TIME__, ")"
+ .ascii CONFIG_IDENT_STRING, "\0"
+
+ .align 4
+ .globl _start_cont
+_start_cont:
/* Setup the stack in initial RAM,could be L2-as-SRAM or L1 dcache*/
lis r1,CFG_INIT_RAM_ADDR@h
ori r1,r1,CFG_INIT_SP_OFFSET@l
@@ -424,26 +318,24 @@
stwu r1,-8(r1) /* Save back chain and move SP */
lis r0,RESET_VECTOR@h /* Address of reset vector */
- ori r0,r0, RESET_VECTOR@l
+ ori r0,r0,RESET_VECTOR@l
stwu r1,-8(r1) /* Save back chain and move SP */
stw r0,+12(r1) /* Save return addr (underflow vect) */
GET_GOT
bl cpu_init_f
- bl icache_enable
bl board_init_f
isync
-/* --FIXME-- machine check with MCSRRn and rfmci */
-
+ . = EXC_OFF_SYS_RESET
.globl _start_of_vectors
_start_of_vectors:
-#if 0
+
/* Critical input. */
- CRIT_EXCEPTION(0x0100, CritcalInput, CritcalInputException)
-#endif
-/* Machine check --FIXME-- Should be MACH_EXCEPTION */
- CRIT_EXCEPTION(0x0200, MachineCheck, MachineCheckException)
+ CRIT_EXCEPTION(0x0100, CriticalInput, CritcalInputException)
+
+/* Machine check */
+ MCK_EXCEPTION(0x200, MachineCheck, MachineCheckException)
/* Data Storage exception. */
STD_EXCEPTION(0x0300, DataStorage, UnknownException)
@@ -452,12 +344,12 @@
STD_EXCEPTION(0x0400, InstStorage, UnknownException)
/* External Interrupt exception. */
- STD_EXCEPTION(0x0500, ExtInterrupt, UnknownException)
+ STD_EXCEPTION(0x0500, ExtInterrupt, ExtIntException)
/* Alignment exception. */
. = 0x0600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -469,13 +361,13 @@
mtlr r6
blrl
.L_Alignment:
- .long AlignmentException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
+ .long AlignmentException - _start + _START_OFFSET
+ .long int_return - _start + _START_OFFSET
/* Program check exception */
. = 0x0700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
@@ -483,8 +375,8 @@
mtlr r6
blrl
.L_ProgramCheck:
- .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
+ .long ProgramCheckException - _start + _START_OFFSET
+ .long int_return - _start + _START_OFFSET
/* No FPU on MPC85xx. This exception is not supposed to happen.
*/
@@ -496,23 +388,23 @@
* r3-... arguments
*/
SystemCall:
- addis r11,r0,0 /* get functions table addr */
- ori r11,r11,0 /* Note: this code is patched in trap_init */
- addis r12,r0,0 /* get number of functions */
+ addis r11,r0,0 /* get functions table addr */
+ ori r11,r11,0 /* Note: this code is patched in trap_init */
+ addis r12,r0,0 /* get number of functions */
ori r12,r12,0
- cmplw 0, r0, r12
+ cmplw 0,r0,r12
bge 1f
- rlwinm r0,r0,2,0,31 /* fn_addr = fn_tbl[r0] */
+ rlwinm r0,r0,2,0,31 /* fn_addr = fn_tbl[r0] */
add r11,r11,r0
lwz r11,0(r11)
- li r20,0xd00-4 /* Get stack pointer */
+ li r20,0xd00-4 /* Get stack pointer */
lwz r12,0(r20)
- subi r12,r12,12 /* Adjust stack pointer */
+ subi r12,r12,12 /* Adjust stack pointer */
li r0,0xc00+_end_back-SystemCall
- cmplw 0, r0, r12 /* Check stack overflow */
+ cmplw 0,r0,r12 /* Check stack overflow */
bgt 1f
stw r12,0(r20)
@@ -570,7 +462,7 @@
_end_of_vectors:
- . = 0x2100
+ . = . + (0x100 - ( . & 0xff )) /* align for debug */
/*
* This code finishes saving the registers to the exception frame
@@ -655,26 +547,58 @@
REST_GPR(31, r1)
lwz r2,_NIP(r1) /* Restore environment */
lwz r0,_MSR(r1)
- mtspr 990,r2 /* SRR2 */
- mtspr 991,r0 /* SRR3 */
+ mtspr SPRN_CSRR0,r2
+ mtspr SPRN_CSRR1,r0
lwz r0,GPR0(r1)
lwz r2,GPR2(r1)
lwz r1,GPR1(r1)
SYNC
rfci
+mck_return:
+ mfmsr r28 /* Disable interrupts */
+ li r4,0
+ ori r4,r4,MSR_EE
+ andc r28,r28,r4
+ SYNC /* Some chip revs need this... */
+ mtmsr r28
+ SYNC
+ lwz r2,_CTR(r1)
+ lwz r0,_LINK(r1)
+ mtctr r2
+ mtlr r0
+ lwz r2,_XER(r1)
+ lwz r0,_CCR(r1)
+ mtspr XER,r2
+ mtcrf 0xFF,r0
+ REST_10GPRS(3, r1)
+ REST_10GPRS(13, r1)
+ REST_8GPRS(23, r1)
+ REST_GPR(31, r1)
+ lwz r2,_NIP(r1) /* Restore environment */
+ lwz r0,_MSR(r1)
+ mtspr SPRN_MCSRR0,r2
+ mtspr SPRN_MCSRR1,r0
+ lwz r0,GPR0(r1)
+ lwz r2,GPR2(r1)
+ lwz r1,GPR1(r1)
+ SYNC
+ rfmci
+
/* Cache functions.
*/
invalidate_icache:
mfspr r0,L1CSR1
- ori r0,r0,0x0002
+ ori r0,r0,L1CSR1_ICFI
+ msync
+ isync
mtspr L1CSR1,r0
isync
- blr /* entire I cache */
+ blr /* entire I cache */
invalidate_dcache:
mfspr r0,L1CSR0
- ori r0,r0,0x0002
+ ori r0,r0,L1CSR0_DCFI
msync
isync
mtspr L1CSR0,r0
@@ -697,9 +621,9 @@
.globl icache_disable
icache_disable:
mfspr r0,L1CSR1
- lis r1,0xfffffffe@h
- ori r1,r1,0xfffffffe@l
- and r0,r0,r1
+ lis r3,0
+ ori r3,r3,L1CSR1_ICE
+ andc r0,r0,r3
mtspr L1CSR1,r0
isync
blr
@@ -707,7 +631,7 @@
.globl icache_status
icache_status:
mfspr r3,L1CSR1
- andi. r3,r3,1
+ andi. r3,r3,L1CSR1_ICE
blr
.globl dcache_enable
@@ -727,12 +651,10 @@
.globl dcache_disable
dcache_disable:
- mfspr r0,L1CSR0
- lis r1,0xfffffffe@h
- ori r1,r1,0xfffffffe@l
- and r0,r0,r1
- msync
- isync
+ mfspr r3,L1CSR0
+ lis r4,0
+ ori r4,r4,L1CSR0_DCE
+ andc r3,r3,r4
mtspr L1CSR0,r0
isync
blr
@@ -740,27 +662,27 @@
.globl dcache_status
dcache_status:
mfspr r3,L1CSR0
- andi. r3,r3,1
+ andi. r3,r3,L1CSR0_DCE
blr
.globl get_pir
get_pir:
- mfspr r3, PIR
+ mfspr r3,PIR
blr
.globl get_pvr
get_pvr:
- mfspr r3, PVR
+ mfspr r3,PVR
blr
.globl get_svr
get_svr:
- mfspr r3, SVR
+ mfspr r3,SVR
blr
.globl wr_tcr
wr_tcr:
- mtspr TCR, r3
+ mtspr TCR,r3
blr
/*------------------------------------------------------------------------------- */
@@ -913,16 +835,16 @@
*/
.globl relocate_code
relocate_code:
- mr r1, r3 /* Set new stack pointer */
- mr r9, r4 /* Save copy of Init Data pointer */
- mr r10, r5 /* Save copy of Destination Address */
+ mr r1,r3 /* Set new stack pointer */
+ mr r9,r4 /* Save copy of Init Data pointer */
+ mr r10,r5 /* Save copy of Destination Address */
- mr r3, r5 /* Destination Address */
- lis r4, CFG_MONITOR_BASE@h /* Source Address */
- ori r4, r4, CFG_MONITOR_BASE@l
+ mr r3,r5 /* Destination Address */
+ lis r4,CFG_MONITOR_BASE@h /* Source Address */
+ ori r4,r4,CFG_MONITOR_BASE@l
lwz r5,GOT(__init_end)
sub r5,r5,r4
- li r6, CFG_CACHELINE_SIZE /* Cache Line Size */
+ li r6,CFG_CACHELINE_SIZE /* Cache Line Size */
/*
* Fix GOT pointer:
@@ -931,12 +853,12 @@
*
* Offset:
*/
- sub r15, r10, r4
+ sub r15,r10,r4
/* First our own GOT */
- add r14, r14, r15
+ add r14,r14,r15
/* the the one used by the C code */
- add r30, r30, r15
+ add r30,r30,r15
/*
* Now relocate code
@@ -997,10 +919,10 @@
* initialization, now running from RAM.
*/
- addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
+ addi r0,r10,in_ram - _start + _START_OFFSET
mtlr r0
blr /* NEVER RETURNS! */
-
+ .globl in_ram
in_ram:
/*
@@ -1044,19 +966,19 @@
lwz r3,GOT(__bss_start)
lwz r4,GOT(_end)
- cmplw 0, r3, r4
+ cmplw 0,r3,r4
beq 6f
- li r0, 0
+ li r0,0
5:
- stw r0, 0(r3)
- addi r3, r3, 4
- cmplw 0, r3, r4
+ stw r0,0(r3)
+ addi r3,r3,4
+ cmplw 0,r3,r4
bne 5b
6:
- mr r3, r9 /* Init Data pointer */
- mr r4, r10 /* Destination Address */
+ mr r3,r9 /* Init Data pointer */
+ mr r4,r10 /* Destination Address */
bl board_init_r
/*
@@ -1067,52 +989,54 @@
*/
.globl trap_init
trap_init:
- lwz r7, GOT(_start)
- lwz r8, GOT(_end_of_vectors)
+ lwz r7,GOT(_start_of_vectors)
+ lwz r8,GOT(_end_of_vectors)
- li r9, 0x100 /* reset vector always at 0x100 */
+ li r9,0x100 /* reset vector always at 0x100 */
- cmplw 0, r7, r8
+ cmplw 0,r7,r8
bgelr /* return if r7>=r8 - just in case */
mflr r4 /* save link register */
1:
- lwz r0, 0(r7)
- stw r0, 0(r9)
- addi r7, r7, 4
- addi r9, r9, 4
- cmplw 0, r7, r8
+ lwz r0,0(r7)
+ stw r0,0(r9)
+ addi r7,r7,4
+ addi r9,r9,4
+ cmplw 0,r7,r8
bne 1b
/*
* relocate `hdlr' and `int_return' entries
*/
- li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
+ li r7,.L_CriticalInput - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_DataStorage - _start + EXC_OFF_SYS_RESET
+ li r7,.L_MachineCheck - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_InstStorage - _start + EXC_OFF_SYS_RESET
+ li r7,.L_DataStorage - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_ExtInterrupt - _start + EXC_OFF_SYS_RESET
+ li r7,.L_InstStorage - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
+ li r7,.L_ExtInterrupt - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
+ li r7,.L_Alignment - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
+ li r7,.L_ProgramCheck - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_Decrementer - _start + EXC_OFF_SYS_RESET
+ li r7,.L_FPUnavailable - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_IntervalTimer - _start + EXC_OFF_SYS_RESET
- li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
+ li r7,.L_Decrementer - _start + _START_OFFSET
+ bl trap_reloc
+ li r7,.L_IntervalTimer - _start + _START_OFFSET
+ li r8,_end_of_vectors - _start + _START_OFFSET
2:
bl trap_reloc
- addi r7, r7, 0x100 /* next exception vector */
- cmplw 0, r7, r8
+ addi r7,r7,0x100 /* next exception vector */
+ cmplw 0,r7,r8
blt 2b
lis r7,0x0
- mtspr IVPR, r7
+ mtspr IVPR,r7
mtlr r4 /* restore link register */
blr
@@ -1121,13 +1045,13 @@
* Function: relocate entries for one exception vector
*/
trap_reloc:
- lwz r0, 0(r7) /* hdlr ... */
- add r0, r0, r3 /* ... += dest_addr */
- stw r0, 0(r7)
+ lwz r0,0(r7) /* hdlr ... */
+ add r0,r0,r3 /* ... += dest_addr */
+ stw r0,0(r7)
- lwz r0, 4(r7) /* int_return ... */
- add r0, r0, r3 /* ... += dest_addr */
- stw r0, 4(r7)
+ lwz r0,4(r7) /* int_return ... */
+ add r0,r0,r3 /* ... += dest_addr */
+ stw r0,4(r7)
blr
@@ -1135,13 +1059,13 @@
.globl unlock_ram_in_cache
unlock_ram_in_cache:
/* invalidate the INIT_RAM section */
- lis r3, (CFG_INIT_RAM_ADDR & ~31)@h
- ori r3, r3, (CFG_INIT_RAM_ADDR & ~31)@l
- li r2,512
- mtctr r2
-1: icbi r0, r3
- dcbi r0, r3
- addi r3, r3, 32
+ lis r3,(CFG_INIT_RAM_ADDR & ~31)@h
+ ori r3,r3,(CFG_INIT_RAM_ADDR & ~31)@l
+ li r4,512
+ mtctr r4
+1: icbi r0,r3
+ dcbi r0,r3
+ addi r3,r3,32
bdnz 1b
sync /* Wait for all icbi to complete on bus */
isync
diff --git a/cpu/mpc85xx/traps.c b/cpu/mpc85xx/traps.c
index 904f052..efc80c7 100644
--- a/cpu/mpc85xx/traps.c
+++ b/cpu/mpc85xx/traps.c
@@ -1,6 +1,7 @@
/*
* linux/arch/ppc/kernel/traps.c
*
+ * Copyright 2007 Freescale Semiconductor.
* Copyright (C) 2003 Motorola
* Modified by Xianghua Xiao(x.xiao@motorola.com)
*
@@ -41,7 +42,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -74,7 +75,7 @@
#define ESR_DIZ 0x00400000
#define ESR_U0F 0x00008000
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -145,10 +146,13 @@
panic("Critical Input Exception");
}
+int machinecheck_count = 0;
+int machinecheck_error = 0;
void
MachineCheckException(struct pt_regs *regs)
{
unsigned long fixup;
+ unsigned int mcsr, mcsrr0, mcsrr1, mcar;
/* Probing PCI using config cycles cause this exception
* when a device is not present. Catch it and return to
@@ -159,40 +163,68 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+ mcsrr0 = mfspr(SPRN_MCSRR0);
+ mcsrr1 = mfspr(SPRN_MCSRR1);
+ mcsr = mfspr(SPRN_MCSR);
+ mcar = mfspr(SPRN_MCAR);
+
+ machinecheck_count++;
+ machinecheck_error=1;
+
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
printf("Machine check in kernel mode.\n");
- printf("Caused by (from msr): ");
- printf("regs %p ",regs);
- switch( regs->msr & 0x000F0000) {
- case (0x80000000>>12):
- printf("Machine check signal - probably due to mm fault\n"
- "with mmu off\n");
- break;
- case (0x80000000>>13):
- printf("Transfer error ack signal\n");
- break;
- case (0x80000000>>14):
- printf("Data parity signal\n");
- break;
- case (0x80000000>>15):
- printf("Address parity signal\n");
- break;
- default:
- printf("Unknown values in msr\n");
- }
+ printf("Caused by (from mcsr): ");
+ printf("mcsr = 0x%08x\n", mcsr);
+ if (mcsr & 0x80000000)
+ printf("Machine check input pin\n");
+ if (mcsr & 0x40000000)
+ printf("Instruction cache parity error\n");
+ if (mcsr & 0x20000000)
+ printf("Data cache push parity error\n");
+ if (mcsr & 0x10000000)
+ printf("Data cache parity error\n");
+ if (mcsr & 0x00000080)
+ printf("Bus instruction address error\n");
+ if (mcsr & 0x00000040)
+ printf("Bus Read address error\n");
+ if (mcsr & 0x00000020)
+ printf("Bus Write address error\n");
+ if (mcsr & 0x00000010)
+ printf("Bus Instruction data bus error\n");
+ if (mcsr & 0x00000008)
+ printf("Bus Read data bus error\n");
+ if (mcsr & 0x00000004)
+ printf("Bus Write bus error\n");
+ if (mcsr & 0x00000002)
+ printf("Bus Instruction parity error\n");
+ if (mcsr & 0x00000001)
+ printf("Bus Read parity error\n");
+
show_regs(regs);
+ printf("MCSR=0x%08x \tMCSRR0=0x%08x \nMCSRR1=0x%08x \tMCAR=0x%08x\n",
+ mcsr, mcsrr0, mcsrr1, mcar);
print_backtrace((unsigned long *)regs->gpr[1]);
- panic("machine check");
+ if (machinecheck_count > 10) {
+ panic("machine check count too high\n");
+ }
+
+ if (machinecheck_count > 1) {
+ regs->nip += 4; /* skip offending instruction */
+ printf("Skipping current instr, Returning to 0x%08x\n",
+ regs->nip);
+ } else {
+ printf("Returning back to 0x%08x\n",regs->nip);
+ }
}
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -207,7 +239,7 @@
{
long esr_val;
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -244,7 +276,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -253,13 +285,40 @@
regs->nip, regs->msr, regs->trap);
_exception(0, regs);
}
+void
+ExtIntException(struct pt_regs *regs)
+{
+ volatile immap_t *immap = (immap_t *)CFG_IMMR;
+ volatile ccsr_pic_t *pic = &immap->im_pic;
+ uint vect;
+
+#if defined(CONFIG_CMD_KGDB)
+ if (debugger_exception_handler && (*debugger_exception_handler)(regs))
+ return;
+#endif
+
+ printf("External Interrupt Exception at PC: %lx, SR: %lx, vector=%lx",
+ regs->nip, regs->msr, regs->trap);
+ vect = pic->iack0;
+ printf(" irq IACK0@%05x=%d\n",&pic->iack0,vect);
+ show_regs(regs);
+ print_backtrace((unsigned long *)regs->gpr[1]);
+ machinecheck_count++;
+#ifdef EXTINT_NOSKIP
+ printf("Returning back to 0x%08x\n",regs->nip);
+#else
+ regs->nip += 4; /* skip offending instruction */
+ printf("Skipping current instr, Returning to 0x%08x\n",regs->nip);
+#endif
+
+}
void
DebugException(struct pt_regs *regs)
{
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/mpc86xx/Makefile b/cpu/mpc86xx/Makefile
index fffcfd2..6d9300e 100644
--- a/cpu/mpc86xx/Makefile
+++ b/cpu/mpc86xx/Makefile
@@ -1,4 +1,5 @@
#
+# Copyright 2007 Freescale Semiconductor, Inc.
# (C) Copyright 2002,2003 Motorola Inc.
# Xianghua Xiao,X.Xiao@motorola.com
#
@@ -30,7 +31,7 @@
START = start.o #resetvec.o
SOBJS = cache.o
COBJS = traps.o cpu.o cpu_init.o speed.o interrupts.o \
- pci.o pcie_indirect.o spd_sdram.o
+ spd_sdram.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/mpc86xx/cpu.c b/cpu/mpc86xx/cpu.c
index a33acfe..9456471 100644
--- a/cpu/mpc86xx/cpu.c
+++ b/cpu/mpc86xx/cpu.c
@@ -278,7 +278,7 @@
if (p != NULL)
*p = cpu_to_be32(clock);
-#if defined(CONFIG_MPC86XX_TSEC1)
+#if defined(CONFIG_TSEC1)
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@24000/mac-address", &len);
if (p != NULL)
memcpy(p, bd->bi_enetaddr, 6);
@@ -287,7 +287,7 @@
memcpy(p, bd->bi_enetaddr, 6);
#endif
-#if defined(CONFIG_MPC86XX_TSEC2)
+#if defined(CONFIG_TSEC2)
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@25000/mac-address", &len);
if (p != NULL)
memcpy(p, bd->bi_enet1addr, 6);
@@ -296,7 +296,7 @@
memcpy(p, bd->bi_enet1addr, 6);
#endif
-#if defined(CONFIG_MPC86XX_TSEC3)
+#if defined(CONFIG_TSEC3)
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@26000/mac-address", &len);
if (p != NULL)
memcpy(p, bd->bi_enet2addr, 6);
@@ -305,7 +305,7 @@
memcpy(p, bd->bi_enet2addr, 6);
#endif
-#if defined(CONFIG_MPC86XX_TSEC4)
+#if defined(CONFIG_TSEC4)
p = ft_get_prop(blob, "/" OF_SOC "/ethernet@27000/mac-address", &len);
if (p != NULL)
memcpy(p, bd->bi_enet3addr, 6);
diff --git a/cpu/mpc86xx/cpu_init.c b/cpu/mpc86xx/cpu_init.c
index 4673d05..4f8956e 100644
--- a/cpu/mpc86xx/cpu_init.c
+++ b/cpu/mpc86xx/cpu_init.c
@@ -29,6 +29,8 @@
#include <common.h>
#include <mpc86xx.h>
+DECLARE_GLOBAL_DATA_PTR;
+
/*
* Breathe some life into the CPU...
*
@@ -38,7 +40,6 @@
void cpu_init_f(void)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_lbc_t *memctl = &immap->im_lbc;
@@ -104,8 +105,8 @@
/* enable the timebase bit in HID0 */
set_hid0(get_hid0() | 0x4000000);
- /* enable SYNCBE | ABE bits in HID1 */
- set_hid1(get_hid1() | 0x00000C00);
+ /* enable EMCP, SYNCBE | ABE bits in HID1 */
+ set_hid1(get_hid1() | 0x80000C00);
}
/*
diff --git a/cpu/mpc86xx/interrupts.c b/cpu/mpc86xx/interrupts.c
index 49820bb..d9f634f 100644
--- a/cpu/mpc86xx/interrupts.c
+++ b/cpu/mpc86xx/interrupts.c
@@ -8,7 +8,7 @@
* (C) Copyright 2003 Motorola Inc. (MPC85xx port)
* Xianghua Xiao (X.Xiao@motorola.com)
*
- * (C) Copyright 2004 Freescale Semiconductor. (MPC86xx Port)
+ * (C) Copyright 2004, 2007 Freescale Semiconductor. (MPC86xx Port)
* Jeff Brown
* Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
*
@@ -71,7 +71,7 @@
}
/* interrupt is not supported yet */
-int interrupt_init_cpu(unsigned *decrementer_count)
+int interrupt_init_cpu(unsigned long *decrementer_count)
{
return 0;
}
@@ -80,25 +80,10 @@
{
int ret;
- /*
- * The IRQ0 on Rev 2 is pulled high (low in Rev 1.x) to
- * implement PEX10 errata. As INT is active high, it
- * will cause core to take 0x500 interrupt.
- *
- * Due to the PIC's default pass through mode, as soon
- * as interrupts are enabled (MSR[EE] = 1), an interrupt
- * will be taken and u-boot will hang. This is due to a
- * hardware change (per an errata fix) on new revisions
- * of the board with Rev 2.x parts.
- *
- * Setting the PIC to mixed mode prevents the hang.
- */
- if ((get_svr() & 0xf0) == 0x20) {
- volatile immap_t *immr = (immap_t *)CFG_IMMR;
- immr->im_pic.gcr = MPC86xx_PICGCR_RST;
- while (immr->im_pic.gcr & MPC86xx_PICGCR_RST);
- immr->im_pic.gcr = MPC86xx_PICGCR_MODE;
- }
+ volatile immap_t *immr = (immap_t *)CFG_IMMR;
+ immr->im_pic.gcr = MPC86xx_PICGCR_RST;
+ while (immr->im_pic.gcr & MPC86xx_PICGCR_RST);
+ immr->im_pic.gcr = MPC86xx_PICGCR_MODE;
/* call cpu specific function from $(CPU)/interrupts.c */
ret = interrupt_init_cpu(&decrementer_count);
@@ -107,7 +92,7 @@
return ret;
decrementer_count = get_tbclk() / CFG_HZ;
- debug("interrupt init: tbclk() = %d MHz, decrementer_count = %d\n",
+ debug("interrupt init: tbclk() = %d MHz, decrementer_count = %ld\n",
(get_tbclk() / 1000000),
decrementer_count);
@@ -119,6 +104,30 @@
get_msr(),
get_dec());
+#ifdef CONFIG_INTERRUPTS
+ volatile ccsr_pic_t *pic = &immr->im_pic;
+
+ pic->iivpr1 = 0x810001; /* 50220 enable mcm interrupts */
+ debug("iivpr1@%x = %x\n", &pic->iivpr1, pic->iivpr1);
+
+ pic->iivpr2 = 0x810002; /* 50240 enable ddr interrupts */
+ debug("iivpr2@%x = %x\n", &pic->iivpr2, pic->iivpr2);
+
+ pic->iivpr3 = 0x810003; /* 50260 enable lbc interrupts */
+ debug("iivpr3@%x = %x\n", &pic->iivpr3, pic->iivpr3);
+
+#if defined(CONFIG_PCI1) || defined(CONFIG_PCIE1)
+ pic->iivpr8 = 0x810008; /* enable pcie1 interrupts */
+ debug("iivpr8@%x = %x\n", &pic->iivpr8, pic->iivpr8);
+#endif
+#if defined(CONFIG_PCI2) || defined(CONFIG_PCIE2)
+ pic->iivpr9 = 0x810009; /* enable pcie2 interrupts */
+ debug("iivpr9@%x = %x\n", &pic->iivpr9, pic->iivpr9);
+#endif
+
+ pic->ctpr = 0; /* 40080 clear current task priority register */
+#endif
+
return 0;
}
@@ -158,8 +167,6 @@
timestamp++;
- ppcDcbf(×tamp);
-
/* Restore Decrementer Count */
set_dec(decrementer_count);
diff --git a/cpu/mpc86xx/pci.c b/cpu/mpc86xx/pci.c
deleted file mode 100644
index b86548d..0000000
--- a/cpu/mpc86xx/pci.c
+++ /dev/null
@@ -1,146 +0,0 @@
-/*
- * Copyright (C) Freescale Semiconductor,Inc.
- * 2005, 2006. All rights reserved.
- *
- * Ed Swarthout (ed.swarthout@freescale.com)
- * Jason Jin (Jason.jin@freescale.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * PCIE Configuration space access support for PCIE Bridge
- */
-#include <common.h>
-#include <pci.h>
-
-#if defined(CONFIG_PCI)
-void
-pci_mpc86xx_init(struct pci_controller *hose)
-{
- volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
- volatile ccsr_pex_t *pcie1 = &immap->im_pex1;
- u16 temp16;
- u32 temp32;
-
- volatile ccsr_gur_t *gur = &immap->im_gur;
- uint host1_agent = (gur->porbmsr & MPC86xx_PORBMSR_HA) >> 17;
- uint pcie1_host = (host1_agent == 2) || (host1_agent == 3);
- uint pcie1_agent = (host1_agent == 0) || (host1_agent == 1);
- uint devdisr = gur->devdisr;
- uint io_sel = (gur->pordevsr & MPC86xx_PORDEVSR_IO_SEL) >> 16;
-
- if ((io_sel == 2 || io_sel == 3 || io_sel == 5 || io_sel == 6 ||
- io_sel == 7 || io_sel == 0xf)
- && !(devdisr & MPC86xx_DEVDISR_PCIEX1)) {
- printf("PCI-EXPRESS 1: Configured as %s \n",
- pcie1_agent ? "Agent" : "Host");
- if (pcie1_agent)
- return; /*Don't scan bus when configured as agent */
- printf(" Scanning PCIE bus");
- debug("0x%08x=0x%08x ",
- &pcie1->pme_msg_det,
- pcie1->pme_msg_det);
- if (pcie1->pme_msg_det) {
- pcie1->pme_msg_det = 0xffffffff;
- debug(" with errors. Clearing. Now 0x%08x",
- pcie1->pme_msg_det);
- }
- debug("\n");
- } else {
- printf("PCI-EXPRESS 1 disabled!\n");
- return;
- }
-
- /*
- * Set first_bus=0 only skipped B0:D0:F0 which is
- * a reserved device in M1575, but make it easy for
- * most of the scan process.
- */
- hose->first_busno = 0x00;
- hose->last_busno = 0xfe;
-
- pcie_setup_indirect(hose, (CFG_IMMR + 0x8000), (CFG_IMMR + 0x8004));
-
- pci_hose_read_config_word(hose,
- PCI_BDF(0, 0, 0), PCI_COMMAND, &temp16);
- temp16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER |
- PCI_COMMAND_MEMORY | PCI_COMMAND_IO;
- pci_hose_write_config_word(hose,
- PCI_BDF(0, 0, 0), PCI_COMMAND, temp16);
-
- pci_hose_write_config_word(hose, PCI_BDF(0, 0, 0), PCI_STATUS, 0xffff);
- pci_hose_write_config_byte(hose,
- PCI_BDF(0, 0, 0), PCI_LATENCY_TIMER, 0x80);
-
- pci_hose_read_config_dword(hose, PCI_BDF(0, 0, 0), PCI_PRIMARY_BUS,
- &temp32);
- temp32 = (temp32 & 0xff000000) | (0xff) | (0x0 << 8) | (0xfe << 16);
- pci_hose_write_config_dword(hose, PCI_BDF(0, 0, 0), PCI_PRIMARY_BUS,
- temp32);
-
- pcie1->powar1 = 0;
- pcie1->powar2 = 0;
- pcie1->piwar1 = 0;
- pcie1->piwar1 = 0;
-
- pcie1->powbar1 = (CFG_PCI1_MEM_BASE >> 12) & 0x000fffff;
- pcie1->powar1 = 0x8004401c; /* 512M MEM space */
- pcie1->potar1 = (CFG_PCI1_MEM_BASE >> 12) & 0x000fffff;
- pcie1->potear1 = 0x00000000;
-
- pcie1->powbar2 = (CFG_PCI1_IO_BASE >> 12) & 0x000fffff;
- pcie1->powar2 = 0x80088017; /* 16M IO space */
- pcie1->potar2 = 0x00000000;
- pcie1->potear2 = 0x00000000;
-
- pcie1->pitar1 = 0x00000000;
- pcie1->piwbar1 = 0x00000000;
- /* Enable, Prefetch, Local Mem, * Snoop R/W, 2G */
- pcie1->piwar1 = 0xa0f5501e;
-
- pci_set_region(hose->regions + 0,
- CFG_PCI_MEMORY_BUS,
- CFG_PCI_MEMORY_PHYS,
- CFG_PCI_MEMORY_SIZE,
- PCI_REGION_MEM | PCI_REGION_MEMORY);
-
- pci_set_region(hose->regions + 1,
- CFG_PCI1_MEM_BASE,
- CFG_PCI1_MEM_PHYS,
- CFG_PCI1_MEM_SIZE,
- PCI_REGION_MEM);
-
- pci_set_region(hose->regions + 2,
- CFG_PCI1_IO_BASE,
- CFG_PCI1_IO_PHYS,
- CFG_PCI1_IO_SIZE,
- PCI_REGION_IO);
-
- hose->region_count = 3;
-
- pci_register_hose(hose);
-
- hose->last_busno = pci_hose_scan(hose);
- debug("pcie_mpc86xx_init: last_busno %x\n", hose->last_busno);
- debug("pcie_mpc86xx init: current_busno %x\n ", hose->current_busno);
-
- printf("....PCIE1 scan & enumeration done\n");
-}
-#endif /* CONFIG_PCI */
diff --git a/cpu/mpc86xx/pcie_indirect.c b/cpu/mpc86xx/pcie_indirect.c
deleted file mode 100644
index b00ad76..0000000
--- a/cpu/mpc86xx/pcie_indirect.c
+++ /dev/null
@@ -1,199 +0,0 @@
-/*
- * Support for indirect PCI bridges.
- *
- * Copyright (c) Freescale Semiconductor, Inc.
- * 2006. All rights reserved.
- *
- * Jason Jin <Jason.jin@freescale.com>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License
- * as published by the Free Software Foundation; either version
- * 2 of the License, or (at your option) any later version.
- *
- * partly derived from
- * arch/powerpc/platforms/86xx/mpc86xx_pcie.c
- */
-
-#include <common.h>
-
-#ifdef CONFIG_PCI
-
-#include <asm/processor.h>
-#include <asm/io.h>
-#include <pci.h>
-
-#define PCI_CFG_OUT out_be32
-#define PEX_FIX out_be32(hose->cfg_addr+0x4, 0x0400ffff)
-
-static int
-indirect_read_config_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- int len,
- u32 *val)
-{
- int bus = PCI_BUS(dev);
-
- volatile unsigned char *cfg_data;
- u32 temp;
-
- PEX_FIX;
- if (bus == 0xff) {
- PCI_CFG_OUT(hose->cfg_addr,
- dev | (offset & 0xfc) | 0x80000001);
- } else {
- PCI_CFG_OUT(hose->cfg_addr,
- dev | (offset & 0xfc) | 0x80000000);
- }
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- /* ERRATA PCI-Ex 12 - Configuration Address/Data Alignment */
- cfg_data = hose->cfg_data;
- PEX_FIX;
- temp = in_le32((u32 *) cfg_data);
- switch (len) {
- case 1:
- *val = (temp >> (((offset & 3)) * 8)) & 0xff;
- break;
- case 2:
- *val = (temp >> (((offset & 3)) * 8)) & 0xffff;
- break;
- default:
- *val = temp;
- break;
- }
-
- return 0;
-}
-
-static int
-indirect_write_config_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- int len,
- u32 val)
-{
- int bus = PCI_BUS(dev);
- volatile unsigned char *cfg_data;
- u32 temp;
-
- PEX_FIX;
- if (bus == 0xff) {
- PCI_CFG_OUT(hose->cfg_addr,
- dev | (offset & 0xfc) | 0x80000001);
- } else {
- PCI_CFG_OUT(hose->cfg_addr,
- dev | (offset & 0xfc) | 0x80000000);
- }
-
- /*
- * Note: the caller has already checked that offset is
- * suitably aligned and that len is 1, 2 or 4.
- */
- /* ERRATA PCI-Ex 12 - Configuration Address/Data Alignment */
- cfg_data = hose->cfg_data;
- switch (len) {
- case 1:
- PEX_FIX;
- temp = in_le32((u32 *) cfg_data);
- temp = (temp & ~(0xff << ((offset & 3) * 8))) |
- (val << ((offset & 3) * 8));
- PEX_FIX;
- out_le32((u32 *) cfg_data, temp);
- break;
- case 2:
- PEX_FIX;
- temp = in_le32((u32 *) cfg_data);
- temp = (temp & ~(0xffff << ((offset & 3) * 8)));
- temp |= (val << ((offset & 3) * 8));
- PEX_FIX;
- out_le32((u32 *) cfg_data, temp);
- break;
- default:
- PEX_FIX;
- out_le32((u32 *) cfg_data, val);
- break;
- }
- PEX_FIX;
- return 0;
-}
-
-static int
-indirect_read_config_byte_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- u8 *val)
-{
- u32 val32;
- indirect_read_config_pcie(hose, dev, offset, 1, &val32);
- *val = (u8) val32;
- return 0;
-}
-
-static int
-indirect_read_config_word_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- u16 *val)
-{
- u32 val32;
- indirect_read_config_pcie(hose, dev, offset, 2, &val32);
- *val = (u16) val32;
- return 0;
-}
-
-static int
-indirect_read_config_dword_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- u32 *val)
-{
- return indirect_read_config_pcie(hose, dev, offset, 4, val);
-}
-
-static int
-indirect_write_config_byte_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- u8 val)
-{
- return indirect_write_config_pcie(hose, dev, offset, 1, (u32) val);
-}
-
-static int
-indirect_write_config_word_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- unsigned short val)
-{
- return indirect_write_config_pcie(hose, dev, offset, 2, (u32) val);
-}
-
-static int
-indirect_write_config_dword_pcie(struct pci_controller *hose,
- pci_dev_t dev,
- int offset,
- u32 val)
-{
- return indirect_write_config_pcie(hose, dev, offset, 4, val);
-}
-
-void
-pcie_setup_indirect(struct pci_controller *hose, u32 cfg_addr, u32 cfg_data)
-{
- pci_set_ops(hose,
- indirect_read_config_byte_pcie,
- indirect_read_config_word_pcie,
- indirect_read_config_dword_pcie,
- indirect_write_config_byte_pcie,
- indirect_write_config_word_pcie,
- indirect_write_config_dword_pcie);
-
- hose->cfg_addr = (unsigned int *)cfg_addr;
- hose->cfg_data = (unsigned char *)cfg_data;
-}
-
-#endif /* CONFIG_PCI */
diff --git a/cpu/mpc86xx/resetvec.S b/cpu/mpc86xx/resetvec.S
deleted file mode 100644
index 9a552f6..0000000
--- a/cpu/mpc86xx/resetvec.S
+++ /dev/null
@@ -1,2 +0,0 @@
- .section .resetvec,"ax"
- b _start
diff --git a/cpu/mpc86xx/speed.c b/cpu/mpc86xx/speed.c
index 312ca12..23161ca 100644
--- a/cpu/mpc86xx/speed.c
+++ b/cpu/mpc86xx/speed.c
@@ -29,6 +29,7 @@
#include <mpc86xx.h>
#include <asm/processor.h>
+DECLARE_GLOBAL_DATA_PTR;
void get_sys_info(sys_info_t *sysInfo)
{
@@ -96,7 +97,6 @@
int get_clocks(void)
{
- DECLARE_GLOBAL_DATA_PTR;
sys_info_t sys_info;
get_sys_info(&sys_info);
diff --git a/cpu/mpc86xx/start.S b/cpu/mpc86xx/start.S
index 67c56db..c83310a 100644
--- a/cpu/mpc86xx/start.S
+++ b/cpu/mpc86xx/start.S
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
* Srikanth Srinivasan <srikanth.srinivaan@freescale.com>
*
* See file CREDITS for list of people who contributed to this
@@ -44,11 +44,9 @@
#define CONFIG_IDENT_STRING ""
#endif
-/* We don't want the MMU yet.
-*/
-#undef MSR_KERNEL
-/* Machine Check and Recoverable Interr. */
-#define MSR_KERNEL ( MSR_ME | MSR_RI )
+/*
+ * Need MSR_DR | MSR_IR enabled to access I/O (printf) in exceptions
+ */
/*
* Set up GOT: Global Offset Table
@@ -116,7 +114,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -134,7 +132,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
@@ -195,17 +193,21 @@
bl secondary_cpu_setup
#endif
+1:
+#ifdef CFG_RAMBOOT
/* disable everything */
-1: li r0, 0
+ li r0, 0
mtspr HID0, r0
sync
mtmsr 0
+#endif
+
bl invalidate_bats
sync
#ifdef CFG_L2
/* init the L2 cache */
- addis r3, r0, L2_INIT@h
+ lis r3, L2_INIT@h
ori r3, r3, L2_INIT@l
mtspr l2cr, r3
/* invalidate the L2 cache */
@@ -241,69 +243,9 @@
bl setup_ccsrbar
#endif
-
- /* -- MPC8641 Rev 1.0 MCM Errata fixups -- */
-
- /* skip fixups if not Rev 1.0 */
- mfspr r4, SVR
- rlwinm r4,r4,0,24,31
- cmpwi r4,0x10
- bne 1f
-
- lis r3,MCM_ABCR@ha
- lwz r4,MCM_ABCR@l(r3) /* ABCR -> r4 */
-
- /* set ABCR[A_STRM_CNT] = 0 */
- rlwinm r4,r4,0,0,29
-
- /* set ABCR[ARB_POLICY] to 0x1 (round-robin) */
- addi r0,r0,1
- rlwimi r4,r0,12,18,19
-
- stw r4,MCM_ABCR@l(r3) /* r4 -> ABCR */
- sync
-
- /* Set DBCR[ERD_DIS] */
- lis r3,MCM_DBCR@ha
- lwz r4,MCM_DBCR@l(r3)
- oris r4, r4, 0x4000
- stw r4,MCM_DBCR@l(r3)
- sync
-1:
/* setup the law entries */
bl law_entry
sync
-
-
-#if (EMULATOR_RUN == 1)
- /* On the emulator we want to adjust these ASAP */
- /* otherwise things are sloooow */
- /* Setup OR0 (LALE FIX)*/
- lis r3, CFG_CCSRBAR@h
- ori r3, r3, 0x5004
- li r4, 0x0FF3
- stw r4, 0(r3)
- sync
-
- /* Setup LCRR */
- lis r3, CFG_CCSRBAR@h
- ori r3, r3, 0x50D4
- lis r4, 0x8000
- ori r4, r4, 0x0002
- stw r4, 0(r3)
- sync
-#endif
-#if 1
- /* make sure timer enabled in guts register too */
- lis r3, CFG_CCSRBAR@h
- oris r3,r3, 0xE
- ori r3,r3,0x0070
- lwz r4, 0(r3)
- lis r5,0xFFFC
- ori r5,r5,0x5FFF
- and r4,r4,r5
- stw r4,0(r3)
-#endif
/*
* Cache must be enabled here for stack-in-cache trick.
* This means we need to enable the BATS.
@@ -346,8 +288,6 @@
#ifdef RUN_DIAG
- /* Sri: Code to run the diagnostic automatically */
-
/* Load PX_AUX register address in r4 */
lis r4, 0xf810
ori r4, r4, 0x6
@@ -392,6 +332,7 @@
.globl invalidate_bats
invalidate_bats:
+ li r0, 0
/* invalidate BATs */
mtspr IBAT0U, r0
mtspr IBAT1U, r0
@@ -1040,6 +981,7 @@
mfmsr r7
li r8,MSR_IP
andc r7,r7,r8
+ ori r7,r7,MSR_ME /* Enable Machine Check */
mtmsr r7
mtlr r4 /* restore link register */
@@ -1224,8 +1166,9 @@
sync
isync
- /*SYNCBE|ABE in HID1*/
+ /* MCP|SYNCBE|ABE in HID1 */
mfspr r4, HID1
+ oris r4, r4, 0x8000
ori r4, r4, 0x0C00
mtspr HID1, r4
sync
diff --git a/cpu/mpc86xx/traps.c b/cpu/mpc86xx/traps.c
index 8ea14e5..04c2e13 100644
--- a/cpu/mpc86xx/traps.c
+++ b/cpu/mpc86xx/traps.c
@@ -34,7 +34,9 @@
#include <command.h>
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -50,8 +52,6 @@
void
print_backtrace(unsigned long *sp)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int cnt = 0;
unsigned long i;
@@ -122,7 +122,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler) (regs))
return;
#endif
@@ -130,8 +130,11 @@
printf("Machine check in kernel mode.\n");
printf("Caused by (from msr): ");
printf("regs %p ", regs);
- switch (regs->msr & 0x000F0000) {
- case (0x80000000 >> 12):
+ switch ( regs->msr & 0x001F0000) {
+ case (0x80000000>>11):
+ printf("MSS error. MSSSR0: %08x\n", mfspr(SPRN_MSSSR0));
+ break;
+ case (0x80000000>>12):
printf("Machine check signal - probably due to mm fault\n"
"with mmu off\n");
break;
@@ -155,7 +158,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler) (regs))
return;
#endif
@@ -170,7 +173,7 @@
unsigned char *p = regs ? (unsigned char *)(regs->nip) : NULL;
int i, j;
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler) (regs))
return;
#endif
@@ -193,7 +196,7 @@
void
SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler) (regs))
return;
#endif
@@ -205,10 +208,11 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler) (regs))
return;
#endif
+ printf("UnknownException regs@%x\n", regs);
printf("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
regs->nip, regs->msr, regs->trap);
_exception(0, regs);
diff --git a/cpu/mpc8xx/bedbug_860.c b/cpu/mpc8xx/bedbug_860.c
index e91a100..5d52366 100644
--- a/cpu/mpc8xx/bedbug_860.c
+++ b/cpu/mpc8xx/bedbug_860.c
@@ -10,7 +10,7 @@
#include <bedbug/ppc.h>
#include <bedbug/type.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_8xx)
+#if defined(CONFIG_CMD_BEDBUG) && defined(CONFIG_8xx)
#define MAX_BREAK_POINTS 2
diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c
index 6d2755e..08a3715 100644
--- a/cpu/mpc8xx/fec.c
+++ b/cpu/mpc8xx/fec.c
@@ -31,7 +31,7 @@
#undef ET_DEBUG
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && \
+#if defined(CONFIG_CMD_NET) && \
(defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FEC1) || defined(CONFIG_ETHER_ON_FEC2))
/* compatibility test, if only FEC_ENET defined assume ETHER on FEC1 */
@@ -49,7 +49,7 @@
#if defined(WANT_MII)
#include <miiphy.h>
-#if !(defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII))
+#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
#error "CONFIG_MII has to be defined!"
#endif
@@ -182,7 +182,7 @@
eth_register(dev);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register(dev->name,
fec8xx_miiphy_read, fec8xx_miiphy_write);
#endif
@@ -268,7 +268,7 @@
length -= 4;
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
if ((rx[0] & 1) != 0
&& memcmp ((uchar *) rx, NetBcastAddr, 6) != 0
&& memcmp ((uchar *) rx, NetCDPAddr, 6) != 0)
@@ -608,7 +608,7 @@
fecp->fec_addr_high = (ea[4] << 8) | (ea[5]);
#undef ea
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
/*
* Turn on multicast address hash table
*/
@@ -787,7 +787,7 @@
efis->initialized = 0;
}
-#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CFG_DISCOVER_PHY) || defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
/* Make MII read/write commands for the FEC.
*/
@@ -852,7 +852,7 @@
#endif
return (mii_reply & 0xffff); /* data read from phy */
}
-#endif /* CFG_DISCOVER_PHY || (CONFIG_COMMANDS & CFG_CMD_MII) */
+#endif
#if defined(CFG_DISCOVER_PHY)
static int mii_discover_phy(struct eth_device *dev)
@@ -926,7 +926,7 @@
}
#endif /* CFG_DISCOVER_PHY */
-#if (defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)) && !defined(CONFIG_BITBANGMII)
+#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII)) && !defined(CONFIG_BITBANGMII)
/****************************************************************************
* mii_init -- Initialize the MII for MII command without ethernet
@@ -1020,6 +1020,6 @@
#endif
return 0;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_MII) && !defined(CONFIG_BITBANGMII)*/
+#endif
-#endif /* CFG_CMD_NET, FEC_ENET */
+#endif
diff --git a/cpu/mpc8xx/kgdb.S b/cpu/mpc8xx/kgdb.S
index 11c3c69..812baa3 100644
--- a/cpu/mpc8xx/kgdb.S
+++ b/cpu/mpc8xx/kgdb.S
@@ -34,7 +34,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
/*
* cache flushing routines for kgdb
@@ -71,4 +71,4 @@
SYNC
blr
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c
index 6b9110f..744dcdd 100644
--- a/cpu/mpc8xx/scc.c
+++ b/cpu/mpc8xx/scc.c
@@ -38,7 +38,7 @@
#include <net.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(SCC_ENET)
+#if defined(CONFIG_CMD_NET) && defined(SCC_ENET)
/* Ethernet Transmit and Receive Buffers */
#define DBUF_LENGTH 1520
@@ -567,4 +567,4 @@
(SCC_GSMRL_ENR | SCC_GSMRL_ENT);
}
#endif
-#endif /* CFG_CMD_NET, SCC_ENET */
+#endif
diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c
index ffc898c..68804cc 100644
--- a/cpu/mpc8xx/serial.c
+++ b/cpu/mpc8xx/serial.c
@@ -666,7 +666,7 @@
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
void
kgdb_serial_init(void)
@@ -723,6 +723,6 @@
{
return;
}
-#endif /* CFG_CMD_KGDB */
+#endif
#endif /* CONFIG_8xx_CONS_NONE */
diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S
index 33a3f6c..eca4b50 100644
--- a/cpu/mpc8xx/start.S
+++ b/cpu/mpc8xx/start.S
@@ -224,7 +224,7 @@
/* Alignment exception. */
. = 0x600
Alignment:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
mfspr r4,DAR
stw r4,_DAR(r21)
mfspr r5,DSISR
@@ -242,7 +242,7 @@
/* Program check exception */
. = 0x700
ProgramCheck:
- EXCEPTION_PROLOG
+ EXCEPTION_PROLOG(SRR0, SRR1)
addi r3,r1,STACK_FRAME_OVERHEAD
li r20,MSR_KERNEL
rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
diff --git a/cpu/mpc8xx/traps.c b/cpu/mpc8xx/traps.c
index 67b75cc..e1ec889 100644
--- a/cpu/mpc8xx/traps.c
+++ b/cpu/mpc8xx/traps.c
@@ -36,11 +36,11 @@
#include <command.h>
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -126,7 +126,7 @@
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -159,7 +159,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -171,7 +171,7 @@
void
ProgramCheckException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -183,7 +183,7 @@
void
SoftEmuException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -196,7 +196,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -210,7 +210,7 @@
{
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
diff --git a/cpu/nios/cpu.c b/cpu/nios/cpu.c
index d2bb2c0..5519e82 100644
--- a/cpu/nios/cpu.c
+++ b/cpu/nios/cpu.c
@@ -34,7 +34,7 @@
/* Get cpu version info */
val = rdctl (CTL_CPU_ID);
- printf ("CPU: ");
+ puts ("CPU: ");
printf ("%s", (val & 0x00008000) ? "Nios-16 " : "Nios-32 ");
rev_major = (val>>12) & 0x07;
rev_minor = (val>>4) & 0x0ff;
diff --git a/cpu/nios/interrupts.c b/cpu/nios/interrupts.c
index 48fc81e..75e491d 100644
--- a/cpu/nios/interrupts.c
+++ b/cpu/nios/interrupts.c
@@ -173,7 +173,7 @@
}
/*************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int vec;
@@ -193,4 +193,4 @@
return (0);
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/nios2/interrupts.c b/cpu/nios2/interrupts.c
index 4685161..aeb5b65 100644
--- a/cpu/nios2/interrupts.c
+++ b/cpu/nios2/interrupts.c
@@ -204,7 +204,7 @@
/*************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
{
int i;
@@ -228,4 +228,4 @@
return (0);
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c
index 7134355..282e7a1 100644
--- a/cpu/ppc4xx/405gp_pci.c
+++ b/cpu/ppc4xx/405gp_pci.c
@@ -77,11 +77,21 @@
#include <asm/processor.h>
#include <pci.h>
+#ifdef CONFIG_PCI
+
DECLARE_GLOBAL_DATA_PTR;
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
+/*
+ * Board-specific pci initialization
+ * Platform code can reimplement pci_pre_init() if needed
+ */
+int __pci_pre_init(struct pci_controller *hose)
+{
+ return 1;
+}
+int pci_pre_init(struct pci_controller *hose) __attribute__((weak, alias("__pci_pre_init")));
-#ifdef CONFIG_PCI
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
#if defined(CONFIG_PMC405)
ushort pmc405_pci_subsys_deviceid(void);
@@ -191,6 +201,13 @@
if (hose->pci_fb)
pciauto_region_init(hose->pci_fb);
+ /* Let board change/modify hose & do initial checks */
+ if (pci_pre_init (hose) == 0) {
+ printf("PCI: Board-specific initialization failed.\n");
+ printf("PCI: Configuration aborted.\n");
+ return;
+ }
+
pci_register_hose(hose);
/*--------------------------------------------------------------------------+
@@ -380,7 +397,7 @@
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
}
-#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) && !(defined (CONFIG_SOLIDCARD3))
+#if !(defined(CONFIG_PIP405) || defined (CONFIG_MIP405)) && !(defined (CONFIG_SC3))
/*
*As is these functs get called out of flash Not a horrible
@@ -416,19 +433,17 @@
#endif
-#endif /* CONFIG_PCI */
-
#endif /* CONFIG_405GP */
/*-----------------------------------------------------------------------------+
* CONFIG_440
*-----------------------------------------------------------------------------*/
-#if defined(CONFIG_440) && defined(CONFIG_PCI)
+#if defined(CONFIG_440)
static struct pci_controller ppc440_hose = {0};
-void pci_440_init (struct pci_controller *hose)
+int pci_440_init (struct pci_controller *hose)
{
int reg_num = 0;
@@ -444,7 +459,7 @@
if ((strap & SDR0_SDSTP1_PISE_MASK) == 0) {
printf("PCI: SDR0_STRP1[PISE] not set.\n");
printf("PCI: Configuration aborted.\n");
- return;
+ return -1;
}
#elif defined(CONFIG_440GP)
unsigned long strap;
@@ -453,7 +468,7 @@
if ((strap & CPC0_STRP1_PISE_MASK) == 0) {
printf("PCI: CPC0_STRP1[PISE] not set.\n");
printf("PCI: Configuration aborted.\n");
- return;
+ return -1;
}
#endif
#endif /* CONFIG_DISABLE_PISE_TEST */
@@ -462,7 +477,7 @@
* PCI controller init
*--------------------------------------------------------------------------*/
hose->first_busno = 0;
- hose->last_busno = 0xff;
+ hose->last_busno = 0;
/* PCI I/O space */
pci_set_region(hose->regions + reg_num++,
@@ -496,14 +511,12 @@
pci_setup_indirect(hose, PCIX0_CFGADR, PCIX0_CFGDATA);
-#if defined(CFG_PCI_PRE_INIT)
/* Let board change/modify hose & do initial checks */
if (pci_pre_init (hose) == 0) {
printf("PCI: Board-specific initialization failed.\n");
printf("PCI: Configuration aborted.\n");
- return;
+ return -1;
}
-#endif
pci_register_hose( hose );
@@ -565,14 +578,18 @@
#endif
hose->last_busno = pci_hose_scan(hose);
}
+ return hose->last_busno;
}
void pci_init_board(void)
{
- pci_440_init (&ppc440_hose);
+ int busno;
+
+ busno = pci_440_init (&ppc440_hose);
#if defined(CONFIG_440SPE)
- pcie_setup_hoses();
+ pcie_setup_hoses(busno + 1);
#endif
}
-#endif /* CONFIG_440 & CONFIG_PCI */
+#endif /* CONFIG_440 */
+#endif /* CONFIG_PCI */
diff --git a/cpu/ppc4xx/440spe_pcie.c b/cpu/ppc4xx/440spe_pcie.c
index d6c4be5..158f1c5 100644
--- a/cpu/ppc4xx/440spe_pcie.c
+++ b/cpu/ppc4xx/440spe_pcie.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2006
+ * (C) Copyright 2006 - 2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* Copyright (c) 2005 Cisco Systems. All rights reserved.
@@ -40,19 +40,81 @@
LNKW_X8 = 0x8
};
+static u8* pcie_get_base(struct pci_controller *hose, unsigned int devfn)
+{
+ u8 *base = (u8*)hose->cfg_data;
+
+ /* use local configuration space for the first bus */
+ if (PCI_BUS(devfn) == 0) {
+ if (hose->cfg_data == (u8*)CFG_PCIE0_CFGBASE)
+ base = (u8*)CFG_PCIE0_XCFGBASE;
+ if (hose->cfg_data == (u8*)CFG_PCIE1_CFGBASE)
+ base = (u8*)CFG_PCIE1_XCFGBASE;
+ if (hose->cfg_data == (u8*)CFG_PCIE2_CFGBASE)
+ base = (u8*)CFG_PCIE2_XCFGBASE;
+ }
+
+ return base;
+}
+
+static void pcie_dmer_disable(void)
+{
+ mtdcr (DCRN_PEGPL_CFG(DCRN_PCIE0_BASE),
+ mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE0_BASE)) | GPL_DMER_MASK_DISA);
+ mtdcr (DCRN_PEGPL_CFG(DCRN_PCIE1_BASE),
+ mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE1_BASE)) | GPL_DMER_MASK_DISA);
+ mtdcr (DCRN_PEGPL_CFG(DCRN_PCIE2_BASE),
+ mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE2_BASE)) | GPL_DMER_MASK_DISA);
+}
+
+static void pcie_dmer_enable(void)
+{
+ mtdcr (DCRN_PEGPL_CFG (DCRN_PCIE0_BASE),
+ mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE0_BASE)) & ~GPL_DMER_MASK_DISA);
+ mtdcr (DCRN_PEGPL_CFG (DCRN_PCIE1_BASE),
+ mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE1_BASE)) & ~GPL_DMER_MASK_DISA);
+ mtdcr (DCRN_PEGPL_CFG (DCRN_PCIE2_BASE),
+ mfdcr (DCRN_PEGPL_CFG(DCRN_PCIE2_BASE)) & ~GPL_DMER_MASK_DISA);
+}
+
static int pcie_read_config(struct pci_controller *hose, unsigned int devfn,
int offset, int len, u32 *val) {
+ u8 *address;
*val = 0;
+
/*
- * 440SPE implements only one function per port
+ * Bus numbers are relative to hose->first_busno
*/
- if (!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 1)))
+ devfn -= PCI_BDF(hose->first_busno, 0, 0);
+
+ /*
+ * NOTICE: configuration space ranges are currenlty mapped only for
+ * the first 16 buses, so such limit must be imposed. In case more
+ * buses are required the TLB settings in board/amcc/<board>/init.S
+ * need to be altered accordingly (one bus takes 1 MB of memory space).
+ */
+ if (PCI_BUS(devfn) >= 16)
return 0;
- devfn = PCI_BDF(0,0,0);
+ /*
+ * Only single device/single function is supported for the primary and
+ * secondary buses of the 440SPe host bridge.
+ */
+ if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) &&
+ ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1)))
+ return 0;
+
+ address = pcie_get_base(hose, devfn);
offset += devfn << 4;
+ /*
+ * Reading from configuration space of non-existing device can
+ * generate transaction errors. For the read duration we suppress
+ * assertion of machine check exceptions to avoid those.
+ */
+ pcie_dmer_disable ();
+
switch (len) {
case 1:
*val = in_8(hose->cfg_data + offset);
@@ -61,24 +123,43 @@
*val = in_le16((u16 *)(hose->cfg_data + offset));
break;
default:
- *val = in_le32((u32 *)(hose->cfg_data + offset));
+ *val = in_le32((u32*)(hose->cfg_data + offset));
break;
}
+
+ pcie_dmer_enable ();
+
return 0;
}
static int pcie_write_config(struct pci_controller *hose, unsigned int devfn,
int offset, int len, u32 val) {
+ u8 *address;
+
/*
- * 440SPE implements only one function per port
+ * Bus numbers are relative to hose->first_busno
*/
- if (!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 1)))
+ devfn -= PCI_BDF(hose->first_busno, 0, 0);
+
+ /*
+ * Same constraints as in pcie_read_config().
+ */
+ if (PCI_BUS(devfn) >= 16)
return 0;
- devfn = PCI_BDF(0,0,0);
+ if ((!((PCI_FUNC(devfn) == 0) && (PCI_DEV(devfn) == 0))) &&
+ ((PCI_BUS(devfn) == 0) || (PCI_BUS(devfn) == 1)))
+ return 0;
+
+ address = pcie_get_base(hose, devfn);
offset += devfn << 4;
+ /*
+ * Suppress MCK exceptions, similar to pcie_read_config()
+ */
+ pcie_dmer_disable ();
+
switch (len) {
case 1:
out_8(hose->cfg_data + offset, val);
@@ -90,6 +171,9 @@
out_le32((u32 *)(hose->cfg_data + offset), val);
break;
}
+
+ pcie_dmer_enable ();
+
return 0;
}
@@ -98,7 +182,7 @@
u32 v;
int rv;
- rv = pcie_read_config(hose, dev, offset, 1, &v);
+ rv = pcie_read_config(hose, dev, offset, 1, &v);
*val = (u8)v;
return rv;
}
@@ -755,12 +839,12 @@
volatile void *rmbase = NULL;
pci_set_ops(hose,
- pcie_read_config_byte,
- pcie_read_config_word,
- pcie_read_config_dword,
- pcie_write_config_byte,
- pcie_write_config_word,
- pcie_write_config_dword);
+ pcie_read_config_byte,
+ pcie_read_config_word,
+ pcie_read_config_dword,
+ pcie_write_config_byte,
+ pcie_write_config_word,
+ pcie_write_config_dword);
switch (port) {
case 0:
@@ -842,6 +926,29 @@
in_le16((u16 *)(mbase + PCI_COMMAND)) |
PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
printf("PCIE:%d successfully set as rootpoint\n",port);
+
+ /* Set Device and Vendor Id */
+ switch (port) {
+ case 0:
+ out_le16(mbase + 0x200, 0xaaa0);
+ out_le16(mbase + 0x202, 0xbed0);
+ break;
+ case 1:
+ out_le16(mbase + 0x200, 0xaaa1);
+ out_le16(mbase + 0x202, 0xbed1);
+ break;
+ case 2:
+ out_le16(mbase + 0x200, 0xaaa2);
+ out_le16(mbase + 0x202, 0xbed2);
+ break;
+ default:
+ out_le16(mbase + 0x200, 0xaaa3);
+ out_le16(mbase + 0x202, 0xbed3);
+ }
+
+ /* Set Class Code to PCI-PCI bridge and Revision Id to 1 */
+ out_le32(mbase + 0x208, 0x06040001);
+
}
int ppc440spe_setup_pcie_endpoint(struct pci_controller *hose, int port)
@@ -919,8 +1026,8 @@
/* Enable I/O, Mem, and Busmaster cycles */
out_le16((u16 *)(mbase + PCI_COMMAND),
- in_le16((u16 *)(mbase + PCI_COMMAND)) |
- PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
+ in_le16((u16 *)(mbase + PCI_COMMAND)) |
+ PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
out_le16(mbase + 0x200,0xcaad); /* Setting vendor ID */
out_le16(mbase + 0x202,0xfeed); /* Setting device ID */
attempts = 10;
diff --git a/cpu/ppc4xx/440spe_pcie.h b/cpu/ppc4xx/440spe_pcie.h
index 2becc77..38745eb 100644
--- a/cpu/ppc4xx/440spe_pcie.h
+++ b/cpu/ppc4xx/440spe_pcie.h
@@ -38,6 +38,7 @@
#define DCRN_PEGPL_REGBAL(base) (base + 0x13)
#define DCRN_PEGPL_REGMSK(base) (base + 0x14)
#define DCRN_PEGPL_SPECIAL(base) (base + 0x15)
+#define DCRN_PEGPL_CFG(base) (base + 0x16)
/*
* System DCRs (SDRs)
@@ -145,8 +146,8 @@
#define PECFG_PIMEN 0x33c
#define PECFG_PIM0LAL 0x340
#define PECFG_PIM0LAH 0x344
-#define PECFG_PIM1LAL 0x348
-#define PECFG_PIM1LAH 0x34c
+#define PECFG_PIM1LAL 0x348
+#define PECFG_PIM1LAH 0x34c
#define PECFG_PIM01SAL 0x350
#define PECFG_PIM01SAH 0x354
@@ -161,6 +162,8 @@
mtdcr(DCRN_SDR0_CFGADDR, offset); \
mtdcr(DCRN_SDR0_CFGDATA,data);})
+#define GPL_DMER_MASK_DISA 0x02000000
+
int ppc440spe_init_pcie(void);
int ppc440spe_init_pcie_rootport(int port);
void yucca_setup_pcie_fpga_rootpoint(int port);
diff --git a/cpu/ppc4xx/44x_spd_ddr.c b/cpu/ppc4xx/44x_spd_ddr.c
index 10b4c18..4a4c6f2 100644
--- a/cpu/ppc4xx/44x_spd_ddr.c
+++ b/cpu/ppc4xx/44x_spd_ddr.c
@@ -20,7 +20,7 @@
* Jun Gu, Artesyn Technology, jung@artesyncp.com
* Support for AMCC 440 based on OpenBIOS draminit.c from IBM.
*
- * (C) Copyright 2005
+ * (C) Copyright 2005-2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -42,6 +42,11 @@
* MA 02111-1307 USA
*/
+/* define DEBUG for debugging output (obviously ;-)) */
+#if 0
+#define DEBUG
+#endif
+
#include <common.h>
#include <asm/processor.h>
#include <i2c.h>
@@ -65,6 +70,15 @@
#define ONE_BILLION 1000000000
+/*
+ * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
+ */
+void __spd_ddr_init_hang (void)
+{
+ hang ();
+}
+void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang")));
+
/*-----------------------------------------------------------------------------
| Memory Controller Options 0
+-----------------------------------------------------------------------------*/
@@ -246,25 +260,6 @@
#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
#endif
-const unsigned long test[NUMMEMTESTS][NUMMEMWORDS] = {
- {0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
- 0xFFFFFFFF, 0xFFFFFFFF},
- {0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
- 0x00000000, 0x00000000},
- {0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
- 0x55555555, 0x55555555},
- {0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
- 0xAAAAAAAA, 0xAAAAAAAA},
- {0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
- 0x5A5A5A5A, 0x5A5A5A5A},
- {0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
- 0xA5A5A5A5, 0xA5A5A5A5},
- {0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
- 0x55AA55AA, 0x55AA55AA},
- {0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
- 0xAA55AA55, 0xAA55AA55}
-};
-
/* bank_parms is used to sort the bank sizes by descending order */
struct bank_param {
unsigned long cr;
@@ -274,50 +269,40 @@
typedef struct bank_param BANKPARMS;
#ifdef CFG_SIMULATE_SPD_EEPROM
-extern unsigned char cfg_simulate_spd_eeprom[128];
+extern const unsigned char cfg_simulate_spd_eeprom[128];
#endif
-void program_tlb(u32 start, u32 size, u32 tlb_word2_i_value);
-unsigned char spd_read(uchar chip, uint addr);
+static unsigned char spd_read(uchar chip, uint addr);
+static void get_spd_info(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void check_mem_type(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void check_volt_type(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void program_cfg0(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void program_cfg1(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void program_rtr(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void program_tr0(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
+static void program_tr1(void);
-void get_spd_info(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
+#ifdef CONFIG_DDR_ECC
+static void program_ecc(unsigned long num_bytes);
+#endif
-void check_mem_type
-(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
-
-void check_volt_type
-(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
-
-void program_cfg0(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
-
-void program_cfg1(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
-
-void program_rtr (unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
-
-void program_tr0 (unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
-
-void program_tr1 (void);
-
-void program_ecc (unsigned long num_bytes);
-
-unsigned
-long program_bxcr(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks);
+static unsigned long program_bxcr(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks);
/*
* This function is reading data from the DIMM module EEPROM over the SPD bus
@@ -328,7 +313,6 @@
* BUG: Don't handle ECC memory
* BUG: A few values in the TR register is currently hardcoded
*/
-
long int spd_sdram(void) {
unsigned char iic0_dimm_addr[] = SPD_EEPROM_ADDRESS;
unsigned long dimm_populated[sizeof(iic0_dimm_addr)];
@@ -397,7 +381,7 @@
#ifdef CONFIG_PROG_SDRAM_TLB /* this define should eventually be removed */
/* and program tlb entries for this size (dynamic) */
- program_tlb(0, total_size, MY_TLB_WORD2_I_ENABLE);
+ program_tlb(0, 0, total_size, MY_TLB_WORD2_I_ENABLE);
#endif
/*
@@ -421,9 +405,8 @@
*/
while (1) {
mfsdram(mem_mcsts, mcsts);
- if ((mcsts & SDRAM_MCSTS_MRSC) != 0) {
+ if ((mcsts & SDRAM_MCSTS_MRSC) != 0)
break;
- }
}
/*
@@ -431,14 +414,17 @@
*/
program_tr1();
+#ifdef CONFIG_DDR_ECC
/*
- * if ECC is enabled, initialize parity bits
+ * If ecc is enabled, initialize the parity bits.
*/
+ program_ecc(total_size);
+#endif
return total_size;
}
-unsigned char spd_read(uchar chip, uint addr)
+static unsigned char spd_read(uchar chip, uint addr)
{
unsigned char data[2];
@@ -460,9 +446,9 @@
return 0;
}
-void get_spd_info(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void get_spd_info(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned long dimm_found;
@@ -480,26 +466,22 @@
if ((num_of_bytes != 0) && (total_size != 0)) {
dimm_populated[dimm_num] = TRUE;
dimm_found = TRUE;
-#if 0
- printf("DIMM slot %lu: populated\n", dimm_num);
-#endif
+ debug("DIMM slot %lu: populated\n", dimm_num);
} else {
dimm_populated[dimm_num] = FALSE;
-#if 0
- printf("DIMM slot %lu: Not populated\n", dimm_num);
-#endif
+ debug("DIMM slot %lu: Not populated\n", dimm_num);
}
}
if (dimm_found == FALSE) {
printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
-void check_mem_type(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void check_mem_type(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned char dimm_type;
@@ -509,26 +491,23 @@
dimm_type = spd_read(iic0_dimm_addr[dimm_num], 2);
switch (dimm_type) {
case 7:
-#if 0
- printf("DIMM slot %lu: DDR SDRAM detected\n", dimm_num);
-#endif
+ debug("DIMM slot %lu: DDR SDRAM detected\n", dimm_num);
break;
default:
printf("ERROR: Unsupported DIMM detected in slot %lu.\n",
dimm_num);
printf("Only DDR SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
}
}
}
}
-
-void check_volt_type(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void check_volt_type(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned long voltage_type;
@@ -539,20 +518,18 @@
if (voltage_type != 0x04) {
printf("ERROR: DIMM %lu with unsupported voltage level.\n",
dimm_num);
- hang();
+ spd_ddr_init_hang ();
} else {
-#if 0
- printf("DIMM %lu voltage level supported.\n", dimm_num);
-#endif
+ debug("DIMM %lu voltage level supported.\n", dimm_num);
}
break;
}
}
}
-void program_cfg0(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void program_cfg0(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned long cfg0;
@@ -612,7 +589,7 @@
printf("WARNING: DIMM with datawidth of %lu bits.\n",
data_width);
printf("Only DIMMs with 32 or 64 bit datawidths supported.\n");
- hang();
+ spd_ddr_init_hang ();
}
break;
}
@@ -640,9 +617,9 @@
mtsdram(mem_cfg0, cfg0);
}
-void program_cfg1(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void program_cfg1(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long cfg1;
mfsdram(mem_cfg1, cfg1);
@@ -658,9 +635,9 @@
mtsdram(mem_cfg1, cfg1);
}
-void program_rtr (unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void program_rtr(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned long bus_period_x_10;
@@ -676,7 +653,6 @@
get_sys_info(&sys_info);
bus_period_x_10 = ONE_BILLION / (sys_info.freqPLB / 10);
-
for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) {
if (dimm_populated[dimm_num] == TRUE) {
refresh_rate_type = 0x7F & spd_read(iic0_dimm_addr[dimm_num], 12);
@@ -719,9 +695,9 @@
mtsdram(mem_rtr, sdram_rtr);
}
-void program_tr0 (unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static void program_tr0(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned long tr0;
@@ -801,7 +777,7 @@
if ((tcyc_reg & 0x0F) >= 10) {
printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n",
dimm_num);
- hang();
+ spd_ddr_init_hang ();
}
cycle_time_ns_x_10[cas_index] =
@@ -881,7 +857,7 @@
printf("ERROR: No supported CAS latency with the installed DIMMs.\n");
printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n");
printf("Make sure the PLB speed is within the supported range.\n");
- hang();
+ spd_ddr_init_hang ();
}
/*
@@ -1001,13 +977,74 @@
break;
}
-#if 0
- printf("tr0: %x\n", tr0);
-#endif
+ debug("tr0: %x\n", tr0);
mtsdram(mem_tr0, tr0);
}
-void program_tr1 (void)
+static int short_mem_test(void)
+{
+ unsigned long i, j;
+ unsigned long bxcr_num;
+ unsigned long *membase;
+ const unsigned long test[NUMMEMTESTS][NUMMEMWORDS] = {
+ {0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF,
+ 0x00000000, 0x00000000, 0xFFFFFFFF, 0xFFFFFFFF},
+ {0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000,
+ 0xFFFFFFFF, 0xFFFFFFFF, 0x00000000, 0x00000000},
+ {0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555,
+ 0xAAAAAAAA, 0xAAAAAAAA, 0x55555555, 0x55555555},
+ {0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA,
+ 0x55555555, 0x55555555, 0xAAAAAAAA, 0xAAAAAAAA},
+ {0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
+ 0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A},
+ {0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
+ 0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5},
+ {0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
+ 0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA},
+ {0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
+ 0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55}};
+
+ for (bxcr_num = 0; bxcr_num < MAXBXCR; bxcr_num++) {
+ mtdcr(memcfga, mem_b0cr + (bxcr_num << 2));
+ if ((mfdcr(memcfgd) & SDRAM_BXCR_SDBE) == SDRAM_BXCR_SDBE) {
+ /* Bank is enabled */
+ membase = (unsigned long*)
+ (mfdcr(memcfgd) & SDRAM_BXCR_SDBA_MASK);
+
+ /*
+ * Run the short memory test
+ */
+ for (i = 0; i < NUMMEMTESTS; i++) {
+ for (j = 0; j < NUMMEMWORDS; j++) {
+ /* printf("bank enabled base:%x\n", &membase[j]); */
+ membase[j] = test[i][j];
+ ppcDcbf((unsigned long)&(membase[j]));
+ }
+
+ for (j = 0; j < NUMMEMWORDS; j++) {
+ if (membase[j] != test[i][j]) {
+ ppcDcbf((unsigned long)&(membase[j]));
+ return 0;
+ }
+ ppcDcbf((unsigned long)&(membase[j]));
+ }
+
+ if (j < NUMMEMWORDS)
+ return 0;
+ }
+
+ /*
+ * see if the rdclt value passed
+ */
+ if (i < NUMMEMTESTS)
+ return 0;
+ }
+ }
+
+ return 1;
+}
+
+static void program_tr1(void)
{
unsigned long tr0;
unsigned long tr1;
@@ -1015,8 +1052,7 @@
unsigned long ecc_temp;
unsigned long dlycal;
unsigned long dly_val;
- unsigned long i, j, k;
- unsigned long bxcr_num;
+ unsigned long k;
unsigned long max_pass_length;
unsigned long current_pass_length;
unsigned long current_fail_length;
@@ -1029,7 +1065,6 @@
unsigned char window_found;
unsigned char fail_found;
unsigned char pass_found;
- unsigned long * membase;
PPC440_SYS_INFO sys_info;
/*
@@ -1079,55 +1114,16 @@
window_found = FALSE;
fail_found = FALSE;
pass_found = FALSE;
-#ifdef DEBUG
- printf("Starting memory test ");
-#endif
+ debug("Starting memory test ");
+
for (k = 0; k < NUMHALFCYCLES; k++) {
- for (rdclt = 0; rdclt < dly_val; rdclt++) {
+ for (rdclt = 0; rdclt < dly_val; rdclt++) {
/*
* Set the timing reg for the test.
*/
mtsdram(mem_tr1, (tr1 | SDRAM_TR1_RDCT_ENCODE(rdclt)));
- for (bxcr_num = 0; bxcr_num < MAXBXCR; bxcr_num++) {
- mtdcr(memcfga, mem_b0cr + (bxcr_num<<2));
- if ((mfdcr(memcfgd) & SDRAM_BXCR_SDBE) == SDRAM_BXCR_SDBE) {
- /* Bank is enabled */
- membase = (unsigned long*)
- (mfdcr(memcfgd) & SDRAM_BXCR_SDBA_MASK);
-
- /*
- * Run the short memory test
- */
- for (i = 0; i < NUMMEMTESTS; i++) {
- for (j = 0; j < NUMMEMWORDS; j++) {
- membase[j] = test[i][j];
- ppcDcbf((unsigned long)&(membase[j]));
- }
-
- for (j = 0; j < NUMMEMWORDS; j++) {
- if (membase[j] != test[i][j]) {
- ppcDcbf((unsigned long)&(membase[j]));
- break;
- }
- ppcDcbf((unsigned long)&(membase[j]));
- }
-
- if (j < NUMMEMWORDS) {
- break;
- }
- }
-
- /*
- * see if the rdclt value passed
- */
- if (i < NUMMEMTESTS) {
- break;
- }
- }
- }
-
- if (bxcr_num == MAXBXCR) {
+ if (short_mem_test()) {
if (fail_found == TRUE) {
pass_found = TRUE;
if (current_pass_length == 0) {
@@ -1157,9 +1153,8 @@
}
}
}
-#ifdef DEBUG
- printf(".");
-#endif
+ debug(".");
+
if (window_found == TRUE) {
break;
}
@@ -1167,16 +1162,14 @@
tr1 = tr1 ^ SDRAM_TR1_RDCD_MASK;
rdclt_offset += dly_val;
}
-#ifdef DEBUG
- printf("\n");
-#endif
+ debug("\n");
/*
* make sure we find the window
*/
if (window_found == FALSE) {
printf("ERROR: Cannot determine a common read delay.\n");
- hang();
+ spd_ddr_init_hang ();
}
/*
@@ -1218,18 +1211,17 @@
}
tr1 |= SDRAM_TR1_RDCT_ENCODE(rdclt_average);
-#if 0
- printf("tr1: %x\n", tr1);
-#endif
+ debug("tr1: %x\n", tr1);
+
/*
* program SDRAM Timing Register 1 TR1
*/
mtsdram(mem_tr1, tr1);
}
-unsigned long program_bxcr(unsigned long* dimm_populated,
- unsigned char* iic0_dimm_addr,
- unsigned long num_dimm_banks)
+static unsigned long program_bxcr(unsigned long *dimm_populated,
+ unsigned char *iic0_dimm_addr,
+ unsigned long num_dimm_banks)
{
unsigned long dimm_num;
unsigned long bank_base_addr;
@@ -1262,8 +1254,8 @@
#ifdef CONFIG_BAMBOO
/*
* This next section is hardware dependent and must be programmed
- * to match the hardware. For bammboo, the following holds...
- * 1. SDRAM0_B0CR: Bank 0 of dimm 0 ctrl_bank_num : 0
+ * to match the hardware. For bamboo, the following holds...
+ * 1. SDRAM0_B0CR: Bank 0 of dimm 0 ctrl_bank_num : 0 (soldered onboard)
* 2. SDRAM0_B1CR: Bank 0 of dimm 1 ctrl_bank_num : 1
* 3. SDRAM0_B2CR: Bank 1 of dimm 1 ctrl_bank_num : 1
* 4. SDRAM0_B3CR: Bank 0 of dimm 2 ctrl_bank_num : 3
@@ -1273,10 +1265,12 @@
ctrl_bank_num[1] = 1;
ctrl_bank_num[2] = 3;
#else
+ /*
+ * Ocotea, Ebony and the other IBM/AMCC eval boards have
+ * 2 DIMM slots with each max 2 banks
+ */
ctrl_bank_num[0] = 0;
- ctrl_bank_num[1] = 1;
- ctrl_bank_num[2] = 2;
- ctrl_bank_num[3] = 3;
+ ctrl_bank_num[1] = 2;
#endif
/*
@@ -1290,6 +1284,8 @@
num_col_addr = spd_read(iic0_dimm_addr[dimm_num], 4);
num_banks = spd_read(iic0_dimm_addr[dimm_num], 5);
bank_size_id = spd_read(iic0_dimm_addr[dimm_num], 31);
+ debug("DIMM%d: row=%d col=%d banks=%d\n", dimm_num,
+ num_row_addr, num_col_addr, num_banks);
/*
* Set the SDRAM0_BxCR regs
@@ -1323,7 +1319,7 @@
printf("ERROR: Unsupported value for the banksize: %d.\n",
bank_size_id);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
switch (num_col_addr) {
@@ -1345,7 +1341,7 @@
printf("ERROR: Unsupported value for number of "
"column addresses: %d.\n", num_col_addr);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
/*
@@ -1353,11 +1349,14 @@
*/
cr |= SDRAM_BXCR_SDBE;
- for (i = 0; i < num_banks; i++) {
- bank_parms[ctrl_bank_num[dimm_num]+i+dimm_num].bank_size_bytes =
- (4 * 1024 * 1024) * bank_size_id;
- bank_parms[ctrl_bank_num[dimm_num]+i+dimm_num].cr = cr;
- }
+ for (i = 0; i < num_banks; i++) {
+ bank_parms[ctrl_bank_num[dimm_num]+i].bank_size_bytes =
+ (4 << 20) * bank_size_id;
+ bank_parms[ctrl_bank_num[dimm_num]+i].cr = cr;
+ debug("DIMM%d-bank %d (SDRAM0_B%dCR): bank_size_bytes=%d\n",
+ dimm_num, i, ctrl_bank_num[dimm_num]+i,
+ bank_parms[ctrl_bank_num[dimm_num]+i].bank_size_bytes);
+ }
}
}
@@ -1400,13 +1399,15 @@
bank_parms[sorted_bank_num[bx_cr_num]].cr;
mtdcr(memcfgd, temp);
bank_base_addr += bank_parms[sorted_bank_num[bx_cr_num]].bank_size_bytes;
+ debug("SDRAM0_B%dCR=0x%08lx\n", sorted_bank_num[bx_cr_num], temp);
}
}
return(bank_base_addr);
}
-void program_ecc (unsigned long num_bytes)
+#ifdef CONFIG_DDR_ECC
+static void program_ecc(unsigned long num_bytes)
{
unsigned long bank_base_addr;
unsigned long current_address;
@@ -1425,14 +1426,12 @@
bank_base_addr = CFG_SDRAM_BASE;
if ((cfg0 & SDRAM_CFG0_MCHK_MASK) != SDRAM_CFG0_MCHK_NON) {
- mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) |
- SDRAM_CFG0_MCHK_GEN);
+ mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) | SDRAM_CFG0_MCHK_GEN);
- if ((cfg0 & SDRAM_CFG0_DMWD_MASK) == SDRAM_CFG0_DMWD_32) {
+ if ((cfg0 & SDRAM_CFG0_DMWD_MASK) == SDRAM_CFG0_DMWD_32)
address_increment = 4;
- } else {
+ else
address_increment = 8;
- }
current_address = (unsigned long)(bank_base_addr);
end_address = (unsigned long)(bank_base_addr) + num_bytes;
@@ -1446,4 +1445,5 @@
SDRAM_CFG0_MCHK_CHK);
}
}
+#endif /* CONFIG_DDR_ECC */
#endif /* CONFIG_SPD_EEPROM */
diff --git a/cpu/ppc4xx/44x_spd_ddr2.c b/cpu/ppc4xx/44x_spd_ddr2.c
index 2ecd3e4..67ba5bd 100644
--- a/cpu/ppc4xx/44x_spd_ddr2.c
+++ b/cpu/ppc4xx/44x_spd_ddr2.c
@@ -58,8 +58,8 @@
#define SDRAM_DDR2 2
#define SDRAM_NONE 0
-#define MAXDIMMS 2
-#define MAXRANKS 4
+#define MAXDIMMS 2
+#define MAXRANKS 4
#define MAXBXCF 4
#define MAX_SPD_BYTES 256 /* Max number of bytes on the DIMM's SPD EEPROM */
@@ -109,7 +109,7 @@
/* Defines for the Read Cycle Delay test */
#define NUMMEMTESTS 8
#define NUMMEMWORDS 8
-#define NUMLOOPS 256 /* memory test loops */
+#define NUMLOOPS 64 /* memory test loops */
#undef CONFIG_ECC_ERROR_RESET /* test-only: see description below, at check_ecc() */
@@ -129,6 +129,36 @@
#define MY_TLB_WORD2_I_ENABLE TLB_WORD2_I_ENABLE /* disable caching on SDRAM */
#endif
+/*
+ * Board-specific Platform code can reimplement spd_ddr_init_hang () if needed
+ */
+void __spd_ddr_init_hang (void)
+{
+ hang ();
+}
+void spd_ddr_init_hang (void) __attribute__((weak, alias("__spd_ddr_init_hang")));
+
+/*
+ * To provide an interface for board specific config values in this common
+ * DDR setup code, we implement he "weak" default functions here. They return
+ * the default value back to the caller.
+ *
+ * Please see include/configs/yucca.h for an example fora board specific
+ * implementation.
+ */
+u32 __ddr_wrdtr(u32 default_val)
+{
+ return default_val;
+}
+u32 ddr_wrdtr(u32) __attribute__((weak, alias("__ddr_wrdtr")));
+
+u32 __ddr_clktr(u32 default_val)
+{
+ return default_val;
+}
+u32 ddr_clktr(u32) __attribute__((weak, alias("__ddr_clktr")));
+
+
/* Private Structure Definitions */
/* enum only to ease code for cas latency setting */
@@ -144,7 +174,6 @@
* Prototypes
*-----------------------------------------------------------------------------*/
static unsigned long sdram_memsize(void);
-void program_tlb(u32 start, u32 size, u32 tlb_word2_i_value);
static void get_spd_info(unsigned long *dimm_populated,
unsigned char *iic0_dimm_addr,
unsigned long num_dimm_banks);
@@ -206,9 +235,7 @@
#else
static void DQS_calibration_process(void);
#endif
-#if defined(DEBUG)
static void ppc440sp_sdram_register_dump(void);
-#endif
int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
void dcbz_area(u32 start_address, u32 num_bytes);
void dflush(void);
@@ -459,13 +486,14 @@
*-----------------------------------------------------------------*/
mfsdram(SDRAM_WRDTR, val);
mtsdram(SDRAM_WRDTR, (val & ~(SDRAM_WRDTR_LLWP_MASK | SDRAM_WRDTR_WTR_MASK)) |
- (SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_90_DEG_ADV));
+ ddr_wrdtr(SDRAM_WRDTR_LLWP_1_CYC | SDRAM_WRDTR_WTR_90_DEG_ADV));
/*------------------------------------------------------------------
* Set the SDRAM Clock Timing Register
*-----------------------------------------------------------------*/
mfsdram(SDRAM_CLKTR, val);
- mtsdram(SDRAM_CLKTR, (val & ~SDRAM_CLKTR_CLKP_MASK) | SDRAM_CLKTR_CLKP_0_DEG);
+ mtsdram(SDRAM_CLKTR, (val & ~SDRAM_CLKTR_CLKP_MASK) |
+ ddr_clktr(SDRAM_CLKTR_CLKP_0_DEG));
/*------------------------------------------------------------------
* Program the BxCF registers.
@@ -524,7 +552,12 @@
dram_size = sdram_memsize();
/* and program tlb entries for this size (dynamic) */
- program_tlb(0, dram_size, MY_TLB_WORD2_I_ENABLE);
+
+ /*
+ * Program TLB entries with caches enabled, for best performace
+ * while auto-calibrating and ECC generation
+ */
+ program_tlb(0, 0, dram_size, 0);
/*------------------------------------------------------------------
* DQS calibration.
@@ -535,12 +568,18 @@
/*------------------------------------------------------------------
* If ecc is enabled, initialize the parity bits.
*-----------------------------------------------------------------*/
- program_ecc(dimm_populated, iic0_dimm_addr, num_dimm_banks, MY_TLB_WORD2_I_ENABLE);
+ program_ecc(dimm_populated, iic0_dimm_addr, num_dimm_banks, 0);
#endif
-#ifdef DEBUG
+ /*
+ * Now after initialization (auto-calibration and ECC generation)
+ * remove the TLB entries with caches enabled and program again with
+ * desired cache functionality
+ */
+ remove_tlb(0, dram_size);
+ program_tlb(0, 0, dram_size, MY_TLB_WORD2_I_ENABLE);
+
ppc440sp_sdram_register_dump();
-#endif
return dram_size;
}
@@ -578,11 +617,10 @@
if (dimm_found == FALSE) {
printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
-#ifdef CONFIG_ADD_RAM_INFO
void board_add_ram_info(int use_default)
{
PPC440_SYS_INFO board_cfg;
@@ -603,7 +641,6 @@
val = (val & SDRAM_MMODE_DCL_MASK) >> 4;
printf(", CL%d)", val);
}
-#endif
/*------------------------------------------------------------------
* For the memory DIMMs installed, this routine verifies that they
@@ -625,42 +662,42 @@
"slot %d.\n", (unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 2:
printf("ERROR: EDO DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 3:
printf("ERROR: Pipelined Nibble DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 4:
printf("ERROR: SDRAM DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 5:
printf("ERROR: Multiplexed ROM DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 6:
printf("ERROR: SGRAM DIMM detected in slot %d.\n",
(unsigned int)dimm_num);
printf("Only DDR and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
case 7:
debug("DIMM slot %d: DDR1 SDRAM detected\n", dimm_num);
@@ -675,7 +712,7 @@
(unsigned int)dimm_num);
printf("Only DDR1 and DDR2 SDRAM DIMMs are supported.\n");
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
}
}
@@ -685,7 +722,7 @@
&& (dimm_populated[dimm_num] != SDRAM_NONE)
&& (dimm_populated[dimm_num-1] != dimm_populated[dimm_num])) {
printf("ERROR: DIMM's DDR1 and DDR2 type can not be mixed.\n");
- hang();
+ spd_ddr_init_hang ();
}
}
}
@@ -760,7 +797,7 @@
(unsigned int)(calc_cycle_time*10));
printf("Replace the DIMM, or change DDR frequency via "
"strapping bits.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
}
@@ -792,7 +829,7 @@
"slot %d is not supported.\n", dimm_rank, dimm_num);
printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
} else
total_rank += dimm_rank;
}
@@ -801,7 +838,7 @@
"for all slots.\n", (unsigned int)total_rank);
printf("Only %d ranks are supported for all DIMM.\n", MAXRANKS);
printf("Remove one of the DIMM modules.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
}
@@ -826,28 +863,28 @@
printf("This DIMM is 5.0 Volt/TTL.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x01:
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("This DIMM is LVTTL.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x02:
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("This DIMM is 1.5 Volt.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x03:
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("This DIMM is 3.3 Volt/TTL.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
case 0x04:
/* 2.5 Voltage only for DDR1 */
@@ -859,7 +896,7 @@
printf("ERROR: Only DIMMs DDR 2.5V or DDR2 1.8V are supported.\n");
printf("Replace the DIMM module in slot %d with a supported DIMM.\n\n",
(unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
break;
}
}
@@ -1002,13 +1039,13 @@
if ((dimm_populated[0] != SDRAM_NONE) && (dimm_populated[1] != SDRAM_NONE)) {
if (buf0 != buf1) {
printf("ERROR: DIMM's buffered/unbuffered, registered, clocking don't match.\n");
- hang();
+ spd_ddr_init_hang ();
}
}
if ((dimm_64bit == TRUE) && (dimm_32bit == TRUE)) {
printf("ERROR: Cannot mix 32 bit and 64 bit DDR-SDRAM DIMMs together.\n");
- hang();
+ spd_ddr_init_hang ();
}
else if ((dimm_64bit == TRUE) && (dimm_32bit == FALSE)) {
mcopt1 |= SDRAM_MCOPT1_DMWD_64;
@@ -1016,7 +1053,7 @@
mcopt1 |= SDRAM_MCOPT1_DMWD_32;
} else {
printf("ERROR: Please install only 32 or 64 bit DDR-SDRAM DIMMs.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
if (ecc_enabled == TRUE)
@@ -1117,7 +1154,8 @@
modt3 = 0x00000000;
}
if (total_rank == 4) {
- codt |= CALC_ODT_R(0) | CALC_ODT_R(1) | CALC_ODT_R(2) | CALC_ODT_R(3);
+ codt |= CALC_ODT_R(0) | CALC_ODT_R(1) |
+ CALC_ODT_R(2) | CALC_ODT_R(3);
modt0 = CALC_ODT_RW(2);
modt1 = 0x00000000;
modt2 = CALC_ODT_RW(0);
@@ -1204,7 +1242,7 @@
break;
default:
printf("ERROR: ucode error on selected_cas value %d", selected_cas);
- hang();
+ spd_ddr_init_hang ();
break;
}
@@ -1236,7 +1274,7 @@
break;
default:
printf("ERROR: write recovery not support (%d)", write_recovery);
- hang();
+ spd_ddr_init_hang ();
break;
}
#else
@@ -1254,7 +1292,7 @@
ods = ODS_REDUCED;
} else {
printf("ERROR: Unsupported number of DIMM's (%d)", total_dimm);
- hang();
+ spd_ddr_init_hang ();
}
mr = CMD_EMR | SELECT_MR | BURST_LEN_4 | wr | cas;
@@ -1279,7 +1317,7 @@
mtsdram(SDRAM_INITPLR13, 0x80800000 | emr); /* EMR OCD Exit */
} else {
printf("ERROR: ucode error as unknown DDR type in program_initplr");
- hang();
+ spd_ddr_init_hang ();
}
}
@@ -1384,7 +1422,7 @@
} else {
printf("ERROR: SPD reported Tcyc is incorrect for DIMM "
"in slot %d\n", (unsigned int)dimm_num);
- hang();
+ spd_ddr_init_hang ();
}
} else {
/* Convert from hex to decimal */
@@ -1521,7 +1559,7 @@
printf("ERROR: Cannot find a supported CAS latency with the installed DIMMs.\n");
printf("Only DIMMs DDR1 with CAS latencies of 2.0, 2.5, and 3.0 are supported.\n");
printf("Make sure the PLB speed is within the supported range of the DIMMs.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
} else { /* DDR2 */
debug("cas_3_0_available=%d\n", cas_3_0_available);
@@ -1544,7 +1582,7 @@
cas_3_0_available, cas_4_0_available, cas_5_0_available);
printf("sdram_freq=%d cycle3=%d cycle4=%d cycle5=%d\n\n",
sdram_freq, cycle_3_0_clk, cycle_4_0_clk, cycle_5_0_clk);
- hang();
+ spd_ddr_init_hang ();
}
}
@@ -1653,7 +1691,7 @@
printf("ERROR: DIMM %d unsupported refresh rate/type.\n",
(unsigned int)dimm_num);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
break;
}
@@ -2061,7 +2099,7 @@
printf("ERROR: Unsupported value for number of "
"column addresses: %d.\n", (unsigned int)num_col_addr);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
}
@@ -2143,7 +2181,7 @@
printf("ERROR: Unsupported value for the banksize: %d.\n",
(unsigned int)rank_size_id);
printf("Replace the DIMM module with a supported DIMM.\n\n");
- hang();
+ spd_ddr_init_hang ();
}
if ((dimm_populated[dimm_num] != SDRAM_NONE) && (dimm_num == 1))
@@ -2688,7 +2726,8 @@
printf("\nERROR: Cannot determine a common read delay for the "
"DIMM(s) installed.\n");
debug("%s[%d] ERROR : \n", __FUNCTION__,__LINE__);
- hang();
+ ppc440sp_sdram_register_dump();
+ spd_ddr_init_hang ();
}
blank_string(strlen(str));
@@ -2844,7 +2883,7 @@
if (window_found == FALSE) {
printf("ERROR: Cannot determine a common read delay for the "
"DIMM(s) installed.\n");
- hang();
+ spd_ddr_init_hang ();
}
/*------------------------------------------------------------------
@@ -3013,5 +3052,9 @@
dcr_data = mfdcr(SDRAM_R3BAS);
printf(" MQ3_B0BAS = 0x%08X\n", dcr_data);
}
+#else
+static void ppc440sp_sdram_register_dump(void)
+{
+}
#endif
#endif /* CONFIG_SPD_EEPROM */
diff --git a/cpu/ppc4xx/4xx_enet.c b/cpu/ppc4xx/4xx_enet.c
index 1200d02..cc8e734 100644
--- a/cpu/ppc4xx/4xx_enet.c
+++ b/cpu/ppc4xx/4xx_enet.c
@@ -94,9 +94,9 @@
* network support enabled.
* Remark: CONFIG_405 describes Xilinx PPC405 FPGA without EMAC controller!
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && !defined(CONFIG_405) && !defined(CONFIG_IOP480)
+#if defined(CONFIG_CMD_NET) && !defined(CONFIG_405) && !defined(CONFIG_IOP480)
-#if !(defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII))
+#if !(defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
#error "CONFIG_MII has to be defined!"
#endif
@@ -1415,10 +1415,8 @@
if ((MAL_RX_CTRL_EMPTY & hw_p->rx[i].ctrl)
|| (loop_count >= NUM_RX_BUFF))
break;
+
loop_count++;
- hw_p->rx_slot++;
- if (NUM_RX_BUFF == hw_p->rx_slot)
- hw_p->rx_slot = 0;
handled++;
data_len = (unsigned long) hw_p->rx[i].data_len; /* Get len */
if (data_len) {
@@ -1468,6 +1466,10 @@
if (NUM_RX_BUFF == hw_p->rx_i_index)
hw_p->rx_i_index = 0;
+ hw_p->rx_slot++;
+ if (NUM_RX_BUFF == hw_p->rx_slot)
+ hw_p->rx_slot = 0;
+
/* AS.HARNOIS
* free receive buffer only when
* buffer has been handled (eth_rx)
@@ -1683,7 +1685,7 @@
#endif
#if defined(CONFIG_NET_MULTI)
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register (dev->name,
emac4xx_miiphy_read, emac4xx_miiphy_write);
#endif
@@ -1724,7 +1726,7 @@
int emac4xx_miiphy_initialize (bd_t * bis)
{
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_register ("ppc_4xx_eth0",
emac4xx_miiphy_read, emac4xx_miiphy_write);
#endif
@@ -1733,4 +1735,4 @@
}
#endif /* !defined(CONFIG_NET_MULTI) */
-#endif /* #if (CONFIG_COMMANDS & CFG_CMD_NET) */
+#endif
diff --git a/cpu/ppc4xx/Makefile b/cpu/ppc4xx/Makefile
index 4068b53..af9da5b 100644
--- a/cpu/ppc4xx/Makefile
+++ b/cpu/ppc4xx/Makefile
@@ -27,12 +27,12 @@
START = start.o resetvec.o kgdb.o
SOBJS = dcr.o
-COBJS = 405gp_pci.o 4xx_enet.o \
+COBJS = 405gp_pci.o 440spe_pcie.o 4xx_enet.o \
bedbug_405.o commproc.o \
cpu.o cpu_init.o gpio.o i2c.o interrupts.o \
miiphy.o ndfc.o sdram.o serial.o \
40x_spd_sdram.o 44x_spd_ddr.o 44x_spd_ddr2.o speed.o \
- tlb.o traps.o usb_ohci.o usbdev.o \
+ tlb.o traps.o usb_ohci.o usb.o usbdev.o \
440spe_pcie.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/cpu/ppc4xx/bedbug_405.c b/cpu/ppc4xx/bedbug_405.c
index a3c2119..5ef5607 100644
--- a/cpu/ppc4xx/bedbug_405.c
+++ b/cpu/ppc4xx/bedbug_405.c
@@ -10,7 +10,7 @@
#include <bedbug/regs.h>
#include <bedbug/ppc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_4xx)
+#if defined(CONFIG_CMD_BEDBUG) && defined(CONFIG_4xx)
#define MAX_BREAK_POINTS 4
diff --git a/cpu/ppc4xx/config.mk b/cpu/ppc4xx/config.mk
index 119e061..4fd5108 100644
--- a/cpu/ppc4xx/config.mk
+++ b/cpu/ppc4xx/config.mk
@@ -22,5 +22,13 @@
#
PLATFORM_RELFLAGS += -fPIC -ffixed-r14 -meabi -fno-strict-aliasing
+PLATFORM_CPPFLAGS += -DCONFIG_4xx -ffixed-r2 -ffixed-r29 -mstring -msoft-float
-PLATFORM_CPPFLAGS += -DCONFIG_4xx -ffixed-r2 -ffixed-r29 -mstring -Wa,-m405 -mcpu=405 -msoft-float
+cfg=$(shell grep configs $(OBJTREE)/include/config.h | sed 's/.*<\(configs.*\)>/\1/')
+is440=$(shell grep CONFIG_440 $(TOPDIR)/include/$(cfg))
+
+ifneq (,$(findstring CONFIG_440,$(is440)))
+PLATFORM_CPPFLAGS += -Wa,-m440 -mcpu=440
+else
+PLATFORM_CPPFLAGS += -Wa,-m405 -mcpu=405
+endif
diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c
index 8e6bc84..c07bc0c 100644
--- a/cpu/ppc4xx/cpu.c
+++ b/cpu/ppc4xx/cpu.c
@@ -139,6 +139,7 @@
"Reserved",
"I2C (Addr 0x50)",
};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'B', 'D', 'E', 'x', 'F' };
#endif
#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
@@ -149,6 +150,7 @@
"I2C (Addr 0x54)",
"I2C (Addr 0x50)",
};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D'};
#endif
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
@@ -163,6 +165,7 @@
"PCI",
"I2C (Addr 0x52)",
};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
#endif
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
@@ -177,6 +180,7 @@
"PCI",
"I2C (Addr 0x52)",
};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'G', 'F', 'H' };
#endif
#if defined(CONFIG_405EZ)
@@ -199,6 +203,8 @@
"SPI (slow)",
"I2C (Addr 0x50)",
};
+static char bootstrap_char[] = { 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', \
+ 'I', 'x', 'K', 'L', 'M', 'N', 'O', 'P' };
#endif
#if defined(SDR0_PINSTP_SHIFT)
@@ -427,7 +433,7 @@
printf (" I2C boot EEPROM %sabled\n", i2c_bootrom_enabled() ? "en" : "dis");
#endif /* I2C_BOOTROM */
#if defined(SDR0_PINSTP_SHIFT)
- printf (" Bootstrap Option %c - ", (char)bootstrap_option() + 'A');
+ printf (" Bootstrap Option %c - ", bootstrap_char[bootstrap_option()]);
printf ("Boot ROM Location %s\n", bootstrap_str[bootstrap_option()]);
#endif /* SDR0_PINSTP_SHIFT */
diff --git a/cpu/ppc4xx/cpu_init.c b/cpu/ppc4xx/cpu_init.c
index 66e8637..351da36 100644
--- a/cpu/ppc4xx/cpu_init.c
+++ b/cpu/ppc4xx/cpu_init.c
@@ -153,7 +153,7 @@
*/
asm volatile(" bl 0f" ::: "lr");
asm volatile("0: mflr 3" ::: "r3");
- asm volatile(" addi 4, 0, 14" ::: "r4");
+ asm volatile(" addi 4, 0, 14" ::: "r4");
asm volatile(" mtctr 4" ::: "ctr");
asm volatile("1: icbt 0, 3");
asm volatile(" addi 3, 3, 32" ::: "r3");
@@ -211,6 +211,8 @@
val = mfspr(tcr);
#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
val |= 0xb8000000; /* generate system reset after 1.34 seconds */
+#elif defined(CONFIG_440EPX)
+ val |= 0xb0000000; /* generate system reset after 1.34 seconds */
#else
val |= 0xf0000000; /* generate system reset after 2.684 seconds */
#endif
diff --git a/cpu/ppc4xx/dcr.S b/cpu/ppc4xx/dcr.S
index 7102364..93465a3 100644
--- a/cpu/ppc4xx/dcr.S
+++ b/cpu/ppc4xx/dcr.S
@@ -22,7 +22,7 @@
*/
#include <config.h>
-#if defined(CONFIG_4xx) && defined(CFG_CMD_SETGETDCR)
+#if defined(CONFIG_4xx) && defined(CONFIG_CMD_SETGETDCR)
#include <ppc4xx.h>
@@ -195,4 +195,4 @@
blr /* Return to calling function */
.Lfe4: .size set_dcr,.Lfe4-set_dcr
/* end set_dcr() */
-#endif /* CONFIG_4xx & CFG_CMD_SETGETDCR */
+#endif
diff --git a/cpu/ppc4xx/gpio.c b/cpu/ppc4xx/gpio.c
index dd84e58..50f2fdf 100644
--- a/cpu/ppc4xx/gpio.c
+++ b/cpu/ppc4xx/gpio.c
@@ -103,6 +103,18 @@
out32(GPIO0_OR + offs, in32(GPIO0_OR + offs) & ~GPIO_VAL(pin));
}
+int gpio_read_out_bit(int pin)
+{
+ u32 offs = 0;
+
+ if (pin >= GPIO_MAX) {
+ offs = 0x100;
+ pin -= GPIO_MAX;
+ }
+
+ return (in32(GPIO0_OR + offs) & GPIO_VAL(pin) ? 1 : 0);
+}
+
#if defined(CFG_440_GPIO_TABLE)
void gpio_set_chip_configuration(void)
{
@@ -157,14 +169,42 @@
switch (gpio_tab[gpio_core][i].alt_nb) {
case GPIO_SEL:
if (gpio_core == GPIO0) {
- reg = in32(GPIO0_TCR) | (0x80000000 >> (j));
+ /*
+ * Setup output value
+ * 1 -> high level
+ * 0 -> low level
+ * else -> don't touch
+ */
+ reg = in32(GPIO0_OR);
+ if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1)
+ reg |= (0x80000000 >> (i));
+ else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0)
+ reg &= ~(0x80000000 >> (i));
+ out32(GPIO0_OR, reg);
+
+ reg = in32(GPIO0_TCR) | (0x80000000 >> (i));
out32(GPIO0_TCR, reg);
}
+#ifdef GPIO1
if (gpio_core == GPIO1) {
- reg = in32(GPIO1_TCR) | (0x80000000 >> (j));
+ /*
+ * Setup output value
+ * 1 -> high level
+ * 0 -> low level
+ * else -> don't touch
+ */
+ reg = in32(GPIO1_OR);
+ if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_1)
+ reg |= (0x80000000 >> (i));
+ else if (gpio_tab[gpio_core][i].out_val == GPIO_OUT_0)
+ reg &= ~(0x80000000 >> (i));
+ out32(GPIO1_OR, reg);
+
+ reg = in32(GPIO1_TCR) | (0x80000000 >> (i));
out32(GPIO1_TCR, reg);
}
+#endif /* GPIO1 */
reg = in32(GPIO_OS(core_add+offs))
& ~(GPIO_MASK >> (j*2));
diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c
index c5a9f02..ca565cc 100644
--- a/cpu/ppc4xx/interrupts.c
+++ b/cpu/ppc4xx/interrupts.c
@@ -628,7 +628,7 @@
/****************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_IRQ)
+#if defined(CONFIG_CMD_IRQ)
/*******************************************************************************
*
@@ -698,4 +698,4 @@
return 0;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */
+#endif
diff --git a/cpu/ppc4xx/kgdb.S b/cpu/ppc4xx/kgdb.S
index be28340..8c4bbf2 100644
--- a/cpu/ppc4xx/kgdb.S
+++ b/cpu/ppc4xx/kgdb.S
@@ -34,7 +34,7 @@
#include <asm/cache.h>
#include <asm/mmu.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
/*
* cache flushing routines for kgdb
*/
@@ -75,4 +75,4 @@
SYNC
blr
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c
index b198ff4..3984577 100644
--- a/cpu/ppc4xx/ndfc.c
+++ b/cpu/ppc4xx/ndfc.c
@@ -3,7 +3,7 @@
* Platform independend driver for NDFC (NanD Flash Controller)
* integrated into EP440 cores
*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* Based on original work by
@@ -31,14 +31,17 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) && \
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY) && \
(defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX))
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_405EZ))
#include <nand.h>
#include <linux/mtd/ndfc.h>
+#include <linux/mtd/nand_ecc.h>
#include <asm/processor.h>
-#include <ppc440.h>
+#include <asm/io.h>
+#include <ppc4xx.h>
static u8 hwctl = 0;
@@ -69,11 +72,11 @@
ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc;
if (hwctl & 0x1)
- out8(base + NDFC_CMD, byte);
+ out_8((u8 *)(base + NDFC_CMD), byte);
else if (hwctl & 0x2)
- out8(base + NDFC_ALE, byte);
+ out_8((u8 *)(base + NDFC_ALE), byte);
else
- out8(base + NDFC_DATA, byte);
+ out_8((u8 *)(base + NDFC_DATA), byte);
}
static u_char ndfc_read_byte(struct mtd_info *mtdinfo)
@@ -81,7 +84,7 @@
struct nand_chip *this = mtdinfo->priv;
ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc;
- return (in8(base + NDFC_DATA));
+ return (in_8((u8 *)(base + NDFC_DATA)));
}
static int ndfc_dev_ready(struct mtd_info *mtdinfo)
@@ -89,17 +92,41 @@
struct nand_chip *this = mtdinfo->priv;
ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc;
- while (!(in32(base + NDFC_STAT) & NDFC_STAT_IS_READY))
+ while (!(in_be32((u32 *)(base + NDFC_STAT)) & NDFC_STAT_IS_READY))
;
return 1;
}
-#ifndef CONFIG_NAND_SPL
-/*
- * Don't use these speedup functions in NAND boot image, since the image
- * has to fit into 4kByte.
- */
+static void ndfc_enable_hwecc(struct mtd_info *mtdinfo, int mode)
+{
+ struct nand_chip *this = mtdinfo->priv;
+ ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc;
+ u32 ccr;
+
+ ccr = in_be32((u32 *)(base + NDFC_CCR));
+ ccr |= NDFC_CCR_RESET_ECC;
+ out_be32((u32 *)(base + NDFC_CCR), ccr);
+}
+
+static int ndfc_calculate_ecc(struct mtd_info *mtdinfo,
+ const u_char *dat, u_char *ecc_code)
+{
+ struct nand_chip *this = mtdinfo->priv;
+ ulong base = (ulong) this->IO_ADDR_W & 0xfffffffc;
+ u32 ecc;
+ u8 *p = (u8 *)&ecc;
+
+ ecc = in_be32((u32 *)(base + NDFC_ECC));
+
+ /* The NDFC uses Smart Media (SMC) bytes order
+ */
+ ecc_code[0] = p[2];
+ ecc_code[1] = p[1];
+ ecc_code[2] = p[3];
+
+ return 0;
+}
/*
* Speedups for buffer read/write/verify
@@ -115,9 +142,14 @@
uint32_t *p = (uint32_t *) buf;
for (;len > 0; len -= 4)
- *p++ = in32(base + NDFC_DATA);
+ *p++ = in_be32((u32 *)(base + NDFC_DATA));
}
+#ifndef CONFIG_NAND_SPL
+/*
+ * Don't use these speedup functions in NAND boot image, since the image
+ * has to fit into 4kByte.
+ */
static void ndfc_write_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
{
struct nand_chip *this = mtdinfo->priv;
@@ -125,7 +157,7 @@
uint32_t *p = (uint32_t *) buf;
for (; len > 0; len -= 4)
- out32(base + NDFC_DATA, *p++);
+ out_be32((u32 *)(base + NDFC_DATA), *p++);
}
static int ndfc_verify_buf(struct mtd_info *mtdinfo, const uint8_t *buf, int len)
@@ -135,7 +167,7 @@
uint32_t *p = (uint32_t *) buf;
for (; len > 0; len -= 4)
- if (*p++ != in32(base + NDFC_DATA))
+ if (*p++ != in_be32((u32 *)(base + NDFC_DATA)))
return -1;
return 0;
@@ -152,8 +184,8 @@
ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
/* Set NandFlash Core Configuration Register */
- /* 1col x 2 rows */
- out32(base + NDFC_CCR, 0x00000000 | (cs << 24));
+ /* 1 col x 2 rows */
+ out_be32((u32 *)(base + NDFC_CCR), 0x00000000 | (cs << 24));
}
int board_nand_init(struct nand_chip *nand)
@@ -161,23 +193,25 @@
int cs = (ulong)nand->IO_ADDR_W & 0x00000003;
ulong base = (ulong)nand->IO_ADDR_W & 0xfffffffc;
- nand->eccmode = NAND_ECC_SOFT;
-
nand->hwcontrol = ndfc_hwcontrol;
nand->read_byte = ndfc_read_byte;
+ nand->read_buf = ndfc_read_buf;
nand->write_byte = ndfc_write_byte;
nand->dev_ready = ndfc_dev_ready;
+ nand->eccmode = NAND_ECC_HW3_256;
+ nand->enable_hwecc = ndfc_enable_hwecc;
+ nand->calculate_ecc = ndfc_calculate_ecc;
+ nand->correct_data = nand_correct_data;
+
#ifndef CONFIG_NAND_SPL
nand->write_buf = ndfc_write_buf;
- nand->read_buf = ndfc_read_buf;
nand->verify_buf = ndfc_verify_buf;
#else
/*
* Setup EBC (CS0 only right now)
*/
- mtdcr(ebccfga, xbcfg);
- mtdcr(ebccfgd, 0xb8400000);
+ mtebc(EBC0_CFG, 0xb8400000);
mtebc(pb0cr, CFG_EBC_PB0CR);
mtebc(pb0ap, CFG_EBC_PB0AP);
@@ -187,7 +221,7 @@
* Select required NAND chip in NDFC
*/
board_nand_select_device(nand, cs);
- out32(base + NDFC_BCFG0 + (cs << 2), 0x80002222);
+ out_be32((u32 *)(base + NDFC_BCFG0 + (cs << 2)), 0x80002222);
return 0;
}
diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c
index d520cd3..2724d91 100644
--- a/cpu/ppc4xx/sdram.c
+++ b/cpu/ppc4xx/sdram.c
@@ -187,14 +187,14 @@
/*
* Disable memory controller.
*/
- mtsdram0(mem_mcopt1, 0x00000000);
+ mtsdram(mem_mcopt1, 0x00000000);
/*
* Set MB0CF for bank 0.
*/
- mtsdram0(mem_mb0cf, mb0cf[i].reg);
- mtsdram0(mem_sdtr1, sdtr1);
- mtsdram0(mem_rtr, compute_rtr(speed, mb0cf[i].rows, 64));
+ mtsdram(mem_mb0cf, mb0cf[i].reg);
+ mtsdram(mem_sdtr1, sdtr1);
+ mtsdram(mem_rtr, compute_rtr(speed, mb0cf[i].rows, 64));
udelay(200);
@@ -203,14 +203,34 @@
* Set DC_EN to '1' and BRD_PRF to '01' for 16 byte PLB Burst
* read/prefetch.
*/
- mtsdram0(mem_mcopt1, 0x80800000);
+ mtsdram(mem_mcopt1, 0x80800000);
udelay(10000);
if (get_ram_size(0, mb0cf[i].size) == mb0cf[i].size) {
/*
- * OK, size detected -> all done
+ * OK, size detected. Enable second bank if
+ * defined (assumes same type as bank 0)
*/
+#ifdef CONFIG_SDRAM_BANK1
+ u32 b1cr = mb0cf[i].size | mb0cf[i].reg;
+
+ mtsdram(mem_mcopt1, 0x00000000);
+ mtsdram(mem_mb1cf, b1cr); /* SDRAM0_B1CR */
+ mtsdram(mem_mcopt1, 0x80800000);
+ udelay(10000);
+
+ /*
+ * Check if 2nd bank is really available.
+ * If the size not equal to the size of the first
+ * bank, then disable the 2nd bank completely.
+ */
+ if (get_ram_size((long *)mb0cf[i].size, mb0cf[i].size) !=
+ mb0cf[i].size) {
+ mtsdram(mem_mb1cf, 0);
+ mtsdram(mem_mcopt1, 0);
+ }
+#endif
return;
}
}
diff --git a/cpu/ppc4xx/sdram.h b/cpu/ppc4xx/sdram.h
index 62b5442..4fb9b1a 100644
--- a/cpu/ppc4xx/sdram.h
+++ b/cpu/ppc4xx/sdram.h
@@ -29,8 +29,6 @@
#include <config.h>
-#define mtsdram0(reg, data) mtdcr(memcfga,reg);mtdcr(memcfgd,data)
-
#define ONE_BILLION 1000000000
struct sdram_conf_s {
diff --git a/cpu/ppc4xx/serial.c b/cpu/ppc4xx/serial.c
index e62dd9d..60712b1 100644
--- a/cpu/ppc4xx/serial.c
+++ b/cpu/ppc4xx/serial.c
@@ -448,12 +448,17 @@
unsigned long i;
unsigned long est; /* current estimate */
unsigned long plloutb;
+ unsigned long cpr_pllc;
u32 reg;
+ /* check the pll feedback source */
+ mfcpr(cprpllc, cpr_pllc);
+
get_sys_info(&sysinfo);
- plloutb = ((CONFIG_SYS_CLK_FREQ * sysinfo.pllFwdDiv * sysinfo.pllFbkDiv)
- / sysinfo.pllFwdDivB);
+ plloutb = ((CONFIG_SYS_CLK_FREQ * ((cpr_pllc & PLLC_SRC_MASK) ?
+ sysinfo.pllFwdDivB : sysinfo.pllFwdDiv) * sysinfo.pllFbkDiv) /
+ sysinfo.pllFwdDivB);
udiv = 256; /* Assume lowest possible serial clk */
div = plloutb / (16 * baudrate); /* total divisor */
umin = (plloutb / get_OPB_freq()) << 1; /* 2 x OPB divisor */
@@ -843,7 +848,7 @@
#endif /* CONFIG_SERIAL_SOFTWARE_FIFO */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
/*
AS HARNOIS : according to CONFIG_KGDB_SER_INDEX kgdb uses serial port
number 0 or number 1
@@ -949,7 +954,7 @@
return;
}
#endif /* (CONFIG_KGDB_SER_INDEX & 2) */
-#endif /* CFG_CMD_KGDB */
+#endif
#if defined(CONFIG_SERIAL_MULTI)
diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c
index 028b11a..da5330a 100644
--- a/cpu/ppc4xx/speed.c
+++ b/cpu/ppc4xx/speed.c
@@ -771,6 +771,7 @@
void get_sys_info (PPC405_SYS_INFO * sysInfo)
{
unsigned long cpr_plld;
+ unsigned long cpr_pllc;
unsigned long cpr_primad;
unsigned long sysClkPeriodPs = ONE_BILLION / (CONFIG_SYS_CLK_FREQ/1000);
unsigned long primad_cpudv;
@@ -780,6 +781,7 @@
* Read PLL Mode registers
*/
mfcpr(cprplld, cpr_plld);
+ mfcpr(cprpllc, cpr_pllc);
/*
* Determine forward divider A
@@ -787,20 +789,18 @@
sysInfo->pllFwdDiv = ((cpr_plld & PLLD_FWDVA_MASK) >> 16);
/*
- * Determine forward divider B (should be equal to A)
+ * Determine forward divider B
*/
sysInfo->pllFwdDivB = ((cpr_plld & PLLD_FWDVB_MASK) >> 8);
- if (sysInfo->pllFwdDivB == 0) {
+ if (sysInfo->pllFwdDivB == 0)
sysInfo->pllFwdDivB = 8;
- }
/*
* Determine FBK_DIV.
*/
sysInfo->pllFbkDiv = ((cpr_plld & PLLD_FBDV_MASK) >> 24);
- if (sysInfo->pllFbkDiv == 0) {
+ if (sysInfo->pllFbkDiv == 0)
sysInfo->pllFbkDiv = 256;
- }
/*
* Read CPR_PRIMAD register
@@ -810,30 +810,30 @@
* Determine PLB_DIV.
*/
sysInfo->pllPlbDiv = ((cpr_primad & PRIMAD_PLBDV_MASK) >> 16);
- if (sysInfo->pllPlbDiv == 0) {
+ if (sysInfo->pllPlbDiv == 0)
sysInfo->pllPlbDiv = 16;
- }
/*
* Determine EXTBUS_DIV.
*/
sysInfo->pllExtBusDiv = (cpr_primad & PRIMAD_EBCDV_MASK);
- if (sysInfo->pllExtBusDiv == 0) {
+ if (sysInfo->pllExtBusDiv == 0)
sysInfo->pllExtBusDiv = 16;
- }
/*
* Determine OPB_DIV.
*/
sysInfo->pllOpbDiv = ((cpr_primad & PRIMAD_OPBDV_MASK) >> 8);
- if (sysInfo->pllOpbDiv == 0) {
+ if (sysInfo->pllOpbDiv == 0)
sysInfo->pllOpbDiv = 16;
- }
/*
* Determine the M factor
*/
- m = sysInfo->pllFbkDiv * sysInfo->pllFwdDivB;
+ if (cpr_pllc & PLLC_SRC_MASK)
+ m = sysInfo->pllFbkDiv * sysInfo->pllFwdDivB;
+ else
+ m = sysInfo->pllFbkDiv * sysInfo->pllFwdDiv;
/*
* Determine VCO clock frequency
@@ -845,16 +845,17 @@
* Determine CPU clock frequency
*/
primad_cpudv = ((cpr_primad & PRIMAD_CPUDV_MASK) >> 24);
- if (primad_cpudv == 0) {
+ if (primad_cpudv == 0)
primad_cpudv = 16;
- }
- sysInfo->freqProcessor = (CONFIG_SYS_CLK_FREQ * sysInfo->pllFbkDiv) / primad_cpudv;
+ sysInfo->freqProcessor = (CONFIG_SYS_CLK_FREQ * m) /
+ sysInfo->pllFwdDiv / primad_cpudv;
/*
* Determine PLB clock frequency
*/
- sysInfo->freqPLB = (CONFIG_SYS_CLK_FREQ * sysInfo->pllFbkDiv) / sysInfo->pllPlbDiv;
+ sysInfo->freqPLB = (CONFIG_SYS_CLK_FREQ * m) /
+ sysInfo->pllFwdDiv / sysInfo->pllPlbDiv;
}
/********************************************
diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S
index a96083c..9626b65 100644
--- a/cpu/ppc4xx/start.S
+++ b/cpu/ppc4xx/start.S
@@ -22,26 +22,27 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
-/*------------------------------------------------------------------------------+ */
-/* */
-/* This source code has been made available to you by IBM on an AS-IS */
-/* basis. Anyone receiving this source is licensed under IBM */
-/* copyrights to use it in any way he or she deems fit, including */
-/* copying it, modifying it, compiling it, and redistributing it either */
-/* with or without modifications. No license under IBM patents or */
-/* patent applications is to be implied by the copyright license. */
-/* */
-/* Any user of this software should understand that IBM cannot provide */
-/* technical support for this software and will not be responsible for */
-/* any consequences resulting from the use of this software. */
-/* */
-/* Any person who transfers this source code or any derivative work */
-/* must include the IBM copyright notice, this paragraph, and the */
-/* preceding two paragraphs in the transferred software. */
-/* */
-/* COPYRIGHT I B M CORPORATION 1995 */
-/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
-/*------------------------------------------------------------------------------- */
+/*------------------------------------------------------------------------------+
+ *
+ * This source code has been made available to you by IBM on an AS-IS
+ * basis. Anyone receiving this source is licensed under IBM
+ * copyrights to use it in any way he or she deems fit, including
+ * copying it, modifying it, compiling it, and redistributing it either
+ * with or without modifications. No license under IBM patents or
+ * patent applications is to be implied by the copyright license.
+ *
+ * Any user of this software should understand that IBM cannot provide
+ * technical support for this software and will not be responsible for
+ * any consequences resulting from the use of this software.
+ *
+ * Any person who transfers this source code or any derivative work
+ * must include the IBM copyright notice, this paragraph, and the
+ * preceding two paragraphs in the transferred software.
+ *
+ * COPYRIGHT I B M CORPORATION 1995
+ * LICENSED MATERIAL - PROGRAM PROPERTY OF I B M
+ *-------------------------------------------------------------------------------
+ */
/* U-Boot - Startup Code for AMCC 4xx PowerPC based Embedded Boards
*
@@ -59,7 +60,6 @@
* address and (s)dram will be positioned at address 0
*/
#include <config.h>
-#include <mpc8xx.h>
#include <ppc4xx.h>
#include <version.h>
@@ -110,6 +110,13 @@
# endif
#endif /* CFG_INIT_DCACHE_CS */
+#define function_prolog(func_name) .text; \
+ .align 2; \
+ .globl func_name; \
+ func_name:
+#define function_epilog(func_name) .type func_name,@function; \
+ .size func_name,.-func_name
+
/* We don't want the MMU yet.
*/
#undef MSR_KERNEL
@@ -148,7 +155,9 @@
* NAND U-Boot image is started from offset 0
*/
.text
+#if defined(CONFIG_440)
bl reconfig_tlb0
+#endif
GET_GOT
bl cpu_init_f /* run low-level CPU init code (from Flash) */
bl board_init_f
@@ -285,11 +294,13 @@
mtspr ivor7,r1 /* Floating point unavailable */
li r1,0x0c00
mtspr ivor8,r1 /* System call */
- li r1,0x1000
- mtspr ivor10,r1 /* Decrementer (PIT for 440) */
- li r1,0x1400
- mtspr ivor13,r1 /* Data TLB error */
+ li r1,0x0a00
+ mtspr ivor9,r1 /* Auxiliary Processor unavailable */
+ li r1,0x0900
+ mtspr ivor10,r1 /* Decrementer */
li r1,0x1300
+ mtspr ivor13,r1 /* Data TLB error */
+ li r1,0x1400
mtspr ivor14,r1 /* Instr TLB error */
li r1,0x2000
mtspr ivor15,r1 /* Debug */
@@ -388,8 +399,9 @@
2:
#if defined(CONFIG_NAND_SPL)
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
/*
- * Enable internal SRAM
+ * Enable internal SRAM (only on 440EPx/GRx, 440EP/GR have no OCM)
*/
lis r2,0x7fff
ori r2,r2,0xffff
@@ -399,6 +411,45 @@
mfdcr r1,isram0_pmeg
and r1,r1,r2 /* Disable pwr mgmt */
mtdcr isram0_pmeg,r1
+#endif
+#if defined(CONFIG_440EP)
+ /*
+ * On 440EP with no internal SRAM, we setup SDRAM very early
+ * and copy the NAND_SPL to SDRAM and jump to it
+ */
+ /* Clear Dcache to use as RAM */
+ addis r3,r0,CFG_INIT_RAM_ADDR@h
+ ori r3,r3,CFG_INIT_RAM_ADDR@l
+ addis r4,r0,CFG_INIT_RAM_END@h
+ ori r4,r4,CFG_INIT_RAM_END@l
+ rlwinm. r5,r4,0,27,31
+ rlwinm r5,r4,27,5,31
+ beq ..d_ran3
+ addi r5,r5,0x0001
+..d_ran3:
+ mtctr r5
+..d_ag3:
+ dcbz r0,r3
+ addi r3,r3,32
+ bdnz ..d_ag3
+ /*----------------------------------------------------------------*/
+ /* Setup the stack in internal SRAM */
+ /*----------------------------------------------------------------*/
+ lis r1,CFG_INIT_RAM_ADDR@h
+ ori r1,r1,CFG_INIT_SP_OFFSET@l
+ li r0,0
+ stwu r0,-4(r1)
+ stwu r0,-4(r1) /* Terminate call chain */
+
+ stwu r1,-8(r1) /* Save back chain and move SP */
+ lis r0,RESET_VECTOR@h /* Address of reset vector */
+ ori r0,r0, RESET_VECTOR@l
+ stwu r1,-8(r1) /* Save back chain and move SP */
+ stw r0,+12(r1) /* Save return addr (underflow vect) */
+ sync
+ bl early_sdram_init
+ sync
+#endif /* CONFIG_440EP */
/*
* Copy SPL from cache into internal SRAM
@@ -429,7 +480,7 @@
start_ram:
sync
isync
-#endif
+#endif /* CONFIG_NAND_SPL */
bl 3f
b _start
@@ -454,11 +505,81 @@
.ascii " (", __DATE__, " - ", __TIME__, ")"
.ascii CONFIG_IDENT_STRING, "\0"
-/*
- * Maybe this should be moved somewhere else because the current
- * location (0x100) is where the CriticalInput Execption should be.
- */
. = EXC_OFF_SYS_RESET
+ .globl _start_of_vectors
+_start_of_vectors:
+
+/* Critical input. */
+ CRIT_EXCEPTION(0x100, CritcalInput, UnknownException)
+
+#ifdef CONFIG_440
+/* Machine check */
+ MCK_EXCEPTION(0x200, MachineCheck, MachineCheckException)
+#else
+ CRIT_EXCEPTION(0x200, MachineCheck, MachineCheckException)
+#endif /* CONFIG_440 */
+
+/* Data Storage exception. */
+ STD_EXCEPTION(0x300, DataStorage, UnknownException)
+
+/* Instruction Storage exception. */
+ STD_EXCEPTION(0x400, InstStorage, UnknownException)
+
+/* External Interrupt exception. */
+ STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
+
+/* Alignment exception. */
+ . = 0x600
+Alignment:
+ EXCEPTION_PROLOG(SRR0, SRR1)
+ mfspr r4,DAR
+ stw r4,_DAR(r21)
+ mfspr r5,DSISR
+ stw r5,_DSISR(r21)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ li r20,MSR_KERNEL
+ rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
+ lwz r6,GOT(transfer_to_handler)
+ mtlr r6
+ blrl
+.L_Alignment:
+ .long AlignmentException - _start + _START_OFFSET
+ .long int_return - _start + _START_OFFSET
+
+/* Program check exception */
+ . = 0x700
+ProgramCheck:
+ EXCEPTION_PROLOG(SRR0, SRR1)
+ addi r3,r1,STACK_FRAME_OVERHEAD
+ li r20,MSR_KERNEL
+ rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
+ lwz r6,GOT(transfer_to_handler)
+ mtlr r6
+ blrl
+.L_ProgramCheck:
+ .long ProgramCheckException - _start + _START_OFFSET
+ .long int_return - _start + _START_OFFSET
+
+#ifdef CONFIG_440
+ STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
+ STD_EXCEPTION(0x900, Decrementer, DecrementerPITException)
+ STD_EXCEPTION(0xa00, APU, UnknownException)
+#endif
+ STD_EXCEPTION(0xc00, SystemCall, UnknownException)
+
+#ifdef CONFIG_440
+ STD_EXCEPTION(0x1300, DataTLBError, UnknownException)
+ STD_EXCEPTION(0x1400, InstructionTLBError, UnknownException)
+#else
+ STD_EXCEPTION(0x1000, PIT, DecrementerPITException)
+ STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
+ STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
+#endif
+ CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException )
+
+ .globl _end_of_vectors
+_end_of_vectors:
+ . = _START_OFFSET
#endif
.globl _start
_start:
@@ -768,22 +889,22 @@
*/
lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
ori r3,r3,CFG_OCM_DATA_ADDR@l
- ori r3,r3,0x8270 /* 32K Offset, 16K for Bank 1, R/W/Enable */
+ ori r3,r3,0x0270 /* 16K for Bank 1, R/W/Enable */
mtdcr ocmplb3cr1,r3 /* Set PLB Access */
ori r3,r3,0x4000 /* Add 0x4000 for bank 2 */
mtdcr ocmplb3cr2,r3 /* Set PLB Access */
isync
- lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
+ lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
ori r3,r3,CFG_OCM_DATA_ADDR@l
- ori r3,r3,0x0270 /* 16K for Bank 1, R/W/Enable */
- mtdcr ocmdscr1, r3 /* Set Data Side */
- mtdcr ocmiscr1, r3 /* Set Instruction Side */
+ ori r3,r3,0x0270 /* 16K for Bank 1, R/W/Enable */
+ mtdcr ocmdscr1, r3 /* Set Data Side */
+ mtdcr ocmiscr1, r3 /* Set Instruction Side */
ori r3,r3,0x4000 /* Add 0x4000 for bank 2 */
- mtdcr ocmdscr2, r3 /* Set Data Side */
- mtdcr ocmiscr2, r3 /* Set Instruction Side */
- addis r3,0,0x0800 /* OCM Data Parity Disable - 1 Wait State */
- mtdcr ocmdsisdpc,r4
+ mtdcr ocmdscr2, r3 /* Set Data Side */
+ mtdcr ocmiscr2, r3 /* Set Instruction Side */
+ addis r3,0,0x0800 /* OCM Data Parity Disable - 1 Wait State */
+ mtdcr ocmdsisdpc,r3
isync
#else /* CONFIG_405EZ */
@@ -801,7 +922,7 @@
mtdcr ocmdscntl, r4 /* set data-side IRAM config */
isync
- lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
+ lis r3,CFG_OCM_DATA_ADDR@h /* OCM location */
ori r3,r3,CFG_OCM_DATA_ADDR@l
mtdcr ocmdsarc, r3
addis r4, 0, 0xC000 /* OCM data area enabled */
@@ -810,6 +931,38 @@
#endif /* CONFIG_405EZ */
#endif
+#ifdef CONFIG_NAND_SPL
+ /*
+ * Copy SPL from cache into internal SRAM
+ */
+ li r4,(CFG_NAND_BOOT_SPL_SIZE >> 2) - 1
+ mtctr r4
+ lis r2,CFG_NAND_BOOT_SPL_SRC@h
+ ori r2,r2,CFG_NAND_BOOT_SPL_SRC@l
+ lis r3,CFG_NAND_BOOT_SPL_DST@h
+ ori r3,r3,CFG_NAND_BOOT_SPL_DST@l
+spl_loop:
+ lwzu r4,4(r2)
+ stwu r4,4(r3)
+ bdnz spl_loop
+
+ /*
+ * Jump to code in RAM
+ */
+ bl 00f
+00: mflr r10
+ lis r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@h
+ ori r3,r3,(CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)@l
+ sub r10,r10,r3
+ addi r10,r10,28
+ mtlr r10
+ blr
+
+start_ram:
+ sync
+ isync
+#endif /* CONFIG_NAND_SPL */
+
/*----------------------------------------------------------------------- */
/* Setup temporary stack in DCACHE or OCM if needed for SDRAM SPD. */
/*----------------------------------------------------------------------- */
@@ -920,119 +1073,22 @@
stw r0, +12(r1) /* Save return addr (underflow vect) */
#endif /* !(CFG_INIT_DCACHE_CS || !CFG_TEM_STACK_OCM) */
+#ifdef CONFIG_NAND_SPL
+ bl nand_boot /* will not return */
+#else
GET_GOT /* initialize GOT access */
bl cpu_init_f /* run low-level CPU init code (from Flash) */
/* NEVER RETURNS! */
bl board_init_f /* run first part of init code (from Flash) */
+#endif /* CONFIG_NAND_SPL */
#endif /* CONFIG_405GP || CONFIG_405CR || CONFIG_405 || CONFIG_405EP */
/*----------------------------------------------------------------------- */
#ifndef CONFIG_NAND_SPL
-/*****************************************************************************/
- .globl _start_of_vectors
-_start_of_vectors:
-
-#if 0
-/*TODO Fixup _start above so we can do this*/
-/* Critical input. */
- CRIT_EXCEPTION(0x100, CritcalInput, CritcalInputException)
-#endif
-
-/* Machine check */
- CRIT_EXCEPTION(0x200, MachineCheck, MachineCheckException)
-
-/* Data Storage exception. */
- STD_EXCEPTION(0x300, DataStorage, UnknownException)
-
-/* Instruction Storage exception. */
- STD_EXCEPTION(0x400, InstStorage, UnknownException)
-
-/* External Interrupt exception. */
- STD_EXCEPTION(0x500, ExtInterrupt, external_interrupt)
-
-/* Alignment exception. */
- . = 0x600
-Alignment:
- EXCEPTION_PROLOG
- mfspr r4,DAR
- stw r4,_DAR(r21)
- mfspr r5,DSISR
- stw r5,_DSISR(r21)
- addi r3,r1,STACK_FRAME_OVERHEAD
- li r20,MSR_KERNEL
- rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
- lwz r6,GOT(transfer_to_handler)
- mtlr r6
- blrl
-.L_Alignment:
- .long AlignmentException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
-
-/* Program check exception */
- . = 0x700
-ProgramCheck:
- EXCEPTION_PROLOG
- addi r3,r1,STACK_FRAME_OVERHEAD
- li r20,MSR_KERNEL
- rlwimi r20,r23,0,16,16 /* copy EE bit from saved MSR */
- lwz r6,GOT(transfer_to_handler)
- mtlr r6
- blrl
-.L_ProgramCheck:
- .long ProgramCheckException - _start + EXC_OFF_SYS_RESET
- .long int_return - _start + EXC_OFF_SYS_RESET
-
- /* No FPU on MPC8xx. This exception is not supposed to happen.
- */
- STD_EXCEPTION(0x800, FPUnavailable, UnknownException)
-
- /* I guess we could implement decrementer, and may have
- * to someday for timekeeping.
- */
- STD_EXCEPTION(0x900, Decrementer, timer_interrupt)
- STD_EXCEPTION(0xa00, Trap_0a, UnknownException)
- STD_EXCEPTION(0xb00, Trap_0b, UnknownException)
- STD_EXCEPTION(0xc00, SystemCall, UnknownException)
- STD_EXCEPTION(0xd00, SingleStep, UnknownException)
-
- STD_EXCEPTION(0xe00, Trap_0e, UnknownException)
- STD_EXCEPTION(0xf00, Trap_0f, UnknownException)
-
- /* On the MPC8xx, this is a software emulation interrupt. It occurs
- * for all unimplemented and illegal instructions.
- */
- STD_EXCEPTION(0x1000, PIT, PITException)
-
- STD_EXCEPTION(0x1100, InstructionTLBMiss, UnknownException)
- STD_EXCEPTION(0x1200, DataTLBMiss, UnknownException)
- STD_EXCEPTION(0x1300, InstructionTLBError, UnknownException)
- STD_EXCEPTION(0x1400, DataTLBError, UnknownException)
-
- STD_EXCEPTION(0x1500, Reserved5, UnknownException)
- STD_EXCEPTION(0x1600, Reserved6, UnknownException)
- STD_EXCEPTION(0x1700, Reserved7, UnknownException)
- STD_EXCEPTION(0x1800, Reserved8, UnknownException)
- STD_EXCEPTION(0x1900, Reserved9, UnknownException)
- STD_EXCEPTION(0x1a00, ReservedA, UnknownException)
- STD_EXCEPTION(0x1b00, ReservedB, UnknownException)
-
- STD_EXCEPTION(0x1c00, DataBreakpoint, UnknownException)
- STD_EXCEPTION(0x1d00, InstructionBreakpoint, UnknownException)
- STD_EXCEPTION(0x1e00, PeripheralBreakpoint, UnknownException)
- STD_EXCEPTION(0x1f00, DevPortBreakpoint, UnknownException)
-
- CRIT_EXCEPTION(0x2000, DebugBreakpoint, DebugException )
-
- .globl _end_of_vectors
-_end_of_vectors:
-
-
- . = 0x2100
-
/*
* This code finishes saving the registers to the exception frame
* and jumps to the appropriate handler for the exception.
@@ -1048,28 +1104,12 @@
SAVE_4GPRS(8, r21)
SAVE_8GPRS(12, r21)
SAVE_8GPRS(24, r21)
-#if 0
- andi. r23,r23,MSR_PR
- mfspr r23,SPRG3 /* if from user, fix up tss.regs */
- beq 2f
- addi r24,r1,STACK_FRAME_OVERHEAD
- stw r24,PT_REGS(r23)
-2: addi r2,r23,-TSS /* set r2 to current */
- tovirt(r2,r2,r23)
-#endif
mflr r23
andi. r24,r23,0x3f00 /* get vector offset */
stw r24,TRAP(r21)
li r22,0
stw r22,RESULT(r21)
mtspr SPRG2,r22 /* r1 is now kernel sp */
-#if 0
- addi r24,r2,TASK_STRUCT_SIZE /* check for kernel stack overflow */
- cmplw 0,r1,r2
- cmplw 1,r1,r24
- crand 1,1,4
- bgt stack_ovf /* if r2 < r1 < r2+TASK_STRUCT_SIZE */
-#endif
lwz r24,0(r23) /* virtual address of handler */
lwz r23,4(r23) /* where to go when done */
mtspr SRR0,r24
@@ -1130,34 +1170,72 @@
REST_GPR(31, r1)
lwz r2,_NIP(r1) /* Restore environment */
lwz r0,_MSR(r1)
- mtspr 990,r2 /* SRR2 */
- mtspr 991,r0 /* SRR3 */
+ mtspr csrr0,r2
+ mtspr csrr1,r0
lwz r0,GPR0(r1)
lwz r2,GPR2(r1)
lwz r1,GPR1(r1)
SYNC
rfci
-#endif /* CONFIG_NAND_SPL */
-/* Cache functions.
-*/
-invalidate_icache:
- iccci r0,r0 /* for 405, iccci invalidates the */
- blr /* entire I cache */
+#ifdef CONFIG_440
+mck_return:
+ mfmsr r28 /* Disable interrupts */
+ li r4,0
+ ori r4,r4,MSR_EE
+ andc r28,r28,r4
+ SYNC /* Some chip revs need this... */
+ mtmsr r28
+ SYNC
+ lwz r2,_CTR(r1)
+ lwz r0,_LINK(r1)
+ mtctr r2
+ mtlr r0
+ lwz r2,_XER(r1)
+ lwz r0,_CCR(r1)
+ mtspr XER,r2
+ mtcrf 0xFF,r0
+ REST_10GPRS(3, r1)
+ REST_10GPRS(13, r1)
+ REST_8GPRS(23, r1)
+ REST_GPR(31, r1)
+ lwz r2,_NIP(r1) /* Restore environment */
+ lwz r0,_MSR(r1)
+ mtspr mcsrr0,r2
+ mtspr mcsrr1,r0
+ lwz r0,GPR0(r1)
+ lwz r2,GPR2(r1)
+ lwz r1,GPR1(r1)
+ SYNC
+ rfmci
+#endif /* CONFIG_440 */
-invalidate_dcache:
- addi r6,0,0x0000 /* clear GPR 6 */
- /* Do loop for # of dcache congruence classes. */
- lis r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@ha /* TBS for large sized cache */
- ori r7, r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@l
- /* NOTE: dccci invalidates both */
- mtctr r7 /* ways in the D cache */
-..dcloop:
- dccci 0,r6 /* invalidate line */
- addi r6,r6, CFG_CACHELINE_SIZE /* bump to next line */
- bdnz ..dcloop
+
+/*
+ * Cache functions.
+ *
+ * NOTE: currently the 440s run with dcache _disabled_ once relocated to DRAM,
+ * although for some cache-ralated calls stubs have to be provided to satisfy
+ * symbols resolution.
+ * Icache-related functions are used in POST framework.
+ *
+ */
+#ifdef CONFIG_440
+ .globl dcache_disable
+ .globl icache_disable
+ .globl icache_enable
+dcache_disable:
+icache_disable:
+icache_enable:
blr
+ .globl dcache_status
+ .globl icache_status
+dcache_status:
+icache_status:
+ mr r3, 0
+ blr
+#else
flush_dcache:
addis r9,r0,0x0002 /* set mask for EE and CE msr bits */
ori r9,r9,0x8000
@@ -1236,42 +1314,13 @@
mfdccr r3
srwi r3, r3, 31 /* >>31 => select bit 0 */
blr
+#endif
.globl get_pvr
get_pvr:
mfspr r3, PVR
blr
-#if !defined(CONFIG_440)
- .globl wr_pit
-wr_pit:
- mtspr pit, r3
- blr
-#endif
-
- .globl wr_tcr
-wr_tcr:
- mtspr tcr, r3
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: in8 */
-/* Description: Input 8 bits */
-/*------------------------------------------------------------------------------- */
- .globl in8
-in8:
- lbz r3,0x0000(r3)
- blr
-
-/*------------------------------------------------------------------------------- */
-/* Function: out8 */
-/* Description: Output 8 bits */
-/*------------------------------------------------------------------------------- */
- .globl out8
-out8:
- stb r4,0x0000(r3)
- blr
-
/*------------------------------------------------------------------------------- */
/* Function: out16 */
/* Description: Output 16 bits */
@@ -1291,15 +1340,6 @@
blr
/*------------------------------------------------------------------------------- */
-/* Function: out32 */
-/* Description: Output 32 bits */
-/*------------------------------------------------------------------------------- */
- .globl out32
-out32:
- stw r4,0x0000(r3)
- blr
-
-/*------------------------------------------------------------------------------- */
/* Function: out32r */
/* Description: Byte reverse and output 32 bits */
/*------------------------------------------------------------------------------- */
@@ -1327,15 +1367,6 @@
blr
/*------------------------------------------------------------------------------- */
-/* Function: in32 */
-/* Description: Input 32 bits */
-/*------------------------------------------------------------------------------- */
- .globl in32
-in32:
- lwz 3,0x0000(3)
- blr
-
-/*------------------------------------------------------------------------------- */
/* Function: in32r */
/* Description: Input 32 bits and byte reverse */
/*------------------------------------------------------------------------------- */
@@ -1377,9 +1408,6 @@
sync
blr
-/*------------------------------------------------------------------------------*/
-
-#ifndef CONFIG_NAND_SPL
/*
* void relocate_code (addr_sp, gd, addr_moni)
*
@@ -1490,7 +1518,7 @@
* initialization, now running from RAM.
*/
- addi r0, r10, in_ram - _start + EXC_OFF_SYS_RESET
+ addi r0, r10, in_ram - _start + _START_OFFSET
mtlr r0
blr /* NEVER RETURNS! */
@@ -1560,7 +1588,7 @@
*/
.globl trap_init
trap_init:
- lwz r7, GOT(_start)
+ lwz r7, GOT(_start_of_vectors)
lwz r8, GOT(_end_of_vectors)
li r9, 0x100 /* reset vector always at 0x100 */
@@ -1580,35 +1608,48 @@
/*
* relocate `hdlr' and `int_return' entries
*/
- li r7, .L_MachineCheck - _start + EXC_OFF_SYS_RESET
- li r8, Alignment - _start + EXC_OFF_SYS_RESET
+ li r7, .L_MachineCheck - _start + _START_OFFSET
+ li r8, Alignment - _start + _START_OFFSET
2:
bl trap_reloc
- addi r7, r7, 0x100 /* next exception vector */
+ addi r7, r7, 0x100 /* next exception vector */
cmplw 0, r7, r8
blt 2b
- li r7, .L_Alignment - _start + EXC_OFF_SYS_RESET
+ li r7, .L_Alignment - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_ProgramCheck - _start + EXC_OFF_SYS_RESET
+ li r7, .L_ProgramCheck - _start + _START_OFFSET
bl trap_reloc
- li r7, .L_FPUnavailable - _start + EXC_OFF_SYS_RESET
- li r8, SystemCall - _start + EXC_OFF_SYS_RESET
-3:
+#ifdef CONFIG_440
+ li r7, .L_FPUnavailable - _start + _START_OFFSET
bl trap_reloc
- addi r7, r7, 0x100 /* next exception vector */
- cmplw 0, r7, r8
- blt 3b
- li r7, .L_SingleStep - _start + EXC_OFF_SYS_RESET
- li r8, _end_of_vectors - _start + EXC_OFF_SYS_RESET
-4:
+ li r7, .L_Decrementer - _start + _START_OFFSET
bl trap_reloc
- addi r7, r7, 0x100 /* next exception vector */
- cmplw 0, r7, r8
- blt 4b
+
+ li r7, .L_APU - _start + _START_OFFSET
+ bl trap_reloc
+
+ li r7, .L_InstructionTLBError - _start + _START_OFFSET
+ bl trap_reloc
+
+ li r7, .L_DataTLBError - _start + _START_OFFSET
+ bl trap_reloc
+#else /* CONFIG_440 */
+ li r7, .L_PIT - _start + _START_OFFSET
+ bl trap_reloc
+
+ li r7, .L_InstructionTLBMiss - _start + _START_OFFSET
+ bl trap_reloc
+
+ li r7, .L_DataTLBMiss - _start + _START_OFFSET
+ bl trap_reloc
+#endif /* CONFIG_440 */
+
+ li r7, .L_DebugBreakpoint - _start + _START_OFFSET
+ bl trap_reloc
#if !defined(CONFIG_440)
addi r7,r0,0x1000 /* set ME bit (Machine Exceptions) */
@@ -1644,8 +1685,105 @@
stw r0, 4(r7)
blr
+
+#if defined(CONFIG_440)
+/*----------------------------------------------------------------------------+
+| dcbz_area.
++----------------------------------------------------------------------------*/
+ function_prolog(dcbz_area)
+ rlwinm. r5,r4,0,27,31
+ rlwinm r5,r4,27,5,31
+ beq ..d_ra2
+ addi r5,r5,0x0001
+..d_ra2:mtctr r5
+..d_ag2:dcbz r0,r3
+ addi r3,r3,32
+ bdnz ..d_ag2
+ sync
+ blr
+ function_epilog(dcbz_area)
+
+/*----------------------------------------------------------------------------+
+| dflush. Assume 32K at vector address is cachable.
++----------------------------------------------------------------------------*/
+ function_prolog(dflush)
+ mfmsr r9
+ rlwinm r8,r9,0,15,13
+ rlwinm r8,r8,0,17,15
+ mtmsr r8
+ addi r3,r0,0x0000
+ mtspr dvlim,r3
+ mfspr r3,ivpr
+ addi r4,r0,1024
+ mtctr r4
+..dflush_loop:
+ lwz r6,0x0(r3)
+ addi r3,r3,32
+ bdnz ..dflush_loop
+ addi r3,r3,-32
+ mtctr r4
+..ag: dcbf r0,r3
+ addi r3,r3,-32
+ bdnz ..ag
+ sync
+ mtmsr r9
+ blr
+ function_epilog(dflush)
+#endif /* CONFIG_440 */
#endif /* CONFIG_NAND_SPL */
+/*------------------------------------------------------------------------------- */
+/* Function: in8 */
+/* Description: Input 8 bits */
+/*------------------------------------------------------------------------------- */
+ .globl in8
+in8:
+ lbz r3,0x0000(r3)
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: out8 */
+/* Description: Output 8 bits */
+/*------------------------------------------------------------------------------- */
+ .globl out8
+out8:
+ stb r4,0x0000(r3)
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: out32 */
+/* Description: Output 32 bits */
+/*------------------------------------------------------------------------------- */
+ .globl out32
+out32:
+ stw r4,0x0000(r3)
+ blr
+
+/*------------------------------------------------------------------------------- */
+/* Function: in32 */
+/* Description: Input 32 bits */
+/*------------------------------------------------------------------------------- */
+ .globl in32
+in32:
+ lwz 3,0x0000(3)
+ blr
+
+invalidate_icache:
+ iccci r0,r0 /* for 405, iccci invalidates the */
+ blr /* entire I cache */
+
+invalidate_dcache:
+ addi r6,0,0x0000 /* clear GPR 6 */
+ /* Do loop for # of dcache congruence classes. */
+ lis r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@ha /* TBS for large sized cache */
+ ori r7, r7, (CFG_DCACHE_SIZE / CFG_CACHELINE_SIZE / 2)@l
+ /* NOTE: dccci invalidates both */
+ mtctr r7 /* ways in the D cache */
+..dcloop:
+ dccci 0,r6 /* invalidate line */
+ addi r6,r6, CFG_CACHELINE_SIZE /* bump to next line */
+ bdnz ..dcloop
+ blr
/**************************************************************************/
/* PPC405EP specific stuff */
@@ -1732,28 +1870,6 @@
mtdcr ebccfgd,r3
#endif
-#ifndef CFG_CPC0_PCI
- li r3,CPC0_PCI_HOST_CFG_EN
-#ifdef CONFIG_BUBINGA
- /*
- !-----------------------------------------------------------------------
- ! Check FPGA for PCI internal/external arbitration
- ! If board is set to internal arbitration, update cpc0_pci
- !-----------------------------------------------------------------------
- */
- addis r5,r0,FPGA_REG1@h /* set offset for FPGA_REG1 */
- ori r5,r5,FPGA_REG1@l
- lbz r5,0x0(r5) /* read to get PCI arb selection */
- andi. r6,r5,FPGA_REG1_PCI_INT_ARB /* using internal arbiter ?*/
- beq ..pci_cfg_set /* if not set, then bypass reg write*/
-#endif
- ori r3,r3,CPC0_PCI_ARBIT_EN
-#else /* CFG_CPC0_PCI */
- li r3,CFG_CPC0_PCI
-#endif /* CFG_CPC0_PCI */
-..pci_cfg_set:
- mtdcr CPC0_PCI, r3 /* Enable internal arbiter*/
-
/*
!-----------------------------------------------------------------------
! Check to see if chip is in bypass mode.
@@ -1809,11 +1925,50 @@
..no_pllset:
#endif /* CONFIG_BUBINGA */
+#ifdef CONFIG_TAIHU
+ mfdcr r4, CPC0_BOOT
+ andi. r5, r4, CPC0_BOOT_SEP@l
+ bne strap_1 /* serial eeprom present */
+ addis r5,0,CPLD_REG0_ADDR@h
+ ori r5,r5,CPLD_REG0_ADDR@l
+ andi. r5, r5, 0x10
+ bne _pci_66mhz
+#endif /* CONFIG_TAIHU */
+
+#if defined(CONFIG_ZEUS)
+ mfdcr r4, CPC0_BOOT
+ andi. r5, r4, CPC0_BOOT_SEP@l
+ bne strap_1 /* serial eeprom present */
+ lis r3,0x0000
+ addi r3,r3,0x3030
+ lis r4,0x8042
+ addi r4,r4,0x223e
+ b 1f
+strap_1:
+ mfdcr r3, CPC0_PLLMR0
+ mfdcr r4, CPC0_PLLMR1
+ b 1f
+#endif
+
addis r3,0,PLLMR0_DEFAULT@h /* PLLMR0 default value */
ori r3,r3,PLLMR0_DEFAULT@l /* */
addis r4,0,PLLMR1_DEFAULT@h /* PLLMR1 default value */
ori r4,r4,PLLMR1_DEFAULT@l /* */
+#ifdef CONFIG_TAIHU
+ b 1f
+_pci_66mhz:
+ addis r3,0,PLLMR0_DEFAULT_PCI66@h
+ ori r3,r3,PLLMR0_DEFAULT_PCI66@l
+ addis r4,0,PLLMR1_DEFAULT_PCI66@h
+ ori r4,r4,PLLMR1_DEFAULT_PCI66@l
+ b 1f
+strap_1:
+ mfdcr r3, CPC0_PLLMR0
+ mfdcr r4, CPC0_PLLMR1
+#endif /* CONFIG_TAIHU */
+
+1:
b pll_write /* Write the CPC0_PLLMR with new value */
pll_done:
@@ -1892,13 +2047,6 @@
#endif /* CONFIG_405EP */
#if defined(CONFIG_440)
-#define function_prolog(func_name) .text; \
- .align 2; \
- .globl func_name; \
- func_name:
-#define function_epilog(func_name) .type func_name,@function; \
- .size func_name,.-func_name
-
/*----------------------------------------------------------------------------+
| mttlb3.
+----------------------------------------------------------------------------*/
@@ -1946,47 +2094,4 @@
TLBRE(3,3,0)
blr
function_epilog(mftlb1)
-
-/*----------------------------------------------------------------------------+
-| dcbz_area.
-+----------------------------------------------------------------------------*/
- function_prolog(dcbz_area)
- rlwinm. r5,r4,0,27,31
- rlwinm r5,r4,27,5,31
- beq ..d_ra2
- addi r5,r5,0x0001
-..d_ra2:mtctr r5
-..d_ag2:dcbz r0,r3
- addi r3,r3,32
- bdnz ..d_ag2
- sync
- blr
- function_epilog(dcbz_area)
-
-/*----------------------------------------------------------------------------+
-| dflush. Assume 32K at vector address is cachable.
-+----------------------------------------------------------------------------*/
- function_prolog(dflush)
- mfmsr r9
- rlwinm r8,r9,0,15,13
- rlwinm r8,r8,0,17,15
- mtmsr r8
- addi r3,r0,0x0000
- mtspr dvlim,r3
- mfspr r3,ivpr
- addi r4,r0,1024
- mtctr r4
-..dflush_loop:
- lwz r6,0x0(r3)
- addi r3,r3,32
- bdnz ..dflush_loop
- addi r3,r3,-32
- mtctr r4
-..ag: dcbf r0,r3
- addi r3,r3,-32
- bdnz ..ag
- sync
- mtmsr r9
- blr
- function_epilog(dflush)
#endif /* CONFIG_440 */
diff --git a/cpu/ppc4xx/tlb.c b/cpu/ppc4xx/tlb.c
index 50344a4..098694c 100644
--- a/cpu/ppc4xx/tlb.c
+++ b/cpu/ppc4xx/tlb.c
@@ -25,7 +25,6 @@
#if defined(CONFIG_440)
-#include <ppc4xx.h>
#include <ppc440.h>
#include <asm/io.h>
#include <asm/mmu.h>
@@ -36,7 +35,69 @@
unsigned long tlb_word2_i_value;
} region_t;
-static int add_tlb_entry(unsigned long base_addr,
+void remove_tlb(u32 vaddr, u32 size)
+{
+ int i;
+ u32 tlb_word0_value;
+ u32 tlb_vaddr;
+ u32 tlb_size = 0;
+
+ /* First, find the index of a TLB entry not being used */
+ for (i=0; i<PPC4XX_TLB_SIZE; i++) {
+ tlb_word0_value = mftlb1(i);
+ tlb_vaddr = TLB_WORD0_EPN_DECODE(tlb_word0_value);
+ if (((tlb_word0_value & TLB_WORD0_V_MASK) == TLB_WORD0_V_ENABLE) &&
+ (tlb_vaddr >= vaddr)) {
+ /*
+ * TLB is enabled and start address is lower or equal
+ * than the area we are looking for. Now we only have
+ * to check the size/end address for a match.
+ */
+ switch (tlb_word0_value & TLB_WORD0_SIZE_MASK) {
+ case TLB_WORD0_SIZE_1KB:
+ tlb_size = 1 << 10;
+ break;
+ case TLB_WORD0_SIZE_4KB:
+ tlb_size = 4 << 10;
+ break;
+ case TLB_WORD0_SIZE_16KB:
+ tlb_size = 16 << 10;
+ break;
+ case TLB_WORD0_SIZE_64KB:
+ tlb_size = 64 << 10;
+ break;
+ case TLB_WORD0_SIZE_256KB:
+ tlb_size = 256 << 10;
+ break;
+ case TLB_WORD0_SIZE_1MB:
+ tlb_size = 1 << 20;
+ break;
+ case TLB_WORD0_SIZE_16MB:
+ tlb_size = 16 << 20;
+ break;
+ case TLB_WORD0_SIZE_256MB:
+ tlb_size = 256 << 20;
+ break;
+ }
+
+ /*
+ * Now check the end-address if it's in the range
+ */
+ if ((tlb_vaddr + tlb_size - 1) <= (vaddr + size - 1))
+ /*
+ * Found a TLB in the range.
+ * Disable it by writing 0 to tlb0 word.
+ */
+ mttlb1(i, 0);
+ }
+ }
+
+ /* Execute an ISYNC instruction so that the new TLB entry takes effect */
+ asm("isync");
+}
+
+static int add_tlb_entry(unsigned long phys_addr,
+ unsigned long virt_addr,
unsigned long tlb_word0_size_value,
unsigned long tlb_word2_i_value)
{
@@ -55,9 +116,9 @@
return -1;
/* Second, create the TLB entry */
- tlb_word0_value = TLB_WORD0_EPN_ENCODE(base_addr) | TLB_WORD0_V_ENABLE |
+ tlb_word0_value = TLB_WORD0_EPN_ENCODE(virt_addr) | TLB_WORD0_V_ENABLE |
TLB_WORD0_TS_0 | tlb_word0_size_value;
- tlb_word1_value = TLB_WORD1_RPN_ENCODE(base_addr) | TLB_WORD1_ERPN_ENCODE(0);
+ tlb_word1_value = TLB_WORD1_RPN_ENCODE(phys_addr) | TLB_WORD1_ERPN_ENCODE(0);
tlb_word2_value = TLB_WORD2_U0_DISABLE | TLB_WORD2_U1_DISABLE |
TLB_WORD2_U2_DISABLE | TLB_WORD2_U3_DISABLE |
TLB_WORD2_W_DISABLE | tlb_word2_i_value |
@@ -81,7 +142,9 @@
return 0;
}
-static void program_tlb_addr(unsigned long base_addr, unsigned long mem_size,
+static void program_tlb_addr(unsigned long phys_addr,
+ unsigned long virt_addr,
+ unsigned long mem_size,
unsigned long tlb_word2_i_value)
{
int rc;
@@ -91,70 +154,86 @@
while (mem_size != 0) {
rc = 0;
/* Add the TLB entries in to map the region. */
- if (((base_addr & TLB_256MB_ALIGN_MASK) == base_addr) &&
+ if (((phys_addr & TLB_256MB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_256MB_SIZE)) {
/* Add a 256MB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_256MB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_256MB, tlb_i)) == 0) {
mem_size -= TLB_256MB_SIZE;
- base_addr += TLB_256MB_SIZE;
+ phys_addr += TLB_256MB_SIZE;
+ virt_addr += TLB_256MB_SIZE;
}
- } else if (((base_addr & TLB_16MB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_16MB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_16MB_SIZE)) {
/* Add a 16MB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_16MB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_16MB, tlb_i)) == 0) {
mem_size -= TLB_16MB_SIZE;
- base_addr += TLB_16MB_SIZE;
+ phys_addr += TLB_16MB_SIZE;
+ virt_addr += TLB_16MB_SIZE;
}
- } else if (((base_addr & TLB_1MB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_1MB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_1MB_SIZE)) {
/* Add a 1MB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_1MB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_1MB, tlb_i)) == 0) {
mem_size -= TLB_1MB_SIZE;
- base_addr += TLB_1MB_SIZE;
+ phys_addr += TLB_1MB_SIZE;
+ virt_addr += TLB_1MB_SIZE;
}
- } else if (((base_addr & TLB_256KB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_256KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_256KB_SIZE)) {
/* Add a 256KB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_256KB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_256KB, tlb_i)) == 0) {
mem_size -= TLB_256KB_SIZE;
- base_addr += TLB_256KB_SIZE;
+ phys_addr += TLB_256KB_SIZE;
+ virt_addr += TLB_256KB_SIZE;
}
- } else if (((base_addr & TLB_64KB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_64KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_64KB_SIZE)) {
/* Add a 64KB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_64KB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_64KB, tlb_i)) == 0) {
mem_size -= TLB_64KB_SIZE;
- base_addr += TLB_64KB_SIZE;
+ phys_addr += TLB_64KB_SIZE;
+ virt_addr += TLB_64KB_SIZE;
}
- } else if (((base_addr & TLB_16KB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_16KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_16KB_SIZE)) {
/* Add a 16KB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_16KB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_16KB, tlb_i)) == 0) {
mem_size -= TLB_16KB_SIZE;
- base_addr += TLB_16KB_SIZE;
+ phys_addr += TLB_16KB_SIZE;
+ virt_addr += TLB_16KB_SIZE;
}
- } else if (((base_addr & TLB_4KB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_4KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_4KB_SIZE)) {
/* Add a 4KB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_4KB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_4KB, tlb_i)) == 0) {
mem_size -= TLB_4KB_SIZE;
- base_addr += TLB_4KB_SIZE;
+ phys_addr += TLB_4KB_SIZE;
+ virt_addr += TLB_4KB_SIZE;
}
- } else if (((base_addr & TLB_1KB_ALIGN_MASK) == base_addr) &&
+ } else if (((phys_addr & TLB_1KB_ALIGN_MASK) == phys_addr) &&
(mem_size >= TLB_1KB_SIZE)) {
/* Add a 1KB TLB entry */
- if ((rc = add_tlb_entry(base_addr, TLB_WORD0_SIZE_1KB, tlb_i)) == 0) {
+ if ((rc = add_tlb_entry(phys_addr, virt_addr,
+ TLB_WORD0_SIZE_1KB, tlb_i)) == 0) {
mem_size -= TLB_1KB_SIZE;
- base_addr += TLB_1KB_SIZE;
+ phys_addr += TLB_1KB_SIZE;
+ virt_addr += TLB_1KB_SIZE;
}
} else {
printf("ERROR: no TLB size exists for the base address 0x%0X.\n",
- base_addr);
+ phys_addr);
}
if (rc != 0)
printf("ERROR: no TLB entries available for the base addr 0x%0X.\n",
- base_addr);
+ phys_addr);
}
return;
@@ -166,16 +245,16 @@
* Common usage for boards with SDRAM DIMM modules to dynamically
* configure the TLB's for the SDRAM
*/
-void program_tlb(u32 start, u32 size, u32 tlb_word2_i_value)
+void program_tlb(u32 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value)
{
region_t region_array;
- region_array.base = start;
+ region_array.base = phys_addr;
region_array.size = size;
region_array.tlb_word2_i_value = tlb_word2_i_value; /* en-/disable cache */
/* Call the routine to add in the tlb entries for the memory regions */
- program_tlb_addr(region_array.base, region_array.size,
+ program_tlb_addr(region_array.base, virt_addr, region_array.size,
region_array.tlb_word2_i_value);
return;
diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c
index 6aecca2..38b6f89 100644
--- a/cpu/ppc4xx/traps.c
+++ b/cpu/ppc4xx/traps.c
@@ -36,7 +36,9 @@
#include <command.h>
#include <asm/processor.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_KGDB)
int (*debugger_exception_handler)(struct pt_regs *) = 0;
#endif
@@ -45,8 +47,7 @@
/* THIS NEEDS CHANGING to use the board info structure.
*/
-#define END_OF_MEM 0x00400000
-
+#define END_OF_MEM (gd->bd->bi_memstart + gd->bd->bi_memsize)
static __inline__ void set_tsr(unsigned long val)
{
@@ -77,7 +78,7 @@
#define ESR_DIZ 0x00400000
#define ESR_U0F 0x00008000
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
extern void do_bedbug_breakpoint(struct pt_regs *);
#endif
@@ -110,7 +111,7 @@
{
int i;
- printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DAR: %08lX\n",
+ printf("NIP: %08lX XER: %08lX LR: %08lX REGS: %p TRAP: %04lx DEAR: %08lX\n",
regs->nip, regs->xer, regs->link, regs, regs->trap, regs->dar);
printf("MSR: %08lx EE: %01x PR: %01x FP: %01x ME: %01x IR/DR: %01x%01x\n",
regs->msr, regs->msr&MSR_EE ? 1 : 0, regs->msr&MSR_PR ? 1 : 0,
@@ -120,14 +121,12 @@
printf("\n");
for (i = 0; i < 32; i++) {
- if ((i % 8) == 0)
- {
+ if ((i % 8) == 0) {
printf("GPR%02d: ", i);
}
printf("%08lX ", regs->gpr[i]);
- if ((i % 8) == 7)
- {
+ if ((i % 8) == 7) {
printf("\n");
}
}
@@ -139,48 +138,166 @@
{
show_regs(regs);
print_backtrace((unsigned long *)regs->gpr[1]);
- panic("Exception in kernel pc %lx signal %d",regs->nip,signr);
+ panic("Exception");
}
void
MachineCheckException(struct pt_regs *regs)
{
- unsigned long fixup;
+ unsigned long fixup, val;
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+ u32 value2;
+ int corr_ecc = 0;
+ int uncorr_ecc = 0;
+#endif
- /* Probing PCI using config cycles cause this exception
- * when a device is not present. Catch it and return to
- * the PCI exception handler.
- */
if ((fixup = search_exception_table(regs->nip)) != 0) {
regs->nip = fixup;
+ val = mfspr(MCSR);
+ /* Clear MCSR */
+ mtspr(SPRN_MCSR, val);
return;
}
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
- printf("Machine check in kernel mode.\n");
+ printf("Machine Check Exception.\n");
printf("Caused by (from msr): ");
- printf("regs %p ",regs);
- switch( regs->msr & 0x000F0000) {
- case (0x80000000>>12):
- printf("Machine check signal - probably due to mm fault\n"
- "with mmu off\n");
+ printf("regs %p ", regs);
+
+ val = get_esr();
+
+#if !defined(CONFIG_440)
+ if (val& ESR_IMCP) {
+ printf("Instruction");
+ mtspr(ESR, val & ~ESR_IMCP);
+ } else {
+ printf("Data");
+ }
+ printf(" machine check.\n");
+
+#elif defined(CONFIG_440)
+ if (val& ESR_IMCP){
+ printf("Instruction Synchronous Machine Check exception\n");
+ mtspr(SPRN_ESR, val & ~ESR_IMCP);
+ } else {
+ val = mfspr(MCSR);
+ if (val & MCSR_IB)
+ printf("Instruction Read PLB Error\n");
+ if (val & MCSR_DRB)
+ printf("Data Read PLB Error\n");
+ if (val & MCSR_DWB)
+ printf("Data Write PLB Error\n");
+ if (val & MCSR_TLBP)
+ printf("TLB Parity Error\n");
+ if (val & MCSR_ICP){
+ /*flush_instruction_cache(); */
+ printf("I-Cache Parity Error\n");
+ }
+ if (val & MCSR_DCSP)
+ printf("D-Cache Search Parity Error\n");
+ if (val & MCSR_DCFP)
+ printf("D-Cache Flush Parity Error\n");
+ if (val & MCSR_IMPE)
+ printf("Machine Check exception is imprecise\n");
+
+ /* Clear MCSR */
+ mtspr(SPRN_MCSR, val);
+ }
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+ mfsdram(DDR0_00, val) ;
+ printf("DDR0: DDR0_00 %p\n", val);
+ val = (val >> 16) & 0xff;
+ if (val & 0x80)
+ printf("DDR0: At least one interrupt active\n");
+ if (val & 0x40)
+ printf("DDR0: DRAM initialization complete.\n");
+ if (val & 0x20) {
+ printf("DDR0: Multiple uncorrectable ECC events.\n");
+ uncorr_ecc = 1;
+ }
+ if (val & 0x10) {
+ printf("DDR0: Single uncorrectable ECC event.\n");
+ uncorr_ecc = 1;
+ }
+ if (val & 0x08) {
+ printf("DDR0: Multiple correctable ECC events.\n");
+ corr_ecc = 1;
+ }
+ if (val & 0x04) {
+ printf("DDR0: Single correctable ECC event.\n");
+ corr_ecc = 1;
+ }
+ if (val & 0x02)
+ printf("Multiple accesses outside the defined"
+ " physical memory space detected\n");
+ if (val & 0x01)
+ printf("DDR0: Single access outside the defined"
+ " physical memory space detected.\n");
+
+ mfsdram(DDR0_01, val);
+ val = (val >> 8) & 0x7;
+ switch (val ) {
+ case 0:
+ printf("DDR0: Write Out-of-Range command\n");
break;
- case (0x80000000>>13):
- printf("Transfer error ack signal\n");
+ case 1:
+ printf("DDR0: Read Out-of-Range command\n");
break;
- case (0x80000000>>14):
- printf("Data parity signal\n");
+ case 2:
+ printf("DDR0: Masked write Out-of-Range command\n");
break;
- case (0x80000000>>15):
- printf("Address parity signal\n");
+ case 4:
+ printf("DDR0: Wrap write Out-of-Range command\n");
+ break;
+ case 5:
+ printf("DDR0: Wrap read Out-of-Range command\n");
break;
default:
- printf("Unknown values in msr\n");
+ mfsdram(DDR0_01, value2);
+ printf("DDR0: No DDR0 error know 0x%x %p\n", val, value2);
}
+ mfsdram(DDR0_23, val);
+ if (((val >> 16) & 0xff) && corr_ecc)
+ printf("DDR0: Syndrome for correctable ECC event 0x%x\n",
+ (val >> 16) & 0xff);
+ mfsdram(DDR0_23, val);
+ if (((val >> 8) & 0xff) && uncorr_ecc)
+ printf("DDR0: Syndrome for uncorrectable ECC event 0x%x\n",
+ (val >> 8) & 0xff);
+ mfsdram(DDR0_33, val);
+ if (val)
+ printf("DDR0: Address of command that caused an "
+ "Out-of-Range interrupt %p\n", val);
+ mfsdram(DDR0_34, val);
+ if (val && uncorr_ecc)
+ printf("DDR0: Address of uncorrectable ECC event %p\n", val);
+ mfsdram(DDR0_35, val);
+ if (val && uncorr_ecc)
+ printf("DDR0: Address of uncorrectable ECC event %p\n", val);
+ mfsdram(DDR0_36, val);
+ if (val && uncorr_ecc)
+ printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
+ mfsdram(DDR0_37, val);
+ if (val && uncorr_ecc)
+ printf("DDR0: Data of uncorrectable ECC event 0x%08x\n", val);
+ mfsdram(DDR0_38, val);
+ if (val && corr_ecc)
+ printf("DDR0: Address of correctable ECC event %p\n", val);
+ mfsdram(DDR0_39, val);
+ if (val && corr_ecc)
+ printf("DDR0: Address of correctable ECC event %p\n", val);
+ mfsdram(DDR0_40, val);
+ if (val && corr_ecc)
+ printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
+ mfsdram(DDR0_41, val);
+ if (val && corr_ecc)
+ printf("DDR0: Data of correctable ECC event 0x%08x\n", val);
+#endif /* CONFIG_440EPX */
+#endif /* CONFIG_440 */
show_regs(regs);
print_backtrace((unsigned long *)regs->gpr[1]);
panic("machine check");
@@ -189,7 +306,7 @@
void
AlignmentException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -204,7 +321,7 @@
{
long esr_val;
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -224,7 +341,7 @@
}
void
-PITException(struct pt_regs *regs)
+DecrementerPITException(struct pt_regs *regs)
{
/*
* Reset PIT interrupt
@@ -241,7 +358,7 @@
void
UnknownException(struct pt_regs *regs)
{
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
if (debugger_exception_handler && (*debugger_exception_handler)(regs))
return;
#endif
@@ -256,7 +373,7 @@
{
printf("Debugger trap at @ %lx\n", regs->nip );
show_regs(regs);
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
do_bedbug_breakpoint( regs );
#endif
}
@@ -272,17 +389,17 @@
__asm__ __volatile__( \
"1: lwz %0,0(%1)\n" \
- " eieio\n" \
- " li %0,0\n" \
- "2:\n" \
- ".section .fixup,\"ax\"\n" \
- "3: li %0,-1\n" \
- " b 2b\n" \
- ".section __ex_table,\"a\"\n" \
- " .align 2\n" \
- " .long 1b,3b\n" \
- ".text" \
- : "=r" (retval) : "r"(addr));
+ " eieio\n" \
+ " li %0,0\n" \
+ "2:\n" \
+ ".section .fixup,\"ax\"\n" \
+ "3: li %0,-1\n" \
+ " b 2b\n" \
+ ".section __ex_table,\"a\"\n" \
+ " .align 2\n" \
+ " .long 1b,3b\n" \
+ ".text" \
+ : "=r" (retval) : "r"(addr));
return (retval);
#endif
diff --git a/cpu/ppc4xx/usb.c b/cpu/ppc4xx/usb.c
new file mode 100644
index 0000000..272ed8c
--- /dev/null
+++ b/cpu/ppc4xx/usb.c
@@ -0,0 +1,50 @@
+/*
+ * (C) Copyright 2007
+ * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+
+#include "usbdev.h"
+
+int usb_cpu_init(void)
+{
+
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPX)
+ usb_dev_init();
+#endif
+
+ return 0;
+}
+
+int usb_cpu_stop(void)
+{
+ return 0;
+}
+
+int usb_cpu_init_fail(void)
+{
+ return 0;
+}
+
+#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/cpu/ppc4xx/usbdev.c b/cpu/ppc4xx/usbdev.c
index 6140d2a..5924a6c 100644
--- a/cpu/ppc4xx/usbdev.c
+++ b/cpu/ppc4xx/usbdev.c
@@ -3,7 +3,7 @@
#include <common.h>
#include <asm/processor.h>
-#if (defined(CONFIG_440EP) || defined(CONFIG_440EPX)) && (CONFIG_COMMANDS & CFG_CMD_USB)
+#if (defined(CONFIG_440EP) || defined(CONFIG_440EPX)) && defined(CONFIG_CMD_USB)
#include <usb.h>
#include "usbdev.h"
diff --git a/cpu/pxa/Makefile b/cpu/pxa/Makefile
index cded7ff..8b4367e 100644
--- a/cpu/pxa/Makefile
+++ b/cpu/pxa/Makefile
@@ -26,7 +26,7 @@
LIB = $(obj)lib$(CPU).a
START = start.o
-COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o mmc.o
+COBJS = serial.o interrupts.o cpu.o i2c.o pxafb.o mmc.o usb.o
SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/cpu/pxa/serial.c b/cpu/pxa/serial.c
index cb3a478..51e7f65 100644
--- a/cpu/pxa/serial.c
+++ b/cpu/pxa/serial.c
@@ -30,11 +30,28 @@
#include <common.h>
#include <watchdog.h>
+#include <serial.h>
#include <asm/arch/pxa-regs.h>
DECLARE_GLOBAL_DATA_PTR;
-void serial_setbrg (void)
+#define FFUART 0
+#define BTUART 1
+#define STUART 2
+
+#ifndef CONFIG_SERIAL_MULTI
+#if defined (CONFIG_FFUART)
+#define UART_INDEX FFUART
+#elif defined (CONFIG_BTUART)
+#define UART_INDEX BTUART
+#elif defined (CONFIG_STUART)
+#define UART_INDEX STUART
+#else
+#error "Bad: you didn't configure serial ..."
+#endif
+#endif
+
+void pxa_setbrg_dev (unsigned int uart_index)
{
unsigned int quot = 0;
@@ -53,63 +70,68 @@
else
hang ();
-#ifdef CONFIG_FFUART
+ switch (uart_index) {
+ case FFUART:
#ifdef CONFIG_CPU_MONAHANS
- CKENA |= CKENA_22_FFUART;
+ CKENA |= CKENA_22_FFUART;
#else
- CKEN |= CKEN6_FFUART;
+ CKEN |= CKEN6_FFUART;
#endif /* CONFIG_CPU_MONAHANS */
- FFIER = 0; /* Disable for now */
- FFFCR = 0; /* No fifos enabled */
+ FFIER = 0; /* Disable for now */
+ FFFCR = 0; /* No fifos enabled */
- /* set baud rate */
- FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB;
- FFDLL = quot & 0xff;
- FFDLH = quot >> 8;
- FFLCR = LCR_WLS0 | LCR_WLS1;
+ /* set baud rate */
+ FFLCR = LCR_WLS0 | LCR_WLS1 | LCR_DLAB;
+ FFDLL = quot & 0xff;
+ FFDLH = quot >> 8;
+ FFLCR = LCR_WLS0 | LCR_WLS1;
- FFIER = IER_UUE; /* Enable FFUART */
+ FFIER = IER_UUE; /* Enable FFUART */
+ break;
-#elif defined(CONFIG_BTUART)
+ case BTUART:
#ifdef CONFIG_CPU_MONAHANS
- CKENA |= CKENA_21_BTUART;
+ CKENA |= CKENA_21_BTUART;
#else
- CKEN |= CKEN7_BTUART;
+ CKEN |= CKEN7_BTUART;
#endif /* CONFIG_CPU_MONAHANS */
- BTIER = 0;
- BTFCR = 0;
+ BTIER = 0;
+ BTFCR = 0;
- /* set baud rate */
- BTLCR = LCR_DLAB;
- BTDLL = quot & 0xff;
- BTDLH = quot >> 8;
- BTLCR = LCR_WLS0 | LCR_WLS1;
+ /* set baud rate */
+ BTLCR = LCR_DLAB;
+ BTDLL = quot & 0xff;
+ BTDLH = quot >> 8;
+ BTLCR = LCR_WLS0 | LCR_WLS1;
- BTIER = IER_UUE; /* Enable BFUART */
+ BTIER = IER_UUE; /* Enable BFUART */
-#elif defined(CONFIG_STUART)
+ break;
+
+ case STUART:
#ifdef CONFIG_CPU_MONAHANS
- CKENA |= CKENA_23_STUART;
+ CKENA |= CKENA_23_STUART;
#else
- CKEN |= CKEN5_STUART;
+ CKEN |= CKEN5_STUART;
#endif /* CONFIG_CPU_MONAHANS */
- STIER = 0;
- STFCR = 0;
+ STIER = 0;
+ STFCR = 0;
- /* set baud rate */
- STLCR = LCR_DLAB;
- STDLL = quot & 0xff;
- STDLH = quot >> 8;
- STLCR = LCR_WLS0 | LCR_WLS1;
+ /* set baud rate */
+ STLCR = LCR_DLAB;
+ STDLL = quot & 0xff;
+ STDLH = quot >> 8;
+ STLCR = LCR_WLS0 | LCR_WLS1;
- STIER = IER_UUE; /* Enable STUART */
+ STIER = IER_UUE; /* Enable STUART */
+ break;
-#else
-#error "Bad: you didn't configure serial ..."
-#endif
+ default:
+ hang();
+ }
}
@@ -118,9 +140,9 @@
* are always 8 data bits, no parity, 1 stop bit, no start bits.
*
*/
-int serial_init (void)
+int pxa_init_dev (unsigned int uart_index)
{
- serial_setbrg ();
+ pxa_setbrg_dev (uart_index);
return (0);
}
@@ -129,26 +151,32 @@
/*
* Output a single byte to the serial port.
*/
-void serial_putc (const char c)
+void pxa_putc_dev (unsigned int uart_index,const char c)
{
-#ifdef CONFIG_FFUART
- /* wait for room in the tx FIFO on FFUART */
- while ((FFLSR & LSR_TEMT) == 0)
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
- FFTHR = c;
-#elif defined(CONFIG_BTUART)
- while ((BTLSR & LSR_TEMT ) == 0 )
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
- BTTHR = c;
-#elif defined(CONFIG_STUART)
- while ((STLSR & LSR_TEMT ) == 0 )
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
- STTHR = c;
-#endif
+ switch (uart_index) {
+ case FFUART:
+ /* wait for room in the tx FIFO on FFUART */
+ while ((FFLSR & LSR_TEMT) == 0)
+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
+ FFTHR = c;
+ break;
+
+ case BTUART:
+ while ((BTLSR & LSR_TEMT ) == 0 )
+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
+ BTTHR = c;
+ break;
+
+ case STUART:
+ while ((STLSR & LSR_TEMT ) == 0 )
+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
+ STTHR = c;
+ break;
+ }
/* If \n, also do \r */
if (c == '\n')
- serial_putc ('\r');
+ pxa_putc_dev (uart_index,'\r');
}
/*
@@ -156,15 +184,17 @@
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
-int serial_tstc (void)
+int pxa_tstc_dev (unsigned int uart_index)
{
-#ifdef CONFIG_FFUART
- return FFLSR & LSR_DR;
-#elif defined(CONFIG_BTUART)
- return BTLSR & LSR_DR;
-#elif defined(CONFIG_STUART)
- return STLSR & LSR_DR;
-#endif
+ switch (uart_index) {
+ case FFUART:
+ return FFLSR & LSR_DR;
+ case BTUART:
+ return BTLSR & LSR_DR;
+ case STUART:
+ return STLSR & LSR_DR;
+ }
+ return -1;
}
/*
@@ -172,27 +202,184 @@
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
-int serial_getc (void)
+int pxa_getc_dev (unsigned int uart_index)
{
-#ifdef CONFIG_FFUART
- while (!(FFLSR & LSR_DR))
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
- return (char) FFRBR & 0xff;
-#elif defined(CONFIG_BTUART)
- while (!(BTLSR & LSR_DR))
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
- return (char) BTRBR & 0xff;
-#elif defined(CONFIG_STUART)
- while (!(STLSR & LSR_DR))
- WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
- return (char) STRBR & 0xff;
-#endif
+ switch (uart_index) {
+ case FFUART:
+ while (!(FFLSR & LSR_DR))
+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
+ return (char) FFRBR & 0xff;
+
+ case BTUART:
+ while (!(BTLSR & LSR_DR))
+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
+ return (char) BTRBR & 0xff;
+ case STUART:
+ while (!(STLSR & LSR_DR))
+ WATCHDOG_RESET (); /* Reset HW Watchdog, if needed */
+ return (char) STRBR & 0xff;
+ }
+ return -1;
}
void
-serial_puts (const char *s)
+pxa_puts_dev (unsigned int uart_index,const char *s)
{
while (*s) {
- serial_putc (*s++);
+ pxa_putc_dev (uart_index,*s++);
}
}
+
+#if defined (CONFIG_FFUART)
+static int ffuart_init(void)
+{
+ return pxa_init_dev(FFUART);
+}
+
+static void ffuart_setbrg(void)
+{
+ return pxa_setbrg_dev(FFUART);
+}
+
+static void ffuart_putc(const char c)
+{
+ return pxa_putc_dev(FFUART,c);
+}
+
+static void ffuart_puts(const char *s)
+{
+ return pxa_puts_dev(FFUART,s);
+}
+
+static int ffuart_getc(void)
+{
+ return pxa_getc_dev(FFUART);
+}
+
+static int ffuart_tstc(void)
+{
+ return pxa_tstc_dev(FFUART);
+}
+
+struct serial_device serial_ffuart_device =
+{
+ "serial_ffuart",
+ "PXA",
+ ffuart_init,
+ ffuart_setbrg,
+ ffuart_getc,
+ ffuart_tstc,
+ ffuart_putc,
+ ffuart_puts,
+};
+#endif
+
+#if defined (CONFIG_BTUART)
+static int btuart_init(void)
+{
+ return pxa_init_dev(BTUART);
+}
+
+static void btuart_setbrg(void)
+{
+ return pxa_setbrg_dev(BTUART);
+}
+
+static void btuart_putc(const char c)
+{
+ return pxa_putc_dev(BTUART,c);
+}
+
+static void btuart_puts(const char *s)
+{
+ return pxa_puts_dev(BTUART,s);
+}
+
+static int btuart_getc(void)
+{
+ return pxa_getc_dev(BTUART);
+}
+
+static int btuart_tstc(void)
+{
+ return pxa_tstc_dev(BTUART);
+}
+
+struct serial_device serial_btuart_device =
+{
+ "serial_btuart",
+ "PXA",
+ btuart_init,
+ btuart_setbrg,
+ btuart_getc,
+ btuart_tstc,
+ btuart_putc,
+ btuart_puts,
+};
+#endif
+
+#if defined (CONFIG_STUART)
+static int stuart_init(void)
+{
+ return pxa_init_dev(STUART);
+}
+
+static void stuart_setbrg(void)
+{
+ return pxa_setbrg_dev(STUART);
+}
+
+static void stuart_putc(const char c)
+{
+ return pxa_putc_dev(STUART,c);
+}
+
+static void stuart_puts(const char *s)
+{
+ return pxa_puts_dev(STUART,s);
+}
+
+static int stuart_getc(void)
+{
+ return pxa_getc_dev(STUART);
+}
+
+static int stuart_tstc(void)
+{
+ return pxa_tstc_dev(STUART);
+}
+
+struct serial_device serial_stuart_device =
+{
+ "serial_stuart",
+ "PXA",
+ stuart_init,
+ stuart_setbrg,
+ stuart_getc,
+ stuart_tstc,
+ stuart_putc,
+ stuart_puts,
+};
+#endif
+
+
+#ifndef CONFIG_SERIAL_MULTI
+inline int serial_init(void) {
+ return (pxa_init_dev(UART_INDEX));
+}
+void serial_setbrg(void) {
+ pxa_setbrg_dev(UART_INDEX);
+}
+int serial_getc(void) {
+ return(pxa_getc_dev(UART_INDEX));
+}
+int serial_tstc(void) {
+ return(pxa_tstc_dev(UART_INDEX));
+}
+void serial_putc(const char c) {
+ pxa_putc_dev(UART_INDEX,c);
+}
+void serial_puts(const char *s) {
+ pxa_puts_dev(UART_INDEX,s);
+}
+#endif /* CONFIG_SERIAL_MULTI */
diff --git a/cpu/pxa/usb.c b/cpu/pxa/usb.c
new file mode 100644
index 0000000..65f457f
--- /dev/null
+++ b/cpu/pxa/usb.c
@@ -0,0 +1,79 @@
+/*
+ * (C) Copyright 2006
+ * Markus Klotzbuecher, DENX Software Engineering <mk@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_USB_OHCI_NEW) && defined(CFG_USB_OHCI_CPU_INIT)
+# if defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X)
+
+#include <asm/arch/pxa-regs.h>
+
+int usb_cpu_init()
+{
+#if defined(CONFIG_CPU_MONAHANS)
+ /* Enable USB host clock. */
+ CKENA |= (CKENA_2_USBHOST | CKENA_20_UDC);
+ udelay(100);
+#endif
+#if defined(CONFIG_PXA27X)
+ /* Enable USB host clock. */
+ CKEN |= CKEN10_USBHOST;
+#endif
+
+#if defined(CONFIG_CPU_MONAHANS)
+ /* Configure Port 2 for Host (USB Client Registers) */
+ UP2OCR = 0x3000c;
+#endif
+
+ UHCHR |= UHCHR_FHR;
+ wait_ms(11);
+ UHCHR &= ~UHCHR_FHR;
+
+ UHCHR |= UHCHR_FSBIR;
+ while (UHCHR & UHCHR_FSBIR)
+ udelay(1);
+
+#if defined(CONFIG_CPU_MONAHANS)
+ UHCHR &= ~UHCHR_SSEP0;
+#endif
+#if defined(CONFIG_PXA27X)
+ UHCHR &= ~UHCHR_SSEP2;
+#endif
+ UHCHR &= ~UHCHR_SSEP1;
+ UHCHR &= ~UHCHR_SSE;
+
+ return 0;
+}
+
+int usb_cpu_stop()
+{
+ return 0;
+}
+
+int usb_cpu_init_fail()
+{
+ return 0;
+}
+
+# endif /* defined(CONFIG_CPU_MONAHANS) || defined(CONFIG_PXA27X) */
+#endif /* defined(CONFIG_USB_OHCI) && defined(CFG_USB_OHCI_CPU_INIT) */
diff --git a/disk/part.c b/disk/part.c
index acc1a74..56b9427 100644
--- a/disk/part.c
+++ b/disk/part.c
@@ -34,9 +34,9 @@
#define PRINTF(fmt,args...)
#endif
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) )
@@ -46,13 +46,13 @@
};
static const struct block_drvr block_drvr[] = {
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
{ .name = "ide", .get_dev = ide_get_dev, },
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#if defined(CONFIG_CMD_SCSI)
{ .name = "scsi", .get_dev = scsi_get_dev, },
#endif
-#if ((CONFIG_COMMANDS & CFG_CMD_USB) && defined(CONFIG_USB_STORAGE))
+#if defined(CONFIG_CMD_USB) && defined(CONFIG_USB_STORAGE)
{ .name = "usb", .get_dev = usb_stor_get_dev, },
#endif
#if defined(CONFIG_MMC)
@@ -86,9 +86,9 @@
}
#endif
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) )
@@ -174,11 +174,11 @@
puts (" Capacity: not available\n");
}
}
-#endif /* CFG_CMD_IDE || CFG_CMD_SCSI || CFG_CMD_USB || CONFIG_MMC */
+#endif
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) )
@@ -219,9 +219,10 @@
}
-int get_partition_info (block_dev_desc_t *dev_desc, int part, disk_partition_t *info)
+int get_partition_info (block_dev_desc_t *dev_desc, int part
+ , disk_partition_t *info)
{
- switch (dev_desc->part_type) {
+ switch (dev_desc->part_type) {
#ifdef CONFIG_MAC_PARTITION
case PART_TYPE_MAC:
if (get_partition_info_mac(dev_desc,part,info) == 0) {
@@ -325,7 +326,8 @@
#else /* neither MAC nor DOS nor ISO partition configured */
-# error neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION nor CONFIG_ISO_PARTITION configured!
+# error neither CONFIG_MAC_PARTITION nor CONFIG_DOS_PARTITION
+# error nor CONFIG_ISO_PARTITION configured!
#endif
-#endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) || CONFIG_COMMANDS & CFG_CMD_SCSI) */
+#endif
diff --git a/disk/part_amiga.c b/disk/part_amiga.c
index 41e68fc..6c3d748 100644
--- a/disk/part_amiga.c
+++ b/disk/part_amiga.c
@@ -26,9 +26,9 @@
#include <ide.h>
#include "part_amiga.h"
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_AMIGA_PARTITION)
diff --git a/disk/part_dos.c b/disk/part_dos.c
index 133ee79..4707f80 100644
--- a/disk/part_dos.c
+++ b/disk/part_dos.c
@@ -35,9 +35,9 @@
#include <ide.h>
#include "part_dos.h"
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_DOS_PARTITION)
@@ -248,4 +248,4 @@
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) && CONFIG_DOS_PARTITION */
+#endif
diff --git a/disk/part_iso.c b/disk/part_iso.c
index 0735324..06dd75e 100644
--- a/disk/part_iso.c
+++ b/disk/part_iso.c
@@ -25,9 +25,9 @@
#include <command.h>
#include "part_iso.h"
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_ISO_PARTITION)
@@ -257,4 +257,4 @@
return(get_partition_info_iso_verb(dev_desc,0,&info,0));
}
-#endif /* ((CONFIG_COMMANDS & CFG_CMD_IDE) || (CONFIG_COMMANDS & CFG_CMD_SCSI)) && defined(CONFIG_ISO_PARTITION) */
+#endif
diff --git a/disk/part_mac.c b/disk/part_mac.c
index 8c23e21..d303a73 100644
--- a/disk/part_mac.c
+++ b/disk/part_mac.c
@@ -34,9 +34,9 @@
#include <ide.h>
#include "part_mac.h"
-#if ((CONFIG_COMMANDS & CFG_CMD_IDE) || \
- (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || \
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
defined(CONFIG_MMC) || \
defined(CONFIG_SYSTEMACE) ) && defined(CONFIG_MAC_PARTITION)
@@ -251,4 +251,4 @@
return (0);
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) && CONFIG_MAC_PARTITION */
+#endif
diff --git a/doc/README.JFFS2 b/doc/README.JFFS2
index 270da90..c5d67fd 100644
--- a/doc/README.JFFS2
+++ b/doc/README.JFFS2
@@ -2,7 +2,7 @@
-----------------------
JFFS2 in U-Boot is a read only implementation of the file system in
-Linux with the same name. To use JFFS2 define CFG_CMD_JFFS2.
+Linux with the same name. To use JFFS2 define CONFIG_CMD_JFFS2.
The module adds three new commands.
fsload - load binary file from a file system image
diff --git a/doc/README.PIP405 b/doc/README.PIP405
index c5ccf18..610ff21 100644
--- a/doc/README.PIP405
+++ b/doc/README.PIP405
@@ -32,10 +32,8 @@
- include/cmd_bsp.h added PIP405 commands definitions
- include/cmd_condefs.h added Floppy and SCSI support
- include/cmd_disk.h changed to work with block device description
-- include/config_LANTEC.h excluded CFG_CMD_FDC and CFG_CMD_SCSI from
- CONFIG_CMD_FULL
-- include/config_hymod.h excluded CFG_CMD_FDC and CFG_CMD_SCSI from
- CONFIG_CMD_FULL
+- include/config_LANTEC.h excluded CONFIG_CMD_FDC and CONFIG_CMD_SCSI
+- include/config_hymod.h excluded CONFIG_CMD_FDC and CONFIG_CMD_SCSI
- include/flash.h added INTEL_ID_28F320C3T 0x88C488C4
- include/i2c.h added "defined(CONFIG_PIP405)"
- include/image.h added IH_OS_U_BOOT, IH_TYPE_FIRMWARE
@@ -88,8 +86,8 @@
New Commands:
-------------
-CFG_CMD_SCSI SCSI Support
-CFG_CMF_FDC Floppy disk support
+CONFIG_CMD_SCSI SCSI Support
+CONFIG_CMF_FDC Floppy disk support
IDE additions:
--------------
@@ -172,8 +170,8 @@
Floppy support:
---------------
Support of a standard floppy disk controller at address CFG_ISA_IO_BASE_ADDRESS
-+ 0x3F0. Enabled with define CFG_CMD_FDC. Reads a unformated floppy disk with a
-image header (see: mkimage). No interrupts and no DMA are used for this.
++ 0x3F0. Enabled with define CONFIG_CMD_FDC. Reads a unformated floppy disk
+with a image header (see: mkimage). No interrupts and no DMA are used for this.
Added files:
- common/cmd_fdc.c
- include/cmd_fdc.h
diff --git a/doc/README.SNTP b/doc/README.SNTP
index fd6f209..9edc957 100644
--- a/doc/README.SNTP
+++ b/doc/README.SNTP
@@ -1,5 +1,5 @@
-To use SNTP support, add a define CFG_CMD_SNTP to CONFIG_COMMANDS in
-the configuration file of the board.
+To use SNTP support, add define CONFIG_CMD_SNTP to the
+configuration file of the board.
The "sntp" command gets network time from NTP time server and
syncronize RTC of the board. This command needs the command line
diff --git a/doc/README.bamboo b/doc/README.bamboo
index b50be01..e139c6d 100644
--- a/doc/README.bamboo
+++ b/doc/README.bamboo
@@ -1,3 +1,65 @@
+The 2 important dipswitches are configured as shown below:
+
+SW1 (for 33MHz SysClk)
+----------------------
+S1 S2 S3 S4 S5 S6 S7 S8
+OFF OFF OFF OFF OFF OFF OFF ON
+
+SW7 (for Op-Code Flash and Boot Option H)
+-----------------------------------------
+S1 S2 S3 S4 S5 S6 S7 S8
+OFF OFF OFF ON OFF OFF OFF OFF
+
+The EEPROM at location 0x52 is loaded with these 16 bytes:
+C47042A6 05D7A190 40082350 0d050000
+
+SDR0_SDSTP0[ENG]: 1 : PLL's VCO is the source for PLL forward divisors
+SDR0_SDSTP0[SRC]: 1 : Feedback originates from PLLOUTB
+SDR0_SDSTP0[SEL]: 0 : Feedback selection is PLL output
+SDR0_SDSTP0[TUNE]: 1000111000 : 10 <= M <= 22, 600MHz < VCO <= 900MHz
+SDR0_SDSTP0[FBDV]: 4 : PLL feedback divisor
+SDR0_SDSTP0[FBDVA]: 2 : PLL forward divisor A
+SDR0_SDSTP0[FBDVB]: 5 : PLL forward divisor B
+SDR0_SDSTP0[PRBDV0]: 1 : PLL primary divisor B
+SDR0_SDSTP0[OPBDV0]: 2 : OPB clock divisor
+SDR0_SDSTP0[LFBDV]: 1 : PLL local feedback divisor
+SDR0_SDSTP0[PERDV0]: 3 : Peripheral clock divisor 0
+SDR0_SDSTP0[MALDV0]: 2 : MAL clock divisor 0
+SDR0_SDSTP0[PCIDV0]: 2 : Sync PCI clock divisor 0
+SDR0_SDSTP0[PLLTIMER]: 7 : PLL locking timer
+SDR0_SDSTP0[RW]: 1 : EBC ROM width: 16-bit
+SDR0_SDSTP0[RL]: 0 : EBC ROM location: EBC
+SDR0_SDSTP0[PAE]: 0 : PCI internal arbiter: disabled
+SDR0_SDSTP0[PHCE]: 0 : PCI host configuration: disabled
+SDR0_SDSTP0[ZM]: 3 : ZMII mode: RMII mode 100
+SDR0_SDSTP0[CTE]: 0 : CPU trace: disabled
+SDR0_SDSTP0[Nto1]: 0 : CPU/PLB ratio N/P: not N to 1
+SDR0_SDSTP0[PAME]: 1 : PCI asynchronous mode: enabled
+SDR0_SDSTP0[MEM]: 1 : Multiplex: EMAC
+SDR0_SDSTP0[NE]: 0 : NDFC: disabled
+SDR0_SDSTP0[NBW]: 0 : NDFC boot width: 8-bit
+SDR0_SDSTP0[NBW]: 0 : NDFC boot page selection
+SDR0_SDSTP0[NBAC]: 0 : NDFC boot address selection cycle: 3 Addr. Cycles, 1 Col. + 2 Row (512 page size)
+SDR0_SDSTP0[NARE]: 0 : NDFC auto read : disabled
+SDR0_SDSTP0[NRB]: 0 : NDFC Ready/Busy : Ready
+SDR0_SDSTP0[NDRSC]: 33333 : NDFC device reset counter
+SDR0_SDSTP0[NCG0]: 0 : NDFC/EBC chip select gating CS0 : EBC
+SDR0_SDSTP0[NCG1]: 0 : NDFC/EBC chip select gating CS1 : EBC
+SDR0_SDSTP0[NCG2]: 0 : NDFC/EBC chip select gating CS2 : EBC
+SDR0_SDSTP0[NCG3]: 0 : NDFC/EBC chip select gating CS3 : EBC
+SDR0_SDSTP0[NCRDC]: 3333 : NDFC device read count
+
+PPC440EP Clocking Configuration
+
+SysClk is 33.0MHz, M is 20, VCO is 660.0MHz, CPU is 330.0MHz, PLB is 132.0MHz
+OPB is 66.0MHz, EBC is 44.0MHz, MAL is 66.0MHz, Sync PCI is 66.0MHz
+
+The above information is reported by Eugene O'Brien
+<Eugene.O'Brien@advantechamt.com>. Thanks a lot.
+
+2007-08-06, Stefan Roese <sr@denx.de>
+---------------------------------------------------------------------
+
The configuration for the AMCC 440EP eval board "Bamboo" was changed
to only use 384 kbytes of FLASH for the U-Boot image. This way the
redundant environment can be saved in the remaining 2 sectors of the
diff --git a/doc/README.bedbug b/doc/README.bedbug
index 9cfb421..2616acc 100644
--- a/doc/README.bedbug
+++ b/doc/README.bedbug
@@ -31,12 +31,6 @@
if it is an illegal instruction, privileged instruction or
a trap. Also added debug trap handler.
-./include/cmd_confdefs.h
- Added definition of CFG_CMD_BEDBUG.
-
-./include/config_WALNUT405.h
- Added CFG_CMD_BEDBUG to the CONFIG_COMMANDS for the WALNUT.
-
./include/ppc_asm.tmpl
Added code to handle critical exceptions
@@ -78,10 +72,6 @@
cpu/mpc8xx/traps.c
Added new routine DebugException()
- include/config_MBX.h
- Added CFG_CMD_BEDBUG to CONFIG_COMMANDS define
-
-
New Files:
cpu/mpc8xx/bedbug_860.c
diff --git a/doc/README.generic_usb_ohci b/doc/README.generic_usb_ohci
new file mode 100644
index 0000000..494dd1f
--- /dev/null
+++ b/doc/README.generic_usb_ohci
@@ -0,0 +1,57 @@
+Notes on the the generic USB-OHCI driver
+========================================
+
+This driver (drivers/usb_ohci.[ch]) is the result of the merge of
+various existing OHCI drivers that were basically identical beside
+cpu/board dependant initalization. This initalization has been moved
+into cpu/board directories and are called via the hooks below.
+
+Configuration options
+----------------------
+
+ CONFIG_USB_OHCI_NEW: enable the new OHCI driver
+
+ CFG_USB_OHCI_BOARD_INIT: call the board dependant hooks:
+
+ - extern int usb_board_init(void);
+ - extern int usb_board_stop(void);
+ - extern int usb_cpu_init_fail(void);
+
+ CFG_USB_OHCI_CPU_INIT: call the cpu dependant hooks:
+
+ - extern int usb_cpu_init(void);
+ - extern int usb_cpu_stop(void);
+ - extern int usb_cpu_init_fail(void);
+
+ CFG_USB_OHCI_REGS_BASE: defines the base address of the OHCI
+ registers
+
+ CFG_USB_OHCI_SLOT_NAME: slot name
+
+ CFG_USB_OHCI_MAX_ROOT_PORTS: maximal number of ports of the
+ root hub.
+
+
+Endianness issues
+------------------
+
+The USB bus operates in little endian, but unfortunately there are
+OHCI controllers that operate in big endian such as ppc4xx and
+mpc5xxx. For these the config option
+
+ CFG_OHCI_BE_CONTROLLER
+
+needs to be defined.
+
+
+PCI Controllers
+----------------
+
+You'll need to define
+
+ CONFIG_PCI_OHCI
+
+PCI Controllers need to do byte swapping on register accesses, so they
+should to define:
+
+ CFG_OHCI_SWAP_REG_ACCESS
diff --git a/doc/README.m5253evbe b/doc/README.m5253evbe
new file mode 100644
index 0000000..0426cb1
--- /dev/null
+++ b/doc/README.m5253evbe
@@ -0,0 +1,103 @@
+Freescale Amadeus Plus M5253EVBE board
+======================================
+
+Hayden Fraser(Hayden.Fraser@freescale.com)
+Created 06/05/2007
+===========================================
+
+
+1. SWITCH SETTINGS
+==================
+1.1 N/A
+
+
+2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
+===========================================
+2.1. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+ linux kernel, you can customize it based on your system requirements:
+ SDR: 0x00000000-0x00ffffff
+ SRAM0: 0x20010000-0x20017fff
+ SRAM1: 0x20000000-0x2000ffff
+ MBAR1: 0x10000000-0x4fffffff
+ MBAR2: 0x80000000-0xCfffffff
+ Flash: 0xffe00000-0xffffffff
+
+3. DEFINITIONS AND COMPILATION
+==============================
+3.1 Explanation on NEW definitions in include/configs/M5253EVBE.h
+ CONFIG_MCF52x2 Processor family
+ CONFIG_MCF5253 MCF5253 specific
+ CONFIG_M5253EVBE Amadeus Plus board specific
+ CFG_CLK Define Amadeus Plus CPU Clock
+ CFG_MBAR MBAR base address
+ CFG_MBAR2 MBAR2 base address
+
+3.2 Compilation
+ export CROSS_COMPILE=/usr/local/freescale-coldfire-4.1-elf/bin/m68k-elf-
+ cd u-boot-1-2-x
+ make distclean
+ make M5253EVBE_config
+ make
+
+
+4. SCREEN DUMP
+==============
+4.1 U-Boot 1.2.0 (Jun 18 2007 - 18:20:00)
+
+CPU: Freescale Coldfire MCF5253 at 62 MHz
+Board: Freescale MCF5253 EVBE
+DRAM: 16 MB
+FLASH: 2 MB
+In: serial
+Out: serial
+Err: serial
+=> flinfo
+
+Bank # 1: CFI conformant FLASH (16 x 16) Size: 2 MB in 35 Sectors
+ AMD Standard command set, Manufacturer ID: 0x01, Device ID: 0x49
+ Erase timeout: 16384 ms, write timeout: 1 ms
+
+ Sector Start Addresses:
+ FFE00000 RO FFE04000 RO FFE06000 RO FFE08000 RO FFE10000 RO
+ FFE20000 FFE30000 FFE40000 FFE50000 FFE60000
+ FFE70000 FFE80000 FFE90000 FFEA0000 FFEB0000
+ FFEC0000 FFED0000 FFEE0000 FFEF0000 FFF00000
+ FFF10000 FFF20000 FFF30000 FFF40000 FFF50000
+ FFF60000 FFF70000 FFF80000 FFF90000 FFFA0000
+ FFFB0000 FFFC0000 FFFD0000 FFFE0000 FFFF0000
+
+=> bdinfo
+boot_params = 0x00F62F90
+memstart = 0x00000000
+memsize = 0x01000000
+flashstart = 0xFFE00000
+flashsize = 0x00200000
+flashoffset = 0x00000000
+baudrate = 19200 bps
+
+=> printenv
+bootdelay=5
+baudrate=19200
+stdin=serial
+stdout=serial
+stderr=serial
+
+Environment size: 134/8188 bytes
+=> saveenv
+Saving Environment to Flash...
+Un-Protected 1 sectors
+Erasing Flash...
+. done
+Erased 1 sectors
+Writing to Flash... done
+Protected 1 sectors
+=>
+
+5. COMPILER
+-----------
+To create U-Boot the CodeSourcery's version of the GNU Toolchain for the ColdFire architecture
+compiler set (freescale-coldfire-4.1-elf) from www.codesourcery.com was used.
+You can download it from:http://www.codesourcery.com/gnu_toolchains/coldfire/download.html
+
+compiler that you used - for example, codesourcery_elf requires -MQ in rules.mk, old M68K 2.95.3 just -M
+codesourcery_elf requires -MQ in rules.mk, old M68K 2.95.3 just -M
diff --git a/doc/README.m54455evb b/doc/README.m54455evb
new file mode 100644
index 0000000..119a19d
--- /dev/null
+++ b/doc/README.m54455evb
@@ -0,0 +1,416 @@
+Freescale MCF54455EVB ColdFire Development Board
+================================================
+
+TsiChung Liew(Tsi-Chung.Liew@freescale.com)
+Created 4/08/07
+===========================================
+
+
+Changed files:
+==============
+
+- board/freescale/m54455evb/m54455evb.c Dram setup, IDE pre init, and PCI init
+- board/freescale/m54455evb/flash.c Atmel and INTEL flash support
+- board/freescale/m54455evb/Makefile Makefile
+- board/freescale/m54455evb/config.mk config make
+- board/freescale/m54455evb/u-boot.lds Linker description
+
+- common/cmd_bdinfo.c Clock frequencies output
+- common/cmd_mii.c mii support
+
+- cpu/mcf5445x/cpu.c cpu specific code
+- cpu/mcf5445x/cpu_init.c Flexbus ChipSelect, Mux pins setup, icache and RTC extra regs
+- cpu/mcf5445x/interrupts.c cpu specific interrupt support
+- cpu/mcf5445x/speed.c system, pci, flexbus, and cpu clock
+- cpu/mcf5445x/Makefile Makefile
+- cpu/mcf5445x/config.mk config make
+- cpu/mcf5445x/start.S start up assembly code
+
+- doc/README.m54455evb This readme file
+
+- drivers/net/mcffec.c ColdFire common FEC driver
+- drivers/serial/mcfuart.c ColdFire common UART driver
+
+- include/asm-m68k/bitops.h Bit operation function export
+- include/asm-m68k/byteorder.h Byte order functions
+- include/asm-m68k/fec.h FEC structure and definition
+- include/asm-m68k/fsl_i2c.h I2C structure and definition
+- include/asm-m68k/global_data.h Global data structure
+- include/asm-m68k/immap.h ColdFire specific header file and driver macros
+- include/asm-m68k/immap_5445x.h mcf5445x specific header file
+- include/asm-m68k/io.h io functions
+- include/asm-m68k/m5445x.h mcf5445x specific header file
+- include/asm-m68k/posix_types.h Posix
+- include/asm-m68k/processor.h header file
+- include/asm-m68k/ptrace.h Exception structure
+- include/asm-m68k/rtc.h Realtime clock header file
+- include/asm-m68k/string.h String function export
+- include/asm-m68k/timer.h Timer structure and definition
+- include/asm-m68k/types.h Data types definition
+- include/asm-m68k/uart.h Uart structure and definition
+- include/asm-m68k/u-boot.h u-boot structure
+
+- include/configs/M54455EVB.h Board specific configuration file
+
+- lib_m68k/board.c board init function
+- lib_m68k/cache.c
+- lib_m68k/interrupts Coldfire common interrupt functions
+- lib_m68k/m68k_linux.c
+- lib_m68k/time.c Timer functions (Dma timer and PIT)
+- lib_m68k/traps.c Exception init code
+
+- rtc/mcfrtc.c Realtime clock Driver
+
+1 MCF5445x specific Options/Settings
+====================================
+1.1 pre-loader is no longer suppoer in thie coldfire family
+
+1.2 Configuration settings for M54455EVB Development Board
+CONFIG_MCF5445x -- define for all MCF5445x CPUs
+CONFIG_M54455 -- define for all Freescale MCF54455 CPUs
+CONFIG_M54455EVB -- define for M54455EVB board
+
+CONFIG_MCFUART -- define to use common CF Uart driver
+CFG_UART_PORT -- define UART port number, start with 0, 1 and 2
+CONFIG_BAUDRATE -- define UART baudrate
+
+CONFIG_MCFRTC -- define to use common CF RTC driver
+CFG_MCFRTC_BASE -- provide base address for RTC in immap.h
+CFG_RTC_OSCILLATOR -- define RTC clock frequency
+RTC_DEBUG -- define to show RTC debug message
+CONFIG_CMD_DATE -- enable to use date feature in u-boot
+
+CONFIG_MCFFEC -- define to use common CF FEC driver
+CONFIG_NET_MULTI -- define to use multi FEC in u-boot
+CONFIG_MII -- enable to use MII driver
+CONFIG_CF_DOMII -- enable to use MII feature in cmd_mii.c
+CFG_DISCOVER_PHY -- enable PHY discovery
+CFG_RX_ETH_BUFFER -- Set FEC Receive buffer
+CFG_FAULT_ECHO_LINK_DOWN--
+CFG_FEC0_PINMUX -- Set FEC0 Pin configuration
+CFG_FEC1_PINMUX -- Set FEC1 Pin configuration
+CFG_FEC0_MIIBASE -- Set FEC0 MII base register
+CFG_FEC1_MIIBASE -- Set FEC0 MII base register
+MCFFEC_TOUT_LOOP -- set FEC timeout loop
+CONFIG_HAS_ETH1 -- define to enable second FEC in u-boot
+
+CONFIG_ISO_PARTITION -- enable ISO read/write
+CONFIG_DOS_PARTITION -- enable DOS read/write
+CONFIG_IDE_RESET -- define ide_reset()
+CONFIG_IDE_PREINIT -- define ide_preinit()
+CONFIG_ATAPI -- define ATAPI support
+CONFIG_LBA48 -- define LBA48 (larger than 120GB) support
+CFG_IDE_MAXBUS -- define max channel
+CFG_IDE_MAXDEVICE -- define max devices per channel
+CFG_ATA_BASE_ADDR -- define ATA base address
+CFG_ATA_IDE0_OFFSET -- define ATA IDE0 offset
+CFG_ATA_DATA_OFFSET -- define ATA data IO
+CFG_ATA_REG_OFFSET -- define for normal register accesses
+CFG_ATA_ALT_OFFSET -- define for alternate registers
+CFG_ATA_STRIDE -- define for Interval between registers
+_IO_BASE -- define for IO base address
+
+CONFIG_MCFTMR -- define to use DMA timer
+CONFIG_MCFPIT -- define to use PIT timer
+
+CONFIG_FSL_I2C -- define to use FSL common I2C driver
+CONFIG_HARD_I2C -- define for I2C hardware support
+CONFIG_SOFT_I2C -- define for I2C bit-banged
+CFG_I2C_SPEED -- define for I2C speed
+CFG_I2C_SLAVE -- define for I2C slave address
+CFG_I2C_OFFSET -- define for I2C base address offset
+CFG_IMMR -- define for MBAR offset
+
+CONFIG_PCI -- define for PCI support
+CONFIG_PCI_PNP -- define for Plug n play support
+CFG_PCI_MEM_BUS -- PCI memory logical offset
+CFG_PCI_MEM_PHYS -- PCI memory physical offset
+CFG_PCI_MEM_SIZE -- PCI memory size
+CFG_PCI_IO_BUS -- PCI IO logical offset
+CFG_PCI_IO_PHYS -- PCI IO physical offset
+CFG_PCI_IO_SIZE -- PCI IO size
+CFG_PCI_CFG_BUS -- PCI Configuration logical offset
+CFG_PCI_CFG_PHYS -- PCI Configuration physical offset
+CFG_PCI_CFG_SIZE -- PCI Configuration size
+
+CONFIG_EXTRA_CLOCK -- Enable extra clock such as vco, flexbus, pci, etc
+
+CFG_MBAR -- define MBAR offset
+
+CFG_ATMEL_BOOT -- To determine the u-boot is booted from Atmel or Intel
+
+CONFIG_MONITOR_IS_IN_RAM -- Not support
+
+CFG_INIT_RAM_ADDR -- defines the base address of the MCF54455 internal SRAM
+
+CFG_CSn_BASE -- defines the Chip Select Base register
+CFG_CSn_MASK -- defines the Chip Select Mask register
+CFG_CSn_CTRL -- defines the Chip Select Control register
+
+CFG_ATMEL_BASE -- defines the Atmel Flash base
+CFG_INTEL_BASE -- defines the Intel Flash base
+
+CFG_SDRAM_BASE -- defines the DRAM Base
+CFG_SDRAM_BASE1 -- defines the DRAM Base 1
+
+2. MEMORY MAP UNDER U-BOOT AND LINUX KERNEL
+===========================================
+2.1. System memory map:
+ Flash: 0x00000000-0x3FFFFFFF (1024MB)
+ DDR: 0x40000000-0x7FFFFFFF (1024MB)
+ SRAM: 0x80000000-0x8FFFFFFF (256MB)
+ ATA: 0x90000000-0x9FFFFFFF (256MB)
+ PCI: 0xA0000000-0xBFFFFFFF (512MB)
+ FlexBus: 0xC0000000-0xDFFFFFFF (512MB)
+ IP: 0xF0000000-0xFFFFFFFF (256MB)
+
+2.2. For the initial bringup, we adopted a consistent memory scheme between u-boot and
+ linux kernel, you can customize it based on your system requirements:
+ Atmel boot:
+ Flash0: 0x00000000-0x0007FFFF (512KB)
+ Flash1: 0x04000000-0x05FFFFFF (32MB)
+ Intel boot:
+ Flash0: 0x00000000-0x01FFFFFF (32MB)
+ Flash1: 0x04000000-0x0407FFFF (512KB)
+
+ CPLD: 0x08000000-0x08FFFFFF (16MB)
+ FPGA: 0x09000000-0x09FFFFFF (16MB)
+ DDR: 0x40000000-0x4FFFFFFF (256MB)
+ SRAM: 0x80000000-0x80007FFF (32KB)
+ IP: 0xFC000000-0xFC0FFFFF (64KB)
+
+3. SWITCH SETTINGS
+==================
+3.1 SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
+ SW1 Pin4: 0 - ULPI chip not in reset state or 1 - ULPI chip in reset state
+ SW1 Pin5: 0 - Full ATA Bus enabled, FEC Phy1 powered down
+ 1 - Upper 8 bits ATA data bus disabled, FEC PHY1 active
+ SW1 Pin6: 0 - FEC Phy0 active or 1 - FEC Phy0 powered down
+ SW1 Pin3: 0 - Boot from Atmel or 1 - INTEL
+
+4. COMPILATION
+==============
+4.1 To create U-Boot the gcc-4.1-32 compiler set (ColdFire ELF version)
+from codesourcery.com was used. Download it from:
+http://www.codesourcery.com/gnu_toolchains/coldfire/download.html
+
+4.2 Compilation
+ export CROSS_COMPILE=cross-compile-prefix
+ cd u-boot-1.x.x
+ make distclean
+ make M54455EVB_config, or - default to atmel 33Mhz input clock
+ make M54455EVB_atmel_config, or - default to atmel 33Mhz input clock
+ make M54455EVB_a33_config, or - default to atmel 33Mhz input clock
+ make M54455EVB_a66_config, or - default to atmel 66Mhz input clock
+ make M54455EVB_intel_config, or - default to intel 33Mhz input clock
+ make M54455EVB_i33_config, or - default to intel 33Mhz input clock
+ make M54455EVB_i66_config, or - default to intel 66Mhz input clock
+ make
+
+5. SCREEN DUMP
+==============
+5.1 M54455EVB Development board
+ Boot from Atmel (NOTE: May not show exactly the same)
+
+U-Boot 1.2.0-g98c80b46-dirty (Jul 26 2007 - 12:44:08)
+
+CPU: Freescale MCF54455 (Mask:48 Version:1)
+ CPU CLK 266 Mhz BUS CLK 133 Mhz FLB CLK 66 Mhz
+ PCI CLK 33 Mhz INP CLK 33 Mhz VCO CLK 533 Mhz
+Board: Freescale M54455 EVB
+I2C: ready
+DRAM: 256 MB
+FLASH: 16.5 MB
+In: serial
+Out: serial
+Err: serial
+Net: FEC0, FEC1
+IDE: Bus 0: not available
+-> print
+bootargs=root=/dev/ram rw
+bootdelay=1
+baudrate=115200
+ethaddr=00:e0:0c:bc:e5:60
+eth1addr=00:e0:0c:bc:e5:61
+hostname=M54455EVB
+netdev=eth0
+inpclk=33333333
+loadaddr=40010000
+load=tftp ${loadaddr) ${u-boot}
+upd=run load; run prog
+prog=prot off 0 2ffff;era 0 2ffff;cp.b ${loadaddr} 0 ${filesize};save
+ethact=FEC0
+mtdids=nor0=M54455EVB-1
+mtdparts=M54455EVB-1:16m(user)
+u-boot=u-boot54455.bin
+filesize=292b4
+fileaddr=40010000
+gatewayip=192.168.1.1
+netmask=255.255.255.0
+ipaddr=192.168.1.3
+serverip=192.168.1.2
+stdin=serial
+stdout=serial
+stderr=serial
+mem=261632k
+
+Environment size: 563/8188 bytes
+-> bdinfo
+memstart = 0x40000000
+memsize = 0x10000000
+flashstart = 0x00000000
+flashsize = 0x01080000
+flashoffset = 0x00000000
+sramstart = 0x80000000
+sramsize = 0x00008000
+mbar = 0xFC000000
+busfreq = 133.333 MHz
+pcifreq = 33.333 MHz
+flbfreq = 66.666 MHz
+inpfreq = 33.333 MHz
+vcofreq = 533.333 MHz
+ethaddr = 00:E0:0C:BC:E5:60
+eth1addr = 00:E0:0C:BC:E5:61
+ip_addr = 192.168.1.3
+baudrate = 115200 bps
+->
+-> help
+? - alias for 'help'
+autoscr - run script from memory
+base - print or set address offset
+bdinfo - print Board Info structure
+boot - boot default, i.e., run 'bootcmd'
+bootd - boot default, i.e., run 'bootcmd'
+bootelf - Boot from an ELF image in memory
+bootm - boot application image from memory
+bootp - boot image via network using BootP/TFTP protocol
+bootvx - Boot vxWorks from an ELF image
+cmp - memory compare
+coninfo - print console devices and information
+cp - memory copy
+crc32 - checksum calculation
+date - get/set/reset date & time
+dcache - enable or disable data cache
+diskboot- boot from IDE device
+echo - echo args to console
+erase - erase FLASH memory
+ext2load- load binary file from a Ext2 filesystem
+ext2ls - list files in a directory (default /)
+fatinfo - print information about filesystem
+fatload - load binary file from a dos filesystem
+fatls - list files in a directory (default /)
+flinfo - print FLASH memory information
+fsinfo - print information about filesystems
+fsload - load binary file from a filesystem image
+go - start application at address 'addr'
+help - print online help
+icache - enable or disable instruction cache
+icrc32 - checksum calculation
+ide - IDE sub-system
+iloop - infinite loop on address range
+imd - i2c memory display
+iminfo - print header information for application image
+imls - list all images found in flash
+imm - i2c memory modify (auto-incrementing)
+imw - memory write (fill)
+inm - memory modify (constant address)
+iprobe - probe to discover valid I2C chip addresses
+itest - return true/false on integer compare
+loadb - load binary file over serial line (kermit mode)
+loads - load S-Record file over serial line
+loady - load binary file over serial line (ymodem mode)
+loop - infinite loop on address range
+ls - list files in a directory (default /)
+md - memory display
+mii - MII utility commands
+mm - memory modify (auto-incrementing)
+mtest - simple RAM test
+mw - memory write (fill)
+nfs - boot image via network using NFS protocol
+nm - memory modify (constant address)
+pci - list and access PCI Configuration Space
+ping - send ICMP ECHO_REQUEST to network host
+printenv- print environment variables
+protect - enable or disable FLASH write protection
+rarpboot- boot image via network using RARP/TFTP protocol
+reset - Perform RESET of the CPU
+run - run commands in an environment variable
+saveenv - save environment variables to persistent storage
+setenv - set environment variables
+sleep - delay execution for some time
+tftpboot- boot image via network using TFTP protocol
+version - print monitor version
+->bootm 4000000
+
+## Booting image at 04000000 ...
+ Image Name: Linux Kernel Image
+ Created: 2007-08-14 15:13:00 UTC
+ Image Type: M68K Linux Kernel Image (uncompressed)
+ Data Size: 2301952 Bytes = 2.2 MB
+ Load Address: 40020000
+ Entry Point: 40020000
+ Verifying Checksum ... OK
+OK
+Linux version 2.6.20-gfe5136d6-dirty (mattw@kea) (gcc version 4.2.0 20070318 (pr
+erelease) (Sourcery G++ Lite 4.2-20)) #108 Mon Aug 13 13:00:13 MDT 2007
+starting up linux startmem 0xc0254000, endmem 0xcfffffff, size 253MB
+Built 1 zonelists. Total pages: 32624
+Kernel command line: root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=ph
+ysmap-flash.0:5M(kernel)ro,-(jffs2)
+PID hash table entries: 1024 (order: 10, 4096 bytes)
+Console: colour dummy device 80x25
+Dentry cache hash table entries: 32768 (order: 4, 131072 bytes)
+Inode-cache hash table entries: 16384 (order: 3, 65536 bytes)
+Memory: 257496k/262136k available (1864k kernel code, 2440k data, 88k init)
+Mount-cache hash table entries: 1024
+NET: Registered protocol family 16
+SCSI subsystem initialized
+NET: Registered protocol family 2
+IP route cache hash table entries: 2048 (order: 0, 8192 bytes)
+TCP established hash table entries: 8192 (order: 2, 32768 bytes)
+TCP bind hash table entries: 4096 (order: 1, 16384 bytes)
+TCP: Hash tables configured (established 8192 bind 4096)
+TCP reno registered
+JFFS2 version 2.2. (NAND) (C) 2001-2006 Red Hat, Inc.
+io scheduler noop registered
+io scheduler anticipatory registered
+io scheduler deadline registered
+io scheduler cfq registered (default)
+ColdFire internal UART serial driver version 1.00
+ttyS0 at 0xfc060000 (irq = 90) is a builtin ColdFire UART
+ttyS1 at 0xfc064000 (irq = 91) is a builtin ColdFire UART
+ttyS2 at 0xfc068000 (irq = 92) is a builtin ColdFire UART
+RAMDISK driver initialized: 16 RAM disks of 64000K size 1024 blocksize
+loop: loaded (max 8 devices)
+FEC ENET Version 0.2
+fec: PHY @ 0x0, ID 0x20005ca2 -- DP83849
+eth0: ethernet 00:08:ee:00:e4:19
+physmap platform flash device: 01000000 at 04000000
+physmap-flash.0: Found 1 x16 devices at 0x0 in 8-bit bank
+ Intel/Sharp Extended Query Table at 0x0031
+Using buffer write method
+cfi_cmdset_0001: Erase suspend on write enabled
+2 cmdlinepart partitions found on MTD device physmap-flash.0
+Creating 2 MTD partitions on "physmap-flash.0":
+0x00000000-0x00500000 : "kernel"
+mtd: Giving out device 0 to kernel
+0x00500000-0x01000000 : "jffs2"
+mtd: Giving out device 1 to jffs2
+mice: PS/2 mouse device common for all mice
+i2c /dev entries driver
+TCP cubic registered
+NET: Registered protocol family 1
+NET: Registered protocol family 17
+NET: Registered protocol family 15
+VFS: Mounted root (jffs2 filesystem).
+Setting the hostname to freescale
+Mounting filesystems
+mount: Mounting usbfs on /proc/bus/usb failed: No such file or directory
+Starting syslogd and klogd
+Setting up networking on loopback device:
+Setting up networking on eth0:
+eth0: config: auto-negotiation on, 100FDX, 100HDX, 10FDX, 10HDX.
+Adding static route for default gateway to 172.27.255.254:
+Setting nameserver to 172.27.0.1 in /etc/resolv.conf:
+Starting inetd:
+/ #
diff --git a/doc/README.mpc8313erdb b/doc/README.mpc8313erdb
new file mode 100644
index 0000000..7ad4cc7
--- /dev/null
+++ b/doc/README.mpc8313erdb
@@ -0,0 +1,83 @@
+Freescale MPC8313ERDB Board
+-----------------------------------------
+
+1. Board Switches and Jumpers
+
+ SW3 is used to set CFG_RESET_SOURCE.
+
+ To boot the image at 0xFE000000 in NOR flash, use these DIP
+ switche settings for SW3 SW4:
+
+ +------+ +------+
+ | | | **** |
+ | **** | | |
+ +------+ ON +------+ ON
+ 4321 4321
+ (where the '*' indicates the position of the tab of the switch.)
+
+2. Memory Map
+ The memory map looks like this:
+
+ 0x0000_0000 0x07ff_ffff DDR 128M
+ 0x8000_0000 0x8fff_ffff PCI MEM 256M
+ 0x9000_0000 0x9fff_ffff PCI_MMIO 256M
+ 0xe000_0000 0xe00f_ffff IMMR 1M
+ 0xe200_0000 0xe20f_ffff PCI IO 16M
+ 0xe280_0000 0xe280_7fff NAND FLASH (CS1) 32K
+ 0xf000_0000 0xf001_ffff VSC7385 (CS2) 128K
+ 0xfa00_0000 0xfa00_7fff Board Status/ 32K
+ LED Control (CS3)
+ 0xfe00_0000 0xfe7f_ffff NOR FLASH (CS0) 8M
+
+3. Definitions
+
+3.1 Explanation of NEW definitions in:
+
+ include/configs/MPC8313ERDB.h
+
+ CONFIG_MPC83xx MPC83xx family
+ CONFIG_MPC831x MPC831x specific
+ CONFIG_MPC8313ERDB MPC8313ERDB board specific
+
+4. Compilation
+
+ Assuming you're using BASH (or similar) as your shell:
+
+ export CROSS_COMPILE=your-cross-compiler-prefix-
+ make distclean
+ make MPC8313ERDB_33_config
+ (or make MPC8313ERDB_66_config, depending on the speed of
+ the oscillator on your board)
+ make
+
+5. Downloading and Flashing Images
+
+5.1 Reflash U-boot Image using U-boot
+
+ =>run tftpflash
+
+ You may want to try
+ =>tftpboot $loadaddr $uboot
+ first, to make sure that the TFTP load will succeed before it
+ goes ahead and wipes out your current firmware. And of course,
+ have an alternate means of programming the flash available
+ if the new u-boot doesn't boot.
+
+5.2 Downloading and Booting Linux Kernel
+
+ Ensure that all networking-related environment variables are set
+ properly (including ipaddr, serverip, gatewayip (if needed),
+ netmask, ethaddr, eth1addr, rootpath (if using NFS root),
+ fdtfile, and bootfile).
+
+ Then, do one of the following, depending on whether you
+ want an NFS root or a ramdisk root:
+
+ =>run nfsboot
+ or
+ =>run ramboot
+
+6 Notes
+
+ Booting from NAND flash is not yet supported.
+ The console baudrate for MPC8313ERDB is 115200bps.
diff --git a/doc/README.mpc8323erdb b/doc/README.mpc8323erdb
new file mode 100644
index 0000000..6f89829
--- /dev/null
+++ b/doc/README.mpc8323erdb
@@ -0,0 +1,71 @@
+Freescale MPC8323ERDB Board
+-----------------------------------------
+
+1. Memory Map
+ The memory map looks like this:
+
+ 0x0000_0000 0x03ff_ffff DDR 64M
+ 0x8000_0000 0x8fff_ffff PCI MEM 256M
+ 0x9000_0000 0x9fff_ffff PCI_MMIO 256M
+ 0xe000_0000 0xe00f_ffff IMMR 1M
+ 0xd000_0000 0xd3ff_ffff PCI IO 64M
+ 0xfe00_0000 0xfeff_ffff NOR FLASH (CS0) 16M
+
+2. Compilation
+
+ Assuming you're using BASH (or similar) as your shell:
+
+ export CROSS_COMPILE=your-cross-compiler-prefix-
+ make distclean
+ make MPC8323ERDB_config
+ make
+
+3. Downloading and Flashing Images
+
+3.1 Reflash U-boot Image using U-boot
+
+ N.b, have an alternate means of programming
+ the flash available if the new u-boot doesn't boot.
+
+ First try a:
+
+ tftpboot $loadaddr $uboot
+
+ to make sure that the TFTP load will succeed before
+ an erase goes ahead and wipes out your current firmware.
+ Then do a:
+
+ run tftpflash
+
+ which is a shorter version of the manual sequence:
+
+ tftp $loadaddr u-boot.bin
+ protect off fe000000 +$filesize
+ erase fe000000 +$filesize
+ cp.b $loadaddr fe000000 $filesize
+
+ To keep your old u-boot's environment variables, do a:
+
+ saveenv
+
+ prior to resetting the board.
+
+3.2 Downloading and Booting Linux Kernel
+
+ Ensure that all networking-related environment variables are set
+ properly (including ipaddr, serverip, gatewayip (if needed),
+ netmask, ethaddr, eth1addr, rootpath (if using NFS root),
+ fdtfile, and bootfile).
+
+ Then, do one of the following, depending on whether you
+ want an NFS root or a ramdisk root:
+
+ run nfsboot
+
+ or
+
+ run ramboot
+
+4 Notes
+
+ The console baudrate for MPC8323ERDB is 115200bps.
diff --git a/doc/README.mpc8349emds.ddrecc b/doc/README.mpc8349emds.ddrecc
deleted file mode 100644
index eb249c3..0000000
--- a/doc/README.mpc8349emds.ddrecc
+++ /dev/null
@@ -1,154 +0,0 @@
-Overview
-========
-
-The overall usage pattern for ECC diagnostic commands is the following:
-
- * (injecting errors is initially disabled)
-
- * define inject mask (which tells the DDR controller what type of errors
- we'll be injecting: single/multiple bit etc.)
-
- * enable injecting errors - from now on the controller injects errors as
- indicated in the inject mask
-
-IMPORTANT NOTICE: enabling injecting multiple-bit errors is potentially
-dangerous as such errors are NOT corrected by the controller. Therefore caution
-should be taken when enabling the injection of multiple-bit errors: it is only
-safe when used on a carefully selected memory area and used under control of
-the 'ecc test' command (see example 'Injecting Multiple-Bit Errors' below). In
-particular, when you simply set the multiple-bit errors in inject mask and
-enable injection, U-Boot is very likely to hang quickly as the errors will be
-injected when it accesses its code, data etc.
-
-
-Use cases for DDR 'ecc' command:
-================================
-
-Before executing particular tests reset target board or clear status registers:
-
-=> ecc captureclear
-=> ecc errdetectclr all
-=> ecc sbecnt 0
-
-
-Injecting Single-Bit Errors
----------------------------
-
-1. Set 1 bit in Data Path Error Inject Mask
-
-=> ecc injectdatahi 1
-
-2. Run test over some memory region
-
-=> ecc test 200000 10
-
-3. Check ECC status
-
-=> ecc status
-...
-Memory Data Path Error Injection Mask High/Low: 00000001 00000000
-...
-Memory Single-Bit Error Management (0..255):
- Single-Bit Error Threshold: 255
- Single Bit Error Counter: 16
-...
-Memory Error Detect:
- Multiple Memory Errors: 0
- Multiple-Bit Error: 0
- Single-Bit Error: 0
-...
-
-16 errors were generated, Single-Bit Error flag was not set as Single Bit Error
-Counter did not reach Single-Bit Error Threshold.
-
-4. Make sure used memory region got re-initialized with 0xcafecafe pattern
-
-=> md 200000
-00200000: cafecafe cafecafe cafecafe cafecafe ................
-00200010: cafecafe cafecafe cafecafe cafecafe ................
-00200020: cafecafe cafecafe cafecafe cafecafe ................
-00200030: cafecafe cafecafe cafecafe cafecafe ................
-00200040: cafecafe cafecafe cafecafe cafecafe ................
-00200050: cafecafe cafecafe cafecafe cafecafe ................
-00200060: cafecafe cafecafe cafecafe cafecafe ................
-00200070: cafecafe cafecafe cafecafe cafecafe ................
-00200080: deadbeef deadbeef deadbeef deadbeef ................
-00200090: deadbeef deadbeef deadbeef deadbeef ................
-
-
-Injecting Multiple-Bit Errors
------------------------------
-
-1. Set more than 1 bit in Data Path Error Inject Mask
-
-=> ecc injectdatahi 5
-
-2. Run test over some memory region
-
-=> ecc test 200000 10
-
-3. Check ECC status
-
-=> ecc status
-...
-Memory Data Path Error Injection Mask High/Low: 00000005 00000000
-...
-Memory Error Detect:
- Multiple Memory Errors: 1
- Multiple-Bit Error: 1
- Single-Bit Error: 0
-...
-
-Observe that both Multiple Memory Errors and Multiple-Bit Error flags are set.
-
-4. Make sure used memory region got re-initialized with 0xcafecafe pattern
-
-=> md 200000
-00200000: cafecafe cafecafe cafecafe cafecafe ................
-00200010: cafecafe cafecafe cafecafe cafecafe ................
-00200020: cafecafe cafecafe cafecafe cafecafe ................
-00200030: cafecafe cafecafe cafecafe cafecafe ................
-00200040: cafecafe cafecafe cafecafe cafecafe ................
-00200050: cafecafe cafecafe cafecafe cafecafe ................
-00200060: cafecafe cafecafe cafecafe cafecafe ................
-00200070: cafecafe cafecafe cafecafe cafecafe ................
-00200080: deadbeef deadbeef deadbeef deadbeef ................
-00200090: deadbeef deadbeef deadbeef deadbeef ................
-
-
-Test Single-Bit Error Counter and Threshold
--------------------------------------------
-
-1. Set 1 bit in Data Path Error Inject Mask
-
-=> ecc injectdatahi 1
-
-2. Enable error injection
-
-=> ecc inject en
-
-3. Let u-boot run for a with Single-Bit error injection enabled
-
-4. Disable error injection
-
-=> ecc inject dis
-
-4. Check status
-
-=> ecc status
-
-...
-Memory Single-Bit Error Management (0..255):
- Single-Bit Error Threshold: 255
- Single Bit Error Counter: 60
-
-Memory Error Detect:
- Multiple Memory Errors: 1
- Multiple-Bit Error: 0
- Single-Bit Error: 1
-...
-
-Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter
-reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that
-is Counter reached Threshold more than one time (it wraps back after reaching
-Threshold).
diff --git a/doc/README.mpc8360emds b/doc/README.mpc8360emds
index c87469f..5f20247 100644
--- a/doc/README.mpc8360emds
+++ b/doc/README.mpc8360emds
@@ -21,7 +21,13 @@
SW3[1:8]= 0000_0001 refers to bits labeled 1 through 6 is set as "On"
and bits labeled 8 is set as "Off".
-1.1 For the MPC8360E PB PROTO Board
+1.1 There are three type boards for MPC8360E silicon up to now, They are
+
+ * MPC8360E-MDS-PB PROTO (a.k.a 8360SYS PROTOTYPE)
+ * MPC8360E-MDS-PB PILOT (a.k.a 8360SYS PILOT)
+ * MPC8360EA-MDS-PB PROTO (a.k.a 8360SYS2 PROTOTYPE)
+
+1.2 For all the MPC8360EMDS Board
First, make sure the board default setting is consistent with the
document shipped with your board. Then apply the following setting:
@@ -33,6 +39,21 @@
JP6 1-2
on board Oscillator: 66M
+1.3 Since different board/chip rev. combinations have AC timing issues,
+ u-boot forces RGMII-ID (RGMII with Internal Delay) mode on by default
+ by the patch (mpc83xx: Disable G1TXCLK, G2TXCLK h/w buffers).
+
+ When the rev2.x silicon mount on these boards, and if you are using
+ u-boot version after this patch, to make the ethernet interfaces usable,
+ and to enable RGMII-ID on your board, you have to setup the jumpers
+ correctly.
+
+ * MPC8360E-MDS-PB PROTO
+ nothing to do
+ * MPC8360E-MDS-PB PILOT
+ JP9 and JP8 should be ON
+ * MPC8360EA-MDS-PB PROTO
+ JP2 and JP3 should be ON
2. Memory Map
diff --git a/doc/README.mpc83xx.ddrecc b/doc/README.mpc83xx.ddrecc
new file mode 100644
index 0000000..0029f08
--- /dev/null
+++ b/doc/README.mpc83xx.ddrecc
@@ -0,0 +1,154 @@
+Overview
+========
+
+The overall usage pattern for ECC diagnostic commands is the following:
+
+ * (injecting errors is initially disabled)
+
+ * define inject mask (which tells the DDR controller what type of errors
+ we'll be injecting: single/multiple bit etc.)
+
+ * enable injecting errors - from now on the controller injects errors as
+ indicated in the inject mask
+
+IMPORTANT NOTICE: enabling injecting multiple-bit errors is potentially
+dangerous as such errors are NOT corrected by the controller. Therefore caution
+should be taken when enabling the injection of multiple-bit errors: it is only
+safe when used on a carefully selected memory area and used under control of
+the 'ecc testdw' 'ecc testword' command (see example 'Injecting Multiple-Bit
+Errors' below). In particular, when you simply set the multiple-bit errors in
+inject mask and enable injection, U-Boot is very likely to hang quickly as the
+errors will be injected when it accesses its code, data etc.
+
+
+Use cases for DDR 'ecc' command:
+================================
+
+Before executing particular tests reset target board or clear status registers:
+
+=> ecc captureclear
+=> ecc errdetectclr all
+=> ecc sbecnt 0
+
+
+Injecting Single-Bit Errors
+---------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Run test over some memory region
+
+=> ecc testdw 200000 10
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000001 00000000
+...
+Memory Single-Bit Error Management (0..255):
+ Single-Bit Error Threshold: 255
+ Single Bit Error Counter: 16
+...
+Memory Error Detect:
+ Multiple Memory Errors: 0
+ Multiple-Bit Error: 0
+ Single-Bit Error: 0
+...
+
+16 errors were generated, Single-Bit Error flag was not set as Single Bit Error
+Counter did not reach Single-Bit Error Threshold.
+
+4. Make sure used memory region got re-initialized with 0x0123456789abcdef
+
+=> md 200000
+00200000: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200010: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200020: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200030: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200040: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200050: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200060: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200070: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200080: deadbeef deadbeef deadbeef deadbeef ................
+00200090: deadbeef deadbeef deadbeef deadbeef ................
+
+Injecting Multiple-Bit Errors
+-----------------------------
+
+1. Set more than 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+=> ecc injectdatalo 1
+
+2. Run test over some memory region
+
+=> ecc testword 200000 1
+
+3. Check ECC status
+
+=> ecc status
+...
+Memory Data Path Error Injection Mask High/Low: 00000001 00000001
+...
+Memory Error Detect:
+ Multiple Memory Errors: 0
+ Multiple-Bit Error: 1
+ Single-Bit Error: 0
+...
+
+The Multiple Memory Errors flags not set and Multiple-Bit Error flags are set.
+
+4. Make sure used memory region got re-initialized with 0x0123456789abcdef
+
+=> md 200000
+00200000: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200010: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200020: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200030: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200040: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200050: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200060: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200070: 01234567 89abcdef 01234567 89abcdef .#Eg.....#Eg....
+00200080: deadbeef deadbeef deadbeef deadbeef ................
+00200090: deadbeef deadbeef deadbeef deadbeef ................
+
+
+Test Single-Bit Error Counter and Threshold
+-------------------------------------------
+
+1. Set 1 bit in Data Path Error Inject Mask
+
+=> ecc injectdatahi 1
+
+2. Enable error injection
+
+=> ecc inject en
+
+3. Let u-boot run for a with Single-Bit error injection enabled
+
+4. Disable error injection
+
+=> ecc inject dis
+
+4. Check status
+
+=> ecc status
+
+...
+Memory Single-Bit Error Management (0..255):
+ Single-Bit Error Threshold: 255
+ Single Bit Error Counter: 199
+
+Memory Error Detect:
+ Multiple Memory Errors: 1
+ Multiple-Bit Error: 0
+ Single-Bit Error: 1
+...
+
+Observe that Single-Bit Error is 'on' which means that Single-Bit Error Counter
+reached Single-Bit Error Threshold. Multiple Memory Errors bit is also 'on', that
+is Counter reached Threshold more than one time (it wraps back after reaching
+Threshold).
diff --git a/doc/README.mpc8544ds b/doc/README.mpc8544ds
new file mode 100644
index 0000000..bf257a0
--- /dev/null
+++ b/doc/README.mpc8544ds
@@ -0,0 +1,122 @@
+Overview
+--------
+The MPC8544DS system is similar to the 85xx CDS systems such
+as the MPC8548CDS due to the similar E500 core. However, it
+is placed on the same board as the 8641 HPCN system.
+
+
+Flash Banks
+-----------
+Like the 85xx CDS systems, the 8544 DS board has two flash banks.
+They are both present on boot, but there locations can be swapped
+using the dip-switch SW10, bit 2.
+
+However, unlike the CDS systems, but similar to the 8641 HPCN
+board, a runtime reset through the FPGA can also affect a swap
+on the flash bank mappings for the next reset cycle.
+
+Irrespective of the switch SW10[2], booting is always from the
+boot bank at 0xfff8_0000.
+
+
+Memory Map
+----------
+
+0xff80_0000 - 0xffbf_ffff Alernate bank 4MB
+0xffc0_0000 - 0xffff_ffff Boot bank 4MB
+
+0xffb8_0000 Alternate image start 512KB
+0xfff8_0000 Boot image start 512KB
+
+
+Flashing Images
+---------------
+
+For example, to place a new image in the alternate flash bank
+and then reset with that new image temporarily, use this:
+
+ tftp 1000000 u-boot.bin.8544ds
+ erase ffb80000 ffbfffff
+ cp.b 1000000 ffb80000 80000
+ pixis_reset altbank
+
+
+To overwrite the image in the boot flash bank:
+
+ tftp 1000000 u-boot.bin.8544ds
+ protect off all
+ erase fff80000 ffffffff
+ cp.b 1000000 fff80000 80000
+
+Other example U-Boot image and flash manipulations examples
+can be found in the README.mpc85xxcds file as well.
+
+
+The pixis_reset command
+-----------------------
+A new command, "pixis_reset", is introduced to reset mpc8641hpcn board
+using the FPGA sequencer. When the board restarts, it has the option
+of using either the current or alternate flash bank as the boot
+image, with or without the watchdog timer enabled, and finally with
+or without frequency changes.
+
+Usage is;
+
+ pixis_reset
+ pixis_reset altbank
+ pixis_reset altbank wd
+ pixis_reset altbank cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
+ pixis_reset cf <SYSCLK freq> <COREPLL ratio> <MPXPLL ratio>
+
+Examples;
+
+ /* reset to current bank, like "reset" command */
+ pixis_reset
+
+ /* reset board but use the to alternate flash bank */
+ pixis_reset altbank
+
+ /* reset board, use alternate flash bank with watchdog timer enabled*/
+ pixis_reset altbank wd
+
+ /* reset board to alternate bank with frequency changed.
+ * 40 is SYSCLK, 2.5 is COREPLL ratio, 10 is MPXPLL ratio
+ */
+ pixis-reset altbank cf 40 2.5 10
+
+Valid clock choices are in the 8641 Reference Manuals.
+
+
+Using the Device Tree Source File
+---------------------------------
+To create the DTB (Device Tree Binary) image file,
+use a command similar to this:
+
+ dtc -b 0 -f -I dts -O dtb mpc8544ds.dts > mpc8544ds.dtb
+
+Likely, that .dts file will come from here;
+
+ linux-2.6/arch/powerpc/boot/dts/mpc8544ds.dts
+
+After placing the DTB file in your TFTP disk area,
+you can download that dtb file using a command like:
+
+ tftp 900000 mpc8544ds.dtb
+
+Burn it to flash if you want.
+
+
+Booting Linux
+-------------
+
+Place a linux uImage in the TFTP disk area too.
+
+ tftp 1000000 uImage.8544
+ tftp 900000 mpc8544ds.dtb
+ bootm 1000000 - 900000
+
+Watch your ethact, netdev and bootargs U-Boot environment variables.
+You may want to do something like this too:
+
+ setenv ethact eTSEC3
+ setenv netdev eth1
diff --git a/doc/README.mpc8641hpcn b/doc/README.mpc8641hpcn
index 3b88f8b..ac56cca 100644
--- a/doc/README.mpc8641hpcn
+++ b/doc/README.mpc8641hpcn
@@ -96,14 +96,17 @@
tftp 1000000 u-boot.bin
protect off all
- erase fff00000 ffffffff
- cp.b 1000000 fff00100 80000
+ erase fff00000 +$filesize
+ cp.b 1000000 fff00000 $filesize
+
+or use tftpflash command:
+ run tftpflash
To Flash U-boot into the alternative bank (0xFF800000 - 0xFFBFFFFF):
tftp 1000000 u-boot.bin
- erase ffb00000 ffbfffff
- cp.b 1000000 ffb00100 80000
+ erase ffb00000 +$filesize
+ cp.b 1000000 ffb00000 $filesize
4. Memory Map
diff --git a/doc/README.nand b/doc/README.nand
index 5c31845..c5c5ef2 100644
--- a/doc/README.nand
+++ b/doc/README.nand
@@ -93,8 +93,8 @@
Configuration Options:
- CFG_CMD_NAND
- A good one to add to CONFIG_COMMANDS since it enables NAND support.
+ CONFIG_CMD_NAND
+ Enables NAND support and commmands.
CONFIG_MTD_NAND_ECC_JFFS2
Define this if you want the Error Correction Code information in
diff --git a/doc/README.ppc440 b/doc/README.ppc440
index 08f34f5..2e04aba 100644
--- a/doc/README.ppc440
+++ b/doc/README.ppc440
@@ -146,12 +146,13 @@
space begins at PCI I/O address 0 and the PCI memory space is
256 MB starting at PCI address CFG_PCI_TARGBASE. After the
pci_controller structure is initialized, the cpu-specific code will
-call the routine pci_pre_init() if the CFG_PCI_PRE_INIT flag is
-defined. This routine is implemented by board-specific code & is where
-the board can over-ride/extend the default pci_controller structure
-settings and do other pre-initialization tasks. If pci_pre_init()
-returns a value of zero, PCI initialization is aborted; otherwise the
-controller structure is registered and initialization continues.
+call the routine pci_pre_init(). This routine is implemented by
+board-specific code & is where the board can over-ride/extend the
+default pci_controller structure settings and exspecially provide
+a routine to map the PCI interrupts and do other pre-initialization
+tasks. If pci_pre_init() returns a value of zero, PCI initialization
+is aborted; otherwise the controller structure is registered and
+initialization continues.
The default 440GP PCI target configuration is minimal -- it assumes that
the strapping registers are set as necessary. Since the strapping bits
diff --git a/doc/README.sbc8641d b/doc/README.sbc8641d
new file mode 100644
index 0000000..a051466
--- /dev/null
+++ b/doc/README.sbc8641d
@@ -0,0 +1,28 @@
+Wind River SBC8641D reference board
+===========================
+
+Created 06/14/2007 Joe Hamman
+Copyright 2007, Embedded Specialties, Inc.
+Copyright 2007 Wind River Systemes, Inc.
+-----------------------------
+
+1. Building U-Boot
+------------------
+The SBC8641D code is known to build using ELDK 4.1.
+
+ $ make sbc8641d_config
+ Configuring for sbc8641d board...
+
+ $ make
+
+
+2. Switch and Jumper Settings
+-----------------------------
+All Jumpers & Switches are in their default positions. Please refer to
+the board documentation for details. Some settings control CPU voltages
+and settings may change with board revisions.
+
+3. Known limitations
+--------------------
+PCI:
+ The PCI command may hang if no boards are present in either slot.
diff --git a/doc/README.sha1 b/doc/README.sha1
new file mode 100644
index 0000000..7992f7f
--- /dev/null
+++ b/doc/README.sha1
@@ -0,0 +1,57 @@
+SHA1 usage:
+-----------
+
+In the U-Boot Image for the pcs440ep board is a SHA1 checksum integrated.
+This SHA1 sum is used, to check, if the U-Boot Image in Flash is not
+corrupted.
+
+The following command is available:
+
+=> help sha1
+sha1 address len [addr] calculate the SHA1 sum [save at addr]
+ -p calculate the SHA1 sum from the U-Boot image in flash and print
+ -c check the U-Boot image in flash
+
+"sha1 -p"
+ calculates and prints the SHA1 sum, from the Image stored in Flash
+
+"sha1 -c"
+ check, if the SHA1 sum from the Image stored in Flash is correct
+
+
+It is possible to calculate a SHA1 checksum from a memoryrange with:
+
+"sha1 address len"
+
+If you want to store a new Image in Flash for the pcs440ep board,
+which has no SHA1 sum, you can do the following:
+
+a) cp the new Image on a position in RAM (here 0x300000)
+ (for this example we use the Image from Flash, stored at 0xfffa0000 and
+ 0x60000 Bytes long)
+
+"cp.b fffa0000 300000 60000"
+
+b) Initialize the SHA1 sum in the Image with 0x00
+ The SHA1 sum is stored in Flash at:
+ CFG_MONITOR_BASE + CFG_MONITOR_LEN + SHA1_SUM_POS
+ for the pcs440ep Flash: 0xfffa0000 + 0x60000 + -0x20
+ = 0xffffffe0
+ for the example in RAM: 0x300000 + 0x60000 + -0x20
+ = 0x35ffe0
+
+ note: a SHA1 checksum is 20 bytes long.
+
+"mw.b 35ffe0 0 14"
+
+c) now calculate the SHA1 sum from the memoryrange and write
+ the calculated checksum at the right place:
+
+"sha1 300000 60000 35ffe0"
+
+Now you have a U-Boot-Image for the pcs440ep board with the correct SHA1 sum.
+
+If you do a "./MAKEALL pcs440ep" or a "make all" to get the U-Boot image,
+the correct SHA1 sum will be automagically included in the U-Boot image.
+
+Heiko Schocher, 11 Jul 2007
diff --git a/doc/README.usb b/doc/README.usb
index 41f76f4..b3bcb91 100644
--- a/doc/README.usb
+++ b/doc/README.usb
@@ -73,8 +73,8 @@
Config Switches:
----------------
-CFG_CMD_USB enables basic USB support and the usb command
-CONFIG_USB_UHCI defines the lowlevel part.A lowlevel part must be defined if
- using CFG_CMD_USB
+CONFIG_CMD_USB enables basic USB support and the usb command
+CONFIG_USB_UHCI defines the lowlevel part.A lowlevel part must be defined
+ if using CONFIG_CMD_USB
CONFIG_USB_KEYBOARD enables the USB Keyboard
CONFIG_USB_STORAGE enables the USB storage devices
diff --git a/doc/README.zeus b/doc/README.zeus
new file mode 100644
index 0000000..1848d8c
--- /dev/null
+++ b/doc/README.zeus
@@ -0,0 +1,73 @@
+
+Storage of the board specific values (ethaddr...)
+-------------------------------------------------
+
+The board specific environment variables that should be unique
+for each individual board, can be stored in the I2C EEPROM. This
+will be done from offset 0x80 with the length of 0x80 bytes. The
+following command can be used to store the values here:
+
+=> setdef de:20:6a:ed:e2:72 de:20:6a:ed:e2:73 AB0001
+
+ ethaddr eth1addr serial#
+
+Now those 3 values are stored into the I2C EEPROM. A CRC is added
+to make sure that the values get not corrupted.
+
+
+SW-Reset Pushbutton handling:
+-----------------------------
+
+The SW-reset push button is connected to a GPIO input too. This
+way U-Boot can "see" how long the SW-reset was pressed, and a
+specific action can be taken. Two different actions are supported:
+
+a) Release after more than 5 seconds and less then 10 seconds:
+ -> Run POST
+
+ Please note, that the POST test will take a while (approx. 1 min
+ on the 128MByte board). This is mainly due to the system memory
+ test.
+
+b) Release after more than 10 seconds:
+ -> Restore factory default settings
+
+ The factory default values are restored. The default environment
+ variables are restored (ipaddr, serverip...) and the board
+ specific values (ethaddr, eth1addr and serial#) are restored
+ to the environment from the I2C EEPROM. Also a bootline parameter
+ is added to the Linux bootline to signal the Linux kernel upon
+ the next startup, that the factory defaults should be restored.
+
+The command to check this sw-reset status and act accordingly is
+
+=> chkreset
+
+This command is added to the default "bootcmd", so that it is called
+automatically upon startup.
+
+Also, the 2 LED's are used to indicate the current status of this
+command (time passed since pushing the button). When the POST test
+will be run, the green LED will be switched off, and when the
+factory restore will be initiated, the reg LED will be switched off.
+
+
+Loggin of POST results:
+-----------------------
+
+The results of the POST tests are logged in a logbuffer located at the end
+of the onboard memory. It can be accessed with the U-Boot command "log":
+
+=> log show
+<4>POST memory PASSED
+<4>POST cache PASSED
+<4>POST cpu PASSED
+<4>POST uart PASSED
+<4>POST ethernet PASSED
+
+The DENX Linux kernel tree has support for this log buffer included. Exactly
+this buffer is used for logging of all kernel messages too. By enabling the
+compile time option "CONFIG_LOGBUFFER" this support is enabled. This way you
+can access the U-Boot log messages from Linux too.
+
+2007-08-10, Stefan Roese <sr@denx.de>
diff --git a/drivers/Makefile b/drivers/Makefile
old mode 100644
new mode 100755
index a3a9986..fe32a74
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -27,11 +27,11 @@
LIB = $(obj)libdrivers.a
-COBJS = 3c589.o 5701rls.o ali512x.o atmel_usart.o \
+COBJS = 3c589.o 5701rls.o ali512x.o at45.o ata_piix.o atmel_usart.o \
bcm570x.o bcm570x_autoneg.o cfb_console.o cfi_flash.o \
cs8900.o ct69000.o dataflash.o dc2114x.o dm9000x.o \
- e1000.o eepro100.o \
- i8042.o inca-ip_sw.o keyboard.o \
+ e1000.o eepro100.o enc28j60.o \
+ i8042.o inca-ip_sw.o isp116x-hcd.o keyboard.o \
lan91c96.o macb.o \
natsemi.o ne2000.o netarm_eth.o netconsole.o \
ns16550.o ns8382x.o ns87308.o ns7520_eth.o omap1510_i2c.o \
@@ -43,16 +43,18 @@
sed13806.o sed156x.o \
serial.o serial_max3100.o serial_sh.o \
serial_pl010.o serial_pl011.o serial_xuartlite.o \
- sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
+ sil680.o sl811_usb.o sm501.o smc91111.o smiLynxEM.o \
status_led.o sym53c8xx.o systemace.o ahci.o \
ti_pci1410a.o tigon3.o tsec.o \
tsi108_eth.o tsi108_i2c.o tsi108_pci.o \
- usbdcore.o usbdcore_ep0.o usbdcore_omap1510.o usbtty.o \
+ usb_ohci.o \
+ usbdcore.o usbdcore_ep0.o usbdcore_mpc8xx.o usbdcore_omap1510.o \
+ usbtty.o \
videomodes.o w83c553f.o \
ks8695eth.o \
pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \
rpx_pcmcia.o \
- fsl_i2c.o
+ fsl_i2c.o fsl_pci_init.o ati_radeon_fb.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/drivers/ahci.c b/drivers/ahci.c
index 8ceff00..3d82c62 100644
--- a/drivers/ahci.c
+++ b/drivers/ahci.c
@@ -253,13 +253,14 @@
static int ahci_init_one(pci_dev_t pdev)
{
- u32 iobase, vendor;
+ u32 iobase;
+ u16 vendor;
int rc;
memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
- probe_ent = malloc(sizeof(probe_ent));
- memset(probe_ent, 0, sizeof(probe_ent));
+ probe_ent = malloc(sizeof(struct ahci_probe_ent));
+ memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
probe_ent->dev = pdev;
pci_read_config_dword(pdev, AHCI_PCI_BAR, &iobase);
diff --git a/drivers/at45.c b/drivers/at45.c
new file mode 100755
index 0000000..507ff36
--- /dev/null
+++ b/drivers/at45.c
@@ -0,0 +1,566 @@
+/* Driver for ATMEL DataFlash support
+ * Author : Hamid Ikdoumi (Atmel)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#include <config.h>
+#include <common.h>
+
+#ifdef CONFIG_HAS_DATAFLASH
+#include <dataflash.h>
+
+/*
+ * spi.c API
+ */
+extern unsigned int AT91F_SpiWrite (AT91PS_DataflashDesc pDesc);
+extern void AT91F_SpiEnable(int cs);
+
+#define AT91C_TIMEOUT_WRDY 200000
+
+
+/*----------------------------------------------------------------------*/
+/* \fn AT91F_DataFlashSendCommand */
+/* \brief Generic function to send a command to the dataflash */
+/*----------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char OpCode,
+ unsigned int CmdSize,
+ unsigned int DataflashAddress)
+{
+ unsigned int adr;
+
+ if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
+ return DATAFLASH_BUSY;
+
+ /* process the address to obtain page address and byte address */
+ adr = ((DataflashAddress / (pDataFlash->pDevice->pages_size)) <<
+ pDataFlash->pDevice->page_offset) + (DataflashAddress %
+ (pDataFlash->pDevice->pages_size));
+
+ /* fill the command buffer */
+ pDataFlash->pDataFlashDesc->command[0] = OpCode;
+ if (pDataFlash->pDevice->pages_number >= 16384) {
+ pDataFlash->pDataFlashDesc->command[1] =
+ (unsigned char)((adr & 0x0F000000) >> 24);
+ pDataFlash->pDataFlashDesc->command[2] =
+ (unsigned char)((adr & 0x00FF0000) >> 16);
+ pDataFlash->pDataFlashDesc->command[3] =
+ (unsigned char)((adr & 0x0000FF00) >> 8);
+ pDataFlash->pDataFlashDesc->command[4] =
+ (unsigned char)(adr & 0x000000FF);
+ } else {
+ pDataFlash->pDataFlashDesc->command[1] =
+ (unsigned char)((adr & 0x00FF0000) >> 16);
+ pDataFlash->pDataFlashDesc->command[2] =
+ (unsigned char)((adr & 0x0000FF00) >> 8);
+ pDataFlash->pDataFlashDesc->command[3] =
+ (unsigned char)(adr & 0x000000FF);
+ pDataFlash->pDataFlashDesc->command[4] = 0;
+ }
+ pDataFlash->pDataFlashDesc->command[5] = 0;
+ pDataFlash->pDataFlashDesc->command[6] = 0;
+ pDataFlash->pDataFlashDesc->command[7] = 0;
+
+ /* Initialize the SpiData structure for the spi write fuction */
+ pDataFlash->pDataFlashDesc->tx_cmd_pt =
+ pDataFlash->pDataFlashDesc->command;
+ pDataFlash->pDataFlashDesc->tx_cmd_size = CmdSize;
+ pDataFlash->pDataFlashDesc->rx_cmd_pt =
+ pDataFlash->pDataFlashDesc->command;
+ pDataFlash->pDataFlashDesc->rx_cmd_size = CmdSize;
+
+ /* send the command and read the data */
+ return AT91F_SpiWrite (pDataFlash->pDataFlashDesc); }
+
+
+/*----------------------------------------------------------------------*/
+/* \fn AT91F_DataFlashGetStatus */
+/* \brief Read the status register of the dataflash */
+/*----------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashGetStatus(AT91PS_DataflashDesc pDesc)
+{
+ AT91S_DataFlashStatus status;
+
+ /* if a transfert is in progress ==> return 0 */
+ if( (pDesc->state) != IDLE)
+ return DATAFLASH_BUSY;
+
+ /* first send the read status command (D7H) */
+ pDesc->command[0] = DB_STATUS;
+ pDesc->command[1] = 0;
+
+ pDesc->DataFlash_state = GET_STATUS;
+ pDesc->tx_data_size = 0; /* Transmit the command */
+ /* and receive response */
+ pDesc->tx_cmd_pt = pDesc->command;
+ pDesc->rx_cmd_pt = pDesc->command;
+ pDesc->rx_cmd_size = 2;
+ pDesc->tx_cmd_size = 2;
+ status = AT91F_SpiWrite (pDesc);
+
+ pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1);
+
+ return status;
+}
+
+
+/*----------------------------------------------------------------------*/
+/* \fn AT91F_DataFlashWaitReady */
+/* \brief wait for dataflash ready (bit7 of the status register == 1) */
+/*----------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashWaitReady(AT91PS_DataflashDesc
+pDataFlashDesc, unsigned int timeout)
+{
+ pDataFlashDesc->DataFlash_state = IDLE;
+
+ do {
+ AT91F_DataFlashGetStatus(pDataFlashDesc);
+ timeout--;
+ } while( ((pDataFlashDesc->DataFlash_state & 0x80) != 0x80) &&
+ (timeout > 0) );
+
+ if((pDataFlashDesc->DataFlash_state & 0x80) != 0x80)
+ return DATAFLASH_ERROR;
+
+ return DATAFLASH_OK;
+}
+
+
+/*--------------------------------------------------------------------------*/
+/* Function Name : AT91F_DataFlashContinuousRead */
+/* Object : Continuous stream Read */
+/* Input Parameters : DataFlash Service */
+/* : <src> = dataflash address */
+/* : <*dataBuffer> = data buffer pointer */
+/* : <sizeToRead> = data buffer size */
+/* Return value : State of the dataflash */
+/*--------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
+ AT91PS_DataFlash pDataFlash,
+ int src,
+ unsigned char *dataBuffer,
+ int sizeToRead )
+{
+ AT91S_DataFlashStatus status;
+ /* Test the size to read in the device */
+ if ( (src + sizeToRead) >
+ (pDataFlash->pDevice->pages_size *
+ (pDataFlash->pDevice->pages_number)))
+ return DATAFLASH_MEMORY_OVERFLOW;
+
+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
+ pDataFlash->pDataFlashDesc->rx_data_size = sizeToRead;
+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
+ pDataFlash->pDataFlashDesc->tx_data_size = sizeToRead;
+
+ status = AT91F_DataFlashSendCommand
+ (pDataFlash, DB_CONTINUOUS_ARRAY_READ, 8, src);
+ /* Send the command to the dataflash */
+ return(status);
+}
+
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_DataFlashPagePgmBuf */
+/* Object : Main memory page program thru buffer 1 or buffer 2 */
+/* Input Parameters : DataFlash Service */
+/* : <*src> = Source buffer */
+/* : <dest> = dataflash destination address */
+/* : <SizeToWrite> = data buffer size */
+/* Return value : State of the dataflash */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char *src,
+ unsigned int dest,
+ unsigned int SizeToWrite)
+{
+ int cmdsize;
+ pDataFlash->pDataFlashDesc->tx_data_pt = src;
+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite;
+ pDataFlash->pDataFlashDesc->rx_data_pt = src;
+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
+
+ cmdsize = 4;
+ /* Send the command to the dataflash */
+ if (pDataFlash->pDevice->pages_number >= 16384)
+ cmdsize = 5;
+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_PGM_BUF1,
+cmdsize, dest)); }
+
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_MainMemoryToBufferTransfert */
+/* Object : Read a page in the SRAM Buffer 1 or 2 */
+/* Input Parameters : DataFlash Service */
+/* : Page concerned */
+/* : */
+/* Return value : State of the dataflash */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char BufferCommand,
+ unsigned int page)
+{
+ int cmdsize;
+ /* Test if the buffer command is legal */
+ if ((BufferCommand != DB_PAGE_2_BUF1_TRF)
+ && (BufferCommand != DB_PAGE_2_BUF2_TRF))
+ return DATAFLASH_BAD_COMMAND;
+
+ /* no data to transmit or receive */
+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
+ cmdsize = 4;
+ if (pDataFlash->pDevice->pages_number >= 16384)
+ cmdsize = 5;
+ return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize,
+page*pDataFlash->pDevice->pages_size));
+}
+
+
+/*-------------------------------------------------------------------------- */
+/* Function Name : AT91F_DataFlashWriteBuffer */
+/* Object : Write data to the internal sram buffer 1 or 2 */
+/* Input Parameters : DataFlash Service */
+/* : <BufferCommand> = command to write buffer1 or 2 */
+/* : <*dataBuffer> = data buffer to write */
+/* : <bufferAddress> = address in the internal buffer */
+/* : <SizeToWrite> = data buffer size */
+/* Return value : State of the dataflash */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
+ AT91PS_DataFlash pDataFlash,
+ unsigned char BufferCommand,
+ unsigned char *dataBuffer,
+ unsigned int bufferAddress,
+ int SizeToWrite )
+{
+ int cmdsize;
+ /* Test if the buffer command is legal */
+ if ((BufferCommand != DB_BUF1_WRITE)
+ && (BufferCommand != DB_BUF2_WRITE))
+ return DATAFLASH_BAD_COMMAND;
+
+ /* buffer address must be lower than page size */
+ if (bufferAddress > pDataFlash->pDevice->pages_size)
+ return DATAFLASH_BAD_ADDRESS;
+
+ if ( (pDataFlash->pDataFlashDesc->state) != IDLE)
+ return DATAFLASH_BUSY;
+
+ /* Send first Write Command */
+ pDataFlash->pDataFlashDesc->command[0] = BufferCommand;
+ pDataFlash->pDataFlashDesc->command[1] = 0;
+ if (pDataFlash->pDevice->pages_number >= 16384) {
+ pDataFlash->pDataFlashDesc->command[2] = 0;
+ pDataFlash->pDataFlashDesc->command[3] =
+ (unsigned char)(((unsigned int)(bufferAddress &
+ pDataFlash->pDevice->byte_mask)) >> 8);
+ pDataFlash->pDataFlashDesc->command[4] =
+ (unsigned char)((unsigned int)bufferAddress & 0x00FF);
+ cmdsize = 5;
+ } else {
+ pDataFlash->pDataFlashDesc->command[2] =
+ (unsigned char)(((unsigned int)(bufferAddress &
+ pDataFlash->pDevice->byte_mask)) >> 8);
+ pDataFlash->pDataFlashDesc->command[3] =
+ (unsigned char)((unsigned int)bufferAddress & 0x00FF);
+ pDataFlash->pDataFlashDesc->command[4] = 0;
+ cmdsize = 4;
+ }
+
+ pDataFlash->pDataFlashDesc->tx_cmd_pt =
+ pDataFlash->pDataFlashDesc->command;
+ pDataFlash->pDataFlashDesc->tx_cmd_size = cmdsize;
+ pDataFlash->pDataFlashDesc->rx_cmd_pt =
+ pDataFlash->pDataFlashDesc->command;
+ pDataFlash->pDataFlashDesc->rx_cmd_size = cmdsize;
+
+ pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer;
+ pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer;
+ pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite;
+ pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite;
+
+ return AT91F_SpiWrite(pDataFlash->pDataFlashDesc);
+}
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_PageErase */
+/* Object : Erase a page */
+/* Input Parameters : DataFlash Service */
+/* : Page concerned */
+/* : */
+/* Return value : State of the dataflash */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_PageErase(
+ AT91PS_DataFlash pDataFlash,
+ unsigned int page)
+{
+ int cmdsize;
+ /* Test if the buffer command is legal */
+ /* no data to transmit or receive */
+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
+
+ cmdsize = 4;
+ if (pDataFlash->pDevice->pages_number >= 16384)
+ cmdsize = 5;
+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_PAGE_ERASE, cmdsize,
+page*pDataFlash->pDevice->pages_size));
+}
+
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_BlockErase */
+/* Object : Erase a Block */
+/* Input Parameters : DataFlash Service */
+/* : Page concerned */
+/* : */
+/* Return value : State of the dataflash */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_BlockErase(
+ AT91PS_DataFlash pDataFlash,
+ unsigned int block)
+{
+ int cmdsize;
+ /* Test if the buffer command is legal */
+ /* no data to transmit or receive */
+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
+ cmdsize = 4;
+ if (pDataFlash->pDevice->pages_number >= 16384)
+ cmdsize = 5;
+ return(AT91F_DataFlashSendCommand (pDataFlash, DB_BLOCK_ERASE,cmdsize,
+block*8*pDataFlash->pDevice->pages_size));
+}
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_WriteBufferToMain */
+/* Object : Write buffer to the main memory */
+/* Input Parameters : DataFlash Service */
+/* : <BufferCommand> = command to send to buffer1 or buffer2 */
+/* : <dest> = main memory address */
+/* Return value : State of the dataflash */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_WriteBufferToMain (
+ AT91PS_DataFlash pDataFlash,
+ unsigned char BufferCommand,
+ unsigned int dest )
+{
+ int cmdsize;
+ /* Test if the buffer command is correct */
+ if ((BufferCommand != DB_BUF1_PAGE_PGM) &&
+ (BufferCommand != DB_BUF1_PAGE_ERASE_PGM) &&
+ (BufferCommand != DB_BUF2_PAGE_PGM) &&
+ (BufferCommand != DB_BUF2_PAGE_ERASE_PGM) )
+ return DATAFLASH_BAD_COMMAND;
+
+ /* no data to transmit or receive */
+ pDataFlash->pDataFlashDesc->tx_data_size = 0;
+
+ cmdsize = 4;
+ if (pDataFlash->pDevice->pages_number >= 16384)
+ cmdsize = 5;
+ /* Send the command to the dataflash */
+ return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, cmdsize,
+ dest)); }
+
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_PartialPageWrite */
+/* Object : Erase partielly a page */
+/* Input Parameters : <page> = page number */
+/* : <AdrInpage> = adr to begin the fading */
+/* : <length> = Number of bytes to erase */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_PartialPageWrite (
+ AT91PS_DataFlash pDataFlash,
+ unsigned char *src,
+ unsigned int dest,
+ unsigned int size)
+{
+ unsigned int page;
+ unsigned int AdrInPage;
+
+ page = dest / (pDataFlash->pDevice->pages_size);
+ AdrInPage = dest % (pDataFlash->pDevice->pages_size);
+
+ /* Read the contents of the page in the Sram Buffer */
+ AT91F_MainMemoryToBufferTransfert(pDataFlash,
+ DB_PAGE_2_BUF1_TRF, page);
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+ /*Update the SRAM buffer */
+ AT91F_DataFlashWriteBuffer(pDataFlash, DB_BUF1_WRITE, src,
+ AdrInPage, size);
+
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+
+ /* Erase page if a 128 Mbits device */
+ if (pDataFlash->pDevice->pages_number >= 16384) {
+ AT91F_PageErase(pDataFlash, page);
+ /* Rewrite the modified Sram Buffer in the main memory */
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+ }
+
+ /* Rewrite the modified Sram Buffer in the main memory */
+ return(AT91F_WriteBufferToMain(pDataFlash, DB_BUF1_PAGE_ERASE_PGM,
+ (page*pDataFlash->pDevice->pages_size)));
+}
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_DataFlashWrite */
+/* Object : */
+/* Input Parameters : <*src> = Source buffer */
+/* : <dest> = dataflash adress */
+/* : <size> = data buffer size */
+/*---------------------------------------------------------------------------*/
+AT91S_DataFlashStatus AT91F_DataFlashWrite(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char *src,
+ int dest,
+ int size )
+{
+ unsigned int length;
+ unsigned int page;
+ unsigned int status;
+
+ AT91F_SpiEnable(pDataFlash->pDevice->cs);
+
+ if ( (dest + size) > (pDataFlash->pDevice->pages_size *
+ (pDataFlash->pDevice->pages_number)))
+ return DATAFLASH_MEMORY_OVERFLOW;
+
+ /* If destination does not fit a page start address */
+ if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 )
+ {
+ length = pDataFlash->pDevice->pages_size -
+ (dest %
+ ((unsigned int)
+ (pDataFlash->pDevice->pages_size)));
+
+ if (size < length)
+ length = size;
+
+ if(!AT91F_PartialPageWrite(pDataFlash,src, dest, length))
+ return DATAFLASH_ERROR;
+
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+
+ /* Update size, source and destination pointers */
+ size -= length;
+ dest += length;
+ src += length;
+ }
+
+ while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) {
+ /* program dataflash page */
+ page = (unsigned int)dest / (pDataFlash->pDevice->pages_size);
+
+ status = AT91F_DataFlashWriteBuffer(pDataFlash,
+ DB_BUF1_WRITE, src, 0,
+ pDataFlash->pDevice->pages_size);
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+
+ status = AT91F_PageErase(pDataFlash, page);
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+ if (!status)
+ return DATAFLASH_ERROR;
+
+ status = AT91F_WriteBufferToMain (pDataFlash,
+ DB_BUF1_PAGE_PGM, dest);
+ if(!status)
+ return DATAFLASH_ERROR;
+
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+
+ /* Update size, source and destination pointers */
+ size -= pDataFlash->pDevice->pages_size;
+ dest += pDataFlash->pDevice->pages_size;
+ src += pDataFlash->pDevice->pages_size;
+ }
+
+ /* If still some bytes to read */
+ if ( size > 0 ) {
+ /* program dataflash page */
+ if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) )
+ return DATAFLASH_ERROR;
+
+ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY);
+ }
+ return DATAFLASH_OK;
+}
+
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_DataFlashRead */
+/* Object : Read a block in dataflash */
+/* Input Parameters : */
+/* Return value : */
+/*---------------------------------------------------------------------------*/
+int AT91F_DataFlashRead(
+ AT91PS_DataFlash pDataFlash,
+ unsigned long addr,
+ unsigned long size,
+ char *buffer)
+{
+ unsigned long SizeToRead;
+
+ AT91F_SpiEnable(pDataFlash->pDevice->cs);
+
+ if(AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
+ return -1;
+
+ while (size) {
+ SizeToRead = (size < 0x8000)? size:0x8000;
+
+ if (AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc,
+ AT91C_TIMEOUT_WRDY) != DATAFLASH_OK)
+ return -1;
+
+ if (AT91F_DataFlashContinuousRead (pDataFlash, addr,
+ (uchar *) buffer, SizeToRead) != DATAFLASH_OK)
+ return -1;
+
+ size -= SizeToRead;
+ addr += SizeToRead;
+ buffer += SizeToRead;
+ }
+
+ return DATAFLASH_OK;
+}
+
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_DataflashProbe */
+/* Object : */
+/* Input Parameters : */
+/* Return value : Dataflash status register */
+/*---------------------------------------------------------------------------*/
+int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) {
+ AT91F_SpiEnable(cs);
+ AT91F_DataFlashGetStatus(pDesc);
+ return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C);
+}
+#endif
diff --git a/drivers/ata_piix.c b/drivers/ata_piix.c
new file mode 100644
index 0000000..42456d7
--- /dev/null
+++ b/drivers/ata_piix.c
@@ -0,0 +1,216 @@
+/*
+ * Copyright (C) Procsys. All rights reserved.
+ * Author: Mushtaq Khan <mushtaq_k@procsys.com>
+ * <mushtaqk_921@yahoo.co.in>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * with the reference to ata_piix driver in kernel 2.4.32
+ */
+
+/*
+ * This file contains SATA controller and SATA drive initialization functions
+ */
+
+#include <common.h>
+#include <pci.h>
+#include <command.h>
+#include <config.h>
+#include <asm/byteorder.h>
+#include <ide.h>
+#include <ata.h>
+
+#ifdef CFG_ATA_PIIX /*ata_piix driver */
+
+#define DEBUG_SATA 0 /*For debug prints set DEBUG_SATA to 1 */
+
+#define DRV_DECL /*For file specific declarations */
+#include <sata.h>
+#undef DRV_DECL
+
+/*Macros realted to PCI*/
+#define PCI_SATA_BUS 0x00
+#define PCI_SATA_DEV 0x1f
+#define PCI_SATA_FUNC 0x02
+
+#define PCI_SATA_BASE1 0x10
+#define PCI_SATA_BASE2 0x14
+#define PCI_SATA_BASE3 0x18
+#define PCI_SATA_BASE4 0x1c
+#define PCI_SATA_BASE5 0x20
+#define PCI_PMR 0x90
+#define PCI_PI 0x09
+#define PCI_PCS 0x92
+#define PCI_DMA_CTL 0x48
+
+#define PORT_PRESENT (1<<0)
+#define PORT_ENABLED (1<<4)
+
+u32 bdf;
+u32 iobase1 = 0; /*Primary cmd block */
+u32 iobase2 = 0; /*Primary ctl block */
+u32 iobase3 = 0; /*Sec cmd block */
+u32 iobase4 = 0; /*sec ctl block */
+u32 iobase5 = 0; /*BMDMA*/
+int
+pci_sata_init (void)
+{
+ u32 bus = PCI_SATA_BUS;
+ u32 dev = PCI_SATA_DEV;
+ u32 fun = PCI_SATA_FUNC;
+ u16 cmd = 0;
+ u8 lat = 0, pcibios_max_latency = 0xff;
+ u8 pmr; /*Port mapping reg */
+ u8 pi; /*Prgming Interface reg */
+
+ bdf = PCI_BDF (bus, dev, fun);
+ pci_read_config_dword (bdf, PCI_SATA_BASE1, &iobase1);
+ pci_read_config_dword (bdf, PCI_SATA_BASE2, &iobase2);
+ pci_read_config_dword (bdf, PCI_SATA_BASE3, &iobase3);
+ pci_read_config_dword (bdf, PCI_SATA_BASE4, &iobase4);
+ pci_read_config_dword (bdf, PCI_SATA_BASE5, &iobase5);
+
+ if ((iobase1 == 0xFFFFFFFF) || (iobase2 == 0xFFFFFFFF) ||
+ (iobase3 == 0xFFFFFFFF) || (iobase4 == 0xFFFFFFFF) ||
+ (iobase5 == 0xFFFFFFFF)) {
+ printf ("error no base addr for SATA controller\n");
+ return 1;
+ /*ERROR*/}
+
+ iobase1 &= 0xFFFFFFFE;
+ iobase2 &= 0xFFFFFFFE;
+ iobase3 &= 0xFFFFFFFE;
+ iobase4 &= 0xFFFFFFFE;
+ iobase5 &= 0xFFFFFFFE;
+
+ /*check for mode */
+ pci_read_config_byte (bdf, PCI_PMR, &pmr);
+ if (pmr > 1) {
+ printf ("combined mode not supported\n");
+ return 1;
+ }
+
+ pci_read_config_byte (bdf, PCI_PI, &pi);
+ if ((pi & 0x05) != 0x05) {
+ printf ("Sata is in Legacy mode\n");
+ return 1;
+ } else {
+ printf ("sata is in Native mode\n");
+ }
+
+ /*MASTER CFG AND IO CFG */
+ pci_read_config_word (bdf, PCI_COMMAND, &cmd);
+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_IO;
+ pci_write_config_word (bdf, PCI_COMMAND, cmd);
+ pci_read_config_byte (dev, PCI_LATENCY_TIMER, &lat);
+
+ if (lat < 16)
+ lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
+ else if (lat > pcibios_max_latency)
+ lat = pcibios_max_latency;
+ pci_write_config_byte (dev, PCI_LATENCY_TIMER, lat);
+
+ return 0;
+}
+
+int
+sata_bus_probe (int port_no)
+{
+ int orig_mask, mask;
+ u16 pcs;
+
+ mask = (PORT_PRESENT << port_no);
+ pci_read_config_word (bdf, PCI_PCS, &pcs);
+ orig_mask = (int) pcs & 0xff;
+ if ((orig_mask & mask) != mask)
+ return 0;
+ else
+ return 1;
+}
+
+int
+init_sata (void)
+{
+ u8 i, rv = 0;
+
+ for (i = 0; i < CFG_SATA_MAXDEVICES; i++) {
+ sata_dev_desc[i].type = DEV_TYPE_UNKNOWN;
+ sata_dev_desc[i].if_type = IF_TYPE_IDE;
+ sata_dev_desc[i].dev = i;
+ sata_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
+ sata_dev_desc[i].blksz = 0;
+ sata_dev_desc[i].lba = 0;
+ sata_dev_desc[i].block_read = sata_read;
+ }
+
+ rv = pci_sata_init ();
+ if (rv == 1) {
+ printf ("pci initialization failed\n");
+ return 1;
+ }
+
+ port[0].port_no = 0;
+ port[0].ioaddr.cmd_addr = iobase1;
+ port[0].ioaddr.altstatus_addr = port[0].ioaddr.ctl_addr =
+ iobase2 | ATA_PCI_CTL_OFS;
+ port[0].ioaddr.bmdma_addr = iobase5;
+
+ port[1].port_no = 1;
+ port[1].ioaddr.cmd_addr = iobase3;
+ port[1].ioaddr.altstatus_addr = port[1].ioaddr.ctl_addr =
+ iobase4 | ATA_PCI_CTL_OFS;
+ port[1].ioaddr.bmdma_addr = iobase5 + 0x8;
+
+ for (i = 0; i < CFG_SATA_MAXBUS; i++)
+ sata_port (&port[i].ioaddr);
+
+ for (i = 0; i < CFG_SATA_MAXBUS; i++) {
+ if (!(sata_bus_probe (i))) {
+ port[i].port_state = 0;
+ printf ("SATA#%d port is not present \n", i);
+ } else {
+ printf ("SATA#%d port is present\n", i);
+ if (sata_bus_softreset (i)) {
+ port[i].port_state = 0;
+ } else {
+ port[i].port_state = 1;
+ }
+ }
+ }
+
+ for (i = 0; i < CFG_SATA_MAXBUS; i++) {
+ u8 j, devno;
+
+ if (port[i].port_state == 0)
+ continue;
+ for (j = 0; j < CFG_SATA_DEVS_PER_BUS; j++) {
+ sata_identify (i, j);
+ set_Feature_cmd (i, j);
+ devno = i * CFG_SATA_DEVS_PER_BUS + j;
+ if ((sata_dev_desc[devno].lba > 0) &&
+ (sata_dev_desc[devno].blksz > 0)) {
+ dev_print (&sata_dev_desc[devno]);
+ /* initialize partition type */
+ init_part (&sata_dev_desc[devno]);
+ if (curr_dev < 0)
+ curr_dev =
+ i * CFG_SATA_DEVS_PER_BUS + j;
+ }
+ }
+ }
+ return 0;
+}
+#endif
diff --git a/drivers/ati_ids.h b/drivers/ati_ids.h
new file mode 100644
index 0000000..3e72a7d
--- /dev/null
+++ b/drivers/ati_ids.h
@@ -0,0 +1,211 @@
+/*
+ * ATI PCI IDs from XFree86, kept here to make sync'ing with
+ * XFree much simpler. Currently, this list is only used by
+ * radeonfb
+ */
+
+#define PCI_CHIP_RV380_3150 0x3150
+#define PCI_CHIP_RV380_3151 0x3151
+#define PCI_CHIP_RV380_3152 0x3152
+#define PCI_CHIP_RV380_3153 0x3153
+#define PCI_CHIP_RV380_3154 0x3154
+#define PCI_CHIP_RV380_3156 0x3156
+#define PCI_CHIP_RV380_3E50 0x3E50
+#define PCI_CHIP_RV380_3E51 0x3E51
+#define PCI_CHIP_RV380_3E52 0x3E52
+#define PCI_CHIP_RV380_3E53 0x3E53
+#define PCI_CHIP_RV380_3E54 0x3E54
+#define PCI_CHIP_RV380_3E56 0x3E56
+#define PCI_CHIP_RS100_4136 0x4136
+#define PCI_CHIP_RS200_4137 0x4137
+#define PCI_CHIP_R300_AD 0x4144
+#define PCI_CHIP_R300_AE 0x4145
+#define PCI_CHIP_R300_AF 0x4146
+#define PCI_CHIP_R300_AG 0x4147
+#define PCI_CHIP_R350_AH 0x4148
+#define PCI_CHIP_R350_AI 0x4149
+#define PCI_CHIP_R350_AJ 0x414A
+#define PCI_CHIP_R350_AK 0x414B
+#define PCI_CHIP_RV350_AP 0x4150
+#define PCI_CHIP_RV350_AQ 0x4151
+#define PCI_CHIP_RV360_AR 0x4152
+#define PCI_CHIP_RV350_AS 0x4153
+#define PCI_CHIP_RV350_AT 0x4154
+#define PCI_CHIP_RV350_AV 0x4156
+#define PCI_CHIP_MACH32 0x4158
+#define PCI_CHIP_RS250_4237 0x4237
+#define PCI_CHIP_R200_BB 0x4242
+#define PCI_CHIP_R200_BC 0x4243
+#define PCI_CHIP_RS100_4336 0x4336
+#define PCI_CHIP_RS200_4337 0x4337
+#define PCI_CHIP_MACH64CT 0x4354
+#define PCI_CHIP_MACH64CX 0x4358
+#define PCI_CHIP_RS250_4437 0x4437
+#define PCI_CHIP_MACH64ET 0x4554
+#define PCI_CHIP_MACH64GB 0x4742
+#define PCI_CHIP_MACH64GD 0x4744
+#define PCI_CHIP_MACH64GI 0x4749
+#define PCI_CHIP_MACH64GL 0x474C
+#define PCI_CHIP_MACH64GM 0x474D
+#define PCI_CHIP_MACH64GN 0x474E
+#define PCI_CHIP_MACH64GO 0x474F
+#define PCI_CHIP_MACH64GP 0x4750
+#define PCI_CHIP_MACH64GQ 0x4751
+#define PCI_CHIP_MACH64GR 0x4752
+#define PCI_CHIP_MACH64GS 0x4753
+#define PCI_CHIP_MACH64GT 0x4754
+#define PCI_CHIP_MACH64GU 0x4755
+#define PCI_CHIP_MACH64GV 0x4756
+#define PCI_CHIP_MACH64GW 0x4757
+#define PCI_CHIP_MACH64GX 0x4758
+#define PCI_CHIP_MACH64GY 0x4759
+#define PCI_CHIP_MACH64GZ 0x475A
+#define PCI_CHIP_RV250_Id 0x4964
+#define PCI_CHIP_RV250_Ie 0x4965
+#define PCI_CHIP_RV250_If 0x4966
+#define PCI_CHIP_RV250_Ig 0x4967
+#define PCI_CHIP_R420_JH 0x4A48
+#define PCI_CHIP_R420_JI 0x4A49
+#define PCI_CHIP_R420_JJ 0x4A4A
+#define PCI_CHIP_R420_JK 0x4A4B
+#define PCI_CHIP_R420_JL 0x4A4C
+#define PCI_CHIP_R420_JM 0x4A4D
+#define PCI_CHIP_R420_JN 0x4A4E
+#define PCI_CHIP_R420_JP 0x4A50
+#define PCI_CHIP_MACH64LB 0x4C42
+#define PCI_CHIP_MACH64LD 0x4C44
+#define PCI_CHIP_RAGE128LE 0x4C45
+#define PCI_CHIP_RAGE128LF 0x4C46
+#define PCI_CHIP_MACH64LG 0x4C47
+#define PCI_CHIP_MACH64LI 0x4C49
+#define PCI_CHIP_MACH64LM 0x4C4D
+#define PCI_CHIP_MACH64LN 0x4C4E
+#define PCI_CHIP_MACH64LP 0x4C50
+#define PCI_CHIP_MACH64LQ 0x4C51
+#define PCI_CHIP_MACH64LR 0x4C52
+#define PCI_CHIP_MACH64LS 0x4C53
+#define PCI_CHIP_MACH64LT 0x4C54
+#define PCI_CHIP_RADEON_LW 0x4C57
+#define PCI_CHIP_RADEON_LX 0x4C58
+#define PCI_CHIP_RADEON_LY 0x4C59
+#define PCI_CHIP_RADEON_LZ 0x4C5A
+#define PCI_CHIP_RV250_Ld 0x4C64
+#define PCI_CHIP_RV250_Le 0x4C65
+#define PCI_CHIP_RV250_Lf 0x4C66
+#define PCI_CHIP_RV250_Lg 0x4C67
+#define PCI_CHIP_RV250_Ln 0x4C6E
+#define PCI_CHIP_RAGE128MF 0x4D46
+#define PCI_CHIP_RAGE128ML 0x4D4C
+#define PCI_CHIP_R300_ND 0x4E44
+#define PCI_CHIP_R300_NE 0x4E45
+#define PCI_CHIP_R300_NF 0x4E46
+#define PCI_CHIP_R300_NG 0x4E47
+#define PCI_CHIP_R350_NH 0x4E48
+#define PCI_CHIP_R350_NI 0x4E49
+#define PCI_CHIP_R360_NJ 0x4E4A
+#define PCI_CHIP_R350_NK 0x4E4B
+#define PCI_CHIP_RV350_NP 0x4E50
+#define PCI_CHIP_RV350_NQ 0x4E51
+#define PCI_CHIP_RV350_NR 0x4E52
+#define PCI_CHIP_RV350_NS 0x4E53
+#define PCI_CHIP_RV350_NT 0x4E54
+#define PCI_CHIP_RV350_NV 0x4E56
+#define PCI_CHIP_RAGE128PA 0x5041
+#define PCI_CHIP_RAGE128PB 0x5042
+#define PCI_CHIP_RAGE128PC 0x5043
+#define PCI_CHIP_RAGE128PD 0x5044
+#define PCI_CHIP_RAGE128PE 0x5045
+#define PCI_CHIP_RAGE128PF 0x5046
+#define PCI_CHIP_RAGE128PG 0x5047
+#define PCI_CHIP_RAGE128PH 0x5048
+#define PCI_CHIP_RAGE128PI 0x5049
+#define PCI_CHIP_RAGE128PJ 0x504A
+#define PCI_CHIP_RAGE128PK 0x504B
+#define PCI_CHIP_RAGE128PL 0x504C
+#define PCI_CHIP_RAGE128PM 0x504D
+#define PCI_CHIP_RAGE128PN 0x504E
+#define PCI_CHIP_RAGE128PO 0x504F
+#define PCI_CHIP_RAGE128PP 0x5050
+#define PCI_CHIP_RAGE128PQ 0x5051
+#define PCI_CHIP_RAGE128PR 0x5052
+#define PCI_CHIP_RAGE128PS 0x5053
+#define PCI_CHIP_RAGE128PT 0x5054
+#define PCI_CHIP_RAGE128PU 0x5055
+#define PCI_CHIP_RAGE128PV 0x5056
+#define PCI_CHIP_RAGE128PW 0x5057
+#define PCI_CHIP_RAGE128PX 0x5058
+#define PCI_CHIP_RADEON_QD 0x5144
+#define PCI_CHIP_RADEON_QE 0x5145
+#define PCI_CHIP_RADEON_QF 0x5146
+#define PCI_CHIP_RADEON_QG 0x5147
+#define PCI_CHIP_R200_QH 0x5148
+#define PCI_CHIP_R200_QI 0x5149
+#define PCI_CHIP_R200_QJ 0x514A
+#define PCI_CHIP_R200_QK 0x514B
+#define PCI_CHIP_R200_QL 0x514C
+#define PCI_CHIP_R200_QM 0x514D
+#define PCI_CHIP_R200_QN 0x514E
+#define PCI_CHIP_R200_QO 0x514F
+#define PCI_CHIP_RV200_QW 0x5157
+#define PCI_CHIP_RV200_QX 0x5158
+#define PCI_CHIP_RV100_QY 0x5159
+#define PCI_CHIP_RV100_QZ 0x515A
+#define PCI_CHIP_RN50 0x515E
+#define PCI_CHIP_RAGE128RE 0x5245
+#define PCI_CHIP_RAGE128RF 0x5246
+#define PCI_CHIP_RAGE128RG 0x5247
+#define PCI_CHIP_RAGE128RK 0x524B
+#define PCI_CHIP_RAGE128RL 0x524C
+#define PCI_CHIP_RAGE128SE 0x5345
+#define PCI_CHIP_RAGE128SF 0x5346
+#define PCI_CHIP_RAGE128SG 0x5347
+#define PCI_CHIP_RAGE128SH 0x5348
+#define PCI_CHIP_RAGE128SK 0x534B
+#define PCI_CHIP_RAGE128SL 0x534C
+#define PCI_CHIP_RAGE128SM 0x534D
+#define PCI_CHIP_RAGE128SN 0x534E
+#define PCI_CHIP_RAGE128TF 0x5446
+#define PCI_CHIP_RAGE128TL 0x544C
+#define PCI_CHIP_RAGE128TR 0x5452
+#define PCI_CHIP_RAGE128TS 0x5453
+#define PCI_CHIP_RAGE128TT 0x5454
+#define PCI_CHIP_RAGE128TU 0x5455
+#define PCI_CHIP_RV370_5460 0x5460
+#define PCI_CHIP_RV370_5461 0x5461
+#define PCI_CHIP_RV370_5462 0x5462
+#define PCI_CHIP_RV370_5463 0x5463
+#define PCI_CHIP_RV370_5464 0x5464
+#define PCI_CHIP_RV370_5465 0x5465
+#define PCI_CHIP_RV370_5466 0x5466
+#define PCI_CHIP_RV370_5467 0x5467
+#define PCI_CHIP_R423_UH 0x5548
+#define PCI_CHIP_R423_UI 0x5549
+#define PCI_CHIP_R423_UJ 0x554A
+#define PCI_CHIP_R423_UK 0x554B
+#define PCI_CHIP_R423_UQ 0x5551
+#define PCI_CHIP_R423_UR 0x5552
+#define PCI_CHIP_R423_UT 0x5554
+#define PCI_CHIP_MACH64VT 0x5654
+#define PCI_CHIP_MACH64VU 0x5655
+#define PCI_CHIP_MACH64VV 0x5656
+#define PCI_CHIP_RS300_5834 0x5834
+#define PCI_CHIP_RS300_5835 0x5835
+#define PCI_CHIP_RS300_5836 0x5836
+#define PCI_CHIP_RS300_5837 0x5837
+#define PCI_CHIP_RV370_5B60 0x5B60
+#define PCI_CHIP_RV370_5B61 0x5B61
+#define PCI_CHIP_RV370_5B62 0x5B62
+#define PCI_CHIP_RV370_5B63 0x5B63
+#define PCI_CHIP_RV370_5B64 0x5B64
+#define PCI_CHIP_RV370_5B65 0x5B65
+#define PCI_CHIP_RV370_5B66 0x5B66
+#define PCI_CHIP_RV370_5B67 0x5B67
+#define PCI_CHIP_RV280_5960 0x5960
+#define PCI_CHIP_RV280_5961 0x5961
+#define PCI_CHIP_RV280_5962 0x5962
+#define PCI_CHIP_RV280_5964 0x5964
+#define PCI_CHIP_RV280_5C61 0x5C61
+#define PCI_CHIP_RV280_5C63 0x5C63
+#define PCI_CHIP_R423_5D57 0x5D57
+#define PCI_CHIP_RS350_7834 0x7834
+#define PCI_CHIP_RS350_7835 0x7835
diff --git a/drivers/ati_radeon_fb.c b/drivers/ati_radeon_fb.c
new file mode 100644
index 0000000..c174f37
--- /dev/null
+++ b/drivers/ati_radeon_fb.c
@@ -0,0 +1,486 @@
+/*
+ * ATI Radeon Video card Framebuffer driver.
+ *
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ * Zhang Wei <wei.zhang@freescale.com>
+ * Jason Jin <jason.jin@freescale.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Some codes of this file is partly ported from Linux kernel
+ * ATI video framebuffer driver.
+ *
+ * Now the driver is tested on below ATI chips:
+ * 9200
+ * X300
+ * X700
+ *
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_ATI_RADEON_FB
+
+#include <command.h>
+#include <pci.h>
+#include <asm/processor.h>
+#include <asm/errno.h>
+#include <asm/io.h>
+#include <malloc.h>
+#include <video_fb.h>
+
+#include <radeon.h>
+#include "ati_ids.h"
+#include "ati_radeon_fb.h"
+
+#undef DEBUG
+
+#ifdef DEBUG
+#define DPRINT(x...) printf(x)
+#else
+#define DPRINT(x...) do{}while(0)
+#endif
+
+#ifndef min_t
+#define min_t(type,x,y) \
+ ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
+#endif
+
+#define MAX_MAPPED_VRAM (2048*2048*4)
+#define MIN_MAPPED_VRAM (1024*768*1)
+
+/*#define PCI_VENDOR_ID_ATI*/
+#define PCI_CHIP_RV280_5960 0x5960
+#define PCI_CHIP_RV280_5961 0x5961
+#define PCI_CHIP_RV280_5962 0x5962
+#define PCI_CHIP_RV280_5964 0x5964
+#define PCI_CHIP_RV370_5B60 0x5B60
+#define PCI_CHIP_RV380_5657 0x5657
+#define PCI_CHIP_R420_554d 0x554d
+
+static struct pci_device_id ati_radeon_pci_ids[] = {
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5960},
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5961},
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5962},
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_RV280_5964},
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_RV370_5B60},
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_RV380_5657},
+ {PCI_VENDOR_ID_ATI, PCI_CHIP_R420_554d},
+ {0, 0}
+};
+
+static u16 ati_radeon_id_family_table[][2] = {
+ {PCI_CHIP_RV280_5960, CHIP_FAMILY_RV280},
+ {PCI_CHIP_RV280_5961, CHIP_FAMILY_RV280},
+ {PCI_CHIP_RV280_5962, CHIP_FAMILY_RV280},
+ {PCI_CHIP_RV280_5964, CHIP_FAMILY_RV280},
+ {PCI_CHIP_RV370_5B60, CHIP_FAMILY_RV380},
+ {PCI_CHIP_RV380_5657, CHIP_FAMILY_RV380},
+ {PCI_CHIP_R420_554d, CHIP_FAMILY_R420},
+ {0, 0}
+};
+
+u16 get_radeon_id_family(u16 device)
+{
+ int i;
+ for (i=0; ati_radeon_id_family_table[0][i]; i+=2)
+ if (ati_radeon_id_family_table[0][i] == device)
+ return ati_radeon_id_family_table[0][i + 1];
+ return 0;
+}
+
+struct radeonfb_info *rinfo;
+
+static void radeon_identify_vram(struct radeonfb_info *rinfo)
+{
+ u32 tmp;
+
+ /* framebuffer size */
+ if ((rinfo->family == CHIP_FAMILY_RS100) ||
+ (rinfo->family == CHIP_FAMILY_RS200) ||
+ (rinfo->family == CHIP_FAMILY_RS300)) {
+ u32 tom = INREG(NB_TOM);
+ tmp = ((((tom >> 16) - (tom & 0xffff) + 1) << 6) * 1024);
+
+ radeon_fifo_wait(6);
+ OUTREG(MC_FB_LOCATION, tom);
+ OUTREG(DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
+ OUTREG(CRTC2_DISPLAY_BASE_ADDR, (tom & 0xffff) << 16);
+ OUTREG(OV0_BASE_ADDR, (tom & 0xffff) << 16);
+
+ /* This is supposed to fix the crtc2 noise problem. */
+ OUTREG(GRPH2_BUFFER_CNTL, INREG(GRPH2_BUFFER_CNTL) & ~0x7f0000);
+
+ if ((rinfo->family == CHIP_FAMILY_RS100) ||
+ (rinfo->family == CHIP_FAMILY_RS200)) {
+ /* This is to workaround the asic bug for RMX, some versions
+ of BIOS dosen't have this register initialized correctly.
+ */
+ OUTREGP(CRTC_MORE_CNTL, CRTC_H_CUTOFF_ACTIVE_EN,
+ ~CRTC_H_CUTOFF_ACTIVE_EN);
+ }
+ } else {
+ tmp = INREG(CONFIG_MEMSIZE);
+ }
+
+ /* mem size is bits [28:0], mask off the rest */
+ rinfo->video_ram = tmp & CONFIG_MEMSIZE_MASK;
+
+ /*
+ * Hack to get around some busted production M6's
+ * reporting no ram
+ */
+ if (rinfo->video_ram == 0) {
+ switch (rinfo->pdev.device) {
+ case PCI_CHIP_RADEON_LY:
+ case PCI_CHIP_RADEON_LZ:
+ rinfo->video_ram = 8192 * 1024;
+ break;
+ default:
+ break;
+ }
+ }
+
+ /*
+ * Now try to identify VRAM type
+ */
+ if ((rinfo->family >= CHIP_FAMILY_R300) ||
+ (INREG(MEM_SDRAM_MODE_REG) & (1<<30)))
+ rinfo->vram_ddr = 1;
+ else
+ rinfo->vram_ddr = 0;
+
+ tmp = INREG(MEM_CNTL);
+ if (IS_R300_VARIANT(rinfo)) {
+ tmp &= R300_MEM_NUM_CHANNELS_MASK;
+ switch (tmp) {
+ case 0: rinfo->vram_width = 64; break;
+ case 1: rinfo->vram_width = 128; break;
+ case 2: rinfo->vram_width = 256; break;
+ default: rinfo->vram_width = 128; break;
+ }
+ } else if ((rinfo->family == CHIP_FAMILY_RV100) ||
+ (rinfo->family == CHIP_FAMILY_RS100) ||
+ (rinfo->family == CHIP_FAMILY_RS200)){
+ if (tmp & RV100_MEM_HALF_MODE)
+ rinfo->vram_width = 32;
+ else
+ rinfo->vram_width = 64;
+ } else {
+ if (tmp & MEM_NUM_CHANNELS_MASK)
+ rinfo->vram_width = 128;
+ else
+ rinfo->vram_width = 64;
+ }
+
+ /* This may not be correct, as some cards can have half of channel disabled
+ * ToDo: identify these cases
+ */
+
+ DPRINT("radeonfb: Found %ldk of %s %d bits wide videoram\n",
+ rinfo->video_ram / 1024,
+ rinfo->vram_ddr ? "DDR" : "SDRAM",
+ rinfo->vram_width);
+
+}
+
+static void radeon_write_pll_regs(struct radeonfb_info *rinfo, struct radeon_regs *mode)
+{
+ int i;
+
+ radeon_fifo_wait(20);
+
+#if 0
+ /* Workaround from XFree */
+ if (rinfo->is_mobility) {
+ /* A temporal workaround for the occational blanking on certain laptop
+ * panels. This appears to related to the PLL divider registers
+ * (fail to lock?). It occurs even when all dividers are the same
+ * with their old settings. In this case we really don't need to
+ * fiddle with PLL registers. By doing this we can avoid the blanking
+ * problem with some panels.
+ */
+ if ((mode->ppll_ref_div == (INPLL(PPLL_REF_DIV) & PPLL_REF_DIV_MASK)) &&
+ (mode->ppll_div_3 == (INPLL(PPLL_DIV_3) &
+ (PPLL_POST3_DIV_MASK | PPLL_FB3_DIV_MASK)))) {
+ /* We still have to force a switch to selected PPLL div thanks to
+ * an XFree86 driver bug which will switch it away in some cases
+ * even when using UseFDev */
+ OUTREGP(CLOCK_CNTL_INDEX,
+ mode->clk_cntl_index & PPLL_DIV_SEL_MASK,
+ ~PPLL_DIV_SEL_MASK);
+ radeon_pll_errata_after_index(rinfo);
+ radeon_pll_errata_after_data(rinfo);
+ return;
+ }
+ }
+#endif
+ if(rinfo->pdev.device == PCI_CHIP_RV370_5B60) return;
+
+ /* Swich VCKL clock input to CPUCLK so it stays fed while PPLL updates*/
+ OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_CPUCLK, ~VCLK_SRC_SEL_MASK);
+
+ /* Reset PPLL & enable atomic update */
+ OUTPLLP(PPLL_CNTL,
+ PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN,
+ ~(PPLL_RESET | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
+
+ /* Switch to selected PPLL divider */
+ OUTREGP(CLOCK_CNTL_INDEX,
+ mode->clk_cntl_index & PPLL_DIV_SEL_MASK,
+ ~PPLL_DIV_SEL_MASK);
+
+ /* Set PPLL ref. div */
+ if (rinfo->family == CHIP_FAMILY_R300 ||
+ rinfo->family == CHIP_FAMILY_RS300 ||
+ rinfo->family == CHIP_FAMILY_R350 ||
+ rinfo->family == CHIP_FAMILY_RV350) {
+ if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) {
+ /* When restoring console mode, use saved PPLL_REF_DIV
+ * setting.
+ */
+ OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, 0);
+ } else {
+ /* R300 uses ref_div_acc field as real ref divider */
+ OUTPLLP(PPLL_REF_DIV,
+ (mode->ppll_ref_div << R300_PPLL_REF_DIV_ACC_SHIFT),
+ ~R300_PPLL_REF_DIV_ACC_MASK);
+ }
+ } else
+ OUTPLLP(PPLL_REF_DIV, mode->ppll_ref_div, ~PPLL_REF_DIV_MASK);
+
+ /* Set PPLL divider 3 & post divider*/
+ OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_FB3_DIV_MASK);
+ OUTPLLP(PPLL_DIV_3, mode->ppll_div_3, ~PPLL_POST3_DIV_MASK);
+
+ /* Write update */
+ while (INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R)
+ ;
+ OUTPLLP(PPLL_REF_DIV, PPLL_ATOMIC_UPDATE_W, ~PPLL_ATOMIC_UPDATE_W);
+
+ /* Wait read update complete */
+ /* FIXME: Certain revisions of R300 can't recover here. Not sure of
+ the cause yet, but this workaround will mask the problem for now.
+ Other chips usually will pass at the very first test, so the
+ workaround shouldn't have any effect on them. */
+ for (i = 0; (i < 10000 && INPLL(PPLL_REF_DIV) & PPLL_ATOMIC_UPDATE_R); i++)
+ ;
+
+ OUTPLL(HTOTAL_CNTL, 0);
+
+ /* Clear reset & atomic update */
+ OUTPLLP(PPLL_CNTL, 0,
+ ~(PPLL_RESET | PPLL_SLEEP | PPLL_ATOMIC_UPDATE_EN | PPLL_VGA_ATOMIC_UPDATE_EN));
+
+ /* We may want some locking ... oh well */
+ udelay(5000);
+
+ /* Switch back VCLK source to PPLL */
+ OUTPLLP(VCLK_ECP_CNTL, VCLK_SRC_SEL_PPLLCLK, ~VCLK_SRC_SEL_MASK);
+}
+
+typedef struct {
+ u16 reg;
+ u32 val;
+} reg_val;
+
+
+/* these common regs are cleared before mode setting so they do not
+ * interfere with anything
+ */
+static reg_val common_regs[] = {
+ { OVR_CLR, 0 },
+ { OVR_WID_LEFT_RIGHT, 0 },
+ { OVR_WID_TOP_BOTTOM, 0 },
+ { OV0_SCALE_CNTL, 0 },
+ { SUBPIC_CNTL, 0 },
+ { VIPH_CONTROL, 0 },
+ { I2C_CNTL_1, 0 },
+ { GEN_INT_CNTL, 0 },
+ { CAP0_TRIG_CNTL, 0 },
+ { CAP1_TRIG_CNTL, 0 },
+};
+
+
+void radeon_setmode(void)
+{
+ int i;
+ struct radeon_regs *mode = malloc(sizeof(struct radeon_regs));
+
+ mode->crtc_gen_cntl = 0x03000200;
+ mode->crtc_ext_cntl = 0x00008048;
+ mode->dac_cntl = 0xff002100;
+ mode->crtc_h_total_disp = 0x4f0063;
+ mode->crtc_h_sync_strt_wid = 0x8c02a2;
+ mode->crtc_v_total_disp = 0x01df020c;
+ mode->crtc_v_sync_strt_wid = 0x8201ea;
+ mode->crtc_pitch = 0x00500050;
+
+ OUTREG(CRTC_GEN_CNTL, mode->crtc_gen_cntl);
+ OUTREGP(CRTC_EXT_CNTL, mode->crtc_ext_cntl,
+ ~(CRTC_HSYNC_DIS | CRTC_VSYNC_DIS | CRTC_DISPLAY_DIS));
+ OUTREGP(DAC_CNTL, mode->dac_cntl, DAC_RANGE_CNTL | DAC_BLANKING);
+ OUTREG(CRTC_H_TOTAL_DISP, mode->crtc_h_total_disp);
+ OUTREG(CRTC_H_SYNC_STRT_WID, mode->crtc_h_sync_strt_wid);
+ OUTREG(CRTC_V_TOTAL_DISP, mode->crtc_v_total_disp);
+ OUTREG(CRTC_V_SYNC_STRT_WID, mode->crtc_v_sync_strt_wid);
+ OUTREG(CRTC_OFFSET, 0);
+ OUTREG(CRTC_OFFSET_CNTL, 0);
+ OUTREG(CRTC_PITCH, mode->crtc_pitch);
+
+ mode->clk_cntl_index = 0x300;
+ mode->ppll_ref_div = 0xc;
+ mode->ppll_div_3 = 0x00030059;
+
+ radeon_write_pll_regs(rinfo, mode);
+}
+
+int radeon_probe(struct radeonfb_info *rinfo)
+{
+ pci_dev_t pdev;
+ u16 did;
+
+ pdev = pci_find_devices(ati_radeon_pci_ids, 0);
+
+ if (pdev != -1) {
+ pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
+ printf("ATI Radeon video card (%04x, %04x) found @(%d:%d:%d)\n",
+ PCI_VENDOR_ID_ATI, did, (pdev >> 16) & 0xff,
+ (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
+
+ strcpy(rinfo->name, "ATI Radeon");
+ rinfo->pdev.vendor = PCI_VENDOR_ID_ATI;
+ rinfo->pdev.device = did;
+ rinfo->family = get_radeon_id_family(rinfo->pdev.device);
+ pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0,
+ &rinfo->fb_base_phys);
+ pci_read_config_dword(pdev, PCI_BASE_ADDRESS_2,
+ &rinfo->mmio_base_phys);
+ rinfo->fb_base_phys &= 0xfffff000;
+ rinfo->mmio_base_phys &= ~0x04;
+
+ rinfo->mmio_base = (void *)rinfo->mmio_base_phys;
+ DPRINT("rinfo->mmio_base = 0x%x\n",rinfo->mmio_base);
+ rinfo->fb_local_base = INREG(MC_FB_LOCATION) << 16;
+ DPRINT("rinfo->fb_local_base = 0x%x\n",rinfo->fb_local_base);
+ /* PostBIOS with x86 emulater */
+ BootVideoCardBIOS(pdev, NULL, 0);
+
+ /*
+ * Check for errata
+ * (These will be added in the future for the chipfamily
+ * R300, RV200, RS200, RV100, RS100.)
+ */
+
+ /* Get VRAM size and type */
+ radeon_identify_vram(rinfo);
+
+ rinfo->mapped_vram = min_t(unsigned long, MAX_MAPPED_VRAM,
+ rinfo->video_ram);
+ rinfo->fb_base = (void *)rinfo->fb_base_phys;
+
+ DPRINT("Radeon: framebuffer base phy address 0x%08x," \
+ "MMIO base phy address 0x%08x," \
+ "framebuffer local base 0x%08x.\n ",
+ rinfo->fb_base_phys, rinfo->mmio_base_phys,
+ rinfo->fb_local_base);
+
+ return 0;
+ }
+ return -1;
+}
+
+/*
+ * The Graphic Device
+ */
+GraphicDevice ctfb;
+
+#define CURSOR_SIZE 0x1000 /* in KByte for HW Cursor */
+#define PATTERN_ADR (pGD->dprBase + CURSOR_SIZE) /* pattern Memory after Cursor Memory */
+#define PATTERN_SIZE 8*8*4 /* 4 Bytes per Pixel 8 x 8 Pixel */
+#define ACCELMEMORY (CURSOR_SIZE + PATTERN_SIZE) /* reserved Memory for BITBlt and hw cursor */
+
+void *video_hw_init(void)
+{
+ GraphicDevice *pGD = (GraphicDevice *) & ctfb;
+ int i;
+ u32 *vm;
+
+ rinfo = malloc(sizeof(struct radeonfb_info));
+
+ if(radeon_probe(rinfo)) {
+ printf("No radeon video card found!\n");
+ return NULL;
+ }
+
+ /* fill in Graphic device struct */
+ sprintf (pGD->modeIdent, "%dx%dx%d %ldkHz %ldHz", 640,
+ 480, 16, (1000 / 1000),
+ (2000 / 1000));
+ printf ("%s\n", pGD->modeIdent);
+
+ pGD->winSizeX = 640;
+ pGD->winSizeY = 480;
+ pGD->plnSizeX = 640;
+ pGD->plnSizeY = 480;
+
+ pGD->gdfBytesPP = 1;
+ pGD->gdfIndex = GDF__8BIT_INDEX;
+
+ pGD->isaBase = CFG_ISA_IO_BASE_ADDRESS;
+ pGD->pciBase = rinfo->fb_base_phys;
+ pGD->frameAdrs = rinfo->fb_base_phys;
+ pGD->memSize = 64 * 1024 * 1024;
+
+ /* Cursor Start Address */
+ pGD->dprBase =
+ (pGD->winSizeX * pGD->winSizeY * pGD->gdfBytesPP) + rinfo->fb_base_phys;
+ if ((pGD->dprBase & 0x0fff) != 0) {
+ /* allign it */
+ pGD->dprBase &= 0xfffff000;
+ pGD->dprBase += 0x00001000;
+ }
+ DPRINT ("Cursor Start %x Pattern Start %x\n", pGD->dprBase,
+ PATTERN_ADR);
+ pGD->vprBase = rinfo->fb_base_phys; /* Dummy */
+ pGD->cprBase = rinfo->fb_base_phys; /* Dummy */
+ /* set up Hardware */
+
+ /* Clear video memory */
+ i = pGD->memSize / 4;
+ vm = (unsigned int *) pGD->pciBase;
+ while (i--)
+ *vm++ = 0;
+ /*SetDrawingEngine (bits_per_pixel);*/
+
+ radeon_setmode();
+
+ return ((void *) pGD);
+}
+
+void video_set_lut (unsigned int index, /* color number */
+ unsigned char r, /* red */
+ unsigned char g, /* green */
+ unsigned char b /* blue */
+ )
+{
+ OUTREG(PALETTE_INDEX, index);
+ OUTREG(PALETTE_DATA, (r << 16) | (g << 8) | b);
+}
+#endif
diff --git a/drivers/ati_radeon_fb.h b/drivers/ati_radeon_fb.h
new file mode 100644
index 0000000..b5c4b8b
--- /dev/null
+++ b/drivers/ati_radeon_fb.h
@@ -0,0 +1,282 @@
+#ifndef __ATI_RADEON_FB_H
+#define __ATI_RADEON_FB_H
+
+/***************************************************************
+ * Most of the definitions here are adapted right from XFree86 *
+ ***************************************************************/
+
+/*
+ * Chip families. Must fit in the low 16 bits of a long word
+ */
+enum radeon_family {
+ CHIP_FAMILY_UNKNOW,
+ CHIP_FAMILY_LEGACY,
+ CHIP_FAMILY_RADEON,
+ CHIP_FAMILY_RV100,
+ CHIP_FAMILY_RS100, /* U1 (IGP320M) or A3 (IGP320)*/
+ CHIP_FAMILY_RV200,
+ CHIP_FAMILY_RS200, /* U2 (IGP330M/340M/350M) or A4 (IGP330/340/345/350),
+ RS250 (IGP 7000) */
+ CHIP_FAMILY_R200,
+ CHIP_FAMILY_RV250,
+ CHIP_FAMILY_RS300, /* Radeon 9000 IGP */
+ CHIP_FAMILY_RV280,
+ CHIP_FAMILY_R300,
+ CHIP_FAMILY_R350,
+ CHIP_FAMILY_RV350,
+ CHIP_FAMILY_RV380, /* RV370/RV380/M22/M24 */
+ CHIP_FAMILY_R420, /* R420/R423/M18 */
+ CHIP_FAMILY_LAST,
+};
+
+#define IS_RV100_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_RV100) || \
+ ((rinfo)->family == CHIP_FAMILY_RV200) || \
+ ((rinfo)->family == CHIP_FAMILY_RS100) || \
+ ((rinfo)->family == CHIP_FAMILY_RS200) || \
+ ((rinfo)->family == CHIP_FAMILY_RV250) || \
+ ((rinfo)->family == CHIP_FAMILY_RV280) || \
+ ((rinfo)->family == CHIP_FAMILY_RS300))
+
+#define IS_R300_VARIANT(rinfo) (((rinfo)->family == CHIP_FAMILY_R300) || \
+ ((rinfo)->family == CHIP_FAMILY_RV350) || \
+ ((rinfo)->family == CHIP_FAMILY_R350) || \
+ ((rinfo)->family == CHIP_FAMILY_RV380) || \
+ ((rinfo)->family == CHIP_FAMILY_R420))
+
+struct radeonfb_info {
+ char name[20];
+
+ struct pci_device_id pdev;
+ u16 family;
+
+ u32 fb_base_phys;
+ u32 mmio_base_phys;
+
+ void *mmio_base;
+ void *fb_base;
+
+ u32 video_ram;
+ u32 mapped_vram;
+ int vram_width;
+ int vram_ddr;
+
+ u32 fb_local_base;
+};
+
+#define INREG8(addr) readb((rinfo->mmio_base)+addr)
+#define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
+#define INREG16(addr) readw((rinfo->mmio_base)+addr)
+#define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
+#define INREG(addr) readl((rinfo->mmio_base)+addr)
+#define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
+
+static inline void _OUTREGP(struct radeonfb_info *rinfo, u32 addr,
+ u32 val, u32 mask)
+{
+ unsigned int tmp;
+
+ tmp = INREG(addr);
+ tmp &= (mask);
+ tmp |= (val);
+ OUTREG(addr, tmp);
+}
+
+#define OUTREGP(addr,val,mask) _OUTREGP(rinfo, addr, val,mask)
+
+/*
+ * 2D Engine helper routines
+ */
+static inline void radeon_engine_flush (struct radeonfb_info *rinfo)
+{
+ int i;
+
+ /* initiate flush */
+ OUTREGP(RB2D_DSTCACHE_CTLSTAT, RB2D_DC_FLUSH_ALL,
+ ~RB2D_DC_FLUSH_ALL);
+
+ for (i=0; i < 2000000; i++) {
+ if (!(INREG(RB2D_DSTCACHE_CTLSTAT) & RB2D_DC_BUSY))
+ return;
+ udelay(1);
+ }
+ printf("radeonfb: Flush Timeout !\n");
+}
+
+static inline void _radeon_fifo_wait(struct radeonfb_info *rinfo, int entries)
+{
+ int i;
+
+ for (i=0; i<2000000; i++) {
+ if ((INREG(RBBM_STATUS) & 0x7f) >= entries)
+ return;
+ udelay(1);
+ }
+ printf("radeonfb: FIFO Timeout !\n");
+}
+
+static inline void _radeon_engine_idle(struct radeonfb_info *rinfo)
+{
+ int i;
+
+ /* ensure FIFO is empty before waiting for idle */
+ _radeon_fifo_wait (rinfo, 64);
+
+ for (i=0; i<2000000; i++) {
+ if (((INREG(RBBM_STATUS) & GUI_ACTIVE)) == 0) {
+ radeon_engine_flush (rinfo);
+ return;
+ }
+ udelay(1);
+ }
+ printf("radeonfb: Idle Timeout !\n");
+}
+
+#define radeon_engine_idle() _radeon_engine_idle(rinfo)
+#define radeon_fifo_wait(entries) _radeon_fifo_wait(rinfo,entries)
+#define radeon_msleep(ms) _radeon_msleep(rinfo,ms)
+
+/*
+ * This structure contains the various registers manipulated by this
+ * driver for setting or restoring a mode. It's mostly copied from
+ * XFree's RADEONSaveRec structure. A few chip settings might still be
+ * tweaked without beeing reflected or saved in these registers though
+ */
+struct radeon_regs {
+ /* Common registers */
+ u32 ovr_clr;
+ u32 ovr_wid_left_right;
+ u32 ovr_wid_top_bottom;
+ u32 ov0_scale_cntl;
+ u32 mpp_tb_config;
+ u32 mpp_gp_config;
+ u32 subpic_cntl;
+ u32 viph_control;
+ u32 i2c_cntl_1;
+ u32 gen_int_cntl;
+ u32 cap0_trig_cntl;
+ u32 cap1_trig_cntl;
+ u32 bus_cntl;
+ u32 surface_cntl;
+ u32 bios_5_scratch;
+
+ /* Other registers to save for VT switches or driver load/unload */
+ u32 dp_datatype;
+ u32 rbbm_soft_reset;
+ u32 clock_cntl_index;
+ u32 amcgpio_en_reg;
+ u32 amcgpio_mask;
+
+ /* Surface/tiling registers */
+ u32 surf_lower_bound[8];
+ u32 surf_upper_bound[8];
+ u32 surf_info[8];
+
+ /* CRTC registers */
+ u32 crtc_gen_cntl;
+ u32 crtc_ext_cntl;
+ u32 dac_cntl;
+ u32 crtc_h_total_disp;
+ u32 crtc_h_sync_strt_wid;
+ u32 crtc_v_total_disp;
+ u32 crtc_v_sync_strt_wid;
+ u32 crtc_offset;
+ u32 crtc_offset_cntl;
+ u32 crtc_pitch;
+ u32 disp_merge_cntl;
+ u32 grph_buffer_cntl;
+ u32 crtc_more_cntl;
+
+ /* CRTC2 registers */
+ u32 crtc2_gen_cntl;
+ u32 dac2_cntl;
+ u32 disp_output_cntl;
+ u32 disp_hw_debug;
+ u32 disp2_merge_cntl;
+ u32 grph2_buffer_cntl;
+ u32 crtc2_h_total_disp;
+ u32 crtc2_h_sync_strt_wid;
+ u32 crtc2_v_total_disp;
+ u32 crtc2_v_sync_strt_wid;
+ u32 crtc2_offset;
+ u32 crtc2_offset_cntl;
+ u32 crtc2_pitch;
+
+ /* Flat panel regs */
+ u32 fp_crtc_h_total_disp;
+ u32 fp_crtc_v_total_disp;
+ u32 fp_gen_cntl;
+ u32 fp2_gen_cntl;
+ u32 fp_h_sync_strt_wid;
+ u32 fp2_h_sync_strt_wid;
+ u32 fp_horz_stretch;
+ u32 fp_panel_cntl;
+ u32 fp_v_sync_strt_wid;
+ u32 fp2_v_sync_strt_wid;
+ u32 fp_vert_stretch;
+ u32 lvds_gen_cntl;
+ u32 lvds_pll_cntl;
+ u32 tmds_crc;
+ u32 tmds_transmitter_cntl;
+
+ /* Computed values for PLL */
+ u32 dot_clock_freq;
+ int feedback_div;
+ int post_div;
+
+ /* PLL registers */
+ u32 ppll_div_3;
+ u32 ppll_ref_div;
+ u32 vclk_ecp_cntl;
+ u32 clk_cntl_index;
+
+ /* Computed values for PLL2 */
+ u32 dot_clock_freq_2;
+ int feedback_div_2;
+ int post_div_2;
+
+ /* PLL2 registers */
+ u32 p2pll_ref_div;
+ u32 p2pll_div_0;
+ u32 htotal_cntl2;
+
+ /* Palette */
+ int palette_valid;
+};
+
+static inline u32 __INPLL(struct radeonfb_info *rinfo, u32 addr)
+{
+ u32 data;
+
+ OUTREG8(CLOCK_CNTL_INDEX, addr & 0x0000003f);
+ /* radeon_pll_errata_after_index(rinfo); */
+ data = INREG(CLOCK_CNTL_DATA);
+ /* radeon_pll_errata_after_data(rinfo); */
+ return data;
+}
+
+static inline void __OUTPLL(struct radeonfb_info *rinfo, unsigned int index,
+ u32 val)
+{
+
+ OUTREG8(CLOCK_CNTL_INDEX, (index & 0x0000003f) | 0x00000080);
+ /* radeon_pll_errata_after_index(rinfo); */
+ OUTREG(CLOCK_CNTL_DATA, val);
+ /* radeon_pll_errata_after_data(rinfo); */
+}
+
+static inline void __OUTPLLP(struct radeonfb_info *rinfo, unsigned int index,
+ u32 val, u32 mask)
+{
+ unsigned int tmp;
+
+ tmp = __INPLL(rinfo, index);
+ tmp &= (mask);
+ tmp |= (val);
+ __OUTPLL(rinfo, index, tmp);
+}
+
+#define INPLL(addr) __INPLL(rinfo, addr)
+#define OUTPLL(index, val) __OUTPLL(rinfo, index, val)
+#define OUTPLLP(index, val, mask) __OUTPLLP(rinfo, index, val, mask)
+
+#endif
diff --git a/drivers/bcm570x.c b/drivers/bcm570x.c
index 5f632a6..c8f4064 100644
--- a/drivers/bcm570x.c
+++ b/drivers/bcm570x.c
@@ -6,8 +6,8 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && (!defined(CONFIG_NET_MULTI)) && \
- defined(CONFIG_BCM570x)
+#if defined(CONFIG_CMD_NET) \
+ && (!defined(CONFIG_NET_MULTI)) && defined(CONFIG_BCM570x)
#ifdef CONFIG_BMW
#include <mpc824x.h>
@@ -18,7 +18,6 @@
#include <pci.h>
#include <malloc.h>
-
/*
* PCI Registers and definitions.
*/
@@ -31,7 +30,6 @@
#define BCM570X_MBAR 0x80100000
#define BCM570X_ILINE 1
-
#define SECOND_USEC 1000000
#define MAX_PACKET_SIZE 1600
#define MAX_UNITS 4
@@ -39,62 +37,61 @@
/* Globals to this module */
int initialized = 0;
unsigned int ioBase = 0;
-volatile PLM_DEVICE_BLOCK pDevice = NULL; /* 570x softc */
-volatile PUM_DEVICE_BLOCK pUmDevice = NULL;
+volatile PLM_DEVICE_BLOCK pDevice = NULL; /* 570x softc */
+volatile PUM_DEVICE_BLOCK pUmDevice = NULL;
/* Used to pass the full-duplex flag, etc. */
-int line_speed[MAX_UNITS] = {0,0,0,0};
-static int full_duplex[MAX_UNITS] = {1,1,1,1};
-static int rx_flow_control[MAX_UNITS] = {0,0,0,0};
-static int tx_flow_control[MAX_UNITS] = {0,0,0,0};
-static int auto_flow_control[MAX_UNITS] = {0,0,0,0};
-static int tx_checksum[MAX_UNITS] = {1,1,1,1};
-static int rx_checksum[MAX_UNITS] = {1,1,1,1};
-static int auto_speed[MAX_UNITS] = {1,1,1,1};
+int line_speed[MAX_UNITS] = { 0, 0, 0, 0 };
+static int full_duplex[MAX_UNITS] = { 1, 1, 1, 1 };
+static int rx_flow_control[MAX_UNITS] = { 0, 0, 0, 0 };
+static int tx_flow_control[MAX_UNITS] = { 0, 0, 0, 0 };
+static int auto_flow_control[MAX_UNITS] = { 0, 0, 0, 0 };
+static int tx_checksum[MAX_UNITS] = { 1, 1, 1, 1 };
+static int rx_checksum[MAX_UNITS] = { 1, 1, 1, 1 };
+static int auto_speed[MAX_UNITS] = { 1, 1, 1, 1 };
#if JUMBO_FRAMES
/* Jumbo MTU for interfaces. */
-static int mtu[MAX_UNITS] = {0,0,0,0};
+static int mtu[MAX_UNITS] = { 0, 0, 0, 0 };
#endif
/* Turn on Wake-on lan for a device unit */
-static int enable_wol[MAX_UNITS] = {0,0,0,0};
+static int enable_wol[MAX_UNITS] = { 0, 0, 0, 0 };
#define TX_DESC_CNT DEFAULT_TX_PACKET_DESC_COUNT
static unsigned int tx_pkt_desc_cnt[MAX_UNITS] =
- {TX_DESC_CNT,TX_DESC_CNT,TX_DESC_CNT, TX_DESC_CNT};
+ { TX_DESC_CNT, TX_DESC_CNT, TX_DESC_CNT, TX_DESC_CNT };
#define RX_DESC_CNT DEFAULT_STD_RCV_DESC_COUNT
static unsigned int rx_std_desc_cnt[MAX_UNITS] =
- {RX_DESC_CNT,RX_DESC_CNT,RX_DESC_CNT,RX_DESC_CNT};
+ { RX_DESC_CNT, RX_DESC_CNT, RX_DESC_CNT, RX_DESC_CNT };
-static unsigned int rx_adaptive_coalesce[MAX_UNITS] = {1,1,1,1};
+static unsigned int rx_adaptive_coalesce[MAX_UNITS] = { 1, 1, 1, 1 };
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
#define JBO_DESC_CNT DEFAULT_JUMBO_RCV_DESC_COUNT
static unsigned int rx_jumbo_desc_cnt[MAX_UNITS] =
- {JBO_DESC_CNT, JBO_DESC_CNT, JBO_DESC_CNT, JBO_DESC_CNT};
+ { JBO_DESC_CNT, JBO_DESC_CNT, JBO_DESC_CNT, JBO_DESC_CNT };
#endif
#define RX_COAL_TK DEFAULT_RX_COALESCING_TICKS
static unsigned int rx_coalesce_ticks[MAX_UNITS] =
- {RX_COAL_TK, RX_COAL_TK, RX_COAL_TK, RX_COAL_TK};
+ { RX_COAL_TK, RX_COAL_TK, RX_COAL_TK, RX_COAL_TK };
#define RX_COAL_FM DEFAULT_RX_MAX_COALESCED_FRAMES
static unsigned int rx_max_coalesce_frames[MAX_UNITS] =
- {RX_COAL_FM, RX_COAL_FM, RX_COAL_FM, RX_COAL_FM};
+ { RX_COAL_FM, RX_COAL_FM, RX_COAL_FM, RX_COAL_FM };
#define TX_COAL_TK DEFAULT_TX_COALESCING_TICKS
static unsigned int tx_coalesce_ticks[MAX_UNITS] =
- {TX_COAL_TK, TX_COAL_TK, TX_COAL_TK, TX_COAL_TK};
+ { TX_COAL_TK, TX_COAL_TK, TX_COAL_TK, TX_COAL_TK };
#define TX_COAL_FM DEFAULT_TX_MAX_COALESCED_FRAMES
static unsigned int tx_max_coalesce_frames[MAX_UNITS] =
- {TX_COAL_FM, TX_COAL_FM, TX_COAL_FM, TX_COAL_FM};
+ { TX_COAL_FM, TX_COAL_FM, TX_COAL_FM, TX_COAL_FM };
#define ST_COAL_TK DEFAULT_STATS_COALESCING_TICKS
static unsigned int stats_coalesce_ticks[MAX_UNITS] =
- {ST_COAL_TK, ST_COAL_TK, ST_COAL_TK, ST_COAL_TK};
-
+ { ST_COAL_TK, ST_COAL_TK, ST_COAL_TK, ST_COAL_TK };
/*
* Legitimate values for BCM570x device types
@@ -134,707 +131,701 @@
/* Chip-Rev names for each device-type */
static struct {
- char* name;
+ char *name;
} chip_rev[] = {
- {"BCM5700VIGIL"},
- {"BCM5700A6"},
- {"BCM5700T6"},
- {"BCM5700A9"},
- {"BCM5700T9"},
- {"BCM5700"},
- {"BCM5701A5"},
- {"BCM5701T1"},
- {"BCM5701T8"},
- {"BCM5701A7"},
- {"BCM5701A10"},
- {"BCM5701A12"},
- {"BCM5701"},
- {"BCM5702"},
- {"BCM5703"},
- {"BCM5703A31"},
- {"TC996T"},
- {"TC996ST"},
- {"TC996SSX"},
- {"TC996SX"},
- {"TC996BT"},
- {"TC997T"},
- {"TC997SX"},
- {"TC1000T"},
- {"TC940BR01"},
- {"TC942BR01"},
- {"NC6770"},
- {"NC7760"},
- {"NC7770"},
- {"NC7780"},
- {0}
+ {
+ "BCM5700VIGIL"}, {
+ "BCM5700A6"}, {
+ "BCM5700T6"}, {
+ "BCM5700A9"}, {
+ "BCM5700T9"}, {
+ "BCM5700"}, {
+ "BCM5701A5"}, {
+ "BCM5701T1"}, {
+ "BCM5701T8"}, {
+ "BCM5701A7"}, {
+ "BCM5701A10"}, {
+ "BCM5701A12"}, {
+ "BCM5701"}, {
+ "BCM5702"}, {
+ "BCM5703"}, {
+ "BCM5703A31"}, {
+ "TC996T"}, {
+ "TC996ST"}, {
+ "TC996SSX"}, {
+ "TC996SX"}, {
+ "TC996BT"}, {
+ "TC997T"}, {
+ "TC997SX"}, {
+ "TC1000T"}, {
+ "TC940BR01"}, {
+ "TC942BR01"}, {
+ "NC6770"}, {
+ "NC7760"}, {
+ "NC7770"}, {
+ "NC7780"}, {
+ 0}
};
-
/* indexed by board_t, above */
static struct {
- char *name;
+ char *name;
} board_info[] = {
- { "Broadcom Vigil B5700 1000Base-T" },
- { "Broadcom BCM5700 1000Base-T" },
- { "Broadcom BCM5700 1000Base-SX" },
- { "Broadcom BCM5700 1000Base-SX" },
- { "Broadcom BCM5700 1000Base-T" },
- { "Broadcom BCM5700" },
- { "Broadcom BCM5701 1000Base-T" },
- { "Broadcom BCM5701 1000Base-T" },
- { "Broadcom BCM5701 1000Base-T" },
- { "Broadcom BCM5701 1000Base-SX" },
- { "Broadcom BCM5701 1000Base-T" },
- { "Broadcom BCM5701 1000Base-T" },
- { "Broadcom BCM5701" },
- { "Broadcom BCM5702 1000Base-T" },
- { "Broadcom BCM5703 1000Base-T" },
- { "Broadcom BCM5703 1000Base-SX" },
- { "3Com 3C996 10/100/1000 Server NIC" },
- { "3Com 3C996 10/100/1000 Server NIC" },
- { "3Com 3C996 Gigabit Fiber-SX Server NIC" },
- { "3Com 3C996 Gigabit Fiber-SX Server NIC" },
- { "3Com 3C996B Gigabit Server NIC" },
- { "3Com 3C997 Gigabit Server NIC" },
- { "3Com 3C997 Gigabit Fiber-SX Server NIC" },
- { "3Com 3C1000 Gigabit NIC" },
- { "3Com 3C940 Gigabit LOM (21X21)" },
- { "3Com 3C942 Gigabit LOM (31X31)" },
- { "Compaq NC6770 Gigabit Server Adapter" },
- { "Compaq NC7760 Gigabit Server Adapter" },
- { "Compaq NC7770 Gigabit Server Adapter" },
- { "Compaq NC7780 Gigabit Server Adapter" },
- { 0 },
-};
+ {
+ "Broadcom Vigil B5700 1000Base-T"}, {
+ "Broadcom BCM5700 1000Base-T"}, {
+ "Broadcom BCM5700 1000Base-SX"}, {
+ "Broadcom BCM5700 1000Base-SX"}, {
+ "Broadcom BCM5700 1000Base-T"}, {
+ "Broadcom BCM5700"}, {
+ "Broadcom BCM5701 1000Base-T"}, {
+ "Broadcom BCM5701 1000Base-T"}, {
+ "Broadcom BCM5701 1000Base-T"}, {
+ "Broadcom BCM5701 1000Base-SX"}, {
+ "Broadcom BCM5701 1000Base-T"}, {
+ "Broadcom BCM5701 1000Base-T"}, {
+ "Broadcom BCM5701"}, {
+ "Broadcom BCM5702 1000Base-T"}, {
+ "Broadcom BCM5703 1000Base-T"}, {
+ "Broadcom BCM5703 1000Base-SX"}, {
+ "3Com 3C996 10/100/1000 Server NIC"}, {
+ "3Com 3C996 10/100/1000 Server NIC"}, {
+ "3Com 3C996 Gigabit Fiber-SX Server NIC"}, {
+ "3Com 3C996 Gigabit Fiber-SX Server NIC"}, {
+ "3Com 3C996B Gigabit Server NIC"}, {
+ "3Com 3C997 Gigabit Server NIC"}, {
+ "3Com 3C997 Gigabit Fiber-SX Server NIC"}, {
+ "3Com 3C1000 Gigabit NIC"}, {
+ "3Com 3C940 Gigabit LOM (21X21)"}, {
+ "3Com 3C942 Gigabit LOM (31X31)"}, {
+ "Compaq NC6770 Gigabit Server Adapter"}, {
+ "Compaq NC7760 Gigabit Server Adapter"}, {
+ "Compaq NC7770 Gigabit Server Adapter"}, {
+ "Compaq NC7780 Gigabit Server Adapter"}, {
+0},};
/* PCI Devices which use the 570x chipset */
struct pci_device_table {
- unsigned short vendor_id, device_id; /* Vendor/DeviceID */
- unsigned short subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */
- unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */
- unsigned long board_id; /* Data private to the driver */
- int io_size, min_latency;
+ unsigned short vendor_id, device_id; /* Vendor/DeviceID */
+ unsigned short subvendor, subdevice; /* Subsystem ID's or PCI_ANY_ID */
+ unsigned int class, class_mask; /* (class,subclass,prog-if) triplet */
+ unsigned long board_id; /* Data private to the driver */
+ int io_size, min_latency;
} bcm570xDevices[] = {
- {0x14e4, 0x1644, 0x1014, 0x0277, 0, 0, BCM5700VIGIL ,128,32},
- {0x14e4, 0x1644, 0x14e4, 0x1644, 0, 0, BCM5700A6 ,128,32},
- {0x14e4, 0x1644, 0x14e4, 0x2, 0, 0, BCM5700T6 ,128,32},
- {0x14e4, 0x1644, 0x14e4, 0x3, 0, 0, BCM5700A9 ,128,32},
- {0x14e4, 0x1644, 0x14e4, 0x4, 0, 0, BCM5700T9 ,128,32},
- {0x14e4, 0x1644, 0x1028, 0xd1, 0, 0, BCM5700 ,128,32},
- {0x14e4, 0x1644, 0x1028, 0x0106, 0, 0, BCM5700 ,128,32},
- {0x14e4, 0x1644, 0x1028, 0x0109, 0, 0, BCM5700 ,128,32},
- {0x14e4, 0x1644, 0x1028, 0x010a, 0, 0, BCM5700 ,128,32},
- {0x14e4, 0x1644, 0x10b7, 0x1000, 0, 0, TC996T ,128,32},
- {0x14e4, 0x1644, 0x10b7, 0x1001, 0, 0, TC996ST ,128,32},
- {0x14e4, 0x1644, 0x10b7, 0x1002, 0, 0, TC996SSX ,128,32},
- {0x14e4, 0x1644, 0x10b7, 0x1003, 0, 0, TC997T ,128,32},
- {0x14e4, 0x1644, 0x10b7, 0x1005, 0, 0, TC997SX ,128,32},
- {0x14e4, 0x1644, 0x10b7, 0x1008, 0, 0, TC942BR01 ,128,32},
- {0x14e4, 0x1644, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5700 ,128,32},
- {0x14e4, 0x1645, 0x14e4, 1, 0, 0, BCM5701A5 ,128,32},
- {0x14e4, 0x1645, 0x14e4, 5, 0, 0, BCM5701T1 ,128,32},
- {0x14e4, 0x1645, 0x14e4, 6, 0, 0, BCM5701T8 ,128,32},
- {0x14e4, 0x1645, 0x14e4, 7, 0, 0, BCM5701A7 ,128,32},
- {0x14e4, 0x1645, 0x14e4, 8, 0, 0, BCM5701A10 ,128,32},
- {0x14e4, 0x1645, 0x14e4, 0x8008, 0, 0, BCM5701A12 ,128,32},
- {0x14e4, 0x1645, 0x0e11, 0xc1, 0, 0, NC6770 ,128,32},
- {0x14e4, 0x1645, 0x0e11, 0x7c, 0, 0, NC7770 ,128,32},
- {0x14e4, 0x1645, 0x0e11, 0x85, 0, 0, NC7780 ,128,32},
- {0x14e4, 0x1645, 0x1028, 0x0121, 0, 0, BCM5701 ,128,32},
- {0x14e4, 0x1645, 0x10b7, 0x1004, 0, 0, TC996SX ,128,32},
- {0x14e4, 0x1645, 0x10b7, 0x1006, 0, 0, TC996BT ,128,32},
- {0x14e4, 0x1645, 0x10b7, 0x1007, 0, 0, TC1000T ,128,32},
- {0x14e4, 0x1645, 0x10b7, 0x1008, 0, 0, TC940BR01 ,128,32},
- {0x14e4, 0x1645, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5701 ,128,32},
- {0x14e4, 0x1646, 0x14e4, 0x8009, 0, 0, BCM5702 ,128,32},
- {0x14e4, 0x1646, 0x0e11, 0xbb, 0, 0, NC7760 ,128,32},
- {0x14e4, 0x1646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5702 ,128,32},
- {0x14e4, 0x16a6, 0x14e4, 0x8009, 0, 0, BCM5702 ,128,32},
- {0x14e4, 0x16a6, 0x0e11, 0xbb, 0, 0, NC7760 ,128,32},
- {0x14e4, 0x16a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5702 ,128,32},
- {0x14e4, 0x1647, 0x14e4, 0x0009, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x1647, 0x14e4, 0x000a, 0, 0, BCM5703A31 ,128,32},
- {0x14e4, 0x1647, 0x14e4, 0x000b, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x1647, 0x14e4, 0x800a, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x1647, 0x0e11, 0x9a, 0, 0, NC7770 ,128,32},
- {0x14e4, 0x1647, 0x0e11, 0x99, 0, 0, NC7780 ,128,32},
- {0x14e4, 0x1647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x16a7, 0x14e4, 0x0009, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x16a7, 0x14e4, 0x000a, 0, 0, BCM5703A31 ,128,32},
- {0x14e4, 0x16a7, 0x14e4, 0x000b, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x16a7, 0x14e4, 0x800a, 0, 0, BCM5703 ,128,32},
- {0x14e4, 0x16a7, 0x0e11, 0x9a, 0, 0, NC7770 ,128,32},
- {0x14e4, 0x16a7, 0x0e11, 0x99, 0, 0, NC7780 ,128,32},
- {0x14e4, 0x16a7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5703 ,128,32}
+ {
+ 0x14e4, 0x1644, 0x1014, 0x0277, 0, 0, BCM5700VIGIL, 128, 32}, {
+ 0x14e4, 0x1644, 0x14e4, 0x1644, 0, 0, BCM5700A6, 128, 32}, {
+ 0x14e4, 0x1644, 0x14e4, 0x2, 0, 0, BCM5700T6, 128, 32}, {
+ 0x14e4, 0x1644, 0x14e4, 0x3, 0, 0, BCM5700A9, 128, 32}, {
+ 0x14e4, 0x1644, 0x14e4, 0x4, 0, 0, BCM5700T9, 128, 32}, {
+ 0x14e4, 0x1644, 0x1028, 0xd1, 0, 0, BCM5700, 128, 32}, {
+ 0x14e4, 0x1644, 0x1028, 0x0106, 0, 0, BCM5700, 128, 32}, {
+ 0x14e4, 0x1644, 0x1028, 0x0109, 0, 0, BCM5700, 128, 32}, {
+ 0x14e4, 0x1644, 0x1028, 0x010a, 0, 0, BCM5700, 128, 32}, {
+ 0x14e4, 0x1644, 0x10b7, 0x1000, 0, 0, TC996T, 128, 32}, {
+ 0x14e4, 0x1644, 0x10b7, 0x1001, 0, 0, TC996ST, 128, 32}, {
+ 0x14e4, 0x1644, 0x10b7, 0x1002, 0, 0, TC996SSX, 128, 32}, {
+ 0x14e4, 0x1644, 0x10b7, 0x1003, 0, 0, TC997T, 128, 32}, {
+ 0x14e4, 0x1644, 0x10b7, 0x1005, 0, 0, TC997SX, 128, 32}, {
+ 0x14e4, 0x1644, 0x10b7, 0x1008, 0, 0, TC942BR01, 128, 32}, {
+ 0x14e4, 0x1644, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5700, 128, 32}, {
+ 0x14e4, 0x1645, 0x14e4, 1, 0, 0, BCM5701A5, 128, 32}, {
+ 0x14e4, 0x1645, 0x14e4, 5, 0, 0, BCM5701T1, 128, 32}, {
+ 0x14e4, 0x1645, 0x14e4, 6, 0, 0, BCM5701T8, 128, 32}, {
+ 0x14e4, 0x1645, 0x14e4, 7, 0, 0, BCM5701A7, 128, 32}, {
+ 0x14e4, 0x1645, 0x14e4, 8, 0, 0, BCM5701A10, 128, 32}, {
+ 0x14e4, 0x1645, 0x14e4, 0x8008, 0, 0, BCM5701A12, 128, 32}, {
+ 0x14e4, 0x1645, 0x0e11, 0xc1, 0, 0, NC6770, 128, 32}, {
+ 0x14e4, 0x1645, 0x0e11, 0x7c, 0, 0, NC7770, 128, 32}, {
+ 0x14e4, 0x1645, 0x0e11, 0x85, 0, 0, NC7780, 128, 32}, {
+ 0x14e4, 0x1645, 0x1028, 0x0121, 0, 0, BCM5701, 128, 32}, {
+ 0x14e4, 0x1645, 0x10b7, 0x1004, 0, 0, TC996SX, 128, 32}, {
+ 0x14e4, 0x1645, 0x10b7, 0x1006, 0, 0, TC996BT, 128, 32}, {
+ 0x14e4, 0x1645, 0x10b7, 0x1007, 0, 0, TC1000T, 128, 32}, {
+ 0x14e4, 0x1645, 0x10b7, 0x1008, 0, 0, TC940BR01, 128, 32}, {
+ 0x14e4, 0x1645, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5701, 128, 32}, {
+ 0x14e4, 0x1646, 0x14e4, 0x8009, 0, 0, BCM5702, 128, 32}, {
+ 0x14e4, 0x1646, 0x0e11, 0xbb, 0, 0, NC7760, 128, 32}, {
+ 0x14e4, 0x1646, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5702, 128, 32}, {
+ 0x14e4, 0x16a6, 0x14e4, 0x8009, 0, 0, BCM5702, 128, 32}, {
+ 0x14e4, 0x16a6, 0x0e11, 0xbb, 0, 0, NC7760, 128, 32}, {
+ 0x14e4, 0x16a6, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5702, 128, 32}, {
+ 0x14e4, 0x1647, 0x14e4, 0x0009, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x1647, 0x14e4, 0x000a, 0, 0, BCM5703A31, 128, 32}, {
+ 0x14e4, 0x1647, 0x14e4, 0x000b, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x1647, 0x14e4, 0x800a, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x1647, 0x0e11, 0x9a, 0, 0, NC7770, 128, 32}, {
+ 0x14e4, 0x1647, 0x0e11, 0x99, 0, 0, NC7780, 128, 32}, {
+ 0x14e4, 0x1647, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x16a7, 0x14e4, 0x0009, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x16a7, 0x14e4, 0x000a, 0, 0, BCM5703A31, 128, 32}, {
+ 0x14e4, 0x16a7, 0x14e4, 0x000b, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x16a7, 0x14e4, 0x800a, 0, 0, BCM5703, 128, 32}, {
+ 0x14e4, 0x16a7, 0x0e11, 0x9a, 0, 0, NC7770, 128, 32}, {
+ 0x14e4, 0x16a7, 0x0e11, 0x99, 0, 0, NC7780, 128, 32}, {
+ 0x14e4, 0x16a7, PCI_ANY_ID, PCI_ANY_ID, 0, 0, BCM5703, 128, 32}
};
#define n570xDevices (sizeof(bcm570xDevices)/sizeof(bcm570xDevices[0]))
-
/*
* Allocate a packet buffer from the bcm570x packet pool.
*/
-void *
-bcm570xPktAlloc(int u, int pksize)
+void *bcm570xPktAlloc (int u, int pksize)
{
- return malloc(pksize);
+ return malloc (pksize);
}
/*
* Free a packet previously allocated from the bcm570x packet
* buffer pool.
*/
-void
-bcm570xPktFree(int u, void *p)
+void bcm570xPktFree (int u, void *p)
{
- free(p);
+ free (p);
}
-int
-bcm570xReplenishRxBuffers(PUM_DEVICE_BLOCK pUmDevice)
+int bcm570xReplenishRxBuffers (PUM_DEVICE_BLOCK pUmDevice)
{
- PLM_PACKET pPacket;
- PUM_PACKET pUmPacket;
- void *skb;
- int queue_rx = 0;
- int ret = 0;
+ PLM_PACKET pPacket;
+ PUM_PACKET pUmPacket;
+ void *skb;
+ int queue_rx = 0;
+ int ret = 0;
- while ((pUmPacket = (PUM_PACKET)
- QQ_PopHead(&pUmDevice->rx_out_of_buf_q.Container)) != 0) {
+ while ((pUmPacket = (PUM_PACKET)
+ QQ_PopHead (&pUmDevice->rx_out_of_buf_q.Container)) != 0) {
- pPacket = (PLM_PACKET) pUmPacket;
+ pPacket = (PLM_PACKET) pUmPacket;
- /* reuse an old skb */
- if (pUmPacket->skbuff) {
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
- queue_rx = 1;
- continue;
- }
- if ( ( skb = bcm570xPktAlloc(pUmDevice->index,
- pPacket->u.Rx.RxBufferSize + 2)) == 0) {
- QQ_PushHead(&pUmDevice->rx_out_of_buf_q.Container,pPacket);
- printf("NOTICE: Out of RX memory.\n");
- ret = 1;
- break;
+ /* reuse an old skb */
+ if (pUmPacket->skbuff) {
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container,
+ pPacket);
+ queue_rx = 1;
+ continue;
+ }
+ if ((skb = bcm570xPktAlloc (pUmDevice->index,
+ pPacket->u.Rx.RxBufferSize + 2)) ==
+ 0) {
+ QQ_PushHead (&pUmDevice->rx_out_of_buf_q.Container,
+ pPacket);
+ printf ("NOTICE: Out of RX memory.\n");
+ ret = 1;
+ break;
+ }
+
+ pUmPacket->skbuff = skb;
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
+ queue_rx = 1;
}
- pUmPacket->skbuff = skb;
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
- queue_rx = 1;
- }
+ if (queue_rx) {
+ LM_QueueRxPackets (pDevice);
+ }
- if (queue_rx) {
- LM_QueueRxPackets(pDevice);
- }
-
- return ret;
+ return ret;
}
/*
* Probe, Map, and Init 570x device.
*/
-int eth_init(bd_t *bis)
+int eth_init (bd_t * bis)
{
- int i, rv, devFound = FALSE;
- pci_dev_t devbusfn;
- unsigned short status;
+ int i, rv, devFound = FALSE;
+ pci_dev_t devbusfn;
+ unsigned short status;
- /* Find PCI device, if it exists, configure ... */
- for( i = 0; i < n570xDevices; i++){
- devbusfn = pci_find_device(bcm570xDevices[i].vendor_id,
- bcm570xDevices[i].device_id, 0);
- if(devbusfn == -1) {
- continue; /* No device of that vendor/device ID */
+ /* Find PCI device, if it exists, configure ... */
+ for (i = 0; i < n570xDevices; i++) {
+ devbusfn = pci_find_device (bcm570xDevices[i].vendor_id,
+ bcm570xDevices[i].device_id, 0);
+ if (devbusfn == -1) {
+ continue; /* No device of that vendor/device ID */
+ } else {
+
+ /* Set ILINE */
+ pci_write_config_byte (devbusfn,
+ PCI_INTERRUPT_LINE,
+ BCM570X_ILINE);
+
+ /*
+ * 0x10 - 0x14 define one 64-bit MBAR.
+ * 0x14 is the higher-order address bits of the BAR.
+ */
+ pci_write_config_dword (devbusfn,
+ PCI_BASE_ADDRESS_1, 0);
+
+ ioBase = BCM570X_MBAR;
+
+ pci_write_config_dword (devbusfn,
+ PCI_BASE_ADDRESS_0, ioBase);
+
+ /*
+ * Enable PCI memory, IO, and Master -- don't
+ * reset any status bits in doing so.
+ */
+ pci_read_config_word (devbusfn, PCI_COMMAND, &status);
+
+ status |= PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
+
+ pci_write_config_word (devbusfn, PCI_COMMAND, status);
+
+ printf
+ ("\n%s: bus %d, device %d, function %d: MBAR=0x%x\n",
+ board_info[bcm570xDevices[i].board_id].name,
+ PCI_BUS (devbusfn), PCI_DEV (devbusfn),
+ PCI_FUNC (devbusfn), ioBase);
+
+ /* Allocate once, but always clear on init */
+ if (!pDevice) {
+ pDevice = malloc (sizeof (UM_DEVICE_BLOCK));
+ pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ memset (pDevice, 0x0, sizeof (UM_DEVICE_BLOCK));
+ }
+
+ /* Configure pci dev structure */
+ pUmDevice->pdev = devbusfn;
+ pUmDevice->index = 0;
+ pUmDevice->tx_pkt = 0;
+ pUmDevice->rx_pkt = 0;
+ devFound = TRUE;
+ break;
+ }
+ }
+
+ if (!devFound) {
+ printf
+ ("eth_init: FAILURE: no BCM570x Ethernet devices found.\n");
+ return -1;
+ }
+
+ /* Setup defaults for chip */
+ pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE;
+
+ if (pDevice->ChipRevId == T3_CHIP_ID_5700_B0) {
+ pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE;
} else {
- /* Set ILINE */
- pci_write_config_byte(devbusfn,
- PCI_INTERRUPT_LINE, BCM570X_ILINE);
+ if (rx_checksum[i]) {
+ pDevice->TaskToOffload |=
+ LM_TASK_OFFLOAD_RX_TCP_CHECKSUM |
+ LM_TASK_OFFLOAD_RX_UDP_CHECKSUM;
+ }
- /*
- * 0x10 - 0x14 define one 64-bit MBAR.
- * 0x14 is the higher-order address bits of the BAR.
- */
- pci_write_config_dword(devbusfn,
- PCI_BASE_ADDRESS_1, 0);
-
- ioBase = BCM570X_MBAR;
-
- pci_write_config_dword(devbusfn,
- PCI_BASE_ADDRESS_0, ioBase);
-
- /*
- * Enable PCI memory, IO, and Master -- don't
- * reset any status bits in doing so.
- */
- pci_read_config_word(devbusfn,
- PCI_COMMAND, &status);
-
- status |= PCI_COMMAND_MEMORY|PCI_COMMAND_MASTER;
-
- pci_write_config_word(devbusfn,
- PCI_COMMAND, status);
-
- printf("\n%s: bus %d, device %d, function %d: MBAR=0x%x\n",
- board_info[bcm570xDevices[i].board_id].name,
- PCI_BUS(devbusfn),
- PCI_DEV(devbusfn),
- PCI_FUNC(devbusfn),
- ioBase);
-
- /* Allocate once, but always clear on init */
- if (!pDevice) {
- pDevice = malloc(sizeof(UM_DEVICE_BLOCK));
- pUmDevice = (PUM_DEVICE_BLOCK)pDevice;
- memset(pDevice, 0x0, sizeof(UM_DEVICE_BLOCK));
- }
-
- /* Configure pci dev structure */
- pUmDevice->pdev = devbusfn;
- pUmDevice->index = 0;
- pUmDevice->tx_pkt = 0;
- pUmDevice->rx_pkt = 0;
- devFound = TRUE;
- break;
- }
- }
-
- if(!devFound){
- printf("eth_init: FAILURE: no BCM570x Ethernet devices found.\n");
- return -1;
- }
-
- /* Setup defaults for chip */
- pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE;
-
- if (pDevice->ChipRevId == T3_CHIP_ID_5700_B0) {
- pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE;
- } else {
-
- if (rx_checksum[i]) {
- pDevice->TaskToOffload |=
- LM_TASK_OFFLOAD_RX_TCP_CHECKSUM |
- LM_TASK_OFFLOAD_RX_UDP_CHECKSUM;
+ if (tx_checksum[i]) {
+ pDevice->TaskToOffload |=
+ LM_TASK_OFFLOAD_TX_TCP_CHECKSUM |
+ LM_TASK_OFFLOAD_TX_UDP_CHECKSUM;
+ pDevice->NoTxPseudoHdrChksum = TRUE;
+ }
}
- if (tx_checksum[i]) {
- pDevice->TaskToOffload |=
- LM_TASK_OFFLOAD_TX_TCP_CHECKSUM |
- LM_TASK_OFFLOAD_TX_UDP_CHECKSUM;
- pDevice->NoTxPseudoHdrChksum = TRUE;
+ /* Set Device PCI Memory base address */
+ pDevice->pMappedMemBase = (PLM_UINT8) ioBase;
+
+ /* Pull down adapter info */
+ if ((rv = LM_GetAdapterInfo (pDevice)) != LM_STATUS_SUCCESS) {
+ printf ("bcm570xEnd: LM_GetAdapterInfo failed: rv=%d!\n", rv);
+ return -2;
}
- }
- /* Set Device PCI Memory base address */
- pDevice->pMappedMemBase = (PLM_UINT8) ioBase;
+ /* Lock not needed */
+ pUmDevice->do_global_lock = 0;
- /* Pull down adapter info */
- if ((rv = LM_GetAdapterInfo(pDevice)) != LM_STATUS_SUCCESS) {
- printf("bcm570xEnd: LM_GetAdapterInfo failed: rv=%d!\n", rv );
- return -2;
- }
+ if (T3_ASIC_REV (pUmDevice->lm_dev.ChipRevId) == T3_ASIC_REV_5700) {
+ /* The 5700 chip works best without interleaved register */
+ /* accesses on certain machines. */
+ pUmDevice->do_global_lock = 1;
+ }
- /* Lock not needed */
- pUmDevice->do_global_lock = 0;
+ /* Setup timer delays */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ pDevice->UseTaggedStatus = TRUE;
+ pUmDevice->timer_interval = CFG_HZ;
+ } else {
+ pUmDevice->timer_interval = CFG_HZ / 50;
+ }
- if (T3_ASIC_REV(pUmDevice->lm_dev.ChipRevId) == T3_ASIC_REV_5700) {
- /* The 5700 chip works best without interleaved register */
- /* accesses on certain machines. */
- pUmDevice->do_global_lock = 1;
- }
+ /* Grab name .... */
+ pUmDevice->name =
+ (char *)malloc (strlen (board_info[bcm570xDevices[i].board_id].name)
+ + 1);
+ strcpy (pUmDevice->name, board_info[bcm570xDevices[i].board_id].name);
- /* Setup timer delays */
- if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) {
- pDevice->UseTaggedStatus = TRUE;
- pUmDevice->timer_interval = CFG_HZ;
- }
- else {
- pUmDevice->timer_interval = CFG_HZ / 50;
- }
+ memcpy (pDevice->NodeAddress, bis->bi_enetaddr, 6);
+ LM_SetMacAddress (pDevice, bis->bi_enetaddr);
+ /* Init queues .. */
+ QQ_InitQueue (&pUmDevice->rx_out_of_buf_q.Container,
+ MAX_RX_PACKET_DESC_COUNT);
+ pUmDevice->rx_last_cnt = pUmDevice->tx_last_cnt = 0;
- /* Grab name .... */
- pUmDevice->name =
- (char*)malloc(strlen(board_info[bcm570xDevices[i].board_id].name)+1);
- strcpy(pUmDevice->name,board_info[bcm570xDevices[i].board_id].name);
+ /* delay for 4 seconds */
+ pUmDevice->delayed_link_ind = (4 * CFG_HZ) / pUmDevice->timer_interval;
- memcpy(pDevice->NodeAddress, bis->bi_enetaddr, 6);
- LM_SetMacAddress(pDevice, bis->bi_enetaddr);
- /* Init queues .. */
- QQ_InitQueue(&pUmDevice->rx_out_of_buf_q.Container,
- MAX_RX_PACKET_DESC_COUNT);
- pUmDevice->rx_last_cnt = pUmDevice->tx_last_cnt = 0;
+ pUmDevice->adaptive_expiry = CFG_HZ / pUmDevice->timer_interval;
- /* delay for 4 seconds */
- pUmDevice->delayed_link_ind =
- (4 * CFG_HZ) / pUmDevice->timer_interval;
+ /* Sometimes we get spurious ints. after reset when link is down. */
+ /* This field tells the isr to service the int. even if there is */
+ /* no status block update. */
+ pUmDevice->adapter_just_inited =
+ (3 * CFG_HZ) / pUmDevice->timer_interval;
- pUmDevice->adaptive_expiry =
- CFG_HZ / pUmDevice->timer_interval;
+ /* Initialize 570x */
+ if (LM_InitializeAdapter (pDevice) != LM_STATUS_SUCCESS) {
+ printf ("ERROR: Adapter initialization failed.\n");
+ return ERROR;
+ }
- /* Sometimes we get spurious ints. after reset when link is down. */
- /* This field tells the isr to service the int. even if there is */
- /* no status block update. */
- pUmDevice->adapter_just_inited =
- (3 * CFG_HZ) / pUmDevice->timer_interval;
+ /* Enable chip ISR */
+ LM_EnableInterrupt (pDevice);
- /* Initialize 570x */
- if (LM_InitializeAdapter(pDevice) != LM_STATUS_SUCCESS) {
- printf("ERROR: Adapter initialization failed.\n");
- return ERROR;
- }
+ /* Clear MC table */
+ LM_MulticastClear (pDevice);
- /* Enable chip ISR */
- LM_EnableInterrupt(pDevice);
+ /* Enable Multicast */
+ LM_SetReceiveMask (pDevice,
+ pDevice->ReceiveMask | LM_ACCEPT_ALL_MULTICAST);
- /* Clear MC table */
- LM_MulticastClear(pDevice);
+ pUmDevice->opened = 1;
+ pUmDevice->tx_full = 0;
+ pUmDevice->tx_pkt = 0;
+ pUmDevice->rx_pkt = 0;
+ printf ("eth%d: %s @0x%lx,",
+ pDevice->index, pUmDevice->name, (unsigned long)ioBase);
+ printf ("node addr ");
+ for (i = 0; i < 6; i++) {
+ printf ("%2.2x", pDevice->NodeAddress[i]);
+ }
+ printf ("\n");
- /* Enable Multicast */
- LM_SetReceiveMask(pDevice,
- pDevice->ReceiveMask | LM_ACCEPT_ALL_MULTICAST);
+ printf ("eth%d: ", pDevice->index);
+ printf ("%s with ", chip_rev[bcm570xDevices[i].board_id].name);
- pUmDevice->opened = 1;
- pUmDevice->tx_full = 0;
- pUmDevice->tx_pkt = 0;
- pUmDevice->rx_pkt = 0;
- printf("eth%d: %s @0x%lx,",
- pDevice->index, pUmDevice->name, (unsigned long)ioBase);
- printf( "node addr ");
- for (i = 0; i < 6; i++) {
- printf("%2.2x", pDevice->NodeAddress[i]);
- }
- printf("\n");
+ if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5400_PHY_ID)
+ printf ("Broadcom BCM5400 Copper ");
+ else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID)
+ printf ("Broadcom BCM5401 Copper ");
+ else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5411_PHY_ID)
+ printf ("Broadcom BCM5411 Copper ");
+ else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5701_PHY_ID)
+ printf ("Broadcom BCM5701 Integrated Copper ");
+ else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5703_PHY_ID)
+ printf ("Broadcom BCM5703 Integrated Copper ");
+ else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM8002_PHY_ID)
+ printf ("Broadcom BCM8002 SerDes ");
+ else if (pDevice->EnableTbi)
+ printf ("Agilent HDMP-1636 SerDes ");
+ else
+ printf ("Unknown ");
+ printf ("transceiver found\n");
- printf("eth%d: ", pDevice->index);
- printf("%s with ",
- chip_rev[bcm570xDevices[i].board_id].name);
+ printf ("eth%d: %s, MTU: %d,",
+ pDevice->index, pDevice->BusSpeedStr, 1500);
- if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5400_PHY_ID)
- printf("Broadcom BCM5400 Copper ");
- else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID)
- printf("Broadcom BCM5401 Copper ");
- else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5411_PHY_ID)
- printf("Broadcom BCM5411 Copper ");
- else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5701_PHY_ID)
- printf("Broadcom BCM5701 Integrated Copper ");
- else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5703_PHY_ID)
- printf("Broadcom BCM5703 Integrated Copper ");
- else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM8002_PHY_ID)
- printf("Broadcom BCM8002 SerDes ");
- else if (pDevice->EnableTbi)
- printf("Agilent HDMP-1636 SerDes ");
- else
- printf("Unknown ");
- printf("transceiver found\n");
+ if ((pDevice->ChipRevId != T3_CHIP_ID_5700_B0) && rx_checksum[i])
+ printf ("Rx Checksum ON\n");
+ else
+ printf ("Rx Checksum OFF\n");
+ initialized++;
- printf("eth%d: %s, MTU: %d,",
- pDevice->index, pDevice->BusSpeedStr, 1500);
-
- if ((pDevice->ChipRevId != T3_CHIP_ID_5700_B0) &&
- rx_checksum[i])
- printf("Rx Checksum ON\n");
- else
- printf("Rx Checksum OFF\n");
- initialized++;
-
- return 0;
+ return 0;
}
/* Ethernet Interrupt service routine */
-void
-eth_isr(void)
+void eth_isr (void)
{
- LM_UINT32 oldtag, newtag;
- int i;
+ LM_UINT32 oldtag, newtag;
+ int i;
- pUmDevice->interrupt = 1;
+ pUmDevice->interrupt = 1;
- if (pDevice->UseTaggedStatus) {
- if ((pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) ||
- pUmDevice->adapter_just_inited) {
- MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 1);
- oldtag = pDevice->pStatusBlkVirt->StatusTag;
+ if (pDevice->UseTaggedStatus) {
+ if ((pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) ||
+ pUmDevice->adapter_just_inited) {
+ MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 1);
+ oldtag = pDevice->pStatusBlkVirt->StatusTag;
- for (i = 0; ; i++) {
- pDevice->pStatusBlkVirt->Status &= ~STATUS_BLOCK_UPDATED;
- LM_ServiceInterrupts(pDevice);
- newtag = pDevice->pStatusBlkVirt->StatusTag;
- if ((newtag == oldtag) || (i > 50)) {
- MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, newtag << 24);
- if (pDevice->UndiFix) {
- REG_WR(pDevice, Grc.LocalCtrl,
- pDevice->GrcLocalCtrl | 0x2);
- }
- break;
- }
- oldtag = newtag;
- }
+ for (i = 0;; i++) {
+ pDevice->pStatusBlkVirt->Status &=
+ ~STATUS_BLOCK_UPDATED;
+ LM_ServiceInterrupts (pDevice);
+ newtag = pDevice->pStatusBlkVirt->StatusTag;
+ if ((newtag == oldtag) || (i > 50)) {
+ MB_REG_WR (pDevice,
+ Mailbox.Interrupt[0].Low,
+ newtag << 24);
+ if (pDevice->UndiFix) {
+ REG_WR (pDevice, Grc.LocalCtrl,
+ pDevice->
+ GrcLocalCtrl | 0x2);
+ }
+ break;
+ }
+ oldtag = newtag;
+ }
+ }
+ } else {
+ while (pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) {
+ unsigned int dummy;
+
+ pDevice->pMemView->Mailbox.Interrupt[0].Low = 1;
+ pDevice->pStatusBlkVirt->Status &=
+ ~STATUS_BLOCK_UPDATED;
+ LM_ServiceInterrupts (pDevice);
+ pDevice->pMemView->Mailbox.Interrupt[0].Low = 0;
+ dummy = pDevice->pMemView->Mailbox.Interrupt[0].Low;
+ }
}
- }
- else {
- while (pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) {
- unsigned int dummy;
- pDevice->pMemView->Mailbox.Interrupt[0].Low = 1;
- pDevice->pStatusBlkVirt->Status &= ~STATUS_BLOCK_UPDATED;
- LM_ServiceInterrupts(pDevice);
- pDevice->pMemView->Mailbox.Interrupt[0].Low = 0;
- dummy = pDevice->pMemView->Mailbox.Interrupt[0].Low;
+ /* Allocate new RX buffers */
+ if (QQ_GetEntryCnt (&pUmDevice->rx_out_of_buf_q.Container)) {
+ bcm570xReplenishRxBuffers (pUmDevice);
}
- }
- /* Allocate new RX buffers */
- if (QQ_GetEntryCnt(&pUmDevice->rx_out_of_buf_q.Container)) {
- bcm570xReplenishRxBuffers(pUmDevice);
- }
-
- /* Queue packets */
- if (QQ_GetEntryCnt(&pDevice->RxPacketFreeQ.Container)) {
- LM_QueueRxPackets(pDevice);
- }
-
- if (pUmDevice->tx_queued) {
- pUmDevice->tx_queued = 0;
- }
-
- if(pUmDevice->tx_full){
- if(pDevice->LinkStatus != LM_STATUS_LINK_DOWN){
- printf("NOTICE: tx was previously blocked, restarting MUX\n");
- pUmDevice->tx_full = 0;
+ /* Queue packets */
+ if (QQ_GetEntryCnt (&pDevice->RxPacketFreeQ.Container)) {
+ LM_QueueRxPackets (pDevice);
}
- }
- pUmDevice->interrupt = 0;
+ if (pUmDevice->tx_queued) {
+ pUmDevice->tx_queued = 0;
+ }
+
+ if (pUmDevice->tx_full) {
+ if (pDevice->LinkStatus != LM_STATUS_LINK_DOWN) {
+ printf
+ ("NOTICE: tx was previously blocked, restarting MUX\n");
+ pUmDevice->tx_full = 0;
+ }
+ }
+
+ pUmDevice->interrupt = 0;
}
-int
-eth_send(volatile void *packet, int length)
+int eth_send (volatile void *packet, int length)
{
- int status = 0;
+ int status = 0;
#if ET_DEBUG
- unsigned char* ptr = (unsigned char*)packet;
+ unsigned char *ptr = (unsigned char *)packet;
#endif
- PLM_PACKET pPacket;
- PUM_PACKET pUmPacket;
+ PLM_PACKET pPacket;
+ PUM_PACKET pUmPacket;
- /* Link down, return */
- while(pDevice->LinkStatus == LM_STATUS_LINK_DOWN) {
+ /* Link down, return */
+ while (pDevice->LinkStatus == LM_STATUS_LINK_DOWN) {
#if 0
- printf("eth%d: link down - check cable or link partner.\n",
- pUmDevice->index);
+ printf ("eth%d: link down - check cable or link partner.\n",
+ pUmDevice->index);
#endif
- eth_isr();
+ eth_isr ();
- /* Wait to see link for one-half a second before sending ... */
- udelay(1500000);
+ /* Wait to see link for one-half a second before sending ... */
+ udelay (1500000);
- }
-
- /* Clear sent flag */
- pUmDevice->tx_pkt = 0;
-
- /* Previously blocked */
- if(pUmDevice->tx_full){
- printf("eth%d: tx blocked.\n", pUmDevice->index);
- return 0;
- }
-
- pPacket = (PLM_PACKET)
- QQ_PopHead(&pDevice->TxPacketFreeQ.Container);
-
- if (pPacket == 0) {
- pUmDevice->tx_full = 1;
- printf("bcm570xEndSend: TX full!\n");
- return 0;
- }
-
- if (pDevice->SendBdLeft.counter == 0) {
- pUmDevice->tx_full = 1;
- printf("bcm570xEndSend: no more TX descriptors!\n");
- QQ_PushHead(&pDevice->TxPacketFreeQ.Container, pPacket);
- return 0;
- }
-
- if (length <= 0){
- printf("eth: bad packet size: %d\n", length);
- goto out;
- }
-
- /* Get packet buffers and fragment list */
- pUmPacket = (PUM_PACKET) pPacket;
- /* Single DMA Descriptor transmit.
- * Fragments may be provided, but one DMA descriptor max is
- * used to send the packet.
- */
- if (MM_CoalesceTxBuffer (pDevice, pPacket) != LM_STATUS_SUCCESS) {
- if (pUmPacket->skbuff == NULL){
- /* Packet was discarded */
- printf("TX: failed (1)\n");
- status = 1;
- } else{
- printf("TX: failed (2)\n");
- status = 2;
- }
- QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket);
- return status;
- }
-
- /* Copy packet to DMA buffer */
- memset(pUmPacket->skbuff, 0x0, MAX_PACKET_SIZE);
- memcpy((void*)pUmPacket->skbuff, (void*)packet, length);
- pPacket->PacketSize = length;
- pPacket->Flags |= SND_BD_FLAG_END|SND_BD_FLAG_COAL_NOW;
- pPacket->u.Tx.FragCount = 1;
- /* We've already provided a frame ready for transmission */
- pPacket->Flags &= ~SND_BD_FLAG_TCP_UDP_CKSUM;
-
- if ( LM_SendPacket(pDevice, pPacket) == LM_STATUS_FAILURE){
- /*
- * A lower level send failure will push the packet descriptor back
- * in the free queue, so just deal with the VxWorks clusters.
- */
- if (pUmPacket->skbuff == NULL){
- printf("TX failed (1)!\n");
- /* Packet was discarded */
- status = 3;
- } else {
- /* A resource problem ... */
- printf("TX failed (2)!\n");
- status = 4;
}
- if (QQ_GetEntryCnt(&pDevice->TxPacketFreeQ.Container) == 0) {
- printf("TX: emptyQ!\n");
- pUmDevice->tx_full = 1;
- }
- }
+ /* Clear sent flag */
+ pUmDevice->tx_pkt = 0;
- while(pUmDevice->tx_pkt == 0){
- /* Service TX */
- eth_isr();
- }
-#if ET_DEBUG
- printf("eth_send: 0x%x, %d bytes\n"
- "[%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x] ...\n",
- (int)pPacket, length,
- ptr[0],ptr[1],ptr[2],ptr[3],ptr[4],ptr[5],
- ptr[6],ptr[7],ptr[8],ptr[9],ptr[10],ptr[11],ptr[12],
- ptr[13],ptr[14],ptr[15]);
-#endif
- pUmDevice->tx_pkt = 0;
- QQ_PushHead(&pDevice->TxPacketFreeQ.Container, pPacket);
-
- /* Done with send */
- out:
- return status;
-}
-
-
-/* Ethernet receive */
-int
-eth_rx(void)
-{
- PLM_PACKET pPacket = NULL;
- PUM_PACKET pUmPacket = NULL;
- void *skb;
- int size=0;
-
- while(TRUE) {
-
- bcm570x_service_isr:
- /* Pull down packet if it is there */
- eth_isr();
-
- /* Indicate RX packets called */
- if(pUmDevice->rx_pkt){
- /* printf("eth_rx: got a packet...\n"); */
- pUmDevice->rx_pkt = 0;
- } else {
- /* printf("eth_rx: waiting for packet...\n"); */
- goto bcm570x_service_isr;
+ /* Previously blocked */
+ if (pUmDevice->tx_full) {
+ printf ("eth%d: tx blocked.\n", pUmDevice->index);
+ return 0;
}
pPacket = (PLM_PACKET)
- QQ_PopHead(&pDevice->RxPacketReceivedQ.Container);
+ QQ_PopHead (&pDevice->TxPacketFreeQ.Container);
- if (pPacket == 0){
- printf("eth_rx: empty packet!\n");
- goto bcm570x_service_isr;
+ if (pPacket == 0) {
+ pUmDevice->tx_full = 1;
+ printf ("bcm570xEndSend: TX full!\n");
+ return 0;
}
+ if (pDevice->SendBdLeft.counter == 0) {
+ pUmDevice->tx_full = 1;
+ printf ("bcm570xEndSend: no more TX descriptors!\n");
+ QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket);
+ return 0;
+ }
+
+ if (length <= 0) {
+ printf ("eth: bad packet size: %d\n", length);
+ goto out;
+ }
+
+ /* Get packet buffers and fragment list */
pUmPacket = (PUM_PACKET) pPacket;
-#if ET_DEBUG
- printf("eth_rx: packet @0x%x\n",
- (int)pPacket);
-#endif
- /* If the packet generated an error, reuse buffer */
- if ((pPacket->PacketStatus != LM_STATUS_SUCCESS) ||
- ((size = pPacket->PacketSize) > pDevice->RxMtu)) {
-
- /* reuse skb */
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
- printf("eth_rx: error in packet dma!\n");
- goto bcm570x_service_isr;
+ /* Single DMA Descriptor transmit.
+ * Fragments may be provided, but one DMA descriptor max is
+ * used to send the packet.
+ */
+ if (MM_CoalesceTxBuffer (pDevice, pPacket) != LM_STATUS_SUCCESS) {
+ if (pUmPacket->skbuff == NULL) {
+ /* Packet was discarded */
+ printf ("TX: failed (1)\n");
+ status = 1;
+ } else {
+ printf ("TX: failed (2)\n");
+ status = 2;
+ }
+ QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket);
+ return status;
}
- /* Set size and address */
- skb = pUmPacket->skbuff;
- size = pPacket->PacketSize;
+ /* Copy packet to DMA buffer */
+ memset (pUmPacket->skbuff, 0x0, MAX_PACKET_SIZE);
+ memcpy ((void *)pUmPacket->skbuff, (void *)packet, length);
+ pPacket->PacketSize = length;
+ pPacket->Flags |= SND_BD_FLAG_END | SND_BD_FLAG_COAL_NOW;
+ pPacket->u.Tx.FragCount = 1;
+ /* We've already provided a frame ready for transmission */
+ pPacket->Flags &= ~SND_BD_FLAG_TCP_UDP_CKSUM;
- /* Pass the packet up to the protocol
- * layers.
- */
- NetReceive(skb, size);
+ if (LM_SendPacket (pDevice, pPacket) == LM_STATUS_FAILURE) {
+ /*
+ * A lower level send failure will push the packet descriptor back
+ * in the free queue, so just deal with the VxWorks clusters.
+ */
+ if (pUmPacket->skbuff == NULL) {
+ printf ("TX failed (1)!\n");
+ /* Packet was discarded */
+ status = 3;
+ } else {
+ /* A resource problem ... */
+ printf ("TX failed (2)!\n");
+ status = 4;
+ }
- /* Free packet buffer */
- bcm570xPktFree (pUmDevice->index, skb);
- pUmPacket->skbuff = NULL;
+ if (QQ_GetEntryCnt (&pDevice->TxPacketFreeQ.Container) == 0) {
+ printf ("TX: emptyQ!\n");
+ pUmDevice->tx_full = 1;
+ }
+ }
- /* Reuse SKB */
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
+ while (pUmDevice->tx_pkt == 0) {
+ /* Service TX */
+ eth_isr ();
+ }
+#if ET_DEBUG
+ printf ("eth_send: 0x%x, %d bytes\n"
+ "[%x %x %x %x %x %x %x %x %x %x %x %x %x %x %x %x] ...\n",
+ (int)pPacket, length,
+ ptr[0], ptr[1], ptr[2], ptr[3], ptr[4], ptr[5],
+ ptr[6], ptr[7], ptr[8], ptr[9], ptr[10], ptr[11], ptr[12],
+ ptr[13], ptr[14], ptr[15]);
+#endif
+ pUmDevice->tx_pkt = 0;
+ QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket);
- return 0; /* Got a packet, bail ... */
- }
- return size;
+ /* Done with send */
+ out:
+ return status;
}
+/* Ethernet receive */
+int eth_rx (void)
+{
+ PLM_PACKET pPacket = NULL;
+ PUM_PACKET pUmPacket = NULL;
+ void *skb;
+ int size = 0;
+
+ while (TRUE) {
+
+ bcm570x_service_isr:
+ /* Pull down packet if it is there */
+ eth_isr ();
+
+ /* Indicate RX packets called */
+ if (pUmDevice->rx_pkt) {
+ /* printf("eth_rx: got a packet...\n"); */
+ pUmDevice->rx_pkt = 0;
+ } else {
+ /* printf("eth_rx: waiting for packet...\n"); */
+ goto bcm570x_service_isr;
+ }
+
+ pPacket = (PLM_PACKET)
+ QQ_PopHead (&pDevice->RxPacketReceivedQ.Container);
+
+ if (pPacket == 0) {
+ printf ("eth_rx: empty packet!\n");
+ goto bcm570x_service_isr;
+ }
+
+ pUmPacket = (PUM_PACKET) pPacket;
+#if ET_DEBUG
+ printf ("eth_rx: packet @0x%x\n", (int)pPacket);
+#endif
+ /* If the packet generated an error, reuse buffer */
+ if ((pPacket->PacketStatus != LM_STATUS_SUCCESS) ||
+ ((size = pPacket->PacketSize) > pDevice->RxMtu)) {
+
+ /* reuse skb */
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container,
+ pPacket);
+ printf ("eth_rx: error in packet dma!\n");
+ goto bcm570x_service_isr;
+ }
+
+ /* Set size and address */
+ skb = pUmPacket->skbuff;
+ size = pPacket->PacketSize;
+
+ /* Pass the packet up to the protocol
+ * layers.
+ */
+ NetReceive (skb, size);
+
+ /* Free packet buffer */
+ bcm570xPktFree (pUmDevice->index, skb);
+ pUmPacket->skbuff = NULL;
+
+ /* Reuse SKB */
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
+
+ return 0; /* Got a packet, bail ... */
+ }
+ return size;
+}
/* Shut down device */
-void
-eth_halt(void)
+void eth_halt (void)
{
- int i;
- if ( initialized)
- if (pDevice && pUmDevice && pUmDevice->opened){
- printf("\neth%d:%s,", pUmDevice->index, pUmDevice->name);
- printf("HALT,");
- /* stop device */
- LM_Halt(pDevice);
- printf("POWER DOWN,");
- LM_SetPowerState(pDevice, LM_POWER_STATE_D3);
+ int i;
+ if (initialized)
+ if (pDevice && pUmDevice && pUmDevice->opened) {
+ printf ("\neth%d:%s,", pUmDevice->index,
+ pUmDevice->name);
+ printf ("HALT,");
+ /* stop device */
+ LM_Halt (pDevice);
+ printf ("POWER DOWN,");
+ LM_SetPowerState (pDevice, LM_POWER_STATE_D3);
- /* Free the memory allocated by the device in tigon3 */
- for (i = 0; i < pUmDevice->mem_list_num; i++) {
- if (pUmDevice->mem_list[i]) {
- /* sanity check */
- if (pUmDevice->dma_list[i]) { /* cache-safe memory */
- free(pUmDevice->mem_list[i]);
- } else {
- free(pUmDevice->mem_list[i]); /* normal memory */
+ /* Free the memory allocated by the device in tigon3 */
+ for (i = 0; i < pUmDevice->mem_list_num; i++) {
+ if (pUmDevice->mem_list[i]) {
+ /* sanity check */
+ if (pUmDevice->dma_list[i]) { /* cache-safe memory */
+ free (pUmDevice->mem_list[i]);
+ } else {
+ free (pUmDevice->mem_list[i]); /* normal memory */
+ }
+ }
+ }
+ pUmDevice->opened = 0;
+ free (pDevice);
+ pDevice = NULL;
+ pUmDevice = NULL;
+ initialized = 0;
+ printf ("done - offline.\n");
}
- }
- }
- pUmDevice->opened = 0;
- free(pDevice);
- pDevice = NULL;
- pUmDevice = NULL;
- initialized = 0;
- printf("done - offline.\n");
- }
}
-
/*
*
* Middle Module: Interface between the HW driver (tigon3 modules) and
@@ -843,409 +834,380 @@
*/
/* Middle module dependency - size of a packet descriptor */
-int MM_Packet_Desc_Size = sizeof(UM_PACKET);
-
+int MM_Packet_Desc_Size = sizeof (UM_PACKET);
LM_STATUS
-MM_ReadConfig32(PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 Offset,
- LM_UINT32 *pValue32)
+MM_ReadConfig32 (PLM_DEVICE_BLOCK pDevice,
+ LM_UINT32 Offset, LM_UINT32 * pValue32)
{
- UM_DEVICE_BLOCK *pUmDevice;
- pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
- pci_read_config_dword(pUmDevice->pdev,
- Offset, (u32 *) pValue32);
- return LM_STATUS_SUCCESS;
-}
-
-
-LM_STATUS
-MM_WriteConfig32(PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 Offset,
- LM_UINT32 Value32)
-{
- UM_DEVICE_BLOCK *pUmDevice;
- pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
- pci_write_config_dword(pUmDevice->pdev,
- Offset, Value32);
- return LM_STATUS_SUCCESS;
-}
-
-
-LM_STATUS
-MM_ReadConfig16(PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 Offset,
- LM_UINT16 *pValue16)
-{
- UM_DEVICE_BLOCK *pUmDevice;
- pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
- pci_read_config_word(pUmDevice->pdev,
- Offset, (u16*) pValue16);
- return LM_STATUS_SUCCESS;
+ UM_DEVICE_BLOCK *pUmDevice;
+ pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
+ pci_read_config_dword (pUmDevice->pdev, Offset, (u32 *) pValue32);
+ return LM_STATUS_SUCCESS;
}
LM_STATUS
-MM_WriteConfig16(PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 Offset,
- LM_UINT16 Value16)
+MM_WriteConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT32 Value32)
{
- UM_DEVICE_BLOCK *pUmDevice;
- pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
- pci_write_config_word(pUmDevice->pdev,
- Offset, Value16);
- return LM_STATUS_SUCCESS;
-}
-
-
-LM_STATUS
-MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
- PLM_VOID *pMemoryBlockVirt,
- PLM_PHYSICAL_ADDRESS pMemoryBlockPhy,
- LM_BOOL Cached)
-{
- PLM_VOID pvirt;
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- dma_addr_t mapping;
-
- pvirt = malloc(BlockSize);
- mapping = (dma_addr_t)(pvirt);
- if (!pvirt)
- return LM_STATUS_FAILURE;
-
- pUmDevice->mem_list[pUmDevice->mem_list_num] = pvirt;
- pUmDevice->dma_list[pUmDevice->mem_list_num] = mapping;
- pUmDevice->mem_size_list[pUmDevice->mem_list_num++] = BlockSize;
- memset(pvirt, 0, BlockSize);
-
- *pMemoryBlockVirt = (PLM_VOID) pvirt;
- MM_SetAddr (pMemoryBlockPhy, (dma_addr_t) mapping);
-
- return LM_STATUS_SUCCESS;
-}
-
-
-LM_STATUS
-MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
- PLM_VOID *pMemoryBlockVirt)
-{
- PLM_VOID pvirt;
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
-
- pvirt = malloc(BlockSize);
-
- if (!pvirt)
- return LM_STATUS_FAILURE;
-
- pUmDevice->mem_list[pUmDevice->mem_list_num] = pvirt;
- pUmDevice->dma_list[pUmDevice->mem_list_num] = 0;
- pUmDevice->mem_size_list[pUmDevice->mem_list_num++] = BlockSize;
- memset(pvirt, 0, BlockSize);
- *pMemoryBlockVirt = pvirt;
-
- return LM_STATUS_SUCCESS;
+ UM_DEVICE_BLOCK *pUmDevice;
+ pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
+ pci_write_config_dword (pUmDevice->pdev, Offset, Value32);
+ return LM_STATUS_SUCCESS;
}
LM_STATUS
-MM_MapMemBase(PLM_DEVICE_BLOCK pDevice)
+MM_ReadConfig16 (PLM_DEVICE_BLOCK pDevice,
+ LM_UINT32 Offset, LM_UINT16 * pValue16)
{
- printf("BCM570x PCI Memory base address @0x%x\n",
- (unsigned int)pDevice->pMappedMemBase);
- return LM_STATUS_SUCCESS;
+ UM_DEVICE_BLOCK *pUmDevice;
+ pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
+ pci_read_config_word (pUmDevice->pdev, Offset, (u16 *) pValue16);
+ return LM_STATUS_SUCCESS;
}
LM_STATUS
-MM_InitializeUmPackets(PLM_DEVICE_BLOCK pDevice)
+MM_WriteConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT16 Value16)
{
- int i;
- void* skb;
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- PUM_PACKET pUmPacket = NULL;
- PLM_PACKET pPacket = NULL;
+ UM_DEVICE_BLOCK *pUmDevice;
+ pUmDevice = (UM_DEVICE_BLOCK *) pDevice;
+ pci_write_config_word (pUmDevice->pdev, Offset, Value16);
+ return LM_STATUS_SUCCESS;
+}
- for (i = 0; i < pDevice->RxPacketDescCnt; i++) {
- pPacket = QQ_PopHead(&pDevice->RxPacketFreeQ.Container);
- pUmPacket = (PUM_PACKET) pPacket;
+LM_STATUS
+MM_AllocateSharedMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
+ PLM_VOID * pMemoryBlockVirt,
+ PLM_PHYSICAL_ADDRESS pMemoryBlockPhy, LM_BOOL Cached)
+{
+ PLM_VOID pvirt;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ dma_addr_t mapping;
- if (pPacket == 0) {
- printf("MM_InitializeUmPackets: Bad RxPacketFreeQ\n");
+ pvirt = malloc (BlockSize);
+ mapping = (dma_addr_t) (pvirt);
+ if (!pvirt)
+ return LM_STATUS_FAILURE;
+
+ pUmDevice->mem_list[pUmDevice->mem_list_num] = pvirt;
+ pUmDevice->dma_list[pUmDevice->mem_list_num] = mapping;
+ pUmDevice->mem_size_list[pUmDevice->mem_list_num++] = BlockSize;
+ memset (pvirt, 0, BlockSize);
+
+ *pMemoryBlockVirt = (PLM_VOID) pvirt;
+ MM_SetAddr (pMemoryBlockPhy, (dma_addr_t) mapping);
+
+ return LM_STATUS_SUCCESS;
+}
+
+LM_STATUS
+MM_AllocateMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
+ PLM_VOID * pMemoryBlockVirt)
+{
+ PLM_VOID pvirt;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+
+ pvirt = malloc (BlockSize);
+
+ if (!pvirt)
+ return LM_STATUS_FAILURE;
+
+ pUmDevice->mem_list[pUmDevice->mem_list_num] = pvirt;
+ pUmDevice->dma_list[pUmDevice->mem_list_num] = 0;
+ pUmDevice->mem_size_list[pUmDevice->mem_list_num++] = BlockSize;
+ memset (pvirt, 0, BlockSize);
+ *pMemoryBlockVirt = pvirt;
+
+ return LM_STATUS_SUCCESS;
+}
+
+LM_STATUS MM_MapMemBase (PLM_DEVICE_BLOCK pDevice)
+{
+ printf ("BCM570x PCI Memory base address @0x%x\n",
+ (unsigned int)pDevice->pMappedMemBase);
+ return LM_STATUS_SUCCESS;
+}
+
+LM_STATUS MM_InitializeUmPackets (PLM_DEVICE_BLOCK pDevice)
+{
+ int i;
+ void *skb;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ PUM_PACKET pUmPacket = NULL;
+ PLM_PACKET pPacket = NULL;
+
+ for (i = 0; i < pDevice->RxPacketDescCnt; i++) {
+ pPacket = QQ_PopHead (&pDevice->RxPacketFreeQ.Container);
+ pUmPacket = (PUM_PACKET) pPacket;
+
+ if (pPacket == 0) {
+ printf ("MM_InitializeUmPackets: Bad RxPacketFreeQ\n");
+ }
+
+ skb = bcm570xPktAlloc (pUmDevice->index,
+ pPacket->u.Rx.RxBufferSize + 2);
+
+ if (skb == 0) {
+ pUmPacket->skbuff = 0;
+ QQ_PushTail (&pUmDevice->rx_out_of_buf_q.Container,
+ pPacket);
+ printf ("MM_InitializeUmPackets: out of buffer.\n");
+ continue;
+ }
+
+ pUmPacket->skbuff = skb;
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
}
- skb = bcm570xPktAlloc(pUmDevice->index,
- pPacket->u.Rx.RxBufferSize + 2);
+ pUmDevice->rx_low_buf_thresh = pDevice->RxPacketDescCnt / 8;
- if (skb == 0) {
- pUmPacket->skbuff = 0;
- QQ_PushTail(&pUmDevice->rx_out_of_buf_q.Container, pPacket);
- printf("MM_InitializeUmPackets: out of buffer.\n");
- continue;
- }
-
- pUmPacket->skbuff = skb;
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
- }
-
- pUmDevice->rx_low_buf_thresh = pDevice->RxPacketDescCnt / 8;
-
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-LM_STATUS
-MM_GetConfig(PLM_DEVICE_BLOCK pDevice)
+LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice)
{
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- int index = pDevice->index;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ int index = pDevice->index;
- if (auto_speed[index] == 0)
- pDevice->DisableAutoNeg = TRUE;
- else
- pDevice->DisableAutoNeg = FALSE;
-
- if (line_speed[index] == 0) {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_AUTO;
- pDevice->DisableAutoNeg = FALSE;
- }
- else {
- if (line_speed[index] == 1000) {
- if (pDevice->EnableTbi) {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX;
- }
- else if (full_duplex[index]) {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX;
- }
- else {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS;
- }
- if (!pDevice->EnableTbi)
+ if (auto_speed[index] == 0)
+ pDevice->DisableAutoNeg = TRUE;
+ else
pDevice->DisableAutoNeg = FALSE;
+
+ if (line_speed[index] == 0) {
+ pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_AUTO;
+ pDevice->DisableAutoNeg = FALSE;
+ } else {
+ if (line_speed[index] == 1000) {
+ if (pDevice->EnableTbi) {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX;
+ } else if (full_duplex[index]) {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX;
+ } else {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS;
+ }
+ if (!pDevice->EnableTbi)
+ pDevice->DisableAutoNeg = FALSE;
+ } else if (line_speed[index] == 100) {
+ if (full_duplex[index]) {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX;
+ } else {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS;
+ }
+ } else if (line_speed[index] == 10) {
+ if (full_duplex[index]) {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX;
+ } else {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS;
+ }
+ } else {
+ pDevice->RequestedMediaType =
+ LM_REQUESTED_MEDIA_TYPE_AUTO;
+ pDevice->DisableAutoNeg = FALSE;
+ }
+
}
- else if (line_speed[index] == 100) {
- if (full_duplex[index]) {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX;
- }
- else {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS;
- }
+ pDevice->FlowControlCap = 0;
+ if (rx_flow_control[index] != 0) {
+ pDevice->FlowControlCap |= LM_FLOW_CONTROL_RECEIVE_PAUSE;
}
- else if (line_speed[index] == 10) {
- if (full_duplex[index]) {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX;
- }
- else {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS;
- }
+ if (tx_flow_control[index] != 0) {
+ pDevice->FlowControlCap |= LM_FLOW_CONTROL_TRANSMIT_PAUSE;
}
- else {
- pDevice->RequestedMediaType =
- LM_REQUESTED_MEDIA_TYPE_AUTO;
- pDevice->DisableAutoNeg = FALSE;
+ if ((auto_flow_control[index] != 0) &&
+ (pDevice->DisableAutoNeg == FALSE)) {
+
+ pDevice->FlowControlCap |= LM_FLOW_CONTROL_AUTO_PAUSE;
+ if ((tx_flow_control[index] == 0) &&
+ (rx_flow_control[index] == 0)) {
+ pDevice->FlowControlCap |=
+ LM_FLOW_CONTROL_TRANSMIT_PAUSE |
+ LM_FLOW_CONTROL_RECEIVE_PAUSE;
+ }
}
- }
- pDevice->FlowControlCap = 0;
- if (rx_flow_control[index] != 0) {
- pDevice->FlowControlCap |= LM_FLOW_CONTROL_RECEIVE_PAUSE;
- }
- if (tx_flow_control[index] != 0) {
- pDevice->FlowControlCap |= LM_FLOW_CONTROL_TRANSMIT_PAUSE;
- }
- if ((auto_flow_control[index] != 0) &&
- (pDevice->DisableAutoNeg == FALSE)) {
-
- pDevice->FlowControlCap |= LM_FLOW_CONTROL_AUTO_PAUSE;
- if ((tx_flow_control[index] == 0) &&
- (rx_flow_control[index] == 0)) {
- pDevice->FlowControlCap |=
- LM_FLOW_CONTROL_TRANSMIT_PAUSE |
- LM_FLOW_CONTROL_RECEIVE_PAUSE;
- }
- }
-
- /* Default MTU for now */
- pUmDevice->mtu = 1500;
+ /* Default MTU for now */
+ pUmDevice->mtu = 1500;
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- if (pUmDevice->mtu > 1500) {
- pDevice->RxMtu = pUmDevice->mtu;
- pDevice->RxJumboDescCnt = DEFAULT_JUMBO_RCV_DESC_COUNT;
- }
- else {
- pDevice->RxJumboDescCnt = 0;
- }
- pDevice->RxJumboDescCnt = rx_jumbo_desc_cnt[index];
+ if (pUmDevice->mtu > 1500) {
+ pDevice->RxMtu = pUmDevice->mtu;
+ pDevice->RxJumboDescCnt = DEFAULT_JUMBO_RCV_DESC_COUNT;
+ } else {
+ pDevice->RxJumboDescCnt = 0;
+ }
+ pDevice->RxJumboDescCnt = rx_jumbo_desc_cnt[index];
#else
- pDevice->RxMtu = pUmDevice->mtu;
+ pDevice->RxMtu = pUmDevice->mtu;
#endif
- if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) {
- pDevice->UseTaggedStatus = TRUE;
- pUmDevice->timer_interval = CFG_HZ;
- }
- else {
- pUmDevice->timer_interval = CFG_HZ/50;
- }
-
- pDevice->TxPacketDescCnt = tx_pkt_desc_cnt[index];
- pDevice->RxStdDescCnt = rx_std_desc_cnt[index];
- /* Note: adaptive coalescence really isn't adaptive in this driver */
- pUmDevice->rx_adaptive_coalesce = rx_adaptive_coalesce[index];
- if (!pUmDevice->rx_adaptive_coalesce) {
- pDevice->RxCoalescingTicks = rx_coalesce_ticks[index];
- if (pDevice->RxCoalescingTicks > MAX_RX_COALESCING_TICKS)
- pDevice->RxCoalescingTicks = MAX_RX_COALESCING_TICKS;
- pUmDevice->rx_curr_coalesce_ticks =pDevice->RxCoalescingTicks;
-
- pDevice->RxMaxCoalescedFrames = rx_max_coalesce_frames[index];
- if (pDevice->RxMaxCoalescedFrames>MAX_RX_MAX_COALESCED_FRAMES)
- pDevice->RxMaxCoalescedFrames =
- MAX_RX_MAX_COALESCED_FRAMES;
- pUmDevice->rx_curr_coalesce_frames =
- pDevice->RxMaxCoalescedFrames;
- pDevice->StatsCoalescingTicks = stats_coalesce_ticks[index];
- if (pDevice->StatsCoalescingTicks>MAX_STATS_COALESCING_TICKS)
- pDevice->StatsCoalescingTicks=
- MAX_STATS_COALESCING_TICKS;
- }
- else {
- pUmDevice->rx_curr_coalesce_frames =
- DEFAULT_RX_MAX_COALESCED_FRAMES;
- pUmDevice->rx_curr_coalesce_ticks =
- DEFAULT_RX_COALESCING_TICKS;
- }
- pDevice->TxCoalescingTicks = tx_coalesce_ticks[index];
- if (pDevice->TxCoalescingTicks > MAX_TX_COALESCING_TICKS)
- pDevice->TxCoalescingTicks = MAX_TX_COALESCING_TICKS;
- pDevice->TxMaxCoalescedFrames = tx_max_coalesce_frames[index];
- if (pDevice->TxMaxCoalescedFrames > MAX_TX_MAX_COALESCED_FRAMES)
- pDevice->TxMaxCoalescedFrames = MAX_TX_MAX_COALESCED_FRAMES;
-
- if (enable_wol[index]) {
- pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_MAGIC_PACKET;
- pDevice->WakeUpMode = LM_WAKE_UP_MODE_MAGIC_PACKET;
- }
- pDevice->NicSendBd = TRUE;
-
- /* Don't update status blocks during interrupt */
- pDevice->RxCoalescingTicksDuringInt = 0;
- pDevice->TxCoalescingTicksDuringInt = 0;
-
- return LM_STATUS_SUCCESS;
-
-}
-
-
-LM_STATUS
-MM_StartTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
-{
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- printf("Start TX DMA: dev=%d packet @0x%x\n",
- (int)pUmDevice->index, (unsigned int)pPacket);
-
- return LM_STATUS_SUCCESS;
-}
-
-LM_STATUS
-MM_CompleteTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
-{
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- printf("Complete TX DMA: dev=%d packet @0x%x\n",
- (int)pUmDevice->index, (unsigned int)pPacket);
- return LM_STATUS_SUCCESS;
-}
-
-
-LM_STATUS
-MM_IndicateStatus(PLM_DEVICE_BLOCK pDevice, LM_STATUS Status)
-{
- char buf[128];
- char lcd[4];
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- LM_FLOW_CONTROL flow_control;
-
- pUmDevice->delayed_link_ind = 0;
- memset(lcd, 0x0, 4);
-
- if (Status == LM_STATUS_LINK_DOWN) {
- sprintf(buf,"eth%d: %s: NIC Link is down\n",
- pUmDevice->index,pUmDevice->name);
- lcd[0] = 'L';lcd[1]='N';lcd[2]='K';lcd[3] = '?';
- } else if (Status == LM_STATUS_LINK_ACTIVE) {
- sprintf(buf,"eth%d:%s: ", pUmDevice->index, pUmDevice->name);
-
- if (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS){
- strcat(buf,"1000 Mbps ");
- lcd[0] = '1';lcd[1]='G';lcd[2]='B';
- } else if (pDevice->LineSpeed == LM_LINE_SPEED_100MBPS){
- strcat(buf,"100 Mbps ");
- lcd[0] = '1';lcd[1]='0';lcd[2]='0';
- } else if (pDevice->LineSpeed == LM_LINE_SPEED_10MBPS){
- strcat(buf,"10 Mbps ");
- lcd[0] = '1';lcd[1]='0';lcd[2]=' ';
- }
- if (pDevice->DuplexMode == LM_DUPLEX_MODE_FULL){
- strcat(buf, "full duplex");
- lcd[3] = 'F';
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ pDevice->UseTaggedStatus = TRUE;
+ pUmDevice->timer_interval = CFG_HZ;
} else {
- strcat(buf, "half duplex");
- lcd[3] = 'H';
+ pUmDevice->timer_interval = CFG_HZ / 50;
}
- strcat(buf, " link up");
- flow_control = pDevice->FlowControl &
- (LM_FLOW_CONTROL_RECEIVE_PAUSE |
- LM_FLOW_CONTROL_TRANSMIT_PAUSE);
+ pDevice->TxPacketDescCnt = tx_pkt_desc_cnt[index];
+ pDevice->RxStdDescCnt = rx_std_desc_cnt[index];
+ /* Note: adaptive coalescence really isn't adaptive in this driver */
+ pUmDevice->rx_adaptive_coalesce = rx_adaptive_coalesce[index];
+ if (!pUmDevice->rx_adaptive_coalesce) {
+ pDevice->RxCoalescingTicks = rx_coalesce_ticks[index];
+ if (pDevice->RxCoalescingTicks > MAX_RX_COALESCING_TICKS)
+ pDevice->RxCoalescingTicks = MAX_RX_COALESCING_TICKS;
+ pUmDevice->rx_curr_coalesce_ticks = pDevice->RxCoalescingTicks;
- if (flow_control) {
- if (flow_control & LM_FLOW_CONTROL_RECEIVE_PAUSE) {
- strcat(buf,", receive ");
- if (flow_control & LM_FLOW_CONTROL_TRANSMIT_PAUSE)
- strcat(buf," & transmit ");
- }
- else {
- strcat(buf,", transmit ");
- }
- strcat(buf,"flow control ON");
+ pDevice->RxMaxCoalescedFrames = rx_max_coalesce_frames[index];
+ if (pDevice->RxMaxCoalescedFrames > MAX_RX_MAX_COALESCED_FRAMES)
+ pDevice->RxMaxCoalescedFrames =
+ MAX_RX_MAX_COALESCED_FRAMES;
+ pUmDevice->rx_curr_coalesce_frames =
+ pDevice->RxMaxCoalescedFrames;
+ pDevice->StatsCoalescingTicks = stats_coalesce_ticks[index];
+ if (pDevice->StatsCoalescingTicks > MAX_STATS_COALESCING_TICKS)
+ pDevice->StatsCoalescingTicks =
+ MAX_STATS_COALESCING_TICKS;
} else {
- strcat(buf, ", flow control OFF");
+ pUmDevice->rx_curr_coalesce_frames =
+ DEFAULT_RX_MAX_COALESCED_FRAMES;
+ pUmDevice->rx_curr_coalesce_ticks = DEFAULT_RX_COALESCING_TICKS;
}
- strcat(buf,"\n");
- printf("%s",buf);
- }
+ pDevice->TxCoalescingTicks = tx_coalesce_ticks[index];
+ if (pDevice->TxCoalescingTicks > MAX_TX_COALESCING_TICKS)
+ pDevice->TxCoalescingTicks = MAX_TX_COALESCING_TICKS;
+ pDevice->TxMaxCoalescedFrames = tx_max_coalesce_frames[index];
+ if (pDevice->TxMaxCoalescedFrames > MAX_TX_MAX_COALESCED_FRAMES)
+ pDevice->TxMaxCoalescedFrames = MAX_TX_MAX_COALESCED_FRAMES;
+
+ if (enable_wol[index]) {
+ pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_MAGIC_PACKET;
+ pDevice->WakeUpMode = LM_WAKE_UP_MODE_MAGIC_PACKET;
+ }
+ pDevice->NicSendBd = TRUE;
+
+ /* Don't update status blocks during interrupt */
+ pDevice->RxCoalescingTicksDuringInt = 0;
+ pDevice->TxCoalescingTicksDuringInt = 0;
+
+ return LM_STATUS_SUCCESS;
+
+}
+
+LM_STATUS MM_StartTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
+{
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ printf ("Start TX DMA: dev=%d packet @0x%x\n",
+ (int)pUmDevice->index, (unsigned int)pPacket);
+
+ return LM_STATUS_SUCCESS;
+}
+
+LM_STATUS MM_CompleteTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
+{
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ printf ("Complete TX DMA: dev=%d packet @0x%x\n",
+ (int)pUmDevice->index, (unsigned int)pPacket);
+ return LM_STATUS_SUCCESS;
+}
+
+LM_STATUS MM_IndicateStatus (PLM_DEVICE_BLOCK pDevice, LM_STATUS Status)
+{
+ char buf[128];
+ char lcd[4];
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ LM_FLOW_CONTROL flow_control;
+
+ pUmDevice->delayed_link_ind = 0;
+ memset (lcd, 0x0, 4);
+
+ if (Status == LM_STATUS_LINK_DOWN) {
+ sprintf (buf, "eth%d: %s: NIC Link is down\n",
+ pUmDevice->index, pUmDevice->name);
+ lcd[0] = 'L';
+ lcd[1] = 'N';
+ lcd[2] = 'K';
+ lcd[3] = '?';
+ } else if (Status == LM_STATUS_LINK_ACTIVE) {
+ sprintf (buf, "eth%d:%s: ", pUmDevice->index, pUmDevice->name);
+
+ if (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) {
+ strcat (buf, "1000 Mbps ");
+ lcd[0] = '1';
+ lcd[1] = 'G';
+ lcd[2] = 'B';
+ } else if (pDevice->LineSpeed == LM_LINE_SPEED_100MBPS) {
+ strcat (buf, "100 Mbps ");
+ lcd[0] = '1';
+ lcd[1] = '0';
+ lcd[2] = '0';
+ } else if (pDevice->LineSpeed == LM_LINE_SPEED_10MBPS) {
+ strcat (buf, "10 Mbps ");
+ lcd[0] = '1';
+ lcd[1] = '0';
+ lcd[2] = ' ';
+ }
+ if (pDevice->DuplexMode == LM_DUPLEX_MODE_FULL) {
+ strcat (buf, "full duplex");
+ lcd[3] = 'F';
+ } else {
+ strcat (buf, "half duplex");
+ lcd[3] = 'H';
+ }
+ strcat (buf, " link up");
+
+ flow_control = pDevice->FlowControl &
+ (LM_FLOW_CONTROL_RECEIVE_PAUSE |
+ LM_FLOW_CONTROL_TRANSMIT_PAUSE);
+
+ if (flow_control) {
+ if (flow_control & LM_FLOW_CONTROL_RECEIVE_PAUSE) {
+ strcat (buf, ", receive ");
+ if (flow_control &
+ LM_FLOW_CONTROL_TRANSMIT_PAUSE)
+ strcat (buf, " & transmit ");
+ } else {
+ strcat (buf, ", transmit ");
+ }
+ strcat (buf, "flow control ON");
+ } else {
+ strcat (buf, ", flow control OFF");
+ }
+ strcat (buf, "\n");
+ printf ("%s", buf);
+ }
#if 0
- sysLedDsply(lcd[0],lcd[1],lcd[2],lcd[3]);
+ sysLedDsply (lcd[0], lcd[1], lcd[2], lcd[3]);
#endif
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-LM_STATUS
-MM_FreeRxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
+LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
{
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- PUM_PACKET pUmPacket;
- void *skb;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ PUM_PACKET pUmPacket;
+ void *skb;
- pUmPacket = (PUM_PACKET) pPacket;
+ pUmPacket = (PUM_PACKET) pPacket;
- if ((skb = pUmPacket->skbuff))
- bcm570xPktFree(pUmDevice->index, skb);
+ if ((skb = pUmPacket->skbuff))
+ bcm570xPktFree (pUmDevice->index, skb);
- pUmPacket->skbuff = 0;
+ pUmPacket->skbuff = 0;
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-unsigned long
-MM_AnGetCurrentTime_us(PAN_STATE_INFO pAnInfo)
+unsigned long MM_AnGetCurrentTime_us (PAN_STATE_INFO pAnInfo)
{
- return get_timer(0);
+ return get_timer (0);
}
/*
@@ -1258,86 +1220,82 @@
* non-fatal. The incoming cluster chain is not freed, giving
* the caller the choice of whether to try a retransmit later.
*/
-LM_STATUS
-MM_CoalesceTxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
+LM_STATUS MM_CoalesceTxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
{
- PUM_PACKET pUmPacket = (PUM_PACKET) pPacket;
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- void *skbnew;
- int len = 0;
+ PUM_PACKET pUmPacket = (PUM_PACKET) pPacket;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ void *skbnew;
+ int len = 0;
- if (len == 0)
+ if (len == 0)
+ return (LM_STATUS_SUCCESS);
+
+ if (len > MAX_PACKET_SIZE) {
+ printf ("eth%d: xmit frame discarded, too big!, size = %d\n",
+ pUmDevice->index, len);
+ return (LM_STATUS_FAILURE);
+ }
+
+ skbnew = bcm570xPktAlloc (pUmDevice->index, MAX_PACKET_SIZE);
+
+ if (skbnew == NULL) {
+ pUmDevice->tx_full = 1;
+ printf ("eth%d: out of transmit buffers", pUmDevice->index);
+ return (LM_STATUS_FAILURE);
+ }
+
+ /* New packet values */
+ pUmPacket->skbuff = skbnew;
+ pUmPacket->lm_packet.u.Tx.FragCount = 1;
+
return (LM_STATUS_SUCCESS);
-
- if (len > MAX_PACKET_SIZE){
- printf ("eth%d: xmit frame discarded, too big!, size = %d\n",
- pUmDevice->index, len);
- return (LM_STATUS_FAILURE);
- }
-
- skbnew = bcm570xPktAlloc(pUmDevice->index, MAX_PACKET_SIZE);
-
- if (skbnew == NULL) {
- pUmDevice->tx_full = 1;
- printf ("eth%d: out of transmit buffers", pUmDevice->index);
- return (LM_STATUS_FAILURE);
- }
-
- /* New packet values */
- pUmPacket->skbuff = skbnew;
- pUmPacket->lm_packet.u.Tx.FragCount = 1;
-
- return (LM_STATUS_SUCCESS);
}
-
-LM_STATUS
-MM_IndicateRxPackets(PLM_DEVICE_BLOCK pDevice)
+LM_STATUS MM_IndicateRxPackets (PLM_DEVICE_BLOCK pDevice)
{
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- pUmDevice->rx_pkt = 1;
- return LM_STATUS_SUCCESS;
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ pUmDevice->rx_pkt = 1;
+ return LM_STATUS_SUCCESS;
}
-LM_STATUS
-MM_IndicateTxPackets(PLM_DEVICE_BLOCK pDevice)
+LM_STATUS MM_IndicateTxPackets (PLM_DEVICE_BLOCK pDevice)
{
- PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
- PLM_PACKET pPacket;
- PUM_PACKET pUmPacket;
- void *skb;
- while ( TRUE ) {
+ PUM_DEVICE_BLOCK pUmDevice = (PUM_DEVICE_BLOCK) pDevice;
+ PLM_PACKET pPacket;
+ PUM_PACKET pUmPacket;
+ void *skb;
+ while (TRUE) {
- pPacket = (PLM_PACKET)
- QQ_PopHead(&pDevice->TxPacketXmittedQ.Container);
+ pPacket = (PLM_PACKET)
+ QQ_PopHead (&pDevice->TxPacketXmittedQ.Container);
- if (pPacket == 0)
- break;
+ if (pPacket == 0)
+ break;
- pUmPacket = (PUM_PACKET) pPacket;
- skb = (void*)pUmPacket->skbuff;
+ pUmPacket = (PUM_PACKET) pPacket;
+ skb = (void *)pUmPacket->skbuff;
- /*
- * Free MBLK if we transmitted a fragmented packet or a
- * non-fragmented packet straight from the VxWorks
- * buffer pool. If packet was copied to a local transmit
- * buffer, then there's no MBUF to free, just free
- * the transmit buffer back to the cluster pool.
- */
+ /*
+ * Free MBLK if we transmitted a fragmented packet or a
+ * non-fragmented packet straight from the VxWorks
+ * buffer pool. If packet was copied to a local transmit
+ * buffer, then there's no MBUF to free, just free
+ * the transmit buffer back to the cluster pool.
+ */
- if (skb)
- bcm570xPktFree (pUmDevice->index, skb);
+ if (skb)
+ bcm570xPktFree (pUmDevice->index, skb);
- pUmPacket->skbuff = 0;
- QQ_PushTail(&pDevice->TxPacketFreeQ.Container, pPacket);
- pUmDevice->tx_pkt = 1;
- }
- if (pUmDevice->tx_full) {
- if (QQ_GetEntryCnt(&pDevice->TxPacketFreeQ.Container) >=
- (QQ_GetSize(&pDevice->TxPacketFreeQ.Container) >> 1))
- pUmDevice->tx_full = 0;
- }
- return LM_STATUS_SUCCESS;
+ pUmPacket->skbuff = 0;
+ QQ_PushTail (&pDevice->TxPacketFreeQ.Container, pPacket);
+ pUmDevice->tx_pkt = 1;
+ }
+ if (pUmDevice->tx_full) {
+ if (QQ_GetEntryCnt (&pDevice->TxPacketFreeQ.Container) >=
+ (QQ_GetSize (&pDevice->TxPacketFreeQ.Container) >> 1))
+ pUmDevice->tx_full = 0;
+ }
+ return LM_STATUS_SUCCESS;
}
/*
@@ -1345,16 +1303,12 @@
* Return its length and physical address.
*/
void MM_MapTxDma
- (
- PLM_DEVICE_BLOCK pDevice,
- struct _LM_PACKET *pPacket,
- T3_64BIT_HOST_ADDR *paddr,
- LM_UINT32 *len,
- int frag)
-{
- PUM_PACKET pUmPacket = (PUM_PACKET) pPacket;
- *len = pPacket->PacketSize;
- MM_SetT3Addr(paddr, (dma_addr_t) pUmPacket->skbuff);
+ (PLM_DEVICE_BLOCK pDevice,
+ struct _LM_PACKET *pPacket,
+ T3_64BIT_HOST_ADDR * paddr, LM_UINT32 * len, int frag) {
+ PUM_PACKET pUmPacket = (PUM_PACKET) pPacket;
+ *len = pPacket->PacketSize;
+ MM_SetT3Addr (paddr, (dma_addr_t) pUmPacket->skbuff);
}
/*
@@ -1362,35 +1316,31 @@
* to a physical address as seen from a PCI device. Store the
* result at paddr.
*/
-void MM_MapRxDma(
- PLM_DEVICE_BLOCK pDevice,
- struct _LM_PACKET *pPacket,
- T3_64BIT_HOST_ADDR *paddr)
+void MM_MapRxDma (PLM_DEVICE_BLOCK pDevice,
+ struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR * paddr)
{
- PUM_PACKET pUmPacket = (PUM_PACKET) pPacket;
- MM_SetT3Addr(paddr, (dma_addr_t) pUmPacket->skbuff);
+ PUM_PACKET pUmPacket = (PUM_PACKET) pPacket;
+ MM_SetT3Addr (paddr, (dma_addr_t) pUmPacket->skbuff);
}
-void
-MM_SetAddr (LM_PHYSICAL_ADDRESS *paddr, dma_addr_t addr)
+void MM_SetAddr (LM_PHYSICAL_ADDRESS * paddr, dma_addr_t addr)
{
#if (BITS_PER_LONG == 64)
- paddr->High = ((unsigned long) addr) >> 32;
- paddr->Low = ((unsigned long) addr) & 0xffffffff;
+ paddr->High = ((unsigned long)addr) >> 32;
+ paddr->Low = ((unsigned long)addr) & 0xffffffff;
#else
paddr->High = 0;
- paddr->Low = (unsigned long) addr;
+ paddr->Low = (unsigned long)addr;
#endif
}
-void
-MM_SetT3Addr(T3_64BIT_HOST_ADDR *paddr, dma_addr_t addr)
+void MM_SetT3Addr (T3_64BIT_HOST_ADDR * paddr, dma_addr_t addr)
{
- unsigned long baddr = (unsigned long) addr;
+ unsigned long baddr = (unsigned long)addr;
#if (BITS_PER_LONG == 64)
- set_64bit_addr(paddr, baddr & 0xffffffff, baddr >> 32);
+ set_64bit_addr (paddr, baddr & 0xffffffff, baddr >> 32);
#else
- set_64bit_addr(paddr, baddr, 0);
+ set_64bit_addr (paddr, baddr, 0);
#endif
}
@@ -1403,42 +1353,38 @@
* If any uses of the function remain, they will refer to the single copy
* in the library.
*/
-void
-atomic_set(atomic_t* entry, int val)
+void atomic_set (atomic_t * entry, int val)
{
- entry->counter = val;
-}
-int
-atomic_read(atomic_t* entry)
-{
- return entry->counter;
-}
-void
-atomic_inc(atomic_t* entry)
-{
- if(entry)
- entry->counter++;
+ entry->counter = val;
}
-void
-atomic_dec(atomic_t* entry)
+int atomic_read (atomic_t * entry)
{
- if(entry)
- entry->counter--;
+ return entry->counter;
}
-void
-atomic_sub(int a, atomic_t* entry)
+void atomic_inc (atomic_t * entry)
{
- if(entry)
- entry->counter -= a;
+ if (entry)
+ entry->counter++;
}
-void
-atomic_add(int a, atomic_t* entry)
+void atomic_dec (atomic_t * entry)
{
- if(entry)
- entry->counter += a;
+ if (entry)
+ entry->counter--;
+}
+
+void atomic_sub (int a, atomic_t * entry)
+{
+ if (entry)
+ entry->counter -= a;
+}
+
+void atomic_add (int a, atomic_t * entry)
+{
+ if (entry)
+ entry->counter += a;
}
/******************************************************************************/
@@ -1446,68 +1392,57 @@
/* */
/* Return: */
/******************************************************************************/
-void
-QQ_InitQueue(
-PQQ_CONTAINER pQueue,
-unsigned int QueueSize) {
- pQueue->Head = 0;
- pQueue->Tail = 0;
- pQueue->Size = QueueSize+1;
- atomic_set(&pQueue->EntryCnt, 0);
-} /* QQ_InitQueue */
-
+void QQ_InitQueue (PQQ_CONTAINER pQueue, unsigned int QueueSize)
+{
+ pQueue->Head = 0;
+ pQueue->Tail = 0;
+ pQueue->Size = QueueSize + 1;
+ atomic_set (&pQueue->EntryCnt, 0);
+} /* QQ_InitQueue */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-char
-QQ_Full(
-PQQ_CONTAINER pQueue) {
- unsigned int NewHead;
+char QQ_Full (PQQ_CONTAINER pQueue)
+{
+ unsigned int NewHead;
- NewHead = (pQueue->Head + 1) % pQueue->Size;
+ NewHead = (pQueue->Head + 1) % pQueue->Size;
- return(NewHead == pQueue->Tail);
-} /* QQ_Full */
-
+ return (NewHead == pQueue->Tail);
+} /* QQ_Full */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-char
-QQ_Empty(
-PQQ_CONTAINER pQueue) {
- return(pQueue->Head == pQueue->Tail);
-} /* QQ_Empty */
-
+char QQ_Empty (PQQ_CONTAINER pQueue)
+{
+ return (pQueue->Head == pQueue->Tail);
+} /* QQ_Empty */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-unsigned int
-QQ_GetSize(
-PQQ_CONTAINER pQueue) {
- return pQueue->Size;
-} /* QQ_GetSize */
-
+unsigned int QQ_GetSize (PQQ_CONTAINER pQueue)
+{
+ return pQueue->Size;
+} /* QQ_GetSize */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-unsigned int
-QQ_GetEntryCnt(
-PQQ_CONTAINER pQueue) {
- return atomic_read(&pQueue->EntryCnt);
-} /* QQ_GetEntryCnt */
-
+unsigned int QQ_GetEntryCnt (PQQ_CONTAINER pQueue)
+{
+ return atomic_read (&pQueue->EntryCnt);
+} /* QQ_GetEntryCnt */
/******************************************************************************/
/* Description: */
@@ -1516,28 +1451,25 @@
/* TRUE entry was added successfully. */
/* FALSE queue is full. */
/******************************************************************************/
-char
-QQ_PushHead(
-PQQ_CONTAINER pQueue,
-PQQ_ENTRY pEntry) {
- unsigned int Head;
+char QQ_PushHead (PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry)
+{
+ unsigned int Head;
- Head = (pQueue->Head + 1) % pQueue->Size;
+ Head = (pQueue->Head + 1) % pQueue->Size;
#if !defined(QQ_NO_OVERFLOW_CHECK)
- if(Head == pQueue->Tail) {
- return 0;
- } /* if */
-#endif /* QQ_NO_OVERFLOW_CHECK */
+ if (Head == pQueue->Tail) {
+ return 0;
+ } /* if */
+#endif /* QQ_NO_OVERFLOW_CHECK */
- pQueue->Array[pQueue->Head] = pEntry;
- wmb();
- pQueue->Head = Head;
- atomic_inc(&pQueue->EntryCnt);
+ pQueue->Array[pQueue->Head] = pEntry;
+ wmb ();
+ pQueue->Head = Head;
+ atomic_inc (&pQueue->EntryCnt);
- return -1;
-} /* QQ_PushHead */
-
+ return -1;
+} /* QQ_PushHead */
/******************************************************************************/
/* Description: */
@@ -1546,146 +1478,126 @@
/* TRUE entry was added successfully. */
/* FALSE queue is full. */
/******************************************************************************/
-char
-QQ_PushTail(
-PQQ_CONTAINER pQueue,
-PQQ_ENTRY pEntry) {
- unsigned int Tail;
+char QQ_PushTail (PQQ_CONTAINER pQueue, PQQ_ENTRY pEntry)
+{
+ unsigned int Tail;
- Tail = pQueue->Tail;
- if(Tail == 0) {
- Tail = pQueue->Size;
- } /* if */
- Tail--;
+ Tail = pQueue->Tail;
+ if (Tail == 0) {
+ Tail = pQueue->Size;
+ } /* if */
+ Tail--;
#if !defined(QQ_NO_OVERFLOW_CHECK)
- if(Tail == pQueue->Head) {
- return 0;
- } /* if */
-#endif /* QQ_NO_OVERFLOW_CHECK */
+ if (Tail == pQueue->Head) {
+ return 0;
+ } /* if */
+#endif /* QQ_NO_OVERFLOW_CHECK */
- pQueue->Array[Tail] = pEntry;
- wmb();
- pQueue->Tail = Tail;
- atomic_inc(&pQueue->EntryCnt);
+ pQueue->Array[Tail] = pEntry;
+ wmb ();
+ pQueue->Tail = Tail;
+ atomic_inc (&pQueue->EntryCnt);
- return -1;
-} /* QQ_PushTail */
-
+ return -1;
+} /* QQ_PushTail */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-PQQ_ENTRY
-QQ_PopHead(
-PQQ_CONTAINER pQueue) {
- unsigned int Head;
- PQQ_ENTRY Entry;
+PQQ_ENTRY QQ_PopHead (PQQ_CONTAINER pQueue)
+{
+ unsigned int Head;
+ PQQ_ENTRY Entry;
- Head = pQueue->Head;
+ Head = pQueue->Head;
#if !defined(QQ_NO_UNDERFLOW_CHECK)
- if(Head == pQueue->Tail) {
- return (PQQ_ENTRY) 0;
- } /* if */
-#endif /* QQ_NO_UNDERFLOW_CHECK */
+ if (Head == pQueue->Tail) {
+ return (PQQ_ENTRY) 0;
+ } /* if */
+#endif /* QQ_NO_UNDERFLOW_CHECK */
- if(Head == 0) {
- Head = pQueue->Size;
- } /* if */
- Head--;
+ if (Head == 0) {
+ Head = pQueue->Size;
+ } /* if */
+ Head--;
- Entry = pQueue->Array[Head];
- membar();
+ Entry = pQueue->Array[Head];
+ membar ();
- pQueue->Head = Head;
- atomic_dec(&pQueue->EntryCnt);
+ pQueue->Head = Head;
+ atomic_dec (&pQueue->EntryCnt);
- return Entry;
-} /* QQ_PopHead */
-
+ return Entry;
+} /* QQ_PopHead */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-PQQ_ENTRY
-QQ_PopTail(
-PQQ_CONTAINER pQueue) {
- unsigned int Tail;
- PQQ_ENTRY Entry;
+PQQ_ENTRY QQ_PopTail (PQQ_CONTAINER pQueue)
+{
+ unsigned int Tail;
+ PQQ_ENTRY Entry;
- Tail = pQueue->Tail;
+ Tail = pQueue->Tail;
#if !defined(QQ_NO_UNDERFLOW_CHECK)
- if(Tail == pQueue->Head) {
- return (PQQ_ENTRY) 0;
- } /* if */
-#endif /* QQ_NO_UNDERFLOW_CHECK */
+ if (Tail == pQueue->Head) {
+ return (PQQ_ENTRY) 0;
+ } /* if */
+#endif /* QQ_NO_UNDERFLOW_CHECK */
- Entry = pQueue->Array[Tail];
- membar();
- pQueue->Tail = (Tail + 1) % pQueue->Size;
- atomic_dec(&pQueue->EntryCnt);
+ Entry = pQueue->Array[Tail];
+ membar ();
+ pQueue->Tail = (Tail + 1) % pQueue->Size;
+ atomic_dec (&pQueue->EntryCnt);
- return Entry;
-} /* QQ_PopTail */
-
+ return Entry;
+} /* QQ_PopTail */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-PQQ_ENTRY
-QQ_GetHead(
- PQQ_CONTAINER pQueue,
- unsigned int Idx)
+PQQ_ENTRY QQ_GetHead (PQQ_CONTAINER pQueue, unsigned int Idx)
{
- if(Idx >= atomic_read(&pQueue->EntryCnt))
- {
- return (PQQ_ENTRY) 0;
- }
+ if (Idx >= atomic_read (&pQueue->EntryCnt)) {
+ return (PQQ_ENTRY) 0;
+ }
- if(pQueue->Head > Idx)
- {
- Idx = pQueue->Head - Idx;
- }
- else
- {
- Idx = pQueue->Size - (Idx - pQueue->Head);
- }
- Idx--;
+ if (pQueue->Head > Idx) {
+ Idx = pQueue->Head - Idx;
+ } else {
+ Idx = pQueue->Size - (Idx - pQueue->Head);
+ }
+ Idx--;
- return pQueue->Array[Idx];
+ return pQueue->Array[Idx];
}
-
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-PQQ_ENTRY
-QQ_GetTail(
- PQQ_CONTAINER pQueue,
- unsigned int Idx)
+PQQ_ENTRY QQ_GetTail (PQQ_CONTAINER pQueue, unsigned int Idx)
{
- if(Idx >= atomic_read(&pQueue->EntryCnt))
- {
- return (PQQ_ENTRY) 0;
- }
+ if (Idx >= atomic_read (&pQueue->EntryCnt)) {
+ return (PQQ_ENTRY) 0;
+ }
- Idx += pQueue->Tail;
- if(Idx >= pQueue->Size)
- {
- Idx = Idx - pQueue->Size;
- }
+ Idx += pQueue->Tail;
+ if (Idx >= pQueue->Size) {
+ Idx = Idx - pQueue->Size;
+ }
- return pQueue->Array[Idx];
+ return pQueue->Array[Idx];
}
-#endif /* CFG_CMD_NET, !CONFIG_NET_MULTI, CONFIG_BCM570x */
+#endif
diff --git a/drivers/bcm570x_lm.h b/drivers/bcm570x_lm.h
index 607f3fd..2ea6ca8 100644
--- a/drivers/bcm570x_lm.h
+++ b/drivers/bcm570x_lm.h
@@ -19,29 +19,28 @@
#include "bcm570x_queue.h"
#include "bcm570x_bits.h"
-
/******************************************************************************/
/* Basic types. */
/******************************************************************************/
-typedef char LM_CHAR, *PLM_CHAR;
-typedef unsigned int LM_UINT, *PLM_UINT;
-typedef unsigned char LM_UINT8, *PLM_UINT8;
-typedef unsigned short LM_UINT16, *PLM_UINT16;
-typedef unsigned int LM_UINT32, *PLM_UINT32;
-typedef unsigned int LM_COUNTER, *PLM_COUNTER;
-typedef void LM_VOID, *PLM_VOID;
-typedef char LM_BOOL, *PLM_BOOL;
+typedef char LM_CHAR, *PLM_CHAR;
+typedef unsigned int LM_UINT, *PLM_UINT;
+typedef unsigned char LM_UINT8, *PLM_UINT8;
+typedef unsigned short LM_UINT16, *PLM_UINT16;
+typedef unsigned int LM_UINT32, *PLM_UINT32;
+typedef unsigned int LM_COUNTER, *PLM_COUNTER;
+typedef void LM_VOID, *PLM_VOID;
+typedef char LM_BOOL, *PLM_BOOL;
/* 64bit value. */
typedef struct {
#ifdef BIG_ENDIAN_HOST
- LM_UINT32 High;
- LM_UINT32 Low;
-#else /* BIG_ENDIAN_HOST */
- LM_UINT32 Low;
- LM_UINT32 High;
-#endif /* !BIG_ENDIAN_HOST */
+ LM_UINT32 High;
+ LM_UINT32 Low;
+#else /* BIG_ENDIAN_HOST */
+ LM_UINT32 Low;
+ LM_UINT32 High;
+#endif /* !BIG_ENDIAN_HOST */
} LM_UINT64, *PLM_UINT64;
typedef LM_UINT64 LM_PHYSICAL_ADDRESS, *PLM_PHYSICAL_ADDRESS;
@@ -58,15 +57,13 @@
} \
}
-
#ifndef NULL
#define NULL ((void *) 0)
-#endif /* NULL */
+#endif /* NULL */
#ifndef OFFSETOF
#define OFFSETOF(_s, _m) (MM_UINT_PTR(&(((_s *) 0)->_m)))
-#endif /* OFFSETOF */
-
+#endif /* OFFSETOF */
/******************************************************************************/
/* Simple macros. */
@@ -100,26 +97,24 @@
((unsigned char *) (_Dst))[4] = ((unsigned char *) (_Src))[4]; \
((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5];
-
/******************************************************************************/
/* Constants. */
/******************************************************************************/
#define ETHERNET_ADDRESS_SIZE 6
#define ETHERNET_PACKET_HEADER_SIZE 14
-#define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */
-#define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */
+#define MIN_ETHERNET_PACKET_SIZE 64 /* with 4 byte crc. */
+#define MAX_ETHERNET_PACKET_SIZE 1518 /* with 4 byte crc. */
#define MIN_ETHERNET_PACKET_SIZE_NO_CRC 60
#define MAX_ETHERNET_PACKET_SIZE_NO_CRC 1514
-#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */
+#define MAX_ETHERNET_PACKET_BUFFER_SIZE 1536 /* A nice even number. */
#ifndef LM_MAX_MC_TABLE_SIZE
#define LM_MAX_MC_TABLE_SIZE 32
-#endif /* LM_MAX_MC_TABLE_SIZE */
+#endif /* LM_MAX_MC_TABLE_SIZE */
#define LM_MC_ENTRY_SIZE (ETHERNET_ADDRESS_SIZE+1)
#define LM_MC_INSTANCE_COUNT_INDEX (LM_MC_ENTRY_SIZE-1)
-
/* Receive filter masks. */
#define LM_ACCEPT_UNICAST 0x0001
#define LM_ACCEPT_MULTICAST 0x0002
@@ -129,7 +124,6 @@
#define LM_PROMISCUOUS_MODE 0x10000
-
/******************************************************************************/
/* PCI registers. */
/******************************************************************************/
@@ -169,20 +163,20 @@
/******************************************************************************/
typedef struct {
- LM_UINT32 FragSize;
- LM_PHYSICAL_ADDRESS FragBuf;
+ LM_UINT32 FragSize;
+ LM_PHYSICAL_ADDRESS FragBuf;
} LM_FRAG, *PLM_FRAG;
typedef struct {
- /* FragCount is initialized for the caller to the maximum array size, on */
- /* return FragCount is the number of the actual fragments in the array. */
- LM_UINT32 FragCount;
+ /* FragCount is initialized for the caller to the maximum array size, on */
+ /* return FragCount is the number of the actual fragments in the array. */
+ LM_UINT32 FragCount;
- /* Total buffer size. */
- LM_UINT32 TotalSize;
+ /* Total buffer size. */
+ LM_UINT32 TotalSize;
- /* Fragment array buffer. */
- LM_FRAG Fragments[1];
+ /* Fragment array buffer. */
+ LM_FRAG Fragments[1];
} LM_FRAG_LIST, *PLM_FRAG_LIST;
#define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \
@@ -191,7 +185,6 @@
LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \
} _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME
-
/******************************************************************************/
/* Status codes. */
/******************************************************************************/
@@ -217,7 +210,6 @@
typedef LM_UINT LM_STATUS, *PLM_STATUS;
-
/******************************************************************************/
/* Requested media type. */
/******************************************************************************/
@@ -240,7 +232,6 @@
typedef LM_UINT32 LM_REQUESTED_MEDIA_TYPE, *PLM_REQUESTED_MEDIA_TYPE;
-
/******************************************************************************/
/* Media type. */
/******************************************************************************/
@@ -254,7 +245,6 @@
typedef LM_UINT32 LM_MEDIA_TYPE, *PLM_MEDIA_TYPE;
-
/******************************************************************************/
/* Line speed. */
/******************************************************************************/
@@ -266,7 +256,6 @@
typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED;
-
/******************************************************************************/
/* Duplex mode. */
/******************************************************************************/
@@ -277,7 +266,6 @@
typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE;
-
/******************************************************************************/
/* Power state. */
/******************************************************************************/
@@ -289,7 +277,6 @@
typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE;
-
/******************************************************************************/
/* Task offloading. */
/******************************************************************************/
@@ -305,7 +292,6 @@
typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD;
-
/******************************************************************************/
/* Flow control. */
/******************************************************************************/
@@ -324,7 +310,6 @@
typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL;
-
/******************************************************************************/
/* Wake up mode. */
/******************************************************************************/
@@ -336,7 +321,6 @@
typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE;
-
/******************************************************************************/
/* Counters. */
/******************************************************************************/
@@ -362,7 +346,6 @@
typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE;
-
/******************************************************************************/
/* Forward definition. */
/******************************************************************************/
@@ -370,82 +353,82 @@
typedef struct _LM_DEVICE_BLOCK *PLM_DEVICE_BLOCK;
typedef struct _LM_PACKET *PLM_PACKET;
-
/******************************************************************************/
/* Function prototypes. */
/******************************************************************************/
-LM_STATUS LM_GetAdapterInfo(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_InitializeAdapter(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_ResetAdapter(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_DisableInterrupt(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_EnableInterrupt(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_SendPacket(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
-LM_STATUS LM_ServiceInterrupts(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_QueueRxPackets(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_SetReceiveMask(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask);
-LM_STATUS LM_Halt(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_Abort(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_MulticastAdd(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
-LM_STATUS LM_MulticastDel(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
-LM_STATUS LM_MulticastClear(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_SetMacAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMacAddress);
-LM_STATUS LM_LoopbackAddress(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress);
+LM_STATUS LM_GetAdapterInfo (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_InitializeAdapter (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_ResetAdapter (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_DisableInterrupt (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_EnableInterrupt (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
+LM_STATUS LM_ServiceInterrupts (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_SetReceiveMask (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask);
+LM_STATUS LM_Halt (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_MulticastAdd (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
+LM_STATUS LM_MulticastDel (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress);
+LM_STATUS LM_MulticastClear (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_SetMacAddress (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMacAddress);
+LM_STATUS LM_LoopbackAddress (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pAddress);
-LM_UINT32 LM_GetCrcCounter(PLM_DEVICE_BLOCK pDevice);
+LM_UINT32 LM_GetCrcCounter (PLM_DEVICE_BLOCK pDevice);
-LM_WAKE_UP_MODE LM_PMCapabilities(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_NwufAdd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
- LM_UINT8 *pByteMask, LM_UINT8 *pPattern);
-LM_STATUS LM_NwufRemove(PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
- LM_UINT8 *pByteMask, LM_UINT8 *pPattern);
-LM_STATUS LM_SetPowerState(PLM_DEVICE_BLOCK pDevice, LM_POWER_STATE PowerLevel);
+LM_WAKE_UP_MODE LM_PMCapabilities (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_NwufAdd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
+ LM_UINT8 * pByteMask, LM_UINT8 * pPattern);
+LM_STATUS LM_NwufRemove (PLM_DEVICE_BLOCK pDevice, LM_UINT32 ByteMaskSize,
+ LM_UINT8 * pByteMask, LM_UINT8 * pPattern);
+LM_STATUS LM_SetPowerState (PLM_DEVICE_BLOCK pDevice,
+ LM_POWER_STATE PowerLevel);
-LM_VOID LM_ReadPhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
- PLM_UINT32 pData32);
-LM_VOID LM_WritePhy(PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
- LM_UINT32 Data32);
+LM_VOID LM_ReadPhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
+ PLM_UINT32 pData32);
+LM_VOID LM_WritePhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg,
+ LM_UINT32 Data32);
-LM_STATUS LM_ControlLoopBack(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Control);
-LM_STATUS LM_SetupPhy(PLM_DEVICE_BLOCK pDevice);
-int LM_BlinkLED(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration);
-
+LM_STATUS LM_ControlLoopBack (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Control);
+LM_STATUS LM_SetupPhy (PLM_DEVICE_BLOCK pDevice);
+int LM_BlinkLED (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration);
/******************************************************************************/
/* These are the OS specific functions called by LMAC. */
/******************************************************************************/
-LM_STATUS MM_ReadConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
- LM_UINT16 *pValue16);
-LM_STATUS MM_WriteConfig16(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
- LM_UINT16 Value16);
-LM_STATUS MM_ReadConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
- LM_UINT32 *pValue32);
-LM_STATUS MM_WriteConfig32(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
- LM_UINT32 Value32);
-LM_STATUS MM_MapMemBase(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS MM_MapIoBase(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS MM_IndicateRxPackets(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS MM_IndicateTxPackets(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS MM_StartTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
-LM_STATUS MM_CompleteTxDma(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
-LM_STATUS MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
- PLM_VOID *pMemoryBlockVirt);
-LM_STATUS MM_AllocateSharedMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
- PLM_VOID *pMemoryBlockVirt, PLM_PHYSICAL_ADDRESS pMemoryBlockPhy,
- LM_BOOL Cached);
-LM_STATUS MM_GetConfig(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS MM_IndicateStatus(PLM_DEVICE_BLOCK pDevice, LM_STATUS Status);
-LM_STATUS MM_InitializeUmPackets(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS MM_FreeRxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
-LM_STATUS MM_CoalesceTxBuffer(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
-LM_STATUS LM_MbufWorkAround(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_SetLinkSpeed(PLM_DEVICE_BLOCK pDevice,
- LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
+LM_STATUS MM_ReadConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
+ LM_UINT16 * pValue16);
+LM_STATUS MM_WriteConfig16 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
+ LM_UINT16 Value16);
+LM_STATUS MM_ReadConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
+ LM_UINT32 * pValue32);
+LM_STATUS MM_WriteConfig32 (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset,
+ LM_UINT32 Value32);
+LM_STATUS MM_MapMemBase (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS MM_MapIoBase (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS MM_IndicateRxPackets (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS MM_IndicateTxPackets (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS MM_StartTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
+LM_STATUS MM_CompleteTxDma (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
+LM_STATUS MM_AllocateMemory (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize,
+ PLM_VOID * pMemoryBlockVirt);
+LM_STATUS MM_AllocateSharedMemory (PLM_DEVICE_BLOCK pDevice,
+ LM_UINT32 BlockSize,
+ PLM_VOID * pMemoryBlockVirt,
+ PLM_PHYSICAL_ADDRESS pMemoryBlockPhy,
+ LM_BOOL Cached);
+LM_STATUS MM_GetConfig (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS MM_IndicateStatus (PLM_DEVICE_BLOCK pDevice, LM_STATUS Status);
+LM_STATUS MM_InitializeUmPackets (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS MM_FreeRxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
+LM_STATUS MM_CoalesceTxBuffer (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket);
+LM_STATUS LM_MbufWorkAround (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_SetLinkSpeed (PLM_DEVICE_BLOCK pDevice,
+ LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
#if INCLUDE_5703_A0_FIX
-LM_STATUS LM_Load5703DmaWFirmware(PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_Load5703DmaWFirmware (PLM_DEVICE_BLOCK pDevice);
#endif
-
-#endif /* LM_H */
+#endif /* LM_H */
diff --git a/drivers/bcm570x_mm.h b/drivers/bcm570x_mm.h
index b7cbf8a..ff5302f 100644
--- a/drivers/bcm570x_mm.h
+++ b/drivers/bcm570x_mm.h
@@ -45,7 +45,7 @@
#define MM_PACKET_DESC_SIZE MM_Packet_Desc_Size
-DECLARE_QUEUE_TYPE(UM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT+1);
+DECLARE_QUEUE_TYPE (UM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT + 1);
#define MAX_MEM 16
@@ -65,51 +65,50 @@
int mtu;
int index;
int opened;
- int delayed_link_ind; /* Delay link status during initial load */
- int adapter_just_inited; /* the first few seconds after init. */
- int spurious_int; /* new -- unsupported */
+ int delayed_link_ind; /* Delay link status during initial load */
+ int adapter_just_inited; /* the first few seconds after init. */
+ int spurious_int; /* new -- unsupported */
int timer_interval;
int adaptive_expiry;
- int crc_counter_expiry; /* new -- unsupported */
- int poll_tib_expiry; /* new -- unsupported */
+ int crc_counter_expiry; /* new -- unsupported */
+ int poll_tib_expiry; /* new -- unsupported */
int tx_full;
int tx_queued;
int line_speed; /* in Mbps, 0 if link is down */
UM_RX_PACKET_Q rx_out_of_buf_q;
int rx_out_of_buf;
- int rx_low_buf_thresh; /* changed to rx_buf_repl_thresh */
+ int rx_low_buf_thresh; /* changed to rx_buf_repl_thresh */
int rx_buf_repl_panic_thresh;
- int rx_buf_align; /* new -- unsupported */
+ int rx_buf_align; /* new -- unsupported */
int do_global_lock;
mutex_t global_lock;
mutex_t undi_lock;
long undi_flags;
volatile int interrupt;
int tasklet_pending;
- int tasklet_busy; /* new -- unsupported */
+ int tasklet_busy; /* new -- unsupported */
int rx_pkt;
int tx_pkt;
-#ifdef NICE_SUPPORT /* unsupported, this is a linux ioctl */
- void (*nice_rx)(void*, void* );
- void* nice_ctx;
-#endif /* NICE_SUPPORT */
+#ifdef NICE_SUPPORT /* unsupported, this is a linux ioctl */
+ void (*nice_rx) (void *, void *);
+ void *nice_ctx;
+#endif /* NICE_SUPPORT */
int rx_adaptive_coalesce;
unsigned int rx_last_cnt;
unsigned int tx_last_cnt;
unsigned int rx_curr_coalesce_frames;
unsigned int rx_curr_coalesce_ticks;
- unsigned int tx_curr_coalesce_frames; /* new -- unsupported */
-#if TIGON3_DEBUG /* new -- unsupported */
+ unsigned int tx_curr_coalesce_frames; /* new -- unsupported */
+#if TIGON3_DEBUG /* new -- unsupported */
uint tx_zc_count;
uint tx_chksum_count;
uint tx_himem_count;
uint rx_good_chksum_count;
#endif
- unsigned int rx_bad_chksum_count; /* new -- unsupported */
- unsigned int rx_misc_errors; /* new -- unsupported */
+ unsigned int rx_bad_chksum_count; /* new -- unsupported */
+ unsigned int rx_misc_errors; /* new -- unsupported */
} UM_DEVICE_BLOCK, *PUM_DEVICE_BLOCK;
-
/* Physical/PCI DMA address */
typedef union {
dma_addr_t dma_map;
@@ -117,9 +116,9 @@
/* Packet */
typedef struct
-_UM_PACKET {
- LM_PACKET lm_packet;
- void* skbuff; /* Address of packet buffer */
+ _UM_PACKET {
+ LM_PACKET lm_packet;
+ void *skbuff; /* Address of packet buffer */
} UM_PACKET, *PUM_PACKET;
#define MM_ACQUIRE_UNDI_LOCK(_pDevice)
@@ -137,15 +136,14 @@
#define MEM_TO_PCI_PHYS(addr) (addr)
-extern void MM_SetAddr (LM_PHYSICAL_ADDRESS *paddr, dma_addr_t addr);
-extern void MM_SetT3Addr(T3_64BIT_HOST_ADDR *paddr, dma_addr_t addr);
+extern void MM_SetAddr (LM_PHYSICAL_ADDRESS * paddr, dma_addr_t addr);
+extern void MM_SetT3Addr (T3_64BIT_HOST_ADDR * paddr, dma_addr_t addr);
extern void MM_MapTxDma (PLM_DEVICE_BLOCK pDevice,
- struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR *paddr,
- LM_UINT32 *len, int frag);
-extern void MM_MapRxDma ( PLM_DEVICE_BLOCK pDevice,
- struct _LM_PACKET *pPacket,
- T3_64BIT_HOST_ADDR *paddr);
-
+ struct _LM_PACKET *pPacket, T3_64BIT_HOST_ADDR * paddr,
+ LM_UINT32 * len, int frag);
+extern void MM_MapRxDma (PLM_DEVICE_BLOCK pDevice,
+ struct _LM_PACKET *pPacket,
+ T3_64BIT_HOST_ADDR * paddr);
/* BSP needs to provide sysUsecDelay and sysSerialPrintString */
extern void sysSerialPrintString (char *s);
@@ -157,4 +155,4 @@
#if 0
#define cpu_to_le32(val) LONGSWAP(val)
#endif
-#endif /* MM_H */
+#endif /* MM_H */
diff --git a/drivers/bios_emulator/Makefile b/drivers/bios_emulator/Makefile
new file mode 100644
index 0000000..90c64da
--- /dev/null
+++ b/drivers/bios_emulator/Makefile
@@ -0,0 +1,37 @@
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libatibiosemu.a
+
+X86DIR = x86emu
+
+$(shell mkdir -p $(obj)$(X86DIR))
+
+COBJS = atibios.o biosemu.o besys.o bios.o \
+ $(X86DIR)/decode.o \
+ $(X86DIR)/ops2.o \
+ $(X86DIR)/ops.o \
+ $(X86DIR)/prim_ops.o \
+ $(X86DIR)/sys.o \
+ $(X86DIR)/debug.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+EXTRA_CFLAGS += -I. -I./include -I$(TOPDIR)/include \
+ -D__PPC__ -D__BIG_ENDIAN__
+
+CFLAGS += $(EXTRA_CFLAGS)
+HOST_CFLAGS += $(EXTRA_CFLAGS)
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/drivers/bios_emulator/atibios.c b/drivers/bios_emulator/atibios.c
new file mode 100644
index 0000000..5779f99
--- /dev/null
+++ b/drivers/bios_emulator/atibios.c
@@ -0,0 +1,340 @@
+/****************************************************************************
+*
+* Video BOOT Graphics Card POST Module
+*
+* ========================================================================
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin <Jason.jin@freescale.com>
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
+*
+* This file may be distributed and/or modified under the terms of the
+* GNU General Public License version 2.0 as published by the Free
+* Software Foundation and appearing in the file LICENSE.GPL included
+* in the packaging of this file.
+*
+* Licensees holding a valid Commercial License for this product from
+* SciTech Software, Inc. may use this file in accordance with the
+* Commercial License Agreement provided with the Software.
+*
+* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
+* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+* PURPOSE.
+*
+* See http://www.scitechsoft.com/license/ for information about
+* the licensing options available and how to purchase a Commercial
+* License Agreement.
+*
+* Contact license@scitechsoft.com if any conditions of this licensing
+* are not clear to you, or you have questions about licensing options.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Linux Kernel
+* Developer: Kendall Bennett
+*
+* Description: Module to implement booting PCI/AGP controllers on the
+* bus. We use the x86 real mode emulator to run the BIOS on
+* graphics controllers to bring the cards up.
+*
+* Note that at present this module does *not* support
+* multiple controllers.
+*
+* The orignal name of this file is warmboot.c.
+* Jason ported this file to u-boot to run the ATI video card
+* BIOS in u-boot.
+****************************************************************************/
+#include <common.h>
+
+#ifdef CONFIG_BIOSEMU
+
+#include "biosemui.h"
+#include <malloc.h>
+
+/* Length of the BIOS image */
+#define MAX_BIOSLEN (128 * 1024L)
+
+/* Define some useful types and macros */
+#define true 1
+#define false 0
+
+/* Place to save PCI BAR's that we change and later restore */
+static u32 saveROMBaseAddress;
+static u32 saveBaseAddress10;
+static u32 saveBaseAddress14;
+static u32 saveBaseAddress18;
+static u32 saveBaseAddress20;
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus to boot
+VGAInfo - BIOS emulator VGA info structure
+
+REMARKS:
+This function executes the BIOS POST code on the controller. We assume that
+at this stage the controller has its I/O and memory space enabled and
+that all other controllers are in a disabled state.
+****************************************************************************/
+static void PCI_doBIOSPOST(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
+{
+ RMREGS regs;
+ RMSREGS sregs;
+
+ /* Determine the value to store in AX for BIOS POST. Per the PCI specs,
+ AH must contain the bus and AL must contain the devfn, encoded as
+ (dev << 3) | fn
+ */
+ memset(®s, 0, sizeof(regs));
+ memset(&sregs, 0, sizeof(sregs));
+ regs.x.ax = ((int)PCI_BUS(pcidev) << 8) |
+ ((int)PCI_DEV(pcidev) << 3) | (int)PCI_FUNC(pcidev);
+
+ /*Setup the X86 emulator for the VGA BIOS*/
+ BE_setVGA(VGAInfo);
+
+ /*Execute the BIOS POST code*/
+ BE_callRealMode(0xC000, 0x0003, ®s, &sregs);
+
+ /*Cleanup and exit*/
+ BE_getVGA(VGAInfo);
+}
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus
+bar - Place to return the base address register offset to use
+
+RETURNS:
+The address to use to map the secondary BIOS (AGP devices)
+
+REMARKS:
+Searches all the PCI base address registers for the device looking for a
+memory mapping that is large enough to hold our ROM BIOS. We usually end up
+finding the framebuffer mapping (usually BAR 0x10), and we use this mapping
+to map the BIOS for the device into. We use a mapping that is already
+assigned to the device to ensure the memory range will be passed through
+by any PCI->PCI or AGP->PCI bridge that may be present.
+
+NOTE: Usually this function is only used for AGP devices, but it may be
+ used for PCI devices that have already been POST'ed and the BIOS
+ ROM base address has been zero'ed out.
+
+NOTE: This function leaves the original memory aperture disabled by leaving
+ it programmed to all 1's. It must be restored to the correct value
+ later.
+****************************************************************************/
+static u32 PCI_findBIOSAddr(pci_dev_t pcidev, int *bar)
+{
+ u32 base, size;
+
+ for (*bar = 0x10; *bar <= 0x14; (*bar) += 4) {
+ pci_read_config_dword(pcidev, *bar, &base);
+ if (!(base & 0x1)) {
+ pci_write_config_dword(pcidev, *bar, 0xFFFFFFFF);
+ pci_read_config_dword(pcidev, *bar, &size);
+ size = ~(size & ~0xFF) + 1;
+ if (size >= MAX_BIOSLEN)
+ return base & ~0xFF;
+ }
+ }
+ return 0;
+}
+
+/****************************************************************************
+REMARKS:
+Some non-x86 Linux kernels map PCI relocateable I/O to values that
+are above 64K, which will not work with the BIOS image that requires
+the offset for the I/O ports to be a maximum of 16-bits. Ideally
+someone should fix the kernel to map the I/O ports for VGA compatible
+devices to a different location (or just all I/O ports since it is
+unlikely you can have enough devices in the machine to use up all
+64K of the I/O space - a total of more than 256 cards would be
+necessary).
+
+Anyway to fix this we change all I/O mapped base registers and
+chop off the top bits.
+****************************************************************************/
+static void PCI_fixupIObase(pci_dev_t pcidev, int reg, u32 * base)
+{
+ if ((*base & 0x1) && (*base > 0xFFFE)) {
+ *base &= 0xFFFF;
+ pci_write_config_dword(pcidev, reg, *base);
+
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus
+
+RETURNS:
+Pointers to the mapped BIOS image
+
+REMARKS:
+Maps a pointer to the BIOS image on the graphics card on the PCI bus.
+****************************************************************************/
+void *PCI_mapBIOSImage(pci_dev_t pcidev)
+{
+ u32 BIOSImagePhys;
+ int BIOSImageBAR;
+ u8 *BIOSImage;
+
+ /*Save PCI BAR registers that might get changed*/
+ pci_read_config_dword(pcidev, PCI_ROM_ADDRESS, &saveROMBaseAddress);
+ pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_0, &saveBaseAddress10);
+ pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
+ pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_2, &saveBaseAddress18);
+ pci_read_config_dword(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
+
+ /*Fix up I/O base registers to less than 64K */
+ if(saveBaseAddress14 != 0)
+ PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_1, &saveBaseAddress14);
+ else
+ PCI_fixupIObase(pcidev, PCI_BASE_ADDRESS_4, &saveBaseAddress20);
+
+ /* Some cards have problems that stop us from being able to read the
+ BIOS image from the ROM BAR. To fix this we have to do some chipset
+ specific programming for different cards to solve this problem.
+ */
+
+ if ((BIOSImagePhys = PCI_findBIOSAddr(pcidev, &BIOSImageBAR)) == 0) {
+ printf("Find bios addr error\n");
+ return NULL;
+ }
+
+ BIOSImage = (u8 *) BIOSImagePhys;
+
+ /*Change the PCI BAR registers to map it onto the bus.*/
+ pci_write_config_dword(pcidev, BIOSImageBAR, 0);
+ pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, BIOSImagePhys | 0x1);
+
+ udelay(1);
+
+ /*Check that the BIOS image is valid. If not fail, or return the
+ compiled in BIOS image if that option was enabled
+ */
+ if (BIOSImage[0] != 0x55 || BIOSImage[1] != 0xAA || BIOSImage[2] == 0) {
+ return NULL;
+ }
+
+ return BIOSImage;
+}
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus
+
+REMARKS:
+Unmaps the BIOS image for the device and restores framebuffer mappings
+****************************************************************************/
+void PCI_unmapBIOSImage(pci_dev_t pcidev, void *BIOSImage)
+{
+ pci_write_config_dword(pcidev, PCI_ROM_ADDRESS, saveROMBaseAddress);
+ pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_0, saveBaseAddress10);
+ pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_1, saveBaseAddress14);
+ pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_2, saveBaseAddress18);
+ pci_write_config_dword(pcidev, PCI_BASE_ADDRESS_4, saveBaseAddress20);
+}
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus to boot
+VGAInfo - BIOS emulator VGA info structure
+
+RETURNS:
+True if successfully initialised, false if not.
+
+REMARKS:
+Loads and POST's the display controllers BIOS, directly from the BIOS
+image we can extract over the PCI bus.
+****************************************************************************/
+static int PCI_postController(pci_dev_t pcidev, BE_VGAInfo * VGAInfo)
+{
+ u32 BIOSImageLen;
+ uchar *mappedBIOS;
+ uchar *copyOfBIOS;
+
+ /*Allocate memory to store copy of BIOS from display controller*/
+ if ((mappedBIOS = PCI_mapBIOSImage(pcidev)) == NULL) {
+ printf("videoboot: Video ROM failed to map!\n");
+ return false;
+ }
+
+ BIOSImageLen = mappedBIOS[2] * 512;
+
+ if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL) {
+ printf("videoboot: Out of memory!\n");
+ return false;
+ }
+ memcpy(copyOfBIOS, mappedBIOS, BIOSImageLen);
+
+ PCI_unmapBIOSImage(pcidev, mappedBIOS);
+
+ /*Save information in VGAInfo structure*/
+ VGAInfo->function = PCI_FUNC(pcidev);
+ VGAInfo->device = PCI_DEV(pcidev);
+ VGAInfo->bus = PCI_BUS(pcidev);
+ VGAInfo->pcidev = pcidev;
+ VGAInfo->BIOSImage = copyOfBIOS;
+ VGAInfo->BIOSImageLen = BIOSImageLen;
+
+ /*Now execute the BIOS POST for the device*/
+ if (copyOfBIOS[0] != 0x55 || copyOfBIOS[1] != 0xAA) {
+ printf("videoboot: Video ROM image is invalid!\n");
+ return false;
+ }
+
+ PCI_doBIOSPOST(pcidev, VGAInfo);
+
+ /*Reset the size of the BIOS image to the final size*/
+ VGAInfo->BIOSImageLen = copyOfBIOS[2] * 512;
+ return true;
+}
+
+/****************************************************************************
+PARAMETERS:
+pcidev - PCI device info for the video card on the bus to boot
+pVGAInfo - Place to return VGA info structure is requested
+cleanUp - True to clean up on exit, false to leave emulator active
+
+REMARKS:
+Boots the PCI/AGP video card on the bus using the Video ROM BIOS image
+and the X86 BIOS emulator module.
+****************************************************************************/
+int BootVideoCardBIOS(pci_dev_t pcidev, BE_VGAInfo ** pVGAInfo, int cleanUp)
+{
+ BE_VGAInfo *VGAInfo;
+
+ printf("videoboot: Booting PCI video card bus %d, function %d, device %d\n",
+ PCI_BUS(pcidev), PCI_FUNC(pcidev), PCI_DEV(pcidev));
+
+ /*Initialise the x86 BIOS emulator*/
+ if ((VGAInfo = malloc(sizeof(*VGAInfo))) == NULL) {
+ printf("videoboot: Out of memory!\n");
+ return false;
+ }
+ memset(VGAInfo, 0, sizeof(*VGAInfo));
+ BE_init(0, 65536, VGAInfo, 0);
+
+ /*Post all the display controller BIOS'es*/
+ PCI_postController(pcidev, VGAInfo);
+
+ /*Cleanup and exit the emulator if requested. If the BIOS emulator
+ is needed after booting the card, we will not call BE_exit and
+ leave it enabled for further use (ie: VESA driver etc).
+ */
+ if (cleanUp) {
+ BE_exit();
+ if (VGAInfo->BIOSImage)
+ free(VGAInfo->BIOSImage);
+ free(VGAInfo);
+ VGAInfo = NULL;
+ }
+ /*Return VGA info pointer if the caller requested it*/
+ if (pVGAInfo)
+ *pVGAInfo = VGAInfo;
+ return true;
+}
+
+#endif
diff --git a/drivers/bios_emulator/besys.c b/drivers/bios_emulator/besys.c
new file mode 100644
index 0000000..8f1d8b2
--- /dev/null
+++ b/drivers/bios_emulator/besys.c
@@ -0,0 +1,724 @@
+/****************************************************************************
+*
+* BIOS emulator and interface
+* to Realmode X86 Emulator Library
+*
+* ========================================================================
+*
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin<Jason.jin@freescale.com>
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc. All rights reserved.
+*
+* This file may be distributed and/or modified under the terms of the
+* GNU General Public License version 2.0 as published by the Free
+* Software Foundation and appearing in the file LICENSE.GPL included
+* in the packaging of this file.
+*
+* Licensees holding a valid Commercial License for this product from
+* SciTech Software, Inc. may use this file in accordance with the
+* Commercial License Agreement provided with the Software.
+*
+* This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING
+* THE WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
+* PURPOSE.
+*
+* See http://www.scitechsoft.com/license/ for information about
+* the licensing options available and how to purchase a Commercial
+* License Agreement.
+*
+* Contact license@scitechsoft.com if any conditions of this licensing
+* are not clear to you, or you have questions about licensing options.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file includes BIOS emulator I/O and memory access
+* functions.
+*
+* Jason ported this file to u-boot to run the ATI video card
+* BIOS in u-boot. Removed some emulate functions such as the
+* timer port access. Made all the VGA port except reading 0x3c3
+* be emulated. Seems like reading 0x3c3 should return the high
+* 16 bit of the io port.
+*
+****************************************************************************/
+
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "biosemui.h"
+
+/*------------------------- Global Variables ------------------------------*/
+
+#ifndef __i386__
+static char *BE_biosDate = "08/14/99";
+static u8 BE_model = 0xFC;
+static u8 BE_submodel = 0x00;
+#endif
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to convert
+
+RETURNS:
+Actual memory address to read or write the data
+
+REMARKS:
+This function converts an emulator memory address in a 32-bit range to
+a real memory address that we wish to access. It handles splitting up the
+memory address space appropriately to access the emulator BIOS image, video
+memory and system BIOS etc.
+****************************************************************************/
+static u8 *BE_memaddr(u32 addr)
+{
+ if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
+ return (u8*)(_BE_env.biosmem_base + addr - 0xC0000);
+ } else if (addr > _BE_env.biosmem_limit && addr < 0xD0000) {
+ DB(printf("BE_memaddr: address %#lx may be invalid!\n", addr);)
+ return M.mem_base;
+ } else if (addr >= 0xA0000 && addr <= 0xBFFFF) {
+ return (u8*)(_BE_env.busmem_base + addr - 0xA0000);
+ }
+#ifdef __i386__
+ else if (addr >= 0xD0000 && addr <= 0xFFFFF) {
+ /* We map the real System BIOS directly on real PC's */
+ DB(printf("BE_memaddr: System BIOS address %#lx\n", addr);)
+ return _BE_env.busmem_base + addr - 0xA0000;
+ }
+#else
+ else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {
+ /* Return a faked BIOS date string for non-x86 machines */
+ DB(printf("BE_memaddr - Returning BIOS date\n");)
+ return BE_biosDate + addr - 0xFFFF5;
+ } else if (addr == 0xFFFFE) {
+ /* Return system model identifier for non-x86 machines */
+ DB(printf("BE_memaddr - Returning model\n");)
+ return &BE_model;
+ } else if (addr == 0xFFFFF) {
+ /* Return system submodel identifier for non-x86 machines */
+ DB(printf("BE_memaddr - Returning submodel\n");)
+ return &BE_submodel;
+ }
+#endif
+ else if (addr > M.mem_size - 1) {
+ HALT_SYS();
+ return M.mem_base;
+ }
+
+ return M.mem_base + addr;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+
+RETURNS:
+Byte value read from emulator memory.
+
+REMARKS:
+Reads a byte value from the emulator memory. We have three distinct memory
+regions that are handled differently, which this function handles.
+****************************************************************************/
+u8 X86API BE_rdb(u32 addr)
+{
+ if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
+ return 0;
+ else {
+ u8 val = readb_le(BE_memaddr(addr));
+ return val;
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+
+RETURNS:
+Word value read from emulator memory.
+
+REMARKS:
+Reads a word value from the emulator memory. We have three distinct memory
+regions that are handled differently, which this function handles.
+****************************************************************************/
+u16 X86API BE_rdw(u32 addr)
+{
+ if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
+ return 0;
+ else {
+ u8 *base = BE_memaddr(addr);
+ u16 val = readw_le(base);
+ return val;
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+
+RETURNS:
+Long value read from emulator memory.
+
+REMARKS:
+Reads a 32-bit value from the emulator memory. We have three distinct memory
+regions that are handled differently, which this function handles.
+****************************************************************************/
+u32 X86API BE_rdl(u32 addr)
+{
+ if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)
+ return 0;
+ else {
+ u8 *base = BE_memaddr(addr);
+ u32 val = readl_le(base);
+ return val;
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+val - Value to store
+
+REMARKS:
+Writes a byte value to emulator memory. We have three distinct memory
+regions that are handled differently, which this function handles.
+****************************************************************************/
+void X86API BE_wrb(u32 addr, u8 val)
+{
+ if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
+ writeb_le(BE_memaddr(addr), val);
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+val - Value to store
+
+REMARKS:
+Writes a word value to emulator memory. We have three distinct memory
+regions that are handled differently, which this function handles.
+****************************************************************************/
+void X86API BE_wrw(u32 addr, u16 val)
+{
+ if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
+ u8 *base = BE_memaddr(addr);
+ writew_le(base, val);
+
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+val - Value to store
+
+REMARKS:
+Writes a 32-bit value to emulator memory. We have three distinct memory
+regions that are handled differently, which this function handles.
+****************************************************************************/
+void X86API BE_wrl(u32 addr, u32 val)
+{
+ if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {
+ u8 *base = BE_memaddr(addr);
+ writel_le(base, val);
+ }
+}
+
+#if defined(DEBUG) || !defined(__i386__)
+
+/* For Non-Intel machines we may need to emulate some I/O port accesses that
+ * the BIOS may try to access, such as the PCI config registers.
+ */
+
+#define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43)
+#define IS_CMOS_PORT(port) (0x70 <= port && port <= 0x71)
+/*#define IS_VGA_PORT(port) (_BE_env.emulateVGA && 0x3C0 <= port && port <= 0x3DA)*/
+#define IS_VGA_PORT(port) (0x3C0 <= port && port <= 0x3DA)
+#define IS_PCI_PORT(port) (0xCF8 <= port && port <= 0xCFF)
+#define IS_SPKR_PORT(port) (port == 0x61)
+
+/****************************************************************************
+PARAMETERS:
+port - Port to read from
+type - Type of access to perform
+
+REMARKS:
+Performs an emulated read from the Standard VGA I/O ports. If the target
+hardware does not support mapping the VGA I/O and memory (such as some
+PowerPC systems), we emulate the VGA so that the BIOS will still be able to
+set NonVGA display modes such as on ATI hardware.
+****************************************************************************/
+static u8 VGA_inpb (const int port)
+{
+ u8 val = 0xff;
+
+ switch (port) {
+ case 0x3C0:
+ /* 3C0 has funky characteristics because it can act as either
+ a data register or index register depending on the state
+ of an internal flip flop in the hardware. Hence we have
+ to emulate that functionality in here. */
+ if (_BE_env.flipFlop3C0 == 0) {
+ /* Access 3C0 as index register */
+ val = _BE_env.emu3C0;
+ } else {
+ /* Access 3C0 as data register */
+ if (_BE_env.emu3C0 < ATT_C)
+ val = _BE_env.emu3C1[_BE_env.emu3C0];
+ }
+ _BE_env.flipFlop3C0 ^= 1;
+ break;
+ case 0x3C1:
+ if (_BE_env.emu3C0 < ATT_C)
+ return _BE_env.emu3C1[_BE_env.emu3C0];
+ break;
+ case 0x3CC:
+ return _BE_env.emu3C2;
+ case 0x3C4:
+ return _BE_env.emu3C4;
+ case 0x3C5:
+ if (_BE_env.emu3C4 < ATT_C)
+ return _BE_env.emu3C5[_BE_env.emu3C4];
+ break;
+ case 0x3C6:
+ return _BE_env.emu3C6;
+ case 0x3C7:
+ return _BE_env.emu3C7;
+ case 0x3C8:
+ return _BE_env.emu3C8;
+ case 0x3C9:
+ if (_BE_env.emu3C7 < PAL_C)
+ return _BE_env.emu3C9[_BE_env.emu3C7++];
+ break;
+ case 0x3CE:
+ return _BE_env.emu3CE;
+ case 0x3CF:
+ if (_BE_env.emu3CE < GRA_C)
+ return _BE_env.emu3CF[_BE_env.emu3CE];
+ break;
+ case 0x3D4:
+ if (_BE_env.emu3C2 & 0x1)
+ return _BE_env.emu3D4;
+ break;
+ case 0x3D5:
+ if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
+ return _BE_env.emu3D5[_BE_env.emu3D4];
+ break;
+ case 0x3DA:
+ _BE_env.flipFlop3C0 = 0;
+ val = _BE_env.emu3DA;
+ _BE_env.emu3DA ^= 0x9;
+ break;
+ }
+ return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+type - Type of access to perform
+
+REMARKS:
+Performs an emulated write to one of the 8253 timer registers. For now
+we only emulate timer 0 which is the only timer that the BIOS code appears
+to use.
+****************************************************************************/
+static void VGA_outpb (int port, u8 val)
+{
+ switch (port) {
+ case 0x3C0:
+ /* 3C0 has funky characteristics because it can act as either
+ a data register or index register depending on the state
+ of an internal flip flop in the hardware. Hence we have
+ to emulate that functionality in here. */
+ if (_BE_env.flipFlop3C0 == 0) {
+ /* Access 3C0 as index register */
+ _BE_env.emu3C0 = val;
+ } else {
+ /* Access 3C0 as data register */
+ if (_BE_env.emu3C0 < ATT_C)
+ _BE_env.emu3C1[_BE_env.emu3C0] = val;
+ }
+ _BE_env.flipFlop3C0 ^= 1;
+ break;
+ case 0x3C2:
+ _BE_env.emu3C2 = val;
+ break;
+ case 0x3C4:
+ _BE_env.emu3C4 = val;
+ break;
+ case 0x3C5:
+ if (_BE_env.emu3C4 < ATT_C)
+ _BE_env.emu3C5[_BE_env.emu3C4] = val;
+ break;
+ case 0x3C6:
+ _BE_env.emu3C6 = val;
+ break;
+ case 0x3C7:
+ _BE_env.emu3C7 = (int) val *3;
+
+ break;
+ case 0x3C8:
+ _BE_env.emu3C8 = (int) val *3;
+
+ break;
+ case 0x3C9:
+ if (_BE_env.emu3C8 < PAL_C)
+ _BE_env.emu3C9[_BE_env.emu3C8++] = val;
+ break;
+ case 0x3CE:
+ _BE_env.emu3CE = val;
+ break;
+ case 0x3CF:
+ if (_BE_env.emu3CE < GRA_C)
+ _BE_env.emu3CF[_BE_env.emu3CE] = val;
+ break;
+ case 0x3D4:
+ if (_BE_env.emu3C2 & 0x1)
+ _BE_env.emu3D4 = val;
+ break;
+ case 0x3D5:
+ if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))
+ _BE_env.emu3D5[_BE_env.emu3D4] = val;
+ break;
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+regOffset - Offset into register space for non-DWORD accesses
+value - Value to write to register for PCI_WRITE_* operations
+func - Function to perform (PCIAccessRegFlags)
+
+RETURNS:
+Value read from configuration register for PCI_READ_* operations
+
+REMARKS:
+Accesses a PCI configuration space register by decoding the value currently
+stored in the _BE_env.configAddress variable and passing it through to the
+portable PCI_accessReg function.
+****************************************************************************/
+static u32 BE_accessReg(int regOffset, u32 value, int func)
+{
+#ifdef __KERNEL__
+ int function, device, bus;
+ u8 val8;
+ u16 val16;
+ u32 val32;
+
+
+ /* Decode the configuration register values for the register we wish to
+ * access
+ */
+ regOffset += (_BE_env.configAddress & 0xFF);
+ function = (_BE_env.configAddress >> 8) & 0x7;
+ device = (_BE_env.configAddress >> 11) & 0x1F;
+ bus = (_BE_env.configAddress >> 16) & 0xFF;
+
+ /* Ignore accesses to all devices other than the one we're POSTing */
+ if ((function == _BE_env.vgaInfo.function) &&
+ (device == _BE_env.vgaInfo.device) &&
+ (bus == _BE_env.vgaInfo.bus)) {
+ switch (func) {
+ case REG_READ_BYTE:
+ pci_read_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
+ &val8);
+ return val8;
+ case REG_READ_WORD:
+ pci_read_config_word(_BE_env.vgaInfo.pcidev, regOffset,
+ &val16);
+ return val16;
+ case REG_READ_DWORD:
+ pci_read_config_dword(_BE_env.vgaInfo.pcidev, regOffset,
+ &val32);
+ return val32;
+ case REG_WRITE_BYTE:
+ pci_write_config_byte(_BE_env.vgaInfo.pcidev, regOffset,
+ value);
+
+ return 0;
+ case REG_WRITE_WORD:
+ pci_write_config_word(_BE_env.vgaInfo.pcidev, regOffset,
+ value);
+
+ return 0;
+ case REG_WRITE_DWORD:
+ pci_write_config_dword(_BE_env.vgaInfo.pcidev,
+ regOffset, value);
+
+ return 0;
+ }
+ }
+ return 0;
+#else
+ PCIDeviceInfo pciInfo;
+
+ pciInfo.mech1 = 1;
+ pciInfo.slot.i = 0;
+ pciInfo.slot.p.Function = (_BE_env.configAddress >> 8) & 0x7;
+ pciInfo.slot.p.Device = (_BE_env.configAddress >> 11) & 0x1F;
+ pciInfo.slot.p.Bus = (_BE_env.configAddress >> 16) & 0xFF;
+ pciInfo.slot.p.Enable = 1;
+
+ /* Ignore accesses to all devices other than the one we're POSTing */
+ if ((pciInfo.slot.p.Function ==
+ _BE_env.vgaInfo.pciInfo->slot.p.Function)
+ && (pciInfo.slot.p.Device == _BE_env.vgaInfo.pciInfo->slot.p.Device)
+ && (pciInfo.slot.p.Bus == _BE_env.vgaInfo.pciInfo->slot.p.Bus))
+ return PCI_accessReg((_BE_env.configAddress & 0xFF) + regOffset,
+ value, func, &pciInfo);
+ return 0;
+#endif
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to read from
+type - Type of access to perform
+
+REMARKS:
+Performs an emulated read from one of the PCI configuration space registers.
+We emulate this using our PCI_accessReg function which will access the PCI
+configuration space registers in a portable fashion.
+****************************************************************************/
+static u32 PCI_inp(int port, int type)
+{
+ switch (type) {
+ case REG_READ_BYTE:
+ if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
+ && port <= 0xCFF)
+ return BE_accessReg(port - 0xCFC, 0, REG_READ_BYTE);
+ break;
+ case REG_READ_WORD:
+ if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
+ && port <= 0xCFF)
+ return BE_accessReg(port - 0xCFC, 0, REG_READ_WORD);
+ break;
+ case REG_READ_DWORD:
+ if (port == 0xCF8)
+ return _BE_env.configAddress;
+ else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
+ return BE_accessReg(0, 0, REG_READ_DWORD);
+ break;
+ }
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+type - Type of access to perform
+
+REMARKS:
+Performs an emulated write to one of the PCI control registers.
+****************************************************************************/
+static void PCI_outp(int port, u32 val, int type)
+{
+ switch (type) {
+ case REG_WRITE_BYTE:
+ if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
+ && port <= 0xCFF)
+ BE_accessReg(port - 0xCFC, val, REG_WRITE_BYTE);
+ break;
+ case REG_WRITE_WORD:
+ if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port
+ && port <= 0xCFF)
+ BE_accessReg(port - 0xCFC, val, REG_WRITE_WORD);
+ break;
+ case REG_WRITE_DWORD:
+ if (port == 0xCF8)
+ {
+ _BE_env.configAddress = val & 0x80FFFFFC;
+ }
+ else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)
+ BE_accessReg(0, val, REG_WRITE_DWORD);
+ break;
+ }
+}
+
+#endif
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+
+RETURNS:
+Value read from the I/O port
+
+REMARKS:
+Performs an emulated 8-bit read from an I/O port. We handle special cases
+that we need to emulate in here, and fall through to reflecting the write
+through to the real hardware if we don't need to special case it.
+****************************************************************************/
+u8 X86API BE_inb(X86EMU_pioAddr port)
+{
+ u8 val = 0;
+
+#if defined(DEBUG) || !defined(__i386__)
+ if (IS_VGA_PORT(port)){
+ /*seems reading port 0x3c3 return the high 16 bit of io port*/
+ if(port == 0x3c3)
+ val = LOG_inpb(port);
+ else
+ val = VGA_inpb(port);
+ }
+ else if (IS_TIMER_PORT(port))
+ DB(printf("Can not interept TIMER port now!\n");)
+ else if (IS_SPKR_PORT(port))
+ DB(printf("Can not interept SPEAKER port now!\n");)
+ else if (IS_CMOS_PORT(port))
+ DB(printf("Can not interept CMOS port now!\n");)
+ else if (IS_PCI_PORT(port))
+ val = PCI_inp(port, REG_READ_BYTE);
+ else if (port < 0x100) {
+ DB(printf("WARN: INVALID inb.%04X -> %02X\n", (u16) port, val);)
+ val = LOG_inpb(port);
+ } else
+#endif
+ val = LOG_inpb(port);
+ return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+
+RETURNS:
+Value read from the I/O port
+
+REMARKS:
+Performs an emulated 16-bit read from an I/O port. We handle special cases
+that we need to emulate in here, and fall through to reflecting the write
+through to the real hardware if we don't need to special case it.
+****************************************************************************/
+u16 X86API BE_inw(X86EMU_pioAddr port)
+{
+ u16 val = 0;
+
+#if defined(DEBUG) || !defined(__i386__)
+ if (IS_PCI_PORT(port))
+ val = PCI_inp(port, REG_READ_WORD);
+ else if (port < 0x100) {
+ DB(printf("WARN: Maybe INVALID inw.%04X -> %04X\n", (u16) port, val);)
+ val = LOG_inpw(port);
+ } else
+#endif
+ val = LOG_inpw(port);
+ return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+
+RETURNS:
+Value read from the I/O port
+
+REMARKS:
+Performs an emulated 32-bit read from an I/O port. We handle special cases
+that we need to emulate in here, and fall through to reflecting the write
+through to the real hardware if we don't need to special case it.
+****************************************************************************/
+u32 X86API BE_inl(X86EMU_pioAddr port)
+{
+ u32 val = 0;
+
+#if defined(DEBUG) || !defined(__i386__)
+ if (IS_PCI_PORT(port))
+ val = PCI_inp(port, REG_READ_DWORD);
+ else if (port < 0x100) {
+ val = LOG_inpd(port);
+ } else
+#endif
+ val = LOG_inpd(port);
+ return val;
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+val - Value to write to port
+
+REMARKS:
+Performs an emulated 8-bit write to an I/O port. We handle special cases
+that we need to emulate in here, and fall through to reflecting the write
+through to the real hardware if we don't need to special case it.
+****************************************************************************/
+void X86API BE_outb(X86EMU_pioAddr port, u8 val)
+{
+#if defined(DEBUG) || !defined(__i386__)
+ if (IS_VGA_PORT(port))
+ VGA_outpb(port, val);
+ else if (IS_TIMER_PORT(port))
+ DB(printf("Can not interept TIMER port now!\n");)
+ else if (IS_SPKR_PORT(port))
+ DB(printf("Can not interept SPEAKER port now!\n");)
+ else if (IS_CMOS_PORT(port))
+ DB(printf("Can not interept CMOS port now!\n");)
+ else if (IS_PCI_PORT(port))
+ PCI_outp(port, val, REG_WRITE_BYTE);
+ else if (port < 0x100) {
+ DB(printf("WARN:Maybe INVALID outb.%04X <- %02X\n", (u16) port, val);)
+ LOG_outpb(port, val);
+ } else
+#endif
+ LOG_outpb(port, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+val - Value to write to port
+
+REMARKS:
+Performs an emulated 16-bit write to an I/O port. We handle special cases
+that we need to emulate in here, and fall through to reflecting the write
+through to the real hardware if we don't need to special case it.
+****************************************************************************/
+void X86API BE_outw(X86EMU_pioAddr port, u16 val)
+{
+#if defined(DEBUG) || !defined(__i386__)
+ if (IS_VGA_PORT(port)) {
+ VGA_outpb(port, val);
+ VGA_outpb(port + 1, val >> 8);
+ } else if (IS_PCI_PORT(port))
+ PCI_outp(port, val, REG_WRITE_WORD);
+ else if (port < 0x100) {
+ DB(printf("WARN: MAybe INVALID outw.%04X <- %04X\n", (u16) port,
+ val);)
+ LOG_outpw(port, val);
+ } else
+#endif
+ LOG_outpw(port, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+port - Port to write to
+val - Value to write to port
+
+REMARKS:
+Performs an emulated 32-bit write to an I/O port. We handle special cases
+that we need to emulate in here, and fall through to reflecting the write
+through to the real hardware if we don't need to special case it.
+****************************************************************************/
+void X86API BE_outl(X86EMU_pioAddr port, u32 val)
+{
+#if defined(DEBUG) || !defined(__i386__)
+ if (IS_PCI_PORT(port))
+ PCI_outp(port, val, REG_WRITE_DWORD);
+ else if (port < 0x100) {
+ DB(printf("WARN: INVALID outl.%04X <- %08X\n", (u16) port,val);)
+ LOG_outpd(port, val);
+ } else
+#endif
+ LOG_outpd(port, val);
+}
+#endif
diff --git a/drivers/bios_emulator/bios.c b/drivers/bios_emulator/bios.c
new file mode 100644
index 0000000..70e9ce1
--- /dev/null
+++ b/drivers/bios_emulator/bios.c
@@ -0,0 +1,326 @@
+/****************************************************************************
+*
+* BIOS emulator and interface
+* to Realmode X86 Emulator Library
+*
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin <Jason.jin@freescale.com>
+*
+* Copyright (C) 1996-1999 SciTech Software, Inc.
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Module implementing the BIOS specific functions.
+*
+* Jason ported this file to u-boot to run the ATI video card
+* video BIOS.
+*
+****************************************************************************/
+
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "biosemui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+intno - Interrupt number being serviced
+
+REMARKS:
+Handler for undefined interrupts.
+****************************************************************************/
+static void X86API undefined_intr(int intno)
+{
+ if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
+ DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
+ } else
+ X86EMU_prepareForInt(intno);
+}
+
+/****************************************************************************
+PARAMETERS:
+intno - Interrupt number being serviced
+
+REMARKS:
+This function handles the default system BIOS Int 10h (the default is stored
+in the Int 42h vector by the system BIOS at bootup). We only need to handle
+a small number of special functions used by the BIOS during POST time.
+****************************************************************************/
+static void X86API int42(int intno)
+{
+ if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
+ if (M.x86.R_AL == 0) {
+ /* Enable CPU accesses to video memory */
+ PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
+ return;
+ } else if (M.x86.R_AL == 1) {
+ /* Disable CPU accesses to video memory */
+ PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
+ return;
+ }
+#ifdef DEBUG
+ else {
+ printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
+ M.x86.R_AL);
+ }
+#endif
+ }
+#ifdef DEBUG
+ else {
+ printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
+ M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
+ }
+#endif
+}
+
+/****************************************************************************
+PARAMETERS:
+intno - Interrupt number being serviced
+
+REMARKS:
+This function handles the default system BIOS Int 10h. If the POST code
+has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
+by simply calling the int42 interrupt handler above. Very early in the
+BIOS POST process, the vector gets replaced and we simply let the real
+mode interrupt handler process the interrupt.
+****************************************************************************/
+static void X86API int10(int intno)
+{
+ if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
+ int42(intno);
+ else
+ X86EMU_prepareForInt(intno);
+}
+
+/* Result codes returned by the PCI BIOS */
+
+#define SUCCESSFUL 0x00
+#define FUNC_NOT_SUPPORT 0x81
+#define BAD_VENDOR_ID 0x83
+#define DEVICE_NOT_FOUND 0x86
+#define BAD_REGISTER_NUMBER 0x87
+#define SET_FAILED 0x88
+#define BUFFER_TOO_SMALL 0x89
+
+/****************************************************************************
+PARAMETERS:
+intno - Interrupt number being serviced
+
+REMARKS:
+This function handles the default Int 1Ah interrupt handler for the real
+mode code, which provides support for the PCI BIOS functions. Since we only
+want to allow the real mode BIOS code *only* see the PCI config space for
+its own device, we only return information for the specific PCI config
+space that we have passed in to the init function. This solves problems
+when using the BIOS to warm boot a secondary adapter when there is an
+identical adapter before it on the bus (some BIOS'es get confused in this
+case).
+****************************************************************************/
+static void X86API int1A(int unused)
+{
+ u16 pciSlot;
+
+#ifdef __KERNEL__
+ u8 interface, subclass, baseclass;
+
+ /* Initialise the PCI slot number */
+ pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
+ ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
+#else
+/* Fail if no PCI device information has been registered */
+ if (!_BE_env.vgaInfo.pciInfo)
+ return;
+
+ pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
+#endif
+ switch (M.x86.R_AX) {
+ case 0xB101: /* PCI bios present? */
+ M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
+ M.x86.R_EDX = 0x20494350; /* " ICP" */
+ M.x86.R_BX = 0x0210; /* Version 2.10 */
+ M.x86.R_CL = 0; /* Max bus number in system */
+ CLEAR_FLAG(F_CF);
+ break;
+ case 0xB102: /* Find PCI device */
+ M.x86.R_AH = DEVICE_NOT_FOUND;
+#ifdef __KERNEL__
+ if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
+ M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
+#else
+ if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
+ M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
+ M.x86.R_SI == 0) {
+#endif
+ M.x86.R_AH = SUCCESSFUL;
+ M.x86.R_BX = pciSlot;
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB103: /* Find PCI class code */
+ M.x86.R_AH = DEVICE_NOT_FOUND;
+#ifdef __KERNEL__
+ pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
+ &interface);
+ pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
+ &subclass);
+ pci_read_config_byte(_BE_env.vgaInfo.pcidev,
+ PCI_CLASS_DEVICE + 1, &baseclass);
+ if (M.x86.R_CL == interface && M.x86.R_CH == subclass
+ && (u8) (M.x86.R_ECX >> 16) == baseclass) {
+#else
+ if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
+ M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
+ (u8) (M.x86.R_ECX >> 16) ==
+ _BE_env.vgaInfo.pciInfo->BaseClass) {
+#endif
+ M.x86.R_AH = SUCCESSFUL;
+ M.x86.R_BX = pciSlot;
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB108: /* Read configuration byte */
+ M.x86.R_AH = BAD_REGISTER_NUMBER;
+ if (M.x86.R_BX == pciSlot) {
+ M.x86.R_AH = SUCCESSFUL;
+#ifdef __KERNEL__
+ pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
+ &M.x86.R_CL);
+#else
+ M.x86.R_CL =
+ (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
+ _BE_env.vgaInfo.pciInfo);
+#endif
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB109: /* Read configuration word */
+ M.x86.R_AH = BAD_REGISTER_NUMBER;
+ if (M.x86.R_BX == pciSlot) {
+ M.x86.R_AH = SUCCESSFUL;
+#ifdef __KERNEL__
+ pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
+ &M.x86.R_CX);
+#else
+ M.x86.R_CX =
+ (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
+ _BE_env.vgaInfo.pciInfo);
+#endif
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB10A: /* Read configuration dword */
+ M.x86.R_AH = BAD_REGISTER_NUMBER;
+ if (M.x86.R_BX == pciSlot) {
+ M.x86.R_AH = SUCCESSFUL;
+#ifdef __KERNEL__
+ pci_read_config_dword(_BE_env.vgaInfo.pcidev,
+ M.x86.R_DI, &M.x86.R_ECX);
+#else
+ M.x86.R_ECX =
+ (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
+ _BE_env.vgaInfo.pciInfo);
+#endif
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB10B: /* Write configuration byte */
+ M.x86.R_AH = BAD_REGISTER_NUMBER;
+ if (M.x86.R_BX == pciSlot) {
+ M.x86.R_AH = SUCCESSFUL;
+#ifdef __KERNEL__
+ pci_write_config_byte(_BE_env.vgaInfo.pcidev,
+ M.x86.R_DI, M.x86.R_CL);
+#else
+ PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
+ _BE_env.vgaInfo.pciInfo);
+#endif
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB10C: /* Write configuration word */
+ M.x86.R_AH = BAD_REGISTER_NUMBER;
+ if (M.x86.R_BX == pciSlot) {
+ M.x86.R_AH = SUCCESSFUL;
+#ifdef __KERNEL__
+ pci_write_config_word(_BE_env.vgaInfo.pcidev,
+ M.x86.R_DI, M.x86.R_CX);
+#else
+ PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
+ _BE_env.vgaInfo.pciInfo);
+#endif
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ case 0xB10D: /* Write configuration dword */
+ M.x86.R_AH = BAD_REGISTER_NUMBER;
+ if (M.x86.R_BX == pciSlot) {
+ M.x86.R_AH = SUCCESSFUL;
+#ifdef __KERNEL__
+ pci_write_config_dword(_BE_env.vgaInfo.pcidev,
+ M.x86.R_DI, M.x86.R_ECX);
+#else
+ PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
+ _BE_env.vgaInfo.pciInfo);
+#endif
+ }
+ CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
+ break;
+ default:
+ printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
+ M.x86.R_AX);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+This function initialises the BIOS emulation functions for the specific
+PCI display device. We insulate the real mode BIOS from any other devices
+on the bus, so that it will work correctly thinking that it is the only
+device present on the bus (ie: avoiding any adapters present in from of
+the device we are trying to control).
+****************************************************************************/
+#define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
+
+void _BE_bios_init(u32 * intrTab)
+{
+ int i;
+ X86EMU_intrFuncs bios_intr_tab[256];
+
+ for (i = 0; i < 256; ++i) {
+ intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
+ bios_intr_tab[i] = undefined_intr;
+ }
+ bios_intr_tab[0x10] = int10;
+ bios_intr_tab[0x1A] = int1A;
+ bios_intr_tab[0x42] = int42;
+ bios_intr_tab[0x6D] = int10;
+ X86EMU_setupIntrFuncs(bios_intr_tab);
+}
+#endif
diff --git a/drivers/bios_emulator/biosemu.c b/drivers/bios_emulator/biosemu.c
new file mode 100644
index 0000000..ccfc872
--- /dev/null
+++ b/drivers/bios_emulator/biosemu.c
@@ -0,0 +1,375 @@
+/****************************************************************************
+*
+* BIOS emulator and interface
+* to Realmode X86 Emulator Library
+*
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin <Jason.jin@freescale.com>
+*
+* Copyright (C) 1996-1999 SciTech Software, Inc.
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Module implementing the system specific functions. This
+* module is always compiled and linked in the OS depedent
+* libraries, and never in a binary portable driver.
+*
+* Jason ported this file to u-boot to run the ATI video card BIOS
+* in u-boot. Made all the video memory be emulated during the
+* BIOS runing process which may affect the VGA function but the
+* frambuffer function can work after run the BIOS.
+*
+****************************************************************************/
+
+#include <malloc.h>
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "biosemui.h"
+
+BE_sysEnv _BE_env = {{0}};
+static X86EMU_memFuncs _BE_mem __attribute__((section(".got2"))) = {
+ BE_rdb,
+ BE_rdw,
+ BE_rdl,
+ BE_wrb,
+ BE_wrw,
+ BE_wrl,
+ };
+
+static X86EMU_pioFuncs _BE_pio __attribute__((section(".got2"))) = {
+ BE_inb,
+ BE_inw,
+ BE_inl,
+ BE_outb,
+ BE_outw,
+ BE_outl,
+ };
+
+#define OFF(addr) (u16)(((addr) >> 0) & 0xffff)
+#define SEG(addr) (u16)(((addr) >> 4) & 0xf000)
+
+/****************************************************************************
+PARAMETERS:
+debugFlags - Flags to enable debugging options (debug builds only)
+memSize - Amount of memory to allocate for real mode machine
+info - Pointer to default VGA device information
+
+REMARKS:
+This functions initialises the BElib, and uses the passed in
+BIOS image as the BIOS that is used and emulated at 0xC0000.
+****************************************************************************/
+int X86API BE_init(u32 debugFlags, int memSize, BE_VGAInfo * info, int shared)
+{
+#if !defined(__DRIVER__) && !defined(__KERNEL__)
+
+ PM_init();
+#endif
+ memset(&M, 0, sizeof(M));
+ if (memSize < 20480){
+ printf("Emulator requires at least 20Kb of memory!\n");
+ return 0;
+ }
+
+ M.mem_base = (unsigned long)malloc(memSize);
+
+ if (M.mem_base == NULL){
+ printf("Biosemu:Out of memory!");
+ return 0;
+ }
+ M.mem_size = memSize;
+
+ _BE_env.emulateVGA = 0;
+ _BE_env.busmem_base = (unsigned long)malloc(128 * 1024);
+ if (_BE_env.busmem_base == NULL){
+ printf("Biosemu:Out of memory!");
+ return 0;
+ }
+ M.x86.debug = debugFlags;
+ _BE_bios_init((u32*)info->LowMem);
+ X86EMU_setupMemFuncs(&_BE_mem);
+ X86EMU_setupPioFuncs(&_BE_pio);
+ BE_setVGA(info);
+ return 1;
+}
+
+/****************************************************************************
+PARAMETERS:
+info - Pointer to VGA device information to make current
+
+REMARKS:
+This function sets the VGA BIOS functions in the emulator to point to the
+specific VGA BIOS in use. This includes swapping the BIOS interrupt
+vectors, BIOS image and BIOS data area to the new BIOS. This allows the
+real mode BIOS to be swapped without resetting the entire emulator.
+****************************************************************************/
+void X86API BE_setVGA(BE_VGAInfo * info)
+{
+
+#ifdef __KERNEL__
+ _BE_env.vgaInfo.function = info->function;
+ _BE_env.vgaInfo.device = info->device;
+ _BE_env.vgaInfo.bus = info->bus;
+ _BE_env.vgaInfo.pcidev = info->pcidev;
+#else
+ _BE_env.vgaInfo.pciInfo = info->pciInfo;
+#endif
+ _BE_env.vgaInfo.BIOSImage = info->BIOSImage;
+ if (info->BIOSImage) {
+ _BE_env.biosmem_base = (ulong) info->BIOSImage;
+ _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen - 1;
+ } else {
+ _BE_env.biosmem_base = _BE_env.busmem_base + 0x20000;
+ _BE_env.biosmem_limit = 0xC7FFF;
+ }
+ if (*((u32 *) info->LowMem) == 0)
+ _BE_bios_init((u32 *) info->LowMem);
+ memcpy((u8 *) M.mem_base, info->LowMem, sizeof(info->LowMem));
+}
+
+/****************************************************************************
+PARAMETERS:
+info - Pointer to VGA device information to retrieve current
+
+REMARKS:
+This function returns the VGA BIOS functions currently active in the
+emulator, so they can be restored at a later date.
+****************************************************************************/
+void X86API BE_getVGA(BE_VGAInfo * info)
+{
+#ifdef __KERNEL__
+ info->function = _BE_env.vgaInfo.function;
+ info->device = _BE_env.vgaInfo.device;
+ info->bus = _BE_env.vgaInfo.bus;
+ info->pcidev = _BE_env.vgaInfo.pcidev;
+#else
+ info->pciInfo = _BE_env.vgaInfo.pciInfo;
+#endif
+ info->BIOSImage = _BE_env.vgaInfo.BIOSImage;
+ memcpy(info->LowMem, (u8 *) M.mem_base, sizeof(info->LowMem));
+}
+
+/****************************************************************************
+PARAMETERS:
+r_seg - Segment for pointer to convert
+r_off - Offset for pointer to convert
+
+REMARKS:
+This function maps a real mode pointer in the emulator memory to a protected
+mode pointer that can be used to directly access the memory.
+
+NOTE: The memory is *always* in little endian format, son on non-x86
+ systems you will need to do endian translations to access this
+ memory.
+****************************************************************************/
+void *X86API BE_mapRealPointer(uint r_seg, uint r_off)
+{
+ u32 addr = ((u32) r_seg << 4) + r_off;
+
+ if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {
+ return (void *)(_BE_env.biosmem_base + addr - 0xC0000);
+ } else if (addr >= 0xA0000 && addr <= 0xFFFFF) {
+ return (void *)(_BE_env.busmem_base + addr - 0xA0000);
+ }
+ return (void *)(M.mem_base + addr);
+}
+
+/****************************************************************************
+PARAMETERS:
+len - Return the length of the VESA buffer
+rseg - Place to store VESA buffer segment
+roff - Place to store VESA buffer offset
+
+REMARKS:
+This function returns the address of the VESA transfer buffer in real
+_BE_piomode emulator memory. The VESA transfer buffer is always 1024 bytes long,
+and located at 15Kb into the start of the real mode memory (16Kb is where
+we put the real mode code we execute for issuing interrupts).
+
+NOTE: The memory is *always* in little endian format, son on non-x86
+ systems you will need to do endian translations to access this
+ memory.
+****************************************************************************/
+void *X86API BE_getVESABuf(uint * len, uint * rseg, uint * roff)
+{
+ *len = 1024;
+ *rseg = SEG(0x03C00);
+ *roff = OFF(0x03C00);
+ return (void *)(M.mem_base + ((u32) * rseg << 4) + *roff);
+}
+
+/****************************************************************************
+REMARKS:
+Cleans up and exits the emulator.
+****************************************************************************/
+void X86API BE_exit(void)
+{
+ free(M.mem_base);
+ free(_BE_env.busmem_base);
+}
+
+/****************************************************************************
+PARAMETERS:
+seg - Segment of code to call
+off - Offset of code to call
+regs - Real mode registers to load
+sregs - Real mode segment registers to load
+
+REMARKS:
+This functions calls a real mode far function at the specified address,
+and loads all the x86 registers from the passed in registers structure.
+On exit the registers returned from the call are returned in the same
+structures.
+****************************************************************************/
+void X86API BE_callRealMode(uint seg, uint off, RMREGS * regs, RMSREGS * sregs)
+{
+ M.x86.R_EAX = regs->e.eax;
+ M.x86.R_EBX = regs->e.ebx;
+ M.x86.R_ECX = regs->e.ecx;
+ M.x86.R_EDX = regs->e.edx;
+ M.x86.R_ESI = regs->e.esi;
+ M.x86.R_EDI = regs->e.edi;
+ M.x86.R_DS = sregs->ds;
+ M.x86.R_ES = sregs->es;
+ M.x86.R_FS = sregs->fs;
+ M.x86.R_GS = sregs->gs;
+
+ ((u8 *) M.mem_base)[0x4000] = 0x9A;
+ ((u8 *) M.mem_base)[0x4001] = (u8) off;
+ ((u8 *) M.mem_base)[0x4002] = (u8) (off >> 8);
+ ((u8 *) M.mem_base)[0x4003] = (u8) seg;
+ ((u8 *) M.mem_base)[0x4004] = (u8) (seg >> 8);
+ ((u8 *) M.mem_base)[0x4005] = 0xF1; /* Illegal op-code */
+ M.x86.R_CS = SEG(0x04000);
+ M.x86.R_IP = OFF(0x04000);
+
+ M.x86.R_SS = SEG(M.mem_size - 2);
+ M.x86.R_SP = OFF(M.mem_size - 2) + 2;
+
+ X86EMU_exec();
+
+ regs->e.cflag = M.x86.R_EFLG & F_CF;
+ regs->e.eax = M.x86.R_EAX;
+ regs->e.ebx = M.x86.R_EBX;
+ regs->e.ecx = M.x86.R_ECX;
+ regs->e.edx = M.x86.R_EDX;
+ regs->e.esi = M.x86.R_ESI;
+ regs->e.edi = M.x86.R_EDI;
+ sregs->ds = M.x86.R_DS;
+ sregs->es = M.x86.R_ES;
+ sregs->fs = M.x86.R_FS;
+ sregs->gs = M.x86.R_GS;
+}
+
+/****************************************************************************
+PARAMETERS:
+intno - Interrupt number to execute
+in - Real mode registers to load
+out - Place to store resulting real mode registers
+
+REMARKS:
+This functions calls a real mode interrupt function at the specified address,
+and loads all the x86 registers from the passed in registers structure.
+On exit the registers returned from the call are returned in out stucture.
+****************************************************************************/
+int X86API BE_int86(int intno, RMREGS * in, RMREGS * out)
+{
+ M.x86.R_EAX = in->e.eax;
+ M.x86.R_EBX = in->e.ebx;
+ M.x86.R_ECX = in->e.ecx;
+ M.x86.R_EDX = in->e.edx;
+ M.x86.R_ESI = in->e.esi;
+ M.x86.R_EDI = in->e.edi;
+ ((u8 *) M.mem_base)[0x4000] = 0xCD;
+ ((u8 *) M.mem_base)[0x4001] = (u8) intno;
+ ((u8 *) M.mem_base)[0x4002] = 0xF1;
+ M.x86.R_CS = SEG(0x04000);
+ M.x86.R_IP = OFF(0x04000);
+
+ M.x86.R_SS = SEG(M.mem_size - 1);
+ M.x86.R_SP = OFF(M.mem_size - 1) - 1;
+
+ X86EMU_exec();
+ out->e.cflag = M.x86.R_EFLG & F_CF;
+ out->e.eax = M.x86.R_EAX;
+ out->e.ebx = M.x86.R_EBX;
+ out->e.ecx = M.x86.R_ECX;
+ out->e.edx = M.x86.R_EDX;
+ out->e.esi = M.x86.R_ESI;
+ out->e.edi = M.x86.R_EDI;
+ return out->x.ax;
+}
+
+/****************************************************************************
+PARAMETERS:
+intno - Interrupt number to execute
+in - Real mode registers to load
+out - Place to store resulting real mode registers
+sregs - Real mode segment registers to load
+
+REMARKS:
+This functions calls a real mode interrupt function at the specified address,
+and loads all the x86 registers from the passed in registers structure.
+On exit the registers returned from the call are returned in out stucture.
+****************************************************************************/
+int X86API BE_int86x(int intno, RMREGS * in, RMREGS * out, RMSREGS * sregs)
+{
+ M.x86.R_EAX = in->e.eax;
+ M.x86.R_EBX = in->e.ebx;
+ M.x86.R_ECX = in->e.ecx;
+ M.x86.R_EDX = in->e.edx;
+ M.x86.R_ESI = in->e.esi;
+ M.x86.R_EDI = in->e.edi;
+ M.x86.R_DS = sregs->ds;
+ M.x86.R_ES = sregs->es;
+ M.x86.R_FS = sregs->fs;
+ M.x86.R_GS = sregs->gs;
+ ((u8 *) M.mem_base)[0x4000] = 0xCD;
+ ((u8 *) M.mem_base)[0x4001] = (u8) intno;
+ ((u8 *) M.mem_base)[0x4002] = 0xF1;
+ M.x86.R_CS = SEG(0x04000);
+ M.x86.R_IP = OFF(0x04000);
+
+ M.x86.R_SS = SEG(M.mem_size - 1);
+ M.x86.R_SP = OFF(M.mem_size - 1) - 1;
+
+ X86EMU_exec();
+ out->e.cflag = M.x86.R_EFLG & F_CF;
+ out->e.eax = M.x86.R_EAX;
+ out->e.ebx = M.x86.R_EBX;
+ out->e.ecx = M.x86.R_ECX;
+ out->e.edx = M.x86.R_EDX;
+ out->e.esi = M.x86.R_ESI;
+ out->e.edi = M.x86.R_EDI;
+ sregs->ds = M.x86.R_DS;
+ sregs->es = M.x86.R_ES;
+ sregs->fs = M.x86.R_FS;
+ sregs->gs = M.x86.R_GS;
+ return out->x.ax;
+}
+#endif
diff --git a/drivers/bios_emulator/biosemui.h b/drivers/bios_emulator/biosemui.h
new file mode 100644
index 0000000..e85e656
--- /dev/null
+++ b/drivers/bios_emulator/biosemui.h
@@ -0,0 +1,169 @@
+/****************************************************************************
+*
+* BIOS emulator and interface
+* to Realmode X86 Emulator Library
+*
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin <Jason.jin@freescale.com>
+*
+* Copyright (C) 1996-1999 SciTech Software, Inc.
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Internal header file for the BIOS emulator library.
+*
+* Jason ported this file to u-boot, Added some architecture
+* related Macro.
+*
+****************************************************************************/
+
+#ifndef __BIOSEMUI_H
+#define __BIOSEMUI_H
+
+#include "biosemu.h"
+#include <asm/io.h>
+/*---------------------- Macros and type definitions ----------------------*/
+
+#ifdef DEBUG
+#define DB(x) x
+#else
+#define DB(x) do{}while(0);
+#endif
+
+#define BIOS_SEG 0xfff0
+extern X86EMU_sysEnv _X86EMU_env;
+#define M _X86EMU_env
+
+/* Macros to read and write values to x86 emulator memory. Memory is always
+ * considered to be little endian, so we use macros to do endian swapping
+ * where necessary.
+ */
+
+#ifdef __BIG_ENDIAN__
+#define readb_le(base) *((u8*)(base))
+#define readw_le(base) ((u16)readb_le(base) | ((u16)readb_le((base) + 1) << 8))
+#define readl_le(base) ((u32)readb_le((base) + 0) | ((u32)readb_le((base) + 1) << 8) | \
+ ((u32)readb_le((base) + 2) << 16) | ((u32)readb_le((base) + 3) << 24))
+#define writeb_le(base, v) *((u8*)(base)) = (v)
+#define writew_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \
+ writeb_le(base + 1, (v >> 8) & 0xff)
+#define writel_le(base, v) writeb_le(base + 0, (v >> 0) & 0xff), \
+ writeb_le(base + 1, (v >> 8) & 0xff), \
+ writeb_le(base + 2, (v >> 16) & 0xff), \
+ writeb_le(base + 3, (v >> 24) & 0xff)
+#else
+#define readb_le(base) *((u8*)(base))
+#define readw_le(base) *((u16*)(base))
+#define readl_le(base) *((u32*)(base))
+#define writeb_le(base, v) *((u8*)(base)) = (v)
+#define writew_le(base, v) *((u16*)(base)) = (v)
+#define writel_le(base, v) *((u32*)(base)) = (v)
+#endif
+
+/****************************************************************************
+REMARKS:
+Function codes passed to the emulated I/O port functions to determine the
+type of operation to perform.
+****************************************************************************/
+typedef enum {
+ REG_READ_BYTE = 0,
+ REG_READ_WORD = 1,
+ REG_READ_DWORD = 2,
+ REG_WRITE_BYTE = 3,
+ REG_WRITE_WORD = 4,
+ REG_WRITE_DWORD = 5
+} RegisterFlags;
+
+/****************************************************************************
+REMARKS:
+Function codes passed to the emulated I/O port functions to determine the
+type of operation to perform.
+****************************************************************************/
+typedef enum {
+ PORT_BYTE = 1,
+ PORT_WORD = 2,
+ PORT_DWORD = 3,
+} PortInfoFlags;
+
+/****************************************************************************
+REMARKS:
+Data structure used to describe the details for the BIOS emulator system
+environment as used by the X86 emulator library.
+
+HEADER:
+biosemu.h
+
+MEMBERS:
+type - Type of port access (1 = byte, 2 = word, 3 = dword)
+defVal - Default power on value
+finalVal - Final value
+****************************************************************************/
+typedef struct {
+ u8 type;
+ u32 defVal;
+ u32 finalVal;
+} BE_portInfo;
+
+#define PM_inpb(port) inb(port+VIDEO_IO_OFFSET)
+#define PM_inpw(port) inw(port+VIDEO_IO_OFFSET)
+#define PM_inpd(port) inl(port+VIDEO_IO_OFFSET)
+#define PM_outpb(port,val) outb(val,port+VIDEO_IO_OFFSET)
+#define PM_outpw(port,val) outw(val,port+VIDEO_IO_OFFSET)
+#define PM_outpd(port,val) outl(val,port+VIDEO_IO_OFFSET)
+
+#define LOG_inpb(port) PM_inpb(port)
+#define LOG_inpw(port) PM_inpw(port)
+#define LOG_inpd(port) PM_inpd(port)
+#define LOG_outpb(port,val) PM_outpb(port,val)
+#define LOG_outpw(port,val) PM_outpw(port,val)
+#define LOG_outpd(port,val) PM_outpd(port,val)
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+/* bios.c */
+
+void _BE_bios_init(u32 * intrTab);
+void _BE_setup_funcs(void);
+
+/* besys.c */
+#define DEBUG_IO() (M.x86.debug & DEBUG_IO_TRACE_F)
+
+u8 X86API BE_rdb(u32 addr);
+u16 X86API BE_rdw(u32 addr);
+u32 X86API BE_rdl(u32 addr);
+void X86API BE_wrb(u32 addr, u8 val);
+void X86API BE_wrw(u32 addr, u16 val);
+void X86API BE_wrl(u32 addr, u32 val);
+
+u8 X86API BE_inb(X86EMU_pioAddr port);
+u16 X86API BE_inw(X86EMU_pioAddr port);
+u32 X86API BE_inl(X86EMU_pioAddr port);
+void X86API BE_outb(X86EMU_pioAddr port, u8 val);
+void X86API BE_outw(X86EMU_pioAddr port, u16 val);
+void X86API BE_outl(X86EMU_pioAddr port, u32 val);
+#endif
+/* __BIOSEMUI_H */
diff --git a/drivers/bios_emulator/include/biosemu.h b/drivers/bios_emulator/include/biosemu.h
new file mode 100644
index 0000000..13cb317
--- /dev/null
+++ b/drivers/bios_emulator/include/biosemu.h
@@ -0,0 +1,392 @@
+/****************************************************************************
+*
+* BIOS emulator and interface
+* to Realmode X86 Emulator Library
+*
+* Copyright (C) 1996-1999 SciTech Software, Inc.
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for the real mode x86 BIOS emulator, which is
+* used to warmboot any number of VGA compatible PCI/AGP
+* controllers under any OS, on any processor family that
+* supports PCI. We also allow the user application to call
+* real mode BIOS functions and Int 10h functions (including
+* the VESA BIOS).
+*
+****************************************************************************/
+
+#ifndef __BIOSEMU_H
+#define __BIOSEMU_H
+
+#ifdef __KERNEL__
+#include "x86emu.h"
+#else
+#include "x86emu.h"
+#include "pmapi.h"
+#include "pcilib.h"
+#endif
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+#pragma pack(1)
+
+#ifndef __KERNEL__
+/****************************************************************************
+REMARKS:
+Data structure used to describe the details specific to a particular VGA
+controller. This information is used to allow the VGA controller to be
+swapped on the fly within the BIOS emulator.
+
+HEADER:
+biosemu.h
+
+MEMBERS:
+pciInfo - PCI device information block for the controller
+BIOSImage - Pointer to a read/write copy of the BIOS image
+BIOSImageLen - Length of the BIOS image
+LowMem - Copy of key low memory areas
+****************************************************************************/
+typedef struct {
+ PCIDeviceInfo *pciInfo;
+ void *BIOSImage;
+ ulong BIOSImageLen;
+ uchar LowMem[1536];
+} BE_VGAInfo;
+#else
+/****************************************************************************
+REMARKS:
+Data structure used to describe the details for the BIOS emulator system
+environment as used by the X86 emulator library.
+
+HEADER:
+biosemu.h
+
+MEMBERS:
+vgaInfo - VGA BIOS information structure
+biosmem_base - Base of the BIOS image
+biosmem_limit - Limit of the BIOS image
+busmem_base - Base of the VGA bus memory
+****************************************************************************/
+typedef struct {
+ int function;
+ int device;
+ int bus;
+ u32 VendorID;
+ u32 DeviceID;
+ pci_dev_t pcidev;
+ void *BIOSImage;
+ u32 BIOSImageLen;
+ u8 LowMem[1536];
+} BE_VGAInfo;
+
+#endif /* __KERNEL__ */
+
+#define CRT_C 24 /* 24 CRT Controller Registers */
+#define ATT_C 21 /* 21 Attribute Controller Registers */
+#define GRA_C 9 /* 9 Graphics Controller Registers */
+#define SEQ_C 5 /* 5 Sequencer Registers */
+#define PAL_C 768 /* 768 Palette Registers */
+
+/****************************************************************************
+REMARKS:
+Data structure used to describe the details for the BIOS emulator system
+environment as used by the X86 emulator library.
+
+HEADER:
+biosemu.h
+
+MEMBERS:
+vgaInfo - VGA BIOS information structure
+biosmem_base - Base of the BIOS image
+biosmem_limit - Limit of the BIOS image
+busmem_base - Base of the VGA bus memory
+timer - Timer used to emulate PC timer ports
+timer0 - Latched value for timer 0
+timer0Latched - True if timer 0 value was just latched
+timer2 - Current value for timer 2
+emulateVGA - True to emulate VGA I/O and memory accesses
+****************************************************************************/
+
+typedef struct {
+ BE_VGAInfo vgaInfo;
+ ulong biosmem_base;
+ ulong biosmem_limit;
+ ulong busmem_base;
+
+ u32 timer0;
+ int timer0Latched;
+ u32 timer1;
+ int timer1Latched;
+ u32 timer2;
+ int timer2Latched;
+
+ int emulateVGA;
+ u8 emu61;
+ u8 emu70;
+ int flipFlop3C0;
+ u32 configAddress;
+ u8 emu3C0;
+ u8 emu3C1[ATT_C];
+ u8 emu3C2;
+ u8 emu3C4;
+ u8 emu3C5[SEQ_C];
+ u8 emu3C6;
+ uint emu3C7;
+ uint emu3C8;
+ u8 emu3C9[PAL_C];
+ u8 emu3CE;
+ u8 emu3CF[GRA_C];
+ u8 emu3D4;
+ u8 emu3D5[CRT_C];
+ u8 emu3DA;
+
+} BE_sysEnv;
+
+#ifdef __KERNEL__
+
+/* Define some types when compiling for the Linux kernel that normally
+ * come from the SciTech PM library.
+ */
+
+/****************************************************************************
+REMARKS:
+Structure describing the 32-bit extended x86 CPU registers
+
+HEADER:
+pmapi.h
+
+MEMBERS:
+eax - Value of the EAX register
+ebx - Value of the EBX register
+ecx - Value of the ECX register
+edx - Value of the EDX register
+esi - Value of the ESI register
+edi - Value of the EDI register
+cflag - Value of the carry flag
+****************************************************************************/
+typedef struct {
+ u32 eax;
+ u32 ebx;
+ u32 ecx;
+ u32 edx;
+ u32 esi;
+ u32 edi;
+ u32 cflag;
+} RMDWORDREGS;
+
+/****************************************************************************
+REMARKS:
+Structure describing the 16-bit x86 CPU registers
+
+HEADER:
+pmapi.h
+
+MEMBERS:
+ax - Value of the AX register
+bx - Value of the BX register
+cx - Value of the CX register
+dx - Value of the DX register
+si - Value of the SI register
+di - Value of the DI register
+cflag - Value of the carry flag
+****************************************************************************/
+#ifdef __BIG_ENDIAN__
+typedef struct {
+ u16 ax_hi, ax;
+ u16 bx_hi, bx;
+ u16 cx_hi, cx;
+ u16 dx_hi, dx;
+ u16 si_hi, si;
+ u16 di_hi, di;
+ u16 cflag_hi, cflag;
+} RMWORDREGS;
+#else
+typedef struct {
+ u16 ax, ax_hi;
+ u16 bx, bx_hi;
+ u16 cx, cx_hi;
+ u16 dx, dx_hi;
+ u16 si, si_hi;
+ u16 di, di_hi;
+ u16 cflag, cflag_hi;
+} RMWORDREGS;
+#endif
+
+/****************************************************************************
+REMARKS:
+Structure describing the 8-bit x86 CPU registers
+
+HEADER:
+pmapi.h
+
+MEMBERS:
+al - Value of the AL register
+ah - Value of the AH register
+bl - Value of the BL register
+bh - Value of the BH register
+cl - Value of the CL register
+ch - Value of the CH register
+dl - Value of the DL register
+dh - Value of the DH register
+****************************************************************************/
+#ifdef __BIG_ENDIAN__
+typedef struct {
+ u16 ax_hi;
+ u8 ah, al;
+ u16 bx_hi;
+ u8 bh, bl;
+ u16 cx_hi;
+ u8 ch, cl;
+ u16 dx_hi;
+ u8 dh, dl;
+} RMBYTEREGS;
+#else
+typedef struct {
+ u8 al;
+ u8 ah;
+ u16 ax_hi;
+ u8 bl;
+ u8 bh;
+ u16 bx_hi;
+ u8 cl;
+ u8 ch;
+ u16 cx_hi;
+ u8 dl;
+ u8 dh;
+ u16 dx_hi;
+} RMBYTEREGS;
+#endif
+
+/****************************************************************************
+REMARKS:
+Structure describing all the x86 CPU registers
+
+HEADER:
+pmapi.h
+
+MEMBERS:
+e - Member to access registers as 32-bit values
+x - Member to access registers as 16-bit values
+h - Member to access registers as 8-bit values
+****************************************************************************/
+typedef union {
+ RMDWORDREGS e;
+ RMWORDREGS x;
+ RMBYTEREGS h;
+} RMREGS;
+
+/****************************************************************************
+REMARKS:
+Structure describing all the x86 segment registers
+
+HEADER:
+pmapi.h
+
+MEMBERS:
+es - ES segment register
+cs - CS segment register
+ss - SS segment register
+ds - DS segment register
+fs - FS segment register
+gs - GS segment register
+****************************************************************************/
+typedef struct {
+ u16 es;
+ u16 cs;
+ u16 ss;
+ u16 ds;
+ u16 fs;
+ u16 gs;
+} RMSREGS;
+
+#endif /* __KERNEL__ */
+
+#ifndef __KERNEL__
+
+/****************************************************************************
+REMARKS:
+Structure defining all the BIOS Emulator API functions as exported from
+the Binary Portable DLL.
+{secret}
+****************************************************************************/
+typedef struct {
+ ulong dwSize;
+ ibool(PMAPIP BE_init) (u32 debugFlags, int memSize, BE_VGAInfo * info);
+ void (PMAPIP BE_setVGA) (BE_VGAInfo * info);
+ void (PMAPIP BE_getVGA) (BE_VGAInfo * info);
+ void *(PMAPIP BE_mapRealPointer) (uint r_seg, uint r_off);
+ void *(PMAPIP BE_getVESABuf) (uint * len, uint * rseg, uint * roff);
+ void (PMAPIP BE_callRealMode) (uint seg, uint off, RMREGS * regs,
+ RMSREGS * sregs);
+ int (PMAPIP BE_int86) (int intno, RMREGS * in, RMREGS * out);
+ int (PMAPIP BE_int86x) (int intno, RMREGS * in, RMREGS * out,
+ RMSREGS * sregs);
+ void *reserved1;
+ void (PMAPIP BE_exit) (void);
+} BE_exports;
+
+/****************************************************************************
+REMARKS:
+Function pointer type for the Binary Portable DLL initialisation entry point.
+{secret}
+****************************************************************************/
+typedef BE_exports *(PMAPIP BE_initLibrary_t) (PM_imports * PMImp);
+#endif
+
+#pragma pack()
+
+/*---------------------------- Global variables ---------------------------*/
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+/* {secret} Global BIOS emulator system environment */
+ extern BE_sysEnv _BE_env;
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+/* BIOS emulator library entry points */
+ int X86API BE_init(u32 debugFlags, int memSize, BE_VGAInfo * info,
+ int shared);
+ void X86API BE_setVGA(BE_VGAInfo * info);
+ void X86API BE_getVGA(BE_VGAInfo * info);
+ void X86API BE_setDebugFlags(u32 debugFlags);
+ void *X86API BE_mapRealPointer(uint r_seg, uint r_off);
+ void *X86API BE_getVESABuf(uint * len, uint * rseg, uint * roff);
+ void X86API BE_callRealMode(uint seg, uint off, RMREGS * regs,
+ RMSREGS * sregs);
+ int X86API BE_int86(int intno, RMREGS * in, RMREGS * out);
+ int X86API BE_int86x(int intno, RMREGS * in, RMREGS * out,
+ RMSREGS * sregs);
+ void X86API BE_exit(void);
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+#endif /* __BIOSEMU_H */
diff --git a/drivers/bios_emulator/include/x86emu.h b/drivers/bios_emulator/include/x86emu.h
new file mode 100644
index 0000000..6004beb
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu.h
@@ -0,0 +1,191 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1996-1999 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for public specific functions.
+* Any application linking against us should only
+* include this header
+*
+****************************************************************************/
+
+#ifndef __X86EMU_X86EMU_H
+#define __X86EMU_X86EMU_H
+
+#include <asm/types.h>
+#include <common.h>
+#include <pci.h>
+#include <asm/io.h>
+#define X86API
+#define X86APIP *
+typedef u16 X86EMU_pioAddr;
+
+#include "x86emu/regs.h"
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+#pragma pack(1)
+
+/****************************************************************************
+REMARKS:
+Data structure containing ponters to programmed I/O functions used by the
+emulator. This is used so that the user program can hook all programmed
+I/O for the emulator to handled as necessary by the user program. By
+default the emulator contains simple functions that do not do access the
+hardware in any way. To allow the emualtor access the hardware, you will
+need to override the programmed I/O functions using the X86EMU_setupPioFuncs
+function.
+
+HEADER:
+x86emu.h
+
+MEMBERS:
+inb - Function to read a byte from an I/O port
+inw - Function to read a word from an I/O port
+inl - Function to read a dword from an I/O port
+outb - Function to write a byte to an I/O port
+outw - Function to write a word to an I/O port
+outl - Function to write a dword to an I/O port
+****************************************************************************/
+typedef struct {
+ u8(X86APIP inb) (X86EMU_pioAddr addr);
+ u16(X86APIP inw) (X86EMU_pioAddr addr);
+ u32(X86APIP inl) (X86EMU_pioAddr addr);
+ void (X86APIP outb) (X86EMU_pioAddr addr, u8 val);
+ void (X86APIP outw) (X86EMU_pioAddr addr, u16 val);
+ void (X86APIP outl) (X86EMU_pioAddr addr, u32 val);
+} X86EMU_pioFuncs;
+
+/****************************************************************************
+REMARKS:
+Data structure containing ponters to memory access functions used by the
+emulator. This is used so that the user program can hook all memory
+access functions as necessary for the emulator. By default the emulator
+contains simple functions that only access the internal memory of the
+emulator. If you need specialised functions to handle access to different
+types of memory (ie: hardware framebuffer accesses and BIOS memory access
+etc), you will need to override this using the X86EMU_setupMemFuncs
+function.
+
+HEADER:
+x86emu.h
+
+MEMBERS:
+rdb - Function to read a byte from an address
+rdw - Function to read a word from an address
+rdl - Function to read a dword from an address
+wrb - Function to write a byte to an address
+wrw - Function to write a word to an address
+wrl - Function to write a dword to an address
+****************************************************************************/
+typedef struct {
+ u8(X86APIP rdb) (u32 addr);
+ u16(X86APIP rdw) (u32 addr);
+ u32(X86APIP rdl) (u32 addr);
+ void (X86APIP wrb) (u32 addr, u8 val);
+ void (X86APIP wrw) (u32 addr, u16 val);
+ void (X86APIP wrl) (u32 addr, u32 val);
+} X86EMU_memFuncs;
+
+/****************************************************************************
+ Here are the default memory read and write
+ function in case they are needed as fallbacks.
+***************************************************************************/
+extern u8 X86API rdb(u32 addr);
+extern u16 X86API rdw(u32 addr);
+extern u32 X86API rdl(u32 addr);
+extern void X86API wrb(u32 addr, u8 val);
+extern void X86API wrw(u32 addr, u16 val);
+extern void X86API wrl(u32 addr, u32 val);
+
+#pragma pack()
+
+/*--------------------- type definitions -----------------------------------*/
+
+typedef void (X86APIP X86EMU_intrFuncs) (int num);
+extern X86EMU_intrFuncs _X86EMU_intrTab[256];
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+ void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs);
+ void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs);
+ void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[]);
+ void X86EMU_prepareForInt(int num);
+
+/* decode.c */
+
+ void X86EMU_exec(void);
+ void X86EMU_halt_sys(void);
+
+#ifdef DEBUG
+#define HALT_SYS() \
+ printf("halt_sys: file %s, line %d\n", __FILE__, __LINE__), \
+ X86EMU_halt_sys()
+#else
+#define HALT_SYS() X86EMU_halt_sys()
+#endif
+
+/* Debug options */
+
+#define DEBUG_DECODE_F 0x0001 /* print decoded instruction */
+#define DEBUG_TRACE_F 0x0002 /* dump regs before/after execution */
+#define DEBUG_STEP_F 0x0004
+#define DEBUG_DISASSEMBLE_F 0x0008
+#define DEBUG_BREAK_F 0x0010
+#define DEBUG_SVC_F 0x0020
+#define DEBUG_SAVE_CS_IP 0x0040
+#define DEBUG_FS_F 0x0080
+#define DEBUG_PROC_F 0x0100
+#define DEBUG_SYSINT_F 0x0200 /* bios system interrupts. */
+#define DEBUG_TRACECALL_F 0x0400
+#define DEBUG_INSTRUMENT_F 0x0800
+#define DEBUG_MEM_TRACE_F 0x1000
+#define DEBUG_IO_TRACE_F 0x2000
+#define DEBUG_TRACECALL_REGS_F 0x4000
+#define DEBUG_DECODE_NOPRINT_F 0x8000
+#define DEBUG_EXIT 0x10000
+#define DEBUG_SYS_F (DEBUG_SVC_F|DEBUG_FS_F|DEBUG_PROC_F)
+
+ void X86EMU_trace_regs(void);
+ void X86EMU_trace_xregs(void);
+ void X86EMU_dump_memory(u16 seg, u16 off, u32 amt);
+ int X86EMU_trace_on(void);
+ int X86EMU_trace_off(void);
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+#endif /* __X86EMU_X86EMU_H */
diff --git a/drivers/bios_emulator/include/x86emu/debug.h b/drivers/bios_emulator/include/x86emu/debug.h
new file mode 100644
index 0000000..268c9d3
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/debug.h
@@ -0,0 +1,209 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for debug definitions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_DEBUG_H
+#define __X86EMU_DEBUG_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+/* checks to be enabled for "runtime" */
+
+#define CHECK_IP_FETCH_F 0x1
+#define CHECK_SP_ACCESS_F 0x2
+#define CHECK_MEM_ACCESS_F 0x4 /*using regular linear pointer */
+#define CHECK_DATA_ACCESS_F 0x8 /*using segment:offset */
+
+#ifdef DEBUG
+# define CHECK_IP_FETCH() (M.x86.check & CHECK_IP_FETCH_F)
+# define CHECK_SP_ACCESS() (M.x86.check & CHECK_SP_ACCESS_F)
+# define CHECK_MEM_ACCESS() (M.x86.check & CHECK_MEM_ACCESS_F)
+# define CHECK_DATA_ACCESS() (M.x86.check & CHECK_DATA_ACCESS_F)
+#else
+# define CHECK_IP_FETCH()
+# define CHECK_SP_ACCESS()
+# define CHECK_MEM_ACCESS()
+# define CHECK_DATA_ACCESS()
+#endif
+
+#ifdef DEBUG
+# define DEBUG_INSTRUMENT() (M.x86.debug & DEBUG_INSTRUMENT_F)
+# define DEBUG_DECODE() (M.x86.debug & DEBUG_DECODE_F)
+# define DEBUG_TRACE() (M.x86.debug & DEBUG_TRACE_F)
+# define DEBUG_STEP() (M.x86.debug & DEBUG_STEP_F)
+# define DEBUG_DISASSEMBLE() (M.x86.debug & DEBUG_DISASSEMBLE_F)
+# define DEBUG_BREAK() (M.x86.debug & DEBUG_BREAK_F)
+# define DEBUG_SVC() (M.x86.debug & DEBUG_SVC_F)
+# define DEBUG_SAVE_IP_CS() (M.x86.debug & DEBUG_SAVE_CS_IP)
+
+# define DEBUG_FS() (M.x86.debug & DEBUG_FS_F)
+# define DEBUG_PROC() (M.x86.debug & DEBUG_PROC_F)
+# define DEBUG_SYSINT() (M.x86.debug & DEBUG_SYSINT_F)
+# define DEBUG_TRACECALL() (M.x86.debug & DEBUG_TRACECALL_F)
+# define DEBUG_TRACECALLREGS() (M.x86.debug & DEBUG_TRACECALL_REGS_F)
+# define DEBUG_SYS() (M.x86.debug & DEBUG_SYS_F)
+# define DEBUG_MEM_TRACE() (M.x86.debug & DEBUG_MEM_TRACE_F)
+# define DEBUG_IO_TRACE() (M.x86.debug & DEBUG_IO_TRACE_F)
+# define DEBUG_DECODE_NOPRINT() (M.x86.debug & DEBUG_DECODE_NOPRINT_F)
+#else
+# define DEBUG_INSTRUMENT() 0
+# define DEBUG_DECODE() 0
+# define DEBUG_TRACE() 0
+# define DEBUG_STEP() 0
+# define DEBUG_DISASSEMBLE() 0
+# define DEBUG_BREAK() 0
+# define DEBUG_SVC() 0
+# define DEBUG_SAVE_IP_CS() 0
+# define DEBUG_FS() 0
+# define DEBUG_PROC() 0
+# define DEBUG_SYSINT() 0
+# define DEBUG_TRACECALL() 0
+# define DEBUG_TRACECALLREGS() 0
+# define DEBUG_SYS() 0
+# define DEBUG_MEM_TRACE() 0
+# define DEBUG_IO_TRACE() 0
+# define DEBUG_DECODE_NOPRINT() 0
+#endif
+
+#ifdef DEBUG
+
+# define DECODE_PRINTF(x) if (DEBUG_DECODE()) \
+ x86emu_decode_printf(x)
+# define DECODE_PRINTF2(x,y) if (DEBUG_DECODE()) \
+ x86emu_decode_printf2(x,y)
+
+/*
+ * The following allow us to look at the bytes of an instruction. The
+ * first INCR_INSTRN_LEN, is called everytime bytes are consumed in
+ * the decoding process. The SAVE_IP_CS is called initially when the
+ * major opcode of the instruction is accessed.
+ */
+#define INC_DECODED_INST_LEN(x) \
+ if (DEBUG_DECODE()) \
+ x86emu_inc_decoded_inst_len(x)
+
+#define SAVE_IP_CS(x,y) \
+ if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \
+ | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \
+ M.x86.saved_cs = x; \
+ M.x86.saved_ip = y; \
+ }
+#else
+# define INC_DECODED_INST_LEN(x)
+# define DECODE_PRINTF(x)
+# define DECODE_PRINTF2(x,y)
+# define SAVE_IP_CS(x,y)
+#endif
+
+#ifdef DEBUG
+#define TRACE_REGS() \
+ if (DEBUG_DISASSEMBLE()) { \
+ x86emu_just_disassemble(); \
+ goto EndOfTheInstructionProcedure; \
+ } \
+ if (DEBUG_TRACE() || DEBUG_DECODE()) X86EMU_trace_regs()
+#else
+# define TRACE_REGS()
+#endif
+
+#ifdef DEBUG
+# define SINGLE_STEP() if (DEBUG_STEP()) x86emu_single_step()
+#else
+# define SINGLE_STEP()
+#endif
+
+#define TRACE_AND_STEP() \
+ TRACE_REGS(); \
+ SINGLE_STEP()
+
+#ifdef DEBUG
+# define START_OF_INSTR()
+# define END_OF_INSTR() EndOfTheInstructionProcedure: x86emu_end_instr();
+# define END_OF_INSTR_NO_TRACE() x86emu_end_instr();
+#else
+# define START_OF_INSTR()
+# define END_OF_INSTR()
+# define END_OF_INSTR_NO_TRACE()
+#endif
+
+#ifdef DEBUG
+# define CALL_TRACE(u,v,w,x,s) \
+ if (DEBUG_TRACECALLREGS()) \
+ x86emu_dump_regs(); \
+ if (DEBUG_TRACECALL()) \
+ printk("%04x:%04x: CALL %s%04x:%04x\n", u , v, s, w, x);
+# define RETURN_TRACE(n,u,v) \
+ if (DEBUG_TRACECALLREGS()) \
+ x86emu_dump_regs(); \
+ if (DEBUG_TRACECALL()) \
+ printk("%04x:%04x: %s\n",u,v,n);
+#else
+# define CALL_TRACE(u,v,w,x,s)
+# define RETURN_TRACE(n,u,v)
+#endif
+
+#ifdef DEBUG
+#define DB(x) x
+#else
+#define DB(x)
+#endif
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+ extern void x86emu_inc_decoded_inst_len(int x);
+ extern void x86emu_decode_printf(char *x);
+ extern void x86emu_decode_printf2(char *x, int y);
+ extern void x86emu_just_disassemble(void);
+ extern void x86emu_single_step(void);
+ extern void x86emu_end_instr(void);
+ extern void x86emu_dump_regs(void);
+ extern void x86emu_dump_xregs(void);
+ extern void x86emu_print_int_vect(u16 iv);
+ extern void x86emu_instrument_instruction(void);
+ extern void x86emu_check_ip_access(void);
+ extern void x86emu_check_sp_access(void);
+ extern void x86emu_check_mem_access(u32 p);
+ extern void x86emu_check_data_access(uint s, uint o);
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+#endif /* __X86EMU_DEBUG_H */
diff --git a/drivers/bios_emulator/include/x86emu/decode.h b/drivers/bios_emulator/include/x86emu/decode.h
new file mode 100644
index 0000000..77769f0
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/decode.h
@@ -0,0 +1,88 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for instruction decoding logic.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_DECODE_H
+#define __X86EMU_DECODE_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+/* Instruction Decoding Stuff */
+
+#define FETCH_DECODE_MODRM(mod,rh,rl) fetch_decode_modrm(&mod,&rh,&rl)
+#define DECODE_RM_BYTE_REGISTER(r) decode_rm_byte_register(r)
+#define DECODE_RM_WORD_REGISTER(r) decode_rm_word_register(r)
+#define DECODE_RM_LONG_REGISTER(r) decode_rm_long_register(r)
+#define DECODE_CLEAR_SEGOVR() M.x86.mode &= ~SYSMODE_CLRMASK
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+void x86emu_intr_raise (u8 type);
+void fetch_decode_modrm (int *mod,int *regh,int *regl);
+u8 fetch_byte_imm (void);
+u16 fetch_word_imm (void);
+u32 fetch_long_imm (void);
+u8 fetch_data_byte (uint offset);
+u8 fetch_data_byte_abs (uint segment, uint offset);
+u16 fetch_data_word (uint offset);
+u16 fetch_data_word_abs (uint segment, uint offset);
+u32 fetch_data_long (uint offset);
+u32 fetch_data_long_abs (uint segment, uint offset);
+void store_data_byte (uint offset, u8 val);
+void store_data_byte_abs (uint segment, uint offset, u8 val);
+void store_data_word (uint offset, u16 val);
+void store_data_word_abs (uint segment, uint offset, u16 val);
+void store_data_long (uint offset, u32 val);
+void store_data_long_abs (uint segment, uint offset, u32 val);
+u8* decode_rm_byte_register(int reg);
+u16* decode_rm_word_register(int reg);
+u32* decode_rm_long_register(int reg);
+u16* decode_rm_seg_register(int reg);
+unsigned decode_rm00_address(int rm);
+unsigned decode_rm01_address(int rm);
+unsigned decode_rm10_address(int rm);
+unsigned decode_rmXX_address(int mod, int rm);
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+
+#endif /* __X86EMU_DECODE_H */
diff --git a/drivers/bios_emulator/include/x86emu/ops.h b/drivers/bios_emulator/include/x86emu/ops.h
new file mode 100644
index 0000000..a4f2316
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/ops.h
@@ -0,0 +1,45 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for operand decoding functions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_OPS_H
+#define __X86EMU_OPS_H
+
+extern void (*x86emu_optab[0x100])(u8 op1);
+extern void (*x86emu_optab2[0x100])(u8 op2);
+
+#endif /* __X86EMU_OPS_H */
diff --git a/drivers/bios_emulator/include/x86emu/prim_asm.h b/drivers/bios_emulator/include/x86emu/prim_asm.h
new file mode 100644
index 0000000..4cb4cab
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/prim_asm.h
@@ -0,0 +1,970 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: Watcom C++ 10.6 or later
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Inline assembler versions of the primitive operand
+* functions for faster performance. At the moment this is
+* x86 inline assembler, but these functions could be replaced
+* with native inline assembler for each supported processor
+* platform.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_PRIM_ASM_H
+#define __X86EMU_PRIM_ASM_H
+
+#ifdef __WATCOMC__
+
+#ifndef VALIDATE
+#define __HAVE_INLINE_ASSEMBLER__
+#endif
+
+u32 get_flags_asm(void);
+#pragma aux get_flags_asm = \
+ "pushf" \
+ "pop eax" \
+ value [eax] \
+ modify exact [eax];
+
+u16 aaa_word_asm(u32 * flags, u16 d);
+#pragma aux aaa_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "aaa" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u16 aas_word_asm(u32 * flags, u16 d);
+#pragma aux aas_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "aas" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u16 aad_word_asm(u32 * flags, u16 d);
+#pragma aux aad_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "aad" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u16 aam_word_asm(u32 * flags, u8 d);
+#pragma aux aam_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "aam" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [ax] \
+ modify exact [ax];
+
+u8 adc_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux adc_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "adc al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 adc_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux adc_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "adc ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 adc_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux adc_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "adc eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+u8 add_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux add_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "add al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 add_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux add_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "add ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 add_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux add_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "add eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+u8 and_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux and_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "and al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 and_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux and_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "and ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 and_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux and_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "and eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+u8 cmp_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux cmp_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "cmp al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 cmp_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux cmp_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "cmp ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 cmp_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux cmp_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "cmp eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+u8 daa_byte_asm(u32 * flags, u8 d);
+#pragma aux daa_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "daa" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [al] \
+ modify exact [al];
+
+u8 das_byte_asm(u32 * flags, u8 d);
+#pragma aux das_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "das" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [al] \
+ modify exact [al];
+
+u8 dec_byte_asm(u32 * flags, u8 d);
+#pragma aux dec_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "dec al" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [al] \
+ modify exact [al];
+
+u16 dec_word_asm(u32 * flags, u16 d);
+#pragma aux dec_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "dec ax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u32 dec_long_asm(u32 * flags, u32 d);
+#pragma aux dec_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "dec eax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] \
+ value [eax] \
+ modify exact [eax];
+
+u8 inc_byte_asm(u32 * flags, u8 d);
+#pragma aux inc_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "inc al" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [al] \
+ modify exact [al];
+
+u16 inc_word_asm(u32 * flags, u16 d);
+#pragma aux inc_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "inc ax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u32 inc_long_asm(u32 * flags, u32 d);
+#pragma aux inc_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "inc eax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] \
+ value [eax] \
+ modify exact [eax];
+
+u8 or_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux or_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "or al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 or_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux or_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "or ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 or_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux or_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "or eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+u8 neg_byte_asm(u32 * flags, u8 d);
+#pragma aux neg_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "neg al" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [al] \
+ modify exact [al];
+
+u16 neg_word_asm(u32 * flags, u16 d);
+#pragma aux neg_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "neg ax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u32 neg_long_asm(u32 * flags, u32 d);
+#pragma aux neg_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "neg eax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] \
+ value [eax] \
+ modify exact [eax];
+
+u8 not_byte_asm(u32 * flags, u8 d);
+#pragma aux not_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "not al" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] \
+ value [al] \
+ modify exact [al];
+
+u16 not_word_asm(u32 * flags, u16 d);
+#pragma aux not_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "not ax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] \
+ value [ax] \
+ modify exact [ax];
+
+u32 not_long_asm(u32 * flags, u32 d);
+#pragma aux not_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "not eax" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] \
+ value [eax] \
+ modify exact [eax];
+
+u8 rcl_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux rcl_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "rcl al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 rcl_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux rcl_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "rcl ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 rcl_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux rcl_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "rcl eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u8 rcr_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux rcr_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "rcr al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 rcr_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux rcr_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "rcr ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 rcr_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux rcr_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "rcr eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u8 rol_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux rol_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "rol al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 rol_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux rol_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "rol ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 rol_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux rol_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "rol eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u8 ror_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux ror_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "ror al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 ror_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux ror_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "ror ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 ror_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux ror_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "ror eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u8 shl_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux shl_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "shl al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 shl_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux shl_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "shl ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 shl_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux shl_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "shl eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u8 shr_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux shr_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "shr al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 shr_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux shr_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "shr ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 shr_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux shr_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "shr eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u8 sar_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux sar_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "sar al,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [cl] \
+ value [al] \
+ modify exact [al cl];
+
+u16 sar_word_asm(u32 * flags, u16 d, u8 s);
+#pragma aux sar_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "sar ax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [cl] \
+ value [ax] \
+ modify exact [ax cl];
+
+u32 sar_long_asm(u32 * flags, u32 d, u8 s);
+#pragma aux sar_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "sar eax,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [cl] \
+ value [eax] \
+ modify exact [eax cl];
+
+u16 shld_word_asm(u32 * flags, u16 d, u16 fill, u8 s);
+#pragma aux shld_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "shld ax,dx,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [dx] [cl] \
+ value [ax] \
+ modify exact [ax dx cl];
+
+u32 shld_long_asm(u32 * flags, u32 d, u32 fill, u8 s);
+#pragma aux shld_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "shld eax,edx,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [edx] [cl] \
+ value [eax] \
+ modify exact [eax edx cl];
+
+u16 shrd_word_asm(u32 * flags, u16 d, u16 fill, u8 s);
+#pragma aux shrd_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "shrd ax,dx,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [dx] [cl] \
+ value [ax] \
+ modify exact [ax dx cl];
+
+u32 shrd_long_asm(u32 * flags, u32 d, u32 fill, u8 s);
+#pragma aux shrd_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "shrd eax,edx,cl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [edx] [cl] \
+ value [eax] \
+ modify exact [eax edx cl];
+
+u8 sbb_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux sbb_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "sbb al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 sbb_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux sbb_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "sbb ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 sbb_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux sbb_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "sbb eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+u8 sub_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux sub_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "sub al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 sub_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux sub_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "sub ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 sub_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux sub_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "sub eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+void test_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux test_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "test al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ modify exact [al bl];
+
+void test_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux test_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "test ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ modify exact [ax bx];
+
+void test_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux test_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "test eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ modify exact [eax ebx];
+
+u8 xor_byte_asm(u32 * flags, u8 d, u8 s);
+#pragma aux xor_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "xor al,bl" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [al] [bl] \
+ value [al] \
+ modify exact [al bl];
+
+u16 xor_word_asm(u32 * flags, u16 d, u16 s);
+#pragma aux xor_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "xor ax,bx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [ax] [bx] \
+ value [ax] \
+ modify exact [ax bx];
+
+u32 xor_long_asm(u32 * flags, u32 d, u32 s);
+#pragma aux xor_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "xor eax,ebx" \
+ "pushf" \
+ "pop [edi]" \
+ parm [edi] [eax] [ebx] \
+ value [eax] \
+ modify exact [eax ebx];
+
+void imul_byte_asm(u32 * flags, u16 * ax, u8 d, u8 s);
+#pragma aux imul_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "imul bl" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],ax" \
+ parm [edi] [esi] [al] [bl] \
+ modify exact [esi ax bl];
+
+void imul_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 d, u16 s);
+#pragma aux imul_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "imul bx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],ax" \
+ "mov [ecx],dx" \
+ parm [edi] [esi] [ecx] [ax] [bx]\
+ modify exact [esi edi ax bx dx];
+
+void imul_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 d, u32 s);
+#pragma aux imul_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "imul ebx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],eax" \
+ "mov [ecx],edx" \
+ parm [edi] [esi] [ecx] [eax] [ebx] \
+ modify exact [esi edi eax ebx edx];
+
+void mul_byte_asm(u32 * flags, u16 * ax, u8 d, u8 s);
+#pragma aux mul_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "mul bl" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],ax" \
+ parm [edi] [esi] [al] [bl] \
+ modify exact [esi ax bl];
+
+void mul_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 d, u16 s);
+#pragma aux mul_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "mul bx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],ax" \
+ "mov [ecx],dx" \
+ parm [edi] [esi] [ecx] [ax] [bx]\
+ modify exact [esi edi ax bx dx];
+
+void mul_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 d, u32 s);
+#pragma aux mul_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "mul ebx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],eax" \
+ "mov [ecx],edx" \
+ parm [edi] [esi] [ecx] [eax] [ebx] \
+ modify exact [esi edi eax ebx edx];
+
+void idiv_byte_asm(u32 * flags, u8 * al, u8 * ah, u16 d, u8 s);
+#pragma aux idiv_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "idiv bl" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],al" \
+ "mov [ecx],ah" \
+ parm [edi] [esi] [ecx] [ax] [bl]\
+ modify exact [esi edi ax bl];
+
+void idiv_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 dlo, u16 dhi, u16 s);
+#pragma aux idiv_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "idiv bx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],ax" \
+ "mov [ecx],dx" \
+ parm [edi] [esi] [ecx] [ax] [dx] [bx]\
+ modify exact [esi edi ax dx bx];
+
+void idiv_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 dlo, u32 dhi, u32 s);
+#pragma aux idiv_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "idiv ebx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],eax" \
+ "mov [ecx],edx" \
+ parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
+ modify exact [esi edi eax edx ebx];
+
+void div_byte_asm(u32 * flags, u8 * al, u8 * ah, u16 d, u8 s);
+#pragma aux div_byte_asm = \
+ "push [edi]" \
+ "popf" \
+ "div bl" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],al" \
+ "mov [ecx],ah" \
+ parm [edi] [esi] [ecx] [ax] [bl]\
+ modify exact [esi edi ax bl];
+
+void div_word_asm(u32 * flags, u16 * ax, u16 * dx, u16 dlo, u16 dhi, u16 s);
+#pragma aux div_word_asm = \
+ "push [edi]" \
+ "popf" \
+ "div bx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],ax" \
+ "mov [ecx],dx" \
+ parm [edi] [esi] [ecx] [ax] [dx] [bx]\
+ modify exact [esi edi ax dx bx];
+
+void div_long_asm(u32 * flags, u32 * eax, u32 * edx, u32 dlo, u32 dhi, u32 s);
+#pragma aux div_long_asm = \
+ "push [edi]" \
+ "popf" \
+ "div ebx" \
+ "pushf" \
+ "pop [edi]" \
+ "mov [esi],eax" \
+ "mov [ecx],edx" \
+ parm [edi] [esi] [ecx] [eax] [edx] [ebx]\
+ modify exact [esi edi eax edx ebx];
+
+#endif
+
+#endif /* __X86EMU_PRIM_ASM_H */
diff --git a/drivers/bios_emulator/include/x86emu/prim_ops.h b/drivers/bios_emulator/include/x86emu/prim_ops.h
new file mode 100644
index 0000000..2291e84
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/prim_ops.h
@@ -0,0 +1,141 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for primitive operation functions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_PRIM_OPS_H
+#define __X86EMU_PRIM_OPS_H
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+u16 aaa_word (u16 d);
+u16 aas_word (u16 d);
+u16 aad_word (u16 d);
+u16 aam_word (u8 d);
+u8 adc_byte (u8 d, u8 s);
+u16 adc_word (u16 d, u16 s);
+u32 adc_long (u32 d, u32 s);
+u8 add_byte (u8 d, u8 s);
+u16 add_word (u16 d, u16 s);
+u32 add_long (u32 d, u32 s);
+u8 and_byte (u8 d, u8 s);
+u16 and_word (u16 d, u16 s);
+u32 and_long (u32 d, u32 s);
+u8 cmp_byte (u8 d, u8 s);
+u16 cmp_word (u16 d, u16 s);
+u32 cmp_long (u32 d, u32 s);
+u8 daa_byte (u8 d);
+u8 das_byte (u8 d);
+u8 dec_byte (u8 d);
+u16 dec_word (u16 d);
+u32 dec_long (u32 d);
+u8 inc_byte (u8 d);
+u16 inc_word (u16 d);
+u32 inc_long (u32 d);
+u8 or_byte (u8 d, u8 s);
+u16 or_word (u16 d, u16 s);
+u32 or_long (u32 d, u32 s);
+u8 neg_byte (u8 s);
+u16 neg_word (u16 s);
+u32 neg_long (u32 s);
+u8 not_byte (u8 s);
+u16 not_word (u16 s);
+u32 not_long (u32 s);
+u8 rcl_byte (u8 d, u8 s);
+u16 rcl_word (u16 d, u8 s);
+u32 rcl_long (u32 d, u8 s);
+u8 rcr_byte (u8 d, u8 s);
+u16 rcr_word (u16 d, u8 s);
+u32 rcr_long (u32 d, u8 s);
+u8 rol_byte (u8 d, u8 s);
+u16 rol_word (u16 d, u8 s);
+u32 rol_long (u32 d, u8 s);
+u8 ror_byte (u8 d, u8 s);
+u16 ror_word (u16 d, u8 s);
+u32 ror_long (u32 d, u8 s);
+u8 shl_byte (u8 d, u8 s);
+u16 shl_word (u16 d, u8 s);
+u32 shl_long (u32 d, u8 s);
+u8 shr_byte (u8 d, u8 s);
+u16 shr_word (u16 d, u8 s);
+u32 shr_long (u32 d, u8 s);
+u8 sar_byte (u8 d, u8 s);
+u16 sar_word (u16 d, u8 s);
+u32 sar_long (u32 d, u8 s);
+u16 shld_word (u16 d, u16 fill, u8 s);
+u32 shld_long (u32 d, u32 fill, u8 s);
+u16 shrd_word (u16 d, u16 fill, u8 s);
+u32 shrd_long (u32 d, u32 fill, u8 s);
+u8 sbb_byte (u8 d, u8 s);
+u16 sbb_word (u16 d, u16 s);
+u32 sbb_long (u32 d, u32 s);
+u8 sub_byte (u8 d, u8 s);
+u16 sub_word (u16 d, u16 s);
+u32 sub_long (u32 d, u32 s);
+void test_byte (u8 d, u8 s);
+void test_word (u16 d, u16 s);
+void test_long (u32 d, u32 s);
+u8 xor_byte (u8 d, u8 s);
+u16 xor_word (u16 d, u16 s);
+u32 xor_long (u32 d, u32 s);
+void imul_byte (u8 s);
+void imul_word (u16 s);
+void imul_long (u32 s);
+void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s);
+void mul_byte (u8 s);
+void mul_word (u16 s);
+void mul_long (u32 s);
+void idiv_byte (u8 s);
+void idiv_word (u16 s);
+void idiv_long (u32 s);
+void div_byte (u8 s);
+void div_word (u16 s);
+void div_long (u32 s);
+void ins (int size);
+void outs (int size);
+u16 mem_access_word (int addr);
+void push_word (u16 w);
+void push_long (u32 w);
+u16 pop_word (void);
+u32 pop_long (void);
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+
+#endif /* __X86EMU_PRIM_OPS_H */
diff --git a/drivers/bios_emulator/include/x86emu/regs.h b/drivers/bios_emulator/include/x86emu/regs.h
new file mode 100644
index 0000000..a7fedd2
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/regs.h
@@ -0,0 +1,340 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for x86 register definitions.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_REGS_H
+#define __X86EMU_REGS_H
+
+/*---------------------- Macros and type definitions ----------------------*/
+
+#pragma pack(1)
+
+/*
+ * General EAX, EBX, ECX, EDX type registers. Note that for
+ * portability, and speed, the issue of byte swapping is not addressed
+ * in the registers. All registers are stored in the default format
+ * available on the host machine. The only critical issue is that the
+ * registers should line up EXACTLY in the same manner as they do in
+ * the 386. That is:
+ *
+ * EAX & 0xff === AL
+ * EAX & 0xffff == AX
+ *
+ * etc. The result is that alot of the calculations can then be
+ * done using the native instruction set fully.
+ */
+
+#ifdef __BIG_ENDIAN__
+
+typedef struct {
+ u32 e_reg;
+} I32_reg_t;
+
+typedef struct {
+ u16 filler0, x_reg;
+} I16_reg_t;
+
+typedef struct {
+ u8 filler0, filler1, h_reg, l_reg;
+} I8_reg_t;
+
+#else /* !__BIG_ENDIAN__ */
+
+typedef struct {
+ u32 e_reg;
+} I32_reg_t;
+
+typedef struct {
+ u16 x_reg;
+} I16_reg_t;
+
+typedef struct {
+ u8 l_reg, h_reg;
+} I8_reg_t;
+
+#endif /* BIG_ENDIAN */
+
+typedef union {
+ I32_reg_t I32_reg;
+ I16_reg_t I16_reg;
+ I8_reg_t I8_reg;
+} i386_general_register;
+
+struct i386_general_regs {
+ i386_general_register A, B, C, D;
+};
+
+typedef struct i386_general_regs Gen_reg_t;
+
+struct i386_special_regs {
+ i386_general_register SP, BP, SI, DI, IP;
+ u32 FLAGS;
+};
+
+/*
+ * Segment registers here represent the 16 bit quantities
+ * CS, DS, ES, SS.
+ */
+
+#undef CS
+#undef DS
+#undef SS
+#undef ES
+#undef FS
+#undef GS
+
+struct i386_segment_regs {
+ u16 CS, DS, SS, ES, FS, GS;
+};
+
+/* 8 bit registers */
+#define R_AH gen.A.I8_reg.h_reg
+#define R_AL gen.A.I8_reg.l_reg
+#define R_BH gen.B.I8_reg.h_reg
+#define R_BL gen.B.I8_reg.l_reg
+#define R_CH gen.C.I8_reg.h_reg
+#define R_CL gen.C.I8_reg.l_reg
+#define R_DH gen.D.I8_reg.h_reg
+#define R_DL gen.D.I8_reg.l_reg
+
+/* 16 bit registers */
+#define R_AX gen.A.I16_reg.x_reg
+#define R_BX gen.B.I16_reg.x_reg
+#define R_CX gen.C.I16_reg.x_reg
+#define R_DX gen.D.I16_reg.x_reg
+
+/* 32 bit extended registers */
+#define R_EAX gen.A.I32_reg.e_reg
+#define R_EBX gen.B.I32_reg.e_reg
+#define R_ECX gen.C.I32_reg.e_reg
+#define R_EDX gen.D.I32_reg.e_reg
+
+/* special registers */
+#define R_SP spc.SP.I16_reg.x_reg
+#define R_BP spc.BP.I16_reg.x_reg
+#define R_SI spc.SI.I16_reg.x_reg
+#define R_DI spc.DI.I16_reg.x_reg
+#define R_IP spc.IP.I16_reg.x_reg
+#define R_FLG spc.FLAGS
+
+/* special registers */
+#define R_SP spc.SP.I16_reg.x_reg
+#define R_BP spc.BP.I16_reg.x_reg
+#define R_SI spc.SI.I16_reg.x_reg
+#define R_DI spc.DI.I16_reg.x_reg
+#define R_IP spc.IP.I16_reg.x_reg
+#define R_FLG spc.FLAGS
+
+/* special registers */
+#define R_ESP spc.SP.I32_reg.e_reg
+#define R_EBP spc.BP.I32_reg.e_reg
+#define R_ESI spc.SI.I32_reg.e_reg
+#define R_EDI spc.DI.I32_reg.e_reg
+#define R_EIP spc.IP.I32_reg.e_reg
+#define R_EFLG spc.FLAGS
+
+/* segment registers */
+#define R_CS seg.CS
+#define R_DS seg.DS
+#define R_SS seg.SS
+#define R_ES seg.ES
+#define R_FS seg.FS
+#define R_GS seg.GS
+
+/* flag conditions */
+#define FB_CF 0x0001 /* CARRY flag */
+#define FB_PF 0x0004 /* PARITY flag */
+#define FB_AF 0x0010 /* AUX flag */
+#define FB_ZF 0x0040 /* ZERO flag */
+#define FB_SF 0x0080 /* SIGN flag */
+#define FB_TF 0x0100 /* TRAP flag */
+#define FB_IF 0x0200 /* INTERRUPT ENABLE flag */
+#define FB_DF 0x0400 /* DIR flag */
+#define FB_OF 0x0800 /* OVERFLOW flag */
+
+/* 80286 and above always have bit#1 set */
+#define F_ALWAYS_ON (0x0002) /* flag bits always on */
+
+/*
+ * Define a mask for only those flag bits we will ever pass back
+ * (via PUSHF)
+ */
+#define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF)
+
+/* following bits masked in to a 16bit quantity */
+
+#define F_CF 0x0001 /* CARRY flag */
+#define F_PF 0x0004 /* PARITY flag */
+#define F_AF 0x0010 /* AUX flag */
+#define F_ZF 0x0040 /* ZERO flag */
+#define F_SF 0x0080 /* SIGN flag */
+#define F_TF 0x0100 /* TRAP flag */
+#define F_IF 0x0200 /* INTERRUPT ENABLE flag */
+#define F_DF 0x0400 /* DIR flag */
+#define F_OF 0x0800 /* OVERFLOW flag */
+
+#define TOGGLE_FLAG(flag) (M.x86.R_FLG ^= (flag))
+#define SET_FLAG(flag) (M.x86.R_FLG |= (flag))
+#define CLEAR_FLAG(flag) (M.x86.R_FLG &= ~(flag))
+#define ACCESS_FLAG(flag) (M.x86.R_FLG & (flag))
+#define CLEARALL_FLAG(m) (M.x86.R_FLG = 0)
+
+#define CONDITIONAL_SET_FLAG(COND,FLAG) \
+ if (COND) SET_FLAG(FLAG); else CLEAR_FLAG(FLAG)
+
+#define F_PF_CALC 0x010000 /* PARITY flag has been calced */
+#define F_ZF_CALC 0x020000 /* ZERO flag has been calced */
+#define F_SF_CALC 0x040000 /* SIGN flag has been calced */
+
+#define F_ALL_CALC 0xff0000 /* All have been calced */
+
+/*
+ * Emulator machine state.
+ * Segment usage control.
+ */
+#define SYSMODE_SEG_DS_SS 0x00000001
+#define SYSMODE_SEGOVR_CS 0x00000002
+#define SYSMODE_SEGOVR_DS 0x00000004
+#define SYSMODE_SEGOVR_ES 0x00000008
+#define SYSMODE_SEGOVR_FS 0x00000010
+#define SYSMODE_SEGOVR_GS 0x00000020
+#define SYSMODE_SEGOVR_SS 0x00000040
+#define SYSMODE_PREFIX_REPE 0x00000080
+#define SYSMODE_PREFIX_REPNE 0x00000100
+#define SYSMODE_PREFIX_DATA 0x00000200
+#define SYSMODE_PREFIX_ADDR 0x00000400
+#define SYSMODE_INTR_PENDING 0x10000000
+#define SYSMODE_EXTRN_INTR 0x20000000
+#define SYSMODE_HALTED 0x40000000
+
+#define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \
+ SYSMODE_SEGOVR_CS | \
+ SYSMODE_SEGOVR_DS | \
+ SYSMODE_SEGOVR_ES | \
+ SYSMODE_SEGOVR_FS | \
+ SYSMODE_SEGOVR_GS | \
+ SYSMODE_SEGOVR_SS)
+#define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \
+ SYSMODE_SEGOVR_CS | \
+ SYSMODE_SEGOVR_DS | \
+ SYSMODE_SEGOVR_ES | \
+ SYSMODE_SEGOVR_FS | \
+ SYSMODE_SEGOVR_GS | \
+ SYSMODE_SEGOVR_SS | \
+ SYSMODE_PREFIX_DATA | \
+ SYSMODE_PREFIX_ADDR)
+
+#define INTR_SYNCH 0x1
+#define INTR_ASYNCH 0x2
+#define INTR_HALTED 0x4
+
+typedef struct {
+ struct i386_general_regs gen;
+ struct i386_special_regs spc;
+ struct i386_segment_regs seg;
+ /*
+ * MODE contains information on:
+ * REPE prefix 2 bits repe,repne
+ * SEGMENT overrides 5 bits normal,DS,SS,CS,ES
+ * Delayed flag set 3 bits (zero, signed, parity)
+ * reserved 6 bits
+ * interrupt # 8 bits instruction raised interrupt
+ * BIOS video segregs 4 bits
+ * Interrupt Pending 1 bits
+ * Extern interrupt 1 bits
+ * Halted 1 bits
+ */
+ long mode;
+ u8 intno;
+ volatile int intr; /* mask of pending interrupts */
+ int debug;
+#ifdef DEBUG
+ int check;
+ u16 saved_ip;
+ u16 saved_cs;
+ int enc_pos;
+ int enc_str_pos;
+ char decode_buf[32]; /* encoded byte stream */
+ char decoded_buf[256]; /* disassembled strings */
+#endif
+} X86EMU_regs;
+
+/****************************************************************************
+REMARKS:
+Structure maintaining the emulator machine state.
+
+MEMBERS:
+x86 - X86 registers
+mem_base - Base real mode memory for the emulator
+mem_size - Size of the real mode memory block for the emulator
+****************************************************************************/
+#undef x86
+typedef struct {
+ X86EMU_regs x86;
+ u8 *mem_base;
+ u32 mem_size;
+ void *private;
+} X86EMU_sysEnv;
+
+#pragma pack()
+
+/*----------------------------- Global Variables --------------------------*/
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+/* Global emulator machine state.
+ *
+ * We keep it global to avoid pointer dereferences in the code for speed.
+ */
+
+ extern X86EMU_sysEnv _X86EMU_env;
+#define M _X86EMU_env
+
+/*-------------------------- Function Prototypes --------------------------*/
+
+/* Function to log information at runtime */
+
+#ifndef __KERNEL__
+ void printk(const char *fmt, ...);
+#endif
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+#endif /* __X86EMU_REGS_H */
diff --git a/drivers/bios_emulator/include/x86emu/x86emui.h b/drivers/bios_emulator/include/x86emu/x86emui.h
new file mode 100644
index 0000000..a74957d
--- /dev/null
+++ b/drivers/bios_emulator/include/x86emu/x86emui.h
@@ -0,0 +1,101 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: Header file for system specific functions. These functions
+* are always compiled and linked in the OS depedent libraries,
+* and never in a binary portable driver.
+*
+****************************************************************************/
+
+#ifndef __X86EMU_X86EMUI_H
+#define __X86EMU_X86EMUI_H
+
+/* If we are compiling in C++ mode, we can compile some functions as
+ * inline to increase performance (however the code size increases quite
+ * dramatically in this case).
+ */
+
+#if defined(__cplusplus) && !defined(_NO_INLINE)
+#define _INLINE inline
+#else
+#define _INLINE static
+#endif
+
+/* Get rid of unused parameters in C++ compilation mode */
+
+#ifdef __cplusplus
+#define X86EMU_UNUSED(v)
+#else
+#define X86EMU_UNUSED(v) v
+#endif
+
+#include "x86emu.h"
+#include "x86emu/regs.h"
+#include "x86emu/debug.h"
+#include "x86emu/decode.h"
+#include "x86emu/ops.h"
+#include "x86emu/prim_ops.h"
+#ifndef __KERNEL__
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#endif
+
+#define printk printf
+
+
+/*--------------------------- Inline Functions ----------------------------*/
+
+#ifdef __cplusplus
+extern "C" { /* Use "C" linkage when in C++ mode */
+#endif
+
+ extern u8(X86APIP sys_rdb) (u32 addr);
+ extern u16(X86APIP sys_rdw) (u32 addr);
+ extern u32(X86APIP sys_rdl) (u32 addr);
+ extern void (X86APIP sys_wrb) (u32 addr, u8 val);
+ extern void (X86APIP sys_wrw) (u32 addr, u16 val);
+ extern void (X86APIP sys_wrl) (u32 addr, u32 val);
+
+ extern u8(X86APIP sys_inb) (X86EMU_pioAddr addr);
+ extern u16(X86APIP sys_inw) (X86EMU_pioAddr addr);
+ extern u32(X86APIP sys_inl) (X86EMU_pioAddr addr);
+ extern void (X86APIP sys_outb) (X86EMU_pioAddr addr, u8 val);
+ extern void (X86APIP sys_outw) (X86EMU_pioAddr addr, u16 val);
+ extern void (X86APIP sys_outl) (X86EMU_pioAddr addr, u32 val);
+
+#ifdef __cplusplus
+} /* End of "C" linkage for C++ */
+#endif
+#endif /* __X86EMU_X86EMUI_H */
diff --git a/drivers/bios_emulator/x86emu/debug.c b/drivers/bios_emulator/x86emu/debug.c
new file mode 100644
index 0000000..5cbcc95
--- /dev/null
+++ b/drivers/bios_emulator/x86emu/debug.c
@@ -0,0 +1,467 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file contains the code to handle debugging of the
+* emulator.
+*
+****************************************************************************/
+
+#include <stdarg.h>
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "x86emu/x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+#ifdef DEBUG
+
+static void print_encoded_bytes(u16 s, u16 o);
+static void print_decoded_instruction(void);
+static int parse_line(char *s, int *ps, int *n);
+
+/* should look something like debug's output. */
+void X86EMU_trace_regs(void)
+{
+ if (DEBUG_TRACE()) {
+ x86emu_dump_regs();
+ }
+ if (DEBUG_DECODE() && !DEBUG_DECODE_NOPRINT()) {
+ printk("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip);
+ print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip);
+ print_decoded_instruction();
+ }
+}
+
+void X86EMU_trace_xregs(void)
+{
+ if (DEBUG_TRACE()) {
+ x86emu_dump_xregs();
+ }
+}
+
+void x86emu_just_disassemble(void)
+{
+ /*
+ * This routine called if the flag DEBUG_DISASSEMBLE is set kind
+ * of a hack!
+ */
+ printk("%04x:%04x ", M.x86.saved_cs, M.x86.saved_ip);
+ print_encoded_bytes(M.x86.saved_cs, M.x86.saved_ip);
+ print_decoded_instruction();
+}
+
+static void disassemble_forward(u16 seg, u16 off, int n)
+{
+ X86EMU_sysEnv tregs;
+ int i;
+ u8 op1;
+ /*
+ * hack, hack, hack. What we do is use the exact machinery set up
+ * for execution, except that now there is an additional state
+ * flag associated with the "execution", and we are using a copy
+ * of the register struct. All the major opcodes, once fully
+ * decoded, have the following two steps: TRACE_REGS(r,m);
+ * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to
+ * the preprocessor. The TRACE_REGS macro expands to:
+ *
+ * if (debug&DEBUG_DISASSEMBLE)
+ * {just_disassemble(); goto EndOfInstruction;}
+ * if (debug&DEBUG_TRACE) trace_regs(r,m);
+ *
+ * ...... and at the last line of the routine.
+ *
+ * EndOfInstruction: end_instr();
+ *
+ * Up to the point where TRACE_REG is expanded, NO modifications
+ * are done to any register EXCEPT the IP register, for fetch and
+ * decoding purposes.
+ *
+ * This was done for an entirely different reason, but makes a
+ * nice way to get the system to help debug codes.
+ */
+ tregs = M;
+ tregs.x86.R_IP = off;
+ tregs.x86.R_CS = seg;
+
+ /* reset the decoding buffers */
+ tregs.x86.enc_str_pos = 0;
+ tregs.x86.enc_pos = 0;
+
+ /* turn on the "disassemble only, no execute" flag */
+ tregs.x86.debug |= DEBUG_DISASSEMBLE_F;
+
+ /* DUMP NEXT n instructions to screen in straight_line fashion */
+ /*
+ * This looks like the regular instruction fetch stream, except
+ * that when this occurs, each fetched opcode, upon seeing the
+ * DEBUG_DISASSEMBLE flag set, exits immediately after decoding
+ * the instruction. XXX --- CHECK THAT MEM IS NOT AFFECTED!!!
+ * Note the use of a copy of the register structure...
+ */
+ for (i = 0; i < n; i++) {
+ op1 = (*sys_rdb) (((u32) M.x86.R_CS << 4) + (M.x86.R_IP++));
+ (x86emu_optab[op1]) (op1);
+ }
+ /* end major hack mode. */
+}
+
+void x86emu_check_ip_access(void)
+{
+ /* NULL as of now */
+}
+
+void x86emu_check_sp_access(void)
+{
+}
+
+void x86emu_check_mem_access(u32 dummy)
+{
+ /* check bounds, etc */
+}
+
+void x86emu_check_data_access(uint dummy1, uint dummy2)
+{
+ /* check bounds, etc */
+}
+
+void x86emu_inc_decoded_inst_len(int x)
+{
+ M.x86.enc_pos += x;
+}
+
+void x86emu_decode_printf(char *x)
+{
+ sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", x);
+ M.x86.enc_str_pos += strlen(x);
+}
+
+void x86emu_decode_printf2(char *x, int y)
+{
+ char temp[100];
+ sprintf(temp, x, y);
+ sprintf(M.x86.decoded_buf + M.x86.enc_str_pos, "%s", temp);
+ M.x86.enc_str_pos += strlen(temp);
+}
+
+void x86emu_end_instr(void)
+{
+ M.x86.enc_str_pos = 0;
+ M.x86.enc_pos = 0;
+}
+
+static void print_encoded_bytes(u16 s, u16 o)
+{
+ int i;
+ char buf1[64];
+ for (i = 0; i < M.x86.enc_pos; i++) {
+ sprintf(buf1 + 2 * i, "%02x", fetch_data_byte_abs(s, o + i));
+ }
+ printk("%-20s", buf1);
+}
+
+static void print_decoded_instruction(void)
+{
+ printk("%s", M.x86.decoded_buf);
+}
+
+void x86emu_print_int_vect(u16 iv)
+{
+ u16 seg, off;
+
+ if (iv > 256)
+ return;
+ seg = fetch_data_word_abs(0, iv * 4);
+ off = fetch_data_word_abs(0, iv * 4 + 2);
+ printk("%04x:%04x ", seg, off);
+}
+
+void X86EMU_dump_memory(u16 seg, u16 off, u32 amt)
+{
+ u32 start = off & 0xfffffff0;
+ u32 end = (off + 16) & 0xfffffff0;
+ u32 i;
+ u32 current;
+
+ current = start;
+ while (end <= off + amt) {
+ printk("%04x:%04x ", seg, start);
+ for (i = start; i < off; i++)
+ printk(" ");
+ for (; i < end; i++)
+ printk("%02x ", fetch_data_byte_abs(seg, i));
+ printk("\n");
+ start = end;
+ end = start + 16;
+ }
+}
+
+void x86emu_single_step(void)
+{
+ char s[1024];
+ int ps[10];
+ int ntok;
+ int cmd;
+ int done;
+ int segment;
+ int offset;
+ static int breakpoint;
+ static int noDecode = 1;
+
+ char *p;
+
+ if (DEBUG_BREAK()) {
+ if (M.x86.saved_ip != breakpoint) {
+ return;
+ } else {
+ M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
+ M.x86.debug |= DEBUG_TRACE_F;
+ M.x86.debug &= ~DEBUG_BREAK_F;
+ print_decoded_instruction();
+ X86EMU_trace_regs();
+ }
+ }
+ done = 0;
+ offset = M.x86.saved_ip;
+ while (!done) {
+ printk("-");
+ cmd = parse_line(s, ps, &ntok);
+ switch (cmd) {
+ case 'u':
+ disassemble_forward(M.x86.saved_cs, (u16) offset, 10);
+ break;
+ case 'd':
+ if (ntok == 2) {
+ segment = M.x86.saved_cs;
+ offset = ps[1];
+ X86EMU_dump_memory(segment, (u16) offset, 16);
+ offset += 16;
+ } else if (ntok == 3) {
+ segment = ps[1];
+ offset = ps[2];
+ X86EMU_dump_memory(segment, (u16) offset, 16);
+ offset += 16;
+ } else {
+ segment = M.x86.saved_cs;
+ X86EMU_dump_memory(segment, (u16) offset, 16);
+ offset += 16;
+ }
+ break;
+ case 'c':
+ M.x86.debug ^= DEBUG_TRACECALL_F;
+ break;
+ case 's':
+ M.x86.debug ^=
+ DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F;
+ break;
+ case 'r':
+ X86EMU_trace_regs();
+ break;
+ case 'x':
+ X86EMU_trace_xregs();
+ break;
+ case 'g':
+ if (ntok == 2) {
+ breakpoint = ps[1];
+ if (noDecode) {
+ M.x86.debug |= DEBUG_DECODE_NOPRINT_F;
+ } else {
+ M.x86.debug &= ~DEBUG_DECODE_NOPRINT_F;
+ }
+ M.x86.debug &= ~DEBUG_TRACE_F;
+ M.x86.debug |= DEBUG_BREAK_F;
+ done = 1;
+ }
+ break;
+ case 'q':
+ M.x86.debug |= DEBUG_EXIT;
+ return;
+ case 'P':
+ noDecode = (noDecode) ? 0 : 1;
+ printk("Toggled decoding to %s\n",
+ (noDecode) ? "FALSE" : "TRUE");
+ break;
+ case 't':
+ case 0:
+ done = 1;
+ break;
+ }
+ }
+}
+
+int X86EMU_trace_on(void)
+{
+ return M.x86.debug |= DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F;
+}
+
+int X86EMU_trace_off(void)
+{
+ return M.x86.debug &= ~(DEBUG_STEP_F | DEBUG_DECODE_F | DEBUG_TRACE_F);
+}
+
+static int parse_line(char *s, int *ps, int *n)
+{
+ int cmd;
+
+ *n = 0;
+ while (*s == ' ' || *s == '\t')
+ s++;
+ ps[*n] = *s;
+ switch (*s) {
+ case '\n':
+ *n += 1;
+ return 0;
+ default:
+ cmd = *s;
+ *n += 1;
+ }
+
+ while (1) {
+ while (*s != ' ' && *s != '\t' && *s != '\n')
+ s++;
+
+ if (*s == '\n')
+ return cmd;
+
+ while (*s == ' ' || *s == '\t')
+ s++;
+
+ *n += 1;
+ }
+}
+
+#endif /* DEBUG */
+
+void x86emu_dump_regs(void)
+{
+ printk("\tAX=%04x ", M.x86.R_AX);
+ printk("BX=%04x ", M.x86.R_BX);
+ printk("CX=%04x ", M.x86.R_CX);
+ printk("DX=%04x ", M.x86.R_DX);
+ printk("SP=%04x ", M.x86.R_SP);
+ printk("BP=%04x ", M.x86.R_BP);
+ printk("SI=%04x ", M.x86.R_SI);
+ printk("DI=%04x\n", M.x86.R_DI);
+ printk("\tDS=%04x ", M.x86.R_DS);
+ printk("ES=%04x ", M.x86.R_ES);
+ printk("SS=%04x ", M.x86.R_SS);
+ printk("CS=%04x ", M.x86.R_CS);
+ printk("IP=%04x ", M.x86.R_IP);
+ if (ACCESS_FLAG(F_OF))
+ printk("OV "); /* CHECKED... */
+ else
+ printk("NV ");
+ if (ACCESS_FLAG(F_DF))
+ printk("DN ");
+ else
+ printk("UP ");
+ if (ACCESS_FLAG(F_IF))
+ printk("EI ");
+ else
+ printk("DI ");
+ if (ACCESS_FLAG(F_SF))
+ printk("NG ");
+ else
+ printk("PL ");
+ if (ACCESS_FLAG(F_ZF))
+ printk("ZR ");
+ else
+ printk("NZ ");
+ if (ACCESS_FLAG(F_AF))
+ printk("AC ");
+ else
+ printk("NA ");
+ if (ACCESS_FLAG(F_PF))
+ printk("PE ");
+ else
+ printk("PO ");
+ if (ACCESS_FLAG(F_CF))
+ printk("CY ");
+ else
+ printk("NC ");
+ printk("\n");
+}
+
+void x86emu_dump_xregs(void)
+{
+ printk("\tEAX=%08x ", M.x86.R_EAX);
+ printk("EBX=%08x ", M.x86.R_EBX);
+ printk("ECX=%08x ", M.x86.R_ECX);
+ printk("EDX=%08x \n", M.x86.R_EDX);
+ printk("\tESP=%08x ", M.x86.R_ESP);
+ printk("EBP=%08x ", M.x86.R_EBP);
+ printk("ESI=%08x ", M.x86.R_ESI);
+ printk("EDI=%08x\n", M.x86.R_EDI);
+ printk("\tDS=%04x ", M.x86.R_DS);
+ printk("ES=%04x ", M.x86.R_ES);
+ printk("SS=%04x ", M.x86.R_SS);
+ printk("CS=%04x ", M.x86.R_CS);
+ printk("EIP=%08x\n\t", M.x86.R_EIP);
+ if (ACCESS_FLAG(F_OF))
+ printk("OV "); /* CHECKED... */
+ else
+ printk("NV ");
+ if (ACCESS_FLAG(F_DF))
+ printk("DN ");
+ else
+ printk("UP ");
+ if (ACCESS_FLAG(F_IF))
+ printk("EI ");
+ else
+ printk("DI ");
+ if (ACCESS_FLAG(F_SF))
+ printk("NG ");
+ else
+ printk("PL ");
+ if (ACCESS_FLAG(F_ZF))
+ printk("ZR ");
+ else
+ printk("NZ ");
+ if (ACCESS_FLAG(F_AF))
+ printk("AC ");
+ else
+ printk("NA ");
+ if (ACCESS_FLAG(F_PF))
+ printk("PE ");
+ else
+ printk("PO ");
+ if (ACCESS_FLAG(F_CF))
+ printk("CY ");
+ else
+ printk("NC ");
+ printk("\n");
+}
+
+#endif
diff --git a/drivers/bios_emulator/x86emu/decode.c b/drivers/bios_emulator/x86emu/decode.c
new file mode 100644
index 0000000..7a9a1dd
--- /dev/null
+++ b/drivers/bios_emulator/x86emu/decode.c
@@ -0,0 +1,1149 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file includes subroutines which are related to
+* instruction decoding and accessess of immediate data via IP. etc.
+*
+****************************************************************************/
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "x86emu/x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+REMARKS:
+Handles any pending asychronous interrupts.
+****************************************************************************/
+static void x86emu_intr_handle(void)
+{
+ u8 intno;
+
+ if (M.x86.intr & INTR_SYNCH) {
+ intno = M.x86.intno;
+ if (_X86EMU_intrTab[intno]) {
+ (*_X86EMU_intrTab[intno])(intno);
+ } else {
+ push_word((u16)M.x86.R_FLG);
+ CLEAR_FLAG(F_IF);
+ CLEAR_FLAG(F_TF);
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = mem_access_word(intno * 4 + 2);
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = mem_access_word(intno * 4);
+ M.x86.intr = 0;
+ }
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+intrnum - Interrupt number to raise
+
+REMARKS:
+Raise the specified interrupt to be handled before the execution of the
+next instruction.
+****************************************************************************/
+void x86emu_intr_raise(
+ u8 intrnum)
+{
+ M.x86.intno = intrnum;
+ M.x86.intr |= INTR_SYNCH;
+}
+
+/****************************************************************************
+REMARKS:
+Main execution loop for the emulator. We return from here when the system
+halts, which is normally caused by a stack fault when we return from the
+original real mode call.
+****************************************************************************/
+void X86EMU_exec(void)
+{
+ u8 op1;
+
+ M.x86.intr = 0;
+ DB(x86emu_end_instr();)
+
+ for (;;) {
+DB( if (CHECK_IP_FETCH())
+ x86emu_check_ip_access();)
+ /* If debugging, save the IP and CS values. */
+ SAVE_IP_CS(M.x86.R_CS, M.x86.R_IP);
+ INC_DECODED_INST_LEN(1);
+ if (M.x86.intr) {
+ if (M.x86.intr & INTR_HALTED) {
+DB( if (M.x86.R_SP != 0) {
+ printk("halted\n");
+ X86EMU_trace_regs();
+ }
+ else {
+ if (M.x86.debug)
+ printk("Service completed successfully\n");
+ })
+ return;
+ }
+ if (((M.x86.intr & INTR_SYNCH) && (M.x86.intno == 0 || M.x86.intno == 2)) ||
+ !ACCESS_FLAG(F_IF)) {
+ x86emu_intr_handle();
+ }
+ }
+ op1 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+ (*x86emu_optab[op1])(op1);
+ if (M.x86.debug & DEBUG_EXIT) {
+ M.x86.debug &= ~DEBUG_EXIT;
+ return;
+ }
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Halts the system by setting the halted system flag.
+****************************************************************************/
+void X86EMU_halt_sys(void)
+{
+ M.x86.intr |= INTR_HALTED;
+}
+
+/****************************************************************************
+PARAMETERS:
+mod - Mod value from decoded byte
+regh - Reg h value from decoded byte
+regl - Reg l value from decoded byte
+
+REMARKS:
+Raise the specified interrupt to be handled before the execution of the
+next instruction.
+
+NOTE: Do not inline this function, as (*sys_rdb) is already inline!
+****************************************************************************/
+void fetch_decode_modrm(
+ int *mod,
+ int *regh,
+ int *regl)
+{
+ int fetched;
+
+DB( if (CHECK_IP_FETCH())
+ x86emu_check_ip_access();)
+ fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+ INC_DECODED_INST_LEN(1);
+ *mod = (fetched >> 6) & 0x03;
+ *regh = (fetched >> 3) & 0x07;
+ *regl = (fetched >> 0) & 0x07;
+}
+
+/****************************************************************************
+RETURNS:
+Immediate byte value read from instruction queue
+
+REMARKS:
+This function returns the immediate byte from the instruction queue, and
+moves the instruction pointer to the next value.
+
+NOTE: Do not inline this function, as (*sys_rdb) is already inline!
+****************************************************************************/
+u8 fetch_byte_imm(void)
+{
+ u8 fetched;
+
+DB( if (CHECK_IP_FETCH())
+ x86emu_check_ip_access();)
+ fetched = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+ INC_DECODED_INST_LEN(1);
+ return fetched;
+}
+
+/****************************************************************************
+RETURNS:
+Immediate word value read from instruction queue
+
+REMARKS:
+This function returns the immediate byte from the instruction queue, and
+moves the instruction pointer to the next value.
+
+NOTE: Do not inline this function, as (*sys_rdw) is already inline!
+****************************************************************************/
+u16 fetch_word_imm(void)
+{
+ u16 fetched;
+
+DB( if (CHECK_IP_FETCH())
+ x86emu_check_ip_access();)
+ fetched = (*sys_rdw)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
+ M.x86.R_IP += 2;
+ INC_DECODED_INST_LEN(2);
+ return fetched;
+}
+
+/****************************************************************************
+RETURNS:
+Immediate lone value read from instruction queue
+
+REMARKS:
+This function returns the immediate byte from the instruction queue, and
+moves the instruction pointer to the next value.
+
+NOTE: Do not inline this function, as (*sys_rdw) is already inline!
+****************************************************************************/
+u32 fetch_long_imm(void)
+{
+ u32 fetched;
+
+DB( if (CHECK_IP_FETCH())
+ x86emu_check_ip_access();)
+ fetched = (*sys_rdl)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP));
+ M.x86.R_IP += 4;
+ INC_DECODED_INST_LEN(4);
+ return fetched;
+}
+
+/****************************************************************************
+RETURNS:
+Value of the default data segment
+
+REMARKS:
+Inline function that returns the default data segment for the current
+instruction.
+
+On the x86 processor, the default segment is not always DS if there is
+no segment override. Address modes such as -3[BP] or 10[BP+SI] all refer to
+addresses relative to SS (ie: on the stack). So, at the minimum, all
+decodings of addressing modes would have to set/clear a bit describing
+whether the access is relative to DS or SS. That is the function of the
+cpu-state-varible M.x86.mode. There are several potential states:
+
+ repe prefix seen (handled elsewhere)
+ repne prefix seen (ditto)
+
+ cs segment override
+ ds segment override
+ es segment override
+ fs segment override
+ gs segment override
+ ss segment override
+
+ ds/ss select (in absense of override)
+
+Each of the above 7 items are handled with a bit in the mode field.
+****************************************************************************/
+_INLINE u32 get_data_segment(void)
+{
+#define GET_SEGMENT(segment)
+ switch (M.x86.mode & SYSMODE_SEGMASK) {
+ case 0: /* default case: use ds register */
+ case SYSMODE_SEGOVR_DS:
+ case SYSMODE_SEGOVR_DS | SYSMODE_SEG_DS_SS:
+ return M.x86.R_DS;
+ case SYSMODE_SEG_DS_SS: /* non-overridden, use ss register */
+ return M.x86.R_SS;
+ case SYSMODE_SEGOVR_CS:
+ case SYSMODE_SEGOVR_CS | SYSMODE_SEG_DS_SS:
+ return M.x86.R_CS;
+ case SYSMODE_SEGOVR_ES:
+ case SYSMODE_SEGOVR_ES | SYSMODE_SEG_DS_SS:
+ return M.x86.R_ES;
+ case SYSMODE_SEGOVR_FS:
+ case SYSMODE_SEGOVR_FS | SYSMODE_SEG_DS_SS:
+ return M.x86.R_FS;
+ case SYSMODE_SEGOVR_GS:
+ case SYSMODE_SEGOVR_GS | SYSMODE_SEG_DS_SS:
+ return M.x86.R_GS;
+ case SYSMODE_SEGOVR_SS:
+ case SYSMODE_SEGOVR_SS | SYSMODE_SEG_DS_SS:
+ return M.x86.R_SS;
+ default:
+#ifdef DEBUG
+ printk("error: should not happen: multiple overrides.\n");
+#endif
+ HALT_SYS();
+ return 0;
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+offset - Offset to load data from
+
+RETURNS:
+Byte value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u8 fetch_data_byte(
+ uint offset)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+ return (*sys_rdb)((get_data_segment() << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset - Offset to load data from
+
+RETURNS:
+Word value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u16 fetch_data_word(
+ uint offset)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+ return (*sys_rdw)((get_data_segment() << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset - Offset to load data from
+
+RETURNS:
+Long value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u32 fetch_data_long(
+ uint offset)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+ return (*sys_rdl)((get_data_segment() << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to load data from
+offset - Offset to load data from
+
+RETURNS:
+Byte value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u8 fetch_data_byte_abs(
+ uint segment,
+ uint offset)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access(segment, offset);
+#endif
+ return (*sys_rdb)(((u32)segment << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to load data from
+offset - Offset to load data from
+
+RETURNS:
+Word value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u16 fetch_data_word_abs(
+ uint segment,
+ uint offset)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access(segment, offset);
+#endif
+ return (*sys_rdw)(((u32)segment << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to load data from
+offset - Offset to load data from
+
+RETURNS:
+Long value read from the absolute memory location.
+
+NOTE: Do not inline this function as (*sys_rdX) is already inline!
+****************************************************************************/
+u32 fetch_data_long_abs(
+ uint segment,
+ uint offset)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access(segment, offset);
+#endif
+ return (*sys_rdl)(((u32)segment << 4) + offset);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset - Offset to store data at
+val - Value to store
+
+REMARKS:
+Writes a word value to an segmented memory location. The segment used is
+the current 'default' segment, which may have been overridden.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_byte(
+ uint offset,
+ u8 val)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+ (*sys_wrb)((get_data_segment() << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset - Offset to store data at
+val - Value to store
+
+REMARKS:
+Writes a word value to an segmented memory location. The segment used is
+the current 'default' segment, which may have been overridden.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_word(
+ uint offset,
+ u16 val)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+ (*sys_wrw)((get_data_segment() << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+offset - Offset to store data at
+val - Value to store
+
+REMARKS:
+Writes a long value to an segmented memory location. The segment used is
+the current 'default' segment, which may have been overridden.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_long(
+ uint offset,
+ u32 val)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access((u16)get_data_segment(), offset);
+#endif
+ (*sys_wrl)((get_data_segment() << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to store data at
+offset - Offset to store data at
+val - Value to store
+
+REMARKS:
+Writes a byte value to an absolute memory location.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_byte_abs(
+ uint segment,
+ uint offset,
+ u8 val)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access(segment, offset);
+#endif
+ (*sys_wrb)(((u32)segment << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to store data at
+offset - Offset to store data at
+val - Value to store
+
+REMARKS:
+Writes a word value to an absolute memory location.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_word_abs(
+ uint segment,
+ uint offset,
+ u16 val)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access(segment, offset);
+#endif
+ (*sys_wrw)(((u32)segment << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+segment - Segment to store data at
+offset - Offset to store data at
+val - Value to store
+
+REMARKS:
+Writes a long value to an absolute memory location.
+
+NOTE: Do not inline this function as (*sys_wrX) is already inline!
+****************************************************************************/
+void store_data_long_abs(
+ uint segment,
+ uint offset,
+ u32 val)
+{
+#ifdef DEBUG
+ if (CHECK_DATA_ACCESS())
+ x86emu_check_data_access(segment, offset);
+#endif
+ (*sys_wrl)(((u32)segment << 4) + offset, val);
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for byte operands. Also enables the decoding of instructions.
+****************************************************************************/
+u8* decode_rm_byte_register(
+ int reg)
+{
+ switch (reg) {
+ case 0:
+ DECODE_PRINTF("AL");
+ return &M.x86.R_AL;
+ case 1:
+ DECODE_PRINTF("CL");
+ return &M.x86.R_CL;
+ case 2:
+ DECODE_PRINTF("DL");
+ return &M.x86.R_DL;
+ case 3:
+ DECODE_PRINTF("BL");
+ return &M.x86.R_BL;
+ case 4:
+ DECODE_PRINTF("AH");
+ return &M.x86.R_AH;
+ case 5:
+ DECODE_PRINTF("CH");
+ return &M.x86.R_CH;
+ case 6:
+ DECODE_PRINTF("DH");
+ return &M.x86.R_DH;
+ case 7:
+ DECODE_PRINTF("BH");
+ return &M.x86.R_BH;
+ }
+ HALT_SYS();
+ return NULL; /* NOT REACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for word operands. Also enables the decoding of instructions.
+****************************************************************************/
+u16* decode_rm_word_register(
+ int reg)
+{
+ switch (reg) {
+ case 0:
+ DECODE_PRINTF("AX");
+ return &M.x86.R_AX;
+ case 1:
+ DECODE_PRINTF("CX");
+ return &M.x86.R_CX;
+ case 2:
+ DECODE_PRINTF("DX");
+ return &M.x86.R_DX;
+ case 3:
+ DECODE_PRINTF("BX");
+ return &M.x86.R_BX;
+ case 4:
+ DECODE_PRINTF("SP");
+ return &M.x86.R_SP;
+ case 5:
+ DECODE_PRINTF("BP");
+ return &M.x86.R_BP;
+ case 6:
+ DECODE_PRINTF("SI");
+ return &M.x86.R_SI;
+ case 7:
+ DECODE_PRINTF("DI");
+ return &M.x86.R_DI;
+ }
+ HALT_SYS();
+ return NULL; /* NOTREACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for dword operands. Also enables the decoding of instructions.
+****************************************************************************/
+u32* decode_rm_long_register(
+ int reg)
+{
+ switch (reg) {
+ case 0:
+ DECODE_PRINTF("EAX");
+ return &M.x86.R_EAX;
+ case 1:
+ DECODE_PRINTF("ECX");
+ return &M.x86.R_ECX;
+ case 2:
+ DECODE_PRINTF("EDX");
+ return &M.x86.R_EDX;
+ case 3:
+ DECODE_PRINTF("EBX");
+ return &M.x86.R_EBX;
+ case 4:
+ DECODE_PRINTF("ESP");
+ return &M.x86.R_ESP;
+ case 5:
+ DECODE_PRINTF("EBP");
+ return &M.x86.R_EBP;
+ case 6:
+ DECODE_PRINTF("ESI");
+ return &M.x86.R_ESI;
+ case 7:
+ DECODE_PRINTF("EDI");
+ return &M.x86.R_EDI;
+ }
+ HALT_SYS();
+ return NULL; /* NOTREACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+reg - Register to decode
+
+RETURNS:
+Pointer to the appropriate register
+
+REMARKS:
+Return a pointer to the register given by the R/RM field of the
+modrm byte, for word operands, modified from above for the weirdo
+special case of segreg operands. Also enables the decoding of instructions.
+****************************************************************************/
+u16* decode_rm_seg_register(
+ int reg)
+{
+ switch (reg) {
+ case 0:
+ DECODE_PRINTF("ES");
+ return &M.x86.R_ES;
+ case 1:
+ DECODE_PRINTF("CS");
+ return &M.x86.R_CS;
+ case 2:
+ DECODE_PRINTF("SS");
+ return &M.x86.R_SS;
+ case 3:
+ DECODE_PRINTF("DS");
+ return &M.x86.R_DS;
+ case 4:
+ DECODE_PRINTF("FS");
+ return &M.x86.R_FS;
+ case 5:
+ DECODE_PRINTF("GS");
+ return &M.x86.R_GS;
+ case 6:
+ case 7:
+ DECODE_PRINTF("ILLEGAL SEGREG");
+ break;
+ }
+ HALT_SYS();
+ return NULL; /* NOT REACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+scale - scale value of SIB byte
+index - index value of SIB byte
+
+RETURNS:
+Value of scale * index
+
+REMARKS:
+Decodes scale/index of SIB byte and returns relevant offset part of
+effective address.
+****************************************************************************/
+unsigned decode_sib_si(
+ int scale,
+ int index)
+{
+ scale = 1 << scale;
+ if (scale > 1) {
+ DECODE_PRINTF2("[%d*", scale);
+ } else {
+ DECODE_PRINTF("[");
+ }
+ switch (index) {
+ case 0:
+ DECODE_PRINTF("EAX]");
+ return M.x86.R_EAX * index;
+ case 1:
+ DECODE_PRINTF("ECX]");
+ return M.x86.R_ECX * index;
+ case 2:
+ DECODE_PRINTF("EDX]");
+ return M.x86.R_EDX * index;
+ case 3:
+ DECODE_PRINTF("EBX]");
+ return M.x86.R_EBX * index;
+ case 4:
+ DECODE_PRINTF("0]");
+ return 0;
+ case 5:
+ DECODE_PRINTF("EBP]");
+ return M.x86.R_EBP * index;
+ case 6:
+ DECODE_PRINTF("ESI]");
+ return M.x86.R_ESI * index;
+ case 7:
+ DECODE_PRINTF("EDI]");
+ return M.x86.R_EDI * index;
+ }
+ HALT_SYS();
+ return 0; /* NOT REACHED OR REACHED ON ERROR */
+}
+
+/****************************************************************************
+PARAMETERS:
+mod - MOD value of preceding ModR/M byte
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Decodes SIB addressing byte and returns calculated effective address.
+****************************************************************************/
+unsigned decode_sib_address(
+ int mod)
+{
+ int sib = fetch_byte_imm();
+ int ss = (sib >> 6) & 0x03;
+ int index = (sib >> 3) & 0x07;
+ int base = sib & 0x07;
+ int offset = 0;
+ int displacement;
+
+ switch (base) {
+ case 0:
+ DECODE_PRINTF("[EAX]");
+ offset = M.x86.R_EAX;
+ break;
+ case 1:
+ DECODE_PRINTF("[ECX]");
+ offset = M.x86.R_ECX;
+ break;
+ case 2:
+ DECODE_PRINTF("[EDX]");
+ offset = M.x86.R_EDX;
+ break;
+ case 3:
+ DECODE_PRINTF("[EBX]");
+ offset = M.x86.R_EBX;
+ break;
+ case 4:
+ DECODE_PRINTF("[ESP]");
+ offset = M.x86.R_ESP;
+ break;
+ case 5:
+ switch (mod) {
+ case 0:
+ displacement = (s32)fetch_long_imm();
+ DECODE_PRINTF2("[%d]", displacement);
+ offset = displacement;
+ break;
+ case 1:
+ displacement = (s8)fetch_byte_imm();
+ DECODE_PRINTF2("[%d][EBP]", displacement);
+ offset = M.x86.R_EBP + displacement;
+ break;
+ case 2:
+ displacement = (s32)fetch_long_imm();
+ DECODE_PRINTF2("[%d][EBP]", displacement);
+ offset = M.x86.R_EBP + displacement;
+ break;
+ default:
+ HALT_SYS();
+ }
+ DECODE_PRINTF("[EAX]");
+ offset = M.x86.R_EAX;
+ break;
+ case 6:
+ DECODE_PRINTF("[ESI]");
+ offset = M.x86.R_ESI;
+ break;
+ case 7:
+ DECODE_PRINTF("[EDI]");
+ offset = M.x86.R_EDI;
+ break;
+ default:
+ HALT_SYS();
+ }
+ offset += decode_sib_si(ss, index);
+ return offset;
+
+}
+
+/****************************************************************************
+PARAMETERS:
+rm - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Return the offset given by mod=00 addressing. Also enables the
+decoding of instructions.
+
+NOTE: The code which specifies the corresponding segment (ds vs ss)
+ below in the case of [BP+..]. The assumption here is that at the
+ point that this subroutine is called, the bit corresponding to
+ SYSMODE_SEG_DS_SS will be zero. After every instruction
+ except the segment override instructions, this bit (as well
+ as any bits indicating segment overrides) will be clear. So
+ if a SS access is needed, set this bit. Otherwise, DS access
+ occurs (unless any of the segment override bits are set).
+****************************************************************************/
+unsigned decode_rm00_address(
+ int rm)
+{
+ unsigned offset;
+
+ if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
+ /* 32-bit addressing */
+ switch (rm) {
+ case 0:
+ DECODE_PRINTF("[EAX]");
+ return M.x86.R_EAX;
+ case 1:
+ DECODE_PRINTF("[ECX]");
+ return M.x86.R_ECX;
+ case 2:
+ DECODE_PRINTF("[EDX]");
+ return M.x86.R_EDX;
+ case 3:
+ DECODE_PRINTF("[EBX]");
+ return M.x86.R_EBX;
+ case 4:
+ return decode_sib_address(0);
+ case 5:
+ offset = fetch_long_imm();
+ DECODE_PRINTF2("[%08x]", offset);
+ return offset;
+ case 6:
+ DECODE_PRINTF("[ESI]");
+ return M.x86.R_ESI;
+ case 7:
+ DECODE_PRINTF("[EDI]");
+ return M.x86.R_EDI;
+ }
+ } else {
+ /* 16-bit addressing */
+ switch (rm) {
+ case 0:
+ DECODE_PRINTF("[BX+SI]");
+ return (M.x86.R_BX + M.x86.R_SI) & 0xffff;
+ case 1:
+ DECODE_PRINTF("[BX+DI]");
+ return (M.x86.R_BX + M.x86.R_DI) & 0xffff;
+ case 2:
+ DECODE_PRINTF("[BP+SI]");
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + M.x86.R_SI) & 0xffff;
+ case 3:
+ DECODE_PRINTF("[BP+DI]");
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + M.x86.R_DI) & 0xffff;
+ case 4:
+ DECODE_PRINTF("[SI]");
+ return M.x86.R_SI;
+ case 5:
+ DECODE_PRINTF("[DI]");
+ return M.x86.R_DI;
+ case 6:
+ offset = fetch_word_imm();
+ DECODE_PRINTF2("[%04x]", offset);
+ return offset;
+ case 7:
+ DECODE_PRINTF("[BX]");
+ return M.x86.R_BX;
+ }
+ }
+ HALT_SYS();
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+rm - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Return the offset given by mod=01 addressing. Also enables the
+decoding of instructions.
+****************************************************************************/
+unsigned decode_rm01_address(
+ int rm)
+{
+ int displacement;
+
+ if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
+ /* 32-bit addressing */
+ if (rm != 4)
+ displacement = (s8)fetch_byte_imm();
+ else
+ displacement = 0;
+
+ switch (rm) {
+ case 0:
+ DECODE_PRINTF2("%d[EAX]", displacement);
+ return M.x86.R_EAX + displacement;
+ case 1:
+ DECODE_PRINTF2("%d[ECX]", displacement);
+ return M.x86.R_ECX + displacement;
+ case 2:
+ DECODE_PRINTF2("%d[EDX]", displacement);
+ return M.x86.R_EDX + displacement;
+ case 3:
+ DECODE_PRINTF2("%d[EBX]", displacement);
+ return M.x86.R_EBX + displacement;
+ case 4: {
+ int offset = decode_sib_address(1);
+ displacement = (s8)fetch_byte_imm();
+ DECODE_PRINTF2("[%d]", displacement);
+ return offset + displacement;
+ }
+ case 5:
+ DECODE_PRINTF2("%d[EBP]", displacement);
+ return M.x86.R_EBP + displacement;
+ case 6:
+ DECODE_PRINTF2("%d[ESI]", displacement);
+ return M.x86.R_ESI + displacement;
+ case 7:
+ DECODE_PRINTF2("%d[EDI]", displacement);
+ return M.x86.R_EDI + displacement;
+ }
+ } else {
+ /* 16-bit addressing */
+ displacement = (s8)fetch_byte_imm();
+ switch (rm) {
+ case 0:
+ DECODE_PRINTF2("%d[BX+SI]", displacement);
+ return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
+ case 1:
+ DECODE_PRINTF2("%d[BX+DI]", displacement);
+ return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
+ case 2:
+ DECODE_PRINTF2("%d[BP+SI]", displacement);
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
+ case 3:
+ DECODE_PRINTF2("%d[BP+DI]", displacement);
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
+ case 4:
+ DECODE_PRINTF2("%d[SI]", displacement);
+ return (M.x86.R_SI + displacement) & 0xffff;
+ case 5:
+ DECODE_PRINTF2("%d[DI]", displacement);
+ return (M.x86.R_DI + displacement) & 0xffff;
+ case 6:
+ DECODE_PRINTF2("%d[BP]", displacement);
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + displacement) & 0xffff;
+ case 7:
+ DECODE_PRINTF2("%d[BX]", displacement);
+ return (M.x86.R_BX + displacement) & 0xffff;
+ }
+ }
+ HALT_SYS();
+ return 0; /* SHOULD NOT HAPPEN */
+}
+
+/****************************************************************************
+PARAMETERS:
+rm - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding
+
+REMARKS:
+Return the offset given by mod=10 addressing. Also enables the
+decoding of instructions.
+****************************************************************************/
+unsigned decode_rm10_address(
+ int rm)
+{
+ if (M.x86.mode & SYSMODE_PREFIX_ADDR) {
+ int displacement;
+
+ /* 32-bit addressing */
+ if (rm != 4)
+ displacement = (s32)fetch_long_imm();
+ else
+ displacement = 0;
+
+ switch (rm) {
+ case 0:
+ DECODE_PRINTF2("%d[EAX]", displacement);
+ return M.x86.R_EAX + displacement;
+ case 1:
+ DECODE_PRINTF2("%d[ECX]", displacement);
+ return M.x86.R_ECX + displacement;
+ case 2:
+ DECODE_PRINTF2("%d[EDX]", displacement);
+ return M.x86.R_EDX + displacement;
+ case 3:
+ DECODE_PRINTF2("%d[EBX]", displacement);
+ return M.x86.R_EBX + displacement;
+ case 4: {
+ int offset = decode_sib_address(2);
+ displacement = (s32)fetch_long_imm();
+ DECODE_PRINTF2("[%d]", displacement);
+ return offset + displacement;
+ }
+ case 5:
+ DECODE_PRINTF2("%d[EBP]", displacement);
+ return M.x86.R_EBP + displacement;
+ case 6:
+ DECODE_PRINTF2("%d[ESI]", displacement);
+ return M.x86.R_ESI + displacement;
+ case 7:
+ DECODE_PRINTF2("%d[EDI]", displacement);
+ return M.x86.R_EDI + displacement;
+ }
+ } else {
+ int displacement = (s16)fetch_word_imm();
+
+ /* 16-bit addressing */
+ switch (rm) {
+ case 0:
+ DECODE_PRINTF2("%d[BX+SI]", displacement);
+ return (M.x86.R_BX + M.x86.R_SI + displacement) & 0xffff;
+ case 1:
+ DECODE_PRINTF2("%d[BX+DI]", displacement);
+ return (M.x86.R_BX + M.x86.R_DI + displacement) & 0xffff;
+ case 2:
+ DECODE_PRINTF2("%d[BP+SI]", displacement);
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + M.x86.R_SI + displacement) & 0xffff;
+ case 3:
+ DECODE_PRINTF2("%d[BP+DI]", displacement);
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + M.x86.R_DI + displacement) & 0xffff;
+ case 4:
+ DECODE_PRINTF2("%d[SI]", displacement);
+ return (M.x86.R_SI + displacement) & 0xffff;
+ case 5:
+ DECODE_PRINTF2("%d[DI]", displacement);
+ return (M.x86.R_DI + displacement) & 0xffff;
+ case 6:
+ DECODE_PRINTF2("%d[BP]", displacement);
+ M.x86.mode |= SYSMODE_SEG_DS_SS;
+ return (M.x86.R_BP + displacement) & 0xffff;
+ case 7:
+ DECODE_PRINTF2("%d[BX]", displacement);
+ return (M.x86.R_BX + displacement) & 0xffff;
+ }
+ }
+ HALT_SYS();
+ return 0; /* SHOULD NOT HAPPEN */
+}
+
+/****************************************************************************
+PARAMETERS:
+mod - modifier
+rm - RM value to decode
+
+RETURNS:
+Offset in memory for the address decoding, multiplexing calls to
+the decode_rmXX_address functions
+
+REMARKS:
+Return the offset given by "mod" addressing.
+****************************************************************************/
+
+unsigned decode_rmXX_address(int mod, int rm)
+{
+ if(mod == 0)
+ return decode_rm00_address(rm);
+ if(mod == 1)
+ return decode_rm01_address(rm);
+ return decode_rm10_address(rm);
+}
+
+#endif
diff --git a/drivers/bios_emulator/x86emu/ops.c b/drivers/bios_emulator/x86emu/ops.c
new file mode 100644
index 0000000..a77bd9b
--- /dev/null
+++ b/drivers/bios_emulator/x86emu/ops.c
@@ -0,0 +1,5438 @@
+/****************************************************************************
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin <Jason.jin@freescale.com>
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file includes subroutines to implement the decoding
+* and emulation of all the x86 processor instructions.
+*
+* There are approximately 250 subroutines in here, which correspond
+* to the 256 byte-"opcodes" found on the 8086. The table which
+* dispatches this is found in the files optab.[ch].
+*
+* Each opcode proc has a comment preceeding it which gives it's table
+* address. Several opcodes are missing (undefined) in the table.
+*
+* Each proc includes information for decoding (DECODE_PRINTF and
+* DECODE_PRINTF2), debugging (TRACE_REGS, SINGLE_STEP), and misc
+* functions (START_OF_INSTR, END_OF_INSTR).
+*
+* Many of the procedures are *VERY* similar in coding. This has
+* allowed for a very large amount of code to be generated in a fairly
+* short amount of time (i.e. cut, paste, and modify). The result is
+* that much of the code below could have been folded into subroutines
+* for a large reduction in size of this file. The downside would be
+* that there would be a penalty in execution speed. The file could
+* also have been *MUCH* larger by inlining certain functions which
+* were called. This could have resulted even faster execution. The
+* prime directive I used to decide whether to inline the code or to
+* modularize it, was basically: 1) no unnecessary subroutine calls,
+* 2) no routines more than about 200 lines in size, and 3) modularize
+* any code that I might not get right the first time. The fetch_*
+* subroutines fall into the latter category. The The decode_* fall
+* into the second category. The coding of the "switch(mod){ .... }"
+* in many of the subroutines below falls into the first category.
+* Especially, the coding of {add,and,or,sub,...}_{byte,word}
+* subroutines are an especially glaring case of the third guideline.
+* Since so much of the code is cloned from other modules (compare
+* opcode #00 to opcode #01), making the basic operations subroutine
+* calls is especially important; otherwise mistakes in coding an
+* "add" would represent a nightmare in maintenance.
+*
+* Jason ported this file to u-boot. place all the function pointer in
+* the got2 sector. Removed some opcode.
+*
+****************************************************************************/
+
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "x86emu/x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/* constant arrays to do several instructions in just one function */
+
+#ifdef DEBUG
+static char *x86emu_GenOpName[8] = {
+ "ADD", "OR", "ADC", "SBB", "AND", "SUB", "XOR", "CMP"};
+#endif
+
+/* used by several opcodes */
+static u8 (*genop_byte_operation[])(u8 d, u8 s) __attribute__ ((section(".got2"))) =
+{
+ add_byte, /* 00 */
+ or_byte, /* 01 */
+ adc_byte, /* 02 */
+ sbb_byte, /* 03 */
+ and_byte, /* 04 */
+ sub_byte, /* 05 */
+ xor_byte, /* 06 */
+ cmp_byte, /* 07 */
+};
+
+static u16 (*genop_word_operation[])(u16 d, u16 s) __attribute__ ((section(".got2"))) =
+{
+ add_word, /*00 */
+ or_word, /*01 */
+ adc_word, /*02 */
+ sbb_word, /*03 */
+ and_word, /*04 */
+ sub_word, /*05 */
+ xor_word, /*06 */
+ cmp_word, /*07 */
+};
+
+static u32 (*genop_long_operation[])(u32 d, u32 s) __attribute__ ((section(".got2"))) =
+{
+ add_long, /*00 */
+ or_long, /*01 */
+ adc_long, /*02 */
+ sbb_long, /*03 */
+ and_long, /*04 */
+ sub_long, /*05 */
+ xor_long, /*06 */
+ cmp_long, /*07 */
+};
+
+/* used by opcodes 80, c0, d0, and d2. */
+static u8(*opcD0_byte_operation[])(u8 d, u8 s) __attribute__ ((section(".got2"))) =
+{
+ rol_byte,
+ ror_byte,
+ rcl_byte,
+ rcr_byte,
+ shl_byte,
+ shr_byte,
+ shl_byte, /* sal_byte === shl_byte by definition */
+ sar_byte,
+};
+
+/* used by opcodes c1, d1, and d3. */
+static u16(*opcD1_word_operation[])(u16 s, u8 d) __attribute__ ((section(".got2"))) =
+{
+ rol_word,
+ ror_word,
+ rcl_word,
+ rcr_word,
+ shl_word,
+ shr_word,
+ shl_word, /* sal_byte === shl_byte by definition */
+ sar_word,
+};
+
+/* used by opcodes c1, d1, and d3. */
+static u32 (*opcD1_long_operation[])(u32 s, u8 d) __attribute__ ((section(".got2"))) =
+{
+ rol_long,
+ ror_long,
+ rcl_long,
+ rcr_long,
+ shl_long,
+ shr_long,
+ shl_long, /* sal_byte === shl_byte by definition */
+ sar_long,
+};
+
+#ifdef DEBUG
+
+static char *opF6_names[8] =
+ { "TEST\t", "", "NOT\t", "NEG\t", "MUL\t", "IMUL\t", "DIV\t", "IDIV\t" };
+
+#endif
+
+/****************************************************************************
+PARAMETERS:
+op1 - Instruction op code
+
+REMARKS:
+Handles illegal opcodes.
+****************************************************************************/
+void x86emuOp_illegal_op(
+ u8 op1)
+{
+ START_OF_INSTR();
+ if (M.x86.R_SP != 0) {
+ DECODE_PRINTF("ILLEGAL X86 OPCODE\n");
+ TRACE_REGS();
+ DB( printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n",
+ M.x86.R_CS, M.x86.R_IP-1,op1));
+ HALT_SYS();
+ }
+ else {
+ /* If we get here, it means the stack pointer is back to zero
+ * so we are just returning from an emulator service call
+ * so therte is no need to display an error message. We trap
+ * the emulator with an 0xF1 opcode to finish the service
+ * call.
+ */
+ X86EMU_halt_sys();
+ }
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x00, 0x08, 0x10, 0x18, 0x20, 0x28, 0x30, 0x38
+****************************************************************************/
+void x86emuOp_genop_byte_RM_R(u8 op1)
+{
+ int mod, rl, rh;
+ uint destoffset;
+ u8 *destreg, *srcreg;
+ u8 destval;
+
+ op1 = (op1 >> 3) & 0x7;
+
+ START_OF_INSTR();
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if(mod<3)
+ { destoffset = decode_rmXX_address(mod,rl);
+ DECODE_PRINTF(",");
+ destval = fetch_data_byte(destoffset);
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = genop_byte_operation[op1](destval, *srcreg);
+ store_data_byte(destoffset, destval);
+ }
+ else
+ { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = genop_byte_operation[op1](*destreg, *srcreg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x01, 0x09, 0x11, 0x19, 0x21, 0x29, 0x31, 0x39
+****************************************************************************/
+void x86emuOp_genop_word_RM_R(u8 op1)
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ op1 = (op1 >> 3) & 0x7;
+
+ START_OF_INSTR();
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+
+ if(mod<3) {
+ destoffset = decode_rmXX_address(mod,rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *srcreg;
+
+ DECODE_PRINTF(",");
+ destval = fetch_data_long(destoffset);
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = genop_long_operation[op1](destval, *srcreg);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *srcreg;
+
+ DECODE_PRINTF(",");
+ destval = fetch_data_word(destoffset);
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = genop_word_operation[op1](destval, *srcreg);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = genop_long_operation[op1](*destreg, *srcreg);
+ } else {
+ u16 *destreg,*srcreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = genop_word_operation[op1](*destreg, *srcreg);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x02, 0x0a, 0x12, 0x1a, 0x22, 0x2a, 0x32, 0x3a
+****************************************************************************/
+void x86emuOp_genop_byte_R_RM(u8 op1)
+{
+ int mod, rl, rh;
+ u8 *destreg, *srcreg;
+ uint srcoffset;
+ u8 srcval;
+
+ op1 = (op1 >> 3) & 0x7;
+
+ START_OF_INSTR();
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod,rl);
+ srcval = fetch_data_byte(srcoffset);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ srcval = *srcreg;
+ }
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = genop_byte_operation[op1](*destreg, srcval);
+
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x03, 0x0b, 0x13, 0x1b, 0x23, 0x2b, 0x33, 0x3b
+****************************************************************************/
+void x86emuOp_genop_word_R_RM(u8 op1)
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ u32 *destreg32, srcval;
+ u16 *destreg;
+
+ op1 = (op1 >> 3) & 0x7;
+
+ START_OF_INSTR();
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod,rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ destreg32 = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcval = fetch_data_long(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg32 = genop_long_operation[op1](*destreg32, srcval);
+ } else {
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = genop_word_operation[op1](*destreg, srcval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg;
+ destreg32 = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg32 = genop_long_operation[op1](*destreg32, *srcreg);
+ } else {
+ u16 *srcreg;
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = genop_word_operation[op1](*destreg, *srcreg);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x04, 0x0c, 0x14, 0x1c, 0x24, 0x2c, 0x34, 0x3c
+****************************************************************************/
+void x86emuOp_genop_byte_AL_IMM(u8 op1)
+{
+ u8 srcval;
+
+ op1 = (op1 >> 3) & 0x7;
+
+ START_OF_INSTR();
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\tAL,");
+ srcval = fetch_byte_imm();
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ M.x86.R_AL = genop_byte_operation[op1](M.x86.R_AL, srcval);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcodes 0x05, 0x0d, 0x15, 0x1d, 0x25, 0x2d, 0x35, 0x3d
+****************************************************************************/
+void x86emuOp_genop_word_AX_IMM(u8 op1)
+{
+ u32 srcval;
+
+ op1 = (op1 >> 3) & 0x7;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\tEAX,");
+ srcval = fetch_long_imm();
+ } else {
+ DECODE_PRINTF(x86emu_GenOpName[op1]);
+ DECODE_PRINTF("\tAX,");
+ srcval = fetch_word_imm();
+ }
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EAX = genop_long_operation[op1](M.x86.R_EAX, srcval);
+ } else {
+ M.x86.R_AX = genop_word_operation[op1](M.x86.R_AX, (u16)srcval);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x06
+****************************************************************************/
+void x86emuOp_push_ES(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tES\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_ES);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x07
+****************************************************************************/
+void x86emuOp_pop_ES(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tES\n");
+ TRACE_AND_STEP();
+ M.x86.R_ES = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0e
+****************************************************************************/
+void x86emuOp_push_CS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tCS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_CS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f. Escape for two-byte opcode (286 or better)
+****************************************************************************/
+void x86emuOp_two_byte(u8 X86EMU_UNUSED(op1))
+{
+ u8 op2 = (*sys_rdb)(((u32)M.x86.R_CS << 4) + (M.x86.R_IP++));
+ INC_DECODED_INST_LEN(1);
+ (*x86emu_optab2[op2])(op2);
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x16
+****************************************************************************/
+void x86emuOp_push_SS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tSS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_SS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x17
+****************************************************************************/
+void x86emuOp_pop_SS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tSS\n");
+ TRACE_AND_STEP();
+ M.x86.R_SS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x1e
+****************************************************************************/
+void x86emuOp_push_DS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tDS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_DS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x1f
+****************************************************************************/
+void x86emuOp_pop_DS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tDS\n");
+ TRACE_AND_STEP();
+ M.x86.R_DS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x26
+****************************************************************************/
+void x86emuOp_segovr_ES(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("ES:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_SEGOVR_ES;
+ /*
+ * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
+ * opcode subroutines we do not want to do this.
+ */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x27
+****************************************************************************/
+void x86emuOp_daa(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("DAA\n");
+ TRACE_AND_STEP();
+ M.x86.R_AL = daa_byte(M.x86.R_AL);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x2e
+****************************************************************************/
+void x86emuOp_segovr_CS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("CS:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_SEGOVR_CS;
+ /* note no DECODE_CLEAR_SEGOVR here. */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x2f
+****************************************************************************/
+void x86emuOp_das(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("DAS\n");
+ TRACE_AND_STEP();
+ M.x86.R_AL = das_byte(M.x86.R_AL);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x36
+****************************************************************************/
+void x86emuOp_segovr_SS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("SS:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_SEGOVR_SS;
+ /* no DECODE_CLEAR_SEGOVR ! */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x37
+****************************************************************************/
+void x86emuOp_aaa(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("AAA\n");
+ TRACE_AND_STEP();
+ M.x86.R_AX = aaa_word(M.x86.R_AX);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x3e
+****************************************************************************/
+void x86emuOp_segovr_DS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("DS:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_SEGOVR_DS;
+ /* NO DECODE_CLEAR_SEGOVR! */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x3f
+****************************************************************************/
+void x86emuOp_aas(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("AAS\n");
+ TRACE_AND_STEP();
+ M.x86.R_AX = aas_word(M.x86.R_AX);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x40 - 0x47
+****************************************************************************/
+void x86emuOp_inc_register(u8 op1)
+{
+ START_OF_INSTR();
+ op1 &= 0x7;
+ DECODE_PRINTF("INC\t");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *reg;
+ reg = DECODE_RM_LONG_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *reg = inc_long(*reg);
+ } else {
+ u16 *reg;
+ reg = DECODE_RM_WORD_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *reg = inc_word(*reg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x48 - 0x4F
+****************************************************************************/
+void x86emuOp_dec_register(u8 op1)
+{
+ START_OF_INSTR();
+ op1 &= 0x7;
+ DECODE_PRINTF("DEC\t");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *reg;
+ reg = DECODE_RM_LONG_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *reg = dec_long(*reg);
+ } else {
+ u16 *reg;
+ reg = DECODE_RM_WORD_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *reg = dec_word(*reg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x50 - 0x57
+****************************************************************************/
+void x86emuOp_push_register(u8 op1)
+{
+ START_OF_INSTR();
+ op1 &= 0x7;
+ DECODE_PRINTF("PUSH\t");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *reg;
+ reg = DECODE_RM_LONG_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ push_long(*reg);
+ } else {
+ u16 *reg;
+ reg = DECODE_RM_WORD_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ push_word(*reg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x58 - 0x5F
+****************************************************************************/
+void x86emuOp_pop_register(u8 op1)
+{
+ START_OF_INSTR();
+ op1 &= 0x7;
+ DECODE_PRINTF("POP\t");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *reg;
+ reg = DECODE_RM_LONG_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *reg = pop_long();
+ } else {
+ u16 *reg;
+ reg = DECODE_RM_WORD_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *reg = pop_word();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x60
+****************************************************************************/
+void x86emuOp_push_all(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("PUSHAD\n");
+ } else {
+ DECODE_PRINTF("PUSHA\n");
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 old_sp = M.x86.R_ESP;
+
+ push_long(M.x86.R_EAX);
+ push_long(M.x86.R_ECX);
+ push_long(M.x86.R_EDX);
+ push_long(M.x86.R_EBX);
+ push_long(old_sp);
+ push_long(M.x86.R_EBP);
+ push_long(M.x86.R_ESI);
+ push_long(M.x86.R_EDI);
+ } else {
+ u16 old_sp = M.x86.R_SP;
+
+ push_word(M.x86.R_AX);
+ push_word(M.x86.R_CX);
+ push_word(M.x86.R_DX);
+ push_word(M.x86.R_BX);
+ push_word(old_sp);
+ push_word(M.x86.R_BP);
+ push_word(M.x86.R_SI);
+ push_word(M.x86.R_DI);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x61
+****************************************************************************/
+void x86emuOp_pop_all(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("POPAD\n");
+ } else {
+ DECODE_PRINTF("POPA\n");
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EDI = pop_long();
+ M.x86.R_ESI = pop_long();
+ M.x86.R_EBP = pop_long();
+ M.x86.R_ESP += 4; /* skip ESP */
+ M.x86.R_EBX = pop_long();
+ M.x86.R_EDX = pop_long();
+ M.x86.R_ECX = pop_long();
+ M.x86.R_EAX = pop_long();
+ } else {
+ M.x86.R_DI = pop_word();
+ M.x86.R_SI = pop_word();
+ M.x86.R_BP = pop_word();
+ M.x86.R_SP += 2; /* skip SP */
+ M.x86.R_BX = pop_word();
+ M.x86.R_DX = pop_word();
+ M.x86.R_CX = pop_word();
+ M.x86.R_AX = pop_word();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/*opcode 0x62 ILLEGAL OP, calls x86emuOp_illegal_op() */
+/*opcode 0x63 ILLEGAL OP, calls x86emuOp_illegal_op() */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x64
+****************************************************************************/
+void x86emuOp_segovr_FS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("FS:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_SEGOVR_FS;
+ /*
+ * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
+ * opcode subroutines we do not want to do this.
+ */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x65
+****************************************************************************/
+void x86emuOp_segovr_GS(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("GS:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_SEGOVR_GS;
+ /*
+ * note the lack of DECODE_CLEAR_SEGOVR(r) since, here is one of 4
+ * opcode subroutines we do not want to do this.
+ */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x66 - prefix for 32-bit register
+****************************************************************************/
+void x86emuOp_prefix_data(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("DATA:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_PREFIX_DATA;
+ /* note no DECODE_CLEAR_SEGOVR here. */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x67 - prefix for 32-bit address
+****************************************************************************/
+void x86emuOp_prefix_addr(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("ADDR:\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_PREFIX_ADDR;
+ /* note no DECODE_CLEAR_SEGOVR here. */
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x68
+****************************************************************************/
+void x86emuOp_push_word_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u32 imm;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ imm = fetch_long_imm();
+ } else {
+ imm = fetch_word_imm();
+ }
+ DECODE_PRINTF2("PUSH\t%x\n", imm);
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ push_long(imm);
+ } else {
+ push_word((u16)imm);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x69
+****************************************************************************/
+void x86emuOp_imul_word_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("IMUL\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+ u32 res_lo,res_hi;
+ s32 imm;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcval = fetch_data_long(srcoffset);
+ imm = fetch_long_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
+ if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+ (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u32)res_lo;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+ u32 res;
+ s16 imm;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcval = fetch_data_word(srcoffset);
+ imm = fetch_word_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ res = (s16)srcval * (s16)imm;
+ if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+ (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u16)res;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+ u32 res_lo,res_hi;
+ s32 imm;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ imm = fetch_long_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
+ if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+ (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u32)res_lo;
+ } else {
+ u16 *destreg,*srcreg;
+ u32 res;
+ s16 imm;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ imm = fetch_word_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ res = (s16)*srcreg * (s16)imm;
+ if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+ (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u16)res;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6a
+****************************************************************************/
+void x86emuOp_push_byte_IMM(u8 X86EMU_UNUSED(op1))
+{
+ s16 imm;
+
+ START_OF_INSTR();
+ imm = (s8)fetch_byte_imm();
+ DECODE_PRINTF2("PUSH\t%d\n", imm);
+ TRACE_AND_STEP();
+ push_word(imm);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6b
+****************************************************************************/
+void x86emuOp_imul_byte_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ s8 imm;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("IMUL\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+ u32 res_lo,res_hi;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcval = fetch_data_long(srcoffset);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm);
+ if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+ (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u32)res_lo;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+ u32 res;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcval = fetch_data_word(srcoffset);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ res = (s16)srcval * (s16)imm;
+ if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+ (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u16)res;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+ u32 res_lo,res_hi;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm);
+ if ((((res_lo & 0x80000000) == 0) && (res_hi == 0x00000000)) ||
+ (((res_lo & 0x80000000) != 0) && (res_hi == 0xFFFFFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u32)res_lo;
+ } else {
+ u16 *destreg,*srcreg;
+ u32 res;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", (s32)imm);
+ TRACE_AND_STEP();
+ res = (s16)*srcreg * (s16)imm;
+ if ((((res & 0x8000) == 0) && ((res >> 16) == 0x0000)) ||
+ (((res & 0x8000) != 0) && ((res >> 16) == 0xFFFF))) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+ *destreg = (u16)res;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6c
+****************************************************************************/
+void x86emuOp_ins_byte(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("INSB\n");
+ ins(1);
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6d
+****************************************************************************/
+void x86emuOp_ins_word(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("INSD\n");
+ ins(4);
+ } else {
+ DECODE_PRINTF("INSW\n");
+ ins(2);
+ }
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6e
+****************************************************************************/
+void x86emuOp_outs_byte(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("OUTSB\n");
+ outs(1);
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x6f
+****************************************************************************/
+void x86emuOp_outs_word(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("OUTSD\n");
+ outs(4);
+ } else {
+ DECODE_PRINTF("OUTSW\n");
+ outs(2);
+ }
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x70 - 0x7F
+****************************************************************************/
+int x86emu_check_jump_condition(u8 op);
+
+void x86emuOp_jump_near_cond(u8 op1)
+{
+ s8 offset;
+ u16 target;
+ int cond;
+
+ /* jump to byte offset if overflow flag is set */
+ START_OF_INSTR();
+ cond = x86emu_check_jump_condition(op1 & 0xF);
+ offset = (s8)fetch_byte_imm();
+ target = (u16)(M.x86.R_IP + (s16)offset);
+ DECODE_PRINTF2("%x\n", target);
+ TRACE_AND_STEP();
+ if (cond)
+ M.x86.R_IP = target;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x80
+****************************************************************************/
+void x86emuOp_opc80_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 imm;
+ u8 destval;
+
+ /*
+ * Weirdo special case instruction format. Part of the opcode
+ * held below in "RH". Doubly nested case would result, except
+ * that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ADD\t");
+ break;
+ case 1:
+ DECODE_PRINTF("OR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("ADC\t");
+ break;
+ case 3:
+ DECODE_PRINTF("SBB\t");
+ break;
+ case 4:
+ DECODE_PRINTF("AND\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SUB\t");
+ break;
+ case 6:
+ DECODE_PRINTF("XOR\t");
+ break;
+ case 7:
+ DECODE_PRINTF("CMP\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ destval = fetch_data_byte(destoffset);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_byte_operation[rh]) (destval, imm);
+ if (rh != 7)
+ store_data_byte(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",");
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_byte_operation[rh]) (*destreg, imm);
+ if (rh != 7)
+ *destreg = destval;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x81
+****************************************************************************/
+void x86emuOp_opc81_word_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ /*
+ * Weirdo special case instruction format. Part of the opcode
+ * held below in "RH". Doubly nested case would result, except
+ * that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ADD\t");
+ break;
+ case 1:
+ DECODE_PRINTF("OR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("ADC\t");
+ break;
+ case 3:
+ DECODE_PRINTF("SBB\t");
+ break;
+ case 4:
+ DECODE_PRINTF("AND\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SUB\t");
+ break;
+ case 6:
+ DECODE_PRINTF("XOR\t");
+ break;
+ case 7:
+ DECODE_PRINTF("CMP\t");
+ break;
+ }
+ }
+#endif
+ /*
+ * Know operation, decode the mod byte to find the addressing
+ * mode.
+ */
+ if (mod < 3) {
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval,imm;
+
+ DECODE_PRINTF(",");
+ destval = fetch_data_long(destoffset);
+ imm = fetch_long_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_long_operation[rh]) (destval, imm);
+ if (rh != 7)
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval,imm;
+
+ DECODE_PRINTF(",");
+ destval = fetch_data_word(destoffset);
+ imm = fetch_word_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_word_operation[rh]) (destval, imm);
+ if (rh != 7)
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 destval,imm;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ imm = fetch_long_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_long_operation[rh]) (*destreg, imm);
+ if (rh != 7)
+ *destreg = destval;
+ } else {
+ u16 *destreg;
+ u16 destval,imm;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ imm = fetch_word_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_word_operation[rh]) (*destreg, imm);
+ if (rh != 7)
+ *destreg = destval;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x82
+****************************************************************************/
+void x86emuOp_opc82_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 imm;
+ u8 destval;
+
+ /*
+ * Weirdo special case instruction format. Part of the opcode
+ * held below in "RH". Doubly nested case would result, except
+ * that the decoded instruction Similar to opcode 81, except that
+ * the immediate byte is sign extended to a word length.
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ADD\t");
+ break;
+ case 1:
+ DECODE_PRINTF("OR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("ADC\t");
+ break;
+ case 3:
+ DECODE_PRINTF("SBB\t");
+ break;
+ case 4:
+ DECODE_PRINTF("AND\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SUB\t");
+ break;
+ case 6:
+ DECODE_PRINTF("XOR\t");
+ break;
+ case 7:
+ DECODE_PRINTF("CMP\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ destval = fetch_data_byte(destoffset);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_byte_operation[rh]) (destval, imm);
+ if (rh != 7)
+ store_data_byte(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_byte_operation[rh]) (*destreg, imm);
+ if (rh != 7)
+ *destreg = destval;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x83
+****************************************************************************/
+void x86emuOp_opc83_word_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ /*
+ * Weirdo special case instruction format. Part of the opcode
+ * held below in "RH". Doubly nested case would result, except
+ * that the decoded instruction Similar to opcode 81, except that
+ * the immediate byte is sign extended to a word length.
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ADD\t");
+ break;
+ case 1:
+ DECODE_PRINTF("OR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("ADC\t");
+ break;
+ case 3:
+ DECODE_PRINTF("SBB\t");
+ break;
+ case 4:
+ DECODE_PRINTF("AND\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SUB\t");
+ break;
+ case 6:
+ DECODE_PRINTF("XOR\t");
+ break;
+ case 7:
+ DECODE_PRINTF("CMP\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod,rl);
+
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval,imm;
+
+ destval = fetch_data_long(destoffset);
+ imm = (s8) fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_long_operation[rh]) (destval, imm);
+ if (rh != 7)
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval,imm;
+
+ destval = fetch_data_word(destoffset);
+ imm = (s8) fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_word_operation[rh]) (destval, imm);
+ if (rh != 7)
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 destval,imm;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ imm = (s8) fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_long_operation[rh]) (*destreg, imm);
+ if (rh != 7)
+ *destreg = destval;
+ } else {
+ u16 *destreg;
+ u16 destval,imm;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ imm = (s8) fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ destval = (*genop_word_operation[rh]) (*destreg, imm);
+ if (rh != 7)
+ *destreg = destval;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x84
+****************************************************************************/
+void x86emuOp_test_byte_RM_R(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg, *srcreg;
+ uint destoffset;
+ u8 destval;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("TEST\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ destval = fetch_data_byte(destoffset);
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ test_byte(destval, *srcreg);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ test_byte(*destreg, *srcreg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x85
+****************************************************************************/
+void x86emuOp_test_word_RM_R(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("TEST\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *srcreg;
+
+ DECODE_PRINTF(",");
+ destval = fetch_data_long(destoffset);
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ test_long(destval, *srcreg);
+ } else {
+ u16 destval;
+ u16 *srcreg;
+
+ DECODE_PRINTF(",");
+ destval = fetch_data_word(destoffset);
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ test_word(destval, *srcreg);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ test_long(*destreg, *srcreg);
+ } else {
+ u16 *destreg,*srcreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ test_word(*destreg, *srcreg);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x86
+****************************************************************************/
+void x86emuOp_xchg_byte_RM_R(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg, *srcreg;
+ uint destoffset;
+ u8 destval;
+ u8 tmp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("XCHG\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ destval = fetch_data_byte(destoffset);
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = *srcreg;
+ *srcreg = destval;
+ destval = tmp;
+ store_data_byte(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = *srcreg;
+ *srcreg = *destreg;
+ *destreg = tmp;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x87
+****************************************************************************/
+void x86emuOp_xchg_word_RM_R(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("XCHG\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg;
+ u32 destval,tmp;
+
+ destval = fetch_data_long(destoffset);
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = *srcreg;
+ *srcreg = destval;
+ destval = tmp;
+ store_data_long(destoffset, destval);
+ } else {
+ u16 *srcreg;
+ u16 destval,tmp;
+
+ destval = fetch_data_word(destoffset);
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = *srcreg;
+ *srcreg = destval;
+ destval = tmp;
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+ u32 tmp;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = *srcreg;
+ *srcreg = *destreg;
+ *destreg = tmp;
+ } else {
+ u16 *destreg,*srcreg;
+ u16 tmp;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = *srcreg;
+ *srcreg = *destreg;
+ *destreg = tmp;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x88
+****************************************************************************/
+void x86emuOp_mov_byte_RM_R(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg, *srcreg;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ store_data_byte(destoffset, *srcreg);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x89
+****************************************************************************/
+void x86emuOp_mov_word_RM_R(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg;
+
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ store_data_long(destoffset, *srcreg);
+ } else {
+ u16 *srcreg;
+
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ store_data_word(destoffset, *srcreg);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ } else {
+ u16 *destreg,*srcreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8a
+****************************************************************************/
+void x86emuOp_mov_byte_R_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg, *srcreg;
+ uint srcoffset;
+ u8 srcval;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_byte(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8b
+****************************************************************************/
+void x86emuOp_mov_word_R_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_long(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg, *srcreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ } else {
+ u16 *destreg, *srcreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8c
+****************************************************************************/
+void x86emuOp_mov_word_RM_SR(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u16 *destreg, *srcreg;
+ uint destoffset;
+ u16 destval;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ srcreg = decode_rm_seg_register(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = *srcreg;
+ store_data_word(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ srcreg = decode_rm_seg_register(rh);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8d
+****************************************************************************/
+void x86emuOp_lea_word_R_M(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u16 *srcreg;
+ uint destoffset;
+
+/*
+ * TODO: Need to handle address size prefix!
+ *
+ * lea eax,[eax+ebx*2] ??
+ */
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LEA\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *srcreg = (u16)destoffset;
+ }
+ /* } else { undefined. Do nothing. } */
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8e
+****************************************************************************/
+void x86emuOp_mov_word_SR_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u16 *destreg, *srcreg;
+ uint srcoffset;
+ u16 srcval;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = decode_rm_seg_register(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else { /* register to register */
+ destreg = decode_rm_seg_register(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ /*
+ * Clean up, and reset all the R_xSP pointers to the correct
+ * locations. This is about 3x too much overhead (doing all the
+ * segreg ptrs when only one is needed, but this instruction
+ * *cannot* be that common, and this isn't too much work anyway.
+ */
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x8f
+****************************************************************************/
+void x86emuOp_pop_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (rh != 0) {
+ DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
+ HALT_SYS();
+ }
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = pop_long();
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = pop_word();
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = pop_long();
+ } else {
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = pop_word();
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x90
+****************************************************************************/
+void x86emuOp_nop(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("NOP\n");
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x91-0x97
+****************************************************************************/
+void x86emuOp_xchg_word_AX_register(u8 X86EMU_UNUSED(op1))
+{
+ u32 tmp;
+
+ op1 &= 0x7;
+
+ START_OF_INSTR();
+
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *reg32;
+ DECODE_PRINTF("XCHG\tEAX,");
+ reg32 = DECODE_RM_LONG_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = M.x86.R_EAX;
+ M.x86.R_EAX = *reg32;
+ *reg32 = tmp;
+ } else {
+ u16 *reg16;
+ DECODE_PRINTF("XCHG\tAX,");
+ reg16 = DECODE_RM_WORD_REGISTER(op1);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ tmp = M.x86.R_AX;
+ M.x86.R_EAX = *reg16;
+ *reg16 = (u16)tmp;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x98
+****************************************************************************/
+void x86emuOp_cbw(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("CWDE\n");
+ } else {
+ DECODE_PRINTF("CBW\n");
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ if (M.x86.R_AX & 0x8000) {
+ M.x86.R_EAX |= 0xffff0000;
+ } else {
+ M.x86.R_EAX &= 0x0000ffff;
+ }
+ } else {
+ if (M.x86.R_AL & 0x80) {
+ M.x86.R_AH = 0xff;
+ } else {
+ M.x86.R_AH = 0x0;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x99
+****************************************************************************/
+void x86emuOp_cwd(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("CDQ\n");
+ } else {
+ DECODE_PRINTF("CWD\n");
+ }
+ DECODE_PRINTF("CWD\n");
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ if (M.x86.R_EAX & 0x80000000) {
+ M.x86.R_EDX = 0xffffffff;
+ } else {
+ M.x86.R_EDX = 0x0;
+ }
+ } else {
+ if (M.x86.R_AX & 0x8000) {
+ M.x86.R_DX = 0xffff;
+ } else {
+ M.x86.R_DX = 0x0;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9a
+****************************************************************************/
+void x86emuOp_call_far_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 farseg, faroff;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("CALL\t");
+ faroff = fetch_word_imm();
+ farseg = fetch_word_imm();
+ DECODE_PRINTF2("%04x:", farseg);
+ DECODE_PRINTF2("%04x\n", faroff);
+ CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR ");
+
+ /* XXX
+ *
+ * Hooked interrupt vectors calling into our "BIOS" will cause
+ * problems unless all intersegment stuff is checked for BIOS
+ * access. Check needed here. For moment, let it alone.
+ */
+ TRACE_AND_STEP();
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = farseg;
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = faroff;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9b
+****************************************************************************/
+void x86emuOp_wait(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("WAIT");
+ TRACE_AND_STEP();
+ /* NADA. */
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9c
+****************************************************************************/
+void x86emuOp_pushf_word(u8 X86EMU_UNUSED(op1))
+{
+ u32 flags;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("PUSHFD\n");
+ } else {
+ DECODE_PRINTF("PUSHF\n");
+ }
+ TRACE_AND_STEP();
+
+ /* clear out *all* bits not representing flags, and turn on real bits */
+ flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ push_long(flags);
+ } else {
+ push_word((u16)flags);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9d
+****************************************************************************/
+void x86emuOp_popf_word(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("POPFD\n");
+ } else {
+ DECODE_PRINTF("POPF\n");
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EFLG = pop_long();
+ } else {
+ M.x86.R_FLG = pop_word();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9e
+****************************************************************************/
+void x86emuOp_sahf(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("SAHF\n");
+ TRACE_AND_STEP();
+ /* clear the lower bits of the flag register */
+ M.x86.R_FLG &= 0xffffff00;
+ /* or in the AH register into the flags register */
+ M.x86.R_FLG |= M.x86.R_AH;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x9f
+****************************************************************************/
+void x86emuOp_lahf(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("LAHF\n");
+ TRACE_AND_STEP();
+ M.x86.R_AH = (u8)(M.x86.R_FLG & 0xff);
+ /*undocumented TC++ behavior??? Nope. It's documented, but
+ you have too look real hard to notice it. */
+ M.x86.R_AH |= 0x2;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa0
+****************************************************************************/
+void x86emuOp_mov_AL_M_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 offset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\tAL,");
+ offset = fetch_word_imm();
+ DECODE_PRINTF2("[%04x]\n", offset);
+ TRACE_AND_STEP();
+ M.x86.R_AL = fetch_data_byte(offset);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa1
+****************************************************************************/
+void x86emuOp_mov_AX_M_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 offset;
+
+ START_OF_INSTR();
+ offset = fetch_word_imm();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset);
+ } else {
+ DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset);
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EAX = fetch_data_long(offset);
+ } else {
+ M.x86.R_AX = fetch_data_word(offset);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa2
+****************************************************************************/
+void x86emuOp_mov_M_AL_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 offset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ offset = fetch_word_imm();
+ DECODE_PRINTF2("[%04x],AL\n", offset);
+ TRACE_AND_STEP();
+ store_data_byte(offset, M.x86.R_AL);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa3
+****************************************************************************/
+void x86emuOp_mov_M_AX_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 offset;
+
+ START_OF_INSTR();
+ offset = fetch_word_imm();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset);
+ } else {
+ DECODE_PRINTF2("MOV\t[%04x],AX\n", offset);
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ store_data_long(offset, M.x86.R_EAX);
+ } else {
+ store_data_word(offset, M.x86.R_AX);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa4
+****************************************************************************/
+void x86emuOp_movs_byte(u8 X86EMU_UNUSED(op1))
+{
+ u8 val;
+ u32 count;
+ int inc;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVS\tBYTE\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -1;
+ else
+ inc = 1;
+ TRACE_AND_STEP();
+ count = 1;
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* move them until CX is ZERO. */
+ count = M.x86.R_CX;
+ M.x86.R_CX = 0;
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ }
+ while (count--) {
+ val = fetch_data_byte(M.x86.R_SI);
+ store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val);
+ M.x86.R_SI += inc;
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa5
+****************************************************************************/
+void x86emuOp_movs_word(u8 X86EMU_UNUSED(op1))
+{
+ u32 val;
+ int inc;
+ u32 count;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("MOVS\tDWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -4;
+ else
+ inc = 4;
+ } else {
+ DECODE_PRINTF("MOVS\tWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -2;
+ else
+ inc = 2;
+ }
+ TRACE_AND_STEP();
+ count = 1;
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* move them until CX is ZERO. */
+ count = M.x86.R_CX;
+ M.x86.R_CX = 0;
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ }
+ while (count--) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ val = fetch_data_long(M.x86.R_SI);
+ store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val);
+ } else {
+ val = fetch_data_word(M.x86.R_SI);
+ store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val);
+ }
+ M.x86.R_SI += inc;
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa6
+****************************************************************************/
+void x86emuOp_cmps_byte(u8 X86EMU_UNUSED(op1))
+{
+ s8 val1, val2;
+ int inc;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("CMPS\tBYTE\n");
+ TRACE_AND_STEP();
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -1;
+ else
+ inc = 1;
+
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* REPE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ val1 = fetch_data_byte(M.x86.R_SI);
+ val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_byte(val1, val2);
+ M.x86.R_CX -= 1;
+ M.x86.R_SI += inc;
+ M.x86.R_DI += inc;
+ if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && (ACCESS_FLAG(F_ZF) == 0) ) break;
+ if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
+ }
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ } else {
+ val1 = fetch_data_byte(M.x86.R_SI);
+ val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_byte(val1, val2);
+ M.x86.R_SI += inc;
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa7
+****************************************************************************/
+void x86emuOp_cmps_word(u8 X86EMU_UNUSED(op1))
+{
+ u32 val1,val2;
+ int inc;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("CMPS\tDWORD\n");
+ inc = 4;
+ } else {
+ DECODE_PRINTF("CMPS\tWORD\n");
+ inc = 2;
+ }
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -inc;
+
+ TRACE_AND_STEP();
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* REPE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ val1 = fetch_data_long(M.x86.R_SI);
+ val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_long(val1, val2);
+ } else {
+ val1 = fetch_data_word(M.x86.R_SI);
+ val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_word((u16)val1, (u16)val2);
+ }
+ M.x86.R_CX -= 1;
+ M.x86.R_SI += inc;
+ M.x86.R_DI += inc;
+ if ( (M.x86.mode & SYSMODE_PREFIX_REPE) && ACCESS_FLAG(F_ZF) == 0 ) break;
+ if ( (M.x86.mode & SYSMODE_PREFIX_REPNE) && ACCESS_FLAG(F_ZF) ) break;
+ }
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ } else {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ val1 = fetch_data_long(M.x86.R_SI);
+ val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_long(val1, val2);
+ } else {
+ val1 = fetch_data_word(M.x86.R_SI);
+ val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_word((u16)val1, (u16)val2);
+ }
+ M.x86.R_SI += inc;
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa8
+****************************************************************************/
+void x86emuOp_test_AL_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int imm;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("TEST\tAL,");
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2("%04x\n", imm);
+ TRACE_AND_STEP();
+ test_byte(M.x86.R_AL, (u8)imm);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xa9
+****************************************************************************/
+void x86emuOp_test_AX_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u32 srcval;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("TEST\tEAX,");
+ srcval = fetch_long_imm();
+ } else {
+ DECODE_PRINTF("TEST\tAX,");
+ srcval = fetch_word_imm();
+ }
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ test_long(M.x86.R_EAX, srcval);
+ } else {
+ test_word(M.x86.R_AX, (u16)srcval);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xaa
+****************************************************************************/
+void x86emuOp_stos_byte(u8 X86EMU_UNUSED(op1))
+{
+ int inc;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("STOS\tBYTE\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -1;
+ else
+ inc = 1;
+ TRACE_AND_STEP();
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
+ M.x86.R_CX -= 1;
+ M.x86.R_DI += inc;
+ }
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ } else {
+ store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL);
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xab
+****************************************************************************/
+void x86emuOp_stos_word(u8 X86EMU_UNUSED(op1))
+{
+ int inc;
+ u32 count;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("STOS\tDWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -4;
+ else
+ inc = 4;
+ } else {
+ DECODE_PRINTF("STOS\tWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -2;
+ else
+ inc = 2;
+ }
+ TRACE_AND_STEP();
+ count = 1;
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* move them until CX is ZERO. */
+ count = M.x86.R_CX;
+ M.x86.R_CX = 0;
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ }
+ while (count--) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX);
+ } else {
+ store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX);
+ }
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xac
+****************************************************************************/
+void x86emuOp_lods_byte(u8 X86EMU_UNUSED(op1))
+{
+ int inc;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LODS\tBYTE\n");
+ TRACE_AND_STEP();
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -1;
+ else
+ inc = 1;
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
+ M.x86.R_CX -= 1;
+ M.x86.R_SI += inc;
+ }
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ } else {
+ M.x86.R_AL = fetch_data_byte(M.x86.R_SI);
+ M.x86.R_SI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xad
+****************************************************************************/
+void x86emuOp_lods_word(u8 X86EMU_UNUSED(op1))
+{
+ int inc;
+ u32 count;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("LODS\tDWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -4;
+ else
+ inc = 4;
+ } else {
+ DECODE_PRINTF("LODS\tWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -2;
+ else
+ inc = 2;
+ }
+ TRACE_AND_STEP();
+ count = 1;
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* move them until CX is ZERO. */
+ count = M.x86.R_CX;
+ M.x86.R_CX = 0;
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ }
+ while (count--) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EAX = fetch_data_long(M.x86.R_SI);
+ } else {
+ M.x86.R_AX = fetch_data_word(M.x86.R_SI);
+ }
+ M.x86.R_SI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xae
+****************************************************************************/
+void x86emuOp_scas_byte(u8 X86EMU_UNUSED(op1))
+{
+ s8 val2;
+ int inc;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("SCAS\tBYTE\n");
+ TRACE_AND_STEP();
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -1;
+ else
+ inc = 1;
+ if (M.x86.mode & SYSMODE_PREFIX_REPE) {
+ /* REPE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_byte(M.x86.R_AL, val2);
+ M.x86.R_CX -= 1;
+ M.x86.R_DI += inc;
+ if (ACCESS_FLAG(F_ZF) == 0)
+ break;
+ }
+ M.x86.mode &= ~SYSMODE_PREFIX_REPE;
+ } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
+ /* REPNE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_byte(M.x86.R_AL, val2);
+ M.x86.R_CX -= 1;
+ M.x86.R_DI += inc;
+ if (ACCESS_FLAG(F_ZF))
+ break; /* zero flag set means equal */
+ }
+ M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
+ } else {
+ val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_byte(M.x86.R_AL, val2);
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xaf
+****************************************************************************/
+void x86emuOp_scas_word(u8 X86EMU_UNUSED(op1))
+{
+ int inc;
+ u32 val;
+
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("SCAS\tDWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -4;
+ else
+ inc = 4;
+ } else {
+ DECODE_PRINTF("SCAS\tWORD\n");
+ if (ACCESS_FLAG(F_DF)) /* down */
+ inc = -2;
+ else
+ inc = 2;
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_REPE) {
+ /* REPE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_long(M.x86.R_EAX, val);
+ } else {
+ val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_word(M.x86.R_AX, (u16)val);
+ }
+ M.x86.R_CX -= 1;
+ M.x86.R_DI += inc;
+ if (ACCESS_FLAG(F_ZF) == 0)
+ break;
+ }
+ M.x86.mode &= ~SYSMODE_PREFIX_REPE;
+ } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) {
+ /* REPNE */
+ /* move them until CX is ZERO. */
+ while (M.x86.R_CX != 0) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_long(M.x86.R_EAX, val);
+ } else {
+ val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_word(M.x86.R_AX, (u16)val);
+ }
+ M.x86.R_CX -= 1;
+ M.x86.R_DI += inc;
+ if (ACCESS_FLAG(F_ZF))
+ break; /* zero flag set means equal */
+ }
+ M.x86.mode &= ~SYSMODE_PREFIX_REPNE;
+ } else {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_long(M.x86.R_EAX, val);
+ } else {
+ val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI);
+ cmp_word(M.x86.R_AX, (u16)val);
+ }
+ M.x86.R_DI += inc;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xb0 - 0xb7
+****************************************************************************/
+void x86emuOp_mov_byte_register_IMM(u8 op1)
+{
+ u8 imm, *ptr;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ ptr = DECODE_RM_BYTE_REGISTER(op1 & 0x7);
+ DECODE_PRINTF(",");
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ TRACE_AND_STEP();
+ *ptr = imm;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xb8 - 0xbf
+****************************************************************************/
+void x86emuOp_mov_word_register_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u32 srcval;
+
+ op1 &= 0x7;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *reg32;
+ reg32 = DECODE_RM_LONG_REGISTER(op1);
+ srcval = fetch_long_imm();
+ DECODE_PRINTF2(",%x\n", srcval);
+ TRACE_AND_STEP();
+ *reg32 = srcval;
+ } else {
+ u16 *reg16;
+ reg16 = DECODE_RM_WORD_REGISTER(op1);
+ srcval = fetch_word_imm();
+ DECODE_PRINTF2(",%x\n", srcval);
+ TRACE_AND_STEP();
+ *reg16 = (u16)srcval;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc0
+****************************************************************************/
+void x86emuOp_opcC0_byte_RM_MEM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 destval;
+ u8 amt;
+
+ /*
+ * Yet another weirdo special case instruction format. Part of
+ * the opcode held below in "RH". Doubly nested case would
+ * result, except that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ROL\t");
+ break;
+ case 1:
+ DECODE_PRINTF("ROR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("RCL\t");
+ break;
+ case 3:
+ DECODE_PRINTF("RCR\t");
+ break;
+ case 4:
+ DECODE_PRINTF("SHL\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SHR\t");
+ break;
+ case 6:
+ DECODE_PRINTF("SAL\t");
+ break;
+ case 7:
+ DECODE_PRINTF("SAR\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ amt = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", amt);
+ destval = fetch_data_byte(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD0_byte_operation[rh]) (destval, amt);
+ store_data_byte(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ amt = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", amt);
+ TRACE_AND_STEP();
+ destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
+ *destreg = destval;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc1
+****************************************************************************/
+void x86emuOp_opcC1_word_RM_MEM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+ u8 amt;
+
+ /*
+ * Yet another weirdo special case instruction format. Part of
+ * the opcode held below in "RH". Doubly nested case would
+ * result, except that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ROL\t");
+ break;
+ case 1:
+ DECODE_PRINTF("ROR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("RCL\t");
+ break;
+ case 3:
+ DECODE_PRINTF("RCR\t");
+ break;
+ case 4:
+ DECODE_PRINTF("SHL\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SHR\t");
+ break;
+ case 6:
+ DECODE_PRINTF("SAL\t");
+ break;
+ case 7:
+ DECODE_PRINTF("SAR\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ amt = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", amt);
+ destval = fetch_data_long(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD1_long_operation[rh]) (destval, amt);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+
+ DECODE_PRINTF("WORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ amt = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", amt);
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD1_word_operation[rh]) (destval, amt);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ amt = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", amt);
+ TRACE_AND_STEP();
+ *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
+ } else {
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ amt = fetch_byte_imm();
+ DECODE_PRINTF2(",%x\n", amt);
+ TRACE_AND_STEP();
+ *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc2
+****************************************************************************/
+void x86emuOp_ret_near_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 imm;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("RET\t");
+ imm = fetch_word_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
+ TRACE_AND_STEP();
+ M.x86.R_IP = pop_word();
+ M.x86.R_SP += imm;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc3
+****************************************************************************/
+void x86emuOp_ret_near(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("RET\n");
+ RETURN_TRACE("RET",M.x86.saved_cs,M.x86.saved_ip);
+ TRACE_AND_STEP();
+ M.x86.R_IP = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc4
+****************************************************************************/
+void x86emuOp_les_R_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LES\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_ES = fetch_data_word(srcoffset + 2);
+ }
+ /* else UNDEFINED! register to register */
+
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc5
+****************************************************************************/
+void x86emuOp_lds_R_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LDS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_DS = fetch_data_word(srcoffset + 2);
+ }
+ /* else UNDEFINED! */
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc6
+****************************************************************************/
+void x86emuOp_mov_byte_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 imm;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (rh != 0) {
+ DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n");
+ HALT_SYS();
+ }
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%2x\n", imm);
+ TRACE_AND_STEP();
+ store_data_byte(destoffset, imm);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ imm = fetch_byte_imm();
+ DECODE_PRINTF2(",%2x\n", imm);
+ TRACE_AND_STEP();
+ *destreg = imm;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc7
+****************************************************************************/
+void x86emuOp_mov_word_RM_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOV\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (rh != 0) {
+ DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n");
+ HALT_SYS();
+ }
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 imm;
+
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ imm = fetch_long_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ store_data_long(destoffset, imm);
+ } else {
+ u16 imm;
+
+ DECODE_PRINTF("WORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ imm = fetch_word_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ store_data_word(destoffset, imm);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 imm;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ imm = fetch_long_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ *destreg = imm;
+ } else {
+ u16 *destreg;
+ u16 imm;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ imm = fetch_word_imm();
+ DECODE_PRINTF2(",%x\n", imm);
+ TRACE_AND_STEP();
+ *destreg = imm;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc8
+****************************************************************************/
+void x86emuOp_enter(u8 X86EMU_UNUSED(op1))
+{
+ u16 local,frame_pointer;
+ u8 nesting;
+ int i;
+
+ START_OF_INSTR();
+ local = fetch_word_imm();
+ nesting = fetch_byte_imm();
+ DECODE_PRINTF2("ENTER %x\n", local);
+ DECODE_PRINTF2(",%x\n", nesting);
+ TRACE_AND_STEP();
+ push_word(M.x86.R_BP);
+ frame_pointer = M.x86.R_SP;
+ if (nesting > 0) {
+ for (i = 1; i < nesting; i++) {
+ M.x86.R_BP -= 2;
+ push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP));
+ }
+ push_word(frame_pointer);
+ }
+ M.x86.R_BP = frame_pointer;
+ M.x86.R_SP = (u16)(M.x86.R_SP - local);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xc9
+****************************************************************************/
+void x86emuOp_leave(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("LEAVE\n");
+ TRACE_AND_STEP();
+ M.x86.R_SP = M.x86.R_BP;
+ M.x86.R_BP = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xca
+****************************************************************************/
+void x86emuOp_ret_far_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 imm;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("RETF\t");
+ imm = fetch_word_imm();
+ DECODE_PRINTF2("%x\n", imm);
+ RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
+ TRACE_AND_STEP();
+ M.x86.R_IP = pop_word();
+ M.x86.R_CS = pop_word();
+ M.x86.R_SP += imm;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcb
+****************************************************************************/
+void x86emuOp_ret_far(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("RETF\n");
+ RETURN_TRACE("RETF",M.x86.saved_cs,M.x86.saved_ip);
+ TRACE_AND_STEP();
+ M.x86.R_IP = pop_word();
+ M.x86.R_CS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcc
+****************************************************************************/
+void x86emuOp_int3(u8 X86EMU_UNUSED(op1))
+{
+ u16 tmp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("INT 3\n");
+ tmp = (u16) mem_access_word(3 * 4 + 2);
+ /* access the segment register */
+ TRACE_AND_STEP();
+ if (_X86EMU_intrTab[3]) {
+ (*_X86EMU_intrTab[3])(3);
+ } else {
+ push_word((u16)M.x86.R_FLG);
+ CLEAR_FLAG(F_IF);
+ CLEAR_FLAG(F_TF);
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = mem_access_word(3 * 4 + 2);
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = mem_access_word(3 * 4);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcd
+****************************************************************************/
+void x86emuOp_int_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 tmp;
+ u8 intnum;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("INT\t");
+ intnum = fetch_byte_imm();
+ DECODE_PRINTF2("%x\n", intnum);
+ tmp = mem_access_word(intnum * 4 + 2);
+ TRACE_AND_STEP();
+ if (_X86EMU_intrTab[intnum]) {
+ (*_X86EMU_intrTab[intnum])(intnum);
+ } else {
+ push_word((u16)M.x86.R_FLG);
+ CLEAR_FLAG(F_IF);
+ CLEAR_FLAG(F_TF);
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = mem_access_word(intnum * 4 + 2);
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = mem_access_word(intnum * 4);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xce
+****************************************************************************/
+void x86emuOp_into(u8 X86EMU_UNUSED(op1))
+{
+ u16 tmp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("INTO\n");
+ TRACE_AND_STEP();
+ if (ACCESS_FLAG(F_OF)) {
+ tmp = mem_access_word(4 * 4 + 2);
+ if (_X86EMU_intrTab[4]) {
+ (*_X86EMU_intrTab[4])(4);
+ } else {
+ push_word((u16)M.x86.R_FLG);
+ CLEAR_FLAG(F_IF);
+ CLEAR_FLAG(F_TF);
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = mem_access_word(4 * 4 + 2);
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = mem_access_word(4 * 4);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xcf
+****************************************************************************/
+void x86emuOp_iret(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("IRET\n");
+
+ TRACE_AND_STEP();
+
+ M.x86.R_IP = pop_word();
+ M.x86.R_CS = pop_word();
+ M.x86.R_FLG = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd0
+****************************************************************************/
+void x86emuOp_opcD0_byte_RM_1(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 destval;
+
+ /*
+ * Yet another weirdo special case instruction format. Part of
+ * the opcode held below in "RH". Doubly nested case would
+ * result, except that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ROL\t");
+ break;
+ case 1:
+ DECODE_PRINTF("ROR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("RCL\t");
+ break;
+ case 3:
+ DECODE_PRINTF("RCR\t");
+ break;
+ case 4:
+ DECODE_PRINTF("SHL\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SHR\t");
+ break;
+ case 6:
+ DECODE_PRINTF("SAL\t");
+ break;
+ case 7:
+ DECODE_PRINTF("SAR\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",1\n");
+ destval = fetch_data_byte(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD0_byte_operation[rh]) (destval, 1);
+ store_data_byte(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",1\n");
+ TRACE_AND_STEP();
+ destval = (*opcD0_byte_operation[rh]) (*destreg, 1);
+ *destreg = destval;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd1
+****************************************************************************/
+void x86emuOp_opcD1_word_RM_1(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ /*
+ * Yet another weirdo special case instruction format. Part of
+ * the opcode held below in "RH". Doubly nested case would
+ * result, except that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ROL\t");
+ break;
+ case 1:
+ DECODE_PRINTF("ROR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("RCL\t");
+ break;
+ case 3:
+ DECODE_PRINTF("RCR\t");
+ break;
+ case 4:
+ DECODE_PRINTF("SHL\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SHR\t");
+ break;
+ case 6:
+ DECODE_PRINTF("SAL\t");
+ break;
+ case 7:
+ DECODE_PRINTF("SAR\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",1\n");
+ destval = fetch_data_long(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD1_long_operation[rh]) (destval, 1);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+
+ DECODE_PRINTF("WORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",1\n");
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD1_word_operation[rh]) (destval, 1);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",1\n");
+ TRACE_AND_STEP();
+ destval = (*opcD1_long_operation[rh]) (*destreg, 1);
+ *destreg = destval;
+ } else {
+ u16 destval;
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",1\n");
+ TRACE_AND_STEP();
+ destval = (*opcD1_word_operation[rh]) (*destreg, 1);
+ *destreg = destval;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd2
+****************************************************************************/
+void x86emuOp_opcD2_byte_RM_CL(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 destval;
+ u8 amt;
+
+ /*
+ * Yet another weirdo special case instruction format. Part of
+ * the opcode held below in "RH". Doubly nested case would
+ * result, except that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ROL\t");
+ break;
+ case 1:
+ DECODE_PRINTF("ROR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("RCL\t");
+ break;
+ case 3:
+ DECODE_PRINTF("RCR\t");
+ break;
+ case 4:
+ DECODE_PRINTF("SHL\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SHR\t");
+ break;
+ case 6:
+ DECODE_PRINTF("SAL\t");
+ break;
+ case 7:
+ DECODE_PRINTF("SAR\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ amt = M.x86.R_CL;
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",CL\n");
+ destval = fetch_data_byte(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD0_byte_operation[rh]) (destval, amt);
+ store_data_byte(destoffset, destval);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = (*opcD0_byte_operation[rh]) (*destreg, amt);
+ *destreg = destval;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd3
+****************************************************************************/
+void x86emuOp_opcD3_word_RM_CL(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+ u8 amt;
+
+ /*
+ * Yet another weirdo special case instruction format. Part of
+ * the opcode held below in "RH". Doubly nested case would
+ * result, except that the decoded instruction
+ */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("ROL\t");
+ break;
+ case 1:
+ DECODE_PRINTF("ROR\t");
+ break;
+ case 2:
+ DECODE_PRINTF("RCL\t");
+ break;
+ case 3:
+ DECODE_PRINTF("RCR\t");
+ break;
+ case 4:
+ DECODE_PRINTF("SHL\t");
+ break;
+ case 5:
+ DECODE_PRINTF("SHR\t");
+ break;
+ case 6:
+ DECODE_PRINTF("SAL\t");
+ break;
+ case 7:
+ DECODE_PRINTF("SAR\t");
+ break;
+ }
+ }
+#endif
+ /* know operation, decode the mod byte to find the addressing
+ mode. */
+ amt = M.x86.R_CL;
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",CL\n");
+ destval = fetch_data_long(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD1_long_operation[rh]) (destval, amt);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+
+ DECODE_PRINTF("WORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",CL\n");
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ destval = (*opcD1_word_operation[rh]) (destval, amt);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = (*opcD1_long_operation[rh]) (*destreg, amt);
+ } else {
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = (*opcD1_word_operation[rh]) (*destreg, amt);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd4
+****************************************************************************/
+void x86emuOp_aam(u8 X86EMU_UNUSED(op1))
+{
+ u8 a;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("AAM\n");
+ a = fetch_byte_imm(); /* this is a stupid encoding. */
+ if (a != 10) {
+ DECODE_PRINTF("ERROR DECODING AAM\n");
+ TRACE_REGS();
+ HALT_SYS();
+ }
+ TRACE_AND_STEP();
+ /* note the type change here --- returning AL and AH in AX. */
+ M.x86.R_AX = aam_word(M.x86.R_AL);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd5
+****************************************************************************/
+void x86emuOp_aad(u8 X86EMU_UNUSED(op1))
+{
+ u8 a;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("AAD\n");
+ a = fetch_byte_imm();
+ TRACE_AND_STEP();
+ M.x86.R_AX = aad_word(M.x86.R_AX);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/* opcode 0xd6 ILLEGAL OPCODE */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xd7
+****************************************************************************/
+void x86emuOp_xlat(u8 X86EMU_UNUSED(op1))
+{
+ u16 addr;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("XLAT\n");
+ TRACE_AND_STEP();
+ addr = (u16)(M.x86.R_BX + (u8)M.x86.R_AL);
+ M.x86.R_AL = fetch_data_byte(addr);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/* instuctions D8 .. DF are in i87_ops.c */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe0
+****************************************************************************/
+void x86emuOp_loopne(u8 X86EMU_UNUSED(op1))
+{
+ s16 ip;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LOOPNE\t");
+ ip = (s8) fetch_byte_imm();
+ ip += (s16) M.x86.R_IP;
+ DECODE_PRINTF2("%04x\n", ip);
+ TRACE_AND_STEP();
+ M.x86.R_CX -= 1;
+ if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */
+ M.x86.R_IP = ip;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe1
+****************************************************************************/
+void x86emuOp_loope(u8 X86EMU_UNUSED(op1))
+{
+ s16 ip;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LOOPE\t");
+ ip = (s8) fetch_byte_imm();
+ ip += (s16) M.x86.R_IP;
+ DECODE_PRINTF2("%04x\n", ip);
+ TRACE_AND_STEP();
+ M.x86.R_CX -= 1;
+ if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */
+ M.x86.R_IP = ip;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe2
+****************************************************************************/
+void x86emuOp_loop(u8 X86EMU_UNUSED(op1))
+{
+ s16 ip;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LOOP\t");
+ ip = (s8) fetch_byte_imm();
+ ip += (s16) M.x86.R_IP;
+ DECODE_PRINTF2("%04x\n", ip);
+ TRACE_AND_STEP();
+ M.x86.R_CX -= 1;
+ if (M.x86.R_CX != 0)
+ M.x86.R_IP = ip;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe3
+****************************************************************************/
+void x86emuOp_jcxz(u8 X86EMU_UNUSED(op1))
+{
+ u16 target;
+ s8 offset;
+
+ /* jump to byte offset if overflow flag is set */
+ START_OF_INSTR();
+ DECODE_PRINTF("JCXZ\t");
+ offset = (s8)fetch_byte_imm();
+ target = (u16)(M.x86.R_IP + offset);
+ DECODE_PRINTF2("%x\n", target);
+ TRACE_AND_STEP();
+ if (M.x86.R_CX == 0)
+ M.x86.R_IP = target;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe4
+****************************************************************************/
+void x86emuOp_in_byte_AL_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u8 port;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("IN\t");
+ port = (u8) fetch_byte_imm();
+ DECODE_PRINTF2("%x,AL\n", port);
+ TRACE_AND_STEP();
+ M.x86.R_AL = (*sys_inb)(port);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe5
+****************************************************************************/
+void x86emuOp_in_word_AX_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u8 port;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("IN\t");
+ port = (u8) fetch_byte_imm();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF2("EAX,%x\n", port);
+ } else {
+ DECODE_PRINTF2("AX,%x\n", port);
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EAX = (*sys_inl)(port);
+ } else {
+ M.x86.R_AX = (*sys_inw)(port);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe6
+****************************************************************************/
+void x86emuOp_out_byte_IMM_AL(u8 X86EMU_UNUSED(op1))
+{
+ u8 port;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("OUT\t");
+ port = (u8) fetch_byte_imm();
+ DECODE_PRINTF2("%x,AL\n", port);
+ TRACE_AND_STEP();
+ (*sys_outb)(port, M.x86.R_AL);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe7
+****************************************************************************/
+void x86emuOp_out_word_IMM_AX(u8 X86EMU_UNUSED(op1))
+{
+ u8 port;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("OUT\t");
+ port = (u8) fetch_byte_imm();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF2("%x,EAX\n", port);
+ } else {
+ DECODE_PRINTF2("%x,AX\n", port);
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ (*sys_outl)(port, M.x86.R_EAX);
+ } else {
+ (*sys_outw)(port, M.x86.R_AX);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe8
+****************************************************************************/
+void x86emuOp_call_near_IMM(u8 X86EMU_UNUSED(op1))
+{
+ s16 ip;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("CALL\t");
+ ip = (s16) fetch_word_imm();
+ ip += (s16) M.x86.R_IP; /* CHECK SIGN */
+ DECODE_PRINTF2("%04x\n", ip);
+ CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, M.x86.R_CS, ip, "");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = ip;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xe9
+****************************************************************************/
+void x86emuOp_jump_near_IMM(u8 X86EMU_UNUSED(op1))
+{
+ int ip;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("JMP\t");
+ ip = (s16)fetch_word_imm();
+ ip += (s16)M.x86.R_IP;
+ DECODE_PRINTF2("%04x\n", ip);
+ TRACE_AND_STEP();
+ M.x86.R_IP = (u16)ip;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xea
+****************************************************************************/
+void x86emuOp_jump_far_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 cs, ip;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("JMP\tFAR ");
+ ip = fetch_word_imm();
+ cs = fetch_word_imm();
+ DECODE_PRINTF2("%04x:", cs);
+ DECODE_PRINTF2("%04x\n", ip);
+ TRACE_AND_STEP();
+ M.x86.R_IP = ip;
+ M.x86.R_CS = cs;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xeb
+****************************************************************************/
+void x86emuOp_jump_byte_IMM(u8 X86EMU_UNUSED(op1))
+{
+ u16 target;
+ s8 offset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("JMP\t");
+ offset = (s8)fetch_byte_imm();
+ target = (u16)(M.x86.R_IP + offset);
+ DECODE_PRINTF2("%x\n", target);
+ TRACE_AND_STEP();
+ M.x86.R_IP = target;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xec
+****************************************************************************/
+void x86emuOp_in_byte_AL_DX(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("IN\tAL,DX\n");
+ TRACE_AND_STEP();
+ M.x86.R_AL = (*sys_inb)(M.x86.R_DX);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xed
+****************************************************************************/
+void x86emuOp_in_word_AX_DX(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("IN\tEAX,DX\n");
+ } else {
+ DECODE_PRINTF("IN\tAX,DX\n");
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_EAX = (*sys_inl)(M.x86.R_DX);
+ } else {
+ M.x86.R_AX = (*sys_inw)(M.x86.R_DX);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xee
+****************************************************************************/
+void x86emuOp_out_byte_DX_AL(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("OUT\tDX,AL\n");
+ TRACE_AND_STEP();
+ (*sys_outb)(M.x86.R_DX, M.x86.R_AL);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xef
+****************************************************************************/
+void x86emuOp_out_word_DX_AX(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("OUT\tDX,EAX\n");
+ } else {
+ DECODE_PRINTF("OUT\tDX,AX\n");
+ }
+ TRACE_AND_STEP();
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ (*sys_outl)(M.x86.R_DX, M.x86.R_EAX);
+ } else {
+ (*sys_outw)(M.x86.R_DX, M.x86.R_AX);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf0
+****************************************************************************/
+void x86emuOp_lock(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("LOCK:\n");
+ TRACE_AND_STEP();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/*opcode 0xf1 ILLEGAL OPERATION */
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf2
+****************************************************************************/
+void x86emuOp_repne(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("REPNE\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_PREFIX_REPNE;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf3
+****************************************************************************/
+void x86emuOp_repe(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("REPE\n");
+ TRACE_AND_STEP();
+ M.x86.mode |= SYSMODE_PREFIX_REPE;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf4
+****************************************************************************/
+void x86emuOp_halt(u8 X86EMU_UNUSED(op1))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("HALT\n");
+ TRACE_AND_STEP();
+ HALT_SYS();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf5
+****************************************************************************/
+void x86emuOp_cmc(u8 X86EMU_UNUSED(op1))
+{
+ /* complement the carry flag. */
+ START_OF_INSTR();
+ DECODE_PRINTF("CMC\n");
+ TRACE_AND_STEP();
+ TOGGLE_FLAG(F_CF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf6
+****************************************************************************/
+void x86emuOp_opcF6_byte_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ u8 *destreg;
+ uint destoffset;
+ u8 destval, srcval;
+
+ /* long, drawn out code follows. Double switch for a total
+ of 32 cases. */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ DECODE_PRINTF(opF6_names[rh]);
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ destval = fetch_data_byte(destoffset);
+
+ switch (rh) {
+ case 0: /* test byte imm */
+ DECODE_PRINTF(",");
+ srcval = fetch_byte_imm();
+ DECODE_PRINTF2("%02x\n", srcval);
+ TRACE_AND_STEP();
+ test_byte(destval, srcval);
+ break;
+ case 1:
+ DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ HALT_SYS();
+ break;
+ case 2:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = not_byte(destval);
+ store_data_byte(destoffset, destval);
+ break;
+ case 3:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = neg_byte(destval);
+ store_data_byte(destoffset, destval);
+ break;
+ case 4:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ mul_byte(destval);
+ break;
+ case 5:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ imul_byte(destval);
+ break;
+ case 6:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ div_byte(destval);
+ break;
+ default:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ idiv_byte(destval);
+ break;
+ }
+ } else { /* mod=11 */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ switch (rh) {
+ case 0: /* test byte imm */
+ DECODE_PRINTF(",");
+ srcval = fetch_byte_imm();
+ DECODE_PRINTF2("%02x\n", srcval);
+ TRACE_AND_STEP();
+ test_byte(*destreg, srcval);
+ break;
+ case 1:
+ DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ HALT_SYS();
+ break;
+ case 2:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = not_byte(*destreg);
+ break;
+ case 3:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = neg_byte(*destreg);
+ break;
+ case 4:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ mul_byte(*destreg); /*!!! */
+ break;
+ case 5:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ imul_byte(*destreg);
+ break;
+ case 6:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ div_byte(*destreg);
+ break;
+ default:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ idiv_byte(*destreg);
+ break;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf7
+****************************************************************************/
+void x86emuOp_opcF7_word_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ DECODE_PRINTF(opF6_names[rh]);
+ if (mod < 3) {
+
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval, srcval;
+
+ DECODE_PRINTF("DWORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ destval = fetch_data_long(destoffset);
+
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF(",");
+ srcval = fetch_long_imm();
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ test_long(destval, srcval);
+ break;
+ case 1:
+ DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
+ HALT_SYS();
+ break;
+ case 2:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = not_long(destval);
+ store_data_long(destoffset, destval);
+ break;
+ case 3:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = neg_long(destval);
+ store_data_long(destoffset, destval);
+ break;
+ case 4:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ mul_long(destval);
+ break;
+ case 5:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ imul_long(destval);
+ break;
+ case 6:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ div_long(destval);
+ break;
+ case 7:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ idiv_long(destval);
+ break;
+ }
+ } else {
+ u16 destval, srcval;
+
+ DECODE_PRINTF("WORD PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ destval = fetch_data_word(destoffset);
+
+ switch (rh) {
+ case 0: /* test word imm */
+ DECODE_PRINTF(",");
+ srcval = fetch_word_imm();
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ test_word(destval, srcval);
+ break;
+ case 1:
+ DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n");
+ HALT_SYS();
+ break;
+ case 2:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = not_word(destval);
+ store_data_word(destoffset, destval);
+ break;
+ case 3:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ destval = neg_word(destval);
+ store_data_word(destoffset, destval);
+ break;
+ case 4:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ mul_word(destval);
+ break;
+ case 5:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ imul_word(destval);
+ break;
+ case 6:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ div_word(destval);
+ break;
+ case 7:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ idiv_word(destval);
+ break;
+ }
+ }
+
+ } else { /* mod=11 */
+
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+
+ switch (rh) {
+ case 0: /* test word imm */
+ DECODE_PRINTF(",");
+ srcval = fetch_long_imm();
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ test_long(*destreg, srcval);
+ break;
+ case 1:
+ DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ HALT_SYS();
+ break;
+ case 2:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = not_long(*destreg);
+ break;
+ case 3:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = neg_long(*destreg);
+ break;
+ case 4:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ mul_long(*destreg); /*!!! */
+ break;
+ case 5:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ imul_long(*destreg);
+ break;
+ case 6:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ div_long(*destreg);
+ break;
+ case 7:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ idiv_long(*destreg);
+ break;
+ }
+ } else {
+ u16 *destreg;
+ u16 srcval;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+
+ switch (rh) {
+ case 0: /* test word imm */
+ DECODE_PRINTF(",");
+ srcval = fetch_word_imm();
+ DECODE_PRINTF2("%x\n", srcval);
+ TRACE_AND_STEP();
+ test_word(*destreg, srcval);
+ break;
+ case 1:
+ DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n");
+ HALT_SYS();
+ break;
+ case 2:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = not_word(*destreg);
+ break;
+ case 3:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = neg_word(*destreg);
+ break;
+ case 4:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ mul_word(*destreg); /*!!! */
+ break;
+ case 5:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ imul_word(*destreg);
+ break;
+ case 6:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ div_word(*destreg);
+ break;
+ case 7:
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ idiv_word(*destreg);
+ break;
+ }
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf8
+****************************************************************************/
+void x86emuOp_clc(u8 X86EMU_UNUSED(op1))
+{
+ /* clear the carry flag. */
+ START_OF_INSTR();
+ DECODE_PRINTF("CLC\n");
+ TRACE_AND_STEP();
+ CLEAR_FLAG(F_CF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xf9
+****************************************************************************/
+void x86emuOp_stc(u8 X86EMU_UNUSED(op1))
+{
+ /* set the carry flag. */
+ START_OF_INSTR();
+ DECODE_PRINTF("STC\n");
+ TRACE_AND_STEP();
+ SET_FLAG(F_CF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfa
+****************************************************************************/
+void x86emuOp_cli(u8 X86EMU_UNUSED(op1))
+{
+ /* clear interrupts. */
+ START_OF_INSTR();
+ DECODE_PRINTF("CLI\n");
+ TRACE_AND_STEP();
+ CLEAR_FLAG(F_IF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfb
+****************************************************************************/
+void x86emuOp_sti(u8 X86EMU_UNUSED(op1))
+{
+ /* enable interrupts. */
+ START_OF_INSTR();
+ DECODE_PRINTF("STI\n");
+ TRACE_AND_STEP();
+ SET_FLAG(F_IF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfc
+****************************************************************************/
+void x86emuOp_cld(u8 X86EMU_UNUSED(op1))
+{
+ /* clear interrupts. */
+ START_OF_INSTR();
+ DECODE_PRINTF("CLD\n");
+ TRACE_AND_STEP();
+ CLEAR_FLAG(F_DF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfd
+****************************************************************************/
+void x86emuOp_std(u8 X86EMU_UNUSED(op1))
+{
+ /* clear interrupts. */
+ START_OF_INSTR();
+ DECODE_PRINTF("STD\n");
+ TRACE_AND_STEP();
+ SET_FLAG(F_DF);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xfe
+****************************************************************************/
+void x86emuOp_opcFE_byte_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rh, rl;
+ u8 destval;
+ uint destoffset;
+ u8 *destreg;
+
+ /* Yet another special case instruction. */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+
+ switch (rh) {
+ case 0:
+ DECODE_PRINTF("INC\t");
+ break;
+ case 1:
+ DECODE_PRINTF("DEC\t");
+ break;
+ case 2:
+ case 3:
+ case 4:
+ case 5:
+ case 6:
+ case 7:
+ DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod);
+ HALT_SYS();
+ break;
+ }
+ }
+#endif
+ if (mod < 3) {
+ DECODE_PRINTF("BYTE PTR ");
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ destval = fetch_data_byte(destoffset);
+ TRACE_AND_STEP();
+ if (rh == 0)
+ destval = inc_byte(destval);
+ else
+ destval = dec_byte(destval);
+ store_data_byte(destoffset, destval);
+ } else {
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ if (rh == 0)
+ *destreg = inc_byte(*destreg);
+ else
+ *destreg = dec_byte(*destreg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0xff
+****************************************************************************/
+void x86emuOp_opcFF_word_RM(u8 X86EMU_UNUSED(op1))
+{
+ int mod, rh, rl;
+ uint destoffset = 0;
+ u16 *destreg;
+ u16 destval,destval2;
+
+ /* Yet another special case instruction. */
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+#ifdef DEBUG
+ if (DEBUG_DECODE()) {
+ /* XXX DECODE_PRINTF may be changed to something more
+ general, so that it is important to leave the strings
+ in the same format, even though the result is that the
+ above test is done twice. */
+
+ switch (rh) {
+ case 0:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("INC\tDWORD PTR ");
+ } else {
+ DECODE_PRINTF("INC\tWORD PTR ");
+ }
+ break;
+ case 1:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ DECODE_PRINTF("DEC\tDWORD PTR ");
+ } else {
+ DECODE_PRINTF("DEC\tWORD PTR ");
+ }
+ break;
+ case 2:
+ DECODE_PRINTF("CALL\t ");
+ break;
+ case 3:
+ DECODE_PRINTF("CALL\tFAR ");
+ break;
+ case 4:
+ DECODE_PRINTF("JMP\t");
+ break;
+ case 5:
+ DECODE_PRINTF("JMP\tFAR ");
+ break;
+ case 6:
+ DECODE_PRINTF("PUSH\t");
+ break;
+ case 7:
+ DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t");
+ HALT_SYS();
+ break;
+ }
+ }
+#endif
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ switch (rh) {
+ case 0: /* inc word ptr ... */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ destval = fetch_data_long(destoffset);
+ TRACE_AND_STEP();
+ destval = inc_long(destval);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ destval = inc_word(destval);
+ store_data_word(destoffset, destval);
+ }
+ break;
+ case 1: /* dec word ptr ... */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ destval = fetch_data_long(destoffset);
+ TRACE_AND_STEP();
+ destval = dec_long(destval);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ destval = dec_word(destval);
+ store_data_word(destoffset, destval);
+ }
+ break;
+ case 2: /* call word ptr ... */
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = destval;
+ break;
+ case 3: /* call far ptr ... */
+ destval = fetch_data_word(destoffset);
+ destval2 = fetch_data_word(destoffset + 2);
+ TRACE_AND_STEP();
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = destval2;
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = destval;
+ break;
+ case 4: /* jmp word ptr ... */
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ M.x86.R_IP = destval;
+ break;
+ case 5: /* jmp far ptr ... */
+ destval = fetch_data_word(destoffset);
+ destval2 = fetch_data_word(destoffset + 2);
+ TRACE_AND_STEP();
+ M.x86.R_IP = destval;
+ M.x86.R_CS = destval2;
+ break;
+ case 6: /* push word ptr ... */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+
+ destval = fetch_data_long(destoffset);
+ TRACE_AND_STEP();
+ push_long(destval);
+ } else {
+ u16 destval;
+
+ destval = fetch_data_word(destoffset);
+ TRACE_AND_STEP();
+ push_word(destval);
+ }
+ break;
+ }
+ } else {
+ switch (rh) {
+ case 0:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = inc_long(*destreg);
+ } else {
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = inc_word(*destreg);
+ }
+ break;
+ case 1:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = dec_long(*destreg);
+ } else {
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = dec_word(*destreg);
+ }
+ break;
+ case 2: /* call word ptr ... */
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = *destreg;
+ break;
+ case 3: /* jmp far ptr ... */
+ DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
+ TRACE_AND_STEP();
+ HALT_SYS();
+ break;
+
+ case 4: /* jmp ... */
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ M.x86.R_IP = (u16) (*destreg);
+ break;
+ case 5: /* jmp far ptr ... */
+ DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n");
+ TRACE_AND_STEP();
+ HALT_SYS();
+ break;
+ case 6:
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ push_long(*destreg);
+ } else {
+ u16 *destreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ push_word(*destreg);
+ }
+ break;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/***************************************************************************
+ * Single byte operation code table:
+ **************************************************************************/
+void (*x86emu_optab[256])(u8) __attribute__ ((section(".got2"))) =
+{
+/* 0x00 */ x86emuOp_genop_byte_RM_R,
+/* 0x01 */ x86emuOp_genop_word_RM_R,
+/* 0x02 */ x86emuOp_genop_byte_R_RM,
+/* 0x03 */ x86emuOp_genop_word_R_RM,
+/* 0x04 */ x86emuOp_genop_byte_AL_IMM,
+/* 0x05 */ x86emuOp_genop_word_AX_IMM,
+/* 0x06 */ x86emuOp_push_ES,
+/* 0x07 */ x86emuOp_pop_ES,
+
+/* 0x08 */ x86emuOp_genop_byte_RM_R,
+/* 0x09 */ x86emuOp_genop_word_RM_R,
+/* 0x0a */ x86emuOp_genop_byte_R_RM,
+/* 0x0b */ x86emuOp_genop_word_R_RM,
+/* 0x0c */ x86emuOp_genop_byte_AL_IMM,
+/* 0x0d */ x86emuOp_genop_word_AX_IMM,
+/* 0x0e */ x86emuOp_push_CS,
+/* 0x0f */ x86emuOp_two_byte,
+
+/* 0x10 */ x86emuOp_genop_byte_RM_R,
+/* 0x11 */ x86emuOp_genop_word_RM_R,
+/* 0x12 */ x86emuOp_genop_byte_R_RM,
+/* 0x13 */ x86emuOp_genop_word_R_RM,
+/* 0x14 */ x86emuOp_genop_byte_AL_IMM,
+/* 0x15 */ x86emuOp_genop_word_AX_IMM,
+/* 0x16 */ x86emuOp_push_SS,
+/* 0x17 */ x86emuOp_pop_SS,
+
+/* 0x18 */ x86emuOp_genop_byte_RM_R,
+/* 0x19 */ x86emuOp_genop_word_RM_R,
+/* 0x1a */ x86emuOp_genop_byte_R_RM,
+/* 0x1b */ x86emuOp_genop_word_R_RM,
+/* 0x1c */ x86emuOp_genop_byte_AL_IMM,
+/* 0x1d */ x86emuOp_genop_word_AX_IMM,
+/* 0x1e */ x86emuOp_push_DS,
+/* 0x1f */ x86emuOp_pop_DS,
+
+/* 0x20 */ x86emuOp_genop_byte_RM_R,
+/* 0x21 */ x86emuOp_genop_word_RM_R,
+/* 0x22 */ x86emuOp_genop_byte_R_RM,
+/* 0x23 */ x86emuOp_genop_word_R_RM,
+/* 0x24 */ x86emuOp_genop_byte_AL_IMM,
+/* 0x25 */ x86emuOp_genop_word_AX_IMM,
+/* 0x26 */ x86emuOp_segovr_ES,
+/* 0x27 */ x86emuOp_daa,
+
+/* 0x28 */ x86emuOp_genop_byte_RM_R,
+/* 0x29 */ x86emuOp_genop_word_RM_R,
+/* 0x2a */ x86emuOp_genop_byte_R_RM,
+/* 0x2b */ x86emuOp_genop_word_R_RM,
+/* 0x2c */ x86emuOp_genop_byte_AL_IMM,
+/* 0x2d */ x86emuOp_genop_word_AX_IMM,
+/* 0x2e */ x86emuOp_segovr_CS,
+/* 0x2f */ x86emuOp_das,
+
+/* 0x30 */ x86emuOp_genop_byte_RM_R,
+/* 0x31 */ x86emuOp_genop_word_RM_R,
+/* 0x32 */ x86emuOp_genop_byte_R_RM,
+/* 0x33 */ x86emuOp_genop_word_R_RM,
+/* 0x34 */ x86emuOp_genop_byte_AL_IMM,
+/* 0x35 */ x86emuOp_genop_word_AX_IMM,
+/* 0x36 */ x86emuOp_segovr_SS,
+/* 0x37 */ x86emuOp_aaa,
+
+/* 0x38 */ x86emuOp_genop_byte_RM_R,
+/* 0x39 */ x86emuOp_genop_word_RM_R,
+/* 0x3a */ x86emuOp_genop_byte_R_RM,
+/* 0x3b */ x86emuOp_genop_word_R_RM,
+/* 0x3c */ x86emuOp_genop_byte_AL_IMM,
+/* 0x3d */ x86emuOp_genop_word_AX_IMM,
+/* 0x3e */ x86emuOp_segovr_DS,
+/* 0x3f */ x86emuOp_aas,
+
+/* 0x40 */ x86emuOp_inc_register,
+/* 0x41 */ x86emuOp_inc_register,
+/* 0x42 */ x86emuOp_inc_register,
+/* 0x43 */ x86emuOp_inc_register,
+/* 0x44 */ x86emuOp_inc_register,
+/* 0x45 */ x86emuOp_inc_register,
+/* 0x46 */ x86emuOp_inc_register,
+/* 0x47 */ x86emuOp_inc_register,
+
+/* 0x48 */ x86emuOp_dec_register,
+/* 0x49 */ x86emuOp_dec_register,
+/* 0x4a */ x86emuOp_dec_register,
+/* 0x4b */ x86emuOp_dec_register,
+/* 0x4c */ x86emuOp_dec_register,
+/* 0x4d */ x86emuOp_dec_register,
+/* 0x4e */ x86emuOp_dec_register,
+/* 0x4f */ x86emuOp_dec_register,
+
+/* 0x50 */ x86emuOp_push_register,
+/* 0x51 */ x86emuOp_push_register,
+/* 0x52 */ x86emuOp_push_register,
+/* 0x53 */ x86emuOp_push_register,
+/* 0x54 */ x86emuOp_push_register,
+/* 0x55 */ x86emuOp_push_register,
+/* 0x56 */ x86emuOp_push_register,
+/* 0x57 */ x86emuOp_push_register,
+
+/* 0x58 */ x86emuOp_pop_register,
+/* 0x59 */ x86emuOp_pop_register,
+/* 0x5a */ x86emuOp_pop_register,
+/* 0x5b */ x86emuOp_pop_register,
+/* 0x5c */ x86emuOp_pop_register,
+/* 0x5d */ x86emuOp_pop_register,
+/* 0x5e */ x86emuOp_pop_register,
+/* 0x5f */ x86emuOp_pop_register,
+
+/* 0x60 */ x86emuOp_push_all,
+/* 0x61 */ x86emuOp_pop_all,
+/* 0x62 */ x86emuOp_illegal_op, /* bound */
+/* 0x63 */ x86emuOp_illegal_op, /* arpl */
+/* 0x64 */ x86emuOp_segovr_FS,
+/* 0x65 */ x86emuOp_segovr_GS,
+/* 0x66 */ x86emuOp_prefix_data,
+/* 0x67 */ x86emuOp_prefix_addr,
+
+/* 0x68 */ x86emuOp_push_word_IMM,
+/* 0x69 */ x86emuOp_imul_word_IMM,
+/* 0x6a */ x86emuOp_push_byte_IMM,
+/* 0x6b */ x86emuOp_imul_byte_IMM,
+/* 0x6c */ x86emuOp_ins_byte,
+/* 0x6d */ x86emuOp_ins_word,
+/* 0x6e */ x86emuOp_outs_byte,
+/* 0x6f */ x86emuOp_outs_word,
+
+/* 0x70 */ x86emuOp_jump_near_cond,
+/* 0x71 */ x86emuOp_jump_near_cond,
+/* 0x72 */ x86emuOp_jump_near_cond,
+/* 0x73 */ x86emuOp_jump_near_cond,
+/* 0x74 */ x86emuOp_jump_near_cond,
+/* 0x75 */ x86emuOp_jump_near_cond,
+/* 0x76 */ x86emuOp_jump_near_cond,
+/* 0x77 */ x86emuOp_jump_near_cond,
+
+/* 0x78 */ x86emuOp_jump_near_cond,
+/* 0x79 */ x86emuOp_jump_near_cond,
+/* 0x7a */ x86emuOp_jump_near_cond,
+/* 0x7b */ x86emuOp_jump_near_cond,
+/* 0x7c */ x86emuOp_jump_near_cond,
+/* 0x7d */ x86emuOp_jump_near_cond,
+/* 0x7e */ x86emuOp_jump_near_cond,
+/* 0x7f */ x86emuOp_jump_near_cond,
+
+/* 0x80 */ x86emuOp_opc80_byte_RM_IMM,
+/* 0x81 */ x86emuOp_opc81_word_RM_IMM,
+/* 0x82 */ x86emuOp_opc82_byte_RM_IMM,
+/* 0x83 */ x86emuOp_opc83_word_RM_IMM,
+/* 0x84 */ x86emuOp_test_byte_RM_R,
+/* 0x85 */ x86emuOp_test_word_RM_R,
+/* 0x86 */ x86emuOp_xchg_byte_RM_R,
+/* 0x87 */ x86emuOp_xchg_word_RM_R,
+
+/* 0x88 */ x86emuOp_mov_byte_RM_R,
+/* 0x89 */ x86emuOp_mov_word_RM_R,
+/* 0x8a */ x86emuOp_mov_byte_R_RM,
+/* 0x8b */ x86emuOp_mov_word_R_RM,
+/* 0x8c */ x86emuOp_mov_word_RM_SR,
+/* 0x8d */ x86emuOp_lea_word_R_M,
+/* 0x8e */ x86emuOp_mov_word_SR_RM,
+/* 0x8f */ x86emuOp_pop_RM,
+
+/* 0x90 */ x86emuOp_nop,
+/* 0x91 */ x86emuOp_xchg_word_AX_register,
+/* 0x92 */ x86emuOp_xchg_word_AX_register,
+/* 0x93 */ x86emuOp_xchg_word_AX_register,
+/* 0x94 */ x86emuOp_xchg_word_AX_register,
+/* 0x95 */ x86emuOp_xchg_word_AX_register,
+/* 0x96 */ x86emuOp_xchg_word_AX_register,
+/* 0x97 */ x86emuOp_xchg_word_AX_register,
+
+/* 0x98 */ x86emuOp_cbw,
+/* 0x99 */ x86emuOp_cwd,
+/* 0x9a */ x86emuOp_call_far_IMM,
+/* 0x9b */ x86emuOp_wait,
+/* 0x9c */ x86emuOp_pushf_word,
+/* 0x9d */ x86emuOp_popf_word,
+/* 0x9e */ x86emuOp_sahf,
+/* 0x9f */ x86emuOp_lahf,
+
+/* 0xa0 */ x86emuOp_mov_AL_M_IMM,
+/* 0xa1 */ x86emuOp_mov_AX_M_IMM,
+/* 0xa2 */ x86emuOp_mov_M_AL_IMM,
+/* 0xa3 */ x86emuOp_mov_M_AX_IMM,
+/* 0xa4 */ x86emuOp_movs_byte,
+/* 0xa5 */ x86emuOp_movs_word,
+/* 0xa6 */ x86emuOp_cmps_byte,
+/* 0xa7 */ x86emuOp_cmps_word,
+/* 0xa8 */ x86emuOp_test_AL_IMM,
+/* 0xa9 */ x86emuOp_test_AX_IMM,
+/* 0xaa */ x86emuOp_stos_byte,
+/* 0xab */ x86emuOp_stos_word,
+/* 0xac */ x86emuOp_lods_byte,
+/* 0xad */ x86emuOp_lods_word,
+/* 0xac */ x86emuOp_scas_byte,
+/* 0xad */ x86emuOp_scas_word,
+
+/* 0xb0 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb1 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb2 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb3 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb4 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb5 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb6 */ x86emuOp_mov_byte_register_IMM,
+/* 0xb7 */ x86emuOp_mov_byte_register_IMM,
+
+/* 0xb8 */ x86emuOp_mov_word_register_IMM,
+/* 0xb9 */ x86emuOp_mov_word_register_IMM,
+/* 0xba */ x86emuOp_mov_word_register_IMM,
+/* 0xbb */ x86emuOp_mov_word_register_IMM,
+/* 0xbc */ x86emuOp_mov_word_register_IMM,
+/* 0xbd */ x86emuOp_mov_word_register_IMM,
+/* 0xbe */ x86emuOp_mov_word_register_IMM,
+/* 0xbf */ x86emuOp_mov_word_register_IMM,
+
+/* 0xc0 */ x86emuOp_opcC0_byte_RM_MEM,
+/* 0xc1 */ x86emuOp_opcC1_word_RM_MEM,
+/* 0xc2 */ x86emuOp_ret_near_IMM,
+/* 0xc3 */ x86emuOp_ret_near,
+/* 0xc4 */ x86emuOp_les_R_IMM,
+/* 0xc5 */ x86emuOp_lds_R_IMM,
+/* 0xc6 */ x86emuOp_mov_byte_RM_IMM,
+/* 0xc7 */ x86emuOp_mov_word_RM_IMM,
+/* 0xc8 */ x86emuOp_enter,
+/* 0xc9 */ x86emuOp_leave,
+/* 0xca */ x86emuOp_ret_far_IMM,
+/* 0xcb */ x86emuOp_ret_far,
+/* 0xcc */ x86emuOp_int3,
+/* 0xcd */ x86emuOp_int_IMM,
+/* 0xce */ x86emuOp_into,
+/* 0xcf */ x86emuOp_iret,
+
+/* 0xd0 */ x86emuOp_opcD0_byte_RM_1,
+/* 0xd1 */ x86emuOp_opcD1_word_RM_1,
+/* 0xd2 */ x86emuOp_opcD2_byte_RM_CL,
+/* 0xd3 */ x86emuOp_opcD3_word_RM_CL,
+/* 0xd4 */ x86emuOp_aam,
+/* 0xd5 */ x86emuOp_aad,
+/* 0xd6 */ x86emuOp_illegal_op, /* Undocumented SETALC instruction */
+/* 0xd7 */ x86emuOp_xlat,
+/* 0xd8 */ NULL, /*x86emuOp_esc_coprocess_d8,*/
+/* 0xd9 */ NULL, /*x86emuOp_esc_coprocess_d9,*/
+/* 0xda */ NULL, /*x86emuOp_esc_coprocess_da,*/
+/* 0xdb */ NULL, /*x86emuOp_esc_coprocess_db,*/
+/* 0xdc */ NULL, /*x86emuOp_esc_coprocess_dc,*/
+/* 0xdd */ NULL, /*x86emuOp_esc_coprocess_dd,*/
+/* 0xde */ NULL, /*x86emuOp_esc_coprocess_de,*/
+/* 0xdf */ NULL, /*x86emuOp_esc_coprocess_df,*/
+
+/* 0xe0 */ x86emuOp_loopne,
+/* 0xe1 */ x86emuOp_loope,
+/* 0xe2 */ x86emuOp_loop,
+/* 0xe3 */ x86emuOp_jcxz,
+/* 0xe4 */ x86emuOp_in_byte_AL_IMM,
+/* 0xe5 */ x86emuOp_in_word_AX_IMM,
+/* 0xe6 */ x86emuOp_out_byte_IMM_AL,
+/* 0xe7 */ x86emuOp_out_word_IMM_AX,
+
+/* 0xe8 */ x86emuOp_call_near_IMM,
+/* 0xe9 */ x86emuOp_jump_near_IMM,
+/* 0xea */ x86emuOp_jump_far_IMM,
+/* 0xeb */ x86emuOp_jump_byte_IMM,
+/* 0xec */ x86emuOp_in_byte_AL_DX,
+/* 0xed */ x86emuOp_in_word_AX_DX,
+/* 0xee */ x86emuOp_out_byte_DX_AL,
+/* 0xef */ x86emuOp_out_word_DX_AX,
+
+/* 0xf0 */ x86emuOp_lock,
+/* 0xf1 */ x86emuOp_illegal_op,
+/* 0xf2 */ x86emuOp_repne,
+/* 0xf3 */ x86emuOp_repe,
+/* 0xf4 */ x86emuOp_halt,
+/* 0xf5 */ x86emuOp_cmc,
+/* 0xf6 */ x86emuOp_opcF6_byte_RM,
+/* 0xf7 */ x86emuOp_opcF7_word_RM,
+
+/* 0xf8 */ x86emuOp_clc,
+/* 0xf9 */ x86emuOp_stc,
+/* 0xfa */ x86emuOp_cli,
+/* 0xfb */ x86emuOp_sti,
+/* 0xfc */ x86emuOp_cld,
+/* 0xfd */ x86emuOp_std,
+/* 0xfe */ x86emuOp_opcFE_byte_RM,
+/* 0xff */ x86emuOp_opcFF_word_RM,
+};
+
+#endif
diff --git a/drivers/bios_emulator/x86emu/ops2.c b/drivers/bios_emulator/x86emu/ops2.c
new file mode 100644
index 0000000..d6a210c
--- /dev/null
+++ b/drivers/bios_emulator/x86emu/ops2.c
@@ -0,0 +1,1776 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
+* Jason Jin <Jason.jin@freescale.com>
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file includes subroutines to implement the decoding
+* and emulation of all the x86 extended two-byte processor
+* instructions.
+*
+* Jason port this file to u-boot. Put the function pointer into
+* got2 sector.
+*
+****************************************************************************/
+
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "x86emu/x86emui.h"
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+op1 - Instruction op code
+
+REMARKS:
+Handles illegal opcodes.
+****************************************************************************/
+void x86emuOp2_illegal_op(
+ u8 op2)
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ TRACE_REGS();
+ printk("%04x:%04x: %02X ILLEGAL EXTENDED X86 OPCODE!\n",
+ M.x86.R_CS, M.x86.R_IP-2,op2);
+ HALT_SYS();
+ END_OF_INSTR();
+}
+
+#define xorl(a,b) ((a) && !(b)) || (!(a) && (b))
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0x80-0x8F
+****************************************************************************/
+int x86emu_check_jump_condition(u8 op)
+{
+ switch (op) {
+ case 0x0:
+ DECODE_PRINTF("JO\t");
+ return ACCESS_FLAG(F_OF);
+ case 0x1:
+ DECODE_PRINTF("JNO\t");
+ return !ACCESS_FLAG(F_OF);
+ break;
+ case 0x2:
+ DECODE_PRINTF("JB\t");
+ return ACCESS_FLAG(F_CF);
+ break;
+ case 0x3:
+ DECODE_PRINTF("JNB\t");
+ return !ACCESS_FLAG(F_CF);
+ break;
+ case 0x4:
+ DECODE_PRINTF("JZ\t");
+ return ACCESS_FLAG(F_ZF);
+ break;
+ case 0x5:
+ DECODE_PRINTF("JNZ\t");
+ return !ACCESS_FLAG(F_ZF);
+ break;
+ case 0x6:
+ DECODE_PRINTF("JBE\t");
+ return ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
+ break;
+ case 0x7:
+ DECODE_PRINTF("JNBE\t");
+ return !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
+ break;
+ case 0x8:
+ DECODE_PRINTF("JS\t");
+ return ACCESS_FLAG(F_SF);
+ break;
+ case 0x9:
+ DECODE_PRINTF("JNS\t");
+ return !ACCESS_FLAG(F_SF);
+ break;
+ case 0xa:
+ DECODE_PRINTF("JP\t");
+ return ACCESS_FLAG(F_PF);
+ break;
+ case 0xb:
+ DECODE_PRINTF("JNP\t");
+ return !ACCESS_FLAG(F_PF);
+ break;
+ case 0xc:
+ DECODE_PRINTF("JL\t");
+ return xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0xd:
+ DECODE_PRINTF("JNL\t");
+ return !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0xe:
+ DECODE_PRINTF("JLE\t");
+ return (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ break;
+ default:
+ DECODE_PRINTF("JNLE\t");
+ return !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ }
+}
+
+void x86emuOp2_long_jump(u8 op2)
+{
+ s32 target;
+ int cond;
+
+ /* conditional jump to word offset. */
+ START_OF_INSTR();
+ cond = x86emu_check_jump_condition(op2 & 0xF);
+ target = (s16) fetch_word_imm();
+ target += (s16) M.x86.R_IP;
+ DECODE_PRINTF2("%04x\n", target);
+ TRACE_AND_STEP();
+ if (cond)
+ M.x86.R_IP = (u16)target;
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0x90-0x9F
+****************************************************************************/
+void x86emuOp2_set_byte(u8 op2)
+{
+ int mod, rl, rh;
+ uint destoffset;
+ u8 *destreg;
+ char *name = 0;
+ int cond = 0;
+
+ START_OF_INSTR();
+ switch (op2) {
+ case 0x90:
+ name = "SETO\t";
+ cond = ACCESS_FLAG(F_OF);
+ break;
+ case 0x91:
+ name = "SETNO\t";
+ cond = !ACCESS_FLAG(F_OF);
+ break;
+ case 0x92:
+ name = "SETB\t";
+ cond = ACCESS_FLAG(F_CF);
+ break;
+ case 0x93:
+ name = "SETNB\t";
+ cond = !ACCESS_FLAG(F_CF);
+ break;
+ case 0x94:
+ name = "SETZ\t";
+ cond = ACCESS_FLAG(F_ZF);
+ break;
+ case 0x95:
+ name = "SETNZ\t";
+ cond = !ACCESS_FLAG(F_ZF);
+ break;
+ case 0x96:
+ name = "SETBE\t";
+ cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF);
+ break;
+ case 0x97:
+ name = "SETNBE\t";
+ cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF));
+ break;
+ case 0x98:
+ name = "SETS\t";
+ cond = ACCESS_FLAG(F_SF);
+ break;
+ case 0x99:
+ name = "SETNS\t";
+ cond = !ACCESS_FLAG(F_SF);
+ break;
+ case 0x9a:
+ name = "SETP\t";
+ cond = ACCESS_FLAG(F_PF);
+ break;
+ case 0x9b:
+ name = "SETNP\t";
+ cond = !ACCESS_FLAG(F_PF);
+ break;
+ case 0x9c:
+ name = "SETL\t";
+ cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0x9d:
+ name = "SETNL\t";
+ cond = !xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF));
+ break;
+ case 0x9e:
+ name = "SETLE\t";
+ cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ break;
+ case 0x9f:
+ name = "SETNLE\t";
+ cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) ||
+ ACCESS_FLAG(F_ZF));
+ break;
+ }
+ DECODE_PRINTF(name);
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ TRACE_AND_STEP();
+ store_data_byte(destoffset, cond ? 0x01 : 0x00);
+ } else { /* register to register */
+ destreg = DECODE_RM_BYTE_REGISTER(rl);
+ TRACE_AND_STEP();
+ *destreg = cond ? 0x01 : 0x00;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa0
+****************************************************************************/
+void x86emuOp2_push_FS(u8 X86EMU_UNUSED(op2))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tFS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_FS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa1
+****************************************************************************/
+void x86emuOp2_pop_FS(u8 X86EMU_UNUSED(op2))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tFS\n");
+ TRACE_AND_STEP();
+ M.x86.R_FS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa3
+****************************************************************************/
+void x86emuOp2_bt_R(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit,disp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BT\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval;
+ u32 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16)*shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset+disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ } else {
+ u16 srcval;
+ u16 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16)*shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset+disp);
+ CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg,*shiftreg;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+ } else {
+ u16 *srcreg,*shiftreg;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa4
+****************************************************************************/
+void x86emuOp2_shld_IMM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint destoffset;
+ u8 shift;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shld_long(destval,*shiftreg,shift);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shld_word(destval,*shiftreg,shift);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shld_long(*destreg,*shiftreg,shift);
+ } else {
+ u16 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shld_word(*destreg,*shiftreg,shift);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa5
+****************************************************************************/
+void x86emuOp2_shld_CL(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shld_long(destval,*shiftreg,M.x86.R_CL);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shld_word(destval,*shiftreg,M.x86.R_CL);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL);
+ } else {
+ u16 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa8
+****************************************************************************/
+void x86emuOp2_push_GS(u8 X86EMU_UNUSED(op2))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("PUSH\tGS\n");
+ TRACE_AND_STEP();
+ push_word(M.x86.R_GS);
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xa9
+****************************************************************************/
+void x86emuOp2_pop_GS(u8 X86EMU_UNUSED(op2))
+{
+ START_OF_INSTR();
+ DECODE_PRINTF("POP\tGS\n");
+ TRACE_AND_STEP();
+ M.x86.R_GS = pop_word();
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xaa
+****************************************************************************/
+void x86emuOp2_bts_R(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit,disp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BTS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval,mask;
+ u32 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16)*shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset+disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_long(srcoffset+disp, srcval | mask);
+ } else {
+ u16 srcval,mask;
+ u16 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16)*shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset+disp);
+ mask = (u16)(0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_word(srcoffset+disp, srcval | mask);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg,*shiftreg;
+ u32 mask;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg |= mask;
+ } else {
+ u16 *srcreg,*shiftreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16)(0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg |= mask;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xac
+****************************************************************************/
+void x86emuOp2_shrd_IMM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint destoffset;
+ u8 shift;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shrd_long(destval,*shiftreg,shift);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
+
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shrd_word(destval,*shiftreg,shift);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shrd_long(*destreg,*shiftreg,shift);
+ } else {
+ u16 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2("%d\n", shift);
+ TRACE_AND_STEP();
+ *destreg = shrd_word(*destreg,*shiftreg,shift);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xad
+****************************************************************************/
+void x86emuOp2_shrd_CL(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint destoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("SHLD\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 destval;
+ u32 *shiftreg;
+
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_long(destoffset);
+ destval = shrd_long(destval,*shiftreg,M.x86.R_CL);
+ store_data_long(destoffset, destval);
+ } else {
+ u16 destval;
+ u16 *shiftreg;
+
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ destval = fetch_data_word(destoffset);
+ destval = shrd_word(destval,*shiftreg,M.x86.R_CL);
+ store_data_word(destoffset, destval);
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL);
+ } else {
+ u16 *destreg,*shiftreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",CL\n");
+ TRACE_AND_STEP();
+ *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xaf
+****************************************************************************/
+void x86emuOp2_imul_R_RM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("IMUL\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+ u32 res_lo,res_hi;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_long(srcoffset);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval);
+ if (res_hi != 0) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u32)res_lo;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+ u32 res;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_word(srcoffset);
+ TRACE_AND_STEP();
+ res = (s16)*destreg * (s16)srcval;
+ if (res > 0xFFFF) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u16)res;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg,*srcreg;
+ u32 res_lo,res_hi;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ TRACE_AND_STEP();
+ imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg);
+ if (res_hi != 0) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u32)res_lo;
+ } else {
+ u16 *destreg,*srcreg;
+ u32 res;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ res = (s16)*destreg * (s16)*srcreg;
+ if (res > 0xFFFF) {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ }
+ *destreg = (u16)res;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb2
+****************************************************************************/
+void x86emuOp2_lss_R_IMM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LSS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_SS = fetch_data_word(srcoffset + 2);
+ } else { /* register to register */
+ /* UNDEFINED! */
+ TRACE_AND_STEP();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb3
+****************************************************************************/
+void x86emuOp2_btr_R(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit,disp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BTR\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval,mask;
+ u32 *shiftreg;
+
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16)*shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset+disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_long(srcoffset+disp, srcval & ~mask);
+ } else {
+ u16 srcval,mask;
+ u16 *shiftreg;
+
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16)*shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset+disp);
+ mask = (u16)(0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_word(srcoffset+disp, (u16)(srcval & ~mask));
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg,*shiftreg;
+ u32 mask;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg &= ~mask;
+ } else {
+ u16 *srcreg,*shiftreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16)(0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg &= ~mask;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb4
+****************************************************************************/
+void x86emuOp2_lfs_R_IMM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LFS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_FS = fetch_data_word(srcoffset + 2);
+ } else { /* register to register */
+ /* UNDEFINED! */
+ TRACE_AND_STEP();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb5
+****************************************************************************/
+void x86emuOp2_lgs_R_IMM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rh, rl;
+ u16 *dstreg;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("LGS\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *dstreg = fetch_data_word(srcoffset);
+ M.x86.R_GS = fetch_data_word(srcoffset + 2);
+ } else { /* register to register */
+ /* UNDEFINED! */
+ TRACE_AND_STEP();
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb6
+****************************************************************************/
+void x86emuOp2_movzx_byte_R_RM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVZX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_byte(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_byte(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u8 *srcreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ } else {
+ u16 *destreg;
+ u8 *srcreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xb7
+****************************************************************************/
+void x86emuOp2_movzx_word_R_RM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ u32 *destreg;
+ u32 srcval;
+ u16 *srcreg;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVZX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = fetch_data_word(srcoffset);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else { /* register to register */
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = *srcreg;
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xba
+****************************************************************************/
+void x86emuOp2_btX_I(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ u8 shift;
+ int bit;
+
+ START_OF_INSTR();
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ switch (rh) {
+ case 4:
+ DECODE_PRINTF("BT\t");
+ break;
+ case 5:
+ DECODE_PRINTF("BTS\t");
+ break;
+ case 6:
+ DECODE_PRINTF("BTR\t");
+ break;
+ case 7:
+ DECODE_PRINTF("BTC\t");
+ break;
+ default:
+ DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n");
+ TRACE_REGS();
+ printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n",
+ M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl);
+ HALT_SYS();
+ }
+ if (mod < 3) {
+
+ srcoffset = decode_rmXX_address(mod, rl);
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", shift);
+ TRACE_AND_STEP();
+
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, mask;
+
+ bit = shift & 0x1F;
+ srcval = fetch_data_long(srcoffset);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ switch (rh) {
+ case 5:
+ store_data_long(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_long(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_long(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ } else {
+ u16 srcval, mask;
+
+ bit = shift & 0xF;
+ srcval = fetch_data_word(srcoffset);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ switch (rh) {
+ case 5:
+ store_data_word(srcoffset, srcval | mask);
+ break;
+ case 6:
+ store_data_word(srcoffset, srcval & ~mask);
+ break;
+ case 7:
+ store_data_word(srcoffset, srcval ^ mask);
+ break;
+ default:
+ break;
+ }
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg;
+ u32 mask;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", shift);
+ TRACE_AND_STEP();
+ bit = shift & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ switch (rh) {
+ case 5:
+ *srcreg |= mask;
+ break;
+ case 6:
+ *srcreg &= ~mask;
+ break;
+ case 7:
+ *srcreg ^= mask;
+ break;
+ default:
+ break;
+ }
+ } else {
+ u16 *srcreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ shift = fetch_byte_imm();
+ DECODE_PRINTF2(",%d\n", shift);
+ TRACE_AND_STEP();
+ bit = shift & 0xF;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ switch (rh) {
+ case 5:
+ *srcreg |= mask;
+ break;
+ case 6:
+ *srcreg &= ~mask;
+ break;
+ case 7:
+ *srcreg ^= mask;
+ break;
+ default:
+ break;
+ }
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbb
+****************************************************************************/
+void x86emuOp2_btc_R(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ int bit,disp;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BTC\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval,mask;
+ u32 *shiftreg;
+
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ disp = (s16)*shiftreg >> 5;
+ srcval = fetch_data_long(srcoffset+disp);
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_long(srcoffset+disp, srcval ^ mask);
+ } else {
+ u16 srcval,mask;
+ u16 *shiftreg;
+
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ disp = (s16)*shiftreg >> 4;
+ srcval = fetch_data_word(srcoffset+disp);
+ mask = (u16)(0x1 << bit);
+ CONDITIONAL_SET_FLAG(srcval & mask,F_CF);
+ store_data_word(srcoffset+disp, (u16)(srcval ^ mask));
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg,*shiftreg;
+ u32 mask;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0x1F;
+ mask = (0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg ^= mask;
+ } else {
+ u16 *srcreg,*shiftreg;
+ u16 mask;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ shiftreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ bit = *shiftreg & 0xF;
+ mask = (u16)(0x1 << bit);
+ CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF);
+ *srcreg ^= mask;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbc
+****************************************************************************/
+void x86emuOp2_bsf(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BSF\n");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1) break;
+ } else {
+ u16 srcval, *dstreg;
+
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((srcval >> *dstreg) & 1) break;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *dstreg;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ for(*dstreg = 0; *dstreg < 32; (*dstreg)++)
+ if ((*srcreg >> *dstreg) & 1) break;
+ } else {
+ u16 *srcreg, *dstreg;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ for(*dstreg = 0; *dstreg < 16; (*dstreg)++)
+ if ((*srcreg >> *dstreg) & 1) break;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbd
+****************************************************************************/
+void x86emuOp2_bsr(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("BSF\n");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ srcoffset = decode_rmXX_address(mod, rl);
+ DECODE_PRINTF(",");
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 srcval, *dstreg;
+
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_long(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1) break;
+ } else {
+ u16 srcval, *dstreg;
+
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ srcval = fetch_data_word(srcoffset);
+ CONDITIONAL_SET_FLAG(srcval == 0, F_ZF);
+ for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((srcval >> *dstreg) & 1) break;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *srcreg, *dstreg;
+
+ srcreg = DECODE_RM_LONG_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_LONG_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ for(*dstreg = 31; *dstreg > 0; (*dstreg)--)
+ if ((*srcreg >> *dstreg) & 1) break;
+ } else {
+ u16 *srcreg, *dstreg;
+
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF(",");
+ dstreg = DECODE_RM_WORD_REGISTER(rh);
+ TRACE_AND_STEP();
+ CONDITIONAL_SET_FLAG(*srcreg == 0, F_ZF);
+ for(*dstreg = 15; *dstreg > 0; (*dstreg)--)
+ if ((*srcreg >> *dstreg) & 1) break;
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbe
+****************************************************************************/
+void x86emuOp2_movsx_byte_R_RM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVSX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u32 srcval;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = (s32)((s8)fetch_data_byte(srcoffset));
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else {
+ u16 *destreg;
+ u16 srcval;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = (s16)((s8)fetch_data_byte(srcoffset));
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ }
+ } else { /* register to register */
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ u32 *destreg;
+ u8 *srcreg;
+
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = (s32)((s8)*srcreg);
+ } else {
+ u16 *destreg;
+ u8 *srcreg;
+
+ destreg = DECODE_RM_WORD_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_BYTE_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = (s16)((s8)*srcreg);
+ }
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/****************************************************************************
+REMARKS:
+Handles opcode 0x0f,0xbf
+****************************************************************************/
+void x86emuOp2_movsx_word_R_RM(u8 X86EMU_UNUSED(op2))
+{
+ int mod, rl, rh;
+ uint srcoffset;
+ u32 *destreg;
+ u32 srcval;
+ u16 *srcreg;
+
+ START_OF_INSTR();
+ DECODE_PRINTF("MOVSX\t");
+ FETCH_DECODE_MODRM(mod, rh, rl);
+ if (mod < 3) {
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcoffset = decode_rmXX_address(mod, rl);
+ srcval = (s32)((s16)fetch_data_word(srcoffset));
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = srcval;
+ } else { /* register to register */
+ destreg = DECODE_RM_LONG_REGISTER(rh);
+ DECODE_PRINTF(",");
+ srcreg = DECODE_RM_WORD_REGISTER(rl);
+ DECODE_PRINTF("\n");
+ TRACE_AND_STEP();
+ *destreg = (s32)((s16)*srcreg);
+ }
+ DECODE_CLEAR_SEGOVR();
+ END_OF_INSTR();
+}
+
+/***************************************************************************
+ * Double byte operation code table:
+ **************************************************************************/
+void (*x86emu_optab2[256])(u8) __attribute__((section(".got2"))) =
+{
+/* 0x00 */ x86emuOp2_illegal_op, /* Group F (ring 0 PM) */
+/* 0x01 */ x86emuOp2_illegal_op, /* Group G (ring 0 PM) */
+/* 0x02 */ x86emuOp2_illegal_op, /* lar (ring 0 PM) */
+/* 0x03 */ x86emuOp2_illegal_op, /* lsl (ring 0 PM) */
+/* 0x04 */ x86emuOp2_illegal_op,
+/* 0x05 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
+/* 0x06 */ x86emuOp2_illegal_op, /* clts (ring 0 PM) */
+/* 0x07 */ x86emuOp2_illegal_op, /* loadall (undocumented) */
+/* 0x08 */ x86emuOp2_illegal_op, /* invd (ring 0 PM) */
+/* 0x09 */ x86emuOp2_illegal_op, /* wbinvd (ring 0 PM) */
+/* 0x0a */ x86emuOp2_illegal_op,
+/* 0x0b */ x86emuOp2_illegal_op,
+/* 0x0c */ x86emuOp2_illegal_op,
+/* 0x0d */ x86emuOp2_illegal_op,
+/* 0x0e */ x86emuOp2_illegal_op,
+/* 0x0f */ x86emuOp2_illegal_op,
+
+/* 0x10 */ x86emuOp2_illegal_op,
+/* 0x11 */ x86emuOp2_illegal_op,
+/* 0x12 */ x86emuOp2_illegal_op,
+/* 0x13 */ x86emuOp2_illegal_op,
+/* 0x14 */ x86emuOp2_illegal_op,
+/* 0x15 */ x86emuOp2_illegal_op,
+/* 0x16 */ x86emuOp2_illegal_op,
+/* 0x17 */ x86emuOp2_illegal_op,
+/* 0x18 */ x86emuOp2_illegal_op,
+/* 0x19 */ x86emuOp2_illegal_op,
+/* 0x1a */ x86emuOp2_illegal_op,
+/* 0x1b */ x86emuOp2_illegal_op,
+/* 0x1c */ x86emuOp2_illegal_op,
+/* 0x1d */ x86emuOp2_illegal_op,
+/* 0x1e */ x86emuOp2_illegal_op,
+/* 0x1f */ x86emuOp2_illegal_op,
+
+/* 0x20 */ x86emuOp2_illegal_op, /* mov reg32,creg (ring 0 PM) */
+/* 0x21 */ x86emuOp2_illegal_op, /* mov reg32,dreg (ring 0 PM) */
+/* 0x22 */ x86emuOp2_illegal_op, /* mov creg,reg32 (ring 0 PM) */
+/* 0x23 */ x86emuOp2_illegal_op, /* mov dreg,reg32 (ring 0 PM) */
+/* 0x24 */ x86emuOp2_illegal_op, /* mov reg32,treg (ring 0 PM) */
+/* 0x25 */ x86emuOp2_illegal_op,
+/* 0x26 */ x86emuOp2_illegal_op, /* mov treg,reg32 (ring 0 PM) */
+/* 0x27 */ x86emuOp2_illegal_op,
+/* 0x28 */ x86emuOp2_illegal_op,
+/* 0x29 */ x86emuOp2_illegal_op,
+/* 0x2a */ x86emuOp2_illegal_op,
+/* 0x2b */ x86emuOp2_illegal_op,
+/* 0x2c */ x86emuOp2_illegal_op,
+/* 0x2d */ x86emuOp2_illegal_op,
+/* 0x2e */ x86emuOp2_illegal_op,
+/* 0x2f */ x86emuOp2_illegal_op,
+
+/* 0x30 */ x86emuOp2_illegal_op,
+/* 0x31 */ x86emuOp2_illegal_op,
+/* 0x32 */ x86emuOp2_illegal_op,
+/* 0x33 */ x86emuOp2_illegal_op,
+/* 0x34 */ x86emuOp2_illegal_op,
+/* 0x35 */ x86emuOp2_illegal_op,
+/* 0x36 */ x86emuOp2_illegal_op,
+/* 0x37 */ x86emuOp2_illegal_op,
+/* 0x38 */ x86emuOp2_illegal_op,
+/* 0x39 */ x86emuOp2_illegal_op,
+/* 0x3a */ x86emuOp2_illegal_op,
+/* 0x3b */ x86emuOp2_illegal_op,
+/* 0x3c */ x86emuOp2_illegal_op,
+/* 0x3d */ x86emuOp2_illegal_op,
+/* 0x3e */ x86emuOp2_illegal_op,
+/* 0x3f */ x86emuOp2_illegal_op,
+
+/* 0x40 */ x86emuOp2_illegal_op,
+/* 0x41 */ x86emuOp2_illegal_op,
+/* 0x42 */ x86emuOp2_illegal_op,
+/* 0x43 */ x86emuOp2_illegal_op,
+/* 0x44 */ x86emuOp2_illegal_op,
+/* 0x45 */ x86emuOp2_illegal_op,
+/* 0x46 */ x86emuOp2_illegal_op,
+/* 0x47 */ x86emuOp2_illegal_op,
+/* 0x48 */ x86emuOp2_illegal_op,
+/* 0x49 */ x86emuOp2_illegal_op,
+/* 0x4a */ x86emuOp2_illegal_op,
+/* 0x4b */ x86emuOp2_illegal_op,
+/* 0x4c */ x86emuOp2_illegal_op,
+/* 0x4d */ x86emuOp2_illegal_op,
+/* 0x4e */ x86emuOp2_illegal_op,
+/* 0x4f */ x86emuOp2_illegal_op,
+
+/* 0x50 */ x86emuOp2_illegal_op,
+/* 0x51 */ x86emuOp2_illegal_op,
+/* 0x52 */ x86emuOp2_illegal_op,
+/* 0x53 */ x86emuOp2_illegal_op,
+/* 0x54 */ x86emuOp2_illegal_op,
+/* 0x55 */ x86emuOp2_illegal_op,
+/* 0x56 */ x86emuOp2_illegal_op,
+/* 0x57 */ x86emuOp2_illegal_op,
+/* 0x58 */ x86emuOp2_illegal_op,
+/* 0x59 */ x86emuOp2_illegal_op,
+/* 0x5a */ x86emuOp2_illegal_op,
+/* 0x5b */ x86emuOp2_illegal_op,
+/* 0x5c */ x86emuOp2_illegal_op,
+/* 0x5d */ x86emuOp2_illegal_op,
+/* 0x5e */ x86emuOp2_illegal_op,
+/* 0x5f */ x86emuOp2_illegal_op,
+
+/* 0x60 */ x86emuOp2_illegal_op,
+/* 0x61 */ x86emuOp2_illegal_op,
+/* 0x62 */ x86emuOp2_illegal_op,
+/* 0x63 */ x86emuOp2_illegal_op,
+/* 0x64 */ x86emuOp2_illegal_op,
+/* 0x65 */ x86emuOp2_illegal_op,
+/* 0x66 */ x86emuOp2_illegal_op,
+/* 0x67 */ x86emuOp2_illegal_op,
+/* 0x68 */ x86emuOp2_illegal_op,
+/* 0x69 */ x86emuOp2_illegal_op,
+/* 0x6a */ x86emuOp2_illegal_op,
+/* 0x6b */ x86emuOp2_illegal_op,
+/* 0x6c */ x86emuOp2_illegal_op,
+/* 0x6d */ x86emuOp2_illegal_op,
+/* 0x6e */ x86emuOp2_illegal_op,
+/* 0x6f */ x86emuOp2_illegal_op,
+
+/* 0x70 */ x86emuOp2_illegal_op,
+/* 0x71 */ x86emuOp2_illegal_op,
+/* 0x72 */ x86emuOp2_illegal_op,
+/* 0x73 */ x86emuOp2_illegal_op,
+/* 0x74 */ x86emuOp2_illegal_op,
+/* 0x75 */ x86emuOp2_illegal_op,
+/* 0x76 */ x86emuOp2_illegal_op,
+/* 0x77 */ x86emuOp2_illegal_op,
+/* 0x78 */ x86emuOp2_illegal_op,
+/* 0x79 */ x86emuOp2_illegal_op,
+/* 0x7a */ x86emuOp2_illegal_op,
+/* 0x7b */ x86emuOp2_illegal_op,
+/* 0x7c */ x86emuOp2_illegal_op,
+/* 0x7d */ x86emuOp2_illegal_op,
+/* 0x7e */ x86emuOp2_illegal_op,
+/* 0x7f */ x86emuOp2_illegal_op,
+
+/* 0x80 */ x86emuOp2_long_jump,
+/* 0x81 */ x86emuOp2_long_jump,
+/* 0x82 */ x86emuOp2_long_jump,
+/* 0x83 */ x86emuOp2_long_jump,
+/* 0x84 */ x86emuOp2_long_jump,
+/* 0x85 */ x86emuOp2_long_jump,
+/* 0x86 */ x86emuOp2_long_jump,
+/* 0x87 */ x86emuOp2_long_jump,
+/* 0x88 */ x86emuOp2_long_jump,
+/* 0x89 */ x86emuOp2_long_jump,
+/* 0x8a */ x86emuOp2_long_jump,
+/* 0x8b */ x86emuOp2_long_jump,
+/* 0x8c */ x86emuOp2_long_jump,
+/* 0x8d */ x86emuOp2_long_jump,
+/* 0x8e */ x86emuOp2_long_jump,
+/* 0x8f */ x86emuOp2_long_jump,
+
+/* 0x90 */ x86emuOp2_set_byte,
+/* 0x91 */ x86emuOp2_set_byte,
+/* 0x92 */ x86emuOp2_set_byte,
+/* 0x93 */ x86emuOp2_set_byte,
+/* 0x94 */ x86emuOp2_set_byte,
+/* 0x95 */ x86emuOp2_set_byte,
+/* 0x96 */ x86emuOp2_set_byte,
+/* 0x97 */ x86emuOp2_set_byte,
+/* 0x98 */ x86emuOp2_set_byte,
+/* 0x99 */ x86emuOp2_set_byte,
+/* 0x9a */ x86emuOp2_set_byte,
+/* 0x9b */ x86emuOp2_set_byte,
+/* 0x9c */ x86emuOp2_set_byte,
+/* 0x9d */ x86emuOp2_set_byte,
+/* 0x9e */ x86emuOp2_set_byte,
+/* 0x9f */ x86emuOp2_set_byte,
+
+/* 0xa0 */ x86emuOp2_push_FS,
+/* 0xa1 */ x86emuOp2_pop_FS,
+/* 0xa2 */ x86emuOp2_illegal_op,
+/* 0xa3 */ x86emuOp2_bt_R,
+/* 0xa4 */ x86emuOp2_shld_IMM,
+/* 0xa5 */ x86emuOp2_shld_CL,
+/* 0xa6 */ x86emuOp2_illegal_op,
+/* 0xa7 */ x86emuOp2_illegal_op,
+/* 0xa8 */ x86emuOp2_push_GS,
+/* 0xa9 */ x86emuOp2_pop_GS,
+/* 0xaa */ x86emuOp2_illegal_op,
+/* 0xab */ x86emuOp2_bt_R,
+/* 0xac */ x86emuOp2_shrd_IMM,
+/* 0xad */ x86emuOp2_shrd_CL,
+/* 0xae */ x86emuOp2_illegal_op,
+/* 0xaf */ x86emuOp2_imul_R_RM,
+
+/* 0xb0 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
+/* 0xb1 */ x86emuOp2_illegal_op, /* TODO: cmpxchg */
+/* 0xb2 */ x86emuOp2_lss_R_IMM,
+/* 0xb3 */ x86emuOp2_btr_R,
+/* 0xb4 */ x86emuOp2_lfs_R_IMM,
+/* 0xb5 */ x86emuOp2_lgs_R_IMM,
+/* 0xb6 */ x86emuOp2_movzx_byte_R_RM,
+/* 0xb7 */ x86emuOp2_movzx_word_R_RM,
+/* 0xb8 */ x86emuOp2_illegal_op,
+/* 0xb9 */ x86emuOp2_illegal_op,
+/* 0xba */ x86emuOp2_btX_I,
+/* 0xbb */ x86emuOp2_btc_R,
+/* 0xbc */ x86emuOp2_bsf,
+/* 0xbd */ x86emuOp2_bsr,
+/* 0xbe */ x86emuOp2_movsx_byte_R_RM,
+/* 0xbf */ x86emuOp2_movsx_word_R_RM,
+
+/* 0xc0 */ x86emuOp2_illegal_op, /* TODO: xadd */
+/* 0xc1 */ x86emuOp2_illegal_op, /* TODO: xadd */
+/* 0xc2 */ x86emuOp2_illegal_op,
+/* 0xc3 */ x86emuOp2_illegal_op,
+/* 0xc4 */ x86emuOp2_illegal_op,
+/* 0xc5 */ x86emuOp2_illegal_op,
+/* 0xc6 */ x86emuOp2_illegal_op,
+/* 0xc7 */ x86emuOp2_illegal_op,
+/* 0xc8 */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xc9 */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xca */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xcb */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xcc */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xcd */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xce */ x86emuOp2_illegal_op, /* TODO: bswap */
+/* 0xcf */ x86emuOp2_illegal_op, /* TODO: bswap */
+
+/* 0xd0 */ x86emuOp2_illegal_op,
+/* 0xd1 */ x86emuOp2_illegal_op,
+/* 0xd2 */ x86emuOp2_illegal_op,
+/* 0xd3 */ x86emuOp2_illegal_op,
+/* 0xd4 */ x86emuOp2_illegal_op,
+/* 0xd5 */ x86emuOp2_illegal_op,
+/* 0xd6 */ x86emuOp2_illegal_op,
+/* 0xd7 */ x86emuOp2_illegal_op,
+/* 0xd8 */ x86emuOp2_illegal_op,
+/* 0xd9 */ x86emuOp2_illegal_op,
+/* 0xda */ x86emuOp2_illegal_op,
+/* 0xdb */ x86emuOp2_illegal_op,
+/* 0xdc */ x86emuOp2_illegal_op,
+/* 0xdd */ x86emuOp2_illegal_op,
+/* 0xde */ x86emuOp2_illegal_op,
+/* 0xdf */ x86emuOp2_illegal_op,
+
+/* 0xe0 */ x86emuOp2_illegal_op,
+/* 0xe1 */ x86emuOp2_illegal_op,
+/* 0xe2 */ x86emuOp2_illegal_op,
+/* 0xe3 */ x86emuOp2_illegal_op,
+/* 0xe4 */ x86emuOp2_illegal_op,
+/* 0xe5 */ x86emuOp2_illegal_op,
+/* 0xe6 */ x86emuOp2_illegal_op,
+/* 0xe7 */ x86emuOp2_illegal_op,
+/* 0xe8 */ x86emuOp2_illegal_op,
+/* 0xe9 */ x86emuOp2_illegal_op,
+/* 0xea */ x86emuOp2_illegal_op,
+/* 0xeb */ x86emuOp2_illegal_op,
+/* 0xec */ x86emuOp2_illegal_op,
+/* 0xed */ x86emuOp2_illegal_op,
+/* 0xee */ x86emuOp2_illegal_op,
+/* 0xef */ x86emuOp2_illegal_op,
+
+/* 0xf0 */ x86emuOp2_illegal_op,
+/* 0xf1 */ x86emuOp2_illegal_op,
+/* 0xf2 */ x86emuOp2_illegal_op,
+/* 0xf3 */ x86emuOp2_illegal_op,
+/* 0xf4 */ x86emuOp2_illegal_op,
+/* 0xf5 */ x86emuOp2_illegal_op,
+/* 0xf6 */ x86emuOp2_illegal_op,
+/* 0xf7 */ x86emuOp2_illegal_op,
+/* 0xf8 */ x86emuOp2_illegal_op,
+/* 0xf9 */ x86emuOp2_illegal_op,
+/* 0xfa */ x86emuOp2_illegal_op,
+/* 0xfb */ x86emuOp2_illegal_op,
+/* 0xfc */ x86emuOp2_illegal_op,
+/* 0xfd */ x86emuOp2_illegal_op,
+/* 0xfe */ x86emuOp2_illegal_op,
+/* 0xff */ x86emuOp2_illegal_op,
+};
+
+#endif
diff --git a/drivers/bios_emulator/x86emu/prim_ops.c b/drivers/bios_emulator/x86emu/prim_ops.c
new file mode 100644
index 0000000..2a254a4
--- /dev/null
+++ b/drivers/bios_emulator/x86emu/prim_ops.c
@@ -0,0 +1,2452 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file contains the code to implement the primitive
+* machine operations used by the emulation code in ops.c
+*
+* Carry Chain Calculation
+*
+* This represents a somewhat expensive calculation which is
+* apparently required to emulate the setting of the OF343364 and AF flag.
+* The latter is not so important, but the former is. The overflow
+* flag is the XOR of the top two bits of the carry chain for an
+* addition (similar for subtraction). Since we do not want to
+* simulate the addition in a bitwise manner, we try to calculate the
+* carry chain given the two operands and the result.
+*
+* So, given the following table, which represents the addition of two
+* bits, we can derive a formula for the carry chain.
+*
+* a b cin r cout
+* 0 0 0 0 0
+* 0 0 1 1 0
+* 0 1 0 1 0
+* 0 1 1 0 1
+* 1 0 0 1 0
+* 1 0 1 0 1
+* 1 1 0 0 1
+* 1 1 1 1 1
+*
+* Construction of table for cout:
+*
+* ab
+* r \ 00 01 11 10
+* |------------------
+* 0 | 0 1 1 1
+* 1 | 0 0 1 0
+*
+* By inspection, one gets: cc = ab + r'(a + b)
+*
+* That represents alot of operations, but NO CHOICE....
+*
+* Borrow Chain Calculation.
+*
+* The following table represents the subtraction of two bits, from
+* which we can derive a formula for the borrow chain.
+*
+* a b bin r bout
+* 0 0 0 0 0
+* 0 0 1 1 1
+* 0 1 0 1 1
+* 0 1 1 0 1
+* 1 0 0 1 0
+* 1 0 1 0 0
+* 1 1 0 0 0
+* 1 1 1 1 1
+*
+* Construction of table for cout:
+*
+* ab
+* r \ 00 01 11 10
+* |------------------
+* 0 | 0 1 0 0
+* 1 | 1 1 1 0
+*
+* By inspection, one gets: bc = a'b + r(a' + b)
+*
+****************************************************************************/
+
+#include <common.h>
+
+#define PRIM_OPS_NO_REDEFINE_ASM
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "x86emu/x86emui.h"
+
+/*------------------------- Global Variables ------------------------------*/
+
+static u32 x86emu_parity_tab[8] =
+{
+ 0x96696996,
+ 0x69969669,
+ 0x69969669,
+ 0x96696996,
+ 0x69969669,
+ 0x96696996,
+ 0x96696996,
+ 0x69969669,
+};
+
+#define PARITY(x) (((x86emu_parity_tab[(x) / 32] >> ((x) % 32)) & 1) == 0)
+#define XOR2(x) (((x) ^ ((x)>>1)) & 0x1)
+/*----------------------------- Implementation ----------------------------*/
+int abs(int v)
+{
+ return (v>0)?v:-v;
+}
+
+/*----------------------------- Implementation ----------------------------*/
+
+
+/*--------- Side effects helper functions -------*/
+
+/****************************************************************************
+REMARKS:
+implements side efects for byte operations that don't overflow
+****************************************************************************/
+
+static void set_parity_flag(u32 res)
+{
+ CONDITIONAL_SET_FLAG(PARITY(res & 0xFF), F_PF);
+}
+
+static void set_szp_flags_8(u8 res)
+{
+ CONDITIONAL_SET_FLAG(res & 0x80, F_SF);
+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
+ set_parity_flag(res);
+}
+
+static void set_szp_flags_16(u16 res)
+{
+ CONDITIONAL_SET_FLAG(res & 0x8000, F_SF);
+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
+ set_parity_flag(res);
+}
+
+static void set_szp_flags_32(u32 res)
+{
+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF);
+ CONDITIONAL_SET_FLAG(res == 0, F_ZF);
+ set_parity_flag(res);
+}
+
+static void no_carry_byte_side_eff(u8 res)
+{
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ set_szp_flags_8(res);
+}
+
+static void no_carry_word_side_eff(u16 res)
+{
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ set_szp_flags_16(res);
+}
+
+static void no_carry_long_side_eff(u32 res)
+{
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ set_szp_flags_32(res);
+}
+
+static void calc_carry_chain(int bits, u32 d, u32 s, u32 res, int set_carry)
+{
+ u32 cc;
+
+ cc = (s & d) | ((~res) & (s | d));
+ CONDITIONAL_SET_FLAG(XOR2(cc >> (bits - 2)), F_OF);
+ CONDITIONAL_SET_FLAG(cc & 0x8, F_AF);
+ if (set_carry) {
+ CONDITIONAL_SET_FLAG(res & (1 << bits), F_CF);
+ }
+}
+
+static void calc_borrow_chain(int bits, u32 d, u32 s, u32 res, int set_carry)
+{
+ u32 bc;
+
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> (bits - 2)), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ if (set_carry) {
+ CONDITIONAL_SET_FLAG(bc & (1 << (bits - 1)), F_CF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAA instruction and side effects.
+****************************************************************************/
+u16 aaa_word(u16 d)
+{
+ u16 res;
+ if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
+ d += 0x6;
+ d += 0x100;
+ SET_FLAG(F_AF);
+ SET_FLAG(F_CF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ }
+ res = (u16)(d & 0xFF0F);
+ set_szp_flags_16(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAA instruction and side effects.
+****************************************************************************/
+u16 aas_word(u16 d)
+{
+ u16 res;
+ if ((d & 0xf) > 0x9 || ACCESS_FLAG(F_AF)) {
+ d -= 0x6;
+ d -= 0x100;
+ SET_FLAG(F_AF);
+ SET_FLAG(F_CF);
+ } else {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ }
+ res = (u16)(d & 0xFF0F);
+ set_szp_flags_16(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAD instruction and side effects.
+****************************************************************************/
+u16 aad_word(u16 d)
+{
+ u16 l;
+ u8 hb, lb;
+
+ hb = (u8)((d >> 8) & 0xff);
+ lb = (u8)((d & 0xff));
+ l = (u16)((lb + 10 * hb) & 0xFF);
+
+ no_carry_byte_side_eff(l & 0xFF);
+ return l;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AAM instruction and side effects.
+****************************************************************************/
+u16 aam_word(u8 d)
+{
+ u16 h, l;
+
+ h = (u16)(d / 10);
+ l = (u16)(d % 10);
+ l |= (u16)(h << 8);
+
+ no_carry_byte_side_eff(l & 0xFF);
+ return l;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADC instruction and side effects.
+****************************************************************************/
+u8 adc_byte(u8 d, u8 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + s;
+ if (ACCESS_FLAG(F_CF)) res++;
+
+ set_szp_flags_8(res);
+ calc_carry_chain(8,s,d,res,1);
+
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADC instruction and side effects.
+****************************************************************************/
+u16 adc_word(u16 d, u16 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + s;
+ if (ACCESS_FLAG(F_CF))
+ res++;
+
+ set_szp_flags_16((u16)res);
+ calc_carry_chain(16,s,d,res,1);
+
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADC instruction and side effects.
+****************************************************************************/
+u32 adc_long(u32 d, u32 s)
+{
+ u32 lo; /* all operands in native machine order */
+ u32 hi;
+ u32 res;
+
+ lo = (d & 0xFFFF) + (s & 0xFFFF);
+ res = d + s;
+
+ if (ACCESS_FLAG(F_CF)) {
+ lo++;
+ res++;
+ }
+
+ hi = (lo >> 16) + (d >> 16) + (s >> 16);
+
+ set_szp_flags_32(res);
+ calc_carry_chain(32,s,d,res,0);
+
+ CONDITIONAL_SET_FLAG(hi & 0x10000, F_CF);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADD instruction and side effects.
+****************************************************************************/
+u8 add_byte(u8 d, u8 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + s;
+ set_szp_flags_8((u8)res);
+ calc_carry_chain(8,s,d,res,1);
+
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADD instruction and side effects.
+****************************************************************************/
+u16 add_word(u16 d, u16 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + s;
+ set_szp_flags_16((u16)res);
+ calc_carry_chain(16,s,d,res,1);
+
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ADD instruction and side effects.
+****************************************************************************/
+u32 add_long(u32 d, u32 s)
+{
+ u32 res;
+
+ res = d + s;
+ set_szp_flags_32(res);
+ calc_carry_chain(32,s,d,res,0);
+
+ CONDITIONAL_SET_FLAG(res < d || res < s, F_CF);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AND instruction and side effects.
+****************************************************************************/
+u8 and_byte(u8 d, u8 s)
+{
+ u8 res; /* all operands in native machine order */
+
+ res = d & s;
+
+ no_carry_byte_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AND instruction and side effects.
+****************************************************************************/
+u16 and_word(u16 d, u16 s)
+{
+ u16 res; /* all operands in native machine order */
+
+ res = d & s;
+
+ no_carry_word_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the AND instruction and side effects.
+****************************************************************************/
+u32 and_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d & s;
+ no_carry_long_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the CMP instruction and side effects.
+****************************************************************************/
+u8 cmp_byte(u8 d, u8 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d - s;
+ set_szp_flags_8((u8)res);
+ calc_borrow_chain(8, d, s, res, 1);
+
+ return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the CMP instruction and side effects.
+****************************************************************************/
+u16 cmp_word(u16 d, u16 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d - s;
+ set_szp_flags_16((u16)res);
+ calc_borrow_chain(16, d, s, res, 1);
+
+ return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the CMP instruction and side effects.
+****************************************************************************/
+u32 cmp_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d - s;
+ set_szp_flags_32(res);
+ calc_borrow_chain(32, d, s, res, 1);
+
+ return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DAA instruction and side effects.
+****************************************************************************/
+u8 daa_byte(u8 d)
+{
+ u32 res = d;
+ if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
+ res += 6;
+ SET_FLAG(F_AF);
+ }
+ if (res > 0x9F || ACCESS_FLAG(F_CF)) {
+ res += 0x60;
+ SET_FLAG(F_CF);
+ }
+ set_szp_flags_8((u8)res);
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DAS instruction and side effects.
+****************************************************************************/
+u8 das_byte(u8 d)
+{
+ if ((d & 0xf) > 9 || ACCESS_FLAG(F_AF)) {
+ d -= 6;
+ SET_FLAG(F_AF);
+ }
+ if (d > 0x9F || ACCESS_FLAG(F_CF)) {
+ d -= 0x60;
+ SET_FLAG(F_CF);
+ }
+ set_szp_flags_8(d);
+ return d;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DEC instruction and side effects.
+****************************************************************************/
+u8 dec_byte(u8 d)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d - 1;
+ set_szp_flags_8((u8)res);
+ calc_borrow_chain(8, d, 1, res, 0);
+
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DEC instruction and side effects.
+****************************************************************************/
+u16 dec_word(u16 d)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d - 1;
+ set_szp_flags_16((u16)res);
+ calc_borrow_chain(16, d, 1, res, 0);
+
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DEC instruction and side effects.
+****************************************************************************/
+u32 dec_long(u32 d)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d - 1;
+
+ set_szp_flags_32(res);
+ calc_borrow_chain(32, d, 1, res, 0);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the INC instruction and side effects.
+****************************************************************************/
+u8 inc_byte(u8 d)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + 1;
+ set_szp_flags_8((u8)res);
+ calc_carry_chain(8, d, 1, res, 0);
+
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the INC instruction and side effects.
+****************************************************************************/
+u16 inc_word(u16 d)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + 1;
+ set_szp_flags_16((u16)res);
+ calc_carry_chain(16, d, 1, res, 0);
+
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the INC instruction and side effects.
+****************************************************************************/
+u32 inc_long(u32 d)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d + 1;
+ set_szp_flags_32(res);
+ calc_carry_chain(32, d, 1, res, 0);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u8 or_byte(u8 d, u8 s)
+{
+ u8 res; /* all operands in native machine order */
+
+ res = d | s;
+ no_carry_byte_side_eff(res);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u16 or_word(u16 d, u16 s)
+{
+ u16 res; /* all operands in native machine order */
+
+ res = d | s;
+ no_carry_word_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u32 or_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d | s;
+ no_carry_long_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u8 neg_byte(u8 s)
+{
+ u8 res;
+
+ CONDITIONAL_SET_FLAG(s != 0, F_CF);
+ res = (u8)-s;
+ set_szp_flags_8(res);
+ calc_borrow_chain(8, 0, s, res, 0);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u16 neg_word(u16 s)
+{
+ u16 res;
+
+ CONDITIONAL_SET_FLAG(s != 0, F_CF);
+ res = (u16)-s;
+ set_szp_flags_16((u16)res);
+ calc_borrow_chain(16, 0, s, res, 0);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OR instruction and side effects.
+****************************************************************************/
+u32 neg_long(u32 s)
+{
+ u32 res;
+
+ CONDITIONAL_SET_FLAG(s != 0, F_CF);
+ res = (u32)-s;
+ set_szp_flags_32(res);
+ calc_borrow_chain(32, 0, s, res, 0);
+
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the NOT instruction and side effects.
+****************************************************************************/
+u8 not_byte(u8 s)
+{
+ return ~s;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the NOT instruction and side effects.
+****************************************************************************/
+u16 not_word(u16 s)
+{
+ return ~s;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the NOT instruction and side effects.
+****************************************************************************/
+u32 not_long(u32 s)
+{
+ return ~s;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCL instruction and side effects.
+****************************************************************************/
+u8 rcl_byte(u8 d, u8 s)
+{
+ unsigned int res, cnt, mask, cf;
+
+ /* s is the rotate distance. It varies from 0 - 8. */
+ /* have
+
+ CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
+
+ want to rotate through the carry by "s" bits. We could
+ loop, but that's inefficient. So the width is 9,
+ and we split into three parts:
+
+ The new carry flag (was B_n)
+ the stuff in B_n-1 .. B_0
+ the stuff in B_7 .. B_n+1
+
+ The new rotate is done mod 9, and given this,
+ for a rotation of n bits (mod 9) the new carry flag is
+ then located n bits from the MSB. The low part is
+ then shifted up cnt bits, and the high part is or'd
+ in. Using CAPS for new values, and lowercase for the
+ original values, this can be expressed as:
+
+ IF n > 0
+ 1) CF <- b_(8-n)
+ 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0
+ 3) B_(n-1) <- cf
+ 4) B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1))
+ */
+ res = d;
+ if ((cnt = s % 9) != 0) {
+ /* extract the new CARRY FLAG. */
+ /* CF <- b_(8-n) */
+ cf = (d >> (8 - cnt)) & 0x1;
+
+ /* get the low stuff which rotated
+ into the range B_7 .. B_cnt */
+ /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */
+ /* note that the right hand side done by the mask */
+ res = (d << cnt) & 0xff;
+
+ /* now the high stuff which rotated around
+ into the positions B_cnt-2 .. B_0 */
+ /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */
+ /* shift it downward, 7-(n-2) = 9-n positions.
+ and mask off the result before or'ing in.
+ */
+ mask = (1 << (cnt - 1)) - 1;
+ res |= (d >> (9 - cnt)) & mask;
+
+ /* if the carry flag was set, or it in. */
+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
+ /* B_(n-1) <- cf */
+ res |= 1 << (cnt - 1);
+ }
+ /* set the new carry flag, based on the variable "cf" */
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ /* OVERFLOW is set *IFF* cnt==1, then it is the
+ xor of CF and the most significant bit. Blecck. */
+ /* parenthesized this expression since it appears to
+ be causing OF to be misset */
+ CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)),
+ F_OF);
+
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCL instruction and side effects.
+****************************************************************************/
+u16 rcl_word(u16 d, u8 s)
+{
+ unsigned int res, cnt, mask, cf;
+
+ res = d;
+ if ((cnt = s % 17) != 0) {
+ cf = (d >> (16 - cnt)) & 0x1;
+ res = (d << cnt) & 0xffff;
+ mask = (1 << (cnt - 1)) - 1;
+ res |= (d >> (17 - cnt)) & mask;
+ if (ACCESS_FLAG(F_CF)) {
+ res |= 1 << (cnt - 1);
+ }
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 14) & 0x2)),
+ F_OF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCL instruction and side effects.
+****************************************************************************/
+u32 rcl_long(u32 d, u8 s)
+{
+ u32 res, cnt, mask, cf;
+
+ res = d;
+ if ((cnt = s % 33) != 0) {
+ cf = (d >> (32 - cnt)) & 0x1;
+ res = (d << cnt) & 0xffffffff;
+ mask = (1 << (cnt - 1)) - 1;
+ res |= (d >> (33 - cnt)) & mask;
+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
+ res |= 1 << (cnt - 1);
+ }
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 30) & 0x2)),
+ F_OF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCR instruction and side effects.
+****************************************************************************/
+u8 rcr_byte(u8 d, u8 s)
+{
+ u32 res, cnt;
+ u32 mask, cf, ocf = 0;
+
+ /* rotate right through carry */
+ /*
+ s is the rotate distance. It varies from 0 - 8.
+ d is the byte object rotated.
+
+ have
+
+ CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0
+
+ The new rotate is done mod 9, and given this,
+ for a rotation of n bits (mod 9) the new carry flag is
+ then located n bits from the LSB. The low part is
+ then shifted up cnt bits, and the high part is or'd
+ in. Using CAPS for new values, and lowercase for the
+ original values, this can be expressed as:
+
+ IF n > 0
+ 1) CF <- b_(n-1)
+ 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
+ 3) B_(8-n) <- cf
+ 4) B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0)
+ */
+ res = d;
+ if ((cnt = s % 9) != 0) {
+ /* extract the new CARRY FLAG. */
+ /* CF <- b_(n-1) */
+ if (cnt == 1) {
+ cf = d & 0x1;
+ /* note hackery here. Access_flag(..) evaluates to either
+ 0 if flag not set
+ non-zero if flag is set.
+ doing access_flag(..) != 0 casts that into either
+ 0..1 in any representation of the flags register
+ (i.e. packed bit array or unpacked.)
+ */
+ ocf = ACCESS_FLAG(F_CF) != 0;
+ } else
+ cf = (d >> (cnt - 1)) & 0x1;
+
+ /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */
+ /* note that the right hand side done by the mask
+ This is effectively done by shifting the
+ object to the right. The result must be masked,
+ in case the object came in and was treated
+ as a negative number. Needed??? */
+
+ mask = (1 << (8 - cnt)) - 1;
+ res = (d >> cnt) & mask;
+
+ /* now the high stuff which rotated around
+ into the positions B_cnt-2 .. B_0 */
+ /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */
+ /* shift it downward, 7-(n-2) = 9-n positions.
+ and mask off the result before or'ing in.
+ */
+ res |= (d << (9 - cnt));
+
+ /* if the carry flag was set, or it in. */
+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
+ /* B_(8-n) <- cf */
+ res |= 1 << (8 - cnt);
+ }
+ /* set the new carry flag, based on the variable "cf" */
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ /* OVERFLOW is set *IFF* cnt==1, then it is the
+ xor of CF and the most significant bit. Blecck. */
+ /* parenthesized... */
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)),
+ F_OF);
+ }
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCR instruction and side effects.
+****************************************************************************/
+u16 rcr_word(u16 d, u8 s)
+{
+ u32 res, cnt;
+ u32 mask, cf, ocf = 0;
+
+ /* rotate right through carry */
+ res = d;
+ if ((cnt = s % 17) != 0) {
+ if (cnt == 1) {
+ cf = d & 0x1;
+ ocf = ACCESS_FLAG(F_CF) != 0;
+ } else
+ cf = (d >> (cnt - 1)) & 0x1;
+ mask = (1 << (16 - cnt)) - 1;
+ res = (d >> cnt) & mask;
+ res |= (d << (17 - cnt));
+ if (ACCESS_FLAG(F_CF)) {
+ res |= 1 << (16 - cnt);
+ }
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 14) & 0x2)),
+ F_OF);
+ }
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the RCR instruction and side effects.
+****************************************************************************/
+u32 rcr_long(u32 d, u8 s)
+{
+ u32 res, cnt;
+ u32 mask, cf, ocf = 0;
+
+ /* rotate right through carry */
+ res = d;
+ if ((cnt = s % 33) != 0) {
+ if (cnt == 1) {
+ cf = d & 0x1;
+ ocf = ACCESS_FLAG(F_CF) != 0;
+ } else
+ cf = (d >> (cnt - 1)) & 0x1;
+ mask = (1 << (32 - cnt)) - 1;
+ res = (d >> cnt) & mask;
+ if (cnt != 1)
+ res |= (d << (33 - cnt));
+ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */
+ res |= 1 << (32 - cnt);
+ }
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 30) & 0x2)),
+ F_OF);
+ }
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROL instruction and side effects.
+****************************************************************************/
+u8 rol_byte(u8 d, u8 s)
+{
+ unsigned int res, cnt, mask;
+
+ /* rotate left */
+ /*
+ s is the rotate distance. It varies from 0 - 8.
+ d is the byte object rotated.
+
+ have
+
+ CF B_7 ... B_0
+
+ The new rotate is done mod 8.
+ Much simpler than the "rcl" or "rcr" operations.
+
+ IF n > 0
+ 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0)
+ 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n)
+ */
+ res = d;
+ if ((cnt = s % 8) != 0) {
+ /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) */
+ res = (d << cnt);
+
+ /* B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */
+ mask = (1 << cnt) - 1;
+ res |= (d >> (8 - cnt)) & mask;
+
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+ /* OVERFLOW is set *IFF* s==1, then it is the
+ xor of CF and the most significant bit. Blecck. */
+ CONDITIONAL_SET_FLAG(s == 1 &&
+ XOR2((res & 0x1) + ((res >> 6) & 0x2)),
+ F_OF);
+ } if (s != 0) {
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROL instruction and side effects.
+****************************************************************************/
+u16 rol_word(u16 d, u8 s)
+{
+ unsigned int res, cnt, mask;
+
+ res = d;
+ if ((cnt = s % 16) != 0) {
+ res = (d << cnt);
+ mask = (1 << cnt) - 1;
+ res |= (d >> (16 - cnt)) & mask;
+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+ CONDITIONAL_SET_FLAG(s == 1 &&
+ XOR2((res & 0x1) + ((res >> 14) & 0x2)),
+ F_OF);
+ } if (s != 0) {
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROL instruction and side effects.
+****************************************************************************/
+u32 rol_long(u32 d, u8 s)
+{
+ u32 res, cnt, mask;
+
+ res = d;
+ if ((cnt = s % 32) != 0) {
+ res = (d << cnt);
+ mask = (1 << cnt) - 1;
+ res |= (d >> (32 - cnt)) & mask;
+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+ CONDITIONAL_SET_FLAG(s == 1 &&
+ XOR2((res & 0x1) + ((res >> 30) & 0x2)),
+ F_OF);
+ } if (s != 0) {
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x1, F_CF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROR instruction and side effects.
+****************************************************************************/
+u8 ror_byte(u8 d, u8 s)
+{
+ unsigned int res, cnt, mask;
+
+ /* rotate right */
+ /*
+ s is the rotate distance. It varies from 0 - 8.
+ d is the byte object rotated.
+
+ have
+
+ B_7 ... B_0
+
+ The rotate is done mod 8.
+
+ IF n > 0
+ 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n)
+ 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0)
+ */
+ res = d;
+ if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */
+ /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */
+ res = (d << (8 - cnt));
+
+ /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */
+ mask = (1 << (8 - cnt)) - 1;
+ res |= (d >> (cnt)) & mask;
+
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
+ /* OVERFLOW is set *IFF* s==1, then it is the
+ xor of the two most significant bits. Blecck. */
+ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF);
+ } else if (s != 0) {
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x80, F_CF);
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROR instruction and side effects.
+****************************************************************************/
+u16 ror_word(u16 d, u8 s)
+{
+ unsigned int res, cnt, mask;
+
+ res = d;
+ if ((cnt = s % 16) != 0) {
+ res = (d << (16 - cnt));
+ mask = (1 << (16 - cnt)) - 1;
+ res |= (d >> (cnt)) & mask;
+ CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
+ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 14), F_OF);
+ } else if (s != 0) {
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x8000, F_CF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the ROR instruction and side effects.
+****************************************************************************/
+u32 ror_long(u32 d, u8 s)
+{
+ u32 res, cnt, mask;
+
+ res = d;
+ if ((cnt = s % 32) != 0) {
+ res = (d << (32 - cnt));
+ mask = (1 << (32 - cnt)) - 1;
+ res |= (d >> (cnt)) & mask;
+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
+ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 30), F_OF);
+ } else if (s != 0) {
+ /* set the new carry flag, Note that it is the low order
+ bit of the result!!! */
+ CONDITIONAL_SET_FLAG(res & 0x80000000, F_CF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHL instruction and side effects.
+****************************************************************************/
+u8 shl_byte(u8 d, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 8) {
+ cnt = s % 8;
+
+ /* last bit shifted out goes into carry flag */
+ if (cnt > 0) {
+ res = d << cnt;
+ cf = d & (1 << (8 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_8((u8)res);
+ } else {
+ res = (u8) d;
+ }
+
+ if (cnt == 1) {
+ /* Needs simplification. */
+ CONDITIONAL_SET_FLAG(
+ (((res & 0x80) == 0x80) ^
+ (ACCESS_FLAG(F_CF) != 0)),
+ /* was (M.x86.R_FLG&F_CF)==F_CF)), */
+ F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80, F_CF);
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ SET_FLAG(F_ZF);
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHL instruction and side effects.
+****************************************************************************/
+u16 shl_word(u16 d, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 16) {
+ cnt = s % 16;
+ if (cnt > 0) {
+ res = d << cnt;
+ cf = d & (1 << (16 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_16((u16)res);
+ } else {
+ res = (u16) d;
+ }
+
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(
+ (((res & 0x8000) == 0x8000) ^
+ (ACCESS_FLAG(F_CF) != 0)),
+ F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ SET_FLAG(F_ZF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHL instruction and side effects.
+****************************************************************************/
+u32 shl_long(u32 d, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 32) {
+ cnt = s % 32;
+ if (cnt > 0) {
+ res = d << cnt;
+ cf = d & (1 << (32 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_32((u32)res);
+ } else {
+ res = d;
+ }
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ SET_FLAG(F_ZF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHR instruction and side effects.
+****************************************************************************/
+u8 shr_byte(u8 d, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 8) {
+ cnt = s % 8;
+ if (cnt > 0) {
+ cf = d & (1 << (cnt - 1));
+ res = d >> cnt;
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_8((u8)res);
+ } else {
+ res = (u8) d;
+ }
+
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(res >> 6), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CONDITIONAL_SET_FLAG((d >> (s-1)) & 0x1, F_CF);
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ SET_FLAG(F_ZF);
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHR instruction and side effects.
+****************************************************************************/
+u16 shr_word(u16 d, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 16) {
+ cnt = s % 16;
+ if (cnt > 0) {
+ cf = d & (1 << (cnt - 1));
+ res = d >> cnt;
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_16((u16)res);
+ } else {
+ res = d;
+ }
+
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHR instruction and side effects.
+****************************************************************************/
+u32 shr_long(u32 d, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 32) {
+ cnt = s % 32;
+ if (cnt > 0) {
+ cf = d & (1 << (cnt - 1));
+ res = d >> cnt;
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_32((u32)res);
+ } else {
+ res = d;
+ }
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SAR instruction and side effects.
+****************************************************************************/
+u8 sar_byte(u8 d, u8 s)
+{
+ unsigned int cnt, res, cf, mask, sf;
+
+ res = d;
+ sf = d & 0x80;
+ cnt = s % 8;
+ if (cnt > 0 && cnt < 8) {
+ mask = (1 << (8 - cnt)) - 1;
+ cf = d & (1 << (cnt - 1));
+ res = (d >> cnt) & mask;
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ if (sf) {
+ res |= ~mask;
+ }
+ set_szp_flags_8((u8)res);
+ } else if (cnt >= 8) {
+ if (sf) {
+ res = 0xff;
+ SET_FLAG(F_CF);
+ CLEAR_FLAG(F_ZF);
+ SET_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ }
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SAR instruction and side effects.
+****************************************************************************/
+u16 sar_word(u16 d, u8 s)
+{
+ unsigned int cnt, res, cf, mask, sf;
+
+ sf = d & 0x8000;
+ cnt = s % 16;
+ res = d;
+ if (cnt > 0 && cnt < 16) {
+ mask = (1 << (16 - cnt)) - 1;
+ cf = d & (1 << (cnt - 1));
+ res = (d >> cnt) & mask;
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ if (sf) {
+ res |= ~mask;
+ }
+ set_szp_flags_16((u16)res);
+ } else if (cnt >= 16) {
+ if (sf) {
+ res = 0xffff;
+ SET_FLAG(F_CF);
+ CLEAR_FLAG(F_ZF);
+ SET_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SAR instruction and side effects.
+****************************************************************************/
+u32 sar_long(u32 d, u8 s)
+{
+ u32 cnt, res, cf, mask, sf;
+
+ sf = d & 0x80000000;
+ cnt = s % 32;
+ res = d;
+ if (cnt > 0 && cnt < 32) {
+ mask = (1 << (32 - cnt)) - 1;
+ cf = d & (1 << (cnt - 1));
+ res = (d >> cnt) & mask;
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ if (sf) {
+ res |= ~mask;
+ }
+ set_szp_flags_32(res);
+ } else if (cnt >= 32) {
+ if (sf) {
+ res = 0xffffffff;
+ SET_FLAG(F_CF);
+ CLEAR_FLAG(F_ZF);
+ SET_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHLD instruction and side effects.
+****************************************************************************/
+u16 shld_word (u16 d, u16 fill, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 16) {
+ cnt = s % 16;
+ if (cnt > 0) {
+ res = (d << cnt) | (fill >> (16-cnt));
+ cf = d & (1 << (16 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_16((u16)res);
+ } else {
+ res = d;
+ }
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG((((res & 0x8000) == 0x8000) ^
+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF);
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ SET_FLAG(F_ZF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHLD instruction and side effects.
+****************************************************************************/
+u32 shld_long (u32 d, u32 fill, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 32) {
+ cnt = s % 32;
+ if (cnt > 0) {
+ res = (d << cnt) | (fill >> (32-cnt));
+ cf = d & (1 << (32 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_32((u32)res);
+ } else {
+ res = d;
+ }
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG((((res & 0x80000000) == 0x80000000) ^
+ (ACCESS_FLAG(F_CF) != 0)), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CONDITIONAL_SET_FLAG((d << (s-1)) & 0x80000000, F_CF);
+ CLEAR_FLAG(F_OF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_PF);
+ SET_FLAG(F_ZF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHRD instruction and side effects.
+****************************************************************************/
+u16 shrd_word (u16 d, u16 fill, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 16) {
+ cnt = s % 16;
+ if (cnt > 0) {
+ cf = d & (1 << (cnt - 1));
+ res = (d >> cnt) | (fill << (16 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_16((u16)res);
+ } else {
+ res = d;
+ }
+
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SHRD instruction and side effects.
+****************************************************************************/
+u32 shrd_long (u32 d, u32 fill, u8 s)
+{
+ unsigned int cnt, res, cf;
+
+ if (s < 32) {
+ cnt = s % 32;
+ if (cnt > 0) {
+ cf = d & (1 << (cnt - 1));
+ res = (d >> cnt) | (fill << (32 - cnt));
+ CONDITIONAL_SET_FLAG(cf, F_CF);
+ set_szp_flags_32((u32)res);
+ } else {
+ res = d;
+ }
+ if (cnt == 1) {
+ CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF);
+ } else {
+ CLEAR_FLAG(F_OF);
+ }
+ } else {
+ res = 0;
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ SET_FLAG(F_ZF);
+ CLEAR_FLAG(F_SF);
+ CLEAR_FLAG(F_PF);
+ }
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SBB instruction and side effects.
+****************************************************************************/
+u8 sbb_byte(u8 d, u8 s)
+{
+ u32 res; /* all operands in native machine order */
+ u32 bc;
+
+ if (ACCESS_FLAG(F_CF))
+ res = d - s - 1;
+ else
+ res = d - s;
+ set_szp_flags_8((u8)res);
+
+ /* calculate the borrow chain. See note at top */
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SBB instruction and side effects.
+****************************************************************************/
+u16 sbb_word(u16 d, u16 s)
+{
+ u32 res; /* all operands in native machine order */
+ u32 bc;
+
+ if (ACCESS_FLAG(F_CF))
+ res = d - s - 1;
+ else
+ res = d - s;
+ set_szp_flags_16((u16)res);
+
+ /* calculate the borrow chain. See note at top */
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SBB instruction and side effects.
+****************************************************************************/
+u32 sbb_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+ u32 bc;
+
+ if (ACCESS_FLAG(F_CF))
+ res = d - s - 1;
+ else
+ res = d - s;
+
+ set_szp_flags_32(res);
+
+ /* calculate the borrow chain. See note at top */
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SUB instruction and side effects.
+****************************************************************************/
+u8 sub_byte(u8 d, u8 s)
+{
+ u32 res; /* all operands in native machine order */
+ u32 bc;
+
+ res = d - s;
+ set_szp_flags_8((u8)res);
+
+ /* calculate the borrow chain. See note at top */
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(bc & 0x80, F_CF);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> 6), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ return (u8)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SUB instruction and side effects.
+****************************************************************************/
+u16 sub_word(u16 d, u16 s)
+{
+ u32 res; /* all operands in native machine order */
+ u32 bc;
+
+ res = d - s;
+ set_szp_flags_16((u16)res);
+
+ /* calculate the borrow chain. See note at top */
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(bc & 0x8000, F_CF);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> 14), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ return (u16)res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the SUB instruction and side effects.
+****************************************************************************/
+u32 sub_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+ u32 bc;
+
+ res = d - s;
+ set_szp_flags_32(res);
+
+ /* calculate the borrow chain. See note at top */
+ bc = (res & (~d | s)) | (~d & s);
+ CONDITIONAL_SET_FLAG(bc & 0x80000000, F_CF);
+ CONDITIONAL_SET_FLAG(XOR2(bc >> 30), F_OF);
+ CONDITIONAL_SET_FLAG(bc & 0x8, F_AF);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the TEST instruction and side effects.
+****************************************************************************/
+void test_byte(u8 d, u8 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d & s;
+
+ CLEAR_FLAG(F_OF);
+ set_szp_flags_8((u8)res);
+ /* AF == dont care */
+ CLEAR_FLAG(F_CF);
+}
+
+/****************************************************************************
+REMARKS:
+Implements the TEST instruction and side effects.
+****************************************************************************/
+void test_word(u16 d, u16 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d & s;
+
+ CLEAR_FLAG(F_OF);
+ set_szp_flags_16((u16)res);
+ /* AF == dont care */
+ CLEAR_FLAG(F_CF);
+}
+
+/****************************************************************************
+REMARKS:
+Implements the TEST instruction and side effects.
+****************************************************************************/
+void test_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d & s;
+
+ CLEAR_FLAG(F_OF);
+ set_szp_flags_32(res);
+ /* AF == dont care */
+ CLEAR_FLAG(F_CF);
+}
+
+/****************************************************************************
+REMARKS:
+Implements the XOR instruction and side effects.
+****************************************************************************/
+u8 xor_byte(u8 d, u8 s)
+{
+ u8 res; /* all operands in native machine order */
+
+ res = d ^ s;
+ no_carry_byte_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the XOR instruction and side effects.
+****************************************************************************/
+u16 xor_word(u16 d, u16 s)
+{
+ u16 res; /* all operands in native machine order */
+
+ res = d ^ s;
+ no_carry_word_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the XOR instruction and side effects.
+****************************************************************************/
+u32 xor_long(u32 d, u32 s)
+{
+ u32 res; /* all operands in native machine order */
+
+ res = d ^ s;
+ no_carry_long_side_eff(res);
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_byte(u8 s)
+{
+ s16 res = (s16)((s8)M.x86.R_AL * (s8)s);
+
+ M.x86.R_AX = res;
+ if (((M.x86.R_AL & 0x80) == 0 && M.x86.R_AH == 0x00) ||
+ ((M.x86.R_AL & 0x80) != 0 && M.x86.R_AH == 0xFF)) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_word(u16 s)
+{
+ s32 res = (s16)M.x86.R_AX * (s16)s;
+
+ M.x86.R_AX = (u16)res;
+ M.x86.R_DX = (u16)(res >> 16);
+ if (((M.x86.R_AX & 0x8000) == 0 && M.x86.R_DX == 0x0000) ||
+ ((M.x86.R_AX & 0x8000) != 0 && M.x86.R_DX == 0xFFFF)) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_long_direct(u32 *res_lo, u32* res_hi,u32 d, u32 s)
+{
+#ifdef __HAS_LONG_LONG__
+ s64 res = (s32)d * (s32)s;
+
+ *res_lo = (u32)res;
+ *res_hi = (u32)(res >> 32);
+#else
+ u32 d_lo,d_hi,d_sign;
+ u32 s_lo,s_hi,s_sign;
+ u32 rlo_lo,rlo_hi,rhi_lo;
+
+ if ((d_sign = d & 0x80000000) != 0)
+ d = -d;
+ d_lo = d & 0xFFFF;
+ d_hi = d >> 16;
+ if ((s_sign = s & 0x80000000) != 0)
+ s = -s;
+ s_lo = s & 0xFFFF;
+ s_hi = s >> 16;
+ rlo_lo = d_lo * s_lo;
+ rlo_hi = (d_hi * s_lo + d_lo * s_hi) + (rlo_lo >> 16);
+ rhi_lo = d_hi * s_hi + (rlo_hi >> 16);
+ *res_lo = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
+ *res_hi = rhi_lo;
+ if (d_sign != s_sign) {
+ d = ~*res_lo;
+ s = (((d & 0xFFFF) + 1) >> 16) + (d >> 16);
+ *res_lo = ~*res_lo+1;
+ *res_hi = ~*res_hi+(s >> 16);
+ }
+#endif
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IMUL instruction and side effects.
+****************************************************************************/
+void imul_long(u32 s)
+{
+ imul_long_direct(&M.x86.R_EAX,&M.x86.R_EDX,M.x86.R_EAX,s);
+ if (((M.x86.R_EAX & 0x80000000) == 0 && M.x86.R_EDX == 0x00000000) ||
+ ((M.x86.R_EAX & 0x80000000) != 0 && M.x86.R_EDX == 0xFFFFFFFF)) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the MUL instruction and side effects.
+****************************************************************************/
+void mul_byte(u8 s)
+{
+ u16 res = (u16)(M.x86.R_AL * s);
+
+ M.x86.R_AX = res;
+ if (M.x86.R_AH == 0) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the MUL instruction and side effects.
+****************************************************************************/
+void mul_word(u16 s)
+{
+ u32 res = M.x86.R_AX * s;
+
+ M.x86.R_AX = (u16)res;
+ M.x86.R_DX = (u16)(res >> 16);
+ if (M.x86.R_DX == 0) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the MUL instruction and side effects.
+****************************************************************************/
+void mul_long(u32 s)
+{
+#ifdef __HAS_LONG_LONG__
+ u64 res = (u32)M.x86.R_EAX * (u32)s;
+
+ M.x86.R_EAX = (u32)res;
+ M.x86.R_EDX = (u32)(res >> 32);
+#else
+ u32 a,a_lo,a_hi;
+ u32 s_lo,s_hi;
+ u32 rlo_lo,rlo_hi,rhi_lo;
+
+ a = M.x86.R_EAX;
+ a_lo = a & 0xFFFF;
+ a_hi = a >> 16;
+ s_lo = s & 0xFFFF;
+ s_hi = s >> 16;
+ rlo_lo = a_lo * s_lo;
+ rlo_hi = (a_hi * s_lo + a_lo * s_hi) + (rlo_lo >> 16);
+ rhi_lo = a_hi * s_hi + (rlo_hi >> 16);
+ M.x86.R_EAX = (rlo_hi << 16) | (rlo_lo & 0xFFFF);
+ M.x86.R_EDX = rhi_lo;
+#endif
+ if (M.x86.R_EDX == 0) {
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_OF);
+ } else {
+ SET_FLAG(F_CF);
+ SET_FLAG(F_OF);
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IDIV instruction and side effects.
+****************************************************************************/
+void idiv_byte(u8 s)
+{
+ s32 dvd, div, mod;
+
+ dvd = (s16)M.x86.R_AX;
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ div = dvd / (s8)s;
+ mod = dvd % (s8)s;
+ if (abs(div) > 0x7f) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ M.x86.R_AL = (s8) div;
+ M.x86.R_AH = (s8) mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IDIV instruction and side effects.
+****************************************************************************/
+void idiv_word(u16 s)
+{
+ s32 dvd, div, mod;
+
+ dvd = (((s32)M.x86.R_DX) << 16) | M.x86.R_AX;
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ div = dvd / (s16)s;
+ mod = dvd % (s16)s;
+ if (abs(div) > 0x7fff) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_SF);
+ CONDITIONAL_SET_FLAG(div == 0, F_ZF);
+ set_parity_flag(mod);
+
+ M.x86.R_AX = (u16)div;
+ M.x86.R_DX = (u16)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IDIV instruction and side effects.
+****************************************************************************/
+void idiv_long(u32 s)
+{
+#ifdef __HAS_LONG_LONG__
+ s64 dvd, div, mod;
+
+ dvd = (((s64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ div = dvd / (s32)s;
+ mod = dvd % (s32)s;
+ if (abs(div) > 0x7fffffff) {
+ x86emu_intr_raise(0);
+ return;
+ }
+#else
+ s32 div = 0, mod;
+ s32 h_dvd = M.x86.R_EDX;
+ u32 l_dvd = M.x86.R_EAX;
+ u32 abs_s = s & 0x7FFFFFFF;
+ u32 abs_h_dvd = h_dvd & 0x7FFFFFFF;
+ u32 h_s = abs_s >> 1;
+ u32 l_s = abs_s << 31;
+ int counter = 31;
+ int carry;
+
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ do {
+ div <<= 1;
+ carry = (l_dvd >= l_s) ? 0 : 1;
+
+ if (abs_h_dvd < (h_s + carry)) {
+ h_s >>= 1;
+ l_s = abs_s << (--counter);
+ continue;
+ } else {
+ abs_h_dvd -= (h_s + carry);
+ l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
+ : (l_dvd - l_s);
+ h_s >>= 1;
+ l_s = abs_s << (--counter);
+ div |= 1;
+ continue;
+ }
+
+ } while (counter > -1);
+ /* overflow */
+ if (abs_h_dvd || (l_dvd > abs_s)) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ /* sign */
+ div |= ((h_dvd & 0x10000000) ^ (s & 0x10000000));
+ mod = l_dvd;
+
+#endif
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_ZF);
+ set_parity_flag(mod);
+
+ M.x86.R_EAX = (u32)div;
+ M.x86.R_EDX = (u32)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DIV instruction and side effects.
+****************************************************************************/
+void div_byte(u8 s)
+{
+ u32 dvd, div, mod;
+
+ dvd = M.x86.R_AX;
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ div = dvd / (u8)s;
+ mod = dvd % (u8)s;
+ if (abs(div) > 0xff) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ M.x86.R_AL = (u8)div;
+ M.x86.R_AH = (u8)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DIV instruction and side effects.
+****************************************************************************/
+void div_word(u16 s)
+{
+ u32 dvd, div, mod;
+
+ dvd = (((u32)M.x86.R_DX) << 16) | M.x86.R_AX;
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ div = dvd / (u16)s;
+ mod = dvd % (u16)s;
+ if (abs(div) > 0xffff) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_SF);
+ CONDITIONAL_SET_FLAG(div == 0, F_ZF);
+ set_parity_flag(mod);
+
+ M.x86.R_AX = (u16)div;
+ M.x86.R_DX = (u16)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the DIV instruction and side effects.
+****************************************************************************/
+void div_long(u32 s)
+{
+#ifdef __HAS_LONG_LONG__
+ u64 dvd, div, mod;
+
+ dvd = (((u64)M.x86.R_EDX) << 32) | M.x86.R_EAX;
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ div = dvd / (u32)s;
+ mod = dvd % (u32)s;
+ if (abs(div) > 0xffffffff) {
+ x86emu_intr_raise(0);
+ return;
+ }
+#else
+ s32 div = 0, mod;
+ s32 h_dvd = M.x86.R_EDX;
+ u32 l_dvd = M.x86.R_EAX;
+
+ u32 h_s = s;
+ u32 l_s = 0;
+ int counter = 32;
+ int carry;
+
+ if (s == 0) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ do {
+ div <<= 1;
+ carry = (l_dvd >= l_s) ? 0 : 1;
+
+ if (h_dvd < (h_s + carry)) {
+ h_s >>= 1;
+ l_s = s << (--counter);
+ continue;
+ } else {
+ h_dvd -= (h_s + carry);
+ l_dvd = carry ? ((0xFFFFFFFF - l_s) + l_dvd + 1)
+ : (l_dvd - l_s);
+ h_s >>= 1;
+ l_s = s << (--counter);
+ div |= 1;
+ continue;
+ }
+
+ } while (counter > -1);
+ /* overflow */
+ if (h_dvd || (l_dvd > s)) {
+ x86emu_intr_raise(0);
+ return;
+ }
+ mod = l_dvd;
+#endif
+ CLEAR_FLAG(F_CF);
+ CLEAR_FLAG(F_AF);
+ CLEAR_FLAG(F_SF);
+ SET_FLAG(F_ZF);
+ set_parity_flag(mod);
+
+ M.x86.R_EAX = (u32)div;
+ M.x86.R_EDX = (u32)mod;
+}
+
+/****************************************************************************
+REMARKS:
+Implements the IN string instruction and side effects.
+****************************************************************************/
+
+static void single_in(int size)
+{
+ if(size == 1)
+ store_data_byte_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inb)(M.x86.R_DX));
+ else if (size == 2)
+ store_data_word_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inw)(M.x86.R_DX));
+ else
+ store_data_long_abs(M.x86.R_ES, M.x86.R_DI,(*sys_inl)(M.x86.R_DX));
+}
+
+void ins(int size)
+{
+ int inc = size;
+
+ if (ACCESS_FLAG(F_DF)) {
+ inc = -size;
+ }
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* in until CX is ZERO. */
+ u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
+ M.x86.R_ECX : M.x86.R_CX);
+
+ while (count--) {
+ single_in(size);
+ M.x86.R_DI += inc;
+ }
+ M.x86.R_CX = 0;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_ECX = 0;
+ }
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ } else {
+ single_in(size);
+ M.x86.R_DI += inc;
+ }
+}
+
+/****************************************************************************
+REMARKS:
+Implements the OUT string instruction and side effects.
+****************************************************************************/
+
+static void single_out(int size)
+{
+ if(size == 1)
+ (*sys_outb)(M.x86.R_DX,fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI));
+ else if (size == 2)
+ (*sys_outw)(M.x86.R_DX,fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI));
+ else
+ (*sys_outl)(M.x86.R_DX,fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI));
+}
+
+void outs(int size)
+{
+ int inc = size;
+
+ if (ACCESS_FLAG(F_DF)) {
+ inc = -size;
+ }
+ if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) {
+ /* dont care whether REPE or REPNE */
+ /* out until CX is ZERO. */
+ u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ?
+ M.x86.R_ECX : M.x86.R_CX);
+ while (count--) {
+ single_out(size);
+ M.x86.R_SI += inc;
+ }
+ M.x86.R_CX = 0;
+ if (M.x86.mode & SYSMODE_PREFIX_DATA) {
+ M.x86.R_ECX = 0;
+ }
+ M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE);
+ } else {
+ single_out(size);
+ M.x86.R_SI += inc;
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Address to fetch word from
+
+REMARKS:
+Fetches a word from emulator memory using an absolute address.
+****************************************************************************/
+u16 mem_access_word(int addr)
+{
+DB( if (CHECK_MEM_ACCESS())
+ x86emu_check_mem_access(addr);)
+ return (*sys_rdw)(addr);
+}
+
+/****************************************************************************
+REMARKS:
+Pushes a word onto the stack.
+
+NOTE: Do not inline this, as (*sys_wrX) is already inline!
+****************************************************************************/
+void push_word(u16 w)
+{
+DB( if (CHECK_SP_ACCESS())
+ x86emu_check_sp_access();)
+ M.x86.R_SP -= 2;
+ (*sys_wrw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
+}
+
+/****************************************************************************
+REMARKS:
+Pushes a long onto the stack.
+
+NOTE: Do not inline this, as (*sys_wrX) is already inline!
+****************************************************************************/
+void push_long(u32 w)
+{
+DB( if (CHECK_SP_ACCESS())
+ x86emu_check_sp_access();)
+ M.x86.R_SP -= 4;
+ (*sys_wrl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP, w);
+}
+
+/****************************************************************************
+REMARKS:
+Pops a word from the stack.
+
+NOTE: Do not inline this, as (*sys_rdX) is already inline!
+****************************************************************************/
+u16 pop_word(void)
+{
+ u16 res;
+
+DB( if (CHECK_SP_ACCESS())
+ x86emu_check_sp_access();)
+ res = (*sys_rdw)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
+ M.x86.R_SP += 2;
+ return res;
+}
+
+/****************************************************************************
+REMARKS:
+Pops a long from the stack.
+
+NOTE: Do not inline this, as (*sys_rdX) is already inline!
+****************************************************************************/
+u32 pop_long(void)
+{
+ u32 res;
+
+DB( if (CHECK_SP_ACCESS())
+ x86emu_check_sp_access();)
+ res = (*sys_rdl)(((u32)M.x86.R_SS << 4) + M.x86.R_SP);
+ M.x86.R_SP += 4;
+ return res;
+}
+
+#endif
diff --git a/drivers/bios_emulator/x86emu/sys.c b/drivers/bios_emulator/x86emu/sys.c
new file mode 100644
index 0000000..dd44ff1
--- /dev/null
+++ b/drivers/bios_emulator/x86emu/sys.c
@@ -0,0 +1,328 @@
+/****************************************************************************
+*
+* Realmode X86 Emulator Library
+*
+* Copyright (C) 1991-2004 SciTech Software, Inc.
+* Copyright (C) David Mosberger-Tang
+* Copyright (C) 1999 Egbert Eich
+*
+* ========================================================================
+*
+* Permission to use, copy, modify, distribute, and sell this software and
+* its documentation for any purpose is hereby granted without fee,
+* provided that the above copyright notice appear in all copies and that
+* both that copyright notice and this permission notice appear in
+* supporting documentation, and that the name of the authors not be used
+* in advertising or publicity pertaining to distribution of the software
+* without specific, written prior permission. The authors makes no
+* representations about the suitability of this software for any purpose.
+* It is provided "as is" without express or implied warranty.
+*
+* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
+* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
+* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
+* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
+* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+* PERFORMANCE OF THIS SOFTWARE.
+*
+* ========================================================================
+*
+* Language: ANSI C
+* Environment: Any
+* Developer: Kendall Bennett
+*
+* Description: This file includes subroutines which are related to
+* programmed I/O and memory access. Included in this module
+* are default functions that do nothing. For real uses these
+* functions will have to be overriden by the user library.
+*
+****************************************************************************/
+
+#include <common.h>
+
+#if defined(CONFIG_BIOSEMU)
+
+#include "x86emu/x86emui.h"
+
+/*------------------------- Global Variables ------------------------------*/
+
+X86EMU_sysEnv _X86EMU_env; /* Global emulator machine state */
+X86EMU_intrFuncs _X86EMU_intrTab[256];
+
+int debug_intr;
+
+/*----------------------------- Implementation ----------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+
+RETURNS:
+Byte value read from emulator memory.
+
+REMARKS:
+Reads a byte value from the emulator memory.
+****************************************************************************/
+u8 X86API rdb(u32 addr)
+{
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+
+RETURNS:
+Word value read from emulator memory.
+
+REMARKS:
+Reads a word value from the emulator memory.
+****************************************************************************/
+u16 X86API rdw(u32 addr)
+{
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+
+RETURNS:
+Long value read from emulator memory.
+REMARKS:
+Reads a long value from the emulator memory.
+****************************************************************************/
+u32 X86API rdl(u32 addr)
+{
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+val - Value to store
+
+REMARKS:
+Writes a byte value to emulator memory.
+****************************************************************************/
+void X86API wrb(u32 addr, u8 val)
+{
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+val - Value to store
+
+REMARKS:
+Writes a word value to emulator memory.
+****************************************************************************/
+void X86API wrw(u32 addr, u16 val)
+{
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - Emulator memory address to read
+val - Value to store
+
+REMARKS:
+Writes a long value to emulator memory.
+****************************************************************************/
+void X86API wrl(u32 addr, u32 val)
+{
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - PIO address to read
+RETURN:
+0
+REMARKS:
+Default PIO byte read function. Doesn't perform real inb.
+****************************************************************************/
+static u8 X86API p_inb(X86EMU_pioAddr addr)
+{
+ DB(if (DEBUG_IO_TRACE())
+ printk("inb %#04x \n", addr);)
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - PIO address to read
+RETURN:
+0
+REMARKS:
+Default PIO word read function. Doesn't perform real inw.
+****************************************************************************/
+static u16 X86API p_inw(X86EMU_pioAddr addr)
+{
+ DB(if (DEBUG_IO_TRACE())
+ printk("inw %#04x \n", addr);)
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - PIO address to read
+RETURN:
+0
+REMARKS:
+Default PIO long read function. Doesn't perform real inl.
+****************************************************************************/
+static u32 X86API p_inl(X86EMU_pioAddr addr)
+{
+ DB(if (DEBUG_IO_TRACE())
+ printk("inl %#04x \n", addr);)
+ return 0;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - PIO address to write
+val - Value to store
+REMARKS:
+Default PIO byte write function. Doesn't perform real outb.
+****************************************************************************/
+static void X86API p_outb(X86EMU_pioAddr addr, u8 val)
+{
+ DB(if (DEBUG_IO_TRACE())
+ printk("outb %#02x -> %#04x \n", val, addr);)
+ return;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - PIO address to write
+val - Value to store
+REMARKS:
+Default PIO word write function. Doesn't perform real outw.
+****************************************************************************/
+static void X86API p_outw(X86EMU_pioAddr addr, u16 val)
+{
+ DB(if (DEBUG_IO_TRACE())
+ printk("outw %#04x -> %#04x \n", val, addr);)
+ return;
+}
+
+/****************************************************************************
+PARAMETERS:
+addr - PIO address to write
+val - Value to store
+REMARKS:
+Default PIO ;ong write function. Doesn't perform real outl.
+****************************************************************************/
+static void X86API p_outl(X86EMU_pioAddr addr, u32 val)
+{
+ DB(if (DEBUG_IO_TRACE())
+ printk("outl %#08x -> %#04x \n", val, addr);)
+ return;
+}
+
+/*------------------------- Global Variables ------------------------------*/
+
+u8(X86APIP sys_rdb) (u32 addr) = rdb;
+u16(X86APIP sys_rdw) (u32 addr) = rdw;
+u32(X86APIP sys_rdl) (u32 addr) = rdl;
+void (X86APIP sys_wrb) (u32 addr, u8 val) = wrb;
+void (X86APIP sys_wrw) (u32 addr, u16 val) = wrw;
+void (X86APIP sys_wrl) (u32 addr, u32 val) = wrl;
+u8(X86APIP sys_inb) (X86EMU_pioAddr addr) = p_inb;
+u16(X86APIP sys_inw) (X86EMU_pioAddr addr) = p_inw;
+u32(X86APIP sys_inl) (X86EMU_pioAddr addr) = p_inl;
+void (X86APIP sys_outb) (X86EMU_pioAddr addr, u8 val) = p_outb;
+void (X86APIP sys_outw) (X86EMU_pioAddr addr, u16 val) = p_outw;
+void (X86APIP sys_outl) (X86EMU_pioAddr addr, u32 val) = p_outl;
+
+/*----------------------------- Setup -------------------------------------*/
+
+/****************************************************************************
+PARAMETERS:
+funcs - New memory function pointers to make active
+
+REMARKS:
+This function is used to set the pointers to functions which access
+memory space, allowing the user application to override these functions
+and hook them out as necessary for their application.
+****************************************************************************/
+void X86EMU_setupMemFuncs(X86EMU_memFuncs * funcs)
+{
+ sys_rdb = funcs->rdb;
+ sys_rdw = funcs->rdw;
+ sys_rdl = funcs->rdl;
+ sys_wrb = funcs->wrb;
+ sys_wrw = funcs->wrw;
+ sys_wrl = funcs->wrl;
+}
+
+/****************************************************************************
+PARAMETERS:
+funcs - New programmed I/O function pointers to make active
+
+REMARKS:
+This function is used to set the pointers to functions which access
+I/O space, allowing the user application to override these functions
+and hook them out as necessary for their application.
+****************************************************************************/
+void X86EMU_setupPioFuncs(X86EMU_pioFuncs * funcs)
+{
+ sys_inb = funcs->inb;
+ sys_inw = funcs->inw;
+ sys_inl = funcs->inl;
+ sys_outb = funcs->outb;
+ sys_outw = funcs->outw;
+ sys_outl = funcs->outl;
+}
+
+/****************************************************************************
+PARAMETERS:
+funcs - New interrupt vector table to make active
+
+REMARKS:
+This function is used to set the pointers to functions which handle
+interrupt processing in the emulator, allowing the user application to
+hook interrupts as necessary for their application. Any interrupts that
+are not hooked by the user application, and reflected and handled internally
+in the emulator via the interrupt vector table. This allows the application
+to get control when the code being emulated executes specific software
+interrupts.
+****************************************************************************/
+void X86EMU_setupIntrFuncs(X86EMU_intrFuncs funcs[])
+{
+ int i;
+
+ for (i = 0; i < 256; i++)
+ _X86EMU_intrTab[i] = NULL;
+ if (funcs) {
+ for (i = 0; i < 256; i++)
+ _X86EMU_intrTab[i] = funcs[i];
+ }
+}
+
+/****************************************************************************
+PARAMETERS:
+int - New software interrupt to prepare for
+
+REMARKS:
+This function is used to set up the emulator state to exceute a software
+interrupt. This can be used by the user application code to allow an
+interrupt to be hooked, examined and then reflected back to the emulator
+so that the code in the emulator will continue processing the software
+interrupt as per normal. This essentially allows system code to actively
+hook and handle certain software interrupts as necessary.
+****************************************************************************/
+void X86EMU_prepareForInt(int num)
+{
+ push_word((u16) M.x86.R_FLG);
+ CLEAR_FLAG(F_IF);
+ CLEAR_FLAG(F_TF);
+ push_word(M.x86.R_CS);
+ M.x86.R_CS = mem_access_word(num * 4 + 2);
+ push_word(M.x86.R_IP);
+ M.x86.R_IP = mem_access_word(num * 4);
+ M.x86.intr = 0;
+}
+
+#endif
diff --git a/drivers/cfb_console.c b/drivers/cfb_console.c
index 9727aeb..bcf8771 100644
--- a/drivers/cfb_console.c
+++ b/drivers/cfb_console.c
@@ -63,7 +63,7 @@
loop in VIDEO_TSTC_FCT (i8042)
CFG_CONSOLE_BLINK_COUNT - value for delay loop - blink rate
CONFIG_CONSOLE_TIME - display time/date in upper right corner,
- needs CFG_CMD_DATE and CONFIG_CONSOLE_CURSOR
+ needs CONFIG_CMD_DATE and CONFIG_CONSOLE_CURSOR
CONFIG_VIDEO_LOGO - display Linux Logo in upper left corner
CONFIG_VIDEO_BMP_LOGO - use bmp_logo instead of linux_logo
CONFIG_CONSOLE_EXTRA_INFO - display additional board information strings
@@ -175,15 +175,15 @@
#include <linux/types.h>
#include <devices.h>
#include <video_font.h>
-#ifdef CFG_CMD_DATE
-#include <rtc.h>
+#if defined(CONFIG_CMD_DATE)
+#include <rtc.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
+#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
#include <watchdog.h>
#include <bmp_layout.h>
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */
+#endif
/*****************************************************************************/
/* Cursor definition: */
@@ -709,7 +709,7 @@
/*****************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
+#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
#define FILL_8BIT_332RGB(r,g,b) { \
*fb = ((r>>5)<<5) | ((g>>5)<<2) | (b>>6); \
@@ -1004,7 +1004,7 @@
return (0);
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */
+#endif
/*****************************************************************************/
diff --git a/drivers/cs8900.c b/drivers/cs8900.c
index 082434c..80c4ba2 100644
--- a/drivers/cs8900.c
+++ b/drivers/cs8900.c
@@ -43,7 +43,7 @@
#ifdef CONFIG_DRIVER_CS8900
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#undef DEBUG
diff --git a/drivers/dataflash.c b/drivers/dataflash.c
index 17eb859..91903c8 100644
--- a/drivers/dataflash.c
+++ b/drivers/dataflash.c
@@ -26,18 +26,67 @@
AT91S_DATAFLASH_INFO dataflash_info[CFG_MAX_DATAFLASH_BANKS];
static AT91S_DataFlash DataFlashInst;
+#ifdef CONFIG_AT91SAM9260EK
+int cs[][CFG_MAX_DATAFLASH_BANKS] = {
+ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
+ {CFG_DATAFLASH_LOGIC_ADDR_CS1, 1}
+};
+#elif defined(CONFIG_AT91SAM9263EK)
+int cs[][CFG_MAX_DATAFLASH_BANKS] = {
+ {CFG_DATAFLASH_LOGIC_ADDR_CS0, 0} /* Logical adress, CS */
+};
+#else
int cs[][CFG_MAX_DATAFLASH_BANKS] = {
{CFG_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */
{CFG_DATAFLASH_LOGIC_ADDR_CS3, 3}
};
+#endif
/*define the area offsets*/
+#if defined(CONFIG_AT91SAM9261EK) || defined(CONFIG_AT91SAM9260EK) || defined(CONFIG_AT91SAM9263EK)
+#if defined(CONFIG_NEW_PARTITION)
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+ {0x00000000, 0x00003FFF, FLAG_PROTECT_SET, 0, "Bootstrap"}, /* ROM code */
+ {0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, /* u-boot environment */
+ {0x00008400, 0x0003DDFF, FLAG_PROTECT_SET, 0, "U-Boot"}, /* u-boot code */
+ {0x0003DE00, 0x00041FFF, FLAG_PROTECT_CLEAR, FLAG_SETENV, "MON"}, /* Room for alternative boot monitor */
+ {0x00042000, 0x0018BFFF, FLAG_PROTECT_CLEAR, FLAG_SETENV, "OS"}, /* data area size to tune */
+ {0x0018C000, 0xFFFFFFFF, FLAG_PROTECT_CLEAR, FLAG_SETENV, "FS"}, /* data area size to tune */
+};
+#else
+dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
+ {0, 0x3fff, FLAG_PROTECT_SET}, /* ROM code */
+ {0x4000, 0x7fff, FLAG_PROTECT_CLEAR}, /* u-boot environment */
+ {0x8000, 0x37fff, FLAG_PROTECT_SET}, /* u-boot code */
+ {0x38000, 0x1fffff, FLAG_PROTECT_CLEAR}, /* data area size to tune */
+};
+#endif
+#elif defined(CONFIG_NEW_PARTITION)
+/*define the area offsets*/
+/* Invalid partitions should be defined with start > end */
+dataflash_protect_t area_list[NB_DATAFLASH_AREA*CFG_MAX_DATAFLASH_BANKS] = {
+ {0x00000000, 0x000083ff, FLAG_PROTECT_SET, 0, "Bootstrap"}, /* ROM code */
+ {0x00008400, 0x00020fff, FLAG_PROTECT_SET, 0, "U-Boot"}, /* u-boot code */
+ {0x00021000, 0x000293ff, FLAG_PROTECT_CLEAR, 0, "Environment"}, /* u-boot environment 8Kb */
+ {0x00029400, 0x00041fff, FLAG_PROTECT_INVALID, 0, "<Unused>"}, /* Rest of Sector 1 */
+ {0x00042000, 0x0018Bfff, FLAG_PROTECT_CLEAR, FLAG_SETENV, "OS"}, /* data area size to tune */
+ {0x0018C000, 0xffffffff, FLAG_PROTECT_CLEAR, FLAG_SETENV, "FS"}, /* data area size to tune */
+
+ {0x00000000, 0xffffffff, FLAG_PROTECT_CLEAR, FLAG_SETENV, "Data"}, /* data area */
+ {0xffffffff, 0x00000000, FLAG_PROTECT_INVALID, 0, "<Invalid>"}, /* Invalid */
+ {0xffffffff, 0x00000000, FLAG_PROTECT_INVALID, 0, "<Invalid>"}, /* Invalid */
+ {0xffffffff, 0x00000000, FLAG_PROTECT_INVALID, 0, "<Invalid>"}, /* Invalid */
+ {0xffffffff, 0x00000000, FLAG_PROTECT_INVALID, 0, "<Invalid>"}, /* Invalid */
+ {0xffffffff, 0x00000000, FLAG_PROTECT_INVALID, 0, "<Invalid>"}, /* Invalid */
+};
+#else
dataflash_protect_t area_list[NB_DATAFLASH_AREA] = {
{0, 0x7fff, FLAG_PROTECT_SET}, /* ROM code */
{0x8000, 0x1ffff, FLAG_PROTECT_SET}, /* u-boot code */
{0x20000, 0x27fff, FLAG_PROTECT_CLEAR}, /* u-boot environment */
{0x28000, 0x1fffff, FLAG_PROTECT_CLEAR}, /* data area size to tune */
};
+#endif
extern void AT91F_SpiInit (void);
extern int AT91F_DataflashProbe (int i, AT91PS_DataflashDesc pDesc);
@@ -45,22 +94,28 @@
unsigned long addr,
unsigned long size, char *buffer);
extern int AT91F_DataFlashWrite( AT91PS_DataFlash pDataFlash,
- unsigned char *src,
- int dest,
- int size );
+ unsigned char *src,
+ int dest,
+ int size );
int AT91F_DataflashInit (void)
{
int i, j;
int dfcode;
+ int part = 0;
+ int last_part;
+ int found[CFG_MAX_DATAFLASH_BANKS];
+ unsigned char protected;
AT91F_SpiInit ();
for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
+ found[i] = 0;
dataflash_info[i].Desc.state = IDLE;
dataflash_info[i].id = 0;
dataflash_info[i].Device.pages_number = 0;
- dfcode = AT91F_DataflashProbe (cs[i][1], &dataflash_info[i].Desc);
+ dfcode = AT91F_DataflashProbe (cs[i][1],
+ &dataflash_info[i].Desc);
switch (dfcode) {
case AT45DB161:
@@ -72,6 +127,7 @@
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i][0];
dataflash_info[i].id = dfcode;
+ found[i] += dfcode;;
break;
case AT45DB321:
@@ -83,6 +139,7 @@
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i][0];
dataflash_info[i].id = dfcode;
+ found[i] += dfcode;;
break;
case AT45DB642:
@@ -94,7 +151,9 @@
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i][0];
dataflash_info[i].id = dfcode;
+ found[i] += dfcode;;
break;
+
case AT45DB128:
dataflash_info[i].Device.pages_number = 16384;
dataflash_info[i].Device.pages_size = 1056;
@@ -104,9 +163,11 @@
dataflash_info[i].Desc.DataFlash_state = IDLE;
dataflash_info[i].logical_address = cs[i][0];
dataflash_info[i].id = dfcode;
+ found[i] += dfcode;;
break;
default:
+ dfcode = 0;
break;
}
/* set the last area end to the dataflash size*/
@@ -114,16 +175,64 @@
(dataflash_info[i].Device.pages_number *
dataflash_info[i].Device.pages_size)-1;
+ last_part=0;
/* set the area addresses */
for(j = 0; j<NB_DATAFLASH_AREA; j++) {
- dataflash_info[i].Device.area_list[j].start = area_list[j].start + dataflash_info[i].logical_address;
- dataflash_info[i].Device.area_list[j].end = area_list[j].end + dataflash_info[i].logical_address;
- dataflash_info[i].Device.area_list[j].protected = area_list[j].protected;
+ if(found[i]!=0) {
+ dataflash_info[i].Device.area_list[j].start =
+ area_list[part].start +
+ dataflash_info[i].logical_address;
+ if(area_list[part].end == 0xffffffff) {
+ dataflash_info[i].Device.area_list[j].end =
+ dataflash_info[i].end_address +
+ dataflash_info [i].logical_address;
+ last_part = 1;
+ } else {
+ dataflash_info[i].Device.area_list[j].end =
+ area_list[part].end +
+ dataflash_info[i].logical_address;
+ }
+ protected = area_list[part].protected;
+ /* Set the environment according to the label...*/
+ if(protected == FLAG_PROTECT_INVALID) {
+ dataflash_info[i].Device.area_list[j].protected =
+ FLAG_PROTECT_INVALID;
+ } else {
+ dataflash_info[i].Device.area_list[j].protected =
+ protected;
+ }
+ strcpy((char*)(dataflash_info[i].Device.area_list[j].label),
+ (const char *)area_list[part].label);
+ }
+ part++;
}
}
- return (1);
+ return found[0];
}
+#ifdef CONFIG_NEW_DF_PARTITION
+int AT91F_DataflashSetEnv (void)
+{
+ int i, j;
+ int part;
+ unsigned char env;
+ unsigned char s[32]; /* Will fit a long int in hex */
+ unsigned long start;
+ for (i = 0, part= 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
+ for(j = 0; j<NB_DATAFLASH_AREA; j++) {
+ env = area_list[part].setenv;
+ /* Set the environment according to the label...*/
+ if((env & FLAG_SETENV) == FLAG_SETENV) {
+ start =
+ dataflash_info[i].Device.area_list[j].start;
+ sprintf(s,"%X",start);
+ setenv(area_list[part].label,s);
+ }
+ part++;
+ }
+ }
+}
+#endif
void dataflash_print_info (void)
{
@@ -131,25 +240,25 @@
for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++) {
if (dataflash_info[i].id != 0) {
- printf ("DataFlash:");
+ printf("DataFlash:");
switch (dataflash_info[i].id) {
case AT45DB161:
- printf ("AT45DB161\n");
+ printf("AT45DB161\n");
break;
case AT45DB321:
- printf ("AT45DB321\n");
+ printf("AT45DB321\n");
break;
case AT45DB642:
- printf ("AT45DB642\n");
+ printf("AT45DB642\n");
break;
case AT45DB128:
- printf ("AT45DB128\n");
+ printf("AT45DB128\n");
break;
}
- printf ("Nb pages: %6d\n"
+ printf("Nb pages: %6d\n"
"Page Size: %6d\n"
"Size=%8d bytes\n"
"Logical address: 0x%08X\n",
@@ -159,28 +268,44 @@
dataflash_info[i].Device.pages_size,
(unsigned int) dataflash_info[i].logical_address);
for (j=0; j< NB_DATAFLASH_AREA; j++) {
- printf ("Area %i:\t%08lX to %08lX %s\n", j,
- dataflash_info[i].Device.area_list[j].start,
- dataflash_info[i].Device.area_list[j].end,
- (dataflash_info[i].Device.area_list[j].protected ==
- FLAG_PROTECT_SET) ? "(RO)" : "");
+ switch(dataflash_info[i].Device.area_list[j].protected) {
+ case FLAG_PROTECT_SET:
+ case FLAG_PROTECT_CLEAR:
+ printf("Area %i:\t%08lX to %08lX %s", j,
+ dataflash_info[i].Device.area_list[j].start,
+ dataflash_info[i].Device.area_list[j].end,
+ (dataflash_info[i].Device.area_list[j].protected==FLAG_PROTECT_SET) ? "(RO)" : " ");
+#ifdef CONFIG_NEW_DF_PARTITION
+ printf(" %s\n", dataflash_info[i].Device.area_list[j].label);
+#else
+ printf("\n");
+#endif
+ break;
+#ifdef CONFIG_NEW_DF_PARTITION
+ case FLAG_PROTECT_INVALID:
+ break;
+#endif
+ }
}
}
}
}
-/*------------------------------------------------------------------------------*/
-/* Function Name : AT91F_DataflashSelect */
-/* Object : Select the correct device */
-/*------------------------------------------------------------------------------*/
-AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash, unsigned long *addr)
+/*---------------------------------------------------------------------------*/
+/* Function Name : AT91F_DataflashSelect */
+/* Object : Select the correct device */
+/*---------------------------------------------------------------------------*/
+AT91PS_DataFlash AT91F_DataflashSelect (AT91PS_DataFlash pFlash,
+ unsigned long *addr)
{
char addr_valid = 0;
int i;
for (i = 0; i < CFG_MAX_DATAFLASH_BANKS; i++)
- if ((*addr & 0xFF000000) == dataflash_info[i].logical_address) {
+ if ( dataflash_info[i].id
+ && ((((int) addr) & 0xFF000000) ==
+ dataflash_info[i].logical_address)) {
addr_valid = 1;
break;
}
@@ -194,10 +319,10 @@
return (pFlash);
}
-/*------------------------------------------------------------------------------*/
-/* Function Name : addr_dataflash */
-/* Object : Test if address is valid */
-/*------------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name : addr_dataflash */
+/* Object : Test if address is valid */
+/*---------------------------------------------------------------------------*/
int addr_dataflash (unsigned long addr)
{
int addr_valid = 0;
@@ -213,25 +338,27 @@
return addr_valid;
}
-/*-----------------------------------------------------------------------------*/
-/* Function Name : size_dataflash */
-/* Object : Test if address is valid regarding the size */
-/*-----------------------------------------------------------------------------*/
-int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size)
+/*---------------------------------------------------------------------------*/
+/* Function Name : size_dataflash */
+/* Object : Test if address is valid regarding the size */
+/*---------------------------------------------------------------------------*/
+int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr,
+ unsigned long size)
{
/* is outside the dataflash */
if (((int)addr & 0x0FFFFFFF) > (pdataFlash->pDevice->pages_size *
pdataFlash->pDevice->pages_number)) return 0;
/* is too large for the dataflash */
if (size > ((pdataFlash->pDevice->pages_size *
- pdataFlash->pDevice->pages_number) - ((int)addr & 0x0FFFFFFF))) return 0;
+ pdataFlash->pDevice->pages_number) -
+ ((int)addr & 0x0FFFFFFF))) return 0;
return 1;
}
-/*-----------------------------------------------------------------------------*/
-/* Function Name : prot_dataflash */
-/* Object : Test if destination area is protected */
-/*-----------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name : prot_dataflash */
+/* Object : Test if destination area is protected */
+/*---------------------------------------------------------------------------*/
int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr)
{
int area;
@@ -241,17 +368,23 @@
(addr < pdataFlash->pDevice->area_list[area].end))
break;
}
- if (area == NB_DATAFLASH_AREA) return -1;
+ if (area == NB_DATAFLASH_AREA)
+ return -1;
+
/*test protection value*/
- if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET) return 0;
+ if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_SET)
+ return 0;
+ if (pdataFlash->pDevice->area_list[area].protected == FLAG_PROTECT_INVALID)
+ return 0;
return 1;
}
-/*-----------------------------------------------------------------------------*/
-/* Function Name : dataflash_real_protect */
-/* Object : protect/unprotect area */
-/*-----------------------------------------------------------------------------*/
-int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr)
+/*--------------------------------------------------------------------------*/
+/* Function Name : dataflash_real_protect */
+/* Object : protect/unprotect area */
+/*--------------------------------------------------------------------------*/
+int dataflash_real_protect (int flag, unsigned long start_addr,
+ unsigned long end_addr)
{
int i,j, area1, area2, addr_valid = 0;
/* find dataflash */
@@ -267,27 +400,38 @@
}
/* find start area */
for (area1=0; area1 < NB_DATAFLASH_AREA; area1++) {
- if (start_addr == dataflash_info[i].Device.area_list[area1].start) break;
+ if (start_addr == dataflash_info[i].Device.area_list[area1].start)
+ break;
}
if (area1 == NB_DATAFLASH_AREA) return -1;
/* find end area */
for (area2=0; area2 < NB_DATAFLASH_AREA; area2++) {
- if (end_addr == dataflash_info[i].Device.area_list[area2].end) break;
+ if (end_addr == dataflash_info[i].Device.area_list[area2].end)
+ break;
}
- if (area2 == NB_DATAFLASH_AREA) return -1;
+ if (area2 == NB_DATAFLASH_AREA)
+ return -1;
/*set protection value*/
for(j = area1; j < area2+1 ; j++)
- if (flag == 0) dataflash_info[i].Device.area_list[j].protected = FLAG_PROTECT_CLEAR;
- else dataflash_info[i].Device.area_list[j].protected = FLAG_PROTECT_SET;
+ if(dataflash_info[i].Device.area_list[j].protected
+ != FLAG_PROTECT_INVALID) {
+ if (flag == 0) {
+ dataflash_info[i].Device.area_list[j].protected
+ = FLAG_PROTECT_CLEAR;
+ } else {
+ dataflash_info[i].Device.area_list[j].protected
+ = FLAG_PROTECT_SET;
+ }
+ }
return (area2-area1+1);
}
-/*------------------------------------------------------------------------------*/
-/* Function Name : read_dataflash */
-/* Object : dataflash memory read */
-/*------------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name : read_dataflash */
+/* Object : dataflash memory read */
+/*---------------------------------------------------------------------------*/
int read_dataflash (unsigned long addr, unsigned long size, char *result)
{
unsigned long AddrToRead = addr;
@@ -305,12 +449,12 @@
}
-/*-----------------------------------------------------------------------------*/
-/* Function Name : write_dataflash */
-/* Object : write a block in dataflash */
-/*-----------------------------------------------------------------------------*/
+/*---------------------------------------------------------------------------*/
+/* Function Name : write_dataflash */
+/* Object : write a block in dataflash */
+/*---------------------------------------------------------------------------*/
int write_dataflash (unsigned long addr_dest, unsigned long addr_src,
- unsigned long size)
+ unsigned long size)
{
unsigned long AddrToWrite = addr_dest;
AT91PS_DataFlash pFlash = &DataFlashInst;
@@ -329,7 +473,8 @@
if (AddrToWrite == -1)
return -1;
- return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src, AddrToWrite, size);
+ return AT91F_DataFlashWrite (pFlash, (uchar *)addr_src,
+ AddrToWrite, size);
}
@@ -339,22 +484,22 @@
case ERR_OK:
break;
case ERR_TIMOUT:
- printf ("Timeout writing to DataFlash\n");
+ printf("Timeout writing to DataFlash\n");
break;
case ERR_PROTECTED:
- printf ("Can't write to protected DataFlash sectors\n");
+ printf("Can't write to protected/invalid DataFlash sectors\n");
break;
case ERR_INVAL:
- printf ("Outside available DataFlash\n");
+ printf("Outside available DataFlash\n");
break;
case ERR_UNKNOWN_FLASH_TYPE:
- printf ("Unknown Type of DataFlash\n");
+ printf("Unknown Type of DataFlash\n");
break;
case ERR_PROG_ERROR:
- printf ("General DataFlash Programming Error\n");
+ printf("General DataFlash Programming Error\n");
break;
default:
- printf ("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
+ printf("%s[%d] FIXME: rc=%d\n", __FILE__, __LINE__, err);
break;
}
}
diff --git a/drivers/dc2114x.c b/drivers/dc2114x.c
index c43cd5e..d5275dc 100644
--- a/drivers/dc2114x.c
+++ b/drivers/dc2114x.c
@@ -20,8 +20,8 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) \
- && defined(CONFIG_TULIP)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_TULIP)
#include <malloc.h>
#include <net.h>
@@ -768,4 +768,4 @@
}
#endif /* UPDATE_SROM */
-#endif /* CFG_CMD_NET && CONFIG_NET_MULTI && CONFIG_TULIP */
+#endif
diff --git a/drivers/dm9000x.c b/drivers/dm9000x.c
index 6877076..6131b5c 100644
--- a/drivers/dm9000x.c
+++ b/drivers/dm9000x.c
@@ -99,7 +99,7 @@
static int dm9000_probe(void);
static u16 phy_read(int);
static void phy_write(int, u16);
-static u16 read_srom_word(int);
+u16 read_srom_word(int);
static u8 DM9000_ior(int);
static void DM9000_iow(int reg, u8 value);
@@ -302,6 +302,21 @@
/* Set Node address */
for (i = 0; i < 6; i++)
((u16 *) bd->bi_enetaddr)[i] = read_srom_word(i);
+
+ if (is_zero_ether_addr(bd->bi_enetaddr) ||
+ is_multicast_ether_addr(bd->bi_enetaddr)) {
+ /* try reading from environment */
+ u8 i;
+ char *s, *e;
+ s = getenv ("ethaddr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enetaddr[i] = s ?
+ simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+ }
+
printf("MAC: %02x:%02x:%02x:%02x:%02x:%02x\n", bd->bi_enetaddr[0],
bd->bi_enetaddr[1], bd->bi_enetaddr[2], bd->bi_enetaddr[3],
bd->bi_enetaddr[4], bd->bi_enetaddr[5]);
@@ -522,16 +537,28 @@
/*
Read a word data from SROM
*/
-static u16
+u16
read_srom_word(int offset)
{
DM9000_iow(DM9000_EPAR, offset);
DM9000_iow(DM9000_EPCR, 0x4);
- udelay(200);
+ udelay(8000);
DM9000_iow(DM9000_EPCR, 0x0);
return (DM9000_ior(DM9000_EPDRL) + (DM9000_ior(DM9000_EPDRH) << 8));
}
+void
+write_srom_word(int offset, u16 val)
+{
+ DM9000_iow(DM9000_EPAR, offset);
+ DM9000_iow(DM9000_EPDRH, ((val >> 8) & 0xff));
+ DM9000_iow(DM9000_EPDRL, (val & 0xff));
+ DM9000_iow(DM9000_EPCR, 0x12);
+ udelay(8000);
+ DM9000_iow(DM9000_EPCR, 0);
+}
+
+
/*
Read a byte from I/O port
*/
diff --git a/drivers/e1000.c b/drivers/e1000.c
index 927acbb..f0741da 100644
--- a/drivers/e1000.c
+++ b/drivers/e1000.c
@@ -44,8 +44,8 @@
#include "e1000.h"
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_E1000)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_E1000)
#define TOUT_LOOP 100000
diff --git a/drivers/eepro100.c b/drivers/eepro100.c
index 04c17f6..738146e 100644
--- a/drivers/eepro100.c
+++ b/drivers/eepro100.c
@@ -30,8 +30,8 @@
#undef DEBUG
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_EEPRO100)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_EEPRO100)
/* Ethernet chip registers.
*/
@@ -272,7 +272,7 @@
*(volatile u32 *) ((addr + dev->iobase)) = cpu_to_le32 (command);
}
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
static inline int INL (struct eth_device *dev, u_long addr)
{
return le32_to_cpu (*(volatile u32 *) (addr + dev->iobase));
@@ -386,7 +386,7 @@
return 0;
}
-#endif /* defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) */
+#endif
/* Wait for the chip get the command.
*/
@@ -462,7 +462,7 @@
eth_register (dev);
-#if defined (CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined (CONFIG_MII) || defined(CONFIG_CMD_MII)
/* register mii command access routines */
miiphy_register(dev->name,
eepro100_miiphy_read, eepro100_miiphy_write);
diff --git a/drivers/enc28j60.c b/drivers/enc28j60.c
new file mode 100644
index 0000000..98303ac
--- /dev/null
+++ b/drivers/enc28j60.c
@@ -0,0 +1,983 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <common.h>
+#ifdef CONFIG_ENC28J60
+#include <net.h>
+#include <asm/arch/hardware.h>
+#include <asm/arch/spi.h>
+
+/*
+ * Control Registers in Bank 0
+ */
+
+#define CTL_REG_ERDPTL 0x00
+#define CTL_REG_ERDPTH 0x01
+#define CTL_REG_EWRPTL 0x02
+#define CTL_REG_EWRPTH 0x03
+#define CTL_REG_ETXSTL 0x04
+#define CTL_REG_ETXSTH 0x05
+#define CTL_REG_ETXNDL 0x06
+#define CTL_REG_ETXNDH 0x07
+#define CTL_REG_ERXSTL 0x08
+#define CTL_REG_ERXSTH 0x09
+#define CTL_REG_ERXNDL 0x0A
+#define CTL_REG_ERXNDH 0x0B
+#define CTL_REG_ERXRDPTL 0x0C
+#define CTL_REG_ERXRDPTH 0x0D
+#define CTL_REG_ERXWRPTL 0x0E
+#define CTL_REG_ERXWRPTH 0x0F
+#define CTL_REG_EDMASTL 0x10
+#define CTL_REG_EDMASTH 0x11
+#define CTL_REG_EDMANDL 0x12
+#define CTL_REG_EDMANDH 0x13
+#define CTL_REG_EDMADSTL 0x14
+#define CTL_REG_EDMADSTH 0x15
+#define CTL_REG_EDMACSL 0x16
+#define CTL_REG_EDMACSH 0x17
+/* these are common in all banks */
+#define CTL_REG_EIE 0x1B
+#define CTL_REG_EIR 0x1C
+#define CTL_REG_ESTAT 0x1D
+#define CTL_REG_ECON2 0x1E
+#define CTL_REG_ECON1 0x1F
+
+/*
+ * Control Registers in Bank 1
+ */
+
+#define CTL_REG_EHT0 0x00
+#define CTL_REG_EHT1 0x01
+#define CTL_REG_EHT2 0x02
+#define CTL_REG_EHT3 0x03
+#define CTL_REG_EHT4 0x04
+#define CTL_REG_EHT5 0x05
+#define CTL_REG_EHT6 0x06
+#define CTL_REG_EHT7 0x07
+#define CTL_REG_EPMM0 0x08
+#define CTL_REG_EPMM1 0x09
+#define CTL_REG_EPMM2 0x0A
+#define CTL_REG_EPMM3 0x0B
+#define CTL_REG_EPMM4 0x0C
+#define CTL_REG_EPMM5 0x0D
+#define CTL_REG_EPMM6 0x0E
+#define CTL_REG_EPMM7 0x0F
+#define CTL_REG_EPMCSL 0x10
+#define CTL_REG_EPMCSH 0x11
+#define CTL_REG_EPMOL 0x14
+#define CTL_REG_EPMOH 0x15
+#define CTL_REG_EWOLIE 0x16
+#define CTL_REG_EWOLIR 0x17
+#define CTL_REG_ERXFCON 0x18
+#define CTL_REG_EPKTCNT 0x19
+
+/*
+ * Control Registers in Bank 2
+ */
+
+#define CTL_REG_MACON1 0x00
+#define CTL_REG_MACON2 0x01
+#define CTL_REG_MACON3 0x02
+#define CTL_REG_MACON4 0x03
+#define CTL_REG_MABBIPG 0x04
+#define CTL_REG_MAIPGL 0x06
+#define CTL_REG_MAIPGH 0x07
+#define CTL_REG_MACLCON1 0x08
+#define CTL_REG_MACLCON2 0x09
+#define CTL_REG_MAMXFLL 0x0A
+#define CTL_REG_MAMXFLH 0x0B
+#define CTL_REG_MAPHSUP 0x0D
+#define CTL_REG_MICON 0x11
+#define CTL_REG_MICMD 0x12
+#define CTL_REG_MIREGADR 0x14
+#define CTL_REG_MIWRL 0x16
+#define CTL_REG_MIWRH 0x17
+#define CTL_REG_MIRDL 0x18
+#define CTL_REG_MIRDH 0x19
+
+/*
+ * Control Registers in Bank 3
+ */
+
+#define CTL_REG_MAADR1 0x00
+#define CTL_REG_MAADR0 0x01
+#define CTL_REG_MAADR3 0x02
+#define CTL_REG_MAADR2 0x03
+#define CTL_REG_MAADR5 0x04
+#define CTL_REG_MAADR4 0x05
+#define CTL_REG_EBSTSD 0x06
+#define CTL_REG_EBSTCON 0x07
+#define CTL_REG_EBSTCSL 0x08
+#define CTL_REG_EBSTCSH 0x09
+#define CTL_REG_MISTAT 0x0A
+#define CTL_REG_EREVID 0x12
+#define CTL_REG_ECOCON 0x15
+#define CTL_REG_EFLOCON 0x17
+#define CTL_REG_EPAUSL 0x18
+#define CTL_REG_EPAUSH 0x19
+
+
+/*
+ * PHY Register
+ */
+
+#define PHY_REG_PHID1 0x02
+#define PHY_REG_PHID2 0x03
+/* taken from the Linux driver */
+#define PHY_REG_PHCON1 0x00
+#define PHY_REG_PHCON2 0x10
+#define PHY_REG_PHLCON 0x14
+
+/*
+ * Receive Filter Register (ERXFCON) bits
+ */
+
+#define ENC_RFR_UCEN 0x80
+#define ENC_RFR_ANDOR 0x40
+#define ENC_RFR_CRCEN 0x20
+#define ENC_RFR_PMEN 0x10
+#define ENC_RFR_MPEN 0x08
+#define ENC_RFR_HTEN 0x04
+#define ENC_RFR_MCEN 0x02
+#define ENC_RFR_BCEN 0x01
+
+/*
+ * ECON1 Register Bits
+ */
+
+#define ENC_ECON1_TXRST 0x80
+#define ENC_ECON1_RXRST 0x40
+#define ENC_ECON1_DMAST 0x20
+#define ENC_ECON1_CSUMEN 0x10
+#define ENC_ECON1_TXRTS 0x08
+#define ENC_ECON1_RXEN 0x04
+#define ENC_ECON1_BSEL1 0x02
+#define ENC_ECON1_BSEL0 0x01
+
+/*
+ * ECON2 Register Bits
+ */
+#define ENC_ECON2_AUTOINC 0x80
+#define ENC_ECON2_PKTDEC 0x40
+#define ENC_ECON2_PWRSV 0x20
+#define ENC_ECON2_VRPS 0x08
+
+/*
+ * EIR Register Bits
+ */
+#define ENC_EIR_PKTIF 0x40
+#define ENC_EIR_DMAIF 0x20
+#define ENC_EIR_LINKIF 0x10
+#define ENC_EIR_TXIF 0x08
+#define ENC_EIR_WOLIF 0x04
+#define ENC_EIR_TXERIF 0x02
+#define ENC_EIR_RXERIF 0x01
+
+/*
+ * ESTAT Register Bits
+ */
+
+#define ENC_ESTAT_INT 0x80
+#define ENC_ESTAT_LATECOL 0x10
+#define ENC_ESTAT_RXBUSY 0x04
+#define ENC_ESTAT_TXABRT 0x02
+#define ENC_ESTAT_CLKRDY 0x01
+
+/*
+ * EIE Register Bits
+ */
+
+#define ENC_EIE_INTIE 0x80
+#define ENC_EIE_PKTIE 0x40
+#define ENC_EIE_DMAIE 0x20
+#define ENC_EIE_LINKIE 0x10
+#define ENC_EIE_TXIE 0x08
+#define ENC_EIE_WOLIE 0x04
+#define ENC_EIE_TXERIE 0x02
+#define ENC_EIE_RXERIE 0x01
+
+/*
+ * MACON1 Register Bits
+ */
+#define ENC_MACON1_LOOPBK 0x10
+#define ENC_MACON1_TXPAUS 0x08
+#define ENC_MACON1_RXPAUS 0x04
+#define ENC_MACON1_PASSALL 0x02
+#define ENC_MACON1_MARXEN 0x01
+
+
+/*
+ * MACON2 Register Bits
+ */
+#define ENC_MACON2_MARST 0x80
+#define ENC_MACON2_RNDRST 0x40
+#define ENC_MACON2_MARXRST 0x08
+#define ENC_MACON2_RFUNRST 0x04
+#define ENC_MACON2_MATXRST 0x02
+#define ENC_MACON2_TFUNRST 0x01
+
+/*
+ * MACON3 Register Bits
+ */
+#define ENC_MACON3_PADCFG2 0x80
+#define ENC_MACON3_PADCFG1 0x40
+#define ENC_MACON3_PADCFG0 0x20
+#define ENC_MACON3_TXCRCEN 0x10
+#define ENC_MACON3_PHDRLEN 0x08
+#define ENC_MACON3_HFRMEN 0x04
+#define ENC_MACON3_FRMLNEN 0x02
+#define ENC_MACON3_FULDPX 0x01
+
+/*
+ * MICMD Register Bits
+ */
+#define ENC_MICMD_MIISCAN 0x02
+#define ENC_MICMD_MIIRD 0x01
+
+/*
+ * MISTAT Register Bits
+ */
+#define ENC_MISTAT_NVALID 0x04
+#define ENC_MISTAT_SCAN 0x02
+#define ENC_MISTAT_BUSY 0x01
+
+/*
+ * PHID1 and PHID2 values
+ */
+#define ENC_PHID1_VALUE 0x0083
+#define ENC_PHID2_VALUE 0x1400
+#define ENC_PHID2_MASK 0xFC00
+
+
+#define ENC_SPI_SLAVE_CS 0x00010000 /* pin P1.16 */
+#define ENC_RESET 0x00020000 /* pin P1.17 */
+
+#define FAILSAFE_VALUE 5000
+
+/*
+ * Controller memory layout:
+ *
+ * 0x0000 - 0x17ff 6k bytes receive buffer
+ * 0x1800 - 0x1fff 2k bytes transmit buffer
+ */
+/* Use the lower memory for receiver buffer. See errata pt. 5 */
+#define ENC_RX_BUF_START 0x0000
+#define ENC_TX_BUF_START 0x1800
+/* taken from the Linux driver */
+#define ENC_RX_BUF_END 0x17ff
+#define ENC_TX_BUF_END 0x1fff
+
+/* maximum frame length */
+#define ENC_MAX_FRM_LEN 1518
+
+#define enc_enable() PUT32(IO1CLR, ENC_SPI_SLAVE_CS)
+#define enc_disable() PUT32(IO1SET, ENC_SPI_SLAVE_CS)
+#define enc_cfg_spi() spi_set_cfg(0, 0, 0); spi_set_clock(8);
+
+
+static unsigned char encReadReg (unsigned char regNo);
+static void encWriteReg (unsigned char regNo, unsigned char data);
+static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c);
+static void encReadBuff (unsigned short length, unsigned char *pBuff);
+static void encWriteBuff (unsigned short length, unsigned char *pBuff);
+static void encBitSet (unsigned char regNo, unsigned char data);
+static void encBitClr (unsigned char regNo, unsigned char data);
+static void encReset (void);
+static void encInit (unsigned char *pEthAddr);
+static unsigned short phyRead (unsigned char addr);
+static void phyWrite(unsigned char, unsigned short);
+static void encPoll (void);
+static void encRx (void);
+
+#define m_nic_read(reg) encReadReg(reg)
+#define m_nic_write(reg, data) encWriteReg(reg, data)
+#define m_nic_write_retry(reg, data, count) encWriteRegRetry(reg, data, count)
+#define m_nic_read_data(len, buf) encReadBuff((len), (buf))
+#define m_nic_write_data(len, buf) encWriteBuff((len), (buf))
+
+/* bit field set */
+#define m_nic_bfs(reg, data) encBitSet(reg, data)
+
+/* bit field clear */
+#define m_nic_bfc(reg, data) encBitClr(reg, data)
+
+static unsigned char bank = 0; /* current bank in enc28j60 */
+static unsigned char next_pointer_lsb;
+static unsigned char next_pointer_msb;
+
+static unsigned char buffer[ENC_MAX_FRM_LEN];
+static int rxResetCounter = 0;
+
+#define RX_RESET_COUNTER 1000;
+
+/*-----------------------------------------------------------------------------
+ * Always returns 0
+ */
+int eth_init (bd_t * bis)
+{
+ unsigned char estatVal;
+
+ /* configure GPIO */
+ (*((volatile unsigned long *) IO1DIR)) |= ENC_SPI_SLAVE_CS;
+ (*((volatile unsigned long *) IO1DIR)) |= ENC_RESET;
+
+ /* CS and RESET active low */
+ PUT32 (IO1SET, ENC_SPI_SLAVE_CS);
+ PUT32 (IO1SET, ENC_RESET);
+
+ spi_init ();
+
+ /* taken from the Linux driver - dangerous stuff here! */
+ /* Wait for CLKRDY to become set (i.e., check that we can communicate with
+ the ENC) */
+ do
+ {
+ estatVal = m_nic_read(CTL_REG_ESTAT);
+ } while ((estatVal & 0x08) || (~estatVal & ENC_ESTAT_CLKRDY));
+
+ /* initialize controller */
+ encReset ();
+ encInit (bis->bi_enetaddr);
+
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */
+
+ return 0;
+}
+
+int eth_send (volatile void *packet, int length)
+{
+ /* check frame length, etc. */
+ /* TODO: */
+
+ /* switch to bank 0 */
+ m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
+
+ /* set EWRPT */
+ m_nic_write (CTL_REG_EWRPTL, (ENC_TX_BUF_START & 0xff));
+ m_nic_write (CTL_REG_EWRPTH, (ENC_TX_BUF_START >> 8));
+
+ /* set ETXND */
+ m_nic_write (CTL_REG_ETXNDL, (length + ENC_TX_BUF_START) & 0xFF);
+ m_nic_write (CTL_REG_ETXNDH, (length + ENC_TX_BUF_START) >> 8);
+
+ /* set ETXST */
+ m_nic_write (CTL_REG_ETXSTL, ENC_TX_BUF_START & 0xFF);
+ m_nic_write (CTL_REG_ETXSTH, ENC_TX_BUF_START >> 8);
+
+ /* write packet */
+ m_nic_write_data (length, (unsigned char *) packet);
+
+ /* taken from the Linux driver */
+ /* Verify that the internal transmit logic has not been altered by excessive
+ collisions. See Errata B4 12 and 14.
+ */
+ if (m_nic_read(CTL_REG_EIR) & ENC_EIR_TXERIF) {
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_TXRST);
+ m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_TXRST);
+ }
+ m_nic_bfc(CTL_REG_EIR, (ENC_EIR_TXERIF | ENC_EIR_TXIF));
+
+ /* set ECON1.TXRTS */
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_TXRTS);
+
+ return 0;
+}
+
+
+/*****************************************************************************
+ * This function resets the receiver only. This function may be called from
+ * interrupt-context.
+ */
+static void encReceiverReset (void)
+{
+ unsigned char econ1;
+
+ econ1 = m_nic_read (CTL_REG_ECON1);
+ if ((econ1 & ENC_ECON1_RXRST) == 0) {
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXRST);
+ rxResetCounter = RX_RESET_COUNTER;
+ }
+}
+
+/*****************************************************************************
+ * receiver reset timer
+ */
+static void encReceiverResetCallback (void)
+{
+ m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXRST);
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_RXEN); /* enable receive */
+}
+
+/*-----------------------------------------------------------------------------
+ * Check for received packets. Call NetReceive for each packet. The return
+ * value is ignored by the caller.
+ */
+int eth_rx (void)
+{
+ if (rxResetCounter > 0 && --rxResetCounter == 0) {
+ encReceiverResetCallback ();
+ }
+
+ encPoll ();
+
+ return 0;
+}
+
+void eth_halt (void)
+{
+ m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_RXEN); /* disable receive */
+}
+
+/*****************************************************************************/
+
+static void encPoll (void)
+{
+ unsigned char eir_reg;
+ volatile unsigned char estat_reg;
+ unsigned char pkt_cnt;
+
+#ifdef CONFIG_USE_IRQ
+ /* clear global interrupt enable bit in enc28j60 */
+ m_nic_bfc (CTL_REG_EIE, ENC_EIE_INTIE);
+#endif
+ estat_reg = m_nic_read (CTL_REG_ESTAT);
+
+ eir_reg = m_nic_read (CTL_REG_EIR);
+
+ if (eir_reg & ENC_EIR_TXIF) {
+ /* clear TXIF bit in EIR */
+ m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXIF);
+ }
+
+ /* We have to use pktcnt and not pktif bit, see errata pt. 6 */
+
+ /* move to bank 1 */
+ m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1);
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0);
+
+ /* read pktcnt */
+ pkt_cnt = m_nic_read (CTL_REG_EPKTCNT);
+
+ if (pkt_cnt > 0) {
+ if ((eir_reg & ENC_EIR_PKTIF) == 0) {
+ /*printf("encPoll: pkt cnt > 0, but pktif not set\n"); */
+ }
+ encRx ();
+ /* clear PKTIF bit in EIR, this should not need to be done but it
+ seems like we get problems if we do not */
+ m_nic_bfc (CTL_REG_EIR, ENC_EIR_PKTIF);
+ }
+
+ if (eir_reg & ENC_EIR_RXERIF) {
+ printf ("encPoll: rx error\n");
+ m_nic_bfc (CTL_REG_EIR, ENC_EIR_RXERIF);
+ }
+ if (eir_reg & ENC_EIR_TXERIF) {
+ printf ("encPoll: tx error\n");
+ m_nic_bfc (CTL_REG_EIR, ENC_EIR_TXERIF);
+ }
+
+#ifdef CONFIG_USE_IRQ
+ /* set global interrupt enable bit in enc28j60 */
+ m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE);
+#endif
+}
+
+static void encRx (void)
+{
+ unsigned short pkt_len;
+ unsigned short copy_len;
+ unsigned short status;
+ unsigned char eir_reg;
+ unsigned char pkt_cnt = 0;
+ unsigned short rxbuf_rdpt;
+
+ /* switch to bank 0 */
+ m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
+
+ m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb);
+ m_nic_write (CTL_REG_ERDPTH, next_pointer_msb);
+
+ do {
+ m_nic_read_data (6, buffer);
+ next_pointer_lsb = buffer[0];
+ next_pointer_msb = buffer[1];
+ pkt_len = buffer[2];
+ pkt_len |= (unsigned short) buffer[3] << 8;
+ status = buffer[4];
+ status |= (unsigned short) buffer[5] << 8;
+
+ if (pkt_len <= ENC_MAX_FRM_LEN)
+ copy_len = pkt_len;
+ else
+ copy_len = 0;
+
+ if ((status & (1L << 7)) == 0) /* check Received Ok bit */
+ copy_len = 0;
+
+ /* taken from the Linux driver */
+ /* check if next pointer is resonable */
+ if ((((unsigned int)next_pointer_msb << 8) |
+ (unsigned int)next_pointer_lsb) >= ENC_TX_BUF_START)
+ copy_len = 0;
+
+ if (copy_len > 0) {
+ m_nic_read_data (copy_len, buffer);
+ }
+
+ /* advance read pointer to next pointer */
+ m_nic_write (CTL_REG_ERDPTL, next_pointer_lsb);
+ m_nic_write (CTL_REG_ERDPTH, next_pointer_msb);
+
+ /* decrease packet counter */
+ m_nic_bfs (CTL_REG_ECON2, ENC_ECON2_PKTDEC);
+
+ /* taken from the Linux driver */
+ /* Only odd values should be written to ERXRDPTL,
+ * see errata B4 pt.13
+ */
+ rxbuf_rdpt = (next_pointer_msb << 8 | next_pointer_lsb) - 1;
+ if ((rxbuf_rdpt < (m_nic_read(CTL_REG_ERXSTH) << 8 |
+ m_nic_read(CTL_REG_ERXSTL))) || (rxbuf_rdpt >
+ (m_nic_read(CTL_REG_ERXNDH) << 8 |
+ m_nic_read(CTL_REG_ERXNDL)))) {
+ m_nic_write(CTL_REG_ERXRDPTL, m_nic_read(CTL_REG_ERXNDL));
+ m_nic_write(CTL_REG_ERXRDPTH, m_nic_read(CTL_REG_ERXNDH));
+ } else {
+ m_nic_write(CTL_REG_ERXRDPTL, rxbuf_rdpt & 0xFF);
+ m_nic_write(CTL_REG_ERXRDPTH, rxbuf_rdpt >> 8);
+ }
+
+ /* move to bank 1 */
+ m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL1);
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL0);
+
+ /* read pktcnt */
+ pkt_cnt = m_nic_read (CTL_REG_EPKTCNT);
+
+ /* switch to bank 0 */
+ m_nic_bfc (CTL_REG_ECON1,
+ (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
+
+ if (copy_len == 0) {
+ eir_reg = m_nic_read (CTL_REG_EIR);
+ encReceiverReset ();
+ printf ("eth_rx: copy_len=0\n");
+ continue;
+ }
+
+ NetReceive ((unsigned char *) buffer, pkt_len);
+
+ eir_reg = m_nic_read (CTL_REG_EIR);
+ } while (pkt_cnt); /* Use EPKTCNT not EIR.PKTIF flag, see errata pt. 6 */
+}
+
+static void encWriteReg (unsigned char regNo, unsigned char data)
+{
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0x40 | regNo); /* write in regNo */
+ spi_write (data);
+
+ enc_disable ();
+ enc_enable ();
+
+ spi_write (0x1f); /* write reg 0x1f */
+
+ enc_disable ();
+ spi_unlock ();
+}
+
+static void encWriteRegRetry (unsigned char regNo, unsigned char data, int c)
+{
+ unsigned char readback;
+ int i;
+
+ spi_lock ();
+
+ for (i = 0; i < c; i++) {
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0x40 | regNo); /* write in regNo */
+ spi_write (data);
+
+ enc_disable ();
+ enc_enable ();
+
+ spi_write (0x1f); /* write reg 0x1f */
+
+ enc_disable ();
+
+ spi_unlock (); /* we must unlock spi first */
+
+ readback = encReadReg (regNo);
+
+ spi_lock ();
+
+ if (readback == data)
+ break;
+ }
+ spi_unlock ();
+
+ if (i == c) {
+ printf ("enc28j60: write reg %d failed\n", regNo);
+ }
+}
+
+static unsigned char encReadReg (unsigned char regNo)
+{
+ unsigned char rxByte;
+
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0x1f); /* read reg 0x1f */
+
+ bank = spi_read () & 0x3;
+
+ enc_disable ();
+ enc_enable ();
+
+ spi_write (regNo);
+ rxByte = spi_read ();
+
+ /* check if MAC or MII register */
+ if (((bank == 2) && (regNo <= 0x1a)) ||
+ ((bank == 3) && (regNo <= 0x05 || regNo == 0x0a))) {
+ /* ignore first byte and read another byte */
+ rxByte = spi_read ();
+ }
+
+ enc_disable ();
+ spi_unlock ();
+
+ return rxByte;
+}
+
+static void encReadBuff (unsigned short length, unsigned char *pBuff)
+{
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0x20 | 0x1a); /* read buffer memory */
+
+ while (length--) {
+ if (pBuff != NULL)
+ *pBuff++ = spi_read ();
+ else
+ spi_write (0);
+ }
+
+ enc_disable ();
+ spi_unlock ();
+}
+
+static void encWriteBuff (unsigned short length, unsigned char *pBuff)
+{
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0x60 | 0x1a); /* write buffer memory */
+
+ spi_write (0x00); /* control byte */
+
+ while (length--)
+ spi_write (*pBuff++);
+
+ enc_disable ();
+ spi_unlock ();
+}
+
+static void encBitSet (unsigned char regNo, unsigned char data)
+{
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0x80 | regNo); /* bit field set */
+ spi_write (data);
+
+ enc_disable ();
+ spi_unlock ();
+}
+
+static void encBitClr (unsigned char regNo, unsigned char data)
+{
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0xA0 | regNo); /* bit field clear */
+ spi_write (data);
+
+ enc_disable ();
+ spi_unlock ();
+}
+
+static void encReset (void)
+{
+ spi_lock ();
+ enc_cfg_spi ();
+ enc_enable ();
+
+ spi_write (0xff); /* soft reset */
+
+ enc_disable ();
+ spi_unlock ();
+
+ /* sleep 1 ms. See errata pt. 2 */
+ udelay (1000);
+}
+
+static void encInit (unsigned char *pEthAddr)
+{
+ unsigned short phid1 = 0;
+ unsigned short phid2 = 0;
+
+ /* switch to bank 0 */
+ m_nic_bfc (CTL_REG_ECON1, (ENC_ECON1_BSEL1 | ENC_ECON1_BSEL0));
+
+ /*
+ * Setup the buffer space. The reset values are valid for the
+ * other pointers.
+ */
+ /* We shall not write to ERXST, see errata pt. 5. Instead we
+ have to make sure that ENC_RX_BUS_START is 0. */
+ m_nic_write_retry (CTL_REG_ERXSTL, (ENC_RX_BUF_START & 0xFF), 1);
+ m_nic_write_retry (CTL_REG_ERXSTH, (ENC_RX_BUF_START >> 8), 1);
+
+ /* taken from the Linux driver */
+ m_nic_write_retry (CTL_REG_ERXNDL, (ENC_RX_BUF_END & 0xFF), 1);
+ m_nic_write_retry (CTL_REG_ERXNDH, (ENC_RX_BUF_END >> 8), 1);
+
+ m_nic_write_retry (CTL_REG_ERDPTL, (ENC_RX_BUF_START & 0xFF), 1);
+ m_nic_write_retry (CTL_REG_ERDPTH, (ENC_RX_BUF_START >> 8), 1);
+
+ next_pointer_lsb = (ENC_RX_BUF_START & 0xFF);
+ next_pointer_msb = (ENC_RX_BUF_START >> 8);
+
+ /* verify identification */
+ phid1 = phyRead (PHY_REG_PHID1);
+ phid2 = phyRead (PHY_REG_PHID2);
+
+ if (phid1 != ENC_PHID1_VALUE
+ || (phid2 & ENC_PHID2_MASK) != ENC_PHID2_VALUE) {
+ printf ("ERROR: failed to identify controller\n");
+ printf ("phid1 = %x, phid2 = %x\n",
+ phid1, (phid2 & ENC_PHID2_MASK));
+ printf ("should be phid1 = %x, phid2 = %x\n",
+ ENC_PHID1_VALUE, ENC_PHID2_VALUE);
+ }
+
+ /*
+ * --- MAC Initialization ---
+ */
+
+ /* Pull MAC out of Reset */
+
+ /* switch to bank 2 */
+ m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0);
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1);
+
+ /* enable MAC to receive frames */
+ /* added some bits from the Linux driver */
+ m_nic_write_retry (CTL_REG_MACON1
+ ,(ENC_MACON1_MARXEN | ENC_MACON1_TXPAUS | ENC_MACON1_RXPAUS)
+ ,10);
+
+ /* configure pad, tx-crc and duplex */
+ /* added a bit from the Linux driver */
+ m_nic_write_retry (CTL_REG_MACON3
+ ,(ENC_MACON3_PADCFG0 | ENC_MACON3_TXCRCEN | ENC_MACON3_FRMLNEN)
+ ,10);
+
+ /* added 4 new lines from the Linux driver */
+ /* Allow infinite deferals if the medium is continously busy */
+ m_nic_write_retry(CTL_REG_MACON4, (1<<6) /*ENC_MACON4_DEFER*/, 10);
+
+ /* Late collisions occur beyond 63 bytes */
+ m_nic_write_retry(CTL_REG_MACLCON2, 63, 10);
+
+ /* Set (low byte) Non-Back-to_Back Inter-Packet Gap. Recommended 0x12 */
+ m_nic_write_retry(CTL_REG_MAIPGL, 0x12, 10);
+
+ /*
+ * Set (high byte) Non-Back-to_Back Inter-Packet Gap. Recommended
+ * 0x0c for half-duplex. Nothing for full-duplex
+ */
+ m_nic_write_retry(CTL_REG_MAIPGH, 0x0C, 10);
+
+ /* set maximum frame length */
+ m_nic_write_retry (CTL_REG_MAMXFLL, (ENC_MAX_FRM_LEN & 0xff), 10);
+ m_nic_write_retry (CTL_REG_MAMXFLH, (ENC_MAX_FRM_LEN >> 8), 10);
+
+ /*
+ * Set MAC back-to-back inter-packet gap. Recommended 0x12 for half duplex
+ * and 0x15 for full duplex.
+ */
+ m_nic_write_retry (CTL_REG_MABBIPG, 0x12, 10);
+
+ /* set MAC address */
+
+ /* switch to bank 3 */
+ m_nic_bfs (CTL_REG_ECON1, (ENC_ECON1_BSEL0 | ENC_ECON1_BSEL1));
+
+ m_nic_write_retry (CTL_REG_MAADR0, pEthAddr[5], 1);
+ m_nic_write_retry (CTL_REG_MAADR1, pEthAddr[4], 1);
+ m_nic_write_retry (CTL_REG_MAADR2, pEthAddr[3], 1);
+ m_nic_write_retry (CTL_REG_MAADR3, pEthAddr[2], 1);
+ m_nic_write_retry (CTL_REG_MAADR4, pEthAddr[1], 1);
+ m_nic_write_retry (CTL_REG_MAADR5, pEthAddr[0], 1);
+
+ /*
+ * PHY Initialization taken from the Linux driver
+ */
+
+ /* Prevent automatic loopback of data beeing transmitted by setting
+ ENC_PHCON2_HDLDIS */
+ phyWrite(PHY_REG_PHCON2, (1<<8));
+
+ /* LEDs configuration
+ * LEDA: LACFG = 0100 -> display link status
+ * LEDB: LBCFG = 0111 -> display TX & RX activity
+ * STRCH = 1 -> LED pulses
+ */
+ phyWrite(PHY_REG_PHLCON, 0x0472);
+
+ /* Reset PDPXMD-bit => half duplex */
+ phyWrite(PHY_REG_PHCON1, 0);
+
+ /*
+ * Receive settings
+ */
+
+#ifdef CONFIG_USE_IRQ
+ /* enable interrupts */
+ m_nic_bfs (CTL_REG_EIE, ENC_EIE_PKTIE);
+ m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXIE);
+ m_nic_bfs (CTL_REG_EIE, ENC_EIE_RXERIE);
+ m_nic_bfs (CTL_REG_EIE, ENC_EIE_TXERIE);
+ m_nic_bfs (CTL_REG_EIE, ENC_EIE_INTIE);
+#endif
+}
+
+/*****************************************************************************
+ *
+ * Description:
+ * Read PHY registers.
+ *
+ * NOTE! This function will change to Bank 2.
+ *
+ * Params:
+ * [in] addr address of the register to read
+ *
+ * Returns:
+ * The value in the register
+ */
+static unsigned short phyRead (unsigned char addr)
+{
+ unsigned short ret = 0;
+
+ /* move to bank 2 */
+ m_nic_bfc (CTL_REG_ECON1, ENC_ECON1_BSEL0);
+ m_nic_bfs (CTL_REG_ECON1, ENC_ECON1_BSEL1);
+
+ /* write address to MIREGADR */
+ m_nic_write (CTL_REG_MIREGADR, addr);
+
+ /* set MICMD.MIIRD */
+ m_nic_write (CTL_REG_MICMD, ENC_MICMD_MIIRD);
+
+ /* taken from the Linux driver */
+ /* move to bank 3 */
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL0);
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1);
+
+ /* poll MISTAT.BUSY bit until operation is complete */
+ while ((m_nic_read (CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) {
+ static int cnt = 0;
+
+ if (cnt++ >= 1000) {
+ /* GJ - this seems extremely dangerous! */
+ /* printf("#"); */
+ cnt = 0;
+ }
+ }
+
+ /* taken from the Linux driver */
+ /* move to bank 2 */
+ m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_BSEL0);
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1);
+
+ /* clear MICMD.MIIRD */
+ m_nic_write (CTL_REG_MICMD, 0);
+
+ ret = (m_nic_read (CTL_REG_MIRDH) << 8);
+ ret |= (m_nic_read (CTL_REG_MIRDL) & 0xFF);
+
+ return ret;
+}
+
+/*****************************************************************************
+ *
+ * Taken from the Linux driver.
+ * Description:
+ * Write PHY registers.
+ *
+ * NOTE! This function will change to Bank 3.
+ *
+ * Params:
+ * [in] addr address of the register to write to
+ * [in] data to be written
+ *
+ * Returns:
+ * None
+ */
+static void phyWrite(unsigned char addr, unsigned short data)
+{
+ /* move to bank 2 */
+ m_nic_bfc(CTL_REG_ECON1, ENC_ECON1_BSEL0);
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1);
+
+ /* write address to MIREGADR */
+ m_nic_write(CTL_REG_MIREGADR, addr);
+
+ m_nic_write(CTL_REG_MIWRL, data & 0xff);
+ m_nic_write(CTL_REG_MIWRH, data >> 8);
+
+ /* move to bank 3 */
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL0);
+ m_nic_bfs(CTL_REG_ECON1, ENC_ECON1_BSEL1);
+
+ /* poll MISTAT.BUSY bit until operation is complete */
+ while((m_nic_read(CTL_REG_MISTAT) & ENC_MISTAT_BUSY) != 0) {
+ static int cnt = 0;
+
+ if(cnt++ >= 1000) {
+ cnt = 0;
+ }
+ }
+}
+
+#endif /* CONFIG_ENC28J60 */
diff --git a/drivers/fsl_i2c.c b/drivers/fsl_i2c.c
index ebae5af..22485ea 100644
--- a/drivers/fsl_i2c.c
+++ b/drivers/fsl_i2c.c
@@ -69,9 +69,10 @@
dev = (struct fsl_i2c *) (CFG_IMMR + CFG_I2C2_OFFSET);
writeb(0, &dev->cr); /* stop I2C controller */
+ udelay(5); /* let it shutdown in peace */
writeb(0x3F, &dev->fdr); /* set bus speed */
writeb(0x3F, &dev->dfsrr); /* set default filter */
- writeb(slaveadd, &dev->adr); /* write slave address */
+ writeb(slaveadd << 1, &dev->adr); /* write slave address */
writeb(0x0, &dev->sr); /* clear status register */
writeb(I2C_CR_MEN, &dev->cr); /* start I2C controller */
#endif /* CFG_I2C2_OFFSET */
diff --git a/drivers/fsl_pci_init.c b/drivers/fsl_pci_init.c
new file mode 100644
index 0000000..3a13eea
--- /dev/null
+++ b/drivers/fsl_pci_init.c
@@ -0,0 +1,169 @@
+/*
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_FSL_PCI_INIT
+
+/*
+ * PCI/PCIE Controller initialization for mpc85xx/mpc86xx soc's
+ *
+ * Initialize controller and call the common driver/pci pci_hose_scan to
+ * scan for bridges and devices.
+ *
+ * Hose fields which need to be pre-initialized by board specific code:
+ * regions[]
+ * first_busno
+ *
+ * Fields updated:
+ * last_busno
+ */
+
+#include <pci.h>
+#include <asm/immap_fsl_pci.h>
+
+void pciauto_prescan_setup_bridge(struct pci_controller *hose,
+ pci_dev_t dev, int sub_bus);
+void pciauto_postscan_setup_bridge(struct pci_controller *hose,
+ pci_dev_t dev, int sub_bus);
+
+void pciauto_config_init(struct pci_controller *hose);
+void
+fsl_pci_init(struct pci_controller *hose)
+{
+ u16 temp16;
+ u32 temp32;
+ int busno = hose->first_busno;
+ int enabled;
+ u16 ltssm;
+ u8 temp8;
+ int r;
+ int bridge;
+ volatile ccsr_fsl_pci_t *pci = (ccsr_fsl_pci_t *) hose->cfg_addr;
+ pci_dev_t dev = PCI_BDF(busno,0,0);
+
+ /* Initialize ATMU registers based on hose regions and flags */
+ volatile pot_t *po=&pci->pot[1]; /* skip 0 */
+ volatile pit_t *pi=&pci->pit[0]; /* ranges from: 3 to 1 */
+
+#ifdef DEBUG
+ int neg_link_w;
+#endif
+
+ for (r=0; r<hose->region_count; r++) {
+ if (hose->regions[r].flags & PCI_REGION_MEMORY) { /* inbound */
+ pi->pitar = (hose->regions[r].bus_start >> 12) & 0x000fffff;
+ pi->piwbar = (hose->regions[r].phys_start >> 12) & 0x000fffff;
+ pi->piwbear = 0;
+ pi->piwar = PIWAR_EN | PIWAR_PF | PIWAR_LOCAL |
+ PIWAR_READ_SNOOP | PIWAR_WRITE_SNOOP |
+ (__ilog2(hose->regions[r].size) - 1);
+ pi++;
+ } else { /* Outbound */
+ po->powbar = (hose->regions[r].phys_start >> 12) & 0x000fffff;
+ po->potar = (hose->regions[r].bus_start >> 12) & 0x000fffff;
+ po->potear = 0;
+ if (hose->regions[r].flags & PCI_REGION_IO)
+ po->powar = POWAR_EN | POWAR_IO_READ | POWAR_IO_WRITE |
+ (__ilog2(hose->regions[r].size) - 1);
+ else
+ po->powar = POWAR_EN | POWAR_MEM_READ | POWAR_MEM_WRITE |
+ (__ilog2(hose->regions[r].size) - 1);
+ po++;
+ }
+ }
+
+ pci_register_hose(hose);
+ pciauto_config_init(hose); /* grab pci_{mem,prefetch,io} */
+ hose->current_busno = hose->first_busno;
+
+ pci->pedr = 0xffffffff; /* Clear any errors */
+ pci->peer = ~0x20140; /* Enable All Error Interupts except
+ * - Master abort (pci)
+ * - Master PERR (pci)
+ * - ICCA (PCIe)
+ */
+ pci_hose_read_config_dword (hose, dev, PCI_DCR, &temp32);
+ temp32 |= 0xf000e; /* set URR, FER, NFER (but not CER) */
+ pci_hose_write_config_dword(hose, dev, PCI_DCR, temp32);
+
+ pci_hose_read_config_byte (hose, dev, PCI_HEADER_TYPE, &temp8);
+ bridge = temp8 & PCI_HEADER_TYPE_BRIDGE; /* Bridge, such as pcie */
+
+ if ( bridge ) {
+
+ pci_hose_read_config_word(hose, dev, PCI_LTSSM, <ssm);
+ enabled = ltssm >= PCI_LTSSM_L0;
+
+ if (!enabled) {
+ debug("....PCIE link error. Skipping scan."
+ "LTSSM=0x%02x\n", ltssm);
+ hose->last_busno = hose->first_busno;
+ return;
+ }
+
+ pci->pme_msg_det = 0xffffffff;
+ pci->pme_msg_int_en = 0xffffffff;
+#ifdef DEBUG
+ pci_hose_read_config_word(hose, dev, PCI_LSR, &temp16);
+ neg_link_w = (temp16 & 0x3f0 ) >> 4;
+ printf("...PCIE LTSSM=0x%x, Negotiated link width=%d\n",
+ ltssm, neg_link_w);
+#endif
+ hose->current_busno++; /* Start scan with secondary */
+ pciauto_prescan_setup_bridge(hose, dev, hose->current_busno);
+
+ }
+
+ /* Use generic setup_device to initialize standard pci regs,
+ * but do not allocate any windows since any BAR found (such
+ * as PCSRBAR) is not in this cpu's memory space.
+ */
+
+ pciauto_setup_device(hose, dev, 0, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
+
+#ifndef CONFIG_PCI_NOSCAN
+ printf (" Scanning PCI bus %02x\n", hose->current_busno);
+ hose->last_busno = pci_hose_scan_bus(hose,hose->current_busno);
+
+ if ( bridge ) { /* update limit regs and subordinate busno */
+ pciauto_postscan_setup_bridge(hose, dev, hose->last_busno);
+ }
+#else
+ hose->last_busno = hose->current_busno;
+#endif
+
+ /* Clear all error indications */
+
+ pci->pme_msg_det = 0xffffffff;
+ pci->pedr = 0xffffffff;
+
+ pci_hose_read_config_word (hose, dev, PCI_DSR, &temp16);
+ if (temp16) {
+ pci_hose_write_config_word(hose, dev,
+ PCI_DSR, 0xffff);
+ }
+
+ pci_hose_read_config_word (hose, dev, PCI_SEC_STATUS, &temp16);
+ if (temp16) {
+ pci_hose_write_config_word(hose, dev, PCI_SEC_STATUS, 0xffff);
+ }
+}
+
+#endif /* CONFIG_FSL_PCI */
diff --git a/drivers/inca-ip_sw.c b/drivers/inca-ip_sw.c
index ab22b4d..e4aaed6 100644
--- a/drivers/inca-ip_sw.c
+++ b/drivers/inca-ip_sw.c
@@ -26,8 +26,8 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) \
- && defined(CONFIG_INCA_IP_SWITCH)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_INCA_IP_SWITCH)
#include <malloc.h>
#include <net.h>
diff --git a/drivers/isp116x-hcd.c b/drivers/isp116x-hcd.c
new file mode 100644
index 0000000..8e2bc7a
--- /dev/null
+++ b/drivers/isp116x-hcd.c
@@ -0,0 +1,1413 @@
+/*
+ * ISP116x HCD (Host Controller Driver) for u-boot.
+ *
+ * Copyright (C) 2006-2007 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (C) 2006-2007 Eurotech S.p.A. <info@eurotech.it>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ *
+ * Derived in part from the SL811 HCD driver "u-boot/drivers/sl811_usb.c"
+ * (original copyright message follows):
+ *
+ * (C) Copyright 2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This code is based on linux driver for sl811hs chip, source at
+ * drivers/usb/host/sl811.c:
+ *
+ * SL811 Host Controller Interface driver for USB.
+ *
+ * Copyright (c) 2003/06, Courage Co., Ltd.
+ *
+ * Based on:
+ * 1.uhci.c by Linus Torvalds, Johannes Erdfelt, Randy Dunlap,
+ * Georg Acher, Deti Fliegl, Thomas Sailer, Roman Weissgaerber,
+ * Adam Richter, Gregory P. Smith;
+ * 2.Original SL811 driver (hc_sl811.o) by Pei Liu <pbl@cypress.com>
+ * 3.Rewrited as sl811.o by Yin Aihua <yinah:couragetech.com.cn>
+ *
+ * [[GNU/GPL disclaimer]]
+ *
+ * and in part from AU1x00 OHCI HCD driver "u-boot/cpu/mips/au1x00_usb_ohci.c"
+ * (original copyright message follows):
+ *
+ * URB OHCI HCD (Host Controller Driver) for USB on the AU1x00.
+ *
+ * (C) Copyright 2003
+ * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
+ *
+ * [[GNU/GPL disclaimer]]
+ *
+ * Note: Part of this code has been derived from linux
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_USB_ISP116X_HCD
+#include <asm/io.h>
+#include <usb.h>
+#include <malloc.h>
+#include <linux/list.h>
+
+/*
+ * ISP116x chips require certain delays between accesses to its
+ * registers. The following timing options exist.
+ *
+ * 1. Configure your memory controller (the best)
+ * 2. Use ndelay (easiest, poorest). For that, enable the following macro.
+ *
+ * Value is in microseconds.
+ */
+#ifdef ISP116X_HCD_USE_UDELAY
+#define UDELAY 1
+#endif
+
+/*
+ * On some (slowly?) machines an extra delay after data packing into
+ * controller's FIFOs is required, * otherwise you may get the following
+ * error:
+ *
+ * uboot> usb start
+ * (Re)start USB...
+ * USB: scanning bus for devices... isp116x: isp116x_submit_job: CTL:TIMEOUT
+ * isp116x: isp116x_submit_job: ****** FIFO not ready! ******
+ *
+ * USB device not responding, giving up (status=4)
+ * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
+ * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
+ * isp116x: isp116x_submit_job: ****** FIFO not empty! ******
+ * 3 USB Device(s) found
+ * scanning bus for storage devices... 0 Storage Device(s) found
+ *
+ * Value is in milliseconds.
+ */
+#ifdef ISP116X_HCD_USE_EXTRA_DELAY
+#define EXTRA_DELAY 2
+#endif
+
+/*
+ * Enable the following defines if you wish enable debugging messages.
+ */
+#undef DEBUG /* enable debugging messages */
+#undef TRACE /* enable tracing code */
+#undef VERBOSE /* verbose debugging messages */
+
+#include "isp116x.h"
+
+#define DRIVER_VERSION "08 Jan 2007"
+static const char hcd_name[] = "isp116x-hcd";
+
+struct isp116x isp116x_dev;
+struct isp116x_platform_data isp116x_board;
+int got_rhsc = 0; /* root hub status change */
+struct usb_device *devgone; /* device which was disconnected */
+int rh_devnum = 0; /* address of Root Hub endpoint */
+
+/* ------------------------------------------------------------------------- */
+
+#define ALIGN(x,a) (((x)+(a)-1UL)&~((a)-1UL))
+#define min_t(type,x,y) \
+ ({ type __x = (x); type __y = (y); __x < __y ? __x : __y; })
+
+/* ------------------------------------------------------------------------- */
+
+static int isp116x_reset(struct isp116x *isp116x);
+
+/* --- Debugging functions ------------------------------------------------- */
+
+#define isp116x_show_reg(d, r) { \
+ if ((r) < 0x20) { \
+ DBG("%-12s[%02x]: %08x", #r, \
+ r, isp116x_read_reg32(d, r)); \
+ } else { \
+ DBG("%-12s[%02x]: %04x", #r, \
+ r, isp116x_read_reg16(d, r)); \
+ } \
+}
+
+#define isp116x_show_regs(d) { \
+ isp116x_show_reg(d, HCREVISION); \
+ isp116x_show_reg(d, HCCONTROL); \
+ isp116x_show_reg(d, HCCMDSTAT); \
+ isp116x_show_reg(d, HCINTSTAT); \
+ isp116x_show_reg(d, HCINTENB); \
+ isp116x_show_reg(d, HCFMINTVL); \
+ isp116x_show_reg(d, HCFMREM); \
+ isp116x_show_reg(d, HCFMNUM); \
+ isp116x_show_reg(d, HCLSTHRESH); \
+ isp116x_show_reg(d, HCRHDESCA); \
+ isp116x_show_reg(d, HCRHDESCB); \
+ isp116x_show_reg(d, HCRHSTATUS); \
+ isp116x_show_reg(d, HCRHPORT1); \
+ isp116x_show_reg(d, HCRHPORT2); \
+ isp116x_show_reg(d, HCHWCFG); \
+ isp116x_show_reg(d, HCDMACFG); \
+ isp116x_show_reg(d, HCXFERCTR); \
+ isp116x_show_reg(d, HCuPINT); \
+ isp116x_show_reg(d, HCuPINTENB); \
+ isp116x_show_reg(d, HCCHIPID); \
+ isp116x_show_reg(d, HCSCRATCH); \
+ isp116x_show_reg(d, HCITLBUFLEN); \
+ isp116x_show_reg(d, HCATLBUFLEN); \
+ isp116x_show_reg(d, HCBUFSTAT); \
+ isp116x_show_reg(d, HCRDITL0LEN); \
+ isp116x_show_reg(d, HCRDITL1LEN); \
+}
+
+#if defined(TRACE)
+
+static int isp116x_get_current_frame_number(struct usb_device *usb_dev)
+{
+ struct isp116x *isp116x = &isp116x_dev;
+
+ return isp116x_read_reg32(isp116x, HCFMNUM);
+}
+
+static void dump_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int len, char *str)
+{
+#if defined(VERBOSE)
+ int i;
+#endif
+
+ DBG("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d stat:%#lx",
+ str,
+ isp116x_get_current_frame_number(dev),
+ usb_pipedevice(pipe),
+ usb_pipeendpoint(pipe),
+ usb_pipeout(pipe) ? 'O' : 'I',
+ usb_pipetype(pipe) < 2 ?
+ (usb_pipeint(pipe) ?
+ "INTR" : "ISOC") :
+ (usb_pipecontrol(pipe) ? "CTRL" : "BULK"), len, dev->status);
+#if defined(VERBOSE)
+ if (len > 0 && buffer) {
+ printf(__FILE__ ": data(%d):", len);
+ for (i = 0; i < 16 && i < len; i++)
+ printf(" %02x", ((__u8 *) buffer)[i]);
+ printf("%s\n", i < len ? "..." : "");
+ }
+#endif
+}
+
+#define PTD_DIR_STR(ptd) ({char __c; \
+ switch(PTD_GET_DIR(ptd)){ \
+ case 0: __c = 's'; break; \
+ case 1: __c = 'o'; break; \
+ default: __c = 'i'; break; \
+ }; __c;})
+
+/*
+ Dump PTD info. The code documents the format
+ perfectly, right :)
+*/
+static inline void dump_ptd(struct ptd *ptd)
+{
+#if defined(VERBOSE)
+ int k;
+#endif
+
+ DBG("PTD(ext) : cc:%x %d%c%d %d,%d,%d t:%x %x%x%x",
+ PTD_GET_CC(ptd),
+ PTD_GET_FA(ptd), PTD_DIR_STR(ptd), PTD_GET_EP(ptd),
+ PTD_GET_COUNT(ptd), PTD_GET_LEN(ptd), PTD_GET_MPS(ptd),
+ PTD_GET_TOGGLE(ptd),
+ PTD_GET_ACTIVE(ptd), PTD_GET_SPD(ptd), PTD_GET_LAST(ptd));
+#if defined(VERBOSE)
+ printf("isp116x: %s: PTD(byte): ", __FUNCTION__);
+ for (k = 0; k < sizeof(struct ptd); ++k)
+ printf("%02x ", ((u8 *) ptd)[k]);
+ printf("\n");
+#endif
+}
+
+static inline void dump_ptd_data(struct ptd *ptd, u8 * buf, int type)
+{
+#if defined(VERBOSE)
+ int k;
+
+ if (type == 0 /* 0ut data */ ) {
+ printf("isp116x: %s: out data: ", __FUNCTION__);
+ for (k = 0; k < PTD_GET_LEN(ptd); ++k)
+ printf("%02x ", ((u8 *) buf)[k]);
+ printf("\n");
+ }
+ if (type == 1 /* 1n data */ ) {
+ printf("isp116x: %s: in data: ", __FUNCTION__);
+ for (k = 0; k < PTD_GET_COUNT(ptd); ++k)
+ printf("%02x ", ((u8 *) buf)[k]);
+ printf("\n");
+ }
+
+ if (PTD_GET_LAST(ptd))
+ DBG("--- last PTD ---");
+#endif
+}
+
+#else
+
+#define dump_msg(dev, pipe, buffer, len, str) do { } while (0)
+#define dump_pkt(dev, pipe, buffer, len, setup, str, small) do {} while (0)
+
+#define dump_ptd(ptd) do {} while (0)
+#define dump_ptd_data(ptd, buf, type) do {} while (0)
+
+#endif
+
+/* --- Virtual Root Hub ---------------------------------------------------- */
+
+/* Device descriptor */
+static __u8 root_hub_dev_des[] = {
+ 0x12, /* __u8 bLength; */
+ 0x01, /* __u8 bDescriptorType; Device */
+ 0x10, /* __u16 bcdUSB; v1.1 */
+ 0x01,
+ 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
+ 0x00, /* __u8 bDeviceSubClass; */
+ 0x00, /* __u8 bDeviceProtocol; */
+ 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
+ 0x00, /* __u16 idVendor; */
+ 0x00,
+ 0x00, /* __u16 idProduct; */
+ 0x00,
+ 0x00, /* __u16 bcdDevice; */
+ 0x00,
+ 0x00, /* __u8 iManufacturer; */
+ 0x01, /* __u8 iProduct; */
+ 0x00, /* __u8 iSerialNumber; */
+ 0x01 /* __u8 bNumConfigurations; */
+};
+
+/* Configuration descriptor */
+static __u8 root_hub_config_des[] = {
+ 0x09, /* __u8 bLength; */
+ 0x02, /* __u8 bDescriptorType; Configuration */
+ 0x19, /* __u16 wTotalLength; */
+ 0x00,
+ 0x01, /* __u8 bNumInterfaces; */
+ 0x01, /* __u8 bConfigurationValue; */
+ 0x00, /* __u8 iConfiguration; */
+ 0x40, /* __u8 bmAttributes;
+ Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
+ 0x00, /* __u8 MaxPower; */
+
+ /* interface */
+ 0x09, /* __u8 if_bLength; */
+ 0x04, /* __u8 if_bDescriptorType; Interface */
+ 0x00, /* __u8 if_bInterfaceNumber; */
+ 0x00, /* __u8 if_bAlternateSetting; */
+ 0x01, /* __u8 if_bNumEndpoints; */
+ 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
+ 0x00, /* __u8 if_bInterfaceSubClass; */
+ 0x00, /* __u8 if_bInterfaceProtocol; */
+ 0x00, /* __u8 if_iInterface; */
+
+ /* endpoint */
+ 0x07, /* __u8 ep_bLength; */
+ 0x05, /* __u8 ep_bDescriptorType; Endpoint */
+ 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
+ 0x03, /* __u8 ep_bmAttributes; Interrupt */
+ 0x00, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
+ 0x02,
+ 0xff /* __u8 ep_bInterval; 255 ms */
+};
+
+static unsigned char root_hub_str_index0[] = {
+ 0x04, /* __u8 bLength; */
+ 0x03, /* __u8 bDescriptorType; String-descriptor */
+ 0x09, /* __u8 lang ID */
+ 0x04, /* __u8 lang ID */
+};
+
+static unsigned char root_hub_str_index1[] = {
+ 0x22, /* __u8 bLength; */
+ 0x03, /* __u8 bDescriptorType; String-descriptor */
+ 'I', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'S', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'P', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ '1', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ '1', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ '6', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'x', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ ' ', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'R', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'o', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'o', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 't', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ ' ', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'H', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'u', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'b', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+};
+
+/*
+ * Hub class-specific descriptor is constructed dynamically
+ */
+
+/* --- Virtual root hub management functions ------------------------------- */
+
+static int rh_check_port_status(struct isp116x *isp116x)
+{
+ u32 temp, ndp, i;
+ int res;
+
+ res = -1;
+ temp = isp116x_read_reg32(isp116x, HCRHSTATUS);
+ ndp = (temp & RH_A_NDP);
+ for (i = 0; i < ndp; i++) {
+ temp = isp116x_read_reg32(isp116x, HCRHPORT1 + i);
+ /* check for a device disconnect */
+ if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
+ (RH_PS_PESC | RH_PS_CSC)) && ((temp & RH_PS_CCS) == 0)) {
+ res = i;
+ break;
+ }
+ }
+ return res;
+}
+
+/* --- HC management functions --------------------------------------------- */
+
+/* Write len bytes to fifo, pad till 32-bit boundary
+ */
+static void write_ptddata_to_fifo(struct isp116x *isp116x, void *buf, int len)
+{
+ u8 *dp = (u8 *) buf;
+ u16 *dp2 = (u16 *) buf;
+ u16 w;
+ int quot = len % 4;
+
+ if ((unsigned long)dp2 & 1) {
+ /* not aligned */
+ for (; len > 1; len -= 2) {
+ w = *dp++;
+ w |= *dp++ << 8;
+ isp116x_raw_write_data16(isp116x, w);
+ }
+ if (len)
+ isp116x_write_data16(isp116x, (u16) * dp);
+ } else {
+ /* aligned */
+ for (; len > 1; len -= 2)
+ isp116x_raw_write_data16(isp116x, *dp2++);
+ if (len)
+ isp116x_write_data16(isp116x, 0xff & *((u8 *) dp2));
+ }
+ if (quot == 1 || quot == 2)
+ isp116x_raw_write_data16(isp116x, 0);
+}
+
+/* Read len bytes from fifo and then read till 32-bit boundary
+ */
+static void read_ptddata_from_fifo(struct isp116x *isp116x, void *buf, int len)
+{
+ u8 *dp = (u8 *) buf;
+ u16 *dp2 = (u16 *) buf;
+ u16 w;
+ int quot = len % 4;
+
+ if ((unsigned long)dp2 & 1) {
+ /* not aligned */
+ for (; len > 1; len -= 2) {
+ w = isp116x_raw_read_data16(isp116x);
+ *dp++ = w & 0xff;
+ *dp++ = (w >> 8) & 0xff;
+ }
+ if (len)
+ *dp = 0xff & isp116x_read_data16(isp116x);
+ } else {
+ /* aligned */
+ for (; len > 1; len -= 2)
+ *dp2++ = isp116x_raw_read_data16(isp116x);
+ if (len)
+ *(u8 *) dp2 = 0xff & isp116x_read_data16(isp116x);
+ }
+ if (quot == 1 || quot == 2)
+ isp116x_raw_read_data16(isp116x);
+}
+
+/* Write PTD's and data for scheduled transfers into the fifo ram.
+ * Fifo must be empty and ready */
+static void pack_fifo(struct isp116x *isp116x, struct usb_device *dev,
+ unsigned long pipe, struct ptd *ptd, int n, void *data,
+ int len)
+{
+ int buflen = n * sizeof(struct ptd) + len;
+ int i, done;
+
+ DBG("--- pack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
+
+ isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
+ isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
+ isp116x_write_addr(isp116x, HCATLPORT | ISP116x_WRITE_OFFSET);
+
+ done = 0;
+ for (i = 0; i < n; i++) {
+ DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
+
+ dump_ptd(&ptd[i]);
+ isp116x_write_data16(isp116x, ptd[i].count);
+ isp116x_write_data16(isp116x, ptd[i].mps);
+ isp116x_write_data16(isp116x, ptd[i].len);
+ isp116x_write_data16(isp116x, ptd[i].faddr);
+
+ dump_ptd_data(&ptd[i], (__u8 *) data + done, 0);
+ write_ptddata_to_fifo(isp116x,
+ (__u8 *) data + done,
+ PTD_GET_LEN(&ptd[i]));
+
+ done += PTD_GET_LEN(&ptd[i]);
+ }
+}
+
+/* Read the processed PTD's and data from fifo ram back to URBs' buffers.
+ * Fifo must be full and done */
+static int unpack_fifo(struct isp116x *isp116x, struct usb_device *dev,
+ unsigned long pipe, struct ptd *ptd, int n, void *data,
+ int len)
+{
+ int buflen = n * sizeof(struct ptd) + len;
+ int i, done, cc, ret;
+
+ isp116x_write_reg16(isp116x, HCuPINT, HCuPINT_AIIEOT);
+ isp116x_write_reg16(isp116x, HCXFERCTR, buflen);
+ isp116x_write_addr(isp116x, HCATLPORT);
+
+ ret = TD_CC_NOERROR;
+ done = 0;
+ for (i = 0; i < n; i++) {
+ DBG("i=%d - done=%d - len=%d", i, done, PTD_GET_LEN(&ptd[i]));
+
+ ptd[i].count = isp116x_read_data16(isp116x);
+ ptd[i].mps = isp116x_read_data16(isp116x);
+ ptd[i].len = isp116x_read_data16(isp116x);
+ ptd[i].faddr = isp116x_read_data16(isp116x);
+ dump_ptd(&ptd[i]);
+
+ read_ptddata_from_fifo(isp116x,
+ (__u8 *) data + done,
+ PTD_GET_LEN(&ptd[i]));
+ dump_ptd_data(&ptd[i], (__u8 *) data + done, 1);
+
+ done += PTD_GET_LEN(&ptd[i]);
+
+ cc = PTD_GET_CC(&ptd[i]);
+ if (cc == TD_DATAUNDERRUN) { /* underrun is no error... */
+ DBG("allowed data underrun");
+ cc = TD_CC_NOERROR;
+ }
+ if (cc != TD_CC_NOERROR && ret == TD_CC_NOERROR)
+ ret = cc;
+ }
+
+ DBG("--- unpack buffer %p - %d bytes (fifo %d) ---", data, len, buflen);
+
+ return ret;
+}
+
+/* Interrupt handling
+ */
+static int isp116x_interrupt(struct isp116x *isp116x)
+{
+ u16 irqstat;
+ u32 intstat;
+ int ret = 0;
+
+ isp116x_write_reg16(isp116x, HCuPINTENB, 0);
+ irqstat = isp116x_read_reg16(isp116x, HCuPINT);
+ isp116x_write_reg16(isp116x, HCuPINT, irqstat);
+ DBG(">>>>>> irqstat %x <<<<<<", irqstat);
+
+ if (irqstat & HCuPINT_ATL) {
+ DBG(">>>>>> HCuPINT_ATL <<<<<<");
+ udelay(500);
+ ret = 1;
+ }
+
+ if (irqstat & HCuPINT_OPR) {
+ intstat = isp116x_read_reg32(isp116x, HCINTSTAT);
+ isp116x_write_reg32(isp116x, HCINTSTAT, intstat);
+ DBG(">>>>>> HCuPINT_OPR %x <<<<<<", intstat);
+
+ if (intstat & HCINT_UE) {
+ ERR("unrecoverable error, controller disabled");
+
+ /* FIXME: be optimistic, hope that bug won't repeat
+ * often. Make some non-interrupt context restart the
+ * controller. Count and limit the retries though;
+ * either hardware or software errors can go forever...
+ */
+ isp116x_reset(isp116x);
+ ret = -1;
+ return -1;
+ }
+
+ if (intstat & HCINT_RHSC) {
+ got_rhsc = 1;
+ ret = 1;
+ /* When root hub or any of its ports is going
+ to come out of suspend, it may take more
+ than 10ms for status bits to stabilize. */
+ wait_ms(20);
+ }
+
+ if (intstat & HCINT_SO) {
+ ERR("schedule overrun");
+ ret = -1;
+ }
+
+ irqstat &= ~HCuPINT_OPR;
+ }
+
+ return ret;
+}
+
+#define PTD_NUM 64 /* it should be enougth... */
+struct ptd ptd[PTD_NUM];
+static inline int max_transfer_len(struct usb_device *dev, unsigned long pipe)
+{
+ return min(PTD_NUM * usb_maxpacket(dev, pipe), PTD_NUM * 16);
+}
+
+/* Do an USB transfer
+ */
+static int isp116x_submit_job(struct usb_device *dev, unsigned long pipe,
+ int dir, void *buffer, int len)
+{
+ struct isp116x *isp116x = &isp116x_dev;
+ int type = usb_pipetype(pipe);
+ int epnum = usb_pipeendpoint(pipe);
+ int max = usb_maxpacket(dev, pipe);
+ int dir_out = usb_pipeout(pipe);
+ int speed_low = usb_pipeslow(pipe);
+ int i, done, stat, timeout, cc;
+ int retries = 10;
+
+ DBG("------------------------------------------------");
+ dump_msg(dev, pipe, buffer, len, "SUBMIT");
+ DBG("------------------------------------------------");
+
+ if (isp116x->disabled) {
+ ERR("EPIPE");
+ dev->status = USB_ST_CRC_ERR;
+ return -1;
+ }
+
+ /* device pulled? Shortcut the action. */
+ if (devgone == dev) {
+ ERR("ENODEV");
+ dev->status = USB_ST_CRC_ERR;
+ return USB_ST_CRC_ERR;
+ }
+
+ if (!max) {
+ ERR("pipesize for pipe %lx is zero", pipe);
+ dev->status = USB_ST_CRC_ERR;
+ return -1;
+ }
+
+ if (type == PIPE_ISOCHRONOUS) {
+ ERR("isochronous transfers not supported");
+ dev->status = USB_ST_CRC_ERR;
+ return -1;
+ }
+
+ /* FIFO not empty? */
+ if (isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_FULL) {
+ ERR("****** FIFO not empty! ******");
+ dev->status = USB_ST_BUF_ERR;
+ return -1;
+ }
+
+ retry:
+ isp116x_write_reg32(isp116x, HCINTSTAT, 0xff);
+
+ /* Prepare the PTD data */
+ done = 0;
+ i = 0;
+ do {
+ ptd[i].count = PTD_CC_MSK | PTD_ACTIVE_MSK |
+ PTD_TOGGLE(usb_gettoggle(dev, epnum, dir_out));
+ ptd[i].mps = PTD_MPS(max) | PTD_SPD(speed_low) | PTD_EP(epnum);
+ ptd[i].len = PTD_LEN(max > len - done ? len - done : max) |
+ PTD_DIR(dir);
+ ptd[i].faddr = PTD_FA(usb_pipedevice(pipe));
+
+ usb_dotoggle(dev, epnum, dir_out);
+ done += PTD_GET_LEN(&ptd[i]);
+ i++;
+ if (i >= PTD_NUM) {
+ ERR("****** Cannot pack buffer! ******");
+ dev->status = USB_ST_BUF_ERR;
+ return -1;
+ }
+ } while (done < len);
+ ptd[i - 1].mps |= PTD_LAST_MSK;
+
+ /* Pack data into FIFO ram */
+ pack_fifo(isp116x, dev, pipe, ptd, i, buffer, len);
+#ifdef EXTRA_DELAY
+ wait_ms(EXTRA_DELAY);
+#endif
+
+ /* Start the data transfer */
+
+ /* Allow more time for a BULK device to react - some are slow */
+ if (usb_pipetype(pipe) == PIPE_BULK)
+ timeout = 5000;
+ else
+ timeout = 100;
+
+ /* Wait for it to complete */
+ for (;;) {
+ /* Check whether the controller is done */
+ stat = isp116x_interrupt(isp116x);
+
+ if (stat < 0) {
+ dev->status = USB_ST_CRC_ERR;
+ break;
+ }
+ if (stat > 0)
+ break;
+
+ /* Check the timeout */
+ if (--timeout)
+ udelay(1);
+ else {
+ ERR("CTL:TIMEOUT ");
+ stat = USB_ST_CRC_ERR;
+ break;
+ }
+ }
+
+ /* We got an Root Hub Status Change interrupt */
+ if (got_rhsc) {
+ isp116x_show_regs(isp116x);
+
+ got_rhsc = 0;
+
+ /* Abuse timeout */
+ timeout = rh_check_port_status(isp116x);
+ if (timeout >= 0) {
+ /*
+ * FIXME! NOTE! AAAARGH!
+ * This is potentially dangerous because it assumes
+ * that only one device is ever plugged in!
+ */
+ devgone = dev;
+ }
+ }
+
+ /* Ok, now we can read transfer status */
+
+ /* FIFO not ready? */
+ if (!(isp116x_read_reg16(isp116x, HCBUFSTAT) & HCBUFSTAT_ATL_DONE)) {
+ ERR("****** FIFO not ready! ******");
+ dev->status = USB_ST_BUF_ERR;
+ return -1;
+ }
+
+ /* Unpack data from FIFO ram */
+ cc = unpack_fifo(isp116x, dev, pipe, ptd, i, buffer, len);
+
+ /* Mmm... sometime we get 0x0f as cc which is a non sense!
+ * Just retry the transfer...
+ */
+ if (cc == 0x0f && retries-- > 0) {
+ usb_dotoggle(dev, epnum, dir_out);
+ goto retry;
+ }
+
+ if (cc != TD_CC_NOERROR) {
+ DBG("****** completition code error %x ******", cc);
+ switch (cc) {
+ case TD_CC_BITSTUFFING:
+ dev->status = USB_ST_BIT_ERR;
+ break;
+ case TD_CC_STALL:
+ dev->status = USB_ST_STALLED;
+ break;
+ case TD_BUFFEROVERRUN:
+ case TD_BUFFERUNDERRUN:
+ dev->status = USB_ST_BUF_ERR;
+ break;
+ default:
+ dev->status = USB_ST_CRC_ERR;
+ }
+ return -cc;
+ }
+
+ dump_msg(dev, pipe, buffer, len, "SUBMIT(ret)");
+
+ dev->status = 0;
+ return done;
+}
+
+/* Adapted from au1x00_usb_ohci.c
+ */
+static int isp116x_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
+ void *buffer, int transfer_len,
+ struct devrequest *cmd)
+{
+ struct isp116x *isp116x = &isp116x_dev;
+ u32 tmp = 0;
+
+ int leni = transfer_len;
+ int len = 0;
+ int stat = 0;
+ u32 datab[4];
+ u8 *data_buf = (u8 *) datab;
+ u16 bmRType_bReq;
+ u16 wValue;
+ u16 wIndex;
+ u16 wLength;
+
+ if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
+ INFO("Root-Hub submit IRQ: NOT implemented");
+ return 0;
+ }
+
+ bmRType_bReq = cmd->requesttype | (cmd->request << 8);
+ wValue = swap_16(cmd->value);
+ wIndex = swap_16(cmd->index);
+ wLength = swap_16(cmd->length);
+
+ DBG("--- HUB ----------------------------------------");
+ DBG("submit rh urb, req=%x val=%#x index=%#x len=%d",
+ bmRType_bReq, wValue, wIndex, wLength);
+ dump_msg(dev, pipe, buffer, transfer_len, "RH");
+ DBG("------------------------------------------------");
+
+ switch (bmRType_bReq) {
+ case RH_GET_STATUS:
+ DBG("RH_GET_STATUS");
+
+ *(__u16 *) data_buf = swap_16(1);
+ len = 2;
+ break;
+
+ case RH_GET_STATUS | RH_INTERFACE:
+ DBG("RH_GET_STATUS | RH_INTERFACE");
+
+ *(__u16 *) data_buf = swap_16(0);
+ len = 2;
+ break;
+
+ case RH_GET_STATUS | RH_ENDPOINT:
+ DBG("RH_GET_STATUS | RH_ENDPOINT");
+
+ *(__u16 *) data_buf = swap_16(0);
+ len = 2;
+ break;
+
+ case RH_GET_STATUS | RH_CLASS:
+ DBG("RH_GET_STATUS | RH_CLASS");
+
+ tmp = isp116x_read_reg32(isp116x, HCRHSTATUS);
+
+ *(__u32 *) data_buf = swap_32(tmp & ~(RH_HS_CRWE | RH_HS_DRWE));
+ len = 4;
+ break;
+
+ case RH_GET_STATUS | RH_OTHER | RH_CLASS:
+ DBG("RH_GET_STATUS | RH_OTHER | RH_CLASS");
+
+ tmp = isp116x_read_reg32(isp116x, HCRHPORT1 + wIndex - 1);
+ *(__u32 *) data_buf = swap_32(tmp);
+ isp116x_show_regs(isp116x);
+ len = 4;
+ break;
+
+ case RH_CLEAR_FEATURE | RH_ENDPOINT:
+ DBG("RH_CLEAR_FEATURE | RH_ENDPOINT");
+
+ switch (wValue) {
+ case RH_ENDPOINT_STALL:
+ DBG("C_HUB_ENDPOINT_STALL");
+ len = 0;
+ break;
+ }
+ break;
+
+ case RH_CLEAR_FEATURE | RH_CLASS:
+ DBG("RH_CLEAR_FEATURE | RH_CLASS");
+
+ switch (wValue) {
+ case RH_C_HUB_LOCAL_POWER:
+ DBG("C_HUB_LOCAL_POWER");
+ len = 0;
+ break;
+
+ case RH_C_HUB_OVER_CURRENT:
+ DBG("C_HUB_OVER_CURRENT");
+ isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_OCIC);
+ len = 0;
+ break;
+ }
+ break;
+
+ case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
+ DBG("RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS");
+
+ switch (wValue) {
+ case RH_PORT_ENABLE:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_CCS);
+ len = 0;
+ break;
+
+ case RH_PORT_SUSPEND:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_POCI);
+ len = 0;
+ break;
+
+ case RH_PORT_POWER:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_LSDA);
+ len = 0;
+ break;
+
+ case RH_C_PORT_CONNECTION:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_CSC);
+ len = 0;
+ break;
+
+ case RH_C_PORT_ENABLE:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PESC);
+ len = 0;
+ break;
+
+ case RH_C_PORT_SUSPEND:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PSSC);
+ len = 0;
+ break;
+
+ case RH_C_PORT_OVER_CURRENT:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_POCI);
+ len = 0;
+ break;
+
+ case RH_C_PORT_RESET:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PRSC);
+ len = 0;
+ break;
+
+ default:
+ ERR("invalid wValue");
+ stat = USB_ST_STALLED;
+ }
+
+ isp116x_show_regs(isp116x);
+
+ break;
+
+ case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
+ DBG("RH_SET_FEATURE | RH_OTHER | RH_CLASS");
+
+ switch (wValue) {
+ case RH_PORT_SUSPEND:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PSS);
+ len = 0;
+ break;
+
+ case RH_PORT_RESET:
+ /* Spin until any current reset finishes */
+ while (1) {
+ tmp =
+ isp116x_read_reg32(isp116x,
+ HCRHPORT1 + wIndex - 1);
+ if (!(tmp & RH_PS_PRS))
+ break;
+ wait_ms(1);
+ }
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PRS);
+ wait_ms(10);
+
+ len = 0;
+ break;
+
+ case RH_PORT_POWER:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PPS);
+ len = 0;
+ break;
+
+ case RH_PORT_ENABLE:
+ isp116x_write_reg32(isp116x, HCRHPORT1 + wIndex - 1,
+ RH_PS_PES);
+ len = 0;
+ break;
+
+ default:
+ ERR("invalid wValue");
+ stat = USB_ST_STALLED;
+ }
+
+ isp116x_show_regs(isp116x);
+
+ break;
+
+ case RH_SET_ADDRESS:
+ DBG("RH_SET_ADDRESS");
+
+ rh_devnum = wValue;
+ len = 0;
+ break;
+
+ case RH_GET_DESCRIPTOR:
+ DBG("RH_GET_DESCRIPTOR: %x, %d", wValue, wLength);
+
+ switch (wValue) {
+ case (USB_DT_DEVICE << 8): /* device descriptor */
+ len = min_t(unsigned int,
+ leni, min_t(unsigned int,
+ sizeof(root_hub_dev_des),
+ wLength));
+ data_buf = root_hub_dev_des;
+ break;
+
+ case (USB_DT_CONFIG << 8): /* configuration descriptor */
+ len = min_t(unsigned int,
+ leni, min_t(unsigned int,
+ sizeof(root_hub_config_des),
+ wLength));
+ data_buf = root_hub_config_des;
+ break;
+
+ case ((USB_DT_STRING << 8) | 0x00): /* string 0 descriptors */
+ len = min_t(unsigned int,
+ leni, min_t(unsigned int,
+ sizeof(root_hub_str_index0),
+ wLength));
+ data_buf = root_hub_str_index0;
+ break;
+
+ case ((USB_DT_STRING << 8) | 0x01): /* string 1 descriptors */
+ len = min_t(unsigned int,
+ leni, min_t(unsigned int,
+ sizeof(root_hub_str_index1),
+ wLength));
+ data_buf = root_hub_str_index1;
+ break;
+
+ default:
+ ERR("invalid wValue");
+ stat = USB_ST_STALLED;
+ }
+
+ break;
+
+ case RH_GET_DESCRIPTOR | RH_CLASS:
+ DBG("RH_GET_DESCRIPTOR | RH_CLASS");
+
+ tmp = isp116x_read_reg32(isp116x, HCRHDESCA);
+
+ data_buf[0] = 0x09; /* min length; */
+ data_buf[1] = 0x29;
+ data_buf[2] = tmp & RH_A_NDP;
+ data_buf[3] = 0;
+ if (tmp & RH_A_PSM) /* per-port power switching? */
+ data_buf[3] |= 0x01;
+ if (tmp & RH_A_NOCP) /* no overcurrent reporting? */
+ data_buf[3] |= 0x10;
+ else if (tmp & RH_A_OCPM) /* per-port overcurrent rep? */
+ data_buf[3] |= 0x08;
+
+ /* Corresponds to data_buf[4-7] */
+ datab[1] = 0;
+ data_buf[5] = (tmp & RH_A_POTPGT) >> 24;
+
+ tmp = isp116x_read_reg32(isp116x, HCRHDESCB);
+
+ data_buf[7] = tmp & RH_B_DR;
+ if (data_buf[2] < 7)
+ data_buf[8] = 0xff;
+ else {
+ data_buf[0] += 2;
+ data_buf[8] = (tmp & RH_B_DR) >> 8;
+ data_buf[10] = data_buf[9] = 0xff;
+ }
+
+ len = min_t(unsigned int, leni,
+ min_t(unsigned int, data_buf[0], wLength));
+ break;
+
+ case RH_GET_CONFIGURATION:
+ DBG("RH_GET_CONFIGURATION");
+
+ *(__u8 *) data_buf = 0x01;
+ len = 1;
+ break;
+
+ case RH_SET_CONFIGURATION:
+ DBG("RH_SET_CONFIGURATION");
+
+ isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPSC);
+ len = 0;
+ break;
+
+ default:
+ ERR("*** *** *** unsupported root hub command *** *** ***");
+ stat = USB_ST_STALLED;
+ }
+
+ len = min_t(int, len, leni);
+ if (buffer != data_buf)
+ memcpy(buffer, data_buf, len);
+
+ dev->act_len = len;
+ dev->status = stat;
+ DBG("dev act_len %d, status %d", dev->act_len, dev->status);
+
+ dump_msg(dev, pipe, buffer, transfer_len, "RH(ret)");
+
+ return stat;
+}
+
+/* --- Transfer functions -------------------------------------------------- */
+
+int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int len, int interval)
+{
+ DBG("dev=%p pipe=%#lx buf=%p size=%d int=%d",
+ dev, pipe, buffer, len, interval);
+
+ return -1;
+}
+
+int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int len, struct devrequest *setup)
+{
+ int devnum = usb_pipedevice(pipe);
+ int epnum = usb_pipeendpoint(pipe);
+ int max = max_transfer_len(dev, pipe);
+ int dir_in = usb_pipein(pipe);
+ int done, ret;
+
+ /* Control message is for the HUB? */
+ if (devnum == rh_devnum)
+ return isp116x_submit_rh_msg(dev, pipe, buffer, len, setup);
+
+ /* Ok, no HUB message so send the message to the device */
+
+ /* Setup phase */
+ DBG("--- SETUP PHASE --------------------------------");
+ usb_settoggle(dev, epnum, 1, 0);
+ ret = isp116x_submit_job(dev, pipe,
+ PTD_DIR_SETUP,
+ setup, sizeof(struct devrequest));
+ if (ret < 0) {
+ DBG("control setup phase error (ret = %d", ret);
+ return -1;
+ }
+
+ /* Data phase */
+ DBG("--- DATA PHASE ---------------------------------");
+ done = 0;
+ usb_settoggle(dev, epnum, !dir_in, 1);
+ while (done < len) {
+ ret = isp116x_submit_job(dev, pipe,
+ dir_in ? PTD_DIR_IN : PTD_DIR_OUT,
+ (__u8 *) buffer + done,
+ max > len - done ? len - done : max);
+ if (ret < 0) {
+ DBG("control data phase error (ret = %d)", ret);
+ return -1;
+ }
+ done += ret;
+
+ if (dir_in && ret < max) /* short packet */
+ break;
+ }
+
+ /* Status phase */
+ DBG("--- STATUS PHASE -------------------------------");
+ usb_settoggle(dev, epnum, !dir_in, 1);
+ ret = isp116x_submit_job(dev, pipe,
+ !dir_in ? PTD_DIR_IN : PTD_DIR_OUT, NULL, 0);
+ if (ret < 0) {
+ DBG("control status phase error (ret = %d", ret);
+ return -1;
+ }
+
+ dev->act_len = done;
+
+ dump_msg(dev, pipe, buffer, len, "DEV(ret)");
+
+ return done;
+}
+
+int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int len)
+{
+ int dir_out = usb_pipeout(pipe);
+ int max = max_transfer_len(dev, pipe);
+ int done, ret;
+
+ DBG("--- BULK ---------------------------------------");
+ DBG("dev=%ld pipe=%ld buf=%p size=%d dir_out=%d",
+ usb_pipedevice(pipe), usb_pipeendpoint(pipe), buffer, len, dir_out);
+
+ done = 0;
+ while (done < len) {
+ ret = isp116x_submit_job(dev, pipe,
+ !dir_out ? PTD_DIR_IN : PTD_DIR_OUT,
+ (__u8 *) buffer + done,
+ max > len - done ? len - done : max);
+ if (ret < 0) {
+ DBG("error on bulk message (ret = %d)", ret);
+ return -1;
+ }
+
+ done += ret;
+
+ if (!dir_out && ret < max) /* short packet */
+ break;
+ }
+
+ dev->act_len = done;
+
+ return 0;
+}
+
+/* --- Basic functions ----------------------------------------------------- */
+
+static int isp116x_sw_reset(struct isp116x *isp116x)
+{
+ int retries = 15;
+ int ret = 0;
+
+ DBG("");
+
+ isp116x->disabled = 1;
+
+ isp116x_write_reg16(isp116x, HCSWRES, HCSWRES_MAGIC);
+ isp116x_write_reg32(isp116x, HCCMDSTAT, HCCMDSTAT_HCR);
+ while (--retries) {
+ /* It usually resets within 1 ms */
+ wait_ms(1);
+ if (!(isp116x_read_reg32(isp116x, HCCMDSTAT) & HCCMDSTAT_HCR))
+ break;
+ }
+ if (!retries) {
+ ERR("software reset timeout");
+ ret = -1;
+ }
+ return ret;
+}
+
+static int isp116x_reset(struct isp116x *isp116x)
+{
+ unsigned long t;
+ u16 clkrdy = 0;
+ int ret, timeout = 15 /* ms */ ;
+
+ DBG("");
+
+ ret = isp116x_sw_reset(isp116x);
+ if (ret)
+ return ret;
+
+ for (t = 0; t < timeout; t++) {
+ clkrdy = isp116x_read_reg16(isp116x, HCuPINT) & HCuPINT_CLKRDY;
+ if (clkrdy)
+ break;
+ wait_ms(1);
+ }
+ if (!clkrdy) {
+ ERR("clock not ready after %dms", timeout);
+ /* After sw_reset the clock won't report to be ready, if
+ H_WAKEUP pin is high. */
+ ERR("please make sure that the H_WAKEUP pin is pulled low!");
+ ret = -1;
+ }
+ return ret;
+}
+
+static void isp116x_stop(struct isp116x *isp116x)
+{
+ u32 val;
+
+ DBG("");
+
+ isp116x_write_reg16(isp116x, HCuPINTENB, 0);
+
+ /* Switch off ports' power, some devices don't come up
+ after next 'start' without this */
+ val = isp116x_read_reg32(isp116x, HCRHDESCA);
+ val &= ~(RH_A_NPS | RH_A_PSM);
+ isp116x_write_reg32(isp116x, HCRHDESCA, val);
+ isp116x_write_reg32(isp116x, HCRHSTATUS, RH_HS_LPS);
+
+ isp116x_sw_reset(isp116x);
+}
+
+/*
+ * Configure the chip. The chip must be successfully reset by now.
+ */
+static int isp116x_start(struct isp116x *isp116x)
+{
+ struct isp116x_platform_data *board = isp116x->board;
+ u32 val;
+
+ DBG("");
+
+ /* Clear interrupt status and disable all interrupt sources */
+ isp116x_write_reg16(isp116x, HCuPINT, 0xff);
+ isp116x_write_reg16(isp116x, HCuPINTENB, 0);
+
+ isp116x_write_reg16(isp116x, HCITLBUFLEN, ISP116x_ITL_BUFSIZE);
+ isp116x_write_reg16(isp116x, HCATLBUFLEN, ISP116x_ATL_BUFSIZE);
+
+ /* Hardware configuration */
+ val = HCHWCFG_DBWIDTH(1);
+ if (board->sel15Kres)
+ val |= HCHWCFG_15KRSEL;
+ /* Remote wakeup won't work without working clock */
+ if (board->remote_wakeup_enable)
+ val |= HCHWCFG_CLKNOTSTOP;
+ if (board->oc_enable)
+ val |= HCHWCFG_ANALOG_OC;
+ isp116x_write_reg16(isp116x, HCHWCFG, val);
+
+ /* --- Root hub configuration */
+ val = (25 << 24) & RH_A_POTPGT;
+ /* AN10003_1.pdf recommends RH_A_NPS (no power switching) to
+ be always set. Yet, instead, we request individual port
+ power switching. */
+ val |= RH_A_PSM;
+ /* Report overcurrent per port */
+ val |= RH_A_OCPM;
+ isp116x_write_reg32(isp116x, HCRHDESCA, val);
+ isp116x->rhdesca = isp116x_read_reg32(isp116x, HCRHDESCA);
+
+ val = RH_B_PPCM;
+ isp116x_write_reg32(isp116x, HCRHDESCB, val);
+ isp116x->rhdescb = isp116x_read_reg32(isp116x, HCRHDESCB);
+
+ val = 0;
+ if (board->remote_wakeup_enable)
+ val |= RH_HS_DRWE;
+ isp116x_write_reg32(isp116x, HCRHSTATUS, val);
+ isp116x->rhstatus = isp116x_read_reg32(isp116x, HCRHSTATUS);
+
+ isp116x_write_reg32(isp116x, HCFMINTVL, 0x27782edf);
+
+ /* Go operational */
+ val = HCCONTROL_USB_OPER;
+ if (board->remote_wakeup_enable)
+ val |= HCCONTROL_RWE;
+ isp116x_write_reg32(isp116x, HCCONTROL, val);
+
+ /* Disable ports to avoid race in device enumeration */
+ isp116x_write_reg32(isp116x, HCRHPORT1, RH_PS_CCS);
+ isp116x_write_reg32(isp116x, HCRHPORT2, RH_PS_CCS);
+
+ isp116x_show_regs(isp116x);
+
+ isp116x->disabled = 0;
+
+ return 0;
+}
+
+/* --- Init functions ------------------------------------------------------ */
+
+int isp116x_check_id(struct isp116x *isp116x)
+{
+ int val;
+
+ val = isp116x_read_reg16(isp116x, HCCHIPID);
+ if ((val & HCCHIPID_MASK) != HCCHIPID_MAGIC) {
+ ERR("invalid chip ID %04x", val);
+ return -1;
+ }
+
+ return 0;
+}
+
+int usb_lowlevel_init(void)
+{
+ struct isp116x *isp116x = &isp116x_dev;
+
+ DBG("");
+
+ /* Init device registers addr */
+ isp116x->addr_reg = (u16 *) ISP116X_HCD_ADDR;
+ isp116x->data_reg = (u16 *) ISP116X_HCD_DATA;
+
+ /* Setup specific board settings */
+#ifdef ISP116X_HCD_SEL15kRES
+ isp116x_board.sel15Kres = 1;
+#endif
+#ifdef ISP116X_HCD_OC_ENABLE
+ isp116x_board.oc_enable = 1;
+#endif
+#ifdef ISP116X_HCD_REMOTE_WAKEUP_ENABLE
+ isp116x_board.remote_wakeup_enable = 1;
+#endif
+ isp116x->board = &isp116x_board;
+
+ /* Try to get ISP116x silicon chip ID */
+ if (isp116x_check_id(isp116x) < 0)
+ return -1;
+
+ isp116x->disabled = 1;
+ isp116x->sleeping = 0;
+
+ isp116x_reset(isp116x);
+ isp116x_start(isp116x);
+
+ return 0;
+}
+
+int usb_lowlevel_stop(void)
+{
+ struct isp116x *isp116x = &isp116x_dev;
+
+ DBG("");
+
+ if (!isp116x->disabled)
+ isp116x_stop(isp116x);
+
+ return 0;
+}
+
+#endif /* CONFIG_USB_ISP116X_HCD */
diff --git a/drivers/isp116x.h b/drivers/isp116x.h
new file mode 100644
index 0000000..a3ce3b5
--- /dev/null
+++ b/drivers/isp116x.h
@@ -0,0 +1,489 @@
+/*
+ * ISP116x register declarations and HCD data structures
+ *
+ * Copyright (C) 2007 Rodolfo Giometti <giometti@linux.it>
+ * Copyright (C) 2007 Eurotech S.p.A. <info@eurotech.it>
+ * Copyright (C) 2005 Olav Kongas <ok@artecdesign.ee>
+ * Portions:
+ * Copyright (C) 2004 Lothar Wassmann
+ * Copyright (C) 2004 Psion Teklogix
+ * Copyright (C) 2004 David Brownell
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifdef DEBUG
+#define DBG(fmt, args...) \
+ printf("isp116x: %s: " fmt "\n" , __FUNCTION__ , ## args)
+#else
+#define DBG(fmt, args...) do {} while (0)
+#endif
+
+#ifdef VERBOSE
+# define VDBG DBG
+#else
+# define VDBG(fmt, args...) do {} while (0)
+#endif
+
+#define ERR(fmt, args...) \
+ printf("isp116x: %s: " fmt "\n" , __FUNCTION__ , ## args)
+#define WARN(fmt, args...) \
+ printf("isp116x: %s: " fmt "\n" , __FUNCTION__ , ## args)
+#define INFO(fmt, args...) \
+ printf("isp116x: " fmt "\n" , ## args)
+
+/* ------------------------------------------------------------------------- */
+
+/* us of 1ms frame */
+#define MAX_LOAD_LIMIT 850
+
+/* Full speed: max # of bytes to transfer for a single urb
+ at a time must be < 1024 && must be multiple of 64.
+ 832 allows transfering 4kiB within 5 frames. */
+#define MAX_TRANSFER_SIZE_FULLSPEED 832
+
+/* Low speed: there is no reason to schedule in very big
+ chunks; often the requested long transfers are for
+ string descriptors containing short strings. */
+#define MAX_TRANSFER_SIZE_LOWSPEED 64
+
+/* Bytetime (us), a rough indication of how much time it
+ would take to transfer a byte of useful data over USB */
+#define BYTE_TIME_FULLSPEED 1
+#define BYTE_TIME_LOWSPEED 20
+
+/* Buffer sizes */
+#define ISP116x_BUF_SIZE 4096
+#define ISP116x_ITL_BUFSIZE 0
+#define ISP116x_ATL_BUFSIZE ((ISP116x_BUF_SIZE) - 2*(ISP116x_ITL_BUFSIZE))
+
+#define ISP116x_WRITE_OFFSET 0x80
+
+/* --- ISP116x registers/bits ---------------------------------------------- */
+
+#define HCREVISION 0x00
+#define HCCONTROL 0x01
+#define HCCONTROL_HCFS (3 << 6) /* host controller
+ functional state */
+#define HCCONTROL_USB_RESET (0 << 6)
+#define HCCONTROL_USB_RESUME (1 << 6)
+#define HCCONTROL_USB_OPER (2 << 6)
+#define HCCONTROL_USB_SUSPEND (3 << 6)
+#define HCCONTROL_RWC (1 << 9) /* remote wakeup connected */
+#define HCCONTROL_RWE (1 << 10) /* remote wakeup enable */
+#define HCCMDSTAT 0x02
+#define HCCMDSTAT_HCR (1 << 0) /* host controller reset */
+#define HCCMDSTAT_SOC (3 << 16) /* scheduling overrun count */
+#define HCINTSTAT 0x03
+#define HCINT_SO (1 << 0) /* scheduling overrun */
+#define HCINT_WDH (1 << 1) /* writeback of done_head */
+#define HCINT_SF (1 << 2) /* start frame */
+#define HCINT_RD (1 << 3) /* resume detect */
+#define HCINT_UE (1 << 4) /* unrecoverable error */
+#define HCINT_FNO (1 << 5) /* frame number overflow */
+#define HCINT_RHSC (1 << 6) /* root hub status change */
+#define HCINT_OC (1 << 30) /* ownership change */
+#define HCINT_MIE (1 << 31) /* master interrupt enable */
+#define HCINTENB 0x04
+#define HCINTDIS 0x05
+#define HCFMINTVL 0x0d
+#define HCFMREM 0x0e
+#define HCFMNUM 0x0f
+#define HCLSTHRESH 0x11
+#define HCRHDESCA 0x12
+#define RH_A_NDP (0x3 << 0) /* # downstream ports */
+#define RH_A_PSM (1 << 8) /* power switching mode */
+#define RH_A_NPS (1 << 9) /* no power switching */
+#define RH_A_DT (1 << 10) /* device type (mbz) */
+#define RH_A_OCPM (1 << 11) /* overcurrent protection
+ mode */
+#define RH_A_NOCP (1 << 12) /* no overcurrent protection */
+#define RH_A_POTPGT (0xff << 24) /* power on -> power good
+ time */
+#define HCRHDESCB 0x13
+#define RH_B_DR (0xffff << 0) /* device removable flags */
+#define RH_B_PPCM (0xffff << 16) /* port power control mask */
+#define HCRHSTATUS 0x14
+#define RH_HS_LPS (1 << 0) /* local power status */
+#define RH_HS_OCI (1 << 1) /* over current indicator */
+#define RH_HS_DRWE (1 << 15) /* device remote wakeup
+ enable */
+#define RH_HS_LPSC (1 << 16) /* local power status change */
+#define RH_HS_OCIC (1 << 17) /* over current indicator
+ change */
+#define RH_HS_CRWE (1 << 31) /* clear remote wakeup
+ enable */
+#define HCRHPORT1 0x15
+#define RH_PS_CCS (1 << 0) /* current connect status */
+#define RH_PS_PES (1 << 1) /* port enable status */
+#define RH_PS_PSS (1 << 2) /* port suspend status */
+#define RH_PS_POCI (1 << 3) /* port over current
+ indicator */
+#define RH_PS_PRS (1 << 4) /* port reset status */
+#define RH_PS_PPS (1 << 8) /* port power status */
+#define RH_PS_LSDA (1 << 9) /* low speed device attached */
+#define RH_PS_CSC (1 << 16) /* connect status change */
+#define RH_PS_PESC (1 << 17) /* port enable status change */
+#define RH_PS_PSSC (1 << 18) /* port suspend status
+ change */
+#define RH_PS_OCIC (1 << 19) /* over current indicator
+ change */
+#define RH_PS_PRSC (1 << 20) /* port reset status change */
+#define HCRHPORT_CLRMASK (0x1f << 16)
+#define HCRHPORT2 0x16
+#define HCHWCFG 0x20
+#define HCHWCFG_15KRSEL (1 << 12)
+#define HCHWCFG_CLKNOTSTOP (1 << 11)
+#define HCHWCFG_ANALOG_OC (1 << 10)
+#define HCHWCFG_DACK_MODE (1 << 8)
+#define HCHWCFG_EOT_POL (1 << 7)
+#define HCHWCFG_DACK_POL (1 << 6)
+#define HCHWCFG_DREQ_POL (1 << 5)
+#define HCHWCFG_DBWIDTH_MASK (0x03 << 3)
+#define HCHWCFG_DBWIDTH(n) (((n) << 3) & HCHWCFG_DBWIDTH_MASK)
+#define HCHWCFG_INT_POL (1 << 2)
+#define HCHWCFG_INT_TRIGGER (1 << 1)
+#define HCHWCFG_INT_ENABLE (1 << 0)
+#define HCDMACFG 0x21
+#define HCDMACFG_BURST_LEN_MASK (0x03 << 5)
+#define HCDMACFG_BURST_LEN(n) (((n) << 5) & HCDMACFG_BURST_LEN_MASK)
+#define HCDMACFG_BURST_LEN_1 HCDMACFG_BURST_LEN(0)
+#define HCDMACFG_BURST_LEN_4 HCDMACFG_BURST_LEN(1)
+#define HCDMACFG_BURST_LEN_8 HCDMACFG_BURST_LEN(2)
+#define HCDMACFG_DMA_ENABLE (1 << 4)
+#define HCDMACFG_BUF_TYPE_MASK (0x07 << 1)
+#define HCDMACFG_CTR_SEL (1 << 2)
+#define HCDMACFG_ITLATL_SEL (1 << 1)
+#define HCDMACFG_DMA_RW_SELECT (1 << 0)
+#define HCXFERCTR 0x22
+#define HCuPINT 0x24
+#define HCuPINT_SOF (1 << 0)
+#define HCuPINT_ATL (1 << 1)
+#define HCuPINT_AIIEOT (1 << 2)
+#define HCuPINT_OPR (1 << 4)
+#define HCuPINT_SUSP (1 << 5)
+#define HCuPINT_CLKRDY (1 << 6)
+#define HCuPINTENB 0x25
+#define HCCHIPID 0x27
+#define HCCHIPID_MASK 0xff00
+#define HCCHIPID_MAGIC 0x6100
+#define HCSCRATCH 0x28
+#define HCSWRES 0x29
+#define HCSWRES_MAGIC 0x00f6
+#define HCITLBUFLEN 0x2a
+#define HCATLBUFLEN 0x2b
+#define HCBUFSTAT 0x2c
+#define HCBUFSTAT_ITL0_FULL (1 << 0)
+#define HCBUFSTAT_ITL1_FULL (1 << 1)
+#define HCBUFSTAT_ATL_FULL (1 << 2)
+#define HCBUFSTAT_ITL0_DONE (1 << 3)
+#define HCBUFSTAT_ITL1_DONE (1 << 4)
+#define HCBUFSTAT_ATL_DONE (1 << 5)
+#define HCRDITL0LEN 0x2d
+#define HCRDITL1LEN 0x2e
+#define HCITLPORT 0x40
+#define HCATLPORT 0x41
+
+/* PTD accessor macros. */
+#define PTD_GET_COUNT(p) (((p)->count & PTD_COUNT_MSK) >> 0)
+#define PTD_COUNT(v) (((v) << 0) & PTD_COUNT_MSK)
+#define PTD_GET_TOGGLE(p) (((p)->count & PTD_TOGGLE_MSK) >> 10)
+#define PTD_TOGGLE(v) (((v) << 10) & PTD_TOGGLE_MSK)
+#define PTD_GET_ACTIVE(p) (((p)->count & PTD_ACTIVE_MSK) >> 11)
+#define PTD_ACTIVE(v) (((v) << 11) & PTD_ACTIVE_MSK)
+#define PTD_GET_CC(p) (((p)->count & PTD_CC_MSK) >> 12)
+#define PTD_CC(v) (((v) << 12) & PTD_CC_MSK)
+#define PTD_GET_MPS(p) (((p)->mps & PTD_MPS_MSK) >> 0)
+#define PTD_MPS(v) (((v) << 0) & PTD_MPS_MSK)
+#define PTD_GET_SPD(p) (((p)->mps & PTD_SPD_MSK) >> 10)
+#define PTD_SPD(v) (((v) << 10) & PTD_SPD_MSK)
+#define PTD_GET_LAST(p) (((p)->mps & PTD_LAST_MSK) >> 11)
+#define PTD_LAST(v) (((v) << 11) & PTD_LAST_MSK)
+#define PTD_GET_EP(p) (((p)->mps & PTD_EP_MSK) >> 12)
+#define PTD_EP(v) (((v) << 12) & PTD_EP_MSK)
+#define PTD_GET_LEN(p) (((p)->len & PTD_LEN_MSK) >> 0)
+#define PTD_LEN(v) (((v) << 0) & PTD_LEN_MSK)
+#define PTD_GET_DIR(p) (((p)->len & PTD_DIR_MSK) >> 10)
+#define PTD_DIR(v) (((v) << 10) & PTD_DIR_MSK)
+#define PTD_GET_B5_5(p) (((p)->len & PTD_B5_5_MSK) >> 13)
+#define PTD_B5_5(v) (((v) << 13) & PTD_B5_5_MSK)
+#define PTD_GET_FA(p) (((p)->faddr & PTD_FA_MSK) >> 0)
+#define PTD_FA(v) (((v) << 0) & PTD_FA_MSK)
+#define PTD_GET_FMT(p) (((p)->faddr & PTD_FMT_MSK) >> 7)
+#define PTD_FMT(v) (((v) << 7) & PTD_FMT_MSK)
+
+/* Hardware transfer status codes -- CC from ptd->count */
+#define TD_CC_NOERROR 0x00
+#define TD_CC_CRC 0x01
+#define TD_CC_BITSTUFFING 0x02
+#define TD_CC_DATATOGGLEM 0x03
+#define TD_CC_STALL 0x04
+#define TD_DEVNOTRESP 0x05
+#define TD_PIDCHECKFAIL 0x06
+#define TD_UNEXPECTEDPID 0x07
+#define TD_DATAOVERRUN 0x08
+#define TD_DATAUNDERRUN 0x09
+ /* 0x0A, 0x0B reserved for hardware */
+#define TD_BUFFEROVERRUN 0x0C
+#define TD_BUFFERUNDERRUN 0x0D
+ /* 0x0E, 0x0F reserved for HCD */
+#define TD_NOTACCESSED 0x0F
+
+/* ------------------------------------------------------------------------- */
+
+#define LOG2_PERIODIC_SIZE 5 /* arbitrary; this matches OHCI */
+#define PERIODIC_SIZE (1 << LOG2_PERIODIC_SIZE)
+
+/* Philips transfer descriptor */
+struct ptd {
+ u16 count;
+#define PTD_COUNT_MSK (0x3ff << 0)
+#define PTD_TOGGLE_MSK (1 << 10)
+#define PTD_ACTIVE_MSK (1 << 11)
+#define PTD_CC_MSK (0xf << 12)
+ u16 mps;
+#define PTD_MPS_MSK (0x3ff << 0)
+#define PTD_SPD_MSK (1 << 10)
+#define PTD_LAST_MSK (1 << 11)
+#define PTD_EP_MSK (0xf << 12)
+ u16 len;
+#define PTD_LEN_MSK (0x3ff << 0)
+#define PTD_DIR_MSK (3 << 10)
+#define PTD_DIR_SETUP (0)
+#define PTD_DIR_OUT (1)
+#define PTD_DIR_IN (2)
+#define PTD_B5_5_MSK (1 << 13)
+ u16 faddr;
+#define PTD_FA_MSK (0x7f << 0)
+#define PTD_FMT_MSK (1 << 7)
+} __attribute__ ((packed, aligned(2)));
+
+struct isp116x_ep {
+ struct usb_device *udev;
+ struct ptd ptd;
+
+ u8 maxpacket;
+ u8 epnum;
+ u8 nextpid;
+
+ u16 length; /* of current packet */
+ unsigned char *data; /* to databuf */
+
+ u16 error_count;
+};
+
+/* URB struct */
+#define N_URB_TD 48
+#define URB_DEL 1
+typedef struct {
+ struct isp116x_ep *ed;
+ void *transfer_buffer; /* (in) associated data buffer */
+ int actual_length; /* (return) actual transfer length */
+ unsigned long pipe; /* (in) pipe information */
+#if 0
+ int state;
+#endif
+} urb_priv_t;
+
+struct isp116x_platform_data {
+ /* Enable internal resistors on downstream ports */
+ unsigned sel15Kres:1;
+ /* On-chip overcurrent detection */
+ unsigned oc_enable:1;
+ /* Enable wakeup by devices on usb bus (e.g. wakeup
+ by attachment/detachment or by device activity
+ such as moving a mouse). When chosen, this option
+ prevents stopping internal clock, increasing
+ thereby power consumption in suspended state. */
+ unsigned remote_wakeup_enable:1;
+};
+
+struct isp116x {
+ u16 *addr_reg;
+ u16 *data_reg;
+
+ struct isp116x_platform_data *board;
+
+ struct dentry *dentry;
+ unsigned long stat1, stat2, stat4, stat8, stat16;
+
+ /* Status flags */
+ unsigned disabled:1;
+ unsigned sleeping:1;
+
+ /* Root hub registers */
+ u32 rhdesca;
+ u32 rhdescb;
+ u32 rhstatus;
+ u32 rhport[2];
+
+ /* Schedule for the current frame */
+ struct isp116x_ep *atl_active;
+ int atl_buflen;
+ int atl_bufshrt;
+ int atl_last_dir;
+ int atl_finishing;
+};
+
+/* ------------------------------------------------- */
+
+/* Inter-io delay (ns). The chip is picky about access timings; it
+ * expects at least:
+ * 150ns delay between consecutive accesses to DATA_REG,
+ * 300ns delay between access to ADDR_REG and DATA_REG
+ * OE, WE MUST NOT be changed during these intervals
+ */
+#if defined(UDELAY)
+#define isp116x_delay(h,d) udelay(d)
+#else
+#define isp116x_delay(h,d) do {} while (0)
+#endif
+
+static inline void isp116x_write_addr(struct isp116x *isp116x, unsigned reg)
+{
+ writew(reg & 0xff, isp116x->addr_reg);
+ isp116x_delay(isp116x, UDELAY);
+}
+
+static inline void isp116x_write_data16(struct isp116x *isp116x, u16 val)
+{
+ writew(val, isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+}
+
+static inline void isp116x_raw_write_data16(struct isp116x *isp116x, u16 val)
+{
+ __raw_writew(val, isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+}
+
+static inline u16 isp116x_read_data16(struct isp116x *isp116x)
+{
+ u16 val;
+
+ val = readw(isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+ return val;
+}
+
+static inline u16 isp116x_raw_read_data16(struct isp116x *isp116x)
+{
+ u16 val;
+
+ val = __raw_readw(isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+ return val;
+}
+
+static inline void isp116x_write_data32(struct isp116x *isp116x, u32 val)
+{
+ writew(val & 0xffff, isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+ writew(val >> 16, isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+}
+
+static inline u32 isp116x_read_data32(struct isp116x *isp116x)
+{
+ u32 val;
+
+ val = (u32) readw(isp116x->data_reg);
+ isp116x_delay(isp116x, UDELAY);
+ val |= ((u32) readw(isp116x->data_reg)) << 16;
+ isp116x_delay(isp116x, UDELAY);
+ return val;
+}
+
+/* Let's keep register access functions out of line. Hint:
+ we wait at least 150 ns at every access.
+*/
+static u16 isp116x_read_reg16(struct isp116x *isp116x, unsigned reg)
+{
+ isp116x_write_addr(isp116x, reg);
+ return isp116x_read_data16(isp116x);
+}
+
+static u32 isp116x_read_reg32(struct isp116x *isp116x, unsigned reg)
+{
+ isp116x_write_addr(isp116x, reg);
+ return isp116x_read_data32(isp116x);
+}
+
+static void isp116x_write_reg16(struct isp116x *isp116x, unsigned reg,
+ unsigned val)
+{
+ isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
+ isp116x_write_data16(isp116x, (u16) (val & 0xffff));
+}
+
+static void isp116x_write_reg32(struct isp116x *isp116x, unsigned reg,
+ unsigned val)
+{
+ isp116x_write_addr(isp116x, reg | ISP116x_WRITE_OFFSET);
+ isp116x_write_data32(isp116x, (u32) val);
+}
+
+/* --- USB HUB constants (not OHCI-specific; see hub.h) -------------------- */
+
+/* destination of request */
+#define RH_INTERFACE 0x01
+#define RH_ENDPOINT 0x02
+#define RH_OTHER 0x03
+
+#define RH_CLASS 0x20
+#define RH_VENDOR 0x40
+
+/* Requests: bRequest << 8 | bmRequestType */
+#define RH_GET_STATUS 0x0080
+#define RH_CLEAR_FEATURE 0x0100
+#define RH_SET_FEATURE 0x0300
+#define RH_SET_ADDRESS 0x0500
+#define RH_GET_DESCRIPTOR 0x0680
+#define RH_SET_DESCRIPTOR 0x0700
+#define RH_GET_CONFIGURATION 0x0880
+#define RH_SET_CONFIGURATION 0x0900
+#define RH_GET_STATE 0x0280
+#define RH_GET_INTERFACE 0x0A80
+#define RH_SET_INTERFACE 0x0B00
+#define RH_SYNC_FRAME 0x0C80
+/* Our Vendor Specific Request */
+#define RH_SET_EP 0x2000
+
+/* Hub port features */
+#define RH_PORT_CONNECTION 0x00
+#define RH_PORT_ENABLE 0x01
+#define RH_PORT_SUSPEND 0x02
+#define RH_PORT_OVER_CURRENT 0x03
+#define RH_PORT_RESET 0x04
+#define RH_PORT_POWER 0x08
+#define RH_PORT_LOW_SPEED 0x09
+
+#define RH_C_PORT_CONNECTION 0x10
+#define RH_C_PORT_ENABLE 0x11
+#define RH_C_PORT_SUSPEND 0x12
+#define RH_C_PORT_OVER_CURRENT 0x13
+#define RH_C_PORT_RESET 0x14
+
+/* Hub features */
+#define RH_C_HUB_LOCAL_POWER 0x00
+#define RH_C_HUB_OVER_CURRENT 0x01
+
+#define RH_DEVICE_REMOTE_WAKEUP 0x00
+#define RH_ENDPOINT_STALL 0x01
+
+#define RH_ACK 0x01
+#define RH_REQ_ERR -1
+#define RH_NACK 0x00
diff --git a/drivers/lan91c96.c b/drivers/lan91c96.c
index a50c5f0..ecdcbd9 100644
--- a/drivers/lan91c96.c
+++ b/drivers/lan91c96.c
@@ -65,7 +65,7 @@
#ifdef CONFIG_DRIVER_LAN91C96
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/*------------------------------------------------------------------------
*
diff --git a/drivers/macb.c b/drivers/macb.c
index 186ab19..95cdc49 100644
--- a/drivers/macb.c
+++ b/drivers/macb.c
@@ -17,7 +17,8 @@
*/
#include <common.h>
-#if defined(CONFIG_MACB) && (CONFIG_COMMANDS & (CFG_CMD_NET | CFG_CMD_MII))
+#if defined(CONFIG_MACB) \
+ && (defined(CONFIG_CMD_NET) || defined(CONFIG_CMD_MII))
/*
* The u-boot networking stack is a little weird. It seems like the
@@ -51,6 +52,8 @@
#include "macb.h"
+#define barrier() asm volatile("" ::: "memory")
+
#define CFG_MACB_RX_BUFFER_SIZE 4096
#define CFG_MACB_RX_RING_SIZE (CFG_MACB_RX_BUFFER_SIZE / 128)
#define CFG_MACB_TX_RING_SIZE 16
@@ -163,7 +166,7 @@
return MACB_BFEXT(DATA, frame);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
static int macb_send(struct eth_device *netdev, volatile void *packet,
int length)
@@ -185,31 +188,31 @@
macb->tx_ring[tx_head].ctrl = ctrl;
macb->tx_ring[tx_head].addr = paddr;
+ barrier();
macb_writel(macb, NCR, MACB_BIT(TE) | MACB_BIT(RE) | MACB_BIT(TSTART));
/*
* I guess this is necessary because the networking core may
* re-use the transmit buffer as soon as we return...
*/
- i = 0;
- while (!(macb->tx_ring[tx_head].ctrl & TXBUF_USED)) {
- if (i > CFG_MACB_TX_TIMEOUT) {
- printf("%s: TX timeout\n", netdev->name);
+ for (i = 0; i <= CFG_MACB_TX_TIMEOUT; i++) {
+ barrier();
+ ctrl = macb->tx_ring[tx_head].ctrl;
+ if (ctrl & TXBUF_USED)
break;
- }
udelay(1);
- i++;
}
dma_unmap_single(packet, length, paddr);
if (i <= CFG_MACB_TX_TIMEOUT) {
- ctrl = macb->tx_ring[tx_head].ctrl;
if (ctrl & TXBUF_UNDERRUN)
printf("%s: TX underrun\n", netdev->name);
if (ctrl & TXBUF_EXHAUSTED)
printf("%s: TX buffers exhausted in mid frame\n",
netdev->name);
+ } else {
+ printf("%s: TX timeout\n", netdev->name);
}
/* No one cares anyway */
@@ -234,6 +237,7 @@
i++;
}
+ barrier();
macb->rx_tail = new_tail;
}
@@ -283,11 +287,38 @@
rx_tail = 0;
}
}
+ barrier();
}
return 0;
}
+static void macb_phy_reset(struct macb_device *macb)
+{
+ struct eth_device *netdev = &macb->netdev;
+ int i;
+ u16 status, adv;
+
+ adv = ADVERTISE_CSMA | ADVERTISE_ALL;
+ macb_mdio_write(macb, MII_ADVERTISE, adv);
+ printf("%s: Starting autonegotiation...\n", netdev->name);
+ macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
+ | BMCR_ANRESTART));
+
+ for (i = 0; i < CFG_MACB_AUTONEG_TIMEOUT / 100; i++) {
+ status = macb_mdio_read(macb, MII_BMSR);
+ if (status & BMSR_ANEGCOMPLETE)
+ break;
+ udelay(100);
+ }
+
+ if (status & BMSR_ANEGCOMPLETE)
+ printf("%s: Autonegotiation complete\n", netdev->name);
+ else
+ printf("%s: Autonegotiation timed out (status=0x%04x)\n",
+ netdev->name, status);
+}
+
static int macb_phy_init(struct macb_device *macb)
{
struct eth_device *netdev = &macb->netdev;
@@ -303,36 +334,16 @@
return 0;
}
- adv = ADVERTISE_CSMA | ADVERTISE_ALL;
- macb_mdio_write(macb, MII_ADVERTISE, adv);
- printf("%s: Starting autonegotiation...\n", netdev->name);
- macb_mdio_write(macb, MII_BMCR, (BMCR_ANENABLE
- | BMCR_ANRESTART));
-
-#if 0
- for (i = 0; i < 9; i++)
- printf("mii%d: 0x%04x\n", i, macb_mdio_read(macb, i));
-#endif
-
- for (i = 0; i < CFG_MACB_AUTONEG_TIMEOUT / 100; i++) {
- status = macb_mdio_read(macb, MII_BMSR);
- if (status & BMSR_ANEGCOMPLETE)
- break;
- udelay(100);
- }
-
- if (status & BMSR_ANEGCOMPLETE)
- printf("%s: Autonegotiation complete\n", netdev->name);
- else
- printf("%s: Autonegotiation timed out (status=0x%04x)\n",
- netdev->name, status);
-
+ status = macb_mdio_read(macb, MII_BMSR);
if (!(status & BMSR_LSTATUS)) {
+ /* Try to re-negotiate if we don't have link already. */
+ macb_phy_reset(macb);
+
for (i = 0; i < CFG_MACB_AUTONEG_TIMEOUT / 100; i++) {
- udelay(100);
status = macb_mdio_read(macb, MII_BMSR);
if (status & BMSR_LSTATUS)
break;
+ udelay(100);
}
}
@@ -341,6 +352,7 @@
netdev->name, status);
return 0;
} else {
+ adv = macb_mdio_read(macb, MII_ADVERTISE);
lpa = macb_mdio_read(macb, MII_LPA);
media = mii_nway_result(lpa & adv);
speed = (media & (ADVERTISE_100FULL | ADVERTISE_100HALF)
@@ -492,9 +504,9 @@
return 0;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NET) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
int miiphy_read(unsigned char addr, unsigned char reg, unsigned short *value)
{
@@ -570,6 +582,6 @@
return 0;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_MII) */
+#endif
#endif /* CONFIG_MACB */
diff --git a/drivers/mpc8xx_pcmcia.c b/drivers/mpc8xx_pcmcia.c
index 399a719..8a34cd3 100644
--- a/drivers/mpc8xx_pcmcia.c
+++ b/drivers/mpc8xx_pcmcia.c
@@ -6,11 +6,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -23,7 +23,7 @@
extern int pcmcia_hardware_enable (int slot);
extern int pcmcia_voltage_set(int slot, int vcc, int vpp);
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
extern int pcmcia_hardware_disable(int slot);
#endif
@@ -189,7 +189,7 @@
return rc;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_off (void)
{
int i;
@@ -221,7 +221,7 @@
pcmcia_hardware_disable(_slot_);
return 0;
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
static u_int m8xx_get_graycode(u_int size)
diff --git a/drivers/nand/nand.c b/drivers/nand/nand.c
index 9fef71d..27b5792 100644
--- a/drivers/nand/nand.c
+++ b/drivers/nand/nand.c
@@ -23,7 +23,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <nand.h>
diff --git a/drivers/nand/nand_base.c b/drivers/nand/nand_base.c
index c6fee18..151f535 100644
--- a/drivers/nand/nand_base.c
+++ b/drivers/nand/nand_base.c
@@ -72,7 +72,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <watchdog.h>
diff --git a/drivers/nand/nand_bbt.c b/drivers/nand/nand_bbt.c
index aaa9400..19a9bc2 100644
--- a/drivers/nand/nand_bbt.c
+++ b/drivers/nand/nand_bbt.c
@@ -54,7 +54,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <malloc.h>
#include <linux/mtd/compat.h>
diff --git a/drivers/nand/nand_ecc.c b/drivers/nand/nand_ecc.c
index f33be96..4c532b0 100644
--- a/drivers/nand/nand_ecc.c
+++ b/drivers/nand/nand_ecc.c
@@ -37,9 +37,16 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include<linux/mtd/mtd.h>
+
+/*
+ * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(),
+ * only nand_correct_data() is needed
+ */
+
+#ifndef CONFIG_NAND_SPL
/*
* Pre-calculated 256-way 1 byte column parity
*/
@@ -62,90 +69,75 @@
0x00, 0x55, 0x56, 0x03, 0x59, 0x0c, 0x0f, 0x5a, 0x5a, 0x0f, 0x0c, 0x59, 0x03, 0x56, 0x55, 0x00
};
-
/**
- * nand_trans_result - [GENERIC] create non-inverted ECC
- * @reg2: line parity reg 2
- * @reg3: line parity reg 3
- * @ecc_code: ecc
- *
- * Creates non-inverted ECC code from line parity
- */
-static void nand_trans_result(u_char reg2, u_char reg3,
- u_char *ecc_code)
-{
- u_char a, b, i, tmp1, tmp2;
-
- /* Initialize variables */
- a = b = 0x80;
- tmp1 = tmp2 = 0;
-
- /* Calculate first ECC byte */
- for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP15,13,11,9 --> ecc_code[0] */
- tmp1 |= b;
- b >>= 1;
- if (reg2 & a) /* LP14,12,10,8 --> ecc_code[0] */
- tmp1 |= b;
- b >>= 1;
- a >>= 1;
- }
-
- /* Calculate second ECC byte */
- b = 0x80;
- for (i = 0; i < 4; i++) {
- if (reg3 & a) /* LP7,5,3,1 --> ecc_code[1] */
- tmp2 |= b;
- b >>= 1;
- if (reg2 & a) /* LP6,4,2,0 --> ecc_code[1] */
- tmp2 |= b;
- b >>= 1;
- a >>= 1;
- }
-
- /* Store two of the ECC bytes */
- ecc_code[0] = tmp1;
- ecc_code[1] = tmp2;
-}
-
-/**
- * nand_calculate_ecc - [NAND Interface] Calculate 3 byte ECC code for 256 byte block
+ * nand_calculate_ecc - [NAND Interface] Calculate 3-byte ECC for 256-byte block
* @mtd: MTD block structure
* @dat: raw data
* @ecc_code: buffer for ECC
*/
-int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code)
+int nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat,
+ u_char *ecc_code)
{
- u_char idx, reg1, reg2, reg3;
- int j;
+ uint8_t idx, reg1, reg2, reg3, tmp1, tmp2;
+ int i;
/* Initialize variables */
reg1 = reg2 = reg3 = 0;
- ecc_code[0] = ecc_code[1] = ecc_code[2] = 0;
/* Build up column parity */
- for(j = 0; j < 256; j++) {
-
+ for(i = 0; i < 256; i++) {
/* Get CP0 - CP5 from table */
- idx = nand_ecc_precalc_table[dat[j]];
+ idx = nand_ecc_precalc_table[*dat++];
reg1 ^= (idx & 0x3f);
/* All bit XOR = 1 ? */
if (idx & 0x40) {
- reg3 ^= (u_char) j;
- reg2 ^= ~((u_char) j);
+ reg3 ^= (uint8_t) i;
+ reg2 ^= ~((uint8_t) i);
}
}
/* Create non-inverted ECC code from line parity */
- nand_trans_result(reg2, reg3, ecc_code);
+ tmp1 = (reg3 & 0x80) >> 0; /* B7 -> B7 */
+ tmp1 |= (reg2 & 0x80) >> 1; /* B7 -> B6 */
+ tmp1 |= (reg3 & 0x40) >> 1; /* B6 -> B5 */
+ tmp1 |= (reg2 & 0x40) >> 2; /* B6 -> B4 */
+ tmp1 |= (reg3 & 0x20) >> 2; /* B5 -> B3 */
+ tmp1 |= (reg2 & 0x20) >> 3; /* B5 -> B2 */
+ tmp1 |= (reg3 & 0x10) >> 3; /* B4 -> B1 */
+ tmp1 |= (reg2 & 0x10) >> 4; /* B4 -> B0 */
+
+ tmp2 = (reg3 & 0x08) << 4; /* B3 -> B7 */
+ tmp2 |= (reg2 & 0x08) << 3; /* B3 -> B6 */
+ tmp2 |= (reg3 & 0x04) << 3; /* B2 -> B5 */
+ tmp2 |= (reg2 & 0x04) << 2; /* B2 -> B4 */
+ tmp2 |= (reg3 & 0x02) << 2; /* B1 -> B3 */
+ tmp2 |= (reg2 & 0x02) << 1; /* B1 -> B2 */
+ tmp2 |= (reg3 & 0x01) << 1; /* B0 -> B1 */
+ tmp2 |= (reg2 & 0x01) << 0; /* B7 -> B0 */
/* Calculate final ECC code */
- ecc_code[0] = ~ecc_code[0];
- ecc_code[1] = ~ecc_code[1];
+#ifdef CONFIG_MTD_NAND_ECC_SMC
+ ecc_code[0] = ~tmp2;
+ ecc_code[1] = ~tmp1;
+#else
+ ecc_code[0] = ~tmp1;
+ ecc_code[1] = ~tmp2;
+#endif
ecc_code[2] = ((~reg1) << 2) | 0x03;
+
return 0;
}
+#endif /* CONFIG_NAND_SPL */
+
+static inline int countbits(uint32_t byte)
+{
+ int res = 0;
+
+ for (;byte; byte >>= 1)
+ res += byte & 0x01;
+ return res;
+}
/**
* nand_correct_data - [NAND Interface] Detect and correct bit error(s)
@@ -156,89 +148,53 @@
*
* Detect and correct a 1 bit error for 256 byte block
*/
-int nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc)
+int nand_correct_data(struct mtd_info *mtd, u_char *dat,
+ u_char *read_ecc, u_char *calc_ecc)
{
- u_char a, b, c, d1, d2, d3, add, bit, i;
+ uint8_t s0, s1, s2;
- /* Do error detection */
- d1 = calc_ecc[0] ^ read_ecc[0];
- d2 = calc_ecc[1] ^ read_ecc[1];
- d3 = calc_ecc[2] ^ read_ecc[2];
-
- if ((d1 | d2 | d3) == 0) {
- /* No errors */
+#ifdef CONFIG_MTD_NAND_ECC_SMC
+ s0 = calc_ecc[0] ^ read_ecc[0];
+ s1 = calc_ecc[1] ^ read_ecc[1];
+ s2 = calc_ecc[2] ^ read_ecc[2];
+#else
+ s1 = calc_ecc[0] ^ read_ecc[0];
+ s0 = calc_ecc[1] ^ read_ecc[1];
+ s2 = calc_ecc[2] ^ read_ecc[2];
+#endif
+ if ((s0 | s1 | s2) == 0)
return 0;
- }
- else {
- a = (d1 ^ (d1 >> 1)) & 0x55;
- b = (d2 ^ (d2 >> 1)) & 0x55;
- c = (d3 ^ (d3 >> 1)) & 0x54;
- /* Found and will correct single bit error in the data */
- if ((a == 0x55) && (b == 0x55) && (c == 0x54)) {
- c = 0x80;
- add = 0;
- a = 0x80;
- for (i=0; i<4; i++) {
- if (d1 & c)
- add |= a;
- c >>= 2;
- a >>= 1;
- }
- c = 0x80;
- for (i=0; i<4; i++) {
- if (d2 & c)
- add |= a;
- c >>= 2;
- a >>= 1;
- }
- bit = 0;
- b = 0x04;
- c = 0x80;
- for (i=0; i<3; i++) {
- if (d3 & c)
- bit |= b;
- c >>= 2;
- b >>= 1;
- }
- b = 0x01;
- a = dat[add];
- a ^= (b << bit);
- dat[add] = a;
- return 1;
- } else {
- i = 0;
- while (d1) {
- if (d1 & 0x01)
- ++i;
- d1 >>= 1;
- }
- while (d2) {
- if (d2 & 0x01)
- ++i;
- d2 >>= 1;
- }
- while (d3) {
- if (d3 & 0x01)
- ++i;
- d3 >>= 1;
- }
- if (i == 1) {
- /* ECC Code Error Correction */
- read_ecc[0] = calc_ecc[0];
- read_ecc[1] = calc_ecc[1];
- read_ecc[2] = calc_ecc[2];
- return 2;
- }
- else {
- /* Uncorrectable Error */
- return -1;
- }
- }
+ /* Check for a single bit error */
+ if( ((s0 ^ (s0 >> 1)) & 0x55) == 0x55 &&
+ ((s1 ^ (s1 >> 1)) & 0x55) == 0x55 &&
+ ((s2 ^ (s2 >> 1)) & 0x54) == 0x54) {
+
+ uint32_t byteoffs, bitnum;
+
+ byteoffs = (s1 << 0) & 0x80;
+ byteoffs |= (s1 << 1) & 0x40;
+ byteoffs |= (s1 << 2) & 0x20;
+ byteoffs |= (s1 << 3) & 0x10;
+
+ byteoffs |= (s0 >> 4) & 0x08;
+ byteoffs |= (s0 >> 3) & 0x04;
+ byteoffs |= (s0 >> 2) & 0x02;
+ byteoffs |= (s0 >> 1) & 0x01;
+
+ bitnum = (s2 >> 5) & 0x04;
+ bitnum |= (s2 >> 4) & 0x02;
+ bitnum |= (s2 >> 3) & 0x01;
+
+ dat[byteoffs] ^= (1 << bitnum);
+
+ return 1;
}
- /* Should never happen */
+ if(countbits(s0 | ((uint32_t)s1 << 8) | ((uint32_t)s2 <<16)) == 1)
+ return 1;
+
return -1;
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
+#endif
diff --git a/drivers/nand/nand_ids.c b/drivers/nand/nand_ids.c
index 8b58736..6d7e347 100644
--- a/drivers/nand/nand_ids.c
+++ b/drivers/nand/nand_ids.c
@@ -13,7 +13,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand.h>
@@ -123,6 +123,7 @@
{NAND_MFR_NATIONAL, "National"},
{NAND_MFR_RENESAS, "Renesas"},
{NAND_MFR_STMICRO, "ST Micro"},
+ {NAND_MFR_MICRON, "Micron"},
{0x0, "Unknown"}
};
#endif
diff --git a/drivers/nand/nand_util.c b/drivers/nand/nand_util.c
index 10bf036..4fd4e16 100644
--- a/drivers/nand/nand_util.c
+++ b/drivers/nand/nand_util.c
@@ -32,11 +32,12 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && !defined(CFG_NAND_LEGACY)
#include <command.h>
#include <watchdog.h>
#include <malloc.h>
+#include <div64.h>
#include <nand.h>
#include <jffs2/jffs2.h>
@@ -208,10 +209,13 @@
}
if (!opts->quiet) {
- int percent = (int)
- ((unsigned long long)
- (erase.addr+meminfo->erasesize-opts->offset)
- * 100 / erase_length);
+ unsigned long long n =(unsigned long long)
+ (erase.addr + meminfo->erasesize - opts->offset)
+ * 100;
+ int percent;
+
+ do_div(n, erase_length);
+ percent = (int)n;
/* output progress message only at whole percent
* steps to reduce the number of messages printed
@@ -475,10 +479,13 @@
imglen -= readlen;
if (!opts->quiet) {
- int percent = (int)
- ((unsigned long long)
- (opts->length-imglen) * 100
- / opts->length);
+ unsigned long long n = (unsigned long long)
+ (opts->length-imglen) * 100;
+ int percent;
+
+ do_div(n, opts->length);
+ percent = (int)n;
+
/* output progress message only at whole percent
* steps to reduce the number of messages printed
* on (slow) serial consoles
@@ -651,10 +658,13 @@
}
if (!opts->quiet) {
- int percent = (int)
- ((unsigned long long)
- (opts->length-imglen) * 100
- / opts->length);
+ unsigned long long n = (unsigned long long)
+ (opts->length-imglen) * 100;
+ int percent;
+
+ do_div(n, opts->length);
+ percent = (int)n;
+
/* output progress message only at whole percent
* steps to reduce the number of messages printed
* on (slow) serial consoles
@@ -859,4 +869,4 @@
return ret;
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY) */
+#endif
diff --git a/drivers/nand_legacy/nand_legacy.c b/drivers/nand_legacy/nand_legacy.c
index 458046d..49d2ebb 100644
--- a/drivers/nand_legacy/nand_legacy.c
+++ b/drivers/nand_legacy/nand_legacy.c
@@ -15,14 +15,7 @@
#include <asm/io.h>
#include <watchdog.h>
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
-#if (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY)
+#if defined(CONFIG_CMD_NAND) && defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#include <linux/mtd/nand_ids.h>
@@ -1616,4 +1609,4 @@
}
#endif /* CONFIG_JFFS2_NAND */
-#endif /* (CONFIG_COMMANDS & CFG_CMD_NAND) && defined(CFG_NAND_LEGACY) */
+#endif
diff --git a/drivers/natsemi.c b/drivers/natsemi.c
index b009db6..075d6c5 100644
--- a/drivers/natsemi.c
+++ b/drivers/natsemi.c
@@ -56,8 +56,8 @@
#include <asm/io.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_NATSEMI)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_NATSEMI)
/* defines */
#define EEPROM_SIZE 0xb /*12 16-bit chunks, or 24 bytes*/
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
new file mode 100644
index 0000000..37d69b9
--- /dev/null
+++ b/drivers/net/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libnet.a
+
+COBJS := mcffec.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/drivers/net/mcffec.c b/drivers/net/mcffec.c
new file mode 100644
index 0000000..3b81258
--- /dev/null
+++ b/drivers/net/mcffec.c
@@ -0,0 +1,597 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <malloc.h>
+
+#ifdef CONFIG_MCFFEC
+
+#include <asm/fec.h>
+#include <asm/immap.h>
+
+#include <command.h>
+#include <net.h>
+#include <miiphy.h>
+
+#undef ET_DEBUG
+#undef MII_DEBUG
+
+/* Ethernet Transmit and Receive Buffers */
+#define DBUF_LENGTH 1520
+#define TX_BUF_CNT 2
+#define PKT_MAXBUF_SIZE 1518
+#define PKT_MINBUF_SIZE 64
+#define PKT_MAXBLR_SIZE 1520
+#define LAST_PKTBUFSRX PKTBUFSRX - 1
+#define BD_ENET_RX_W_E (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY)
+#define BD_ENET_TX_RDY_LST (BD_ENET_TX_READY | BD_ENET_TX_LAST)
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
+
+struct fec_info_s fec_info[] = {
+#ifdef CFG_FEC0_IOBASE
+ {
+ 0, /* index */
+ CFG_FEC0_IOBASE, /* io base */
+ CFG_FEC0_PINMUX, /* gpio pin muxing */
+ CFG_FEC0_MIIBASE, /* mii base */
+ -1, /* phy_addr */
+ 0, /* duplex and speed */
+ 0, /* phy name */
+ 0, /* phyname init */
+ 0, /* RX BD */
+ 0, /* TX BD */
+ 0, /* rx Index */
+ 0, /* tx Index */
+ 0, /* tx buffer */
+ 0, /* initialized flag */
+ },
+#endif
+#ifdef CFG_FEC1_IOBASE
+ {
+ 1, /* index */
+ CFG_FEC1_IOBASE, /* io base */
+ CFG_FEC1_PINMUX, /* gpio pin muxing */
+ CFG_FEC1_MIIBASE, /* mii base */
+ -1, /* phy_addr */
+ 0, /* duplex and speed */
+ 0, /* phy name */
+ 0, /* phy name init */
+ 0, /* RX BD */
+ 0, /* TX BD */
+ 0, /* rx Index */
+ 0, /* tx Index */
+ 0, /* tx buffer */
+ 0, /* initialized flag */
+ }
+#endif
+};
+
+int fec_send(struct eth_device *dev, volatile void *packet, int length);
+int fec_recv(struct eth_device *dev);
+int fec_init(struct eth_device *dev, bd_t * bd);
+void fec_halt(struct eth_device *dev);
+void fec_reset(struct eth_device *dev);
+
+extern int fecpin_setclear(struct eth_device *dev, int setclear);
+
+#ifdef CFG_DISCOVER_PHY
+extern void __mii_init(void);
+extern uint mii_send(uint mii_cmd);
+extern int mii_discover_phy(struct eth_device *dev);
+extern int mcffec_miiphy_read(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short *value);
+extern int mcffec_miiphy_write(char *devname, unsigned char addr,
+ unsigned char reg, unsigned short value);
+#endif
+
+void setFecDuplexSpeed(volatile fec_t * fecp, bd_t * bd, int dup_spd)
+{
+ if ((dup_spd >> 16) == FULL) {
+ /* Set maximum frame length */
+ fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) | FEC_RCR_MII_MODE |
+ FEC_RCR_PROM | 0x100;
+ fecp->tcr = FEC_TCR_FDEN;
+ } else {
+ /* Half duplex mode */
+ fecp->rcr = FEC_RCR_MAX_FL(PKT_MAXBUF_SIZE) |
+ FEC_RCR_MII_MODE | FEC_RCR_DRT;
+ fecp->tcr &= ~FEC_TCR_FDEN;
+ }
+
+ if ((dup_spd & 0xFFFF) == _100BASET) {
+#ifdef MII_DEBUG
+ printf("100Mbps\n");
+#endif
+ bd->bi_ethspeed = 100;
+ } else {
+#ifdef MII_DEBUG
+ printf("10Mbps\n");
+#endif
+ bd->bi_ethspeed = 10;
+ }
+}
+
+int fec_send(struct eth_device *dev, volatile void *packet, int length)
+{
+ struct fec_info_s *info = dev->priv;
+ volatile fec_t *fecp = (fec_t *) (info->iobase);
+ int j, rc;
+ u16 phyStatus;
+
+ miiphy_read(dev->name, info->phy_addr, PHY_BMSR, &phyStatus);
+
+ /* section 16.9.23.3
+ * Wait for ready
+ */
+ j = 0;
+ while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
+ (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("TX not ready\n");
+ }
+
+ info->txbd[info->txIdx].cbd_bufaddr = (uint) packet;
+ info->txbd[info->txIdx].cbd_datlen = length;
+ info->txbd[info->txIdx].cbd_sc |= BD_ENET_TX_RDY_LST;
+
+ /* Activate transmit Buffer Descriptor polling */
+ fecp->tdar = 0x01000000; /* Descriptor polling active */
+
+#ifdef CFG_UNIFY_CACHE
+ icache_invalid();
+#endif
+ j = 0;
+ while ((info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_READY) &&
+ (j < MCFFEC_TOUT_LOOP)) {
+ udelay(1);
+ j++;
+ }
+ if (j >= MCFFEC_TOUT_LOOP) {
+ printf("TX timeout\n");
+ }
+
+#ifdef ET_DEBUG
+ printf("%s[%d] %s: cycles: %d status: %x retry cnt: %d\n",
+ __FILE__, __LINE__, __FUNCTION__, j,
+ info->txbd[info->txIdx].cbd_sc,
+ (info->txbd[info->txIdx].cbd_sc & 0x003C) >> 2);
+#endif
+
+ /* return only status bits */
+ rc = (info->txbd[info->txIdx].cbd_sc & BD_ENET_TX_STATS);
+ info->txIdx = (info->txIdx + 1) % TX_BUF_CNT;
+
+ return rc;
+}
+
+int fec_recv(struct eth_device *dev)
+{
+ struct fec_info_s *info = dev->priv;
+ volatile fec_t *fecp = (fec_t *) (info->iobase);
+ int length;
+
+ for (;;) {
+#ifdef CFG_UNIFY_CACHE
+ icache_invalid();
+#endif
+ /* section 16.9.23.2 */
+ if (info->rxbd[info->rxIdx].cbd_sc & BD_ENET_RX_EMPTY) {
+ length = -1;
+ break; /* nothing received - leave for() loop */
+ }
+
+ length = info->rxbd[info->rxIdx].cbd_datlen;
+
+ if (info->rxbd[info->rxIdx].cbd_sc & 0x003f) {
+ printf("%s[%d] err: %x\n",
+ __FUNCTION__, __LINE__,
+ info->rxbd[info->rxIdx].cbd_sc);
+#ifdef ET_DEBUG
+ printf("%s[%d] err: %x\n",
+ __FUNCTION__, __LINE__,
+ info->rxbd[info->rxIdx].cbd_sc);
+#endif
+ } else {
+
+ length -= 4;
+ /* Pass the packet up to the protocol layers. */
+ NetReceive(NetRxPackets[info->rxIdx], length);
+
+ fecp->eir |= FEC_EIR_RXF;
+ }
+
+ /* Give the buffer back to the FEC. */
+ info->rxbd[info->rxIdx].cbd_datlen = 0;
+
+ /* wrap around buffer index when necessary */
+ if (info->rxIdx == LAST_PKTBUFSRX) {
+ info->rxbd[PKTBUFSRX - 1].cbd_sc = BD_ENET_RX_W_E;
+ info->rxIdx = 0;
+ } else {
+ info->rxbd[info->rxIdx].cbd_sc = BD_ENET_RX_EMPTY;
+ info->rxIdx++;
+ }
+
+ /* Try to fill Buffer Descriptors */
+ fecp->rdar = 0x01000000; /* Descriptor polling active */
+ }
+
+ return length;
+}
+
+#ifdef ET_DEBUG
+void dbgFecRegs(struct eth_device *dev)
+{
+ struct fec_info_s *info = dev->priv;
+ volatile fec_t *fecp = (fec_t *) (info->iobase);
+
+ printf("=====\n");
+ printf("ievent %x - %x\n", (int)&fecp->eir, fecp->eir);
+ printf("imask %x - %x\n", (int)&fecp->eimr, fecp->eimr);
+ printf("r_des_active %x - %x\n", (int)&fecp->rdar, fecp->rdar);
+ printf("x_des_active %x - %x\n", (int)&fecp->tdar, fecp->tdar);
+ printf("ecntrl %x - %x\n", (int)&fecp->ecr, fecp->ecr);
+ printf("mii_mframe %x - %x\n", (int)&fecp->mmfr, fecp->mmfr);
+ printf("mii_speed %x - %x\n", (int)&fecp->mscr, fecp->mscr);
+ printf("mii_ctrlstat %x - %x\n", (int)&fecp->mibc, fecp->mibc);
+ printf("r_cntrl %x - %x\n", (int)&fecp->rcr, fecp->rcr);
+ printf("x_cntrl %x - %x\n", (int)&fecp->tcr, fecp->tcr);
+ printf("padr_l %x - %x\n", (int)&fecp->palr, fecp->palr);
+ printf("padr_u %x - %x\n", (int)&fecp->paur, fecp->paur);
+ printf("op_pause %x - %x\n", (int)&fecp->opd, fecp->opd);
+ printf("iadr_u %x - %x\n", (int)&fecp->iaur, fecp->iaur);
+ printf("iadr_l %x - %x\n", (int)&fecp->ialr, fecp->ialr);
+ printf("gadr_u %x - %x\n", (int)&fecp->gaur, fecp->gaur);
+ printf("gadr_l %x - %x\n", (int)&fecp->galr, fecp->galr);
+ printf("x_wmrk %x - %x\n", (int)&fecp->tfwr, fecp->tfwr);
+ printf("r_bound %x - %x\n", (int)&fecp->frbr, fecp->frbr);
+ printf("r_fstart %x - %x\n", (int)&fecp->frsr, fecp->frsr);
+ printf("r_drng %x - %x\n", (int)&fecp->erdsr, fecp->erdsr);
+ printf("x_drng %x - %x\n", (int)&fecp->etdsr, fecp->etdsr);
+ printf("r_bufsz %x - %x\n", (int)&fecp->emrbr, fecp->emrbr);
+
+ printf("\n");
+ printf("rmon_t_drop %x - %x\n", (int)&fecp->rmon_t_drop,
+ fecp->rmon_t_drop);
+ printf("rmon_t_packets %x - %x\n", (int)&fecp->rmon_t_packets,
+ fecp->rmon_t_packets);
+ printf("rmon_t_bc_pkt %x - %x\n", (int)&fecp->rmon_t_bc_pkt,
+ fecp->rmon_t_bc_pkt);
+ printf("rmon_t_mc_pkt %x - %x\n", (int)&fecp->rmon_t_mc_pkt,
+ fecp->rmon_t_mc_pkt);
+ printf("rmon_t_crc_align %x - %x\n", (int)&fecp->rmon_t_crc_align,
+ fecp->rmon_t_crc_align);
+ printf("rmon_t_undersize %x - %x\n", (int)&fecp->rmon_t_undersize,
+ fecp->rmon_t_undersize);
+ printf("rmon_t_oversize %x - %x\n", (int)&fecp->rmon_t_oversize,
+ fecp->rmon_t_oversize);
+ printf("rmon_t_frag %x - %x\n", (int)&fecp->rmon_t_frag,
+ fecp->rmon_t_frag);
+ printf("rmon_t_jab %x - %x\n", (int)&fecp->rmon_t_jab,
+ fecp->rmon_t_jab);
+ printf("rmon_t_col %x - %x\n", (int)&fecp->rmon_t_col,
+ fecp->rmon_t_col);
+ printf("rmon_t_p64 %x - %x\n", (int)&fecp->rmon_t_p64,
+ fecp->rmon_t_p64);
+ printf("rmon_t_p65to127 %x - %x\n", (int)&fecp->rmon_t_p65to127,
+ fecp->rmon_t_p65to127);
+ printf("rmon_t_p128to255 %x - %x\n", (int)&fecp->rmon_t_p128to255,
+ fecp->rmon_t_p128to255);
+ printf("rmon_t_p256to511 %x - %x\n", (int)&fecp->rmon_t_p256to511,
+ fecp->rmon_t_p256to511);
+ printf("rmon_t_p512to1023 %x - %x\n", (int)&fecp->rmon_t_p512to1023,
+ fecp->rmon_t_p512to1023);
+ printf("rmon_t_p1024to2047 %x - %x\n", (int)&fecp->rmon_t_p1024to2047,
+ fecp->rmon_t_p1024to2047);
+ printf("rmon_t_p_gte2048 %x - %x\n", (int)&fecp->rmon_t_p_gte2048,
+ fecp->rmon_t_p_gte2048);
+ printf("rmon_t_octets %x - %x\n", (int)&fecp->rmon_t_octets,
+ fecp->rmon_t_octets);
+
+ printf("\n");
+ printf("ieee_t_drop %x - %x\n", (int)&fecp->ieee_t_drop,
+ fecp->ieee_t_drop);
+ printf("ieee_t_frame_ok %x - %x\n", (int)&fecp->ieee_t_frame_ok,
+ fecp->ieee_t_frame_ok);
+ printf("ieee_t_1col %x - %x\n", (int)&fecp->ieee_t_1col,
+ fecp->ieee_t_1col);
+ printf("ieee_t_mcol %x - %x\n", (int)&fecp->ieee_t_mcol,
+ fecp->ieee_t_mcol);
+ printf("ieee_t_def %x - %x\n", (int)&fecp->ieee_t_def,
+ fecp->ieee_t_def);
+ printf("ieee_t_lcol %x - %x\n", (int)&fecp->ieee_t_lcol,
+ fecp->ieee_t_lcol);
+ printf("ieee_t_excol %x - %x\n", (int)&fecp->ieee_t_excol,
+ fecp->ieee_t_excol);
+ printf("ieee_t_macerr %x - %x\n", (int)&fecp->ieee_t_macerr,
+ fecp->ieee_t_macerr);
+ printf("ieee_t_cserr %x - %x\n", (int)&fecp->ieee_t_cserr,
+ fecp->ieee_t_cserr);
+ printf("ieee_t_sqe %x - %x\n", (int)&fecp->ieee_t_sqe,
+ fecp->ieee_t_sqe);
+ printf("ieee_t_fdxfc %x - %x\n", (int)&fecp->ieee_t_fdxfc,
+ fecp->ieee_t_fdxfc);
+ printf("ieee_t_octets_ok %x - %x\n", (int)&fecp->ieee_t_octets_ok,
+ fecp->ieee_t_octets_ok);
+
+ printf("\n");
+ printf("rmon_r_drop %x - %x\n", (int)&fecp->rmon_r_drop,
+ fecp->rmon_r_drop);
+ printf("rmon_r_packets %x - %x\n", (int)&fecp->rmon_r_packets,
+ fecp->rmon_r_packets);
+ printf("rmon_r_bc_pkt %x - %x\n", (int)&fecp->rmon_r_bc_pkt,
+ fecp->rmon_r_bc_pkt);
+ printf("rmon_r_mc_pkt %x - %x\n", (int)&fecp->rmon_r_mc_pkt,
+ fecp->rmon_r_mc_pkt);
+ printf("rmon_r_crc_align %x - %x\n", (int)&fecp->rmon_r_crc_align,
+ fecp->rmon_r_crc_align);
+ printf("rmon_r_undersize %x - %x\n", (int)&fecp->rmon_r_undersize,
+ fecp->rmon_r_undersize);
+ printf("rmon_r_oversize %x - %x\n", (int)&fecp->rmon_r_oversize,
+ fecp->rmon_r_oversize);
+ printf("rmon_r_frag %x - %x\n", (int)&fecp->rmon_r_frag,
+ fecp->rmon_r_frag);
+ printf("rmon_r_jab %x - %x\n", (int)&fecp->rmon_r_jab,
+ fecp->rmon_r_jab);
+ printf("rmon_r_p64 %x - %x\n", (int)&fecp->rmon_r_p64,
+ fecp->rmon_r_p64);
+ printf("rmon_r_p65to127 %x - %x\n", (int)&fecp->rmon_r_p65to127,
+ fecp->rmon_r_p65to127);
+ printf("rmon_r_p128to255 %x - %x\n", (int)&fecp->rmon_r_p128to255,
+ fecp->rmon_r_p128to255);
+ printf("rmon_r_p256to511 %x - %x\n", (int)&fecp->rmon_r_p256to511,
+ fecp->rmon_r_p256to511);
+ printf("rmon_r_p512to1023 %x - %x\n", (int)&fecp->rmon_r_p512to1023,
+ fecp->rmon_r_p512to1023);
+ printf("rmon_r_p1024to2047 %x - %x\n", (int)&fecp->rmon_r_p1024to2047,
+ fecp->rmon_r_p1024to2047);
+ printf("rmon_r_p_gte2048 %x - %x\n", (int)&fecp->rmon_r_p_gte2048,
+ fecp->rmon_r_p_gte2048);
+ printf("rmon_r_octets %x - %x\n", (int)&fecp->rmon_r_octets,
+ fecp->rmon_r_octets);
+
+ printf("\n");
+ printf("ieee_r_drop %x - %x\n", (int)&fecp->ieee_r_drop,
+ fecp->ieee_r_drop);
+ printf("ieee_r_frame_ok %x - %x\n", (int)&fecp->ieee_r_frame_ok,
+ fecp->ieee_r_frame_ok);
+ printf("ieee_r_crc %x - %x\n", (int)&fecp->ieee_r_crc,
+ fecp->ieee_r_crc);
+ printf("ieee_r_align %x - %x\n", (int)&fecp->ieee_r_align,
+ fecp->ieee_r_align);
+ printf("ieee_r_macerr %x - %x\n", (int)&fecp->ieee_r_macerr,
+ fecp->ieee_r_macerr);
+ printf("ieee_r_fdxfc %x - %x\n", (int)&fecp->ieee_r_fdxfc,
+ fecp->ieee_r_fdxfc);
+ printf("ieee_r_octets_ok %x - %x\n", (int)&fecp->ieee_r_octets_ok,
+ fecp->ieee_r_octets_ok);
+
+ printf("\n\n\n");
+}
+#endif
+
+int fec_init(struct eth_device *dev, bd_t * bd)
+{
+ struct fec_info_s *info = dev->priv;
+ volatile fec_t *fecp = (fec_t *) (info->iobase);
+ int i;
+ u8 *ea = NULL;
+
+ fecpin_setclear(dev, 1);
+
+ fec_reset(dev);
+
+#if defined(CONFIG_CMD_MII) || defined (CONFIG_MII) || \
+ defined (CFG_DISCOVER_PHY)
+
+ mii_init();
+
+ setFecDuplexSpeed(fecp, bd, info->dup_spd);
+#else
+#ifndef CFG_DISCOVER_PHY
+ setFecDuplexSpeed(fecp, bd, (FECDUPLEX << 16) | FECSPEED);
+#endif /* ifndef CFG_DISCOVER_PHY */
+#endif /* CONFIG_CMD_MII || CONFIG_MII */
+
+ /* We use strictly polling mode only */
+ fecp->eimr = 0;
+
+ /* Clear any pending interrupt */
+ fecp->eir = 0xffffffff;
+
+ /* Set station address */
+ if ((u32) fecp == CFG_FEC0_IOBASE) {
+#ifdef CFG_FEC1_IOBASE
+ volatile fec_t *fecp1 = (fec_t *) (CFG_FEC1_IOBASE);
+ ea = &bd->bi_enet1addr[0];
+ fecp1->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp1->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
+ ea = &bd->bi_enetaddr[0];
+ fecp->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp->paur = (ea[4] << 24) | (ea[5] << 16);
+ } else {
+#ifdef CFG_FEC0_IOBASE
+ volatile fec_t *fecp0 = (fec_t *) (CFG_FEC0_IOBASE);
+ ea = &bd->bi_enetaddr[0];
+ fecp0->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp0->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
+#ifdef CFG_FEC1_IOBASE
+ ea = &bd->bi_enet1addr[0];
+ fecp->palr =
+ (ea[0] << 24) | (ea[1] << 16) | (ea[2] << 8) | (ea[3]);
+ fecp->paur = (ea[4] << 24) | (ea[5] << 16);
+#endif
+ }
+
+ /* Clear unicast address hash table */
+ fecp->iaur = 0;
+ fecp->ialr = 0;
+
+ /* Clear multicast address hash table */
+ fecp->gaur = 0;
+ fecp->galr = 0;
+
+ /* Set maximum receive buffer size. */
+ fecp->emrbr = PKT_MAXBLR_SIZE;
+
+ /*
+ * Setup Buffers and Buffer Desriptors
+ */
+ info->rxIdx = 0;
+ info->txIdx = 0;
+
+ /*
+ * Setup Receiver Buffer Descriptors (13.14.24.18)
+ * Settings:
+ * Empty, Wrap
+ */
+ for (i = 0; i < PKTBUFSRX; i++) {
+ info->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY;
+ info->rxbd[i].cbd_datlen = 0; /* Reset */
+ info->rxbd[i].cbd_bufaddr = (uint) NetRxPackets[i];
+ }
+ info->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP;
+
+ /*
+ * Setup Ethernet Transmitter Buffer Descriptors (13.14.24.19)
+ * Settings:
+ * Last, Tx CRC
+ */
+ for (i = 0; i < TX_BUF_CNT; i++) {
+ info->txbd[i].cbd_sc = BD_ENET_TX_LAST | BD_ENET_TX_TC;
+ info->txbd[i].cbd_datlen = 0; /* Reset */
+ info->txbd[i].cbd_bufaddr = (uint) (&info->txbuf[0]);
+ }
+ info->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP;
+
+ /* Set receive and transmit descriptor base */
+ fecp->erdsr = (unsigned int)(&info->rxbd[0]);
+ fecp->etdsr = (unsigned int)(&info->txbd[0]);
+
+ /* Now enable the transmit and receive processing */
+ fecp->ecr |= FEC_ECR_ETHER_EN;
+
+ /* And last, try to fill Rx Buffer Descriptors */
+ fecp->rdar = 0x01000000; /* Descriptor polling active */
+
+ return 1;
+}
+
+void fec_reset(struct eth_device *dev)
+{
+ struct fec_info_s *info = dev->priv;
+ volatile fec_t *fecp = (fec_t *) (info->iobase);
+ int i;
+
+ fecp->ecr = FEC_ECR_RESET;
+ for (i = 0; (fecp->ecr & FEC_ECR_RESET) && (i < FEC_RESET_DELAY); ++i) {
+ udelay(1);
+ }
+ if (i == FEC_RESET_DELAY) {
+ printf("FEC_RESET_DELAY timeout\n");
+ }
+}
+
+void fec_halt(struct eth_device *dev)
+{
+ struct fec_info_s *info = dev->priv;
+
+ fec_reset(dev);
+
+ fecpin_setclear(dev, 0);
+
+ info->rxIdx = info->txIdx = 0;
+ memset(info->rxbd, 0, PKTBUFSRX * sizeof(cbd_t));
+ memset(info->txbd, 0, TX_BUF_CNT * sizeof(cbd_t));
+ memset(info->txbuf, 0, DBUF_LENGTH);
+}
+
+int mcffec_initialize(bd_t * bis)
+{
+ struct eth_device *dev;
+ int i;
+
+ for (i = 0; i < sizeof(fec_info) / sizeof(fec_info[0]); i++) {
+
+ dev =
+ (struct eth_device *)memalign(CFG_CACHELINE_SIZE,
+ sizeof *dev);
+ if (dev == NULL)
+ hang();
+
+ memset(dev, 0, sizeof(*dev));
+
+ sprintf(dev->name, "FEC%d", fec_info[i].index);
+
+ dev->priv = &fec_info[i];
+ dev->init = fec_init;
+ dev->halt = fec_halt;
+ dev->send = fec_send;
+ dev->recv = fec_recv;
+
+ /* setup Receive and Transmit buffer descriptor */
+ fec_info[i].rxbd =
+ (cbd_t *) memalign(CFG_CACHELINE_SIZE,
+ (PKTBUFSRX * sizeof(cbd_t)));
+ fec_info[i].txbd =
+ (cbd_t *) memalign(CFG_CACHELINE_SIZE,
+ (TX_BUF_CNT * sizeof(cbd_t)));
+ fec_info[i].txbuf =
+ (char *)memalign(CFG_CACHELINE_SIZE, DBUF_LENGTH);
+#ifdef ET_DEBUG
+ printf("rxbd %x txbd %x\n",
+ (int)fec_info[i].rxbd, (int)fec_info[i].txbd);
+#endif
+
+ fec_info[i].phy_name = (char *)memalign(CFG_CACHELINE_SIZE, 32);
+
+ eth_register(dev);
+
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
+ miiphy_register(dev->name,
+ mcffec_miiphy_read, mcffec_miiphy_write);
+#endif
+ }
+
+ /* default speed */
+ bis->bi_ethspeed = 10;
+
+ return 1;
+}
+
+#endif /* CONFIG_CMD_NET, FEC_ENET & NET_MULTI */
+#endif /* CONFIG_MCFFEC */
diff --git a/drivers/netarm_eth.c b/drivers/netarm_eth.c
index 89b3a83..a99ee5d 100644
--- a/drivers/netarm_eth.c
+++ b/drivers/netarm_eth.c
@@ -30,7 +30,7 @@
#include <asm/arch/netarm_registers.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
static int na_mii_poll_busy (void);
diff --git a/drivers/ns8382x.c b/drivers/ns8382x.c
index 976f86a..f8b143a 100644
--- a/drivers/ns8382x.c
+++ b/drivers/ns8382x.c
@@ -56,8 +56,8 @@
#include <asm/io.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
- defined(CONFIG_NS8382X)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_NS8382X)
/* defines */
#define DSIZE 0x00000FFF
diff --git a/drivers/pci.c b/drivers/pci.c
index 050582f..50ca6b0 100644
--- a/drivers/pci.c
+++ b/drivers/pci.c
@@ -82,8 +82,10 @@
{ \
u32 val32; \
\
- if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0)\
+ if (pci_hose_read_config_dword(hose, dev, offset & 0xfc, &val32) < 0) { \
+ *val = -1; \
return -1; \
+ } \
\
*val = (val32 >> ((offset & (int)off_mask) * 8)); \
\
@@ -490,10 +492,16 @@
int pci_hose_scan(struct pci_controller *hose)
{
+ /* Start scan at current_busno.
+ * PCIe will start scan at first_busno+1.
+ */
+ /* For legacy support, ensure current>=first */
+ if (hose->first_busno > hose->current_busno)
+ hose->current_busno = hose->first_busno;
#ifdef CONFIG_PCI_PNP
pciauto_config_init(hose);
#endif
- return pci_hose_scan_bus(hose, hose->first_busno);
+ return pci_hose_scan_bus(hose, hose->current_busno);
}
void pci_init(void)
diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c
index f170c2d..acfda83 100644
--- a/drivers/pci_auto.c
+++ b/drivers/pci_auto.c
@@ -28,6 +28,11 @@
#define PCIAUTO_IDE_MODE_MASK 0x05
+/* the user can define CFG_PCI_CACHE_LINE_SIZE to avoid problems */
+#ifndef CFG_PCI_CACHE_LINE_SIZE
+#define CFG_PCI_CACHE_LINE_SIZE 8
+#endif
+
/*
*
*/
@@ -65,7 +70,7 @@
res->bus_lower = addr + size;
- DEBUGF("address=0x%lx", addr);
+ DEBUGF("address=0x%lx bus_lower=%x", addr, res->bus_lower);
*bar = addr;
return 0;
@@ -94,7 +99,7 @@
pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
cmdstat = (cmdstat & ~(PCI_COMMAND_IO | PCI_COMMAND_MEMORY)) | PCI_COMMAND_MASTER;
- for (bar = PCI_BASE_ADDRESS_0; bar <= PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) {
+ for (bar = PCI_BASE_ADDRESS_0; bar < PCI_BASE_ADDRESS_0 + (bars_num*4); bar += 4) {
/* Tickle the BAR and get the response */
pci_hose_write_config_dword(hose, dev, bar, 0xffffffff);
pci_hose_read_config_dword(hose, dev, bar, &bar_response);
@@ -150,11 +155,12 @@
}
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat);
- pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE, 0x08);
+ pci_hose_write_config_byte(hose, dev, PCI_CACHE_LINE_SIZE,
+ CFG_PCI_CACHE_LINE_SIZE);
pci_hose_write_config_byte(hose, dev, PCI_LATENCY_TIMER, 0x80);
}
-static void pciauto_prescan_setup_bridge(struct pci_controller *hose,
+void pciauto_prescan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
struct pci_region *pci_mem = hose->pci_mem;
@@ -165,8 +171,10 @@
pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &cmdstat);
/* Configure bus number registers */
- pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS, PCI_BUS(dev));
- pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS, sub_bus);
+ pci_hose_write_config_byte(hose, dev, PCI_PRIMARY_BUS,
+ PCI_BUS(dev) - hose->first_busno);
+ pci_hose_write_config_byte(hose, dev, PCI_SECONDARY_BUS,
+ sub_bus - hose->first_busno);
pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, 0xff);
if (pci_mem) {
@@ -211,7 +219,7 @@
pci_hose_write_config_dword(hose, dev, PCI_COMMAND, cmdstat | PCI_COMMAND_MASTER);
}
-static void pciauto_postscan_setup_bridge(struct pci_controller *hose,
+void pciauto_postscan_setup_bridge(struct pci_controller *hose,
pci_dev_t dev, int sub_bus)
{
struct pci_region *pci_mem = hose->pci_mem;
@@ -219,7 +227,8 @@
struct pci_region *pci_io = hose->pci_io;
/* Configure bus number registers */
- pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS, sub_bus);
+ pci_hose_write_config_byte(hose, dev, PCI_SUBORDINATE_BUS,
+ sub_bus - hose->first_busno);
if (pci_mem) {
/* Round memory allocator to 1MB boundary */
@@ -282,25 +291,36 @@
if (hose->pci_mem) {
pciauto_region_init(hose->pci_mem);
- DEBUGF("PCI Autoconfig: Memory region: [%lx-%lx]\n",
+ DEBUGF("PCI Autoconfig: Bus Memory region: [%lx-%lx],\n"
+ "\t\tPhysical Memory [%x-%x]\n",
hose->pci_mem->bus_start,
- hose->pci_mem->bus_start + hose->pci_mem->size - 1);
+ hose->pci_mem->bus_start + hose->pci_mem->size - 1,
+ hose->pci_mem->phys_start,
+ hose->pci_mem->phys_start + hose->pci_mem->size - 1);
}
if (hose->pci_prefetch) {
pciauto_region_init(hose->pci_prefetch);
- DEBUGF("PCI Autoconfig: Prefetchable Memory region: [%lx-%lx]\n",
+ DEBUGF("PCI Autoconfig: Bus Prefetchable Mem: [%lx-%lx],\n"
+ "\t\tPhysical Memory [%x-%x]\n",
hose->pci_prefetch->bus_start,
- hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1);
+ hose->pci_prefetch->bus_start + hose->pci_prefetch->size - 1,
+ hose->pci_prefetch->phys_start,
+ hose->pci_prefetch->phys_start +
+ hose->pci_prefetch->size - 1);
}
if (hose->pci_io) {
pciauto_region_init(hose->pci_io);
- DEBUGF("PCI Autoconfig: I/O region: [%lx-%lx]\n",
+ DEBUGF("PCI Autoconfig: Bus I/O region: [%lx-%lx],\n"
+ "\t\tPhysical Memory: [%x-%x]\n",
hose->pci_io->bus_start,
- hose->pci_io->bus_start + hose->pci_io->size - 1);
+ hose->pci_io->bus_start + hose->pci_io->size - 1,
+ hose->pci_io->phys_start,
+ hose->pci_io->phys_start + hose->pci_io->size - 1);
+
}
}
@@ -317,6 +337,12 @@
pci_hose_read_config_word(hose, dev, PCI_CLASS_DEVICE, &class);
switch(class) {
+ case PCI_CLASS_PROCESSOR_POWERPC: /* an agent or end-point */
+ DEBUGF("PCI AutoConfig: Found PowerPC device\n");
+ pciauto_setup_device(hose, dev, 6, hose->pci_mem,
+ hose->pci_prefetch, hose->pci_io);
+ break;
+
case PCI_CLASS_BRIDGE_PCI:
hose->current_busno++;
pciauto_setup_device(hose, dev, 2, hose->pci_mem, hose->pci_prefetch, hose->pci_io);
diff --git a/drivers/pci_indirect.c b/drivers/pci_indirect.c
index d7be081..a8220fb 100644
--- a/drivers/pci_indirect.c
+++ b/drivers/pci_indirect.c
@@ -45,7 +45,7 @@
cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
return 0; \
}
-#elif defined(CONFIG_E500)
+#elif defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define INDIRECT_PCI_OP(rw, size, type, op, mask) \
static int \
indirect_##rw##_config_##size(struct pci_controller *hose, \
@@ -55,7 +55,7 @@
b = PCI_BUS(dev); d = PCI_DEV(dev); f = PCI_FUNC(dev); \
b = b - hose->first_busno; \
dev = PCI_BDF(b, d, f); \
- *(hose->cfg_addr) = dev | (offset & 0xfc) | 0x80000000; \
+ *(hose->cfg_addr) = dev | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000; \
sync(); \
cfg_##rw(val, hose->cfg_data + (offset & mask), type, op); \
return 0; \
diff --git a/drivers/pcnet.c b/drivers/pcnet.c
index da9ac7f..2af0e8f 100644
--- a/drivers/pcnet.c
+++ b/drivers/pcnet.c
@@ -45,8 +45,8 @@
#define PCNET_DEBUG2(fmt,args...)
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) \
- && defined(CONFIG_PCNET)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_PCNET)
#if !defined(CONF_PCNET_79C973) && defined(CONF_PCNET_79C975)
#error "Macro for PCnet chip version is not defined!"
diff --git a/drivers/plb2800_eth.c b/drivers/plb2800_eth.c
index 4c683d7..0ae5d80 100644
--- a/drivers/plb2800_eth.c
+++ b/drivers/plb2800_eth.c
@@ -25,8 +25,8 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) \
- && defined(CONFIG_PLB2800_ETHER)
+#if defined(CONFIG_CMD_NET) \
+ && defined(CONFIG_NET_MULTI) && defined(CONFIG_PLB2800_ETHER)
#include <malloc.h>
#include <net.h>
diff --git a/drivers/pxa_pcmcia.c b/drivers/pxa_pcmcia.c
index d9d38bb..6020e46 100644
--- a/drivers/pxa_pcmcia.c
+++ b/drivers/pxa_pcmcia.c
@@ -85,7 +85,7 @@
return rc;
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_off (void)
{
return 0;
diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c
index 5f20962..7559e92 100644
--- a/drivers/qe/qe.c
+++ b/drivers/qe/qe.c
@@ -30,6 +30,8 @@
qe_map_t *qe_immr = NULL;
static qe_snum_t snums[QE_NUM_OF_SNUM];
+DECLARE_GLOBAL_DATA_PTR;
+
void qe_issue_cmd(uint cmd, uint sbc, u8 mcn, u32 cmd_data)
{
u32 cecr;
@@ -51,8 +53,6 @@
uint qe_muram_alloc(uint size, uint align)
{
- DECLARE_GLOBAL_DATA_PTR;
-
uint retloc;
uint align_mask, off;
uint savebase;
@@ -98,7 +98,7 @@
out_be32(&p->sdaqmr, 0);
/* Allocate 2KB temporary buffer for sdma */
- sdma_buffer_base = qe_muram_alloc(2048, 64);
+ sdma_buffer_base = qe_muram_alloc(2048, 4096);
out_be32(&p->sdwbcr, sdma_buffer_base & QE_SDEBCR_BA_MASK);
/* Clear sdma status */
@@ -158,8 +158,6 @@
void qe_init(uint qe_base)
{
- DECLARE_GLOBAL_DATA_PTR;
-
/* Init the QE IMMR base */
qe_immr = (qe_map_t *)qe_base;
@@ -204,7 +202,6 @@
int qe_set_brg(uint brg, uint rate)
{
- DECLARE_GLOBAL_DATA_PTR;
volatile uint *bp;
u32 divisor;
int div16 = 0;
diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h
index 0bcd0a9..400b1a6 100644
--- a/drivers/qe/qe.h
+++ b/drivers/qe/qe.h
@@ -29,7 +29,7 @@
#define QE_NUM_OF_BRGS 16
#define UCC_MAX_NUM 8
-#define QE_DATAONLY_BASE (uint)(128)
+#define QE_DATAONLY_BASE 0
#define QE_DATAONLY_SIZE (QE_MURAM_SIZE - QE_DATAONLY_BASE)
/* QE threads SNUM
diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c
index c416a67..dc2765b 100644
--- a/drivers/qe/uec.c
+++ b/drivers/qe/uec.c
@@ -391,17 +391,17 @@
return 0;
}
-static int init_mii_management_configuration(uec_t *uec_regs)
+static int init_mii_management_configuration(uec_mii_t *uec_mii_regs)
{
uint timeout = 0x1000;
u32 miimcfg = 0;
- miimcfg = in_be32(&uec_regs->miimcfg);
+ miimcfg = in_be32(&uec_mii_regs->miimcfg);
miimcfg |= MIIMCFG_MNGMNT_CLC_DIV_INIT_VALUE;
- out_be32(&uec_regs->miimcfg, miimcfg);
+ out_be32(&uec_mii_regs->miimcfg, miimcfg);
/* Wait until the bus is free */
- while ((in_be32(&uec_regs->miimcfg) & MIIMIND_BUSY) && timeout--);
+ while ((in_be32(&uec_mii_regs->miimcfg) & MIIMIND_BUSY) && timeout--);
if (timeout <= 0) {
printf("%s: The MII Bus is stuck!", __FUNCTION__);
return -ETIMEDOUT;
@@ -413,13 +413,13 @@
static int init_phy(struct eth_device *dev)
{
uec_private_t *uec;
- uec_t *uec_regs;
+ uec_mii_t *umii_regs;
struct uec_mii_info *mii_info;
struct phy_info *curphy;
int err;
uec = (uec_private_t *)dev->priv;
- uec_regs = uec->uec_regs;
+ umii_regs = uec->uec_mii_regs;
uec->oldlink = 0;
uec->oldspeed = 0;
@@ -451,19 +451,19 @@
mii_info->mii_id = uec->uec_info->phy_address;
mii_info->dev = dev;
- mii_info->mdio_read = &read_phy_reg;
- mii_info->mdio_write = &write_phy_reg;
+ mii_info->mdio_read = &uec_read_phy_reg;
+ mii_info->mdio_write = &uec_write_phy_reg;
uec->mii_info = mii_info;
- if (init_mii_management_configuration(uec_regs)) {
+ if (init_mii_management_configuration(umii_regs)) {
printf("%s: The MII Bus is stuck!", dev->name);
err = -1;
goto bus_fail;
}
/* get info for this PHY */
- curphy = get_phy_info(uec->mii_info);
+ curphy = uec_get_phy_info(uec->mii_info);
if (!curphy) {
printf("%s: No PHY found", dev->name);
err = -1;
@@ -989,6 +989,13 @@
/* Setup MAC interface mode */
uec_set_mac_if_mode(uec, uec_info->enet_interface);
+ /* Setup MII management base */
+#ifndef CONFIG_eTSEC_MDIO_BUS
+ uec->uec_mii_regs = (uec_mii_t *)(&uec_regs->miimcfg);
+#else
+ uec->uec_mii_regs = (uec_mii_t *) CONFIG_MIIM_ADDRESS;
+#endif
+
/* Setup MII master clock source */
qe_set_mii_clk_src(uec_info->uf_info.ucc_num);
@@ -1103,7 +1110,7 @@
if (dev->enetaddr[0] & 0x01) {
printf("%s: MacAddress is multcast address\n",
__FUNCTION__);
- return -EINVAL;
+ return 0;
}
uec_set_mac_address(uec, dev->enetaddr);
uec->the_first_run = 1;
@@ -1112,10 +1119,10 @@
err = uec_open(uec, COMM_DIR_RX_AND_TX);
if (err) {
printf("%s: cannot enable UEC device\n", dev->name);
- return err;
+ return 0;
}
- return 0;
+ return uec->mii_info->link;
}
static void uec_halt(struct eth_device* dev)
diff --git a/drivers/qe/uec.h b/drivers/qe/uec.h
index 0495026..c384055 100644
--- a/drivers/qe/uec.h
+++ b/drivers/qe/uec.h
@@ -675,6 +675,7 @@
ucc_fast_private_t *uccf;
struct eth_device *dev;
uec_t *uec_regs;
+ uec_mii_t *uec_mii_regs;
/* enet init command parameter */
uec_init_cmd_pram_t *p_init_enet_param;
u32 init_enet_param_offset;
diff --git a/drivers/qe/uec_phy.c b/drivers/qe/uec_phy.c
index 76fd388..ca6faa6 100644
--- a/drivers/qe/uec_phy.c
+++ b/drivers/qe/uec_phy.c
@@ -60,14 +60,14 @@
/* Write value to the PHY for this device to the register at regnum, */
/* waiting until the write is done before it returns. All PHY */
/* configuration has to be done through the TSEC1 MIIM regs */
-void write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value)
+void uec_write_phy_reg (struct eth_device *dev, int mii_id, int regnum, int value)
{
uec_private_t *ugeth = (uec_private_t *) dev->priv;
- uec_t *ug_regs;
+ uec_mii_t *ug_regs;
enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum;
u32 tmp_reg;
- ug_regs = ugeth->uec_regs;
+ ug_regs = ugeth->uec_mii_regs;
/* Stop the MII management read cycle */
out_be32 (&ug_regs->miimcom, 0);
@@ -87,15 +87,15 @@
/* Reads from register regnum in the PHY for device dev, */
/* returning the value. Clears miimcom first. All PHY */
/* configuration has to be done through the TSEC1 MIIM regs */
-int read_phy_reg (struct eth_device *dev, int mii_id, int regnum)
+int uec_read_phy_reg (struct eth_device *dev, int mii_id, int regnum)
{
uec_private_t *ugeth = (uec_private_t *) dev->priv;
- uec_t *ug_regs;
+ uec_mii_t *ug_regs;
enet_tbi_mii_reg_e mii_reg = (enet_tbi_mii_reg_e) regnum;
u32 tmp_reg;
u16 value;
- ug_regs = ugeth->uec_regs;
+ ug_regs = ugeth->uec_mii_regs;
/* Setting up the MII Mangement Address Register */
tmp_reg = ((u32) mii_id << MIIMADD_PHY_ADDRESS_SHIFT) | mii_reg;
@@ -521,7 +521,7 @@
/* Use the PHY ID registers to determine what type of PHY is attached
* to device dev. return a struct phy_info structure describing that PHY
*/
-struct phy_info *get_phy_info (struct uec_mii_info *mii_info)
+struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info)
{
u16 phy_reg;
u32 phy_ID;
diff --git a/drivers/qe/uec_phy.h b/drivers/qe/uec_phy.h
index 9bd926d..e59a940 100644
--- a/drivers/qe/uec_phy.h
+++ b/drivers/qe/uec_phy.h
@@ -249,10 +249,10 @@
void (*close) (struct uec_mii_info * mii_info);
};
-struct phy_info *get_phy_info (struct uec_mii_info *mii_info);
-void write_phy_reg (struct eth_device *dev, int mii_id, int regnum,
+struct phy_info *uec_get_phy_info (struct uec_mii_info *mii_info);
+void uec_write_phy_reg (struct eth_device *dev, int mii_id, int regnum,
int value);
-int read_phy_reg (struct eth_device *dev, int mii_id, int regnum);
+int uec_read_phy_reg (struct eth_device *dev, int mii_id, int regnum);
void mii_clear_phy_interrupt (struct uec_mii_info *mii_info);
void mii_configure_phy_interrupt (struct uec_mii_info *mii_info,
u32 interrupts);
diff --git a/drivers/rpx_pcmcia.c b/drivers/rpx_pcmcia.c
index 2a0a9e0..c7c425b 100644
--- a/drivers/rpx_pcmcia.c
+++ b/drivers/rpx_pcmcia.c
@@ -9,11 +9,11 @@
#undef CONFIG_PCMCIA
-#if CONFIG_COMMANDS & CFG_CMD_PCMCIA
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -62,12 +62,12 @@
return 0; /* No hardware to enable */
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
static int pcmcia_hardware_disable(int slot)
{
return 0; /* No hardware to disable */
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_PCMCIA */
+#endif
#endif /* CONFIG_PCMCIA && (CONFIG_RPXCLASSIC || CONFIG_RPXLITE) */
diff --git a/drivers/rtl8019.c b/drivers/rtl8019.c
index 62b9245..409a69f 100644
--- a/drivers/rtl8019.c
+++ b/drivers/rtl8019.c
@@ -34,7 +34,7 @@
#ifdef CONFIG_DRIVER_RTL8019
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
/* packet page register access functions */
diff --git a/drivers/rtl8139.c b/drivers/rtl8139.c
index afe1a4f..2367180 100644
--- a/drivers/rtl8139.c
+++ b/drivers/rtl8139.c
@@ -77,7 +77,7 @@
#include <asm/io.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
defined(CONFIG_RTL8139)
#define TICKS_PER_SEC CFG_HZ
@@ -193,6 +193,12 @@
static int rtl_transmit(struct eth_device *dev, volatile void *packet, int length);
static int rtl_poll(struct eth_device *dev);
static void rtl_disable(struct eth_device *dev);
+#ifdef CONFIG_MCAST_TFTP/* This driver already accepts all b/mcast */
+static int rtl_bcast_addr (struct eth_device *dev, u8 bcast_mac, u8 set)
+{
+ return (0);
+}
+#endif
static struct pci_device_id supported[] = {
{PCI_VENDOR_ID_REALTEK, PCI_DEVICE_ID_REALTEK_8139},
@@ -228,6 +234,9 @@
dev->halt = rtl_disable;
dev->send = rtl_transmit;
dev->recv = rtl_poll;
+#ifdef CONFIG_MCAST_TFTP
+ dev->mcast = rtl_bcast_addr;
+#endif
eth_register (dev);
@@ -535,4 +544,4 @@
udelay (100); /* wait 100us */
}
}
-#endif /* CFG_CMD_NET && CONFIG_NET_MULTI && CONFIG_RTL8139 */
+#endif
diff --git a/drivers/rtl8169.c b/drivers/rtl8169.c
index 3393ba8..63ea2cc 100644
--- a/drivers/rtl8169.c
+++ b/drivers/rtl8169.c
@@ -55,7 +55,7 @@
#include <asm/io.h>
#include <pci.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
defined(CONFIG_RTL8169)
#undef DEBUG_RTL8169
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
new file mode 100644
index 0000000..93c68dd
--- /dev/null
+++ b/drivers/serial/Makefile
@@ -0,0 +1,45 @@
+#
+# (C) Copyright 2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB := $(obj)libserial.a
+
+COBJS := mcfuart.o
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS))
+
+all: $(LIB)
+
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/drivers/serial/mcfuart.c b/drivers/serial/mcfuart.c
new file mode 100644
index 0000000..88f3eb1
--- /dev/null
+++ b/drivers/serial/mcfuart.c
@@ -0,0 +1,133 @@
+/*
+ * (C) Copyright 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew, Tsi-Chung.Liew@freescale.com.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+/*
+ * Minimal serial functions needed to use one of the uart ports
+ * as serial console interface.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_MCFUART
+
+#include <asm/immap.h>
+#include <asm/uart.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+extern void uart_port_conf(void);
+
+int serial_init(void)
+{
+ volatile uart_t *uart;
+ u32 counter;
+
+ uart = (volatile uart_t *)(CFG_UART_BASE);
+
+ uart_port_conf();
+
+ /* write to SICR: SIM2 = uart mode,dcd does not affect rx */
+ uart->ucr = UART_UCR_RESET_RX;
+ uart->ucr = UART_UCR_RESET_TX;
+ uart->ucr = UART_UCR_RESET_ERROR;
+ uart->ucr = UART_UCR_RESET_MR;
+ __asm__("nop");
+
+ uart->uimr = 0;
+
+ /* write to CSR: RX/TX baud rate from timers */
+ uart->ucsr = (UART_UCSR_RCS_SYS_CLK | UART_UCSR_TCS_SYS_CLK);
+
+ uart->umr = (UART_UMR_BC_8 | UART_UMR_PM_NONE);
+ uart->umr = UART_UMR_SB_STOP_BITS_1;
+
+ /* Setting up BaudRate */
+ counter = (u32) (gd->bus_clk / (gd->baudrate));
+ counter >>= 5;
+
+ /* write to CTUR: divide counter upper byte */
+ uart->ubg1 = (u8) ((counter & 0xff00) >> 8);
+ /* write to CTLR: divide counter lower byte */
+ uart->ubg2 = (u8) (counter & 0x00ff);
+
+ uart->ucr = (UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED);
+
+ return (0);
+}
+
+void serial_putc(const char c)
+{
+ volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
+
+ if (c == '\n')
+ serial_putc('\r');
+
+ /* Wait for last character to go. */
+ while (!(uart->usr & UART_USR_TXRDY)) ;
+
+ uart->utb = c;
+}
+
+void serial_puts(const char *s)
+{
+ while (*s) {
+ serial_putc(*s++);
+ }
+}
+
+int serial_getc(void)
+{
+ volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
+
+ /* Wait for a character to arrive. */
+ while (!(uart->usr & UART_USR_RXRDY)) ;
+ return uart->urb;
+}
+
+int serial_tstc(void)
+{
+ volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
+
+ return (uart->usr & UART_USR_RXRDY);
+}
+
+void serial_setbrg(void)
+{
+ volatile uart_t *uart = (volatile uart_t *)(CFG_UART_BASE);
+ u32 counter;
+
+ counter = ((gd->bus_clk / gd->baudrate)) >> 5;
+ counter++;
+
+ /* write to CTUR: divide counter upper byte */
+ uart->ubg1 = ((counter & 0xff00) >> 8);
+ /* write to CTLR: divide counter lower byte */
+ uart->ubg2 = (counter & 0x00ff);
+
+ uart->ucr = UART_UCR_RESET_RX;
+ uart->ucr = UART_UCR_RESET_TX;
+
+ uart->ucr = UART_UCR_RX_ENABLED | UART_UCR_TX_ENABLED;
+}
+#endif /* CONFIG_MCFUART */
diff --git a/drivers/sil680.c b/drivers/sil680.c
new file mode 100644
index 0000000..a6143df
--- /dev/null
+++ b/drivers/sil680.c
@@ -0,0 +1,110 @@
+/*
+ * (C) Copyright 2007
+ * Gary Jennejohn, DENX Software Engineering, garyj@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+/* sil680.c - ide support functions for the Sil0680A controller */
+
+/*
+ * The following parameters must be defined in the configuration file
+ * of the target board:
+ *
+ * #define CFG_IDE_SIL680
+ *
+ * #define CONFIG_PCI_PNP
+ * NOTE it may also be necessary to define this if the default of 8 is
+ * incorrect for the target board (e.g. the sequoia board requires 0).
+ * #define CFG_PCI_CACHE_LINE_SIZE 0
+ *
+ * #define CONFIG_CMD_IDE
+ * #undef CONFIG_IDE_8xx_DIRECT
+ * #undef CONFIG_IDE_LED
+ * #undef CONFIG_IDE_RESET
+ * #define CONFIG_IDE_PREINIT
+ * #define CFG_IDE_MAXBUS 2 - modify to suit
+ * #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) - modify to suit
+ * #define CFG_ATA_BASE_ADDR 0
+ * #define CFG_ATA_IDE0_OFFSET 0
+ * #define CFG_ATA_IDE1_OFFSET 0
+ * #define CFG_ATA_DATA_OFFSET 0
+ * #define CFG_ATA_REG_OFFSET 0
+ * #define CFG_ATA_ALT_OFFSET 0x0004
+ *
+ * The mapping for PCI IO-space.
+ * NOTE this is the value for the sequoia board. Modify to suit.
+ * #define CFG_PCI0_IO_SPACE 0xE8000000
+ */
+
+#include <common.h>
+#if defined(CFG_IDE_SIL680)
+#include <ata.h>
+#include <ide.h>
+#include <pci.h>
+
+extern ulong ide_bus_offset[CFG_IDE_MAXBUS];
+
+int ide_preinit (void)
+{
+ int status;
+ pci_dev_t devbusfn;
+ int l;
+
+ status = 1;
+ for (l = 0; l < CFG_IDE_MAXBUS; l++) {
+ ide_bus_offset[l] = -ATA_STATUS;
+ }
+ devbusfn = pci_find_device (0x1095, 0x0680, 0);
+ if (devbusfn != -1) {
+ status = 0;
+
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_0,
+ (u32 *) &ide_bus_offset[0]);
+ ide_bus_offset[0] &= 0xfffffff8;
+ ide_bus_offset[0] += CFG_PCI0_IO_SPACE;
+ pci_read_config_dword (devbusfn, PCI_BASE_ADDRESS_2,
+ (u32 *) &ide_bus_offset[1]);
+ ide_bus_offset[1] &= 0xfffffff8;
+ ide_bus_offset[1] += CFG_PCI0_IO_SPACE;
+ /* init various things - taken from the Linux driver */
+ /* set PIO mode */
+ pci_write_config_byte(devbusfn, 0x80, 0x00);
+ pci_write_config_byte(devbusfn, 0x84, 0x00);
+ /* IDE0 */
+ pci_write_config_byte(devbusfn, 0xA1, 0x02);
+ pci_write_config_word(devbusfn, 0xA2, 0x328A);
+ pci_write_config_dword(devbusfn, 0xA4, 0x62DD62DD);
+ pci_write_config_dword(devbusfn, 0xA8, 0x43924392);
+ pci_write_config_dword(devbusfn, 0xAC, 0x40094009);
+ /* IDE1 */
+ pci_write_config_byte(devbusfn, 0xB1, 0x02);
+ pci_write_config_word(devbusfn, 0xB2, 0x328A);
+ pci_write_config_dword(devbusfn, 0xB4, 0x62DD62DD);
+ pci_write_config_dword(devbusfn, 0xB8, 0x43924392);
+ pci_write_config_dword(devbusfn, 0xBC, 0x40094009);
+ }
+ return (status);
+}
+
+void ide_set_reset (int flag) {
+ return;
+}
+
+#endif /* CFG_IDE_SIL680 */
diff --git a/drivers/sk98lin/uboot_drv.c b/drivers/sk98lin/uboot_drv.c
index 263dac8..d02cd1b 100644
--- a/drivers/sk98lin/uboot_drv.c
+++ b/drivers/sk98lin/uboot_drv.c
@@ -25,7 +25,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) && \
defined(CONFIG_SK98)
#include "h/skdrv1st.h"
diff --git a/drivers/sym53c8xx.c b/drivers/sym53c8xx.c
index ae10f80..29eeccd 100644
--- a/drivers/sym53c8xx.c
+++ b/drivers/sym53c8xx.c
@@ -51,7 +51,7 @@
#define PRINTF(fmt,args...)
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI) && defined(CONFIG_SCSI_SYM53C8XX)
+#if defined(CONFIG_CMD_SCSI) && defined(CONFIG_SCSI_SYM53C8XX)
#undef SCSI_SINGLE_STEP
/*
@@ -787,7 +787,7 @@
scsi_write_byte(DMODE,0x00);
#endif
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_SCSI) */
+#endif
#endif /* CONFIG_SCSI_SYM53C8XX */
diff --git a/drivers/systemace.c b/drivers/systemace.c
index 3848d9c..7d82c27 100644
--- a/drivers/systemace.c
+++ b/drivers/systemace.c
@@ -211,10 +211,16 @@
/* Write sector count | ReadMemCardData. */
ace_writew((trans & 0xff) | 0x0300, 0x14);
+/*
+ * For FPGA configuration via SystemACE is reset unacceptable
+ * CFGDONE bit in STATUSREG is not set to 1.
+ */
+#ifndef SYSTEMACE_CONFIG_FPGA
/* Reset the configruation controller */
val = ace_readw(0x18);
val |= 0x0080;
ace_writew(val, 0x18);
+#endif
retry = trans * 16;
while (retry > 0) {
diff --git a/drivers/ti_pci1410a.c b/drivers/ti_pci1410a.c
index d5297b5..208ca50 100644
--- a/drivers/ti_pci1410a.c
+++ b/drivers/ti_pci1410a.c
@@ -64,7 +64,7 @@
#include <pcmcia.h>
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && defined(CONFIG_IDE_TI_CARDBUS)
+#if defined(CONFIG_CMD_PCMCIA) && defined(CONFIG_IDE_TI_CARDBUS)
int pcmcia_on(int ide_base_bus);
diff --git a/drivers/tigon3.c b/drivers/tigon3.c
index ec2cd2a..5f6a4ec 100644
--- a/drivers/tigon3.c
+++ b/drivers/tigon3.c
@@ -12,7 +12,7 @@
/******************************************************************************/
#include <common.h>
#include <asm/types.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && !defined(CONFIG_NET_MULTI) && \
+#if defined(CONFIG_CMD_NET) && !defined(CONFIG_NET_MULTI) && \
defined(CONFIG_TIGON3)
#ifdef CONFIG_BMW
#include <mpc824x.h>
@@ -26,69 +26,70 @@
/* Local functions. */
/******************************************************************************/
-LM_STATUS LM_Abort(PLM_DEVICE_BLOCK pDevice);
-LM_STATUS LM_QueueRxPackets(PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice);
+LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice);
-static LM_STATUS LM_TranslateRequestedMediaType(
- LM_REQUESTED_MEDIA_TYPE RequestedMediaType,
- PLM_MEDIA_TYPE pMediaType, PLM_LINE_SPEED pLineSpeed,
- PLM_DUPLEX_MODE pDuplexMode);
+static LM_STATUS LM_TranslateRequestedMediaType (LM_REQUESTED_MEDIA_TYPE
+ RequestedMediaType,
+ PLM_MEDIA_TYPE pMediaType,
+ PLM_LINE_SPEED pLineSpeed,
+ PLM_DUPLEX_MODE pDuplexMode);
-static LM_STATUS LM_InitBcm540xPhy(PLM_DEVICE_BLOCK pDevice);
+static LM_STATUS LM_InitBcm540xPhy (PLM_DEVICE_BLOCK pDevice);
-__inline static LM_VOID LM_ServiceRxInterrupt(PLM_DEVICE_BLOCK pDevice);
-__inline static LM_VOID LM_ServiceTxInterrupt(PLM_DEVICE_BLOCK pDevice);
+__inline static LM_VOID LM_ServiceRxInterrupt (PLM_DEVICE_BLOCK pDevice);
+__inline static LM_VOID LM_ServiceTxInterrupt (PLM_DEVICE_BLOCK pDevice);
-static LM_STATUS LM_ForceAutoNegBcm540xPhy(PLM_DEVICE_BLOCK pDevice,
- LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
-static LM_STATUS LM_ForceAutoNeg(PLM_DEVICE_BLOCK pDevice,
- LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
-static LM_UINT32 GetPhyAdFlowCntrlSettings(PLM_DEVICE_BLOCK pDevice);
-STATIC LM_STATUS LM_SetFlowControl(PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 LocalPhyAd, LM_UINT32 RemotePhyAd);
+static LM_STATUS LM_ForceAutoNegBcm540xPhy (PLM_DEVICE_BLOCK pDevice,
+ LM_REQUESTED_MEDIA_TYPE
+ RequestedMediaType);
+static LM_STATUS LM_ForceAutoNeg (PLM_DEVICE_BLOCK pDevice,
+ LM_REQUESTED_MEDIA_TYPE RequestedMediaType);
+static LM_UINT32 GetPhyAdFlowCntrlSettings (PLM_DEVICE_BLOCK pDevice);
+STATIC LM_STATUS LM_SetFlowControl (PLM_DEVICE_BLOCK pDevice,
+ LM_UINT32 LocalPhyAd,
+ LM_UINT32 RemotePhyAd);
#if INCLUDE_TBI_SUPPORT
-STATIC LM_STATUS LM_SetupFiberPhy(PLM_DEVICE_BLOCK pDevice);
-STATIC LM_STATUS LM_InitBcm800xPhy(PLM_DEVICE_BLOCK pDevice);
+STATIC LM_STATUS LM_SetupFiberPhy (PLM_DEVICE_BLOCK pDevice);
+STATIC LM_STATUS LM_InitBcm800xPhy (PLM_DEVICE_BLOCK pDevice);
#endif
-STATIC LM_STATUS LM_SetupCopperPhy(PLM_DEVICE_BLOCK pDevice);
-STATIC PLM_ADAPTER_INFO LM_GetAdapterInfoBySsid(LM_UINT16 Svid, LM_UINT16 Ssid);
-STATIC LM_STATUS LM_DmaTest(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt,
- LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize);
-STATIC LM_STATUS LM_HaltCpu(PLM_DEVICE_BLOCK pDevice,LM_UINT32 cpu_number);
-STATIC LM_STATUS LM_ResetChip(PLM_DEVICE_BLOCK pDevice);
-STATIC LM_STATUS LM_Test4GBoundary(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket,
- PT3_SND_BD pSendBd);
+STATIC LM_STATUS LM_SetupCopperPhy (PLM_DEVICE_BLOCK pDevice);
+STATIC PLM_ADAPTER_INFO LM_GetAdapterInfoBySsid (LM_UINT16 Svid,
+ LM_UINT16 Ssid);
+STATIC LM_STATUS LM_DmaTest (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt,
+ LM_PHYSICAL_ADDRESS BufferPhy,
+ LM_UINT32 BufferSize);
+STATIC LM_STATUS LM_HaltCpu (PLM_DEVICE_BLOCK pDevice, LM_UINT32 cpu_number);
+STATIC LM_STATUS LM_ResetChip (PLM_DEVICE_BLOCK pDevice);
+STATIC LM_STATUS LM_Test4GBoundary (PLM_DEVICE_BLOCK pDevice,
+ PLM_PACKET pPacket, PT3_SND_BD pSendBd);
/******************************************************************************/
/* External functions. */
/******************************************************************************/
-LM_STATUS LM_LoadRlsFirmware(PLM_DEVICE_BLOCK pDevice);
-
+LM_STATUS LM_LoadRlsFirmware (PLM_DEVICE_BLOCK pDevice);
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-LM_UINT32
-LM_RegRdInd(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 Register) {
- LM_UINT32 Value32;
+LM_UINT32 LM_RegRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register)
+{
+ LM_UINT32 Value32;
#if PCIX_TARGET_WORKAROUND
- MM_ACQUIRE_UNDI_LOCK(pDevice);
+ MM_ACQUIRE_UNDI_LOCK (pDevice);
#endif
- MM_WriteConfig32(pDevice, T3_PCI_REG_ADDR_REG, Register);
- MM_ReadConfig32(pDevice, T3_PCI_REG_DATA_REG, &Value32);
+ MM_WriteConfig32 (pDevice, T3_PCI_REG_ADDR_REG, Register);
+ MM_ReadConfig32 (pDevice, T3_PCI_REG_DATA_REG, &Value32);
#if PCIX_TARGET_WORKAROUND
- MM_RELEASE_UNDI_LOCK(pDevice);
+ MM_RELEASE_UNDI_LOCK (pDevice);
#endif
- return Value32;
-} /* LM_RegRdInd */
-
+ return Value32;
+} /* LM_RegRdInd */
/******************************************************************************/
/* Description: */
@@ -96,47 +97,41 @@
/* Return: */
/******************************************************************************/
LM_VOID
-LM_RegWrInd(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 Register,
-LM_UINT32 Value32) {
+LM_RegWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register, LM_UINT32 Value32)
+{
#if PCIX_TARGET_WORKAROUND
- MM_ACQUIRE_UNDI_LOCK(pDevice);
+ MM_ACQUIRE_UNDI_LOCK (pDevice);
#endif
- MM_WriteConfig32(pDevice, T3_PCI_REG_ADDR_REG, Register);
- MM_WriteConfig32(pDevice, T3_PCI_REG_DATA_REG, Value32);
+ MM_WriteConfig32 (pDevice, T3_PCI_REG_ADDR_REG, Register);
+ MM_WriteConfig32 (pDevice, T3_PCI_REG_DATA_REG, Value32);
#if PCIX_TARGET_WORKAROUND
- MM_RELEASE_UNDI_LOCK(pDevice);
+ MM_RELEASE_UNDI_LOCK (pDevice);
#endif
-} /* LM_RegWrInd */
-
+} /* LM_RegWrInd */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-LM_UINT32
-LM_MemRdInd(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 MemAddr) {
- LM_UINT32 Value32;
+LM_UINT32 LM_MemRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr)
+{
+ LM_UINT32 Value32;
- MM_ACQUIRE_UNDI_LOCK(pDevice);
+ MM_ACQUIRE_UNDI_LOCK (pDevice);
#ifdef BIG_ENDIAN_HOST
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr);
- Value32 = REG_RD(pDevice, PciCfg.MemWindowData);
- /* Value32 = REG_RD(pDevice,uIntMem.Mbuf[(MemAddr & 0x7fff)/4]); */
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr);
+ Value32 = REG_RD (pDevice, PciCfg.MemWindowData);
+ /* Value32 = REG_RD(pDevice,uIntMem.Mbuf[(MemAddr & 0x7fff)/4]); */
#else
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr);
- MM_ReadConfig32(pDevice, T3_PCI_MEM_WIN_DATA_REG, &Value32);
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr);
+ MM_ReadConfig32 (pDevice, T3_PCI_MEM_WIN_DATA_REG, &Value32);
#endif
- MM_RELEASE_UNDI_LOCK(pDevice);
+ MM_RELEASE_UNDI_LOCK (pDevice);
- return Value32;
-} /* LM_MemRdInd */
-
+ return Value32;
+} /* LM_MemRdInd */
/******************************************************************************/
/* Description: */
@@ -144,512 +139,455 @@
/* Return: */
/******************************************************************************/
LM_VOID
-LM_MemWrInd(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 MemAddr,
-LM_UINT32 Value32) {
- MM_ACQUIRE_UNDI_LOCK(pDevice);
+LM_MemWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr, LM_UINT32 Value32)
+{
+ MM_ACQUIRE_UNDI_LOCK (pDevice);
#ifdef BIG_ENDIAN_HOST
- REG_WR(pDevice,PciCfg.MemWindowBaseAddr,MemAddr);
- REG_WR(pDevice,uIntMem.Mbuf[(MemAddr & 0x7fff)/4],Value32);
+ REG_WR (pDevice, PciCfg.MemWindowBaseAddr, MemAddr);
+ REG_WR (pDevice, uIntMem.Mbuf[(MemAddr & 0x7fff) / 4], Value32);
#else
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr);
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_DATA_REG, Value32);
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, MemAddr);
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_DATA_REG, Value32);
#endif
- MM_RELEASE_UNDI_LOCK(pDevice);
-} /* LM_MemWrInd */
-
+ MM_RELEASE_UNDI_LOCK (pDevice);
+} /* LM_MemWrInd */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-LM_STATUS
-LM_QueueRxPackets(
-PLM_DEVICE_BLOCK pDevice) {
- LM_STATUS Lmstatus;
- PLM_PACKET pPacket;
- PT3_RCV_BD pRcvBd;
- LM_UINT32 StdBdAdded = 0;
+LM_STATUS LM_QueueRxPackets (PLM_DEVICE_BLOCK pDevice)
+{
+ LM_STATUS Lmstatus;
+ PLM_PACKET pPacket;
+ PT3_RCV_BD pRcvBd;
+ LM_UINT32 StdBdAdded = 0;
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- LM_UINT32 JumboBdAdded = 0;
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ LM_UINT32 JumboBdAdded = 0;
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- Lmstatus = LM_STATUS_SUCCESS;
+ Lmstatus = LM_STATUS_SUCCESS;
- pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container);
- while(pPacket) {
- switch(pPacket->u.Rx.RcvProdRing) {
+ pPacket = (PLM_PACKET) QQ_PopHead (&pDevice->RxPacketFreeQ.Container);
+ while (pPacket) {
+ switch (pPacket->u.Rx.RcvProdRing) {
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- case T3_JUMBO_RCV_PROD_RING: /* Jumbo Receive Ring. */
- /* Initialize the buffer descriptor. */
- pRcvBd =
- &pDevice->pRxJumboBdVirt[pDevice->RxJumboProdIdx];
- pRcvBd->Flags = RCV_BD_FLAG_END | RCV_BD_FLAG_JUMBO_RING;
- pRcvBd->Len = (LM_UINT16) pDevice->RxJumboBufferSize;
+ case T3_JUMBO_RCV_PROD_RING: /* Jumbo Receive Ring. */
+ /* Initialize the buffer descriptor. */
+ pRcvBd =
+ &pDevice->pRxJumboBdVirt[pDevice->RxJumboProdIdx];
+ pRcvBd->Flags =
+ RCV_BD_FLAG_END | RCV_BD_FLAG_JUMBO_RING;
+ pRcvBd->Len = (LM_UINT16) pDevice->RxJumboBufferSize;
- /* Initialize the receive buffer pointer */
-#if 0 /* Jimmy, deleted in new */
- pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low;
- pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High;
+ /* Initialize the receive buffer pointer */
+#if 0 /* Jimmy, deleted in new */
+ pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low;
+ pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High;
#endif
- MM_MapRxDma(pDevice, pPacket, &pRcvBd->HostAddr);
+ MM_MapRxDma (pDevice, pPacket, &pRcvBd->HostAddr);
- /* The opaque field may point to an offset from a fix addr. */
- pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR(pPacket) -
- MM_UINT_PTR(pDevice->pPacketDescBase));
+ /* The opaque field may point to an offset from a fix addr. */
+ pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR (pPacket) -
+ MM_UINT_PTR (pDevice->
+ pPacketDescBase));
- /* Update the producer index. */
- pDevice->RxJumboProdIdx = (pDevice->RxJumboProdIdx + 1) &
- T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK;
+ /* Update the producer index. */
+ pDevice->RxJumboProdIdx =
+ (pDevice->RxJumboProdIdx +
+ 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK;
- JumboBdAdded++;
- break;
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
-
- case T3_STD_RCV_PROD_RING: /* Standard Receive Ring. */
- /* Initialize the buffer descriptor. */
- pRcvBd = &pDevice->pRxStdBdVirt[pDevice->RxStdProdIdx];
- pRcvBd->Flags = RCV_BD_FLAG_END;
- pRcvBd->Len = MAX_STD_RCV_BUFFER_SIZE;
-
- /* Initialize the receive buffer pointer */
-#if 0 /* Jimmy, deleted in new replaced with MM_MapRxDma */
- pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low;
- pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High;
-#endif
- MM_MapRxDma(pDevice, pPacket, &pRcvBd->HostAddr);
-
- /* The opaque field may point to an offset from a fix addr. */
- pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR(pPacket) -
- MM_UINT_PTR(pDevice->pPacketDescBase));
-
- /* Update the producer index. */
- pDevice->RxStdProdIdx = (pDevice->RxStdProdIdx + 1) &
- T3_STD_RCV_RCB_ENTRY_COUNT_MASK;
-
- StdBdAdded++;
- break;
-
- case T3_UNKNOWN_RCV_PROD_RING:
- default:
- Lmstatus = LM_STATUS_FAILURE;
- break;
- } /* switch */
-
- /* Bail out if there is any error. */
- if(Lmstatus != LM_STATUS_SUCCESS)
- {
- break;
- }
-
- pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container);
- } /* while */
-
- wmb();
- /* Update the procedure index. */
- if(StdBdAdded)
- {
- MB_REG_WR(pDevice, Mailbox.RcvStdProdIdx.Low, pDevice->RxStdProdIdx);
- }
-#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- if(JumboBdAdded)
- {
- MB_REG_WR(pDevice, Mailbox.RcvJumboProdIdx.Low,
- pDevice->RxJumboProdIdx);
- }
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
-
- return Lmstatus;
-} /* LM_QueueRxPackets */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-STATIC LM_VOID
-LM_NvramInit(
- PLM_DEVICE_BLOCK pDevice)
-{
- LM_UINT32 Value32;
- LM_UINT32 j;
-
- /* Intialize clock period and state machine. */
- Value32 = SEEPROM_ADDR_CLK_PERD(SEEPROM_CLOCK_PERIOD) |
- SEEPROM_ADDR_FSM_RESET;
- REG_WR(pDevice, Grc.EepromAddr, Value32);
-
- for(j = 0; j < 100; j++)
- {
- MM_Wait(10);
- }
-
- /* Serial eeprom access using the Grc.EepromAddr/EepromData registers. */
- Value32 = REG_RD(pDevice, Grc.LocalCtrl);
- REG_WR(pDevice, Grc.LocalCtrl, Value32 | GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM);
-
- /* Set the 5701 compatibility mode if we are using EEPROM. */
- if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
- T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701)
- {
- Value32 = REG_RD(pDevice, Nvram.Config1);
- if((Value32 & FLASH_INTERFACE_ENABLE) == 0)
- {
- /* Use the new interface to read EEPROM. */
- Value32 &= ~FLASH_COMPAT_BYPASS;
-
- REG_WR(pDevice, Nvram.Config1, Value32);
- }
- }
-} /* LM_NvRamInit */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-STATIC LM_STATUS
-LM_EepromRead(
- PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 Offset,
- LM_UINT32 *pData)
-{
- LM_UINT32 Value32;
- LM_UINT32 Addr;
- LM_UINT32 Dev;
- LM_UINT32 j;
-
- if(Offset > SEEPROM_CHIP_SIZE)
- {
- return LM_STATUS_FAILURE;
- }
-
- Dev = Offset / SEEPROM_CHIP_SIZE;
- Addr = Offset % SEEPROM_CHIP_SIZE;
-
- Value32 = REG_RD(pDevice, Grc.EepromAddr);
- Value32 &= ~(SEEPROM_ADDR_ADDRESS_MASK | SEEPROM_ADDR_DEV_ID_MASK |
- SEEPROM_ADDR_RW_MASK);
- REG_WR(pDevice, Grc.EepromAddr, Value32 | SEEPROM_ADDR_DEV_ID(Dev) |
- SEEPROM_ADDR_ADDRESS(Addr) | SEEPROM_ADDR_START | SEEPROM_ADDR_READ);
-
- for(j = 0; j < 1000; j++)
- {
- Value32 = REG_RD(pDevice, Grc.EepromAddr);
- if(Value32 & SEEPROM_ADDR_COMPLETE)
- {
- break;
- }
- MM_Wait(10);
- }
-
- if(Value32 & SEEPROM_ADDR_COMPLETE)
- {
- Value32 = REG_RD(pDevice, Grc.EepromData);
- *pData = Value32;
-
- return LM_STATUS_SUCCESS;
- }
-
- return LM_STATUS_FAILURE;
-} /* LM_EepromRead */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-STATIC LM_STATUS
-LM_NvramRead(
- PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 Offset,
- LM_UINT32 *pData)
-{
- LM_UINT32 Value32;
- LM_STATUS Status;
- LM_UINT32 j;
-
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Status = LM_EepromRead(pDevice, Offset, pData);
- }
- else
- {
- /* Determine if we have flash or EEPROM. */
- Value32 = REG_RD(pDevice, Nvram.Config1);
- if(Value32 & FLASH_INTERFACE_ENABLE)
- {
- if(Value32 & FLASH_SSRAM_BUFFERRED_MODE)
- {
- Offset = ((Offset/BUFFERED_FLASH_PAGE_SIZE) <<
- BUFFERED_FLASH_PAGE_POS) +
- (Offset % BUFFERED_FLASH_PAGE_SIZE);
- }
- }
-
- REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_SET1);
- for (j = 0; j < 1000; j++)
- {
- if (REG_RD(pDevice, Nvram.SwArb) & SW_ARB_GNT1)
- {
- break;
- }
- MM_Wait(20);
- }
- if (j == 1000)
- {
- return LM_STATUS_FAILURE;
- }
-
- /* Read from flash or EEPROM with the new 5703/02 interface. */
- REG_WR(pDevice, Nvram.Addr, Offset & NVRAM_ADDRESS_MASK);
-
- REG_WR(pDevice, Nvram.Cmd, NVRAM_CMD_RD | NVRAM_CMD_DO_IT |
- NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE);
-
- /* Wait for the done bit to clear. */
- for(j = 0; j < 500; j++)
- {
- MM_Wait(10);
-
- Value32 = REG_RD(pDevice, Nvram.Cmd);
- if(!(Value32 & NVRAM_CMD_DONE))
- {
- break;
- }
- }
-
- /* Wait for the done bit. */
- if(!(Value32 & NVRAM_CMD_DONE))
- {
- for(j = 0; j < 500; j++)
- {
- MM_Wait(10);
-
- Value32 = REG_RD(pDevice, Nvram.Cmd);
- if(Value32 & NVRAM_CMD_DONE)
- {
- MM_Wait(10);
-
- *pData = REG_RD(pDevice, Nvram.ReadData);
-
- /* Change the endianess. */
- *pData = ((*pData & 0xff) << 24)| ((*pData & 0xff00) << 8)|
- ((*pData & 0xff0000) >> 8) | ((*pData >> 24) & 0xff);
-
- break;
- }
- }
- }
-
- REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_CLR1);
- if(Value32 & NVRAM_CMD_DONE)
- {
- Status = LM_STATUS_SUCCESS;
- }
- else
- {
- Status = LM_STATUS_FAILURE;
- }
- }
-
- return Status;
-} /* LM_NvramRead */
-
-
-STATIC void
-LM_ReadVPD(PLM_DEVICE_BLOCK pDevice)
-{
- LM_UINT32 Vpd_arr[256/4];
- LM_UINT8 *Vpd = (LM_UINT8 *) &Vpd_arr[0];
- LM_UINT32 *Vpd_dptr = &Vpd_arr[0];
- LM_UINT32 Value32;
- unsigned int j;
-
- /* Read PN from VPD */
- for (j = 0; j < 256; j += 4, Vpd_dptr++ )
- {
- if (LM_NvramRead(pDevice, 0x100 + j, &Value32) != LM_STATUS_SUCCESS) {
- printf("BCM570x: LM_ReadVPD: VPD read failed"
- " (no EEPROM onboard)\n");
- return;
- }
- *Vpd_dptr = cpu_to_le32(Value32);
- }
- for (j = 0; j < 256; )
- {
- unsigned int Vpd_r_len;
- unsigned int Vpd_r_end;
-
- if ((Vpd[j] == 0x82) || (Vpd[j] == 0x91))
- {
- j = j + 3 + Vpd[j + 1] + (Vpd[j + 2] << 8);
- }
- else if (Vpd[j] == 0x90)
- {
- Vpd_r_len = Vpd[j + 1] + (Vpd[j + 2] << 8);
- j += 3;
- Vpd_r_end = Vpd_r_len + j;
- while (j < Vpd_r_end)
- {
- if ((Vpd[j] == 'P') && (Vpd[j + 1] == 'N'))
- {
- unsigned int len = Vpd[j + 2];
-
- if (len <= 24)
- {
- memcpy(pDevice->PartNo, &Vpd[j + 3], len);
- }
- break;
- }
- else
- {
- if (Vpd[j + 2] == 0)
- {
+ JumboBdAdded++;
break;
- }
- j = j + Vpd[j + 2];
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+
+ case T3_STD_RCV_PROD_RING: /* Standard Receive Ring. */
+ /* Initialize the buffer descriptor. */
+ pRcvBd = &pDevice->pRxStdBdVirt[pDevice->RxStdProdIdx];
+ pRcvBd->Flags = RCV_BD_FLAG_END;
+ pRcvBd->Len = MAX_STD_RCV_BUFFER_SIZE;
+
+ /* Initialize the receive buffer pointer */
+#if 0 /* Jimmy, deleted in new replaced with MM_MapRxDma */
+ pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low;
+ pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High;
+#endif
+ MM_MapRxDma (pDevice, pPacket, &pRcvBd->HostAddr);
+
+ /* The opaque field may point to an offset from a fix addr. */
+ pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR (pPacket) -
+ MM_UINT_PTR (pDevice->
+ pPacketDescBase));
+
+ /* Update the producer index. */
+ pDevice->RxStdProdIdx = (pDevice->RxStdProdIdx + 1) &
+ T3_STD_RCV_RCB_ENTRY_COUNT_MASK;
+
+ StdBdAdded++;
+ break;
+
+ case T3_UNKNOWN_RCV_PROD_RING:
+ default:
+ Lmstatus = LM_STATUS_FAILURE;
+ break;
+ } /* switch */
+
+ /* Bail out if there is any error. */
+ if (Lmstatus != LM_STATUS_SUCCESS) {
+ break;
}
- }
- break;
+
+ pPacket =
+ (PLM_PACKET) QQ_PopHead (&pDevice->RxPacketFreeQ.Container);
+ } /* while */
+
+ wmb ();
+ /* Update the procedure index. */
+ if (StdBdAdded) {
+ MB_REG_WR (pDevice, Mailbox.RcvStdProdIdx.Low,
+ pDevice->RxStdProdIdx);
}
- else {
- break;
+#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
+ if (JumboBdAdded) {
+ MB_REG_WR (pDevice, Mailbox.RcvJumboProdIdx.Low,
+ pDevice->RxJumboProdIdx);
}
- }
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+
+ return Lmstatus;
+} /* LM_QueueRxPackets */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+STATIC LM_VOID LM_NvramInit (PLM_DEVICE_BLOCK pDevice)
+{
+ LM_UINT32 Value32;
+ LM_UINT32 j;
+
+ /* Intialize clock period and state machine. */
+ Value32 = SEEPROM_ADDR_CLK_PERD (SEEPROM_CLOCK_PERIOD) |
+ SEEPROM_ADDR_FSM_RESET;
+ REG_WR (pDevice, Grc.EepromAddr, Value32);
+
+ for (j = 0; j < 100; j++) {
+ MM_Wait (10);
+ }
+
+ /* Serial eeprom access using the Grc.EepromAddr/EepromData registers. */
+ Value32 = REG_RD (pDevice, Grc.LocalCtrl);
+ REG_WR (pDevice, Grc.LocalCtrl,
+ Value32 | GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM);
+
+ /* Set the 5701 compatibility mode if we are using EEPROM. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
+ T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5701) {
+ Value32 = REG_RD (pDevice, Nvram.Config1);
+ if ((Value32 & FLASH_INTERFACE_ENABLE) == 0) {
+ /* Use the new interface to read EEPROM. */
+ Value32 &= ~FLASH_COMPAT_BYPASS;
+
+ REG_WR (pDevice, Nvram.Config1, Value32);
+ }
+ }
+} /* LM_NvRamInit */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+STATIC LM_STATUS
+LM_EepromRead (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT32 * pData)
+{
+ LM_UINT32 Value32;
+ LM_UINT32 Addr;
+ LM_UINT32 Dev;
+ LM_UINT32 j;
+
+ if (Offset > SEEPROM_CHIP_SIZE) {
+ return LM_STATUS_FAILURE;
+ }
+
+ Dev = Offset / SEEPROM_CHIP_SIZE;
+ Addr = Offset % SEEPROM_CHIP_SIZE;
+
+ Value32 = REG_RD (pDevice, Grc.EepromAddr);
+ Value32 &= ~(SEEPROM_ADDR_ADDRESS_MASK | SEEPROM_ADDR_DEV_ID_MASK |
+ SEEPROM_ADDR_RW_MASK);
+ REG_WR (pDevice, Grc.EepromAddr, Value32 | SEEPROM_ADDR_DEV_ID (Dev) |
+ SEEPROM_ADDR_ADDRESS (Addr) | SEEPROM_ADDR_START |
+ SEEPROM_ADDR_READ);
+
+ for (j = 0; j < 1000; j++) {
+ Value32 = REG_RD (pDevice, Grc.EepromAddr);
+ if (Value32 & SEEPROM_ADDR_COMPLETE) {
+ break;
+ }
+ MM_Wait (10);
+ }
+
+ if (Value32 & SEEPROM_ADDR_COMPLETE) {
+ Value32 = REG_RD (pDevice, Grc.EepromData);
+ *pData = Value32;
+
+ return LM_STATUS_SUCCESS;
+ }
+
+ return LM_STATUS_FAILURE;
+} /* LM_EepromRead */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+STATIC LM_STATUS
+LM_NvramRead (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Offset, LM_UINT32 * pData)
+{
+ LM_UINT32 Value32;
+ LM_STATUS Status;
+ LM_UINT32 j;
+
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Status = LM_EepromRead (pDevice, Offset, pData);
+ } else {
+ /* Determine if we have flash or EEPROM. */
+ Value32 = REG_RD (pDevice, Nvram.Config1);
+ if (Value32 & FLASH_INTERFACE_ENABLE) {
+ if (Value32 & FLASH_SSRAM_BUFFERRED_MODE) {
+ Offset = ((Offset / BUFFERED_FLASH_PAGE_SIZE) <<
+ BUFFERED_FLASH_PAGE_POS) +
+ (Offset % BUFFERED_FLASH_PAGE_SIZE);
+ }
+ }
+
+ REG_WR (pDevice, Nvram.SwArb, SW_ARB_REQ_SET1);
+ for (j = 0; j < 1000; j++) {
+ if (REG_RD (pDevice, Nvram.SwArb) & SW_ARB_GNT1) {
+ break;
+ }
+ MM_Wait (20);
+ }
+ if (j == 1000) {
+ return LM_STATUS_FAILURE;
+ }
+
+ /* Read from flash or EEPROM with the new 5703/02 interface. */
+ REG_WR (pDevice, Nvram.Addr, Offset & NVRAM_ADDRESS_MASK);
+
+ REG_WR (pDevice, Nvram.Cmd, NVRAM_CMD_RD | NVRAM_CMD_DO_IT |
+ NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE);
+
+ /* Wait for the done bit to clear. */
+ for (j = 0; j < 500; j++) {
+ MM_Wait (10);
+
+ Value32 = REG_RD (pDevice, Nvram.Cmd);
+ if (!(Value32 & NVRAM_CMD_DONE)) {
+ break;
+ }
+ }
+
+ /* Wait for the done bit. */
+ if (!(Value32 & NVRAM_CMD_DONE)) {
+ for (j = 0; j < 500; j++) {
+ MM_Wait (10);
+
+ Value32 = REG_RD (pDevice, Nvram.Cmd);
+ if (Value32 & NVRAM_CMD_DONE) {
+ MM_Wait (10);
+
+ *pData =
+ REG_RD (pDevice, Nvram.ReadData);
+
+ /* Change the endianess. */
+ *pData =
+ ((*pData & 0xff) << 24) |
+ ((*pData & 0xff00) << 8) |
+ ((*pData & 0xff0000) >> 8) |
+ ((*pData >> 24) & 0xff);
+
+ break;
+ }
+ }
+ }
+
+ REG_WR (pDevice, Nvram.SwArb, SW_ARB_REQ_CLR1);
+ if (Value32 & NVRAM_CMD_DONE) {
+ Status = LM_STATUS_SUCCESS;
+ } else {
+ Status = LM_STATUS_FAILURE;
+ }
+ }
+
+ return Status;
+} /* LM_NvramRead */
+
+STATIC void LM_ReadVPD (PLM_DEVICE_BLOCK pDevice)
+{
+ LM_UINT32 Vpd_arr[256 / 4];
+ LM_UINT8 *Vpd = (LM_UINT8 *) & Vpd_arr[0];
+ LM_UINT32 *Vpd_dptr = &Vpd_arr[0];
+ LM_UINT32 Value32;
+ unsigned int j;
+
+ /* Read PN from VPD */
+ for (j = 0; j < 256; j += 4, Vpd_dptr++) {
+ if (LM_NvramRead (pDevice, 0x100 + j, &Value32) !=
+ LM_STATUS_SUCCESS) {
+ printf ("BCM570x: LM_ReadVPD: VPD read failed"
+ " (no EEPROM onboard)\n");
+ return;
+ }
+ *Vpd_dptr = cpu_to_le32 (Value32);
+ }
+ for (j = 0; j < 256;) {
+ unsigned int Vpd_r_len;
+ unsigned int Vpd_r_end;
+
+ if ((Vpd[j] == 0x82) || (Vpd[j] == 0x91)) {
+ j = j + 3 + Vpd[j + 1] + (Vpd[j + 2] << 8);
+ } else if (Vpd[j] == 0x90) {
+ Vpd_r_len = Vpd[j + 1] + (Vpd[j + 2] << 8);
+ j += 3;
+ Vpd_r_end = Vpd_r_len + j;
+ while (j < Vpd_r_end) {
+ if ((Vpd[j] == 'P') && (Vpd[j + 1] == 'N')) {
+ unsigned int len = Vpd[j + 2];
+
+ if (len <= 24) {
+ memcpy (pDevice->PartNo,
+ &Vpd[j + 3], len);
+ }
+ break;
+ } else {
+ if (Vpd[j + 2] == 0) {
+ break;
+ }
+ j = j + Vpd[j + 2];
+ }
+ }
+ break;
+ } else {
+ break;
+ }
+ }
}
-STATIC void
-LM_ReadBootCodeVersion(PLM_DEVICE_BLOCK pDevice)
+STATIC void LM_ReadBootCodeVersion (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 Value32, offset, ver_offset;
- int i;
+ LM_UINT32 Value32, offset, ver_offset;
+ int i;
- if (LM_NvramRead(pDevice, 0x0, &Value32) != LM_STATUS_SUCCESS)
- return;
- if (Value32 != 0xaa559966)
- return;
- if (LM_NvramRead(pDevice, 0xc, &offset) != LM_STATUS_SUCCESS)
- return;
-
- offset = ((offset & 0xff) << 24)| ((offset & 0xff00) << 8)|
- ((offset & 0xff0000) >> 8) | ((offset >> 24) & 0xff);
- if (LM_NvramRead(pDevice, offset, &Value32) != LM_STATUS_SUCCESS)
- return;
- if ((Value32 == 0x0300000e) &&
- (LM_NvramRead(pDevice, offset + 4, &Value32) == LM_STATUS_SUCCESS) &&
- (Value32 == 0)) {
-
- if (LM_NvramRead(pDevice, offset + 8, &ver_offset) != LM_STATUS_SUCCESS)
- return;
- ver_offset = ((ver_offset & 0xff0000) >> 8) |
- ((ver_offset >> 24) & 0xff);
- for (i = 0; i < 16; i += 4) {
- if (LM_NvramRead(pDevice, offset + ver_offset + i, &Value32) !=
- LM_STATUS_SUCCESS)
- {
+ if (LM_NvramRead (pDevice, 0x0, &Value32) != LM_STATUS_SUCCESS)
return;
- }
- *((LM_UINT32 *) &pDevice->BootCodeVer[i]) = cpu_to_le32(Value32);
- }
- }
- else {
- char c;
+ if (Value32 != 0xaa559966)
+ return;
+ if (LM_NvramRead (pDevice, 0xc, &offset) != LM_STATUS_SUCCESS)
+ return;
- if (LM_NvramRead(pDevice, 0x94, &Value32) != LM_STATUS_SUCCESS)
- return;
+ offset = ((offset & 0xff) << 24) | ((offset & 0xff00) << 8) |
+ ((offset & 0xff0000) >> 8) | ((offset >> 24) & 0xff);
+ if (LM_NvramRead (pDevice, offset, &Value32) != LM_STATUS_SUCCESS)
+ return;
+ if ((Value32 == 0x0300000e) &&
+ (LM_NvramRead (pDevice, offset + 4, &Value32) == LM_STATUS_SUCCESS)
+ && (Value32 == 0)) {
- i = 0;
- c = ((Value32 & 0xff0000) >> 16);
+ if (LM_NvramRead (pDevice, offset + 8, &ver_offset) !=
+ LM_STATUS_SUCCESS)
+ return;
+ ver_offset = ((ver_offset & 0xff0000) >> 8) |
+ ((ver_offset >> 24) & 0xff);
+ for (i = 0; i < 16; i += 4) {
+ if (LM_NvramRead
+ (pDevice, offset + ver_offset + i,
+ &Value32) != LM_STATUS_SUCCESS) {
+ return;
+ }
+ *((LM_UINT32 *) & pDevice->BootCodeVer[i]) =
+ cpu_to_le32 (Value32);
+ }
+ } else {
+ char c;
- if (c < 10) {
- pDevice->BootCodeVer[i++] = c + '0';
+ if (LM_NvramRead (pDevice, 0x94, &Value32) != LM_STATUS_SUCCESS)
+ return;
+
+ i = 0;
+ c = ((Value32 & 0xff0000) >> 16);
+
+ if (c < 10) {
+ pDevice->BootCodeVer[i++] = c + '0';
+ } else {
+ pDevice->BootCodeVer[i++] = (c / 10) + '0';
+ pDevice->BootCodeVer[i++] = (c % 10) + '0';
+ }
+ pDevice->BootCodeVer[i++] = '.';
+ c = (Value32 & 0xff000000) >> 24;
+ if (c < 10) {
+ pDevice->BootCodeVer[i++] = c + '0';
+ } else {
+ pDevice->BootCodeVer[i++] = (c / 10) + '0';
+ pDevice->BootCodeVer[i++] = (c % 10) + '0';
+ }
+ pDevice->BootCodeVer[i] = 0;
}
- else {
- pDevice->BootCodeVer[i++] = (c / 10) + '0';
- pDevice->BootCodeVer[i++] = (c % 10) + '0';
- }
- pDevice->BootCodeVer[i++] = '.';
- c = (Value32 & 0xff000000) >> 24;
- if (c < 10) {
- pDevice->BootCodeVer[i++] = c + '0';
- }
- else {
- pDevice->BootCodeVer[i++] = (c / 10) + '0';
- pDevice->BootCodeVer[i++] = (c % 10) + '0';
- }
- pDevice->BootCodeVer[i] = 0;
- }
}
-STATIC void
-LM_GetBusSpeed(PLM_DEVICE_BLOCK pDevice)
+STATIC void LM_GetBusSpeed (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 PciState = pDevice->PciState;
- LM_UINT32 ClockCtrl;
- char *SpeedStr = "";
+ LM_UINT32 PciState = pDevice->PciState;
+ LM_UINT32 ClockCtrl;
+ char *SpeedStr = "";
- if (PciState & T3_PCI_STATE_32BIT_PCI_BUS)
- {
- strcpy(pDevice->BusSpeedStr, "32-bit ");
- }
- else
- {
- strcpy(pDevice->BusSpeedStr, "64-bit ");
- }
- if (PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)
- {
- strcat(pDevice->BusSpeedStr, "PCI ");
- if (PciState & T3_PCI_STATE_HIGH_BUS_SPEED)
- {
- SpeedStr = "66MHz";
+ if (PciState & T3_PCI_STATE_32BIT_PCI_BUS) {
+ strcpy (pDevice->BusSpeedStr, "32-bit ");
+ } else {
+ strcpy (pDevice->BusSpeedStr, "64-bit ");
}
- else
- {
- SpeedStr = "33MHz";
+ if (PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) {
+ strcat (pDevice->BusSpeedStr, "PCI ");
+ if (PciState & T3_PCI_STATE_HIGH_BUS_SPEED) {
+ SpeedStr = "66MHz";
+ } else {
+ SpeedStr = "33MHz";
+ }
+ } else {
+ strcat (pDevice->BusSpeedStr, "PCIX ");
+ if (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE) {
+ SpeedStr = "133MHz";
+ } else {
+ ClockCtrl = REG_RD (pDevice, PciCfg.ClockCtrl) & 0x1f;
+ switch (ClockCtrl) {
+ case 0:
+ SpeedStr = "33MHz";
+ break;
+
+ case 2:
+ SpeedStr = "50MHz";
+ break;
+
+ case 4:
+ SpeedStr = "66MHz";
+ break;
+
+ case 6:
+ SpeedStr = "100MHz";
+ break;
+
+ case 7:
+ SpeedStr = "133MHz";
+ break;
+ }
+ }
}
- }
- else
- {
- strcat(pDevice->BusSpeedStr, "PCIX ");
- if (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE)
- {
- SpeedStr = "133MHz";
- }
- else
- {
- ClockCtrl = REG_RD(pDevice, PciCfg.ClockCtrl) & 0x1f;
- switch (ClockCtrl)
- {
- case 0:
- SpeedStr = "33MHz";
- break;
-
- case 2:
- SpeedStr = "50MHz";
- break;
-
- case 4:
- SpeedStr = "66MHz";
- break;
-
- case 6:
- SpeedStr = "100MHz";
- break;
-
- case 7:
- SpeedStr = "133MHz";
- break;
- }
- }
- }
- strcat(pDevice->BusSpeedStr, SpeedStr);
+ strcat (pDevice->BusSpeedStr, SpeedStr);
}
/******************************************************************************/
@@ -660,977 +598,890 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_GetAdapterInfo(
-PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_GetAdapterInfo (PLM_DEVICE_BLOCK pDevice)
{
- PLM_ADAPTER_INFO pAdapterInfo;
- LM_UINT32 Value32;
- LM_STATUS Status;
- LM_UINT32 j;
- LM_UINT32 EeSigFound;
- LM_UINT32 EePhyTypeSerdes = 0;
- LM_UINT32 EePhyLedMode = 0;
- LM_UINT32 EePhyId = 0;
+ PLM_ADAPTER_INFO pAdapterInfo;
+ LM_UINT32 Value32;
+ LM_STATUS Status;
+ LM_UINT32 j;
+ LM_UINT32 EeSigFound;
+ LM_UINT32 EePhyTypeSerdes = 0;
+ LM_UINT32 EePhyLedMode = 0;
+ LM_UINT32 EePhyId = 0;
- /* Get Device Id and Vendor Id */
- Status = MM_ReadConfig32(pDevice, PCI_VENDOR_ID_REG, &Value32);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
- pDevice->PciVendorId = (LM_UINT16) Value32;
- pDevice->PciDeviceId = (LM_UINT16) (Value32 >> 16);
+ /* Get Device Id and Vendor Id */
+ Status = MM_ReadConfig32 (pDevice, PCI_VENDOR_ID_REG, &Value32);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+ pDevice->PciVendorId = (LM_UINT16) Value32;
+ pDevice->PciDeviceId = (LM_UINT16) (Value32 >> 16);
- /* If we are not getting the write adapter, exit. */
- if((Value32 != T3_PCI_ID_BCM5700) &&
- (Value32 != T3_PCI_ID_BCM5701) &&
- (Value32 != T3_PCI_ID_BCM5702) &&
- (Value32 != T3_PCI_ID_BCM5702x) &&
- (Value32 != T3_PCI_ID_BCM5702FE) &&
- (Value32 != T3_PCI_ID_BCM5703) &&
- (Value32 != T3_PCI_ID_BCM5703x) &&
- (Value32 != T3_PCI_ID_BCM5704))
- {
- return LM_STATUS_FAILURE;
- }
+ /* If we are not getting the write adapter, exit. */
+ if ((Value32 != T3_PCI_ID_BCM5700) &&
+ (Value32 != T3_PCI_ID_BCM5701) &&
+ (Value32 != T3_PCI_ID_BCM5702) &&
+ (Value32 != T3_PCI_ID_BCM5702x) &&
+ (Value32 != T3_PCI_ID_BCM5702FE) &&
+ (Value32 != T3_PCI_ID_BCM5703) &&
+ (Value32 != T3_PCI_ID_BCM5703x) && (Value32 != T3_PCI_ID_BCM5704)) {
+ return LM_STATUS_FAILURE;
+ }
- Status = MM_ReadConfig32(pDevice, PCI_REV_ID_REG, &Value32);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
- pDevice->PciRevId = (LM_UINT8) Value32;
+ Status = MM_ReadConfig32 (pDevice, PCI_REV_ID_REG, &Value32);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+ pDevice->PciRevId = (LM_UINT8) Value32;
- /* Get IRQ. */
- Status = MM_ReadConfig32(pDevice, PCI_INT_LINE_REG, &Value32);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
- pDevice->Irq = (LM_UINT8) Value32;
+ /* Get IRQ. */
+ Status = MM_ReadConfig32 (pDevice, PCI_INT_LINE_REG, &Value32);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+ pDevice->Irq = (LM_UINT8) Value32;
- /* Get interrupt pin. */
- pDevice->IntPin = (LM_UINT8) (Value32 >> 8);
+ /* Get interrupt pin. */
+ pDevice->IntPin = (LM_UINT8) (Value32 >> 8);
- /* Get chip revision id. */
- Status = MM_ReadConfig32(pDevice, T3_PCI_MISC_HOST_CTRL_REG, &Value32);
- pDevice->ChipRevId = Value32 >> 16;
+ /* Get chip revision id. */
+ Status = MM_ReadConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG, &Value32);
+ pDevice->ChipRevId = Value32 >> 16;
- /* Get subsystem vendor. */
- Status = MM_ReadConfig32(pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, &Value32);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
- pDevice->SubsystemVendorId = (LM_UINT16) Value32;
+ /* Get subsystem vendor. */
+ Status =
+ MM_ReadConfig32 (pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, &Value32);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+ pDevice->SubsystemVendorId = (LM_UINT16) Value32;
- /* Get PCI subsystem id. */
- pDevice->SubsystemId = (LM_UINT16) (Value32 >> 16);
+ /* Get PCI subsystem id. */
+ pDevice->SubsystemId = (LM_UINT16) (Value32 >> 16);
- /* Get the cache line size. */
- MM_ReadConfig32(pDevice, PCI_CACHE_LINE_SIZE_REG, &Value32);
- pDevice->CacheLineSize = (LM_UINT8) Value32;
- pDevice->SavedCacheLineReg = Value32;
+ /* Get the cache line size. */
+ MM_ReadConfig32 (pDevice, PCI_CACHE_LINE_SIZE_REG, &Value32);
+ pDevice->CacheLineSize = (LM_UINT8) Value32;
+ pDevice->SavedCacheLineReg = Value32;
- if(pDevice->ChipRevId != T3_CHIP_ID_5703_A1 &&
- pDevice->ChipRevId != T3_CHIP_ID_5703_A2 &&
- pDevice->ChipRevId != T3_CHIP_ID_5704_A0)
- {
- pDevice->UndiFix = FALSE;
- }
+ if (pDevice->ChipRevId != T3_CHIP_ID_5703_A1 &&
+ pDevice->ChipRevId != T3_CHIP_ID_5703_A2 &&
+ pDevice->ChipRevId != T3_CHIP_ID_5704_A0) {
+ pDevice->UndiFix = FALSE;
+ }
#if !PCIX_TARGET_WORKAROUND
- pDevice->UndiFix = FALSE;
+ pDevice->UndiFix = FALSE;
#endif
- /* Map the memory base to system address space. */
- if (!pDevice->UndiFix)
- {
- Status = MM_MapMemBase(pDevice);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
+ /* Map the memory base to system address space. */
+ if (!pDevice->UndiFix) {
+ Status = MM_MapMemBase (pDevice);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+ /* Initialize the memory view pointer. */
+ pDevice->pMemView = (PT3_STD_MEM_MAP) pDevice->pMappedMemBase;
}
- /* Initialize the memory view pointer. */
- pDevice->pMemView = (PT3_STD_MEM_MAP) pDevice->pMappedMemBase;
- }
+#if PCIX_TARGET_WORKAROUND
+ /* store whether we are in PCI are PCI-X mode */
+ pDevice->EnablePciXFix = FALSE;
+
+ MM_ReadConfig32 (pDevice, T3_PCI_STATE_REG, &Value32);
+ if ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0) {
+ /* Enable PCI-X workaround only if we are running on 5700 BX. */
+ if (T3_CHIP_REV (pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) {
+ pDevice->EnablePciXFix = TRUE;
+ }
+ }
+ if (pDevice->UndiFix) {
+ pDevice->EnablePciXFix = TRUE;
+ }
+#endif
+ /* Bx bug: due to the "byte_enable bug" in PCI-X mode, the power */
+ /* management register may be clobbered which may cause the */
+ /* BCM5700 to go into D3 state. While in this state, we will */
+ /* not have memory mapped register access. As a workaround, we */
+ /* need to restore the device to D0 state. */
+ MM_ReadConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, &Value32);
+ Value32 |= T3_PM_PME_ASSERTED;
+ Value32 &= ~T3_PM_POWER_STATE_MASK;
+ Value32 |= T3_PM_POWER_STATE_D0;
+ MM_WriteConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, Value32);
+
+ /* read the current PCI command word */
+ MM_ReadConfig32 (pDevice, PCI_COMMAND_REG, &Value32);
+
+ /* Make sure bus-mastering is enabled. */
+ Value32 |= PCI_BUSMASTER_ENABLE;
#if PCIX_TARGET_WORKAROUND
- /* store whether we are in PCI are PCI-X mode */
- pDevice->EnablePciXFix = FALSE;
-
- MM_ReadConfig32(pDevice, T3_PCI_STATE_REG, &Value32);
- if((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0)
- {
- /* Enable PCI-X workaround only if we are running on 5700 BX. */
- if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX)
- {
- pDevice->EnablePciXFix = TRUE;
+ /* if we are in PCI-X mode, also make sure mem-mapping and SERR#/PERR#
+ are enabled */
+ if (pDevice->EnablePciXFix == TRUE) {
+ Value32 |= (PCI_MEM_SPACE_ENABLE | PCI_SYSTEM_ERROR_ENABLE |
+ PCI_PARITY_ERROR_ENABLE);
}
- }
- if (pDevice->UndiFix)
- {
- pDevice->EnablePciXFix = TRUE;
- }
-#endif
- /* Bx bug: due to the "byte_enable bug" in PCI-X mode, the power */
- /* management register may be clobbered which may cause the */
- /* BCM5700 to go into D3 state. While in this state, we will */
- /* not have memory mapped register access. As a workaround, we */
- /* need to restore the device to D0 state. */
- MM_ReadConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, &Value32);
- Value32 |= T3_PM_PME_ASSERTED;
- Value32 &= ~T3_PM_POWER_STATE_MASK;
- Value32 |= T3_PM_POWER_STATE_D0;
- MM_WriteConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, Value32);
-
- /* read the current PCI command word */
- MM_ReadConfig32(pDevice, PCI_COMMAND_REG, &Value32);
-
- /* Make sure bus-mastering is enabled. */
- Value32 |= PCI_BUSMASTER_ENABLE;
-
-#if PCIX_TARGET_WORKAROUND
- /* if we are in PCI-X mode, also make sure mem-mapping and SERR#/PERR#
- are enabled */
- if (pDevice->EnablePciXFix == TRUE) {
- Value32 |= (PCI_MEM_SPACE_ENABLE | PCI_SYSTEM_ERROR_ENABLE |
- PCI_PARITY_ERROR_ENABLE);
- }
- if (pDevice->UndiFix)
- {
- Value32 &= ~PCI_MEM_SPACE_ENABLE;
- }
-
+ if (pDevice->UndiFix) {
+ Value32 &= ~PCI_MEM_SPACE_ENABLE;
+ }
#endif
- if(pDevice->EnableMWI)
- {
- Value32 |= PCI_MEMORY_WRITE_INVALIDATE;
- }
- else {
- Value32 &= (~PCI_MEMORY_WRITE_INVALIDATE);
- }
+ if (pDevice->EnableMWI) {
+ Value32 |= PCI_MEMORY_WRITE_INVALIDATE;
+ } else {
+ Value32 &= (~PCI_MEMORY_WRITE_INVALIDATE);
+ }
- /* Error out if mem-mapping is NOT enabled for PCI systems */
- if (!(Value32 | PCI_MEM_SPACE_ENABLE))
- {
- return LM_STATUS_FAILURE;
- }
+ /* Error out if mem-mapping is NOT enabled for PCI systems */
+ if (!(Value32 | PCI_MEM_SPACE_ENABLE)) {
+ return LM_STATUS_FAILURE;
+ }
- /* save the value we are going to write into the PCI command word */
- pDevice->PciCommandStatusWords = Value32;
+ /* save the value we are going to write into the PCI command word */
+ pDevice->PciCommandStatusWords = Value32;
- Status = MM_WriteConfig32(pDevice, PCI_COMMAND_REG, Value32);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
+ Status = MM_WriteConfig32 (pDevice, PCI_COMMAND_REG, Value32);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
- /* Set power state to D0. */
- LM_SetPowerState(pDevice, LM_POWER_STATE_D0);
+ /* Set power state to D0. */
+ LM_SetPowerState (pDevice, LM_POWER_STATE_D0);
#ifdef BIG_ENDIAN_PCI
- pDevice->MiscHostCtrl =
- MISC_HOST_CTRL_MASK_PCI_INT |
- MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS |
- MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP |
- MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW;
-#else /* No CPU Swap modes for PCI IO */
+ pDevice->MiscHostCtrl =
+ MISC_HOST_CTRL_MASK_PCI_INT |
+ MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS |
+ MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP |
+ MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW;
+#else /* No CPU Swap modes for PCI IO */
- /* Setup the mode registers. */
- pDevice->MiscHostCtrl =
- MISC_HOST_CTRL_MASK_PCI_INT |
- MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP |
+ /* Setup the mode registers. */
+ pDevice->MiscHostCtrl =
+ MISC_HOST_CTRL_MASK_PCI_INT |
+ MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP |
#ifdef BIG_ENDIAN_HOST
- MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP |
-#endif /* BIG_ENDIAN_HOST */
- MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS |
- MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW;
-#endif /* !BIG_ENDIAN_PCI */
+ MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP |
+#endif /* BIG_ENDIAN_HOST */
+ MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS |
+ MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW;
+#endif /* !BIG_ENDIAN_PCI */
- /* write to PCI misc host ctr first in order to enable indirect accesses */
- MM_WriteConfig32(pDevice, T3_PCI_MISC_HOST_CTRL_REG, pDevice->MiscHostCtrl);
+ /* write to PCI misc host ctr first in order to enable indirect accesses */
+ MM_WriteConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG,
+ pDevice->MiscHostCtrl);
- REG_WR(pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl);
+ REG_WR (pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl);
#ifdef BIG_ENDIAN_PCI
- Value32 = GRC_MODE_WORD_SWAP_DATA|
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA;
+ Value32 = GRC_MODE_WORD_SWAP_DATA | GRC_MODE_WORD_SWAP_NON_FRAME_DATA;
#else
/* No CPU Swap modes for PCI IO */
#ifdef BIG_ENDIAN_HOST
- Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA |
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA;
+ Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA |
+ GRC_MODE_WORD_SWAP_NON_FRAME_DATA;
#else
- Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA;
+ Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA;
#endif
-#endif /* !BIG_ENDIAN_PCI */
+#endif /* !BIG_ENDIAN_PCI */
- REG_WR(pDevice, Grc.Mode, Value32);
+ REG_WR (pDevice, Grc.Mode, Value32);
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- REG_WR(pDevice, Grc.LocalCtrl, GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE1);
- }
- MM_Wait(40);
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ REG_WR (pDevice, Grc.LocalCtrl,
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE1);
+ }
+ MM_Wait (40);
- /* Enable indirect memory access */
- REG_WR(pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE);
+ /* Enable indirect memory access */
+ REG_WR (pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE);
- if (REG_RD(pDevice, PciCfg.ClockCtrl) & T3_PCI_44MHZ_CORE_CLOCK)
- {
- REG_WR(pDevice, PciCfg.ClockCtrl, T3_PCI_44MHZ_CORE_CLOCK |
- T3_PCI_SELECT_ALTERNATE_CLOCK);
- REG_WR(pDevice, PciCfg.ClockCtrl, T3_PCI_SELECT_ALTERNATE_CLOCK);
- MM_Wait(40); /* required delay is 27usec */
- }
- REG_WR(pDevice, PciCfg.ClockCtrl, 0);
- REG_WR(pDevice, PciCfg.MemWindowBaseAddr, 0);
+ if (REG_RD (pDevice, PciCfg.ClockCtrl) & T3_PCI_44MHZ_CORE_CLOCK) {
+ REG_WR (pDevice, PciCfg.ClockCtrl, T3_PCI_44MHZ_CORE_CLOCK |
+ T3_PCI_SELECT_ALTERNATE_CLOCK);
+ REG_WR (pDevice, PciCfg.ClockCtrl,
+ T3_PCI_SELECT_ALTERNATE_CLOCK);
+ MM_Wait (40); /* required delay is 27usec */
+ }
+ REG_WR (pDevice, PciCfg.ClockCtrl, 0);
+ REG_WR (pDevice, PciCfg.MemWindowBaseAddr, 0);
#if PCIX_TARGET_WORKAROUND
- MM_ReadConfig32(pDevice, T3_PCI_STATE_REG, &Value32);
- if ((pDevice->EnablePciXFix == FALSE) &&
- ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0))
- {
- if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B2 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B5)
- {
- __raw_writel(0, &(pDevice->pMemView->uIntMem.MemBlock32K[0x300]));
- __raw_writel(0, &(pDevice->pMemView->uIntMem.MemBlock32K[0x301]));
- __raw_writel(0xffffffff, &(pDevice->pMemView->uIntMem.MemBlock32K[0x301]));
- if (__raw_readl(&(pDevice->pMemView->uIntMem.MemBlock32K[0x300])))
- {
- pDevice->EnablePciXFix = TRUE;
- }
+ MM_ReadConfig32 (pDevice, T3_PCI_STATE_REG, &Value32);
+ if ((pDevice->EnablePciXFix == FALSE) &&
+ ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0)) {
+ if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B2 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B5) {
+ __raw_writel (0,
+ &(pDevice->pMemView->uIntMem.
+ MemBlock32K[0x300]));
+ __raw_writel (0,
+ &(pDevice->pMemView->uIntMem.
+ MemBlock32K[0x301]));
+ __raw_writel (0xffffffff,
+ &(pDevice->pMemView->uIntMem.
+ MemBlock32K[0x301]));
+ if (__raw_readl
+ (&(pDevice->pMemView->uIntMem.MemBlock32K[0x300])))
+ {
+ pDevice->EnablePciXFix = TRUE;
+ }
+ }
}
- }
#endif
#if 1
- /*
- * This code was at the beginning of else block below, but that's
- * a bug if node address in shared memory.
- */
- MM_Wait(50);
- LM_NvramInit(pDevice);
+ /*
+ * This code was at the beginning of else block below, but that's
+ * a bug if node address in shared memory.
+ */
+ MM_Wait (50);
+ LM_NvramInit (pDevice);
#endif
- /* Get the node address. First try to get in from the shared memory. */
- /* If the signature is not present, then get it from the NVRAM. */
- Value32 = MEM_RD_OFFSET(pDevice, T3_MAC_ADDR_HIGH_MAILBOX);
- if((Value32 >> 16) == 0x484b)
- {
+ /* Get the node address. First try to get in from the shared memory. */
+ /* If the signature is not present, then get it from the NVRAM. */
+ Value32 = MEM_RD_OFFSET (pDevice, T3_MAC_ADDR_HIGH_MAILBOX);
+ if ((Value32 >> 16) == 0x484b) {
- pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 8);
- pDevice->NodeAddress[1] = (LM_UINT8) Value32;
+ pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 8);
+ pDevice->NodeAddress[1] = (LM_UINT8) Value32;
- Value32 = MEM_RD_OFFSET(pDevice, T3_MAC_ADDR_LOW_MAILBOX);
+ Value32 = MEM_RD_OFFSET (pDevice, T3_MAC_ADDR_LOW_MAILBOX);
- pDevice->NodeAddress[2] = (LM_UINT8) (Value32 >> 24);
- pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 16);
- pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 8);
- pDevice->NodeAddress[5] = (LM_UINT8) Value32;
+ pDevice->NodeAddress[2] = (LM_UINT8) (Value32 >> 24);
+ pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 16);
+ pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 8);
+ pDevice->NodeAddress[5] = (LM_UINT8) Value32;
- Status = LM_STATUS_SUCCESS;
- }
- else
- {
- Status = LM_NvramRead(pDevice, 0x7c, &Value32);
- if(Status == LM_STATUS_SUCCESS)
- {
- pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 16);
- pDevice->NodeAddress[1] = (LM_UINT8) (Value32 >> 24);
+ Status = LM_STATUS_SUCCESS;
+ } else {
+ Status = LM_NvramRead (pDevice, 0x7c, &Value32);
+ if (Status == LM_STATUS_SUCCESS) {
+ pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 16);
+ pDevice->NodeAddress[1] = (LM_UINT8) (Value32 >> 24);
- Status = LM_NvramRead(pDevice, 0x80, &Value32);
+ Status = LM_NvramRead (pDevice, 0x80, &Value32);
- pDevice->NodeAddress[2] = (LM_UINT8) Value32;
- pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 8);
- pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 16);
- pDevice->NodeAddress[5] = (LM_UINT8) (Value32 >> 24);
+ pDevice->NodeAddress[2] = (LM_UINT8) Value32;
+ pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 8);
+ pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 16);
+ pDevice->NodeAddress[5] = (LM_UINT8) (Value32 >> 24);
+ }
}
- }
- /* Assign a default address. */
- if(Status != LM_STATUS_SUCCESS)
- {
+ /* Assign a default address. */
+ if (Status != LM_STATUS_SUCCESS) {
#ifndef EMBEDDED
- printk(KERN_ERR "Cannot get MAC addr from NVRAM. Using default.\n");
+ printk (KERN_ERR
+ "Cannot get MAC addr from NVRAM. Using default.\n");
#endif
- pDevice->NodeAddress[0] = 0x00; pDevice->NodeAddress[1] = 0x10;
- pDevice->NodeAddress[2] = 0x18; pDevice->NodeAddress[3] = 0x68;
- pDevice->NodeAddress[4] = 0x61; pDevice->NodeAddress[5] = 0x76;
- }
+ pDevice->NodeAddress[0] = 0x00;
+ pDevice->NodeAddress[1] = 0x10;
+ pDevice->NodeAddress[2] = 0x18;
+ pDevice->NodeAddress[3] = 0x68;
+ pDevice->NodeAddress[4] = 0x61;
+ pDevice->NodeAddress[5] = 0x76;
+ }
- pDevice->PermanentNodeAddress[0] = pDevice->NodeAddress[0];
- pDevice->PermanentNodeAddress[1] = pDevice->NodeAddress[1];
- pDevice->PermanentNodeAddress[2] = pDevice->NodeAddress[2];
- pDevice->PermanentNodeAddress[3] = pDevice->NodeAddress[3];
- pDevice->PermanentNodeAddress[4] = pDevice->NodeAddress[4];
- pDevice->PermanentNodeAddress[5] = pDevice->NodeAddress[5];
+ pDevice->PermanentNodeAddress[0] = pDevice->NodeAddress[0];
+ pDevice->PermanentNodeAddress[1] = pDevice->NodeAddress[1];
+ pDevice->PermanentNodeAddress[2] = pDevice->NodeAddress[2];
+ pDevice->PermanentNodeAddress[3] = pDevice->NodeAddress[3];
+ pDevice->PermanentNodeAddress[4] = pDevice->NodeAddress[4];
+ pDevice->PermanentNodeAddress[5] = pDevice->NodeAddress[5];
- /* Initialize the default values. */
- pDevice->NoTxPseudoHdrChksum = FALSE;
- pDevice->NoRxPseudoHdrChksum = FALSE;
- pDevice->NicSendBd = FALSE;
- pDevice->TxPacketDescCnt = DEFAULT_TX_PACKET_DESC_COUNT;
- pDevice->RxStdDescCnt = DEFAULT_STD_RCV_DESC_COUNT;
- pDevice->RxCoalescingTicks = DEFAULT_RX_COALESCING_TICKS;
- pDevice->TxCoalescingTicks = DEFAULT_TX_COALESCING_TICKS;
- pDevice->RxMaxCoalescedFrames = DEFAULT_RX_MAX_COALESCED_FRAMES;
- pDevice->TxMaxCoalescedFrames = DEFAULT_TX_MAX_COALESCED_FRAMES;
- pDevice->RxCoalescingTicksDuringInt = BAD_DEFAULT_VALUE;
- pDevice->TxCoalescingTicksDuringInt = BAD_DEFAULT_VALUE;
- pDevice->RxMaxCoalescedFramesDuringInt = BAD_DEFAULT_VALUE;
- pDevice->TxMaxCoalescedFramesDuringInt = BAD_DEFAULT_VALUE;
- pDevice->StatsCoalescingTicks = DEFAULT_STATS_COALESCING_TICKS;
- pDevice->EnableMWI = FALSE;
- pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
- pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
- pDevice->DisableAutoNeg = FALSE;
- pDevice->PhyIntMode = T3_PHY_INT_MODE_AUTO;
- pDevice->LinkChngMode = T3_LINK_CHNG_MODE_AUTO;
- pDevice->LedMode = LED_MODE_AUTO;
- pDevice->ResetPhyOnInit = TRUE;
- pDevice->DelayPciGrant = TRUE;
- pDevice->UseTaggedStatus = FALSE;
- pDevice->OneDmaAtOnce = BAD_DEFAULT_VALUE;
+ /* Initialize the default values. */
+ pDevice->NoTxPseudoHdrChksum = FALSE;
+ pDevice->NoRxPseudoHdrChksum = FALSE;
+ pDevice->NicSendBd = FALSE;
+ pDevice->TxPacketDescCnt = DEFAULT_TX_PACKET_DESC_COUNT;
+ pDevice->RxStdDescCnt = DEFAULT_STD_RCV_DESC_COUNT;
+ pDevice->RxCoalescingTicks = DEFAULT_RX_COALESCING_TICKS;
+ pDevice->TxCoalescingTicks = DEFAULT_TX_COALESCING_TICKS;
+ pDevice->RxMaxCoalescedFrames = DEFAULT_RX_MAX_COALESCED_FRAMES;
+ pDevice->TxMaxCoalescedFrames = DEFAULT_TX_MAX_COALESCED_FRAMES;
+ pDevice->RxCoalescingTicksDuringInt = BAD_DEFAULT_VALUE;
+ pDevice->TxCoalescingTicksDuringInt = BAD_DEFAULT_VALUE;
+ pDevice->RxMaxCoalescedFramesDuringInt = BAD_DEFAULT_VALUE;
+ pDevice->TxMaxCoalescedFramesDuringInt = BAD_DEFAULT_VALUE;
+ pDevice->StatsCoalescingTicks = DEFAULT_STATS_COALESCING_TICKS;
+ pDevice->EnableMWI = FALSE;
+ pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
+ pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
+ pDevice->DisableAutoNeg = FALSE;
+ pDevice->PhyIntMode = T3_PHY_INT_MODE_AUTO;
+ pDevice->LinkChngMode = T3_LINK_CHNG_MODE_AUTO;
+ pDevice->LedMode = LED_MODE_AUTO;
+ pDevice->ResetPhyOnInit = TRUE;
+ pDevice->DelayPciGrant = TRUE;
+ pDevice->UseTaggedStatus = FALSE;
+ pDevice->OneDmaAtOnce = BAD_DEFAULT_VALUE;
- pDevice->DmaMbufLowMark = T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO;
- pDevice->RxMacMbufLowMark = T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO;
- pDevice->MbufHighMark = T3_DEF_MBUF_HIGH_WMARK_JUMBO;
+ pDevice->DmaMbufLowMark = T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO;
+ pDevice->RxMacMbufLowMark = T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO;
+ pDevice->MbufHighMark = T3_DEF_MBUF_HIGH_WMARK_JUMBO;
- pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_AUTO;
- pDevice->TaskOffloadCap = LM_TASK_OFFLOAD_NONE;
- pDevice->FlowControlCap = LM_FLOW_CONTROL_AUTO_PAUSE;
- pDevice->EnableTbi = FALSE;
+ pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_AUTO;
+ pDevice->TaskOffloadCap = LM_TASK_OFFLOAD_NONE;
+ pDevice->FlowControlCap = LM_FLOW_CONTROL_AUTO_PAUSE;
+ pDevice->EnableTbi = FALSE;
#if INCLUDE_TBI_SUPPORT
- pDevice->PollTbiLink = BAD_DEFAULT_VALUE;
+ pDevice->PollTbiLink = BAD_DEFAULT_VALUE;
#endif
- switch (T3_ASIC_REV(pDevice->ChipRevId))
- {
- case T3_ASIC_REV_5704:
- pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR;
- pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE64;
- break;
- default:
- pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR;
- pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE96;
- break;
- }
+ switch (T3_ASIC_REV (pDevice->ChipRevId)) {
+ case T3_ASIC_REV_5704:
+ pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR;
+ pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE64;
+ break;
+ default:
+ pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR;
+ pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE96;
+ break;
+ }
- pDevice->LinkStatus = LM_STATUS_LINK_DOWN;
- pDevice->QueueRxPackets = TRUE;
+ pDevice->LinkStatus = LM_STATUS_LINK_DOWN;
+ pDevice->QueueRxPackets = TRUE;
- pDevice->EnableWireSpeed = TRUE;
+ pDevice->EnableWireSpeed = TRUE;
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- pDevice->RxJumboDescCnt = DEFAULT_JUMBO_RCV_DESC_COUNT;
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ pDevice->RxJumboDescCnt = DEFAULT_JUMBO_RCV_DESC_COUNT;
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- /* Make this is a known adapter. */
- pAdapterInfo = LM_GetAdapterInfoBySsid(pDevice->SubsystemVendorId,
- pDevice->SubsystemId);
+ /* Make this is a known adapter. */
+ pAdapterInfo = LM_GetAdapterInfoBySsid (pDevice->SubsystemVendorId,
+ pDevice->SubsystemId);
- pDevice->BondId = REG_RD(pDevice, Grc.MiscCfg) & GRC_MISC_BD_ID_MASK;
- if (pDevice->BondId != GRC_MISC_BD_ID_5700 &&
- pDevice->BondId != GRC_MISC_BD_ID_5701 &&
- pDevice->BondId != GRC_MISC_BD_ID_5702FE &&
- pDevice->BondId != GRC_MISC_BD_ID_5703 &&
- pDevice->BondId != GRC_MISC_BD_ID_5703S &&
- pDevice->BondId != GRC_MISC_BD_ID_5704 &&
- pDevice->BondId != GRC_MISC_BD_ID_5704CIOBE)
- {
- return LM_STATUS_UNKNOWN_ADAPTER;
- }
-
- pDevice->SplitModeEnable = SPLIT_MODE_DISABLE;
- if ((pDevice->ChipRevId == T3_CHIP_ID_5704_A0) &&
- (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE))
- {
- pDevice->SplitModeEnable = SPLIT_MODE_ENABLE;
- pDevice->SplitModeMaxReq = SPLIT_MODE_5704_MAX_REQ;
- }
-
- /* Get Eeprom info. */
- Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_SIG_ADDR);
- if (Value32 == T3_NIC_DATA_SIG)
- {
- EeSigFound = TRUE;
- Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_NIC_CFG_ADDR);
-
- /* Determine PHY type. */
- switch (Value32 & T3_NIC_CFG_PHY_TYPE_MASK)
- {
- case T3_NIC_CFG_PHY_TYPE_COPPER:
- EePhyTypeSerdes = FALSE;
- break;
-
- case T3_NIC_CFG_PHY_TYPE_FIBER:
- EePhyTypeSerdes = TRUE;
- break;
-
- default:
- EePhyTypeSerdes = FALSE;
- break;
+ pDevice->BondId = REG_RD (pDevice, Grc.MiscCfg) & GRC_MISC_BD_ID_MASK;
+ if (pDevice->BondId != GRC_MISC_BD_ID_5700 &&
+ pDevice->BondId != GRC_MISC_BD_ID_5701 &&
+ pDevice->BondId != GRC_MISC_BD_ID_5702FE &&
+ pDevice->BondId != GRC_MISC_BD_ID_5703 &&
+ pDevice->BondId != GRC_MISC_BD_ID_5703S &&
+ pDevice->BondId != GRC_MISC_BD_ID_5704 &&
+ pDevice->BondId != GRC_MISC_BD_ID_5704CIOBE) {
+ return LM_STATUS_UNKNOWN_ADAPTER;
}
- /* Determine PHY led mode. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- switch(Value32 & T3_NIC_CFG_LED_MODE_MASK)
- {
- case T3_NIC_CFG_LED_MODE_TRIPLE_SPEED:
- EePhyLedMode = LED_MODE_THREE_LINK;
- break;
+ pDevice->SplitModeEnable = SPLIT_MODE_DISABLE;
+ if ((pDevice->ChipRevId == T3_CHIP_ID_5704_A0) &&
+ (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE)) {
+ pDevice->SplitModeEnable = SPLIT_MODE_ENABLE;
+ pDevice->SplitModeMaxReq = SPLIT_MODE_5704_MAX_REQ;
+ }
- case T3_NIC_CFG_LED_MODE_LINK_SPEED:
- EePhyLedMode = LED_MODE_LINK10;
- break;
+ /* Get Eeprom info. */
+ Value32 = MEM_RD_OFFSET (pDevice, T3_NIC_DATA_SIG_ADDR);
+ if (Value32 == T3_NIC_DATA_SIG) {
+ EeSigFound = TRUE;
+ Value32 = MEM_RD_OFFSET (pDevice, T3_NIC_DATA_NIC_CFG_ADDR);
+
+ /* Determine PHY type. */
+ switch (Value32 & T3_NIC_CFG_PHY_TYPE_MASK) {
+ case T3_NIC_CFG_PHY_TYPE_COPPER:
+ EePhyTypeSerdes = FALSE;
+ break;
+
+ case T3_NIC_CFG_PHY_TYPE_FIBER:
+ EePhyTypeSerdes = TRUE;
+ break;
default:
- EePhyLedMode = LED_MODE_AUTO;
- break;
- }
- }
- else
- {
- switch(Value32 & T3_NIC_CFG_LED_MODE_MASK)
- {
- case T3_NIC_CFG_LED_MODE_OPEN_DRAIN:
- EePhyLedMode = LED_MODE_OPEN_DRAIN;
- break;
+ EePhyTypeSerdes = FALSE;
+ break;
+ }
- case T3_NIC_CFG_LED_MODE_OUTPUT:
- EePhyLedMode = LED_MODE_OUTPUT;
- break;
+ /* Determine PHY led mode. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ switch (Value32 & T3_NIC_CFG_LED_MODE_MASK) {
+ case T3_NIC_CFG_LED_MODE_TRIPLE_SPEED:
+ EePhyLedMode = LED_MODE_THREE_LINK;
+ break;
- default:
- EePhyLedMode = LED_MODE_AUTO;
- break;
- }
- }
- if(pDevice->ChipRevId == T3_CHIP_ID_5703_A1 ||
- pDevice->ChipRevId == T3_CHIP_ID_5703_A2)
- {
- /* Enable EEPROM write protection. */
- if(Value32 & T3_NIC_EEPROM_WP)
- {
- pDevice->EepromWp = TRUE;
- }
+ case T3_NIC_CFG_LED_MODE_LINK_SPEED:
+ EePhyLedMode = LED_MODE_LINK10;
+ break;
+
+ default:
+ EePhyLedMode = LED_MODE_AUTO;
+ break;
+ }
+ } else {
+ switch (Value32 & T3_NIC_CFG_LED_MODE_MASK) {
+ case T3_NIC_CFG_LED_MODE_OPEN_DRAIN:
+ EePhyLedMode = LED_MODE_OPEN_DRAIN;
+ break;
+
+ case T3_NIC_CFG_LED_MODE_OUTPUT:
+ EePhyLedMode = LED_MODE_OUTPUT;
+ break;
+
+ default:
+ EePhyLedMode = LED_MODE_AUTO;
+ break;
+ }
+ }
+ if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5703_A2) {
+ /* Enable EEPROM write protection. */
+ if (Value32 & T3_NIC_EEPROM_WP) {
+ pDevice->EepromWp = TRUE;
+ }
+ }
+
+ /* Get the PHY Id. */
+ Value32 = MEM_RD_OFFSET (pDevice, T3_NIC_DATA_PHY_ID_ADDR);
+ if (Value32) {
+ EePhyId = (((Value32 & T3_NIC_PHY_ID1_MASK) >> 16) &
+ PHY_ID1_OUI_MASK) << 10;
+
+ Value32 = Value32 & T3_NIC_PHY_ID2_MASK;
+
+ EePhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) |
+ (Value32 & PHY_ID2_MODEL_MASK) | (Value32 &
+ PHY_ID2_REV_MASK);
+ } else {
+ EePhyId = 0;
+ }
+ } else {
+ EeSigFound = FALSE;
}
- /* Get the PHY Id. */
- Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_PHY_ID_ADDR);
- if (Value32)
- {
- EePhyId = (((Value32 & T3_NIC_PHY_ID1_MASK) >> 16) &
- PHY_ID1_OUI_MASK) << 10;
+ /* Set the PHY address. */
+ pDevice->PhyAddr = PHY_DEVICE_ID;
- Value32 = Value32 & T3_NIC_PHY_ID2_MASK;
+ /* Disable auto polling. */
+ pDevice->MiMode = 0xc0000;
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode);
+ MM_Wait (40);
- EePhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) |
- (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & PHY_ID2_REV_MASK);
- }
- else
- {
- EePhyId = 0;
- }
- }
- else
- {
- EeSigFound = FALSE;
- }
+ /* Get the PHY id. */
+ LM_ReadPhy (pDevice, PHY_ID1_REG, &Value32);
+ pDevice->PhyId = (Value32 & PHY_ID1_OUI_MASK) << 10;
- /* Set the PHY address. */
- pDevice->PhyAddr = PHY_DEVICE_ID;
+ LM_ReadPhy (pDevice, PHY_ID2_REG, &Value32);
+ pDevice->PhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) |
+ (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & PHY_ID2_REV_MASK);
- /* Disable auto polling. */
- pDevice->MiMode = 0xc0000;
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode);
- MM_Wait(40);
-
- /* Get the PHY id. */
- LM_ReadPhy(pDevice, PHY_ID1_REG, &Value32);
- pDevice->PhyId = (Value32 & PHY_ID1_OUI_MASK) << 10;
-
- LM_ReadPhy(pDevice, PHY_ID2_REG, &Value32);
- pDevice->PhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) |
- (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & PHY_ID2_REV_MASK);
-
- /* Set the EnableTbi flag to false if we have a copper PHY. */
- switch(pDevice->PhyId & PHY_ID_MASK)
- {
+ /* Set the EnableTbi flag to false if we have a copper PHY. */
+ switch (pDevice->PhyId & PHY_ID_MASK) {
case PHY_BCM5400_PHY_ID:
- pDevice->EnableTbi = FALSE;
- break;
+ pDevice->EnableTbi = FALSE;
+ break;
case PHY_BCM5401_PHY_ID:
- pDevice->EnableTbi = FALSE;
- break;
+ pDevice->EnableTbi = FALSE;
+ break;
case PHY_BCM5411_PHY_ID:
- pDevice->EnableTbi = FALSE;
- break;
+ pDevice->EnableTbi = FALSE;
+ break;
case PHY_BCM5701_PHY_ID:
- pDevice->EnableTbi = FALSE;
- break;
+ pDevice->EnableTbi = FALSE;
+ break;
case PHY_BCM5703_PHY_ID:
- pDevice->EnableTbi = FALSE;
- break;
+ pDevice->EnableTbi = FALSE;
+ break;
case PHY_BCM5704_PHY_ID:
- pDevice->EnableTbi = FALSE;
- break;
+ pDevice->EnableTbi = FALSE;
+ break;
case PHY_BCM8002_PHY_ID:
- pDevice->EnableTbi = TRUE;
- break;
+ pDevice->EnableTbi = TRUE;
+ break;
default:
- if (pAdapterInfo)
- {
- pDevice->PhyId = pAdapterInfo->PhyId;
- pDevice->EnableTbi = pAdapterInfo->Serdes;
- }
- else if (EeSigFound)
- {
- pDevice->PhyId = EePhyId;
- pDevice->EnableTbi = EePhyTypeSerdes;
- }
- break;
- }
-
- /* Bail out if we don't know the copper PHY id. */
- if(UNKNOWN_PHY_ID(pDevice->PhyId) && !pDevice->EnableTbi)
- {
- return LM_STATUS_FAILURE;
- }
-
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703)
- {
- if((pDevice->SavedCacheLineReg & 0xff00) < 0x4000)
- {
- pDevice->SavedCacheLineReg &= 0xffff00ff;
- pDevice->SavedCacheLineReg |= 0x4000;
- }
- }
- /* Change driver parameters. */
- Status = MM_GetConfig(pDevice);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
-
-#if INCLUDE_5701_AX_FIX
- if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B0)
- {
- pDevice->ResetPhyOnInit = TRUE;
- }
-#endif
-
- /* Save the current phy link status. */
- if(!pDevice->EnableTbi)
- {
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
-
- /* If we don't have link reset the PHY. */
- if(!(Value32 & PHY_STATUS_LINK_PASS) || pDevice->ResetPhyOnInit)
- {
-
- LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET);
-
- for(j = 0; j < 100; j++)
- {
- MM_Wait(10);
-
- LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32);
- if(Value32 && !(Value32 & PHY_CTRL_PHY_RESET))
- {
- MM_Wait(40);
- break;
+ if (pAdapterInfo) {
+ pDevice->PhyId = pAdapterInfo->PhyId;
+ pDevice->EnableTbi = pAdapterInfo->Serdes;
+ } else if (EeSigFound) {
+ pDevice->PhyId = EePhyId;
+ pDevice->EnableTbi = EePhyTypeSerdes;
}
- }
+ break;
+ }
+ /* Bail out if we don't know the copper PHY id. */
+ if (UNKNOWN_PHY_ID (pDevice->PhyId) && !pDevice->EnableTbi) {
+ return LM_STATUS_FAILURE;
+ }
+
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5703) {
+ if ((pDevice->SavedCacheLineReg & 0xff00) < 0x4000) {
+ pDevice->SavedCacheLineReg &= 0xffff00ff;
+ pDevice->SavedCacheLineReg |= 0x4000;
+ }
+ }
+ /* Change driver parameters. */
+ Status = MM_GetConfig (pDevice);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+#if INCLUDE_5701_AX_FIX
+ if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B0) {
+ pDevice->ResetPhyOnInit = TRUE;
+ }
+#endif
+
+ /* Save the current phy link status. */
+ if (!pDevice->EnableTbi) {
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+
+ /* If we don't have link reset the PHY. */
+ if (!(Value32 & PHY_STATUS_LINK_PASS)
+ || pDevice->ResetPhyOnInit) {
+
+ LM_WritePhy (pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET);
+
+ for (j = 0; j < 100; j++) {
+ MM_Wait (10);
+
+ LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32);
+ if (Value32 && !(Value32 & PHY_CTRL_PHY_RESET)) {
+ MM_Wait (40);
+ break;
+ }
+ }
#if INCLUDE_5701_AX_FIX
- /* 5701_AX_BX bug: only advertises 10mb speed. */
- if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B0)
- {
+ /* 5701_AX_BX bug: only advertises 10mb speed. */
+ if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B0) {
- Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD |
- PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL |
- PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF;
- Value32 |= GetPhyAdFlowCntrlSettings(pDevice);
- LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32);
- pDevice->advertising = Value32;
+ Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD |
+ PHY_AN_AD_10BASET_HALF |
+ PHY_AN_AD_10BASET_FULL |
+ PHY_AN_AD_100BASETX_FULL |
+ PHY_AN_AD_100BASETX_HALF;
+ Value32 |= GetPhyAdFlowCntrlSettings (pDevice);
+ LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32);
+ pDevice->advertising = Value32;
- Value32 = BCM540X_AN_AD_1000BASET_HALF |
- BCM540X_AN_AD_1000BASET_FULL | BCM540X_CONFIG_AS_MASTER |
- BCM540X_ENABLE_CONFIG_AS_MASTER;
- LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32);
- pDevice->advertising1000 = Value32;
+ Value32 = BCM540X_AN_AD_1000BASET_HALF |
+ BCM540X_AN_AD_1000BASET_FULL |
+ BCM540X_CONFIG_AS_MASTER |
+ BCM540X_ENABLE_CONFIG_AS_MASTER;
+ LM_WritePhy (pDevice,
+ BCM540X_1000BASET_CTRL_REG,
+ Value32);
+ pDevice->advertising1000 = Value32;
- LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE |
- PHY_CTRL_RESTART_AUTO_NEG);
- }
+ LM_WritePhy (pDevice, PHY_CTRL_REG,
+ PHY_CTRL_AUTO_NEG_ENABLE |
+ PHY_CTRL_RESTART_AUTO_NEG);
+ }
#endif
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703)
- {
- LM_WritePhy(pDevice, 0x18, 0x0c00);
- LM_WritePhy(pDevice, 0x17, 0x201f);
- LM_WritePhy(pDevice, 0x15, 0x2aaa);
- }
- if(pDevice->ChipRevId == T3_CHIP_ID_5704_A0)
- {
- LM_WritePhy(pDevice, 0x1c, 0x8d68);
- LM_WritePhy(pDevice, 0x1c, 0x8d68);
- }
- /* Enable Ethernet@WireSpeed. */
- if(pDevice->EnableWireSpeed)
- {
- LM_WritePhy(pDevice, 0x18, 0x7007);
- LM_ReadPhy(pDevice, 0x18, &Value32);
- LM_WritePhy(pDevice, 0x18, Value32 | BIT_15 | BIT_4);
- }
+ if (T3_ASIC_REV (pDevice->ChipRevId) ==
+ T3_ASIC_REV_5703) {
+ LM_WritePhy (pDevice, 0x18, 0x0c00);
+ LM_WritePhy (pDevice, 0x17, 0x201f);
+ LM_WritePhy (pDevice, 0x15, 0x2aaa);
+ }
+ if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) {
+ LM_WritePhy (pDevice, 0x1c, 0x8d68);
+ LM_WritePhy (pDevice, 0x1c, 0x8d68);
+ }
+ /* Enable Ethernet@WireSpeed. */
+ if (pDevice->EnableWireSpeed) {
+ LM_WritePhy (pDevice, 0x18, 0x7007);
+ LM_ReadPhy (pDevice, 0x18, &Value32);
+ LM_WritePhy (pDevice, 0x18,
+ Value32 | BIT_15 | BIT_4);
+ }
+ }
}
- }
- /* Turn off tap power management. */
- if((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID)
- {
- LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20);
+ /* Turn off tap power management. */
+ if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) {
+ LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x0c20);
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1804);
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1204);
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0132);
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0232);
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0a20);
- MM_Wait(40);
- }
-
+ MM_Wait (40);
+ }
#if INCLUDE_TBI_SUPPORT
- pDevice->IgnoreTbiLinkChange = FALSE;
+ pDevice->IgnoreTbiLinkChange = FALSE;
- if(pDevice->EnableTbi)
- {
- pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_NONE;
- pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY;
- if ((pDevice->PollTbiLink == BAD_DEFAULT_VALUE) ||
- pDevice->DisableAutoNeg)
- {
- pDevice->PollTbiLink = FALSE;
+ if (pDevice->EnableTbi) {
+ pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_NONE;
+ pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY;
+ if ((pDevice->PollTbiLink == BAD_DEFAULT_VALUE) ||
+ pDevice->DisableAutoNeg) {
+ pDevice->PollTbiLink = FALSE;
+ }
+ } else {
+ pDevice->PollTbiLink = FALSE;
}
- }
- else
- {
- pDevice->PollTbiLink = FALSE;
- }
-#endif /* INCLUDE_TBI_SUPPORT */
+#endif /* INCLUDE_TBI_SUPPORT */
- /* UseTaggedStatus is only valid for 5701 and later. */
- if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- pDevice->UseTaggedStatus = FALSE;
+ /* UseTaggedStatus is only valid for 5701 and later. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ pDevice->UseTaggedStatus = FALSE;
- pDevice->CoalesceMode = 0;
- }
- else
- {
- pDevice->CoalesceMode = HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT |
- HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT;
- }
-
- /* Set the status block size. */
- if(T3_CHIP_REV(pDevice->ChipRevId) != T3_CHIP_REV_5700_AX &&
- T3_CHIP_REV(pDevice->ChipRevId) != T3_CHIP_REV_5700_BX)
- {
- pDevice->CoalesceMode |= HOST_COALESCE_32_BYTE_STATUS_MODE;
- }
-
- /* Check the DURING_INT coalescing ticks parameters. */
- if(pDevice->UseTaggedStatus)
- {
- if(pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->RxCoalescingTicksDuringInt =
- DEFAULT_RX_COALESCING_TICKS_DURING_INT;
+ pDevice->CoalesceMode = 0;
+ } else {
+ pDevice->CoalesceMode =
+ HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT |
+ HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT;
}
- if(pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->TxCoalescingTicksDuringInt =
- DEFAULT_TX_COALESCING_TICKS_DURING_INT;
+ /* Set the status block size. */
+ if (T3_CHIP_REV (pDevice->ChipRevId) != T3_CHIP_REV_5700_AX &&
+ T3_CHIP_REV (pDevice->ChipRevId) != T3_CHIP_REV_5700_BX) {
+ pDevice->CoalesceMode |= HOST_COALESCE_32_BYTE_STATUS_MODE;
}
- if(pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->RxMaxCoalescedFramesDuringInt =
- DEFAULT_RX_MAX_COALESCED_FRAMES_DURING_INT;
- }
+ /* Check the DURING_INT coalescing ticks parameters. */
+ if (pDevice->UseTaggedStatus) {
+ if (pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->RxCoalescingTicksDuringInt =
+ DEFAULT_RX_COALESCING_TICKS_DURING_INT;
+ }
- if(pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->TxMaxCoalescedFramesDuringInt =
- DEFAULT_TX_MAX_COALESCED_FRAMES_DURING_INT;
- }
- }
- else
- {
- if(pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->RxCoalescingTicksDuringInt = 0;
- }
+ if (pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->TxCoalescingTicksDuringInt =
+ DEFAULT_TX_COALESCING_TICKS_DURING_INT;
+ }
- if(pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->TxCoalescingTicksDuringInt = 0;
- }
+ if (pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->RxMaxCoalescedFramesDuringInt =
+ DEFAULT_RX_MAX_COALESCED_FRAMES_DURING_INT;
+ }
- if(pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->RxMaxCoalescedFramesDuringInt = 0;
- }
+ if (pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->TxMaxCoalescedFramesDuringInt =
+ DEFAULT_TX_MAX_COALESCED_FRAMES_DURING_INT;
+ }
+ } else {
+ if (pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->RxCoalescingTicksDuringInt = 0;
+ }
- if(pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE)
- {
- pDevice->TxMaxCoalescedFramesDuringInt = 0;
+ if (pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->TxCoalescingTicksDuringInt = 0;
+ }
+
+ if (pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->RxMaxCoalescedFramesDuringInt = 0;
+ }
+
+ if (pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) {
+ pDevice->TxMaxCoalescedFramesDuringInt = 0;
+ }
}
- }
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- if(pDevice->RxMtu <= (MAX_STD_RCV_BUFFER_SIZE - 8 /* CRC */))
- {
- pDevice->RxJumboDescCnt = 0;
- if(pDevice->RxMtu <= MAX_ETHERNET_PACKET_SIZE_NO_CRC)
- {
- pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
- }
- }
- else
- {
- pDevice->RxJumboBufferSize = (pDevice->RxMtu + 8 /* CRC + VLAN */ +
- COMMON_CACHE_LINE_SIZE-1) & ~COMMON_CACHE_LINE_MASK;
+ if (pDevice->RxMtu <= (MAX_STD_RCV_BUFFER_SIZE - 8 /* CRC */ )) {
+ pDevice->RxJumboDescCnt = 0;
+ if (pDevice->RxMtu <= MAX_ETHERNET_PACKET_SIZE_NO_CRC) {
+ pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
+ }
+ } else {
+ pDevice->RxJumboBufferSize =
+ (pDevice->RxMtu + 8 /* CRC + VLAN */ +
+ COMMON_CACHE_LINE_SIZE - 1) & ~COMMON_CACHE_LINE_MASK;
- if(pDevice->RxJumboBufferSize > MAX_JUMBO_RCV_BUFFER_SIZE)
- {
- pDevice->RxJumboBufferSize = DEFAULT_JUMBO_RCV_BUFFER_SIZE;
- pDevice->RxMtu = pDevice->RxJumboBufferSize - 8 /* CRC + VLAN */;
- }
- pDevice->TxMtu = pDevice->RxMtu;
+ if (pDevice->RxJumboBufferSize > MAX_JUMBO_RCV_BUFFER_SIZE) {
+ pDevice->RxJumboBufferSize =
+ DEFAULT_JUMBO_RCV_BUFFER_SIZE;
+ pDevice->RxMtu =
+ pDevice->RxJumboBufferSize - 8 /* CRC + VLAN */ ;
+ }
+ pDevice->TxMtu = pDevice->RxMtu;
- }
+ }
#else
- pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- pDevice->RxPacketDescCnt =
+ pDevice->RxPacketDescCnt =
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- pDevice->RxJumboDescCnt +
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- pDevice->RxStdDescCnt;
+ pDevice->RxJumboDescCnt +
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ pDevice->RxStdDescCnt;
- if(pDevice->TxMtu < MAX_ETHERNET_PACKET_SIZE_NO_CRC)
- {
- pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
- }
-
- if(pDevice->TxMtu > MAX_JUMBO_TX_BUFFER_SIZE)
- {
- pDevice->TxMtu = MAX_JUMBO_TX_BUFFER_SIZE;
- }
-
- /* Configure the proper ways to get link change interrupt. */
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO)
- {
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT;
+ if (pDevice->TxMtu < MAX_ETHERNET_PACKET_SIZE_NO_CRC) {
+ pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC;
}
- else
- {
- pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY;
- }
- }
- else if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING)
- {
- /* Auto-polling does not work on 5700_AX and 5700_BX. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT;
- }
- }
- /* Determine the method to get link change status. */
- if(pDevice->LinkChngMode == T3_LINK_CHNG_MODE_AUTO)
- {
- /* The link status bit in the status block does not work on 5700_AX */
- /* and 5700_BX chips. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG;
+ if (pDevice->TxMtu > MAX_JUMBO_TX_BUFFER_SIZE) {
+ pDevice->TxMtu = MAX_JUMBO_TX_BUFFER_SIZE;
}
- else
- {
- pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_BLOCK;
- }
- }
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG;
- }
-
- /* Configure PHY led mode. */
- if(pDevice->LedMode == LED_MODE_AUTO)
- {
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- if(pDevice->SubsystemVendorId == T3_SVID_DELL)
- {
- pDevice->LedMode = LED_MODE_LINK10;
- }
- else
- {
- pDevice->LedMode = LED_MODE_THREE_LINK;
-
- if(EeSigFound && EePhyLedMode != LED_MODE_AUTO)
- {
- pDevice->LedMode = EePhyLedMode;
+ /* Configure the proper ways to get link change interrupt. */
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO) {
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT;
+ } else {
+ pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY;
}
- }
+ } else if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) {
+ /* Auto-polling does not work on 5700_AX and 5700_BX. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT;
+ }
+ }
- /* bug? 5701 in LINK10 mode does not seem to work when */
- /* PhyIntMode is LINK_READY. */
- if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
-#if INCLUDE_TBI_SUPPORT
- pDevice->EnableTbi == FALSE &&
-#endif
- pDevice->LedMode == LED_MODE_LINK10)
- {
- pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT;
+ /* Determine the method to get link change status. */
+ if (pDevice->LinkChngMode == T3_LINK_CHNG_MODE_AUTO) {
+ /* The link status bit in the status block does not work on 5700_AX */
+ /* and 5700_BX chips. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ pDevice->LinkChngMode =
+ T3_LINK_CHNG_MODE_USE_STATUS_REG;
+ } else {
+ pDevice->LinkChngMode =
+ T3_LINK_CHNG_MODE_USE_STATUS_BLOCK;
+ }
+ }
+
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG;
- }
-
- if(pDevice->EnableTbi)
- {
- pDevice->LedMode = LED_MODE_THREE_LINK;
- }
}
- else
- {
- if(EeSigFound && EePhyLedMode != LED_MODE_AUTO)
- {
- pDevice->LedMode = EePhyLedMode;
- }
- else
- {
- pDevice->LedMode = LED_MODE_OPEN_DRAIN;
- }
+
+ /* Configure PHY led mode. */
+ if (pDevice->LedMode == LED_MODE_AUTO) {
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ if (pDevice->SubsystemVendorId == T3_SVID_DELL) {
+ pDevice->LedMode = LED_MODE_LINK10;
+ } else {
+ pDevice->LedMode = LED_MODE_THREE_LINK;
+
+ if (EeSigFound && EePhyLedMode != LED_MODE_AUTO) {
+ pDevice->LedMode = EePhyLedMode;
+ }
+ }
+
+ /* bug? 5701 in LINK10 mode does not seem to work when */
+ /* PhyIntMode is LINK_READY. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700
+ &&
+#if INCLUDE_TBI_SUPPORT
+ pDevice->EnableTbi == FALSE &&
+#endif
+ pDevice->LedMode == LED_MODE_LINK10) {
+ pDevice->PhyIntMode =
+ T3_PHY_INT_MODE_MI_INTERRUPT;
+ pDevice->LinkChngMode =
+ T3_LINK_CHNG_MODE_USE_STATUS_REG;
+ }
+
+ if (pDevice->EnableTbi) {
+ pDevice->LedMode = LED_MODE_THREE_LINK;
+ }
+ } else {
+ if (EeSigFound && EePhyLedMode != LED_MODE_AUTO) {
+ pDevice->LedMode = EePhyLedMode;
+ } else {
+ pDevice->LedMode = LED_MODE_OPEN_DRAIN;
+ }
+ }
}
- }
- /* Enable OneDmaAtOnce. */
- if(pDevice->OneDmaAtOnce == BAD_DEFAULT_VALUE)
- {
- pDevice->OneDmaAtOnce = FALSE;
- }
+ /* Enable OneDmaAtOnce. */
+ if (pDevice->OneDmaAtOnce == BAD_DEFAULT_VALUE) {
+ pDevice->OneDmaAtOnce = FALSE;
+ }
- if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B2)
- {
- pDevice->WolSpeed = WOL_SPEED_10MB;
- }
- else
- {
- pDevice->WolSpeed = WOL_SPEED_100MB;
- }
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B2) {
+ pDevice->WolSpeed = WOL_SPEED_10MB;
+ } else {
+ pDevice->WolSpeed = WOL_SPEED_100MB;
+ }
- /* Offloadings. */
- pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE;
+ /* Offloadings. */
+ pDevice->TaskToOffload = LM_TASK_OFFLOAD_NONE;
- /* Turn off task offloading on Ax. */
- if(pDevice->ChipRevId == T3_CHIP_ID_5700_B0)
- {
- pDevice->TaskOffloadCap &= ~(LM_TASK_OFFLOAD_TX_TCP_CHECKSUM |
- LM_TASK_OFFLOAD_TX_UDP_CHECKSUM);
- }
- pDevice->PciState = REG_RD(pDevice, PciCfg.PciState);
- LM_ReadVPD(pDevice);
- LM_ReadBootCodeVersion(pDevice);
- LM_GetBusSpeed(pDevice);
+ /* Turn off task offloading on Ax. */
+ if (pDevice->ChipRevId == T3_CHIP_ID_5700_B0) {
+ pDevice->TaskOffloadCap &= ~(LM_TASK_OFFLOAD_TX_TCP_CHECKSUM |
+ LM_TASK_OFFLOAD_TX_UDP_CHECKSUM);
+ }
+ pDevice->PciState = REG_RD (pDevice, PciCfg.PciState);
+ LM_ReadVPD (pDevice);
+ LM_ReadBootCodeVersion (pDevice);
+ LM_GetBusSpeed (pDevice);
- return LM_STATUS_SUCCESS;
-} /* LM_GetAdapterInfo */
+ return LM_STATUS_SUCCESS;
+} /* LM_GetAdapterInfo */
-STATIC PLM_ADAPTER_INFO
-LM_GetAdapterInfoBySsid(
- LM_UINT16 Svid,
- LM_UINT16 Ssid)
+STATIC PLM_ADAPTER_INFO LM_GetAdapterInfoBySsid (LM_UINT16 Svid, LM_UINT16 Ssid)
{
- static LM_ADAPTER_INFO AdapterArr[] =
- {
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A6, PHY_BCM5401_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A5, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700T6, PHY_BCM8002_PHY_ID, 1},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A9, 0, 1 },
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T1, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T8, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A7, 0, 1},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A10, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A12, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax1, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax2, PHY_BCM5701_PHY_ID, 0},
+ static LM_ADAPTER_INFO AdapterArr[] = {
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A6,
+ PHY_BCM5401_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A5,
+ PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700T6,
+ PHY_BCM8002_PHY_ID, 1},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A9, 0, 1},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T1,
+ PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T8,
+ PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A7, 0, 1},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A10,
+ PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A12,
+ PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax1,
+ PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax2,
+ PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_3COM, T3_SSID_3COM_3C996T, PHY_BCM5401_PHY_ID, 0 },
- { T3_SVID_3COM, T3_SSID_3COM_3C996BT, PHY_BCM5701_PHY_ID, 0 },
- { T3_SVID_3COM, T3_SSID_3COM_3C996SX, 0, 1 },
- { T3_SVID_3COM, T3_SSID_3COM_3C1000T, PHY_BCM5701_PHY_ID, 0 },
- { T3_SVID_3COM, T3_SSID_3COM_3C940BR01, PHY_BCM5701_PHY_ID, 0 },
+ {T3_SVID_3COM, T3_SSID_3COM_3C996T, PHY_BCM5401_PHY_ID, 0},
+ {T3_SVID_3COM, T3_SSID_3COM_3C996BT, PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_3COM, T3_SSID_3COM_3C996SX, 0, 1},
+ {T3_SVID_3COM, T3_SSID_3COM_3C1000T, PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_3COM, T3_SSID_3COM_3C940BR01, PHY_BCM5701_PHY_ID, 0},
- { T3_SVID_DELL, T3_SSID_DELL_VIPER, PHY_BCM5401_PHY_ID, 0 },
- { T3_SVID_DELL, T3_SSID_DELL_JAGUAR, PHY_BCM5401_PHY_ID, 0 },
- { T3_SVID_DELL, T3_SSID_DELL_MERLOT, PHY_BCM5411_PHY_ID, 0 },
- { T3_SVID_DELL, T3_SSID_DELL_SLIM_MERLOT, PHY_BCM5411_PHY_ID, 0 },
+ {T3_SVID_DELL, T3_SSID_DELL_VIPER, PHY_BCM5401_PHY_ID, 0},
+ {T3_SVID_DELL, T3_SSID_DELL_JAGUAR, PHY_BCM5401_PHY_ID, 0},
+ {T3_SVID_DELL, T3_SSID_DELL_MERLOT, PHY_BCM5411_PHY_ID, 0},
+ {T3_SVID_DELL, T3_SSID_DELL_SLIM_MERLOT, PHY_BCM5411_PHY_ID, 0},
- { T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE, PHY_BCM5701_PHY_ID, 0 },
- { T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE_2, PHY_BCM5701_PHY_ID, 0 },
- { T3_SVID_COMPAQ, T3_SSID_COMPAQ_CHANGELING, 0, 1 },
- { T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780, PHY_BCM5701_PHY_ID, 0 },
- { T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780_2, PHY_BCM5701_PHY_ID, 0 },
+ {T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE, PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE_2, PHY_BCM5701_PHY_ID,
+ 0},
+ {T3_SVID_COMPAQ, T3_SSID_COMPAQ_CHANGELING, 0, 1},
+ {T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780, PHY_BCM5701_PHY_ID, 0},
+ {T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780_2, PHY_BCM5701_PHY_ID,
+ 0},
- };
- LM_UINT32 j;
+ };
+ LM_UINT32 j;
- for(j = 0; j < sizeof(AdapterArr)/sizeof(LM_ADAPTER_INFO); j++)
- {
- if(AdapterArr[j].Svid == Svid && AdapterArr[j].Ssid == Ssid)
- {
- return &AdapterArr[j];
+ for (j = 0; j < sizeof (AdapterArr) / sizeof (LM_ADAPTER_INFO); j++) {
+ if (AdapterArr[j].Svid == Svid && AdapterArr[j].Ssid == Ssid) {
+ return &AdapterArr[j];
+ }
}
- }
- return NULL;
+ return NULL;
}
-
/******************************************************************************/
/* Description: */
/* This routine sets up receive/transmit buffer descriptions queues. */
@@ -1638,237 +1489,226 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_InitializeAdapter(
-PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_InitializeAdapter (PLM_DEVICE_BLOCK pDevice)
{
- LM_PHYSICAL_ADDRESS MemPhy;
- PLM_UINT8 pMemVirt;
- PLM_PACKET pPacket;
- LM_STATUS Status;
- LM_UINT32 Size;
- LM_UINT32 j;
+ LM_PHYSICAL_ADDRESS MemPhy;
+ PLM_UINT8 pMemVirt;
+ PLM_PACKET pPacket;
+ LM_STATUS Status;
+ LM_UINT32 Size;
+ LM_UINT32 j;
- /* Set power state to D0. */
- LM_SetPowerState(pDevice, LM_POWER_STATE_D0);
+ /* Set power state to D0. */
+ LM_SetPowerState (pDevice, LM_POWER_STATE_D0);
- /* Intialize the queues. */
- QQ_InitQueue(&pDevice->RxPacketReceivedQ.Container,
- MAX_RX_PACKET_DESC_COUNT);
- QQ_InitQueue(&pDevice->RxPacketFreeQ.Container,
- MAX_RX_PACKET_DESC_COUNT);
+ /* Intialize the queues. */
+ QQ_InitQueue (&pDevice->RxPacketReceivedQ.Container,
+ MAX_RX_PACKET_DESC_COUNT);
+ QQ_InitQueue (&pDevice->RxPacketFreeQ.Container,
+ MAX_RX_PACKET_DESC_COUNT);
- QQ_InitQueue(&pDevice->TxPacketFreeQ.Container,MAX_TX_PACKET_DESC_COUNT);
- QQ_InitQueue(&pDevice->TxPacketActiveQ.Container,MAX_TX_PACKET_DESC_COUNT);
- QQ_InitQueue(&pDevice->TxPacketXmittedQ.Container,MAX_TX_PACKET_DESC_COUNT);
+ QQ_InitQueue (&pDevice->TxPacketFreeQ.Container,
+ MAX_TX_PACKET_DESC_COUNT);
+ QQ_InitQueue (&pDevice->TxPacketActiveQ.Container,
+ MAX_TX_PACKET_DESC_COUNT);
+ QQ_InitQueue (&pDevice->TxPacketXmittedQ.Container,
+ MAX_TX_PACKET_DESC_COUNT);
- /* Allocate shared memory for: status block, the buffers for receive */
- /* rings -- standard, mini, jumbo, and return rings. */
- Size = T3_STATUS_BLOCK_SIZE + sizeof(T3_STATS_BLOCK) +
- T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD) +
+ /* Allocate shared memory for: status block, the buffers for receive */
+ /* rings -- standard, mini, jumbo, and return rings. */
+ Size = T3_STATUS_BLOCK_SIZE + sizeof (T3_STATS_BLOCK) +
+ T3_STD_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD) +
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD) +
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD);
+ T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD) +
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD);
- /* Memory for host based Send BD. */
- if(pDevice->NicSendBd == FALSE)
- {
- Size += sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT;
- }
-
- /* Allocate the memory block. */
- Status = MM_AllocateSharedMemory(pDevice, Size, (PLM_VOID) &pMemVirt, &MemPhy, FALSE);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
-
- /* Program DMA Read/Write */
- if (pDevice->PciState & T3_PCI_STATE_NOT_PCI_X_BUS)
- {
- pDevice->DmaReadWriteCtrl = 0x763f000f;
- }
- else
- {
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5704)
- {
- pDevice->DmaReadWriteCtrl = 0x761f0000;
+ /* Memory for host based Send BD. */
+ if (pDevice->NicSendBd == FALSE) {
+ Size += sizeof (T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT;
}
- else
- {
- pDevice->DmaReadWriteCtrl = 0x761b000f;
+
+ /* Allocate the memory block. */
+ Status =
+ MM_AllocateSharedMemory (pDevice, Size, (PLM_VOID) & pMemVirt,
+ &MemPhy, FALSE);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
}
- if(pDevice->ChipRevId == T3_CHIP_ID_5703_A1 ||
- pDevice->ChipRevId == T3_CHIP_ID_5703_A2)
- {
- pDevice->OneDmaAtOnce = TRUE;
+
+ /* Program DMA Read/Write */
+ if (pDevice->PciState & T3_PCI_STATE_NOT_PCI_X_BUS) {
+ pDevice->DmaReadWriteCtrl = 0x763f000f;
+ } else {
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5704) {
+ pDevice->DmaReadWriteCtrl = 0x761f0000;
+ } else {
+ pDevice->DmaReadWriteCtrl = 0x761b000f;
+ }
+ if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5703_A2) {
+ pDevice->OneDmaAtOnce = TRUE;
+ }
}
- }
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703)
- {
- pDevice->DmaReadWriteCtrl &= 0xfffffff0;
- }
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5703) {
+ pDevice->DmaReadWriteCtrl &= 0xfffffff0;
+ }
- if(pDevice->OneDmaAtOnce)
- {
- pDevice->DmaReadWriteCtrl |= DMA_CTRL_WRITE_ONE_DMA_AT_ONCE;
- }
- REG_WR(pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl);
+ if (pDevice->OneDmaAtOnce) {
+ pDevice->DmaReadWriteCtrl |= DMA_CTRL_WRITE_ONE_DMA_AT_ONCE;
+ }
+ REG_WR (pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl);
- if (LM_DmaTest(pDevice, pMemVirt, MemPhy, 0x400) != LM_STATUS_SUCCESS)
- {
- return LM_STATUS_FAILURE;
- }
+ if (LM_DmaTest (pDevice, pMemVirt, MemPhy, 0x400) != LM_STATUS_SUCCESS) {
+ return LM_STATUS_FAILURE;
+ }
- /* Status block. */
- pDevice->pStatusBlkVirt = (PT3_STATUS_BLOCK) pMemVirt;
- pDevice->StatusBlkPhy = MemPhy;
- pMemVirt += T3_STATUS_BLOCK_SIZE;
- LM_INC_PHYSICAL_ADDRESS(&MemPhy, T3_STATUS_BLOCK_SIZE);
+ /* Status block. */
+ pDevice->pStatusBlkVirt = (PT3_STATUS_BLOCK) pMemVirt;
+ pDevice->StatusBlkPhy = MemPhy;
+ pMemVirt += T3_STATUS_BLOCK_SIZE;
+ LM_INC_PHYSICAL_ADDRESS (&MemPhy, T3_STATUS_BLOCK_SIZE);
- /* Statistics block. */
- pDevice->pStatsBlkVirt = (PT3_STATS_BLOCK) pMemVirt;
- pDevice->StatsBlkPhy = MemPhy;
- pMemVirt += sizeof(T3_STATS_BLOCK);
- LM_INC_PHYSICAL_ADDRESS(&MemPhy, sizeof(T3_STATS_BLOCK));
+ /* Statistics block. */
+ pDevice->pStatsBlkVirt = (PT3_STATS_BLOCK) pMemVirt;
+ pDevice->StatsBlkPhy = MemPhy;
+ pMemVirt += sizeof (T3_STATS_BLOCK);
+ LM_INC_PHYSICAL_ADDRESS (&MemPhy, sizeof (T3_STATS_BLOCK));
- /* Receive standard BD buffer. */
- pDevice->pRxStdBdVirt = (PT3_RCV_BD) pMemVirt;
- pDevice->RxStdBdPhy = MemPhy;
+ /* Receive standard BD buffer. */
+ pDevice->pRxStdBdVirt = (PT3_RCV_BD) pMemVirt;
+ pDevice->RxStdBdPhy = MemPhy;
- pMemVirt += T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD);
- LM_INC_PHYSICAL_ADDRESS(&MemPhy,
- T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD));
+ pMemVirt += T3_STD_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD);
+ LM_INC_PHYSICAL_ADDRESS (&MemPhy,
+ T3_STD_RCV_RCB_ENTRY_COUNT *
+ sizeof (T3_RCV_BD));
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- /* Receive jumbo BD buffer. */
- pDevice->pRxJumboBdVirt = (PT3_RCV_BD) pMemVirt;
- pDevice->RxJumboBdPhy = MemPhy;
+ /* Receive jumbo BD buffer. */
+ pDevice->pRxJumboBdVirt = (PT3_RCV_BD) pMemVirt;
+ pDevice->RxJumboBdPhy = MemPhy;
- pMemVirt += T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD);
- LM_INC_PHYSICAL_ADDRESS(&MemPhy,
- T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD));
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ pMemVirt += T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD);
+ LM_INC_PHYSICAL_ADDRESS (&MemPhy,
+ T3_JUMBO_RCV_RCB_ENTRY_COUNT *
+ sizeof (T3_RCV_BD));
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- /* Receive return BD buffer. */
- pDevice->pRcvRetBdVirt = (PT3_RCV_BD) pMemVirt;
- pDevice->RcvRetBdPhy = MemPhy;
+ /* Receive return BD buffer. */
+ pDevice->pRcvRetBdVirt = (PT3_RCV_BD) pMemVirt;
+ pDevice->RcvRetBdPhy = MemPhy;
- pMemVirt += T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD);
- LM_INC_PHYSICAL_ADDRESS(&MemPhy,
- T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD));
+ pMemVirt += T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof (T3_RCV_BD);
+ LM_INC_PHYSICAL_ADDRESS (&MemPhy,
+ T3_RCV_RETURN_RCB_ENTRY_COUNT *
+ sizeof (T3_RCV_BD));
- /* Set up Send BD. */
- if(pDevice->NicSendBd == FALSE)
- {
- pDevice->pSendBdVirt = (PT3_SND_BD) pMemVirt;
- pDevice->SendBdPhy = MemPhy;
+ /* Set up Send BD. */
+ if (pDevice->NicSendBd == FALSE) {
+ pDevice->pSendBdVirt = (PT3_SND_BD) pMemVirt;
+ pDevice->SendBdPhy = MemPhy;
- pMemVirt += sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT;
- LM_INC_PHYSICAL_ADDRESS(&MemPhy,
- sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT);
- }
- else
- {
- pDevice->pSendBdVirt = (PT3_SND_BD)
- pDevice->pMemView->uIntMem.First32k.BufferDesc;
- pDevice->SendBdPhy.High = 0;
- pDevice->SendBdPhy.Low = T3_NIC_SND_BUFFER_DESC_ADDR;
- }
+ pMemVirt += sizeof (T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT;
+ LM_INC_PHYSICAL_ADDRESS (&MemPhy,
+ sizeof (T3_SND_BD) *
+ T3_SEND_RCB_ENTRY_COUNT);
+ } else {
+ pDevice->pSendBdVirt = (PT3_SND_BD)
+ pDevice->pMemView->uIntMem.First32k.BufferDesc;
+ pDevice->SendBdPhy.High = 0;
+ pDevice->SendBdPhy.Low = T3_NIC_SND_BUFFER_DESC_ADDR;
+ }
- /* Allocate memory for packet descriptors. */
- Size = (pDevice->RxPacketDescCnt +
- pDevice->TxPacketDescCnt) * MM_PACKET_DESC_SIZE;
- Status = MM_AllocateMemory(pDevice, Size, (PLM_VOID *) &pPacket);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
- pDevice->pPacketDescBase = (PLM_VOID) pPacket;
+ /* Allocate memory for packet descriptors. */
+ Size = (pDevice->RxPacketDescCnt +
+ pDevice->TxPacketDescCnt) * MM_PACKET_DESC_SIZE;
+ Status = MM_AllocateMemory (pDevice, Size, (PLM_VOID *) & pPacket);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
+ pDevice->pPacketDescBase = (PLM_VOID) pPacket;
- /* Create transmit packet descriptors from the memory block and add them */
- /* to the TxPacketFreeQ for each send ring. */
- for(j = 0; j < pDevice->TxPacketDescCnt; j++)
- {
- /* Ring index. */
- pPacket->Flags = 0;
+ /* Create transmit packet descriptors from the memory block and add them */
+ /* to the TxPacketFreeQ for each send ring. */
+ for (j = 0; j < pDevice->TxPacketDescCnt; j++) {
+ /* Ring index. */
+ pPacket->Flags = 0;
- /* Queue the descriptor in the TxPacketFreeQ of the 'k' ring. */
- QQ_PushTail(&pDevice->TxPacketFreeQ.Container, pPacket);
+ /* Queue the descriptor in the TxPacketFreeQ of the 'k' ring. */
+ QQ_PushTail (&pDevice->TxPacketFreeQ.Container, pPacket);
- /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */
- /* is the total size of the packet descriptor including the */
- /* os-specific extensions in the UM_PACKET structure. */
- pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE);
- } /* for(j.. */
+ /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */
+ /* is the total size of the packet descriptor including the */
+ /* os-specific extensions in the UM_PACKET structure. */
+ pPacket =
+ (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE);
+ } /* for(j.. */
- /* Create receive packet descriptors from the memory block and add them */
- /* to the RxPacketFreeQ. Create the Standard packet descriptors. */
- for(j = 0; j < pDevice->RxStdDescCnt; j++)
- {
- /* Receive producer ring. */
- pPacket->u.Rx.RcvProdRing = T3_STD_RCV_PROD_RING;
+ /* Create receive packet descriptors from the memory block and add them */
+ /* to the RxPacketFreeQ. Create the Standard packet descriptors. */
+ for (j = 0; j < pDevice->RxStdDescCnt; j++) {
+ /* Receive producer ring. */
+ pPacket->u.Rx.RcvProdRing = T3_STD_RCV_PROD_RING;
- /* Receive buffer size. */
- pPacket->u.Rx.RxBufferSize = MAX_STD_RCV_BUFFER_SIZE;
+ /* Receive buffer size. */
+ pPacket->u.Rx.RxBufferSize = MAX_STD_RCV_BUFFER_SIZE;
- /* Add the descriptor to RxPacketFreeQ. */
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
+ /* Add the descriptor to RxPacketFreeQ. */
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
- /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */
- /* is the total size of the packet descriptor including the */
- /* os-specific extensions in the UM_PACKET structure. */
- pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE);
- } /* for */
+ /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */
+ /* is the total size of the packet descriptor including the */
+ /* os-specific extensions in the UM_PACKET structure. */
+ pPacket =
+ (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE);
+ } /* for */
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- /* Create the Jumbo packet descriptors. */
- for(j = 0; j < pDevice->RxJumboDescCnt; j++)
- {
- /* Receive producer ring. */
- pPacket->u.Rx.RcvProdRing = T3_JUMBO_RCV_PROD_RING;
+ /* Create the Jumbo packet descriptors. */
+ for (j = 0; j < pDevice->RxJumboDescCnt; j++) {
+ /* Receive producer ring. */
+ pPacket->u.Rx.RcvProdRing = T3_JUMBO_RCV_PROD_RING;
- /* Receive buffer size. */
- pPacket->u.Rx.RxBufferSize = pDevice->RxJumboBufferSize;
+ /* Receive buffer size. */
+ pPacket->u.Rx.RxBufferSize = pDevice->RxJumboBufferSize;
- /* Add the descriptor to RxPacketFreeQ. */
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
+ /* Add the descriptor to RxPacketFreeQ. */
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
- /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */
- /* is the total size of the packet descriptor including the */
- /* os-specific extensions in the UM_PACKET structure. */
- pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE);
- } /* for */
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */
+ /* is the total size of the packet descriptor including the */
+ /* os-specific extensions in the UM_PACKET structure. */
+ pPacket =
+ (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE);
+ } /* for */
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- /* Initialize the rest of the packet descriptors. */
- Status = MM_InitializeUmPackets(pDevice);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- } /* if */
+ /* Initialize the rest of the packet descriptors. */
+ Status = MM_InitializeUmPackets (pDevice);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
- /* Default receive mask. */
- pDevice->ReceiveMask = LM_ACCEPT_MULTICAST | LM_ACCEPT_BROADCAST |
- LM_ACCEPT_UNICAST;
+ /* if */
+ /* Default receive mask. */
+ pDevice->ReceiveMask = LM_ACCEPT_MULTICAST | LM_ACCEPT_BROADCAST |
+ LM_ACCEPT_UNICAST;
- /* Make sure we are in the first 32k memory window or NicSendBd. */
- REG_WR(pDevice, PciCfg.MemWindowBaseAddr, 0);
+ /* Make sure we are in the first 32k memory window or NicSendBd. */
+ REG_WR (pDevice, PciCfg.MemWindowBaseAddr, 0);
- /* Initialize the hardware. */
- Status = LM_ResetAdapter(pDevice);
- if(Status != LM_STATUS_SUCCESS)
- {
- return Status;
- }
+ /* Initialize the hardware. */
+ Status = LM_ResetAdapter (pDevice);
+ if (Status != LM_STATUS_SUCCESS) {
+ return Status;
+ }
- /* We are done with initialization. */
- pDevice->InitDone = TRUE;
+ /* We are done with initialization. */
+ pDevice->InitDone = TRUE;
- return LM_STATUS_SUCCESS;
-} /* LM_InitializeAdapter */
-
+ return LM_STATUS_SUCCESS;
+} /* LM_InitializeAdapter */
/******************************************************************************/
/* Description: */
@@ -1878,414 +1718,408 @@
/* LM_STATUS_SUCCESS */
/******************************************************************************/
LM_STATUS
-LM_CntrlBlock(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 mask,LM_UINT32 cntrl)
+LM_CntrlBlock (PLM_DEVICE_BLOCK pDevice, LM_UINT32 mask, LM_UINT32 cntrl)
{
- LM_UINT32 j,i,data;
- LM_UINT32 MaxWaitCnt;
+ LM_UINT32 j, i, data;
+ LM_UINT32 MaxWaitCnt;
- MaxWaitCnt = 2;
- j = 0;
+ MaxWaitCnt = 2;
+ j = 0;
- for(i = 0 ; i < 32; i++)
- {
- if(!(mask & (1 << i)))
- continue;
+ for (i = 0; i < 32; i++) {
+ if (!(mask & (1 << i)))
+ continue;
- switch (1 << i)
- {
- case T3_BLOCK_DMA_RD:
- data = REG_RD(pDevice, DmaRead.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~DMA_READ_MODE_ENABLE;
- REG_WR(pDevice, DmaRead.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, DmaRead.Mode) & DMA_READ_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, DmaRead.Mode, data | DMA_READ_MODE_ENABLE);
- break;
+ switch (1 << i) {
+ case T3_BLOCK_DMA_RD:
+ data = REG_RD (pDevice, DmaRead.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~DMA_READ_MODE_ENABLE;
+ REG_WR (pDevice, DmaRead.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, DmaRead.Mode) &
+ DMA_READ_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, DmaRead.Mode,
+ data | DMA_READ_MODE_ENABLE);
+ break;
- case T3_BLOCK_DMA_COMP:
- data = REG_RD(pDevice,DmaComp.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~DMA_COMP_MODE_ENABLE;
- REG_WR(pDevice, DmaComp.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, DmaComp.Mode) & DMA_COMP_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, DmaComp.Mode, data | DMA_COMP_MODE_ENABLE);
- break;
+ case T3_BLOCK_DMA_COMP:
+ data = REG_RD (pDevice, DmaComp.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~DMA_COMP_MODE_ENABLE;
+ REG_WR (pDevice, DmaComp.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, DmaComp.Mode) &
+ DMA_COMP_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, DmaComp.Mode,
+ data | DMA_COMP_MODE_ENABLE);
+ break;
- case T3_BLOCK_RX_BD_INITIATOR:
- data = REG_RD(pDevice, RcvBdIn.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~RCV_BD_IN_MODE_ENABLE;
- REG_WR(pDevice, RcvBdIn.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, RcvBdIn.Mode) & RCV_BD_IN_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, RcvBdIn.Mode,data | RCV_BD_IN_MODE_ENABLE);
- break;
+ case T3_BLOCK_RX_BD_INITIATOR:
+ data = REG_RD (pDevice, RcvBdIn.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~RCV_BD_IN_MODE_ENABLE;
+ REG_WR (pDevice, RcvBdIn.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, RcvBdIn.Mode) &
+ RCV_BD_IN_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, RcvBdIn.Mode,
+ data | RCV_BD_IN_MODE_ENABLE);
+ break;
- case T3_BLOCK_RX_BD_COMP:
- data = REG_RD(pDevice, RcvBdComp.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~RCV_BD_COMP_MODE_ENABLE;
- REG_WR(pDevice, RcvBdComp.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, RcvBdComp.Mode) & RCV_BD_COMP_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, RcvBdComp.Mode,data | RCV_BD_COMP_MODE_ENABLE);
- break;
+ case T3_BLOCK_RX_BD_COMP:
+ data = REG_RD (pDevice, RcvBdComp.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~RCV_BD_COMP_MODE_ENABLE;
+ REG_WR (pDevice, RcvBdComp.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, RcvBdComp.Mode) &
+ RCV_BD_COMP_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, RcvBdComp.Mode,
+ data | RCV_BD_COMP_MODE_ENABLE);
+ break;
- case T3_BLOCK_DMA_WR:
- data = REG_RD(pDevice, DmaWrite.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~DMA_WRITE_MODE_ENABLE;
- REG_WR(pDevice, DmaWrite.Mode,data);
+ case T3_BLOCK_DMA_WR:
+ data = REG_RD (pDevice, DmaWrite.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~DMA_WRITE_MODE_ENABLE;
+ REG_WR (pDevice, DmaWrite.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, DmaWrite.Mode) & DMA_WRITE_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, DmaWrite.Mode,data | DMA_WRITE_MODE_ENABLE);
- break;
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, DmaWrite.Mode) &
+ DMA_WRITE_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, DmaWrite.Mode,
+ data | DMA_WRITE_MODE_ENABLE);
+ break;
- case T3_BLOCK_MSI_HANDLER:
- data = REG_RD(pDevice, Msi.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~MSI_MODE_ENABLE;
- REG_WR(pDevice, Msi.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, Msi.Mode) & MSI_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, Msi.Mode, data |MSI_MODE_ENABLE);
- break;
+ case T3_BLOCK_MSI_HANDLER:
+ data = REG_RD (pDevice, Msi.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~MSI_MODE_ENABLE;
+ REG_WR (pDevice, Msi.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, Msi.Mode) &
+ MSI_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, Msi.Mode,
+ data | MSI_MODE_ENABLE);
+ break;
- case T3_BLOCK_RX_LIST_PLMT:
- data = REG_RD(pDevice, RcvListPlmt.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~RCV_LIST_PLMT_MODE_ENABLE;
- REG_WR(pDevice, RcvListPlmt.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, RcvListPlmt.Mode) & RCV_LIST_PLMT_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, RcvListPlmt.Mode,data | RCV_LIST_PLMT_MODE_ENABLE);
- break;
+ case T3_BLOCK_RX_LIST_PLMT:
+ data = REG_RD (pDevice, RcvListPlmt.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~RCV_LIST_PLMT_MODE_ENABLE;
+ REG_WR (pDevice, RcvListPlmt.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, RcvListPlmt.Mode)
+ & RCV_LIST_PLMT_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, RcvListPlmt.Mode,
+ data | RCV_LIST_PLMT_MODE_ENABLE);
+ break;
- case T3_BLOCK_RX_LIST_SELECTOR:
- data = REG_RD(pDevice, RcvListSel.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~RCV_LIST_SEL_MODE_ENABLE;
- REG_WR(pDevice, RcvListSel.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, RcvListSel.Mode) & RCV_LIST_SEL_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, RcvListSel.Mode,data |RCV_LIST_SEL_MODE_ENABLE);
- break;
+ case T3_BLOCK_RX_LIST_SELECTOR:
+ data = REG_RD (pDevice, RcvListSel.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~RCV_LIST_SEL_MODE_ENABLE;
+ REG_WR (pDevice, RcvListSel.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, RcvListSel.Mode) &
+ RCV_LIST_SEL_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, RcvListSel.Mode,
+ data | RCV_LIST_SEL_MODE_ENABLE);
+ break;
- case T3_BLOCK_RX_DATA_INITIATOR:
- data = REG_RD(pDevice, RcvDataBdIn.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~RCV_DATA_BD_IN_MODE_ENABLE;
- REG_WR(pDevice, RcvDataBdIn.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, RcvDataBdIn.Mode) & RCV_DATA_BD_IN_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, RcvDataBdIn.Mode, data | RCV_DATA_BD_IN_MODE_ENABLE);
- break;
+ case T3_BLOCK_RX_DATA_INITIATOR:
+ data = REG_RD (pDevice, RcvDataBdIn.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~RCV_DATA_BD_IN_MODE_ENABLE;
+ REG_WR (pDevice, RcvDataBdIn.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, RcvDataBdIn.Mode)
+ & RCV_DATA_BD_IN_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, RcvDataBdIn.Mode,
+ data | RCV_DATA_BD_IN_MODE_ENABLE);
+ break;
- case T3_BLOCK_RX_DATA_COMP:
- data = REG_RD(pDevice, RcvDataComp.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~RCV_DATA_COMP_MODE_ENABLE;
- REG_WR(pDevice, RcvDataComp.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, RcvDataBdIn.Mode) & RCV_DATA_COMP_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, RcvDataComp.Mode,data | RCV_DATA_COMP_MODE_ENABLE);
- break;
+ case T3_BLOCK_RX_DATA_COMP:
+ data = REG_RD (pDevice, RcvDataComp.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~RCV_DATA_COMP_MODE_ENABLE;
+ REG_WR (pDevice, RcvDataComp.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, RcvDataBdIn.Mode)
+ & RCV_DATA_COMP_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, RcvDataComp.Mode,
+ data | RCV_DATA_COMP_MODE_ENABLE);
+ break;
- case T3_BLOCK_HOST_COALESING:
- data = REG_RD(pDevice, HostCoalesce.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~HOST_COALESCE_ENABLE;
- REG_WR(pDevice, HostCoalesce.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, SndBdIn.Mode) & HOST_COALESCE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, HostCoalesce.Mode, data | HOST_COALESCE_ENABLE);
- break;
+ case T3_BLOCK_HOST_COALESING:
+ data = REG_RD (pDevice, HostCoalesce.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~HOST_COALESCE_ENABLE;
+ REG_WR (pDevice, HostCoalesce.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, SndBdIn.Mode) &
+ HOST_COALESCE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, HostCoalesce.Mode,
+ data | HOST_COALESCE_ENABLE);
+ break;
- case T3_BLOCK_MAC_RX_ENGINE:
- if(cntrl == LM_DISABLE)
- {
- pDevice->RxMode &= ~RX_MODE_ENABLE;
- REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, MacCtrl.RxMode) & RX_MODE_ENABLE))
- {
- break;
+ case T3_BLOCK_MAC_RX_ENGINE:
+ if (cntrl == LM_DISABLE) {
+ pDevice->RxMode &= ~RX_MODE_ENABLE;
+ REG_WR (pDevice, MacCtrl.RxMode,
+ pDevice->RxMode);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, MacCtrl.RxMode) &
+ RX_MODE_ENABLE)) {
+ break;
+ }
+ MM_Wait (10);
+ }
+ } else {
+ pDevice->RxMode |= RX_MODE_ENABLE;
+ REG_WR (pDevice, MacCtrl.RxMode,
+ pDevice->RxMode);
}
- MM_Wait(10);
- }
- }
- else
- {
- pDevice->RxMode |= RX_MODE_ENABLE;
- REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode);
- }
- break;
+ break;
- case T3_BLOCK_MBUF_CLUSTER_FREE:
- data = REG_RD(pDevice, MbufClusterFree.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~MBUF_CLUSTER_FREE_MODE_ENABLE;
- REG_WR(pDevice, MbufClusterFree.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, MbufClusterFree.Mode) & MBUF_CLUSTER_FREE_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, MbufClusterFree.Mode, data | MBUF_CLUSTER_FREE_MODE_ENABLE);
- break;
+ case T3_BLOCK_MBUF_CLUSTER_FREE:
+ data = REG_RD (pDevice, MbufClusterFree.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~MBUF_CLUSTER_FREE_MODE_ENABLE;
+ REG_WR (pDevice, MbufClusterFree.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD
+ (pDevice,
+ MbufClusterFree.
+ Mode) &
+ MBUF_CLUSTER_FREE_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, MbufClusterFree.Mode,
+ data | MBUF_CLUSTER_FREE_MODE_ENABLE);
+ break;
- case T3_BLOCK_SEND_BD_INITIATOR:
- data = REG_RD(pDevice, SndBdIn.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~SND_BD_IN_MODE_ENABLE;
- REG_WR(pDevice, SndBdIn.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, SndBdIn.Mode) & SND_BD_IN_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, SndBdIn.Mode, data | SND_BD_IN_MODE_ENABLE);
- break;
+ case T3_BLOCK_SEND_BD_INITIATOR:
+ data = REG_RD (pDevice, SndBdIn.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~SND_BD_IN_MODE_ENABLE;
+ REG_WR (pDevice, SndBdIn.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, SndBdIn.Mode) &
+ SND_BD_IN_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, SndBdIn.Mode,
+ data | SND_BD_IN_MODE_ENABLE);
+ break;
- case T3_BLOCK_SEND_BD_COMP:
- data = REG_RD(pDevice, SndBdComp.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~SND_BD_COMP_MODE_ENABLE;
- REG_WR(pDevice, SndBdComp.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, SndBdComp.Mode) & SND_BD_COMP_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, SndBdComp.Mode, data | SND_BD_COMP_MODE_ENABLE);
- break;
+ case T3_BLOCK_SEND_BD_COMP:
+ data = REG_RD (pDevice, SndBdComp.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~SND_BD_COMP_MODE_ENABLE;
+ REG_WR (pDevice, SndBdComp.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, SndBdComp.Mode) &
+ SND_BD_COMP_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, SndBdComp.Mode,
+ data | SND_BD_COMP_MODE_ENABLE);
+ break;
- case T3_BLOCK_SEND_BD_SELECTOR:
- data = REG_RD(pDevice, SndBdSel.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~SND_BD_SEL_MODE_ENABLE;
- REG_WR(pDevice, SndBdSel.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, SndBdSel.Mode) & SND_BD_SEL_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, SndBdSel.Mode, data | SND_BD_SEL_MODE_ENABLE);
- break;
+ case T3_BLOCK_SEND_BD_SELECTOR:
+ data = REG_RD (pDevice, SndBdSel.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~SND_BD_SEL_MODE_ENABLE;
+ REG_WR (pDevice, SndBdSel.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, SndBdSel.Mode) &
+ SND_BD_SEL_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, SndBdSel.Mode,
+ data | SND_BD_SEL_MODE_ENABLE);
+ break;
- case T3_BLOCK_SEND_DATA_INITIATOR:
- data = REG_RD(pDevice, SndDataIn.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~T3_SND_DATA_IN_MODE_ENABLE;
- REG_WR(pDevice, SndDataIn.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, SndDataIn.Mode) & T3_SND_DATA_IN_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, SndDataIn.Mode,data | T3_SND_DATA_IN_MODE_ENABLE);
- break;
+ case T3_BLOCK_SEND_DATA_INITIATOR:
+ data = REG_RD (pDevice, SndDataIn.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~T3_SND_DATA_IN_MODE_ENABLE;
+ REG_WR (pDevice, SndDataIn.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, SndDataIn.Mode) &
+ T3_SND_DATA_IN_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, SndDataIn.Mode,
+ data | T3_SND_DATA_IN_MODE_ENABLE);
+ break;
- case T3_BLOCK_SEND_DATA_COMP:
- data = REG_RD(pDevice, SndDataComp.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~SND_DATA_COMP_MODE_ENABLE;
- REG_WR(pDevice, SndDataComp.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, SndDataComp.Mode) & SND_DATA_COMP_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, SndDataComp.Mode,data | SND_DATA_COMP_MODE_ENABLE);
- break;
+ case T3_BLOCK_SEND_DATA_COMP:
+ data = REG_RD (pDevice, SndDataComp.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~SND_DATA_COMP_MODE_ENABLE;
+ REG_WR (pDevice, SndDataComp.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, SndDataComp.Mode)
+ & SND_DATA_COMP_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, SndDataComp.Mode,
+ data | SND_DATA_COMP_MODE_ENABLE);
+ break;
- case T3_BLOCK_MAC_TX_ENGINE:
- if(cntrl == LM_DISABLE)
- {
- pDevice->TxMode &= ~TX_MODE_ENABLE;
- REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, MacCtrl.TxMode) & TX_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- {
- pDevice->TxMode |= TX_MODE_ENABLE;
- REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode);
- }
- break;
+ case T3_BLOCK_MAC_TX_ENGINE:
+ if (cntrl == LM_DISABLE) {
+ pDevice->TxMode &= ~TX_MODE_ENABLE;
+ REG_WR (pDevice, MacCtrl.TxMode,
+ pDevice->TxMode);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, MacCtrl.TxMode) &
+ TX_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else {
+ pDevice->TxMode |= TX_MODE_ENABLE;
+ REG_WR (pDevice, MacCtrl.TxMode,
+ pDevice->TxMode);
+ }
+ break;
- case T3_BLOCK_MEM_ARBITOR:
- data = REG_RD(pDevice, MemArbiter.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~T3_MEM_ARBITER_MODE_ENABLE;
- REG_WR(pDevice, MemArbiter.Mode, data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, MemArbiter.Mode) & T3_MEM_ARBITER_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, MemArbiter.Mode,data|T3_MEM_ARBITER_MODE_ENABLE);
- break;
+ case T3_BLOCK_MEM_ARBITOR:
+ data = REG_RD (pDevice, MemArbiter.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~T3_MEM_ARBITER_MODE_ENABLE;
+ REG_WR (pDevice, MemArbiter.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, MemArbiter.Mode) &
+ T3_MEM_ARBITER_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, MemArbiter.Mode,
+ data | T3_MEM_ARBITER_MODE_ENABLE);
+ break;
- case T3_BLOCK_MBUF_MANAGER:
- data = REG_RD(pDevice, BufMgr.Mode);
- if (cntrl == LM_DISABLE)
- {
- data &= ~BUFMGR_MODE_ENABLE;
- REG_WR(pDevice, BufMgr.Mode,data);
- for(j = 0; j < MaxWaitCnt; j++)
- {
- if(!(REG_RD(pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE))
- break;
- MM_Wait(10);
- }
- }
- else
- REG_WR(pDevice, BufMgr.Mode,data | BUFMGR_MODE_ENABLE);
- break;
+ case T3_BLOCK_MBUF_MANAGER:
+ data = REG_RD (pDevice, BufMgr.Mode);
+ if (cntrl == LM_DISABLE) {
+ data &= ~BUFMGR_MODE_ENABLE;
+ REG_WR (pDevice, BufMgr.Mode, data);
+ for (j = 0; j < MaxWaitCnt; j++) {
+ if (!
+ (REG_RD (pDevice, BufMgr.Mode) &
+ BUFMGR_MODE_ENABLE))
+ break;
+ MM_Wait (10);
+ }
+ } else
+ REG_WR (pDevice, BufMgr.Mode,
+ data | BUFMGR_MODE_ENABLE);
+ break;
- case T3_BLOCK_MAC_GLOBAL:
- if(cntrl == LM_DISABLE)
- {
- pDevice->MacMode &= ~(MAC_MODE_ENABLE_TDE |
- MAC_MODE_ENABLE_RDE |
- MAC_MODE_ENABLE_FHDE);
- }
- else
- {
- pDevice->MacMode |= (MAC_MODE_ENABLE_TDE |
- MAC_MODE_ENABLE_RDE |
- MAC_MODE_ENABLE_FHDE);
- }
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode);
- break;
+ case T3_BLOCK_MAC_GLOBAL:
+ if (cntrl == LM_DISABLE) {
+ pDevice->MacMode &= ~(MAC_MODE_ENABLE_TDE |
+ MAC_MODE_ENABLE_RDE |
+ MAC_MODE_ENABLE_FHDE);
+ } else {
+ pDevice->MacMode |= (MAC_MODE_ENABLE_TDE |
+ MAC_MODE_ENABLE_RDE |
+ MAC_MODE_ENABLE_FHDE);
+ }
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode);
+ break;
- default:
- return LM_STATUS_FAILURE;
- } /* switch */
+ default:
+ return LM_STATUS_FAILURE;
+ } /* switch */
- if(j >= MaxWaitCnt)
- {
- return LM_STATUS_FAILURE;
+ if (j >= MaxWaitCnt) {
+ return LM_STATUS_FAILURE;
+ }
}
- }
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
/******************************************************************************/
@@ -2295,682 +2129,631 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_ResetAdapter(
-PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_ResetAdapter (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 Value32;
- LM_UINT16 Value16;
- LM_UINT32 j, k;
+ LM_UINT32 Value32;
+ LM_UINT16 Value16;
+ LM_UINT32 j, k;
- /* Disable interrupt. */
- LM_DisableInterrupt(pDevice);
+ /* Disable interrupt. */
+ LM_DisableInterrupt (pDevice);
- /* May get a spurious interrupt */
- pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED;
+ /* May get a spurious interrupt */
+ pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED;
- /* Disable transmit and receive DMA engines. Abort all pending requests. */
- if(pDevice->InitDone)
- {
- LM_Abort(pDevice);
- }
-
- pDevice->ShuttingDown = FALSE;
-
- LM_ResetChip(pDevice);
-
- /* Bug: Athlon fix for B3 silicon only. This bit does not do anything */
- /* in other chip revisions. */
- if(pDevice->DelayPciGrant)
- {
- Value32 = REG_RD(pDevice, PciCfg.ClockCtrl);
- REG_WR(pDevice, PciCfg.ClockCtrl, Value32 | BIT_31);
- }
-
- if(pDevice->ChipRevId == T3_CHIP_ID_5704_A0)
- {
- if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))
- {
- Value32 = REG_RD(pDevice, PciCfg.PciState);
- Value32 |= T3_PCI_STATE_RETRY_SAME_DMA;
- REG_WR(pDevice, PciCfg.PciState, Value32);
+ /* Disable transmit and receive DMA engines. Abort all pending requests. */
+ if (pDevice->InitDone) {
+ LM_Abort (pDevice);
}
- }
- /* Enable TaggedStatus mode. */
- if(pDevice->UseTaggedStatus)
- {
- pDevice->MiscHostCtrl |= MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE;
- }
+ pDevice->ShuttingDown = FALSE;
- /* Restore PCI configuration registers. */
- MM_WriteConfig32(pDevice, PCI_CACHE_LINE_SIZE_REG,
- pDevice->SavedCacheLineReg);
- MM_WriteConfig32(pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG,
- (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId);
+ LM_ResetChip (pDevice);
- /* Clear the statistics block. */
- for(j = 0x0300; j < 0x0b00; j++)
- {
- MEM_WR_OFFSET(pDevice, j, 0);
- }
+ /* Bug: Athlon fix for B3 silicon only. This bit does not do anything */
+ /* in other chip revisions. */
+ if (pDevice->DelayPciGrant) {
+ Value32 = REG_RD (pDevice, PciCfg.ClockCtrl);
+ REG_WR (pDevice, PciCfg.ClockCtrl, Value32 | BIT_31);
+ }
- /* Initialize the statistis Block */
- pDevice->pStatusBlkVirt->Status = 0;
- pDevice->pStatusBlkVirt->RcvStdConIdx = 0;
- pDevice->pStatusBlkVirt->RcvJumboConIdx = 0;
- pDevice->pStatusBlkVirt->RcvMiniConIdx = 0;
+ if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) {
+ if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) {
+ Value32 = REG_RD (pDevice, PciCfg.PciState);
+ Value32 |= T3_PCI_STATE_RETRY_SAME_DMA;
+ REG_WR (pDevice, PciCfg.PciState, Value32);
+ }
+ }
- for(j = 0; j < 16; j++)
- {
- pDevice->pStatusBlkVirt->Idx[j].RcvProdIdx = 0;
- pDevice->pStatusBlkVirt->Idx[j].SendConIdx = 0;
- }
+ /* Enable TaggedStatus mode. */
+ if (pDevice->UseTaggedStatus) {
+ pDevice->MiscHostCtrl |=
+ MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE;
+ }
- for(k = 0; k < T3_STD_RCV_RCB_ENTRY_COUNT ;k++)
- {
- pDevice->pRxStdBdVirt[k].HostAddr.High = 0;
- pDevice->pRxStdBdVirt[k].HostAddr.Low = 0;
- }
+ /* Restore PCI configuration registers. */
+ MM_WriteConfig32 (pDevice, PCI_CACHE_LINE_SIZE_REG,
+ pDevice->SavedCacheLineReg);
+ MM_WriteConfig32 (pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG,
+ (pDevice->SubsystemId << 16) | pDevice->
+ SubsystemVendorId);
+
+ /* Clear the statistics block. */
+ for (j = 0x0300; j < 0x0b00; j++) {
+ MEM_WR_OFFSET (pDevice, j, 0);
+ }
+
+ /* Initialize the statistis Block */
+ pDevice->pStatusBlkVirt->Status = 0;
+ pDevice->pStatusBlkVirt->RcvStdConIdx = 0;
+ pDevice->pStatusBlkVirt->RcvJumboConIdx = 0;
+ pDevice->pStatusBlkVirt->RcvMiniConIdx = 0;
+
+ for (j = 0; j < 16; j++) {
+ pDevice->pStatusBlkVirt->Idx[j].RcvProdIdx = 0;
+ pDevice->pStatusBlkVirt->Idx[j].SendConIdx = 0;
+ }
+
+ for (k = 0; k < T3_STD_RCV_RCB_ENTRY_COUNT; k++) {
+ pDevice->pRxStdBdVirt[k].HostAddr.High = 0;
+ pDevice->pRxStdBdVirt[k].HostAddr.Low = 0;
+ }
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- /* Receive jumbo BD buffer. */
- for(k = 0; k < T3_JUMBO_RCV_RCB_ENTRY_COUNT; k++)
- {
- pDevice->pRxJumboBdVirt[k].HostAddr.High = 0;
- pDevice->pRxJumboBdVirt[k].HostAddr.Low = 0;
- }
+ /* Receive jumbo BD buffer. */
+ for (k = 0; k < T3_JUMBO_RCV_RCB_ENTRY_COUNT; k++) {
+ pDevice->pRxJumboBdVirt[k].HostAddr.High = 0;
+ pDevice->pRxJumboBdVirt[k].HostAddr.Low = 0;
+ }
#endif
- REG_WR(pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl);
+ REG_WR (pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl);
- /* GRC mode control register. */
-#ifdef BIG_ENDIAN_PCI /* Jimmy, this ifdef block deleted in new code! */
- Value32 =
- GRC_MODE_WORD_SWAP_DATA |
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
- GRC_MODE_INT_ON_MAC_ATTN |
- GRC_MODE_HOST_STACK_UP;
+ /* GRC mode control register. */
+#ifdef BIG_ENDIAN_PCI /* Jimmy, this ifdef block deleted in new code! */
+ Value32 =
+ GRC_MODE_WORD_SWAP_DATA |
+ GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
+ GRC_MODE_INT_ON_MAC_ATTN | GRC_MODE_HOST_STACK_UP;
#else
- /* No CPU Swap modes for PCI IO */
- Value32 =
+ /* No CPU Swap modes for PCI IO */
+ Value32 =
#ifdef BIG_ENDIAN_HOST
- GRC_MODE_BYTE_SWAP_NON_FRAME_DATA |
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
- GRC_MODE_BYTE_SWAP_DATA |
- GRC_MODE_WORD_SWAP_DATA |
+ GRC_MODE_BYTE_SWAP_NON_FRAME_DATA |
+ GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
+ GRC_MODE_BYTE_SWAP_DATA | GRC_MODE_WORD_SWAP_DATA |
#else
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
- GRC_MODE_BYTE_SWAP_DATA |
- GRC_MODE_WORD_SWAP_DATA |
+ GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
+ GRC_MODE_BYTE_SWAP_DATA | GRC_MODE_WORD_SWAP_DATA |
#endif
- GRC_MODE_INT_ON_MAC_ATTN |
- GRC_MODE_HOST_STACK_UP;
-#endif /* !BIG_ENDIAN_PCI */
+ GRC_MODE_INT_ON_MAC_ATTN | GRC_MODE_HOST_STACK_UP;
+#endif /* !BIG_ENDIAN_PCI */
- /* Configure send BD mode. */
- if(pDevice->NicSendBd == FALSE)
- {
- Value32 |= GRC_MODE_HOST_SEND_BDS;
- }
- else
- {
- Value32 |= GRC_MODE_4X_NIC_BASED_SEND_RINGS;
- }
-
- /* Configure pseudo checksum mode. */
- if(pDevice->NoTxPseudoHdrChksum)
- {
- Value32 |= GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM;
- }
-
- if(pDevice->NoRxPseudoHdrChksum)
- {
- Value32 |= GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM;
- }
-
- REG_WR(pDevice, Grc.Mode, Value32);
-
- /* Setup the timer prescalar register. */
- REG_WR(pDevice, Grc.MiscCfg, 65 << 1); /* Clock is alwasy 66Mhz. */
-
- /* Set up the MBUF pool base address and size. */
- REG_WR(pDevice, BufMgr.MbufPoolAddr, pDevice->MbufBase);
- REG_WR(pDevice, BufMgr.MbufPoolSize, pDevice->MbufSize);
-
- /* Set up the DMA descriptor pool base address and size. */
- REG_WR(pDevice, BufMgr.DmaDescPoolAddr, T3_NIC_DMA_DESC_POOL_ADDR);
- REG_WR(pDevice, BufMgr.DmaDescPoolSize, T3_NIC_DMA_DESC_POOL_SIZE);
-
- /* Configure MBUF and Threshold watermarks */
- /* Configure the DMA read MBUF low water mark. */
- if(pDevice->DmaMbufLowMark)
- {
- REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark,
- pDevice->DmaMbufLowMark);
- }
- else
- {
- if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE)
- {
- REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark,
- T3_DEF_DMA_MBUF_LOW_WMARK);
+ /* Configure send BD mode. */
+ if (pDevice->NicSendBd == FALSE) {
+ Value32 |= GRC_MODE_HOST_SEND_BDS;
+ } else {
+ Value32 |= GRC_MODE_4X_NIC_BASED_SEND_RINGS;
}
- else
- {
- REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark,
- T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO);
+
+ /* Configure pseudo checksum mode. */
+ if (pDevice->NoTxPseudoHdrChksum) {
+ Value32 |= GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM;
}
- }
- /* Configure the MAC Rx MBUF low water mark. */
- if(pDevice->RxMacMbufLowMark)
- {
- REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark,
- pDevice->RxMacMbufLowMark);
- }
- else
- {
- if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE)
- {
- REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark,
- T3_DEF_RX_MAC_MBUF_LOW_WMARK);
+ if (pDevice->NoRxPseudoHdrChksum) {
+ Value32 |= GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM;
}
- else
- {
- REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark,
- T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO);
+
+ REG_WR (pDevice, Grc.Mode, Value32);
+
+ /* Setup the timer prescalar register. */
+ REG_WR (pDevice, Grc.MiscCfg, 65 << 1); /* Clock is alwasy 66Mhz. */
+
+ /* Set up the MBUF pool base address and size. */
+ REG_WR (pDevice, BufMgr.MbufPoolAddr, pDevice->MbufBase);
+ REG_WR (pDevice, BufMgr.MbufPoolSize, pDevice->MbufSize);
+
+ /* Set up the DMA descriptor pool base address and size. */
+ REG_WR (pDevice, BufMgr.DmaDescPoolAddr, T3_NIC_DMA_DESC_POOL_ADDR);
+ REG_WR (pDevice, BufMgr.DmaDescPoolSize, T3_NIC_DMA_DESC_POOL_SIZE);
+
+ /* Configure MBUF and Threshold watermarks */
+ /* Configure the DMA read MBUF low water mark. */
+ if (pDevice->DmaMbufLowMark) {
+ REG_WR (pDevice, BufMgr.MbufReadDmaLowWaterMark,
+ pDevice->DmaMbufLowMark);
+ } else {
+ if (pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) {
+ REG_WR (pDevice, BufMgr.MbufReadDmaLowWaterMark,
+ T3_DEF_DMA_MBUF_LOW_WMARK);
+ } else {
+ REG_WR (pDevice, BufMgr.MbufReadDmaLowWaterMark,
+ T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO);
+ }
}
- }
- /* Configure the MBUF high water mark. */
- if(pDevice->MbufHighMark)
- {
- REG_WR(pDevice, BufMgr.MbufHighWaterMark, pDevice->MbufHighMark);
- }
- else
- {
- if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE)
- {
- REG_WR(pDevice, BufMgr.MbufHighWaterMark,
- T3_DEF_MBUF_HIGH_WMARK);
+ /* Configure the MAC Rx MBUF low water mark. */
+ if (pDevice->RxMacMbufLowMark) {
+ REG_WR (pDevice, BufMgr.MbufMacRxLowWaterMark,
+ pDevice->RxMacMbufLowMark);
+ } else {
+ if (pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) {
+ REG_WR (pDevice, BufMgr.MbufMacRxLowWaterMark,
+ T3_DEF_RX_MAC_MBUF_LOW_WMARK);
+ } else {
+ REG_WR (pDevice, BufMgr.MbufMacRxLowWaterMark,
+ T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO);
+ }
}
- else
- {
- REG_WR(pDevice, BufMgr.MbufHighWaterMark,
- T3_DEF_MBUF_HIGH_WMARK_JUMBO);
+
+ /* Configure the MBUF high water mark. */
+ if (pDevice->MbufHighMark) {
+ REG_WR (pDevice, BufMgr.MbufHighWaterMark,
+ pDevice->MbufHighMark);
+ } else {
+ if (pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) {
+ REG_WR (pDevice, BufMgr.MbufHighWaterMark,
+ T3_DEF_MBUF_HIGH_WMARK);
+ } else {
+ REG_WR (pDevice, BufMgr.MbufHighWaterMark,
+ T3_DEF_MBUF_HIGH_WMARK_JUMBO);
+ }
}
- }
- REG_WR(pDevice, BufMgr.DmaLowWaterMark, T3_DEF_DMA_DESC_LOW_WMARK);
- REG_WR(pDevice, BufMgr.DmaHighWaterMark, T3_DEF_DMA_DESC_HIGH_WMARK);
+ REG_WR (pDevice, BufMgr.DmaLowWaterMark, T3_DEF_DMA_DESC_LOW_WMARK);
+ REG_WR (pDevice, BufMgr.DmaHighWaterMark, T3_DEF_DMA_DESC_HIGH_WMARK);
- /* Enable buffer manager. */
- REG_WR(pDevice, BufMgr.Mode, BUFMGR_MODE_ENABLE | BUFMGR_MODE_ATTN_ENABLE);
+ /* Enable buffer manager. */
+ REG_WR (pDevice, BufMgr.Mode,
+ BUFMGR_MODE_ENABLE | BUFMGR_MODE_ATTN_ENABLE);
- for(j = 0 ;j < 2000; j++)
- {
- if(REG_RD(pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE)
- break;
- MM_Wait(10);
- }
+ for (j = 0; j < 2000; j++) {
+ if (REG_RD (pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE)
+ break;
+ MM_Wait (10);
+ }
- if(j >= 2000)
- {
- return LM_STATUS_FAILURE;
- }
+ if (j >= 2000) {
+ return LM_STATUS_FAILURE;
+ }
- /* Enable the FTQs. */
- REG_WR(pDevice, Ftq.Reset, 0xffffffff);
- REG_WR(pDevice, Ftq.Reset, 0);
+ /* Enable the FTQs. */
+ REG_WR (pDevice, Ftq.Reset, 0xffffffff);
+ REG_WR (pDevice, Ftq.Reset, 0);
- /* Wait until FTQ is ready */
- for(j = 0; j < 2000; j++)
- {
- if(REG_RD(pDevice, Ftq.Reset) == 0)
- break;
- MM_Wait(10);
- }
+ /* Wait until FTQ is ready */
+ for (j = 0; j < 2000; j++) {
+ if (REG_RD (pDevice, Ftq.Reset) == 0)
+ break;
+ MM_Wait (10);
+ }
- if(j >= 2000)
- {
- return LM_STATUS_FAILURE;
- }
+ if (j >= 2000) {
+ return LM_STATUS_FAILURE;
+ }
- /* Initialize the Standard Receive RCB. */
- REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.High,
- pDevice->RxStdBdPhy.High);
- REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.Low,
- pDevice->RxStdBdPhy.Low);
- REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.u.MaxLen_Flags,
- MAX_STD_RCV_BUFFER_SIZE << 16);
+ /* Initialize the Standard Receive RCB. */
+ REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.High,
+ pDevice->RxStdBdPhy.High);
+ REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.Low,
+ pDevice->RxStdBdPhy.Low);
+ REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.u.MaxLen_Flags,
+ MAX_STD_RCV_BUFFER_SIZE << 16);
- /* Initialize the Jumbo Receive RCB. */
- REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags,
- T3_RCB_FLAG_RING_DISABLED);
+ /* Initialize the Jumbo Receive RCB. */
+ REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags,
+ T3_RCB_FLAG_RING_DISABLED);
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.High,
- pDevice->RxJumboBdPhy.High);
- REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.Low,
- pDevice->RxJumboBdPhy.Low);
+ REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.High,
+ pDevice->RxJumboBdPhy.High);
+ REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.Low,
+ pDevice->RxJumboBdPhy.Low);
- REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags, 0);
+ REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags, 0);
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- /* Initialize the Mini Receive RCB. */
- REG_WR(pDevice, RcvDataBdIn.MiniRcvRcb.u.MaxLen_Flags,
- T3_RCB_FLAG_RING_DISABLED);
+ /* Initialize the Mini Receive RCB. */
+ REG_WR (pDevice, RcvDataBdIn.MiniRcvRcb.u.MaxLen_Flags,
+ T3_RCB_FLAG_RING_DISABLED);
- {
- REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.NicRingAddr,
- (LM_UINT32) T3_NIC_STD_RCV_BUFFER_DESC_ADDR);
- REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.NicRingAddr,
- (LM_UINT32) T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR);
- }
+ {
+ REG_WR (pDevice, RcvDataBdIn.StdRcvRcb.NicRingAddr,
+ (LM_UINT32) T3_NIC_STD_RCV_BUFFER_DESC_ADDR);
+ REG_WR (pDevice, RcvDataBdIn.JumboRcvRcb.NicRingAddr,
+ (LM_UINT32) T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR);
+ }
- /* Receive BD Ring replenish threshold. */
- REG_WR(pDevice, RcvBdIn.StdRcvThreshold, pDevice->RxStdDescCnt/8);
+ /* Receive BD Ring replenish threshold. */
+ REG_WR (pDevice, RcvBdIn.StdRcvThreshold, pDevice->RxStdDescCnt / 8);
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- REG_WR(pDevice, RcvBdIn.JumboRcvThreshold, pDevice->RxJumboDescCnt/8);
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ REG_WR (pDevice, RcvBdIn.JumboRcvThreshold,
+ pDevice->RxJumboDescCnt / 8);
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- /* Disable all the unused rings. */
- for(j = 0; j < T3_MAX_SEND_RCB_COUNT; j++) {
- MEM_WR(pDevice, SendRcb[j].u.MaxLen_Flags, T3_RCB_FLAG_RING_DISABLED);
- } /* for */
+ /* Disable all the unused rings. */
+ for (j = 0; j < T3_MAX_SEND_RCB_COUNT; j++) {
+ MEM_WR (pDevice, SendRcb[j].u.MaxLen_Flags,
+ T3_RCB_FLAG_RING_DISABLED);
+ } /* for */
- /* Initialize the indices. */
- pDevice->SendProdIdx = 0;
- pDevice->SendConIdx = 0;
+ /* Initialize the indices. */
+ pDevice->SendProdIdx = 0;
+ pDevice->SendConIdx = 0;
- MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, 0);
- MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, 0);
+ MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, 0);
+ MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, 0);
- /* Set up host or NIC based send RCB. */
- if(pDevice->NicSendBd == FALSE)
- {
- MEM_WR(pDevice, SendRcb[0].HostRingAddr.High,
- pDevice->SendBdPhy.High);
- MEM_WR(pDevice, SendRcb[0].HostRingAddr.Low,
- pDevice->SendBdPhy.Low);
+ /* Set up host or NIC based send RCB. */
+ if (pDevice->NicSendBd == FALSE) {
+ MEM_WR (pDevice, SendRcb[0].HostRingAddr.High,
+ pDevice->SendBdPhy.High);
+ MEM_WR (pDevice, SendRcb[0].HostRingAddr.Low,
+ pDevice->SendBdPhy.Low);
+
+ /* Set up the NIC ring address in the RCB. */
+ MEM_WR (pDevice, SendRcb[0].NicRingAddr,
+ T3_NIC_SND_BUFFER_DESC_ADDR);
+
+ /* Setup the RCB. */
+ MEM_WR (pDevice, SendRcb[0].u.MaxLen_Flags,
+ T3_SEND_RCB_ENTRY_COUNT << 16);
+
+ for (k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) {
+ pDevice->pSendBdVirt[k].HostAddr.High = 0;
+ pDevice->pSendBdVirt[k].HostAddr.Low = 0;
+ }
+ } else {
+ MEM_WR (pDevice, SendRcb[0].HostRingAddr.High, 0);
+ MEM_WR (pDevice, SendRcb[0].HostRingAddr.Low, 0);
+ MEM_WR (pDevice, SendRcb[0].NicRingAddr,
+ pDevice->SendBdPhy.Low);
+
+ for (k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) {
+ __raw_writel (0,
+ &(pDevice->pSendBdVirt[k].HostAddr.High));
+ __raw_writel (0,
+ &(pDevice->pSendBdVirt[k].HostAddr.Low));
+ __raw_writel (0,
+ &(pDevice->pSendBdVirt[k].u1.Len_Flags));
+ pDevice->ShadowSendBd[k].HostAddr.High = 0;
+ pDevice->ShadowSendBd[k].u1.Len_Flags = 0;
+ }
+ }
+ atomic_set (&pDevice->SendBdLeft, T3_SEND_RCB_ENTRY_COUNT - 1);
+
+ /* Configure the receive return rings. */
+ for (j = 0; j < T3_MAX_RCV_RETURN_RCB_COUNT; j++) {
+ MEM_WR (pDevice, RcvRetRcb[j].u.MaxLen_Flags,
+ T3_RCB_FLAG_RING_DISABLED);
+ }
+
+ pDevice->RcvRetConIdx = 0;
+
+ MEM_WR (pDevice, RcvRetRcb[0].HostRingAddr.High,
+ pDevice->RcvRetBdPhy.High);
+ MEM_WR (pDevice, RcvRetRcb[0].HostRingAddr.Low,
+ pDevice->RcvRetBdPhy.Low);
/* Set up the NIC ring address in the RCB. */
- MEM_WR(pDevice, SendRcb[0].NicRingAddr,T3_NIC_SND_BUFFER_DESC_ADDR);
+ /* Not very clear from the spec. I am guessing that for Receive */
+ /* Return Ring, NicRingAddr is not used. */
+ MEM_WR (pDevice, RcvRetRcb[0].NicRingAddr, 0);
/* Setup the RCB. */
- MEM_WR(pDevice, SendRcb[0].u.MaxLen_Flags,
- T3_SEND_RCB_ENTRY_COUNT << 16);
+ MEM_WR (pDevice, RcvRetRcb[0].u.MaxLen_Flags,
+ T3_RCV_RETURN_RCB_ENTRY_COUNT << 16);
- for(k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++)
- {
- pDevice->pSendBdVirt[k].HostAddr.High = 0;
- pDevice->pSendBdVirt[k].HostAddr.Low = 0;
- }
- }
- else
- {
- MEM_WR(pDevice, SendRcb[0].HostRingAddr.High, 0);
- MEM_WR(pDevice, SendRcb[0].HostRingAddr.Low, 0);
- MEM_WR(pDevice, SendRcb[0].NicRingAddr,
- pDevice->SendBdPhy.Low);
-
- for(k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++)
- {
- __raw_writel(0, &(pDevice->pSendBdVirt[k].HostAddr.High));
- __raw_writel(0, &(pDevice->pSendBdVirt[k].HostAddr.Low));
- __raw_writel(0, &(pDevice->pSendBdVirt[k].u1.Len_Flags));
- pDevice->ShadowSendBd[k].HostAddr.High = 0;
- pDevice->ShadowSendBd[k].u1.Len_Flags = 0;
- }
- }
- atomic_set(&pDevice->SendBdLeft, T3_SEND_RCB_ENTRY_COUNT-1);
-
- /* Configure the receive return rings. */
- for(j = 0; j < T3_MAX_RCV_RETURN_RCB_COUNT; j++)
- {
- MEM_WR(pDevice, RcvRetRcb[j].u.MaxLen_Flags, T3_RCB_FLAG_RING_DISABLED);
- }
-
- pDevice->RcvRetConIdx = 0;
-
- MEM_WR(pDevice, RcvRetRcb[0].HostRingAddr.High,
- pDevice->RcvRetBdPhy.High);
- MEM_WR(pDevice, RcvRetRcb[0].HostRingAddr.Low,
- pDevice->RcvRetBdPhy.Low);
-
- /* Set up the NIC ring address in the RCB. */
- /* Not very clear from the spec. I am guessing that for Receive */
- /* Return Ring, NicRingAddr is not used. */
- MEM_WR(pDevice, RcvRetRcb[0].NicRingAddr, 0);
-
- /* Setup the RCB. */
- MEM_WR(pDevice, RcvRetRcb[0].u.MaxLen_Flags,
- T3_RCV_RETURN_RCB_ENTRY_COUNT << 16);
-
- /* Reinitialize RX ring producer index */
- MB_REG_WR(pDevice, Mailbox.RcvStdProdIdx.Low, 0);
- MB_REG_WR(pDevice, Mailbox.RcvJumboProdIdx.Low, 0);
- MB_REG_WR(pDevice, Mailbox.RcvMiniProdIdx.Low, 0);
+ /* Reinitialize RX ring producer index */
+ MB_REG_WR (pDevice, Mailbox.RcvStdProdIdx.Low, 0);
+ MB_REG_WR (pDevice, Mailbox.RcvJumboProdIdx.Low, 0);
+ MB_REG_WR (pDevice, Mailbox.RcvMiniProdIdx.Low, 0);
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- pDevice->RxJumboProdIdx = 0;
- pDevice->RxJumboQueuedCnt = 0;
+ pDevice->RxJumboProdIdx = 0;
+ pDevice->RxJumboQueuedCnt = 0;
#endif
- /* Reinitialize our copy of the indices. */
- pDevice->RxStdProdIdx = 0;
- pDevice->RxStdQueuedCnt = 0;
+ /* Reinitialize our copy of the indices. */
+ pDevice->RxStdProdIdx = 0;
+ pDevice->RxStdQueuedCnt = 0;
#if T3_JUMBO_RCV_ENTRY_COUNT
- pDevice->RxJumboProdIdx = 0;
-#endif /* T3_JUMBO_RCV_ENTRY_COUNT */
+ pDevice->RxJumboProdIdx = 0;
+#endif /* T3_JUMBO_RCV_ENTRY_COUNT */
- /* Configure the MAC address. */
- LM_SetMacAddress(pDevice, pDevice->NodeAddress);
+ /* Configure the MAC address. */
+ LM_SetMacAddress (pDevice, pDevice->NodeAddress);
- /* Initialize the transmit random backoff seed. */
- Value32 = (pDevice->NodeAddress[0] + pDevice->NodeAddress[1] +
- pDevice->NodeAddress[2] + pDevice->NodeAddress[3] +
- pDevice->NodeAddress[4] + pDevice->NodeAddress[5]) &
- MAC_TX_BACKOFF_SEED_MASK;
- REG_WR(pDevice, MacCtrl.TxBackoffSeed, Value32);
+ /* Initialize the transmit random backoff seed. */
+ Value32 = (pDevice->NodeAddress[0] + pDevice->NodeAddress[1] +
+ pDevice->NodeAddress[2] + pDevice->NodeAddress[3] +
+ pDevice->NodeAddress[4] + pDevice->NodeAddress[5]) &
+ MAC_TX_BACKOFF_SEED_MASK;
+ REG_WR (pDevice, MacCtrl.TxBackoffSeed, Value32);
- /* Receive MTU. Frames larger than the MTU is marked as oversized. */
- REG_WR(pDevice, MacCtrl.MtuSize, pDevice->RxMtu + 8); /* CRC + VLAN. */
+ /* Receive MTU. Frames larger than the MTU is marked as oversized. */
+ REG_WR (pDevice, MacCtrl.MtuSize, pDevice->RxMtu + 8); /* CRC + VLAN. */
- /* Configure Time slot/IPG per 802.3 */
- REG_WR(pDevice, MacCtrl.TxLengths, 0x2620);
+ /* Configure Time slot/IPG per 802.3 */
+ REG_WR (pDevice, MacCtrl.TxLengths, 0x2620);
- /*
- * Configure Receive Rules so that packets don't match
- * Programmble rule will be queued to Return Ring 1
- */
- REG_WR(pDevice, MacCtrl.RcvRuleCfg, RX_RULE_DEFAULT_CLASS);
+ /*
+ * Configure Receive Rules so that packets don't match
+ * Programmble rule will be queued to Return Ring 1
+ */
+ REG_WR (pDevice, MacCtrl.RcvRuleCfg, RX_RULE_DEFAULT_CLASS);
- /*
- * Configure to have 16 Classes of Services (COS) and one
- * queue per class. Bad frames are queued to RRR#1.
- * And frames don't match rules are also queued to COS#1.
- */
- REG_WR(pDevice, RcvListPlmt.Config, 0x181);
+ /*
+ * Configure to have 16 Classes of Services (COS) and one
+ * queue per class. Bad frames are queued to RRR#1.
+ * And frames don't match rules are also queued to COS#1.
+ */
+ REG_WR (pDevice, RcvListPlmt.Config, 0x181);
- /* Enable Receive Placement Statistics */
- REG_WR(pDevice, RcvListPlmt.StatsEnableMask,0xffffff);
- REG_WR(pDevice, RcvListPlmt.StatsCtrl, RCV_LIST_STATS_ENABLE);
+ /* Enable Receive Placement Statistics */
+ REG_WR (pDevice, RcvListPlmt.StatsEnableMask, 0xffffff);
+ REG_WR (pDevice, RcvListPlmt.StatsCtrl, RCV_LIST_STATS_ENABLE);
- /* Enable Send Data Initator Statistics */
- REG_WR(pDevice, SndDataIn.StatsEnableMask,0xffffff);
- REG_WR(pDevice, SndDataIn.StatsCtrl,
- T3_SND_DATA_IN_STATS_CTRL_ENABLE | \
- T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE);
+ /* Enable Send Data Initator Statistics */
+ REG_WR (pDevice, SndDataIn.StatsEnableMask, 0xffffff);
+ REG_WR (pDevice, SndDataIn.StatsCtrl,
+ T3_SND_DATA_IN_STATS_CTRL_ENABLE |
+ T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE);
- /* Disable the host coalescing state machine before configuring it's */
- /* parameters. */
- REG_WR(pDevice, HostCoalesce.Mode, 0);
- for(j = 0; j < 2000; j++)
- {
- Value32 = REG_RD(pDevice, HostCoalesce.Mode);
- if(!(Value32 & HOST_COALESCE_ENABLE))
- {
- break;
+ /* Disable the host coalescing state machine before configuring it's */
+ /* parameters. */
+ REG_WR (pDevice, HostCoalesce.Mode, 0);
+ for (j = 0; j < 2000; j++) {
+ Value32 = REG_RD (pDevice, HostCoalesce.Mode);
+ if (!(Value32 & HOST_COALESCE_ENABLE)) {
+ break;
+ }
+ MM_Wait (10);
}
- MM_Wait(10);
- }
- /* Host coalescing configurations. */
- REG_WR(pDevice, HostCoalesce.RxCoalescingTicks, pDevice->RxCoalescingTicks);
- REG_WR(pDevice, HostCoalesce.TxCoalescingTicks, pDevice->TxCoalescingTicks);
- REG_WR(pDevice, HostCoalesce.RxMaxCoalescedFrames,
- pDevice->RxMaxCoalescedFrames);
- REG_WR(pDevice, HostCoalesce.TxMaxCoalescedFrames,
- pDevice->TxMaxCoalescedFrames);
- REG_WR(pDevice, HostCoalesce.RxCoalescedTickDuringInt,
- pDevice->RxCoalescingTicksDuringInt);
- REG_WR(pDevice, HostCoalesce.TxCoalescedTickDuringInt,
- pDevice->TxCoalescingTicksDuringInt);
- REG_WR(pDevice, HostCoalesce.RxMaxCoalescedFramesDuringInt,
- pDevice->RxMaxCoalescedFramesDuringInt);
- REG_WR(pDevice, HostCoalesce.TxMaxCoalescedFramesDuringInt,
- pDevice->TxMaxCoalescedFramesDuringInt);
+ /* Host coalescing configurations. */
+ REG_WR (pDevice, HostCoalesce.RxCoalescingTicks,
+ pDevice->RxCoalescingTicks);
+ REG_WR (pDevice, HostCoalesce.TxCoalescingTicks,
+ pDevice->TxCoalescingTicks);
+ REG_WR (pDevice, HostCoalesce.RxMaxCoalescedFrames,
+ pDevice->RxMaxCoalescedFrames);
+ REG_WR (pDevice, HostCoalesce.TxMaxCoalescedFrames,
+ pDevice->TxMaxCoalescedFrames);
+ REG_WR (pDevice, HostCoalesce.RxCoalescedTickDuringInt,
+ pDevice->RxCoalescingTicksDuringInt);
+ REG_WR (pDevice, HostCoalesce.TxCoalescedTickDuringInt,
+ pDevice->TxCoalescingTicksDuringInt);
+ REG_WR (pDevice, HostCoalesce.RxMaxCoalescedFramesDuringInt,
+ pDevice->RxMaxCoalescedFramesDuringInt);
+ REG_WR (pDevice, HostCoalesce.TxMaxCoalescedFramesDuringInt,
+ pDevice->TxMaxCoalescedFramesDuringInt);
- /* Initialize the address of the status block. The NIC will DMA */
- /* the status block to this memory which resides on the host. */
- REG_WR(pDevice, HostCoalesce.StatusBlkHostAddr.High,
- pDevice->StatusBlkPhy.High);
- REG_WR(pDevice, HostCoalesce.StatusBlkHostAddr.Low,
- pDevice->StatusBlkPhy.Low);
+ /* Initialize the address of the status block. The NIC will DMA */
+ /* the status block to this memory which resides on the host. */
+ REG_WR (pDevice, HostCoalesce.StatusBlkHostAddr.High,
+ pDevice->StatusBlkPhy.High);
+ REG_WR (pDevice, HostCoalesce.StatusBlkHostAddr.Low,
+ pDevice->StatusBlkPhy.Low);
- /* Initialize the address of the statistics block. The NIC will DMA */
- /* the statistics to this block of memory. */
- REG_WR(pDevice, HostCoalesce.StatsBlkHostAddr.High,
- pDevice->StatsBlkPhy.High);
- REG_WR(pDevice, HostCoalesce.StatsBlkHostAddr.Low,
- pDevice->StatsBlkPhy.Low);
+ /* Initialize the address of the statistics block. The NIC will DMA */
+ /* the statistics to this block of memory. */
+ REG_WR (pDevice, HostCoalesce.StatsBlkHostAddr.High,
+ pDevice->StatsBlkPhy.High);
+ REG_WR (pDevice, HostCoalesce.StatsBlkHostAddr.Low,
+ pDevice->StatsBlkPhy.Low);
- REG_WR(pDevice, HostCoalesce.StatsCoalescingTicks,
- pDevice->StatsCoalescingTicks);
+ REG_WR (pDevice, HostCoalesce.StatsCoalescingTicks,
+ pDevice->StatsCoalescingTicks);
- REG_WR(pDevice, HostCoalesce.StatsBlkNicAddr, 0x300);
- REG_WR(pDevice, HostCoalesce.StatusBlkNicAddr,0xb00);
+ REG_WR (pDevice, HostCoalesce.StatsBlkNicAddr, 0x300);
+ REG_WR (pDevice, HostCoalesce.StatusBlkNicAddr, 0xb00);
- /* Enable Host Coalesing state machine */
- REG_WR(pDevice, HostCoalesce.Mode, HOST_COALESCE_ENABLE |
- pDevice->CoalesceMode);
+ /* Enable Host Coalesing state machine */
+ REG_WR (pDevice, HostCoalesce.Mode, HOST_COALESCE_ENABLE |
+ pDevice->CoalesceMode);
- /* Enable the Receive BD Completion state machine. */
- REG_WR(pDevice, RcvBdComp.Mode, RCV_BD_COMP_MODE_ENABLE |
- RCV_BD_COMP_MODE_ATTN_ENABLE);
+ /* Enable the Receive BD Completion state machine. */
+ REG_WR (pDevice, RcvBdComp.Mode, RCV_BD_COMP_MODE_ENABLE |
+ RCV_BD_COMP_MODE_ATTN_ENABLE);
- /* Enable the Receive List Placement state machine. */
- REG_WR(pDevice, RcvListPlmt.Mode, RCV_LIST_PLMT_MODE_ENABLE);
+ /* Enable the Receive List Placement state machine. */
+ REG_WR (pDevice, RcvListPlmt.Mode, RCV_LIST_PLMT_MODE_ENABLE);
- /* Enable the Receive List Selector state machine. */
- REG_WR(pDevice, RcvListSel.Mode, RCV_LIST_SEL_MODE_ENABLE |
- RCV_LIST_SEL_MODE_ATTN_ENABLE);
+ /* Enable the Receive List Selector state machine. */
+ REG_WR (pDevice, RcvListSel.Mode, RCV_LIST_SEL_MODE_ENABLE |
+ RCV_LIST_SEL_MODE_ATTN_ENABLE);
- /* Enable transmit DMA, clear statistics. */
- pDevice->MacMode = MAC_MODE_ENABLE_TX_STATISTICS |
- MAC_MODE_ENABLE_RX_STATISTICS | MAC_MODE_ENABLE_TDE |
- MAC_MODE_ENABLE_RDE | MAC_MODE_ENABLE_FHDE;
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode |
- MAC_MODE_CLEAR_RX_STATISTICS | MAC_MODE_CLEAR_TX_STATISTICS);
+ /* Enable transmit DMA, clear statistics. */
+ pDevice->MacMode = MAC_MODE_ENABLE_TX_STATISTICS |
+ MAC_MODE_ENABLE_RX_STATISTICS | MAC_MODE_ENABLE_TDE |
+ MAC_MODE_ENABLE_RDE | MAC_MODE_ENABLE_FHDE;
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode |
+ MAC_MODE_CLEAR_RX_STATISTICS | MAC_MODE_CLEAR_TX_STATISTICS);
- /* GRC miscellaneous local control register. */
- pDevice->GrcLocalCtrl = GRC_MISC_LOCAL_CTRL_INT_ON_ATTN |
- GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM;
+ /* GRC miscellaneous local control register. */
+ pDevice->GrcLocalCtrl = GRC_MISC_LOCAL_CTRL_INT_ON_ATTN |
+ GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM;
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- pDevice->GrcLocalCtrl |= GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1;
- }
-
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl);
- MM_Wait(40);
-
- /* Reset RX counters. */
- for(j = 0; j < sizeof(LM_RX_COUNTERS); j++)
- {
- ((PLM_UINT8) &pDevice->RxCounters)[j] = 0;
- }
-
- /* Reset TX counters. */
- for(j = 0; j < sizeof(LM_TX_COUNTERS); j++)
- {
- ((PLM_UINT8) &pDevice->TxCounters)[j] = 0;
- }
-
- MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 0);
-
- /* Enable the DMA Completion state machine. */
- REG_WR(pDevice, DmaComp.Mode, DMA_COMP_MODE_ENABLE);
-
- /* Enable the DMA Write state machine. */
- Value32 = DMA_WRITE_MODE_ENABLE |
- DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE |
- DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE |
- DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE |
- DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE |
- DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE |
- DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE |
- DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE |
- DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE;
- REG_WR(pDevice, DmaWrite.Mode, Value32);
-
- if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))
- {
- if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0)
- {
- Value16 = REG_RD(pDevice, PciCfg.PciXCommand);
- Value16 &= ~(PCIX_CMD_MAX_SPLIT_MASK | PCIX_CMD_MAX_BURST_MASK);
- Value16 |= ((PCIX_CMD_MAX_BURST_CPIOB << PCIX_CMD_MAX_BURST_SHL) &
- PCIX_CMD_MAX_BURST_MASK);
- if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE)
- {
- Value16 |= (pDevice->SplitModeMaxReq << PCIX_CMD_MAX_SPLIT_SHL)
- & PCIX_CMD_MAX_SPLIT_MASK;
- }
- REG_WR(pDevice, PciCfg.PciXCommand, Value16);
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ pDevice->GrcLocalCtrl |= GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1;
}
- }
- /* Enable the Read DMA state machine. */
- Value32 = DMA_READ_MODE_ENABLE |
- DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE |
- DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE |
- DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE |
- DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE |
- DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE |
- DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE |
- DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE |
- DMA_READ_MODE_LONG_READ_ATTN_ENABLE;
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl);
+ MM_Wait (40);
- if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE)
- {
- Value32 |= DMA_READ_MODE_SPLIT_ENABLE;
- }
- REG_WR(pDevice, DmaRead.Mode, Value32);
+ /* Reset RX counters. */
+ for (j = 0; j < sizeof (LM_RX_COUNTERS); j++) {
+ ((PLM_UINT8) & pDevice->RxCounters)[j] = 0;
+ }
- /* Enable the Receive Data Completion state machine. */
- REG_WR(pDevice, RcvDataComp.Mode, RCV_DATA_COMP_MODE_ENABLE |
- RCV_DATA_COMP_MODE_ATTN_ENABLE);
+ /* Reset TX counters. */
+ for (j = 0; j < sizeof (LM_TX_COUNTERS); j++) {
+ ((PLM_UINT8) & pDevice->TxCounters)[j] = 0;
+ }
- /* Enable the Mbuf Cluster Free state machine. */
- REG_WR(pDevice, MbufClusterFree.Mode, MBUF_CLUSTER_FREE_MODE_ENABLE);
+ MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 0);
- /* Enable the Send Data Completion state machine. */
- REG_WR(pDevice, SndDataComp.Mode, SND_DATA_COMP_MODE_ENABLE);
+ /* Enable the DMA Completion state machine. */
+ REG_WR (pDevice, DmaComp.Mode, DMA_COMP_MODE_ENABLE);
- /* Enable the Send BD Completion state machine. */
- REG_WR(pDevice, SndBdComp.Mode, SND_BD_COMP_MODE_ENABLE |
- SND_BD_COMP_MODE_ATTN_ENABLE);
+ /* Enable the DMA Write state machine. */
+ Value32 = DMA_WRITE_MODE_ENABLE |
+ DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE |
+ DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE |
+ DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE |
+ DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE |
+ DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE |
+ DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE |
+ DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE |
+ DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE;
+ REG_WR (pDevice, DmaWrite.Mode, Value32);
- /* Enable the Receive BD Initiator state machine. */
- REG_WR(pDevice, RcvBdIn.Mode, RCV_BD_IN_MODE_ENABLE |
- RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE);
+ if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) {
+ if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) {
+ Value16 = REG_RD (pDevice, PciCfg.PciXCommand);
+ Value16 &=
+ ~(PCIX_CMD_MAX_SPLIT_MASK |
+ PCIX_CMD_MAX_BURST_MASK);
+ Value16 |=
+ ((PCIX_CMD_MAX_BURST_CPIOB <<
+ PCIX_CMD_MAX_BURST_SHL) &
+ PCIX_CMD_MAX_BURST_MASK);
+ if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) {
+ Value16 |=
+ (pDevice->
+ SplitModeMaxReq << PCIX_CMD_MAX_SPLIT_SHL)
+ & PCIX_CMD_MAX_SPLIT_MASK;
+ }
+ REG_WR (pDevice, PciCfg.PciXCommand, Value16);
+ }
+ }
- /* Enable the Receive Data and Receive BD Initiator state machine. */
- REG_WR(pDevice, RcvDataBdIn.Mode, RCV_DATA_BD_IN_MODE_ENABLE |
- RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE);
+ /* Enable the Read DMA state machine. */
+ Value32 = DMA_READ_MODE_ENABLE |
+ DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE |
+ DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE |
+ DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE |
+ DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE |
+ DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE |
+ DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE |
+ DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE |
+ DMA_READ_MODE_LONG_READ_ATTN_ENABLE;
- /* Enable the Send Data Initiator state machine. */
- REG_WR(pDevice, SndDataIn.Mode, T3_SND_DATA_IN_MODE_ENABLE);
+ if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) {
+ Value32 |= DMA_READ_MODE_SPLIT_ENABLE;
+ }
+ REG_WR (pDevice, DmaRead.Mode, Value32);
- /* Enable the Send BD Initiator state machine. */
- REG_WR(pDevice, SndBdIn.Mode, SND_BD_IN_MODE_ENABLE |
- SND_BD_IN_MODE_ATTN_ENABLE);
+ /* Enable the Receive Data Completion state machine. */
+ REG_WR (pDevice, RcvDataComp.Mode, RCV_DATA_COMP_MODE_ENABLE |
+ RCV_DATA_COMP_MODE_ATTN_ENABLE);
- /* Enable the Send BD Selector state machine. */
- REG_WR(pDevice, SndBdSel.Mode, SND_BD_SEL_MODE_ENABLE |
- SND_BD_SEL_MODE_ATTN_ENABLE);
+ /* Enable the Mbuf Cluster Free state machine. */
+ REG_WR (pDevice, MbufClusterFree.Mode, MBUF_CLUSTER_FREE_MODE_ENABLE);
+
+ /* Enable the Send Data Completion state machine. */
+ REG_WR (pDevice, SndDataComp.Mode, SND_DATA_COMP_MODE_ENABLE);
+
+ /* Enable the Send BD Completion state machine. */
+ REG_WR (pDevice, SndBdComp.Mode, SND_BD_COMP_MODE_ENABLE |
+ SND_BD_COMP_MODE_ATTN_ENABLE);
+
+ /* Enable the Receive BD Initiator state machine. */
+ REG_WR (pDevice, RcvBdIn.Mode, RCV_BD_IN_MODE_ENABLE |
+ RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE);
+
+ /* Enable the Receive Data and Receive BD Initiator state machine. */
+ REG_WR (pDevice, RcvDataBdIn.Mode, RCV_DATA_BD_IN_MODE_ENABLE |
+ RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE);
+
+ /* Enable the Send Data Initiator state machine. */
+ REG_WR (pDevice, SndDataIn.Mode, T3_SND_DATA_IN_MODE_ENABLE);
+
+ /* Enable the Send BD Initiator state machine. */
+ REG_WR (pDevice, SndBdIn.Mode, SND_BD_IN_MODE_ENABLE |
+ SND_BD_IN_MODE_ATTN_ENABLE);
+
+ /* Enable the Send BD Selector state machine. */
+ REG_WR (pDevice, SndBdSel.Mode, SND_BD_SEL_MODE_ENABLE |
+ SND_BD_SEL_MODE_ATTN_ENABLE);
#if INCLUDE_5701_AX_FIX
- /* Load the firmware for the 5701_A0 workaround. */
- if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0)
- {
- LM_LoadRlsFirmware(pDevice);
- }
+ /* Load the firmware for the 5701_A0 workaround. */
+ if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0) {
+ LM_LoadRlsFirmware (pDevice);
+ }
#endif
- /* Enable the transmitter. */
- pDevice->TxMode = TX_MODE_ENABLE;
- REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode);
+ /* Enable the transmitter. */
+ pDevice->TxMode = TX_MODE_ENABLE;
+ REG_WR (pDevice, MacCtrl.TxMode, pDevice->TxMode);
- /* Enable the receiver. */
- pDevice->RxMode = RX_MODE_ENABLE;
- REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode);
+ /* Enable the receiver. */
+ pDevice->RxMode = RX_MODE_ENABLE;
+ REG_WR (pDevice, MacCtrl.RxMode, pDevice->RxMode);
- if (pDevice->RestoreOnWakeUp)
- {
- pDevice->RestoreOnWakeUp = FALSE;
- pDevice->DisableAutoNeg = pDevice->WakeUpDisableAutoNeg;
- pDevice->RequestedMediaType = pDevice->WakeUpRequestedMediaType;
- }
-
- /* Disable auto polling. */
- pDevice->MiMode = 0xc0000;
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode);
-
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = LED_CTRL_PHY_MODE_1;
- }
- else
- {
- if(pDevice->LedMode == LED_MODE_OUTPUT)
- {
- Value32 = LED_CTRL_PHY_MODE_2;
+ if (pDevice->RestoreOnWakeUp) {
+ pDevice->RestoreOnWakeUp = FALSE;
+ pDevice->DisableAutoNeg = pDevice->WakeUpDisableAutoNeg;
+ pDevice->RequestedMediaType = pDevice->WakeUpRequestedMediaType;
}
- else
- {
- Value32 = LED_CTRL_PHY_MODE_1;
+
+ /* Disable auto polling. */
+ pDevice->MiMode = 0xc0000;
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode);
+
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 = LED_CTRL_PHY_MODE_1;
+ } else {
+ if (pDevice->LedMode == LED_MODE_OUTPUT) {
+ Value32 = LED_CTRL_PHY_MODE_2;
+ } else {
+ Value32 = LED_CTRL_PHY_MODE_1;
+ }
}
- }
- REG_WR(pDevice, MacCtrl.LedCtrl, Value32);
+ REG_WR (pDevice, MacCtrl.LedCtrl, Value32);
- /* Activate Link to enable MAC state machine */
- REG_WR(pDevice, MacCtrl.MiStatus, MI_STATUS_ENABLE_LINK_STATUS_ATTN);
+ /* Activate Link to enable MAC state machine */
+ REG_WR (pDevice, MacCtrl.MiStatus, MI_STATUS_ENABLE_LINK_STATUS_ATTN);
- if (pDevice->EnableTbi)
- {
- REG_WR(pDevice, MacCtrl.RxMode, RX_MODE_RESET);
- MM_Wait(10);
- REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode);
- if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1)
- {
- REG_WR(pDevice, MacCtrl.SerdesCfg, 0x616000);
+ if (pDevice->EnableTbi) {
+ REG_WR (pDevice, MacCtrl.RxMode, RX_MODE_RESET);
+ MM_Wait (10);
+ REG_WR (pDevice, MacCtrl.RxMode, pDevice->RxMode);
+ if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1) {
+ REG_WR (pDevice, MacCtrl.SerdesCfg, 0x616000);
+ }
}
- }
- /* Setup the phy chip. */
- LM_SetupPhy(pDevice);
+ /* Setup the phy chip. */
+ LM_SetupPhy (pDevice);
- if (!pDevice->EnableTbi) {
- /* Clear CRC stats */
- LM_ReadPhy(pDevice, 0x1e, &Value32);
- LM_WritePhy(pDevice, 0x1e, Value32 | 0x8000);
- LM_ReadPhy(pDevice, 0x14, &Value32);
- }
+ if (!pDevice->EnableTbi) {
+ /* Clear CRC stats */
+ LM_ReadPhy (pDevice, 0x1e, &Value32);
+ LM_WritePhy (pDevice, 0x1e, Value32 | 0x8000);
+ LM_ReadPhy (pDevice, 0x14, &Value32);
+ }
- /* Set up the receive mask. */
- LM_SetReceiveMask(pDevice, pDevice->ReceiveMask);
+ /* Set up the receive mask. */
+ LM_SetReceiveMask (pDevice, pDevice->ReceiveMask);
- /* Queue Rx packet buffers. */
- if(pDevice->QueueRxPackets)
- {
- LM_QueueRxPackets(pDevice);
- }
+ /* Queue Rx packet buffers. */
+ if (pDevice->QueueRxPackets) {
+ LM_QueueRxPackets (pDevice);
+ }
- /* Enable interrupt to the host. */
- if(pDevice->InitDone)
- {
- LM_EnableInterrupt(pDevice);
- }
+ /* Enable interrupt to the host. */
+ if (pDevice->InitDone) {
+ LM_EnableInterrupt (pDevice);
+ }
- return LM_STATUS_SUCCESS;
-} /* LM_ResetAdapter */
-
+ return LM_STATUS_SUCCESS;
+} /* LM_ResetAdapter */
/******************************************************************************/
/* Description: */
@@ -2979,18 +2762,15 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_DisableInterrupt(
- PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_DisableInterrupt (PLM_DEVICE_BLOCK pDevice)
{
- REG_WR(pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl |
- MISC_HOST_CTRL_MASK_PCI_INT);
- MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 1);
+ REG_WR (pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl |
+ MISC_HOST_CTRL_MASK_PCI_INT);
+ MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 1);
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-
/******************************************************************************/
/* Description: */
/* This routine enables the adapter to generate interrupts. */
@@ -2998,24 +2778,20 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_EnableInterrupt(
- PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_EnableInterrupt (PLM_DEVICE_BLOCK pDevice)
{
- REG_WR(pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl &
- ~MISC_HOST_CTRL_MASK_PCI_INT);
- MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 0);
+ REG_WR (pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl &
+ ~MISC_HOST_CTRL_MASK_PCI_INT);
+ MB_REG_WR (pDevice, Mailbox.Interrupt[0].Low, 0);
- if(pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED)
- {
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
- GRC_MISC_LOCAL_CTRL_SET_INT);
- }
+ if (pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) {
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
+ GRC_MISC_LOCAL_CTRL_SET_INT);
+ }
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-
/******************************************************************************/
/* Description: */
/* This routine puts a packet on the wire if there is a transmit DMA */
@@ -3027,306 +2803,279 @@
/* LM_STATUS_SUCCESS */
/******************************************************************************/
#if 0
-LM_STATUS
-LM_SendPacket(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
+LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
{
- LM_UINT32 FragCount;
- PT3_SND_BD pSendBd;
- PT3_SND_BD pShadowSendBd;
- LM_UINT32 Value32, Len;
- LM_UINT32 Idx;
+ LM_UINT32 FragCount;
+ PT3_SND_BD pSendBd;
+ PT3_SND_BD pShadowSendBd;
+ LM_UINT32 Value32, Len;
+ LM_UINT32 Idx;
- if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) {
- return LM_5700SendPacket(pDevice, pPacket);
- }
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ return LM_5700SendPacket (pDevice, pPacket);
+ }
- /* Update the SendBdLeft count. */
- atomic_sub(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
+ /* Update the SendBdLeft count. */
+ atomic_sub (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
- /* Initalize the send buffer descriptors. */
- Idx = pDevice->SendProdIdx;
+ /* Initalize the send buffer descriptors. */
+ Idx = pDevice->SendProdIdx;
- pSendBd = &pDevice->pSendBdVirt[Idx];
+ pSendBd = &pDevice->pSendBdVirt[Idx];
- /* Next producer index. */
- if (pDevice->NicSendBd == TRUE)
- {
- T3_64BIT_HOST_ADDR paddr;
+ /* Next producer index. */
+ if (pDevice->NicSendBd == TRUE) {
+ T3_64BIT_HOST_ADDR paddr;
- pShadowSendBd = &pDevice->ShadowSendBd[Idx];
- for(FragCount = 0; ; )
- {
- MM_MapTxDma(pDevice, pPacket, &paddr, &Len, FragCount);
- /* Initialize the pointer to the send buffer fragment. */
- if (paddr.High != pShadowSendBd->HostAddr.High)
- {
- __raw_writel(paddr.High, &(pSendBd->HostAddr.High));
- pShadowSendBd->HostAddr.High = paddr.High;
- }
- __raw_writel(paddr.Low, &(pSendBd->HostAddr.Low));
+ pShadowSendBd = &pDevice->ShadowSendBd[Idx];
+ for (FragCount = 0;;) {
+ MM_MapTxDma (pDevice, pPacket, &paddr, &Len, FragCount);
+ /* Initialize the pointer to the send buffer fragment. */
+ if (paddr.High != pShadowSendBd->HostAddr.High) {
+ __raw_writel (paddr.High,
+ &(pSendBd->HostAddr.High));
+ pShadowSendBd->HostAddr.High = paddr.High;
+ }
+ __raw_writel (paddr.Low, &(pSendBd->HostAddr.Low));
- /* Setup the control flags and send buffer size. */
- Value32 = (Len << 16) | pPacket->Flags;
+ /* Setup the control flags and send buffer size. */
+ Value32 = (Len << 16) | pPacket->Flags;
- Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
+ Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
- FragCount++;
- if (FragCount >= pPacket->u.Tx.FragCount)
- {
- Value32 |= SND_BD_FLAG_END;
- if (Value32 != pShadowSendBd->u1.Len_Flags)
- {
- __raw_writel(Value32, &(pSendBd->u1.Len_Flags));
- pShadowSendBd->u1.Len_Flags = Value32;
- }
- if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) {
- __raw_writel(pPacket->VlanTag, &(pSendBd->u2.VlanTag));
- }
- break;
- }
- else
- {
- if (Value32 != pShadowSendBd->u1.Len_Flags)
- {
- __raw_writel(Value32, &(pSendBd->u1.Len_Flags));
- pShadowSendBd->u1.Len_Flags = Value32;
- }
- if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) {
- __raw_writel(pPacket->VlanTag, &(pSendBd->u2.VlanTag));
- }
- }
+ FragCount++;
+ if (FragCount >= pPacket->u.Tx.FragCount) {
+ Value32 |= SND_BD_FLAG_END;
+ if (Value32 != pShadowSendBd->u1.Len_Flags) {
+ __raw_writel (Value32,
+ &(pSendBd->u1.Len_Flags));
+ pShadowSendBd->u1.Len_Flags = Value32;
+ }
+ if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) {
+ __raw_writel (pPacket->VlanTag,
+ &(pSendBd->u2.VlanTag));
+ }
+ break;
+ } else {
+ if (Value32 != pShadowSendBd->u1.Len_Flags) {
+ __raw_writel (Value32,
+ &(pSendBd->u1.Len_Flags));
+ pShadowSendBd->u1.Len_Flags = Value32;
+ }
+ if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) {
+ __raw_writel (pPacket->VlanTag,
+ &(pSendBd->u2.VlanTag));
+ }
+ }
- pSendBd++;
- pShadowSendBd++;
- if (Idx == 0)
- {
- pSendBd = &pDevice->pSendBdVirt[0];
- pShadowSendBd = &pDevice->ShadowSendBd[0];
- }
- } /* for */
+ pSendBd++;
+ pShadowSendBd++;
+ if (Idx == 0) {
+ pSendBd = &pDevice->pSendBdVirt[0];
+ pShadowSendBd = &pDevice->ShadowSendBd[0];
+ }
+ } /* for */
- /* Put the packet descriptor in the ActiveQ. */
- QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket);
+ /* Put the packet descriptor in the ActiveQ. */
+ QQ_PushTail (&pDevice->TxPacketActiveQ.Container, pPacket);
- wmb();
- MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx);
+ wmb ();
+ MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, Idx);
- }
- else
- {
- for(FragCount = 0; ; )
- {
- /* Initialize the pointer to the send buffer fragment. */
- MM_MapTxDma(pDevice, pPacket, &pSendBd->HostAddr, &Len, FragCount);
+ } else {
+ for (FragCount = 0;;) {
+ /* Initialize the pointer to the send buffer fragment. */
+ MM_MapTxDma (pDevice, pPacket, &pSendBd->HostAddr, &Len,
+ FragCount);
- pSendBd->u2.VlanTag = pPacket->VlanTag;
+ pSendBd->u2.VlanTag = pPacket->VlanTag;
- /* Setup the control flags and send buffer size. */
- Value32 = (Len << 16) | pPacket->Flags;
+ /* Setup the control flags and send buffer size. */
+ Value32 = (Len << 16) | pPacket->Flags;
- Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
+ Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
- FragCount++;
- if (FragCount >= pPacket->u.Tx.FragCount)
- {
- pSendBd->u1.Len_Flags = Value32 | SND_BD_FLAG_END;
- break;
- }
- else
- {
- pSendBd->u1.Len_Flags = Value32;
- }
- pSendBd++;
- if (Idx == 0)
- {
- pSendBd = &pDevice->pSendBdVirt[0];
- }
- } /* for */
+ FragCount++;
+ if (FragCount >= pPacket->u.Tx.FragCount) {
+ pSendBd->u1.Len_Flags =
+ Value32 | SND_BD_FLAG_END;
+ break;
+ } else {
+ pSendBd->u1.Len_Flags = Value32;
+ }
+ pSendBd++;
+ if (Idx == 0) {
+ pSendBd = &pDevice->pSendBdVirt[0];
+ }
+ } /* for */
- /* Put the packet descriptor in the ActiveQ. */
- QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket);
+ /* Put the packet descriptor in the ActiveQ. */
+ QQ_PushTail (&pDevice->TxPacketActiveQ.Container, pPacket);
- wmb();
- MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx);
+ wmb ();
+ MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, Idx);
- }
+ }
- /* Update the producer index. */
- pDevice->SendProdIdx = Idx;
+ /* Update the producer index. */
+ pDevice->SendProdIdx = Idx;
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
#endif
-LM_STATUS
-LM_SendPacket(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
+LM_STATUS LM_SendPacket (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket)
{
- LM_UINT32 FragCount;
- PT3_SND_BD pSendBd, pTmpSendBd, pShadowSendBd;
- T3_SND_BD NicSendBdArr[MAX_FRAGMENT_COUNT];
- LM_UINT32 StartIdx, Idx;
+ LM_UINT32 FragCount;
+ PT3_SND_BD pSendBd, pTmpSendBd, pShadowSendBd;
+ T3_SND_BD NicSendBdArr[MAX_FRAGMENT_COUNT];
+ LM_UINT32 StartIdx, Idx;
- while (1)
- {
- /* Initalize the send buffer descriptors. */
- StartIdx = Idx = pDevice->SendProdIdx;
+ while (1) {
+ /* Initalize the send buffer descriptors. */
+ StartIdx = Idx = pDevice->SendProdIdx;
- if (pDevice->NicSendBd)
- {
- pTmpSendBd = pSendBd = &NicSendBdArr[0];
- }
- else
- {
- pTmpSendBd = pSendBd = &pDevice->pSendBdVirt[Idx];
- }
-
- /* Next producer index. */
- for(FragCount = 0; ; )
- {
- LM_UINT32 Value32, Len;
-
- /* Initialize the pointer to the send buffer fragment. */
- MM_MapTxDma(pDevice, pPacket, &pSendBd->HostAddr, &Len, FragCount);
-
- pSendBd->u2.VlanTag = pPacket->VlanTag;
-
- /* Setup the control flags and send buffer size. */
- Value32 = (Len << 16) | pPacket->Flags;
-
- Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
-
- FragCount++;
- if (FragCount >= pPacket->u.Tx.FragCount)
- {
- pSendBd->u1.Len_Flags = Value32 | SND_BD_FLAG_END;
- break;
- }
- else
- {
- pSendBd->u1.Len_Flags = Value32;
- }
- pSendBd++;
- if ((Idx == 0) && !pDevice->NicSendBd)
- {
- pSendBd = &pDevice->pSendBdVirt[0];
- }
- } /* for */
- if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- if (LM_Test4GBoundary(pDevice, pPacket, pTmpSendBd) ==
- LM_STATUS_SUCCESS)
- {
- if (MM_CoalesceTxBuffer(pDevice, pPacket) != LM_STATUS_SUCCESS)
- {
- QQ_PushHead(&pDevice->TxPacketFreeQ.Container, pPacket);
- return LM_STATUS_FAILURE;
+ if (pDevice->NicSendBd) {
+ pTmpSendBd = pSendBd = &NicSendBdArr[0];
+ } else {
+ pTmpSendBd = pSendBd = &pDevice->pSendBdVirt[Idx];
}
- continue;
- }
+
+ /* Next producer index. */
+ for (FragCount = 0;;) {
+ LM_UINT32 Value32, Len;
+
+ /* Initialize the pointer to the send buffer fragment. */
+ MM_MapTxDma (pDevice, pPacket, &pSendBd->HostAddr, &Len,
+ FragCount);
+
+ pSendBd->u2.VlanTag = pPacket->VlanTag;
+
+ /* Setup the control flags and send buffer size. */
+ Value32 = (Len << 16) | pPacket->Flags;
+
+ Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
+
+ FragCount++;
+ if (FragCount >= pPacket->u.Tx.FragCount) {
+ pSendBd->u1.Len_Flags =
+ Value32 | SND_BD_FLAG_END;
+ break;
+ } else {
+ pSendBd->u1.Len_Flags = Value32;
+ }
+ pSendBd++;
+ if ((Idx == 0) && !pDevice->NicSendBd) {
+ pSendBd = &pDevice->pSendBdVirt[0];
+ }
+ } /* for */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ if (LM_Test4GBoundary (pDevice, pPacket, pTmpSendBd) ==
+ LM_STATUS_SUCCESS) {
+ if (MM_CoalesceTxBuffer (pDevice, pPacket) !=
+ LM_STATUS_SUCCESS) {
+ QQ_PushHead (&pDevice->TxPacketFreeQ.
+ Container, pPacket);
+ return LM_STATUS_FAILURE;
+ }
+ continue;
+ }
+ }
+ break;
}
- break;
- }
- /* Put the packet descriptor in the ActiveQ. */
- QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket);
+ /* Put the packet descriptor in the ActiveQ. */
+ QQ_PushTail (&pDevice->TxPacketActiveQ.Container, pPacket);
- if (pDevice->NicSendBd)
- {
- pSendBd = &pDevice->pSendBdVirt[StartIdx];
- pShadowSendBd = &pDevice->ShadowSendBd[StartIdx];
+ if (pDevice->NicSendBd) {
+ pSendBd = &pDevice->pSendBdVirt[StartIdx];
+ pShadowSendBd = &pDevice->ShadowSendBd[StartIdx];
- while (StartIdx != Idx)
- {
- LM_UINT32 Value32;
+ while (StartIdx != Idx) {
+ LM_UINT32 Value32;
- if ((Value32 = pTmpSendBd->HostAddr.High) !=
- pShadowSendBd->HostAddr.High)
- {
- __raw_writel(Value32, &(pSendBd->HostAddr.High));
- pShadowSendBd->HostAddr.High = Value32;
- }
+ if ((Value32 = pTmpSendBd->HostAddr.High) !=
+ pShadowSendBd->HostAddr.High) {
+ __raw_writel (Value32,
+ &(pSendBd->HostAddr.High));
+ pShadowSendBd->HostAddr.High = Value32;
+ }
- __raw_writel(pTmpSendBd->HostAddr.Low, &(pSendBd->HostAddr.Low));
+ __raw_writel (pTmpSendBd->HostAddr.Low,
+ &(pSendBd->HostAddr.Low));
- if ((Value32 = pTmpSendBd->u1.Len_Flags) !=
- pShadowSendBd->u1.Len_Flags)
- {
- __raw_writel(Value32, &(pSendBd->u1.Len_Flags));
- pShadowSendBd->u1.Len_Flags = Value32;
- }
+ if ((Value32 = pTmpSendBd->u1.Len_Flags) !=
+ pShadowSendBd->u1.Len_Flags) {
+ __raw_writel (Value32,
+ &(pSendBd->u1.Len_Flags));
+ pShadowSendBd->u1.Len_Flags = Value32;
+ }
- if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG)
- {
- __raw_writel(pTmpSendBd->u2.VlanTag, &(pSendBd->u2.VlanTag));
- }
+ if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) {
+ __raw_writel (pTmpSendBd->u2.VlanTag,
+ &(pSendBd->u2.VlanTag));
+ }
- StartIdx = (StartIdx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
- if (StartIdx == 0)
- pSendBd = &pDevice->pSendBdVirt[0];
- else
- pSendBd++;
- pTmpSendBd++;
+ StartIdx =
+ (StartIdx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
+ if (StartIdx == 0)
+ pSendBd = &pDevice->pSendBdVirt[0];
+ else
+ pSendBd++;
+ pTmpSendBd++;
+ }
+ wmb ();
+ MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, Idx);
+
+ if (T3_CHIP_REV (pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) {
+ MB_REG_WR (pDevice, Mailbox.SendNicProdIdx[0].Low, Idx);
+ }
+ } else {
+ wmb ();
+ MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low, Idx);
+
+ if (T3_CHIP_REV (pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) {
+ MB_REG_WR (pDevice, Mailbox.SendHostProdIdx[0].Low,
+ Idx);
+ }
}
- wmb();
- MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx);
- if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX)
- {
- MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx);
- }
- }
- else
- {
- wmb();
- MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx);
+ /* Update the SendBdLeft count. */
+ atomic_sub (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
- if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX)
- {
- MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx);
- }
- }
+ /* Update the producer index. */
+ pDevice->SendProdIdx = Idx;
- /* Update the SendBdLeft count. */
- atomic_sub(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
-
- /* Update the producer index. */
- pDevice->SendProdIdx = Idx;
-
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
STATIC LM_STATUS
-LM_Test4GBoundary(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket,
- PT3_SND_BD pSendBd)
+LM_Test4GBoundary (PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket,
+ PT3_SND_BD pSendBd)
{
- int FragCount;
- LM_UINT32 Idx, Base, Len;
+ int FragCount;
+ LM_UINT32 Idx, Base, Len;
- Idx = pDevice->SendProdIdx;
- for(FragCount = 0; ; )
- {
- Len = pSendBd->u1.Len_Flags >> 16;
- if (((Base = pSendBd->HostAddr.Low) > 0xffffdcc0) &&
- (pSendBd->HostAddr.High == 0) &&
- ((Base + 8 + Len) < Base))
- {
- return LM_STATUS_SUCCESS;
+ Idx = pDevice->SendProdIdx;
+ for (FragCount = 0;;) {
+ Len = pSendBd->u1.Len_Flags >> 16;
+ if (((Base = pSendBd->HostAddr.Low) > 0xffffdcc0) &&
+ (pSendBd->HostAddr.High == 0) &&
+ ((Base + 8 + Len) < Base)) {
+ return LM_STATUS_SUCCESS;
+ }
+ FragCount++;
+ if (FragCount >= pPacket->u.Tx.FragCount) {
+ break;
+ }
+ pSendBd++;
+ if (!pDevice->NicSendBd) {
+ Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
+ if (Idx == 0) {
+ pSendBd = &pDevice->pSendBdVirt[0];
+ }
+ }
}
- FragCount++;
- if (FragCount >= pPacket->u.Tx.FragCount)
- {
- break;
- }
- pSendBd++;
- if (!pDevice->NicSendBd)
- {
- Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK;
- if (Idx == 0)
- {
- pSendBd = &pDevice->pSendBdVirt[0];
- }
- }
- }
- return LM_STATUS_FAILURE;
+ return LM_STATUS_FAILURE;
}
/******************************************************************************/
@@ -3335,35 +3084,30 @@
/* Return: */
/******************************************************************************/
__inline static unsigned long
-ComputeCrc32(
-unsigned char *pBuffer,
-unsigned long BufferSize) {
- unsigned long Reg;
- unsigned long Tmp;
- unsigned long j, k;
+ComputeCrc32 (unsigned char *pBuffer, unsigned long BufferSize)
+{
+ unsigned long Reg;
+ unsigned long Tmp;
+ unsigned long j, k;
- Reg = 0xffffffff;
+ Reg = 0xffffffff;
- for(j = 0; j < BufferSize; j++)
- {
- Reg ^= pBuffer[j];
+ for (j = 0; j < BufferSize; j++) {
+ Reg ^= pBuffer[j];
- for(k = 0; k < 8; k++)
- {
- Tmp = Reg & 0x01;
+ for (k = 0; k < 8; k++) {
+ Tmp = Reg & 0x01;
- Reg >>= 1;
+ Reg >>= 1;
- if(Tmp)
- {
- Reg ^= 0xedb88320;
- }
+ if (Tmp) {
+ Reg ^= 0xedb88320;
+ }
+ }
}
- }
- return ~Reg;
-} /* ComputeCrc32 */
-
+ return ~Reg;
+} /* ComputeCrc32 */
/******************************************************************************/
/* Description: */
@@ -3372,149 +3116,139 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_SetReceiveMask(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 Mask) {
- LM_UINT32 ReceiveMask;
- LM_UINT32 RxMode;
- LM_UINT32 j, k;
+LM_STATUS LM_SetReceiveMask (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Mask)
+{
+ LM_UINT32 ReceiveMask;
+ LM_UINT32 RxMode;
+ LM_UINT32 j, k;
- ReceiveMask = Mask;
+ ReceiveMask = Mask;
- RxMode = pDevice->RxMode;
+ RxMode = pDevice->RxMode;
- if(Mask & LM_ACCEPT_UNICAST)
- {
- Mask &= ~LM_ACCEPT_UNICAST;
- }
-
- if(Mask & LM_ACCEPT_MULTICAST)
- {
- Mask &= ~LM_ACCEPT_MULTICAST;
- }
-
- if(Mask & LM_ACCEPT_ALL_MULTICAST)
- {
- Mask &= ~LM_ACCEPT_ALL_MULTICAST;
- }
-
- if(Mask & LM_ACCEPT_BROADCAST)
- {
- Mask &= ~LM_ACCEPT_BROADCAST;
- }
-
- RxMode &= ~RX_MODE_PROMISCUOUS_MODE;
- if(Mask & LM_PROMISCUOUS_MODE)
- {
- RxMode |= RX_MODE_PROMISCUOUS_MODE;
- Mask &= ~LM_PROMISCUOUS_MODE;
- }
-
- RxMode &= ~(RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED);
- if(Mask & LM_ACCEPT_ERROR_PACKET)
- {
- RxMode |= RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED;
- Mask &= ~LM_ACCEPT_ERROR_PACKET;
- }
-
- /* Make sure all the bits are valid before committing changes. */
- if(Mask)
- {
- return LM_STATUS_FAILURE;
- }
-
- /* Commit the new filter. */
- pDevice->RxMode = RxMode;
- REG_WR(pDevice, MacCtrl.RxMode, RxMode);
-
- pDevice->ReceiveMask = ReceiveMask;
-
- /* Set up the MC hash table. */
- if(ReceiveMask & LM_ACCEPT_ALL_MULTICAST)
- {
- for(k = 0; k < 4; k++)
- {
- REG_WR(pDevice, MacCtrl.HashReg[k], 0xffffffff);
- }
- }
- else if(ReceiveMask & LM_ACCEPT_MULTICAST)
- {
- LM_UINT32 HashReg[4];
-
- HashReg[0] = 0; HashReg[1] = 0; HashReg[2] = 0; HashReg[3] = 0;
- for(j = 0; j < pDevice->McEntryCount; j++)
- {
- LM_UINT32 RegIndex;
- LM_UINT32 Bitpos;
- LM_UINT32 Crc32;
-
- Crc32 = ComputeCrc32(pDevice->McTable[j], ETHERNET_ADDRESS_SIZE);
-
- /* The most significant 7 bits of the CRC32 (no inversion), */
- /* are used to index into one of the possible 128 bit positions. */
- Bitpos = ~Crc32 & 0x7f;
-
- /* Hash register index. */
- RegIndex = (Bitpos & 0x60) >> 5;
-
- /* Bit to turn on within a hash register. */
- Bitpos &= 0x1f;
-
- /* Enable the multicast bit. */
- HashReg[RegIndex] |= (1 << Bitpos);
+ if (Mask & LM_ACCEPT_UNICAST) {
+ Mask &= ~LM_ACCEPT_UNICAST;
}
- /* REV_AX has problem with multicast filtering where it uses both */
- /* DA and SA to perform hashing. */
- for(k = 0; k < 4; k++)
- {
- REG_WR(pDevice, MacCtrl.HashReg[k], HashReg[k]);
+ if (Mask & LM_ACCEPT_MULTICAST) {
+ Mask &= ~LM_ACCEPT_MULTICAST;
}
- }
- else
- {
- /* Reject all multicast frames. */
- for(j = 0; j < 4; j++)
- {
- REG_WR(pDevice, MacCtrl.HashReg[j], 0);
+
+ if (Mask & LM_ACCEPT_ALL_MULTICAST) {
+ Mask &= ~LM_ACCEPT_ALL_MULTICAST;
}
- }
- /* By default, Tigon3 will accept broadcast frames. We need to setup */
- if(ReceiveMask & LM_ACCEPT_BROADCAST)
- {
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule,
- REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK);
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value,
- REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK);
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule,
- REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK);
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value,
- REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK);
- }
- else
- {
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule,
- REJECT_BROADCAST_RULE1_RULE);
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value,
- REJECT_BROADCAST_RULE1_VALUE);
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule,
- REJECT_BROADCAST_RULE2_RULE);
- REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value,
- REJECT_BROADCAST_RULE2_VALUE);
- }
+ if (Mask & LM_ACCEPT_BROADCAST) {
+ Mask &= ~LM_ACCEPT_BROADCAST;
+ }
- /* disable the rest of the rules. */
- for(j = RCV_LAST_RULE_IDX; j < 16; j++)
- {
- REG_WR(pDevice, MacCtrl.RcvRules[j].Rule, 0);
- REG_WR(pDevice, MacCtrl.RcvRules[j].Value, 0);
- }
+ RxMode &= ~RX_MODE_PROMISCUOUS_MODE;
+ if (Mask & LM_PROMISCUOUS_MODE) {
+ RxMode |= RX_MODE_PROMISCUOUS_MODE;
+ Mask &= ~LM_PROMISCUOUS_MODE;
+ }
- return LM_STATUS_SUCCESS;
-} /* LM_SetReceiveMask */
+ RxMode &= ~(RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED);
+ if (Mask & LM_ACCEPT_ERROR_PACKET) {
+ RxMode |= RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED;
+ Mask &= ~LM_ACCEPT_ERROR_PACKET;
+ }
+ /* Make sure all the bits are valid before committing changes. */
+ if (Mask) {
+ return LM_STATUS_FAILURE;
+ }
+
+ /* Commit the new filter. */
+ pDevice->RxMode = RxMode;
+ REG_WR (pDevice, MacCtrl.RxMode, RxMode);
+
+ pDevice->ReceiveMask = ReceiveMask;
+
+ /* Set up the MC hash table. */
+ if (ReceiveMask & LM_ACCEPT_ALL_MULTICAST) {
+ for (k = 0; k < 4; k++) {
+ REG_WR (pDevice, MacCtrl.HashReg[k], 0xffffffff);
+ }
+ } else if (ReceiveMask & LM_ACCEPT_MULTICAST) {
+ LM_UINT32 HashReg[4];
+
+ HashReg[0] = 0;
+ HashReg[1] = 0;
+ HashReg[2] = 0;
+ HashReg[3] = 0;
+ for (j = 0; j < pDevice->McEntryCount; j++) {
+ LM_UINT32 RegIndex;
+ LM_UINT32 Bitpos;
+ LM_UINT32 Crc32;
+
+ Crc32 =
+ ComputeCrc32 (pDevice->McTable[j],
+ ETHERNET_ADDRESS_SIZE);
+
+ /* The most significant 7 bits of the CRC32 (no inversion), */
+ /* are used to index into one of the possible 128 bit positions. */
+ Bitpos = ~Crc32 & 0x7f;
+
+ /* Hash register index. */
+ RegIndex = (Bitpos & 0x60) >> 5;
+
+ /* Bit to turn on within a hash register. */
+ Bitpos &= 0x1f;
+
+ /* Enable the multicast bit. */
+ HashReg[RegIndex] |= (1 << Bitpos);
+ }
+
+ /* REV_AX has problem with multicast filtering where it uses both */
+ /* DA and SA to perform hashing. */
+ for (k = 0; k < 4; k++) {
+ REG_WR (pDevice, MacCtrl.HashReg[k], HashReg[k]);
+ }
+ } else {
+ /* Reject all multicast frames. */
+ for (j = 0; j < 4; j++) {
+ REG_WR (pDevice, MacCtrl.HashReg[j], 0);
+ }
+ }
+
+ /* By default, Tigon3 will accept broadcast frames. We need to setup */
+ if (ReceiveMask & LM_ACCEPT_BROADCAST) {
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule,
+ REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK);
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value,
+ REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK);
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule,
+ REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK);
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value,
+ REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK);
+ } else {
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule,
+ REJECT_BROADCAST_RULE1_RULE);
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value,
+ REJECT_BROADCAST_RULE1_VALUE);
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule,
+ REJECT_BROADCAST_RULE2_RULE);
+ REG_WR (pDevice,
+ MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value,
+ REJECT_BROADCAST_RULE2_VALUE);
+ }
+
+ /* disable the rest of the rules. */
+ for (j = RCV_LAST_RULE_IDX; j < 16; j++) {
+ REG_WR (pDevice, MacCtrl.RcvRules[j].Rule, 0);
+ REG_WR (pDevice, MacCtrl.RcvRules[j].Value, 0);
+ }
+
+ return LM_STATUS_SUCCESS;
+} /* LM_SetReceiveMask */
/******************************************************************************/
/* Description: */
@@ -3525,138 +3259,135 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_Abort(
-PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_Abort (PLM_DEVICE_BLOCK pDevice)
{
- PLM_PACKET pPacket;
- LM_UINT Idx;
+ PLM_PACKET pPacket;
+ LM_UINT Idx;
- LM_DisableInterrupt(pDevice);
+ LM_DisableInterrupt (pDevice);
- /* Disable all the state machines. */
- LM_CntrlBlock(pDevice,T3_BLOCK_MAC_RX_ENGINE,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_RX_BD_INITIATOR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_RX_LIST_PLMT,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_RX_LIST_SELECTOR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_RX_DATA_INITIATOR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_RX_DATA_COMP,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_RX_BD_COMP,LM_DISABLE);
+ /* Disable all the state machines. */
+ LM_CntrlBlock (pDevice, T3_BLOCK_MAC_RX_ENGINE, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_RX_BD_INITIATOR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_RX_LIST_PLMT, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_RX_LIST_SELECTOR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_RX_DATA_INITIATOR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_RX_DATA_COMP, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_RX_BD_COMP, LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_SEND_BD_SELECTOR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_SEND_BD_INITIATOR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_SEND_DATA_INITIATOR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_DMA_RD,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_SEND_DATA_COMP,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_DMA_COMP,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_SEND_BD_COMP,LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_SEND_BD_SELECTOR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_SEND_BD_INITIATOR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_SEND_DATA_INITIATOR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_DMA_RD, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_SEND_DATA_COMP, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_DMA_COMP, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_SEND_BD_COMP, LM_DISABLE);
- /* Clear TDE bit */
- pDevice->MacMode &= ~MAC_MODE_ENABLE_TDE;
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode);
+ /* Clear TDE bit */
+ pDevice->MacMode &= ~MAC_MODE_ENABLE_TDE;
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode);
- LM_CntrlBlock(pDevice,T3_BLOCK_MAC_TX_ENGINE,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_HOST_COALESING,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_DMA_WR,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_MBUF_CLUSTER_FREE,LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_MAC_TX_ENGINE, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_HOST_COALESING, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_DMA_WR, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_MBUF_CLUSTER_FREE, LM_DISABLE);
- /* Reset all FTQs */
- REG_WR(pDevice, Ftq.Reset, 0xffffffff);
- REG_WR(pDevice, Ftq.Reset, 0x0);
+ /* Reset all FTQs */
+ REG_WR (pDevice, Ftq.Reset, 0xffffffff);
+ REG_WR (pDevice, Ftq.Reset, 0x0);
- LM_CntrlBlock(pDevice,T3_BLOCK_MBUF_MANAGER,LM_DISABLE);
- LM_CntrlBlock(pDevice,T3_BLOCK_MEM_ARBITOR,LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_MBUF_MANAGER, LM_DISABLE);
+ LM_CntrlBlock (pDevice, T3_BLOCK_MEM_ARBITOR, LM_DISABLE);
- MM_ACQUIRE_INT_LOCK(pDevice);
+ MM_ACQUIRE_INT_LOCK (pDevice);
- /* Abort packets that have already queued to go out. */
- pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->TxPacketActiveQ.Container);
- while(pPacket)
- {
+ /* Abort packets that have already queued to go out. */
+ pPacket = (PLM_PACKET) QQ_PopHead (&pDevice->TxPacketActiveQ.Container);
+ while (pPacket) {
- pPacket->PacketStatus = LM_STATUS_TRANSMIT_ABORTED;
- pDevice->TxCounters.TxPacketAbortedCnt++;
+ pPacket->PacketStatus = LM_STATUS_TRANSMIT_ABORTED;
+ pDevice->TxCounters.TxPacketAbortedCnt++;
- atomic_add(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
+ atomic_add (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
- QQ_PushTail(&pDevice->TxPacketXmittedQ.Container, pPacket);
+ QQ_PushTail (&pDevice->TxPacketXmittedQ.Container, pPacket);
- pPacket = (PLM_PACKET)
- QQ_PopHead(&pDevice->TxPacketActiveQ.Container);
- }
-
- /* Cleanup the receive return rings. */
- LM_ServiceRxInterrupt(pDevice);
-
- /* Don't want to indicate rx packets in Ndis miniport shutdown context. */
- /* Doing so may cause system crash. */
- if(!pDevice->ShuttingDown)
- {
- /* Indicate packets to the protocol. */
- MM_IndicateTxPackets(pDevice);
-
- /* Indicate received packets to the protocols. */
- MM_IndicateRxPackets(pDevice);
- }
- else
- {
- /* Move the receive packet descriptors in the ReceivedQ to the */
- /* free queue. */
- for(; ;)
- {
- pPacket = (PLM_PACKET) QQ_PopHead(
- &pDevice->RxPacketReceivedQ.Container);
- if(pPacket == NULL)
- {
- break;
- }
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
+ pPacket = (PLM_PACKET)
+ QQ_PopHead (&pDevice->TxPacketActiveQ.Container);
}
- }
- /* Clean up the Std Receive Producer ring. */
- Idx = pDevice->pStatusBlkVirt->RcvStdConIdx;
+ /* Cleanup the receive return rings. */
+ LM_ServiceRxInterrupt (pDevice);
- while(Idx != pDevice->RxStdProdIdx) {
- pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) +
- MM_UINT_PTR(pDevice->pRxStdBdVirt[Idx].Opaque));
+ /* Don't want to indicate rx packets in Ndis miniport shutdown context. */
+ /* Doing so may cause system crash. */
+ if (!pDevice->ShuttingDown) {
+ /* Indicate packets to the protocol. */
+ MM_IndicateTxPackets (pDevice);
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
+ /* Indicate received packets to the protocols. */
+ MM_IndicateRxPackets (pDevice);
+ } else {
+ /* Move the receive packet descriptors in the ReceivedQ to the */
+ /* free queue. */
+ for (;;) {
+ pPacket =
+ (PLM_PACKET) QQ_PopHead (&pDevice->
+ RxPacketReceivedQ.
+ Container);
+ if (pPacket == NULL) {
+ break;
+ }
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container,
+ pPacket);
+ }
+ }
- Idx = (Idx + 1) & T3_STD_RCV_RCB_ENTRY_COUNT_MASK;
- } /* while */
+ /* Clean up the Std Receive Producer ring. */
+ Idx = pDevice->pStatusBlkVirt->RcvStdConIdx;
- /* Reinitialize our copy of the indices. */
- pDevice->RxStdProdIdx = 0;
+ while (Idx != pDevice->RxStdProdIdx) {
+ pPacket = (PLM_PACKET) (MM_UINT_PTR (pDevice->pPacketDescBase) +
+ MM_UINT_PTR (pDevice->pRxStdBdVirt[Idx].
+ Opaque));
+
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
+
+ Idx = (Idx + 1) & T3_STD_RCV_RCB_ENTRY_COUNT_MASK;
+ } /* while */
+
+ /* Reinitialize our copy of the indices. */
+ pDevice->RxStdProdIdx = 0;
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- /* Clean up the Jumbo Receive Producer ring. */
- Idx = pDevice->pStatusBlkVirt->RcvJumboConIdx;
+ /* Clean up the Jumbo Receive Producer ring. */
+ Idx = pDevice->pStatusBlkVirt->RcvJumboConIdx;
- while(Idx != pDevice->RxJumboProdIdx) {
- pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) +
- MM_UINT_PTR(pDevice->pRxJumboBdVirt[Idx].Opaque));
+ while (Idx != pDevice->RxJumboProdIdx) {
+ pPacket = (PLM_PACKET) (MM_UINT_PTR (pDevice->pPacketDescBase) +
+ MM_UINT_PTR (pDevice->
+ pRxJumboBdVirt[Idx].
+ Opaque));
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
- Idx = (Idx + 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK;
- } /* while */
+ Idx = (Idx + 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK;
+ } /* while */
- /* Reinitialize our copy of the indices. */
- pDevice->RxJumboProdIdx = 0;
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ /* Reinitialize our copy of the indices. */
+ pDevice->RxJumboProdIdx = 0;
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- MM_RELEASE_INT_LOCK(pDevice);
+ MM_RELEASE_INT_LOCK (pDevice);
- /* Initialize the statistis Block */
- pDevice->pStatusBlkVirt->Status = 0;
- pDevice->pStatusBlkVirt->RcvStdConIdx = 0;
- pDevice->pStatusBlkVirt->RcvJumboConIdx = 0;
- pDevice->pStatusBlkVirt->RcvMiniConIdx = 0;
+ /* Initialize the statistis Block */
+ pDevice->pStatusBlkVirt->Status = 0;
+ pDevice->pStatusBlkVirt->RcvStdConIdx = 0;
+ pDevice->pStatusBlkVirt->RcvJumboConIdx = 0;
+ pDevice->pStatusBlkVirt->RcvMiniConIdx = 0;
- return LM_STATUS_SUCCESS;
-} /* LM_Abort */
-
+ return LM_STATUS_SUCCESS;
+} /* LM_Abort */
/******************************************************************************/
/* Description: */
@@ -3667,140 +3398,130 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_Halt(
-PLM_DEVICE_BLOCK pDevice) {
- PLM_PACKET pPacket;
- LM_UINT32 EntryCnt;
-
- LM_Abort(pDevice);
-
- /* Get the number of entries in the queue. */
- EntryCnt = QQ_GetEntryCnt(&pDevice->RxPacketFreeQ.Container);
-
- /* Make sure all the packets have been accounted for. */
- for(EntryCnt = 0; EntryCnt < pDevice->RxPacketDescCnt; EntryCnt++)
- {
- pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container);
- if (pPacket == 0)
- break;
-
- MM_FreeRxBuffer(pDevice, pPacket);
-
- QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket);
- }
-
- LM_ResetChip(pDevice);
-
- /* Restore PCI configuration registers. */
- MM_WriteConfig32(pDevice, PCI_CACHE_LINE_SIZE_REG,
- pDevice->SavedCacheLineReg);
- LM_RegWrInd(pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG,
- (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId);
-
- /* Reprogram the MAC address. */
- LM_SetMacAddress(pDevice, pDevice->NodeAddress);
-
- return LM_STATUS_SUCCESS;
-} /* LM_Halt */
-
-
-STATIC LM_STATUS
-LM_ResetChip(PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_Halt (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 Value32;
- LM_UINT32 j;
+ PLM_PACKET pPacket;
+ LM_UINT32 EntryCnt;
- /* Wait for access to the nvram interface before resetting. This is */
- /* a workaround to prevent EEPROM corruption. */
- if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
- T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701)
- {
- /* Request access to the flash interface. */
- REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_SET1);
+ LM_Abort (pDevice);
- for(j = 0; j < 100000; j++)
- {
- Value32 = REG_RD(pDevice, Nvram.SwArb);
- if(Value32 & SW_ARB_GNT1)
- {
- break;
- }
- MM_Wait(10);
+ /* Get the number of entries in the queue. */
+ EntryCnt = QQ_GetEntryCnt (&pDevice->RxPacketFreeQ.Container);
+
+ /* Make sure all the packets have been accounted for. */
+ for (EntryCnt = 0; EntryCnt < pDevice->RxPacketDescCnt; EntryCnt++) {
+ pPacket =
+ (PLM_PACKET) QQ_PopHead (&pDevice->RxPacketFreeQ.Container);
+ if (pPacket == 0)
+ break;
+
+ MM_FreeRxBuffer (pDevice, pPacket);
+
+ QQ_PushTail (&pDevice->RxPacketFreeQ.Container, pPacket);
}
- }
- /* Global reset. */
- REG_WR(pDevice, Grc.MiscCfg, GRC_MISC_CFG_CORE_CLOCK_RESET);
- MM_Wait(40); MM_Wait(40); MM_Wait(40);
+ LM_ResetChip (pDevice);
- /* make sure we re-enable indirect accesses */
- MM_WriteConfig32(pDevice, T3_PCI_MISC_HOST_CTRL_REG,
- pDevice->MiscHostCtrl);
+ /* Restore PCI configuration registers. */
+ MM_WriteConfig32 (pDevice, PCI_CACHE_LINE_SIZE_REG,
+ pDevice->SavedCacheLineReg);
+ LM_RegWrInd (pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG,
+ (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId);
- /* Set MAX PCI retry to zero. */
- Value32 = T3_PCI_STATE_PCI_ROM_ENABLE | T3_PCI_STATE_PCI_ROM_RETRY_ENABLE;
- if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0)
- {
- if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))
- {
- Value32 |= T3_PCI_STATE_RETRY_SAME_DMA;
+ /* Reprogram the MAC address. */
+ LM_SetMacAddress (pDevice, pDevice->NodeAddress);
+
+ return LM_STATUS_SUCCESS;
+} /* LM_Halt */
+
+STATIC LM_STATUS LM_ResetChip (PLM_DEVICE_BLOCK pDevice)
+{
+ LM_UINT32 Value32;
+ LM_UINT32 j;
+
+ /* Wait for access to the nvram interface before resetting. This is */
+ /* a workaround to prevent EEPROM corruption. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
+ T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5701) {
+ /* Request access to the flash interface. */
+ REG_WR (pDevice, Nvram.SwArb, SW_ARB_REQ_SET1);
+
+ for (j = 0; j < 100000; j++) {
+ Value32 = REG_RD (pDevice, Nvram.SwArb);
+ if (Value32 & SW_ARB_GNT1) {
+ break;
+ }
+ MM_Wait (10);
+ }
}
- }
- MM_WriteConfig32(pDevice, T3_PCI_STATE_REG, Value32);
- /* Restore PCI command register. */
- MM_WriteConfig32(pDevice, PCI_COMMAND_REG,
- pDevice->PciCommandStatusWords);
+ /* Global reset. */
+ REG_WR (pDevice, Grc.MiscCfg, GRC_MISC_CFG_CORE_CLOCK_RESET);
+ MM_Wait (40);
+ MM_Wait (40);
+ MM_Wait (40);
- /* Disable PCI-X relaxed ordering bit. */
- MM_ReadConfig32(pDevice, PCIX_CAP_REG, &Value32);
- Value32 &= ~PCIX_ENABLE_RELAXED_ORDERING;
- MM_WriteConfig32(pDevice, PCIX_CAP_REG, Value32);
+ /* make sure we re-enable indirect accesses */
+ MM_WriteConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG,
+ pDevice->MiscHostCtrl);
- /* Enable memory arbiter. */
- REG_WR(pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE);
+ /* Set MAX PCI retry to zero. */
+ Value32 =
+ T3_PCI_STATE_PCI_ROM_ENABLE | T3_PCI_STATE_PCI_ROM_RETRY_ENABLE;
+ if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) {
+ if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) {
+ Value32 |= T3_PCI_STATE_RETRY_SAME_DMA;
+ }
+ }
+ MM_WriteConfig32 (pDevice, T3_PCI_STATE_REG, Value32);
-#ifdef BIG_ENDIAN_PCI /* This from jfd */
- Value32 = GRC_MODE_WORD_SWAP_DATA|
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA;
+ /* Restore PCI command register. */
+ MM_WriteConfig32 (pDevice, PCI_COMMAND_REG,
+ pDevice->PciCommandStatusWords);
+
+ /* Disable PCI-X relaxed ordering bit. */
+ MM_ReadConfig32 (pDevice, PCIX_CAP_REG, &Value32);
+ Value32 &= ~PCIX_ENABLE_RELAXED_ORDERING;
+ MM_WriteConfig32 (pDevice, PCIX_CAP_REG, Value32);
+
+ /* Enable memory arbiter. */
+ REG_WR (pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE);
+
+#ifdef BIG_ENDIAN_PCI /* This from jfd */
+ Value32 = GRC_MODE_WORD_SWAP_DATA | GRC_MODE_WORD_SWAP_NON_FRAME_DATA;
#else
#ifdef BIG_ENDIAN_HOST
- /* Reconfigure the mode register. */
- Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA |
- GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
- GRC_MODE_BYTE_SWAP_DATA |
- GRC_MODE_WORD_SWAP_DATA;
+ /* Reconfigure the mode register. */
+ Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA |
+ GRC_MODE_WORD_SWAP_NON_FRAME_DATA |
+ GRC_MODE_BYTE_SWAP_DATA | GRC_MODE_WORD_SWAP_DATA;
#else
- /* Reconfigure the mode register. */
- Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA;
+ /* Reconfigure the mode register. */
+ Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA;
#endif
#endif
- REG_WR(pDevice, Grc.Mode, Value32);
+ REG_WR (pDevice, Grc.Mode, Value32);
- /* Prevent PXE from restarting. */
- MEM_WR_OFFSET(pDevice, 0x0b50, T3_MAGIC_NUM);
+ /* Prevent PXE from restarting. */
+ MEM_WR_OFFSET (pDevice, 0x0b50, T3_MAGIC_NUM);
- if(pDevice->EnableTbi) {
- pDevice->MacMode = MAC_MODE_PORT_MODE_TBI;
- REG_WR(pDevice, MacCtrl.Mode, MAC_MODE_PORT_MODE_TBI);
- }
- else {
- REG_WR(pDevice, MacCtrl.Mode, 0);
- }
-
- /* Wait for the firmware to finish initialization. */
- for(j = 0; j < 100000; j++)
- {
- MM_Wait(10);
-
- Value32 = MEM_RD_OFFSET(pDevice, 0x0b50);
- if(Value32 == ~T3_MAGIC_NUM)
- {
- break;
+ if (pDevice->EnableTbi) {
+ pDevice->MacMode = MAC_MODE_PORT_MODE_TBI;
+ REG_WR (pDevice, MacCtrl.Mode, MAC_MODE_PORT_MODE_TBI);
+ } else {
+ REG_WR (pDevice, MacCtrl.Mode, 0);
}
- }
- return LM_STATUS_SUCCESS;
+
+ /* Wait for the firmware to finish initialization. */
+ for (j = 0; j < 100000; j++) {
+ MM_Wait (10);
+
+ Value32 = MEM_RD_OFFSET (pDevice, 0x0b50);
+ if (Value32 == ~T3_MAGIC_NUM) {
+ break;
+ }
+ }
+ return LM_STATUS_SUCCESS;
}
/******************************************************************************/
@@ -3808,161 +3529,143 @@
/* */
/* Return: */
/******************************************************************************/
-__inline static void
-LM_ServiceTxInterrupt(
-PLM_DEVICE_BLOCK pDevice) {
- PLM_PACKET pPacket;
- LM_UINT32 HwConIdx;
- LM_UINT32 SwConIdx;
+__inline static void LM_ServiceTxInterrupt (PLM_DEVICE_BLOCK pDevice)
+{
+ PLM_PACKET pPacket;
+ LM_UINT32 HwConIdx;
+ LM_UINT32 SwConIdx;
- HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx;
-
- /* Get our copy of the consumer index. The buffer descriptors */
- /* that are in between the consumer indices are freed. */
- SwConIdx = pDevice->SendConIdx;
-
- /* Move the packets from the TxPacketActiveQ that are sent out to */
- /* the TxPacketXmittedQ. Packets that are sent use the */
- /* descriptors that are between SwConIdx and HwConIdx. */
- while(SwConIdx != HwConIdx)
- {
- /* Get the packet that was sent from the TxPacketActiveQ. */
- pPacket = (PLM_PACKET) QQ_PopHead(
- &pDevice->TxPacketActiveQ.Container);
-
- /* Set the return status. */
- pPacket->PacketStatus = LM_STATUS_SUCCESS;
-
- /* Put the packet in the TxPacketXmittedQ for indication later. */
- QQ_PushTail(&pDevice->TxPacketXmittedQ.Container, pPacket);
-
- /* Move to the next packet's BD. */
- SwConIdx = (SwConIdx + pPacket->u.Tx.FragCount) &
- T3_SEND_RCB_ENTRY_COUNT_MASK;
-
- /* Update the number of unused BDs. */
- atomic_add(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
-
- /* Get the new updated HwConIdx. */
HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx;
- } /* while */
- /* Save the new SwConIdx. */
- pDevice->SendConIdx = SwConIdx;
+ /* Get our copy of the consumer index. The buffer descriptors */
+ /* that are in between the consumer indices are freed. */
+ SwConIdx = pDevice->SendConIdx;
-} /* LM_ServiceTxInterrupt */
+ /* Move the packets from the TxPacketActiveQ that are sent out to */
+ /* the TxPacketXmittedQ. Packets that are sent use the */
+ /* descriptors that are between SwConIdx and HwConIdx. */
+ while (SwConIdx != HwConIdx) {
+ /* Get the packet that was sent from the TxPacketActiveQ. */
+ pPacket =
+ (PLM_PACKET) QQ_PopHead (&pDevice->TxPacketActiveQ.
+ Container);
+ /* Set the return status. */
+ pPacket->PacketStatus = LM_STATUS_SUCCESS;
+
+ /* Put the packet in the TxPacketXmittedQ for indication later. */
+ QQ_PushTail (&pDevice->TxPacketXmittedQ.Container, pPacket);
+
+ /* Move to the next packet's BD. */
+ SwConIdx = (SwConIdx + pPacket->u.Tx.FragCount) &
+ T3_SEND_RCB_ENTRY_COUNT_MASK;
+
+ /* Update the number of unused BDs. */
+ atomic_add (pPacket->u.Tx.FragCount, &pDevice->SendBdLeft);
+
+ /* Get the new updated HwConIdx. */
+ HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx;
+ } /* while */
+
+ /* Save the new SwConIdx. */
+ pDevice->SendConIdx = SwConIdx;
+
+} /* LM_ServiceTxInterrupt */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-__inline static void
-LM_ServiceRxInterrupt(
-PLM_DEVICE_BLOCK pDevice) {
- PLM_PACKET pPacket;
- PT3_RCV_BD pRcvBd;
- LM_UINT32 HwRcvRetProdIdx;
- LM_UINT32 SwRcvRetConIdx;
+__inline static void LM_ServiceRxInterrupt (PLM_DEVICE_BLOCK pDevice)
+{
+ PLM_PACKET pPacket;
+ PT3_RCV_BD pRcvBd;
+ LM_UINT32 HwRcvRetProdIdx;
+ LM_UINT32 SwRcvRetConIdx;
- /* Loop thru the receive return rings for received packets. */
- HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx;
-
- SwRcvRetConIdx = pDevice->RcvRetConIdx;
- while(SwRcvRetConIdx != HwRcvRetProdIdx)
- {
- pRcvBd = &pDevice->pRcvRetBdVirt[SwRcvRetConIdx];
-
- /* Get the received packet descriptor. */
- pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) +
- MM_UINT_PTR(pRcvBd->Opaque));
-
- /* Check the error flag. */
- if(pRcvBd->ErrorFlag &&
- pRcvBd->ErrorFlag != RCV_BD_ERR_ODD_NIBBLED_RCVD_MII)
- {
- pPacket->PacketStatus = LM_STATUS_FAILURE;
-
- pDevice->RxCounters.RxPacketErrCnt++;
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_BAD_CRC)
- {
- pDevice->RxCounters.RxErrCrcCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_COLL_DETECT)
- {
- pDevice->RxCounters.RxErrCollCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_LINK_LOST_DURING_PKT)
- {
- pDevice->RxCounters.RxErrLinkLostCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_PHY_DECODE_ERR)
- {
- pDevice->RxCounters.RxErrPhyDecodeCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_ODD_NIBBLED_RCVD_MII)
- {
- pDevice->RxCounters.RxErrOddNibbleCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_MAC_ABORT)
- {
- pDevice->RxCounters.RxErrMacAbortCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_LEN_LT_64)
- {
- pDevice->RxCounters.RxErrShortPacketCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_TRUNC_NO_RESOURCES)
- {
- pDevice->RxCounters.RxErrNoResourceCnt++;
- }
-
- if(pRcvBd->ErrorFlag & RCV_BD_ERR_GIANT_FRAME_RCVD)
- {
- pDevice->RxCounters.RxErrLargePacketCnt++;
- }
- }
- else
- {
- pPacket->PacketStatus = LM_STATUS_SUCCESS;
- pPacket->PacketSize = pRcvBd->Len - 4;
-
- pPacket->Flags = pRcvBd->Flags;
- if(pRcvBd->Flags & RCV_BD_FLAG_VLAN_TAG)
- {
- pPacket->VlanTag = pRcvBd->VlanTag;
- }
-
- pPacket->u.Rx.TcpUdpChecksum = pRcvBd->TcpUdpCksum;
- }
-
- /* Put the packet descriptor containing the received packet */
- /* buffer in the RxPacketReceivedQ for indication later. */
- QQ_PushTail(&pDevice->RxPacketReceivedQ.Container, pPacket);
-
- /* Go to the next buffer descriptor. */
- SwRcvRetConIdx = (SwRcvRetConIdx + 1) &
- T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK;
-
- /* Get the updated HwRcvRetProdIdx. */
+ /* Loop thru the receive return rings for received packets. */
HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx;
- } /* while */
- pDevice->RcvRetConIdx = SwRcvRetConIdx;
+ SwRcvRetConIdx = pDevice->RcvRetConIdx;
+ while (SwRcvRetConIdx != HwRcvRetProdIdx) {
+ pRcvBd = &pDevice->pRcvRetBdVirt[SwRcvRetConIdx];
- /* Update the receive return ring consumer index. */
- MB_REG_WR(pDevice, Mailbox.RcvRetConIdx[0].Low, SwRcvRetConIdx);
-} /* LM_ServiceRxInterrupt */
+ /* Get the received packet descriptor. */
+ pPacket = (PLM_PACKET) (MM_UINT_PTR (pDevice->pPacketDescBase) +
+ MM_UINT_PTR (pRcvBd->Opaque));
+ /* Check the error flag. */
+ if (pRcvBd->ErrorFlag &&
+ pRcvBd->ErrorFlag != RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) {
+ pPacket->PacketStatus = LM_STATUS_FAILURE;
+
+ pDevice->RxCounters.RxPacketErrCnt++;
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_BAD_CRC) {
+ pDevice->RxCounters.RxErrCrcCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_COLL_DETECT) {
+ pDevice->RxCounters.RxErrCollCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_LINK_LOST_DURING_PKT) {
+ pDevice->RxCounters.RxErrLinkLostCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_PHY_DECODE_ERR) {
+ pDevice->RxCounters.RxErrPhyDecodeCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) {
+ pDevice->RxCounters.RxErrOddNibbleCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_MAC_ABORT) {
+ pDevice->RxCounters.RxErrMacAbortCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_LEN_LT_64) {
+ pDevice->RxCounters.RxErrShortPacketCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_TRUNC_NO_RESOURCES) {
+ pDevice->RxCounters.RxErrNoResourceCnt++;
+ }
+
+ if (pRcvBd->ErrorFlag & RCV_BD_ERR_GIANT_FRAME_RCVD) {
+ pDevice->RxCounters.RxErrLargePacketCnt++;
+ }
+ } else {
+ pPacket->PacketStatus = LM_STATUS_SUCCESS;
+ pPacket->PacketSize = pRcvBd->Len - 4;
+
+ pPacket->Flags = pRcvBd->Flags;
+ if (pRcvBd->Flags & RCV_BD_FLAG_VLAN_TAG) {
+ pPacket->VlanTag = pRcvBd->VlanTag;
+ }
+
+ pPacket->u.Rx.TcpUdpChecksum = pRcvBd->TcpUdpCksum;
+ }
+
+ /* Put the packet descriptor containing the received packet */
+ /* buffer in the RxPacketReceivedQ for indication later. */
+ QQ_PushTail (&pDevice->RxPacketReceivedQ.Container, pPacket);
+
+ /* Go to the next buffer descriptor. */
+ SwRcvRetConIdx = (SwRcvRetConIdx + 1) &
+ T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK;
+
+ /* Get the updated HwRcvRetProdIdx. */
+ HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx;
+ } /* while */
+
+ pDevice->RcvRetConIdx = SwRcvRetConIdx;
+
+ /* Update the receive return ring consumer index. */
+ MB_REG_WR (pDevice, Mailbox.RcvRetConIdx[0].Low, SwRcvRetConIdx);
+} /* LM_ServiceRxInterrupt */
/******************************************************************************/
/* Description: */
@@ -3972,207 +3675,180 @@
/* Return: */
/* LM_STATUS_SUCCESS */
/******************************************************************************/
-LM_STATUS
-LM_ServiceInterrupts(
- PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_ServiceInterrupts (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 Value32;
- int ServicePhyInt = FALSE;
+ LM_UINT32 Value32;
+ int ServicePhyInt = FALSE;
- /* Setup the phy chip whenever the link status changes. */
- if(pDevice->LinkChngMode == T3_LINK_CHNG_MODE_USE_STATUS_REG)
- {
- Value32 = REG_RD(pDevice, MacCtrl.Status);
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT)
- {
- if (Value32 & MAC_STATUS_MI_INTERRUPT)
- {
- ServicePhyInt = TRUE;
- }
+ /* Setup the phy chip whenever the link status changes. */
+ if (pDevice->LinkChngMode == T3_LINK_CHNG_MODE_USE_STATUS_REG) {
+ Value32 = REG_RD (pDevice, MacCtrl.Status);
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) {
+ if (Value32 & MAC_STATUS_MI_INTERRUPT) {
+ ServicePhyInt = TRUE;
+ }
+ } else if (Value32 & MAC_STATUS_LINK_STATE_CHANGED) {
+ ServicePhyInt = TRUE;
+ }
+ } else {
+ if (pDevice->pStatusBlkVirt->
+ Status & STATUS_BLOCK_LINK_CHANGED_STATUS) {
+ pDevice->pStatusBlkVirt->Status =
+ STATUS_BLOCK_UPDATED | (pDevice->pStatusBlkVirt->
+ Status &
+ ~STATUS_BLOCK_LINK_CHANGED_STATUS);
+ ServicePhyInt = TRUE;
+ }
}
- else if(Value32 & MAC_STATUS_LINK_STATE_CHANGED)
- {
- ServicePhyInt = TRUE;
- }
- }
- else
- {
- if(pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_LINK_CHANGED_STATUS)
- {
- pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED |
- (pDevice->pStatusBlkVirt->Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS);
- ServicePhyInt = TRUE;
- }
- }
#if INCLUDE_TBI_SUPPORT
- if (pDevice->IgnoreTbiLinkChange == TRUE)
- {
- ServicePhyInt = FALSE;
- }
+ if (pDevice->IgnoreTbiLinkChange == TRUE) {
+ ServicePhyInt = FALSE;
+ }
#endif
- if (ServicePhyInt == TRUE)
- {
- LM_SetupPhy(pDevice);
- }
-
- /* Service receive and transmit interrupts. */
- LM_ServiceRxInterrupt(pDevice);
- LM_ServiceTxInterrupt(pDevice);
-
- /* No spinlock for this queue since this routine is serialized. */
- if(!QQ_Empty(&pDevice->RxPacketReceivedQ.Container))
- {
- /* Indicate receive packets. */
- MM_IndicateRxPackets(pDevice);
- /* LM_QueueRxPackets(pDevice); */
- }
-
- /* No spinlock for this queue since this routine is serialized. */
- if(!QQ_Empty(&pDevice->TxPacketXmittedQ.Container))
- {
- MM_IndicateTxPackets(pDevice);
- }
-
- return LM_STATUS_SUCCESS;
-} /* LM_ServiceInterrupts */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_STATUS
-LM_MulticastAdd(
-PLM_DEVICE_BLOCK pDevice,
-PLM_UINT8 pMcAddress) {
- PLM_UINT8 pEntry;
- LM_UINT32 j;
-
- pEntry = pDevice->McTable[0];
- for(j = 0; j < pDevice->McEntryCount; j++)
- {
- if(IS_ETH_ADDRESS_EQUAL(pEntry, pMcAddress))
- {
- /* Found a match, increment the instance count. */
- pEntry[LM_MC_INSTANCE_COUNT_INDEX] += 1;
-
- return LM_STATUS_SUCCESS;
+ if (ServicePhyInt == TRUE) {
+ LM_SetupPhy (pDevice);
}
- pEntry += LM_MC_ENTRY_SIZE;
- }
+ /* Service receive and transmit interrupts. */
+ LM_ServiceRxInterrupt (pDevice);
+ LM_ServiceTxInterrupt (pDevice);
- if(pDevice->McEntryCount >= LM_MAX_MC_TABLE_SIZE)
- {
- return LM_STATUS_FAILURE;
- }
-
- pEntry = pDevice->McTable[pDevice->McEntryCount];
-
- COPY_ETH_ADDRESS(pMcAddress, pEntry);
- pEntry[LM_MC_INSTANCE_COUNT_INDEX] = 1;
-
- pDevice->McEntryCount++;
-
- LM_SetReceiveMask(pDevice, pDevice->ReceiveMask | LM_ACCEPT_MULTICAST);
-
- return LM_STATUS_SUCCESS;
-} /* LM_MulticastAdd */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_STATUS
-LM_MulticastDel(
-PLM_DEVICE_BLOCK pDevice,
-PLM_UINT8 pMcAddress) {
- PLM_UINT8 pEntry;
- LM_UINT32 j;
-
- pEntry = pDevice->McTable[0];
- for(j = 0; j < pDevice->McEntryCount; j++)
- {
- if(IS_ETH_ADDRESS_EQUAL(pEntry, pMcAddress))
- {
- /* Found a match, decrement the instance count. */
- pEntry[LM_MC_INSTANCE_COUNT_INDEX] -= 1;
-
- /* No more instance left, remove the address from the table. */
- /* Move the last entry in the table to the delete slot. */
- if(pEntry[LM_MC_INSTANCE_COUNT_INDEX] == 0 &&
- pDevice->McEntryCount > 1)
- {
-
- COPY_ETH_ADDRESS(
- pDevice->McTable[pDevice->McEntryCount-1], pEntry);
- pEntry[LM_MC_INSTANCE_COUNT_INDEX] =
- pDevice->McTable[pDevice->McEntryCount-1]
- [LM_MC_INSTANCE_COUNT_INDEX];
- }
- pDevice->McEntryCount--;
-
- /* Update the receive mask if the table is empty. */
- if(pDevice->McEntryCount == 0)
- {
- LM_SetReceiveMask(pDevice,
- pDevice->ReceiveMask & ~LM_ACCEPT_MULTICAST);
- }
-
- return LM_STATUS_SUCCESS;
+ /* No spinlock for this queue since this routine is serialized. */
+ if (!QQ_Empty (&pDevice->RxPacketReceivedQ.Container)) {
+ /* Indicate receive packets. */
+ MM_IndicateRxPackets (pDevice);
+ /* LM_QueueRxPackets(pDevice); */
}
- pEntry += LM_MC_ENTRY_SIZE;
- }
+ /* No spinlock for this queue since this routine is serialized. */
+ if (!QQ_Empty (&pDevice->TxPacketXmittedQ.Container)) {
+ MM_IndicateTxPackets (pDevice);
+ }
- return LM_STATUS_FAILURE;
-} /* LM_MulticastDel */
-
+ return LM_STATUS_SUCCESS;
+} /* LM_ServiceInterrupts */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-LM_STATUS
-LM_MulticastClear(
-PLM_DEVICE_BLOCK pDevice) {
- pDevice->McEntryCount = 0;
-
- LM_SetReceiveMask(pDevice, pDevice->ReceiveMask & ~LM_ACCEPT_MULTICAST);
-
- return LM_STATUS_SUCCESS;
-} /* LM_MulticastClear */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_STATUS
-LM_SetMacAddress(
- PLM_DEVICE_BLOCK pDevice,
- PLM_UINT8 pMacAddress)
+LM_STATUS LM_MulticastAdd (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress)
{
- LM_UINT32 j;
+ PLM_UINT8 pEntry;
+ LM_UINT32 j;
- for(j = 0; j < 4; j++)
- {
- REG_WR(pDevice, MacCtrl.MacAddr[j].High,
- (pMacAddress[0] << 8) | pMacAddress[1]);
- REG_WR(pDevice, MacCtrl.MacAddr[j].Low,
- (pMacAddress[2] << 24) | (pMacAddress[3] << 16) |
- (pMacAddress[4] << 8) | pMacAddress[5]);
- }
+ pEntry = pDevice->McTable[0];
+ for (j = 0; j < pDevice->McEntryCount; j++) {
+ if (IS_ETH_ADDRESS_EQUAL (pEntry, pMcAddress)) {
+ /* Found a match, increment the instance count. */
+ pEntry[LM_MC_INSTANCE_COUNT_INDEX] += 1;
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
+ }
+
+ pEntry += LM_MC_ENTRY_SIZE;
+ }
+
+ if (pDevice->McEntryCount >= LM_MAX_MC_TABLE_SIZE) {
+ return LM_STATUS_FAILURE;
+ }
+
+ pEntry = pDevice->McTable[pDevice->McEntryCount];
+
+ COPY_ETH_ADDRESS (pMcAddress, pEntry);
+ pEntry[LM_MC_INSTANCE_COUNT_INDEX] = 1;
+
+ pDevice->McEntryCount++;
+
+ LM_SetReceiveMask (pDevice, pDevice->ReceiveMask | LM_ACCEPT_MULTICAST);
+
+ return LM_STATUS_SUCCESS;
+} /* LM_MulticastAdd */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+LM_STATUS LM_MulticastDel (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMcAddress)
+{
+ PLM_UINT8 pEntry;
+ LM_UINT32 j;
+
+ pEntry = pDevice->McTable[0];
+ for (j = 0; j < pDevice->McEntryCount; j++) {
+ if (IS_ETH_ADDRESS_EQUAL (pEntry, pMcAddress)) {
+ /* Found a match, decrement the instance count. */
+ pEntry[LM_MC_INSTANCE_COUNT_INDEX] -= 1;
+
+ /* No more instance left, remove the address from the table. */
+ /* Move the last entry in the table to the delete slot. */
+ if (pEntry[LM_MC_INSTANCE_COUNT_INDEX] == 0 &&
+ pDevice->McEntryCount > 1) {
+
+ COPY_ETH_ADDRESS (pDevice->
+ McTable[pDevice->
+ McEntryCount - 1],
+ pEntry);
+ pEntry[LM_MC_INSTANCE_COUNT_INDEX] =
+ pDevice->McTable[pDevice->McEntryCount - 1]
+ [LM_MC_INSTANCE_COUNT_INDEX];
+ }
+ pDevice->McEntryCount--;
+
+ /* Update the receive mask if the table is empty. */
+ if (pDevice->McEntryCount == 0) {
+ LM_SetReceiveMask (pDevice,
+ pDevice->
+ ReceiveMask &
+ ~LM_ACCEPT_MULTICAST);
+ }
+
+ return LM_STATUS_SUCCESS;
+ }
+
+ pEntry += LM_MC_ENTRY_SIZE;
+ }
+
+ return LM_STATUS_FAILURE;
+} /* LM_MulticastDel */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+LM_STATUS LM_MulticastClear (PLM_DEVICE_BLOCK pDevice)
+{
+ pDevice->McEntryCount = 0;
+
+ LM_SetReceiveMask (pDevice,
+ pDevice->ReceiveMask & ~LM_ACCEPT_MULTICAST);
+
+ return LM_STATUS_SUCCESS;
+} /* LM_MulticastClear */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+LM_STATUS LM_SetMacAddress (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pMacAddress)
+{
+ LM_UINT32 j;
+
+ for (j = 0; j < 4; j++) {
+ REG_WR (pDevice, MacCtrl.MacAddr[j].High,
+ (pMacAddress[0] << 8) | pMacAddress[1]);
+ REG_WR (pDevice, MacCtrl.MacAddr[j].Low,
+ (pMacAddress[2] << 24) | (pMacAddress[3] << 16) |
+ (pMacAddress[4] << 8) | pMacAddress[5]);
+ }
+
+ return LM_STATUS_SUCCESS;
}
-
/******************************************************************************/
/* Description: */
/* Sets up the default line speed, and duplex modes based on the requested */
@@ -4182,93 +3858,93 @@
/* None. */
/******************************************************************************/
static LM_STATUS
-LM_TranslateRequestedMediaType(
-LM_REQUESTED_MEDIA_TYPE RequestedMediaType,
-PLM_MEDIA_TYPE pMediaType,
-PLM_LINE_SPEED pLineSpeed,
-PLM_DUPLEX_MODE pDuplexMode) {
- *pMediaType = LM_MEDIA_TYPE_AUTO;
- *pLineSpeed = LM_LINE_SPEED_UNKNOWN;
- *pDuplexMode = LM_DUPLEX_MODE_UNKNOWN;
+LM_TranslateRequestedMediaType (LM_REQUESTED_MEDIA_TYPE RequestedMediaType,
+ PLM_MEDIA_TYPE pMediaType,
+ PLM_LINE_SPEED pLineSpeed,
+ PLM_DUPLEX_MODE pDuplexMode)
+{
+ *pMediaType = LM_MEDIA_TYPE_AUTO;
+ *pLineSpeed = LM_LINE_SPEED_UNKNOWN;
+ *pDuplexMode = LM_DUPLEX_MODE_UNKNOWN;
- /* determine media type */
- switch(RequestedMediaType) {
+ /* determine media type */
+ switch (RequestedMediaType) {
case LM_REQUESTED_MEDIA_TYPE_BNC:
- *pMediaType = LM_MEDIA_TYPE_BNC;
- *pLineSpeed = LM_LINE_SPEED_10MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ *pMediaType = LM_MEDIA_TYPE_BNC;
+ *pLineSpeed = LM_LINE_SPEED_10MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_AUTO:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- *pLineSpeed = LM_LINE_SPEED_10MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ *pLineSpeed = LM_LINE_SPEED_10MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- *pLineSpeed = LM_LINE_SPEED_10MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ *pLineSpeed = LM_LINE_SPEED_10MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- *pLineSpeed = LM_LINE_SPEED_100MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ *pLineSpeed = LM_LINE_SPEED_100MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- *pLineSpeed = LM_LINE_SPEED_100MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ *pLineSpeed = LM_LINE_SPEED_100MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- *pLineSpeed = LM_LINE_SPEED_1000MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ *pLineSpeed = LM_LINE_SPEED_1000MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX:
- *pMediaType = LM_MEDIA_TYPE_UTP;
- *pLineSpeed = LM_LINE_SPEED_1000MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
+ *pMediaType = LM_MEDIA_TYPE_UTP;
+ *pLineSpeed = LM_LINE_SPEED_1000MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS:
- *pMediaType = LM_MEDIA_TYPE_FIBER;
- *pLineSpeed = LM_LINE_SPEED_100MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ *pMediaType = LM_MEDIA_TYPE_FIBER;
+ *pLineSpeed = LM_LINE_SPEED_100MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX:
- *pMediaType = LM_MEDIA_TYPE_FIBER;
- *pLineSpeed = LM_LINE_SPEED_100MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
+ *pMediaType = LM_MEDIA_TYPE_FIBER;
+ *pLineSpeed = LM_LINE_SPEED_100MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS:
- *pMediaType = LM_MEDIA_TYPE_FIBER;
- *pLineSpeed = LM_LINE_SPEED_1000MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ *pMediaType = LM_MEDIA_TYPE_FIBER;
+ *pLineSpeed = LM_LINE_SPEED_1000MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX:
- *pMediaType = LM_MEDIA_TYPE_FIBER;
- *pLineSpeed = LM_LINE_SPEED_1000MBPS;
- *pDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
+ *pMediaType = LM_MEDIA_TYPE_FIBER;
+ *pLineSpeed = LM_LINE_SPEED_1000MBPS;
+ *pDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
default:
- break;
- } /* switch */
+ break;
+ } /* switch */
- return LM_STATUS_SUCCESS;
-} /* LM_TranslateRequestedMediaType */
+ return LM_STATUS_SUCCESS;
+} /* LM_TranslateRequestedMediaType */
/******************************************************************************/
/* Description: */
@@ -4277,285 +3953,284 @@
/* LM_STATUS_LINK_ACTIVE */
/* LM_STATUS_LINK_DOWN */
/******************************************************************************/
-static LM_STATUS
-LM_InitBcm540xPhy(
-PLM_DEVICE_BLOCK pDevice)
+static LM_STATUS LM_InitBcm540xPhy (PLM_DEVICE_BLOCK pDevice)
{
- LM_LINE_SPEED CurrentLineSpeed;
- LM_DUPLEX_MODE CurrentDuplexMode;
- LM_STATUS CurrentLinkStatus;
- LM_UINT32 Value32;
- LM_UINT32 j;
+ LM_LINE_SPEED CurrentLineSpeed;
+ LM_DUPLEX_MODE CurrentDuplexMode;
+ LM_STATUS CurrentLinkStatus;
+ LM_UINT32 Value32;
+ LM_UINT32 j;
-#if 1 /* jmb: bugfix -- moved here, out of code that sets initial pwr state */
- LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x2);
+#if 1 /* jmb: bugfix -- moved here, out of code that sets initial pwr state */
+ LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x2);
#endif
- if((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID)
- {
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
+ if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) {
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
- if(!pDevice->InitDone)
- {
- Value32 = 0;
- }
-
- if(!(Value32 & PHY_STATUS_LINK_PASS))
- {
- LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20);
-
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804);
-
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204);
-
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132);
-
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232);
-
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20);
-
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- for(j = 0; j < 1000; j++)
- {
- MM_Wait(10);
-
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- if(Value32 & PHY_STATUS_LINK_PASS)
- {
- MM_Wait(40);
- break;
+ if (!pDevice->InitDone) {
+ Value32 = 0;
}
- }
- if((pDevice->PhyId & PHY_ID_REV_MASK) == PHY_BCM5401_B0_REV)
- {
- if(!(Value32 & PHY_STATUS_LINK_PASS) &&
- (pDevice->OldLineSpeed == LM_LINE_SPEED_1000MBPS))
- {
- LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET);
- for(j = 0; j < 100; j++)
- {
- MM_Wait(10);
+ if (!(Value32 & PHY_STATUS_LINK_PASS)) {
+ LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x0c20);
- LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32);
- if(!(Value32 & PHY_CTRL_PHY_RESET))
- {
- MM_Wait(40);
- break;
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1804);
+
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x1204);
+
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0132);
+
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0232);
+
+ LM_WritePhy (pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f);
+ LM_WritePhy (pDevice, BCM540X_DSP_RW_PORT, 0x0a20);
+
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ for (j = 0; j < 1000; j++) {
+ MM_Wait (10);
+
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ if (Value32 & PHY_STATUS_LINK_PASS) {
+ MM_Wait (40);
+ break;
+ }
}
- }
- LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20);
+ if ((pDevice->PhyId & PHY_ID_REV_MASK) ==
+ PHY_BCM5401_B0_REV) {
+ if (!(Value32 & PHY_STATUS_LINK_PASS)
+ && (pDevice->OldLineSpeed ==
+ LM_LINE_SPEED_1000MBPS)) {
+ LM_WritePhy (pDevice, PHY_CTRL_REG,
+ PHY_CTRL_PHY_RESET);
+ for (j = 0; j < 100; j++) {
+ MM_Wait (10);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804);
+ LM_ReadPhy (pDevice,
+ PHY_CTRL_REG,
+ &Value32);
+ if (!
+ (Value32 &
+ PHY_CTRL_PHY_RESET)) {
+ MM_Wait (40);
+ break;
+ }
+ }
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204);
+ LM_WritePhy (pDevice, BCM5401_AUX_CTRL,
+ 0x0c20);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_ADDRESS_REG,
+ 0x0012);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_RW_PORT,
+ 0x1804);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_ADDRESS_REG,
+ 0x0013);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_RW_PORT,
+ 0x1204);
- LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f);
- LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_ADDRESS_REG,
+ 0x8006);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_RW_PORT,
+ 0x0132);
+
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_ADDRESS_REG,
+ 0x8006);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_RW_PORT,
+ 0x0232);
+
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_ADDRESS_REG,
+ 0x201f);
+ LM_WritePhy (pDevice,
+ BCM540X_DSP_RW_PORT,
+ 0x0a20);
+ }
+ }
}
- }
- }
- }
- else if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B0)
- {
- /* Bug: 5701 A0, B0 TX CRC workaround. */
- LM_WritePhy(pDevice, 0x15, 0x0a75);
- LM_WritePhy(pDevice, 0x1c, 0x8c68);
- LM_WritePhy(pDevice, 0x1c, 0x8d68);
- LM_WritePhy(pDevice, 0x1c, 0x8c68);
- }
-
- /* Acknowledge interrupts. */
- LM_ReadPhy(pDevice, BCM540X_INT_STATUS_REG, &Value32);
- LM_ReadPhy(pDevice, BCM540X_INT_STATUS_REG, &Value32);
-
- /* Configure the interrupt mask. */
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT)
- {
- LM_WritePhy(pDevice, BCM540X_INT_MASK_REG, ~BCM540X_INT_LINK_CHANGE);
- }
-
- /* Configure PHY led mode. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701 ||
- (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700))
- {
- if(pDevice->LedMode == LED_MODE_THREE_LINK)
- {
- LM_WritePhy(pDevice, BCM540X_EXT_CTRL_REG,
- BCM540X_EXT_CTRL_LINK3_LED_MODE);
- }
- else
- {
- LM_WritePhy(pDevice, BCM540X_EXT_CTRL_REG, 0);
- }
- }
-
- CurrentLinkStatus = LM_STATUS_LINK_DOWN;
-
- /* Get current link and duplex mode. */
- for(j = 0; j < 100; j++)
- {
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
-
- if(Value32 & PHY_STATUS_LINK_PASS)
- {
- break;
- }
- MM_Wait(40);
- }
-
- if(Value32 & PHY_STATUS_LINK_PASS)
- {
-
- /* Determine the current line and duplex settings. */
- LM_ReadPhy(pDevice, BCM540X_AUX_STATUS_REG, &Value32);
- for(j = 0; j < 2000; j++)
- {
- MM_Wait(10);
-
- LM_ReadPhy(pDevice, BCM540X_AUX_STATUS_REG, &Value32);
- if(Value32)
- {
- break;
- }
+ } else if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B0) {
+ /* Bug: 5701 A0, B0 TX CRC workaround. */
+ LM_WritePhy (pDevice, 0x15, 0x0a75);
+ LM_WritePhy (pDevice, 0x1c, 0x8c68);
+ LM_WritePhy (pDevice, 0x1c, 0x8d68);
+ LM_WritePhy (pDevice, 0x1c, 0x8c68);
}
- switch(Value32 & BCM540X_AUX_SPEED_MASK)
- {
- case BCM540X_AUX_10BASET_HD:
- CurrentLineSpeed = LM_LINE_SPEED_10MBPS;
- CurrentDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
+ /* Acknowledge interrupts. */
+ LM_ReadPhy (pDevice, BCM540X_INT_STATUS_REG, &Value32);
+ LM_ReadPhy (pDevice, BCM540X_INT_STATUS_REG, &Value32);
- case BCM540X_AUX_10BASET_FD:
- CurrentLineSpeed = LM_LINE_SPEED_10MBPS;
- CurrentDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
-
- case BCM540X_AUX_100BASETX_HD:
- CurrentLineSpeed = LM_LINE_SPEED_100MBPS;
- CurrentDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
-
- case BCM540X_AUX_100BASETX_FD:
- CurrentLineSpeed = LM_LINE_SPEED_100MBPS;
- CurrentDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
-
- case BCM540X_AUX_100BASET_HD:
- CurrentLineSpeed = LM_LINE_SPEED_1000MBPS;
- CurrentDuplexMode = LM_DUPLEX_MODE_HALF;
- break;
-
- case BCM540X_AUX_100BASET_FD:
- CurrentLineSpeed = LM_LINE_SPEED_1000MBPS;
- CurrentDuplexMode = LM_DUPLEX_MODE_FULL;
- break;
-
- default:
-
- CurrentLineSpeed = LM_LINE_SPEED_UNKNOWN;
- CurrentDuplexMode = LM_DUPLEX_MODE_UNKNOWN;
- break;
+ /* Configure the interrupt mask. */
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) {
+ LM_WritePhy (pDevice, BCM540X_INT_MASK_REG,
+ ~BCM540X_INT_LINK_CHANGE);
}
- /* Make sure we are in auto-neg mode. */
- for (j = 0; j < 200; j++)
- {
- LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32);
- if(Value32 && Value32 != 0x7fff)
- {
- break;
- }
-
- if(Value32 == 0 && pDevice->RequestedMediaType ==
- LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS)
- {
- break;
- }
-
- MM_Wait(10);
- }
-
- /* Use the current line settings for "auto" mode. */
- if(pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO ||
- pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO)
- {
- if(Value32 & PHY_CTRL_AUTO_NEG_ENABLE)
- {
- CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
-
- /* We may be exiting low power mode and the link is in */
- /* 10mb. In this case, we need to restart autoneg. */
- LM_ReadPhy(pDevice, BCM540X_1000BASET_CTRL_REG, &Value32);
- pDevice->advertising1000 = Value32;
- /* 5702FE supports 10/100Mb only. */
- if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5703 ||
- pDevice->BondId != GRC_MISC_BD_ID_5702FE)
- {
- if(!(Value32 & (BCM540X_AN_AD_1000BASET_HALF |
- BCM540X_AN_AD_1000BASET_FULL)))
- {
- CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH;
- }
+ /* Configure PHY led mode. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701 ||
+ (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700)) {
+ if (pDevice->LedMode == LED_MODE_THREE_LINK) {
+ LM_WritePhy (pDevice, BCM540X_EXT_CTRL_REG,
+ BCM540X_EXT_CTRL_LINK3_LED_MODE);
+ } else {
+ LM_WritePhy (pDevice, BCM540X_EXT_CTRL_REG, 0);
}
- }
- else
- {
- CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH;
- }
- }
- else
- {
- /* Force line settings. */
- /* Use the current setting if it matches the user's requested */
- /* setting. */
- LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32);
- if((pDevice->LineSpeed == CurrentLineSpeed) &&
- (pDevice->DuplexMode == CurrentDuplexMode))
- {
- if ((pDevice->DisableAutoNeg &&
- !(Value32 & PHY_CTRL_AUTO_NEG_ENABLE)) ||
- (!pDevice->DisableAutoNeg &&
- (Value32 & PHY_CTRL_AUTO_NEG_ENABLE)))
- {
- CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
- }
- else
- {
- CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH;
- }
- }
- else
- {
- CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH;
- }
}
- /* Save line settings. */
- pDevice->LineSpeed = CurrentLineSpeed;
- pDevice->DuplexMode = CurrentDuplexMode;
- pDevice->MediaType = LM_MEDIA_TYPE_UTP;
- }
+ CurrentLinkStatus = LM_STATUS_LINK_DOWN;
- return CurrentLinkStatus;
-} /* LM_InitBcm540xPhy */
+ /* Get current link and duplex mode. */
+ for (j = 0; j < 100; j++) {
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+
+ if (Value32 & PHY_STATUS_LINK_PASS) {
+ break;
+ }
+ MM_Wait (40);
+ }
+
+ if (Value32 & PHY_STATUS_LINK_PASS) {
+
+ /* Determine the current line and duplex settings. */
+ LM_ReadPhy (pDevice, BCM540X_AUX_STATUS_REG, &Value32);
+ for (j = 0; j < 2000; j++) {
+ MM_Wait (10);
+
+ LM_ReadPhy (pDevice, BCM540X_AUX_STATUS_REG, &Value32);
+ if (Value32) {
+ break;
+ }
+ }
+
+ switch (Value32 & BCM540X_AUX_SPEED_MASK) {
+ case BCM540X_AUX_10BASET_HD:
+ CurrentLineSpeed = LM_LINE_SPEED_10MBPS;
+ CurrentDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
+
+ case BCM540X_AUX_10BASET_FD:
+ CurrentLineSpeed = LM_LINE_SPEED_10MBPS;
+ CurrentDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
+
+ case BCM540X_AUX_100BASETX_HD:
+ CurrentLineSpeed = LM_LINE_SPEED_100MBPS;
+ CurrentDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
+
+ case BCM540X_AUX_100BASETX_FD:
+ CurrentLineSpeed = LM_LINE_SPEED_100MBPS;
+ CurrentDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
+
+ case BCM540X_AUX_100BASET_HD:
+ CurrentLineSpeed = LM_LINE_SPEED_1000MBPS;
+ CurrentDuplexMode = LM_DUPLEX_MODE_HALF;
+ break;
+
+ case BCM540X_AUX_100BASET_FD:
+ CurrentLineSpeed = LM_LINE_SPEED_1000MBPS;
+ CurrentDuplexMode = LM_DUPLEX_MODE_FULL;
+ break;
+
+ default:
+
+ CurrentLineSpeed = LM_LINE_SPEED_UNKNOWN;
+ CurrentDuplexMode = LM_DUPLEX_MODE_UNKNOWN;
+ break;
+ }
+
+ /* Make sure we are in auto-neg mode. */
+ for (j = 0; j < 200; j++) {
+ LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32);
+ if (Value32 && Value32 != 0x7fff) {
+ break;
+ }
+
+ if (Value32 == 0 && pDevice->RequestedMediaType ==
+ LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS) {
+ break;
+ }
+
+ MM_Wait (10);
+ }
+
+ /* Use the current line settings for "auto" mode. */
+ if (pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO
+ || pDevice->RequestedMediaType ==
+ LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) {
+ if (Value32 & PHY_CTRL_AUTO_NEG_ENABLE) {
+ CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
+
+ /* We may be exiting low power mode and the link is in */
+ /* 10mb. In this case, we need to restart autoneg. */
+ LM_ReadPhy (pDevice, BCM540X_1000BASET_CTRL_REG,
+ &Value32);
+ pDevice->advertising1000 = Value32;
+ /* 5702FE supports 10/100Mb only. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) !=
+ T3_ASIC_REV_5703
+ || pDevice->BondId !=
+ GRC_MISC_BD_ID_5702FE) {
+ if (!
+ (Value32 &
+ (BCM540X_AN_AD_1000BASET_HALF |
+ BCM540X_AN_AD_1000BASET_FULL))) {
+ CurrentLinkStatus =
+ LM_STATUS_LINK_SETTING_MISMATCH;
+ }
+ }
+ } else {
+ CurrentLinkStatus =
+ LM_STATUS_LINK_SETTING_MISMATCH;
+ }
+ } else {
+ /* Force line settings. */
+ /* Use the current setting if it matches the user's requested */
+ /* setting. */
+ LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32);
+ if ((pDevice->LineSpeed == CurrentLineSpeed) &&
+ (pDevice->DuplexMode == CurrentDuplexMode)) {
+ if ((pDevice->DisableAutoNeg &&
+ !(Value32 & PHY_CTRL_AUTO_NEG_ENABLE)) ||
+ (!pDevice->DisableAutoNeg &&
+ (Value32 & PHY_CTRL_AUTO_NEG_ENABLE))) {
+ CurrentLinkStatus =
+ LM_STATUS_LINK_ACTIVE;
+ } else {
+ CurrentLinkStatus =
+ LM_STATUS_LINK_SETTING_MISMATCH;
+ }
+ } else {
+ CurrentLinkStatus =
+ LM_STATUS_LINK_SETTING_MISMATCH;
+ }
+ }
+
+ /* Save line settings. */
+ pDevice->LineSpeed = CurrentLineSpeed;
+ pDevice->DuplexMode = CurrentDuplexMode;
+ pDevice->MediaType = LM_MEDIA_TYPE_UTP;
+ }
+
+ return CurrentLinkStatus;
+} /* LM_InitBcm540xPhy */
/******************************************************************************/
/* Description: */
@@ -4563,1065 +4238,935 @@
/* Return: */
/******************************************************************************/
LM_STATUS
-LM_SetFlowControl(
- PLM_DEVICE_BLOCK pDevice,
- LM_UINT32 LocalPhyAd,
- LM_UINT32 RemotePhyAd)
+LM_SetFlowControl (PLM_DEVICE_BLOCK pDevice,
+ LM_UINT32 LocalPhyAd, LM_UINT32 RemotePhyAd)
{
- LM_FLOW_CONTROL FlowCap;
+ LM_FLOW_CONTROL FlowCap;
- /* Resolve flow control. */
- FlowCap = LM_FLOW_CONTROL_NONE;
+ /* Resolve flow control. */
+ FlowCap = LM_FLOW_CONTROL_NONE;
- /* See Table 28B-3 of 802.3ab-1999 spec. */
- if(pDevice->FlowControlCap & LM_FLOW_CONTROL_AUTO_PAUSE)
- {
- if(LocalPhyAd & PHY_AN_AD_PAUSE_CAPABLE)
- {
- if(LocalPhyAd & PHY_AN_AD_ASYM_PAUSE)
- {
- if(RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE)
- {
- FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE |
- LM_FLOW_CONTROL_RECEIVE_PAUSE;
+ /* See Table 28B-3 of 802.3ab-1999 spec. */
+ if (pDevice->FlowControlCap & LM_FLOW_CONTROL_AUTO_PAUSE) {
+ if (LocalPhyAd & PHY_AN_AD_PAUSE_CAPABLE) {
+ if (LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) {
+ if (RemotePhyAd &
+ PHY_LINK_PARTNER_PAUSE_CAPABLE) {
+ FlowCap =
+ LM_FLOW_CONTROL_TRANSMIT_PAUSE |
+ LM_FLOW_CONTROL_RECEIVE_PAUSE;
+ } else if (RemotePhyAd &
+ PHY_LINK_PARTNER_ASYM_PAUSE) {
+ FlowCap = LM_FLOW_CONTROL_RECEIVE_PAUSE;
+ }
+ } else {
+ if (RemotePhyAd &
+ PHY_LINK_PARTNER_PAUSE_CAPABLE) {
+ FlowCap =
+ LM_FLOW_CONTROL_TRANSMIT_PAUSE |
+ LM_FLOW_CONTROL_RECEIVE_PAUSE;
+ }
+ }
+ } else if (LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) {
+ if ((RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) &&
+ (RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE)) {
+ FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE;
+ }
}
- else if(RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE)
- {
- FlowCap = LM_FLOW_CONTROL_RECEIVE_PAUSE;
- }
- }
- else
- {
- if(RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE)
- {
- FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE |
- LM_FLOW_CONTROL_RECEIVE_PAUSE;
- }
- }
+ } else {
+ FlowCap = pDevice->FlowControlCap;
}
- else if(LocalPhyAd & PHY_AN_AD_ASYM_PAUSE)
- {
- if((RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) &&
- (RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE))
- {
- FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE;
- }
+
+ /* Enable/disable rx PAUSE. */
+ pDevice->RxMode &= ~RX_MODE_ENABLE_FLOW_CONTROL;
+ if (FlowCap & LM_FLOW_CONTROL_RECEIVE_PAUSE &&
+ (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE ||
+ pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE)) {
+ pDevice->FlowControl |= LM_FLOW_CONTROL_RECEIVE_PAUSE;
+ pDevice->RxMode |= RX_MODE_ENABLE_FLOW_CONTROL;
+
}
- }
- else
- {
- FlowCap = pDevice->FlowControlCap;
- }
+ REG_WR (pDevice, MacCtrl.RxMode, pDevice->RxMode);
- /* Enable/disable rx PAUSE. */
- pDevice->RxMode &= ~RX_MODE_ENABLE_FLOW_CONTROL;
- if(FlowCap & LM_FLOW_CONTROL_RECEIVE_PAUSE &&
- (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE ||
- pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE))
- {
- pDevice->FlowControl |= LM_FLOW_CONTROL_RECEIVE_PAUSE;
- pDevice->RxMode |= RX_MODE_ENABLE_FLOW_CONTROL;
+ /* Enable/disable tx PAUSE. */
+ pDevice->TxMode &= ~TX_MODE_ENABLE_FLOW_CONTROL;
+ if (FlowCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE &&
+ (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE ||
+ pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE)) {
+ pDevice->FlowControl |= LM_FLOW_CONTROL_TRANSMIT_PAUSE;
+ pDevice->TxMode |= TX_MODE_ENABLE_FLOW_CONTROL;
- }
- REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode);
+ }
+ REG_WR (pDevice, MacCtrl.TxMode, pDevice->TxMode);
- /* Enable/disable tx PAUSE. */
- pDevice->TxMode &= ~TX_MODE_ENABLE_FLOW_CONTROL;
- if(FlowCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE &&
- (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE ||
- pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE))
- {
- pDevice->FlowControl |= LM_FLOW_CONTROL_TRANSMIT_PAUSE;
- pDevice->TxMode |= TX_MODE_ENABLE_FLOW_CONTROL;
-
- }
- REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode);
-
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-
#if INCLUDE_TBI_SUPPORT
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-STATIC LM_STATUS
-LM_InitBcm800xPhy(
- PLM_DEVICE_BLOCK pDevice)
+STATIC LM_STATUS LM_InitBcm800xPhy (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 Value32;
- LM_UINT32 j;
+ LM_UINT32 Value32;
+ LM_UINT32 j;
- Value32 = REG_RD(pDevice, MacCtrl.Status);
+ Value32 = REG_RD (pDevice, MacCtrl.Status);
- /* Reset the SERDES during init and when we have link. */
- if(!pDevice->InitDone || Value32 & MAC_STATUS_PCS_SYNCED)
- {
- /* Set PLL lock range. */
- LM_WritePhy(pDevice, 0x16, 0x8007);
+ /* Reset the SERDES during init and when we have link. */
+ if (!pDevice->InitDone || Value32 & MAC_STATUS_PCS_SYNCED) {
+ /* Set PLL lock range. */
+ LM_WritePhy (pDevice, 0x16, 0x8007);
- /* Software reset. */
- LM_WritePhy(pDevice, 0x00, 0x8000);
+ /* Software reset. */
+ LM_WritePhy (pDevice, 0x00, 0x8000);
- /* Wait for reset to complete. */
- for(j = 0; j < 500; j++)
- {
- MM_Wait(10);
+ /* Wait for reset to complete. */
+ for (j = 0; j < 500; j++) {
+ MM_Wait (10);
+ }
+
+ /* Config mode; seletct PMA/Ch 1 regs. */
+ LM_WritePhy (pDevice, 0x10, 0x8411);
+
+ /* Enable auto-lock and comdet, select txclk for tx. */
+ LM_WritePhy (pDevice, 0x11, 0x0a10);
+
+ LM_WritePhy (pDevice, 0x18, 0x00a0);
+ LM_WritePhy (pDevice, 0x16, 0x41ff);
+
+ /* Assert and deassert POR. */
+ LM_WritePhy (pDevice, 0x13, 0x0400);
+ MM_Wait (40);
+ LM_WritePhy (pDevice, 0x13, 0x0000);
+
+ LM_WritePhy (pDevice, 0x11, 0x0a50);
+ MM_Wait (40);
+ LM_WritePhy (pDevice, 0x11, 0x0a10);
+
+ /* Delay for signal to stabilize. */
+ for (j = 0; j < 15000; j++) {
+ MM_Wait (10);
+ }
+
+ /* Deselect the channel register so we can read the PHY id later. */
+ LM_WritePhy (pDevice, 0x10, 0x8011);
}
- /* Config mode; seletct PMA/Ch 1 regs. */
- LM_WritePhy(pDevice, 0x10, 0x8411);
-
- /* Enable auto-lock and comdet, select txclk for tx. */
- LM_WritePhy(pDevice, 0x11, 0x0a10);
-
- LM_WritePhy(pDevice, 0x18, 0x00a0);
- LM_WritePhy(pDevice, 0x16, 0x41ff);
-
- /* Assert and deassert POR. */
- LM_WritePhy(pDevice, 0x13, 0x0400);
- MM_Wait(40);
- LM_WritePhy(pDevice, 0x13, 0x0000);
-
- LM_WritePhy(pDevice, 0x11, 0x0a50);
- MM_Wait(40);
- LM_WritePhy(pDevice, 0x11, 0x0a10);
-
- /* Delay for signal to stabilize. */
- for(j = 0; j < 15000; j++)
- {
- MM_Wait(10);
- }
-
- /* Deselect the channel register so we can read the PHY id later. */
- LM_WritePhy(pDevice, 0x10, 0x8011);
- }
-
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-STATIC LM_STATUS
-LM_SetupFiberPhy(
- PLM_DEVICE_BLOCK pDevice)
+STATIC LM_STATUS LM_SetupFiberPhy (PLM_DEVICE_BLOCK pDevice)
{
- LM_STATUS CurrentLinkStatus;
- AUTONEG_STATUS AnStatus = 0;
- LM_UINT32 Value32;
- LM_UINT32 Cnt;
- LM_UINT32 j, k;
+ LM_STATUS CurrentLinkStatus;
+ AUTONEG_STATUS AnStatus = 0;
+ LM_UINT32 Value32;
+ LM_UINT32 Cnt;
+ LM_UINT32 j, k;
- pDevice->MacMode &= ~(MAC_MODE_HALF_DUPLEX | MAC_MODE_PORT_MODE_MASK);
+ pDevice->MacMode &= ~(MAC_MODE_HALF_DUPLEX | MAC_MODE_PORT_MODE_MASK);
- /* Initialize the send_config register. */
- REG_WR(pDevice, MacCtrl.TxAutoNeg, 0);
+ /* Initialize the send_config register. */
+ REG_WR (pDevice, MacCtrl.TxAutoNeg, 0);
- /* Enable TBI and full duplex mode. */
- pDevice->MacMode |= MAC_MODE_PORT_MODE_TBI;
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode);
+ /* Enable TBI and full duplex mode. */
+ pDevice->MacMode |= MAC_MODE_PORT_MODE_TBI;
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode);
- /* Initialize the BCM8002 SERDES PHY. */
- switch(pDevice->PhyId & PHY_ID_MASK)
- {
+ /* Initialize the BCM8002 SERDES PHY. */
+ switch (pDevice->PhyId & PHY_ID_MASK) {
case PHY_BCM8002_PHY_ID:
- LM_InitBcm800xPhy(pDevice);
- break;
+ LM_InitBcm800xPhy (pDevice);
+ break;
default:
- break;
- }
-
- /* Enable link change interrupt. */
- REG_WR(pDevice, MacCtrl.MacEvent, MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN);
-
- /* Default to link down. */
- CurrentLinkStatus = LM_STATUS_LINK_DOWN;
-
- /* Get the link status. */
- Value32 = REG_RD(pDevice, MacCtrl.Status);
- if(Value32 & MAC_STATUS_PCS_SYNCED)
- {
- if((pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO) ||
- (pDevice->DisableAutoNeg == FALSE))
- {
- /* auto-negotiation mode. */
- /* Initialize the autoneg default capaiblities. */
- AutonegInit(&pDevice->AnInfo);
-
- /* Set the context pointer to point to the main device structure. */
- pDevice->AnInfo.pContext = pDevice;
-
- /* Setup flow control advertisement register. */
- Value32 = GetPhyAdFlowCntrlSettings(pDevice);
- if(Value32 & PHY_AN_AD_PAUSE_CAPABLE)
- {
- pDevice->AnInfo.mr_adv_sym_pause = 1;
- }
- else
- {
- pDevice->AnInfo.mr_adv_sym_pause = 0;
- }
-
- if(Value32 & PHY_AN_AD_ASYM_PAUSE)
- {
- pDevice->AnInfo.mr_adv_asym_pause = 1;
- }
- else
- {
- pDevice->AnInfo.mr_adv_asym_pause = 0;
- }
-
- /* Try to autoneg up to six times. */
- if (pDevice->IgnoreTbiLinkChange)
- {
- Cnt = 1;
- }
- else
- {
- Cnt = 6;
- }
- for (j = 0; j < Cnt; j++)
- {
- REG_WR(pDevice, MacCtrl.TxAutoNeg, 0);
-
- Value32 = pDevice->MacMode & ~MAC_MODE_PORT_MODE_MASK;
- REG_WR(pDevice, MacCtrl.Mode, Value32);
- MM_Wait(20);
-
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode |
- MAC_MODE_SEND_CONFIGS);
-
- MM_Wait(20);
-
- pDevice->AnInfo.State = AN_STATE_UNKNOWN;
- pDevice->AnInfo.CurrentTime_us = 0;
-
- REG_WR(pDevice, Grc.Timer, 0);
- for(k = 0; (pDevice->AnInfo.CurrentTime_us < 75000) &&
- (k < 75000); k++)
- {
- AnStatus = Autoneg8023z(&pDevice->AnInfo);
-
- if((AnStatus == AUTONEG_STATUS_DONE) ||
- (AnStatus == AUTONEG_STATUS_FAILED))
- {
- break;
- }
-
- pDevice->AnInfo.CurrentTime_us = REG_RD(pDevice, Grc.Timer);
-
- }
- if((AnStatus == AUTONEG_STATUS_DONE) ||
- (AnStatus == AUTONEG_STATUS_FAILED))
- {
- break;
- }
- if (j >= 1)
- {
- if (!(REG_RD(pDevice, MacCtrl.Status) &
- MAC_STATUS_PCS_SYNCED)) {
- break;
- }
- }
- }
-
- /* Stop sending configs. */
- MM_AnTxIdle(&pDevice->AnInfo);
-
- /* Resolve flow control settings. */
- if((AnStatus == AUTONEG_STATUS_DONE) &&
- pDevice->AnInfo.mr_an_complete && pDevice->AnInfo.mr_link_ok &&
- pDevice->AnInfo.mr_lp_adv_full_duplex)
- {
- LM_UINT32 RemotePhyAd;
- LM_UINT32 LocalPhyAd;
-
- LocalPhyAd = 0;
- if(pDevice->AnInfo.mr_adv_sym_pause)
- {
- LocalPhyAd |= PHY_AN_AD_PAUSE_CAPABLE;
- }
-
- if(pDevice->AnInfo.mr_adv_asym_pause)
- {
- LocalPhyAd |= PHY_AN_AD_ASYM_PAUSE;
- }
-
- RemotePhyAd = 0;
- if(pDevice->AnInfo.mr_lp_adv_sym_pause)
- {
- RemotePhyAd |= PHY_LINK_PARTNER_PAUSE_CAPABLE;
- }
-
- if(pDevice->AnInfo.mr_lp_adv_asym_pause)
- {
- RemotePhyAd |= PHY_LINK_PARTNER_ASYM_PAUSE;
- }
-
- LM_SetFlowControl(pDevice, LocalPhyAd, RemotePhyAd);
-
- CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
- }
- for (j = 0; j < 30; j++)
- {
- MM_Wait(20);
- REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
- MAC_STATUS_CFG_CHANGED);
- MM_Wait(20);
- if ((REG_RD(pDevice, MacCtrl.Status) &
- (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0)
- break;
- }
- if (pDevice->PollTbiLink)
- {
- Value32 = REG_RD(pDevice, MacCtrl.Status);
- if (Value32 & MAC_STATUS_RECEIVING_CFG)
- {
- pDevice->IgnoreTbiLinkChange = TRUE;
- }
- else
- {
- pDevice->IgnoreTbiLinkChange = FALSE;
- }
- }
- Value32 = REG_RD(pDevice, MacCtrl.Status);
- if (CurrentLinkStatus == LM_STATUS_LINK_DOWN &&
- (Value32 & MAC_STATUS_PCS_SYNCED) &&
- ((Value32 & MAC_STATUS_RECEIVING_CFG) == 0))
- {
- CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
- }
+ break;
}
- else
- {
- /* We are forcing line speed. */
- pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE;
- LM_SetFlowControl(pDevice, 0, 0);
- CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode |
- MAC_MODE_SEND_CONFIGS);
- }
- }
- /* Set the link polarity bit. */
- pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY;
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode);
+ /* Enable link change interrupt. */
+ REG_WR (pDevice, MacCtrl.MacEvent,
+ MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN);
- pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED |
- (pDevice->pStatusBlkVirt->Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS);
-
- for (j = 0; j < 100; j++)
- {
- REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
- MAC_STATUS_CFG_CHANGED);
- MM_Wait(5);
- if ((REG_RD(pDevice, MacCtrl.Status) &
- (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0)
- break;
- }
-
- Value32 = REG_RD(pDevice, MacCtrl.Status);
- if((Value32 & MAC_STATUS_PCS_SYNCED) == 0)
- {
+ /* Default to link down. */
CurrentLinkStatus = LM_STATUS_LINK_DOWN;
- if (pDevice->DisableAutoNeg == FALSE)
- {
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode |
- MAC_MODE_SEND_CONFIGS);
- MM_Wait(1);
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode);
+
+ /* Get the link status. */
+ Value32 = REG_RD (pDevice, MacCtrl.Status);
+ if (Value32 & MAC_STATUS_PCS_SYNCED) {
+ if ((pDevice->RequestedMediaType ==
+ LM_REQUESTED_MEDIA_TYPE_AUTO)
+ || (pDevice->DisableAutoNeg == FALSE)) {
+ /* auto-negotiation mode. */
+ /* Initialize the autoneg default capaiblities. */
+ AutonegInit (&pDevice->AnInfo);
+
+ /* Set the context pointer to point to the main device structure. */
+ pDevice->AnInfo.pContext = pDevice;
+
+ /* Setup flow control advertisement register. */
+ Value32 = GetPhyAdFlowCntrlSettings (pDevice);
+ if (Value32 & PHY_AN_AD_PAUSE_CAPABLE) {
+ pDevice->AnInfo.mr_adv_sym_pause = 1;
+ } else {
+ pDevice->AnInfo.mr_adv_sym_pause = 0;
+ }
+
+ if (Value32 & PHY_AN_AD_ASYM_PAUSE) {
+ pDevice->AnInfo.mr_adv_asym_pause = 1;
+ } else {
+ pDevice->AnInfo.mr_adv_asym_pause = 0;
+ }
+
+ /* Try to autoneg up to six times. */
+ if (pDevice->IgnoreTbiLinkChange) {
+ Cnt = 1;
+ } else {
+ Cnt = 6;
+ }
+ for (j = 0; j < Cnt; j++) {
+ REG_WR (pDevice, MacCtrl.TxAutoNeg, 0);
+
+ Value32 =
+ pDevice->MacMode & ~MAC_MODE_PORT_MODE_MASK;
+ REG_WR (pDevice, MacCtrl.Mode, Value32);
+ MM_Wait (20);
+
+ REG_WR (pDevice, MacCtrl.Mode,
+ pDevice->
+ MacMode | MAC_MODE_SEND_CONFIGS);
+
+ MM_Wait (20);
+
+ pDevice->AnInfo.State = AN_STATE_UNKNOWN;
+ pDevice->AnInfo.CurrentTime_us = 0;
+
+ REG_WR (pDevice, Grc.Timer, 0);
+ for (k = 0;
+ (pDevice->AnInfo.CurrentTime_us < 75000)
+ && (k < 75000); k++) {
+ AnStatus =
+ Autoneg8023z (&pDevice->AnInfo);
+
+ if ((AnStatus == AUTONEG_STATUS_DONE) ||
+ (AnStatus == AUTONEG_STATUS_FAILED))
+ {
+ break;
+ }
+
+ pDevice->AnInfo.CurrentTime_us =
+ REG_RD (pDevice, Grc.Timer);
+
+ }
+ if ((AnStatus == AUTONEG_STATUS_DONE) ||
+ (AnStatus == AUTONEG_STATUS_FAILED)) {
+ break;
+ }
+ if (j >= 1) {
+ if (!(REG_RD (pDevice, MacCtrl.Status) &
+ MAC_STATUS_PCS_SYNCED)) {
+ break;
+ }
+ }
+ }
+
+ /* Stop sending configs. */
+ MM_AnTxIdle (&pDevice->AnInfo);
+
+ /* Resolve flow control settings. */
+ if ((AnStatus == AUTONEG_STATUS_DONE) &&
+ pDevice->AnInfo.mr_an_complete
+ && pDevice->AnInfo.mr_link_ok
+ && pDevice->AnInfo.mr_lp_adv_full_duplex) {
+ LM_UINT32 RemotePhyAd;
+ LM_UINT32 LocalPhyAd;
+
+ LocalPhyAd = 0;
+ if (pDevice->AnInfo.mr_adv_sym_pause) {
+ LocalPhyAd |= PHY_AN_AD_PAUSE_CAPABLE;
+ }
+
+ if (pDevice->AnInfo.mr_adv_asym_pause) {
+ LocalPhyAd |= PHY_AN_AD_ASYM_PAUSE;
+ }
+
+ RemotePhyAd = 0;
+ if (pDevice->AnInfo.mr_lp_adv_sym_pause) {
+ RemotePhyAd |=
+ PHY_LINK_PARTNER_PAUSE_CAPABLE;
+ }
+
+ if (pDevice->AnInfo.mr_lp_adv_asym_pause) {
+ RemotePhyAd |=
+ PHY_LINK_PARTNER_ASYM_PAUSE;
+ }
+
+ LM_SetFlowControl (pDevice, LocalPhyAd,
+ RemotePhyAd);
+
+ CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
+ }
+ for (j = 0; j < 30; j++) {
+ MM_Wait (20);
+ REG_WR (pDevice, MacCtrl.Status,
+ MAC_STATUS_SYNC_CHANGED |
+ MAC_STATUS_CFG_CHANGED);
+ MM_Wait (20);
+ if ((REG_RD (pDevice, MacCtrl.Status) &
+ (MAC_STATUS_SYNC_CHANGED |
+ MAC_STATUS_CFG_CHANGED)) == 0)
+ break;
+ }
+ if (pDevice->PollTbiLink) {
+ Value32 = REG_RD (pDevice, MacCtrl.Status);
+ if (Value32 & MAC_STATUS_RECEIVING_CFG) {
+ pDevice->IgnoreTbiLinkChange = TRUE;
+ } else {
+ pDevice->IgnoreTbiLinkChange = FALSE;
+ }
+ }
+ Value32 = REG_RD (pDevice, MacCtrl.Status);
+ if (CurrentLinkStatus == LM_STATUS_LINK_DOWN &&
+ (Value32 & MAC_STATUS_PCS_SYNCED) &&
+ ((Value32 & MAC_STATUS_RECEIVING_CFG) == 0)) {
+ CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
+ }
+ } else {
+ /* We are forcing line speed. */
+ pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE;
+ LM_SetFlowControl (pDevice, 0, 0);
+
+ CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode |
+ MAC_MODE_SEND_CONFIGS);
+ }
}
- }
+ /* Set the link polarity bit. */
+ pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY;
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode);
- /* Initialize the current link status. */
- if(CurrentLinkStatus == LM_STATUS_LINK_ACTIVE)
- {
- pDevice->LineSpeed = LM_LINE_SPEED_1000MBPS;
- pDevice->DuplexMode = LM_DUPLEX_MODE_FULL;
- REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED |
- LED_CTRL_1000MBPS_LED_ON);
- }
- else
- {
- pDevice->LineSpeed = LM_LINE_SPEED_UNKNOWN;
- pDevice->DuplexMode = LM_DUPLEX_MODE_UNKNOWN;
- REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED |
- LED_CTRL_OVERRIDE_TRAFFIC_LED);
- }
+ pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED |
+ (pDevice->pStatusBlkVirt->
+ Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS);
- /* Indicate link status. */
- if (pDevice->LinkStatus != CurrentLinkStatus) {
- pDevice->LinkStatus = CurrentLinkStatus;
- MM_IndicateStatus(pDevice, CurrentLinkStatus);
- }
+ for (j = 0; j < 100; j++) {
+ REG_WR (pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
+ MAC_STATUS_CFG_CHANGED);
+ MM_Wait (5);
+ if ((REG_RD (pDevice, MacCtrl.Status) &
+ (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0)
+ break;
+ }
- return LM_STATUS_SUCCESS;
+ Value32 = REG_RD (pDevice, MacCtrl.Status);
+ if ((Value32 & MAC_STATUS_PCS_SYNCED) == 0) {
+ CurrentLinkStatus = LM_STATUS_LINK_DOWN;
+ if (pDevice->DisableAutoNeg == FALSE) {
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode |
+ MAC_MODE_SEND_CONFIGS);
+ MM_Wait (1);
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode);
+ }
+ }
+
+ /* Initialize the current link status. */
+ if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) {
+ pDevice->LineSpeed = LM_LINE_SPEED_1000MBPS;
+ pDevice->DuplexMode = LM_DUPLEX_MODE_FULL;
+ REG_WR (pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED |
+ LED_CTRL_1000MBPS_LED_ON);
+ } else {
+ pDevice->LineSpeed = LM_LINE_SPEED_UNKNOWN;
+ pDevice->DuplexMode = LM_DUPLEX_MODE_UNKNOWN;
+ REG_WR (pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED |
+ LED_CTRL_OVERRIDE_TRAFFIC_LED);
+ }
+
+ /* Indicate link status. */
+ if (pDevice->LinkStatus != CurrentLinkStatus) {
+ pDevice->LinkStatus = CurrentLinkStatus;
+ MM_IndicateStatus (pDevice, CurrentLinkStatus);
+ }
+
+ return LM_STATUS_SUCCESS;
}
-#endif /* INCLUDE_TBI_SUPPORT */
-
+#endif /* INCLUDE_TBI_SUPPORT */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-LM_STATUS
-LM_SetupCopperPhy(
- PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_SetupCopperPhy (PLM_DEVICE_BLOCK pDevice)
{
- LM_STATUS CurrentLinkStatus;
- LM_UINT32 Value32;
+ LM_STATUS CurrentLinkStatus;
+ LM_UINT32 Value32;
- /* Assume there is not link first. */
- CurrentLinkStatus = LM_STATUS_LINK_DOWN;
+ /* Assume there is not link first. */
+ CurrentLinkStatus = LM_STATUS_LINK_DOWN;
- /* Disable phy link change attention. */
- REG_WR(pDevice, MacCtrl.MacEvent, 0);
+ /* Disable phy link change attention. */
+ REG_WR (pDevice, MacCtrl.MacEvent, 0);
- /* Clear link change attention. */
- REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
- MAC_STATUS_CFG_CHANGED);
+ /* Clear link change attention. */
+ REG_WR (pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
+ MAC_STATUS_CFG_CHANGED);
- /* Disable auto-polling for the moment. */
- pDevice->MiMode = 0xc0000;
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode);
- MM_Wait(40);
+ /* Disable auto-polling for the moment. */
+ pDevice->MiMode = 0xc0000;
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode);
+ MM_Wait (40);
- /* Determine the requested line speed and duplex. */
- pDevice->OldLineSpeed = pDevice->LineSpeed;
- LM_TranslateRequestedMediaType(pDevice->RequestedMediaType,
- &pDevice->MediaType, &pDevice->LineSpeed, &pDevice->DuplexMode);
+ /* Determine the requested line speed and duplex. */
+ pDevice->OldLineSpeed = pDevice->LineSpeed;
+ LM_TranslateRequestedMediaType (pDevice->RequestedMediaType,
+ &pDevice->MediaType,
+ &pDevice->LineSpeed,
+ &pDevice->DuplexMode);
- /* Initialize the phy chip. */
- switch(pDevice->PhyId & PHY_ID_MASK)
- {
+ /* Initialize the phy chip. */
+ switch (pDevice->PhyId & PHY_ID_MASK) {
case PHY_BCM5400_PHY_ID:
case PHY_BCM5401_PHY_ID:
case PHY_BCM5411_PHY_ID:
case PHY_BCM5701_PHY_ID:
case PHY_BCM5703_PHY_ID:
case PHY_BCM5704_PHY_ID:
- CurrentLinkStatus = LM_InitBcm540xPhy(pDevice);
- break;
+ CurrentLinkStatus = LM_InitBcm540xPhy (pDevice);
+ break;
default:
- break;
- }
+ break;
+ }
- if(CurrentLinkStatus == LM_STATUS_LINK_SETTING_MISMATCH)
- {
- CurrentLinkStatus = LM_STATUS_LINK_DOWN;
- }
+ if (CurrentLinkStatus == LM_STATUS_LINK_SETTING_MISMATCH) {
+ CurrentLinkStatus = LM_STATUS_LINK_DOWN;
+ }
- /* Setup flow control. */
- pDevice->FlowControl = LM_FLOW_CONTROL_NONE;
- if(CurrentLinkStatus == LM_STATUS_LINK_ACTIVE)
- {
- LM_FLOW_CONTROL FlowCap; /* Flow control capability. */
+ /* Setup flow control. */
+ pDevice->FlowControl = LM_FLOW_CONTROL_NONE;
+ if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) {
+ LM_FLOW_CONTROL FlowCap; /* Flow control capability. */
- FlowCap = LM_FLOW_CONTROL_NONE;
+ FlowCap = LM_FLOW_CONTROL_NONE;
- if(pDevice->DuplexMode == LM_DUPLEX_MODE_FULL)
- {
- if(pDevice->DisableAutoNeg == FALSE ||
- pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO ||
- pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO)
- {
- LM_UINT32 ExpectedPhyAd;
- LM_UINT32 LocalPhyAd;
- LM_UINT32 RemotePhyAd;
+ if (pDevice->DuplexMode == LM_DUPLEX_MODE_FULL) {
+ if (pDevice->DisableAutoNeg == FALSE ||
+ pDevice->RequestedMediaType ==
+ LM_REQUESTED_MEDIA_TYPE_AUTO
+ || pDevice->RequestedMediaType ==
+ LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) {
+ LM_UINT32 ExpectedPhyAd;
+ LM_UINT32 LocalPhyAd;
+ LM_UINT32 RemotePhyAd;
- LM_ReadPhy(pDevice, PHY_AN_AD_REG, &LocalPhyAd);
- pDevice->advertising = LocalPhyAd;
- LocalPhyAd &= (PHY_AN_AD_ASYM_PAUSE | PHY_AN_AD_PAUSE_CAPABLE);
+ LM_ReadPhy (pDevice, PHY_AN_AD_REG,
+ &LocalPhyAd);
+ pDevice->advertising = LocalPhyAd;
+ LocalPhyAd &=
+ (PHY_AN_AD_ASYM_PAUSE |
+ PHY_AN_AD_PAUSE_CAPABLE);
- ExpectedPhyAd = GetPhyAdFlowCntrlSettings(pDevice);
+ ExpectedPhyAd =
+ GetPhyAdFlowCntrlSettings (pDevice);
- if(LocalPhyAd != ExpectedPhyAd)
- {
- CurrentLinkStatus = LM_STATUS_LINK_DOWN;
+ if (LocalPhyAd != ExpectedPhyAd) {
+ CurrentLinkStatus = LM_STATUS_LINK_DOWN;
+ } else {
+ LM_ReadPhy (pDevice,
+ PHY_LINK_PARTNER_ABILITY_REG,
+ &RemotePhyAd);
+
+ LM_SetFlowControl (pDevice, LocalPhyAd,
+ RemotePhyAd);
+ }
+ } else {
+ pDevice->FlowControlCap &=
+ ~LM_FLOW_CONTROL_AUTO_PAUSE;
+ LM_SetFlowControl (pDevice, 0, 0);
+ }
}
- else
- {
- LM_ReadPhy(pDevice, PHY_LINK_PARTNER_ABILITY_REG,
- &RemotePhyAd);
+ }
- LM_SetFlowControl(pDevice, LocalPhyAd, RemotePhyAd);
+ if (CurrentLinkStatus == LM_STATUS_LINK_DOWN) {
+ LM_ForceAutoNeg (pDevice, pDevice->RequestedMediaType);
+
+ /* If we force line speed, we make get link right away. */
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ if (Value32 & PHY_STATUS_LINK_PASS) {
+ CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
}
- }
- else
- {
- pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE;
- LM_SetFlowControl(pDevice, 0, 0);
- }
- }
- }
-
- if(CurrentLinkStatus == LM_STATUS_LINK_DOWN)
- {
- LM_ForceAutoNeg(pDevice, pDevice->RequestedMediaType);
-
- /* If we force line speed, we make get link right away. */
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- if(Value32 & PHY_STATUS_LINK_PASS)
- {
- CurrentLinkStatus = LM_STATUS_LINK_ACTIVE;
- }
- }
-
- /* GMII interface. */
- pDevice->MacMode &= ~MAC_MODE_PORT_MODE_MASK;
- if(CurrentLinkStatus == LM_STATUS_LINK_ACTIVE)
- {
- if(pDevice->LineSpeed == LM_LINE_SPEED_100MBPS ||
- pDevice->LineSpeed == LM_LINE_SPEED_10MBPS)
- {
- pDevice->MacMode |= MAC_MODE_PORT_MODE_MII;
- }
- else
- {
- pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII;
- }
- }
- else {
- pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII;
- }
-
- /* Set the MAC to operate in the appropriate duplex mode. */
- pDevice->MacMode &= ~MAC_MODE_HALF_DUPLEX;
- if(pDevice->DuplexMode == LM_DUPLEX_MODE_HALF)
- {
- pDevice->MacMode |= MAC_MODE_HALF_DUPLEX;
- }
-
- /* Set the link polarity bit. */
- pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY;
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- if((pDevice->LedMode == LED_MODE_LINK10) ||
- (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE &&
- pDevice->LineSpeed == LM_LINE_SPEED_10MBPS))
- {
- pDevice->MacMode |= MAC_MODE_LINK_POLARITY;
- }
- }
- else
- {
- if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE)
- {
- pDevice->MacMode |= MAC_MODE_LINK_POLARITY;
}
- /* Set LED mode. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = LED_CTRL_PHY_MODE_1;
+ /* GMII interface. */
+ pDevice->MacMode &= ~MAC_MODE_PORT_MODE_MASK;
+ if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) {
+ if (pDevice->LineSpeed == LM_LINE_SPEED_100MBPS ||
+ pDevice->LineSpeed == LM_LINE_SPEED_10MBPS) {
+ pDevice->MacMode |= MAC_MODE_PORT_MODE_MII;
+ } else {
+ pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII;
+ }
+ } else {
+ pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII;
}
- else
- {
- if(pDevice->LedMode == LED_MODE_OUTPUT)
- {
- Value32 = LED_CTRL_PHY_MODE_2;
- }
- else
- {
- Value32 = LED_CTRL_PHY_MODE_1;
- }
+
+ /* Set the MAC to operate in the appropriate duplex mode. */
+ pDevice->MacMode &= ~MAC_MODE_HALF_DUPLEX;
+ if (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF) {
+ pDevice->MacMode |= MAC_MODE_HALF_DUPLEX;
}
- REG_WR(pDevice, MacCtrl.LedCtrl, Value32);
- }
- REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode);
+ /* Set the link polarity bit. */
+ pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY;
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ if ((pDevice->LedMode == LED_MODE_LINK10) ||
+ (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE &&
+ pDevice->LineSpeed == LM_LINE_SPEED_10MBPS)) {
+ pDevice->MacMode |= MAC_MODE_LINK_POLARITY;
+ }
+ } else {
+ if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) {
+ pDevice->MacMode |= MAC_MODE_LINK_POLARITY;
+ }
- /* Enable auto polling. */
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING)
- {
- pDevice->MiMode |= MI_MODE_AUTO_POLLING_ENABLE;
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode);
- }
-
- /* Enable phy link change attention. */
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT)
- {
- REG_WR(pDevice, MacCtrl.MacEvent, MAC_EVENT_ENABLE_MI_INTERRUPT);
- }
- else
- {
- REG_WR(pDevice, MacCtrl.MacEvent,
- MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN);
- }
- if ((T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) &&
- (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) &&
- (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) &&
- (((pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) &&
- (pDevice->PciState & T3_PCI_STATE_BUS_SPEED_HIGH)) ||
- !(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)))
- {
- MM_Wait(120);
- REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
- MAC_STATUS_CFG_CHANGED);
- MEM_WR_OFFSET(pDevice, T3_FIRMWARE_MAILBOX,
- T3_MAGIC_NUM_DISABLE_DMAW_ON_LINK_CHANGE);
- }
-
- /* Indicate link status. */
- if (pDevice->LinkStatus != CurrentLinkStatus) {
- pDevice->LinkStatus = CurrentLinkStatus;
- MM_IndicateStatus(pDevice, CurrentLinkStatus);
- }
-
- return LM_STATUS_SUCCESS;
-} /* LM_SetupCopperPhy */
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_STATUS
-LM_SetupPhy(
- PLM_DEVICE_BLOCK pDevice)
-{
- LM_STATUS LmStatus;
- LM_UINT32 Value32;
-
-#if INCLUDE_TBI_SUPPORT
- if(pDevice->EnableTbi)
- {
- LmStatus = LM_SetupFiberPhy(pDevice);
- }
- else
-#endif /* INCLUDE_TBI_SUPPORT */
- {
- LmStatus = LM_SetupCopperPhy(pDevice);
- }
- if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0)
- {
- if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))
- {
- Value32 = REG_RD(pDevice, PciCfg.PciState);
- REG_WR(pDevice, PciCfg.PciState,
- Value32 | T3_PCI_STATE_RETRY_SAME_DMA);
+ /* Set LED mode. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 = LED_CTRL_PHY_MODE_1;
+ } else {
+ if (pDevice->LedMode == LED_MODE_OUTPUT) {
+ Value32 = LED_CTRL_PHY_MODE_2;
+ } else {
+ Value32 = LED_CTRL_PHY_MODE_1;
+ }
+ }
+ REG_WR (pDevice, MacCtrl.LedCtrl, Value32);
}
- }
- if ((pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) &&
- (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF))
- {
- REG_WR(pDevice, MacCtrl.TxLengths, 0x26ff);
- }
- else
- {
- REG_WR(pDevice, MacCtrl.TxLengths, 0x2620);
- }
- return LmStatus;
-}
+ REG_WR (pDevice, MacCtrl.Mode, pDevice->MacMode);
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_VOID
-LM_ReadPhy(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 PhyReg,
-PLM_UINT32 pData32) {
- LM_UINT32 Value32;
- LM_UINT32 j;
-
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING)
- {
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode &
- ~MI_MODE_AUTO_POLLING_ENABLE);
- MM_Wait(40);
- }
-
- Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) |
- ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << MI_COM_FIRST_PHY_REG_ADDR_BIT) |
- MI_COM_CMD_READ | MI_COM_START;
-
- REG_WR(pDevice, MacCtrl.MiCom, Value32);
-
- for(j = 0; j < 20; j++)
- {
- MM_Wait(25);
-
- Value32 = REG_RD(pDevice, MacCtrl.MiCom);
-
- if(!(Value32 & MI_COM_BUSY))
- {
- MM_Wait(5);
- Value32 = REG_RD(pDevice, MacCtrl.MiCom);
- Value32 &= MI_COM_PHY_DATA_MASK;
- break;
+ /* Enable auto polling. */
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) {
+ pDevice->MiMode |= MI_MODE_AUTO_POLLING_ENABLE;
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode);
}
- }
- if(Value32 & MI_COM_BUSY)
- {
- Value32 = 0;
- }
-
- *pData32 = Value32;
-
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING)
- {
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode);
- MM_Wait(40);
- }
-} /* LM_ReadPhy */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_VOID
-LM_WritePhy(
-PLM_DEVICE_BLOCK pDevice,
-LM_UINT32 PhyReg,
-LM_UINT32 Data32) {
- LM_UINT32 Value32;
- LM_UINT32 j;
-
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING)
- {
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode &
- ~MI_MODE_AUTO_POLLING_ENABLE);
- MM_Wait(40);
- }
-
- Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) |
- ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << MI_COM_FIRST_PHY_REG_ADDR_BIT) |
- (Data32 & MI_COM_PHY_DATA_MASK) | MI_COM_CMD_WRITE | MI_COM_START;
-
- REG_WR(pDevice, MacCtrl.MiCom, Value32);
-
- for(j = 0; j < 20; j++)
- {
- MM_Wait(25);
-
- Value32 = REG_RD(pDevice, MacCtrl.MiCom);
-
- if(!(Value32 & MI_COM_BUSY))
- {
- MM_Wait(5);
- break;
+ /* Enable phy link change attention. */
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) {
+ REG_WR (pDevice, MacCtrl.MacEvent,
+ MAC_EVENT_ENABLE_MI_INTERRUPT);
+ } else {
+ REG_WR (pDevice, MacCtrl.MacEvent,
+ MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN);
}
- }
+ if ((T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) &&
+ (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) &&
+ (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) &&
+ (((pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) &&
+ (pDevice->PciState & T3_PCI_STATE_BUS_SPEED_HIGH)) ||
+ !(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))) {
+ MM_Wait (120);
+ REG_WR (pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED |
+ MAC_STATUS_CFG_CHANGED);
+ MEM_WR_OFFSET (pDevice, T3_FIRMWARE_MAILBOX,
+ T3_MAGIC_NUM_DISABLE_DMAW_ON_LINK_CHANGE);
+ }
- if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING)
- {
- REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode);
- MM_Wait(40);
- }
-} /* LM_WritePhy */
-
-
-/******************************************************************************/
-/* Description: */
-/* */
-/* Return: */
-/******************************************************************************/
-LM_STATUS
-LM_SetPowerState(
-PLM_DEVICE_BLOCK pDevice,
-LM_POWER_STATE PowerLevel) {
- LM_UINT32 PmeSupport;
- LM_UINT32 Value32;
- LM_UINT32 PmCtrl;
-
- /* make sureindirect accesses are enabled*/
- MM_WriteConfig32(pDevice, T3_PCI_MISC_HOST_CTRL_REG, pDevice->MiscHostCtrl);
-
- /* Clear the PME_ASSERT bit and the power state bits. Also enable */
- /* the PME bit. */
- MM_ReadConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, &PmCtrl);
-
- PmCtrl |= T3_PM_PME_ASSERTED;
- PmCtrl &= ~T3_PM_POWER_STATE_MASK;
-
- /* Set the appropriate power state. */
- if(PowerLevel == LM_POWER_STATE_D0)
- {
-
- /* Bring the card out of low power mode. */
- PmCtrl |= T3_PM_POWER_STATE_D0;
- MM_WriteConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl);
-
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl);
- MM_Wait (40);
-#if 0 /* Bugfix by jmb...can't call WritePhy here because pDevice not fully initialized */
- LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x02);
-#endif
+ /* Indicate link status. */
+ if (pDevice->LinkStatus != CurrentLinkStatus) {
+ pDevice->LinkStatus = CurrentLinkStatus;
+ MM_IndicateStatus (pDevice, CurrentLinkStatus);
+ }
return LM_STATUS_SUCCESS;
- }
- else if(PowerLevel == LM_POWER_STATE_D1)
- {
- PmCtrl |= T3_PM_POWER_STATE_D1;
- }
- else if(PowerLevel == LM_POWER_STATE_D2)
- {
- PmCtrl |= T3_PM_POWER_STATE_D2;
- }
- else if(PowerLevel == LM_POWER_STATE_D3)
- {
- PmCtrl |= T3_PM_POWER_STATE_D3;
- }
- else
- {
- return LM_STATUS_FAILURE;
- }
- PmCtrl |= T3_PM_PME_ENABLE;
-
- /* Mask out all interrupts so LM_SetupPhy won't be called while we are */
- /* setting new line speed. */
- Value32 = REG_RD(pDevice, PciCfg.MiscHostCtrl);
- REG_WR(pDevice, PciCfg.MiscHostCtrl, Value32 | MISC_HOST_CTRL_MASK_PCI_INT);
-
- if(!pDevice->RestoreOnWakeUp)
- {
- pDevice->RestoreOnWakeUp = TRUE;
- pDevice->WakeUpDisableAutoNeg = pDevice->DisableAutoNeg;
- pDevice->WakeUpRequestedMediaType = pDevice->RequestedMediaType;
- }
-
- /* Force auto-negotiation to 10 line speed. */
- pDevice->DisableAutoNeg = FALSE;
- pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS;
- LM_SetupPhy(pDevice);
-
- /* Put the driver in the initial state, and go through the power down */
- /* sequence. */
- LM_Halt(pDevice);
-
- MM_ReadConfig32(pDevice, T3_PCI_PM_CAP_REG, &PmeSupport);
-
- if (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE)
- {
-
- /* Enable WOL. */
- LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x5a);
- MM_Wait(40);
-
- /* Set LED mode. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = LED_CTRL_PHY_MODE_1;
- }
- else
- {
- if(pDevice->LedMode == LED_MODE_OUTPUT)
- {
- Value32 = LED_CTRL_PHY_MODE_2;
- }
- else
- {
- Value32 = LED_CTRL_PHY_MODE_1;
- }
- }
-
- Value32 = MAC_MODE_PORT_MODE_MII;
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)
- {
- if(pDevice->LedMode == LED_MODE_LINK10 ||
- pDevice->WolSpeed == WOL_SPEED_10MB)
- {
- Value32 |= MAC_MODE_LINK_POLARITY;
- }
- }
- else
- {
- Value32 |= MAC_MODE_LINK_POLARITY;
- }
- REG_WR(pDevice, MacCtrl.Mode, Value32);
- MM_Wait(40); MM_Wait(40); MM_Wait(40);
-
- /* Always enable magic packet wake-up if we have vaux. */
- if((PmeSupport & T3_PCI_PM_CAP_PME_D3COLD) &&
- (pDevice->WakeUpModeCap & LM_WAKE_UP_MODE_MAGIC_PACKET))
- {
- Value32 |= MAC_MODE_DETECT_MAGIC_PACKET_ENABLE;
- }
-
- REG_WR(pDevice, MacCtrl.Mode, Value32);
-
- /* Enable the receiver. */
- REG_WR(pDevice, MacCtrl.RxMode, RX_MODE_ENABLE);
- }
-
- /* Disable tx/rx clocks, and seletect an alternate clock. */
- if(pDevice->WolSpeed == WOL_SPEED_100MB)
- {
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
- T3_PCI_SELECT_ALTERNATE_CLOCK;
- }
- else
- {
- Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK;
- }
- REG_WR(pDevice, PciCfg.ClockCtrl, Value32);
-
- MM_Wait(40);
-
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
- T3_PCI_SELECT_ALTERNATE_CLOCK | T3_PCI_44MHZ_CORE_CLOCK;
- }
- else
- {
- Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK |
- T3_PCI_44MHZ_CORE_CLOCK;
- }
-
- REG_WR(pDevice, PciCfg.ClockCtrl, Value32);
-
- MM_Wait(40);
-
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
- T3_PCI_44MHZ_CORE_CLOCK;
- }
- else
- {
- Value32 = T3_PCI_44MHZ_CORE_CLOCK;
- }
-
- REG_WR(pDevice, PciCfg.ClockCtrl, Value32);
- }
- else
- {
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
- T3_PCI_SELECT_ALTERNATE_CLOCK |
- T3_PCI_POWER_DOWN_PCI_PLL133;
- }
- else
- {
- Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK |
- T3_PCI_POWER_DOWN_PCI_PLL133;
- }
-
- REG_WR(pDevice, PciCfg.ClockCtrl, Value32);
- }
-
- MM_Wait(40);
-
- if(!pDevice->EepromWp && (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE))
- {
- /* Switch adapter to auxilliary power. */
- if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
- T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701)
- {
- /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
- GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1);
- MM_Wait(40);
- }
- else
- {
- /* GPIO0 = 0, GPIO1 = 1, GPIO2 = 1. */
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
- GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2);
- MM_Wait(40);
-
- /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 1. */
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
- GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2);
- MM_Wait(40);
-
- /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */
- REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
- GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
- GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 |
- GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1);
- MM_Wait(40);
- }
- }
-
- /* Set the phy to low power mode. */
- /* Put the the hardware in low power mode. */
- MM_WriteConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl);
-
- return LM_STATUS_SUCCESS;
-} /* LM_SetPowerState */
-
+} /* LM_SetupCopperPhy */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-static LM_UINT32
-GetPhyAdFlowCntrlSettings(
- PLM_DEVICE_BLOCK pDevice)
+LM_STATUS LM_SetupPhy (PLM_DEVICE_BLOCK pDevice)
{
- LM_UINT32 Value32;
+ LM_STATUS LmStatus;
+ LM_UINT32 Value32;
- Value32 = 0;
+#if INCLUDE_TBI_SUPPORT
+ if (pDevice->EnableTbi) {
+ LmStatus = LM_SetupFiberPhy (pDevice);
+ } else
+#endif /* INCLUDE_TBI_SUPPORT */
+ {
+ LmStatus = LM_SetupCopperPhy (pDevice);
+ }
+ if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) {
+ if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) {
+ Value32 = REG_RD (pDevice, PciCfg.PciState);
+ REG_WR (pDevice, PciCfg.PciState,
+ Value32 | T3_PCI_STATE_RETRY_SAME_DMA);
+ }
+ }
+ if ((pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) &&
+ (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF)) {
+ REG_WR (pDevice, MacCtrl.TxLengths, 0x26ff);
+ } else {
+ REG_WR (pDevice, MacCtrl.TxLengths, 0x2620);
+ }
- /* Auto negotiation flow control only when autonegotiation is enabled. */
- if(pDevice->DisableAutoNeg == FALSE ||
- pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO ||
- pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO)
- {
- /* Please refer to Table 28B-3 of the 802.3ab-1999 spec. */
- if((pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE) ||
- ((pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) &&
- (pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE)))
- {
- Value32 |= PHY_AN_AD_PAUSE_CAPABLE;
- }
- else if(pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE)
- {
- Value32 |= PHY_AN_AD_ASYM_PAUSE;
- }
- else if(pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE)
- {
- Value32 |= PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE;
- }
- }
-
- return Value32;
+ return LmStatus;
}
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+LM_VOID
+LM_ReadPhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, PLM_UINT32 pData32)
+{
+ LM_UINT32 Value32;
+ LM_UINT32 j;
+
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) {
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode &
+ ~MI_MODE_AUTO_POLLING_ENABLE);
+ MM_Wait (40);
+ }
+
+ Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) |
+ ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) <<
+ MI_COM_FIRST_PHY_REG_ADDR_BIT) | MI_COM_CMD_READ | MI_COM_START;
+
+ REG_WR (pDevice, MacCtrl.MiCom, Value32);
+
+ for (j = 0; j < 20; j++) {
+ MM_Wait (25);
+
+ Value32 = REG_RD (pDevice, MacCtrl.MiCom);
+
+ if (!(Value32 & MI_COM_BUSY)) {
+ MM_Wait (5);
+ Value32 = REG_RD (pDevice, MacCtrl.MiCom);
+ Value32 &= MI_COM_PHY_DATA_MASK;
+ break;
+ }
+ }
+
+ if (Value32 & MI_COM_BUSY) {
+ Value32 = 0;
+ }
+
+ *pData32 = Value32;
+
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) {
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode);
+ MM_Wait (40);
+ }
+} /* LM_ReadPhy */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+LM_VOID
+LM_WritePhy (PLM_DEVICE_BLOCK pDevice, LM_UINT32 PhyReg, LM_UINT32 Data32)
+{
+ LM_UINT32 Value32;
+ LM_UINT32 j;
+
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) {
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode &
+ ~MI_MODE_AUTO_POLLING_ENABLE);
+ MM_Wait (40);
+ }
+
+ Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) |
+ ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) <<
+ MI_COM_FIRST_PHY_REG_ADDR_BIT) | (Data32 & MI_COM_PHY_DATA_MASK) |
+ MI_COM_CMD_WRITE | MI_COM_START;
+
+ REG_WR (pDevice, MacCtrl.MiCom, Value32);
+
+ for (j = 0; j < 20; j++) {
+ MM_Wait (25);
+
+ Value32 = REG_RD (pDevice, MacCtrl.MiCom);
+
+ if (!(Value32 & MI_COM_BUSY)) {
+ MM_Wait (5);
+ break;
+ }
+ }
+
+ if (pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) {
+ REG_WR (pDevice, MacCtrl.MiMode, pDevice->MiMode);
+ MM_Wait (40);
+ }
+} /* LM_WritePhy */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+LM_STATUS LM_SetPowerState (PLM_DEVICE_BLOCK pDevice, LM_POWER_STATE PowerLevel)
+{
+ LM_UINT32 PmeSupport;
+ LM_UINT32 Value32;
+ LM_UINT32 PmCtrl;
+
+ /* make sureindirect accesses are enabled */
+ MM_WriteConfig32 (pDevice, T3_PCI_MISC_HOST_CTRL_REG,
+ pDevice->MiscHostCtrl);
+
+ /* Clear the PME_ASSERT bit and the power state bits. Also enable */
+ /* the PME bit. */
+ MM_ReadConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, &PmCtrl);
+
+ PmCtrl |= T3_PM_PME_ASSERTED;
+ PmCtrl &= ~T3_PM_POWER_STATE_MASK;
+
+ /* Set the appropriate power state. */
+ if (PowerLevel == LM_POWER_STATE_D0) {
+
+ /* Bring the card out of low power mode. */
+ PmCtrl |= T3_PM_POWER_STATE_D0;
+ MM_WriteConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl);
+
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl);
+ MM_Wait (40);
+#if 0 /* Bugfix by jmb...can't call WritePhy here because pDevice not fully initialized */
+ LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x02);
+#endif
+
+ return LM_STATUS_SUCCESS;
+ } else if (PowerLevel == LM_POWER_STATE_D1) {
+ PmCtrl |= T3_PM_POWER_STATE_D1;
+ } else if (PowerLevel == LM_POWER_STATE_D2) {
+ PmCtrl |= T3_PM_POWER_STATE_D2;
+ } else if (PowerLevel == LM_POWER_STATE_D3) {
+ PmCtrl |= T3_PM_POWER_STATE_D3;
+ } else {
+ return LM_STATUS_FAILURE;
+ }
+ PmCtrl |= T3_PM_PME_ENABLE;
+
+ /* Mask out all interrupts so LM_SetupPhy won't be called while we are */
+ /* setting new line speed. */
+ Value32 = REG_RD (pDevice, PciCfg.MiscHostCtrl);
+ REG_WR (pDevice, PciCfg.MiscHostCtrl,
+ Value32 | MISC_HOST_CTRL_MASK_PCI_INT);
+
+ if (!pDevice->RestoreOnWakeUp) {
+ pDevice->RestoreOnWakeUp = TRUE;
+ pDevice->WakeUpDisableAutoNeg = pDevice->DisableAutoNeg;
+ pDevice->WakeUpRequestedMediaType = pDevice->RequestedMediaType;
+ }
+
+ /* Force auto-negotiation to 10 line speed. */
+ pDevice->DisableAutoNeg = FALSE;
+ pDevice->RequestedMediaType = LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS;
+ LM_SetupPhy (pDevice);
+
+ /* Put the driver in the initial state, and go through the power down */
+ /* sequence. */
+ LM_Halt (pDevice);
+
+ MM_ReadConfig32 (pDevice, T3_PCI_PM_CAP_REG, &PmeSupport);
+
+ if (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE) {
+
+ /* Enable WOL. */
+ LM_WritePhy (pDevice, BCM5401_AUX_CTRL, 0x5a);
+ MM_Wait (40);
+
+ /* Set LED mode. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 = LED_CTRL_PHY_MODE_1;
+ } else {
+ if (pDevice->LedMode == LED_MODE_OUTPUT) {
+ Value32 = LED_CTRL_PHY_MODE_2;
+ } else {
+ Value32 = LED_CTRL_PHY_MODE_1;
+ }
+ }
+
+ Value32 = MAC_MODE_PORT_MODE_MII;
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700) {
+ if (pDevice->LedMode == LED_MODE_LINK10 ||
+ pDevice->WolSpeed == WOL_SPEED_10MB) {
+ Value32 |= MAC_MODE_LINK_POLARITY;
+ }
+ } else {
+ Value32 |= MAC_MODE_LINK_POLARITY;
+ }
+ REG_WR (pDevice, MacCtrl.Mode, Value32);
+ MM_Wait (40);
+ MM_Wait (40);
+ MM_Wait (40);
+
+ /* Always enable magic packet wake-up if we have vaux. */
+ if ((PmeSupport & T3_PCI_PM_CAP_PME_D3COLD) &&
+ (pDevice->WakeUpModeCap & LM_WAKE_UP_MODE_MAGIC_PACKET)) {
+ Value32 |= MAC_MODE_DETECT_MAGIC_PACKET_ENABLE;
+ }
+
+ REG_WR (pDevice, MacCtrl.Mode, Value32);
+
+ /* Enable the receiver. */
+ REG_WR (pDevice, MacCtrl.RxMode, RX_MODE_ENABLE);
+ }
+
+ /* Disable tx/rx clocks, and seletect an alternate clock. */
+ if (pDevice->WolSpeed == WOL_SPEED_100MB) {
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 =
+ T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
+ T3_PCI_SELECT_ALTERNATE_CLOCK;
+ } else {
+ Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK;
+ }
+ REG_WR (pDevice, PciCfg.ClockCtrl, Value32);
+
+ MM_Wait (40);
+
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 =
+ T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
+ T3_PCI_SELECT_ALTERNATE_CLOCK |
+ T3_PCI_44MHZ_CORE_CLOCK;
+ } else {
+ Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK |
+ T3_PCI_44MHZ_CORE_CLOCK;
+ }
+
+ REG_WR (pDevice, PciCfg.ClockCtrl, Value32);
+
+ MM_Wait (40);
+
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 =
+ T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
+ T3_PCI_44MHZ_CORE_CLOCK;
+ } else {
+ Value32 = T3_PCI_44MHZ_CORE_CLOCK;
+ }
+
+ REG_WR (pDevice, PciCfg.ClockCtrl, Value32);
+ } else {
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ Value32 =
+ T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK |
+ T3_PCI_SELECT_ALTERNATE_CLOCK |
+ T3_PCI_POWER_DOWN_PCI_PLL133;
+ } else {
+ Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK |
+ T3_PCI_POWER_DOWN_PCI_PLL133;
+ }
+
+ REG_WR (pDevice, PciCfg.ClockCtrl, Value32);
+ }
+
+ MM_Wait (40);
+
+ if (!pDevice->EepromWp
+ && (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE)) {
+ /* Switch adapter to auxilliary power. */
+ if (T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5700 ||
+ T3_ASIC_REV (pDevice->ChipRevId) == T3_ASIC_REV_5701) {
+ /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1);
+ MM_Wait (40);
+ } else {
+ /* GPIO0 = 0, GPIO1 = 1, GPIO2 = 1. */
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2);
+ MM_Wait (40);
+
+ /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 1. */
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2);
+ MM_Wait (40);
+
+ /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */
+ REG_WR (pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE1 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OE2 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 |
+ GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1);
+ MM_Wait (40);
+ }
+ }
+
+ /* Set the phy to low power mode. */
+ /* Put the the hardware in low power mode. */
+ MM_WriteConfig32 (pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl);
+
+ return LM_STATUS_SUCCESS;
+} /* LM_SetPowerState */
+
+/******************************************************************************/
+/* Description: */
+/* */
+/* Return: */
+/******************************************************************************/
+static LM_UINT32 GetPhyAdFlowCntrlSettings (PLM_DEVICE_BLOCK pDevice)
+{
+ LM_UINT32 Value32;
+
+ Value32 = 0;
+
+ /* Auto negotiation flow control only when autonegotiation is enabled. */
+ if (pDevice->DisableAutoNeg == FALSE ||
+ pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO ||
+ pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) {
+ /* Please refer to Table 28B-3 of the 802.3ab-1999 spec. */
+ if ((pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE) ||
+ ((pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE)
+ && (pDevice->
+ FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE))) {
+ Value32 |= PHY_AN_AD_PAUSE_CAPABLE;
+ } else if (pDevice->
+ FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE) {
+ Value32 |= PHY_AN_AD_ASYM_PAUSE;
+ } else if (pDevice->
+ FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) {
+ Value32 |=
+ PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE;
+ }
+ }
+
+ return Value32;
+}
/******************************************************************************/
/* Description: */
@@ -5632,195 +5177,169 @@
/* */
/******************************************************************************/
static LM_STATUS
-LM_ForceAutoNegBcm540xPhy(
-PLM_DEVICE_BLOCK pDevice,
-LM_REQUESTED_MEDIA_TYPE RequestedMediaType)
+LM_ForceAutoNegBcm540xPhy (PLM_DEVICE_BLOCK pDevice,
+ LM_REQUESTED_MEDIA_TYPE RequestedMediaType)
{
- LM_MEDIA_TYPE MediaType;
- LM_LINE_SPEED LineSpeed;
- LM_DUPLEX_MODE DuplexMode;
- LM_UINT32 NewPhyCtrl;
- LM_UINT32 Value32;
- LM_UINT32 Cnt;
+ LM_MEDIA_TYPE MediaType;
+ LM_LINE_SPEED LineSpeed;
+ LM_DUPLEX_MODE DuplexMode;
+ LM_UINT32 NewPhyCtrl;
+ LM_UINT32 Value32;
+ LM_UINT32 Cnt;
- /* Get the interface type, line speed, and duplex mode. */
- LM_TranslateRequestedMediaType(RequestedMediaType, &MediaType, &LineSpeed,
- &DuplexMode);
+ /* Get the interface type, line speed, and duplex mode. */
+ LM_TranslateRequestedMediaType (RequestedMediaType, &MediaType,
+ &LineSpeed, &DuplexMode);
- if (pDevice->RestoreOnWakeUp)
- {
- LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0);
- pDevice->advertising1000 = 0;
- Value32 = PHY_AN_AD_10BASET_FULL | PHY_AN_AD_10BASET_HALF;
- if (pDevice->WolSpeed == WOL_SPEED_100MB)
- {
- Value32 |= PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF;
+ if (pDevice->RestoreOnWakeUp) {
+ LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, 0);
+ pDevice->advertising1000 = 0;
+ Value32 = PHY_AN_AD_10BASET_FULL | PHY_AN_AD_10BASET_HALF;
+ if (pDevice->WolSpeed == WOL_SPEED_100MB) {
+ Value32 |=
+ PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF;
+ }
+ Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
+ Value32 |= GetPhyAdFlowCntrlSettings (pDevice);
+ LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32);
+ pDevice->advertising = Value32;
}
- Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
- Value32 |= GetPhyAdFlowCntrlSettings(pDevice);
- LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32);
- pDevice->advertising = Value32;
- }
- /* Setup the auto-negotiation advertisement register. */
- else if(LineSpeed == LM_LINE_SPEED_UNKNOWN)
- {
- /* Setup the 10/100 Mbps auto-negotiation advertisement register. */
- Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD |
- PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL |
- PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF;
- Value32 |= GetPhyAdFlowCntrlSettings(pDevice);
+ /* Setup the auto-negotiation advertisement register. */
+ else if (LineSpeed == LM_LINE_SPEED_UNKNOWN) {
+ /* Setup the 10/100 Mbps auto-negotiation advertisement register. */
+ Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD |
+ PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL |
+ PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF;
+ Value32 |= GetPhyAdFlowCntrlSettings (pDevice);
- LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32);
- pDevice->advertising = Value32;
+ LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32);
+ pDevice->advertising = Value32;
- /* Advertise 1000Mbps */
- Value32 = BCM540X_AN_AD_1000BASET_HALF | BCM540X_AN_AD_1000BASET_FULL;
+ /* Advertise 1000Mbps */
+ Value32 =
+ BCM540X_AN_AD_1000BASET_HALF | BCM540X_AN_AD_1000BASET_FULL;
#if INCLUDE_5701_AX_FIX
- /* Bug: workaround for CRC error in gigabit mode when we are in */
- /* slave mode. This will force the PHY to operate in */
- /* master mode. */
- if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
- pDevice->ChipRevId == T3_CHIP_ID_5701_B0)
- {
- Value32 |= BCM540X_CONFIG_AS_MASTER |
- BCM540X_ENABLE_CONFIG_AS_MASTER;
- }
+ /* Bug: workaround for CRC error in gigabit mode when we are in */
+ /* slave mode. This will force the PHY to operate in */
+ /* master mode. */
+ if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 ||
+ pDevice->ChipRevId == T3_CHIP_ID_5701_B0) {
+ Value32 |= BCM540X_CONFIG_AS_MASTER |
+ BCM540X_ENABLE_CONFIG_AS_MASTER;
+ }
#endif
- LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32);
- pDevice->advertising1000 = Value32;
- }
- else
- {
- if(LineSpeed == LM_LINE_SPEED_1000MBPS)
- {
- Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
- Value32 |= GetPhyAdFlowCntrlSettings(pDevice);
+ LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, Value32);
+ pDevice->advertising1000 = Value32;
+ } else {
+ if (LineSpeed == LM_LINE_SPEED_1000MBPS) {
+ Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
+ Value32 |= GetPhyAdFlowCntrlSettings (pDevice);
- LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32);
- pDevice->advertising = Value32;
+ LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32);
+ pDevice->advertising = Value32;
- if(DuplexMode != LM_DUPLEX_MODE_FULL)
- {
- Value32 = BCM540X_AN_AD_1000BASET_HALF;
- }
- else
- {
- Value32 = BCM540X_AN_AD_1000BASET_FULL;
- }
+ if (DuplexMode != LM_DUPLEX_MODE_FULL) {
+ Value32 = BCM540X_AN_AD_1000BASET_HALF;
+ } else {
+ Value32 = BCM540X_AN_AD_1000BASET_FULL;
+ }
- LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32);
- pDevice->advertising1000 = Value32;
- }
- else if(LineSpeed == LM_LINE_SPEED_100MBPS)
- {
- LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0);
- pDevice->advertising1000 = 0;
+ LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG,
+ Value32);
+ pDevice->advertising1000 = Value32;
+ } else if (LineSpeed == LM_LINE_SPEED_100MBPS) {
+ LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, 0);
+ pDevice->advertising1000 = 0;
- if(DuplexMode != LM_DUPLEX_MODE_FULL)
- {
- Value32 = PHY_AN_AD_100BASETX_HALF;
- }
- else
- {
- Value32 = PHY_AN_AD_100BASETX_FULL;
- }
+ if (DuplexMode != LM_DUPLEX_MODE_FULL) {
+ Value32 = PHY_AN_AD_100BASETX_HALF;
+ } else {
+ Value32 = PHY_AN_AD_100BASETX_FULL;
+ }
- Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
- Value32 |= GetPhyAdFlowCntrlSettings(pDevice);
+ Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
+ Value32 |= GetPhyAdFlowCntrlSettings (pDevice);
- LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32);
- pDevice->advertising = Value32;
- }
- else if(LineSpeed == LM_LINE_SPEED_10MBPS)
- {
- LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0);
- pDevice->advertising1000 = 0;
+ LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32);
+ pDevice->advertising = Value32;
+ } else if (LineSpeed == LM_LINE_SPEED_10MBPS) {
+ LM_WritePhy (pDevice, BCM540X_1000BASET_CTRL_REG, 0);
+ pDevice->advertising1000 = 0;
- if(DuplexMode != LM_DUPLEX_MODE_FULL)
- {
- Value32 = PHY_AN_AD_10BASET_HALF;
- }
- else
- {
- Value32 = PHY_AN_AD_10BASET_FULL;
- }
+ if (DuplexMode != LM_DUPLEX_MODE_FULL) {
+ Value32 = PHY_AN_AD_10BASET_HALF;
+ } else {
+ Value32 = PHY_AN_AD_10BASET_FULL;
+ }
- Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
- Value32 |= GetPhyAdFlowCntrlSettings(pDevice);
+ Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD;
+ Value32 |= GetPhyAdFlowCntrlSettings (pDevice);
- LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32);
- pDevice->advertising = Value32;
- }
- }
-
- /* Force line speed if auto-negotiation is disabled. */
- if(pDevice->DisableAutoNeg && LineSpeed != LM_LINE_SPEED_UNKNOWN)
- {
- /* This code path is executed only when there is link. */
- pDevice->MediaType = MediaType;
- pDevice->LineSpeed = LineSpeed;
- pDevice->DuplexMode = DuplexMode;
-
- /* Force line seepd. */
- NewPhyCtrl = 0;
- switch(LineSpeed)
- {
- case LM_LINE_SPEED_10MBPS:
- NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_10MBPS;
- break;
- case LM_LINE_SPEED_100MBPS:
- NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_100MBPS;
- break;
- case LM_LINE_SPEED_1000MBPS:
- NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS;
- break;
- default:
- NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS;
- break;
- }
-
- if(DuplexMode == LM_DUPLEX_MODE_FULL)
- {
- NewPhyCtrl |= PHY_CTRL_FULL_DUPLEX_MODE;
- }
-
- /* Don't do anything if the PHY_CTRL is already what we wanted. */
- LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32);
- if(Value32 != NewPhyCtrl)
- {
- /* Temporary bring the link down before forcing line speed. */
- LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_LOOPBACK_MODE);
-
- /* Wait for link to go down. */
- for(Cnt = 0; Cnt < 15000; Cnt++)
- {
- MM_Wait(10);
-
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
- LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32);
-
- if(!(Value32 & PHY_STATUS_LINK_PASS))
- {
- MM_Wait(40);
- break;
+ LM_WritePhy (pDevice, PHY_AN_AD_REG, Value32);
+ pDevice->advertising = Value32;
}
- }
-
- LM_WritePhy(pDevice, PHY_CTRL_REG, NewPhyCtrl);
- MM_Wait(40);
}
- }
- else
- {
- LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE |
- PHY_CTRL_RESTART_AUTO_NEG);
- }
- return LM_STATUS_SUCCESS;
-} /* LM_ForceAutoNegBcm540xPhy */
+ /* Force line speed if auto-negotiation is disabled. */
+ if (pDevice->DisableAutoNeg && LineSpeed != LM_LINE_SPEED_UNKNOWN) {
+ /* This code path is executed only when there is link. */
+ pDevice->MediaType = MediaType;
+ pDevice->LineSpeed = LineSpeed;
+ pDevice->DuplexMode = DuplexMode;
+ /* Force line seepd. */
+ NewPhyCtrl = 0;
+ switch (LineSpeed) {
+ case LM_LINE_SPEED_10MBPS:
+ NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_10MBPS;
+ break;
+ case LM_LINE_SPEED_100MBPS:
+ NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_100MBPS;
+ break;
+ case LM_LINE_SPEED_1000MBPS:
+ NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS;
+ break;
+ default:
+ NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS;
+ break;
+ }
+
+ if (DuplexMode == LM_DUPLEX_MODE_FULL) {
+ NewPhyCtrl |= PHY_CTRL_FULL_DUPLEX_MODE;
+ }
+
+ /* Don't do anything if the PHY_CTRL is already what we wanted. */
+ LM_ReadPhy (pDevice, PHY_CTRL_REG, &Value32);
+ if (Value32 != NewPhyCtrl) {
+ /* Temporary bring the link down before forcing line speed. */
+ LM_WritePhy (pDevice, PHY_CTRL_REG,
+ PHY_CTRL_LOOPBACK_MODE);
+
+ /* Wait for link to go down. */
+ for (Cnt = 0; Cnt < 15000; Cnt++) {
+ MM_Wait (10);
+
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+ LM_ReadPhy (pDevice, PHY_STATUS_REG, &Value32);
+
+ if (!(Value32 & PHY_STATUS_LINK_PASS)) {
+ MM_Wait (40);
+ break;
+ }
+ }
+
+ LM_WritePhy (pDevice, PHY_CTRL_REG, NewPhyCtrl);
+ MM_Wait (40);
+ }
+ } else {
+ LM_WritePhy (pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE |
+ PHY_CTRL_RESTART_AUTO_NEG);
+ }
+
+ return LM_STATUS_SUCCESS;
+} /* LM_ForceAutoNegBcm540xPhy */
/******************************************************************************/
/* Description: */
@@ -5828,218 +5347,199 @@
/* Return: */
/******************************************************************************/
static LM_STATUS
-LM_ForceAutoNeg(
-PLM_DEVICE_BLOCK pDevice,
-LM_REQUESTED_MEDIA_TYPE RequestedMediaType)
+LM_ForceAutoNeg (PLM_DEVICE_BLOCK pDevice,
+ LM_REQUESTED_MEDIA_TYPE RequestedMediaType)
{
- LM_STATUS LmStatus;
+ LM_STATUS LmStatus;
- /* Initialize the phy chip. */
- switch(pDevice->PhyId & PHY_ID_MASK)
- {
+ /* Initialize the phy chip. */
+ switch (pDevice->PhyId & PHY_ID_MASK) {
case PHY_BCM5400_PHY_ID:
case PHY_BCM5401_PHY_ID:
case PHY_BCM5411_PHY_ID:
case PHY_BCM5701_PHY_ID:
case PHY_BCM5703_PHY_ID:
case PHY_BCM5704_PHY_ID:
- LmStatus = LM_ForceAutoNegBcm540xPhy(pDevice, RequestedMediaType);
- break;
+ LmStatus =
+ LM_ForceAutoNegBcm540xPhy (pDevice, RequestedMediaType);
+ break;
default:
- LmStatus = LM_STATUS_FAILURE;
- break;
- }
+ LmStatus = LM_STATUS_FAILURE;
+ break;
+ }
- return LmStatus;
-} /* LM_ForceAutoNeg */
+ return LmStatus;
+} /* LM_ForceAutoNeg */
/******************************************************************************/
/* Description: */
/* */
/* Return: */
/******************************************************************************/
-LM_STATUS LM_LoadFirmware(PLM_DEVICE_BLOCK pDevice,
- PT3_FWIMG_INFO pFwImg,
- LM_UINT32 LoadCpu,
- LM_UINT32 StartCpu)
+LM_STATUS LM_LoadFirmware (PLM_DEVICE_BLOCK pDevice,
+ PT3_FWIMG_INFO pFwImg,
+ LM_UINT32 LoadCpu, LM_UINT32 StartCpu)
{
- LM_UINT32 i;
- LM_UINT32 address;
+ LM_UINT32 i;
+ LM_UINT32 address;
- if (LoadCpu & T3_RX_CPU_ID)
- {
- if (LM_HaltCpu(pDevice,T3_RX_CPU_ID) != LM_STATUS_SUCCESS)
- {
- return LM_STATUS_FAILURE;
+ if (LoadCpu & T3_RX_CPU_ID) {
+ if (LM_HaltCpu (pDevice, T3_RX_CPU_ID) != LM_STATUS_SUCCESS) {
+ return LM_STATUS_FAILURE;
+ }
+
+ /* First of all clear scrach pad memory */
+ for (i = 0; i < T3_RX_CPU_SPAD_SIZE; i += 4) {
+ LM_RegWrInd (pDevice, T3_RX_CPU_SPAD_ADDR + i, 0);
+ }
+
+ /* Copy code first */
+ address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff);
+ for (i = 0; i <= pFwImg->Text.Length; i += 4) {
+ LM_RegWrInd (pDevice, address + i,
+ ((LM_UINT32 *) pFwImg->Text.Buffer)[i /
+ 4]);
+ }
+
+ address =
+ T3_RX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff);
+ for (i = 0; i <= pFwImg->ROnlyData.Length; i += 4) {
+ LM_RegWrInd (pDevice, address + i,
+ ((LM_UINT32 *) pFwImg->ROnlyData.
+ Buffer)[i / 4]);
+ }
+
+ address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff);
+ for (i = 0; i <= pFwImg->Data.Length; i += 4) {
+ LM_RegWrInd (pDevice, address + i,
+ ((LM_UINT32 *) pFwImg->Data.Buffer)[i /
+ 4]);
+ }
}
- /* First of all clear scrach pad memory */
- for (i = 0; i < T3_RX_CPU_SPAD_SIZE; i+=4)
- {
- LM_RegWrInd(pDevice,T3_RX_CPU_SPAD_ADDR+i,0);
+ if (LoadCpu & T3_TX_CPU_ID) {
+ if (LM_HaltCpu (pDevice, T3_TX_CPU_ID) != LM_STATUS_SUCCESS) {
+ return LM_STATUS_FAILURE;
+ }
+
+ /* First of all clear scrach pad memory */
+ for (i = 0; i < T3_TX_CPU_SPAD_SIZE; i += 4) {
+ LM_RegWrInd (pDevice, T3_TX_CPU_SPAD_ADDR + i, 0);
+ }
+
+ /* Copy code first */
+ address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff);
+ for (i = 0; i <= pFwImg->Text.Length; i += 4) {
+ LM_RegWrInd (pDevice, address + i,
+ ((LM_UINT32 *) pFwImg->Text.Buffer)[i /
+ 4]);
+ }
+
+ address =
+ T3_TX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff);
+ for (i = 0; i <= pFwImg->ROnlyData.Length; i += 4) {
+ LM_RegWrInd (pDevice, address + i,
+ ((LM_UINT32 *) pFwImg->ROnlyData.
+ Buffer)[i / 4]);
+ }
+
+ address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff);
+ for (i = 0; i <= pFwImg->Data.Length; i += 4) {
+ LM_RegWrInd (pDevice, address + i,
+ ((LM_UINT32 *) pFwImg->Data.Buffer)[i /
+ 4]);
+ }
}
- /* Copy code first */
- address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff);
- for (i = 0; i <= pFwImg->Text.Length; i+=4)
- {
- LM_RegWrInd(pDevice,address+i,
- ((LM_UINT32 *)pFwImg->Text.Buffer)[i/4]);
+ if (StartCpu & T3_RX_CPU_ID) {
+ /* Start Rx CPU */
+ REG_WR (pDevice, rxCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, rxCpu.reg.PC, pFwImg->StartAddress);
+ for (i = 0; i < 5; i++) {
+ if (pFwImg->StartAddress ==
+ REG_RD (pDevice, rxCpu.reg.PC))
+ break;
+
+ REG_WR (pDevice, rxCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, rxCpu.reg.mode, CPU_MODE_HALT);
+ REG_WR (pDevice, rxCpu.reg.PC, pFwImg->StartAddress);
+ MM_Wait (1000);
+ }
+
+ REG_WR (pDevice, rxCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, rxCpu.reg.mode, 0);
}
- address = T3_RX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff);
- for (i = 0; i <= pFwImg->ROnlyData.Length; i+=4)
- {
- LM_RegWrInd(pDevice,address+i,
- ((LM_UINT32 *)pFwImg->ROnlyData.Buffer)[i/4]);
+ if (StartCpu & T3_TX_CPU_ID) {
+ /* Start Tx CPU */
+ REG_WR (pDevice, txCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, txCpu.reg.PC, pFwImg->StartAddress);
+ for (i = 0; i < 5; i++) {
+ if (pFwImg->StartAddress ==
+ REG_RD (pDevice, txCpu.reg.PC))
+ break;
+
+ REG_WR (pDevice, txCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, txCpu.reg.mode, CPU_MODE_HALT);
+ REG_WR (pDevice, txCpu.reg.PC, pFwImg->StartAddress);
+ MM_Wait (1000);
+ }
+
+ REG_WR (pDevice, txCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, txCpu.reg.mode, 0);
}
- address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff);
- for (i= 0; i <= pFwImg->Data.Length; i+=4)
- {
- LM_RegWrInd(pDevice,address+i,
- ((LM_UINT32 *)pFwImg->Data.Buffer)[i/4]);
- }
- }
-
- if (LoadCpu & T3_TX_CPU_ID)
- {
- if (LM_HaltCpu(pDevice,T3_TX_CPU_ID) != LM_STATUS_SUCCESS)
- {
- return LM_STATUS_FAILURE;
- }
-
- /* First of all clear scrach pad memory */
- for (i = 0; i < T3_TX_CPU_SPAD_SIZE; i+=4)
- {
- LM_RegWrInd(pDevice,T3_TX_CPU_SPAD_ADDR+i,0);
- }
-
- /* Copy code first */
- address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff);
- for (i= 0; i <= pFwImg->Text.Length; i+=4)
- {
- LM_RegWrInd(pDevice,address+i,
- ((LM_UINT32 *)pFwImg->Text.Buffer)[i/4]);
- }
-
- address = T3_TX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff);
- for (i= 0; i <= pFwImg->ROnlyData.Length; i+=4)
- {
- LM_RegWrInd(pDevice,address+i,
- ((LM_UINT32 *)pFwImg->ROnlyData.Buffer)[i/4]);
- }
-
- address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff);
- for (i= 0; i <= pFwImg->Data.Length; i+=4)
- {
- LM_RegWrInd(pDevice,address+i,
- ((LM_UINT32 *)pFwImg->Data.Buffer)[i/4]);
- }
- }
-
- if (StartCpu & T3_RX_CPU_ID)
- {
- /* Start Rx CPU */
- REG_WR(pDevice,rxCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,rxCpu.reg.PC,pFwImg->StartAddress);
- for (i = 0 ; i < 5; i++)
- {
- if (pFwImg->StartAddress == REG_RD(pDevice,rxCpu.reg.PC))
- break;
-
- REG_WR(pDevice,rxCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT);
- REG_WR(pDevice,rxCpu.reg.PC,pFwImg->StartAddress);
- MM_Wait(1000);
- }
-
- REG_WR(pDevice,rxCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,rxCpu.reg.mode, 0);
- }
-
- if (StartCpu & T3_TX_CPU_ID)
- {
- /* Start Tx CPU */
- REG_WR(pDevice,txCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,txCpu.reg.PC,pFwImg->StartAddress);
- for (i = 0 ; i < 5; i++)
- {
- if (pFwImg->StartAddress == REG_RD(pDevice,txCpu.reg.PC))
- break;
-
- REG_WR(pDevice,txCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,txCpu.reg.mode,CPU_MODE_HALT);
- REG_WR(pDevice,txCpu.reg.PC,pFwImg->StartAddress);
- MM_Wait(1000);
- }
-
- REG_WR(pDevice,txCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,txCpu.reg.mode, 0);
- }
-
- return LM_STATUS_SUCCESS;
+ return LM_STATUS_SUCCESS;
}
-STATIC LM_STATUS LM_HaltCpu(PLM_DEVICE_BLOCK pDevice,LM_UINT32 cpu_number)
+STATIC LM_STATUS LM_HaltCpu (PLM_DEVICE_BLOCK pDevice, LM_UINT32 cpu_number)
{
- LM_UINT32 i;
+ LM_UINT32 i;
- if (cpu_number == T3_RX_CPU_ID)
- {
- for (i = 0 ; i < 10000; i++)
- {
- REG_WR(pDevice,rxCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT);
+ if (cpu_number == T3_RX_CPU_ID) {
+ for (i = 0; i < 10000; i++) {
+ REG_WR (pDevice, rxCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, rxCpu.reg.mode, CPU_MODE_HALT);
- if (REG_RD(pDevice,rxCpu.reg.mode) & CPU_MODE_HALT)
- break;
+ if (REG_RD (pDevice, rxCpu.reg.mode) & CPU_MODE_HALT)
+ break;
+ }
+
+ REG_WR (pDevice, rxCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, rxCpu.reg.mode, CPU_MODE_HALT);
+ MM_Wait (10);
+ } else {
+ for (i = 0; i < 10000; i++) {
+ REG_WR (pDevice, txCpu.reg.state, 0xffffffff);
+ REG_WR (pDevice, txCpu.reg.mode, CPU_MODE_HALT);
+
+ if (REG_RD (pDevice, txCpu.reg.mode) & CPU_MODE_HALT)
+ break;
+ }
}
- REG_WR(pDevice,rxCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT);
- MM_Wait(10);
- }
- else
- {
- for (i = 0 ; i < 10000; i++)
- {
- REG_WR(pDevice,txCpu.reg.state, 0xffffffff);
- REG_WR(pDevice,txCpu.reg.mode,CPU_MODE_HALT);
-
- if (REG_RD(pDevice,txCpu.reg.mode) & CPU_MODE_HALT)
- break;
- }
- }
-
- return (( i == 10000) ? LM_STATUS_FAILURE : LM_STATUS_SUCCESS);
+ return ((i == 10000) ? LM_STATUS_FAILURE : LM_STATUS_SUCCESS);
}
-
-int
-LM_BlinkLED(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDurationSec)
+int LM_BlinkLED (PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDurationSec)
{
LM_UINT32 Oldcfg;
int j;
int ret = 0;
- if(BlinkDurationSec == 0)
- {
+ if (BlinkDurationSec == 0) {
return 0;
}
- if(BlinkDurationSec > 120)
- {
+ if (BlinkDurationSec > 120) {
BlinkDurationSec = 120;
}
- Oldcfg = REG_RD(pDevice, MacCtrl.LedCtrl);
- for(j = 0; j < BlinkDurationSec * 2; j++)
- {
- if(j % 2)
- {
+ Oldcfg = REG_RD (pDevice, MacCtrl.LedCtrl);
+ for (j = 0; j < BlinkDurationSec * 2; j++) {
+ if (j % 2) {
/* Turn on the LEDs. */
- REG_WR(pDevice, MacCtrl.LedCtrl,
+ REG_WR (pDevice, MacCtrl.LedCtrl,
LED_CTRL_OVERRIDE_LINK_LED |
LED_CTRL_1000MBPS_LED_ON |
LED_CTRL_100MBPS_LED_ON |
@@ -6047,154 +5547,153 @@
LED_CTRL_OVERRIDE_TRAFFIC_LED |
LED_CTRL_BLINK_TRAFFIC_LED |
LED_CTRL_TRAFFIC_LED);
- }
- else
- {
+ } else {
/* Turn off the LEDs. */
- REG_WR(pDevice, MacCtrl.LedCtrl,
+ REG_WR (pDevice, MacCtrl.LedCtrl,
LED_CTRL_OVERRIDE_LINK_LED |
LED_CTRL_OVERRIDE_TRAFFIC_LED);
}
#ifndef EMBEDDED
current->state = TASK_INTERRUPTIBLE;
- if (schedule_timeout(HZ/2) != 0) {
+ if (schedule_timeout (HZ / 2) != 0) {
ret = -EINTR;
break;
}
#else
- udelay(100000); /* 1s sleep */
+ udelay (100000); /* 1s sleep */
#endif
}
- REG_WR(pDevice, MacCtrl.LedCtrl, Oldcfg);
+ REG_WR (pDevice, MacCtrl.LedCtrl, Oldcfg);
return ret;
}
-int t3_do_dma(PLM_DEVICE_BLOCK pDevice,
- LM_PHYSICAL_ADDRESS host_addr_phy, int length,
- int dma_read)
+int t3_do_dma (PLM_DEVICE_BLOCK pDevice,
+ LM_PHYSICAL_ADDRESS host_addr_phy, int length, int dma_read)
{
- T3_DMA_DESC dma_desc;
- int i;
- LM_UINT32 dma_desc_addr;
- LM_UINT32 value32;
+ T3_DMA_DESC dma_desc;
+ int i;
+ LM_UINT32 dma_desc_addr;
+ LM_UINT32 value32;
- REG_WR(pDevice, BufMgr.Mode, 0);
- REG_WR(pDevice, Ftq.Reset, 0);
+ REG_WR (pDevice, BufMgr.Mode, 0);
+ REG_WR (pDevice, Ftq.Reset, 0);
- dma_desc.host_addr.High = host_addr_phy.High;
- dma_desc.host_addr.Low = host_addr_phy.Low;
- dma_desc.nic_mbuf = 0x2100;
- dma_desc.len = length;
- dma_desc.flags = 0x00000004; /* Generate Rx-CPU event */
+ dma_desc.host_addr.High = host_addr_phy.High;
+ dma_desc.host_addr.Low = host_addr_phy.Low;
+ dma_desc.nic_mbuf = 0x2100;
+ dma_desc.len = length;
+ dma_desc.flags = 0x00000004; /* Generate Rx-CPU event */
- if (dma_read)
- {
- dma_desc.cqid_sqid = (T3_QID_RX_BD_COMP << 8) |
- T3_QID_DMA_HIGH_PRI_READ;
- REG_WR(pDevice, DmaRead.Mode, DMA_READ_MODE_ENABLE);
- }
- else
- {
- dma_desc.cqid_sqid = (T3_QID_RX_DATA_COMP << 8) |
- T3_QID_DMA_HIGH_PRI_WRITE;
- REG_WR(pDevice, DmaWrite.Mode, DMA_WRITE_MODE_ENABLE);
- }
+ if (dma_read) {
+ dma_desc.cqid_sqid = (T3_QID_RX_BD_COMP << 8) |
+ T3_QID_DMA_HIGH_PRI_READ;
+ REG_WR (pDevice, DmaRead.Mode, DMA_READ_MODE_ENABLE);
+ } else {
+ dma_desc.cqid_sqid = (T3_QID_RX_DATA_COMP << 8) |
+ T3_QID_DMA_HIGH_PRI_WRITE;
+ REG_WR (pDevice, DmaWrite.Mode, DMA_WRITE_MODE_ENABLE);
+ }
- dma_desc_addr = T3_NIC_DMA_DESC_POOL_ADDR;
+ dma_desc_addr = T3_NIC_DMA_DESC_POOL_ADDR;
- /* Writing this DMA descriptor to DMA memory */
- for (i = 0; i < sizeof(T3_DMA_DESC); i += 4)
- {
- value32 = *((PLM_UINT32) (((PLM_UINT8) &dma_desc) + i));
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, dma_desc_addr+i);
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_DATA_REG, cpu_to_le32(value32));
- }
- MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, 0);
+ /* Writing this DMA descriptor to DMA memory */
+ for (i = 0; i < sizeof (T3_DMA_DESC); i += 4) {
+ value32 = *((PLM_UINT32) (((PLM_UINT8) & dma_desc) + i));
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG,
+ dma_desc_addr + i);
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_DATA_REG,
+ cpu_to_le32 (value32));
+ }
+ MM_WriteConfig32 (pDevice, T3_PCI_MEM_WIN_ADDR_REG, 0);
- if (dma_read)
- REG_WR(pDevice, Ftq.DmaHighReadFtqFifoEnqueueDequeue, dma_desc_addr);
- else
- REG_WR(pDevice, Ftq.DmaHighWriteFtqFifoEnqueueDequeue, dma_desc_addr);
-
- for (i = 0; i < 40; i++)
- {
if (dma_read)
- value32 = REG_RD(pDevice, Ftq.RcvBdCompFtqFifoEnqueueDequeue);
+ REG_WR (pDevice, Ftq.DmaHighReadFtqFifoEnqueueDequeue,
+ dma_desc_addr);
else
- value32 = REG_RD(pDevice, Ftq.RcvDataCompFtqFifoEnqueueDequeue);
+ REG_WR (pDevice, Ftq.DmaHighWriteFtqFifoEnqueueDequeue,
+ dma_desc_addr);
- if ((value32 & 0xffff) == dma_desc_addr)
- break;
+ for (i = 0; i < 40; i++) {
+ if (dma_read)
+ value32 =
+ REG_RD (pDevice,
+ Ftq.RcvBdCompFtqFifoEnqueueDequeue);
+ else
+ value32 =
+ REG_RD (pDevice,
+ Ftq.RcvDataCompFtqFifoEnqueueDequeue);
- MM_Wait(10);
- }
+ if ((value32 & 0xffff) == dma_desc_addr)
+ break;
- return LM_STATUS_SUCCESS;
+ MM_Wait (10);
+ }
+
+ return LM_STATUS_SUCCESS;
}
STATIC LM_STATUS
-LM_DmaTest(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt,
- LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize)
+LM_DmaTest (PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt,
+ LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize)
{
- int j;
- LM_UINT32 *ptr;
- int dma_success = 0;
+ int j;
+ LM_UINT32 *ptr;
+ int dma_success = 0;
- if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
- T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701)
- {
+ if (T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5700 &&
+ T3_ASIC_REV (pDevice->ChipRevId) != T3_ASIC_REV_5701) {
+ return LM_STATUS_SUCCESS;
+ }
+ while (!dma_success) {
+ /* Fill data with incremental patterns */
+ ptr = (LM_UINT32 *) pBufferVirt;
+ for (j = 0; j < BufferSize / 4; j++)
+ *ptr++ = j;
+
+ if (t3_do_dma (pDevice, BufferPhy, BufferSize, 1) ==
+ LM_STATUS_FAILURE) {
+ return LM_STATUS_FAILURE;
+ }
+
+ MM_Wait (40);
+ ptr = (LM_UINT32 *) pBufferVirt;
+ /* Fill data with zero */
+ for (j = 0; j < BufferSize / 4; j++)
+ *ptr++ = 0;
+
+ if (t3_do_dma (pDevice, BufferPhy, BufferSize, 0) ==
+ LM_STATUS_FAILURE) {
+ return LM_STATUS_FAILURE;
+ }
+
+ MM_Wait (40);
+ /* Check for data */
+ ptr = (LM_UINT32 *) pBufferVirt;
+ for (j = 0; j < BufferSize / 4; j++) {
+ if (*ptr++ != j) {
+ if ((pDevice->
+ DmaReadWriteCtrl &
+ DMA_CTRL_WRITE_BOUNDARY_MASK)
+ == DMA_CTRL_WRITE_BOUNDARY_DISABLE) {
+ pDevice->DmaReadWriteCtrl =
+ (pDevice->
+ DmaReadWriteCtrl &
+ ~DMA_CTRL_WRITE_BOUNDARY_MASK) |
+ DMA_CTRL_WRITE_BOUNDARY_16;
+ REG_WR (pDevice,
+ PciCfg.DmaReadWriteCtrl,
+ pDevice->DmaReadWriteCtrl);
+ break;
+ } else {
+ return LM_STATUS_FAILURE;
+ }
+ }
+ }
+ if (j == (BufferSize / 4))
+ dma_success = 1;
+ }
return LM_STATUS_SUCCESS;
- }
- while (!dma_success)
- {
- /* Fill data with incremental patterns */
- ptr = (LM_UINT32 *)pBufferVirt;
- for (j = 0; j < BufferSize/4; j++)
- *ptr++ = j;
-
- if (t3_do_dma(pDevice,BufferPhy,BufferSize, 1) == LM_STATUS_FAILURE)
- {
- return LM_STATUS_FAILURE;
- }
-
- MM_Wait(40);
- ptr = (LM_UINT32 *)pBufferVirt;
- /* Fill data with zero */
- for (j = 0; j < BufferSize/4; j++)
- *ptr++ = 0;
-
- if (t3_do_dma(pDevice,BufferPhy,BufferSize, 0) == LM_STATUS_FAILURE)
- {
- return LM_STATUS_FAILURE;
- }
-
- MM_Wait(40);
- /* Check for data */
- ptr = (LM_UINT32 *)pBufferVirt;
- for (j = 0; j < BufferSize/4; j++)
- {
- if (*ptr++ != j)
- {
- if ((pDevice->DmaReadWriteCtrl & DMA_CTRL_WRITE_BOUNDARY_MASK)
- == DMA_CTRL_WRITE_BOUNDARY_DISABLE)
- {
- pDevice->DmaReadWriteCtrl = (pDevice->DmaReadWriteCtrl &
- ~DMA_CTRL_WRITE_BOUNDARY_MASK) |
- DMA_CTRL_WRITE_BOUNDARY_16;
- REG_WR(pDevice, PciCfg.DmaReadWriteCtrl,
- pDevice->DmaReadWriteCtrl);
- break;
- }
- else
- {
- return LM_STATUS_FAILURE;
- }
- }
- }
- if (j == (BufferSize/4))
- dma_success = 1;
- }
- return LM_STATUS_SUCCESS;
}
-#endif /* CFG_CMD_NET, !CONFIG_NET_MULTI, CONFIG_TIGON3 */
+
+#endif
diff --git a/drivers/tigon3.h b/drivers/tigon3.h
index ea4367d..c03347f 100644
--- a/drivers/tigon3.h
+++ b/drivers/tigon3.h
@@ -21,7 +21,6 @@
#include "bcm570x_autoneg.h"
#endif
-
/* io defines */
#if !defined(BIG_ENDIAN_HOST)
#define readl(addr) \
@@ -29,7 +28,7 @@
#define writel(b,addr) \
((*(volatile unsigned int *)(addr)) = (LONGSWAP(b)))
#else
-#if 0 /* !defined(PPC603) */
+#if 0 /* !defined(PPC603) */
#define readl(addr) (*(volatile unsigned int*)(0xa0000000 + (unsigned long)(addr)))
#define writel(b,addr) ((*(volatile unsigned int *) ((unsigned long)(addr) + 0xa0000000)) = (b))
#else
@@ -37,25 +36,28 @@
#define readl(addr) (*(volatile unsigned int*)(addr))
#define writel(b,addr) ((*(volatile unsigned int *) (addr)) = (b))
#else
-extern int sprintf(char* buf, const char* f, ...);
-static __inline unsigned int readl(void* addr){
- char buf[128];
- unsigned int tmp = (*(volatile unsigned int*)(addr));
- sprintf(buf,"%s:%s: read 0x%x from 0x%x\n",__FILE__,__LINE__,tmp,addr,0,0);
- sysSerialPrintString(buf);
- return tmp;
+extern int sprintf (char *buf, const char *f, ...);
+static __inline unsigned int readl (void *addr)
+{
+ char buf[128];
+ unsigned int tmp = (*(volatile unsigned int *)(addr));
+ sprintf (buf, "%s:%s: read 0x%x from 0x%x\n", __FILE__, __LINE__, tmp,
+ addr, 0, 0);
+ sysSerialPrintString (buf);
+ return tmp;
}
-static __inline void writel(unsigned int b, unsigned int addr){
- char buf[128];
- ((*(volatile unsigned int *) (addr)) = (b));
- sprintf(buf,"%s:%s: write 0x%x to 0x%x\n",__FILE__,__LINE__,b,addr,0,0);
- sysSerialPrintString(buf);
+static __inline void writel (unsigned int b, unsigned int addr)
+{
+ char buf[128];
+ ((*(volatile unsigned int *)(addr)) = (b));
+ sprintf (buf, "%s:%s: write 0x%x to 0x%x\n", __FILE__, __LINE__, b,
+ addr, 0, 0);
+ sysSerialPrintString (buf);
}
#endif
-#endif /* PPC603 */
+#endif /* PPC603 */
#endif
-
/******************************************************************************/
/* Constants. */
/******************************************************************************/
@@ -90,7 +92,7 @@
/* B0 bug. */
#define BCM5700_BX_MIN_FRAG_SIZE 10
-#define BCM5700_BX_MIN_FRAG_BUF_SIZE 16 /* nice aligned size. */
+#define BCM5700_BX_MIN_FRAG_BUF_SIZE 16 /* nice aligned size. */
#define BCM5700_BX_MIN_FRAG_BUF_SIZE_MASK (BCM5700_BX_MIN_FRAG_BUF_SIZE-1)
#define BCM5700_BX_TX_COPY_BUF_SIZE (BCM5700_BX_MIN_FRAG_BUF_SIZE * \
MAX_FRAGMENT_COUNT)
@@ -161,32 +163,32 @@
/* Number of entries in the Standard Receive RCB. Must be 512 entries. */
#define T3_STD_RCV_RCB_ENTRY_COUNT 512
#define T3_STD_RCV_RCB_ENTRY_COUNT_MASK (T3_STD_RCV_RCB_ENTRY_COUNT-1)
-#define DEFAULT_STD_RCV_DESC_COUNT 200 /* Must be < 512. */
+#define DEFAULT_STD_RCV_DESC_COUNT 200 /* Must be < 512. */
#define MAX_STD_RCV_BUFFER_SIZE 0x600
/* Number of entries in the Mini Receive RCB. This value can either be */
/* 0, 1024. Currently Mini Receive RCB is disabled. */
#ifndef T3_MINI_RCV_RCB_ENTRY_COUNT
#define T3_MINI_RCV_RCB_ENTRY_COUNT 0
-#endif /* T3_MINI_RCV_RCB_ENTRY_COUNT */
+#endif /* T3_MINI_RCV_RCB_ENTRY_COUNT */
#define T3_MINI_RCV_RCB_ENTRY_COUNT_MASK (T3_MINI_RCV_RCB_ENTRY_COUNT-1)
#define MAX_MINI_RCV_BUFFER_SIZE 512
#define DEFAULT_MINI_RCV_BUFFER_SIZE 64
-#define DEFAULT_MINI_RCV_DESC_COUNT 100 /* Must be < 1024. */
+#define DEFAULT_MINI_RCV_DESC_COUNT 100 /* Must be < 1024. */
/* Number of entries in the Jumbo Receive RCB. This value must 256 or 0. */
/* Currently, Jumbo Receive RCB is disabled. */
#ifndef T3_JUMBO_RCV_RCB_ENTRY_COUNT
#define T3_JUMBO_RCV_RCB_ENTRY_COUNT 0
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
#define T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK (T3_JUMBO_RCV_RCB_ENTRY_COUNT-1)
-#define MAX_JUMBO_RCV_BUFFER_SIZE (10 * 1024) /* > 1514 */
-#define DEFAULT_JUMBO_RCV_BUFFER_SIZE (4 * 1024) /* > 1514 */
-#define DEFAULT_JUMBO_RCV_DESC_COUNT 128 /* Must be < 256. */
+#define MAX_JUMBO_RCV_BUFFER_SIZE (10 * 1024) /* > 1514 */
+#define DEFAULT_JUMBO_RCV_BUFFER_SIZE (4 * 1024) /* > 1514 */
+#define DEFAULT_JUMBO_RCV_DESC_COUNT 128 /* Must be < 256. */
-#define MAX_JUMBO_TX_BUFFER_SIZE (8 * 1024) /* > 1514 */
-#define DEFAULT_JUMBO_TX_BUFFER_SIZE (4 * 1024) /* > 1514 */
+#define MAX_JUMBO_TX_BUFFER_SIZE (8 * 1024) /* > 1514 */
+#define DEFAULT_JUMBO_TX_BUFFER_SIZE (4 * 1024) /* > 1514 */
/* Number of receive return RCBs. Maybe 1-16 but for now, only support one. */
#define T3_MAX_RCV_RETURN_RCB_COUNT 16
@@ -195,10 +197,9 @@
/* or 2048. */
#ifndef T3_RCV_RETURN_RCB_ENTRY_COUNT
#define T3_RCV_RETURN_RCB_ENTRY_COUNT 1024
-#endif /* T3_RCV_RETURN_RCB_ENTRY_COUNT */
+#endif /* T3_RCV_RETURN_RCB_ENTRY_COUNT */
#define T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK (T3_RCV_RETURN_RCB_ENTRY_COUNT-1)
-
/* Default coalescing parameters. */
#define DEFAULT_RX_COALESCING_TICKS 100
#define MAX_RX_COALESCING_TICKS 500
@@ -227,7 +228,6 @@
#define DEFAULT_STATS_COALESCING_TICKS 1000000
#define MAX_STATS_COALESCING_TICKS 3600000000U
-
/* Receive BD Replenish thresholds. */
#define DEFAULT_RCV_STD_BD_REPLENISH_THRESHOLD 4
#define DEFAULT_RCV_JUMBO_BD_REPLENISH_THRESHOLD 4
@@ -240,12 +240,10 @@
/* Maximum physical fragment size. */
#define MAX_FRAGMENT_SIZE (64 * 1024)
-
/* Standard view. */
#define T3_STD_VIEW_SIZE (64 * 1024)
#define T3_FLAT_VIEW_SIZE (32 * 1024 * 1024)
-
/* Buffer descriptor base address on the NIC's memory. */
#define T3_NIC_SND_BUFFER_DESC_ADDR 0x4000
@@ -265,19 +263,17 @@
#define T3_NIC_JUMBO_RCV_BUFFER_DESC_SIZE (T3_JUMBO_RCV_RCB_ENTRY_COUNT * \
sizeof(T3_EXT_RCV_BD) / 4)
-
/* MBUF pool. */
#define T3_NIC_MBUF_POOL_ADDR 0x8000
/* #define T3_NIC_MBUF_POOL_SIZE 0x18000 */
#define T3_NIC_MBUF_POOL_SIZE96 0x18000
#define T3_NIC_MBUF_POOL_SIZE64 0x10000
-
#define T3_NIC_MBUF_POOL_ADDR_EXT_MEM 0x20000
/* DMA descriptor pool */
#define T3_NIC_DMA_DESC_POOL_ADDR 0x2000
-#define T3_NIC_DMA_DESC_POOL_SIZE 0x2000 /* 8KB. */
+#define T3_NIC_DMA_DESC_POOL_SIZE 0x2000 /* 8KB. */
#define T3_DEF_DMA_MBUF_LOW_WMARK 0x40
#define T3_DEF_RX_MAC_MBUF_LOW_WMARK 0x20
@@ -301,24 +297,21 @@
#define T3_TX_CPU_SPAD_ADDR 0x34000
#define T3_TX_CPU_SPAD_SIZE 0x4000
-typedef struct T3_DIR_ENTRY
-{
- PLM_UINT8 Buffer;
- LM_UINT32 Offset;
- LM_UINT32 Length;
-} T3_DIR_ENTRY,*PT3_DIR_ENTRY;
+typedef struct T3_DIR_ENTRY {
+ PLM_UINT8 Buffer;
+ LM_UINT32 Offset;
+ LM_UINT32 Length;
+} T3_DIR_ENTRY, *PT3_DIR_ENTRY;
-typedef struct T3_FWIMG_INFO
-{
- LM_UINT32 StartAddress;
- T3_DIR_ENTRY Text;
- T3_DIR_ENTRY ROnlyData;
- T3_DIR_ENTRY Data;
- T3_DIR_ENTRY Sbss;
- T3_DIR_ENTRY Bss;
+typedef struct T3_FWIMG_INFO {
+ LM_UINT32 StartAddress;
+ T3_DIR_ENTRY Text;
+ T3_DIR_ENTRY ROnlyData;
+ T3_DIR_ENTRY Data;
+ T3_DIR_ENTRY Sbss;
+ T3_DIR_ENTRY Bss;
} T3_FWIMG_INFO, *PT3_FWIMG_INFO;
-
/******************************************************************************/
/* Tigon3 PCI Registers. */
/******************************************************************************/
@@ -362,7 +355,6 @@
#define T3_ASIC_REV_5703 0x01
#define T3_ASIC_REV_5704 0x02
-
/* Chip id and revision. */
#define T3_CHIP_REV(_ChipRevId) ((_ChipRevId) >> 8)
#define T3_CHIP_REV_5700_AX 0x70
@@ -386,7 +378,6 @@
#define T3_PCI_POWER_DOWN_PCI_PLL133 BIT_15
#define T3_PCI_44MHZ_CORE_CLOCK BIT_18
-
#define T3_PCI_REG_ADDR_REG 0x78
#define T3_PCI_REG_DATA_REG 0x80
@@ -409,7 +400,6 @@
#define T3_PM_PME_ENABLE BIT_8
#define T3_PM_PME_ASSERTED BIT_15
-
/* PCI state register. */
#define T3_PCI_STATE_REG 0x70
@@ -419,17 +409,16 @@
#define T3_PCI_STATE_BUS_SPEED_HIGH BIT_3
#define T3_PCI_STATE_32BIT_PCI_BUS BIT_4
-
/* Broadcom subsystem/subvendor IDs. */
#define T3_SVID_BROADCOM 0x14e4
#define T3_SSID_BROADCOM_BCM95700A6 0x1644
#define T3_SSID_BROADCOM_BCM95701A5 0x0001
-#define T3_SSID_BROADCOM_BCM95700T6 0x0002 /* BCM8002 */
-#define T3_SSID_BROADCOM_BCM95700A9 0x0003 /* Agilent */
+#define T3_SSID_BROADCOM_BCM95700T6 0x0002 /* BCM8002 */
+#define T3_SSID_BROADCOM_BCM95700A9 0x0003 /* Agilent */
#define T3_SSID_BROADCOM_BCM95701T1 0x0005
#define T3_SSID_BROADCOM_BCM95701T8 0x0006
-#define T3_SSID_BROADCOM_BCM95701A7 0x0007 /* Agilent */
+#define T3_SSID_BROADCOM_BCM95701A7 0x0007 /* Agilent */
#define T3_SSID_BROADCOM_BCM95701A10 0x0008
#define T3_SSID_BROADCOM_BCM95701A12 0x8008
#define T3_SSID_BROADCOM_BCM95703Ax1 0x0009
@@ -449,7 +438,6 @@
#define T3_SSID_3COM_3C996SX 0x1004
#define T3_SSID_3COM_3C997SX 0x1005
-
/* Dell subsystem/subvendor IDs. */
#define T3_SVID_DELL 0x1028
@@ -469,7 +457,6 @@
#define T3_SSID_COMPAQ_NC7780 0x0085
#define T3_SSID_COMPAQ_NC7780_2 0x0099
-
/******************************************************************************/
/* MII registers. */
/******************************************************************************/
@@ -490,14 +477,12 @@
#define PHY_CTRL_LOOPBACK_MODE BIT_14
#define PHY_CTRL_PHY_RESET BIT_15
-
/* Status register. */
#define PHY_STATUS_REG 0x01
#define PHY_STATUS_LINK_PASS BIT_2
#define PHY_STATUS_AUTO_NEG_COMPLETE BIT_5
-
/* Phy Id registers. */
#define PHY_ID1_REG 0x02
#define PHY_ID1_OUI_MASK 0xffff
@@ -507,7 +492,6 @@
#define PHY_ID2_MODEL_MASK 0x03f0
#define PHY_ID2_OUI_MASK 0xfc00
-
/* Auto-negotiation advertisement register. */
#define PHY_AN_AD_REG 0x04
@@ -519,18 +503,15 @@
#define PHY_AN_AD_100BASETX_FULL BIT_8
#define PHY_AN_AD_PROTOCOL_802_3_CSMA_CD 0x01
-
/* Auto-negotiation Link Partner Ability register. */
#define PHY_LINK_PARTNER_ABILITY_REG 0x05
#define PHY_LINK_PARTNER_ASYM_PAUSE BIT_11
#define PHY_LINK_PARTNER_PAUSE_CAPABLE BIT_10
-
/* Auto-negotiation expansion register. */
#define PHY_AN_EXPANSION_REG 0x06
-
/******************************************************************************/
/* BCM5400 and BCM5401 phy info. */
/******************************************************************************/
@@ -557,7 +538,6 @@
#define PHY_ID_MASK (PHY_ID_OUI_MASK | \
PHY_ID_MODEL_MASK)
-
#define UNKNOWN_PHY_ID(x) ((((x) & PHY_ID_MASK) != PHY_BCM5400_PHY_ID) && \
(((x) & PHY_ID_MASK) != PHY_BCM5401_PHY_ID) && \
(((x) & PHY_ID_MASK) != PHY_BCM5411_PHY_ID) && \
@@ -566,7 +546,6 @@
(((x) & PHY_ID_MASK) != PHY_BCM5704_PHY_ID) && \
(((x) & PHY_ID_MASK) != PHY_BCM8002_PHY_ID))
-
/* 1000Base-T control register. */
#define BCM540X_1000BASET_CTRL_REG 0x09
@@ -575,7 +554,6 @@
#define BCM540X_CONFIG_AS_MASTER BIT_11
#define BCM540X_ENABLE_CONFIG_AS_MASTER BIT_12
-
/* Extended control register. */
#define BCM540X_EXT_CTRL_REG 0x10
@@ -587,11 +565,9 @@
#define BCM540X_EXT_STATUS_LINK_PASS BIT_8
-
/* DSP Coefficient Read/Write Port. */
#define BCM540X_DSP_RW_PORT 0x15
-
/* DSP Coeficient Address Register. */
#define BCM540X_DSP_ADDRESS_REG 0x17
@@ -631,7 +607,6 @@
#define BCM540X_CONTROL_ALL_CHANNELS BIT_15
-
/* Auxilliary Control Register (Shadow Register) */
#define BCM5401_AUX_CTRL 0x18
@@ -644,7 +619,6 @@
#define BCM5401_SHADOW_SEL_MISC_TEST2 0x05
#define BCM5401_SHADOW_SEL_IP_PHONE_SEED 0x06
-
/* Shadow register selector == '000' */
#define BCM5401_SHDW_NORMAL_DIAG_MODE BIT_3
#define BCM5401_SHDW_NORMAL_DISABLE_MBP BIT_4
@@ -664,7 +638,6 @@
#define BCM5401_SHDW_NORMAL_EXT_PACKET_LENGTH BIT_14
#define BCM5401_SHDW_NORMAL_EXTERNAL_LOOPBACK BIT_15
-
/* Auxilliary status summary. */
#define BCM540X_AUX_STATUS_REG 0x19
@@ -678,7 +651,6 @@
#define BCM540X_AUX_100BASET_HD (BIT_9 | BIT_10)
#define BCM540X_AUX_100BASET_FD (BIT_8 | BIT_9 | BIT_10)
-
/* Interrupt status. */
#define BCM540X_INT_STATUS_REG 0x1a
@@ -687,11 +659,9 @@
#define BCM540X_INT_DUPLEX_CHANGE BIT_3
#define BCM540X_INT_AUTO_NEG_PAGE_RX BIT_10
-
/* Interrupt mask register. */
#define BCM540X_INT_MASK_REG 0x1b
-
/******************************************************************************/
/* Register definitions. */
/******************************************************************************/
@@ -701,9 +671,9 @@
typedef volatile LM_UINT32 T3_32BIT_REGISTER, *PT3_32BIT_REGISTER;
typedef struct {
- /* Big endian format. */
- T3_32BIT_REGISTER High;
- T3_32BIT_REGISTER Low;
+ /* Big endian format. */
+ T3_32BIT_REGISTER High;
+ T3_32BIT_REGISTER Low;
} T3_64BIT_REGISTER, *PT3_64BIT_REGISTER;
typedef T3_64BIT_REGISTER T3_64BIT_HOST_ADDR, *PT3_64BIT_HOST_ADDR;
@@ -711,47 +681,44 @@
#define T3_NUM_OF_DMA_DESC 256
#define T3_NUM_OF_MBUF 768
-typedef struct
-{
- T3_64BIT_REGISTER host_addr;
- T3_32BIT_REGISTER nic_mbuf;
- T3_16BIT_REGISTER len;
- T3_16BIT_REGISTER cqid_sqid;
- T3_32BIT_REGISTER flags;
- T3_32BIT_REGISTER opaque1;
- T3_32BIT_REGISTER opaque2;
- T3_32BIT_REGISTER opaque3;
-}T3_DMA_DESC, *PT3_DMA_DESC;
-
+typedef struct {
+ T3_64BIT_REGISTER host_addr;
+ T3_32BIT_REGISTER nic_mbuf;
+ T3_16BIT_REGISTER len;
+ T3_16BIT_REGISTER cqid_sqid;
+ T3_32BIT_REGISTER flags;
+ T3_32BIT_REGISTER opaque1;
+ T3_32BIT_REGISTER opaque2;
+ T3_32BIT_REGISTER opaque3;
+} T3_DMA_DESC, *PT3_DMA_DESC;
/******************************************************************************/
/* Ring control block. */
/******************************************************************************/
typedef struct {
- T3_64BIT_REGISTER HostRingAddr;
+ T3_64BIT_REGISTER HostRingAddr;
- union {
- struct {
+ union {
+ struct {
#ifdef BIG_ENDIAN_HOST
- T3_16BIT_REGISTER MaxLen;
- T3_16BIT_REGISTER Flags;
-#else /* BIG_ENDIAN_HOST */
- T3_16BIT_REGISTER Flags;
- T3_16BIT_REGISTER MaxLen;
+ T3_16BIT_REGISTER MaxLen;
+ T3_16BIT_REGISTER Flags;
+#else /* BIG_ENDIAN_HOST */
+ T3_16BIT_REGISTER Flags;
+ T3_16BIT_REGISTER MaxLen;
#endif
- } s;
+ } s;
- T3_32BIT_REGISTER MaxLen_Flags;
- } u;
+ T3_32BIT_REGISTER MaxLen_Flags;
+ } u;
- T3_32BIT_REGISTER NicRingAddr;
+ T3_32BIT_REGISTER NicRingAddr;
} T3_RCB, *PT3_RCB;
#define T3_RCB_FLAG_USE_EXT_RECV_BD BIT_0
#define T3_RCB_FLAG_RING_DISABLED BIT_1
-
/******************************************************************************/
/* Status block. */
/******************************************************************************/
@@ -763,98 +730,95 @@
#define T3_STATUS_BLOCK_SIZE 0x80
typedef struct {
- volatile LM_UINT32 Status;
- #define STATUS_BLOCK_UPDATED BIT_0
- #define STATUS_BLOCK_LINK_CHANGED_STATUS BIT_1
- #define STATUS_BLOCK_ERROR BIT_2
+ volatile LM_UINT32 Status;
+#define STATUS_BLOCK_UPDATED BIT_0
+#define STATUS_BLOCK_LINK_CHANGED_STATUS BIT_1
+#define STATUS_BLOCK_ERROR BIT_2
- volatile LM_UINT32 StatusTag;
+ volatile LM_UINT32 StatusTag;
#ifdef BIG_ENDIAN_HOST
- volatile LM_UINT16 RcvStdConIdx;
- volatile LM_UINT16 RcvJumboConIdx;
+ volatile LM_UINT16 RcvStdConIdx;
+ volatile LM_UINT16 RcvJumboConIdx;
- volatile LM_UINT16 Reserved2;
- volatile LM_UINT16 RcvMiniConIdx;
+ volatile LM_UINT16 Reserved2;
+ volatile LM_UINT16 RcvMiniConIdx;
- struct {
- volatile LM_UINT16 SendConIdx; /* Send consumer index. */
- volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */
- } Idx[16];
-#else /* BIG_ENDIAN_HOST */
- volatile LM_UINT16 RcvJumboConIdx;
- volatile LM_UINT16 RcvStdConIdx;
+ struct {
+ volatile LM_UINT16 SendConIdx; /* Send consumer index. */
+ volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */
+ } Idx[16];
+#else /* BIG_ENDIAN_HOST */
+ volatile LM_UINT16 RcvJumboConIdx;
+ volatile LM_UINT16 RcvStdConIdx;
- volatile LM_UINT16 RcvMiniConIdx;
- volatile LM_UINT16 Reserved2;
+ volatile LM_UINT16 RcvMiniConIdx;
+ volatile LM_UINT16 Reserved2;
- struct {
- volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */
- volatile LM_UINT16 SendConIdx; /* Send consumer index. */
- } Idx[16];
+ struct {
+ volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */
+ volatile LM_UINT16 SendConIdx; /* Send consumer index. */
+ } Idx[16];
#endif
} T3_STATUS_BLOCK, *PT3_STATUS_BLOCK;
-
/******************************************************************************/
/* Receive buffer descriptors. */
/******************************************************************************/
typedef struct {
- T3_64BIT_HOST_ADDR HostAddr;
+ T3_64BIT_HOST_ADDR HostAddr;
#ifdef BIG_ENDIAN_HOST
- volatile LM_UINT16 Index;
- volatile LM_UINT16 Len;
+ volatile LM_UINT16 Index;
+ volatile LM_UINT16 Len;
- volatile LM_UINT16 Type;
- volatile LM_UINT16 Flags;
+ volatile LM_UINT16 Type;
+ volatile LM_UINT16 Flags;
- volatile LM_UINT16 IpCksum;
- volatile LM_UINT16 TcpUdpCksum;
+ volatile LM_UINT16 IpCksum;
+ volatile LM_UINT16 TcpUdpCksum;
- volatile LM_UINT16 ErrorFlag;
- volatile LM_UINT16 VlanTag;
-#else /* BIG_ENDIAN_HOST */
- volatile LM_UINT16 Len;
- volatile LM_UINT16 Index;
+ volatile LM_UINT16 ErrorFlag;
+ volatile LM_UINT16 VlanTag;
+#else /* BIG_ENDIAN_HOST */
+ volatile LM_UINT16 Len;
+ volatile LM_UINT16 Index;
- volatile LM_UINT16 Flags;
- volatile LM_UINT16 Type;
+ volatile LM_UINT16 Flags;
+ volatile LM_UINT16 Type;
- volatile LM_UINT16 TcpUdpCksum;
- volatile LM_UINT16 IpCksum;
+ volatile LM_UINT16 TcpUdpCksum;
+ volatile LM_UINT16 IpCksum;
- volatile LM_UINT16 VlanTag;
- volatile LM_UINT16 ErrorFlag;
+ volatile LM_UINT16 VlanTag;
+ volatile LM_UINT16 ErrorFlag;
#endif
- volatile LM_UINT32 Reserved;
- volatile LM_UINT32 Opaque;
+ volatile LM_UINT32 Reserved;
+ volatile LM_UINT32 Opaque;
} T3_RCV_BD, *PT3_RCV_BD;
-
typedef struct {
- T3_64BIT_HOST_ADDR HostAddr[3];
+ T3_64BIT_HOST_ADDR HostAddr[3];
#ifdef BIG_ENDIAN_HOST
- LM_UINT16 Len1;
- LM_UINT16 Len2;
+ LM_UINT16 Len1;
+ LM_UINT16 Len2;
- LM_UINT16 Len3;
- LM_UINT16 Reserved1;
-#else /* BIG_ENDIAN_HOST */
- LM_UINT16 Len2;
- LM_UINT16 Len1;
+ LM_UINT16 Len3;
+ LM_UINT16 Reserved1;
+#else /* BIG_ENDIAN_HOST */
+ LM_UINT16 Len2;
+ LM_UINT16 Len1;
- LM_UINT16 Reserved1;
- LM_UINT16 Len3;
+ LM_UINT16 Reserved1;
+ LM_UINT16 Len3;
#endif
- T3_RCV_BD StdRcvBd;
+ T3_RCV_BD StdRcvBd;
} T3_EXT_RCV_BD, *PT3_EXT_RCV_BD;
-
/* Error flags. */
#define RCV_BD_ERR_BAD_CRC 0x0001
#define RCV_BD_ERR_COLL_DETECT 0x0002
@@ -866,7 +830,6 @@
#define RCV_BD_ERR_TRUNC_NO_RESOURCES 0x0080
#define RCV_BD_ERR_GIANT_FRAME_RCVD 0x0100
-
/* Buffer descriptor flags. */
#define RCV_BD_FLAG_END 0x0004
#define RCV_BD_FLAG_JUMBO_RING 0x0020
@@ -877,44 +840,42 @@
#define RCV_BD_FLAG_TCP_UDP_CHKSUM_FIELD 0x2000
#define RCV_BD_FLAG_TCP_PACKET 0x4000
-
/******************************************************************************/
/* Send buffer descriptor. */
/******************************************************************************/
typedef struct {
- T3_64BIT_HOST_ADDR HostAddr;
+ T3_64BIT_HOST_ADDR HostAddr;
- union {
- struct {
+ union {
+ struct {
#ifdef BIG_ENDIAN_HOST
- LM_UINT16 Len;
- LM_UINT16 Flags;
-#else /* BIG_ENDIAN_HOST */
- LM_UINT16 Flags;
- LM_UINT16 Len;
+ LM_UINT16 Len;
+ LM_UINT16 Flags;
+#else /* BIG_ENDIAN_HOST */
+ LM_UINT16 Flags;
+ LM_UINT16 Len;
#endif
- } s1;
+ } s1;
- LM_UINT32 Len_Flags;
- } u1;
+ LM_UINT32 Len_Flags;
+ } u1;
- union {
- struct {
+ union {
+ struct {
#ifdef BIG_ENDIAN_HOST
- LM_UINT16 Reserved;
- LM_UINT16 VlanTag;
-#else /* BIG_ENDIAN_HOST */
- LM_UINT16 VlanTag;
- LM_UINT16 Reserved;
+ LM_UINT16 Reserved;
+ LM_UINT16 VlanTag;
+#else /* BIG_ENDIAN_HOST */
+ LM_UINT16 VlanTag;
+ LM_UINT16 Reserved;
#endif
- } s2;
+ } s2;
- LM_UINT32 VlanTag;
- } u2;
+ LM_UINT32 VlanTag;
+ } u2;
} T3_SND_BD, *PT3_SND_BD;
-
/* Send buffer descriptor flags. */
#define SND_BD_FLAG_TCP_UDP_CKSUM 0x0001
#define SND_BD_FLAG_IP_CKSUM 0x0002
@@ -932,435 +893,426 @@
/* MBUFs */
typedef struct T3_MBUF_FRAME_DESC {
#ifdef BIG_ENDIAN_HOST
- LM_UINT32 status_control;
- union {
- struct {
- LM_UINT8 cqid;
- LM_UINT8 reserved1;
- LM_UINT16 length;
- }s1;
- LM_UINT32 word;
- }u1;
- union {
- struct
- {
- LM_UINT16 ip_hdr_start;
- LM_UINT16 tcp_udp_hdr_start;
- }s2;
+ LM_UINT32 status_control;
+ union {
+ struct {
+ LM_UINT8 cqid;
+ LM_UINT8 reserved1;
+ LM_UINT16 length;
+ } s1;
+ LM_UINT32 word;
+ } u1;
+ union {
+ struct {
+ LM_UINT16 ip_hdr_start;
+ LM_UINT16 tcp_udp_hdr_start;
+ } s2;
- LM_UINT32 word;
- }u2;
+ LM_UINT32 word;
+ } u2;
- union {
- struct {
- LM_UINT16 data_start;
- LM_UINT16 vlan_id;
- }s3;
+ union {
+ struct {
+ LM_UINT16 data_start;
+ LM_UINT16 vlan_id;
+ } s3;
- LM_UINT32 word;
- }u3;
+ LM_UINT32 word;
+ } u3;
- union {
- struct {
- LM_UINT16 ip_checksum;
- LM_UINT16 tcp_udp_checksum;
- }s4;
+ union {
+ struct {
+ LM_UINT16 ip_checksum;
+ LM_UINT16 tcp_udp_checksum;
+ } s4;
- LM_UINT32 word;
- }u4;
+ LM_UINT32 word;
+ } u4;
- union {
- struct {
- LM_UINT16 pseudo_checksum;
- LM_UINT16 checksum_status;
- }s5;
+ union {
+ struct {
+ LM_UINT16 pseudo_checksum;
+ LM_UINT16 checksum_status;
+ } s5;
- LM_UINT32 word;
- }u5;
+ LM_UINT32 word;
+ } u5;
- union {
- struct {
- LM_UINT16 rule_match;
- LM_UINT8 class;
- LM_UINT8 rupt;
- }s6;
+ union {
+ struct {
+ LM_UINT16 rule_match;
+ LM_UINT8 class;
+ LM_UINT8 rupt;
+ } s6;
- LM_UINT32 word;
- }u6;
+ LM_UINT32 word;
+ } u6;
- union {
- struct {
- LM_UINT16 reserved2;
- LM_UINT16 mbuf_num;
- }s7;
+ union {
+ struct {
+ LM_UINT16 reserved2;
+ LM_UINT16 mbuf_num;
+ } s7;
- LM_UINT32 word;
- }u7;
+ LM_UINT32 word;
+ } u7;
- LM_UINT32 reserved3;
- LM_UINT32 reserved4;
+ LM_UINT32 reserved3;
+ LM_UINT32 reserved4;
#else
- LM_UINT32 status_control;
- union {
- struct {
- LM_UINT16 length;
- LM_UINT8 reserved1;
- LM_UINT8 cqid;
- }s1;
- LM_UINT32 word;
- }u1;
- union {
- struct
- {
- LM_UINT16 tcp_udp_hdr_start;
- LM_UINT16 ip_hdr_start;
- }s2;
+ LM_UINT32 status_control;
+ union {
+ struct {
+ LM_UINT16 length;
+ LM_UINT8 reserved1;
+ LM_UINT8 cqid;
+ } s1;
+ LM_UINT32 word;
+ } u1;
+ union {
+ struct {
+ LM_UINT16 tcp_udp_hdr_start;
+ LM_UINT16 ip_hdr_start;
+ } s2;
- LM_UINT32 word;
- }u2;
+ LM_UINT32 word;
+ } u2;
- union {
- struct {
- LM_UINT16 vlan_id;
- LM_UINT16 data_start;
- }s3;
+ union {
+ struct {
+ LM_UINT16 vlan_id;
+ LM_UINT16 data_start;
+ } s3;
- LM_UINT32 word;
- }u3;
+ LM_UINT32 word;
+ } u3;
- union {
- struct {
- LM_UINT16 tcp_udp_checksum;
- LM_UINT16 ip_checksum;
- }s4;
+ union {
+ struct {
+ LM_UINT16 tcp_udp_checksum;
+ LM_UINT16 ip_checksum;
+ } s4;
- LM_UINT32 word;
- }u4;
+ LM_UINT32 word;
+ } u4;
- union {
- struct {
- LM_UINT16 checksum_status;
- LM_UINT16 pseudo_checksum;
- }s5;
+ union {
+ struct {
+ LM_UINT16 checksum_status;
+ LM_UINT16 pseudo_checksum;
+ } s5;
- LM_UINT32 word;
- }u5;
+ LM_UINT32 word;
+ } u5;
- union {
- struct {
- LM_UINT8 rupt;
- LM_UINT8 class;
- LM_UINT16 rule_match;
- }s6;
+ union {
+ struct {
+ LM_UINT8 rupt;
+ LM_UINT8 class;
+ LM_UINT16 rule_match;
+ } s6;
- LM_UINT32 word;
- }u6;
+ LM_UINT32 word;
+ } u6;
- union {
- struct {
- LM_UINT16 mbuf_num;
- LM_UINT16 reserved2;
- }s7;
+ union {
+ struct {
+ LM_UINT16 mbuf_num;
+ LM_UINT16 reserved2;
+ } s7;
- LM_UINT32 word;
- }u7;
+ LM_UINT32 word;
+ } u7;
- LM_UINT32 reserved3;
- LM_UINT32 reserved4;
+ LM_UINT32 reserved3;
+ LM_UINT32 reserved4;
#endif
-}T3_MBUF_FRAME_DESC,*PT3_MBUF_FRAME_DESC;
+} T3_MBUF_FRAME_DESC, *PT3_MBUF_FRAME_DESC;
typedef struct T3_MBUF_HDR {
- union {
- struct {
- unsigned int C:1;
- unsigned int F:1;
- unsigned int reserved1:7;
- unsigned int next_mbuf:16;
- unsigned int length:7;
- }s1;
+ union {
+ struct {
+ unsigned int C:1;
+ unsigned int F:1;
+ unsigned int reserved1:7;
+ unsigned int next_mbuf:16;
+ unsigned int length:7;
+ } s1;
- LM_UINT32 word;
- }u1;
+ LM_UINT32 word;
+ } u1;
- LM_UINT32 next_frame_ptr;
-}T3_MBUF_HDR, *PT3_MBUF_HDR;
+ LM_UINT32 next_frame_ptr;
+} T3_MBUF_HDR, *PT3_MBUF_HDR;
-typedef struct T3_MBUF
-{
- T3_MBUF_HDR hdr;
- union
- {
- struct {
- T3_MBUF_FRAME_DESC frame_hdr;
- LM_UINT32 data[20];
- }s1;
+typedef struct T3_MBUF {
+ T3_MBUF_HDR hdr;
+ union {
+ struct {
+ T3_MBUF_FRAME_DESC frame_hdr;
+ LM_UINT32 data[20];
+ } s1;
- struct {
- LM_UINT32 data[30];
- }s2;
- }body;
-}T3_MBUF, *PT3_MBUF;
+ struct {
+ LM_UINT32 data[30];
+ } s2;
+ } body;
+} T3_MBUF, *PT3_MBUF;
#define T3_MBUF_BASE (T3_NIC_MBUF_POOL_ADDR >> 7)
#define T3_MBUF_END ((T3_NIC_MBUF_POOL_ADDR + T3_NIC_MBUF_POOL_SIZE) >> 7)
-
/******************************************************************************/
/* Statistics block. */
/******************************************************************************/
typedef struct {
- LM_UINT8 Reserved0[0x400-0x300];
+ LM_UINT8 Reserved0[0x400 - 0x300];
- /* Statistics maintained by Receive MAC. */
- T3_64BIT_REGISTER ifHCInOctets;
- T3_64BIT_REGISTER Reserved1;
- T3_64BIT_REGISTER etherStatsFragments;
- T3_64BIT_REGISTER ifHCInUcastPkts;
- T3_64BIT_REGISTER ifHCInMulticastPkts;
- T3_64BIT_REGISTER ifHCInBroadcastPkts;
- T3_64BIT_REGISTER dot3StatsFCSErrors;
- T3_64BIT_REGISTER dot3StatsAlignmentErrors;
- T3_64BIT_REGISTER xonPauseFramesReceived;
- T3_64BIT_REGISTER xoffPauseFramesReceived;
- T3_64BIT_REGISTER macControlFramesReceived;
- T3_64BIT_REGISTER xoffStateEntered;
- T3_64BIT_REGISTER dot3StatsFramesTooLong;
- T3_64BIT_REGISTER etherStatsJabbers;
- T3_64BIT_REGISTER etherStatsUndersizePkts;
- T3_64BIT_REGISTER inRangeLengthError;
- T3_64BIT_REGISTER outRangeLengthError;
- T3_64BIT_REGISTER etherStatsPkts64Octets;
- T3_64BIT_REGISTER etherStatsPkts65Octetsto127Octets;
- T3_64BIT_REGISTER etherStatsPkts128Octetsto255Octets;
- T3_64BIT_REGISTER etherStatsPkts256Octetsto511Octets;
- T3_64BIT_REGISTER etherStatsPkts512Octetsto1023Octets;
- T3_64BIT_REGISTER etherStatsPkts1024Octetsto1522Octets;
- T3_64BIT_REGISTER etherStatsPkts1523Octetsto2047Octets;
- T3_64BIT_REGISTER etherStatsPkts2048Octetsto4095Octets;
- T3_64BIT_REGISTER etherStatsPkts4096Octetsto8191Octets;
- T3_64BIT_REGISTER etherStatsPkts8192Octetsto9022Octets;
+ /* Statistics maintained by Receive MAC. */
+ T3_64BIT_REGISTER ifHCInOctets;
+ T3_64BIT_REGISTER Reserved1;
+ T3_64BIT_REGISTER etherStatsFragments;
+ T3_64BIT_REGISTER ifHCInUcastPkts;
+ T3_64BIT_REGISTER ifHCInMulticastPkts;
+ T3_64BIT_REGISTER ifHCInBroadcastPkts;
+ T3_64BIT_REGISTER dot3StatsFCSErrors;
+ T3_64BIT_REGISTER dot3StatsAlignmentErrors;
+ T3_64BIT_REGISTER xonPauseFramesReceived;
+ T3_64BIT_REGISTER xoffPauseFramesReceived;
+ T3_64BIT_REGISTER macControlFramesReceived;
+ T3_64BIT_REGISTER xoffStateEntered;
+ T3_64BIT_REGISTER dot3StatsFramesTooLong;
+ T3_64BIT_REGISTER etherStatsJabbers;
+ T3_64BIT_REGISTER etherStatsUndersizePkts;
+ T3_64BIT_REGISTER inRangeLengthError;
+ T3_64BIT_REGISTER outRangeLengthError;
+ T3_64BIT_REGISTER etherStatsPkts64Octets;
+ T3_64BIT_REGISTER etherStatsPkts65Octetsto127Octets;
+ T3_64BIT_REGISTER etherStatsPkts128Octetsto255Octets;
+ T3_64BIT_REGISTER etherStatsPkts256Octetsto511Octets;
+ T3_64BIT_REGISTER etherStatsPkts512Octetsto1023Octets;
+ T3_64BIT_REGISTER etherStatsPkts1024Octetsto1522Octets;
+ T3_64BIT_REGISTER etherStatsPkts1523Octetsto2047Octets;
+ T3_64BIT_REGISTER etherStatsPkts2048Octetsto4095Octets;
+ T3_64BIT_REGISTER etherStatsPkts4096Octetsto8191Octets;
+ T3_64BIT_REGISTER etherStatsPkts8192Octetsto9022Octets;
- T3_64BIT_REGISTER Unused1[37];
+ T3_64BIT_REGISTER Unused1[37];
- /* Statistics maintained by Transmit MAC. */
- T3_64BIT_REGISTER ifHCOutOctets;
- T3_64BIT_REGISTER Reserved2;
- T3_64BIT_REGISTER etherStatsCollisions;
- T3_64BIT_REGISTER outXonSent;
- T3_64BIT_REGISTER outXoffSent;
- T3_64BIT_REGISTER flowControlDone;
- T3_64BIT_REGISTER dot3StatsInternalMacTransmitErrors;
- T3_64BIT_REGISTER dot3StatsSingleCollisionFrames;
- T3_64BIT_REGISTER dot3StatsMultipleCollisionFrames;
- T3_64BIT_REGISTER dot3StatsDeferredTransmissions;
- T3_64BIT_REGISTER Reserved3;
- T3_64BIT_REGISTER dot3StatsExcessiveCollisions;
- T3_64BIT_REGISTER dot3StatsLateCollisions;
- T3_64BIT_REGISTER dot3Collided2Times;
- T3_64BIT_REGISTER dot3Collided3Times;
- T3_64BIT_REGISTER dot3Collided4Times;
- T3_64BIT_REGISTER dot3Collided5Times;
- T3_64BIT_REGISTER dot3Collided6Times;
- T3_64BIT_REGISTER dot3Collided7Times;
- T3_64BIT_REGISTER dot3Collided8Times;
- T3_64BIT_REGISTER dot3Collided9Times;
- T3_64BIT_REGISTER dot3Collided10Times;
- T3_64BIT_REGISTER dot3Collided11Times;
- T3_64BIT_REGISTER dot3Collided12Times;
- T3_64BIT_REGISTER dot3Collided13Times;
- T3_64BIT_REGISTER dot3Collided14Times;
- T3_64BIT_REGISTER dot3Collided15Times;
- T3_64BIT_REGISTER ifHCOutUcastPkts;
- T3_64BIT_REGISTER ifHCOutMulticastPkts;
- T3_64BIT_REGISTER ifHCOutBroadcastPkts;
- T3_64BIT_REGISTER dot3StatsCarrierSenseErrors;
- T3_64BIT_REGISTER ifOutDiscards;
- T3_64BIT_REGISTER ifOutErrors;
+ /* Statistics maintained by Transmit MAC. */
+ T3_64BIT_REGISTER ifHCOutOctets;
+ T3_64BIT_REGISTER Reserved2;
+ T3_64BIT_REGISTER etherStatsCollisions;
+ T3_64BIT_REGISTER outXonSent;
+ T3_64BIT_REGISTER outXoffSent;
+ T3_64BIT_REGISTER flowControlDone;
+ T3_64BIT_REGISTER dot3StatsInternalMacTransmitErrors;
+ T3_64BIT_REGISTER dot3StatsSingleCollisionFrames;
+ T3_64BIT_REGISTER dot3StatsMultipleCollisionFrames;
+ T3_64BIT_REGISTER dot3StatsDeferredTransmissions;
+ T3_64BIT_REGISTER Reserved3;
+ T3_64BIT_REGISTER dot3StatsExcessiveCollisions;
+ T3_64BIT_REGISTER dot3StatsLateCollisions;
+ T3_64BIT_REGISTER dot3Collided2Times;
+ T3_64BIT_REGISTER dot3Collided3Times;
+ T3_64BIT_REGISTER dot3Collided4Times;
+ T3_64BIT_REGISTER dot3Collided5Times;
+ T3_64BIT_REGISTER dot3Collided6Times;
+ T3_64BIT_REGISTER dot3Collided7Times;
+ T3_64BIT_REGISTER dot3Collided8Times;
+ T3_64BIT_REGISTER dot3Collided9Times;
+ T3_64BIT_REGISTER dot3Collided10Times;
+ T3_64BIT_REGISTER dot3Collided11Times;
+ T3_64BIT_REGISTER dot3Collided12Times;
+ T3_64BIT_REGISTER dot3Collided13Times;
+ T3_64BIT_REGISTER dot3Collided14Times;
+ T3_64BIT_REGISTER dot3Collided15Times;
+ T3_64BIT_REGISTER ifHCOutUcastPkts;
+ T3_64BIT_REGISTER ifHCOutMulticastPkts;
+ T3_64BIT_REGISTER ifHCOutBroadcastPkts;
+ T3_64BIT_REGISTER dot3StatsCarrierSenseErrors;
+ T3_64BIT_REGISTER ifOutDiscards;
+ T3_64BIT_REGISTER ifOutErrors;
- T3_64BIT_REGISTER Unused2[31];
+ T3_64BIT_REGISTER Unused2[31];
- /* Statistics maintained by Receive List Placement. */
- T3_64BIT_REGISTER COSIfHCInPkts[16];
- T3_64BIT_REGISTER COSFramesDroppedDueToFilters;
- T3_64BIT_REGISTER nicDmaWriteQueueFull;
- T3_64BIT_REGISTER nicDmaWriteHighPriQueueFull;
- T3_64BIT_REGISTER nicNoMoreRxBDs;
- T3_64BIT_REGISTER ifInDiscards;
- T3_64BIT_REGISTER ifInErrors;
- T3_64BIT_REGISTER nicRecvThresholdHit;
+ /* Statistics maintained by Receive List Placement. */
+ T3_64BIT_REGISTER COSIfHCInPkts[16];
+ T3_64BIT_REGISTER COSFramesDroppedDueToFilters;
+ T3_64BIT_REGISTER nicDmaWriteQueueFull;
+ T3_64BIT_REGISTER nicDmaWriteHighPriQueueFull;
+ T3_64BIT_REGISTER nicNoMoreRxBDs;
+ T3_64BIT_REGISTER ifInDiscards;
+ T3_64BIT_REGISTER ifInErrors;
+ T3_64BIT_REGISTER nicRecvThresholdHit;
- T3_64BIT_REGISTER Unused3[9];
+ T3_64BIT_REGISTER Unused3[9];
- /* Statistics maintained by Send Data Initiator. */
- T3_64BIT_REGISTER COSIfHCOutPkts[16];
- T3_64BIT_REGISTER nicDmaReadQueueFull;
- T3_64BIT_REGISTER nicDmaReadHighPriQueueFull;
- T3_64BIT_REGISTER nicSendDataCompQueueFull;
+ /* Statistics maintained by Send Data Initiator. */
+ T3_64BIT_REGISTER COSIfHCOutPkts[16];
+ T3_64BIT_REGISTER nicDmaReadQueueFull;
+ T3_64BIT_REGISTER nicDmaReadHighPriQueueFull;
+ T3_64BIT_REGISTER nicSendDataCompQueueFull;
- /* Statistics maintained by Host Coalescing. */
- T3_64BIT_REGISTER nicRingSetSendProdIndex;
- T3_64BIT_REGISTER nicRingStatusUpdate;
- T3_64BIT_REGISTER nicInterrupts;
- T3_64BIT_REGISTER nicAvoidedInterrupts;
- T3_64BIT_REGISTER nicSendThresholdHit;
+ /* Statistics maintained by Host Coalescing. */
+ T3_64BIT_REGISTER nicRingSetSendProdIndex;
+ T3_64BIT_REGISTER nicRingStatusUpdate;
+ T3_64BIT_REGISTER nicInterrupts;
+ T3_64BIT_REGISTER nicAvoidedInterrupts;
+ T3_64BIT_REGISTER nicSendThresholdHit;
- LM_UINT8 Reserved4[0xb00-0x9c0];
+ LM_UINT8 Reserved4[0xb00 - 0x9c0];
} T3_STATS_BLOCK, *PT3_STATS_BLOCK;
-
/******************************************************************************/
/* PCI configuration registers. */
/******************************************************************************/
typedef struct {
- T3_16BIT_REGISTER VendorId;
- T3_16BIT_REGISTER DeviceId;
+ T3_16BIT_REGISTER VendorId;
+ T3_16BIT_REGISTER DeviceId;
- T3_16BIT_REGISTER Command;
- T3_16BIT_REGISTER Status;
+ T3_16BIT_REGISTER Command;
+ T3_16BIT_REGISTER Status;
- T3_32BIT_REGISTER ClassCodeRevId;
+ T3_32BIT_REGISTER ClassCodeRevId;
- T3_8BIT_REGISTER CacheLineSize;
- T3_8BIT_REGISTER LatencyTimer;
- T3_8BIT_REGISTER HeaderType;
- T3_8BIT_REGISTER Bist;
+ T3_8BIT_REGISTER CacheLineSize;
+ T3_8BIT_REGISTER LatencyTimer;
+ T3_8BIT_REGISTER HeaderType;
+ T3_8BIT_REGISTER Bist;
- T3_32BIT_REGISTER MemBaseAddrLow;
- T3_32BIT_REGISTER MemBaseAddrHigh;
+ T3_32BIT_REGISTER MemBaseAddrLow;
+ T3_32BIT_REGISTER MemBaseAddrHigh;
- LM_UINT8 Unused1[20];
+ LM_UINT8 Unused1[20];
- T3_16BIT_REGISTER SubsystemVendorId;
- T3_16BIT_REGISTER SubsystemId;
+ T3_16BIT_REGISTER SubsystemVendorId;
+ T3_16BIT_REGISTER SubsystemId;
- T3_32BIT_REGISTER RomBaseAddr;
+ T3_32BIT_REGISTER RomBaseAddr;
- T3_8BIT_REGISTER PciXCapiblityPtr;
- LM_UINT8 Unused2[7];
+ T3_8BIT_REGISTER PciXCapiblityPtr;
+ LM_UINT8 Unused2[7];
- T3_8BIT_REGISTER IntLine;
- T3_8BIT_REGISTER IntPin;
- T3_8BIT_REGISTER MinGnt;
- T3_8BIT_REGISTER MaxLat;
+ T3_8BIT_REGISTER IntLine;
+ T3_8BIT_REGISTER IntPin;
+ T3_8BIT_REGISTER MinGnt;
+ T3_8BIT_REGISTER MaxLat;
- T3_8BIT_REGISTER PciXCapabilities;
- T3_8BIT_REGISTER PmCapabilityPtr;
- T3_16BIT_REGISTER PciXCommand;
+ T3_8BIT_REGISTER PciXCapabilities;
+ T3_8BIT_REGISTER PmCapabilityPtr;
+ T3_16BIT_REGISTER PciXCommand;
- T3_32BIT_REGISTER PciXStatus;
+ T3_32BIT_REGISTER PciXStatus;
- T3_8BIT_REGISTER PmCapabilityId;
- T3_8BIT_REGISTER VpdCapabilityPtr;
- T3_16BIT_REGISTER PmCapabilities;
+ T3_8BIT_REGISTER PmCapabilityId;
+ T3_8BIT_REGISTER VpdCapabilityPtr;
+ T3_16BIT_REGISTER PmCapabilities;
- T3_16BIT_REGISTER PmCtrlStatus;
- #define PM_CTRL_PME_STATUS BIT_15
- #define PM_CTRL_PME_ENABLE BIT_8
- #define PM_CTRL_PME_POWER_STATE_D0 0
- #define PM_CTRL_PME_POWER_STATE_D1 1
- #define PM_CTRL_PME_POWER_STATE_D2 2
- #define PM_CTRL_PME_POWER_STATE_D3H 3
+ T3_16BIT_REGISTER PmCtrlStatus;
+#define PM_CTRL_PME_STATUS BIT_15
+#define PM_CTRL_PME_ENABLE BIT_8
+#define PM_CTRL_PME_POWER_STATE_D0 0
+#define PM_CTRL_PME_POWER_STATE_D1 1
+#define PM_CTRL_PME_POWER_STATE_D2 2
+#define PM_CTRL_PME_POWER_STATE_D3H 3
- T3_8BIT_REGISTER BridgeSupportExt;
- T3_8BIT_REGISTER PmData;
+ T3_8BIT_REGISTER BridgeSupportExt;
+ T3_8BIT_REGISTER PmData;
- T3_8BIT_REGISTER VpdCapabilityId;
- T3_8BIT_REGISTER MsiCapabilityPtr;
- T3_16BIT_REGISTER VpdAddrFlag;
- #define VPD_FLAG_WRITE (1 << 15)
- #define VPD_FLAG_RW_MASK (1 << 15)
- #define VPD_FLAG_READ 0
+ T3_8BIT_REGISTER VpdCapabilityId;
+ T3_8BIT_REGISTER MsiCapabilityPtr;
+ T3_16BIT_REGISTER VpdAddrFlag;
+#define VPD_FLAG_WRITE (1 << 15)
+#define VPD_FLAG_RW_MASK (1 << 15)
+#define VPD_FLAG_READ 0
+ T3_32BIT_REGISTER VpdData;
- T3_32BIT_REGISTER VpdData;
+ T3_8BIT_REGISTER MsiCapabilityId;
+ T3_8BIT_REGISTER NextCapabilityPtr;
+ T3_16BIT_REGISTER MsiCtrl;
+#define MSI_CTRL_64BIT_CAP (1 << 7)
+#define MSI_CTRL_MSG_ENABLE(x) (x << 4)
+#define MSI_CTRL_MSG_CAP(x) (x << 1)
+#define MSI_CTRL_ENABLE (1 << 0)
- T3_8BIT_REGISTER MsiCapabilityId;
- T3_8BIT_REGISTER NextCapabilityPtr;
- T3_16BIT_REGISTER MsiCtrl;
- #define MSI_CTRL_64BIT_CAP (1 << 7)
- #define MSI_CTRL_MSG_ENABLE(x) (x << 4)
- #define MSI_CTRL_MSG_CAP(x) (x << 1)
- #define MSI_CTRL_ENABLE (1 << 0)
+ T3_32BIT_REGISTER MsiAddrLow;
+ T3_32BIT_REGISTER MsiAddrHigh;
+ T3_16BIT_REGISTER MsiData;
+ T3_16BIT_REGISTER Unused3;
- T3_32BIT_REGISTER MsiAddrLow;
- T3_32BIT_REGISTER MsiAddrHigh;
+ T3_32BIT_REGISTER MiscHostCtrl;
+#define MISC_HOST_CTRL_CLEAR_INT BIT_0
+#define MISC_HOST_CTRL_MASK_PCI_INT BIT_1
+#define MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP BIT_2
+#define MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP BIT_3
+#define MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW BIT_4
+#define MISC_HOST_CTRL_ENABLE_CLK_REG_RW BIT_5
+#define MISC_HOST_CTRL_ENABLE_REG_WORD_SWAP BIT_6
+#define MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS BIT_7
+#define MISC_HOST_CTRL_ENABLE_INT_MASK_MODE BIT_8
+#define MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE BIT_9
- T3_16BIT_REGISTER MsiData;
- T3_16BIT_REGISTER Unused3;
+ T3_32BIT_REGISTER DmaReadWriteCtrl;
+#define DMA_CTRL_WRITE_BOUNDARY_MASK (BIT_11 | BIT_12 | BIT_13)
+#define DMA_CTRL_WRITE_BOUNDARY_DISABLE 0
+#define DMA_CTRL_WRITE_BOUNDARY_16 BIT_11
+#define DMA_CTRL_WRITE_BOUNDARY_32 BIT_12
+#define DMA_CTRL_WRITE_BOUNDARY_64 (BIT_12 | BIT_11)
+#define DMA_CTRL_WRITE_BOUNDARY_128 BIT_13
+#define DMA_CTRL_WRITE_BOUNDARY_256 (BIT_13 | BIT_11)
+#define DMA_CTRL_WRITE_BOUNDARY_512 (BIT_13 | BIT_12)
+#define DMA_CTRL_WRITE_BOUNDARY_1024 (BIT_13 | BIT_12 | BIT_11)
+#define DMA_CTRL_WRITE_ONE_DMA_AT_ONCE BIT_14
- T3_32BIT_REGISTER MiscHostCtrl;
- #define MISC_HOST_CTRL_CLEAR_INT BIT_0
- #define MISC_HOST_CTRL_MASK_PCI_INT BIT_1
- #define MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP BIT_2
- #define MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP BIT_3
- #define MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW BIT_4
- #define MISC_HOST_CTRL_ENABLE_CLK_REG_RW BIT_5
- #define MISC_HOST_CTRL_ENABLE_REG_WORD_SWAP BIT_6
- #define MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS BIT_7
- #define MISC_HOST_CTRL_ENABLE_INT_MASK_MODE BIT_8
- #define MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE BIT_9
+ T3_32BIT_REGISTER PciState;
+#define T3_PCI_STATE_FORCE_PCI_RESET BIT_0
+#define T3_PCI_STATE_INTERRUPT_NOT_ACTIVE BIT_1
+#define T3_PCI_STATE_NOT_PCI_X_BUS BIT_2
+#define T3_PCI_STATE_HIGH_BUS_SPEED BIT_3
+#define T3_PCI_STATE_32BIT_PCI_BUS BIT_4
+#define T3_PCI_STATE_PCI_ROM_ENABLE BIT_5
+#define T3_PCI_STATE_PCI_ROM_RETRY_ENABLE BIT_6
+#define T3_PCI_STATE_FLAT_VIEW BIT_8
+#define T3_PCI_STATE_RETRY_SAME_DMA BIT_13
- T3_32BIT_REGISTER DmaReadWriteCtrl;
- #define DMA_CTRL_WRITE_BOUNDARY_MASK (BIT_11 | BIT_12 | BIT_13)
- #define DMA_CTRL_WRITE_BOUNDARY_DISABLE 0
- #define DMA_CTRL_WRITE_BOUNDARY_16 BIT_11
- #define DMA_CTRL_WRITE_BOUNDARY_32 BIT_12
- #define DMA_CTRL_WRITE_BOUNDARY_64 (BIT_12 | BIT_11)
- #define DMA_CTRL_WRITE_BOUNDARY_128 BIT_13
- #define DMA_CTRL_WRITE_BOUNDARY_256 (BIT_13 | BIT_11)
- #define DMA_CTRL_WRITE_BOUNDARY_512 (BIT_13 | BIT_12)
- #define DMA_CTRL_WRITE_BOUNDARY_1024 (BIT_13 | BIT_12 | BIT_11)
- #define DMA_CTRL_WRITE_ONE_DMA_AT_ONCE BIT_14
+ T3_32BIT_REGISTER ClockCtrl;
+#define T3_PCI_CLKCTRL_TXCPU_CLK_DISABLE BIT_11
+#define T3_PCI_CLKCTRL_RXCPU_CLK_DISABLE BIT_10
+#define T3_PCI_CLKCTRL_CORE_CLK_DISABLE BIT_9
+ T3_32BIT_REGISTER RegBaseAddr;
- T3_32BIT_REGISTER PciState;
- #define T3_PCI_STATE_FORCE_PCI_RESET BIT_0
- #define T3_PCI_STATE_INTERRUPT_NOT_ACTIVE BIT_1
- #define T3_PCI_STATE_NOT_PCI_X_BUS BIT_2
- #define T3_PCI_STATE_HIGH_BUS_SPEED BIT_3
- #define T3_PCI_STATE_32BIT_PCI_BUS BIT_4
- #define T3_PCI_STATE_PCI_ROM_ENABLE BIT_5
- #define T3_PCI_STATE_PCI_ROM_RETRY_ENABLE BIT_6
- #define T3_PCI_STATE_FLAT_VIEW BIT_8
- #define T3_PCI_STATE_RETRY_SAME_DMA BIT_13
-
- T3_32BIT_REGISTER ClockCtrl;
- #define T3_PCI_CLKCTRL_TXCPU_CLK_DISABLE BIT_11
- #define T3_PCI_CLKCTRL_RXCPU_CLK_DISABLE BIT_10
- #define T3_PCI_CLKCTRL_CORE_CLK_DISABLE BIT_9
-
- T3_32BIT_REGISTER RegBaseAddr;
-
- T3_32BIT_REGISTER MemWindowBaseAddr;
+ T3_32BIT_REGISTER MemWindowBaseAddr;
#ifdef NIC_CPU_VIEW
- /* These registers are ONLY visible to NIC CPU */
- T3_32BIT_REGISTER PowerConsumed;
- T3_32BIT_REGISTER PowerDissipated;
-#else /* NIC_CPU_VIEW */
- T3_32BIT_REGISTER RegData;
- T3_32BIT_REGISTER MemWindowData;
-#endif /* !NIC_CPU_VIEW */
+ /* These registers are ONLY visible to NIC CPU */
+ T3_32BIT_REGISTER PowerConsumed;
+ T3_32BIT_REGISTER PowerDissipated;
+#else /* NIC_CPU_VIEW */
+ T3_32BIT_REGISTER RegData;
+ T3_32BIT_REGISTER MemWindowData;
+#endif /* !NIC_CPU_VIEW */
- T3_32BIT_REGISTER ModeCtrl;
+ T3_32BIT_REGISTER ModeCtrl;
- T3_32BIT_REGISTER MiscCfg;
+ T3_32BIT_REGISTER MiscCfg;
- T3_32BIT_REGISTER MiscLocalCtrl;
+ T3_32BIT_REGISTER MiscLocalCtrl;
- T3_32BIT_REGISTER Unused4;
+ T3_32BIT_REGISTER Unused4;
- /* NOTE: Big/Little-endian clarification needed. Are these register */
- /* in big or little endian formate. */
- T3_64BIT_REGISTER StdRingProdIdx;
- T3_64BIT_REGISTER RcvRetRingConIdx;
- T3_64BIT_REGISTER SndProdIdx;
+ /* NOTE: Big/Little-endian clarification needed. Are these register */
+ /* in big or little endian formate. */
+ T3_64BIT_REGISTER StdRingProdIdx;
+ T3_64BIT_REGISTER RcvRetRingConIdx;
+ T3_64BIT_REGISTER SndProdIdx;
- LM_UINT8 Unused5[80];
+ LM_UINT8 Unused5[80];
} T3_PCI_CONFIGURATION, *PT3_PCI_CONFIGURATION;
#define PCIX_CMD_MAX_SPLIT_MASK 0x0070
@@ -1374,1382 +1326,1347 @@
/******************************************************************************/
typedef struct {
- /* MAC mode control. */
- T3_32BIT_REGISTER Mode;
- #define MAC_MODE_GLOBAL_RESET BIT_0
- #define MAC_MODE_HALF_DUPLEX BIT_1
- #define MAC_MODE_PORT_MODE_MASK (BIT_2 | BIT_3)
- #define MAC_MODE_PORT_MODE_TBI (BIT_2 | BIT_3)
- #define MAC_MODE_PORT_MODE_GMII BIT_3
- #define MAC_MODE_PORT_MODE_MII BIT_2
- #define MAC_MODE_PORT_MODE_NONE BIT_NONE
- #define MAC_MODE_PORT_INTERNAL_LOOPBACK BIT_4
- #define MAC_MODE_TAGGED_MAC_CONTROL BIT_7
- #define MAC_MODE_TX_BURSTING BIT_8
- #define MAC_MODE_MAX_DEFER BIT_9
- #define MAC_MODE_LINK_POLARITY BIT_10
- #define MAC_MODE_ENABLE_RX_STATISTICS BIT_11
- #define MAC_MODE_CLEAR_RX_STATISTICS BIT_12
- #define MAC_MODE_FLUSH_RX_STATISTICS BIT_13
- #define MAC_MODE_ENABLE_TX_STATISTICS BIT_14
- #define MAC_MODE_CLEAR_TX_STATISTICS BIT_15
- #define MAC_MODE_FLUSH_TX_STATISTICS BIT_16
- #define MAC_MODE_SEND_CONFIGS BIT_17
- #define MAC_MODE_DETECT_MAGIC_PACKET_ENABLE BIT_18
- #define MAC_MODE_ACPI_POWER_ON_ENABLE BIT_19
- #define MAC_MODE_ENABLE_MIP BIT_20
- #define MAC_MODE_ENABLE_TDE BIT_21
- #define MAC_MODE_ENABLE_RDE BIT_22
- #define MAC_MODE_ENABLE_FHDE BIT_23
+ /* MAC mode control. */
+ T3_32BIT_REGISTER Mode;
+#define MAC_MODE_GLOBAL_RESET BIT_0
+#define MAC_MODE_HALF_DUPLEX BIT_1
+#define MAC_MODE_PORT_MODE_MASK (BIT_2 | BIT_3)
+#define MAC_MODE_PORT_MODE_TBI (BIT_2 | BIT_3)
+#define MAC_MODE_PORT_MODE_GMII BIT_3
+#define MAC_MODE_PORT_MODE_MII BIT_2
+#define MAC_MODE_PORT_MODE_NONE BIT_NONE
+#define MAC_MODE_PORT_INTERNAL_LOOPBACK BIT_4
+#define MAC_MODE_TAGGED_MAC_CONTROL BIT_7
+#define MAC_MODE_TX_BURSTING BIT_8
+#define MAC_MODE_MAX_DEFER BIT_9
+#define MAC_MODE_LINK_POLARITY BIT_10
+#define MAC_MODE_ENABLE_RX_STATISTICS BIT_11
+#define MAC_MODE_CLEAR_RX_STATISTICS BIT_12
+#define MAC_MODE_FLUSH_RX_STATISTICS BIT_13
+#define MAC_MODE_ENABLE_TX_STATISTICS BIT_14
+#define MAC_MODE_CLEAR_TX_STATISTICS BIT_15
+#define MAC_MODE_FLUSH_TX_STATISTICS BIT_16
+#define MAC_MODE_SEND_CONFIGS BIT_17
+#define MAC_MODE_DETECT_MAGIC_PACKET_ENABLE BIT_18
+#define MAC_MODE_ACPI_POWER_ON_ENABLE BIT_19
+#define MAC_MODE_ENABLE_MIP BIT_20
+#define MAC_MODE_ENABLE_TDE BIT_21
+#define MAC_MODE_ENABLE_RDE BIT_22
+#define MAC_MODE_ENABLE_FHDE BIT_23
- /* MAC status */
- T3_32BIT_REGISTER Status;
- #define MAC_STATUS_PCS_SYNCED BIT_0
- #define MAC_STATUS_SIGNAL_DETECTED BIT_1
- #define MAC_STATUS_RECEIVING_CFG BIT_2
- #define MAC_STATUS_CFG_CHANGED BIT_3
- #define MAC_STATUS_SYNC_CHANGED BIT_4
- #define MAC_STATUS_PORT_DECODE_ERROR BIT_10
- #define MAC_STATUS_LINK_STATE_CHANGED BIT_12
- #define MAC_STATUS_MI_COMPLETION BIT_22
- #define MAC_STATUS_MI_INTERRUPT BIT_23
- #define MAC_STATUS_AP_ERROR BIT_24
- #define MAC_STATUS_ODI_ERROR BIT_25
- #define MAC_STATUS_RX_STATS_OVERRUN BIT_26
- #define MAC_STATUS_TX_STATS_OVERRUN BIT_27
+ /* MAC status */
+ T3_32BIT_REGISTER Status;
+#define MAC_STATUS_PCS_SYNCED BIT_0
+#define MAC_STATUS_SIGNAL_DETECTED BIT_1
+#define MAC_STATUS_RECEIVING_CFG BIT_2
+#define MAC_STATUS_CFG_CHANGED BIT_3
+#define MAC_STATUS_SYNC_CHANGED BIT_4
+#define MAC_STATUS_PORT_DECODE_ERROR BIT_10
+#define MAC_STATUS_LINK_STATE_CHANGED BIT_12
+#define MAC_STATUS_MI_COMPLETION BIT_22
+#define MAC_STATUS_MI_INTERRUPT BIT_23
+#define MAC_STATUS_AP_ERROR BIT_24
+#define MAC_STATUS_ODI_ERROR BIT_25
+#define MAC_STATUS_RX_STATS_OVERRUN BIT_26
+#define MAC_STATUS_TX_STATS_OVERRUN BIT_27
- /* Event Enable */
- T3_32BIT_REGISTER MacEvent;
- #define MAC_EVENT_ENABLE_PORT_DECODE_ERR BIT_10
- #define MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN BIT_12
- #define MAC_EVENT_ENABLE_MI_COMPLETION BIT_22
- #define MAC_EVENT_ENABLE_MI_INTERRUPT BIT_23
- #define MAC_EVENT_ENABLE_AP_ERROR BIT_24
- #define MAC_EVENT_ENABLE_ODI_ERROR BIT_25
- #define MAC_EVENT_ENABLE_RX_STATS_OVERRUN BIT_26
- #define MAC_EVENT_ENABLE_TX_STATS_OVERRUN BIT_27
+ /* Event Enable */
+ T3_32BIT_REGISTER MacEvent;
+#define MAC_EVENT_ENABLE_PORT_DECODE_ERR BIT_10
+#define MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN BIT_12
+#define MAC_EVENT_ENABLE_MI_COMPLETION BIT_22
+#define MAC_EVENT_ENABLE_MI_INTERRUPT BIT_23
+#define MAC_EVENT_ENABLE_AP_ERROR BIT_24
+#define MAC_EVENT_ENABLE_ODI_ERROR BIT_25
+#define MAC_EVENT_ENABLE_RX_STATS_OVERRUN BIT_26
+#define MAC_EVENT_ENABLE_TX_STATS_OVERRUN BIT_27
- /* Led control. */
- T3_32BIT_REGISTER LedCtrl;
- #define LED_CTRL_OVERRIDE_LINK_LED BIT_0
- #define LED_CTRL_1000MBPS_LED_ON BIT_1
- #define LED_CTRL_100MBPS_LED_ON BIT_2
- #define LED_CTRL_10MBPS_LED_ON BIT_3
- #define LED_CTRL_OVERRIDE_TRAFFIC_LED BIT_4
- #define LED_CTRL_BLINK_TRAFFIC_LED BIT_5
- #define LED_CTRL_TRAFFIC_LED BIT_6
- #define LED_CTRL_1000MBPS_LED_STATUS BIT_7
- #define LED_CTRL_100MBPS_LED_STATUS BIT_8
- #define LED_CTRL_10MBPS_LED_STATUS BIT_9
- #define LED_CTRL_TRAFFIC_LED_STATUS BIT_10
- #define LED_CTRL_MAC_MODE BIT_NONE
- #define LED_CTRL_PHY_MODE_1 BIT_11
- #define LED_CTRL_PHY_MODE_2 BIT_12
- #define LED_CTRL_BLINK_RATE_MASK 0x7ff80000
- #define LED_CTRL_OVERRIDE_BLINK_PERIOD BIT_19
- #define LED_CTRL_OVERRIDE_BLINK_RATE BIT_31
+ /* Led control. */
+ T3_32BIT_REGISTER LedCtrl;
+#define LED_CTRL_OVERRIDE_LINK_LED BIT_0
+#define LED_CTRL_1000MBPS_LED_ON BIT_1
+#define LED_CTRL_100MBPS_LED_ON BIT_2
+#define LED_CTRL_10MBPS_LED_ON BIT_3
+#define LED_CTRL_OVERRIDE_TRAFFIC_LED BIT_4
+#define LED_CTRL_BLINK_TRAFFIC_LED BIT_5
+#define LED_CTRL_TRAFFIC_LED BIT_6
+#define LED_CTRL_1000MBPS_LED_STATUS BIT_7
+#define LED_CTRL_100MBPS_LED_STATUS BIT_8
+#define LED_CTRL_10MBPS_LED_STATUS BIT_9
+#define LED_CTRL_TRAFFIC_LED_STATUS BIT_10
+#define LED_CTRL_MAC_MODE BIT_NONE
+#define LED_CTRL_PHY_MODE_1 BIT_11
+#define LED_CTRL_PHY_MODE_2 BIT_12
+#define LED_CTRL_BLINK_RATE_MASK 0x7ff80000
+#define LED_CTRL_OVERRIDE_BLINK_PERIOD BIT_19
+#define LED_CTRL_OVERRIDE_BLINK_RATE BIT_31
- /* MAC addresses. */
- struct {
- T3_32BIT_REGISTER High; /* Upper 2 bytes. */
- T3_32BIT_REGISTER Low; /* Lower 4 bytes. */
- } MacAddr[4];
+ /* MAC addresses. */
+ struct {
+ T3_32BIT_REGISTER High; /* Upper 2 bytes. */
+ T3_32BIT_REGISTER Low; /* Lower 4 bytes. */
+ } MacAddr[4];
- /* ACPI Mbuf pointer. */
- T3_32BIT_REGISTER AcpiMbufPtr;
+ /* ACPI Mbuf pointer. */
+ T3_32BIT_REGISTER AcpiMbufPtr;
- /* ACPI Length and Offset. */
- T3_32BIT_REGISTER AcpiLengthOffset;
- #define ACPI_LENGTH_MASK 0xffff
- #define ACPI_OFFSET_MASK 0x0fff0000
- #define ACPI_LENGTH(x) x
- #define ACPI_OFFSET(x) ((x) << 16)
+ /* ACPI Length and Offset. */
+ T3_32BIT_REGISTER AcpiLengthOffset;
+#define ACPI_LENGTH_MASK 0xffff
+#define ACPI_OFFSET_MASK 0x0fff0000
+#define ACPI_LENGTH(x) x
+#define ACPI_OFFSET(x) ((x) << 16)
- /* Transmit random backoff. */
- T3_32BIT_REGISTER TxBackoffSeed;
- #define MAC_TX_BACKOFF_SEED_MASK 0x3ff
+ /* Transmit random backoff. */
+ T3_32BIT_REGISTER TxBackoffSeed;
+#define MAC_TX_BACKOFF_SEED_MASK 0x3ff
- /* Receive MTU */
- T3_32BIT_REGISTER MtuSize;
- #define MAC_RX_MTU_MASK 0xffff
+ /* Receive MTU */
+ T3_32BIT_REGISTER MtuSize;
+#define MAC_RX_MTU_MASK 0xffff
- /* Gigabit PCS Test. */
- T3_32BIT_REGISTER PcsTest;
- #define MAC_PCS_TEST_DATA_PATTERN_MASK 0x0fffff
- #define MAC_PCS_TEST_ENABLE BIT_20
+ /* Gigabit PCS Test. */
+ T3_32BIT_REGISTER PcsTest;
+#define MAC_PCS_TEST_DATA_PATTERN_MASK 0x0fffff
+#define MAC_PCS_TEST_ENABLE BIT_20
- /* Transmit Gigabit Auto-Negotiation. */
- T3_32BIT_REGISTER TxAutoNeg;
- #define MAC_AN_TX_AN_DATA_MASK 0xffff
+ /* Transmit Gigabit Auto-Negotiation. */
+ T3_32BIT_REGISTER TxAutoNeg;
+#define MAC_AN_TX_AN_DATA_MASK 0xffff
- /* Receive Gigabit Auto-Negotiation. */
- T3_32BIT_REGISTER RxAutoNeg;
- #define MAC_AN_RX_AN_DATA_MASK 0xffff
+ /* Receive Gigabit Auto-Negotiation. */
+ T3_32BIT_REGISTER RxAutoNeg;
+#define MAC_AN_RX_AN_DATA_MASK 0xffff
- /* MI Communication. */
- T3_32BIT_REGISTER MiCom;
- #define MI_COM_CMD_MASK (BIT_26 | BIT_27)
- #define MI_COM_CMD_WRITE BIT_26
- #define MI_COM_CMD_READ BIT_27
- #define MI_COM_READ_FAILED BIT_28
- #define MI_COM_START BIT_29
- #define MI_COM_BUSY BIT_29
+ /* MI Communication. */
+ T3_32BIT_REGISTER MiCom;
+#define MI_COM_CMD_MASK (BIT_26 | BIT_27)
+#define MI_COM_CMD_WRITE BIT_26
+#define MI_COM_CMD_READ BIT_27
+#define MI_COM_READ_FAILED BIT_28
+#define MI_COM_START BIT_29
+#define MI_COM_BUSY BIT_29
- #define MI_COM_PHY_ADDR_MASK 0x1f
- #define MI_COM_FIRST_PHY_ADDR_BIT 21
+#define MI_COM_PHY_ADDR_MASK 0x1f
+#define MI_COM_FIRST_PHY_ADDR_BIT 21
- #define MI_COM_PHY_REG_ADDR_MASK 0x1f
- #define MI_COM_FIRST_PHY_REG_ADDR_BIT 16
+#define MI_COM_PHY_REG_ADDR_MASK 0x1f
+#define MI_COM_FIRST_PHY_REG_ADDR_BIT 16
- #define MI_COM_PHY_DATA_MASK 0xffff
+#define MI_COM_PHY_DATA_MASK 0xffff
- /* MI Status. */
- T3_32BIT_REGISTER MiStatus;
- #define MI_STATUS_ENABLE_LINK_STATUS_ATTN BIT_0
+ /* MI Status. */
+ T3_32BIT_REGISTER MiStatus;
+#define MI_STATUS_ENABLE_LINK_STATUS_ATTN BIT_0
- /* MI Mode. */
- T3_32BIT_REGISTER MiMode;
- #define MI_MODE_CLOCK_SPEED_10MHZ BIT_0
- #define MI_MODE_USE_SHORT_PREAMBLE BIT_1
- #define MI_MODE_AUTO_POLLING_ENABLE BIT_4
- #define MI_MODE_CORE_CLOCK_SPEED_62MHZ BIT_15
+ /* MI Mode. */
+ T3_32BIT_REGISTER MiMode;
+#define MI_MODE_CLOCK_SPEED_10MHZ BIT_0
+#define MI_MODE_USE_SHORT_PREAMBLE BIT_1
+#define MI_MODE_AUTO_POLLING_ENABLE BIT_4
+#define MI_MODE_CORE_CLOCK_SPEED_62MHZ BIT_15
- /* Auto-polling status. */
- T3_32BIT_REGISTER AutoPollStatus;
- #define AUTO_POLL_ERROR BIT_0
+ /* Auto-polling status. */
+ T3_32BIT_REGISTER AutoPollStatus;
+#define AUTO_POLL_ERROR BIT_0
- /* Transmit MAC mode. */
- T3_32BIT_REGISTER TxMode;
- #define TX_MODE_RESET BIT_0
- #define TX_MODE_ENABLE BIT_1
- #define TX_MODE_ENABLE_FLOW_CONTROL BIT_4
- #define TX_MODE_ENABLE_BIG_BACKOFF BIT_5
- #define TX_MODE_ENABLE_LONG_PAUSE BIT_6
+ /* Transmit MAC mode. */
+ T3_32BIT_REGISTER TxMode;
+#define TX_MODE_RESET BIT_0
+#define TX_MODE_ENABLE BIT_1
+#define TX_MODE_ENABLE_FLOW_CONTROL BIT_4
+#define TX_MODE_ENABLE_BIG_BACKOFF BIT_5
+#define TX_MODE_ENABLE_LONG_PAUSE BIT_6
- /* Transmit MAC status. */
- T3_32BIT_REGISTER TxStatus;
- #define TX_STATUS_RX_CURRENTLY_XOFFED BIT_0
- #define TX_STATUS_SENT_XOFF BIT_1
- #define TX_STATUS_SENT_XON BIT_2
- #define TX_STATUS_LINK_UP BIT_3
- #define TX_STATUS_ODI_UNDERRUN BIT_4
- #define TX_STATUS_ODI_OVERRUN BIT_5
+ /* Transmit MAC status. */
+ T3_32BIT_REGISTER TxStatus;
+#define TX_STATUS_RX_CURRENTLY_XOFFED BIT_0
+#define TX_STATUS_SENT_XOFF BIT_1
+#define TX_STATUS_SENT_XON BIT_2
+#define TX_STATUS_LINK_UP BIT_3
+#define TX_STATUS_ODI_UNDERRUN BIT_4
+#define TX_STATUS_ODI_OVERRUN BIT_5
- /* Transmit MAC length. */
- T3_32BIT_REGISTER TxLengths;
- #define TX_LEN_SLOT_TIME_MASK 0xff
- #define TX_LEN_IPG_MASK 0x0f00
- #define TX_LEN_IPG_CRS_MASK (BIT_12 | BIT_13)
+ /* Transmit MAC length. */
+ T3_32BIT_REGISTER TxLengths;
+#define TX_LEN_SLOT_TIME_MASK 0xff
+#define TX_LEN_IPG_MASK 0x0f00
+#define TX_LEN_IPG_CRS_MASK (BIT_12 | BIT_13)
- /* Receive MAC mode. */
- T3_32BIT_REGISTER RxMode;
- #define RX_MODE_RESET BIT_0
- #define RX_MODE_ENABLE BIT_1
- #define RX_MODE_ENABLE_FLOW_CONTROL BIT_2
- #define RX_MODE_KEEP_MAC_CONTROL BIT_3
- #define RX_MODE_KEEP_PAUSE BIT_4
- #define RX_MODE_ACCEPT_OVERSIZED BIT_5
- #define RX_MODE_ACCEPT_RUNTS BIT_6
- #define RX_MODE_LENGTH_CHECK BIT_7
- #define RX_MODE_PROMISCUOUS_MODE BIT_8
- #define RX_MODE_NO_CRC_CHECK BIT_9
- #define RX_MODE_KEEP_VLAN_TAG BIT_10
+ /* Receive MAC mode. */
+ T3_32BIT_REGISTER RxMode;
+#define RX_MODE_RESET BIT_0
+#define RX_MODE_ENABLE BIT_1
+#define RX_MODE_ENABLE_FLOW_CONTROL BIT_2
+#define RX_MODE_KEEP_MAC_CONTROL BIT_3
+#define RX_MODE_KEEP_PAUSE BIT_4
+#define RX_MODE_ACCEPT_OVERSIZED BIT_5
+#define RX_MODE_ACCEPT_RUNTS BIT_6
+#define RX_MODE_LENGTH_CHECK BIT_7
+#define RX_MODE_PROMISCUOUS_MODE BIT_8
+#define RX_MODE_NO_CRC_CHECK BIT_9
+#define RX_MODE_KEEP_VLAN_TAG BIT_10
- /* Receive MAC status. */
- T3_32BIT_REGISTER RxStatus;
- #define RX_STATUS_REMOTE_TRANSMITTER_XOFFED BIT_0
- #define RX_STATUS_XOFF_RECEIVED BIT_1
- #define RX_STATUS_XON_RECEIVED BIT_2
+ /* Receive MAC status. */
+ T3_32BIT_REGISTER RxStatus;
+#define RX_STATUS_REMOTE_TRANSMITTER_XOFFED BIT_0
+#define RX_STATUS_XOFF_RECEIVED BIT_1
+#define RX_STATUS_XON_RECEIVED BIT_2
- /* Hash registers. */
- T3_32BIT_REGISTER HashReg[4];
+ /* Hash registers. */
+ T3_32BIT_REGISTER HashReg[4];
- /* Receive placement rules registers. */
- struct {
- T3_32BIT_REGISTER Rule;
- T3_32BIT_REGISTER Value;
- } RcvRules[16];
+ /* Receive placement rules registers. */
+ struct {
+ T3_32BIT_REGISTER Rule;
+ T3_32BIT_REGISTER Value;
+ } RcvRules[16];
- #define RCV_DISABLE_RULE_MASK 0x7fffffff
+#define RCV_DISABLE_RULE_MASK 0x7fffffff
- #define RCV_RULE1_REJECT_BROADCAST_IDX 0x00
- #define REJECT_BROADCAST_RULE1_RULE 0xc2000000
- #define REJECT_BROADCAST_RULE1_VALUE 0xffffffff
+#define RCV_RULE1_REJECT_BROADCAST_IDX 0x00
+#define REJECT_BROADCAST_RULE1_RULE 0xc2000000
+#define REJECT_BROADCAST_RULE1_VALUE 0xffffffff
- #define RCV_RULE2_REJECT_BROADCAST_IDX 0x01
- #define REJECT_BROADCAST_RULE2_RULE 0x86000004
- #define REJECT_BROADCAST_RULE2_VALUE 0xffffffff
+#define RCV_RULE2_REJECT_BROADCAST_IDX 0x01
+#define REJECT_BROADCAST_RULE2_RULE 0x86000004
+#define REJECT_BROADCAST_RULE2_VALUE 0xffffffff
#if INCLUDE_5701_AX_FIX
- #define RCV_LAST_RULE_IDX 0x04
+#define RCV_LAST_RULE_IDX 0x04
#else
- #define RCV_LAST_RULE_IDX 0x02
+#define RCV_LAST_RULE_IDX 0x02
#endif
- T3_32BIT_REGISTER RcvRuleCfg;
- #define RX_RULE_DEFAULT_CLASS (1 << 3)
+ T3_32BIT_REGISTER RcvRuleCfg;
+#define RX_RULE_DEFAULT_CLASS (1 << 3)
- LM_UINT8 Reserved1[140];
+ LM_UINT8 Reserved1[140];
- T3_32BIT_REGISTER SerdesCfg;
- T3_32BIT_REGISTER SerdesStatus;
+ T3_32BIT_REGISTER SerdesCfg;
+ T3_32BIT_REGISTER SerdesStatus;
- LM_UINT8 Reserved2[104];
+ LM_UINT8 Reserved2[104];
- volatile LM_UINT8 TxMacState[16];
- volatile LM_UINT8 RxMacState[20];
+ volatile LM_UINT8 TxMacState[16];
+ volatile LM_UINT8 RxMacState[20];
- LM_UINT8 Reserved3[476];
+ LM_UINT8 Reserved3[476];
- T3_32BIT_REGISTER RxStats[26];
+ T3_32BIT_REGISTER RxStats[26];
- LM_UINT8 Reserved4[24];
+ LM_UINT8 Reserved4[24];
- T3_32BIT_REGISTER TxStats[28];
+ T3_32BIT_REGISTER TxStats[28];
- LM_UINT8 Reserved5[784];
+ LM_UINT8 Reserved5[784];
} T3_MAC_CONTROL, *PT3_MAC_CONTROL;
-
/******************************************************************************/
/* Send data initiator control registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define T3_SND_DATA_IN_MODE_RESET BIT_0
- #define T3_SND_DATA_IN_MODE_ENABLE BIT_1
- #define T3_SND_DATA_IN_MODE_STATS_OFLW_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define T3_SND_DATA_IN_MODE_RESET BIT_0
+#define T3_SND_DATA_IN_MODE_ENABLE BIT_1
+#define T3_SND_DATA_IN_MODE_STATS_OFLW_ATTN_ENABLE BIT_2
- T3_32BIT_REGISTER Status;
- #define T3_SND_DATA_IN_STATUS_STATS_OFLW_ATTN BIT_2
+ T3_32BIT_REGISTER Status;
+#define T3_SND_DATA_IN_STATUS_STATS_OFLW_ATTN BIT_2
- T3_32BIT_REGISTER StatsCtrl;
- #define T3_SND_DATA_IN_STATS_CTRL_ENABLE BIT_0
- #define T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE BIT_1
- #define T3_SND_DATA_IN_STATS_CTRL_CLEAR BIT_2
- #define T3_SND_DATA_IN_STATS_CTRL_FLUSH BIT_3
- #define T3_SND_DATA_IN_STATS_CTRL_FORCE_ZERO BIT_4
+ T3_32BIT_REGISTER StatsCtrl;
+#define T3_SND_DATA_IN_STATS_CTRL_ENABLE BIT_0
+#define T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE BIT_1
+#define T3_SND_DATA_IN_STATS_CTRL_CLEAR BIT_2
+#define T3_SND_DATA_IN_STATS_CTRL_FLUSH BIT_3
+#define T3_SND_DATA_IN_STATS_CTRL_FORCE_ZERO BIT_4
- T3_32BIT_REGISTER StatsEnableMask;
- T3_32BIT_REGISTER StatsIncMask;
+ T3_32BIT_REGISTER StatsEnableMask;
+ T3_32BIT_REGISTER StatsIncMask;
- LM_UINT8 Reserved[108];
+ LM_UINT8 Reserved[108];
- T3_32BIT_REGISTER ClassOfServCnt[16];
- T3_32BIT_REGISTER DmaReadQFullCnt;
- T3_32BIT_REGISTER DmaPriorityReadQFullCnt;
- T3_32BIT_REGISTER SdcQFullCnt;
+ T3_32BIT_REGISTER ClassOfServCnt[16];
+ T3_32BIT_REGISTER DmaReadQFullCnt;
+ T3_32BIT_REGISTER DmaPriorityReadQFullCnt;
+ T3_32BIT_REGISTER SdcQFullCnt;
- T3_32BIT_REGISTER NicRingSetSendProdIdxCnt;
- T3_32BIT_REGISTER StatusUpdatedCnt;
- T3_32BIT_REGISTER InterruptsCnt;
- T3_32BIT_REGISTER AvoidInterruptsCnt;
- T3_32BIT_REGISTER SendThresholdHitCnt;
+ T3_32BIT_REGISTER NicRingSetSendProdIdxCnt;
+ T3_32BIT_REGISTER StatusUpdatedCnt;
+ T3_32BIT_REGISTER InterruptsCnt;
+ T3_32BIT_REGISTER AvoidInterruptsCnt;
+ T3_32BIT_REGISTER SendThresholdHitCnt;
- /* Unused space. */
- LM_UINT8 Unused[800];
+ /* Unused space. */
+ LM_UINT8 Unused[800];
} T3_SEND_DATA_INITIATOR, *PT3_SEND_DATA_INITIATOR;
-
/******************************************************************************/
/* Send data completion control registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define SND_DATA_COMP_MODE_RESET BIT_0
- #define SND_DATA_COMP_MODE_ENABLE BIT_1
+ T3_32BIT_REGISTER Mode;
+#define SND_DATA_COMP_MODE_RESET BIT_0
+#define SND_DATA_COMP_MODE_ENABLE BIT_1
- /* Unused space. */
- LM_UINT8 Unused[1020];
+ /* Unused space. */
+ LM_UINT8 Unused[1020];
} T3_SEND_DATA_COMPLETION, *PT3_SEND_DATA_COMPLETION;
-
/******************************************************************************/
/* Send BD Ring Selector Control Registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define SND_BD_SEL_MODE_RESET BIT_0
- #define SND_BD_SEL_MODE_ENABLE BIT_1
- #define SND_BD_SEL_MODE_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define SND_BD_SEL_MODE_RESET BIT_0
+#define SND_BD_SEL_MODE_ENABLE BIT_1
+#define SND_BD_SEL_MODE_ATTN_ENABLE BIT_2
- T3_32BIT_REGISTER Status;
- #define SND_BD_SEL_STATUS_ERROR_ATTN BIT_2
+ T3_32BIT_REGISTER Status;
+#define SND_BD_SEL_STATUS_ERROR_ATTN BIT_2
- T3_32BIT_REGISTER HwDiag;
+ T3_32BIT_REGISTER HwDiag;
- /* Unused space. */
- LM_UINT8 Unused1[52];
+ /* Unused space. */
+ LM_UINT8 Unused1[52];
- /* Send BD Ring Selector Local NIC Send BD Consumer Index. */
- T3_32BIT_REGISTER NicSendBdSelConIdx[16];
+ /* Send BD Ring Selector Local NIC Send BD Consumer Index. */
+ T3_32BIT_REGISTER NicSendBdSelConIdx[16];
- /* Unused space. */
- LM_UINT8 Unused2[896];
+ /* Unused space. */
+ LM_UINT8 Unused2[896];
} T3_SEND_BD_SELECTOR, *PT3_SEND_BD_SELECTOR;
-
/******************************************************************************/
/* Send BD initiator control registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define SND_BD_IN_MODE_RESET BIT_0
- #define SND_BD_IN_MODE_ENABLE BIT_1
- #define SND_BD_IN_MODE_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define SND_BD_IN_MODE_RESET BIT_0
+#define SND_BD_IN_MODE_ENABLE BIT_1
+#define SND_BD_IN_MODE_ATTN_ENABLE BIT_2
- T3_32BIT_REGISTER Status;
- #define SND_BD_IN_STATUS_ERROR_ATTN BIT_2
+ T3_32BIT_REGISTER Status;
+#define SND_BD_IN_STATUS_ERROR_ATTN BIT_2
- /* Send BD initiator local NIC send BD producer index. */
- T3_32BIT_REGISTER NicSendBdInProdIdx[16];
+ /* Send BD initiator local NIC send BD producer index. */
+ T3_32BIT_REGISTER NicSendBdInProdIdx[16];
- /* Unused space. */
- LM_UINT8 Unused2[952];
+ /* Unused space. */
+ LM_UINT8 Unused2[952];
} T3_SEND_BD_INITIATOR, *PT3_SEND_BD_INITIATOR;
-
/******************************************************************************/
/* Send BD Completion Control. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define SND_BD_COMP_MODE_RESET BIT_0
- #define SND_BD_COMP_MODE_ENABLE BIT_1
- #define SND_BD_COMP_MODE_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define SND_BD_COMP_MODE_RESET BIT_0
+#define SND_BD_COMP_MODE_ENABLE BIT_1
+#define SND_BD_COMP_MODE_ATTN_ENABLE BIT_2
- /* Unused space. */
- LM_UINT8 Unused2[1020];
+ /* Unused space. */
+ LM_UINT8 Unused2[1020];
} T3_SEND_BD_COMPLETION, *PT3_SEND_BD_COMPLETION;
-
/******************************************************************************/
/* Receive list placement control registers. */
/******************************************************************************/
typedef struct {
- /* Mode. */
- T3_32BIT_REGISTER Mode;
- #define RCV_LIST_PLMT_MODE_RESET BIT_0
- #define RCV_LIST_PLMT_MODE_ENABLE BIT_1
- #define RCV_LIST_PLMT_MODE_CLASS0_ATTN_ENABLE BIT_2
- #define RCV_LIST_PLMT_MODE_MAPPING_OOR_ATTN_ENABLE BIT_3
- #define RCV_LIST_PLMT_MODE_STATS_OFLOW_ATTN_ENABLE BIT_4
+ /* Mode. */
+ T3_32BIT_REGISTER Mode;
+#define RCV_LIST_PLMT_MODE_RESET BIT_0
+#define RCV_LIST_PLMT_MODE_ENABLE BIT_1
+#define RCV_LIST_PLMT_MODE_CLASS0_ATTN_ENABLE BIT_2
+#define RCV_LIST_PLMT_MODE_MAPPING_OOR_ATTN_ENABLE BIT_3
+#define RCV_LIST_PLMT_MODE_STATS_OFLOW_ATTN_ENABLE BIT_4
- /* Status. */
- T3_32BIT_REGISTER Status;
- #define RCV_LIST_PLMT_STATUS_CLASS0_ATTN BIT_2
- #define RCV_LIST_PLMT_STATUS_MAPPING_ATTN BIT_3
- #define RCV_LIST_PLMT_STATUS_STATS_OFLOW_ATTN BIT_4
+ /* Status. */
+ T3_32BIT_REGISTER Status;
+#define RCV_LIST_PLMT_STATUS_CLASS0_ATTN BIT_2
+#define RCV_LIST_PLMT_STATUS_MAPPING_ATTN BIT_3
+#define RCV_LIST_PLMT_STATUS_STATS_OFLOW_ATTN BIT_4
- /* Receive selector list lock register. */
- T3_32BIT_REGISTER Lock;
- #define RCV_LIST_SEL_LOCK_REQUEST_MASK 0xffff
- #define RCV_LIST_SEL_LOCK_GRANT_MASK 0xffff0000
+ /* Receive selector list lock register. */
+ T3_32BIT_REGISTER Lock;
+#define RCV_LIST_SEL_LOCK_REQUEST_MASK 0xffff
+#define RCV_LIST_SEL_LOCK_GRANT_MASK 0xffff0000
- /* Selector non-empty bits. */
- T3_32BIT_REGISTER NonEmptyBits;
- #define RCV_LIST_SEL_NON_EMPTY_MASK 0xffff
+ /* Selector non-empty bits. */
+ T3_32BIT_REGISTER NonEmptyBits;
+#define RCV_LIST_SEL_NON_EMPTY_MASK 0xffff
- /* Receive list placement configuration register. */
- T3_32BIT_REGISTER Config;
+ /* Receive list placement configuration register. */
+ T3_32BIT_REGISTER Config;
- /* Receive List Placement statistics Control. */
- T3_32BIT_REGISTER StatsCtrl;
+ /* Receive List Placement statistics Control. */
+ T3_32BIT_REGISTER StatsCtrl;
#define RCV_LIST_STATS_ENABLE BIT_0
#define RCV_LIST_STATS_FAST_UPDATE BIT_1
- /* Receive List Placement statistics Enable Mask. */
- T3_32BIT_REGISTER StatsEnableMask;
+ /* Receive List Placement statistics Enable Mask. */
+ T3_32BIT_REGISTER StatsEnableMask;
- /* Receive List Placement statistics Increment Mask. */
- T3_32BIT_REGISTER StatsIncMask;
-
- /* Unused space. */
- LM_UINT8 Unused1[224];
-
- struct {
- T3_32BIT_REGISTER Head;
- T3_32BIT_REGISTER Tail;
- T3_32BIT_REGISTER Count;
+ /* Receive List Placement statistics Increment Mask. */
+ T3_32BIT_REGISTER StatsIncMask;
/* Unused space. */
- LM_UINT8 Unused[4];
- } RcvSelectorList[16];
+ LM_UINT8 Unused1[224];
- /* Local statistics counter. */
- T3_32BIT_REGISTER ClassOfServCnt[16];
+ struct {
+ T3_32BIT_REGISTER Head;
+ T3_32BIT_REGISTER Tail;
+ T3_32BIT_REGISTER Count;
- T3_32BIT_REGISTER DropDueToFilterCnt;
- T3_32BIT_REGISTER DmaWriteQFullCnt;
- T3_32BIT_REGISTER DmaHighPriorityWriteQFullCnt;
- T3_32BIT_REGISTER NoMoreReceiveBdCnt;
- T3_32BIT_REGISTER IfInDiscardsCnt;
- T3_32BIT_REGISTER IfInErrorsCnt;
- T3_32BIT_REGISTER RcvThresholdHitCnt;
+ /* Unused space. */
+ LM_UINT8 Unused[4];
+ } RcvSelectorList[16];
- /* Another unused space. */
- LM_UINT8 Unused2[420];
+ /* Local statistics counter. */
+ T3_32BIT_REGISTER ClassOfServCnt[16];
+
+ T3_32BIT_REGISTER DropDueToFilterCnt;
+ T3_32BIT_REGISTER DmaWriteQFullCnt;
+ T3_32BIT_REGISTER DmaHighPriorityWriteQFullCnt;
+ T3_32BIT_REGISTER NoMoreReceiveBdCnt;
+ T3_32BIT_REGISTER IfInDiscardsCnt;
+ T3_32BIT_REGISTER IfInErrorsCnt;
+ T3_32BIT_REGISTER RcvThresholdHitCnt;
+
+ /* Another unused space. */
+ LM_UINT8 Unused2[420];
} T3_RCV_LIST_PLACEMENT, *PT3_RCV_LIST_PLACEMENT;
-
/******************************************************************************/
/* Receive Data and Receive BD Initiator Control. */
/******************************************************************************/
typedef struct {
- /* Mode. */
- T3_32BIT_REGISTER Mode;
- #define RCV_DATA_BD_IN_MODE_RESET BIT_0
- #define RCV_DATA_BD_IN_MODE_ENABLE BIT_1
- #define RCV_DATA_BD_IN_MODE_JUMBO_BD_NEEDED BIT_2
- #define RCV_DATA_BD_IN_MODE_FRAME_TOO_BIG BIT_3
- #define RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE BIT_4
+ /* Mode. */
+ T3_32BIT_REGISTER Mode;
+#define RCV_DATA_BD_IN_MODE_RESET BIT_0
+#define RCV_DATA_BD_IN_MODE_ENABLE BIT_1
+#define RCV_DATA_BD_IN_MODE_JUMBO_BD_NEEDED BIT_2
+#define RCV_DATA_BD_IN_MODE_FRAME_TOO_BIG BIT_3
+#define RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE BIT_4
- /* Status. */
- T3_32BIT_REGISTER Status;
- #define RCV_DATA_BD_IN_STATUS_JUMBO_BD_NEEDED BIT_2
- #define RCV_DATA_BD_IN_STATUS_FRAME_TOO_BIG BIT_3
- #define RCV_DATA_BD_IN_STATUS_INVALID_RING_SIZE BIT_4
+ /* Status. */
+ T3_32BIT_REGISTER Status;
+#define RCV_DATA_BD_IN_STATUS_JUMBO_BD_NEEDED BIT_2
+#define RCV_DATA_BD_IN_STATUS_FRAME_TOO_BIG BIT_3
+#define RCV_DATA_BD_IN_STATUS_INVALID_RING_SIZE BIT_4
- /* Split frame minium size. */
- T3_32BIT_REGISTER SplitFrameMinSize;
+ /* Split frame minium size. */
+ T3_32BIT_REGISTER SplitFrameMinSize;
- /* Unused space. */
- LM_UINT8 Unused1[0x2440-0x240c];
+ /* Unused space. */
+ LM_UINT8 Unused1[0x2440 - 0x240c];
- /* Receive RCBs. */
- T3_RCB JumboRcvRcb;
- T3_RCB StdRcvRcb;
- T3_RCB MiniRcvRcb;
+ /* Receive RCBs. */
+ T3_RCB JumboRcvRcb;
+ T3_RCB StdRcvRcb;
+ T3_RCB MiniRcvRcb;
- /* Receive Data and Receive BD Ring Initiator Local NIC Receive */
- /* BD Consumber Index. */
- T3_32BIT_REGISTER NicJumboConIdx;
- T3_32BIT_REGISTER NicStdConIdx;
- T3_32BIT_REGISTER NicMiniConIdx;
+ /* Receive Data and Receive BD Ring Initiator Local NIC Receive */
+ /* BD Consumber Index. */
+ T3_32BIT_REGISTER NicJumboConIdx;
+ T3_32BIT_REGISTER NicStdConIdx;
+ T3_32BIT_REGISTER NicMiniConIdx;
- /* Unused space. */
- LM_UINT8 Unused2[4];
+ /* Unused space. */
+ LM_UINT8 Unused2[4];
- /* Receive Data and Receive BD Initiator Local Receive Return ProdIdx. */
- T3_32BIT_REGISTER RcvDataBdProdIdx[16];
+ /* Receive Data and Receive BD Initiator Local Receive Return ProdIdx. */
+ T3_32BIT_REGISTER RcvDataBdProdIdx[16];
- /* Receive Data and Receive BD Initiator Hardware Diagnostic. */
- T3_32BIT_REGISTER HwDiag;
+ /* Receive Data and Receive BD Initiator Hardware Diagnostic. */
+ T3_32BIT_REGISTER HwDiag;
- /* Unused space. */
- LM_UINT8 Unused3[828];
+ /* Unused space. */
+ LM_UINT8 Unused3[828];
} T3_RCV_DATA_BD_INITIATOR, *PT3_RCV_DATA_BD_INITIATOR;
-
/******************************************************************************/
/* Receive Data Completion Control Registes. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define RCV_DATA_COMP_MODE_RESET BIT_0
- #define RCV_DATA_COMP_MODE_ENABLE BIT_1
- #define RCV_DATA_COMP_MODE_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define RCV_DATA_COMP_MODE_RESET BIT_0
+#define RCV_DATA_COMP_MODE_ENABLE BIT_1
+#define RCV_DATA_COMP_MODE_ATTN_ENABLE BIT_2
- /* Unused spaced. */
- LM_UINT8 Unused[1020];
+ /* Unused spaced. */
+ LM_UINT8 Unused[1020];
} T3_RCV_DATA_COMPLETION, *PT3_RCV_DATA_COMPLETION;
-
/******************************************************************************/
/* Receive BD Initiator Control. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define RCV_BD_IN_MODE_RESET BIT_0
- #define RCV_BD_IN_MODE_ENABLE BIT_1
- #define RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define RCV_BD_IN_MODE_RESET BIT_0
+#define RCV_BD_IN_MODE_ENABLE BIT_1
+#define RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE BIT_2
- T3_32BIT_REGISTER Status;
- #define RCV_BD_IN_STATUS_BD_IN_DIABLED_RCB_ATTN BIT_2
+ T3_32BIT_REGISTER Status;
+#define RCV_BD_IN_STATUS_BD_IN_DIABLED_RCB_ATTN BIT_2
- T3_32BIT_REGISTER NicJumboRcvProdIdx;
- T3_32BIT_REGISTER NicStdRcvProdIdx;
- T3_32BIT_REGISTER NicMiniRcvProdIdx;
+ T3_32BIT_REGISTER NicJumboRcvProdIdx;
+ T3_32BIT_REGISTER NicStdRcvProdIdx;
+ T3_32BIT_REGISTER NicMiniRcvProdIdx;
- T3_32BIT_REGISTER MiniRcvThreshold;
- T3_32BIT_REGISTER StdRcvThreshold;
- T3_32BIT_REGISTER JumboRcvThreshold;
+ T3_32BIT_REGISTER MiniRcvThreshold;
+ T3_32BIT_REGISTER StdRcvThreshold;
+ T3_32BIT_REGISTER JumboRcvThreshold;
- /* Unused space. */
- LM_UINT8 Unused[992];
+ /* Unused space. */
+ LM_UINT8 Unused[992];
} T3_RCV_BD_INITIATOR, *PT3_RCV_BD_INITIATOR;
-
/******************************************************************************/
/* Receive BD Completion Control Registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define RCV_BD_COMP_MODE_RESET BIT_0
- #define RCV_BD_COMP_MODE_ENABLE BIT_1
- #define RCV_BD_COMP_MODE_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define RCV_BD_COMP_MODE_RESET BIT_0
+#define RCV_BD_COMP_MODE_ENABLE BIT_1
+#define RCV_BD_COMP_MODE_ATTN_ENABLE BIT_2
- T3_32BIT_REGISTER Status;
- #define RCV_BD_COMP_STATUS_ERROR_ATTN BIT_2
+ T3_32BIT_REGISTER Status;
+#define RCV_BD_COMP_STATUS_ERROR_ATTN BIT_2
- T3_32BIT_REGISTER NicJumboRcvBdProdIdx;
- T3_32BIT_REGISTER NicStdRcvBdProdIdx;
- T3_32BIT_REGISTER NicMiniRcvBdProdIdx;
+ T3_32BIT_REGISTER NicJumboRcvBdProdIdx;
+ T3_32BIT_REGISTER NicStdRcvBdProdIdx;
+ T3_32BIT_REGISTER NicMiniRcvBdProdIdx;
- /* Unused space. */
- LM_UINT8 Unused[1004];
+ /* Unused space. */
+ LM_UINT8 Unused[1004];
} T3_RCV_BD_COMPLETION, *PT3_RCV_BD_COMPLETION;
-
/******************************************************************************/
/* Receive list selector control register. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define RCV_LIST_SEL_MODE_RESET BIT_0
- #define RCV_LIST_SEL_MODE_ENABLE BIT_1
- #define RCV_LIST_SEL_MODE_ATTN_ENABLE BIT_2
+ T3_32BIT_REGISTER Mode;
+#define RCV_LIST_SEL_MODE_RESET BIT_0
+#define RCV_LIST_SEL_MODE_ENABLE BIT_1
+#define RCV_LIST_SEL_MODE_ATTN_ENABLE BIT_2
- T3_32BIT_REGISTER Status;
- #define RCV_LIST_SEL_STATUS_ERROR_ATTN BIT_2
+ T3_32BIT_REGISTER Status;
+#define RCV_LIST_SEL_STATUS_ERROR_ATTN BIT_2
- /* Unused space. */
- LM_UINT8 Unused[1016];
+ /* Unused space. */
+ LM_UINT8 Unused[1016];
} T3_RCV_LIST_SELECTOR, *PT3_RCV_LIST_SELECTOR;
-
/******************************************************************************/
/* Mbuf cluster free registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
+ T3_32BIT_REGISTER Mode;
#define MBUF_CLUSTER_FREE_MODE_RESET BIT_0
#define MBUF_CLUSTER_FREE_MODE_ENABLE BIT_1
- T3_32BIT_REGISTER Status;
+ T3_32BIT_REGISTER Status;
- /* Unused space. */
- LM_UINT8 Unused[1016];
+ /* Unused space. */
+ LM_UINT8 Unused[1016];
} T3_MBUF_CLUSTER_FREE, *PT3_MBUF_CLUSTER_FREE;
-
/******************************************************************************/
/* Host coalescing control registers. */
/******************************************************************************/
typedef struct {
- /* Mode. */
- T3_32BIT_REGISTER Mode;
- #define HOST_COALESCE_RESET BIT_0
- #define HOST_COALESCE_ENABLE BIT_1
- #define HOST_COALESCE_ATTN BIT_2
- #define HOST_COALESCE_NOW BIT_3
- #define HOST_COALESCE_FULL_STATUS_MODE BIT_NONE
- #define HOST_COALESCE_64_BYTE_STATUS_MODE BIT_7
- #define HOST_COALESCE_32_BYTE_STATUS_MODE BIT_8
- #define HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT BIT_9
- #define HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT BIT_10
- #define HOST_COALESCE_NO_INT_ON_COALESCE_NOW_MODE BIT_11
- #define HOST_COALESCE_NO_INT_ON_FORCE_DMAD_MODE BIT_12
+ /* Mode. */
+ T3_32BIT_REGISTER Mode;
+#define HOST_COALESCE_RESET BIT_0
+#define HOST_COALESCE_ENABLE BIT_1
+#define HOST_COALESCE_ATTN BIT_2
+#define HOST_COALESCE_NOW BIT_3
+#define HOST_COALESCE_FULL_STATUS_MODE BIT_NONE
+#define HOST_COALESCE_64_BYTE_STATUS_MODE BIT_7
+#define HOST_COALESCE_32_BYTE_STATUS_MODE BIT_8
+#define HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT BIT_9
+#define HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT BIT_10
+#define HOST_COALESCE_NO_INT_ON_COALESCE_NOW_MODE BIT_11
+#define HOST_COALESCE_NO_INT_ON_FORCE_DMAD_MODE BIT_12
- /* Status. */
- T3_32BIT_REGISTER Status;
- #define HOST_COALESCE_ERROR_ATTN BIT_2
+ /* Status. */
+ T3_32BIT_REGISTER Status;
+#define HOST_COALESCE_ERROR_ATTN BIT_2
- /* Receive coalescing ticks. */
- T3_32BIT_REGISTER RxCoalescingTicks;
+ /* Receive coalescing ticks. */
+ T3_32BIT_REGISTER RxCoalescingTicks;
- /* Send coalescing ticks. */
- T3_32BIT_REGISTER TxCoalescingTicks;
+ /* Send coalescing ticks. */
+ T3_32BIT_REGISTER TxCoalescingTicks;
- /* Receive max coalesced frames. */
- T3_32BIT_REGISTER RxMaxCoalescedFrames;
+ /* Receive max coalesced frames. */
+ T3_32BIT_REGISTER RxMaxCoalescedFrames;
- /* Send max coalesced frames. */
- T3_32BIT_REGISTER TxMaxCoalescedFrames;
+ /* Send max coalesced frames. */
+ T3_32BIT_REGISTER TxMaxCoalescedFrames;
- /* Receive coalescing ticks during interrupt. */
- T3_32BIT_REGISTER RxCoalescedTickDuringInt;
+ /* Receive coalescing ticks during interrupt. */
+ T3_32BIT_REGISTER RxCoalescedTickDuringInt;
- /* Send coalescing ticks during interrupt. */
- T3_32BIT_REGISTER TxCoalescedTickDuringInt;
+ /* Send coalescing ticks during interrupt. */
+ T3_32BIT_REGISTER TxCoalescedTickDuringInt;
- /* Receive max coalesced frames during interrupt. */
- T3_32BIT_REGISTER RxMaxCoalescedFramesDuringInt;
+ /* Receive max coalesced frames during interrupt. */
+ T3_32BIT_REGISTER RxMaxCoalescedFramesDuringInt;
- /* Send max coalesced frames during interrupt. */
- T3_32BIT_REGISTER TxMaxCoalescedFramesDuringInt;
+ /* Send max coalesced frames during interrupt. */
+ T3_32BIT_REGISTER TxMaxCoalescedFramesDuringInt;
- /* Statistics tick. */
- T3_32BIT_REGISTER StatsCoalescingTicks;
+ /* Statistics tick. */
+ T3_32BIT_REGISTER StatsCoalescingTicks;
- /* Unused space. */
- LM_UINT8 Unused2[4];
+ /* Unused space. */
+ LM_UINT8 Unused2[4];
- /* Statistics host address. */
- T3_64BIT_REGISTER StatsBlkHostAddr;
+ /* Statistics host address. */
+ T3_64BIT_REGISTER StatsBlkHostAddr;
- /* Status block host address.*/
- T3_64BIT_REGISTER StatusBlkHostAddr;
+ /* Status block host address. */
+ T3_64BIT_REGISTER StatusBlkHostAddr;
- /* Statistics NIC address. */
- T3_32BIT_REGISTER StatsBlkNicAddr;
+ /* Statistics NIC address. */
+ T3_32BIT_REGISTER StatsBlkNicAddr;
- /* Statust block NIC address. */
- T3_32BIT_REGISTER StatusBlkNicAddr;
+ /* Statust block NIC address. */
+ T3_32BIT_REGISTER StatusBlkNicAddr;
- /* Flow attention registers. */
- T3_32BIT_REGISTER FlowAttn;
+ /* Flow attention registers. */
+ T3_32BIT_REGISTER FlowAttn;
- /* Unused space. */
- LM_UINT8 Unused3[4];
+ /* Unused space. */
+ LM_UINT8 Unused3[4];
- T3_32BIT_REGISTER NicJumboRcvBdConIdx;
- T3_32BIT_REGISTER NicStdRcvBdConIdx;
- T3_32BIT_REGISTER NicMiniRcvBdConIdx;
+ T3_32BIT_REGISTER NicJumboRcvBdConIdx;
+ T3_32BIT_REGISTER NicStdRcvBdConIdx;
+ T3_32BIT_REGISTER NicMiniRcvBdConIdx;
- /* Unused space. */
- LM_UINT8 Unused4[36];
+ /* Unused space. */
+ LM_UINT8 Unused4[36];
- T3_32BIT_REGISTER NicRetProdIdx[16];
- T3_32BIT_REGISTER NicSndBdConIdx[16];
+ T3_32BIT_REGISTER NicRetProdIdx[16];
+ T3_32BIT_REGISTER NicSndBdConIdx[16];
- /* Unused space. */
- LM_UINT8 Unused5[768];
+ /* Unused space. */
+ LM_UINT8 Unused5[768];
} T3_HOST_COALESCING, *PT3_HOST_COALESCING;
-
/******************************************************************************/
/* Memory arbiter registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
+ T3_32BIT_REGISTER Mode;
#define T3_MEM_ARBITER_MODE_RESET BIT_0
#define T3_MEM_ARBITER_MODE_ENABLE BIT_1
- T3_32BIT_REGISTER Status;
+ T3_32BIT_REGISTER Status;
- T3_32BIT_REGISTER ArbTrapAddrLow;
- T3_32BIT_REGISTER ArbTrapAddrHigh;
+ T3_32BIT_REGISTER ArbTrapAddrLow;
+ T3_32BIT_REGISTER ArbTrapAddrHigh;
- /* Unused space. */
- LM_UINT8 Unused[1008];
+ /* Unused space. */
+ LM_UINT8 Unused[1008];
} T3_MEM_ARBITER, *PT3_MEM_ARBITER;
-
/******************************************************************************/
/* Buffer manager control register. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define BUFMGR_MODE_RESET BIT_0
- #define BUFMGR_MODE_ENABLE BIT_1
- #define BUFMGR_MODE_ATTN_ENABLE BIT_2
- #define BUFMGR_MODE_BM_TEST BIT_3
- #define BUFMGR_MODE_MBUF_LOW_ATTN_ENABLE BIT_4
+ T3_32BIT_REGISTER Mode;
+#define BUFMGR_MODE_RESET BIT_0
+#define BUFMGR_MODE_ENABLE BIT_1
+#define BUFMGR_MODE_ATTN_ENABLE BIT_2
+#define BUFMGR_MODE_BM_TEST BIT_3
+#define BUFMGR_MODE_MBUF_LOW_ATTN_ENABLE BIT_4
- T3_32BIT_REGISTER Status;
- #define BUFMGR_STATUS_ERROR BIT_2
- #define BUFMGR_STATUS_MBUF_LOW BIT_4
+ T3_32BIT_REGISTER Status;
+#define BUFMGR_STATUS_ERROR BIT_2
+#define BUFMGR_STATUS_MBUF_LOW BIT_4
- T3_32BIT_REGISTER MbufPoolAddr;
- T3_32BIT_REGISTER MbufPoolSize;
- T3_32BIT_REGISTER MbufReadDmaLowWaterMark;
- T3_32BIT_REGISTER MbufMacRxLowWaterMark;
- T3_32BIT_REGISTER MbufHighWaterMark;
+ T3_32BIT_REGISTER MbufPoolAddr;
+ T3_32BIT_REGISTER MbufPoolSize;
+ T3_32BIT_REGISTER MbufReadDmaLowWaterMark;
+ T3_32BIT_REGISTER MbufMacRxLowWaterMark;
+ T3_32BIT_REGISTER MbufHighWaterMark;
- T3_32BIT_REGISTER RxCpuMbufAllocReq;
- #define BUFMGR_MBUF_ALLOC_BIT BIT_31
- T3_32BIT_REGISTER RxCpuMbufAllocResp;
- T3_32BIT_REGISTER TxCpuMbufAllocReq;
- T3_32BIT_REGISTER TxCpuMbufAllocResp;
+ T3_32BIT_REGISTER RxCpuMbufAllocReq;
+#define BUFMGR_MBUF_ALLOC_BIT BIT_31
+ T3_32BIT_REGISTER RxCpuMbufAllocResp;
+ T3_32BIT_REGISTER TxCpuMbufAllocReq;
+ T3_32BIT_REGISTER TxCpuMbufAllocResp;
- T3_32BIT_REGISTER DmaDescPoolAddr;
- T3_32BIT_REGISTER DmaDescPoolSize;
- T3_32BIT_REGISTER DmaLowWaterMark;
- T3_32BIT_REGISTER DmaHighWaterMark;
+ T3_32BIT_REGISTER DmaDescPoolAddr;
+ T3_32BIT_REGISTER DmaDescPoolSize;
+ T3_32BIT_REGISTER DmaLowWaterMark;
+ T3_32BIT_REGISTER DmaHighWaterMark;
- T3_32BIT_REGISTER RxCpuDmaAllocReq;
- T3_32BIT_REGISTER RxCpuDmaAllocResp;
- T3_32BIT_REGISTER TxCpuDmaAllocReq;
- T3_32BIT_REGISTER TxCpuDmaAllocResp;
+ T3_32BIT_REGISTER RxCpuDmaAllocReq;
+ T3_32BIT_REGISTER RxCpuDmaAllocResp;
+ T3_32BIT_REGISTER TxCpuDmaAllocReq;
+ T3_32BIT_REGISTER TxCpuDmaAllocResp;
- T3_32BIT_REGISTER Hwdiag[3];
+ T3_32BIT_REGISTER Hwdiag[3];
- /* Unused space. */
- LM_UINT8 Unused[936];
+ /* Unused space. */
+ LM_UINT8 Unused[936];
} T3_BUFFER_MANAGER, *PT3_BUFFER_MANAGER;
-
/******************************************************************************/
/* Read DMA control registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define DMA_READ_MODE_RESET BIT_0
- #define DMA_READ_MODE_ENABLE BIT_1
- #define DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE BIT_2
- #define DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE BIT_3
- #define DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE BIT_4
- #define DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE BIT_5
- #define DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE BIT_6
- #define DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE BIT_7
- #define DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE BIT_8
- #define DMA_READ_MODE_LONG_READ_ATTN_ENABLE BIT_9
- #define DMA_READ_MODE_SPLIT_ENABLE BIT_11
- #define DMA_READ_MODE_SPLIT_RESET BIT_12
+ T3_32BIT_REGISTER Mode;
+#define DMA_READ_MODE_RESET BIT_0
+#define DMA_READ_MODE_ENABLE BIT_1
+#define DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE BIT_2
+#define DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE BIT_3
+#define DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE BIT_4
+#define DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE BIT_5
+#define DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE BIT_6
+#define DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE BIT_7
+#define DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE BIT_8
+#define DMA_READ_MODE_LONG_READ_ATTN_ENABLE BIT_9
+#define DMA_READ_MODE_SPLIT_ENABLE BIT_11
+#define DMA_READ_MODE_SPLIT_RESET BIT_12
- T3_32BIT_REGISTER Status;
- #define DMA_READ_STATUS_TARGET_ABORT_ATTN BIT_2
- #define DMA_READ_STATUS_MASTER_ABORT_ATTN BIT_3
- #define DMA_READ_STATUS_PARITY_ERROR_ATTN BIT_4
- #define DMA_READ_STATUS_ADDR_OVERFLOW_ATTN BIT_5
- #define DMA_READ_STATUS_FIFO_OVERRUN_ATTN BIT_6
- #define DMA_READ_STATUS_FIFO_UNDERRUN_ATTN BIT_7
- #define DMA_READ_STATUS_FIFO_OVERREAD_ATTN BIT_8
- #define DMA_READ_STATUS_LONG_READ_ATTN BIT_9
+ T3_32BIT_REGISTER Status;
+#define DMA_READ_STATUS_TARGET_ABORT_ATTN BIT_2
+#define DMA_READ_STATUS_MASTER_ABORT_ATTN BIT_3
+#define DMA_READ_STATUS_PARITY_ERROR_ATTN BIT_4
+#define DMA_READ_STATUS_ADDR_OVERFLOW_ATTN BIT_5
+#define DMA_READ_STATUS_FIFO_OVERRUN_ATTN BIT_6
+#define DMA_READ_STATUS_FIFO_UNDERRUN_ATTN BIT_7
+#define DMA_READ_STATUS_FIFO_OVERREAD_ATTN BIT_8
+#define DMA_READ_STATUS_LONG_READ_ATTN BIT_9
- /* Unused space. */
- LM_UINT8 Unused[1016];
+ /* Unused space. */
+ LM_UINT8 Unused[1016];
} T3_DMA_READ, *PT3_DMA_READ;
-typedef union T3_CPU
-{
- struct
- {
- T3_32BIT_REGISTER mode;
- #define CPU_MODE_HALT BIT_10
- #define CPU_MODE_RESET BIT_0
- T3_32BIT_REGISTER state;
- T3_32BIT_REGISTER EventMask;
- T3_32BIT_REGISTER reserved1[4];
- T3_32BIT_REGISTER PC;
- T3_32BIT_REGISTER Instruction;
- T3_32BIT_REGISTER SpadUnderflow;
- T3_32BIT_REGISTER WatchdogClear;
- T3_32BIT_REGISTER WatchdogVector;
- T3_32BIT_REGISTER WatchdogSavedPC;
- T3_32BIT_REGISTER HardwareBp;
- T3_32BIT_REGISTER reserved2[3];
- T3_32BIT_REGISTER WatchdogSavedState;
- T3_32BIT_REGISTER LastBrchAddr;
- T3_32BIT_REGISTER SpadUnderflowSet;
- T3_32BIT_REGISTER reserved3[(0x200-0x50)/4];
- T3_32BIT_REGISTER Regs[32];
- T3_32BIT_REGISTER reserved4[(0x400-0x280)/4];
- }reg;
-}T3_CPU, *PT3_CPU;
+typedef union T3_CPU {
+ struct {
+ T3_32BIT_REGISTER mode;
+#define CPU_MODE_HALT BIT_10
+#define CPU_MODE_RESET BIT_0
+ T3_32BIT_REGISTER state;
+ T3_32BIT_REGISTER EventMask;
+ T3_32BIT_REGISTER reserved1[4];
+ T3_32BIT_REGISTER PC;
+ T3_32BIT_REGISTER Instruction;
+ T3_32BIT_REGISTER SpadUnderflow;
+ T3_32BIT_REGISTER WatchdogClear;
+ T3_32BIT_REGISTER WatchdogVector;
+ T3_32BIT_REGISTER WatchdogSavedPC;
+ T3_32BIT_REGISTER HardwareBp;
+ T3_32BIT_REGISTER reserved2[3];
+ T3_32BIT_REGISTER WatchdogSavedState;
+ T3_32BIT_REGISTER LastBrchAddr;
+ T3_32BIT_REGISTER SpadUnderflowSet;
+ T3_32BIT_REGISTER reserved3[(0x200 - 0x50) / 4];
+ T3_32BIT_REGISTER Regs[32];
+ T3_32BIT_REGISTER reserved4[(0x400 - 0x280) / 4];
+ } reg;
+} T3_CPU, *PT3_CPU;
/******************************************************************************/
/* Write DMA control registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define DMA_WRITE_MODE_RESET BIT_0
- #define DMA_WRITE_MODE_ENABLE BIT_1
- #define DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE BIT_2
- #define DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE BIT_3
- #define DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE BIT_4
- #define DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE BIT_5
- #define DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE BIT_6
- #define DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE BIT_7
- #define DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE BIT_8
- #define DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE BIT_9
+ T3_32BIT_REGISTER Mode;
+#define DMA_WRITE_MODE_RESET BIT_0
+#define DMA_WRITE_MODE_ENABLE BIT_1
+#define DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE BIT_2
+#define DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE BIT_3
+#define DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE BIT_4
+#define DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE BIT_5
+#define DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE BIT_6
+#define DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE BIT_7
+#define DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE BIT_8
+#define DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE BIT_9
- T3_32BIT_REGISTER Status;
- #define DMA_WRITE_STATUS_TARGET_ABORT_ATTN BIT_2
- #define DMA_WRITE_STATUS_MASTER_ABORT_ATTN BIT_3
- #define DMA_WRITE_STATUS_PARITY_ERROR_ATTN BIT_4
- #define DMA_WRITE_STATUS_ADDR_OVERFLOW_ATTN BIT_5
- #define DMA_WRITE_STATUS_FIFO_OVERRUN_ATTN BIT_6
- #define DMA_WRITE_STATUS_FIFO_UNDERRUN_ATTN BIT_7
- #define DMA_WRITE_STATUS_FIFO_OVERREAD_ATTN BIT_8
- #define DMA_WRITE_STATUS_LONG_READ_ATTN BIT_9
+ T3_32BIT_REGISTER Status;
+#define DMA_WRITE_STATUS_TARGET_ABORT_ATTN BIT_2
+#define DMA_WRITE_STATUS_MASTER_ABORT_ATTN BIT_3
+#define DMA_WRITE_STATUS_PARITY_ERROR_ATTN BIT_4
+#define DMA_WRITE_STATUS_ADDR_OVERFLOW_ATTN BIT_5
+#define DMA_WRITE_STATUS_FIFO_OVERRUN_ATTN BIT_6
+#define DMA_WRITE_STATUS_FIFO_UNDERRUN_ATTN BIT_7
+#define DMA_WRITE_STATUS_FIFO_OVERREAD_ATTN BIT_8
+#define DMA_WRITE_STATUS_LONG_READ_ATTN BIT_9
- /* Unused space. */
- LM_UINT8 Unused[1016];
+ /* Unused space. */
+ LM_UINT8 Unused[1016];
} T3_DMA_WRITE, *PT3_DMA_WRITE;
-
/******************************************************************************/
/* Mailbox registers. */
/******************************************************************************/
typedef struct {
- /* Interrupt mailbox registers. */
- T3_64BIT_REGISTER Interrupt[4];
+ /* Interrupt mailbox registers. */
+ T3_64BIT_REGISTER Interrupt[4];
- /* General mailbox registers. */
- T3_64BIT_REGISTER General[8];
+ /* General mailbox registers. */
+ T3_64BIT_REGISTER General[8];
- /* Reload statistics mailbox. */
- T3_64BIT_REGISTER ReloadStat;
+ /* Reload statistics mailbox. */
+ T3_64BIT_REGISTER ReloadStat;
- /* Receive BD ring producer index registers. */
- T3_64BIT_REGISTER RcvStdProdIdx;
- T3_64BIT_REGISTER RcvJumboProdIdx;
- T3_64BIT_REGISTER RcvMiniProdIdx;
+ /* Receive BD ring producer index registers. */
+ T3_64BIT_REGISTER RcvStdProdIdx;
+ T3_64BIT_REGISTER RcvJumboProdIdx;
+ T3_64BIT_REGISTER RcvMiniProdIdx;
- /* Receive return ring consumer index registers. */
- T3_64BIT_REGISTER RcvRetConIdx[16];
+ /* Receive return ring consumer index registers. */
+ T3_64BIT_REGISTER RcvRetConIdx[16];
- /* Send BD ring host producer index registers. */
- T3_64BIT_REGISTER SendHostProdIdx[16];
+ /* Send BD ring host producer index registers. */
+ T3_64BIT_REGISTER SendHostProdIdx[16];
- /* Send BD ring nic producer index registers. */
- T3_64BIT_REGISTER SendNicProdIdx[16];
-}T3_MAILBOX, *PT3_MAILBOX;
+ /* Send BD ring nic producer index registers. */
+ T3_64BIT_REGISTER SendNicProdIdx[16];
+} T3_MAILBOX, *PT3_MAILBOX;
typedef struct {
- T3_MAILBOX Mailbox;
+ T3_MAILBOX Mailbox;
- /* Priority mailbox registers. */
- T3_32BIT_REGISTER HighPriorityEventVector;
- T3_32BIT_REGISTER HighPriorityEventMask;
- T3_32BIT_REGISTER LowPriorityEventVector;
- T3_32BIT_REGISTER LowPriorityEventMask;
+ /* Priority mailbox registers. */
+ T3_32BIT_REGISTER HighPriorityEventVector;
+ T3_32BIT_REGISTER HighPriorityEventMask;
+ T3_32BIT_REGISTER LowPriorityEventVector;
+ T3_32BIT_REGISTER LowPriorityEventMask;
- /* Unused space. */
- LM_UINT8 Unused[496];
+ /* Unused space. */
+ LM_UINT8 Unused[496];
} T3_GRC_MAILBOX, *PT3_GRC_MAILBOX;
-
/******************************************************************************/
/* Flow through queues. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Reset;
+ T3_32BIT_REGISTER Reset;
- LM_UINT8 Unused[12];
+ LM_UINT8 Unused[12];
- T3_32BIT_REGISTER DmaNormalReadFtqCtrl;
- T3_32BIT_REGISTER DmaNormalReadFtqFullCnt;
- T3_32BIT_REGISTER DmaNormalReadFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER DmaNormalReadFtqFifoWritePeek;
+ T3_32BIT_REGISTER DmaNormalReadFtqCtrl;
+ T3_32BIT_REGISTER DmaNormalReadFtqFullCnt;
+ T3_32BIT_REGISTER DmaNormalReadFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER DmaNormalReadFtqFifoWritePeek;
- T3_32BIT_REGISTER DmaHighReadFtqCtrl;
- T3_32BIT_REGISTER DmaHighReadFtqFullCnt;
- T3_32BIT_REGISTER DmaHighReadFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER DmaHighReadFtqFifoWritePeek;
+ T3_32BIT_REGISTER DmaHighReadFtqCtrl;
+ T3_32BIT_REGISTER DmaHighReadFtqFullCnt;
+ T3_32BIT_REGISTER DmaHighReadFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER DmaHighReadFtqFifoWritePeek;
- T3_32BIT_REGISTER DmaCompDiscardFtqCtrl;
- T3_32BIT_REGISTER DmaCompDiscardFtqFullCnt;
- T3_32BIT_REGISTER DmaCompDiscardFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER DmaCompDiscardFtqFifoWritePeek;
+ T3_32BIT_REGISTER DmaCompDiscardFtqCtrl;
+ T3_32BIT_REGISTER DmaCompDiscardFtqFullCnt;
+ T3_32BIT_REGISTER DmaCompDiscardFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER DmaCompDiscardFtqFifoWritePeek;
- T3_32BIT_REGISTER SendBdCompFtqCtrl;
- T3_32BIT_REGISTER SendBdCompFtqFullCnt;
- T3_32BIT_REGISTER SendBdCompFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER SendBdCompFtqFifoWritePeek;
+ T3_32BIT_REGISTER SendBdCompFtqCtrl;
+ T3_32BIT_REGISTER SendBdCompFtqFullCnt;
+ T3_32BIT_REGISTER SendBdCompFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER SendBdCompFtqFifoWritePeek;
- T3_32BIT_REGISTER SendDataInitiatorFtqCtrl;
- T3_32BIT_REGISTER SendDataInitiatorFtqFullCnt;
- T3_32BIT_REGISTER SendDataInitiatorFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER SendDataInitiatorFtqFifoWritePeek;
+ T3_32BIT_REGISTER SendDataInitiatorFtqCtrl;
+ T3_32BIT_REGISTER SendDataInitiatorFtqFullCnt;
+ T3_32BIT_REGISTER SendDataInitiatorFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER SendDataInitiatorFtqFifoWritePeek;
- T3_32BIT_REGISTER DmaNormalWriteFtqCtrl;
- T3_32BIT_REGISTER DmaNormalWriteFtqFullCnt;
- T3_32BIT_REGISTER DmaNormalWriteFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER DmaNormalWriteFtqFifoWritePeek;
+ T3_32BIT_REGISTER DmaNormalWriteFtqCtrl;
+ T3_32BIT_REGISTER DmaNormalWriteFtqFullCnt;
+ T3_32BIT_REGISTER DmaNormalWriteFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER DmaNormalWriteFtqFifoWritePeek;
- T3_32BIT_REGISTER DmaHighWriteFtqCtrl;
- T3_32BIT_REGISTER DmaHighWriteFtqFullCnt;
- T3_32BIT_REGISTER DmaHighWriteFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER DmaHighWriteFtqFifoWritePeek;
+ T3_32BIT_REGISTER DmaHighWriteFtqCtrl;
+ T3_32BIT_REGISTER DmaHighWriteFtqFullCnt;
+ T3_32BIT_REGISTER DmaHighWriteFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER DmaHighWriteFtqFifoWritePeek;
- T3_32BIT_REGISTER SwType1FtqCtrl;
- T3_32BIT_REGISTER SwType1FtqFullCnt;
- T3_32BIT_REGISTER SwType1FtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER SwType1FtqFifoWritePeek;
+ T3_32BIT_REGISTER SwType1FtqCtrl;
+ T3_32BIT_REGISTER SwType1FtqFullCnt;
+ T3_32BIT_REGISTER SwType1FtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER SwType1FtqFifoWritePeek;
- T3_32BIT_REGISTER SendDataCompFtqCtrl;
- T3_32BIT_REGISTER SendDataCompFtqFullCnt;
- T3_32BIT_REGISTER SendDataCompFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER SendDataCompFtqFifoWritePeek;
+ T3_32BIT_REGISTER SendDataCompFtqCtrl;
+ T3_32BIT_REGISTER SendDataCompFtqFullCnt;
+ T3_32BIT_REGISTER SendDataCompFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER SendDataCompFtqFifoWritePeek;
- T3_32BIT_REGISTER HostCoalesceFtqCtrl;
- T3_32BIT_REGISTER HostCoalesceFtqFullCnt;
- T3_32BIT_REGISTER HostCoalesceFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER HostCoalesceFtqFifoWritePeek;
+ T3_32BIT_REGISTER HostCoalesceFtqCtrl;
+ T3_32BIT_REGISTER HostCoalesceFtqFullCnt;
+ T3_32BIT_REGISTER HostCoalesceFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER HostCoalesceFtqFifoWritePeek;
- T3_32BIT_REGISTER MacTxFtqCtrl;
- T3_32BIT_REGISTER MacTxFtqFullCnt;
- T3_32BIT_REGISTER MacTxFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER MacTxFtqFifoWritePeek;
+ T3_32BIT_REGISTER MacTxFtqCtrl;
+ T3_32BIT_REGISTER MacTxFtqFullCnt;
+ T3_32BIT_REGISTER MacTxFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER MacTxFtqFifoWritePeek;
- T3_32BIT_REGISTER MbufClustFreeFtqCtrl;
- T3_32BIT_REGISTER MbufClustFreeFtqFullCnt;
- T3_32BIT_REGISTER MbufClustFreeFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER MbufClustFreeFtqFifoWritePeek;
+ T3_32BIT_REGISTER MbufClustFreeFtqCtrl;
+ T3_32BIT_REGISTER MbufClustFreeFtqFullCnt;
+ T3_32BIT_REGISTER MbufClustFreeFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER MbufClustFreeFtqFifoWritePeek;
- T3_32BIT_REGISTER RcvBdCompFtqCtrl;
- T3_32BIT_REGISTER RcvBdCompFtqFullCnt;
- T3_32BIT_REGISTER RcvBdCompFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER RcvBdCompFtqFifoWritePeek;
+ T3_32BIT_REGISTER RcvBdCompFtqCtrl;
+ T3_32BIT_REGISTER RcvBdCompFtqFullCnt;
+ T3_32BIT_REGISTER RcvBdCompFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER RcvBdCompFtqFifoWritePeek;
- T3_32BIT_REGISTER RcvListPlmtFtqCtrl;
- T3_32BIT_REGISTER RcvListPlmtFtqFullCnt;
- T3_32BIT_REGISTER RcvListPlmtFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER RcvListPlmtFtqFifoWritePeek;
+ T3_32BIT_REGISTER RcvListPlmtFtqCtrl;
+ T3_32BIT_REGISTER RcvListPlmtFtqFullCnt;
+ T3_32BIT_REGISTER RcvListPlmtFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER RcvListPlmtFtqFifoWritePeek;
- T3_32BIT_REGISTER RcvDataBdInitiatorFtqCtrl;
- T3_32BIT_REGISTER RcvDataBdInitiatorFtqFullCnt;
- T3_32BIT_REGISTER RcvDataBdInitiatorFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER RcvDataBdInitiatorFtqFifoWritePeek;
+ T3_32BIT_REGISTER RcvDataBdInitiatorFtqCtrl;
+ T3_32BIT_REGISTER RcvDataBdInitiatorFtqFullCnt;
+ T3_32BIT_REGISTER RcvDataBdInitiatorFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER RcvDataBdInitiatorFtqFifoWritePeek;
- T3_32BIT_REGISTER RcvDataCompFtqCtrl;
- T3_32BIT_REGISTER RcvDataCompFtqFullCnt;
- T3_32BIT_REGISTER RcvDataCompFtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER RcvDataCompFtqFifoWritePeek;
+ T3_32BIT_REGISTER RcvDataCompFtqCtrl;
+ T3_32BIT_REGISTER RcvDataCompFtqFullCnt;
+ T3_32BIT_REGISTER RcvDataCompFtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER RcvDataCompFtqFifoWritePeek;
- T3_32BIT_REGISTER SwType2FtqCtrl;
- T3_32BIT_REGISTER SwType2FtqFullCnt;
- T3_32BIT_REGISTER SwType2FtqFifoEnqueueDequeue;
- T3_32BIT_REGISTER SwType2FtqFifoWritePeek;
+ T3_32BIT_REGISTER SwType2FtqCtrl;
+ T3_32BIT_REGISTER SwType2FtqFullCnt;
+ T3_32BIT_REGISTER SwType2FtqFifoEnqueueDequeue;
+ T3_32BIT_REGISTER SwType2FtqFifoWritePeek;
- /* Unused space. */
- LM_UINT8 Unused2[736];
+ /* Unused space. */
+ LM_UINT8 Unused2[736];
} T3_FTQ, *PT3_FTQ;
-
/******************************************************************************/
/* Message signaled interrupt registers. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
+ T3_32BIT_REGISTER Mode;
#define MSI_MODE_RESET BIT_0
#define MSI_MODE_ENABLE BIT_1
- T3_32BIT_REGISTER Status;
+ T3_32BIT_REGISTER Status;
- T3_32BIT_REGISTER MsiFifoAccess;
+ T3_32BIT_REGISTER MsiFifoAccess;
- /* Unused space. */
- LM_UINT8 Unused[1012];
+ /* Unused space. */
+ LM_UINT8 Unused[1012];
} T3_MSG_SIGNALED_INT, *PT3_MSG_SIGNALED_INT;
-
/******************************************************************************/
/* DMA Completion registes. */
/******************************************************************************/
typedef struct {
- T3_32BIT_REGISTER Mode;
- #define DMA_COMP_MODE_RESET BIT_0
- #define DMA_COMP_MODE_ENABLE BIT_1
+ T3_32BIT_REGISTER Mode;
+#define DMA_COMP_MODE_RESET BIT_0
+#define DMA_COMP_MODE_ENABLE BIT_1
- /* Unused space. */
- LM_UINT8 Unused[1020];
+ /* Unused space. */
+ LM_UINT8 Unused[1020];
} T3_DMA_COMPLETION, *PT3_DMA_COMPLETION;
-
/******************************************************************************/
/* GRC registers. */
/******************************************************************************/
typedef struct {
- /* Mode control register. */
- T3_32BIT_REGISTER Mode;
- #define GRC_MODE_UPDATE_ON_COALESCING BIT_0
- #define GRC_MODE_BYTE_SWAP_NON_FRAME_DATA BIT_1
- #define GRC_MODE_WORD_SWAP_NON_FRAME_DATA BIT_2
- #define GRC_MODE_BYTE_SWAP_DATA BIT_4
- #define GRC_MODE_WORD_SWAP_DATA BIT_5
- #define GRC_MODE_SPLIT_HEADER_MODE BIT_8
- #define GRC_MODE_NO_FRAME_CRACKING BIT_9
- #define GRC_MODE_INCLUDE_CRC BIT_10
- #define GRC_MODE_ALLOW_BAD_FRAMES BIT_11
- #define GRC_MODE_NO_INTERRUPT_ON_SENDS BIT_13
- #define GRC_MODE_NO_INTERRUPT_ON_RECEIVE BIT_14
- #define GRC_MODE_FORCE_32BIT_PCI_BUS_MODE BIT_15
- #define GRC_MODE_HOST_STACK_UP BIT_16
- #define GRC_MODE_HOST_SEND_BDS BIT_17
- #define GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM BIT_20
- #define GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM BIT_23
- #define GRC_MODE_INT_ON_TX_CPU_ATTN BIT_24
- #define GRC_MODE_INT_ON_RX_CPU_ATTN BIT_25
- #define GRC_MODE_INT_ON_MAC_ATTN BIT_26
- #define GRC_MODE_INT_ON_DMA_ATTN BIT_27
- #define GRC_MODE_INT_ON_FLOW_ATTN BIT_28
- #define GRC_MODE_4X_NIC_BASED_SEND_RINGS BIT_29
- #define GRC_MODE_MULTICAST_FRAME_ENABLE BIT_30
+ /* Mode control register. */
+ T3_32BIT_REGISTER Mode;
+#define GRC_MODE_UPDATE_ON_COALESCING BIT_0
+#define GRC_MODE_BYTE_SWAP_NON_FRAME_DATA BIT_1
+#define GRC_MODE_WORD_SWAP_NON_FRAME_DATA BIT_2
+#define GRC_MODE_BYTE_SWAP_DATA BIT_4
+#define GRC_MODE_WORD_SWAP_DATA BIT_5
+#define GRC_MODE_SPLIT_HEADER_MODE BIT_8
+#define GRC_MODE_NO_FRAME_CRACKING BIT_9
+#define GRC_MODE_INCLUDE_CRC BIT_10
+#define GRC_MODE_ALLOW_BAD_FRAMES BIT_11
+#define GRC_MODE_NO_INTERRUPT_ON_SENDS BIT_13
+#define GRC_MODE_NO_INTERRUPT_ON_RECEIVE BIT_14
+#define GRC_MODE_FORCE_32BIT_PCI_BUS_MODE BIT_15
+#define GRC_MODE_HOST_STACK_UP BIT_16
+#define GRC_MODE_HOST_SEND_BDS BIT_17
+#define GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM BIT_20
+#define GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM BIT_23
+#define GRC_MODE_INT_ON_TX_CPU_ATTN BIT_24
+#define GRC_MODE_INT_ON_RX_CPU_ATTN BIT_25
+#define GRC_MODE_INT_ON_MAC_ATTN BIT_26
+#define GRC_MODE_INT_ON_DMA_ATTN BIT_27
+#define GRC_MODE_INT_ON_FLOW_ATTN BIT_28
+#define GRC_MODE_4X_NIC_BASED_SEND_RINGS BIT_29
+#define GRC_MODE_MULTICAST_FRAME_ENABLE BIT_30
- /* Misc configuration register. */
- T3_32BIT_REGISTER MiscCfg;
- #define GRC_MISC_CFG_CORE_CLOCK_RESET BIT_0
- #define GRC_MISC_PRESCALAR_TIMER_MASK 0xfe
- #define GRC_MISC_BD_ID_MASK 0x0001e000
- #define GRC_MISC_BD_ID_5700 0x0001e000
- #define GRC_MISC_BD_ID_5701 0x00000000
- #define GRC_MISC_BD_ID_5703 0x00000000
- #define GRC_MISC_BD_ID_5703S 0x00002000
- #define GRC_MISC_BD_ID_5702FE 0x00004000
- #define GRC_MISC_BD_ID_5704 0x00000000
- #define GRC_MISC_BD_ID_5704CIOBE 0x00004000
+ /* Misc configuration register. */
+ T3_32BIT_REGISTER MiscCfg;
+#define GRC_MISC_CFG_CORE_CLOCK_RESET BIT_0
+#define GRC_MISC_PRESCALAR_TIMER_MASK 0xfe
+#define GRC_MISC_BD_ID_MASK 0x0001e000
+#define GRC_MISC_BD_ID_5700 0x0001e000
+#define GRC_MISC_BD_ID_5701 0x00000000
+#define GRC_MISC_BD_ID_5703 0x00000000
+#define GRC_MISC_BD_ID_5703S 0x00002000
+#define GRC_MISC_BD_ID_5702FE 0x00004000
+#define GRC_MISC_BD_ID_5704 0x00000000
+#define GRC_MISC_BD_ID_5704CIOBE 0x00004000
- /* Miscellaneous local control register. */
- T3_32BIT_REGISTER LocalCtrl;
- #define GRC_MISC_LOCAL_CTRL_INT_ACTIVE BIT_0
- #define GRC_MISC_LOCAL_CTRL_CLEAR_INT BIT_1
- #define GRC_MISC_LOCAL_CTRL_SET_INT BIT_2
- #define GRC_MISC_LOCAL_CTRL_INT_ON_ATTN BIT_3
- #define GRC_MISC_LOCAL_CTRL_GPIO_INPUT0 BIT_8
- #define GRC_MISC_LOCAL_CTRL_GPIO_INPUT1 BIT_9
- #define GRC_MISC_LOCAL_CTRL_GPIO_INPUT2 BIT_10
- #define GRC_MISC_LOCAL_CTRL_GPIO_OE0 BIT_11
- #define GRC_MISC_LOCAL_CTRL_GPIO_OE1 BIT_12
- #define GRC_MISC_LOCAL_CTRL_GPIO_OE2 BIT_13
- #define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 BIT_14
- #define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 BIT_15
- #define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2 BIT_16
- #define GRC_MISC_LOCAL_CTRL_ENABLE_EXT_MEMORY BIT_17
- #define GRC_MISC_LOCAL_CTRL_BANK_SELECT BIT_21
- #define GRC_MISC_LOCAL_CTRL_SSRAM_TYPE BIT_22
+ /* Miscellaneous local control register. */
+ T3_32BIT_REGISTER LocalCtrl;
+#define GRC_MISC_LOCAL_CTRL_INT_ACTIVE BIT_0
+#define GRC_MISC_LOCAL_CTRL_CLEAR_INT BIT_1
+#define GRC_MISC_LOCAL_CTRL_SET_INT BIT_2
+#define GRC_MISC_LOCAL_CTRL_INT_ON_ATTN BIT_3
+#define GRC_MISC_LOCAL_CTRL_GPIO_INPUT0 BIT_8
+#define GRC_MISC_LOCAL_CTRL_GPIO_INPUT1 BIT_9
+#define GRC_MISC_LOCAL_CTRL_GPIO_INPUT2 BIT_10
+#define GRC_MISC_LOCAL_CTRL_GPIO_OE0 BIT_11
+#define GRC_MISC_LOCAL_CTRL_GPIO_OE1 BIT_12
+#define GRC_MISC_LOCAL_CTRL_GPIO_OE2 BIT_13
+#define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 BIT_14
+#define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 BIT_15
+#define GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2 BIT_16
+#define GRC_MISC_LOCAL_CTRL_ENABLE_EXT_MEMORY BIT_17
+#define GRC_MISC_LOCAL_CTRL_BANK_SELECT BIT_21
+#define GRC_MISC_LOCAL_CTRL_SSRAM_TYPE BIT_22
- #define GRC_MISC_MEMSIZE_256K 0
- #define GRC_MISC_MEMSIZE_512K (1 << 18)
- #define GRC_MISC_MEMSIZE_1024K (2 << 18)
- #define GRC_MISC_MEMSIZE_2048K (3 << 18)
- #define GRC_MISC_MEMSIZE_4096K (4 << 18)
- #define GRC_MISC_MEMSIZE_8192K (5 << 18)
- #define GRC_MISC_MEMSIZE_16M (6 << 18)
- #define GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM BIT_24
+#define GRC_MISC_MEMSIZE_256K 0
+#define GRC_MISC_MEMSIZE_512K (1 << 18)
+#define GRC_MISC_MEMSIZE_1024K (2 << 18)
+#define GRC_MISC_MEMSIZE_2048K (3 << 18)
+#define GRC_MISC_MEMSIZE_4096K (4 << 18)
+#define GRC_MISC_MEMSIZE_8192K (5 << 18)
+#define GRC_MISC_MEMSIZE_16M (6 << 18)
+#define GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM BIT_24
+ T3_32BIT_REGISTER Timer;
- T3_32BIT_REGISTER Timer;
+ T3_32BIT_REGISTER RxCpuEvent;
+ T3_32BIT_REGISTER RxTimerRef;
+ T3_32BIT_REGISTER RxCpuSemaphore;
+ T3_32BIT_REGISTER RemoteRxCpuAttn;
- T3_32BIT_REGISTER RxCpuEvent;
- T3_32BIT_REGISTER RxTimerRef;
- T3_32BIT_REGISTER RxCpuSemaphore;
- T3_32BIT_REGISTER RemoteRxCpuAttn;
+ T3_32BIT_REGISTER TxCpuEvent;
+ T3_32BIT_REGISTER TxTimerRef;
+ T3_32BIT_REGISTER TxCpuSemaphore;
+ T3_32BIT_REGISTER RemoteTxCpuAttn;
- T3_32BIT_REGISTER TxCpuEvent;
- T3_32BIT_REGISTER TxTimerRef;
- T3_32BIT_REGISTER TxCpuSemaphore;
- T3_32BIT_REGISTER RemoteTxCpuAttn;
+ T3_64BIT_REGISTER MemoryPowerUp;
- T3_64BIT_REGISTER MemoryPowerUp;
+ T3_32BIT_REGISTER EepromAddr;
+#define SEEPROM_ADDR_WRITE 0
+#define SEEPROM_ADDR_READ (1 << 31)
+#define SEEPROM_ADDR_RW_MASK 0x80000000
+#define SEEPROM_ADDR_COMPLETE (1 << 30)
+#define SEEPROM_ADDR_FSM_RESET (1 << 29)
+#define SEEPROM_ADDR_DEV_ID(x) (x << 26)
+#define SEEPROM_ADDR_DEV_ID_MASK 0x1c000000
+#define SEEPROM_ADDR_START (1 << 25)
+#define SEEPROM_ADDR_CLK_PERD(x) (x << 16)
+#define SEEPROM_ADDR_ADDRESS(x) (x & 0xfffc)
+#define SEEPROM_ADDR_ADDRESS_MASK 0x0000ffff
- T3_32BIT_REGISTER EepromAddr;
- #define SEEPROM_ADDR_WRITE 0
- #define SEEPROM_ADDR_READ (1 << 31)
- #define SEEPROM_ADDR_RW_MASK 0x80000000
- #define SEEPROM_ADDR_COMPLETE (1 << 30)
- #define SEEPROM_ADDR_FSM_RESET (1 << 29)
- #define SEEPROM_ADDR_DEV_ID(x) (x << 26)
- #define SEEPROM_ADDR_DEV_ID_MASK 0x1c000000
- #define SEEPROM_ADDR_START (1 << 25)
- #define SEEPROM_ADDR_CLK_PERD(x) (x << 16)
- #define SEEPROM_ADDR_ADDRESS(x) (x & 0xfffc)
- #define SEEPROM_ADDR_ADDRESS_MASK 0x0000ffff
+#define SEEPROM_CLOCK_PERIOD 60
+#define SEEPROM_CHIP_SIZE (64 * 1024)
- #define SEEPROM_CLOCK_PERIOD 60
- #define SEEPROM_CHIP_SIZE (64 * 1024)
+ T3_32BIT_REGISTER EepromData;
+ T3_32BIT_REGISTER EepromCtrl;
- T3_32BIT_REGISTER EepromData;
- T3_32BIT_REGISTER EepromCtrl;
+ T3_32BIT_REGISTER MdiCtrl;
+ T3_32BIT_REGISTER SepromDelay;
- T3_32BIT_REGISTER MdiCtrl;
- T3_32BIT_REGISTER SepromDelay;
-
- /* Unused space. */
- LM_UINT8 Unused[948];
+ /* Unused space. */
+ LM_UINT8 Unused[948];
} T3_GRC, *PT3_GRC;
-
/******************************************************************************/
/* NVRAM control registers. */
/******************************************************************************/
-typedef struct
-{
- T3_32BIT_REGISTER Cmd;
- #define NVRAM_CMD_RESET BIT_0
- #define NVRAM_CMD_DONE BIT_3
- #define NVRAM_CMD_DO_IT BIT_4
- #define NVRAM_CMD_WR BIT_5
- #define NVRAM_CMD_RD BIT_NONE
- #define NVRAM_CMD_ERASE BIT_6
- #define NVRAM_CMD_FIRST BIT_7
- #define NVRAM_CMD_LAST BIT_8
+typedef struct {
+ T3_32BIT_REGISTER Cmd;
+#define NVRAM_CMD_RESET BIT_0
+#define NVRAM_CMD_DONE BIT_3
+#define NVRAM_CMD_DO_IT BIT_4
+#define NVRAM_CMD_WR BIT_5
+#define NVRAM_CMD_RD BIT_NONE
+#define NVRAM_CMD_ERASE BIT_6
+#define NVRAM_CMD_FIRST BIT_7
+#define NVRAM_CMD_LAST BIT_8
- T3_32BIT_REGISTER Status;
- T3_32BIT_REGISTER WriteData;
+ T3_32BIT_REGISTER Status;
+ T3_32BIT_REGISTER WriteData;
- T3_32BIT_REGISTER Addr;
- #define NVRAM_ADDRESS_MASK 0xffffff
+ T3_32BIT_REGISTER Addr;
+#define NVRAM_ADDRESS_MASK 0xffffff
- T3_32BIT_REGISTER ReadData;
+ T3_32BIT_REGISTER ReadData;
- /* Flash config 1 register. */
- T3_32BIT_REGISTER Config1;
- #define FLASH_INTERFACE_ENABLE BIT_0
- #define FLASH_SSRAM_BUFFERRED_MODE BIT_1
- #define FLASH_PASS_THRU_MODE BIT_2
- #define FLASH_BIT_BANG_MODE BIT_3
- #define FLASH_COMPAT_BYPASS BIT_31
+ /* Flash config 1 register. */
+ T3_32BIT_REGISTER Config1;
+#define FLASH_INTERFACE_ENABLE BIT_0
+#define FLASH_SSRAM_BUFFERRED_MODE BIT_1
+#define FLASH_PASS_THRU_MODE BIT_2
+#define FLASH_BIT_BANG_MODE BIT_3
+#define FLASH_COMPAT_BYPASS BIT_31
- /* Buffered flash (Atmel: AT45DB011B) specific information */
- #define BUFFERED_FLASH_PAGE_POS 9
- #define BUFFERED_FLASH_BYTE_ADDR_MASK ((1<<BUFFERED_FLASH_PAGE_POS) - 1)
- #define BUFFERED_FLASH_PAGE_SIZE 264
- #define BUFFERED_FLASH_PHY_PAGE_SIZE 512
+ /* Buffered flash (Atmel: AT45DB011B) specific information */
+#define BUFFERED_FLASH_PAGE_POS 9
+#define BUFFERED_FLASH_BYTE_ADDR_MASK ((1<<BUFFERED_FLASH_PAGE_POS) - 1)
+#define BUFFERED_FLASH_PAGE_SIZE 264
+#define BUFFERED_FLASH_PHY_PAGE_SIZE 512
- T3_32BIT_REGISTER Config2;
- T3_32BIT_REGISTER Config3;
- T3_32BIT_REGISTER SwArb;
- #define SW_ARB_REQ_SET0 BIT_0
- #define SW_ARB_REQ_SET1 BIT_1
- #define SW_ARB_REQ_SET2 BIT_2
- #define SW_ARB_REQ_SET3 BIT_3
- #define SW_ARB_REQ_CLR0 BIT_4
- #define SW_ARB_REQ_CLR1 BIT_5
- #define SW_ARB_REQ_CLR2 BIT_6
- #define SW_ARB_REQ_CLR3 BIT_7
- #define SW_ARB_GNT0 BIT_8
- #define SW_ARB_GNT1 BIT_9
- #define SW_ARB_GNT2 BIT_10
- #define SW_ARB_GNT3 BIT_11
- #define SW_ARB_REQ0 BIT_12
- #define SW_ARB_REQ1 BIT_13
- #define SW_ARB_REQ2 BIT_14
- #define SW_ARB_REQ3 BIT_15
+ T3_32BIT_REGISTER Config2;
+ T3_32BIT_REGISTER Config3;
+ T3_32BIT_REGISTER SwArb;
+#define SW_ARB_REQ_SET0 BIT_0
+#define SW_ARB_REQ_SET1 BIT_1
+#define SW_ARB_REQ_SET2 BIT_2
+#define SW_ARB_REQ_SET3 BIT_3
+#define SW_ARB_REQ_CLR0 BIT_4
+#define SW_ARB_REQ_CLR1 BIT_5
+#define SW_ARB_REQ_CLR2 BIT_6
+#define SW_ARB_REQ_CLR3 BIT_7
+#define SW_ARB_GNT0 BIT_8
+#define SW_ARB_GNT1 BIT_9
+#define SW_ARB_GNT2 BIT_10
+#define SW_ARB_GNT3 BIT_11
+#define SW_ARB_REQ0 BIT_12
+#define SW_ARB_REQ1 BIT_13
+#define SW_ARB_REQ2 BIT_14
+#define SW_ARB_REQ3 BIT_15
- /* Unused space. */
- LM_UINT8 Unused[988];
+ /* Unused space. */
+ LM_UINT8 Unused[988];
} T3_NVRAM, *PT3_NVRAM;
-
/******************************************************************************/
/* NIC's internal memory. */
/******************************************************************************/
typedef struct {
- /* Page zero for the internal CPUs. */
- LM_UINT8 PageZero[0x100]; /* 0x0000 */
+ /* Page zero for the internal CPUs. */
+ LM_UINT8 PageZero[0x100]; /* 0x0000 */
- /* Send RCBs. */
- T3_RCB SendRcb[16]; /* 0x0100 */
+ /* Send RCBs. */
+ T3_RCB SendRcb[16]; /* 0x0100 */
- /* Receive Return RCBs. */
- T3_RCB RcvRetRcb[16]; /* 0x0200 */
+ /* Receive Return RCBs. */
+ T3_RCB RcvRetRcb[16]; /* 0x0200 */
- /* Statistics block. */
- T3_STATS_BLOCK StatsBlk; /* 0x0300 */
+ /* Statistics block. */
+ T3_STATS_BLOCK StatsBlk; /* 0x0300 */
- /* Status block. */
- T3_STATUS_BLOCK StatusBlk; /* 0x0b00 */
+ /* Status block. */
+ T3_STATUS_BLOCK StatusBlk; /* 0x0b00 */
- /* Reserved for software. */
- LM_UINT8 Reserved[1200]; /* 0x0b50 */
+ /* Reserved for software. */
+ LM_UINT8 Reserved[1200]; /* 0x0b50 */
- /* Unmapped region. */
- LM_UINT8 Unmapped[4096]; /* 0x1000 */
+ /* Unmapped region. */
+ LM_UINT8 Unmapped[4096]; /* 0x1000 */
- /* DMA descriptors. */
- LM_UINT8 DmaDesc[8192]; /* 0x2000 */
+ /* DMA descriptors. */
+ LM_UINT8 DmaDesc[8192]; /* 0x2000 */
- /* Buffer descriptors. */
- LM_UINT8 BufferDesc[16384]; /* 0x4000 */
+ /* Buffer descriptors. */
+ LM_UINT8 BufferDesc[16384]; /* 0x4000 */
} T3_FIRST_32K_SRAM, *PT3_FIRST_32K_SRAM;
-
/******************************************************************************/
/* Memory layout. */
/******************************************************************************/
typedef struct {
- /* PCI configuration registers. */
- T3_PCI_CONFIGURATION PciCfg;
+ /* PCI configuration registers. */
+ T3_PCI_CONFIGURATION PciCfg;
- /* Unused. */
- LM_UINT8 Unused1[0x100]; /* 0x0100 */
+ /* Unused. */
+ LM_UINT8 Unused1[0x100]; /* 0x0100 */
- /* Mailbox . */
- T3_MAILBOX Mailbox; /* 0x0200 */
+ /* Mailbox . */
+ T3_MAILBOX Mailbox; /* 0x0200 */
- /* MAC control registers. */
- T3_MAC_CONTROL MacCtrl; /* 0x0400 */
+ /* MAC control registers. */
+ T3_MAC_CONTROL MacCtrl; /* 0x0400 */
- /* Send data initiator control registers. */
- T3_SEND_DATA_INITIATOR SndDataIn; /* 0x0c00 */
+ /* Send data initiator control registers. */
+ T3_SEND_DATA_INITIATOR SndDataIn; /* 0x0c00 */
- /* Send data completion Control registers. */
- T3_SEND_DATA_COMPLETION SndDataComp; /* 0x1000 */
+ /* Send data completion Control registers. */
+ T3_SEND_DATA_COMPLETION SndDataComp; /* 0x1000 */
- /* Send BD ring selector. */
- T3_SEND_BD_SELECTOR SndBdSel; /* 0x1400 */
+ /* Send BD ring selector. */
+ T3_SEND_BD_SELECTOR SndBdSel; /* 0x1400 */
- /* Send BD initiator control registers. */
- T3_SEND_BD_INITIATOR SndBdIn; /* 0x1800 */
+ /* Send BD initiator control registers. */
+ T3_SEND_BD_INITIATOR SndBdIn; /* 0x1800 */
- /* Send BD completion control registers. */
- T3_SEND_BD_COMPLETION SndBdComp; /* 0x1c00 */
+ /* Send BD completion control registers. */
+ T3_SEND_BD_COMPLETION SndBdComp; /* 0x1c00 */
- /* Receive list placement control registers. */
- T3_RCV_LIST_PLACEMENT RcvListPlmt; /* 0x2000 */
+ /* Receive list placement control registers. */
+ T3_RCV_LIST_PLACEMENT RcvListPlmt; /* 0x2000 */
- /* Receive Data and Receive BD Initiator Control. */
- T3_RCV_DATA_BD_INITIATOR RcvDataBdIn; /* 0x2400 */
+ /* Receive Data and Receive BD Initiator Control. */
+ T3_RCV_DATA_BD_INITIATOR RcvDataBdIn; /* 0x2400 */
- /* Receive Data Completion Control */
- T3_RCV_DATA_COMPLETION RcvDataComp; /* 0x2800 */
+ /* Receive Data Completion Control */
+ T3_RCV_DATA_COMPLETION RcvDataComp; /* 0x2800 */
- /* Receive BD Initiator Control Registers. */
- T3_RCV_BD_INITIATOR RcvBdIn; /* 0x2c00 */
+ /* Receive BD Initiator Control Registers. */
+ T3_RCV_BD_INITIATOR RcvBdIn; /* 0x2c00 */
- /* Receive BD Completion Control Registers. */
- T3_RCV_BD_COMPLETION RcvBdComp; /* 0x3000 */
+ /* Receive BD Completion Control Registers. */
+ T3_RCV_BD_COMPLETION RcvBdComp; /* 0x3000 */
- /* Receive list selector control registers. */
- T3_RCV_LIST_SELECTOR RcvListSel; /* 0x3400 */
+ /* Receive list selector control registers. */
+ T3_RCV_LIST_SELECTOR RcvListSel; /* 0x3400 */
- /* Mbuf cluster free registers. */
- T3_MBUF_CLUSTER_FREE MbufClusterFree; /* 0x3800 */
+ /* Mbuf cluster free registers. */
+ T3_MBUF_CLUSTER_FREE MbufClusterFree; /* 0x3800 */
- /* Host coalescing control registers. */
- T3_HOST_COALESCING HostCoalesce; /* 0x3c00 */
+ /* Host coalescing control registers. */
+ T3_HOST_COALESCING HostCoalesce; /* 0x3c00 */
- /* Memory arbiter control registers. */
- T3_MEM_ARBITER MemArbiter; /* 0x4000 */
+ /* Memory arbiter control registers. */
+ T3_MEM_ARBITER MemArbiter; /* 0x4000 */
- /* Buffer manger control registers. */
- T3_BUFFER_MANAGER BufMgr; /* 0x4400 */
+ /* Buffer manger control registers. */
+ T3_BUFFER_MANAGER BufMgr; /* 0x4400 */
- /* Read DMA control registers. */
- T3_DMA_READ DmaRead; /* 0x4800 */
+ /* Read DMA control registers. */
+ T3_DMA_READ DmaRead; /* 0x4800 */
- /* Write DMA control registers. */
- T3_DMA_WRITE DmaWrite; /* 0x4c00 */
+ /* Write DMA control registers. */
+ T3_DMA_WRITE DmaWrite; /* 0x4c00 */
- T3_CPU rxCpu; /* 0x5000 */
- T3_CPU txCpu; /* 0x5400 */
+ T3_CPU rxCpu; /* 0x5000 */
+ T3_CPU txCpu; /* 0x5400 */
- /* Mailboxes. */
- T3_GRC_MAILBOX GrcMailbox; /* 0x5800 */
+ /* Mailboxes. */
+ T3_GRC_MAILBOX GrcMailbox; /* 0x5800 */
- /* Flow Through queues. */
- T3_FTQ Ftq; /* 0x5c00 */
+ /* Flow Through queues. */
+ T3_FTQ Ftq; /* 0x5c00 */
- /* Message signaled interrupt registes. */
- T3_MSG_SIGNALED_INT Msi; /* 0x6000 */
+ /* Message signaled interrupt registes. */
+ T3_MSG_SIGNALED_INT Msi; /* 0x6000 */
- /* DMA completion registers. */
- T3_DMA_COMPLETION DmaComp; /* 0x6400 */
+ /* DMA completion registers. */
+ T3_DMA_COMPLETION DmaComp; /* 0x6400 */
- /* GRC registers. */
- T3_GRC Grc; /* 0x6800 */
+ /* GRC registers. */
+ T3_GRC Grc; /* 0x6800 */
- /* Unused space. */
- LM_UINT8 Unused2[1024]; /* 0x6c00 */
+ /* Unused space. */
+ LM_UINT8 Unused2[1024]; /* 0x6c00 */
- /* NVRAM registers. */
- T3_NVRAM Nvram; /* 0x7000 */
+ /* NVRAM registers. */
+ T3_NVRAM Nvram; /* 0x7000 */
- /* Unused space. */
- LM_UINT8 Unused3[3072]; /* 0x7400 */
+ /* Unused space. */
+ LM_UINT8 Unused3[3072]; /* 0x7400 */
- /* The 32k memory window into the NIC's */
- /* internal memory. The memory window is */
- /* controlled by the Memory Window Base */
- /* Address register. This register is located */
- /* in the PCI configuration space. */
- union { /* 0x8000 */
- T3_FIRST_32K_SRAM First32k;
+ /* The 32k memory window into the NIC's */
+ /* internal memory. The memory window is */
+ /* controlled by the Memory Window Base */
+ /* Address register. This register is located */
+ /* in the PCI configuration space. */
+ union { /* 0x8000 */
+ T3_FIRST_32K_SRAM First32k;
- /* Use the memory window base address register to determine the */
- /* MBUF segment. */
- LM_UINT32 Mbuf[32768/4];
- LM_UINT32 MemBlock32K[32768/4];
- } uIntMem;
+ /* Use the memory window base address register to determine the */
+ /* MBUF segment. */
+ LM_UINT32 Mbuf[32768 / 4];
+ LM_UINT32 MemBlock32K[32768 / 4];
+ } uIntMem;
} T3_STD_MEM_MAP, *PT3_STD_MEM_MAP;
-
/******************************************************************************/
/* Adapter info. */
/******************************************************************************/
-typedef struct
-{
- LM_UINT16 Svid;
- LM_UINT16 Ssid;
- LM_UINT32 PhyId;
- LM_UINT32 Serdes; /* 0 = copper PHY, 1 = Serdes */
+typedef struct {
+ LM_UINT16 Svid;
+ LM_UINT16 Ssid;
+ LM_UINT32 PhyId;
+ LM_UINT32 Serdes; /* 0 = copper PHY, 1 = Serdes */
} LM_ADAPTER_INFO, *PLM_ADAPTER_INFO;
-
/******************************************************************************/
/* Packet queues. */
/******************************************************************************/
-DECLARE_QUEUE_TYPE(LM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT);
-DECLARE_QUEUE_TYPE(LM_TX_PACKET_Q, MAX_TX_PACKET_DESC_COUNT);
-
+DECLARE_QUEUE_TYPE (LM_RX_PACKET_Q, MAX_RX_PACKET_DESC_COUNT);
+DECLARE_QUEUE_TYPE (LM_TX_PACKET_Q, MAX_TX_PACKET_DESC_COUNT);
/******************************************************************************/
/* Tx counters. */
/******************************************************************************/
typedef struct {
- LM_COUNTER TxPacketGoodCnt;
- LM_COUNTER TxBytesGoodCnt;
- LM_COUNTER TxPacketAbortedCnt;
- LM_COUNTER NoSendBdLeftCnt;
- LM_COUNTER NoMapRegisterLeftCnt;
- LM_COUNTER TooManyFragmentsCnt;
- LM_COUNTER NoTxPacketDescCnt;
+ LM_COUNTER TxPacketGoodCnt;
+ LM_COUNTER TxBytesGoodCnt;
+ LM_COUNTER TxPacketAbortedCnt;
+ LM_COUNTER NoSendBdLeftCnt;
+ LM_COUNTER NoMapRegisterLeftCnt;
+ LM_COUNTER TooManyFragmentsCnt;
+ LM_COUNTER NoTxPacketDescCnt;
} LM_TX_COUNTERS, *PLM_TX_COUNTERS;
-
/******************************************************************************/
/* Rx counters. */
/******************************************************************************/
typedef struct {
- LM_COUNTER RxPacketGoodCnt;
- LM_COUNTER RxBytesGoodCnt;
- LM_COUNTER RxPacketErrCnt;
- LM_COUNTER RxErrCrcCnt;
- LM_COUNTER RxErrCollCnt;
- LM_COUNTER RxErrLinkLostCnt;
- LM_COUNTER RxErrPhyDecodeCnt;
- LM_COUNTER RxErrOddNibbleCnt;
- LM_COUNTER RxErrMacAbortCnt;
- LM_COUNTER RxErrShortPacketCnt;
- LM_COUNTER RxErrNoResourceCnt;
- LM_COUNTER RxErrLargePacketCnt;
+ LM_COUNTER RxPacketGoodCnt;
+ LM_COUNTER RxBytesGoodCnt;
+ LM_COUNTER RxPacketErrCnt;
+ LM_COUNTER RxErrCrcCnt;
+ LM_COUNTER RxErrCollCnt;
+ LM_COUNTER RxErrLinkLostCnt;
+ LM_COUNTER RxErrPhyDecodeCnt;
+ LM_COUNTER RxErrOddNibbleCnt;
+ LM_COUNTER RxErrMacAbortCnt;
+ LM_COUNTER RxErrShortPacketCnt;
+ LM_COUNTER RxErrNoResourceCnt;
+ LM_COUNTER RxErrLargePacketCnt;
} LM_RX_COUNTERS, *PLM_RX_COUNTERS;
-
/******************************************************************************/
/* Receive producer rings. */
/******************************************************************************/
typedef enum {
- T3_UNKNOWN_RCV_PROD_RING = 0,
- T3_STD_RCV_PROD_RING = 1,
- T3_MINI_RCV_PROD_RING = 2,
- T3_JUMBO_RCV_PROD_RING = 3
+ T3_UNKNOWN_RCV_PROD_RING = 0,
+ T3_STD_RCV_PROD_RING = 1,
+ T3_MINI_RCV_PROD_RING = 2,
+ T3_JUMBO_RCV_PROD_RING = 3
} T3_RCV_PROD_RING, *PT3_RCV_PROD_RING;
-
/******************************************************************************/
/* Packet descriptor. */
/******************************************************************************/
@@ -2758,331 +2675,328 @@
#define LM_PACKET_SIGNATURE_RX 0x6b766168
typedef struct _LM_PACKET {
- /* Set in LM. */
- LM_STATUS PacketStatus;
+ /* Set in LM. */
+ LM_STATUS PacketStatus;
- /* Set in LM for Rx, in UM for Tx. */
- LM_UINT32 PacketSize;
+ /* Set in LM for Rx, in UM for Tx. */
+ LM_UINT32 PacketSize;
- LM_UINT16 Flags;
+ LM_UINT16 Flags;
- LM_UINT16 VlanTag;
+ LM_UINT16 VlanTag;
- union {
- /* Send info. */
- struct {
- /* Set up by UM. */
- LM_UINT32 FragCount;
+ union {
+ /* Send info. */
+ struct {
+ /* Set up by UM. */
+ LM_UINT32 FragCount;
- } Tx;
+ } Tx;
- /* Receive info. */
- struct {
- /* This descriptor belongs to either Std, Mini, or Jumbo ring. */
- T3_RCV_PROD_RING RcvProdRing;
+ /* Receive info. */
+ struct {
+ /* This descriptor belongs to either Std, Mini, or Jumbo ring. */
+ T3_RCV_PROD_RING RcvProdRing;
- /* Receive buffer size */
- LM_UINT32 RxBufferSize;
+ /* Receive buffer size */
+ LM_UINT32 RxBufferSize;
- /* Checksum information. */
- LM_UINT16 IpChecksum;
- LM_UINT16 TcpUdpChecksum;
+ /* Checksum information. */
+ LM_UINT16 IpChecksum;
+ LM_UINT16 TcpUdpChecksum;
- } Rx;
- } u;
+ } Rx;
+ } u;
} LM_PACKET;
-
/******************************************************************************/
/* Tigon3 device block. */
/******************************************************************************/
typedef struct _LM_DEVICE_BLOCK {
- int index; /* Device ID */
- /* Memory view. */
- PT3_STD_MEM_MAP pMemView;
+ int index; /* Device ID */
+ /* Memory view. */
+ PT3_STD_MEM_MAP pMemView;
- /* Base address of the block of memory in which the LM_PACKET descriptors */
- /* are allocated from. */
- PLM_VOID pPacketDescBase;
+ /* Base address of the block of memory in which the LM_PACKET descriptors */
+ /* are allocated from. */
+ PLM_VOID pPacketDescBase;
- LM_UINT32 MiscHostCtrl;
- LM_UINT32 GrcLocalCtrl;
- LM_UINT32 DmaReadWriteCtrl;
- LM_UINT32 PciState;
+ LM_UINT32 MiscHostCtrl;
+ LM_UINT32 GrcLocalCtrl;
+ LM_UINT32 DmaReadWriteCtrl;
+ LM_UINT32 PciState;
- /* Rx info */
- LM_UINT32 RxStdDescCnt;
- LM_UINT32 RxStdQueuedCnt;
- LM_UINT32 RxStdProdIdx;
+ /* Rx info */
+ LM_UINT32 RxStdDescCnt;
+ LM_UINT32 RxStdQueuedCnt;
+ LM_UINT32 RxStdProdIdx;
- PT3_RCV_BD pRxStdBdVirt;
- LM_PHYSICAL_ADDRESS RxStdBdPhy;
+ PT3_RCV_BD pRxStdBdVirt;
+ LM_PHYSICAL_ADDRESS RxStdBdPhy;
- LM_UINT32 RxPacketDescCnt;
- LM_RX_PACKET_Q RxPacketFreeQ;
- LM_RX_PACKET_Q RxPacketReceivedQ;
+ LM_UINT32 RxPacketDescCnt;
+ LM_RX_PACKET_Q RxPacketFreeQ;
+ LM_RX_PACKET_Q RxPacketReceivedQ;
- /* Receive info. */
- PT3_RCV_BD pRcvRetBdVirt;
- LM_PHYSICAL_ADDRESS RcvRetBdPhy;
- LM_UINT32 RcvRetConIdx;
+ /* Receive info. */
+ PT3_RCV_BD pRcvRetBdVirt;
+ LM_PHYSICAL_ADDRESS RcvRetBdPhy;
+ LM_UINT32 RcvRetConIdx;
#if T3_JUMBO_RCV_RCB_ENTRY_COUNT
- LM_UINT32 RxJumboDescCnt;
- LM_UINT32 RxJumboBufferSize;
- LM_UINT32 RxJumboQueuedCnt;
+ LM_UINT32 RxJumboDescCnt;
+ LM_UINT32 RxJumboBufferSize;
+ LM_UINT32 RxJumboQueuedCnt;
- LM_UINT32 RxJumboProdIdx;
+ LM_UINT32 RxJumboProdIdx;
- PT3_RCV_BD pRxJumboBdVirt;
- LM_PHYSICAL_ADDRESS RxJumboBdPhy;
-#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
+ PT3_RCV_BD pRxJumboBdVirt;
+ LM_PHYSICAL_ADDRESS RxJumboBdPhy;
+#endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */
- /* These values are used by the upper module to inform the protocol */
- /* of the maximum transmit/receive packet size. */
- LM_UINT32 TxMtu; /* Does not include CRC. */
- LM_UINT32 RxMtu; /* Does not include CRC. */
+ /* These values are used by the upper module to inform the protocol */
+ /* of the maximum transmit/receive packet size. */
+ LM_UINT32 TxMtu; /* Does not include CRC. */
+ LM_UINT32 RxMtu; /* Does not include CRC. */
- /* We need to shadow the EMAC, Rx, Tx mode registers. With B0 silicon, */
- /* we may have problems reading any MAC registers in 10mb mode. */
- LM_UINT32 MacMode;
- LM_UINT32 RxMode;
- LM_UINT32 TxMode;
+ /* We need to shadow the EMAC, Rx, Tx mode registers. With B0 silicon, */
+ /* we may have problems reading any MAC registers in 10mb mode. */
+ LM_UINT32 MacMode;
+ LM_UINT32 RxMode;
+ LM_UINT32 TxMode;
- /* MiMode register. */
- LM_UINT32 MiMode;
+ /* MiMode register. */
+ LM_UINT32 MiMode;
- /* Host coalesce mode register. */
- LM_UINT32 CoalesceMode;
+ /* Host coalesce mode register. */
+ LM_UINT32 CoalesceMode;
- /* Send info. */
- LM_UINT32 TxPacketDescCnt;
+ /* Send info. */
+ LM_UINT32 TxPacketDescCnt;
- /* Tx info. */
- LM_TX_PACKET_Q TxPacketFreeQ;
- LM_TX_PACKET_Q TxPacketActiveQ;
- LM_TX_PACKET_Q TxPacketXmittedQ;
+ /* Tx info. */
+ LM_TX_PACKET_Q TxPacketFreeQ;
+ LM_TX_PACKET_Q TxPacketActiveQ;
+ LM_TX_PACKET_Q TxPacketXmittedQ;
- /* Pointers to SendBd. */
- PT3_SND_BD pSendBdVirt;
- LM_PHYSICAL_ADDRESS SendBdPhy; /* Only valid for Host based Send BD. */
+ /* Pointers to SendBd. */
+ PT3_SND_BD pSendBdVirt;
+ LM_PHYSICAL_ADDRESS SendBdPhy; /* Only valid for Host based Send BD. */
- /* Send producer and consumer indices. */
- LM_UINT32 SendProdIdx;
- LM_UINT32 SendConIdx;
+ /* Send producer and consumer indices. */
+ LM_UINT32 SendProdIdx;
+ LM_UINT32 SendConIdx;
- /* Number of BD left. */
- atomic_t SendBdLeft;
+ /* Number of BD left. */
+ atomic_t SendBdLeft;
- T3_SND_BD ShadowSendBd[T3_SEND_RCB_ENTRY_COUNT];
+ T3_SND_BD ShadowSendBd[T3_SEND_RCB_ENTRY_COUNT];
- /* Counters. */
- LM_RX_COUNTERS RxCounters;
- LM_TX_COUNTERS TxCounters;
+ /* Counters. */
+ LM_RX_COUNTERS RxCounters;
+ LM_TX_COUNTERS TxCounters;
- /* Host coalescing parameters. */
- LM_UINT32 RxCoalescingTicks;
- LM_UINT32 TxCoalescingTicks;
- LM_UINT32 RxMaxCoalescedFrames;
- LM_UINT32 TxMaxCoalescedFrames;
- LM_UINT32 StatsCoalescingTicks;
- LM_UINT32 RxCoalescingTicksDuringInt;
- LM_UINT32 TxCoalescingTicksDuringInt;
- LM_UINT32 RxMaxCoalescedFramesDuringInt;
- LM_UINT32 TxMaxCoalescedFramesDuringInt;
+ /* Host coalescing parameters. */
+ LM_UINT32 RxCoalescingTicks;
+ LM_UINT32 TxCoalescingTicks;
+ LM_UINT32 RxMaxCoalescedFrames;
+ LM_UINT32 TxMaxCoalescedFrames;
+ LM_UINT32 StatsCoalescingTicks;
+ LM_UINT32 RxCoalescingTicksDuringInt;
+ LM_UINT32 TxCoalescingTicksDuringInt;
+ LM_UINT32 RxMaxCoalescedFramesDuringInt;
+ LM_UINT32 TxMaxCoalescedFramesDuringInt;
- /* DMA water marks. */
- LM_UINT32 DmaMbufLowMark;
- LM_UINT32 RxMacMbufLowMark;
- LM_UINT32 MbufHighMark;
+ /* DMA water marks. */
+ LM_UINT32 DmaMbufLowMark;
+ LM_UINT32 RxMacMbufLowMark;
+ LM_UINT32 MbufHighMark;
- /* Status block. */
- PT3_STATUS_BLOCK pStatusBlkVirt;
- LM_PHYSICAL_ADDRESS StatusBlkPhy;
+ /* Status block. */
+ PT3_STATUS_BLOCK pStatusBlkVirt;
+ LM_PHYSICAL_ADDRESS StatusBlkPhy;
- /* Statistics block. */
- PT3_STATS_BLOCK pStatsBlkVirt;
- LM_PHYSICAL_ADDRESS StatsBlkPhy;
+ /* Statistics block. */
+ PT3_STATS_BLOCK pStatsBlkVirt;
+ LM_PHYSICAL_ADDRESS StatsBlkPhy;
- /* Current receive mask. */
- LM_UINT32 ReceiveMask;
+ /* Current receive mask. */
+ LM_UINT32 ReceiveMask;
- /* Task offload capabilities. */
- LM_TASK_OFFLOAD TaskOffloadCap;
+ /* Task offload capabilities. */
+ LM_TASK_OFFLOAD TaskOffloadCap;
- /* Task offload selected. */
- LM_TASK_OFFLOAD TaskToOffload;
+ /* Task offload selected. */
+ LM_TASK_OFFLOAD TaskToOffload;
- /* Wake up capability. */
- LM_WAKE_UP_MODE WakeUpModeCap;
+ /* Wake up capability. */
+ LM_WAKE_UP_MODE WakeUpModeCap;
- /* Wake up capability. */
- LM_WAKE_UP_MODE WakeUpMode;
+ /* Wake up capability. */
+ LM_WAKE_UP_MODE WakeUpMode;
- /* Flow control. */
- LM_FLOW_CONTROL FlowControlCap;
- LM_FLOW_CONTROL FlowControl;
+ /* Flow control. */
+ LM_FLOW_CONTROL FlowControlCap;
+ LM_FLOW_CONTROL FlowControl;
- /* Enable or disable PCI MWI. */
- LM_UINT32 EnableMWI;
+ /* Enable or disable PCI MWI. */
+ LM_UINT32 EnableMWI;
- /* Enable 5701 tagged status mode. */
- LM_UINT32 UseTaggedStatus;
+ /* Enable 5701 tagged status mode. */
+ LM_UINT32 UseTaggedStatus;
- /* NIC will not compute the pseudo header checksum. The driver or OS */
- /* must seed the checksum field with the pseudo checksum. */
- LM_UINT32 NoTxPseudoHdrChksum;
+ /* NIC will not compute the pseudo header checksum. The driver or OS */
+ /* must seed the checksum field with the pseudo checksum. */
+ LM_UINT32 NoTxPseudoHdrChksum;
- /* The receive checksum in the BD does not include the pseudo checksum. */
- /* The OS or the driver must calculate the pseudo checksum and add it to */
- /* the checksum in the BD. */
- LM_UINT32 NoRxPseudoHdrChksum;
+ /* The receive checksum in the BD does not include the pseudo checksum. */
+ /* The OS or the driver must calculate the pseudo checksum and add it to */
+ /* the checksum in the BD. */
+ LM_UINT32 NoRxPseudoHdrChksum;
- /* Current node address. */
- LM_UINT8 NodeAddress[8];
+ /* Current node address. */
+ LM_UINT8 NodeAddress[8];
- /* The adapter's node address. */
- LM_UINT8 PermanentNodeAddress[8];
+ /* The adapter's node address. */
+ LM_UINT8 PermanentNodeAddress[8];
- /* Adapter info. */
- LM_UINT16 BusNum;
- LM_UINT8 DevNum;
- LM_UINT8 FunctNum;
- LM_UINT16 PciVendorId;
- LM_UINT16 PciDeviceId;
- LM_UINT32 BondId;
- LM_UINT8 Irq;
- LM_UINT8 IntPin;
- LM_UINT8 CacheLineSize;
- LM_UINT8 PciRevId;
+ /* Adapter info. */
+ LM_UINT16 BusNum;
+ LM_UINT8 DevNum;
+ LM_UINT8 FunctNum;
+ LM_UINT16 PciVendorId;
+ LM_UINT16 PciDeviceId;
+ LM_UINT32 BondId;
+ LM_UINT8 Irq;
+ LM_UINT8 IntPin;
+ LM_UINT8 CacheLineSize;
+ LM_UINT8 PciRevId;
#if PCIX_TARGET_WORKAROUND
LM_UINT32 EnablePciXFix;
#endif
- LM_UINT32 UndiFix; /* new, jimmy */
- LM_UINT32 PciCommandStatusWords;
- LM_UINT32 ChipRevId;
- LM_UINT16 SubsystemVendorId;
- LM_UINT16 SubsystemId;
-#if 0 /* Jimmy, deleted in new driver */
- LM_UINT32 MemBaseLow;
- LM_UINT32 MemBaseHigh;
- LM_UINT32 MemBaseSize;
+ LM_UINT32 UndiFix; /* new, jimmy */
+ LM_UINT32 PciCommandStatusWords;
+ LM_UINT32 ChipRevId;
+ LM_UINT16 SubsystemVendorId;
+ LM_UINT16 SubsystemId;
+#if 0 /* Jimmy, deleted in new driver */
+ LM_UINT32 MemBaseLow;
+ LM_UINT32 MemBaseHigh;
+ LM_UINT32 MemBaseSize;
#endif
- PLM_UINT8 pMappedMemBase;
+ PLM_UINT8 pMappedMemBase;
- /* Saved PCI configuration registers for restoring after a reset. */
- LM_UINT32 SavedCacheLineReg;
+ /* Saved PCI configuration registers for restoring after a reset. */
+ LM_UINT32 SavedCacheLineReg;
- /* Phy info. */
- LM_UINT32 PhyAddr;
- LM_UINT32 PhyId;
+ /* Phy info. */
+ LM_UINT32 PhyAddr;
+ LM_UINT32 PhyId;
- /* Requested phy settings. */
- LM_REQUESTED_MEDIA_TYPE RequestedMediaType;
+ /* Requested phy settings. */
+ LM_REQUESTED_MEDIA_TYPE RequestedMediaType;
- /* Disable auto-negotiation. */
- LM_UINT32 DisableAutoNeg;
+ /* Disable auto-negotiation. */
+ LM_UINT32 DisableAutoNeg;
- /* Ways for the MAC to get link change interrupt. */
- LM_UINT32 PhyIntMode;
- #define T3_PHY_INT_MODE_AUTO 0
- #define T3_PHY_INT_MODE_MI_INTERRUPT 1
- #define T3_PHY_INT_MODE_LINK_READY 2
- #define T3_PHY_INT_MODE_AUTO_POLLING 3
+ /* Ways for the MAC to get link change interrupt. */
+ LM_UINT32 PhyIntMode;
+#define T3_PHY_INT_MODE_AUTO 0
+#define T3_PHY_INT_MODE_MI_INTERRUPT 1
+#define T3_PHY_INT_MODE_LINK_READY 2
+#define T3_PHY_INT_MODE_AUTO_POLLING 3
- /* Ways to determine link change status. */
- LM_UINT32 LinkChngMode;
- #define T3_LINK_CHNG_MODE_AUTO 0
- #define T3_LINK_CHNG_MODE_USE_STATUS_REG 1
- #define T3_LINK_CHNG_MODE_USE_STATUS_BLOCK 2
+ /* Ways to determine link change status. */
+ LM_UINT32 LinkChngMode;
+#define T3_LINK_CHNG_MODE_AUTO 0
+#define T3_LINK_CHNG_MODE_USE_STATUS_REG 1
+#define T3_LINK_CHNG_MODE_USE_STATUS_BLOCK 2
+ /* LED mode. */
+ LM_UINT32 LedMode;
- /* LED mode. */
- LM_UINT32 LedMode;
+#define LED_MODE_AUTO 0
- #define LED_MODE_AUTO 0
+ /* 5700/01 LED mode. */
+#define LED_MODE_THREE_LINK 1
+#define LED_MODE_LINK10 2
- /* 5700/01 LED mode. */
- #define LED_MODE_THREE_LINK 1
- #define LED_MODE_LINK10 2
+ /* 5703/02/04 LED mode. */
+#define LED_MODE_OPEN_DRAIN 1
+#define LED_MODE_OUTPUT 2
- /* 5703/02/04 LED mode. */
- #define LED_MODE_OPEN_DRAIN 1
- #define LED_MODE_OUTPUT 2
+ /* WOL Speed */
+ LM_UINT32 WolSpeed;
+#define WOL_SPEED_10MB 1
+#define WOL_SPEED_100MB 2
- /* WOL Speed */
- LM_UINT32 WolSpeed;
- #define WOL_SPEED_10MB 1
- #define WOL_SPEED_100MB 2
+ /* Reset the PHY on initialization. */
+ LM_UINT32 ResetPhyOnInit;
- /* Reset the PHY on initialization. */
- LM_UINT32 ResetPhyOnInit;
+ LM_UINT32 RestoreOnWakeUp;
+ LM_REQUESTED_MEDIA_TYPE WakeUpRequestedMediaType;
+ LM_UINT32 WakeUpDisableAutoNeg;
- LM_UINT32 RestoreOnWakeUp;
- LM_REQUESTED_MEDIA_TYPE WakeUpRequestedMediaType;
- LM_UINT32 WakeUpDisableAutoNeg;
+ /* Current phy settings. */
+ LM_MEDIA_TYPE MediaType;
+ LM_LINE_SPEED LineSpeed;
+ LM_LINE_SPEED OldLineSpeed;
+ LM_DUPLEX_MODE DuplexMode;
+ LM_STATUS LinkStatus;
+ LM_UINT32 advertising; /* Jimmy, new! */
+ LM_UINT32 advertising1000; /* Jimmy, new! */
- /* Current phy settings. */
- LM_MEDIA_TYPE MediaType;
- LM_LINE_SPEED LineSpeed;
- LM_LINE_SPEED OldLineSpeed;
- LM_DUPLEX_MODE DuplexMode;
- LM_STATUS LinkStatus;
- LM_UINT32 advertising; /* Jimmy, new! */
- LM_UINT32 advertising1000; /* Jimmy, new! */
+ /* Multicast address list. */
+ LM_UINT32 McEntryCount;
+ LM_UINT8 McTable[LM_MAX_MC_TABLE_SIZE][LM_MC_ENTRY_SIZE];
- /* Multicast address list. */
- LM_UINT32 McEntryCount;
- LM_UINT8 McTable[LM_MAX_MC_TABLE_SIZE][LM_MC_ENTRY_SIZE];
+ /* Use NIC or Host based send BD. */
+ LM_UINT32 NicSendBd;
- /* Use NIC or Host based send BD. */
- LM_UINT32 NicSendBd;
+ /* Athlon fix. */
+ LM_UINT32 DelayPciGrant;
- /* Athlon fix. */
- LM_UINT32 DelayPciGrant;
+ /* Enable OneDmaAtOnce */
+ LM_UINT32 OneDmaAtOnce;
- /* Enable OneDmaAtOnce */
- LM_UINT32 OneDmaAtOnce;
+ /* Split Mode flags, Jimmy new */
+ LM_UINT32 SplitModeEnable;
+ LM_UINT32 SplitModeMaxReq;
- /* Split Mode flags, Jimmy new */
- LM_UINT32 SplitModeEnable;
- LM_UINT32 SplitModeMaxReq;
+ /* Init flag. */
+ LM_BOOL InitDone;
- /* Init flag. */
- LM_BOOL InitDone;
+ /* Shutdown flag. Set by the upper module. */
+ LM_BOOL ShuttingDown;
- /* Shutdown flag. Set by the upper module. */
- LM_BOOL ShuttingDown;
+ /* Flag to determine whether to call LM_QueueRxPackets or not in */
+ /* LM_ResetAdapter routine. */
+ LM_BOOL QueueRxPackets;
- /* Flag to determine whether to call LM_QueueRxPackets or not in */
- /* LM_ResetAdapter routine. */
- LM_BOOL QueueRxPackets;
+ LM_UINT32 MbufBase;
+ LM_UINT32 MbufSize;
- LM_UINT32 MbufBase;
- LM_UINT32 MbufSize;
+ /* TRUE if we have a SERDES PHY. */
+ LM_UINT32 EnableTbi;
- /* TRUE if we have a SERDES PHY. */
- LM_UINT32 EnableTbi;
+ /* Ethernet@WireSpeed. */
+ LM_UINT32 EnableWireSpeed;
- /* Ethernet@WireSpeed. */
- LM_UINT32 EnableWireSpeed;
-
- LM_UINT32 EepromWp;
+ LM_UINT32 EepromWp;
#if INCLUDE_TBI_SUPPORT
- /* Autoneg state info. */
- AN_STATE_INFO AnInfo;
- LM_UINT32 PollTbiLink;
- LM_UINT32 IgnoreTbiLinkChange;
+ /* Autoneg state info. */
+ AN_STATE_INFO AnInfo;
+ LM_UINT32 PollTbiLink;
+ LM_UINT32 IgnoreTbiLinkChange;
#endif
- char PartNo[24];
- char BootCodeVer[16];
- char BusSpeedStr[24]; /* Jimmy, new! */
- LM_UINT32 PhyCrcCount;
+ char PartNo[24];
+ char BootCodeVer[16];
+ char BusSpeedStr[24]; /* Jimmy, new! */
+ LM_UINT32 PhyCrcCount;
} LM_DEVICE_BLOCK;
-
#define T3_REG_CPU_VIEW 0xc0000000
#define T3_BLOCK_DMA_RD (1 << 0)
@@ -3216,7 +3130,6 @@
#define TX_CPU_EVT_SW12 30
#define TX_CPU_EVT_SW13 31
-
/* TX-CPU event */
#define TX_CPU_EVENT_SW_EVENT0 (1 << TX_CPU_EVT_SW0)
#define TX_CPU_EVENT_SW_EVENT1 (1 << TX_CPU_EVT_SW1)
@@ -3251,12 +3164,10 @@
#define TX_CPU_EVENT_SW_EVENT12 (1 << TX_CPU_EVT_SW12)
#define TX_CPU_EVENT_SW_EVENT13 (1 << TX_CPU_EVT_SW13)
-
#define TX_CPU_MASK (TX_CPU_EVENT_SW_EVENT0 | \
TX_CPU_EVENT_SDI | \
TX_CPU_EVENT_SDC)
-
#define T3_FTQ_TYPE1_UNDERFLOW_BIT (1 << 29)
#define T3_FTQ_TYPE1_PASS_BIT (1 << 30)
#define T3_FTQ_TYPE1_SKIP_BIT (1 << 31)
@@ -3283,25 +3194,24 @@
#define T3_QID_RX_DATA_COMP 16
#define T3_QID_SW_TYPE2 17
-LM_STATUS LM_LoadFirmware(PLM_DEVICE_BLOCK pDevice,
- PT3_FWIMG_INFO pFwImg,
- LM_UINT32 LoadCpu,
- LM_UINT32 StartCpu);
+LM_STATUS LM_LoadFirmware (PLM_DEVICE_BLOCK pDevice,
+ PT3_FWIMG_INFO pFwImg,
+ LM_UINT32 LoadCpu, LM_UINT32 StartCpu);
/******************************************************************************/
/* NIC register read/write macros. */
/******************************************************************************/
-#if 0 /* Jimmy */
+#if 0 /* Jimmy */
/* MAC register access. */
-LM_UINT32 LM_RegRdInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register);
-LM_VOID LM_RegWrInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register,
- LM_UINT32 Value32);
+LM_UINT32 LM_RegRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register);
+LM_VOID LM_RegWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register,
+ LM_UINT32 Value32);
/* MAC memory access. */
-LM_UINT32 LM_MemRdInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr);
-LM_VOID LM_MemWrInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr,
- LM_UINT32 Value32);
+LM_UINT32 LM_MemRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr);
+LM_VOID LM_MemWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr,
+ LM_UINT32 Value32);
#if PCIX_TARGET_WORKAROUND
@@ -3342,7 +3252,7 @@
#define MEM_WR_OFFSET(pDevice, Offset, Value32) \
LM_MemWrInd(pDevice, Offset, Value32)
-#else /* normal target access path below */
+#else /* normal target access path below */
/* Register access. */
#define REG_RD(pDevice, OffsetName) \
@@ -3355,7 +3265,6 @@
#define REG_WR_OFFSET(pDevice, Offset, Value32) \
writel(Value32, ((LM_UINT8 *) (pDevice)->pMemView + Offset))
-
/* There could be problem access the memory window directly. For now, */
/* we have to go through the PCI configuration register. */
#define MEM_RD(pDevice, AddrName) \
@@ -3368,9 +3277,9 @@
#define MEM_WR_OFFSET(pDevice, Offset, Value32) \
LM_MemWrInd(pDevice, Offset, Value32)
-#endif /* PCIX_TARGET_WORKAROUND */
+#endif /* PCIX_TARGET_WORKAROUND */
-#endif /* Jimmy, merging */
+#endif /* Jimmy, merging */
/* Jimmy...rest of file is new stuff! */
/******************************************************************************/
@@ -3378,14 +3287,14 @@
/******************************************************************************/
/* MAC register access. */
-LM_UINT32 LM_RegRdInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register);
-LM_VOID LM_RegWrInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register,
- LM_UINT32 Value32);
+LM_UINT32 LM_RegRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register);
+LM_VOID LM_RegWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 Register,
+ LM_UINT32 Value32);
/* MAC memory access. */
-LM_UINT32 LM_MemRdInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr);
-LM_VOID LM_MemWrInd(PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr,
- LM_UINT32 Value32);
+LM_UINT32 LM_MemRdInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr);
+LM_VOID LM_MemWrInd (PLM_DEVICE_BLOCK pDevice, LM_UINT32 MemAddr,
+ LM_UINT32 Value32);
#define MB_REG_WR(pDevice, OffsetName, Value32) \
((pDevice)->UndiFix) ? \
@@ -3427,4 +3336,4 @@
#define MEM_WR_OFFSET(pDevice, Offset, Value32) \
LM_MemWrInd(pDevice, Offset, Value32)
-#endif /* TIGON3_H */
+#endif /* TIGON3_H */
diff --git a/drivers/tqm8xx_pcmcia.c b/drivers/tqm8xx_pcmcia.c
index a0f53cd..132c7a5 100644
--- a/drivers/tqm8xx_pcmcia.c
+++ b/drivers/tqm8xx_pcmcia.c
@@ -10,11 +10,11 @@
#undef CONFIG_PCMCIA
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
#define CONFIG_PCMCIA
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
#define CONFIG_PCMCIA
#endif
@@ -241,7 +241,7 @@
}
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
+#if defined(CONFIG_CMD_PCMCIA)
int pcmcia_hardware_disable(int slot)
{
u_long reg;
@@ -263,7 +263,7 @@
return (0);
}
-#endif /* CFG_CMD_PCMCIA */
+#endif
int pcmcia_voltage_set(int slot, int vcc, int vpp)
{
diff --git a/drivers/tsec.c b/drivers/tsec.c
index b418773..4ff3339 100644
--- a/drivers/tsec.c
+++ b/drivers/tsec.c
@@ -65,38 +65,30 @@
* FEC_PHYIDX
*/
static struct tsec_info_struct tsec_info[] = {
-#if defined(CONFIG_MPC85XX_TSEC1) || defined(CONFIG_MPC83XX_TSEC1)
-#if defined(CONFIG_MPC8544DS)
- {TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX},
-#else
- {TSEC1_PHY_ADDR, TSEC_GIGABIT, TSEC1_PHYIDX},
-#endif
-#elif defined(CONFIG_MPC86XX_TSEC1)
- {TSEC1_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC1_PHYIDX},
+#ifdef CONFIG_TSEC1
+ {TSEC1_PHY_ADDR, TSEC1_FLAGS, TSEC1_PHYIDX},
#else
{0, 0, 0},
#endif
-#if defined(CONFIG_MPC85XX_TSEC2) || defined(CONFIG_MPC83XX_TSEC2)
- {TSEC2_PHY_ADDR, TSEC_GIGABIT, TSEC2_PHYIDX},
-#elif defined(CONFIG_MPC86XX_TSEC2)
- {TSEC2_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC2_PHYIDX},
+#ifdef CONFIG_TSEC2
+ {TSEC2_PHY_ADDR, TSEC2_FLAGS, TSEC2_PHYIDX},
#else
{0, 0, 0},
#endif
#ifdef CONFIG_MPC85XX_FEC
- {FEC_PHY_ADDR, 0, FEC_PHYIDX},
+ {FEC_PHY_ADDR, FEC_FLAGS, FEC_PHYIDX},
#else
-#if defined(CONFIG_MPC85XX_TSEC3) || defined(CONFIG_MPC83XX_TSEC3) || defined(CONFIG_MPC86XX_TSEC3)
- {TSEC3_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC3_PHYIDX},
+#ifdef CONFIG_TSEC3
+ {TSEC3_PHY_ADDR, TSEC3_FLAGS, TSEC3_PHYIDX},
#else
{0, 0, 0},
#endif
-#if defined(CONFIG_MPC85XX_TSEC4) || defined(CONFIG_MPC83XX_TSEC4) || defined(CONFIG_MPC86XX_TSEC4)
- {TSEC4_PHY_ADDR, TSEC_GIGABIT | TSEC_REDUCED, TSEC4_PHYIDX},
+#ifdef CONFIG_TSEC4
+ {TSEC4_PHY_ADDR, TSEC4_FLAGS, TSEC4_PHYIDX},
#else
{0, 0, 0},
-#endif
-#endif
+#endif /* CONFIG_TSEC4 */
+#endif /* CONFIG_MPC85XX_FEC */
};
#define MAXCONTROLLERS (4)
@@ -129,6 +121,9 @@
unsigned char reg, unsigned short value);
static int tsec_miiphy_read(char *devname, unsigned char addr,
unsigned char reg, unsigned short *value);
+#ifdef CONFIG_MCAST_TFTP
+static int tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set);
+#endif
/* Initialize device structure. Returns success if PHY
* initialization succeeded (i.e. if it recognizes the PHY)
@@ -167,6 +162,9 @@
dev->halt = tsec_halt;
dev->send = tsec_send;
dev->recv = tsec_recv;
+#ifdef CONFIG_MCAST_TFTP
+ dev->mcast = tsec_mcast_addr;
+#endif
/* Tell u-boot to get the addr from the env */
for (i = 0; i < 6; i++)
@@ -178,7 +176,7 @@
priv->regs->maccfg1 |= MACCFG1_SOFT_RESET;
priv->regs->maccfg1 &= ~(MACCFG1_SOFT_RESET);
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) \
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
miiphy_register(dev->name, tsec_miiphy_read, tsec_miiphy_write);
#endif
@@ -298,9 +296,9 @@
volatile tsec_t *regs = (volatile tsec_t *)(TSEC_BASE_ADDR);
/* Assign a Physical address to the TBI */
- regs->tbipa = TBIPA_VALUE;
+ regs->tbipa = CFG_TBIPA_VALUE;
regs = (volatile tsec_t *)(TSEC_BASE_ADDR + TSEC_SIZE);
- regs->tbipa = TBIPA_VALUE;
+ regs->tbipa = CFG_TBIPA_VALUE;
asm("sync");
/* Reset MII (due to new addresses) */
@@ -349,17 +347,16 @@
uint mii_parse_sr(uint mii_reg, struct tsec_private * priv)
{
/*
- * Wait if PHY is capable of autonegotiation and autonegotiation
- * is not complete.
+ * Wait if the link is up, and autonegotiation is in progress
+ * (ie - we're capable and it's not done)
*/
mii_reg = read_phy_reg(priv, MIIM_STATUS);
- if ((mii_reg & PHY_BMSR_AUTN_ABLE)
+ if ((mii_reg & MIIM_STATUS_LINK) && (mii_reg & PHY_BMSR_AUTN_ABLE)
&& !(mii_reg & PHY_BMSR_AUTN_COMP)) {
int i = 0;
puts("Waiting for PHY auto negotiation to complete");
- while (!((mii_reg & PHY_BMSR_AUTN_COMP)
- && (mii_reg & MIIM_STATUS_LINK))) {
+ while (!(mii_reg & PHY_BMSR_AUTN_COMP)) {
/*
* Timeout reached ?
*/
@@ -379,7 +376,10 @@
priv->link = 1;
udelay(500000); /* another 500 ms (results in faster booting) */
} else {
- priv->link = 1;
+ if (mii_reg & MIIM_STATUS_LINK)
+ priv->link = 1;
+ else
+ priv->link = 0;
}
return 0;
@@ -519,16 +519,13 @@
mii_reg = read_phy_reg(priv, MIIM_88E1011_PHY_STATUS);
- if (!((mii_reg & MIIM_88E1011_PHYSTAT_SPDDONE) &&
- (mii_reg & MIIM_88E1011_PHYSTAT_LINK))) {
+ if ((mii_reg & MIIM_88E1011_PHYSTAT_LINK) &&
+ !(mii_reg & MIIM_88E1011_PHYSTAT_SPDDONE)) {
int i = 0;
puts("Waiting for PHY realtime link");
- while (!((mii_reg & MIIM_88E1011_PHYSTAT_SPDDONE) &&
- (mii_reg & MIIM_88E1011_PHYSTAT_LINK))) {
- /*
- * Timeout reached ?
- */
+ while (!(mii_reg & MIIM_88E1011_PHYSTAT_SPDDONE)) {
+ /* Timeout reached ? */
if (i > PHY_AUTONEGOTIATE_TIMEOUT) {
puts(" TIMEOUT !\n");
priv->link = 0;
@@ -543,6 +540,11 @@
}
puts(" done\n");
udelay(500000); /* another 500 ms (results in faster booting) */
+ } else {
+ if (mii_reg & MIIM_88E1011_PHYSTAT_LINK)
+ priv->link = 1;
+ else
+ priv->link = 0;
}
if (mii_reg & MIIM_88E1011_PHYSTAT_DUPLEX)
@@ -900,6 +902,39 @@
phy_run_commands(priv, priv->phyinfo->shutdown);
}
+struct phy_info phy_info_M88E1149S = {
+ 0x1410ca,
+ "Marvell 88E1149S",
+ 4,
+ (struct phy_cmd[]){ /* config */
+ /* Reset and configure the PHY */
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {0x1d, 0x1f, NULL},
+ {0x1e, 0x200c, NULL},
+ {0x1d, 0x5, NULL},
+ {0x1e, 0x0, NULL},
+ {0x1e, 0x100, NULL},
+ {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
+ {MIIM_ANAR, MIIM_ANAR_INIT, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* startup */
+ /* Status is read once to clear old link state */
+ {MIIM_STATUS, miim_read, NULL},
+ /* Auto-negotiate */
+ {MIIM_STATUS, miim_read, &mii_parse_sr},
+ /* Read the status */
+ {MIIM_88E1011_PHY_STATUS, miim_read,
+ &mii_parse_88E1011_psr},
+ {miim_end,}
+ },
+ (struct phy_cmd[]){ /* shutdown */
+ {miim_end,}
+ },
+};
+
/* The 5411 id is 0x206070, the 5421 is 0x2060e0 */
struct phy_info phy_info_BCM5461S = {
0x02060c1, /* 5461 ID */
@@ -928,6 +963,33 @@
},
};
+struct phy_info phy_info_BCM5464S = {
+ 0x02060b1, /* 5464 ID */
+ "Broadcom BCM5464S",
+ 0, /* not clear to me what minor revisions we can shift away */
+ (struct phy_cmd[]) { /* config */
+ /* Reset and configure the PHY */
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
+ {MIIM_ANAR, MIIM_ANAR_INIT, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ {MIIM_CONTROL, MIIM_CONTROL_INIT, &mii_cr_init},
+ {miim_end,}
+ },
+ (struct phy_cmd[]) { /* startup */
+ /* Status is read once to clear old link state */
+ {MIIM_STATUS, miim_read, NULL},
+ /* Auto-negotiate */
+ {MIIM_STATUS, miim_read, &mii_parse_sr},
+ /* Read the status */
+ {MIIM_BCM54xx_AUXSTATUS, miim_read, &mii_parse_BCM54xx_sr},
+ {miim_end,}
+ },
+ (struct phy_cmd[]) { /* shutdown */
+ {miim_end,}
+ },
+};
+
struct phy_info phy_info_M88E1011S = {
0x01410c6,
"Marvell 88E1011S",
@@ -968,11 +1030,6 @@
(struct phy_cmd[]){ /* config */
/* Reset and configure the PHY */
{MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
- {0x1d, 0x1f, NULL},
- {0x1e, 0x200c, NULL},
- {0x1d, 0x5, NULL},
- {0x1e, 0x0, NULL},
- {0x1e, 0x100, NULL},
{0x14, 0x0cd2, NULL}, /* Delay RGMII TX and RX */
{MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
{MIIM_ANAR, MIIM_ANAR_INIT, NULL},
@@ -1012,14 +1069,16 @@
"Marvell 88E1145",
4,
(struct phy_cmd[]){ /* config */
+ /* Reset the PHY */
+ {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+
/* Errata E0, E1 */
{29, 0x001b, NULL},
{30, 0x418f, NULL},
{29, 0x0016, NULL},
{30, 0xa2da, NULL},
- /* Reset and configure the PHY */
- {MIIM_CONTROL, MIIM_CONTROL_RESET, NULL},
+ /* Configure the PHY */
{MIIM_GBIT_CONTROL, MIIM_GBIT_CONTROL_INIT, NULL},
{MIIM_ANAR, MIIM_ANAR_INIT, NULL},
{MIIM_88E1011_PHY_SCR, MIIM_88E1011_PHY_MDI_X_AUTO,
@@ -1203,10 +1262,10 @@
case MIIM_LXT971_SR2_100HDX:
priv->speed = 100;
priv->duplexity = 0;
+ break;
default:
priv->speed = 100;
priv->duplexity = 1;
- break;
}
} else {
priv->speed = 0;
@@ -1292,9 +1351,11 @@
&phy_info_cis8204,
&phy_info_cis8201,
&phy_info_BCM5461S,
+ &phy_info_BCM5464S,
&phy_info_M88E1011S,
&phy_info_M88E1111S,
&phy_info_M88E1145,
+ &phy_info_M88E1149S,
&phy_info_dm9161,
&phy_info_lxt971,
&phy_info_VSC8244,
@@ -1325,8 +1386,10 @@
/* loop through all the known PHY types, and find one that */
/* matches the ID we read from the PHY. */
for (i = 0; phy_info[i]; i++) {
- if (phy_info[i]->id == (phy_ID >> phy_info[i]->shift))
+ if (phy_info[i]->id == (phy_ID >> phy_info[i]->shift)) {
theInfo = phy_info[i];
+ break;
+ }
}
if (theInfo == NULL) {
@@ -1417,7 +1480,7 @@
relocated = 1;
}
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII) \
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII) \
&& !defined(BITBANGMII)
struct tsec_private *get_priv_for_phy(unsigned char phyaddr)
@@ -1476,7 +1539,48 @@
return 0;
}
-#endif /* defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
- && !defined(BITBANGMII) */
+#endif
+
+#ifdef CONFIG_MCAST_TFTP
+
+/* CREDITS: linux gianfar driver, slightly adjusted... thanx. */
+
+/* Set the appropriate hash bit for the given addr */
+
+/* The algorithm works like so:
+ * 1) Take the Destination Address (ie the multicast address), and
+ * do a CRC on it (little endian), and reverse the bits of the
+ * result.
+ * 2) Use the 8 most significant bits as a hash into a 256-entry
+ * table. The table is controlled through 8 32-bit registers:
+ * gaddr0-7. gaddr0's MSB is entry 0, and gaddr7's LSB is
+ * gaddr7. This means that the 3 most significant bits in the
+ * hash index which gaddr register to use, and the 5 other bits
+ * indicate which bit (assuming an IBM numbering scheme, which
+ * for PowerPC (tm) is usually the case) in the tregister holds
+ * the entry. */
+static int
+tsec_mcast_addr (struct eth_device *dev, u8 mcast_mac, u8 set)
+{
+ struct tsec_private *priv = privlist[1];
+ volatile tsec_t *regs = priv->regs;
+ volatile u32 *reg_array, value;
+ u8 result, whichbit, whichreg;
+
+ result = (u8)((ether_crc(MAC_ADDR_LEN,mcast_mac) >> 24) & 0xff);
+ whichbit = result & 0x1f; /* the 5 LSB = which bit to set */
+ whichreg = result >> 5; /* the 3 MSB = which reg to set it in */
+ value = (1 << (31-whichbit));
+
+ reg_array = &(regs->hash.gaddr0);
+
+ if (set) {
+ reg_array[whichreg] |= value;
+ } else {
+ reg_array[whichreg] &= ~value;
+ }
+ return 0;
+}
+#endif /* Multicast TFTP ? */
#endif /* CONFIG_TSEC_ENET */
diff --git a/drivers/tsec.h b/drivers/tsec.h
index 7bf3dee..2f0092a 100644
--- a/drivers/tsec.h
+++ b/drivers/tsec.h
@@ -70,7 +70,9 @@
#define miim_end -2
#define miim_read -1
-#define TBIPA_VALUE 0x1f
+#ifndef CFG_TBIPA_VALUE
+ #define CFG_TBIPA_VALUE 0x1f
+#endif
#define MIIMCFG_INIT_VALUE 0x00000003
#define MIIMCFG_RESET 0x80000000
diff --git a/drivers/tsi108_eth.c b/drivers/tsi108_eth.c
index 47341be..524e9da 100644
--- a/drivers/tsi108_eth.c
+++ b/drivers/tsi108_eth.c
@@ -27,7 +27,7 @@
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) \
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI) \
&& defined(CONFIG_TSI108_ETH)
#if !defined(CONFIG_TSI108_ETH_NUM_PORTS) || (CONFIG_TSI108_ETH_NUM_PORTS > 2)
diff --git a/drivers/tsi108_i2c.c b/drivers/tsi108_i2c.c
index eb52cb6..3a3b75c 100644
--- a/drivers/tsi108_i2c.c
+++ b/drivers/tsi108_i2c.c
@@ -28,7 +28,7 @@
#ifdef CONFIG_TSI108_I2C
#include <tsi108.h>
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
#define I2C_DELAY 100000
#undef DEBUG_I2C
@@ -279,5 +279,5 @@
return i2c_read (chip, 0, 1, (char *)&tmp, 1);
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_I2C) */
+#endif
#endif /* CONFIG_TSI108_I2C */
diff --git a/drivers/usb_ohci.c b/drivers/usb_ohci.c
new file mode 100644
index 0000000..14984a5
--- /dev/null
+++ b/drivers/usb_ohci.c
@@ -0,0 +1,1918 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) for USB on the AT91RM9200 and PCI bus.
+ *
+ * Interrupt support is added. Now, it has been tested
+ * on ULI1575 chip and works well with USB keyboard.
+ *
+ * (C) Copyright 2007
+ * Zhang Wei, Freescale Semiconductor, Inc. <wei.zhang@freescale.com>
+ *
+ * (C) Copyright 2003
+ * Gary Jennejohn, DENX Software Engineering <gj@denx.de>
+ *
+ * Note: Much of this code has been derived from Linux 2.4
+ * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
+ * (C) Copyright 2000-2002 David Brownell
+ *
+ * Modified for the MP2USB by (C) Copyright 2005 Eric Benard
+ * ebenard@eukrea.com - based on s3c24x0's driver
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+/*
+ * IMPORTANT NOTES
+ * 1 - Read doc/README.generic_usb_ohci
+ * 2 - this driver is intended for use with USB Mass Storage Devices
+ * (BBB) and USB keyboard. There is NO support for Isochronous pipes!
+ * 2 - when running on a PQFP208 AT91RM9200, define CONFIG_AT91C_PQFP_UHPBUG
+ * to activate workaround for bug #41 or this driver will NOT work!
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_USB_OHCI_NEW
+
+#include <asm/byteorder.h>
+
+#if defined(CONFIG_PCI_OHCI)
+# include <pci.h>
+#endif
+
+#include <malloc.h>
+#include <usb.h>
+#include "usb_ohci.h"
+
+#if defined(CONFIG_ARM920T) || \
+ defined(CONFIG_S3C2400) || \
+ defined(CONFIG_S3C2410) || \
+ defined(CONFIG_440EP) || \
+ defined(CONFIG_PCI_OHCI) || \
+ defined(CONFIG_MPC5200)
+# define OHCI_USE_NPS /* force NoPowerSwitching mode */
+#endif
+
+#undef OHCI_VERBOSE_DEBUG /* not always helpful */
+#undef DEBUG
+#undef SHOW_INFO
+#undef OHCI_FILL_TRACE
+
+/* For initializing controller (mask in an HCFS mode too) */
+#define OHCI_CONTROL_INIT \
+ (OHCI_CTRL_CBSR & 0x3) | OHCI_CTRL_IE | OHCI_CTRL_PLE
+
+/*
+ * e.g. PCI controllers need this
+ */
+#ifdef CFG_OHCI_SWAP_REG_ACCESS
+# define readl(a) __swap_32(*((vu_long *)(a)))
+# define writel(a, b) (*((vu_long *)(b)) = __swap_32((vu_long)a))
+#else
+# define readl(a) (*((vu_long *)(a)))
+# define writel(a, b) (*((vu_long *)(b)) = ((vu_long)a))
+#endif /* CFG_OHCI_SWAP_REG_ACCESS */
+
+#define min_t(type,x,y) ({ type __x = (x); type __y = (y); __x < __y ? __x: __y; })
+
+#ifdef CONFIG_PCI_OHCI
+static struct pci_device_id ohci_pci_ids[] = {
+ {0x10b9, 0x5237}, /* ULI1575 PCI OHCI module ids */
+ /* Please add supported PCI OHCI controller ids here */
+ {0, 0}
+};
+#endif
+
+#ifdef DEBUG
+#define dbg(format, arg...) printf("DEBUG: " format "\n", ## arg)
+#else
+#define dbg(format, arg...) do {} while(0)
+#endif /* DEBUG */
+#define err(format, arg...) printf("ERROR: " format "\n", ## arg)
+#undef SHOW_INFO
+#ifdef SHOW_INFO
+#define info(format, arg...) printf("INFO: " format "\n", ## arg)
+#else
+#define info(format, arg...) do {} while(0)
+#endif
+
+#ifdef CFG_OHCI_BE_CONTROLLER
+# define m16_swap(x) cpu_to_be16(x)
+# define m32_swap(x) cpu_to_be32(x)
+#else
+# define m16_swap(x) cpu_to_le16(x)
+# define m32_swap(x) cpu_to_le32(x)
+#endif /* CFG_OHCI_BE_CONTROLLER */
+
+/* global ohci_t */
+static ohci_t gohci;
+/* this must be aligned to a 256 byte boundary */
+struct ohci_hcca ghcca[1];
+/* a pointer to the aligned storage */
+struct ohci_hcca *phcca;
+/* this allocates EDs for all possible endpoints */
+struct ohci_device ohci_dev;
+/* RHSC flag */
+int got_rhsc;
+/* device which was disconnected */
+struct usb_device *devgone;
+
+/*-------------------------------------------------------------------------*/
+
+/* AMD-756 (D2 rev) reports corrupt register contents in some cases.
+ * The erratum (#4) description is incorrect. AMD's workaround waits
+ * till some bits (mostly reserved) are clear; ok for all revs.
+ */
+#define OHCI_QUIRK_AMD756 0xabcd
+#define read_roothub(hc, register, mask) ({ \
+ u32 temp = readl (&hc->regs->roothub.register); \
+ if (hc->flags & OHCI_QUIRK_AMD756) \
+ while (temp & mask) \
+ temp = readl (&hc->regs->roothub.register); \
+ temp; })
+
+static u32 roothub_a (struct ohci *hc)
+ { return read_roothub (hc, a, 0xfc0fe000); }
+static inline u32 roothub_b (struct ohci *hc)
+ { return readl (&hc->regs->roothub.b); }
+static inline u32 roothub_status (struct ohci *hc)
+ { return readl (&hc->regs->roothub.status); }
+static u32 roothub_portstatus (struct ohci *hc, int i)
+ { return read_roothub (hc, portstatus [i], 0xffe0fce0); }
+
+/* forward declaration */
+static int hc_interrupt (void);
+static void
+td_submit_job (struct usb_device * dev, unsigned long pipe, void * buffer,
+ int transfer_len, struct devrequest * setup, urb_priv_t * urb, int interval);
+
+/*-------------------------------------------------------------------------*
+ * URB support functions
+ *-------------------------------------------------------------------------*/
+
+/* free HCD-private data associated with this URB */
+
+static void urb_free_priv (urb_priv_t * urb)
+{
+ int i;
+ int last;
+ struct td * td;
+
+ last = urb->length - 1;
+ if (last >= 0) {
+ for (i = 0; i <= last; i++) {
+ td = urb->td[i];
+ if (td) {
+ td->usb_dev = NULL;
+ urb->td[i] = NULL;
+ }
+ }
+ }
+ free(urb);
+}
+
+/*-------------------------------------------------------------------------*/
+
+#ifdef DEBUG
+static int sohci_get_current_frame_number (struct usb_device * dev);
+
+/* debug| print the main components of an URB
+ * small: 0) header + data packets 1) just header */
+
+static void pkt_print (urb_priv_t *purb, struct usb_device * dev,
+ unsigned long pipe, void * buffer,
+ int transfer_len, struct devrequest * setup, char * str, int small)
+{
+ dbg("%s URB:[%4x] dev:%2d,ep:%2d-%c,type:%s,len:%d/%d stat:%#lx",
+ str,
+ sohci_get_current_frame_number (dev),
+ usb_pipedevice (pipe),
+ usb_pipeendpoint (pipe),
+ usb_pipeout (pipe)? 'O': 'I',
+ usb_pipetype (pipe) < 2? (usb_pipeint (pipe)? "INTR": "ISOC"):
+ (usb_pipecontrol (pipe)? "CTRL": "BULK"),
+ (purb ? purb->actual_length : 0),
+ transfer_len, dev->status);
+#ifdef OHCI_VERBOSE_DEBUG
+ if (!small) {
+ int i, len;
+
+ if (usb_pipecontrol (pipe)) {
+ printf (__FILE__ ": cmd(8):");
+ for (i = 0; i < 8 ; i++)
+ printf (" %02x", ((__u8 *) setup) [i]);
+ printf ("\n");
+ }
+ if (transfer_len > 0 && buffer) {
+ printf (__FILE__ ": data(%d/%d):",
+ (purb ? purb->actual_length : 0),
+ transfer_len);
+ len = usb_pipeout (pipe)?
+ transfer_len:
+ (purb ? purb->actual_length : 0);
+ for (i = 0; i < 16 && i < len; i++)
+ printf (" %02x", ((__u8 *) buffer) [i]);
+ printf ("%s\n", i < len? "...": "");
+ }
+ }
+#endif
+}
+
+/* just for debugging; prints non-empty branches of the int ed tree inclusive iso eds*/
+void ep_print_int_eds (ohci_t *ohci, char * str) {
+ int i, j;
+ __u32 * ed_p;
+ for (i= 0; i < 32; i++) {
+ j = 5;
+ ed_p = &(ohci->hcca->int_table [i]);
+ if (*ed_p == 0)
+ continue;
+ printf (__FILE__ ": %s branch int %2d(%2x):", str, i, i);
+ while (*ed_p != 0 && j--) {
+ ed_t *ed = (ed_t *)m32_swap(ed_p);
+ printf (" ed: %4x;", ed->hwINFO);
+ ed_p = &ed->hwNextED;
+ }
+ printf ("\n");
+ }
+}
+
+static void ohci_dump_intr_mask (char *label, __u32 mask)
+{
+ dbg ("%s: 0x%08x%s%s%s%s%s%s%s%s%s",
+ label,
+ mask,
+ (mask & OHCI_INTR_MIE) ? " MIE" : "",
+ (mask & OHCI_INTR_OC) ? " OC" : "",
+ (mask & OHCI_INTR_RHSC) ? " RHSC" : "",
+ (mask & OHCI_INTR_FNO) ? " FNO" : "",
+ (mask & OHCI_INTR_UE) ? " UE" : "",
+ (mask & OHCI_INTR_RD) ? " RD" : "",
+ (mask & OHCI_INTR_SF) ? " SF" : "",
+ (mask & OHCI_INTR_WDH) ? " WDH" : "",
+ (mask & OHCI_INTR_SO) ? " SO" : ""
+ );
+}
+
+static void maybe_print_eds (char *label, __u32 value)
+{
+ ed_t *edp = (ed_t *)value;
+
+ if (value) {
+ dbg ("%s %08x", label, value);
+ dbg ("%08x", edp->hwINFO);
+ dbg ("%08x", edp->hwTailP);
+ dbg ("%08x", edp->hwHeadP);
+ dbg ("%08x", edp->hwNextED);
+ }
+}
+
+static char * hcfs2string (int state)
+{
+ switch (state) {
+ case OHCI_USB_RESET: return "reset";
+ case OHCI_USB_RESUME: return "resume";
+ case OHCI_USB_OPER: return "operational";
+ case OHCI_USB_SUSPEND: return "suspend";
+ }
+ return "?";
+}
+
+/* dump control and status registers */
+static void ohci_dump_status (ohci_t *controller)
+{
+ struct ohci_regs *regs = controller->regs;
+ __u32 temp;
+
+ temp = readl (®s->revision) & 0xff;
+ if (temp != 0x10)
+ dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f));
+
+ temp = readl (®s->control);
+ dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp,
+ (temp & OHCI_CTRL_RWE) ? " RWE" : "",
+ (temp & OHCI_CTRL_RWC) ? " RWC" : "",
+ (temp & OHCI_CTRL_IR) ? " IR" : "",
+ hcfs2string (temp & OHCI_CTRL_HCFS),
+ (temp & OHCI_CTRL_BLE) ? " BLE" : "",
+ (temp & OHCI_CTRL_CLE) ? " CLE" : "",
+ (temp & OHCI_CTRL_IE) ? " IE" : "",
+ (temp & OHCI_CTRL_PLE) ? " PLE" : "",
+ temp & OHCI_CTRL_CBSR
+ );
+
+ temp = readl (®s->cmdstatus);
+ dbg ("cmdstatus: 0x%08x SOC=%d%s%s%s%s", temp,
+ (temp & OHCI_SOC) >> 16,
+ (temp & OHCI_OCR) ? " OCR" : "",
+ (temp & OHCI_BLF) ? " BLF" : "",
+ (temp & OHCI_CLF) ? " CLF" : "",
+ (temp & OHCI_HCR) ? " HCR" : ""
+ );
+
+ ohci_dump_intr_mask ("intrstatus", readl (®s->intrstatus));
+ ohci_dump_intr_mask ("intrenable", readl (®s->intrenable));
+
+ maybe_print_eds ("ed_periodcurrent", readl (®s->ed_periodcurrent));
+
+ maybe_print_eds ("ed_controlhead", readl (®s->ed_controlhead));
+ maybe_print_eds ("ed_controlcurrent", readl (®s->ed_controlcurrent));
+
+ maybe_print_eds ("ed_bulkhead", readl (®s->ed_bulkhead));
+ maybe_print_eds ("ed_bulkcurrent", readl (®s->ed_bulkcurrent));
+
+ maybe_print_eds ("donehead", readl (®s->donehead));
+}
+
+static void ohci_dump_roothub (ohci_t *controller, int verbose)
+{
+ __u32 temp, ndp, i;
+
+ temp = roothub_a (controller);
+ ndp = (temp & RH_A_NDP);
+#ifdef CONFIG_AT91C_PQFP_UHPBUG
+ ndp = (ndp == 2) ? 1:0;
+#endif
+ if (verbose) {
+ dbg ("roothub.a: %08x POTPGT=%d%s%s%s%s%s NDP=%d", temp,
+ ((temp & RH_A_POTPGT) >> 24) & 0xff,
+ (temp & RH_A_NOCP) ? " NOCP" : "",
+ (temp & RH_A_OCPM) ? " OCPM" : "",
+ (temp & RH_A_DT) ? " DT" : "",
+ (temp & RH_A_NPS) ? " NPS" : "",
+ (temp & RH_A_PSM) ? " PSM" : "",
+ ndp
+ );
+ temp = roothub_b (controller);
+ dbg ("roothub.b: %08x PPCM=%04x DR=%04x",
+ temp,
+ (temp & RH_B_PPCM) >> 16,
+ (temp & RH_B_DR)
+ );
+ temp = roothub_status (controller);
+ dbg ("roothub.status: %08x%s%s%s%s%s%s",
+ temp,
+ (temp & RH_HS_CRWE) ? " CRWE" : "",
+ (temp & RH_HS_OCIC) ? " OCIC" : "",
+ (temp & RH_HS_LPSC) ? " LPSC" : "",
+ (temp & RH_HS_DRWE) ? " DRWE" : "",
+ (temp & RH_HS_OCI) ? " OCI" : "",
+ (temp & RH_HS_LPS) ? " LPS" : ""
+ );
+ }
+
+ for (i = 0; i < ndp; i++) {
+ temp = roothub_portstatus (controller, i);
+ dbg ("roothub.portstatus [%d] = 0x%08x%s%s%s%s%s%s%s%s%s%s%s%s",
+ i,
+ temp,
+ (temp & RH_PS_PRSC) ? " PRSC" : "",
+ (temp & RH_PS_OCIC) ? " OCIC" : "",
+ (temp & RH_PS_PSSC) ? " PSSC" : "",
+ (temp & RH_PS_PESC) ? " PESC" : "",
+ (temp & RH_PS_CSC) ? " CSC" : "",
+
+ (temp & RH_PS_LSDA) ? " LSDA" : "",
+ (temp & RH_PS_PPS) ? " PPS" : "",
+ (temp & RH_PS_PRS) ? " PRS" : "",
+ (temp & RH_PS_POCI) ? " POCI" : "",
+ (temp & RH_PS_PSS) ? " PSS" : "",
+
+ (temp & RH_PS_PES) ? " PES" : "",
+ (temp & RH_PS_CCS) ? " CCS" : ""
+ );
+ }
+}
+
+static void ohci_dump (ohci_t *controller, int verbose)
+{
+ dbg ("OHCI controller usb-%s state", controller->slot_name);
+
+ /* dumps some of the state we know about */
+ ohci_dump_status (controller);
+ if (verbose)
+ ep_print_int_eds (controller, "hcca");
+ dbg ("hcca frame #%04x", controller->hcca->frame_no);
+ ohci_dump_roothub (controller, 1);
+
+#endif /* DEBUG */
+
+/*-------------------------------------------------------------------------*
+ * Interface functions (URB)
+ *-------------------------------------------------------------------------*/
+
+/* get a transfer request */
+
+int sohci_submit_job(urb_priv_t *urb, struct devrequest *setup)
+{
+ ohci_t *ohci;
+ ed_t * ed;
+ urb_priv_t *purb_priv = urb;
+ int i, size = 0;
+ struct usb_device *dev = urb->dev;
+ unsigned long pipe = urb->pipe;
+ void *buffer = urb->transfer_buffer;
+ int transfer_len = urb->transfer_buffer_length;
+ int interval = urb->interval;
+
+ ohci = &gohci;
+
+ /* when controller's hung, permit only roothub cleanup attempts
+ * such as powering down ports */
+ if (ohci->disabled) {
+ err("sohci_submit_job: EPIPE");
+ return -1;
+ }
+
+ /* we're about to begin a new transaction here so mark the URB unfinished */
+ urb->finished = 0;
+
+ /* every endpoint has a ed, locate and fill it */
+ if (!(ed = ep_add_ed (dev, pipe, interval, 1))) {
+ err("sohci_submit_job: ENOMEM");
+ return -1;
+ }
+
+ /* for the private part of the URB we need the number of TDs (size) */
+ switch (usb_pipetype (pipe)) {
+ case PIPE_BULK: /* one TD for every 4096 Byte */
+ size = (transfer_len - 1) / 4096 + 1;
+ break;
+ case PIPE_CONTROL: /* 1 TD for setup, 1 for ACK and 1 for every 4096 B */
+ size = (transfer_len == 0)? 2:
+ (transfer_len - 1) / 4096 + 3;
+ break;
+ case PIPE_INTERRUPT: /* 1 TD */
+ size = 1;
+ break;
+ }
+
+ ed->purb = urb;
+
+ if (size >= (N_URB_TD - 1)) {
+ err("need %d TDs, only have %d", size, N_URB_TD);
+ return -1;
+ }
+ purb_priv->pipe = pipe;
+
+ /* fill the private part of the URB */
+ purb_priv->length = size;
+ purb_priv->ed = ed;
+ purb_priv->actual_length = 0;
+
+ /* allocate the TDs */
+ /* note that td[0] was allocated in ep_add_ed */
+ for (i = 0; i < size; i++) {
+ purb_priv->td[i] = td_alloc (dev);
+ if (!purb_priv->td[i]) {
+ purb_priv->length = i;
+ urb_free_priv (purb_priv);
+ err("sohci_submit_job: ENOMEM");
+ return -1;
+ }
+ }
+
+ if (ed->state == ED_NEW || (ed->state & ED_DEL)) {
+ urb_free_priv (purb_priv);
+ err("sohci_submit_job: EINVAL");
+ return -1;
+ }
+
+ /* link the ed into a chain if is not already */
+ if (ed->state != ED_OPER)
+ ep_link (ohci, ed);
+
+ /* fill the TDs and link it to the ed */
+ td_submit_job(dev, pipe, buffer, transfer_len, setup, purb_priv, interval);
+
+ return 0;
+}
+
+static inline int sohci_return_job(struct ohci *hc, urb_priv_t *urb)
+{
+ struct ohci_regs *regs = hc->regs;
+
+ switch (usb_pipetype (urb->pipe)) {
+ case PIPE_INTERRUPT:
+ /* implicitly requeued */
+ if (urb->dev->irq_handle &&
+ (urb->dev->irq_act_len = urb->actual_length)) {
+ writel (OHCI_INTR_WDH, ®s->intrenable);
+ readl (®s->intrenable); /* PCI posting flush */
+ urb->dev->irq_handle(urb->dev);
+ writel (OHCI_INTR_WDH, ®s->intrdisable);
+ readl (®s->intrdisable); /* PCI posting flush */
+ }
+ urb->actual_length = 0;
+ td_submit_job (
+ urb->dev,
+ urb->pipe,
+ urb->transfer_buffer,
+ urb->transfer_buffer_length,
+ NULL,
+ urb,
+ urb->interval);
+ break;
+ case PIPE_CONTROL:
+ case PIPE_BULK:
+ break;
+ default:
+ return 0;
+ }
+ return 1;
+}
+
+/*-------------------------------------------------------------------------*/
+
+#ifdef DEBUG
+/* tell us the current USB frame number */
+
+static int sohci_get_current_frame_number (struct usb_device *usb_dev)
+{
+ ohci_t *ohci = &gohci;
+
+ return m16_swap (ohci->hcca->frame_no);
+}
+#endif
+
+/*-------------------------------------------------------------------------*
+ * ED handling functions
+ *-------------------------------------------------------------------------*/
+
+/* search for the right branch to insert an interrupt ed into the int tree
+ * do some load ballancing;
+ * returns the branch and
+ * sets the interval to interval = 2^integer (ld (interval)) */
+
+static int ep_int_ballance (ohci_t * ohci, int interval, int load)
+{
+ int i, branch = 0;
+
+ /* search for the least loaded interrupt endpoint
+ * branch of all 32 branches
+ */
+ for (i = 0; i < 32; i++)
+ if (ohci->ohci_int_load [branch] > ohci->ohci_int_load [i])
+ branch = i;
+
+ branch = branch % interval;
+ for (i = branch; i < 32; i += interval)
+ ohci->ohci_int_load [i] += load;
+
+ return branch;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* 2^int( ld (inter)) */
+
+static int ep_2_n_interval (int inter)
+{
+ int i;
+ for (i = 0; ((inter >> i) > 1 ) && (i < 5); i++);
+ return 1 << i;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* the int tree is a binary tree
+ * in order to process it sequentially the indexes of the branches have to be mapped
+ * the mapping reverses the bits of a word of num_bits length */
+
+static int ep_rev (int num_bits, int word)
+{
+ int i, wout = 0;
+
+ for (i = 0; i < num_bits; i++)
+ wout |= (((word >> i) & 1) << (num_bits - i - 1));
+ return wout;
+}
+
+/*-------------------------------------------------------------------------*
+ * ED handling functions
+ *-------------------------------------------------------------------------*/
+
+/* link an ed into one of the HC chains */
+
+static int ep_link (ohci_t *ohci, ed_t *edi)
+{
+ volatile ed_t *ed = edi;
+ int int_branch;
+ int i;
+ int inter;
+ int interval;
+ int load;
+ __u32 * ed_p;
+
+ ed->state = ED_OPER;
+ ed->int_interval = 0;
+
+ switch (ed->type) {
+ case PIPE_CONTROL:
+ ed->hwNextED = 0;
+ if (ohci->ed_controltail == NULL) {
+ writel (ed, &ohci->regs->ed_controlhead);
+ } else {
+ ohci->ed_controltail->hwNextED = m32_swap ((unsigned long)ed);
+ }
+ ed->ed_prev = ohci->ed_controltail;
+ if (!ohci->ed_controltail && !ohci->ed_rm_list[0] &&
+ !ohci->ed_rm_list[1] && !ohci->sleeping) {
+ ohci->hc_control |= OHCI_CTRL_CLE;
+ writel (ohci->hc_control, &ohci->regs->control);
+ }
+ ohci->ed_controltail = edi;
+ break;
+
+ case PIPE_BULK:
+ ed->hwNextED = 0;
+ if (ohci->ed_bulktail == NULL) {
+ writel (ed, &ohci->regs->ed_bulkhead);
+ } else {
+ ohci->ed_bulktail->hwNextED = m32_swap ((unsigned long)ed);
+ }
+ ed->ed_prev = ohci->ed_bulktail;
+ if (!ohci->ed_bulktail && !ohci->ed_rm_list[0] &&
+ !ohci->ed_rm_list[1] && !ohci->sleeping) {
+ ohci->hc_control |= OHCI_CTRL_BLE;
+ writel (ohci->hc_control, &ohci->regs->control);
+ }
+ ohci->ed_bulktail = edi;
+ break;
+
+ case PIPE_INTERRUPT:
+ load = ed->int_load;
+ interval = ep_2_n_interval (ed->int_period);
+ ed->int_interval = interval;
+ int_branch = ep_int_ballance (ohci, interval, load);
+ ed->int_branch = int_branch;
+
+ for (i = 0; i < ep_rev (6, interval); i += inter) {
+ inter = 1;
+ for (ed_p = &(ohci->hcca->int_table[ep_rev (5, i) + int_branch]);
+ (*ed_p != 0) && (((ed_t *)ed_p)->int_interval >= interval);
+ ed_p = &(((ed_t *)ed_p)->hwNextED))
+ inter = ep_rev (6, ((ed_t *)ed_p)->int_interval);
+ ed->hwNextED = *ed_p;
+ *ed_p = m32_swap((unsigned long)ed);
+ }
+ break;
+ }
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* scan the periodic table to find and unlink this ED */
+static void periodic_unlink ( struct ohci *ohci, volatile struct ed *ed,
+ unsigned index, unsigned period)
+{
+ for (; index < NUM_INTS; index += period) {
+ __u32 *ed_p = &ohci->hcca->int_table [index];
+
+ /* ED might have been unlinked through another path */
+ while (*ed_p != 0) {
+ if (((struct ed *)m32_swap ((unsigned long)ed_p)) == ed) {
+ *ed_p = ed->hwNextED;
+ break;
+ }
+ ed_p = & (((struct ed *)m32_swap ((unsigned long)ed_p))->hwNextED);
+ }
+ }
+}
+
+/* unlink an ed from one of the HC chains.
+ * just the link to the ed is unlinked.
+ * the link from the ed still points to another operational ed or 0
+ * so the HC can eventually finish the processing of the unlinked ed */
+
+static int ep_unlink (ohci_t *ohci, ed_t *edi)
+{
+ volatile ed_t *ed = edi;
+ int i;
+
+ ed->hwINFO |= m32_swap (OHCI_ED_SKIP);
+
+ switch (ed->type) {
+ case PIPE_CONTROL:
+ if (ed->ed_prev == NULL) {
+ if (!ed->hwNextED) {
+ ohci->hc_control &= ~OHCI_CTRL_CLE;
+ writel (ohci->hc_control, &ohci->regs->control);
+ }
+ writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_controlhead);
+ } else {
+ ed->ed_prev->hwNextED = ed->hwNextED;
+ }
+ if (ohci->ed_controltail == ed) {
+ ohci->ed_controltail = ed->ed_prev;
+ } else {
+ ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
+ }
+ break;
+
+ case PIPE_BULK:
+ if (ed->ed_prev == NULL) {
+ if (!ed->hwNextED) {
+ ohci->hc_control &= ~OHCI_CTRL_BLE;
+ writel (ohci->hc_control, &ohci->regs->control);
+ }
+ writel (m32_swap (*((__u32 *)&ed->hwNextED)), &ohci->regs->ed_bulkhead);
+ } else {
+ ed->ed_prev->hwNextED = ed->hwNextED;
+ }
+ if (ohci->ed_bulktail == ed) {
+ ohci->ed_bulktail = ed->ed_prev;
+ } else {
+ ((ed_t *)m32_swap (*((__u32 *)&ed->hwNextED)))->ed_prev = ed->ed_prev;
+ }
+ break;
+
+ case PIPE_INTERRUPT:
+ periodic_unlink (ohci, ed, 0, 1);
+ for (i = ed->int_branch; i < 32; i += ed->int_interval)
+ ohci->ohci_int_load[i] -= ed->int_load;
+ break;
+ }
+ ed->state = ED_UNLINK;
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* add/reinit an endpoint; this should be done once at the
+ * usb_set_configuration command, but the USB stack is a little bit
+ * stateless so we do it at every transaction if the state of the ed
+ * is ED_NEW then a dummy td is added and the state is changed to
+ * ED_UNLINK in all other cases the state is left unchanged the ed
+ * info fields are setted anyway even though most of them should not
+ * change
+ */
+static ed_t * ep_add_ed (struct usb_device *usb_dev, unsigned long pipe,
+ int interval, int load)
+{
+ td_t *td;
+ ed_t *ed_ret;
+ volatile ed_t *ed;
+
+ ed = ed_ret = &ohci_dev.ed[(usb_pipeendpoint (pipe) << 1) |
+ (usb_pipecontrol (pipe)? 0: usb_pipeout (pipe))];
+
+ if ((ed->state & ED_DEL) || (ed->state & ED_URB_DEL)) {
+ err("ep_add_ed: pending delete");
+ /* pending delete request */
+ return NULL;
+ }
+
+ if (ed->state == ED_NEW) {
+ ed->hwINFO = m32_swap (OHCI_ED_SKIP); /* skip ed */
+ /* dummy td; end of td list for ed */
+ td = td_alloc (usb_dev);
+ ed->hwTailP = m32_swap ((unsigned long)td);
+ ed->hwHeadP = ed->hwTailP;
+ ed->state = ED_UNLINK;
+ ed->type = usb_pipetype (pipe);
+ ohci_dev.ed_cnt++;
+ }
+
+ ed->hwINFO = m32_swap (usb_pipedevice (pipe)
+ | usb_pipeendpoint (pipe) << 7
+ | (usb_pipeisoc (pipe)? 0x8000: 0)
+ | (usb_pipecontrol (pipe)? 0: (usb_pipeout (pipe)? 0x800: 0x1000))
+ | usb_pipeslow (pipe) << 13
+ | usb_maxpacket (usb_dev, pipe) << 16);
+
+ if (ed->type == PIPE_INTERRUPT && ed->state == ED_UNLINK) {
+ ed->int_period = interval;
+ ed->int_load = load;
+ }
+
+ return ed_ret;
+}
+
+/*-------------------------------------------------------------------------*
+ * TD handling functions
+ *-------------------------------------------------------------------------*/
+
+/* enqueue next TD for this URB (OHCI spec 5.2.8.2) */
+
+static void td_fill (ohci_t *ohci, unsigned int info,
+ void *data, int len,
+ struct usb_device *dev, int index, urb_priv_t *urb_priv)
+{
+ volatile td_t *td, *td_pt;
+#ifdef OHCI_FILL_TRACE
+ int i;
+#endif
+
+ if (index > urb_priv->length) {
+ err("index > length");
+ return;
+ }
+ /* use this td as the next dummy */
+ td_pt = urb_priv->td [index];
+ td_pt->hwNextTD = 0;
+
+ /* fill the old dummy TD */
+ td = urb_priv->td [index] = (td_t *)(m32_swap (urb_priv->ed->hwTailP) & ~0xf);
+
+ td->ed = urb_priv->ed;
+ td->next_dl_td = NULL;
+ td->index = index;
+ td->data = (__u32)data;
+#ifdef OHCI_FILL_TRACE
+ if ((usb_pipetype(urb_priv->pipe) == PIPE_BULK) && usb_pipeout(urb_priv->pipe)) {
+ for (i = 0; i < len; i++)
+ printf("td->data[%d] %#2x ",i, ((unsigned char *)td->data)[i]);
+ printf("\n");
+ }
+#endif
+ if (!len)
+ data = 0;
+
+ td->hwINFO = m32_swap (info);
+ td->hwCBP = m32_swap ((unsigned long)data);
+ if (data)
+ td->hwBE = m32_swap ((unsigned long)(data + len - 1));
+ else
+ td->hwBE = 0;
+ td->hwNextTD = m32_swap ((unsigned long)td_pt);
+
+ /* append to queue */
+ td->ed->hwTailP = td->hwNextTD;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* prepare all TDs of a transfer */
+
+static void td_submit_job (struct usb_device *dev, unsigned long pipe, void *buffer,
+ int transfer_len, struct devrequest *setup, urb_priv_t *urb, int interval)
+{
+ ohci_t *ohci = &gohci;
+ int data_len = transfer_len;
+ void *data;
+ int cnt = 0;
+ __u32 info = 0;
+ unsigned int toggle = 0;
+
+ /* OHCI handles the DATA-toggles itself, we just use the USB-toggle bits for reseting */
+ if(usb_gettoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe))) {
+ toggle = TD_T_TOGGLE;
+ } else {
+ toggle = TD_T_DATA0;
+ usb_settoggle(dev, usb_pipeendpoint(pipe), usb_pipeout(pipe), 1);
+ }
+ urb->td_cnt = 0;
+ if (data_len)
+ data = buffer;
+ else
+ data = 0;
+
+ switch (usb_pipetype (pipe)) {
+ case PIPE_BULK:
+ info = usb_pipeout (pipe)?
+ TD_CC | TD_DP_OUT : TD_CC | TD_DP_IN ;
+ while(data_len > 4096) {
+ td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, 4096, dev, cnt, urb);
+ data += 4096; data_len -= 4096; cnt++;
+ }
+ info = usb_pipeout (pipe)?
+ TD_CC | TD_DP_OUT : TD_CC | TD_R | TD_DP_IN ;
+ td_fill (ohci, info | (cnt? TD_T_TOGGLE:toggle), data, data_len, dev, cnt, urb);
+ cnt++;
+
+ if (!ohci->sleeping)
+ writel (OHCI_BLF, &ohci->regs->cmdstatus); /* start bulk list */
+ break;
+
+ case PIPE_CONTROL:
+ info = TD_CC | TD_DP_SETUP | TD_T_DATA0;
+ td_fill (ohci, info, setup, 8, dev, cnt++, urb);
+ if (data_len > 0) {
+ info = usb_pipeout (pipe)?
+ TD_CC | TD_R | TD_DP_OUT | TD_T_DATA1 : TD_CC | TD_R | TD_DP_IN | TD_T_DATA1;
+ /* NOTE: mishandles transfers >8K, some >4K */
+ td_fill (ohci, info, data, data_len, dev, cnt++, urb);
+ }
+ info = usb_pipeout (pipe)?
+ TD_CC | TD_DP_IN | TD_T_DATA1: TD_CC | TD_DP_OUT | TD_T_DATA1;
+ td_fill (ohci, info, data, 0, dev, cnt++, urb);
+ if (!ohci->sleeping)
+ writel (OHCI_CLF, &ohci->regs->cmdstatus); /* start Control list */
+ break;
+
+ case PIPE_INTERRUPT:
+ info = usb_pipeout (urb->pipe)?
+ TD_CC | TD_DP_OUT | toggle:
+ TD_CC | TD_R | TD_DP_IN | toggle;
+ td_fill (ohci, info, data, data_len, dev, cnt++, urb);
+ break;
+ }
+ if (urb->length != cnt)
+ dbg("TD LENGTH %d != CNT %d", urb->length, cnt);
+}
+
+/*-------------------------------------------------------------------------*
+ * Done List handling functions
+ *-------------------------------------------------------------------------*/
+
+/* calculate the transfer length and update the urb */
+
+static void dl_transfer_length(td_t * td)
+{
+ __u32 tdINFO, tdBE, tdCBP;
+ urb_priv_t *lurb_priv = td->ed->purb;
+
+ tdINFO = m32_swap (td->hwINFO);
+ tdBE = m32_swap (td->hwBE);
+ tdCBP = m32_swap (td->hwCBP);
+
+ if (!(usb_pipetype (lurb_priv->pipe) == PIPE_CONTROL &&
+ ((td->index == 0) || (td->index == lurb_priv->length - 1)))) {
+ if (tdBE != 0) {
+ if (td->hwCBP == 0)
+ lurb_priv->actual_length += tdBE - td->data + 1;
+ else
+ lurb_priv->actual_length += tdCBP - td->data;
+ }
+ }
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* replies to the request have to be on a FIFO basis so
+ * we reverse the reversed done-list */
+
+static td_t * dl_reverse_done_list (ohci_t *ohci)
+{
+ __u32 td_list_hc;
+ td_t *td_rev = NULL;
+ td_t *td_list = NULL;
+ urb_priv_t *lurb_priv = NULL;
+
+ td_list_hc = m32_swap (ohci->hcca->done_head) & 0xfffffff0;
+ ohci->hcca->done_head = 0;
+
+ while (td_list_hc) {
+ td_list = (td_t *)td_list_hc;
+
+ if (TD_CC_GET (m32_swap (td_list->hwINFO))) {
+ lurb_priv = td_list->ed->purb;
+ dbg(" USB-error/status: %x : %p",
+ TD_CC_GET (m32_swap (td_list->hwINFO)), td_list);
+ if (td_list->ed->hwHeadP & m32_swap (0x1)) {
+ if (lurb_priv && ((td_list->index + 1) < lurb_priv->length)) {
+ td_list->ed->hwHeadP =
+ (lurb_priv->td[lurb_priv->length - 1]->hwNextTD & m32_swap (0xfffffff0)) |
+ (td_list->ed->hwHeadP & m32_swap (0x2));
+ lurb_priv->td_cnt += lurb_priv->length - td_list->index - 1;
+ } else
+ td_list->ed->hwHeadP &= m32_swap (0xfffffff2);
+ }
+#ifdef CONFIG_MPC5200
+ td_list->hwNextTD = 0;
+#endif
+ }
+
+ td_list->next_dl_td = td_rev;
+ td_rev = td_list;
+ td_list_hc = m32_swap (td_list->hwNextTD) & 0xfffffff0;
+ }
+ return td_list;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* td done list */
+static int dl_done_list (ohci_t *ohci, td_t *td_list)
+{
+ td_t *td_list_next = NULL;
+ ed_t *ed;
+ int cc = 0;
+ int stat = 0;
+ /* urb_t *urb; */
+ urb_priv_t *lurb_priv;
+ __u32 tdINFO, edHeadP, edTailP;
+
+ while (td_list) {
+ td_list_next = td_list->next_dl_td;
+
+ tdINFO = m32_swap (td_list->hwINFO);
+
+ ed = td_list->ed;
+ lurb_priv = ed->purb;
+
+ dl_transfer_length(td_list);
+
+ /* error code of transfer */
+ cc = TD_CC_GET (tdINFO);
+ if (cc != 0) {
+ dbg("ConditionCode %#x", cc);
+ stat = cc_to_error[cc];
+ }
+
+ /* see if this done list makes for all TD's of current URB,
+ * and mark the URB finished if so */
+ if (++(lurb_priv->td_cnt) == lurb_priv->length) {
+#if 1
+ if ((ed->state & (ED_OPER | ED_UNLINK)) &&
+ (lurb_priv->state != URB_DEL))
+#else
+ if ((ed->state & (ED_OPER | ED_UNLINK)))
+#endif
+ lurb_priv->finished = sohci_return_job(ohci,
+ lurb_priv);
+ else
+ dbg("dl_done_list: strange.., ED state %x, ed->state\n");
+ } else
+ dbg("dl_done_list: processing TD %x, len %x\n", lurb_priv->td_cnt,
+ lurb_priv->length);
+ if (ed->state != ED_NEW &&
+ (usb_pipetype (lurb_priv->pipe) != PIPE_INTERRUPT)) {
+ edHeadP = m32_swap (ed->hwHeadP) & 0xfffffff0;
+ edTailP = m32_swap (ed->hwTailP);
+
+ /* unlink eds if they are not busy */
+ if ((edHeadP == edTailP) && (ed->state == ED_OPER))
+ ep_unlink (ohci, ed);
+ }
+
+ td_list = td_list_next;
+ }
+ return stat;
+}
+
+/*-------------------------------------------------------------------------*
+ * Virtual Root Hub
+ *-------------------------------------------------------------------------*/
+
+/* Device descriptor */
+static __u8 root_hub_dev_des[] =
+{
+ 0x12, /* __u8 bLength; */
+ 0x01, /* __u8 bDescriptorType; Device */
+ 0x10, /* __u16 bcdUSB; v1.1 */
+ 0x01,
+ 0x09, /* __u8 bDeviceClass; HUB_CLASSCODE */
+ 0x00, /* __u8 bDeviceSubClass; */
+ 0x00, /* __u8 bDeviceProtocol; */
+ 0x08, /* __u8 bMaxPacketSize0; 8 Bytes */
+ 0x00, /* __u16 idVendor; */
+ 0x00,
+ 0x00, /* __u16 idProduct; */
+ 0x00,
+ 0x00, /* __u16 bcdDevice; */
+ 0x00,
+ 0x00, /* __u8 iManufacturer; */
+ 0x01, /* __u8 iProduct; */
+ 0x00, /* __u8 iSerialNumber; */
+ 0x01 /* __u8 bNumConfigurations; */
+};
+
+/* Configuration descriptor */
+static __u8 root_hub_config_des[] =
+{
+ 0x09, /* __u8 bLength; */
+ 0x02, /* __u8 bDescriptorType; Configuration */
+ 0x19, /* __u16 wTotalLength; */
+ 0x00,
+ 0x01, /* __u8 bNumInterfaces; */
+ 0x01, /* __u8 bConfigurationValue; */
+ 0x00, /* __u8 iConfiguration; */
+ 0x40, /* __u8 bmAttributes;
+ Bit 7: Bus-powered, 6: Self-powered, 5 Remote-wakwup, 4..0: resvd */
+ 0x00, /* __u8 MaxPower; */
+
+ /* interface */
+ 0x09, /* __u8 if_bLength; */
+ 0x04, /* __u8 if_bDescriptorType; Interface */
+ 0x00, /* __u8 if_bInterfaceNumber; */
+ 0x00, /* __u8 if_bAlternateSetting; */
+ 0x01, /* __u8 if_bNumEndpoints; */
+ 0x09, /* __u8 if_bInterfaceClass; HUB_CLASSCODE */
+ 0x00, /* __u8 if_bInterfaceSubClass; */
+ 0x00, /* __u8 if_bInterfaceProtocol; */
+ 0x00, /* __u8 if_iInterface; */
+
+ /* endpoint */
+ 0x07, /* __u8 ep_bLength; */
+ 0x05, /* __u8 ep_bDescriptorType; Endpoint */
+ 0x81, /* __u8 ep_bEndpointAddress; IN Endpoint 1 */
+ 0x03, /* __u8 ep_bmAttributes; Interrupt */
+ 0x02, /* __u16 ep_wMaxPacketSize; ((MAX_ROOT_PORTS + 1) / 8 */
+ 0x00,
+ 0xff /* __u8 ep_bInterval; 255 ms */
+};
+
+static unsigned char root_hub_str_index0[] =
+{
+ 0x04, /* __u8 bLength; */
+ 0x03, /* __u8 bDescriptorType; String-descriptor */
+ 0x09, /* __u8 lang ID */
+ 0x04, /* __u8 lang ID */
+};
+
+static unsigned char root_hub_str_index1[] =
+{
+ 28, /* __u8 bLength; */
+ 0x03, /* __u8 bDescriptorType; String-descriptor */
+ 'O', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'H', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'C', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'I', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ ' ', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'R', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'o', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'o', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 't', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ ' ', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'H', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'u', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+ 'b', /* __u8 Unicode */
+ 0, /* __u8 Unicode */
+};
+
+/* Hub class-specific descriptor is constructed dynamically */
+
+/*-------------------------------------------------------------------------*/
+
+#define OK(x) len = (x); break
+#ifdef DEBUG
+#define WR_RH_STAT(x) {info("WR:status %#8x", (x));writel((x), &gohci.regs->roothub.status);}
+#define WR_RH_PORTSTAT(x) {info("WR:portstatus[%d] %#8x", wIndex-1, (x));writel((x), &gohci.regs->roothub.portstatus[wIndex-1]);}
+#else
+#define WR_RH_STAT(x) writel((x), &gohci.regs->roothub.status)
+#define WR_RH_PORTSTAT(x) writel((x), &gohci.regs->roothub.portstatus[wIndex-1])
+#endif
+#define RD_RH_STAT roothub_status(&gohci)
+#define RD_RH_PORTSTAT roothub_portstatus(&gohci,wIndex-1)
+
+/* request to virtual root hub */
+
+int rh_check_port_status(ohci_t *controller)
+{
+ __u32 temp, ndp, i;
+ int res;
+
+ res = -1;
+ temp = roothub_a (controller);
+ ndp = (temp & RH_A_NDP);
+#ifdef CONFIG_AT91C_PQFP_UHPBUG
+ ndp = (ndp == 2) ? 1:0;
+#endif
+ for (i = 0; i < ndp; i++) {
+ temp = roothub_portstatus (controller, i);
+ /* check for a device disconnect */
+ if (((temp & (RH_PS_PESC | RH_PS_CSC)) ==
+ (RH_PS_PESC | RH_PS_CSC)) &&
+ ((temp & RH_PS_CCS) == 0)) {
+ res = i;
+ break;
+ }
+ }
+ return res;
+}
+
+static int ohci_submit_rh_msg(struct usb_device *dev, unsigned long pipe,
+ void *buffer, int transfer_len, struct devrequest *cmd)
+{
+ void * data = buffer;
+ int leni = transfer_len;
+ int len = 0;
+ int stat = 0;
+ __u32 datab[4];
+ __u8 *data_buf = (__u8 *)datab;
+ __u16 bmRType_bReq;
+ __u16 wValue;
+ __u16 wIndex;
+ __u16 wLength;
+
+#ifdef DEBUG
+pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "SUB(rh)", usb_pipein(pipe));
+#else
+ wait_ms(1);
+#endif
+ if ((pipe & PIPE_INTERRUPT) == PIPE_INTERRUPT) {
+ info("Root-Hub submit IRQ: NOT implemented");
+ return 0;
+ }
+
+ bmRType_bReq = cmd->requesttype | (cmd->request << 8);
+ wValue = cpu_to_le16 (cmd->value);
+ wIndex = cpu_to_le16 (cmd->index);
+ wLength = cpu_to_le16 (cmd->length);
+
+ info("Root-Hub: adr: %2x cmd(%1x): %08x %04x %04x %04x",
+ dev->devnum, 8, bmRType_bReq, wValue, wIndex, wLength);
+
+ switch (bmRType_bReq) {
+ /* Request Destination:
+ without flags: Device,
+ RH_INTERFACE: interface,
+ RH_ENDPOINT: endpoint,
+ RH_CLASS means HUB here,
+ RH_OTHER | RH_CLASS almost ever means HUB_PORT here
+ */
+
+ case RH_GET_STATUS:
+ *(__u16 *) data_buf = cpu_to_le16 (1); OK (2);
+ case RH_GET_STATUS | RH_INTERFACE:
+ *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
+ case RH_GET_STATUS | RH_ENDPOINT:
+ *(__u16 *) data_buf = cpu_to_le16 (0); OK (2);
+ case RH_GET_STATUS | RH_CLASS:
+ *(__u32 *) data_buf = cpu_to_le32 (
+ RD_RH_STAT & ~(RH_HS_CRWE | RH_HS_DRWE));
+ OK (4);
+ case RH_GET_STATUS | RH_OTHER | RH_CLASS:
+ *(__u32 *) data_buf = cpu_to_le32 (RD_RH_PORTSTAT); OK (4);
+
+ case RH_CLEAR_FEATURE | RH_ENDPOINT:
+ switch (wValue) {
+ case (RH_ENDPOINT_STALL): OK (0);
+ }
+ break;
+
+ case RH_CLEAR_FEATURE | RH_CLASS:
+ switch (wValue) {
+ case RH_C_HUB_LOCAL_POWER:
+ OK(0);
+ case (RH_C_HUB_OVER_CURRENT):
+ WR_RH_STAT(RH_HS_OCIC); OK (0);
+ }
+ break;
+
+ case RH_CLEAR_FEATURE | RH_OTHER | RH_CLASS:
+ switch (wValue) {
+ case (RH_PORT_ENABLE):
+ WR_RH_PORTSTAT (RH_PS_CCS ); OK (0);
+ case (RH_PORT_SUSPEND):
+ WR_RH_PORTSTAT (RH_PS_POCI); OK (0);
+ case (RH_PORT_POWER):
+ WR_RH_PORTSTAT (RH_PS_LSDA); OK (0);
+ case (RH_C_PORT_CONNECTION):
+ WR_RH_PORTSTAT (RH_PS_CSC ); OK (0);
+ case (RH_C_PORT_ENABLE):
+ WR_RH_PORTSTAT (RH_PS_PESC); OK (0);
+ case (RH_C_PORT_SUSPEND):
+ WR_RH_PORTSTAT (RH_PS_PSSC); OK (0);
+ case (RH_C_PORT_OVER_CURRENT):
+ WR_RH_PORTSTAT (RH_PS_OCIC); OK (0);
+ case (RH_C_PORT_RESET):
+ WR_RH_PORTSTAT (RH_PS_PRSC); OK (0);
+ }
+ break;
+
+ case RH_SET_FEATURE | RH_OTHER | RH_CLASS:
+ switch (wValue) {
+ case (RH_PORT_SUSPEND):
+ WR_RH_PORTSTAT (RH_PS_PSS ); OK (0);
+ case (RH_PORT_RESET): /* BUG IN HUP CODE *********/
+ if (RD_RH_PORTSTAT & RH_PS_CCS)
+ WR_RH_PORTSTAT (RH_PS_PRS);
+ OK (0);
+ case (RH_PORT_POWER):
+ WR_RH_PORTSTAT (RH_PS_PPS );
+ wait_ms(100);
+ OK (0);
+ case (RH_PORT_ENABLE): /* BUG IN HUP CODE *********/
+ if (RD_RH_PORTSTAT & RH_PS_CCS)
+ WR_RH_PORTSTAT (RH_PS_PES );
+ OK (0);
+ }
+ break;
+
+ case RH_SET_ADDRESS: gohci.rh.devnum = wValue; OK(0);
+
+ case RH_GET_DESCRIPTOR:
+ switch ((wValue & 0xff00) >> 8) {
+ case (0x01): /* device descriptor */
+ len = min_t(unsigned int,
+ leni,
+ min_t(unsigned int,
+ sizeof (root_hub_dev_des),
+ wLength));
+ data_buf = root_hub_dev_des; OK(len);
+ case (0x02): /* configuration descriptor */
+ len = min_t(unsigned int,
+ leni,
+ min_t(unsigned int,
+ sizeof (root_hub_config_des),
+ wLength));
+ data_buf = root_hub_config_des; OK(len);
+ case (0x03): /* string descriptors */
+ if(wValue==0x0300) {
+ len = min_t(unsigned int,
+ leni,
+ min_t(unsigned int,
+ sizeof (root_hub_str_index0),
+ wLength));
+ data_buf = root_hub_str_index0;
+ OK(len);
+ }
+ if(wValue==0x0301) {
+ len = min_t(unsigned int,
+ leni,
+ min_t(unsigned int,
+ sizeof (root_hub_str_index1),
+ wLength));
+ data_buf = root_hub_str_index1;
+ OK(len);
+ }
+ default:
+ stat = USB_ST_STALLED;
+ }
+ break;
+
+ case RH_GET_DESCRIPTOR | RH_CLASS:
+ {
+ __u32 temp = roothub_a (&gohci);
+
+ data_buf [0] = 9; /* min length; */
+ data_buf [1] = 0x29;
+ data_buf [2] = temp & RH_A_NDP;
+#ifdef CONFIG_AT91C_PQFP_UHPBUG
+ data_buf [2] = (data_buf [2] == 2) ? 1:0;
+#endif
+ data_buf [3] = 0;
+ if (temp & RH_A_PSM) /* per-port power switching? */
+ data_buf [3] |= 0x1;
+ if (temp & RH_A_NOCP) /* no overcurrent reporting? */
+ data_buf [3] |= 0x10;
+ else if (temp & RH_A_OCPM) /* per-port overcurrent reporting? */
+ data_buf [3] |= 0x8;
+
+ /* corresponds to data_buf[4-7] */
+ datab [1] = 0;
+ data_buf [5] = (temp & RH_A_POTPGT) >> 24;
+ temp = roothub_b (&gohci);
+ data_buf [7] = temp & RH_B_DR;
+ if (data_buf [2] < 7) {
+ data_buf [8] = 0xff;
+ } else {
+ data_buf [0] += 2;
+ data_buf [8] = (temp & RH_B_DR) >> 8;
+ data_buf [10] = data_buf [9] = 0xff;
+ }
+
+ len = min_t(unsigned int, leni,
+ min_t(unsigned int, data_buf [0], wLength));
+ OK (len);
+ }
+
+ case RH_GET_CONFIGURATION: *(__u8 *) data_buf = 0x01; OK (1);
+
+ case RH_SET_CONFIGURATION: WR_RH_STAT (0x10000); OK (0);
+
+ default:
+ dbg ("unsupported root hub command");
+ stat = USB_ST_STALLED;
+ }
+
+#ifdef DEBUG
+ ohci_dump_roothub (&gohci, 1);
+#else
+ wait_ms(1);
+#endif
+
+ len = min_t(int, len, leni);
+ if (data != data_buf)
+ memcpy (data, data_buf, len);
+ dev->act_len = len;
+ dev->status = stat;
+
+#ifdef DEBUG
+ pkt_print(NULL, dev, pipe, buffer, transfer_len, cmd, "RET(rh)", 0/*usb_pipein(pipe)*/);
+#else
+ wait_ms(1);
+#endif
+
+ return stat;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* common code for handling submit messages - used for all but root hub */
+/* accesses. */
+int submit_common_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int transfer_len, struct devrequest *setup, int interval)
+{
+ int stat = 0;
+ int maxsize = usb_maxpacket(dev, pipe);
+ int timeout;
+ urb_priv_t *urb;
+
+ urb = malloc(sizeof(urb_priv_t));
+ memset(urb, 0, sizeof(urb_priv_t));
+
+ urb->dev = dev;
+ urb->pipe = pipe;
+ urb->transfer_buffer = buffer;
+ urb->transfer_buffer_length = transfer_len;
+ urb->interval = interval;
+
+ /* device pulled? Shortcut the action. */
+ if (devgone == dev) {
+ dev->status = USB_ST_CRC_ERR;
+ return 0;
+ }
+
+#ifdef DEBUG
+ urb->actual_length = 0;
+ pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
+#else
+ wait_ms(1);
+#endif
+ if (!maxsize) {
+ err("submit_common_message: pipesize for pipe %lx is zero",
+ pipe);
+ return -1;
+ }
+
+ if (sohci_submit_job(urb, setup) < 0) {
+ err("sohci_submit_job failed");
+ return -1;
+ }
+
+#if 0
+ wait_ms(10);
+ /* ohci_dump_status(&gohci); */
+#endif
+
+ /* allow more time for a BULK device to react - some are slow */
+#define BULK_TO 5000 /* timeout in milliseconds */
+ if (usb_pipetype (pipe) == PIPE_BULK)
+ timeout = BULK_TO;
+ else
+ timeout = 100;
+
+ /* wait for it to complete */
+ for (;;) {
+ /* check whether the controller is done */
+ stat = hc_interrupt();
+ if (stat < 0) {
+ stat = USB_ST_CRC_ERR;
+ break;
+ }
+
+ /* NOTE: since we are not interrupt driven in U-Boot and always
+ * handle only one URB at a time, we cannot assume the
+ * transaction finished on the first successful return from
+ * hc_interrupt().. unless the flag for current URB is set,
+ * meaning that all TD's to/from device got actually
+ * transferred and processed. If the current URB is not
+ * finished we need to re-iterate this loop so as
+ * hc_interrupt() gets called again as there needs to be some
+ * more TD's to process still */
+ if ((stat >= 0) && (stat != 0xff) && (urb->finished)) {
+ /* 0xff is returned for an SF-interrupt */
+ break;
+ }
+
+ if (--timeout) {
+ wait_ms(1);
+ if (!urb->finished)
+ dbg("\%");
+
+ } else {
+ err("CTL:TIMEOUT ");
+ dbg("submit_common_msg: TO status %x\n", stat);
+ urb->finished = 1;
+ stat = USB_ST_CRC_ERR;
+ break;
+ }
+ }
+
+ dev->status = stat;
+ dev->act_len = transfer_len;
+
+#ifdef DEBUG
+ pkt_print(urb, dev, pipe, buffer, transfer_len, setup, "RET(ctlr)", usb_pipein(pipe));
+#else
+ wait_ms(1);
+#endif
+
+ /* free TDs in urb_priv */
+ if (usb_pipetype (pipe) != PIPE_INTERRUPT)
+ urb_free_priv (urb);
+ return 0;
+}
+
+/* submit routines called from usb.c */
+int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int transfer_len)
+{
+ info("submit_bulk_msg");
+ return submit_common_msg(dev, pipe, buffer, transfer_len, NULL, 0);
+}
+
+int submit_control_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int transfer_len, struct devrequest *setup)
+{
+ int maxsize = usb_maxpacket(dev, pipe);
+
+ info("submit_control_msg");
+#ifdef DEBUG
+ pkt_print(NULL, dev, pipe, buffer, transfer_len, setup, "SUB", usb_pipein(pipe));
+#else
+ wait_ms(1);
+#endif
+ if (!maxsize) {
+ err("submit_control_message: pipesize for pipe %lx is zero",
+ pipe);
+ return -1;
+ }
+ if (((pipe >> 8) & 0x7f) == gohci.rh.devnum) {
+ gohci.rh.dev = dev;
+ /* root hub - redirect */
+ return ohci_submit_rh_msg(dev, pipe, buffer, transfer_len,
+ setup);
+ }
+
+ return submit_common_msg(dev, pipe, buffer, transfer_len, setup, 0);
+}
+
+int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
+ int transfer_len, int interval)
+{
+ info("submit_int_msg");
+ return submit_common_msg(dev, pipe, buffer, transfer_len, NULL,
+ interval);
+}
+
+/*-------------------------------------------------------------------------*
+ * HC functions
+ *-------------------------------------------------------------------------*/
+
+/* reset the HC and BUS */
+
+static int hc_reset (ohci_t *ohci)
+{
+ int timeout = 30;
+ int smm_timeout = 50; /* 0,5 sec */
+
+ dbg("%s\n", __FUNCTION__);
+
+ if (readl (&ohci->regs->control) & OHCI_CTRL_IR) { /* SMM owns the HC */
+ writel (OHCI_OCR, &ohci->regs->cmdstatus); /* request ownership */
+ info("USB HC TakeOver from SMM");
+ while (readl (&ohci->regs->control) & OHCI_CTRL_IR) {
+ wait_ms (10);
+ if (--smm_timeout == 0) {
+ err("USB HC TakeOver failed!");
+ return -1;
+ }
+ }
+ }
+
+ /* Disable HC interrupts */
+ writel (OHCI_INTR_MIE, &ohci->regs->intrdisable);
+
+ dbg("USB HC reset_hc usb-%s: ctrl = 0x%X ;\n",
+ ohci->slot_name,
+ readl(&ohci->regs->control));
+
+ /* Reset USB (needed by some controllers) */
+ ohci->hc_control = 0;
+ writel (ohci->hc_control, &ohci->regs->control);
+
+ /* HC Reset requires max 10 us delay */
+ writel (OHCI_HCR, &ohci->regs->cmdstatus);
+ while ((readl (&ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
+ if (--timeout == 0) {
+ err("USB HC reset timed out!");
+ return -1;
+ }
+ udelay (1);
+ }
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* Start an OHCI controller, set the BUS operational
+ * enable interrupts
+ * connect the virtual root hub */
+
+static int hc_start (ohci_t * ohci)
+{
+ __u32 mask;
+ unsigned int fminterval;
+
+ ohci->disabled = 1;
+
+ /* Tell the controller where the control and bulk lists are
+ * The lists are empty now. */
+
+ writel (0, &ohci->regs->ed_controlhead);
+ writel (0, &ohci->regs->ed_bulkhead);
+
+ writel ((__u32)ohci->hcca, &ohci->regs->hcca); /* a reset clears this */
+
+ fminterval = 0x2edf;
+ writel ((fminterval * 9) / 10, &ohci->regs->periodicstart);
+ fminterval |= ((((fminterval - 210) * 6) / 7) << 16);
+ writel (fminterval, &ohci->regs->fminterval);
+ writel (0x628, &ohci->regs->lsthresh);
+
+ /* start controller operations */
+ ohci->hc_control = OHCI_CONTROL_INIT | OHCI_USB_OPER;
+ ohci->disabled = 0;
+ writel (ohci->hc_control, &ohci->regs->control);
+
+ /* disable all interrupts */
+ mask = (OHCI_INTR_SO | OHCI_INTR_WDH | OHCI_INTR_SF | OHCI_INTR_RD |
+ OHCI_INTR_UE | OHCI_INTR_FNO | OHCI_INTR_RHSC |
+ OHCI_INTR_OC | OHCI_INTR_MIE);
+ writel (mask, &ohci->regs->intrdisable);
+ /* clear all interrupts */
+ mask &= ~OHCI_INTR_MIE;
+ writel (mask, &ohci->regs->intrstatus);
+ /* Choose the interrupts we care about now - but w/o MIE */
+ mask = OHCI_INTR_RHSC | OHCI_INTR_UE | OHCI_INTR_WDH | OHCI_INTR_SO;
+ writel (mask, &ohci->regs->intrenable);
+
+#ifdef OHCI_USE_NPS
+ /* required for AMD-756 and some Mac platforms */
+ writel ((roothub_a (ohci) | RH_A_NPS) & ~RH_A_PSM,
+ &ohci->regs->roothub.a);
+ writel (RH_HS_LPSC, &ohci->regs->roothub.status);
+#endif /* OHCI_USE_NPS */
+
+#define mdelay(n) ({unsigned long msec=(n); while (msec--) udelay(1000);})
+ /* POTPGT delay is bits 24-31, in 2 ms units. */
+ mdelay ((roothub_a (ohci) >> 23) & 0x1fe);
+
+ /* connect the virtual root hub */
+ ohci->rh.devnum = 0;
+
+ return 0;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/* Poll USB interrupt. */
+void usb_event_poll(void)
+{
+ hc_interrupt();
+}
+
+/* an interrupt happens */
+
+static int hc_interrupt (void)
+{
+ ohci_t *ohci = &gohci;
+ struct ohci_regs *regs = ohci->regs;
+ int ints;
+ int stat = -1;
+
+ if ((ohci->hcca->done_head != 0) &&
+ !(m32_swap (ohci->hcca->done_head) & 0x01)) {
+ ints = OHCI_INTR_WDH;
+ } else if ((ints = readl (®s->intrstatus)) == ~(u32)0) {
+ ohci->disabled++;
+ err ("%s device removed!", ohci->slot_name);
+ return -1;
+ } else if ((ints &= readl (®s->intrenable)) == 0) {
+ dbg("hc_interrupt: returning..\n");
+ return 0xff;
+ }
+
+ /* dbg("Interrupt: %x frame: %x", ints, le16_to_cpu (ohci->hcca->frame_no)); */
+
+ if (ints & OHCI_INTR_RHSC) {
+ got_rhsc = 1;
+ stat = 0xff;
+ }
+
+ if (ints & OHCI_INTR_UE) {
+ ohci->disabled++;
+ err ("OHCI Unrecoverable Error, controller usb-%s disabled",
+ ohci->slot_name);
+ /* e.g. due to PCI Master/Target Abort */
+
+#ifdef DEBUG
+ ohci_dump (ohci, 1);
+#else
+ wait_ms(1);
+#endif
+ /* FIXME: be optimistic, hope that bug won't repeat often. */
+ /* Make some non-interrupt context restart the controller. */
+ /* Count and limit the retries though; either hardware or */
+ /* software errors can go forever... */
+ hc_reset (ohci);
+ return -1;
+ }
+
+ if (ints & OHCI_INTR_WDH) {
+ wait_ms(1);
+ writel (OHCI_INTR_WDH, ®s->intrdisable);
+ (void)readl (®s->intrdisable); /* flush */
+ stat = dl_done_list (&gohci, dl_reverse_done_list (&gohci));
+ writel (OHCI_INTR_WDH, ®s->intrenable);
+ (void)readl (®s->intrdisable); /* flush */
+ }
+
+ if (ints & OHCI_INTR_SO) {
+ dbg("USB Schedule overrun\n");
+ writel (OHCI_INTR_SO, ®s->intrenable);
+ stat = -1;
+ }
+
+ /* FIXME: this assumes SOF (1/ms) interrupts don't get lost... */
+ if (ints & OHCI_INTR_SF) {
+ unsigned int frame = m16_swap (ohci->hcca->frame_no) & 1;
+ wait_ms(1);
+ writel (OHCI_INTR_SF, ®s->intrdisable);
+ if (ohci->ed_rm_list[frame] != NULL)
+ writel (OHCI_INTR_SF, ®s->intrenable);
+ stat = 0xff;
+ }
+
+ writel (ints, ®s->intrstatus);
+ return stat;
+}
+
+/*-------------------------------------------------------------------------*/
+
+/*-------------------------------------------------------------------------*/
+
+/* De-allocate all resources.. */
+
+static void hc_release_ohci (ohci_t *ohci)
+{
+ dbg ("USB HC release ohci usb-%s", ohci->slot_name);
+
+ if (!ohci->disabled)
+ hc_reset (ohci);
+}
+
+/*-------------------------------------------------------------------------*/
+
+/*
+ * low level initalisation routine, called from usb.c
+ */
+static char ohci_inited = 0;
+
+int usb_lowlevel_init(void)
+{
+#ifdef CONFIG_PCI_OHCI
+ pci_dev_t pdev;
+#endif
+
+#ifdef CFG_USB_OHCI_CPU_INIT
+ /* cpu dependant init */
+ if(usb_cpu_init())
+ return -1;
+#endif
+
+#ifdef CFG_USB_OHCI_BOARD_INIT
+ /* board dependant init */
+ if(usb_board_init())
+ return -1;
+#endif
+ memset (&gohci, 0, sizeof (ohci_t));
+
+ /* align the storage */
+ if ((__u32)&ghcca[0] & 0xff) {
+ err("HCCA not aligned!!");
+ return -1;
+ }
+ phcca = &ghcca[0];
+ info("aligned ghcca %p", phcca);
+ memset(&ohci_dev, 0, sizeof(struct ohci_device));
+ if ((__u32)&ohci_dev.ed[0] & 0x7) {
+ err("EDs not aligned!!");
+ return -1;
+ }
+ memset(gtd, 0, sizeof(td_t) * (NUM_TD + 1));
+ if ((__u32)gtd & 0x7) {
+ err("TDs not aligned!!");
+ return -1;
+ }
+ ptd = gtd;
+ gohci.hcca = phcca;
+ memset (phcca, 0, sizeof (struct ohci_hcca));
+
+ gohci.disabled = 1;
+ gohci.sleeping = 0;
+ gohci.irq = -1;
+#ifdef CONFIG_PCI_OHCI
+ pdev = pci_find_devices(ohci_pci_ids, 0);
+
+ if (pdev != -1) {
+ u16 vid, did;
+ u32 base;
+ pci_read_config_word(pdev, PCI_VENDOR_ID, &vid);
+ pci_read_config_word(pdev, PCI_DEVICE_ID, &did);
+ printf("OHCI pci controller (%04x, %04x) found @(%d:%d:%d)\n",
+ vid, did, (pdev >> 16) & 0xff,
+ (pdev >> 11) & 0x1f, (pdev >> 8) & 0x7);
+ pci_read_config_dword(pdev, PCI_BASE_ADDRESS_0, &base);
+ printf("OHCI regs address 0x%08x\n", base);
+ gohci.regs = (struct ohci_regs *)base;
+ } else
+ return -1;
+#else
+ gohci.regs = (struct ohci_regs *)CFG_USB_OHCI_REGS_BASE;
+#endif
+
+ gohci.flags = 0;
+ gohci.slot_name = CFG_USB_OHCI_SLOT_NAME;
+
+ if (hc_reset (&gohci) < 0) {
+ hc_release_ohci (&gohci);
+ err ("can't reset usb-%s", gohci.slot_name);
+#ifdef CFG_USB_OHCI_BOARD_INIT
+ /* board dependant cleanup */
+ usb_board_init_fail();
+#endif
+
+#ifdef CFG_USB_OHCI_CPU_INIT
+ /* cpu dependant cleanup */
+ usb_cpu_init_fail();
+#endif
+ return -1;
+ }
+
+ /* FIXME this is a second HC reset; why?? */
+ /* writel(gohci.hc_control = OHCI_USB_RESET, &gohci.regs->control);
+ wait_ms(10); */
+ if (hc_start (&gohci) < 0) {
+ err ("can't start usb-%s", gohci.slot_name);
+ hc_release_ohci (&gohci);
+ /* Initialization failed */
+#ifdef CFG_USB_OHCI_BOARD_INIT
+ /* board dependant cleanup */
+ usb_board_stop();
+#endif
+
+#ifdef CFG_USB_OHCI_CPU_INIT
+ /* cpu dependant cleanup */
+ usb_cpu_stop();
+#endif
+ return -1;
+ }
+
+#ifdef DEBUG
+ ohci_dump (&gohci, 1);
+#else
+ wait_ms(1);
+#endif
+ ohci_inited = 1;
+ return 0;
+}
+
+int usb_lowlevel_stop(void)
+{
+ /* this gets called really early - before the controller has */
+ /* even been initialized! */
+ if (!ohci_inited)
+ return 0;
+ /* TODO release any interrupts, etc. */
+ /* call hc_release_ohci() here ? */
+ hc_reset (&gohci);
+
+#ifdef CFG_USB_OHCI_BOARD_INIT
+ /* board dependant cleanup */
+ if(usb_board_stop())
+ return -1;
+#endif
+
+#ifdef CFG_USB_OHCI_CPU_INIT
+ /* cpu dependant cleanup */
+ if(usb_cpu_stop())
+ return -1;
+#endif
+
+ return 0;
+}
+#endif /* CONFIG_USB_OHCI_NEW */
diff --git a/drivers/usb_ohci.h b/drivers/usb_ohci.h
new file mode 100644
index 0000000..380cb4c
--- /dev/null
+++ b/drivers/usb_ohci.h
@@ -0,0 +1,445 @@
+/*
+ * URB OHCI HCD (Host Controller Driver) for USB.
+ *
+ * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
+ * (C) Copyright 2000-2001 David Brownell <dbrownell@users.sourceforge.net>
+ *
+ * usb-ohci.h
+ */
+
+/* functions for doing board or CPU specific setup/cleanup */
+extern int usb_board_init(void);
+extern int usb_board_stop(void);
+extern int usb_board_init_fail(void);
+
+extern int usb_cpu_init(void);
+extern int usb_cpu_stop(void);
+extern int usb_cpu_init_fail(void);
+
+
+static int cc_to_error[16] = {
+
+/* mapping of the OHCI CC status to error codes */
+ /* No Error */ 0,
+ /* CRC Error */ USB_ST_CRC_ERR,
+ /* Bit Stuff */ USB_ST_BIT_ERR,
+ /* Data Togg */ USB_ST_CRC_ERR,
+ /* Stall */ USB_ST_STALLED,
+ /* DevNotResp */ -1,
+ /* PIDCheck */ USB_ST_BIT_ERR,
+ /* UnExpPID */ USB_ST_BIT_ERR,
+ /* DataOver */ USB_ST_BUF_ERR,
+ /* DataUnder */ USB_ST_BUF_ERR,
+ /* reservd */ -1,
+ /* reservd */ -1,
+ /* BufferOver */ USB_ST_BUF_ERR,
+ /* BuffUnder */ USB_ST_BUF_ERR,
+ /* Not Access */ -1,
+ /* Not Access */ -1
+};
+
+/* ED States */
+
+#define ED_NEW 0x00
+#define ED_UNLINK 0x01
+#define ED_OPER 0x02
+#define ED_DEL 0x04
+#define ED_URB_DEL 0x08
+
+/* usb_ohci_ed */
+struct ed {
+ __u32 hwINFO;
+ __u32 hwTailP;
+ __u32 hwHeadP;
+ __u32 hwNextED;
+
+ struct ed *ed_prev;
+ __u8 int_period;
+ __u8 int_branch;
+ __u8 int_load;
+ __u8 int_interval;
+ __u8 state;
+ __u8 type;
+ __u16 last_iso;
+ struct ed *ed_rm_list;
+
+ struct usb_device *usb_dev;
+ void *purb;
+ __u32 unused[2];
+} __attribute((aligned(16)));
+typedef struct ed ed_t;
+
+
+/* TD info field */
+#define TD_CC 0xf0000000
+#define TD_CC_GET(td_p) ((td_p >>28) & 0x0f)
+#define TD_CC_SET(td_p, cc) (td_p) = ((td_p) & 0x0fffffff) | (((cc) & 0x0f) << 28)
+#define TD_EC 0x0C000000
+#define TD_T 0x03000000
+#define TD_T_DATA0 0x02000000
+#define TD_T_DATA1 0x03000000
+#define TD_T_TOGGLE 0x00000000
+#define TD_R 0x00040000
+#define TD_DI 0x00E00000
+#define TD_DI_SET(X) (((X) & 0x07)<< 21)
+#define TD_DP 0x00180000
+#define TD_DP_SETUP 0x00000000
+#define TD_DP_IN 0x00100000
+#define TD_DP_OUT 0x00080000
+
+#define TD_ISO 0x00010000
+#define TD_DEL 0x00020000
+
+/* CC Codes */
+#define TD_CC_NOERROR 0x00
+#define TD_CC_CRC 0x01
+#define TD_CC_BITSTUFFING 0x02
+#define TD_CC_DATATOGGLEM 0x03
+#define TD_CC_STALL 0x04
+#define TD_DEVNOTRESP 0x05
+#define TD_PIDCHECKFAIL 0x06
+#define TD_UNEXPECTEDPID 0x07
+#define TD_DATAOVERRUN 0x08
+#define TD_DATAUNDERRUN 0x09
+#define TD_BUFFEROVERRUN 0x0C
+#define TD_BUFFERUNDERRUN 0x0D
+#define TD_NOTACCESSED 0x0F
+
+
+#define MAXPSW 1
+
+struct td {
+ __u32 hwINFO;
+ __u32 hwCBP; /* Current Buffer Pointer */
+ __u32 hwNextTD; /* Next TD Pointer */
+ __u32 hwBE; /* Memory Buffer End Pointer */
+
+/* #ifndef CONFIG_MPC5200 /\* this seems wrong *\/ */
+ __u16 hwPSW[MAXPSW];
+/* #endif */
+ __u8 unused;
+ __u8 index;
+ struct ed *ed;
+ struct td *next_dl_td;
+ struct usb_device *usb_dev;
+ int transfer_len;
+ __u32 data;
+
+ __u32 unused2[2];
+} __attribute((aligned(32)));
+typedef struct td td_t;
+
+#define OHCI_ED_SKIP (1 << 14)
+
+/*
+ * The HCCA (Host Controller Communications Area) is a 256 byte
+ * structure defined in the OHCI spec. that the host controller is
+ * told the base address of. It must be 256-byte aligned.
+ */
+
+#define NUM_INTS 32 /* part of the OHCI standard */
+struct ohci_hcca {
+ __u32 int_table[NUM_INTS]; /* Interrupt ED table */
+#if defined(CONFIG_MPC5200)
+ __u16 pad1; /* set to 0 on each frame_no change */
+ __u16 frame_no; /* current frame number */
+#else
+ __u16 frame_no; /* current frame number */
+ __u16 pad1; /* set to 0 on each frame_no change */
+#endif
+ __u32 done_head; /* info returned for an interrupt */
+ u8 reserved_for_hc[116];
+} __attribute((aligned(256)));
+
+
+/*
+ * Maximum number of root hub ports.
+ */
+#ifndef CFG_USB_OHCI_MAX_ROOT_PORTS
+# error "CFG_USB_OHCI_MAX_ROOT_PORTS undefined!"
+#endif
+
+/*
+ * This is the structure of the OHCI controller's memory mapped I/O
+ * region. This is Memory Mapped I/O. You must use the readl() and
+ * writel() macros defined in asm/io.h to access these!!
+ */
+struct ohci_regs {
+ /* control and status registers */
+ __u32 revision;
+ __u32 control;
+ __u32 cmdstatus;
+ __u32 intrstatus;
+ __u32 intrenable;
+ __u32 intrdisable;
+ /* memory pointers */
+ __u32 hcca;
+ __u32 ed_periodcurrent;
+ __u32 ed_controlhead;
+ __u32 ed_controlcurrent;
+ __u32 ed_bulkhead;
+ __u32 ed_bulkcurrent;
+ __u32 donehead;
+ /* frame counters */
+ __u32 fminterval;
+ __u32 fmremaining;
+ __u32 fmnumber;
+ __u32 periodicstart;
+ __u32 lsthresh;
+ /* Root hub ports */
+ struct ohci_roothub_regs {
+ __u32 a;
+ __u32 b;
+ __u32 status;
+ __u32 portstatus[CFG_USB_OHCI_MAX_ROOT_PORTS];
+ } roothub;
+} __attribute((aligned(32)));
+
+
+/* OHCI CONTROL AND STATUS REGISTER MASKS */
+
+/*
+ * HcControl (control) register masks
+ */
+#define OHCI_CTRL_CBSR (3 << 0) /* control/bulk service ratio */
+#define OHCI_CTRL_PLE (1 << 2) /* periodic list enable */
+#define OHCI_CTRL_IE (1 << 3) /* isochronous enable */
+#define OHCI_CTRL_CLE (1 << 4) /* control list enable */
+#define OHCI_CTRL_BLE (1 << 5) /* bulk list enable */
+#define OHCI_CTRL_HCFS (3 << 6) /* host controller functional state */
+#define OHCI_CTRL_IR (1 << 8) /* interrupt routing */
+#define OHCI_CTRL_RWC (1 << 9) /* remote wakeup connected */
+#define OHCI_CTRL_RWE (1 << 10) /* remote wakeup enable */
+
+/* pre-shifted values for HCFS */
+# define OHCI_USB_RESET (0 << 6)
+# define OHCI_USB_RESUME (1 << 6)
+# define OHCI_USB_OPER (2 << 6)
+# define OHCI_USB_SUSPEND (3 << 6)
+
+/*
+ * HcCommandStatus (cmdstatus) register masks
+ */
+#define OHCI_HCR (1 << 0) /* host controller reset */
+#define OHCI_CLF (1 << 1) /* control list filled */
+#define OHCI_BLF (1 << 2) /* bulk list filled */
+#define OHCI_OCR (1 << 3) /* ownership change request */
+#define OHCI_SOC (3 << 16) /* scheduling overrun count */
+
+/*
+ * masks used with interrupt registers:
+ * HcInterruptStatus (intrstatus)
+ * HcInterruptEnable (intrenable)
+ * HcInterruptDisable (intrdisable)
+ */
+#define OHCI_INTR_SO (1 << 0) /* scheduling overrun */
+#define OHCI_INTR_WDH (1 << 1) /* writeback of done_head */
+#define OHCI_INTR_SF (1 << 2) /* start frame */
+#define OHCI_INTR_RD (1 << 3) /* resume detect */
+#define OHCI_INTR_UE (1 << 4) /* unrecoverable error */
+#define OHCI_INTR_FNO (1 << 5) /* frame number overflow */
+#define OHCI_INTR_RHSC (1 << 6) /* root hub status change */
+#define OHCI_INTR_OC (1 << 30) /* ownership change */
+#define OHCI_INTR_MIE (1 << 31) /* master interrupt enable */
+
+
+/* Virtual Root HUB */
+struct virt_root_hub {
+ int devnum; /* Address of Root Hub endpoint */
+ void *dev; /* was urb */
+ void *int_addr;
+ int send;
+ int interval;
+};
+
+/* USB HUB CONSTANTS (not OHCI-specific; see hub.h) */
+
+/* destination of request */
+#define RH_INTERFACE 0x01
+#define RH_ENDPOINT 0x02
+#define RH_OTHER 0x03
+
+#define RH_CLASS 0x20
+#define RH_VENDOR 0x40
+
+/* Requests: bRequest << 8 | bmRequestType */
+#define RH_GET_STATUS 0x0080
+#define RH_CLEAR_FEATURE 0x0100
+#define RH_SET_FEATURE 0x0300
+#define RH_SET_ADDRESS 0x0500
+#define RH_GET_DESCRIPTOR 0x0680
+#define RH_SET_DESCRIPTOR 0x0700
+#define RH_GET_CONFIGURATION 0x0880
+#define RH_SET_CONFIGURATION 0x0900
+#define RH_GET_STATE 0x0280
+#define RH_GET_INTERFACE 0x0A80
+#define RH_SET_INTERFACE 0x0B00
+#define RH_SYNC_FRAME 0x0C80
+/* Our Vendor Specific Request */
+#define RH_SET_EP 0x2000
+
+
+/* Hub port features */
+#define RH_PORT_CONNECTION 0x00
+#define RH_PORT_ENABLE 0x01
+#define RH_PORT_SUSPEND 0x02
+#define RH_PORT_OVER_CURRENT 0x03
+#define RH_PORT_RESET 0x04
+#define RH_PORT_POWER 0x08
+#define RH_PORT_LOW_SPEED 0x09
+
+#define RH_C_PORT_CONNECTION 0x10
+#define RH_C_PORT_ENABLE 0x11
+#define RH_C_PORT_SUSPEND 0x12
+#define RH_C_PORT_OVER_CURRENT 0x13
+#define RH_C_PORT_RESET 0x14
+
+/* Hub features */
+#define RH_C_HUB_LOCAL_POWER 0x00
+#define RH_C_HUB_OVER_CURRENT 0x01
+
+#define RH_DEVICE_REMOTE_WAKEUP 0x00
+#define RH_ENDPOINT_STALL 0x01
+
+#define RH_ACK 0x01
+#define RH_REQ_ERR -1
+#define RH_NACK 0x00
+
+
+/* OHCI ROOT HUB REGISTER MASKS */
+
+/* roothub.portstatus [i] bits */
+#define RH_PS_CCS 0x00000001 /* current connect status */
+#define RH_PS_PES 0x00000002 /* port enable status*/
+#define RH_PS_PSS 0x00000004 /* port suspend status */
+#define RH_PS_POCI 0x00000008 /* port over current indicator */
+#define RH_PS_PRS 0x00000010 /* port reset status */
+#define RH_PS_PPS 0x00000100 /* port power status */
+#define RH_PS_LSDA 0x00000200 /* low speed device attached */
+#define RH_PS_CSC 0x00010000 /* connect status change */
+#define RH_PS_PESC 0x00020000 /* port enable status change */
+#define RH_PS_PSSC 0x00040000 /* port suspend status change */
+#define RH_PS_OCIC 0x00080000 /* over current indicator change */
+#define RH_PS_PRSC 0x00100000 /* port reset status change */
+
+/* roothub.status bits */
+#define RH_HS_LPS 0x00000001 /* local power status */
+#define RH_HS_OCI 0x00000002 /* over current indicator */
+#define RH_HS_DRWE 0x00008000 /* device remote wakeup enable */
+#define RH_HS_LPSC 0x00010000 /* local power status change */
+#define RH_HS_OCIC 0x00020000 /* over current indicator change */
+#define RH_HS_CRWE 0x80000000 /* clear remote wakeup enable */
+
+/* roothub.b masks */
+#define RH_B_DR 0x0000ffff /* device removable flags */
+#define RH_B_PPCM 0xffff0000 /* port power control mask */
+
+/* roothub.a masks */
+#define RH_A_NDP (0xff << 0) /* number of downstream ports */
+#define RH_A_PSM (1 << 8) /* power switching mode */
+#define RH_A_NPS (1 << 9) /* no power switching */
+#define RH_A_DT (1 << 10) /* device type (mbz) */
+#define RH_A_OCPM (1 << 11) /* over current protection mode */
+#define RH_A_NOCP (1 << 12) /* no over current protection */
+#define RH_A_POTPGT (0xff << 24) /* power on to power good time */
+
+/* urb */
+#define N_URB_TD 48
+typedef struct
+{
+ ed_t *ed;
+ __u16 length; /* number of tds associated with this request */
+ __u16 td_cnt; /* number of tds already serviced */
+ struct usb_device *dev;
+ int state;
+ unsigned long pipe;
+ void *transfer_buffer;
+ int transfer_buffer_length;
+ int interval;
+ int actual_length;
+ int finished;
+ td_t *td[N_URB_TD]; /* list pointer to all corresponding TDs associated with this request */
+} urb_priv_t;
+#define URB_DEL 1
+
+/*
+ * This is the full ohci controller description
+ *
+ * Note how the "proper" USB information is just
+ * a subset of what the full implementation needs. (Linus)
+ */
+
+
+typedef struct ohci {
+ struct ohci_hcca *hcca; /* hcca */
+ /*dma_addr_t hcca_dma;*/
+
+ int irq;
+ int disabled; /* e.g. got a UE, we're hung */
+ int sleeping;
+ unsigned long flags; /* for HC bugs */
+
+ struct ohci_regs *regs; /* OHCI controller's memory */
+
+ int ohci_int_load[32]; /* load of the 32 Interrupt Chains (for load balancing)*/
+ ed_t *ed_rm_list[2]; /* lists of all endpoints to be removed */
+ ed_t *ed_bulktail; /* last endpoint of bulk list */
+ ed_t *ed_controltail; /* last endpoint of control list */
+ int intrstatus;
+ __u32 hc_control; /* copy of the hc control reg */
+ struct usb_device *dev[32];
+ struct virt_root_hub rh;
+
+ const char *slot_name;
+} ohci_t;
+
+#define NUM_EDS 8 /* num of preallocated endpoint descriptors */
+
+struct ohci_device {
+ ed_t ed[NUM_EDS];
+ int ed_cnt;
+};
+
+/* hcd */
+/* endpoint */
+static int ep_link(ohci_t * ohci, ed_t * ed);
+static int ep_unlink(ohci_t * ohci, ed_t * ed);
+static ed_t * ep_add_ed(struct usb_device * usb_dev, unsigned long pipe,
+ int interval, int load);
+
+/*-------------------------------------------------------------------------*/
+
+/* we need more TDs than EDs */
+#define NUM_TD 64
+
+/* +1 so we can align the storage */
+td_t gtd[NUM_TD+1];
+/* pointers to aligned storage */
+td_t *ptd;
+
+/* TDs ... */
+static inline struct td *
+td_alloc (struct usb_device *usb_dev)
+{
+ int i;
+ struct td *td;
+
+ td = NULL;
+ for (i = 0; i < NUM_TD; i++)
+ {
+ if (ptd[i].usb_dev == NULL)
+ {
+ td = &ptd[i];
+ td->usb_dev = usb_dev;
+ break;
+ }
+ }
+
+ return td;
+}
+
+static inline void
+ed_free (struct ed *ed)
+{
+ ed->usb_dev = NULL;
+}
diff --git a/drivers/usbdcore_ep0.c b/drivers/usbdcore_ep0.c
index 260befe..1e44f32 100644
--- a/drivers/usbdcore_ep0.c
+++ b/drivers/usbdcore_ep0.c
@@ -2,6 +2,9 @@
* (C) Copyright 2003
* Gerry Hamel, geh@ti.com, Texas Instruments
*
+ * (C) Copyright 2006
+ * Bryan O'Donoghue, deckard@CodeHermit.ie
+ *
* Based on
* linux/drivers/usbd/ep0.c
*
@@ -39,11 +42,17 @@
* function driver. This may need to change.
*
* XXX
+ *
+ * As alluded to above, a simple callback cdc_recv_setup has been implemented
+ * in the usb_device data structure to facilicate passing
+ * Common Device Class packets to a function driver.
+ *
+ * XXX
*/
#include <common.h>
-#if defined(CONFIG_OMAP1510) && defined(CONFIG_USB_DEVICE)
+#if defined(CONFIG_USB_DEVICE)
#include "usbdcore.h"
#if 0
@@ -69,7 +78,7 @@
char *cp;
urb->actual_length = 2;
- cp = urb->buffer;
+ cp = (char*)urb->buffer;
cp[0] = cp[1] = 0;
switch (requesttype) {
@@ -115,7 +124,7 @@
*
* Copy configuration data to urb transfer buffer if there is room for it.
*/
-static void copy_config (struct urb *urb, void *data, int max_length,
+void copy_config (struct urb *urb, void *data, int max_length,
int max_buf)
{
int available;
@@ -128,10 +137,7 @@
dbg_ep0 (1, "data is NULL");
return;
}
- if (!(length = *(unsigned char *) data)) {
- dbg_ep0 (1, "length is zero");
- return;
- }
+ length = max_length;
if (length > max_length) {
dbg_ep0 (1, "length: %d >= max_length: %d", length,
@@ -192,7 +198,7 @@
/* setup tx urb */
urb->actual_length = 0;
- cp = urb->buffer;
+ cp = (char*)urb->buffer;
dbg_ep0 (2, "%s", USBD_DEVICE_DESCRIPTORS (descriptor_type));
@@ -200,7 +206,6 @@
case USB_DESCRIPTOR_TYPE_DEVICE:
{
struct usb_device_descriptor *device_descriptor;
-
if (!
(device_descriptor =
usbd_device_device_descriptor (device, port))) {
@@ -214,20 +219,16 @@
/* correct the correct control endpoint 0 max packet size into the descriptor */
device_descriptor =
(struct usb_device_descriptor *) urb->buffer;
- device_descriptor->bMaxPacketSize0 =
- urb->device->bus->maxpacketsize;
}
- /*dbg_ep0(3, "copied device configuration, actual_length: %x", urb->actual_length); */
+ dbg_ep0(3, "copied device configuration, actual_length: 0x%x", urb->actual_length);
break;
case USB_DESCRIPTOR_TYPE_CONFIGURATION:
{
- int bNumInterface;
struct usb_configuration_descriptor
*configuration_descriptor;
struct usb_device_descriptor *device_descriptor;
-
if (!
(device_descriptor =
usbd_device_device_descriptor (device, port))) {
@@ -251,130 +252,35 @@
index);
return -1;
}
+ dbg_ep0(0, "attempt to copy %d bytes to urb\n",cpu_to_le16(configuration_descriptor->wTotalLength));
copy_config (urb, configuration_descriptor,
- sizeof (struct
- usb_configuration_descriptor),
+
+ cpu_to_le16(configuration_descriptor->wTotalLength),
max);
-
-
- /* iterate across interfaces for specified configuration */
- dbg_ep0 (0, "bNumInterfaces: %d",
- configuration_descriptor->bNumInterfaces);
- for (bNumInterface = 0;
- bNumInterface <
- configuration_descriptor->bNumInterfaces;
- bNumInterface++) {
-
- int bAlternateSetting;
- struct usb_interface_instance
- *interface_instance;
-
- dbg_ep0 (3, "[%d] bNumInterfaces: %d",
- bNumInterface,
- configuration_descriptor->bNumInterfaces);
-
- if (! (interface_instance = usbd_device_interface_instance (device,
- port, index, bNumInterface)))
- {
- dbg_ep0 (3, "[%d] interface_instance NULL",
- bNumInterface);
- return -1;
- }
- /* iterate across interface alternates */
- for (bAlternateSetting = 0;
- bAlternateSetting < interface_instance->alternates;
- bAlternateSetting++) {
- /*int class; */
- int bNumEndpoint;
- struct usb_interface_descriptor *interface_descriptor;
-
- struct usb_alternate_instance *alternate_instance;
-
- dbg_ep0 (3, "[%d:%d] alternates: %d",
- bNumInterface,
- bAlternateSetting,
- interface_instance->alternates);
-
- if (! (alternate_instance = usbd_device_alternate_instance (device, port, index, bNumInterface, bAlternateSetting))) {
- dbg_ep0 (3, "[%d] alternate_instance NULL",
- bNumInterface);
- return -1;
- }
- /* copy descriptor for this interface */
- copy_config (urb, alternate_instance->interface_descriptor,
- sizeof (struct usb_interface_descriptor),
- max);
-
- /*dbg_ep0(3, "[%d:%d] classes: %d endpoints: %d", bNumInterface, bAlternateSetting, */
- /* alternate_instance->classes, alternate_instance->endpoints); */
-
- /* iterate across classes for this alternate interface */
-#if 0
- for (class = 0;
- class < alternate_instance->classes;
- class++) {
- struct usb_class_descriptor *class_descriptor;
- /*dbg_ep0(3, "[%d:%d:%d] classes: %d", bNumInterface, bAlternateSetting, */
- /* class, alternate_instance->classes); */
- if (!(class_descriptor = usbd_device_class_descriptor_index (device, port, index, bNumInterface, bAlternateSetting, class))) {
- dbg_ep0 (3, "[%d] class NULL",
- class);
- return -1;
- }
- /* copy descriptor for this class */
- copy_config (urb, class_descriptor,
- sizeof (struct usb_class_descriptor),
- max);
- }
-#endif
-
- /* iterate across endpoints for this alternate interface */
- interface_descriptor = alternate_instance->interface_descriptor;
- for (bNumEndpoint = 0;
- bNumEndpoint < alternate_instance->endpoints;
- bNumEndpoint++) {
- struct usb_endpoint_descriptor *endpoint_descriptor;
- dbg_ep0 (3, "[%d:%d:%d] endpoint: %d",
- bNumInterface,
- bAlternateSetting,
- bNumEndpoint,
- interface_descriptor->
- bNumEndpoints);
- if (!(endpoint_descriptor = usbd_device_endpoint_descriptor_index (device, port, index, bNumInterface, bAlternateSetting, bNumEndpoint))) {
- dbg_ep0 (3, "[%d] endpoint NULL",
- bNumEndpoint);
- return -1;
- }
- /* copy descriptor for this endpoint */
- copy_config (urb, endpoint_descriptor,
- sizeof (struct usb_endpoint_descriptor),
- max);
- }
- }
- }
- dbg_ep0 (3, "lengths: %d %d",
- le16_to_cpu (configuration_descriptor->wTotalLength),
- urb->actual_length);
}
+
break;
case USB_DESCRIPTOR_TYPE_STRING:
{
struct usb_string_descriptor *string_descriptor;
-
if (!(string_descriptor = usbd_get_string (index))) {
+ serial_printf("Invalid string index %d\n", index);
return -1;
}
- /*dbg_ep0(3, "string_descriptor: %p", string_descriptor); */
+ dbg_ep0(3, "string_descriptor: %p length %d", string_descriptor, string_descriptor->bLength);
copy_config (urb, string_descriptor, string_descriptor->bLength, max);
}
break;
case USB_DESCRIPTOR_TYPE_INTERFACE:
+ serial_printf("USB_DESCRIPTOR_TYPE_INTERFACE - error not implemented\n");
return -1;
case USB_DESCRIPTOR_TYPE_ENDPOINT:
+ serial_printf("USB_DESCRIPTOR_TYPE_ENDPOINT - error not implemented\n");
return -1;
case USB_DESCRIPTOR_TYPE_HID:
{
+ serial_printf("USB_DESCRIPTOR_TYPE_HID - error not implemented\n");
return -1; /* unsupported at this time */
#if 0
int bNumInterface =
@@ -403,6 +309,7 @@
break;
case USB_DESCRIPTOR_TYPE_REPORT:
{
+ serial_printf("USB_DESCRIPTOR_TYPE_REPORT - error not implemented\n");
return -1; /* unsupported at this time */
#if 0
int bNumInterface =
@@ -434,12 +341,19 @@
#endif
}
break;
+ case USB_DESCRIPTOR_TYPE_DEVICE_QUALIFIER:
+ {
+ /* If a USB device supports both a full speed and low speed operation
+ * we must send a Device_Qualifier descriptor here
+ */
+ return -1;
+ }
default:
return -1;
}
- dbg_ep0 (1, "urb: buffer: %p buffer_length: %2d actual_length: %2d packet size: %2d",
+ dbg_ep0 (1, "urb: buffer: %p buffer_length: %2d actual_length: %2d tx_packetSize: %2d",
urb->buffer, urb->buffer_length, urb->actual_length,
device->bus->endpoint_array[0].tx_packetSize);
/*
@@ -495,6 +409,12 @@
/* handle USB Standard Request (c.f. USB Spec table 9-2) */
if ((request->bmRequestType & USB_REQ_TYPE_MASK) != 0) {
+ if(device->device_state <= STATE_CONFIGURED){
+ /* Attempt to handle a CDC specific request if we are
+ * in the configured state.
+ */
+ return device->cdc_recv_setup(request,urb);
+ }
dbg_ep0 (1, "non standard request: %x",
request->bmRequestType & USB_REQ_TYPE_MASK);
return -1; /* Stall here */
@@ -567,6 +487,7 @@
le16_to_cpu (request->wValue) & 0xff);
case USB_REQ_GET_CONFIGURATION:
+ serial_printf("get config %d\n", device->configuration);
return ep0_get_one (device, urb,
device->configuration);
@@ -642,7 +563,6 @@
/*dbg_ep0(2, "address: %d %d %d", */
/* request->wValue, le16_to_cpu(request->wValue), device->address); */
- serial_printf ("DEVICE_ADDRESS_ASSIGNED.. event?\n");
return 0;
case USB_REQ_SET_DESCRIPTOR: /* XXX should we support this? */
@@ -653,9 +573,10 @@
/* c.f. 9.4.7 - the top half of wValue is reserved */
/* */
if ((device->configuration =
- le16_to_cpu (request->wValue) & 0x7f) != 0) {
+ le16_to_cpu (request->wValue) & 0xFF80) != 0) {
/* c.f. 9.4.7 - zero is the default or addressed state, in our case this */
/* is the same is configuration zero */
+ serial_printf("error setting dev->config to zero!\n");
device->configuration = 0; /* TBR - ?????? */
}
/* reset interface and alternate settings */
diff --git a/drivers/usbdcore_mpc8xx.c b/drivers/usbdcore_mpc8xx.c
new file mode 100644
index 0000000..d4c4096
--- /dev/null
+++ b/drivers/usbdcore_mpc8xx.c
@@ -0,0 +1,1401 @@
+/*
+ * Copyright (C) 2006 by Bryan O'Donoghue, CodeHermit
+ * bodonoghue@CodeHermit.ie
+ *
+ * References
+ * DasUBoot/drivers/usbdcore_omap1510.c, for design and implementation ideas.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+
+/*
+ * Notes :
+ * 1. #define __SIMULATE_ERROR__ to inject a CRC error into every 2nd TX
+ * packet to force the USB re-transmit protocol.
+ *
+ * 2. #define __DEBUG_UDC__ to switch on debug tracing to serial console
+ * be careful that tracing doesn't create Hiesen-bugs with respect to
+ * response timeouts to control requests.
+ *
+ * 3. This driver should be able to support any higher level driver that
+ * that wants to do either of the two standard UDC implementations
+ * Control-Bulk-Interrupt or Bulk-IN/Bulk-Out standards. Hence
+ * gserial and cdc_acm should work with this code.
+ *
+ * 4. NAK events never actually get raised at all, the documentation
+ * is just wrong !
+ *
+ * 5. For some reason, cbd_datlen is *always* +2 the value it should be.
+ * this means that having an RX cbd of 16 bytes is not possible, since
+ * the same size is reported for 14 bytes received as 16 bytes received
+ * until we can find out why this happens, RX cbds must be limited to 8
+ * bytes. TODO: check errata for this behaviour.
+ *
+ * 6. Right now this code doesn't support properly powering up with the USB
+ * cable attached to the USB host my development board the Adder87x doesn't
+ * have a pull-up fitted to allow this, so it is necessary to power the
+ * board and *then* attached the USB cable to the host. However somebody
+ * with a different design in their board may be able to keep the cable
+ * constantly connected and simply enable/disable a pull-up re
+ * figure 31.1 in MPC885RM.pdf instead of having to power up the board and
+ * then attach the cable !
+ *
+ */
+#include <common.h>
+#include <config.h>
+
+#if defined(CONFIG_MPC885_FAMILY) && defined(CONFIG_USB_DEVICE)
+#include <commproc.h>
+#include "usbdcore.h"
+#include "usbdcore_mpc8xx.h"
+#include "usbdcore_ep0.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#define ERR(fmt, args...)\
+ serial_printf("ERROR : [%s] %s:%d: "fmt,\
+ __FILE__,__FUNCTION__,__LINE__, ##args)
+#ifdef __DEBUG_UDC__
+#define DBG(fmt,args...)\
+ serial_printf("[%s] %s:%d: "fmt,\
+ __FILE__,__FUNCTION__,__LINE__, ##args)
+#else
+#define DBG(fmt,args...)
+#endif
+
+/* Static Data */
+#ifdef __SIMULATE_ERROR__
+static char err_poison_test = 0;
+#endif
+static struct mpc8xx_ep ep_ref[MAX_ENDPOINTS];
+static u32 address_base = STATE_NOT_READY;
+static mpc8xx_udc_state_t udc_state = 0;
+static struct usb_device_instance *udc_device = 0;
+static volatile usb_epb_t *endpoints[MAX_ENDPOINTS];
+static volatile cbd_t *tx_cbd[TX_RING_SIZE];
+static volatile cbd_t *rx_cbd[RX_RING_SIZE];
+static volatile immap_t *immr = 0;
+static volatile cpm8xx_t *cp = 0;
+static volatile usb_pram_t *usb_paramp = 0;
+static volatile usb_t *usbp = 0;
+static int rx_ct = 0;
+static int tx_ct = 0;
+
+/* Static Function Declarations */
+static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
+ usb_device_state_t final);
+static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
+ usb_device_state_t final);
+static void mpc8xx_udc_stall (unsigned int ep);
+static void mpc8xx_udc_flush_tx_fifo (int epid);
+static void mpc8xx_udc_flush_rx_fifo (void);
+static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp);
+static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
+ struct urb *tx_urb);
+static void mpc8xx_udc_dump_request (struct usb_device_request *request);
+static void mpc8xx_udc_clock_init (volatile immap_t * immr,
+ volatile cpm8xx_t * cp);
+static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi);
+static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp);
+static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp);
+static void mpc8xx_udc_cbd_init (void);
+static void mpc8xx_udc_endpoint_init (void);
+static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size);
+static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment);
+static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp);
+static void mpc8xx_udc_set_nak (unsigned int ep);
+static short mpc8xx_udc_handle_txerr (void);
+static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid);
+
+/******************************************************************************
+ Global Linkage
+ *****************************************************************************/
+
+/* udc_init
+ *
+ * Do initial bus gluing
+ */
+int udc_init (void)
+{
+ /* Init various pointers */
+ immr = (immap_t *) CFG_IMMR;
+ cp = (cpm8xx_t *) & (immr->im_cpm);
+ usb_paramp = (usb_pram_t *) & (cp->cp_dparam[PROFF_USB]);
+ usbp = (usb_t *) & (cp->cp_scc[0]);
+
+ memset (ep_ref, 0x00, (sizeof (struct mpc8xx_ep) * MAX_ENDPOINTS));
+
+ udc_device = 0;
+ udc_state = STATE_NOT_READY;
+
+ usbp->usmod = 0x00;
+ usbp->uscom = 0;
+
+ /* Set USB Frame #0, Respond at Address & Get a clock source */
+ usbp->usaddr = 0x00;
+ mpc8xx_udc_clock_init (immr, cp);
+
+ /* PA15, PA14 as perhiperal USBRXD and USBOE */
+ immr->im_ioport.iop_padir &= ~0x0003;
+ immr->im_ioport.iop_papar |= 0x0003;
+
+ /* PC11/PC10 as peripheral USBRXP USBRXN */
+ immr->im_ioport.iop_pcso |= 0x0030;
+
+ /* PC7/PC6 as perhiperal USBTXP and USBTXN */
+ immr->im_ioport.iop_pcdir |= 0x0300;
+ immr->im_ioport.iop_pcpar |= 0x0300;
+
+ /* Set the base address */
+ address_base = (u32) (cp->cp_dpmem + CPM_USB_BASE);
+
+ /* Initialise endpoints and circular buffers */
+ mpc8xx_udc_endpoint_init ();
+ mpc8xx_udc_cbd_init ();
+
+ /* Assign allocated Dual Port Endpoint descriptors */
+ usb_paramp->ep0ptr = (u32) endpoints[0];
+ usb_paramp->ep1ptr = (u32) endpoints[1];
+ usb_paramp->ep2ptr = (u32) endpoints[2];
+ usb_paramp->ep3ptr = (u32) endpoints[3];
+ usb_paramp->frame_n = 0;
+
+ DBG ("ep0ptr=0x%08x ep1ptr=0x%08x ep2ptr=0x%08x ep3ptr=0x%08x\n",
+ usb_paramp->ep0ptr, usb_paramp->ep1ptr, usb_paramp->ep2ptr,
+ usb_paramp->ep3ptr);
+
+ return 0;
+}
+
+/* udc_irq
+ *
+ * Poll for whatever events may have occured
+ */
+void udc_irq (void)
+{
+ int epid = 0;
+ volatile cbd_t *rx_cbdp = 0;
+ volatile cbd_t *rx_cbdp_base = 0;
+
+ if (udc_state != STATE_READY) {
+ return;
+ }
+
+ if (usbp->usber & USB_E_BSY) {
+ /* This shouldn't happen. If it does then it's a bug ! */
+ usbp->usber |= USB_E_BSY;
+ mpc8xx_udc_flush_rx_fifo ();
+ }
+
+ /* Scan all RX/Bidirectional Endpoints for RX data. */
+ for (epid = 0; epid < MAX_ENDPOINTS; epid++) {
+ if (!ep_ref[epid].prx) {
+ continue;
+ }
+ rx_cbdp = rx_cbdp_base = ep_ref[epid].prx;
+
+ do {
+ if (!(rx_cbdp->cbd_sc & RX_BD_E)) {
+
+ if (rx_cbdp->cbd_sc & 0x1F) {
+ /* Corrupt data discard it.
+ * Controller has NAK'd this packet.
+ */
+ mpc8xx_udc_clear_rxbd (rx_cbdp);
+
+ } else {
+ if (!epid) {
+ mpc8xx_udc_ep0_rx (rx_cbdp);
+
+ } else {
+ /* Process data */
+ mpc8xx_udc_set_nak (epid);
+ mpc8xx_udc_epn_rx (epid, rx_cbdp);
+ mpc8xx_udc_clear_rxbd (rx_cbdp);
+ }
+ }
+
+ /* Advance RX CBD pointer */
+ mpc8xx_udc_advance_rx (&rx_cbdp, epid);
+ ep_ref[epid].prx = rx_cbdp;
+ } else {
+ /* Advance RX CBD pointer */
+ mpc8xx_udc_advance_rx (&rx_cbdp, epid);
+ }
+
+ } while (rx_cbdp != rx_cbdp_base);
+ }
+
+ /* Handle TX events as appropiate, the correct place to do this is
+ * in a tx routine. Perhaps TX on epn was pre-empted by ep0
+ */
+
+ if (usbp->usber & USB_E_TXB) {
+ usbp->usber |= USB_E_TXB;
+ }
+
+ if (usbp->usber & (USB_TX_ERRMASK)) {
+ mpc8xx_udc_handle_txerr ();
+ }
+
+ /* Switch to the default state, respond at the default address */
+ if (usbp->usber & USB_E_RESET) {
+ usbp->usber |= USB_E_RESET;
+ usbp->usaddr = 0x00;
+ udc_device->device_state = STATE_DEFAULT;
+ }
+
+ /* if(usbp->usber&USB_E_IDLE){
+ We could suspend here !
+ usbp->usber|=USB_E_IDLE;
+ DBG("idle state change\n");
+ }
+ if(usbp->usbs){
+ We could resume here when IDLE is deasserted !
+ Not worth doing, so long as we are self powered though.
+ }
+ */
+
+ return;
+}
+
+/* udc_endpoint_write
+ *
+ * Write some data to an endpoint
+ */
+int udc_endpoint_write (struct usb_endpoint_instance *epi)
+{
+ int ep = 0;
+ short epid = 1, unnak = 0, ret = 0;
+
+ if (udc_state != STATE_READY) {
+ ERR ("invalid udc_state != STATE_READY!\n");
+ return -1;
+ }
+
+ if (!udc_device || !epi) {
+ return -1;
+ }
+
+ if (udc_device->device_state != STATE_CONFIGURED) {
+ return -1;
+ }
+
+ ep = epi->endpoint_address & 0x03;
+ if (ep >= MAX_ENDPOINTS) {
+ return -1;
+ }
+
+ /* Set NAK for all RX endpoints during TX */
+ for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
+
+ /* Don't set NAK on DATA IN/CONTROL endpoints */
+ if (ep_ref[epid].sc & USB_DIR_IN) {
+ continue;
+ }
+
+ if (!(usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK))) {
+ unnak |= 1 << epid;
+ }
+
+ mpc8xx_udc_set_nak (epid);
+ }
+
+ mpc8xx_udc_init_tx (&udc_device->bus->endpoint_array[ep],
+ epi->tx_urb);
+ ret = mpc8xx_udc_ep_tx (&udc_device->bus->endpoint_array[ep]);
+
+ /* Remove temporary NAK */
+ for (epid = 1; epid < MAX_ENDPOINTS; epid++) {
+ if (unnak & (1 << epid)) {
+ udc_unset_nak (epid);
+ }
+ }
+
+ return ret;
+}
+
+/* mpc8xx_udc_assign_urb
+ *
+ * Associate a given urb to an endpoint TX or RX transmit/receive buffers
+ */
+static int mpc8xx_udc_assign_urb (int ep, char direction)
+{
+ struct usb_endpoint_instance *epi = 0;
+
+ if (ep >= MAX_ENDPOINTS) {
+ goto err;
+ }
+ epi = &udc_device->bus->endpoint_array[ep];
+ if (!epi) {
+ goto err;
+ }
+
+ if (!ep_ref[ep].urb) {
+ ep_ref[ep].urb = usbd_alloc_urb (udc_device, udc_device->bus->endpoint_array);
+ if (!ep_ref[ep].urb) {
+ goto err;
+ }
+ } else {
+ ep_ref[ep].urb->actual_length = 0;
+ }
+
+ switch (direction) {
+ case USB_DIR_IN:
+ epi->tx_urb = ep_ref[ep].urb;
+ break;
+ case USB_DIR_OUT:
+ epi->rcv_urb = ep_ref[ep].urb;
+ break;
+ default:
+ goto err;
+ }
+ return 0;
+
+ err:
+ udc_state = STATE_ERROR;
+ return -1;
+}
+
+/* udc_setup_ep
+ *
+ * Associate U-Boot software endpoints to mpc8xx endpoint parameter ram
+ * Isochronous endpoints aren't yet supported!
+ */
+void udc_setup_ep (struct usb_device_instance *device, unsigned int ep,
+ struct usb_endpoint_instance *epi)
+{
+ uchar direction = 0;
+ int ep_attrib = 0;
+
+ if (epi && (ep < MAX_ENDPOINTS)) {
+
+ if (ep == 0) {
+ if (epi->rcv_attributes != USB_ENDPOINT_XFER_CONTROL
+ || epi->tx_attributes !=
+ USB_ENDPOINT_XFER_CONTROL) {
+
+ /* ep0 must be a control endpoint */
+ udc_state = STATE_ERROR;
+ return;
+
+ }
+ if (!(ep_ref[ep].sc & EP_ATTACHED)) {
+ mpc8xx_udc_cbd_attach (ep, epi->tx_packetSize,
+ epi->rcv_packetSize);
+ }
+ usbp->usep[ep] = 0x0000;
+ return;
+ }
+
+ if ((epi->endpoint_address & USB_ENDPOINT_DIR_MASK)
+ == USB_DIR_IN) {
+
+ direction = 1;
+ ep_attrib = epi->tx_attributes;
+ epi->rcv_packetSize = 0;
+ ep_ref[ep].sc |= USB_DIR_IN;
+ } else {
+
+ direction = 0;
+ ep_attrib = epi->rcv_attributes;
+ epi->tx_packetSize = 0;
+ ep_ref[ep].sc &= ~USB_DIR_IN;
+ }
+
+ if (mpc8xx_udc_assign_urb (ep, epi->endpoint_address
+ & USB_ENDPOINT_DIR_MASK)) {
+ return;
+ }
+
+ switch (ep_attrib) {
+ case USB_ENDPOINT_XFER_CONTROL:
+ if (!(ep_ref[ep].sc & EP_ATTACHED)) {
+ mpc8xx_udc_cbd_attach (ep,
+ epi->tx_packetSize,
+ epi->rcv_packetSize);
+ }
+ usbp->usep[ep] = ep << 12;
+ epi->rcv_urb = epi->tx_urb = ep_ref[ep].urb;
+
+ break;
+ case USB_ENDPOINT_XFER_BULK:
+ case USB_ENDPOINT_XFER_INT:
+ if (!(ep_ref[ep].sc & EP_ATTACHED)) {
+ if (direction) {
+ mpc8xx_udc_cbd_attach (ep,
+ epi->tx_packetSize,
+ 0);
+ } else {
+ mpc8xx_udc_cbd_attach (ep,
+ 0,
+ epi->rcv_packetSize);
+ }
+ }
+ usbp->usep[ep] = (ep << 12) | ((ep_attrib) << 8);
+
+ break;
+ case USB_ENDPOINT_XFER_ISOC:
+ default:
+ serial_printf ("Error endpoint attrib %d>3\n", ep_attrib);
+ udc_state = STATE_ERROR;
+ break;
+ }
+ }
+
+}
+
+/* udc_connect
+ *
+ * Move state, switch on the USB
+ */
+void udc_connect (void)
+{
+ /* Enable pull-up resistor on D+
+ * TODO: fit a pull-up resistor to drive SE0 for > 2.5us
+ */
+
+ if (udc_state != STATE_ERROR) {
+ udc_state = STATE_READY;
+ usbp->usmod |= USMOD_EN;
+ }
+}
+
+/* udc_disconnect
+ *
+ * Disconnect is not used but, is included for completeness
+ */
+void udc_disconnect (void)
+{
+ /* Disable pull-up resistor on D-
+ * TODO: fix a pullup resistor to control this
+ */
+
+ if (udc_state != STATE_ERROR) {
+ udc_state = STATE_NOT_READY;
+ }
+ usbp->usmod &= ~USMOD_EN;
+}
+
+/* udc_enable
+ *
+ * Grab an EP0 URB, register interest in a subset of USB events
+ */
+void udc_enable (struct usb_device_instance *device)
+{
+ if (udc_state == STATE_ERROR) {
+ return;
+ }
+
+ udc_device = device;
+
+ if (!ep_ref[0].urb) {
+ ep_ref[0].urb = usbd_alloc_urb (device, device->bus->endpoint_array);
+ }
+
+ /* Register interest in all events except SOF, enable transceiver */
+ usbp->usber = 0x03FF;
+ usbp->usbmr = 0x02F7;
+
+ return;
+}
+
+/* udc_disable
+ *
+ * disable the currently hooked device
+ */
+void udc_disable (void)
+{
+ int i = 0;
+
+ if (udc_state == STATE_ERROR) {
+ DBG ("Won't disable UDC. udc_state==STATE_ERROR !\n");
+ return;
+ }
+
+ udc_device = 0;
+
+ for (; i < MAX_ENDPOINTS; i++) {
+ if (ep_ref[i].urb) {
+ usbd_dealloc_urb (ep_ref[i].urb);
+ ep_ref[i].urb = 0;
+ }
+ }
+
+ usbp->usbmr = 0x00;
+ usbp->usmod = ~USMOD_EN;
+ udc_state = STATE_NOT_READY;
+}
+
+/* udc_startup_events
+ *
+ * Enable the specified device
+ */
+void udc_startup_events (struct usb_device_instance *device)
+{
+ udc_enable (device);
+ if (udc_state == STATE_READY) {
+ usbd_device_event_irq (device, DEVICE_CREATE, 0);
+ }
+}
+
+/* udc_set_nak
+ *
+ * Allow upper layers to signal lower layers should not accept more RX data
+ *
+ */
+void udc_set_nak (int epid)
+{
+ if (epid) {
+ mpc8xx_udc_set_nak (epid);
+ }
+}
+
+/* udc_unset_nak
+ *
+ * Suspend sending of NAK tokens for DATA OUT tokens on a given endpoint.
+ * Switch off NAKing on this endpoint to accept more data output from host.
+ *
+ */
+void udc_unset_nak (int epid)
+{
+ if (epid > MAX_ENDPOINTS) {
+ return;
+ }
+
+ if (usbp->usep[epid] & (USEP_THS_NAK | USEP_RHS_NAK)) {
+ usbp->usep[epid] &= ~(USEP_THS_NAK | USEP_RHS_NAK);
+ __asm__ ("eieio");
+ }
+}
+
+/******************************************************************************
+ Static Linkage
+******************************************************************************/
+
+/* udc_state_transition_up
+ * udc_state_transition_down
+ *
+ * Helper functions to implement device state changes. The device states and
+ * the events that transition between them are:
+ *
+ * STATE_ATTACHED
+ * || /\
+ * \/ ||
+ * DEVICE_HUB_CONFIGURED DEVICE_HUB_RESET
+ * || /\
+ * \/ ||
+ * STATE_POWERED
+ * || /\
+ * \/ ||
+ * DEVICE_RESET DEVICE_POWER_INTERRUPTION
+ * || /\
+ * \/ ||
+ * STATE_DEFAULT
+ * || /\
+ * \/ ||
+ * DEVICE_ADDRESS_ASSIGNED DEVICE_RESET
+ * || /\
+ * \/ ||
+ * STATE_ADDRESSED
+ * || /\
+ * \/ ||
+ * DEVICE_CONFIGURED DEVICE_DE_CONFIGURED
+ * || /\
+ * \/ ||
+ * STATE_CONFIGURED
+ *
+ * udc_state_transition_up transitions up (in the direction from STATE_ATTACHED
+ * to STATE_CONFIGURED) from the specified initial state to the specified final
+ * state, passing through each intermediate state on the way. If the initial
+ * state is at or above (i.e. nearer to STATE_CONFIGURED) the final state, then
+ * no state transitions will take place.
+ *
+ * udc_state_transition_down transitions down (in the direction from
+ * STATE_CONFIGURED to STATE_ATTACHED) from the specified initial state to the
+ * specified final state, passing through each intermediate state on the way.
+ * If the initial state is at or below (i.e. nearer to STATE_ATTACHED) the final
+ * state, then no state transitions will take place.
+ *
+ */
+
+static void mpc8xx_udc_state_transition_up (usb_device_state_t initial,
+ usb_device_state_t final)
+{
+ if (initial < final) {
+ switch (initial) {
+ case STATE_ATTACHED:
+ usbd_device_event_irq (udc_device,
+ DEVICE_HUB_CONFIGURED, 0);
+ if (final == STATE_POWERED)
+ break;
+ case STATE_POWERED:
+ usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
+ if (final == STATE_DEFAULT)
+ break;
+ case STATE_DEFAULT:
+ usbd_device_event_irq (udc_device,
+ DEVICE_ADDRESS_ASSIGNED, 0);
+ if (final == STATE_ADDRESSED)
+ break;
+ case STATE_ADDRESSED:
+ usbd_device_event_irq (udc_device, DEVICE_CONFIGURED,
+ 0);
+ case STATE_CONFIGURED:
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+static void mpc8xx_udc_state_transition_down (usb_device_state_t initial,
+ usb_device_state_t final)
+{
+ if (initial > final) {
+ switch (initial) {
+ case STATE_CONFIGURED:
+ usbd_device_event_irq (udc_device,
+ DEVICE_DE_CONFIGURED, 0);
+ if (final == STATE_ADDRESSED)
+ break;
+ case STATE_ADDRESSED:
+ usbd_device_event_irq (udc_device, DEVICE_RESET, 0);
+ if (final == STATE_DEFAULT)
+ break;
+ case STATE_DEFAULT:
+ usbd_device_event_irq (udc_device,
+ DEVICE_POWER_INTERRUPTION, 0);
+ if (final == STATE_POWERED)
+ break;
+ case STATE_POWERED:
+ usbd_device_event_irq (udc_device, DEVICE_HUB_RESET,
+ 0);
+ case STATE_ATTACHED:
+ break;
+ default:
+ break;
+ }
+ }
+}
+
+/* mpc8xx_udc_stall
+ *
+ * Force returning of STALL tokens on the given endpoint. Protocol or function
+ * STALL conditions are permissable here
+ */
+static void mpc8xx_udc_stall (unsigned int ep)
+{
+ usbp->usep[ep] |= STALL_BITMASK;
+}
+
+/* mpc8xx_udc_set_nak
+ *
+ * Force returning of NAK responses for the given endpoint as a kind of very
+ * simple flow control
+ */
+static void mpc8xx_udc_set_nak (unsigned int ep)
+{
+ usbp->usep[ep] |= NAK_BITMASK;
+ __asm__ ("eieio");
+}
+
+/* mpc8xx_udc_handle_txerr
+ *
+ * Handle errors relevant to TX. Return a status code to allow calling
+ * indicative of what if anything happened
+ */
+static short mpc8xx_udc_handle_txerr ()
+{
+ short ep = 0, ret = 0;
+
+ for (; ep < TX_RING_SIZE; ep++) {
+ if (usbp->usber & (0x10 << ep)) {
+
+ /* Timeout or underrun */
+ if (tx_cbd[ep]->cbd_sc & 0x06) {
+ ret = 1;
+ mpc8xx_udc_flush_tx_fifo (ep);
+
+ } else {
+ if (usbp->usep[ep] & STALL_BITMASK) {
+ if (!ep) {
+ usbp->usep[ep] &= ~STALL_BITMASK;
+ }
+ } /* else NAK */
+ }
+ usbp->usber |= (0x10 << ep);
+ }
+ }
+ return ret;
+}
+
+/* mpc8xx_udc_advance_rx
+ *
+ * Advance cbd rx
+ */
+static void mpc8xx_udc_advance_rx (volatile cbd_t ** rx_cbdp, int epid)
+{
+ if ((*rx_cbdp)->cbd_sc & RX_BD_W) {
+ *rx_cbdp = (volatile cbd_t *) (endpoints[epid]->rbase + CFG_IMMR);
+
+ } else {
+ (*rx_cbdp)++;
+ }
+}
+
+
+/* mpc8xx_udc_flush_tx_fifo
+ *
+ * Flush a given TX fifo. Assumes one tx cbd per endpoint
+ */
+static void mpc8xx_udc_flush_tx_fifo (int epid)
+{
+ volatile cbd_t *tx_cbdp = 0;
+
+ if (epid > MAX_ENDPOINTS) {
+ return;
+ }
+
+ /* TX stop */
+ immr->im_cpm.cp_cpcr = ((epid << 2) | 0x1D01);
+ __asm__ ("eieio");
+ while (immr->im_cpm.cp_cpcr & 0x01);
+
+ usbp->uscom = 0x40 | 0;
+
+ /* reset ring */
+ tx_cbdp = (cbd_t *) (endpoints[epid]->tbptr + CFG_IMMR);
+ tx_cbdp->cbd_sc = (TX_BD_I | TX_BD_W);
+
+
+ endpoints[epid]->tptr = endpoints[epid]->tbase;
+ endpoints[epid]->tstate = 0x00;
+ endpoints[epid]->tbcnt = 0x00;
+
+ /* TX start */
+ immr->im_cpm.cp_cpcr = ((epid << 2) | 0x2D01);
+ __asm__ ("eieio");
+ while (immr->im_cpm.cp_cpcr & 0x01);
+
+ return;
+}
+
+/* mpc8xx_udc_flush_rx_fifo
+ *
+ * For the sake of completeness of the namespace, it seems like
+ * a good-design-decision (tm) to include mpc8xx_udc_flush_rx_fifo();
+ * If RX_BD_E is true => a driver bug either here or in an upper layer
+ * not polling frequently enough. If RX_BD_E is true we have told the host
+ * we have accepted data but, the CPM found it had no-where to put that data
+ * which needless to say would be a bad thing.
+ */
+static void mpc8xx_udc_flush_rx_fifo ()
+{
+ int i = 0;
+
+ for (i = 0; i < RX_RING_SIZE; i++) {
+ if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
+ ERR ("buf %p used rx data len = 0x%x sc=0x%x!\n",
+ rx_cbd[i], rx_cbd[i]->cbd_datlen,
+ rx_cbd[i]->cbd_sc);
+
+ }
+ }
+ ERR ("BUG : Input over-run\n");
+}
+
+/* mpc8xx_udc_clear_rxbd
+ *
+ * Release control of RX CBD to CP.
+ */
+static void mpc8xx_udc_clear_rxbd (volatile cbd_t * rx_cbdp)
+{
+ rx_cbdp->cbd_datlen = 0x0000;
+ rx_cbdp->cbd_sc = ((rx_cbdp->cbd_sc & RX_BD_W) | (RX_BD_E | RX_BD_I));
+ __asm__ ("eieio");
+}
+
+/* mpc8xx_udc_tx_irq
+ *
+ * Parse for tx timeout, control RX or USB reset/busy conditions
+ * Return -1 on timeout, -2 on fatal error, else return zero
+ */
+static int mpc8xx_udc_tx_irq (int ep)
+{
+ int i = 0;
+
+ if (usbp->usber & (USB_TX_ERRMASK)) {
+ if (mpc8xx_udc_handle_txerr ()) {
+ /* Timeout, controlling function must retry send */
+ return -1;
+ }
+ }
+
+ if (usbp->usber & (USB_E_RESET | USB_E_BSY)) {
+ /* Fatal, abandon TX transaction */
+ return -2;
+ }
+
+ if (usbp->usber & USB_E_RXB) {
+ for (i = 0; i < RX_RING_SIZE; i++) {
+ if (!(rx_cbd[i]->cbd_sc & RX_BD_E)) {
+ if ((rx_cbd[i] == ep_ref[0].prx) || ep) {
+ return -2;
+ }
+ }
+ }
+ }
+
+ return 0;
+}
+
+/* mpc8xx_udc_ep_tx
+ *
+ * Transmit in a re-entrant fashion outbound USB packets.
+ * Implement retry/timeout mechanism described in USB specification
+ * Toggle DATA0/DATA1 pids as necessary
+ * Introduces non-standard tx_retry. The USB standard has no scope for slave
+ * devices to give up TX, however tx_retry stops us getting stuck in an endless
+ * TX loop.
+ */
+static int mpc8xx_udc_ep_tx (struct usb_endpoint_instance *epi)
+{
+ struct urb *urb = epi->tx_urb;
+ volatile cbd_t *tx_cbdp = 0;
+ unsigned int ep = 0, pkt_len = 0, x = 0, tx_retry = 0;
+ int ret = 0;
+
+ if (!epi || (epi->endpoint_address & 0x03) >= MAX_ENDPOINTS || !urb) {
+ return -1;
+ }
+
+ ep = epi->endpoint_address & 0x03;
+ tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CFG_IMMR);
+
+ if (tx_cbdp->cbd_sc & TX_BD_R || usbp->usber & USB_E_TXB) {
+ mpc8xx_udc_flush_tx_fifo (ep);
+ usbp->usber |= USB_E_TXB;
+ };
+
+ while (tx_retry++ < 100) {
+ ret = mpc8xx_udc_tx_irq (ep);
+ if (ret == -1) {
+ /* ignore timeout here */
+ } else if (ret == -2) {
+ /* Abandon TX */
+ mpc8xx_udc_flush_tx_fifo (ep);
+ return -1;
+ }
+
+ tx_cbdp = (cbd_t *) (endpoints[ep]->tbptr + CFG_IMMR);
+ while (tx_cbdp->cbd_sc & TX_BD_R) {
+ };
+ tx_cbdp->cbd_sc = (tx_cbdp->cbd_sc & TX_BD_W);
+
+ pkt_len = urb->actual_length - epi->sent;
+
+ if (pkt_len > epi->tx_packetSize || pkt_len > EP_MAX_PKT) {
+ pkt_len = MIN (epi->tx_packetSize, EP_MAX_PKT);
+ }
+
+ for (x = 0; x < pkt_len; x++) {
+ *((unsigned char *) (tx_cbdp->cbd_bufaddr + x)) =
+ urb->buffer[epi->sent + x];
+ }
+ tx_cbdp->cbd_datlen = pkt_len;
+ tx_cbdp->cbd_sc |= (CBD_TX_BITMASK | ep_ref[ep].pid);
+ __asm__ ("eieio");
+
+#ifdef __SIMULATE_ERROR__
+ if (++err_poison_test == 2) {
+ err_poison_test = 0;
+ tx_cbdp->cbd_sc &= ~TX_BD_TC;
+ }
+#endif
+
+ usbp->uscom = (USCOM_STR | ep);
+
+ while (!(usbp->usber & USB_E_TXB)) {
+ ret = mpc8xx_udc_tx_irq (ep);
+ if (ret == -1) {
+ /* TX timeout */
+ break;
+ } else if (ret == -2) {
+ if (usbp->usber & USB_E_TXB) {
+ usbp->usber |= USB_E_TXB;
+ }
+ mpc8xx_udc_flush_tx_fifo (ep);
+ return -1;
+ }
+ };
+
+ if (usbp->usber & USB_E_TXB) {
+ usbp->usber |= USB_E_TXB;
+ }
+
+ /* ACK must be present <= 18bit times from TX */
+ if (ret == -1) {
+ continue;
+ }
+
+ /* TX ACK : USB 2.0 8.7.2, Toggle PID, Advance TX */
+ epi->sent += pkt_len;
+ epi->last = MIN (urb->actual_length - epi->sent, epi->tx_packetSize);
+ TOGGLE_TX_PID (ep_ref[ep].pid);
+
+ if (epi->sent >= epi->tx_urb->actual_length) {
+
+ epi->tx_urb->actual_length = 0;
+ epi->sent = 0;
+
+ if (ep_ref[ep].sc & EP_SEND_ZLP) {
+ ep_ref[ep].sc &= ~EP_SEND_ZLP;
+ } else {
+ return 0;
+ }
+ }
+ }
+
+ ERR ("TX fail, endpoint 0x%x tx bytes 0x%x/0x%x\n", ep, epi->sent,
+ epi->tx_urb->actual_length);
+
+ return -1;
+}
+
+/* mpc8xx_udc_dump_request
+ *
+ * Dump a control request to console
+ */
+static void mpc8xx_udc_dump_request (struct usb_device_request *request)
+{
+ DBG ("bmRequestType:%02x bRequest:%02x wValue:%04x "
+ "wIndex:%04x wLength:%04x ?\n",
+ request->bmRequestType,
+ request->bRequest,
+ request->wValue, request->wIndex, request->wLength);
+
+ return;
+}
+
+/* mpc8xx_udc_ep0_rx_setup
+ *
+ * Decode received ep0 SETUP packet. return non-zero on error
+ */
+static int mpc8xx_udc_ep0_rx_setup (volatile cbd_t * rx_cbdp)
+{
+ unsigned int x = 0;
+ struct urb *purb = ep_ref[0].urb;
+ struct usb_endpoint_instance *epi =
+ &udc_device->bus->endpoint_array[0];
+
+ for (; x < rx_cbdp->cbd_datlen; x++) {
+ *(((unsigned char *) &ep_ref[0].urb->device_request) + x) =
+ *((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
+ }
+
+ mpc8xx_udc_clear_rxbd (rx_cbdp);
+
+ if (ep0_recv_setup (purb)) {
+ mpc8xx_udc_dump_request (&purb->device_request);
+ return -1;
+ }
+
+ if ((purb->device_request.bmRequestType & USB_REQ_DIRECTION_MASK)
+ == USB_REQ_HOST2DEVICE) {
+
+ switch (purb->device_request.bRequest) {
+ case USB_REQ_SET_ADDRESS:
+ /* Send the Status OUT ZLP */
+ ep_ref[0].pid = TX_BD_PID_DATA1;
+ purb->actual_length = 0;
+ mpc8xx_udc_init_tx (epi, purb);
+ mpc8xx_udc_ep_tx (epi);
+
+ /* Move to the addressed state */
+ usbp->usaddr = udc_device->address;
+ mpc8xx_udc_state_transition_up (udc_device->device_state,
+ STATE_ADDRESSED);
+ return 0;
+
+ case USB_REQ_SET_CONFIGURATION:
+ if (!purb->device_request.wValue) {
+ /* Respond at default address */
+ usbp->usaddr = 0x00;
+ mpc8xx_udc_state_transition_down (udc_device->device_state,
+ STATE_ADDRESSED);
+ } else {
+ /* TODO: Support multiple configurations */
+ mpc8xx_udc_state_transition_up (udc_device->device_state,
+ STATE_CONFIGURED);
+ for (x = 1; x < MAX_ENDPOINTS; x++) {
+ if ((udc_device->bus->endpoint_array[x].endpoint_address & USB_ENDPOINT_DIR_MASK)
+ == USB_DIR_IN) {
+ ep_ref[x].pid = TX_BD_PID_DATA0;
+ } else {
+ ep_ref[x].pid = RX_BD_PID_DATA0;
+ }
+ /* Set configuration must unstall endpoints */
+ usbp->usep[x] &= ~STALL_BITMASK;
+ }
+ }
+ break;
+ default:
+ /* CDC/Vendor specific */
+ break;
+ }
+
+ /* Send ZLP as ACK in Status OUT phase */
+ ep_ref[0].pid = TX_BD_PID_DATA1;
+ purb->actual_length = 0;
+ mpc8xx_udc_init_tx (epi, purb);
+ mpc8xx_udc_ep_tx (epi);
+
+ } else {
+
+ if (purb->actual_length) {
+ ep_ref[0].pid = TX_BD_PID_DATA1;
+ mpc8xx_udc_init_tx (epi, purb);
+
+ if (!(purb->actual_length % EP0_MAX_PACKET_SIZE)) {
+ ep_ref[0].sc |= EP_SEND_ZLP;
+ }
+
+ if (purb->device_request.wValue ==
+ USB_DESCRIPTOR_TYPE_DEVICE) {
+ if (le16_to_cpu (purb->device_request.wLength)
+ > purb->actual_length) {
+ /* Send EP0_MAX_PACKET_SIZE bytes
+ * unless correct size requested.
+ */
+ if (purb->actual_length > epi->tx_packetSize) {
+ purb->actual_length = epi->tx_packetSize;
+ }
+ }
+ }
+ mpc8xx_udc_ep_tx (epi);
+
+ } else {
+ /* Corrupt SETUP packet? */
+ ERR ("Zero length data or SETUP with DATA-IN phase ?\n");
+ return 1;
+ }
+ }
+ return 0;
+}
+
+/* mpc8xx_udc_init_tx
+ *
+ * Setup some basic parameters for a TX transaction
+ */
+static void mpc8xx_udc_init_tx (struct usb_endpoint_instance *epi,
+ struct urb *tx_urb)
+{
+ epi->sent = 0;
+ epi->last = 0;
+ epi->tx_urb = tx_urb;
+}
+
+/* mpc8xx_udc_ep0_rx
+ *
+ * Receive ep0/control USB data. Parse and possibly send a response.
+ */
+static void mpc8xx_udc_ep0_rx (volatile cbd_t * rx_cbdp)
+{
+ if (rx_cbdp->cbd_sc & RX_BD_PID_SETUP) {
+
+ /* Unconditionally accept SETUP packets */
+ if (mpc8xx_udc_ep0_rx_setup (rx_cbdp)) {
+ mpc8xx_udc_stall (0);
+ }
+
+ } else {
+
+ mpc8xx_udc_clear_rxbd (rx_cbdp);
+
+ if ((rx_cbdp->cbd_datlen - 2)) {
+ /* SETUP with a DATA phase
+ * outside of SETUP packet.
+ * Reply with STALL.
+ */
+ mpc8xx_udc_stall (0);
+ }
+ }
+}
+
+/* mpc8xx_udc_epn_rx
+ *
+ * Receive some data from cbd into USB system urb data abstraction
+ * Upper layers should NAK if there is insufficient RX data space
+ */
+static int mpc8xx_udc_epn_rx (unsigned int epid, volatile cbd_t * rx_cbdp)
+{
+ struct usb_endpoint_instance *epi = 0;
+ struct urb *urb = 0;
+ unsigned int x = 0;
+
+ if (epid >= MAX_ENDPOINTS || !rx_cbdp->cbd_datlen) {
+ return 0;
+ }
+
+ /* USB 2.0 PDF section 8.6.4
+ * Discard data with invalid PID it is a resend.
+ */
+ if (ep_ref[epid].pid != (rx_cbdp->cbd_sc & 0xC0)) {
+ return 1;
+ }
+ TOGGLE_RX_PID (ep_ref[epid].pid);
+
+ epi = &udc_device->bus->endpoint_array[epid];
+ urb = epi->rcv_urb;
+
+ for (; x < (rx_cbdp->cbd_datlen - 2); x++) {
+ *((unsigned char *) (urb->buffer + urb->actual_length + x)) =
+ *((unsigned char *) (rx_cbdp->cbd_bufaddr + x));
+ }
+
+ if (x) {
+ usbd_rcv_complete (epi, x, 0);
+ if (ep_ref[epid].urb->status == RECV_ERROR) {
+ DBG ("RX error unset NAK\n");
+ udc_unset_nak (epid);
+ }
+ }
+ return x;
+}
+
+/* mpc8xx_udc_clock_init
+ *
+ * Obtain a clock reference for Full Speed Signaling
+ */
+static void mpc8xx_udc_clock_init (volatile immap_t * immr,
+ volatile cpm8xx_t * cp)
+{
+
+#if defined(CFG_USB_EXTC_CLK)
+
+ /* This has been tested with a 48MHz crystal on CLK6 */
+ switch (CFG_USB_EXTC_CLK) {
+ case 1:
+ immr->im_ioport.iop_papar |= 0x0100;
+ immr->im_ioport.iop_padir &= ~0x0100;
+ cp->cp_sicr |= 0x24;
+ break;
+ case 2:
+ immr->im_ioport.iop_papar |= 0x0200;
+ immr->im_ioport.iop_padir &= ~0x0200;
+ cp->cp_sicr |= 0x2D;
+ break;
+ case 3:
+ immr->im_ioport.iop_papar |= 0x0400;
+ immr->im_ioport.iop_padir &= ~0x0400;
+ cp->cp_sicr |= 0x36;
+ break;
+ case 4:
+ immr->im_ioport.iop_papar |= 0x0800;
+ immr->im_ioport.iop_padir &= ~0x0800;
+ cp->cp_sicr |= 0x3F;
+ break;
+ default:
+ udc_state = STATE_ERROR;
+ break;
+ }
+
+#elif defined(CFG_USB_BRGCLK)
+
+ /* This has been tested with brgclk == 50MHz */
+ int divisor = 0;
+
+ if (gd->cpu_clk < 48000000L) {
+ ERR ("brgclk is too slow for full-speed USB!\n");
+ udc_state = STATE_ERROR;
+ return;
+ }
+
+ /* Assume the brgclk is 'good enough', we want !(gd->cpu_clk%48Mhz)
+ * but, can /probably/ live with close-ish alternative rates.
+ */
+ divisor = (gd->cpu_clk / 48000000L) - 1;
+ cp->cp_sicr &= ~0x0000003F;
+
+ switch (CFG_USB_BRGCLK) {
+ case 1:
+ cp->cp_brgc1 |= (divisor | CPM_BRG_EN);
+ cp->cp_sicr &= ~0x2F;
+ break;
+ case 2:
+ cp->cp_brgc2 |= (divisor | CPM_BRG_EN);
+ cp->cp_sicr |= 0x00000009;
+ break;
+ case 3:
+ cp->cp_brgc3 |= (divisor | CPM_BRG_EN);
+ cp->cp_sicr |= 0x00000012;
+ break;
+ case 4:
+ cp->cp_brgc4 = (divisor | CPM_BRG_EN);
+ cp->cp_sicr |= 0x0000001B;
+ break;
+ default:
+ udc_state = STATE_ERROR;
+ break;
+ }
+
+#else
+#error "CFG_USB_EXTC_CLK or CFG_USB_BRGCLK must be defined"
+#endif
+
+}
+
+/* mpc8xx_udc_cbd_attach
+ *
+ * attach a cbd to and endpoint
+ */
+static void mpc8xx_udc_cbd_attach (int ep, uchar tx_size, uchar rx_size)
+{
+
+ if (!tx_cbd[ep] || !rx_cbd[ep] || ep >= MAX_ENDPOINTS) {
+ udc_state = STATE_ERROR;
+ return;
+ }
+
+ if (tx_size > USB_MAX_PKT || rx_size > USB_MAX_PKT ||
+ (!tx_size && !rx_size)) {
+ udc_state = STATE_ERROR;
+ return;
+ }
+
+ /* Attach CBD to appropiate Parameter RAM Endpoint data structure */
+ if (rx_size) {
+ endpoints[ep]->rbase = (u32) rx_cbd[rx_ct];
+ endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
+ rx_ct++;
+
+ if (!ep) {
+
+ endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
+ rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
+ rx_ct++;
+
+ } else {
+ rx_ct += 2;
+ endpoints[ep]->rbptr = (u32) rx_cbd[rx_ct];
+ rx_cbd[rx_ct]->cbd_sc |= RX_BD_W;
+ rx_ct++;
+ }
+
+ /* Where we expect to RX data on this endpoint */
+ ep_ref[ep].prx = rx_cbd[rx_ct - 1];
+ } else {
+
+ ep_ref[ep].prx = 0;
+ endpoints[ep]->rbase = 0;
+ endpoints[ep]->rbptr = 0;
+ }
+
+ if (tx_size) {
+ endpoints[ep]->tbase = (u32) tx_cbd[tx_ct];
+ endpoints[ep]->tbptr = (u32) tx_cbd[tx_ct];
+ tx_ct++;
+ } else {
+ endpoints[ep]->tbase = 0;
+ endpoints[ep]->tbptr = 0;
+ }
+
+ endpoints[ep]->tstate = 0;
+ endpoints[ep]->tbcnt = 0;
+ endpoints[ep]->mrblr = EP_MAX_PKT;
+ endpoints[ep]->rfcr = 0x18;
+ endpoints[ep]->tfcr = 0x18;
+ ep_ref[ep].sc |= EP_ATTACHED;
+
+ DBG ("ep %d rbase 0x%08x rbptr 0x%08x tbase 0x%08x tbptr 0x%08x prx = %p\n",
+ ep, endpoints[ep]->rbase, endpoints[ep]->rbptr,
+ endpoints[ep]->tbase, endpoints[ep]->tbptr,
+ ep_ref[ep].prx);
+
+ return;
+}
+
+/* mpc8xx_udc_cbd_init
+ *
+ * Allocate space for a cbd and allocate TX/RX data space
+ */
+static void mpc8xx_udc_cbd_init (void)
+{
+ int i = 0;
+
+ for (; i < TX_RING_SIZE; i++) {
+ tx_cbd[i] = (cbd_t *)
+ mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
+ }
+
+ for (i = 0; i < RX_RING_SIZE; i++) {
+ rx_cbd[i] = (cbd_t *)
+ mpc8xx_udc_alloc (sizeof (cbd_t), sizeof (int));
+ }
+
+ for (i = 0; i < TX_RING_SIZE; i++) {
+ tx_cbd[i]->cbd_bufaddr =
+ mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
+
+ tx_cbd[i]->cbd_sc = (TX_BD_I | TX_BD_W);
+ tx_cbd[i]->cbd_datlen = 0x0000;
+ }
+
+
+ for (i = 0; i < RX_RING_SIZE; i++) {
+ rx_cbd[i]->cbd_bufaddr =
+ mpc8xx_udc_alloc (EP_MAX_PKT, sizeof (int));
+ rx_cbd[i]->cbd_sc = (RX_BD_I | RX_BD_E);
+ rx_cbd[i]->cbd_datlen = 0x0000;
+
+ }
+
+ return;
+}
+
+/* mpc8xx_udc_endpoint_init
+ *
+ * Attach an endpoint to some dpram
+ */
+static void mpc8xx_udc_endpoint_init (void)
+{
+ int i = 0;
+
+ for (; i < MAX_ENDPOINTS; i++) {
+ endpoints[i] = (usb_epb_t *)
+ mpc8xx_udc_alloc (sizeof (usb_epb_t), 32);
+ }
+}
+
+/* mpc8xx_udc_alloc
+ *
+ * Grab the address of some dpram
+ */
+static u32 mpc8xx_udc_alloc (u32 data_size, u32 alignment)
+{
+ u32 retaddr = address_base;
+
+ while (retaddr % alignment) {
+ retaddr++;
+ }
+ address_base += data_size;
+
+ return retaddr;
+}
+
+#endif /* CONFIG_MPC885_FAMILY && CONFIG_USB_DEVICE) */
diff --git a/drivers/usbdcore_omap1510.c b/drivers/usbdcore_omap1510.c
index 1d54a63..84bb936 100644
--- a/drivers/usbdcore_omap1510.c
+++ b/drivers/usbdcore_omap1510.c
@@ -1517,4 +1517,31 @@
udc_enable (device);
}
+/**
+ * udc_irq - do pseudo interrupts
+ */
+void udc_irq(void)
+{
+ /* Loop while we have interrupts.
+ * If we don't do this, the input chain
+ * polling delay is likely to miss
+ * host requests.
+ */
+ while (inw (UDC_IRQ_SRC) & ~UDC_SOF_Flg) {
+ /* Handle any new IRQs */
+ omap1510_udc_irq ();
+ omap1510_udc_noniso_irq ();
+ }
+}
+
+/* Flow control */
+void udc_set_nak(int epid)
+{
+ /* TODO: implement this functionality in omap1510 */
+}
+
+void udc_unset_nak (int epid)
+{
+ /* TODO: implement this functionality in omap1510 */
+}
#endif
diff --git a/drivers/usbtty.c b/drivers/usbtty.c
index ce4a12e..a3b5013 100644
--- a/drivers/usbtty.c
+++ b/drivers/usbtty.c
@@ -2,6 +2,9 @@
* (C) Copyright 2003
* Gerry Hamel, geh@ti.com, Texas Instruments
*
+ * (C) Copyright 2006
+ * Bryan O'Donoghue, bodonoghue@codehermit.ie
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@@ -25,20 +28,42 @@
#include <circbuf.h>
#include <devices.h>
#include "usbtty.h"
+#include "usb_cdc_acm.h"
+#include "usbdescriptors.h"
+#include <config.h> /* If defined, override Linux identifiers with
+ * vendor specific ones */
#if 0
-#define TTYDBG(fmt,args...) serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args)
+#define TTYDBG(fmt,args...)\
+ serial_printf("[%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args)
#else
#define TTYDBG(fmt,args...) do{}while(0)
#endif
-#if 0
-#define TTYERR(fmt,args...) serial_printf("ERROR![%s] %s %d: "fmt, __FILE__,__FUNCTION__,__LINE__,##args)
+#if 1
+#define TTYERR(fmt,args...)\
+ serial_printf("ERROR![%s] %s %d: "fmt, __FILE__,__FUNCTION__,\
+ __LINE__,##args)
#else
#define TTYERR(fmt,args...) do{}while(0)
#endif
/*
+ * Defines
+ */
+#define NUM_CONFIGS 1
+#define MAX_INTERFACES 2
+#define NUM_ENDPOINTS 3
+#define ACM_TX_ENDPOINT 3
+#define ACM_RX_ENDPOINT 2
+#define GSERIAL_TX_ENDPOINT 2
+#define GSERIAL_RX_ENDPOINT 1
+#define NUM_ACM_INTERFACES 2
+#define NUM_GSERIAL_INTERFACES 1
+#define CONFIG_USBD_DATA_INTERFACE_STR "Bulk Data Interface"
+#define CONFIG_USBD_CTRL_INTERFACE_STR "Control Interface"
+
+/*
* Buffers to hold input and output data
*/
#define USBTTY_BUFFER_SIZE 256
@@ -50,157 +75,336 @@
* Instance variables
*/
static device_t usbttydev;
-static struct usb_device_instance device_instance[1];
-static struct usb_bus_instance bus_instance[1];
+static struct usb_device_instance device_instance[1];
+static struct usb_bus_instance bus_instance[1];
static struct usb_configuration_instance config_instance[NUM_CONFIGS];
-static struct usb_interface_instance interface_instance[NUM_INTERFACES];
-static struct usb_alternate_instance alternate_instance[NUM_INTERFACES];
-static struct usb_endpoint_instance endpoint_instance[NUM_ENDPOINTS+1]; /* one extra for control endpoint */
-
-/*
- * Static allocation of urbs
- */
-#define RECV_ENDPOINT 1
-#define TX_ENDPOINT 2
+static struct usb_interface_instance interface_instance[MAX_INTERFACES];
+static struct usb_alternate_instance alternate_instance[MAX_INTERFACES];
+/* one extra for control endpoint */
+static struct usb_endpoint_instance endpoint_instance[NUM_ENDPOINTS+1];
/*
* Global flag
*/
int usbtty_configured_flag = 0;
-
/*
* Serial number
*/
static char serial_number[16];
+
/*
- * Descriptors
+ * Descriptors, Strings, Local variables.
*/
+
+/* defined and used by usbdcore_ep0.c */
+extern struct usb_string_descriptor **usb_strings;
+
+/* Indicies, References */
+static unsigned short rx_endpoint = 0;
+static unsigned short tx_endpoint = 0;
+static unsigned short interface_count = 0;
+static struct usb_string_descriptor *usbtty_string_table[STR_COUNT];
+
+/* USB Descriptor Strings */
static u8 wstrLang[4] = {4,USB_DT_STRING,0x9,0x4};
static u8 wstrManufacturer[2 + 2*(sizeof(CONFIG_USBD_MANUFACTURER)-1)];
static u8 wstrProduct[2 + 2*(sizeof(CONFIG_USBD_PRODUCT_NAME)-1)];
static u8 wstrSerial[2 + 2*(sizeof(serial_number) - 1)];
static u8 wstrConfiguration[2 + 2*(sizeof(CONFIG_USBD_CONFIGURATION_STR)-1)];
-static u8 wstrInterface[2 + 2*(sizeof(CONFIG_USBD_INTERFACE_STR)-1)];
+static u8 wstrDataInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];
+static u8 wstrCtrlInterface[2 + 2*(sizeof(CONFIG_USBD_DATA_INTERFACE_STR)-1)];
-static struct usb_string_descriptor *usbtty_string_table[] = {
- (struct usb_string_descriptor*)wstrLang,
- (struct usb_string_descriptor*)wstrManufacturer,
- (struct usb_string_descriptor*)wstrProduct,
- (struct usb_string_descriptor*)wstrSerial,
- (struct usb_string_descriptor*)wstrConfiguration,
- (struct usb_string_descriptor*)wstrInterface
-};
-extern struct usb_string_descriptor **usb_strings; /* defined and used by omap1510_ep0.c */
-
+/* Standard USB Data Structures */
+static struct usb_interface_descriptor interface_descriptors[MAX_INTERFACES];
+static struct usb_endpoint_descriptor *ep_descriptor_ptrs[NUM_ENDPOINTS];
+static struct usb_configuration_descriptor *configuration_descriptor = 0;
static struct usb_device_descriptor device_descriptor = {
- bLength: sizeof(struct usb_device_descriptor),
- bDescriptorType: USB_DT_DEVICE,
- bcdUSB: USB_BCD_VERSION,
- bDeviceClass: USBTTY_DEVICE_CLASS,
- bDeviceSubClass: USBTTY_DEVICE_SUBCLASS,
- bDeviceProtocol: USBTTY_DEVICE_PROTOCOL,
- bMaxPacketSize0: EP0_MAX_PACKET_SIZE,
- idVendor: CONFIG_USBD_VENDORID,
- idProduct: CONFIG_USBD_PRODUCTID,
- bcdDevice: USBTTY_BCD_DEVICE,
- iManufacturer: STR_MANUFACTURER,
- iProduct: STR_PRODUCT,
- iSerialNumber: STR_SERIAL,
- bNumConfigurations: NUM_CONFIGS
- };
-static struct usb_configuration_descriptor config_descriptors[NUM_CONFIGS] = {
- {
- bLength: sizeof(struct usb_configuration_descriptor),
- bDescriptorType: USB_DT_CONFIG,
- wTotalLength: (sizeof(struct usb_configuration_descriptor)*NUM_CONFIGS) +
- (sizeof(struct usb_interface_descriptor)*NUM_INTERFACES) +
- (sizeof(struct usb_endpoint_descriptor)*NUM_ENDPOINTS),
- bNumInterfaces: NUM_INTERFACES,
- bConfigurationValue: 1,
- iConfiguration: STR_CONFIG,
- bmAttributes: BMATTRIBUTE_SELF_POWERED | BMATTRIBUTE_RESERVED,
- bMaxPower: USBTTY_MAXPOWER
- },
+ .bLength = sizeof(struct usb_device_descriptor),
+ .bDescriptorType = USB_DT_DEVICE,
+ .bcdUSB = cpu_to_le16(USB_BCD_VERSION),
+ .bDeviceSubClass = 0x00,
+ .bDeviceProtocol = 0x00,
+ .bMaxPacketSize0 = EP0_MAX_PACKET_SIZE,
+ .idVendor = cpu_to_le16(CONFIG_USBD_VENDORID),
+ .bcdDevice = cpu_to_le16(USBTTY_BCD_DEVICE),
+ .iManufacturer = STR_MANUFACTURER,
+ .iProduct = STR_PRODUCT,
+ .iSerialNumber = STR_SERIAL,
+ .bNumConfigurations = NUM_CONFIGS
};
-static struct usb_interface_descriptor interface_descriptors[NUM_INTERFACES] = {
- {
- bLength: sizeof(struct usb_interface_descriptor),
- bDescriptorType: USB_DT_INTERFACE,
- bInterfaceNumber: 0,
- bAlternateSetting: 0,
- bNumEndpoints: NUM_ENDPOINTS,
- bInterfaceClass: USBTTY_INTERFACE_CLASS,
- bInterfaceSubClass: USBTTY_INTERFACE_SUBCLASS,
- bInterfaceProtocol: USBTTY_INTERFACE_PROTOCOL,
- iInterface: STR_INTERFACE
- },
+
+
+/*
+ * Static CDC ACM specific descriptors
+ */
+
+struct acm_config_desc {
+ struct usb_configuration_descriptor configuration_desc;
+
+ /* Master Interface */
+ struct usb_interface_descriptor interface_desc;
+
+ struct usb_class_header_function_descriptor usb_class_header;
+ struct usb_class_call_management_descriptor usb_class_call_mgt;
+ struct usb_class_abstract_control_descriptor usb_class_acm;
+ struct usb_class_union_function_descriptor usb_class_union;
+ struct usb_endpoint_descriptor notification_endpoint;
+
+ /* Slave Interface */
+ struct usb_interface_descriptor data_class_interface;
+ struct usb_endpoint_descriptor
+ data_endpoints[NUM_ENDPOINTS-1] __attribute__((packed));
+} __attribute__((packed));
+
+static struct acm_config_desc acm_configuration_descriptors[NUM_CONFIGS] = {
+ {
+ .configuration_desc ={
+ .bLength =
+ sizeof(struct usb_configuration_descriptor),
+ .bDescriptorType = USB_DT_CONFIG,
+ .wTotalLength =
+ cpu_to_le16(sizeof(struct acm_config_desc)),
+ .bNumInterfaces = NUM_ACM_INTERFACES,
+ .bConfigurationValue = 1,
+ .iConfiguration = STR_CONFIG,
+ .bmAttributes =
+ BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED,
+ .bMaxPower = USBTTY_MAXPOWER
+ },
+ /* Interface 1 */
+ .interface_desc = {
+ .bLength = sizeof(struct usb_interface_descriptor),
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bInterfaceNumber = 0,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = 0x01,
+ .bInterfaceClass =
+ COMMUNICATIONS_INTERFACE_CLASS_CONTROL,
+ .bInterfaceSubClass = COMMUNICATIONS_ACM_SUBCLASS,
+ .bInterfaceProtocol = COMMUNICATIONS_V25TER_PROTOCOL,
+ .iInterface = STR_CTRL_INTERFACE,
+ },
+ .usb_class_header = {
+ .bFunctionLength =
+ sizeof(struct usb_class_header_function_descriptor),
+ .bDescriptorType = CS_INTERFACE,
+ .bDescriptorSubtype = USB_ST_HEADER,
+ .bcdCDC = cpu_to_le16(110),
+ },
+ .usb_class_call_mgt = {
+ .bFunctionLength =
+ sizeof(struct usb_class_call_management_descriptor),
+ .bDescriptorType = CS_INTERFACE,
+ .bDescriptorSubtype = USB_ST_CMF,
+ .bmCapabilities = 0x00,
+ .bDataInterface = 0x01,
+ },
+ .usb_class_acm = {
+ .bFunctionLength =
+ sizeof(struct usb_class_abstract_control_descriptor),
+ .bDescriptorType = CS_INTERFACE,
+ .bDescriptorSubtype = USB_ST_ACMF,
+ .bmCapabilities = 0x00,
+ },
+ .usb_class_union = {
+ .bFunctionLength =
+ sizeof(struct usb_class_union_function_descriptor),
+ .bDescriptorType = CS_INTERFACE,
+ .bDescriptorSubtype = USB_ST_UF,
+ .bMasterInterface = 0x00,
+ .bSlaveInterface0 = 0x01,
+ },
+ .notification_endpoint = {
+ .bLength =
+ sizeof(struct usb_endpoint_descriptor),
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = 0x01 | USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_INT,
+ .wMaxPacketSize
+ = cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
+ .bInterval = 0xFF,
+ },
+
+ /* Interface 2 */
+ .data_class_interface = {
+ .bLength =
+ sizeof(struct usb_interface_descriptor),
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bInterfaceNumber = 0x01,
+ .bAlternateSetting = 0x00,
+ .bNumEndpoints = 0x02,
+ .bInterfaceClass =
+ COMMUNICATIONS_INTERFACE_CLASS_DATA,
+ .bInterfaceSubClass = DATA_INTERFACE_SUBCLASS_NONE,
+ .bInterfaceProtocol = DATA_INTERFACE_PROTOCOL_NONE,
+ .iInterface = STR_DATA_INTERFACE,
+ },
+ .data_endpoints = {
+ {
+ .bLength =
+ sizeof(struct usb_endpoint_descriptor),
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = 0x02 | USB_DIR_OUT,
+ .bmAttributes =
+ USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize =
+ cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
+ .bInterval = 0xFF,
+ },
+ {
+ .bLength =
+ sizeof(struct usb_endpoint_descriptor),
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = 0x03 | USB_DIR_IN,
+ .bmAttributes =
+ USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize =
+ cpu_to_le16(CONFIG_USBD_SERIAL_BULK_PKTSIZE),
+ .bInterval = 0xFF,
+ },
+ },
+ },
};
-static struct usb_endpoint_descriptor ep_descriptors[NUM_ENDPOINTS] = {
- {
- bLength: sizeof(struct usb_endpoint_descriptor),
- bDescriptorType: USB_DT_ENDPOINT,
- bEndpointAddress: CONFIG_USBD_SERIAL_OUT_ENDPOINT | USB_DIR_OUT,
- bmAttributes: USB_ENDPOINT_XFER_BULK,
- wMaxPacketSize: CONFIG_USBD_SERIAL_OUT_PKTSIZE,
- bInterval: 0
- },
- {
- bLength: sizeof(struct usb_endpoint_descriptor),
- bDescriptorType: USB_DT_ENDPOINT,
- bEndpointAddress: CONFIG_USBD_SERIAL_IN_ENDPOINT | USB_DIR_IN,
- bmAttributes: USB_ENDPOINT_XFER_BULK,
- wMaxPacketSize: CONFIG_USBD_SERIAL_IN_PKTSIZE,
- bInterval: 0
- },
- {
- bLength: sizeof(struct usb_endpoint_descriptor),
- bDescriptorType: USB_DT_ENDPOINT,
- bEndpointAddress: CONFIG_USBD_SERIAL_INT_ENDPOINT | USB_DIR_IN,
- bmAttributes: USB_ENDPOINT_XFER_INT,
- wMaxPacketSize: CONFIG_USBD_SERIAL_INT_PKTSIZE,
- bInterval: 0
- },
+
+static struct rs232_emu rs232_desc={
+ .dter = 115200,
+ .stop_bits = 0x00,
+ .parity = 0x00,
+ .data_bits = 0x08
};
-static struct usb_endpoint_descriptor *ep_descriptor_ptrs[NUM_ENDPOINTS] = {
- &(ep_descriptors[0]),
- &(ep_descriptors[1]),
- &(ep_descriptors[2]),
+
+
+/*
+ * Static Generic Serial specific data
+ */
+
+
+struct gserial_config_desc {
+
+ struct usb_configuration_descriptor configuration_desc;
+ struct usb_interface_descriptor
+ interface_desc[NUM_GSERIAL_INTERFACES] __attribute__((packed));
+ struct usb_endpoint_descriptor
+ data_endpoints[NUM_ENDPOINTS] __attribute__((packed));
+
+} __attribute__((packed));
+
+static struct gserial_config_desc
+gserial_configuration_descriptors[NUM_CONFIGS] ={
+ {
+ .configuration_desc ={
+ .bLength = sizeof(struct usb_configuration_descriptor),
+ .bDescriptorType = USB_DT_CONFIG,
+ .wTotalLength =
+ cpu_to_le16(sizeof(struct gserial_config_desc)),
+ .bNumInterfaces = NUM_GSERIAL_INTERFACES,
+ .bConfigurationValue = 1,
+ .iConfiguration = STR_CONFIG,
+ .bmAttributes =
+ BMATTRIBUTE_SELF_POWERED|BMATTRIBUTE_RESERVED,
+ .bMaxPower = USBTTY_MAXPOWER
+ },
+ .interface_desc = {
+ {
+ .bLength =
+ sizeof(struct usb_interface_descriptor),
+ .bDescriptorType = USB_DT_INTERFACE,
+ .bInterfaceNumber = 0,
+ .bAlternateSetting = 0,
+ .bNumEndpoints = NUM_ENDPOINTS,
+ .bInterfaceClass =
+ COMMUNICATIONS_INTERFACE_CLASS_VENDOR,
+ .bInterfaceSubClass =
+ COMMUNICATIONS_NO_SUBCLASS,
+ .bInterfaceProtocol =
+ COMMUNICATIONS_NO_PROTOCOL,
+ .iInterface = STR_DATA_INTERFACE
+ },
+ },
+ .data_endpoints = {
+ {
+ .bLength =
+ sizeof(struct usb_endpoint_descriptor),
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = 0x01 | USB_DIR_OUT,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize =
+ cpu_to_le16(CONFIG_USBD_SERIAL_OUT_PKTSIZE),
+ .bInterval= 0xFF,
+ },
+ {
+ .bLength =
+ sizeof(struct usb_endpoint_descriptor),
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = 0x02 | USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_BULK,
+ .wMaxPacketSize =
+ cpu_to_le16(CONFIG_USBD_SERIAL_IN_PKTSIZE),
+ .bInterval = 0xFF,
+ },
+ {
+ .bLength =
+ sizeof(struct usb_endpoint_descriptor),
+ .bDescriptorType = USB_DT_ENDPOINT,
+ .bEndpointAddress = 0x03 | USB_DIR_IN,
+ .bmAttributes = USB_ENDPOINT_XFER_INT,
+ .wMaxPacketSize =
+ cpu_to_le16(CONFIG_USBD_SERIAL_INT_PKTSIZE),
+ .bInterval = 0xFF,
+ },
+ },
+ },
};
+/*
+ * Static Function Prototypes
+ */
+
+static void usbtty_init_strings (void);
+static void usbtty_init_instances (void);
+static void usbtty_init_endpoints (void);
+static void usbtty_init_terminal_type(short type);
+static void usbtty_event_handler (struct usb_device_instance *device,
+ usb_device_event_t event, int data);
+static int usbtty_cdc_setup(struct usb_device_request *request,
+ struct urb *urb);
+static int usbtty_configured (void);
+static int write_buffer (circbuf_t * buf);
+static int fill_buffer (circbuf_t * buf);
+
+void usbtty_poll (void);
+
/* utility function for converting char* to wide string used by USB */
static void str2wide (char *str, u16 * wide)
{
int i;
-
- for (i = 0; i < strlen (str) && str[i]; i++)
- wide[i] = (u16) str[i];
+ for (i = 0; i < strlen (str) && str[i]; i++){
+ #if defined(__LITTLE_ENDIAN)
+ wide[i] = (u16) str[i];
+ #elif defined(__BIG_ENDIAN)
+ wide[i] = ((u16)(str[i])<<8);
+ #else
+ #error "__LITTLE_ENDIAN or __BIG_ENDIAN undefined"
+ #endif
+ }
}
/*
- * Prototypes
- */
-static void usbtty_init_strings (void);
-static void usbtty_init_instances (void);
-static void usbtty_init_endpoints (void);
-
-static void usbtty_event_handler (struct usb_device_instance *device,
- usb_device_event_t event, int data);
-static int usbtty_configured (void);
-
-static int write_buffer (circbuf_t * buf);
-static int fill_buffer (circbuf_t * buf);
-
-void usbtty_poll (void);
-static void pretend_interrupts (void);
-
-
-/*
* Test whether a character is in the RX buffer
*/
+
int usbtty_tstc (void)
{
+ struct usb_endpoint_instance *endpoint =
+ &endpoint_instance[rx_endpoint];
+
+ /* If no input data exists, allow more RX to be accepted */
+ if(usbtty_input.size <= 0){
+ udc_unset_nak(endpoint->endpoint_address&0x03);
+ }
+
usbtty_poll ();
return (usbtty_input.size > 0);
}
@@ -210,15 +414,21 @@
* otherwise. When the function is succesfull, the character read is
* written into its argument c.
*/
+
int usbtty_getc (void)
{
char c;
+ struct usb_endpoint_instance *endpoint =
+ &endpoint_instance[rx_endpoint];
while (usbtty_input.size <= 0) {
+ udc_unset_nak(endpoint->endpoint_address&0x03);
usbtty_poll ();
}
buf_pop (&usbtty_input, &c, 1);
+ udc_set_nak(endpoint->endpoint_address&0x03);
+
return c;
}
@@ -238,7 +448,6 @@
}
}
-
/* usbtty_puts() helper function for finding the next '\n' in a string */
static int next_nl_pos (const char *s)
{
@@ -252,8 +461,9 @@
}
/*
- * Output a string to the usb client port.
+ * Output a string to the usb client port - implementing flow control
*/
+
static void __usbtty_puts (const char *str, int len)
{
int maxlen = usbtty_output.totalsize;
@@ -261,22 +471,19 @@
/* break str into chunks < buffer size, if needed */
while (len > 0) {
+ usbtty_poll ();
+
space = maxlen - usbtty_output.size;
-
/* Empty buffer here, if needed, to ensure space... */
- if (space <= 0) {
+ if (space) {
write_buffer (&usbtty_output);
- space = maxlen - usbtty_output.size;
- if (space <= 0) {
- space = len; /* allow old data to be overwritten. */
- }
+
+ n = MIN (space, MIN (len, maxlen));
+ buf_push (&usbtty_output, str, n);
+
+ str += n;
+ len -= n;
}
-
- n = MIN (space, MIN (len, maxlen));
- buf_push (&usbtty_output, str, n);
-
- str += n;
- len -= n;
}
}
@@ -313,8 +520,10 @@
{
int rc;
char * sn;
+ char * tt;
int snlen;
+ /* Ger seiral number */
if (!(sn = getenv("serial#"))) {
sn = "000000000000";
}
@@ -327,6 +536,14 @@
memcpy (serial_number, sn, snlen);
serial_number[snlen] = '\0';
+ /* Decide on which type of UDC device to be.
+ */
+
+ if(!(tt = getenv("usbtty"))) {
+ tt = "generic";
+ }
+ usbtty_init_terminal_type(strcmp(tt,"cdc_acm"));
+
/* prepare buffers... */
buf_init (&usbtty_input, USBTTY_BUFFER_SIZE);
buf_init (&usbtty_output, USBTTY_BUFFER_SIZE);
@@ -337,7 +554,7 @@
usbtty_init_strings ();
usbtty_init_instances ();
- udc_startup_events (device_instance); /* Enable our device, initialize udc pointers */
+ udc_startup_events (device_instance);/* Enable dev, init udc pointers */
udc_connect (); /* Enable pullup for host detection */
usbtty_init_endpoints ();
@@ -362,30 +579,48 @@
{
struct usb_string_descriptor *string;
+ usbtty_string_table[STR_LANG] =
+ (struct usb_string_descriptor*)wstrLang;
+
string = (struct usb_string_descriptor *) wstrManufacturer;
- string->bLength = sizeof (wstrManufacturer);
+ string->bLength = sizeof(wstrManufacturer);
string->bDescriptorType = USB_DT_STRING;
str2wide (CONFIG_USBD_MANUFACTURER, string->wData);
+ usbtty_string_table[STR_MANUFACTURER]=string;
+
string = (struct usb_string_descriptor *) wstrProduct;
- string->bLength = sizeof (wstrProduct);
+ string->bLength = sizeof(wstrProduct);
string->bDescriptorType = USB_DT_STRING;
str2wide (CONFIG_USBD_PRODUCT_NAME, string->wData);
+ usbtty_string_table[STR_PRODUCT]=string;
+
string = (struct usb_string_descriptor *) wstrSerial;
- string->bLength = 2 + 2*strlen(serial_number);
+ string->bLength = sizeof(serial_number);
string->bDescriptorType = USB_DT_STRING;
str2wide (serial_number, string->wData);
+ usbtty_string_table[STR_SERIAL]=string;
+
string = (struct usb_string_descriptor *) wstrConfiguration;
- string->bLength = sizeof (wstrConfiguration);
+ string->bLength = sizeof(wstrConfiguration);
string->bDescriptorType = USB_DT_STRING;
str2wide (CONFIG_USBD_CONFIGURATION_STR, string->wData);
+ usbtty_string_table[STR_CONFIG]=string;
- string = (struct usb_string_descriptor *) wstrInterface;
- string->bLength = sizeof (wstrInterface);
+
+ string = (struct usb_string_descriptor *) wstrDataInterface;
+ string->bLength = sizeof(wstrDataInterface);
string->bDescriptorType = USB_DT_STRING;
- str2wide (CONFIG_USBD_INTERFACE_STR, string->wData);
+ str2wide (CONFIG_USBD_DATA_INTERFACE_STR, string->wData);
+ usbtty_string_table[STR_DATA_INTERFACE]=string;
+
+ string = (struct usb_string_descriptor *) wstrCtrlInterface;
+ string->bLength = sizeof(wstrCtrlInterface);
+ string->bDescriptorType = USB_DT_STRING;
+ str2wide (CONFIG_USBD_CTRL_INTERFACE_STR, string->wData);
+ usbtty_string_table[STR_CTRL_INTERFACE]=string;
/* Now, initialize the string table for ep0 handling */
usb_strings = usbtty_string_table;
@@ -400,6 +635,7 @@
device_instance->device_state = STATE_INIT;
device_instance->device_descriptor = &device_descriptor;
device_instance->event = usbtty_event_handler;
+ device_instance->cdc_recv_setup = usbtty_cdc_setup;
device_instance->bus = bus_instance;
device_instance->configurations = NUM_CONFIGS;
device_instance->configuration_instance_array = config_instance;
@@ -415,8 +651,8 @@
/* configuration instance */
memset (config_instance, 0,
sizeof (struct usb_configuration_instance));
- config_instance->interfaces = NUM_INTERFACES;
- config_instance->configuration_descriptor = config_descriptors;
+ config_instance->interfaces = interface_count;
+ config_instance->configuration_descriptor = configuration_descriptor;
config_instance->interface_instance_array = interface_instance;
/* interface instance */
@@ -447,17 +683,22 @@
sizeof (struct usb_endpoint_instance));
endpoint_instance[i].endpoint_address =
- ep_descriptors[i - 1].bEndpointAddress;
+ ep_descriptor_ptrs[i - 1]->bEndpointAddress;
+
+ endpoint_instance[i].rcv_attributes =
+ ep_descriptor_ptrs[i - 1]->bmAttributes;
endpoint_instance[i].rcv_packetSize =
- ep_descriptors[i - 1].wMaxPacketSize;
- endpoint_instance[i].rcv_attributes =
- ep_descriptors[i - 1].bmAttributes;
+ le16_to_cpu(ep_descriptor_ptrs[i - 1]->wMaxPacketSize);
+
+ endpoint_instance[i].tx_attributes =
+ ep_descriptor_ptrs[i - 1]->bmAttributes;
endpoint_instance[i].tx_packetSize =
- ep_descriptors[i - 1].wMaxPacketSize;
+ le16_to_cpu(ep_descriptor_ptrs[i - 1]->wMaxPacketSize);
+
endpoint_instance[i].tx_attributes =
- ep_descriptors[i - 1].bmAttributes;
+ ep_descriptor_ptrs[i - 1]->bmAttributes;
urb_link_init (&endpoint_instance[i].rcv);
urb_link_init (&endpoint_instance[i].rdy);
@@ -480,13 +721,79 @@
int i;
bus_instance->max_endpoints = NUM_ENDPOINTS + 1;
- for (i = 0; i <= NUM_ENDPOINTS; i++) {
+ for (i = 1; i <= NUM_ENDPOINTS; i++) {
udc_setup_ep (device_instance, i, &endpoint_instance[i]);
}
}
+/* usbtty_init_terminal_type
+ *
+ * Do some late binding for our device type.
+ */
+static void usbtty_init_terminal_type(short type)
+{
+ switch(type){
+ /* CDC ACM */
+ case 0:
+ /* Assign endpoint descriptors */
+ ep_descriptor_ptrs[0] =
+ &acm_configuration_descriptors[0].notification_endpoint;
+ ep_descriptor_ptrs[1] =
+ &acm_configuration_descriptors[0].data_endpoints[0];
+ ep_descriptor_ptrs[2] =
+ &acm_configuration_descriptors[0].data_endpoints[1];
-/*********************************************************************************/
+ /* Enumerate Device Descriptor */
+ device_descriptor.bDeviceClass =
+ COMMUNICATIONS_DEVICE_CLASS;
+ device_descriptor.idProduct =
+ cpu_to_le16(CONFIG_USBD_PRODUCTID_CDCACM);
+
+ /* Assign endpoint indices */
+ tx_endpoint = ACM_TX_ENDPOINT;
+ rx_endpoint = ACM_RX_ENDPOINT;
+
+ /* Configuration Descriptor */
+ configuration_descriptor =
+ (struct usb_configuration_descriptor*)
+ &acm_configuration_descriptors;
+
+ /* Interface count */
+ interface_count = NUM_ACM_INTERFACES;
+ break;
+
+ /* BULK IN/OUT & Default */
+ case 1:
+ default:
+ /* Assign endpoint descriptors */
+ ep_descriptor_ptrs[0] =
+ &gserial_configuration_descriptors[0].data_endpoints[0];
+ ep_descriptor_ptrs[1] =
+ &gserial_configuration_descriptors[0].data_endpoints[1];
+ ep_descriptor_ptrs[2] =
+ &gserial_configuration_descriptors[0].data_endpoints[2];
+
+ /* Enumerate Device Descriptor */
+ device_descriptor.bDeviceClass = 0xFF;
+ device_descriptor.idProduct =
+ cpu_to_le16(CONFIG_USBD_PRODUCTID_GSERIAL);
+
+ /* Assign endpoint indices */
+ tx_endpoint = GSERIAL_TX_ENDPOINT;
+ rx_endpoint = GSERIAL_RX_ENDPOINT;
+
+ /* Configuration Descriptor */
+ configuration_descriptor =
+ (struct usb_configuration_descriptor*)
+ &gserial_configuration_descriptors;
+
+ /* Interface count */
+ interface_count = NUM_GSERIAL_INTERFACES;
+ break;
+ }
+}
+
+/******************************************************************************/
static struct urb *next_urb (struct usb_device_instance *device,
struct usb_endpoint_instance *endpoint)
@@ -526,27 +833,39 @@
return 0;
}
- if (buf->size) {
+ struct usb_endpoint_instance *endpoint =
+ &endpoint_instance[tx_endpoint];
+ struct urb *current_urb = NULL;
- struct usb_endpoint_instance *endpoint =
- &endpoint_instance[TX_ENDPOINT];
- struct urb *current_urb = NULL;
+ current_urb = next_urb (device_instance, endpoint);
+ /* TX data still exists - send it now
+ */
+ if(endpoint->sent < current_urb->actual_length){
+ if(udc_endpoint_write (endpoint)){
+ /* Write pre-empted by RX */
+ return -1;
+ }
+ }
+
+ if (buf->size) {
char *dest;
int space_avail;
int popnum, popped;
int total = 0;
- /* Break buffer into urb sized pieces, and link each to the endpoint */
+ /* Break buffer into urb sized pieces,
+ * and link each to the endpoint
+ */
while (buf->size > 0) {
- current_urb = next_urb (device_instance, endpoint);
+
if (!current_urb) {
TTYERR ("current_urb is NULL, buf->size %d\n",
buf->size);
return total;
}
- dest = current_urb->buffer +
+ dest = (char*)current_urb->buffer +
current_urb->actual_length;
space_avail =
@@ -562,14 +881,19 @@
current_urb->actual_length += popped;
total += popped;
- /* If endpoint->last == 0, then transfers have not started on this endpoint */
+ /* If endpoint->last == 0, then transfers have
+ * not started on this endpoint
+ */
if (endpoint->last == 0) {
- udc_endpoint_write (endpoint);
+ if(udc_endpoint_write (endpoint)){
+ /* Write pre-empted by RX */
+ return -1;
+ }
}
- } /* end while */
+ }/* end while */
return total;
- } /* end if tx_urb */
+ }
return 0;
}
@@ -577,18 +901,22 @@
static int fill_buffer (circbuf_t * buf)
{
struct usb_endpoint_instance *endpoint =
- &endpoint_instance[RECV_ENDPOINT];
+ &endpoint_instance[rx_endpoint];
if (endpoint->rcv_urb && endpoint->rcv_urb->actual_length) {
- unsigned int nb = endpoint->rcv_urb->actual_length;
+ unsigned int nb = 0;
char *src = (char *) endpoint->rcv_urb->buffer;
+ unsigned int rx_avail = buf->totalsize - buf->size;
- buf_push (buf, src, nb);
- endpoint->rcv_urb->actual_length = 0;
+ if(rx_avail >= endpoint->rcv_urb->actual_length){
+ nb = endpoint->rcv_urb->actual_length;
+ buf_push (buf, src, nb);
+ endpoint->rcv_urb->actual_length = 0;
+
+ }
return nb;
}
-
return 0;
}
@@ -597,7 +925,7 @@
return usbtty_configured_flag;
}
-/*********************************************************************************/
+/******************************************************************************/
static void usbtty_event_handler (struct usb_device_instance *device,
usb_device_event_t event, int data)
@@ -619,8 +947,34 @@
}
}
-/*********************************************************************************/
+/******************************************************************************/
+int usbtty_cdc_setup(struct usb_device_request *request, struct urb *urb)
+{
+ switch (request->bRequest){
+
+ case ACM_SET_CONTROL_LINE_STATE: /* Implies DTE ready */
+ break;
+ case ACM_SEND_ENCAPSULATED_COMMAND : /* Required */
+ break;
+ case ACM_SET_LINE_ENCODING : /* DTE stop/parity bits
+ * per character */
+ break;
+ case ACM_GET_ENCAPSULATED_RESPONSE : /* request response */
+ break;
+ case ACM_GET_LINE_ENCODING : /* request DTE rate,
+ * stop/parity bits */
+ memcpy (urb->buffer , &rs232_desc, sizeof(rs232_desc));
+ urb->actual_length = sizeof(rs232_desc);
+
+ break;
+ default:
+ return 1;
+ }
+ return 0;
+}
+
+/******************************************************************************/
/*
* Since interrupt handling has not yet been implemented, we use this function
@@ -630,36 +984,29 @@
void usbtty_poll (void)
{
/* New interrupts? */
- pretend_interrupts ();
+ udc_irq();
- /* Write any output data to host buffer (do this before checking interrupts to avoid missing one) */
+ /* Write any output data to host buffer
+ * (do this before checking interrupts to avoid missing one)
+ */
if (usbtty_configured ()) {
write_buffer (&usbtty_output);
}
/* New interrupts? */
- pretend_interrupts ();
+ udc_irq();
- /* Check for new data from host.. (do this after checking interrupts to get latest data) */
+ /* Check for new data from host..
+ * (do this after checking interrupts to get latest data)
+ */
if (usbtty_configured ()) {
fill_buffer (&usbtty_input);
}
/* New interrupts? */
- pretend_interrupts ();
+ udc_irq();
+
}
-static void pretend_interrupts (void)
-{
- /* Loop while we have interrupts.
- * If we don't do this, the input chain
- * polling delay is likely to miss
- * host requests.
- */
- while (inw (UDC_IRQ_SRC) & ~UDC_SOF_Flg) {
- /* Handle any new IRQs */
- omap1510_udc_irq ();
- omap1510_udc_noniso_irq ();
- }
-}
+
#endif
diff --git a/drivers/usbtty.h b/drivers/usbtty.h
index 79c2fe5..8154e30 100644
--- a/drivers/usbtty.h
+++ b/drivers/usbtty.h
@@ -2,6 +2,9 @@
* (C) Copyright 2003
* Gerry Hamel, geh@ti.com, Texas Instruments
*
+ * (C) Copyright 2006
+ * Bryan O'Donoghue, bodonoghue@codehermit.ie, CodeHermit
+ *
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
@@ -21,44 +24,47 @@
#ifndef __USB_TTY_H__
#define __USB_TTY_H__
-
#include "usbdcore.h"
+#if defined(CONFIG_PPC)
+#include "usbdcore_mpc8xx.h"
+#elif defined(CONFIG_ARM)
#include "usbdcore_omap1510.h"
+#endif
+#include <version_autogenerated.h>
-#define NUM_CONFIGS 1
-#define NUM_INTERFACES 1
-#define NUM_ENDPOINTS 3
+/* If no VendorID/ProductID is defined in config.h, pretend to be Linux
+ * DO NOT Reuse this Vendor/Product setup with protocol incompatible devices */
-#define EP0_MAX_PACKET_SIZE 64
+#define CONFIG_USBD_VENDORID 0x0525 /* Linux/NetChip */
+#define CONFIG_USBD_PRODUCTID_GSERIAL 0xa4a6 /* gserial */
+#define CONFIG_USBD_PRODUCTID_CDCACM 0xa4a7 /* CDC ACM */
+#define CONFIG_USBD_MANUFACTURER "Das U-Boot"
+#define CONFIG_USBD_PRODUCT_NAME U_BOOT_VERSION
+
#define CONFIG_USBD_CONFIGURATION_STR "TTY via USB"
-#define CONFIG_USBD_INTERFACE_STR "Simple Serial Data Interface - Bulk Mode"
-
-#define CONFIG_USBD_SERIAL_OUT_ENDPOINT 2
-#define CONFIG_USBD_SERIAL_OUT_PKTSIZE 64
-#define CONFIG_USBD_SERIAL_IN_ENDPOINT 1
-#define CONFIG_USBD_SERIAL_IN_PKTSIZE 64
-#define CONFIG_USBD_SERIAL_INT_ENDPOINT 5
-#define CONFIG_USBD_SERIAL_INT_PKTSIZE 16
-
+#define CONFIG_USBD_SERIAL_OUT_ENDPOINT UDC_OUT_ENDPOINT
+#define CONFIG_USBD_SERIAL_OUT_PKTSIZE UDC_OUT_PACKET_SIZE
+#define CONFIG_USBD_SERIAL_IN_ENDPOINT UDC_IN_ENDPOINT
+#define CONFIG_USBD_SERIAL_IN_PKTSIZE UDC_IN_PACKET_SIZE
+#define CONFIG_USBD_SERIAL_INT_ENDPOINT UDC_INT_ENDPOINT
+#define CONFIG_USBD_SERIAL_INT_PKTSIZE UDC_INT_PACKET_SIZE
+#define CONFIG_USBD_SERIAL_BULK_PKTSIZE UDC_BULK_PACKET_SIZE
#define USBTTY_DEVICE_CLASS COMMUNICATIONS_DEVICE_CLASS
-#define USBTTY_DEVICE_SUBCLASS COMMUNICATIONS_NO_SUBCLASS
-#define USBTTY_DEVICE_PROTOCOL COMMUNICATIONS_NO_PROTOCOL
-#define USBTTY_INTERFACE_CLASS 0xFF /* Vendor Specific */
-#define USBTTY_INTERFACE_SUBCLASS 0x02
-#define USBTTY_INTERFACE_PROTOCOL 0x01
+#define USBTTY_BCD_DEVICE 0x00
+#define USBTTY_MAXPOWER 0x00
-#define USBTTY_BCD_DEVICE 0x0
-#define USBTTY_MAXPOWER 0x0
-
-#define STR_MANUFACTURER 1
-#define STR_PRODUCT 2
-#define STR_SERIAL 3
-#define STR_CONFIG 4
-#define STR_INTERFACE 5
+#define STR_LANG 0x00
+#define STR_MANUFACTURER 0x01
+#define STR_PRODUCT 0x02
+#define STR_SERIAL 0x03
+#define STR_CONFIG 0x04
+#define STR_DATA_INTERFACE 0x05
+#define STR_CTRL_INTERFACE 0x06
+#define STR_COUNT 0x07
#endif
diff --git a/dtt/Makefile b/dtt/Makefile
index e6cb128..c6a670a 100644
--- a/dtt/Makefile
+++ b/dtt/Makefile
@@ -30,7 +30,7 @@
LIB = $(obj)libdtt.a
-COBJS = lm75.o ds1621.o adm1021.o lm81.o
+COBJS = lm75.o ds1621.o adm1021.o lm81.o ds1775.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/dtt/ds1775.c b/dtt/ds1775.c
new file mode 100644
index 0000000..e44cee3
--- /dev/null
+++ b/dtt/ds1775.c
@@ -0,0 +1,156 @@
+/*
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Dallas Semiconductor's DS1775 Digital Thermometer and Thermostat
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_DTT_DS1775
+#include <i2c.h>
+#include <dtt.h>
+
+#define DTT_I2C_DEV_CODE 0x49 /* Dallas Semi's DS1775 device code */
+
+int dtt_read(int sensor, int reg)
+{
+ int dlen;
+ uchar data[2];
+
+ /*
+ * Calculate sensor address and command
+ */
+ sensor = DTT_I2C_DEV_CODE + (sensor & 0x07); /* Calculate addr of ds1775 */
+
+ /*
+ * Prepare to handle 2 byte result
+ */
+ if ((reg == DTT_READ_TEMP) ||
+ (reg == DTT_TEMP_OS) || (reg == DTT_TEMP_HYST))
+ dlen = 2;
+ else
+ dlen = 1;
+
+ /*
+ * Now try to read the register
+ */
+ if (i2c_read(sensor, reg, 1, data, dlen) != 0)
+ return 1;
+
+ /*
+ * Handle 2 byte result
+ */
+ if (dlen == 2)
+ return ((int)((short)data[1] + (((short)data[0]) << 8)));
+
+ return (int) data[0];
+}
+
+
+int dtt_write(int sensor, int reg, int val)
+{
+ int dlen;
+ uchar data[2];
+
+ /*
+ * Calculate sensor address and register
+ */
+ sensor = DTT_I2C_DEV_CODE + (sensor & 0x07);
+
+ /*
+ * Handle various data sizes
+ */
+ if ((reg == DTT_READ_TEMP) ||
+ (reg == DTT_TEMP_OS) || (reg == DTT_TEMP_HYST)) {
+ dlen = 2;
+ data[0] = (char)((val >> 8) & 0xff); /* MSB first */
+ data[1] = (char)(val & 0xff);
+ } else {
+ dlen = 1;
+ data[0] = (char)(val & 0xff);
+ }
+
+ /*
+ * Write value to device
+ */
+ if (i2c_write(sensor, reg, 1, data, dlen) != 0)
+ return 1;
+
+ return 0;
+}
+
+
+static int _dtt_init(int sensor)
+{
+ int val;
+
+ /*
+ * Setup High Temp
+ */
+ val = ((CFG_DTT_MAX_TEMP * 2) << 7) & 0xff80;
+ if (dtt_write(sensor, DTT_TEMP_OS, val) != 0)
+ return 1;
+ udelay(50000); /* Max 50ms */
+
+ /*
+ * Setup Low Temp - hysteresis
+ */
+ val = (((CFG_DTT_MAX_TEMP - CFG_DTT_HYSTERESIS) * 2) << 7) & 0xff80;
+ if (dtt_write(sensor, DTT_TEMP_HYST, val) != 0)
+ return 1;
+ udelay(50000); /* Max 50ms */
+
+ /*
+ * Setup configuraton register
+ *
+ * Fault Tolerance limits 4, Thermometer resolution bits is 9,
+ * Polarity = Active Low,continuous conversion mode, Thermostat
+ * mode is interrupt mode
+ */
+ val = 0xa;
+ if (dtt_write(sensor, DTT_CONFIG, val) != 0)
+ return 1;
+ udelay(50000); /* Max 50ms */
+
+ return 0;
+}
+
+
+int dtt_init (void)
+{
+ int i;
+ unsigned char sensors[] = CONFIG_DTT_SENSORS;
+
+ for (i = 0; i < sizeof(sensors); i++) {
+ if (_dtt_init(sensors[i]) != 0)
+ printf("DTT%d: FAILED\n", i+1);
+ else
+ printf("DTT%d: %i C\n", i+1, dtt_get_temp(sensors[i]));
+ }
+
+ return (0);
+}
+
+
+int dtt_get_temp(int sensor)
+{
+ return (dtt_read(sensor, DTT_READ_TEMP) / 256);
+}
+
+
+#endif /* CONFIG_DTT_DS1775 */
diff --git a/fs/cramfs/cramfs.c b/fs/cramfs/cramfs.c
index 48e7f63..369d1f1 100644
--- a/fs/cramfs/cramfs.c
+++ b/fs/cramfs/cramfs.c
@@ -27,7 +27,7 @@
#include <common.h>
#include <malloc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <asm/byteorder.h>
#include <linux/stat.h>
diff --git a/fs/cramfs/uncompress.c b/fs/cramfs/uncompress.c
index 170832a..2e906eb 100644
--- a/fs/cramfs/uncompress.c
+++ b/fs/cramfs/uncompress.c
@@ -25,7 +25,7 @@
#include <watchdog.h>
#include <zlib.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
static z_stream stream;
diff --git a/fs/ext2/dev.c b/fs/ext2/dev.c
index 1469e98..643a1a8 100644
--- a/fs/ext2/dev.c
+++ b/fs/ext2/dev.c
@@ -25,7 +25,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_EXT2)
+#if defined(CONFIG_CMD_EXT2)
#include <config.h>
#include <ext2fs.h>
@@ -123,4 +123,4 @@
}
return (1);
}
-#endif /* CFG_CMD_EXT2FS */
+#endif
diff --git a/fs/ext2/ext2fs.c b/fs/ext2/ext2fs.c
index 9cf2fb7..513a2f9 100644
--- a/fs/ext2/ext2fs.c
+++ b/fs/ext2/ext2fs.c
@@ -25,7 +25,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_EXT2)
+#if defined(CONFIG_CMD_EXT2)
#include <ext2fs.h>
#include <malloc.h>
#include <asm/byteorder.h>
@@ -875,4 +875,4 @@
return (0);
}
-#endif /* CFG_CMD_EXT2FS */
+#endif
diff --git a/fs/fat/fat.c b/fs/fat/fat.c
index a823b5a..e98e50a 100644
--- a/fs/fat/fat.c
+++ b/fs/fat/fat.c
@@ -31,7 +31,7 @@
#include <asm/byteorder.h>
#include <part.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+#if defined(CONFIG_CMD_FAT)
/*
* Convert a string to lowercase.
@@ -59,7 +59,8 @@
if (cur_dev == NULL)
return -1;
if (cur_dev->block_read) {
- return cur_dev->block_read (cur_dev->dev, startblock, getsize, (unsigned long *)bufptr);
+ return cur_dev->block_read (cur_dev->dev
+ , startblock, getsize, (unsigned long *)bufptr);
}
return -1;
}
@@ -69,10 +70,11 @@
fat_register_device(block_dev_desc_t *dev_desc, int part_no)
{
unsigned char buffer[SECTOR_SIZE];
+ disk_partition_t info;
if (!dev_desc->block_read)
return -1;
- cur_dev=dev_desc;
+ cur_dev = dev_desc;
/* check if we have a MBR (on floppies we have only a PBR) */
if (dev_desc->block_read (dev_desc->dev, 0, 1, (ulong *) buffer) != 1) {
printf ("** Can't read from device %d **\n", dev_desc->dev);
@@ -87,27 +89,40 @@
/* ok, we assume we are on a PBR only */
cur_part = 1;
part_offset=0;
- }
- else {
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) || (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || defined(CONFIG_SYSTEMACE)
- disk_partition_t info;
- if(!get_partition_info(dev_desc, part_no, &info)) {
+ } else {
+#if (defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
+ (defined(CONFIG_MMC) && defined(CONFIG_LPC2292)) || \
+ defined(CONFIG_SYSTEMACE) )
+ /* First we assume, there is a MBR */
+ if (!get_partition_info (dev_desc, part_no, &info)) {
part_offset = info.start;
cur_part = part_no;
- }
- else {
- printf ("** Partition %d not valid on device %d **\n",part_no,dev_desc->dev);
+ } else if (!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET], "FAT", 3)) {
+ /* ok, we assume we are on a PBR only */
+ cur_part = 1;
+ part_offset = 0;
+ } else {
+ printf ("** Partition %d not valid on device %d **\n",
+ part_no, dev_desc->dev);
return -1;
}
#else
- /* FIXME we need to determine the start block of the
- * partition where the DOS FS resides. This can be done
- * by using the get_partition_info routine. For this
- * purpose the libpart must be included.
- */
- part_offset=32;
- cur_part = 1;
+ if(!strncmp((char *)&buffer[DOS_FS_TYPE_OFFSET],"FAT",3)) {
+ /* ok, we assume we are on a PBR only */
+ cur_part = 1;
+ part_offset = 0;
+ info.start = part_offset;
+ } else {
+ /* FIXME we need to determine the start block of the
+ * partition where the DOS FS resides. This can be done
+ * by using the get_partition_info routine. For this
+ * purpose the libpart must be included.
+ */
+ part_offset = 32;
+ cur_part = 1;
+ }
#endif
}
return 0;
@@ -971,8 +986,10 @@
printf("No current device\n");
return 1;
}
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) || (CONFIG_COMMANDS & CFG_CMD_SCSI) || \
- (CONFIG_COMMANDS & CFG_CMD_USB) || (CONFIG_MMC)
+#if defined(CONFIG_CMD_IDE) || \
+ defined(CONFIG_CMD_SCSI) || \
+ defined(CONFIG_CMD_USB) || \
+ (CONFIG_MMC)
printf("Interface: ");
switch(cur_dev->if_type) {
case IF_TYPE_IDE : printf("IDE"); break;
@@ -993,7 +1010,8 @@
memcpy (vol_label, volinfo.volume_label, 11);
vol_label[11] = '\0';
volinfo.fs_type[5]='\0';
- printf("Partition %d: Filesystem: %s \"%s\"\n",cur_part,volinfo.fs_type,vol_label);
+ printf("Partition %d: Filesystem: %s \"%s\"\n"
+ ,cur_part,volinfo.fs_type,vol_label);
return 0;
}
@@ -1012,4 +1030,4 @@
return do_fat_read(filename, buffer, maxsize, LS_NO);
}
-#endif /* #if (CONFIG_COMMANDS & CFG_CMD_FAT) */
+#endif
diff --git a/fs/fat/file.c b/fs/fat/file.c
index f999ac5..514dbae 100644
--- a/fs/fat/file.c
+++ b/fs/fat/file.c
@@ -32,7 +32,7 @@
#include <linux/stat.h>
#include <linux/time.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FAT)
+#if defined(CONFIG_CMD_FAT)
/* Supported filesystems */
static const struct filesystem filesystems[] = {
@@ -205,4 +205,4 @@
return filesystems[current_filesystem].read(arg, buffer, maxsize);
}
-#endif /* #if (CONFIG_COMMANDS & CFG_CMD_FAT) */
+#endif
diff --git a/fs/fdos/dev.c b/fs/fdos/dev.c
index 5dea5cd..271d0e7 100644
--- a/fs/fdos/dev.c
+++ b/fs/fdos/dev.c
@@ -28,7 +28,7 @@
#include "dos.h"
#include "fdos.h"
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
#define NB_HEADS 2
#define NB_TRACKS 80
diff --git a/fs/fdos/fat.c b/fs/fdos/fat.c
index 2ef2371..2e2d2b8 100644
--- a/fs/fdos/fat.c
+++ b/fs/fdos/fat.c
@@ -26,7 +26,7 @@
#include <config.h>
#include <malloc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
#include "dos.h"
#include "fdos.h"
diff --git a/fs/fdos/fdos.c b/fs/fdos/fdos.c
index a29f43d..5be6a96 100644
--- a/fs/fdos/fdos.c
+++ b/fs/fdos/fdos.c
@@ -25,7 +25,7 @@
#include <common.h>
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
#include <malloc.h>
#include "dos.h"
#include "fdos.h"
diff --git a/fs/fdos/fs.c b/fs/fdos/fs.c
index 3b9d09e..aded670 100644
--- a/fs/fdos/fs.c
+++ b/fs/fdos/fs.c
@@ -26,7 +26,7 @@
#include <config.h>
#include <malloc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
#include "dos.h"
#include "fdos.h"
diff --git a/fs/fdos/subdir.c b/fs/fdos/subdir.c
index 97b2504..497f554 100644
--- a/fs/fdos/subdir.c
+++ b/fs/fdos/subdir.c
@@ -26,7 +26,7 @@
#include <config.h>
#include <malloc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
#include "dos.h"
#include "fdos.h"
diff --git a/fs/fdos/vfat.c b/fs/fdos/vfat.c
index 46a464b..0e7883b 100644
--- a/fs/fdos/vfat.c
+++ b/fs/fdos/vfat.c
@@ -25,7 +25,7 @@
#include <common.h>
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FDOS)
+#if defined(CONFIG_CMD_FDOS)
#include <linux/ctype.h>
#include "dos.h"
diff --git a/fs/jffs2/compr_lzari.c b/fs/jffs2/compr_lzari.c
index 828b6e5..f64bc74 100644
--- a/fs/jffs2/compr_lzari.c
+++ b/fs/jffs2/compr_lzari.c
@@ -50,7 +50,7 @@
#include <config.h>
-#if ((CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_LZO_LZARI))
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_LZO_LZARI)
#include <linux/stddef.h>
#include <jffs2/jffs2.h>
@@ -259,4 +259,4 @@
{
return Decode(data_in, cpage_out, srclen, destlen);
}
-#endif /* ((CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_LZO_LZARI)) */
+#endif
diff --git a/fs/jffs2/compr_lzo.c b/fs/jffs2/compr_lzo.c
index b6c590a..a32b993 100644
--- a/fs/jffs2/compr_lzo.c
+++ b/fs/jffs2/compr_lzo.c
@@ -67,7 +67,7 @@
#include <config.h>
-#if ((CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_LZO_LZARI))
+#if defined(CONFIG_CMD_JFFS2) && defined(CONFIG_JFFS2_LZO_LZARI)
#include <linux/stddef.h>
#include <jffs2/jffs2.h>
@@ -402,4 +402,4 @@
return lzo1x_decompress (data_in, srclen, cpage_out, &outlen, NULL);
}
-#endif /* ((CONFIG_COMMANDS & CFG_CMD_JFFS2) && defined(CONFIG_JFFS2_LZO_LZARI)) */
+#endif
diff --git a/fs/jffs2/compr_rtime.c b/fs/jffs2/compr_rtime.c
index 9bb4f1b..144263c 100644
--- a/fs/jffs2/compr_rtime.c
+++ b/fs/jffs2/compr_rtime.c
@@ -46,7 +46,7 @@
*/
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <jffs2/jffs2.h>
@@ -88,4 +88,4 @@
}
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/fs/jffs2/compr_rubin.c b/fs/jffs2/compr_rubin.c
index 74577d9..f6f3fa1 100644
--- a/fs/jffs2/compr_rubin.c
+++ b/fs/jffs2/compr_rubin.c
@@ -39,7 +39,7 @@
*/
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <jffs2/jffs2.h>
#include <jffs2/compr_rubin.h>
@@ -123,4 +123,4 @@
rubin_do_decompress(bits, data_in+8, cpage_out, dstlen);
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/fs/jffs2/compr_zlib.c b/fs/jffs2/compr_zlib.c
index 1b35585..29dfe1b 100644
--- a/fs/jffs2/compr_zlib.c
+++ b/fs/jffs2/compr_zlib.c
@@ -37,7 +37,7 @@
#include <common.h>
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <jffs2/jffs2.h>
#include <jffs2/mini_inflate.h>
@@ -45,8 +45,8 @@
long zlib_decompress(unsigned char *data_in, unsigned char *cpage_out,
__u32 srclen, __u32 destlen)
{
- return (decompress_block(cpage_out, data_in + 2, ldr_memcpy));
+ return (decompress_block(cpage_out, data_in + 2, (void *) ldr_memcpy));
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c
index 41ff4c1..5316668 100644
--- a/fs/jffs2/jffs2_1pass.c
+++ b/fs/jffs2/jffs2_1pass.c
@@ -117,7 +117,7 @@
#include <linux/stat.h>
#include <linux/time.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <jffs2/jffs2.h>
#include <jffs2/jffs2_1pass.h>
@@ -143,7 +143,8 @@
/* keeps pointer to currentlu processed partition */
static struct part_info *current_part;
-#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if (defined(CONFIG_JFFS2_NAND) && \
+ defined(CONFIG_CMD_NAND) )
#if defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#else
@@ -274,10 +275,10 @@
{
free(buf);
}
-#endif /* #if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND) */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
/*
* Support for jffs2 on top of NOR-flash
*
@@ -300,7 +301,7 @@
{
return (void*)get_fl_mem_nor(off);
}
-#endif /* #if (CONFIG_COMMANDS & CFG_CMD_FLASH) */
+#endif
/*
@@ -311,12 +312,12 @@
{
struct mtdids *id = current_part->dev->id;
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
if (id->type == MTD_DEV_TYPE_NOR)
return get_fl_mem_nor(off);
#endif
-#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && defined(CONFIG_CMD_NAND)
if (id->type == MTD_DEV_TYPE_NAND)
return get_fl_mem_nand(off, size, ext_buf);
#endif
@@ -329,12 +330,13 @@
{
struct mtdids *id = current_part->dev->id;
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
if (id->type == MTD_DEV_TYPE_NOR)
return get_node_mem_nor(off);
#endif
-#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && \
+ defined(CONFIG_CMD_NAND)
if (id->type == MTD_DEV_TYPE_NAND)
return get_node_mem_nand(off);
#endif
@@ -345,7 +347,8 @@
static inline void put_fl_mem(void *buf)
{
-#if defined(CONFIG_JFFS2_NAND) && (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && \
+ defined(CONFIG_CMD_NAND)
struct mtdids *id = current_part->dev->id;
if (id->type == MTD_DEV_TYPE_NAND)
@@ -1394,4 +1397,4 @@
return 1;
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/fs/jffs2/jffs2_nand_1pass.c b/fs/jffs2/jffs2_nand_1pass.c
index e78af75..3a4c649 100644
--- a/fs/jffs2/jffs2_nand_1pass.c
+++ b/fs/jffs2/jffs2_nand_1pass.c
@@ -1,6 +1,6 @@
#include <common.h>
-#if !defined(CFG_NAND_LEGACY) && (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if !defined(CFG_NAND_LEGACY) && defined(CONFIG_CMD_JFFS2)
#include <malloc.h>
#include <linux/stat.h>
@@ -1033,4 +1033,4 @@
return 1;
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/fs/jffs2/mini_inflate.c b/fs/jffs2/mini_inflate.c
index 4f511ec..4c50fc3 100644
--- a/fs/jffs2/mini_inflate.c
+++ b/fs/jffs2/mini_inflate.c
@@ -25,7 +25,7 @@
#include <config.h>
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#include <jffs2/mini_inflate.h>
@@ -393,4 +393,4 @@
return stream.error ? -stream.error : stream.decoded;
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/fs/reiserfs/dev.c b/fs/reiserfs/dev.c
index 6f6056f..6b36c06 100644
--- a/fs/reiserfs/dev.c
+++ b/fs/reiserfs/dev.c
@@ -19,7 +19,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+#if defined(CONFIG_CMD_REISER)
#include <config.h>
#include <reiserfs.h>
@@ -120,4 +120,4 @@
return 1;
}
-#endif /* CFG_CMD_REISERFS */
+#endif
diff --git a/fs/reiserfs/mode_string.c b/fs/reiserfs/mode_string.c
index bc565fb..ae98834 100644
--- a/fs/reiserfs/mode_string.c
+++ b/fs/reiserfs/mode_string.c
@@ -26,7 +26,7 @@
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+#if defined(CONFIG_CMD_REISER)
#include <linux/stat.h>
#if ( S_ISUID != 04000 ) || ( S_ISGID != 02000 ) || ( S_ISVTX != 01000 ) \
@@ -139,4 +139,4 @@
#endif
-#endif /* CFG_CMD_REISER */
+#endif
diff --git a/fs/reiserfs/reiserfs.c b/fs/reiserfs/reiserfs.c
index 31c25eb..aa96361 100644
--- a/fs/reiserfs/reiserfs.c
+++ b/fs/reiserfs/reiserfs.c
@@ -29,7 +29,7 @@
*/
#include <common.h>
-#if (CONFIG_COMMANDS & CFG_CMD_REISER)
+#if defined(CONFIG_CMD_REISER)
#include <malloc.h>
#include <linux/ctype.h>
@@ -983,4 +983,4 @@
return filemax;
}
-#endif /* CFG_CMD_REISER */
+#endif
diff --git a/include/74xx_7xx.h b/include/74xx_7xx.h
index ba73bae..4a03cec 100644
--- a/include/74xx_7xx.h
+++ b/include/74xx_7xx.h
@@ -34,6 +34,7 @@
* Exception offsets (PowerPC standard)
*/
#define EXC_OFF_SYS_RESET 0x0100 /* default system reset offset */
+#define _START_OFFSET EXC_OFF_SYS_RESET
/*----------------------------------------------------------------
* l2cr values
diff --git a/include/_exports.h b/include/_exports.h
index 2b8ec3d..af43885 100644
--- a/include/_exports.h
+++ b/include/_exports.h
@@ -14,8 +14,13 @@
EXPORT_FUNC(do_reset)
EXPORT_FUNC(getenv)
EXPORT_FUNC(setenv)
+#ifdef CONFIG_HAS_UID
+EXPORT_FUNC(forceenv)
+#endif
EXPORT_FUNC(simple_strtoul)
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+EXPORT_FUNC(simple_strtol)
+EXPORT_FUNC(strcmp)
+#if defined(CONFIG_CMD_I2C)
EXPORT_FUNC(i2c_write)
EXPORT_FUNC(i2c_read)
-#endif /* CFG_CMD_I2C */
+#endif
diff --git a/include/asm-arm/arch-arm720t/hardware.h b/include/asm-arm/arch-arm720t/hardware.h
index 1e9cd41..3056ca7 100644
--- a/include/asm-arm/arch-arm720t/hardware.h
+++ b/include/asm-arm/arch-arm720t/hardware.h
@@ -36,8 +36,6 @@
/* include armadillo specific hardware file if there was one */
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* include IntegratorCP/CM720T specific hardware file if there was one */
-#elif defined(CONFIG_LPC2292)
-#include <asm-arm/arch-arm720t/lpc2292_registers.h>
#else
#error No hardware file defined for this configuration
#endif
diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
index 97d4704..0e01005 100644
--- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h
+++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h
@@ -27,9 +27,9 @@
typedef volatile unsigned int AT91_REG; /* Hardware register definition */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Timer Counter Channel Interface */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Timer Counter Channel Interface */
+/*****************************************************************************/
typedef struct _AT91S_TC
{
AT91_REG TC_CCR; /* Channel Control Register */
@@ -45,24 +45,24 @@
AT91_REG TC_IMR; /* Interrupt Mask Register */
} AT91S_TC, *AT91PS_TC;
-#define AT91C_TC_TIMER_DIV1_CLOCK ((unsigned int) 0x0 << 0) /* (TC) MCK/2 */
-#define AT91C_TC_TIMER_DIV2_CLOCK ((unsigned int) 0x1 << 0) /* (TC) MCK/8 */
-#define AT91C_TC_TIMER_DIV3_CLOCK ((unsigned int) 0x2 << 0) /* (TC) MCK/32 */
-#define AT91C_TC_TIMER_DIV4_CLOCK ((unsigned int) 0x3 << 0) /* (TC) MCK/128 */
-#define AT91C_TC_SLOW_CLOCK ((unsigned int) 0x4 << 0) /* (TC) SLOW CLK */
-#define AT91C_TC_XC0_CLOCK ((unsigned int) 0x5 << 0) /* (TC) XC0 */
-#define AT91C_TC_XC1_CLOCK ((unsigned int) 0x6 << 0) /* (TC) XC1 */
-#define AT91C_TC_XC2_CLOCK ((unsigned int) 0x7 << 0) /* (TC) XC2 */
-#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) /* (TCB) None signal connected to XC0 */
-#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) /* (TCB) None signal connected to XC1 */
-#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) /* (TCB) None signal connected to XC2 */
-#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) /* (TC) Counter Clock Disable Command */
-#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) /* (TC) Software Trigger Command */
-#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) /* (TC) Counter Clock Enable Command */
+#define AT91C_TC_TIMER_DIV1_CLOCK ((unsigned int) 0x0 << 0) /* (TC) MCK/2 */
+#define AT91C_TC_TIMER_DIV2_CLOCK ((unsigned int) 0x1 << 0) /* (TC) MCK/8 */
+#define AT91C_TC_TIMER_DIV3_CLOCK ((unsigned int) 0x2 << 0) /* (TC) MCK/32 */
+#define AT91C_TC_TIMER_DIV4_CLOCK ((unsigned int) 0x3 << 0) /* (TC) MCK/128 */
+#define AT91C_TC_SLOW_CLOCK ((unsigned int) 0x4 << 0) /* (TC) SLOW CLK*/
+#define AT91C_TC_XC0_CLOCK ((unsigned int) 0x5 << 0) /* (TC) XC0 */
+#define AT91C_TC_XC1_CLOCK ((unsigned int) 0x6 << 0) /* (TC) XC1 */
+#define AT91C_TC_XC2_CLOCK ((unsigned int) 0x7 << 0) /* (TC) XC2 */
+#define AT91C_TCB_TC0XC0S_NONE ((unsigned int) 0x1) /* (TCB) None signal connected to XC0 */
+#define AT91C_TCB_TC1XC1S_NONE ((unsigned int) 0x1 << 2) /* (TCB) None signal connected to XC1 */
+#define AT91C_TCB_TC2XC2S_NONE ((unsigned int) 0x1 << 4) /* (TCB) None signal connected to XC2 */
+#define AT91C_TC_CLKDIS ((unsigned int) 0x1 << 1) /* (TC) Counter Clock Disable Command */
+#define AT91C_TC_SWTRG ((unsigned int) 0x1 << 2) /* (TC) Software Trigger Command */
+#define AT91C_TC_CLKEN ((unsigned int) 0x1 << 0) /* (TC) Counter Clock Enable Command */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Usart */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Usart */
+/*****************************************************************************/
typedef struct _AT91S_USART
{
AT91_REG US_CR; /* Control Register */
@@ -94,9 +94,9 @@
AT91_REG US_PTSR; /* PDC Transfer Status Register */
} AT91S_USART, *AT91PS_USART;
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Clock Generator Controler */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Clock Generator Controler */
+/*****************************************************************************/
typedef struct _AT91S_CKGR
{
AT91_REG CKGR_MOR; /* Main Oscillator Register */
@@ -141,9 +141,9 @@
#define AT91C_CKGR_USB_96M ((unsigned int) 0x1 << 28) /* (CKGR) Divider for USB Ports */
#define AT91C_CKGR_USB_PLL ((unsigned int) 0x1 << 29) /* (CKGR) PLL Use */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Parallel Input Output Controler */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Parallel Input Output Controler */
+/*****************************************************************************/
typedef struct _AT91S_PIO
{
AT91_REG PIO_PER; /* PIO Enable Register */
@@ -184,9 +184,9 @@
} AT91S_PIO, *AT91PS_PIO;
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Debug Unit */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Debug Unit */
+/*****************************************************************************/
typedef struct _AT91S_DBGU
{
AT91_REG DBGU_CR; /* Control Register */
@@ -242,9 +242,9 @@
#define AT91C_US_PAR_NONE ((unsigned int) 0x4 << 9) /* (DBGU) No Parity */
#define AT91C_US_NBSTOP_1_BIT ((unsigned int) 0x0 << 12) /* (USART) 1 stop bit */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Static Memory Controller 2 Interface */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Static Memory Controller 2 Interface */
+/*****************************************************************************/
typedef struct _AT91S_SMC2
{
AT91_REG SMC2_CSR[8]; /* SMC2 Chip Select Register */
@@ -267,9 +267,9 @@
#define AT91C_SMC2_RWSETUP ((unsigned int) 0x7 << 24) /* (SMC2) Read and Write Signal Setup Time */
#define AT91C_SMC2_RWHOLD ((unsigned int) 0x7 << 29) /* (SMC2) Read and Write Signal Hold Time */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Power Management Controler */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Power Management Controler */
+/*****************************************************************************/
typedef struct _AT91S_PMC
{
AT91_REG PMC_SCER; /* System Clock Enable Register */
@@ -341,9 +341,9 @@
/*-------- PMC_SR : (PMC Offset: 0x68) PMC Status Register --------*/
/*-------- PMC_IMR : (PMC Offset: 0x6c) PMC Interrupt Mask Register --------*/
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Ethernet MAC */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Ethernet MAC */
+/*****************************************************************************/
typedef struct _AT91S_EMAC
{
AT91_REG EMAC_CTL; /* Network Control Register */
@@ -424,11 +424,11 @@
#define AT91C_EMAC_MDIO ((unsigned int) 0x1 << 1) /* (EMAC) */
#define AT91C_EMAC_IDLE ((unsigned int) 0x1 << 2) /* (EMAC) */
-/* -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register -------- */
+/* -------- EMAC_TCR : (EMAC Offset: 0x10) Transmit Control Register ------- */
#define AT91C_EMAC_LEN ((unsigned int) 0x7FF << 0) /* (EMAC) */
#define AT91C_EMAC_NCRC ((unsigned int) 0x1 << 15) /* (EMAC) */
-/* -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register -------- */
+/* -------- EMAC_TSR : (EMAC Offset: 0x14) Transmit Control Register ------- */
#define AT91C_EMAC_OVR ((unsigned int) 0x1 << 0) /* (EMAC) */
#define AT91C_EMAC_COL ((unsigned int) 0x1 << 1) /* (EMAC) */
#define AT91C_EMAC_RLE ((unsigned int) 0x1 << 2) /* (EMAC) */
@@ -442,7 +442,7 @@
#define AT91C_EMAC_REC ((unsigned int) 0x1 << 1) /* (EMAC) */
#define AT91C_EMAC_RSR_OVR ((unsigned int) 0x1 << 2) /* (EMAC) */
-/* -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register -------- */
+/* -------- EMAC_ISR : (EMAC Offset: 0x24) Interrupt Status Register ------- */
#define AT91C_EMAC_DONE ((unsigned int) 0x1 << 0) /* (EMAC) */
#define AT91C_EMAC_RCOM ((unsigned int) 0x1 << 1) /* (EMAC) */
#define AT91C_EMAC_RBNA ((unsigned int) 0x1 << 2) /* (EMAC) */
@@ -456,8 +456,8 @@
#define AT91C_EMAC_ROVR ((unsigned int) 0x1 << 10) /* (EMAC) */
#define AT91C_EMAC_HRESP ((unsigned int) 0x1 << 11) /* (EMAC) */
-/* -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- */
-/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- */
+/* -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register ------- */
+/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register ------ */
/* -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- */
/* -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- */
#define AT91C_EMAC_DATA ((unsigned int) 0xFFFF << 0) /* (EMAC) */
@@ -471,9 +471,9 @@
#define AT91C_EMAC_HIGH ((unsigned int) 0x1 << 30) /* (EMAC) */
#define AT91C_EMAC_LOW ((unsigned int) 0x1 << 31) /* (EMAC) */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Serial Parallel Interface */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Serial Parallel Interface */
+/*****************************************************************************/
typedef struct _AT91S_SPI
{
AT91_REG SPI_CR; /* Control Register */
@@ -536,7 +536,7 @@
#define AT91C_SPI_SPIENS ((unsigned int) 0x1 << 16) /* (SPI) Enable Status */
/* -------- SPI_IER : (SPI Offset: 0x14) Interrupt Enable Register -------- */
-/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register -------- */
+/* -------- SPI_IDR : (SPI Offset: 0x18) Interrupt Disable Register ------- */
/* -------- SPI_IMR : (SPI Offset: 0x1c) Interrupt Mask Register -------- */
/* -------- SPI_CSR : (SPI Offset: 0x30) Chip Select Register -------- */
#define AT91C_SPI_CPOL ((unsigned int) 0x1 << 0) /* (SPI) Clock Polarity */
@@ -555,9 +555,9 @@
#define AT91C_SPI_DLYBS ((unsigned int) 0xFF << 16) /* (SPI) Serial Clock Baud Rate */
#define AT91C_SPI_DLYBCT ((unsigned int) 0xFF << 24) /* (SPI) Delay Between Consecutive Transfers */
-/******************************************************************************/
-/* SOFTWARE API DEFINITION FOR Peripheral Data Controller */
-/******************************************************************************/
+/*****************************************************************************/
+/* SOFTWARE API DEFINITION FOR Peripheral Data Controller */
+/*****************************************************************************/
typedef struct _AT91S_PDC
{
AT91_REG PDC_RPR; /* Receive Pointer Register */
@@ -692,11 +692,15 @@
#define AT91C_PIO_PA7 ((unsigned int) 1 << 7) /* Pin Controlled by PA7 */
#define AT91C_PA7_ETXCK_EREFCK ((unsigned int) AT91C_PIO_PA7) /* Ethernet MAC Transmit Clock/Reference Clock */
+#define AT91C_PIO_PB0 ((unsigned int) 1 << 0) /* Pin Controlled by PB3 */
+#define AT91C_PIO_PB1 ((unsigned int) 1 << 1) /* Pin Controlled by PB3 */
+#define AT91C_PIO_PB2 ((unsigned int) 1 << 2) /* Pin Controlled by PB3 */
#define AT91C_PIO_PB3 ((unsigned int) 1 << 3) /* Pin Controlled by PB3 */
#define AT91C_PIO_PB4 ((unsigned int) 1 << 4) /* Pin Controlled by PB4 */
#define AT91C_PIO_PB5 ((unsigned int) 1 << 5) /* Pin Controlled by PB5 */
#define AT91C_PIO_PB6 ((unsigned int) 1 << 6) /* Pin Controlled by PB6 */
#define AT91C_PIO_PB7 ((unsigned int) 1 << 7) /* Pin Controlled by PB7 */
+#define AT91C_PIO_PB22 ((unsigned int) 1 << 22) /* Pin Controlled by PB22 */
#define AT91C_PIO_PB25 ((unsigned int) 1 << 25) /* Pin Controlled by PB25 */
#define AT91C_PB25_DSR1 ((unsigned int) AT91C_PIO_PB25) /* USART 1 Data Set ready */
#define AT91C_PB25_EF100 ((unsigned int) AT91C_PIO_PB25) /* Ethernet MAC Force 100 Mbits */
@@ -737,19 +741,36 @@
#define AT91C_PIOC_CODR ((AT91_REG *) 0xFFFFF834) /* (PIOC) Clear Output Data Register */
#define AT91C_PIOC_PDSR ((AT91_REG *) 0xFFFFF83C) /* (PIOC) Pin Data Status Register */
-#define AT91C_BASE_SPI ((AT91PS_SPI) 0xFFFE0000) /* (SPI) Base Address */
-#define AT91C_BASE_EMAC ((AT91PS_EMAC) 0xFFFBC000) /* (EMAC) Base Address */
-#define AT91C_BASE_PMC ((AT91PS_PMC) 0xFFFFFC00) /* (PMC) Base Address */
-#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFA0000) /* (TC0) Base Address */
+#define AT91C_BASE_AIC ((AT91PS_AIC) 0xFFFFF000) /* (AIC) Base Address */
#define AT91C_BASE_DBGU ((AT91PS_DBGU) 0xFFFFF200) /* (DBGU) Base Address */
-#define AT91C_BASE_CKGR ((AT91PS_CKGR) 0xFFFFFC20) /* (CKGR) Base Address */
-#define AT91C_BASE_PIOC ((AT91PS_PIO) 0xFFFFF800) /* (PIOC) Base Address */
-#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) /* (PIOB) Base Address */
#define AT91C_BASE_PIOA ((AT91PS_PIO) 0xFFFFF400) /* (PIOA) Base Address */
-#define AT91C_EBI_CSA ((AT91_REG *) 0xFFFFFF60) /* (EBI) Chip Select Assignment Register */
-#define AT91C_BASE_SMC2 ((AT91PS_SMC2) 0xFFFFFF70) /* (SMC2) Base Address */
+#define AT91C_BASE_PIOB ((AT91PS_PIO) 0xFFFFF600) /* (PIOB) Base Address */
+#define AT91C_BASE_PIOC ((AT91PS_PIO) 0xFFFFF800) /* (PIOC) Base Address */
+#define AT91C_BASE_PIOD ((AT91PS_PIO) 0xFFFFFA00) /* (PIOC) Base Address */
+#define AT91C_BASE_PMC ((AT91PS_PMC) 0xFFFFFC00) /* (PMC) Base Address */
+#if 0
+#define AT91C_BASE_ST ((AT91PS_ST) 0xFFFFFD00) /* (PMC) Base Address */
+#define AT91C_BASE_RTC ((AT91PS_RTC) 0xFFFFFE00) /* (PMC) Base Address */
+#define AT91C_BASE_MC ((AT91PS_MC) 0xFFFFFF00) /* (PMC) Base Address */
+#endif
+
+#define AT91C_BASE_TC0 ((AT91PS_TC) 0xFFFA0000) /* (TC0) Base Address */
+#define AT91C_BASE_TC1 ((AT91PS_TC) 0xFFFA4000) /* (TC0) Base Address */
+#if 0
+#define AT91C_BASE_UDP ((AT91PS_UDP) 0xFFFB0000) /* (TC0) Base Address */
+#define AT91C_BASE_MCI ((AT91PS_MCI) 0xFFFB4000) /* (TC0) Base Address */
+#define AT91C_BASE_TWI ((AT91PS_TWI) 0xFFFB8000) /* (TC0) Base Address */
+#endif
+#define AT91C_BASE_EMAC ((AT91PS_EMAC) 0xFFFBC000) /* (EMAC) Base Address */
#define AT91C_BASE_US0 ((AT91PS_USART) 0xFFFC0000) /* (US0) Base Address */
#define AT91C_BASE_US1 ((AT91PS_USART) 0xFFFC4000) /* (US1) Base Address */
+#define AT91C_BASE_US2 ((AT91PS_USART) 0xFFFC8000) /* (US1) Base Address */
+#define AT91C_BASE_US3 ((AT91PS_USART) 0xFFFCC000) /* (US1) Base Address */
+#define AT91C_BASE_SPI ((AT91PS_SPI) 0xFFFE0000) /* (SPI) Base Address */
+
+#define AT91C_BASE_CKGR ((AT91PS_CKGR) 0xFFFFFC20) /* (CKGR) Base Address */
+#define AT91C_EBI_CSA ((AT91_REG *) 0xFFFFFF60) /* (EBI) Chip Select Assignment Register */
+#define AT91C_BASE_SMC2 ((AT91PS_SMC2) 0xFFFFFF70) /* (SMC2) Base Address */
#define AT91C_TCB0_BMR ((AT91_REG *) 0xFFFA00C4) /* (TCB0) TC Block Mode Register */
#define AT91C_TCB0_BCR ((AT91_REG *) 0xFFFA00C0) /* (TCB0) TC Block Control Register */
#define AT91C_PIOC_PDR ((AT91_REG *) 0xFFFFF804) /* (PIOC) PIO Disable Register */
diff --git a/include/asm-arm/arch-davinci/emac_defs.h b/include/asm-arm/arch-davinci/emac_defs.h
new file mode 100644
index 0000000..0e10116
--- /dev/null
+++ b/include/asm-arm/arch-davinci/emac_defs.h
@@ -0,0 +1,311 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Based on:
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * dm644x_emac.h
+ *
+ * TI DaVinci (DM644X) EMAC peripheral driver header for DV-EVM
+ *
+ * Copyright (C) 2005 Texas Instruments.
+ *
+ * ----------------------------------------------------------------------------
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * ----------------------------------------------------------------------------
+
+ * Modifications:
+ * ver. 1.0: Sep 2005, TI PSP Team - Created EMAC version for uBoot.
+ *
+ */
+
+#ifndef _DM644X_EMAC_H_
+#define _DM644X_EMAC_H_
+
+#include <asm/arch/hardware.h>
+
+#define EMAC_BASE_ADDR (0x01c80000)
+#define EMAC_WRAPPER_BASE_ADDR (0x01c81000)
+#define EMAC_WRAPPER_RAM_ADDR (0x01c82000)
+#define EMAC_MDIO_BASE_ADDR (0x01c84000)
+
+/* MDIO module input frequency */
+#define EMAC_MDIO_BUS_FREQ 99000000 /* PLL/6 - 99 MHz */
+/* MDIO clock output frequency */
+#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */
+
+/* Ethernet Min/Max packet size */
+#define EMAC_MIN_ETHERNET_PKT_SIZE 60
+#define EMAC_MAX_ETHERNET_PKT_SIZE 1518
+#define EMAC_PKT_ALIGN 18 /* 1518 + 18 = 1536 (packet aligned on 32 byte boundry) */
+
+/* Number of RX packet buffers
+ * NOTE: Only 1 buffer supported as of now
+ */
+#define EMAC_MAX_RX_BUFFERS 10
+
+
+/***********************************************
+ ******** Internally used macros ***************
+ ***********************************************/
+
+#define EMAC_CH_TX 1
+#define EMAC_CH_RX 0
+
+/* Each descriptor occupies 4 words, lets start RX desc's at 0 and
+ * reserve space for 64 descriptors max
+ */
+#define EMAC_RX_DESC_BASE 0x0
+#define EMAC_TX_DESC_BASE 0x1000
+
+/* EMAC Teardown value */
+#define EMAC_TEARDOWN_VALUE 0xfffffffc
+
+/* MII Status Register */
+#define MII_STATUS_REG 1
+
+/* Number of statistics registers */
+#define EMAC_NUM_STATS 36
+
+
+/* EMAC Descriptor */
+typedef volatile struct _emac_desc
+{
+ u_int32_t next; /* Pointer to next descriptor in chain */
+ u_int8_t *buffer; /* Pointer to data buffer */
+ u_int32_t buff_off_len; /* Buffer Offset(MSW) and Length(LSW) */
+ u_int32_t pkt_flag_len; /* Packet Flags(MSW) and Length(LSW) */
+} emac_desc;
+
+/* CPPI bit positions */
+#define EMAC_CPPI_SOP_BIT (0x80000000)
+#define EMAC_CPPI_EOP_BIT (0x40000000)
+#define EMAC_CPPI_OWNERSHIP_BIT (0x20000000)
+#define EMAC_CPPI_EOQ_BIT (0x10000000)
+#define EMAC_CPPI_TEARDOWN_COMPLETE_BIT (0x08000000)
+#define EMAC_CPPI_PASS_CRC_BIT (0x04000000)
+
+#define EMAC_CPPI_RX_ERROR_FRAME (0x03fc0000)
+
+#define EMAC_MACCONTROL_MIIEN_ENABLE (0x20)
+#define EMAC_MACCONTROL_FULLDUPLEX_ENABLE (0x1)
+
+#define EMAC_RXMBPENABLE_RXCAFEN_ENABLE (0x200000)
+#define EMAC_RXMBPENABLE_RXBROADEN (0x2000)
+
+
+#define MDIO_CONTROL_IDLE (0x80000000)
+#define MDIO_CONTROL_ENABLE (0x40000000)
+#define MDIO_CONTROL_FAULT_ENABLE (0x40000)
+#define MDIO_CONTROL_FAULT (0x80000)
+#define MDIO_USERACCESS0_GO (0x80000000)
+#define MDIO_USERACCESS0_WRITE_READ (0x0)
+#define MDIO_USERACCESS0_WRITE_WRITE (0x40000000)
+#define MDIO_USERACCESS0_ACK (0x20000000)
+
+/* Ethernet MAC Registers Structure */
+typedef struct {
+ dv_reg TXIDVER;
+ dv_reg TXCONTROL;
+ dv_reg TXTEARDOWN;
+ u_int8_t RSVD0[4];
+ dv_reg RXIDVER;
+ dv_reg RXCONTROL;
+ dv_reg RXTEARDOWN;
+ u_int8_t RSVD1[100];
+ dv_reg TXINTSTATRAW;
+ dv_reg TXINTSTATMASKED;
+ dv_reg TXINTMASKSET;
+ dv_reg TXINTMASKCLEAR;
+ dv_reg MACINVECTOR;
+ u_int8_t RSVD2[12];
+ dv_reg RXINTSTATRAW;
+ dv_reg RXINTSTATMASKED;
+ dv_reg RXINTMASKSET;
+ dv_reg RXINTMASKCLEAR;
+ dv_reg MACINTSTATRAW;
+ dv_reg MACINTSTATMASKED;
+ dv_reg MACINTMASKSET;
+ dv_reg MACINTMASKCLEAR;
+ u_int8_t RSVD3[64];
+ dv_reg RXMBPENABLE;
+ dv_reg RXUNICASTSET;
+ dv_reg RXUNICASTCLEAR;
+ dv_reg RXMAXLEN;
+ dv_reg RXBUFFEROFFSET;
+ dv_reg RXFILTERLOWTHRESH;
+ u_int8_t RSVD4[8];
+ dv_reg RX0FLOWTHRESH;
+ dv_reg RX1FLOWTHRESH;
+ dv_reg RX2FLOWTHRESH;
+ dv_reg RX3FLOWTHRESH;
+ dv_reg RX4FLOWTHRESH;
+ dv_reg RX5FLOWTHRESH;
+ dv_reg RX6FLOWTHRESH;
+ dv_reg RX7FLOWTHRESH;
+ dv_reg RX0FREEBUFFER;
+ dv_reg RX1FREEBUFFER;
+ dv_reg RX2FREEBUFFER;
+ dv_reg RX3FREEBUFFER;
+ dv_reg RX4FREEBUFFER;
+ dv_reg RX5FREEBUFFER;
+ dv_reg RX6FREEBUFFER;
+ dv_reg RX7FREEBUFFER;
+ dv_reg MACCONTROL;
+ dv_reg MACSTATUS;
+ dv_reg EMCONTROL;
+ dv_reg FIFOCONTROL;
+ dv_reg MACCONFIG;
+ dv_reg SOFTRESET;
+ u_int8_t RSVD5[88];
+ dv_reg MACSRCADDRLO;
+ dv_reg MACSRCADDRHI;
+ dv_reg MACHASH1;
+ dv_reg MACHASH2;
+ dv_reg BOFFTEST;
+ dv_reg TPACETEST;
+ dv_reg RXPAUSE;
+ dv_reg TXPAUSE;
+ u_int8_t RSVD6[16];
+ dv_reg RXGOODFRAMES;
+ dv_reg RXBCASTFRAMES;
+ dv_reg RXMCASTFRAMES;
+ dv_reg RXPAUSEFRAMES;
+ dv_reg RXCRCERRORS;
+ dv_reg RXALIGNCODEERRORS;
+ dv_reg RXOVERSIZED;
+ dv_reg RXJABBER;
+ dv_reg RXUNDERSIZED;
+ dv_reg RXFRAGMENTS;
+ dv_reg RXFILTERED;
+ dv_reg RXQOSFILTERED;
+ dv_reg RXOCTETS;
+ dv_reg TXGOODFRAMES;
+ dv_reg TXBCASTFRAMES;
+ dv_reg TXMCASTFRAMES;
+ dv_reg TXPAUSEFRAMES;
+ dv_reg TXDEFERRED;
+ dv_reg TXCOLLISION;
+ dv_reg TXSINGLECOLL;
+ dv_reg TXMULTICOLL;
+ dv_reg TXEXCESSIVECOLL;
+ dv_reg TXLATECOLL;
+ dv_reg TXUNDERRUN;
+ dv_reg TXCARRIERSENSE;
+ dv_reg TXOCTETS;
+ dv_reg FRAME64;
+ dv_reg FRAME65T127;
+ dv_reg FRAME128T255;
+ dv_reg FRAME256T511;
+ dv_reg FRAME512T1023;
+ dv_reg FRAME1024TUP;
+ dv_reg NETOCTETS;
+ dv_reg RXSOFOVERRUNS;
+ dv_reg RXMOFOVERRUNS;
+ dv_reg RXDMAOVERRUNS;
+ u_int8_t RSVD7[624];
+ dv_reg MACADDRLO;
+ dv_reg MACADDRHI;
+ dv_reg MACINDEX;
+ u_int8_t RSVD8[244];
+ dv_reg TX0HDP;
+ dv_reg TX1HDP;
+ dv_reg TX2HDP;
+ dv_reg TX3HDP;
+ dv_reg TX4HDP;
+ dv_reg TX5HDP;
+ dv_reg TX6HDP;
+ dv_reg TX7HDP;
+ dv_reg RX0HDP;
+ dv_reg RX1HDP;
+ dv_reg RX2HDP;
+ dv_reg RX3HDP;
+ dv_reg RX4HDP;
+ dv_reg RX5HDP;
+ dv_reg RX6HDP;
+ dv_reg RX7HDP;
+ dv_reg TX0CP;
+ dv_reg TX1CP;
+ dv_reg TX2CP;
+ dv_reg TX3CP;
+ dv_reg TX4CP;
+ dv_reg TX5CP;
+ dv_reg TX6CP;
+ dv_reg TX7CP;
+ dv_reg RX0CP;
+ dv_reg RX1CP;
+ dv_reg RX2CP;
+ dv_reg RX3CP;
+ dv_reg RX4CP;
+ dv_reg RX5CP;
+ dv_reg RX6CP;
+ dv_reg RX7CP;
+} emac_regs;
+
+/* EMAC Wrapper Registers Structure */
+typedef struct {
+ u_int8_t RSVD0[4100];
+ dv_reg EWCTL;
+ dv_reg EWINTTCNT;
+} ewrap_regs;
+
+
+/* EMAC MDIO Registers Structure */
+typedef struct {
+ dv_reg VERSION;
+ dv_reg CONTROL;
+ dv_reg ALIVE;
+ dv_reg LINK;
+ dv_reg LINKINTRAW;
+ dv_reg LINKINTMASKED;
+ u_int8_t RSVD0[8];
+ dv_reg USERINTRAW;
+ dv_reg USERINTMASKED;
+ dv_reg USERINTMASKSET;
+ dv_reg USERINTMASKCLEAR;
+ u_int8_t RSVD1[80];
+ dv_reg USERACCESS0;
+ dv_reg USERPHYSEL0;
+ dv_reg USERACCESS1;
+ dv_reg USERPHYSEL1;
+} mdio_regs;
+
+int dm644x_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data);
+int dm644x_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data);
+
+typedef struct
+{
+ char name[64];
+ int (*init)(int phy_addr);
+ int (*is_phy_connected)(int phy_addr);
+ int (*get_link_speed)(int phy_addr);
+ int (*auto_negotiate)(int phy_addr);
+} phy_t;
+
+#define PHY_LXT972 (0x001378e2)
+int lxt972_is_phy_connected(int phy_addr);
+int lxt972_get_link_speed(int phy_addr);
+int lxt972_init_phy(int phy_addr);
+int lxt972_auto_negotiate(int phy_addr);
+
+#define PHY_DP83848 (0x20005c90)
+int dp83848_is_phy_connected(int phy_addr);
+int dp83848_get_link_speed(int phy_addr);
+int dp83848_init_phy(int phy_addr);
+int dp83848_auto_negotiate(int phy_addr);
+
+#endif /* _DM644X_EMAC_H_ */
diff --git a/include/asm-arm/arch-davinci/emif_defs.h b/include/asm-arm/arch-davinci/emif_defs.h
new file mode 100644
index 0000000..646fc77
--- /dev/null
+++ b/include/asm-arm/arch-davinci/emif_defs.h
@@ -0,0 +1,61 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _EMIF_DEFS_H_
+#define _EMIF_DEFS_H_
+
+#include <asm/arch/hardware.h>
+
+typedef struct {
+ dv_reg ERCSR;
+ dv_reg AWCCR;
+ dv_reg SDBCR;
+ dv_reg SDRCR;
+ dv_reg AB1CR;
+ dv_reg AB2CR;
+ dv_reg AB3CR;
+ dv_reg AB4CR;
+ dv_reg SDTIMR;
+ dv_reg DDRSR;
+ dv_reg DDRPHYCR;
+ dv_reg DDRPHYSR;
+ dv_reg TOTAR;
+ dv_reg TOTACTR;
+ dv_reg DDRPHYID_REV;
+ dv_reg SDSRETR;
+ dv_reg EIRR;
+ dv_reg EIMR;
+ dv_reg EIMSR;
+ dv_reg EIMCR;
+ dv_reg IOCTRLR;
+ dv_reg IOSTATR;
+ u_int8_t RSVD0[8];
+ dv_reg NANDFCR;
+ dv_reg NANDFSR;
+ u_int8_t RSVD1[8];
+ dv_reg NANDF1ECC;
+ dv_reg NANDF2ECC;
+ dv_reg NANDF3ECC;
+ dv_reg NANDF4ECC;
+} emif_registers;
+
+typedef emif_registers *emifregs;
+#endif
diff --git a/include/asm-arm/arch-davinci/hardware.h b/include/asm-arm/arch-davinci/hardware.h
new file mode 100644
index 0000000..ebcdcfe
--- /dev/null
+++ b/include/asm-arm/arch-davinci/hardware.h
@@ -0,0 +1,166 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Based on:
+ *
+ * -------------------------------------------------------------------------
+ *
+ * linux/include/asm-arm/arch-davinci/hardware.h
+ *
+ * Copyright (C) 2006 Texas Instruments.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+#include <config.h>
+#include <asm/sizes.h>
+
+#define REG(addr) (*(volatile unsigned int *)(addr))
+#define REG_P(addr) ((volatile unsigned int *)(addr))
+
+typedef volatile unsigned int dv_reg;
+typedef volatile unsigned int * dv_reg_p;
+
+/*
+ * Base register addresses
+ */
+#define DAVINCI_DMA_3PCC_BASE (0x01c00000)
+#define DAVINCI_DMA_3PTC0_BASE (0x01c10000)
+#define DAVINCI_DMA_3PTC1_BASE (0x01c10400)
+#define DAVINCI_UART0_BASE (0x01c20000)
+#define DAVINCI_UART1_BASE (0x01c20400)
+#define DAVINCI_UART2_BASE (0x01c20800)
+#define DAVINCI_I2C_BASE (0x01c21000)
+#define DAVINCI_TIMER0_BASE (0x01c21400)
+#define DAVINCI_TIMER1_BASE (0x01c21800)
+#define DAVINCI_WDOG_BASE (0x01c21c00)
+#define DAVINCI_PWM0_BASE (0x01c22000)
+#define DAVINCI_PWM1_BASE (0x01c22400)
+#define DAVINCI_PWM2_BASE (0x01c22800)
+#define DAVINCI_SYSTEM_MODULE_BASE (0x01c40000)
+#define DAVINCI_PLL_CNTRL0_BASE (0x01c40800)
+#define DAVINCI_PLL_CNTRL1_BASE (0x01c40c00)
+#define DAVINCI_PWR_SLEEP_CNTRL_BASE (0x01c41000)
+#define DAVINCI_SYSTEM_DFT_BASE (0x01c42000)
+#define DAVINCI_ARM_INTC_BASE (0x01c48000)
+#define DAVINCI_IEEE1394_BASE (0x01c60000)
+#define DAVINCI_USB_OTG_BASE (0x01c64000)
+#define DAVINCI_CFC_ATA_BASE (0x01c66000)
+#define DAVINCI_SPI_BASE (0x01c66800)
+#define DAVINCI_GPIO_BASE (0x01c67000)
+#define DAVINCI_UHPI_BASE (0x01c67800)
+#define DAVINCI_VPSS_REGS_BASE (0x01c70000)
+#define DAVINCI_EMAC_CNTRL_REGS_BASE (0x01c80000)
+#define DAVINCI_EMAC_WRAPPER_CNTRL_REGS_BASE (0x01c81000)
+#define DAVINCI_EMAC_WRAPPER_RAM_BASE (0x01c82000)
+#define DAVINCI_MDIO_CNTRL_REGS_BASE (0x01c84000)
+#define DAVINCI_IMCOP_BASE (0x01cc0000)
+#define DAVINCI_ASYNC_EMIF_CNTRL_BASE (0x01e00000)
+#define DAVINCI_VLYNQ_BASE (0x01e01000)
+#define DAVINCI_MCBSP_BASE (0x01e02000)
+#define DAVINCI_MMC_SD_BASE (0x01e10000)
+#define DAVINCI_MS_BASE (0x01e20000)
+#define DAVINCI_ASYNC_EMIF_DATA_CE0_BASE (0x02000000)
+#define DAVINCI_ASYNC_EMIF_DATA_CE1_BASE (0x04000000)
+#define DAVINCI_ASYNC_EMIF_DATA_CE2_BASE (0x06000000)
+#define DAVINCI_ASYNC_EMIF_DATA_CE3_BASE (0x08000000)
+#define DAVINCI_VLYNQ_REMOTE_BASE (0x0c000000)
+
+/* Power and Sleep Controller (PSC) Domains */
+#define DAVINCI_GPSC_ARMDOMAIN 0
+#define DAVINCI_GPSC_DSPDOMAIN 1
+
+#define DAVINCI_LPSC_VPSSMSTR 0
+#define DAVINCI_LPSC_VPSSSLV 1
+#define DAVINCI_LPSC_TPCC 2
+#define DAVINCI_LPSC_TPTC0 3
+#define DAVINCI_LPSC_TPTC1 4
+#define DAVINCI_LPSC_EMAC 5
+#define DAVINCI_LPSC_EMAC_WRAPPER 6
+#define DAVINCI_LPSC_MDIO 7
+#define DAVINCI_LPSC_IEEE1394 8
+#define DAVINCI_LPSC_USB 9
+#define DAVINCI_LPSC_ATA 10
+#define DAVINCI_LPSC_VLYNQ 11
+#define DAVINCI_LPSC_UHPI 12
+#define DAVINCI_LPSC_DDR_EMIF 13
+#define DAVINCI_LPSC_AEMIF 14
+#define DAVINCI_LPSC_MMC_SD 15
+#define DAVINCI_LPSC_MEMSTICK 16
+#define DAVINCI_LPSC_McBSP 17
+#define DAVINCI_LPSC_I2C 18
+#define DAVINCI_LPSC_UART0 19
+#define DAVINCI_LPSC_UART1 20
+#define DAVINCI_LPSC_UART2 21
+#define DAVINCI_LPSC_SPI 22
+#define DAVINCI_LPSC_PWM0 23
+#define DAVINCI_LPSC_PWM1 24
+#define DAVINCI_LPSC_PWM2 25
+#define DAVINCI_LPSC_GPIO 26
+#define DAVINCI_LPSC_TIMER0 27
+#define DAVINCI_LPSC_TIMER1 28
+#define DAVINCI_LPSC_TIMER2 29
+#define DAVINCI_LPSC_SYSTEM_SUBSYS 30
+#define DAVINCI_LPSC_ARM 31
+#define DAVINCI_LPSC_SCR2 32
+#define DAVINCI_LPSC_SCR3 33
+#define DAVINCI_LPSC_SCR4 34
+#define DAVINCI_LPSC_CROSSBAR 35
+#define DAVINCI_LPSC_CFG27 36
+#define DAVINCI_LPSC_CFG3 37
+#define DAVINCI_LPSC_CFG5 38
+#define DAVINCI_LPSC_GEM 39
+#define DAVINCI_LPSC_IMCOP 40
+
+/* Some PSC defines */
+#define PSC_CHP_SHRTSW (0x01c40038)
+#define PSC_GBLCTL (0x01c41010)
+#define PSC_EPCPR (0x01c41070)
+#define PSC_EPCCR (0x01c41078)
+#define PSC_PTCMD (0x01c41120)
+#define PSC_PTSTAT (0x01c41128)
+#define PSC_PDSTAT (0x01c41200)
+#define PSC_PDSTAT1 (0x01c41204)
+#define PSC_PDCTL (0x01c41300)
+#define PSC_PDCTL1 (0x01c41304)
+
+#define PSC_MDCTL_BASE (0x01c41a00)
+#define PSC_MDSTAT_BASE (0x01c41800)
+
+#define VDD3P3V_PWDN (0x01c40048)
+#define UART0_PWREMU_MGMT (0x01c20030)
+
+#define PSC_SILVER_BULLET (0x01c41a20)
+
+/* Some PLL defines */
+#define PLL1_PLLM (0x01c40910)
+#define PLL2_PLLM (0x01c40d10)
+#define PLL2_DIV2 (0x01c40d1c)
+
+/* Miscellania... */
+#define VBPR (0x20000020)
+#define PINMUX0 (0x01c40000)
+#define PINMUX1 (0x01c40004)
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-davinci/i2c_defs.h b/include/asm-arm/arch-davinci/i2c_defs.h
new file mode 100644
index 0000000..2e902e1
--- /dev/null
+++ b/include/asm-arm/arch-davinci/i2c_defs.h
@@ -0,0 +1,94 @@
+/*
+ * (C) Copyright 2004
+ * Texas Instruments, <www.ti.com>
+ *
+ * Some changes copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _DAVINCI_I2C_H_
+#define _DAVINCI_I2C_H_
+
+#define I2C_WRITE 0
+#define I2C_READ 1
+
+#define I2C_BASE 0x01c21000
+
+#define I2C_OA (I2C_BASE + 0x00)
+#define I2C_IE (I2C_BASE + 0x04)
+#define I2C_STAT (I2C_BASE + 0x08)
+#define I2C_SCLL (I2C_BASE + 0x0c)
+#define I2C_SCLH (I2C_BASE + 0x10)
+#define I2C_CNT (I2C_BASE + 0x14)
+#define I2C_DRR (I2C_BASE + 0x18)
+#define I2C_SA (I2C_BASE + 0x1c)
+#define I2C_DXR (I2C_BASE + 0x20)
+#define I2C_CON (I2C_BASE + 0x24)
+#define I2C_IV (I2C_BASE + 0x28)
+#define I2C_PSC (I2C_BASE + 0x30)
+
+/* I2C masks */
+
+/* I2C Interrupt Enable Register (I2C_IE): */
+#define I2C_IE_SCD_IE (1 << 5) /* Stop condition detect interrupt enable */
+#define I2C_IE_XRDY_IE (1 << 4) /* Transmit data ready interrupt enable */
+#define I2C_IE_RRDY_IE (1 << 3) /* Receive data ready interrupt enable */
+#define I2C_IE_ARDY_IE (1 << 2) /* Register access ready interrupt enable */
+#define I2C_IE_NACK_IE (1 << 1) /* No acknowledgment interrupt enable */
+#define I2C_IE_AL_IE (1 << 0) /* Arbitration lost interrupt enable */
+
+/* I2C Status Register (I2C_STAT): */
+
+#define I2C_STAT_BB (1 << 12) /* Bus busy */
+#define I2C_STAT_ROVR (1 << 11) /* Receive overrun */
+#define I2C_STAT_XUDF (1 << 10) /* Transmit underflow */
+#define I2C_STAT_AAS (1 << 9) /* Address as slave */
+#define I2C_STAT_SCD (1 << 5) /* Stop condition detect */
+#define I2C_STAT_XRDY (1 << 4) /* Transmit data ready */
+#define I2C_STAT_RRDY (1 << 3) /* Receive data ready */
+#define I2C_STAT_ARDY (1 << 2) /* Register access ready */
+#define I2C_STAT_NACK (1 << 1) /* No acknowledgment interrupt enable */
+#define I2C_STAT_AL (1 << 0) /* Arbitration lost interrupt enable */
+
+
+/* I2C Interrupt Code Register (I2C_INTCODE): */
+
+#define I2C_INTCODE_MASK 7
+#define I2C_INTCODE_NONE 0
+#define I2C_INTCODE_AL 1 /* Arbitration lost */
+#define I2C_INTCODE_NAK 2 /* No acknowledgement/general call */
+#define I2C_INTCODE_ARDY 3 /* Register access ready */
+#define I2C_INTCODE_RRDY 4 /* Rcv data ready */
+#define I2C_INTCODE_XRDY 5 /* Xmit data ready */
+#define I2C_INTCODE_SCD 6 /* Stop condition detect */
+
+
+/* I2C Configuration Register (I2C_CON): */
+
+#define I2C_CON_EN (1 << 5) /* I2C module enable */
+#define I2C_CON_STB (1 << 4) /* Start byte mode (master mode only) */
+#define I2C_CON_MST (1 << 10) /* Master/slave mode */
+#define I2C_CON_TRX (1 << 9) /* Transmitter/receiver mode (master mode only) */
+#define I2C_CON_XA (1 << 8) /* Expand address */
+#define I2C_CON_STP (1 << 11) /* Stop condition (master mode only) */
+#define I2C_CON_STT (1 << 13) /* Start condition (master mode only) */
+
+#define I2C_TIMEOUT 0xffff0000 /* Timeout mask for poll_i2c_irq() */
+
+#endif
diff --git a/include/asm-arm/arch-davinci/nand_defs.h b/include/asm-arm/arch-davinci/nand_defs.h
new file mode 100644
index 0000000..619bd47
--- /dev/null
+++ b/include/asm-arm/arch-davinci/nand_defs.h
@@ -0,0 +1,161 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * Parts shamelesly stolen from Linux Kernel source tree.
+ *
+ * ------------------------------------------------------------
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _NAND_DEFS_H_
+#define _NAND_DEFS_H_
+
+#include <asm/arch/hardware.h>
+
+#define MASK_CLE 0x10
+#define MASK_ALE 0x0a
+
+#define NAND_CE0CLE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x10))
+#define NAND_CE0ALE ((volatile u_int8_t *)(CFG_NAND_BASE + 0x0a))
+#define NAND_CE0DATA ((volatile u_int8_t *)CFG_NAND_BASE)
+
+typedef struct {
+ u_int32_t NRCSR;
+ u_int32_t AWCCR;
+ u_int8_t RSVD0[8];
+ u_int32_t AB1CR;
+ u_int32_t AB2CR;
+ u_int32_t AB3CR;
+ u_int32_t AB4CR;
+ u_int8_t RSVD1[32];
+ u_int32_t NIRR;
+ u_int32_t NIMR;
+ u_int32_t NIMSR;
+ u_int32_t NIMCR;
+ u_int8_t RSVD2[16];
+ u_int32_t NANDFCR;
+ u_int32_t NANDFSR;
+ u_int8_t RSVD3[8];
+ u_int32_t NANDF1ECC;
+ u_int32_t NANDF2ECC;
+ u_int32_t NANDF3ECC;
+ u_int32_t NANDF4ECC;
+ u_int8_t RSVD4[4];
+ u_int32_t IODFTECR;
+ u_int32_t IODFTGCR;
+ u_int8_t RSVD5[4];
+ u_int32_t IODFTMRLR;
+ u_int32_t IODFTMRMR;
+ u_int32_t IODFTMRMSBR;
+ u_int8_t RSVD6[20];
+ u_int32_t MODRNR;
+ u_int8_t RSVD7[76];
+ u_int32_t CE0DATA;
+ u_int32_t CE0ALE;
+ u_int32_t CE0CLE;
+ u_int8_t RSVD8[4];
+ u_int32_t CE1DATA;
+ u_int32_t CE1ALE;
+ u_int32_t CE1CLE;
+ u_int8_t RSVD9[4];
+ u_int32_t CE2DATA;
+ u_int32_t CE2ALE;
+ u_int32_t CE2CLE;
+ u_int8_t RSVD10[4];
+ u_int32_t CE3DATA;
+ u_int32_t CE3ALE;
+ u_int32_t CE3CLE;
+} nand_registers;
+
+typedef volatile nand_registers *nandregs;
+
+#define NAND_READ_START 0x00
+#define NAND_READ_END 0x30
+#define NAND_STATUS 0x70
+
+#ifdef CFG_NAND_HW_ECC
+#define NAND_Ecc_P1e (1 << 0)
+#define NAND_Ecc_P2e (1 << 1)
+#define NAND_Ecc_P4e (1 << 2)
+#define NAND_Ecc_P8e (1 << 3)
+#define NAND_Ecc_P16e (1 << 4)
+#define NAND_Ecc_P32e (1 << 5)
+#define NAND_Ecc_P64e (1 << 6)
+#define NAND_Ecc_P128e (1 << 7)
+#define NAND_Ecc_P256e (1 << 8)
+#define NAND_Ecc_P512e (1 << 9)
+#define NAND_Ecc_P1024e (1 << 10)
+#define NAND_Ecc_P2048e (1 << 11)
+
+#define NAND_Ecc_P1o (1 << 16)
+#define NAND_Ecc_P2o (1 << 17)
+#define NAND_Ecc_P4o (1 << 18)
+#define NAND_Ecc_P8o (1 << 19)
+#define NAND_Ecc_P16o (1 << 20)
+#define NAND_Ecc_P32o (1 << 21)
+#define NAND_Ecc_P64o (1 << 22)
+#define NAND_Ecc_P128o (1 << 23)
+#define NAND_Ecc_P256o (1 << 24)
+#define NAND_Ecc_P512o (1 << 25)
+#define NAND_Ecc_P1024o (1 << 26)
+#define NAND_Ecc_P2048o (1 << 27)
+
+#define TF(v) (v ? 1 : 0)
+
+#define P2048e(a) (TF(a & NAND_Ecc_P2048e) << 0)
+#define P2048o(a) (TF(a & NAND_Ecc_P2048o) << 1)
+#define P1e(a) (TF(a & NAND_Ecc_P1e) << 2)
+#define P1o(a) (TF(a & NAND_Ecc_P1o) << 3)
+#define P2e(a) (TF(a & NAND_Ecc_P2e) << 4)
+#define P2o(a) (TF(a & NAND_Ecc_P2o) << 5)
+#define P4e(a) (TF(a & NAND_Ecc_P4e) << 6)
+#define P4o(a) (TF(a & NAND_Ecc_P4o) << 7)
+
+#define P8e(a) (TF(a & NAND_Ecc_P8e) << 0)
+#define P8o(a) (TF(a & NAND_Ecc_P8o) << 1)
+#define P16e(a) (TF(a & NAND_Ecc_P16e) << 2)
+#define P16o(a) (TF(a & NAND_Ecc_P16o) << 3)
+#define P32e(a) (TF(a & NAND_Ecc_P32e) << 4)
+#define P32o(a) (TF(a & NAND_Ecc_P32o) << 5)
+#define P64e(a) (TF(a & NAND_Ecc_P64e) << 6)
+#define P64o(a) (TF(a & NAND_Ecc_P64o) << 7)
+
+#define P128e(a) (TF(a & NAND_Ecc_P128e) << 0)
+#define P128o(a) (TF(a & NAND_Ecc_P128o) << 1)
+#define P256e(a) (TF(a & NAND_Ecc_P256e) << 2)
+#define P256o(a) (TF(a & NAND_Ecc_P256o) << 3)
+#define P512e(a) (TF(a & NAND_Ecc_P512e) << 4)
+#define P512o(a) (TF(a & NAND_Ecc_P512o) << 5)
+#define P1024e(a) (TF(a & NAND_Ecc_P1024e) << 6)
+#define P1024o(a) (TF(a & NAND_Ecc_P1024o) << 7)
+
+#define P8e_s(a) (TF(a & NAND_Ecc_P8e) << 0)
+#define P8o_s(a) (TF(a & NAND_Ecc_P8o) << 1)
+#define P16e_s(a) (TF(a & NAND_Ecc_P16e) << 2)
+#define P16o_s(a) (TF(a & NAND_Ecc_P16o) << 3)
+#define P1e_s(a) (TF(a & NAND_Ecc_P1e) << 4)
+#define P1o_s(a) (TF(a & NAND_Ecc_P1o) << 5)
+#define P2e_s(a) (TF(a & NAND_Ecc_P2e) << 6)
+#define P2o_s(a) (TF(a & NAND_Ecc_P2o) << 7)
+
+#define P4e_s(a) (TF(a & NAND_Ecc_P4e) << 0)
+#define P4o_s(a) (TF(a & NAND_Ecc_P4o) << 1)
+#endif
+
+#endif
diff --git a/include/asm-arm/arch-lpc2292/hardware.h b/include/asm-arm/arch-lpc2292/hardware.h
new file mode 100644
index 0000000..fd2b464
--- /dev/null
+++ b/include/asm-arm/arch-lpc2292/hardware.h
@@ -0,0 +1,33 @@
+#ifndef __ASM_ARCH_HARDWARE_H
+#define __ASM_ARCH_HARDWARE_H
+
+/*
+ * Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
+ * Curt Brune <curt@cucy.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#if defined(CONFIG_LPC2292)
+#include <asm-arm/arch-lpc2292/lpc2292_registers.h>
+#else
+#error No hardware file defined for this configuration
+#endif
+
+#endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/include/asm-arm/arch-arm720t/lpc2292_registers.h b/include/asm-arm/arch-lpc2292/lpc2292_registers.h
similarity index 100%
rename from include/asm-arm/arch-arm720t/lpc2292_registers.h
rename to include/asm-arm/arch-lpc2292/lpc2292_registers.h
diff --git a/include/asm-arm/arch-arm720t/mmc.h b/include/asm-arm/arch-lpc2292/mmc.h
similarity index 100%
rename from include/asm-arm/arch-arm720t/mmc.h
rename to include/asm-arm/arch-lpc2292/mmc.h
diff --git a/board/lpc2292sodimm/spi.h b/include/asm-arm/arch-lpc2292/spi.h
similarity index 100%
rename from board/lpc2292sodimm/spi.h
rename to include/asm-arm/arch-lpc2292/spi.h
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h
index ebda719..9b4da3a 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -592,9 +592,11 @@
#define PMC_REG_BASE __REG(0x40500400) /* Primary Modem Codec */
#define SMC_REG_BASE __REG(0x40500500) /* Secondary Modem Codec */
+
/*
* USB Device Controller
*/
+#ifndef CONFIG_CPU_MONAHANS
#define UDC_RES1 __REG(0x40600004) /* UDC Undocumented - Reserved1 */
#define UDC_RES2 __REG(0x40600008) /* UDC Undocumented - Reserved2 */
#define UDC_RES3 __REG(0x4060000C) /* UDC Undocumented - Reserved3 */
@@ -749,11 +751,28 @@
#define USIR1_IR13 (1 << 5) /* Interrup request ep 13 */
#define USIR1_IR14 (1 << 6) /* Interrup request ep 14 */
#define USIR1_IR15 (1 << 7) /* Interrup request ep 15 */
+#endif /* ! CONFIG_CPU_MONAHANS */
-#if defined(CONFIG_PXA27X)
+#if defined(CONFIG_PXA27X) || defined(CONFIG_CPU_MONAHANS)
+
+/*
+ * USB Client Controller (incomplete)
+ */
+#define UDCCR __REG(0x40600000)
+#define UDCICR0 __REG(0x40600004)
+#define UDCCIR0 __REG(0x40600008)
+#define UDCISR0 __REG(0x4060000c)
+#define UDCSIR1 __REG(0x40600010)
+#define UDCFNR __REG(0x40600014)
+#define UDCOTGICR __REG(0x40600018)
+#define UDCOTGISR __REG(0x4060001c)
+#define UP2OCR __REG(0x40600020)
+#define UP3OCR __REG(0x40600024)
+
/*
* USB Host Controller
*/
+#define OHCI_REGS_BASE 0x4C000000 /* required for ohci driver */
#define UHCREV __REG(0x4C000000)
#define UHCHCON __REG(0x4C000004)
#define UHCCOMS __REG(0x4C000008)
@@ -1269,15 +1288,15 @@
#define _GEDR(x) __REG2(0x40E00048, ((x) & 0x60) >> 3)
#define _GAFR(x) __REG2(0x40E00054, ((x) & 0x70) >> 2)
-#define GPLR(x) ((((x) & 0x7f) < 96) ? _GPLR(x) : GPLR3)
-#define GPDR(x) ((((x) & 0x7f) < 96) ? _GPDR(x) : GPDR3)
-#define GPSR(x) ((((x) & 0x7f) < 96) ? _GPSR(x) : GPSR3)
-#define GPCR(x) ((((x) & 0x7f) < 96) ? _GPCR(x) : GPCR3)
-#define GRER(x) ((((x) & 0x7f) < 96) ? _GRER(x) : GRER3)
-#define GFER(x) ((((x) & 0x7f) < 96) ? _GFER(x) : GFER3)
-#define GEDR(x) ((((x) & 0x7f) < 96) ? _GEDR(x) : GEDR3)
-#define GAFR(x) ((((x) & 0x7f) < 96) ? _GAFR(x) : \
- ((((x) & 0x7f) < 112) ? GAFR3_L : GAFR3_U))
+#define GPLR(x) __REG2(0x40E00000 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GPDR(x) __REG2(0x40E0000C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GPSR(x) __REG2(0x40E00018 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GPCR(x) __REG2(0x40E00024 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GRER(x) __REG2(0x40E00030 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GFER(x) __REG2(0x40E0003C + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GEDR(x) __REG2(0x40E00048 + (((x) & 0x7f) < 96) ? 0:0x100, ((x) & 0x60) >> 3)
+#define GAFR(x) __REG2((((x) & 0x7f) < 96) ? 0x40E00054 : \
+ ((((x) & 0x7f) < 112) ? 0x40E0006C : 0x40E00070),((x) & 0x60) >> 3)
#else
#define GPLR(x) __REG2(0x40E00000, ((x) & 0x60) >> 3)
diff --git a/include/asm-arm/mach-types.h b/include/asm-arm/mach-types.h
index 7d7888e..f6a5b4f 100644
--- a/include/asm-arm/mach-types.h
+++ b/include/asm-arm/mach-types.h
@@ -736,7 +736,11 @@
#define MACH_TYPE_LN2410SBC 725
#define MACH_TYPE_CB3RUFC 726
#define MACH_TYPE_MP2USB 727
+#define MACH_TYPE_AT91SAM9261EK 848
#define MACH_TYPE_PDNB3 1002
+#define MACH_TYPE_AT91SAM9260EK 1099
+#define MACH_TYPE_AT91RM9200DF 1119
+#define MACH_TYPE_AT91SAM9263EK 1202
#ifdef CONFIG_ARCH_EBSA110
# ifdef machine_arch_type
@@ -9402,6 +9406,71 @@
# define machine_is_mp2usb() (0)
#endif
+#ifdef CONFIG_MACH_AT91SAM9261EK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AT91SAM9261EK
+# endif
+# define machine_is_at91sam9261ek() \
+ (machine_arch_type == MACH_TYPE_AT91SAM9261EK)
+#else
+# define machine_is_at91sam9261ek() (0)
+#endif
+
+#ifdef CONFIG_MACH_AT91SAM9260EK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AT91SAM9260EK
+# endif
+# define machine_is_at91sam9260ek() \
+ (machine_arch_type == MACH_TYPE_AT91SAM9260EK)
+#else
+# define machine_is_at91sam9260ek() (0)
+#endif
+
+#ifdef CONFIG_MACH_AT91SAM9263EK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AT91SAM9263EK
+# endif
+# define machine_is_at91sam9263ek() \
+ (machine_arch_type == MACH_TYPE_AT91SAM9263EK)
+#else
+# define machine_is_at91sam9263ek() (0)
+#endif
+
+#ifdef CONFIG_MACH_AT91RM9200DF
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AT91RM9200DF
+# endif
+# define machine_is_at91rm9200df() \
+ (machine_arch_type == MACH_TYPE_AT91RM9200DF)
+#else
+# define machine_is_at91rm9200df() (0)
+#endif
+
+#ifdef CONFIG_MACH_AT91SAM9263EK
+# ifdef machine_arch_type
+# undef machine_arch_type
+# define machine_arch_type __machine_arch_type
+# else
+# define machine_arch_type MACH_TYPE_AT91SAM9263EK
+# endif
+# define machine_is_at91sam9263ek() \
+ (machine_arch_type == MACH_TYPE_AT91SAM9263EK)
+#else
+# define machine_is_at91sam9263ek() (0)
+#endif
+
/*
* These have not yet been registered
*/
diff --git a/include/asm-m68k/bitops.h b/include/asm-m68k/bitops.h
index 3283714..0f9e8ab 100644
--- a/include/asm-m68k/bitops.h
+++ b/include/asm-m68k/bitops.h
@@ -15,4 +15,43 @@
extern int test_and_clear_bit(int nr, volatile void *addr);
extern int test_and_change_bit(int nr, volatile void *addr);
+#ifdef __KERNEL__
+
+/*
+ * ffs: find first bit set. This is defined the same way as
+ * the libc and compiler builtin ffs routines, therefore
+ * differs in spirit from the above ffz (man ffs).
+ */
+extern __inline__ int ffs(int x)
+{
+ int r = 1;
+
+ if (!x)
+ return 0;
+ if (!(x & 0xffff)) {
+ x >>= 16;
+ r += 16;
+ }
+ if (!(x & 0xff)) {
+ x >>= 8;
+ r += 8;
+ }
+ if (!(x & 0xf)) {
+ x >>= 4;
+ r += 4;
+ }
+ if (!(x & 3)) {
+ x >>= 2;
+ r += 2;
+ }
+ if (!(x & 1)) {
+ x >>= 1;
+ r += 1;
+ }
+ return r;
+}
+#define __ffs(x) (ffs(x) - 1)
+
+#endif /* __KERNEL__ */
+
#endif /* _M68K_BITOPS_H */
diff --git a/include/asm-m68k/byteorder.h b/include/asm-m68k/byteorder.h
index ce613ac..0e2a0ed 100644
--- a/include/asm-m68k/byteorder.h
+++ b/include/asm-m68k/byteorder.h
@@ -1,7 +1,107 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
#ifndef _M68K_BYTEORDER_H
#define _M68K_BYTEORDER_H
#include <asm/types.h>
+
+#ifdef __GNUC__
+#define __sw16(x) \
+ ((__u16)( \
+ (((__u16)(x) & (__u16)0x00ffU) << 8) | \
+ (((__u16)(x) & (__u16)0xff00U) >> 8) ))
+#define __sw32(x) \
+ ((__u32)( \
+ (((__u32)(x)) << 24) | \
+ (((__u32)(x) & (__u32)0x0000ff00UL) << 8) | \
+ (((__u32)(x) & (__u32)0x00ff0000UL) >> 8) | \
+ (((__u32)(x)) >> 24) ))
+
+extern __inline__ unsigned ld_le16(const volatile unsigned short *addr)
+{
+ unsigned result = *addr;
+ return __sw16(result);
+}
+
+extern __inline__ void st_le16(volatile unsigned short *addr,
+ const unsigned val)
+{
+ *addr = __sw16(val);
+}
+
+extern __inline__ unsigned ld_le32(const volatile unsigned *addr)
+{
+ unsigned result = *addr;
+ return __sw32(result);
+}
+
+extern __inline__ void st_le32(volatile unsigned *addr, const unsigned val)
+{
+ *addr = __sw32(val);
+}
+
+#if 0
+/* alas, egcs sounds like it has a bug in this code that doesn't use the
+ inline asm correctly, and can cause file corruption. Until I hear that
+ it's fixed, I can live without the extra speed. I hope. */
+#if !(__GNUC__ >= 2 && __GNUC_MINOR__ >= 90)
+#if 0
+# define __arch_swab16(x) ld_le16(&x)
+# define __arch_swab32(x) ld_le32(&x)
+#else
+static __inline__ __attribute__ ((const))
+__u16 ___arch__swab16(__u16 value)
+{
+ return __sw16(value);
+}
+
+static __inline__ __attribute__ ((const))
+__u32 ___arch__swab32(__u32 value)
+{
+ return __sw32(value);
+}
+
+#define __arch__swab32(x) ___arch__swab32(x)
+#define __arch__swab16(x) ___arch__swab16(x)
+#endif /* 0 */
+
+#endif
+
+/* The same, but returns converted value from the location pointer by addr. */
+#define __arch__swab16p(addr) ld_le16(addr)
+#define __arch__swab32p(addr) ld_le32(addr)
+
+/* The same, but do the conversion in situ, ie. put the value back to addr. */
+#define __arch__swab16s(addr) st_le16(addr,*addr)
+#define __arch__swab32s(addr) st_le32(addr,*addr)
+#endif
+
+#endif /* __GNUC__ */
+
+#if defined(__GNUC__) && !defined(__STRICT_ANSI__)
+#define __BYTEORDER_HAS_U64__
+#endif
#include <linux/byteorder/big_endian.h>
-#endif /* _M68K_BYTEORDER_H */
+#endif /* _M68K_BYTEORDER_H */
diff --git a/include/asm-m68k/errno.h b/include/asm-m68k/errno.h
new file mode 100644
index 0000000..ff364b8
--- /dev/null
+++ b/include/asm-m68k/errno.h
@@ -0,0 +1,138 @@
+#ifndef _PPC_ERRNO_H
+#define _PPC_ERRNO_H
+
+#define EPERM 1 /* Operation not permitted */
+#define ENOENT 2 /* No such file or directory */
+#define ESRCH 3 /* No such process */
+#define EINTR 4 /* Interrupted system call */
+#define EIO 5 /* I/O error */
+#define ENXIO 6 /* No such device or address */
+#define E2BIG 7 /* Arg list too long */
+#define ENOEXEC 8 /* Exec format error */
+#define EBADF 9 /* Bad file number */
+#define ECHILD 10 /* No child processes */
+#define EAGAIN 11 /* Try again */
+#define ENOMEM 12 /* Out of memory */
+#define EACCES 13 /* Permission denied */
+#define EFAULT 14 /* Bad address */
+#define ENOTBLK 15 /* Block device required */
+#define EBUSY 16 /* Device or resource busy */
+#define EEXIST 17 /* File exists */
+#define EXDEV 18 /* Cross-device link */
+#define ENODEV 19 /* No such device */
+#define ENOTDIR 20 /* Not a directory */
+#define EISDIR 21 /* Is a directory */
+#define EINVAL 22 /* Invalid argument */
+#define ENFILE 23 /* File table overflow */
+#define EMFILE 24 /* Too many open files */
+#define ENOTTY 25 /* Not a typewriter */
+#define ETXTBSY 26 /* Text file busy */
+#define EFBIG 27 /* File too large */
+#define ENOSPC 28 /* No space left on device */
+#define ESPIPE 29 /* Illegal seek */
+#define EROFS 30 /* Read-only file system */
+#define EMLINK 31 /* Too many links */
+#define EPIPE 32 /* Broken pipe */
+#define EDOM 33 /* Math argument out of domain of func */
+#define ERANGE 34 /* Math result not representable */
+#define EDEADLK 35 /* Resource deadlock would occur */
+#define ENAMETOOLONG 36 /* File name too long */
+#define ENOLCK 37 /* No record locks available */
+#define ENOSYS 38 /* Function not implemented */
+#define ENOTEMPTY 39 /* Directory not empty */
+#define ELOOP 40 /* Too many symbolic links encountered */
+#define EWOULDBLOCK EAGAIN /* Operation would block */
+#define ENOMSG 42 /* No message of desired type */
+#define EIDRM 43 /* Identifier removed */
+#define ECHRNG 44 /* Channel number out of range */
+#define EL2NSYNC 45 /* Level 2 not synchronized */
+#define EL3HLT 46 /* Level 3 halted */
+#define EL3RST 47 /* Level 3 reset */
+#define ELNRNG 48 /* Link number out of range */
+#define EUNATCH 49 /* Protocol driver not attached */
+#define ENOCSI 50 /* No CSI structure available */
+#define EL2HLT 51 /* Level 2 halted */
+#define EBADE 52 /* Invalid exchange */
+#define EBADR 53 /* Invalid request descriptor */
+#define EXFULL 54 /* Exchange full */
+#define ENOANO 55 /* No anode */
+#define EBADRQC 56 /* Invalid request code */
+#define EBADSLT 57 /* Invalid slot */
+#define EDEADLOCK 58 /* File locking deadlock error */
+#define EBFONT 59 /* Bad font file format */
+#define ENOSTR 60 /* Device not a stream */
+#define ENODATA 61 /* No data available */
+#define ETIME 62 /* Timer expired */
+#define ENOSR 63 /* Out of streams resources */
+#define ENONET 64 /* Machine is not on the network */
+#define ENOPKG 65 /* Package not installed */
+#define EREMOTE 66 /* Object is remote */
+#define ENOLINK 67 /* Link has been severed */
+#define EADV 68 /* Advertise error */
+#define ESRMNT 69 /* Srmount error */
+#define ECOMM 70 /* Communication error on send */
+#define EPROTO 71 /* Protocol error */
+#define EMULTIHOP 72 /* Multihop attempted */
+#define EDOTDOT 73 /* RFS specific error */
+#define EBADMSG 74 /* Not a data message */
+#define EOVERFLOW 75 /* Value too large for defined data type */
+#define ENOTUNIQ 76 /* Name not unique on network */
+#define EBADFD 77 /* File descriptor in bad state */
+#define EREMCHG 78 /* Remote address changed */
+#define ELIBACC 79 /* Can not access a needed shared library */
+#define ELIBBAD 80 /* Accessing a corrupted shared library */
+#define ELIBSCN 81 /* .lib section in a.out corrupted */
+#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
+#define ELIBEXEC 83 /* Cannot exec a shared library directly */
+#define EILSEQ 84 /* Illegal byte sequence */
+#define ERESTART 85 /* Interrupted system call should be restarted */
+#define ESTRPIPE 86 /* Streams pipe error */
+#define EUSERS 87 /* Too many users */
+#define ENOTSOCK 88 /* Socket operation on non-socket */
+#define EDESTADDRREQ 89 /* Destination address required */
+#define EMSGSIZE 90 /* Message too long */
+#define EPROTOTYPE 91 /* Protocol wrong type for socket */
+#define ENOPROTOOPT 92 /* Protocol not available */
+#define EPROTONOSUPPORT 93 /* Protocol not supported */
+#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
+#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
+#define EPFNOSUPPORT 96 /* Protocol family not supported */
+#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
+#define EADDRINUSE 98 /* Address already in use */
+#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
+#define ENETDOWN 100 /* Network is down */
+#define ENETUNREACH 101 /* Network is unreachable */
+#define ENETRESET 102 /* Network dropped connection because of reset */
+#define ECONNABORTED 103 /* Software caused connection abort */
+#define ECONNRESET 104 /* Connection reset by peer */
+#define ENOBUFS 105 /* No buffer space available */
+#define EISCONN 106 /* Transport endpoint is already connected */
+#define ENOTCONN 107 /* Transport endpoint is not connected */
+#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
+#define ETOOMANYREFS 109 /* Too many references: cannot splice */
+#define ETIMEDOUT 110 /* Connection timed out */
+#define ECONNREFUSED 111 /* Connection refused */
+#define EHOSTDOWN 112 /* Host is down */
+#define EHOSTUNREACH 113 /* No route to host */
+#define EALREADY 114 /* Operation already in progress */
+#define EINPROGRESS 115 /* Operation now in progress */
+#define ESTALE 116 /* Stale NFS file handle */
+#define EUCLEAN 117 /* Structure needs cleaning */
+#define ENOTNAM 118 /* Not a XENIX named type file */
+#define ENAVAIL 119 /* No XENIX semaphores available */
+#define EISNAM 120 /* Is a named type file */
+#define EREMOTEIO 121 /* Remote I/O error */
+#define EDQUOT 122 /* Quota exceeded */
+
+#define ENOMEDIUM 123 /* No medium found */
+#define EMEDIUMTYPE 124 /* Wrong medium type */
+
+/* Should never be seen by user programs */
+#define ERESTARTSYS 512
+#define ERESTARTNOINTR 513
+#define ERESTARTNOHAND 514 /* restart if no handler.. */
+#define ENOIOCTLCMD 515 /* No ioctl command */
+
+#define _LAST_ERRNO 515
+
+#endif
diff --git a/include/asm-m68k/fec.h b/include/asm-m68k/fec.h
index 5bbbfb2..344c5e1 100644
--- a/include/asm-m68k/fec.h
+++ b/include/asm-m68k/fec.h
@@ -5,6 +5,10 @@
* MPC8xx Communication Processor Module.
* Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
*
+ * Add FEC Structure and definitions
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
* See file CREDITS for list of people who contributed to this
* project.
*
@@ -30,9 +34,9 @@
/* Buffer descriptors used FEC.
*/
typedef struct cpm_buf_desc {
- ushort cbd_sc; /* Status and Control */
- ushort cbd_datlen; /* Data length in buffer */
- uint cbd_bufaddr; /* Buffer address in host memory */
+ ushort cbd_sc; /* Status and Control */
+ ushort cbd_datlen; /* Data length in buffer */
+ uint cbd_bufaddr; /* Buffer address in host memory */
} cbd_t;
#define BD_SC_EMPTY ((ushort)0x8000) /* Recieve is empty */
@@ -53,28 +57,36 @@
/* Buffer descriptor control/status used by Ethernet receive.
*/
#define BD_ENET_RX_EMPTY ((ushort)0x8000)
+#define BD_ENET_RX_RO1 ((ushort)0x4000)
#define BD_ENET_RX_WRAP ((ushort)0x2000)
#define BD_ENET_RX_INTR ((ushort)0x1000)
+#define BD_ENET_RX_RO2 BD_ENET_RX_INTR
#define BD_ENET_RX_LAST ((ushort)0x0800)
#define BD_ENET_RX_FIRST ((ushort)0x0400)
#define BD_ENET_RX_MISS ((ushort)0x0100)
+#define BD_ENET_RX_BC ((ushort)0x0080)
+#define BD_ENET_RX_MC ((ushort)0x0040)
#define BD_ENET_RX_LG ((ushort)0x0020)
#define BD_ENET_RX_NO ((ushort)0x0010)
#define BD_ENET_RX_SH ((ushort)0x0008)
#define BD_ENET_RX_CR ((ushort)0x0004)
#define BD_ENET_RX_OV ((ushort)0x0002)
#define BD_ENET_RX_CL ((ushort)0x0001)
+#define BD_ENET_RX_TR BD_ENET_RX_CL
#define BD_ENET_RX_STATS ((ushort)0x013f) /* All status bits */
/* Buffer descriptor control/status used by Ethernet transmit.
*/
#define BD_ENET_TX_READY ((ushort)0x8000)
#define BD_ENET_TX_PAD ((ushort)0x4000)
+#define BD_ENET_TX_TO1 BD_ENET_TX_PAD
#define BD_ENET_TX_WRAP ((ushort)0x2000)
#define BD_ENET_TX_INTR ((ushort)0x1000)
+#define BD_ENET_TX_TO2 BD_ENET_TX_INTR_
#define BD_ENET_TX_LAST ((ushort)0x0800)
#define BD_ENET_TX_TC ((ushort)0x0400)
#define BD_ENET_TX_DEF ((ushort)0x0200)
+#define BD_ENET_TX_ABC BD_ENET_TX_DEF
#define BD_ENET_TX_HB ((ushort)0x0100)
#define BD_ENET_TX_LC ((ushort)0x0080)
#define BD_ENET_TX_RL ((ushort)0x0040)
@@ -83,4 +95,261 @@
#define BD_ENET_TX_CSL ((ushort)0x0001)
#define BD_ENET_TX_STATS ((ushort)0x03ff) /* All status bits */
-#endif /* fec_h */
+#ifdef CONFIG_MCFFEC
+/*********************************************************************
+*
+* Fast Ethernet Controller (FEC)
+*
+*********************************************************************/
+/* FEC private information */
+struct fec_info_s {
+ int index;
+ u32 iobase;
+ u32 pinmux;
+ u32 miibase;
+ int phy_addr;
+ int dup_spd;
+ char *phy_name;
+ int phyname_init;
+ cbd_t *rxbd; /* Rx BD */
+ cbd_t *txbd; /* Tx BD */
+ uint rxIdx;
+ uint txIdx;
+ char *txbuf;
+ int initialized;
+};
+
+/* Register read/write struct */
+typedef struct fec {
+#ifdef CONFIG_M5272
+ u32 ecr; /* 0x00 */
+ u32 eir; /* 0x04 */
+ u32 eimr; /* 0x08 */
+ u32 ivsr; /* 0x0C */
+ u32 rdar; /* 0x10 */
+ u32 tdar; /* 0x14 */
+ u8 resv1[0x28]; /* 0x18 */
+ u32 mmfr; /* 0x40 */
+ u32 mscr; /* 0x44 */
+ u8 resv2[0x44]; /* 0x48 */
+ u32 frbr; /* 0x8C */
+ u32 frsr; /* 0x90 */
+ u8 resv3[0x10]; /* 0x94 */
+ u32 tfwr; /* 0xA4 */
+ u32 res4; /* 0xA8 */
+ u32 tfsr; /* 0xAC */
+ u8 resv4[0x50]; /* 0xB0 */
+ u32 opd; /* 0x100 - dummy */
+ u32 rcr; /* 0x104 */
+ u32 mibc; /* 0x108 */
+ u8 resv5[0x38]; /* 0x10C */
+ u32 tcr; /* 0x144 */
+ u8 resv6[0x270]; /* 0x148 */
+ u32 iaur; /* 0x3B8 - dummy */
+ u32 ialr; /* 0x3BC - dummy */
+ u32 palr; /* 0x3C0 */
+ u32 paur; /* 0x3C4 */
+ u32 gaur; /* 0x3C8 */
+ u32 galr; /* 0x3CC */
+ u32 erdsr; /* 0x3D0 */
+ u32 etdsr; /* 0x3D4 */
+ u32 emrbr; /* 0x3D8 */
+ u8 resv12[0x74]; /* 0x18C */
+#else
+ u8 resv0[0x4];
+ u32 eir;
+ u32 eimr;
+ u8 resv1[0x4];
+ u32 rdar;
+ u32 tdar;
+ u8 resv2[0xC];
+ u32 ecr;
+ u8 resv3[0x18];
+ u32 mmfr;
+ u32 mscr;
+ u8 resv4[0x1C];
+ u32 mibc;
+ u8 resv5[0x1C];
+ u32 rcr;
+ u8 resv6[0x3C];
+ u32 tcr;
+ u8 resv7[0x1C];
+ u32 palr;
+ u32 paur;
+ u32 opd;
+ u8 resv8[0x28];
+ u32 iaur;
+ u32 ialr;
+ u32 gaur;
+ u32 galr;
+ u8 resv9[0x1C];
+ u32 tfwr;
+ u8 resv10[0x4];
+ u32 frbr;
+ u32 frsr;
+ u8 resv11[0x2C];
+ u32 erdsr;
+ u32 etdsr;
+ u32 emrbr;
+ u8 resv12[0x74];
+#endif
+
+ u32 rmon_t_drop;
+ u32 rmon_t_packets;
+ u32 rmon_t_bc_pkt;
+ u32 rmon_t_mc_pkt;
+ u32 rmon_t_crc_align;
+ u32 rmon_t_undersize;
+ u32 rmon_t_oversize;
+ u32 rmon_t_frag;
+ u32 rmon_t_jab;
+ u32 rmon_t_col;
+ u32 rmon_t_p64;
+ u32 rmon_t_p65to127;
+ u32 rmon_t_p128to255;
+ u32 rmon_t_p256to511;
+ u32 rmon_t_p512to1023;
+ u32 rmon_t_p1024to2047;
+ u32 rmon_t_p_gte2048;
+ u32 rmon_t_octets;
+
+ u32 ieee_t_drop;
+ u32 ieee_t_frame_ok;
+ u32 ieee_t_1col;
+ u32 ieee_t_mcol;
+ u32 ieee_t_def;
+ u32 ieee_t_lcol;
+ u32 ieee_t_excol;
+ u32 ieee_t_macerr;
+ u32 ieee_t_cserr;
+ u32 ieee_t_sqe;
+ u32 ieee_t_fdxfc;
+ u32 ieee_t_octets_ok;
+ u8 resv13[0x8];
+
+ u32 rmon_r_drop;
+ u32 rmon_r_packets;
+ u32 rmon_r_bc_pkt;
+ u32 rmon_r_mc_pkt;
+ u32 rmon_r_crc_align;
+ u32 rmon_r_undersize;
+ u32 rmon_r_oversize;
+ u32 rmon_r_frag;
+ u32 rmon_r_jab;
+ u32 rmon_r_resvd_0;
+ u32 rmon_r_p64;
+ u32 rmon_r_p65to127;
+ u32 rmon_r_p128to255;
+ u32 rmon_r_p256to511;
+ u32 rmon_r_p512to1023;
+ u32 rmon_r_p1024to2047;
+ u32 rmon_r_p_gte2048;
+ u32 rmon_r_octets;
+
+ u32 ieee_r_drop;
+ u32 ieee_r_frame_ok;
+ u32 ieee_r_crc;
+ u32 ieee_r_align;
+ u32 ieee_r_macerr;
+ u32 ieee_r_fdxfc;
+ u32 ieee_r_octets_ok;
+} fec_t;
+
+/*********************************************************************
+* Fast Ethernet Controller (FEC)
+*********************************************************************/
+/* Bit definitions and macros for FEC_EIR */
+#define FEC_EIR_CLEAR_ALL (0xFFF80000)
+#define FEC_EIR_HBERR (0x80000000)
+#define FEC_EIR_BABR (0x40000000)
+#define FEC_EIR_BABT (0x20000000)
+#define FEC_EIR_GRA (0x10000000)
+#define FEC_EIR_TXF (0x08000000)
+#define FEC_EIR_TXB (0x04000000)
+#define FEC_EIR_RXF (0x02000000)
+#define FEC_EIR_RXB (0x01000000)
+#define FEC_EIR_MII (0x00800000)
+#define FEC_EIR_EBERR (0x00400000)
+#define FEC_EIR_LC (0x00200000)
+#define FEC_EIR_RL (0x00100000)
+#define FEC_EIR_UN (0x00080000)
+
+/* Bit definitions and macros for FEC_RDAR */
+#define FEC_RDAR_R_DES_ACTIVE (0x01000000)
+
+/* Bit definitions and macros for FEC_TDAR */
+#define FEC_TDAR_X_DES_ACTIVE (0x01000000)
+
+/* Bit definitions and macros for FEC_ECR */
+#define FEC_ECR_ETHER_EN (0x00000002)
+#define FEC_ECR_RESET (0x00000001)
+
+/* Bit definitions and macros for FEC_MMFR */
+#define FEC_MMFR_DATA(x) (((x)&0xFFFF))
+#define FEC_MMFR_ST(x) (((x)&0x03)<<30)
+#define FEC_MMFR_ST_01 (0x40000000)
+#define FEC_MMFR_OP_RD (0x20000000)
+#define FEC_MMFR_OP_WR (0x10000000)
+#define FEC_MMFR_PA(x) (((x)&0x1F)<<23)
+#define FEC_MMFR_RA(x) (((x)&0x1F)<<18)
+#define FEC_MMFR_TA(x) (((x)&0x03)<<16)
+#define FEC_MMFR_TA_10 (0x00020000)
+
+/* Bit definitions and macros for FEC_MSCR */
+#define FEC_MSCR_DIS_PREAMBLE (0x00000080)
+#define FEC_MSCR_MII_SPEED(x) (((x)&0x3F)<<1)
+
+/* Bit definitions and macros for FEC_MIBC */
+#define FEC_MIBC_MIB_DISABLE (0x80000000)
+#define FEC_MIBC_MIB_IDLE (0x40000000)
+
+/* Bit definitions and macros for FEC_RCR */
+#define FEC_RCR_MAX_FL(x) (((x)&0x7FF)<<16)
+#define FEC_RCR_FCE (0x00000020)
+#define FEC_RCR_BC_REJ (0x00000010)
+#define FEC_RCR_PROM (0x00000008)
+#define FEC_RCR_MII_MODE (0x00000004)
+#define FEC_RCR_DRT (0x00000002)
+#define FEC_RCR_LOOP (0x00000001)
+
+/* Bit definitions and macros for FEC_TCR */
+#define FEC_TCR_RFC_PAUSE (0x00000010)
+#define FEC_TCR_TFC_PAUSE (0x00000008)
+#define FEC_TCR_FDEN (0x00000004)
+#define FEC_TCR_HBC (0x00000002)
+#define FEC_TCR_GTS (0x00000001)
+
+/* Bit definitions and macros for FEC_PAUR */
+#define FEC_PAUR_PADDR2(x) (((x)&0xFFFF)<<16)
+#define FEC_PAUR_TYPE(x) ((x)&0xFFFF)
+
+/* Bit definitions and macros for FEC_OPD */
+#define FEC_OPD_PAUSE_DUR(x) (((x)&0x0000FFFF)<<0)
+#define FEC_OPD_OPCODE(x) (((x)&0x0000FFFF)<<16)
+
+/* Bit definitions and macros for FEC_TFWR */
+#define FEC_TFWR_X_WMRK(x) ((x)&0x03)
+#define FEC_TFWR_X_WMRK_64 (0x01)
+#define FEC_TFWR_X_WMRK_128 (0x02)
+#define FEC_TFWR_X_WMRK_192 (0x03)
+
+/* Bit definitions and macros for FEC_FRBR */
+#define FEC_FRBR_R_BOUND(x) (((x)&0xFF)<<2)
+
+/* Bit definitions and macros for FEC_FRSR */
+#define FEC_FRSR_R_FSTART(x) (((x)&0xFF)<<2)
+
+/* Bit definitions and macros for FEC_ERDSR */
+#define FEC_ERDSR_R_DES_START(x) (((x)&0x3FFFFFFF)<<2)
+
+/* Bit definitions and macros for FEC_ETDSR */
+#define FEC_ETDSR_X_DES_START(x) (((x)&0x3FFFFFFF)<<2)
+
+/* Bit definitions and macros for FEC_EMRBR */
+#define FEC_EMRBR_R_BUF_SIZE(x) (((x)&0x7F)<<4)
+
+#define FEC_RESET_DELAY 100
+#define FEC_RX_TOUT 100
+
+#endif /* CONFIG_MCFFEC */
+#endif /* fec_h */
diff --git a/include/asm-m68k/fsl_i2c.h b/include/asm-m68k/fsl_i2c.h
new file mode 100644
index 0000000..4f71341
--- /dev/null
+++ b/include/asm-m68k/fsl_i2c.h
@@ -0,0 +1,86 @@
+/*
+ * Freescale I2C Controller
+ *
+ * Copyright 2006 Freescale Semiconductor, Inc.
+ *
+ * Based on earlier versions by Gleb Natapov <gnatapov@mrv.com>,
+ * Xianghua Xiao <x.xiao@motorola.com>, Eran Liberty (liberty@freescale.com),
+ * and Jeff Brown.
+ * Some bits are taken from linux driver writen by adrian@humboldt.co.uk.
+ *
+ * This software may be used and distributed according to the
+ * terms of the GNU Public License, Version 2, incorporated
+ * herein by reference.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * Version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _ASM_FSL_I2C_H_
+#define _ASM_FSL_I2C_H_
+
+#include <asm/types.h>
+
+typedef struct fsl_i2c {
+
+ u8 adr; /* I2C slave address */
+ u8 res0[3];
+#define I2C_ADR 0xFE
+#define I2C_ADR_SHIFT 1
+#define I2C_ADR_RES ~(I2C_ADR)
+
+ u8 fdr; /* I2C frequency divider register */
+ u8 res1[3];
+#define IC2_FDR 0x3F
+#define IC2_FDR_SHIFT 0
+#define IC2_FDR_RES ~(IC2_FDR)
+
+ u8 cr; /* I2C control redister */
+ u8 res2[3];
+#define I2C_CR_MEN 0x80
+#define I2C_CR_MIEN 0x40
+#define I2C_CR_MSTA 0x20
+#define I2C_CR_MTX 0x10
+#define I2C_CR_TXAK 0x08
+#define I2C_CR_RSTA 0x04
+#define I2C_CR_BCST 0x01
+
+ u8 sr; /* I2C status register */
+ u8 res3[3];
+#define I2C_SR_MCF 0x80
+#define I2C_SR_MAAS 0x40
+#define I2C_SR_MBB 0x20
+#define I2C_SR_MAL 0x10
+#define I2C_SR_BCSTM 0x08
+#define I2C_SR_SRW 0x04
+#define I2C_SR_MIF 0x02
+#define I2C_SR_RXAK 0x01
+
+ u8 dr; /* I2C data register */
+ u8 res4[3];
+#define I2C_DR 0xFF
+#define I2C_DR_SHIFT 0
+#define I2C_DR_RES ~(I2C_DR)
+
+ u8 dfsrr; /* I2C digital filter sampling rate register */
+ u8 res5[3];
+#define I2C_DFSRR 0x3F
+#define I2C_DFSRR_SHIFT 0
+#define I2C_DFSRR_RES ~(I2C_DR)
+
+ /* Fill out the reserved block */
+ u8 res6[0xE8];
+} fsl_i2c_t;
+
+#endif /* _ASM_I2C_H_ */
diff --git a/include/asm-m68k/global_data.h b/include/asm-m68k/global_data.h
index f68352f..9d9894b 100644
--- a/include/asm-m68k/global_data.h
+++ b/include/asm-m68k/global_data.h
@@ -39,6 +39,14 @@
unsigned long baudrate;
unsigned long cpu_clk; /* CPU clock in Hz! */
unsigned long bus_clk;
+#ifdef CONFIG_PCI
+ unsigned long pci_clk;
+#endif
+#ifdef CONFIG_EXTRA_CLOCK
+ unsigned long inp_clk;
+ unsigned long vco_clk;
+ unsigned long flb_clk;
+#endif
unsigned long ram_size; /* RAM size */
unsigned long reloc_off; /* Relocation Offset */
unsigned long reset_status; /* reset status register at boot */
diff --git a/include/asm-m68k/immap.h b/include/asm-m68k/immap.h
new file mode 100644
index 0000000..ffb9a37
--- /dev/null
+++ b/include/asm-m68k/immap.h
@@ -0,0 +1,242 @@
+/*
+ * ColdFire Internal Memory Map and Defines
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_H
+#define __IMMAP_H
+
+#ifdef CONFIG_M5235
+#include <asm/immap_5235.h>
+#include <asm/m5235.h>
+
+#define CFG_FEC0_IOBASE (MMAP_FEC)
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40))
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR3)
+#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprl0)
+#define CFG_TMRINTR_NO (INT0_LO_DTMR3)
+#define CFG_TMRINTR_MASK (INTC_IPRL_INT22)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (0x1E) /* Level must include inorder to work */
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#endif
+
+#ifdef CONFIG_MCFPIT
+#define CFG_UDELAY_BASE (MMAP_PIT0)
+#define CFG_PIT_BASE (MMAP_PIT1)
+#define CFG_PIT_PRESCALE (6)
+#endif
+
+#define CFG_INTR_BASE (MMAP_INTC0)
+#define CFG_NUM_IRQS (128)
+#endif /* CONFIG_M5235 */
+
+#ifdef CONFIG_M5249
+#include <asm/immap_5249.h>
+#include <asm/m5249.h>
+
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40))
+
+#define CFG_INTR_BASE (MMAP_INTC)
+#define CFG_NUM_IRQS (64)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR1)
+#define CFG_TMRPND_REG (mbar_readLong(MCFSIM_IPR))
+#define CFG_TMRINTR_NO (31)
+#define CFG_TMRINTR_MASK (0x00000400)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3)
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8)
+#endif
+#endif /* CONFIG_M5249 */
+
+#ifdef CONFIG_M5253
+#include <asm/immap_5253.h>
+#include <asm/m5249.h>
+#include <asm/m5253.h>
+
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40))
+
+#define CFG_INTR_BASE (MMAP_INTC)
+#define CFG_NUM_IRQS (64)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR1)
+#define CFG_TMRPND_REG (mbar_readLong(MCFSIM_IPR))
+#define CFG_TMRINTR_NO (27)
+#define CFG_TMRINTR_MASK (0x00000400)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3)
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8)
+#endif
+#endif /* CONFIG_M5253 */
+
+#ifdef CONFIG_M5271
+#include <asm/immap_5271.h>
+#include <asm/m5271.h>
+
+#define CFG_FEC0_IOBASE (MMAP_FEC)
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40))
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR3)
+#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprl0)
+#define CFG_TMRINTR_NO (INT0_LO_DTMR3)
+#define CFG_TMRINTR_MASK (INTC_IPRL_INT22)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (0) /* Level must include inorder to work */
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#endif
+
+#define CFG_INTR_BASE (MMAP_INTC0)
+#define CFG_NUM_IRQS (128)
+#endif /* CONFIG_M5271 */
+
+#ifdef CONFIG_M5272
+#include <asm/immap_5272.h>
+#include <asm/m5272.h>
+
+#define CFG_FEC0_IOBASE (MMAP_FEC)
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40))
+
+#define CFG_INTR_BASE (MMAP_INTC)
+#define CFG_NUM_IRQS (64)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_TMR0)
+#define CFG_TMR_BASE (MMAP_TMR3)
+#define CFG_TMRPND_REG (((volatile intctrl_t *)(CFG_INTR_BASE))->int_isr)
+#define CFG_TMRINTR_NO (INT_TMR3)
+#define CFG_TMRINTR_MASK (INT_ISR_INT24)
+#define CFG_TMRINTR_PEND (0)
+#define CFG_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5))
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#endif
+#endif /* CONFIG_M5272 */
+
+#ifdef CONFIG_M5282
+#include <asm/immap_5282.h>
+#include <asm/m5282.h>
+
+#define CFG_FEC0_IOBASE (MMAP_FEC)
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x40))
+
+#define CFG_INTR_BASE (MMAP_INTC0)
+#define CFG_NUM_IRQS (128)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR3)
+#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprl0)
+#define CFG_TMRINTR_NO (INT0_LO_DTMR3)
+#define CFG_TMRINTR_MASK (1 << INT0_LO_DTMR3)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (0x1E) /* Level must include inorder to work */
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#endif
+#endif /* CONFIG_M5282 */
+
+#ifdef CONFIG_M5329
+#include <asm/immap_5329.h>
+#include <asm/m5329.h>
+
+#define CFG_FEC0_IOBASE (MMAP_FEC)
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x4000))
+#define CFG_MCFRTC_BASE (MMAP_RTC)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR1)
+#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprh0)
+#define CFG_TMRINTR_NO (INT0_HI_DTMR1)
+#define CFG_TMRINTR_MASK (INTC_IPRH_INT33)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (6)
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#endif
+
+#ifdef CONFIG_MCFPIT
+#define CFG_UDELAY_BASE (MMAP_PIT0)
+#define CFG_PIT_BASE (MMAP_PIT1)
+#define CFG_PIT_PRESCALE (6)
+#endif
+
+#define CFG_INTR_BASE (MMAP_INTC0)
+#define CFG_NUM_IRQS (128)
+#endif /* CONFIG_M5329 */
+
+#ifdef CONFIG_M54455
+#include <asm/immap_5445x.h>
+#include <asm/m5445x.h>
+
+#define CFG_FEC0_IOBASE (MMAP_FEC0)
+#define CFG_FEC1_IOBASE (MMAP_FEC1)
+
+#define CFG_UART_BASE (MMAP_UART0 + (CFG_UART_PORT * 0x4000))
+
+#define CFG_MCFRTC_BASE (MMAP_RTC)
+
+/* Timer */
+#ifdef CONFIG_MCFTMR
+#define CFG_UDELAY_BASE (MMAP_DTMR0)
+#define CFG_TMR_BASE (MMAP_DTMR1)
+#define CFG_TMRPND_REG (((volatile int0_t *)(CFG_INTR_BASE))->iprh0)
+#define CFG_TMRINTR_NO (INT0_HI_DTMR1)
+#define CFG_TMRINTR_MASK (INTC_IPRH_INT33)
+#define CFG_TMRINTR_PEND (CFG_TMRINTR_MASK)
+#define CFG_TMRINTR_PRI (6)
+#define CFG_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#endif
+
+#ifdef CONFIG_MCFPIT
+#define CFG_UDELAY_BASE (MMAP_PIT0)
+#define CFG_PIT_BASE (MMAP_PIT1)
+#define CFG_PIT_PRESCALE (6)
+#endif
+
+#define CFG_INTR_BASE (MMAP_INTC0)
+#define CFG_NUM_IRQS (128)
+
+#ifdef CONFIG_PCI
+#define CFG_PCI_BAR0 CFG_SDRAM_BASE
+#define CFG_PCI_BAR4 CFG_SDRAM_BASE
+#define CFG_PCI_TBATR0 (CFG_SDRAM_BASE)
+#define CFG_PCI_TBATR4 (CFG_SDRAM_BASE)
+#endif
+#endif /* CONFIG_M54455 */
+
+#endif /* __IMMAP_H */
diff --git a/include/asm-m68k/immap_5235.h b/include/asm-m68k/immap_5235.h
new file mode 100644
index 0000000..4a03450
--- /dev/null
+++ b/include/asm-m68k/immap_5235.h
@@ -0,0 +1,378 @@
+/*
+ * MCF5329 Internal Memory Map
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5235__
+#define __IMMAP_5235__
+
+#define MMAP_SCM (CFG_MBAR + 0x00000000)
+#define MMAP_SDRAM (CFG_MBAR + 0x00000040)
+#define MMAP_FBCS (CFG_MBAR + 0x00000080)
+#define MMAP_DMA0 (CFG_MBAR + 0x00000100)
+#define MMAP_DMA1 (CFG_MBAR + 0x00000110)
+#define MMAP_DMA2 (CFG_MBAR + 0x00000120)
+#define MMAP_DMA3 (CFG_MBAR + 0x00000130)
+#define MMAP_UART0 (CFG_MBAR + 0x00000200)
+#define MMAP_UART1 (CFG_MBAR + 0x00000240)
+#define MMAP_UART2 (CFG_MBAR + 0x00000280)
+#define MMAP_I2C (CFG_MBAR + 0x00000300)
+#define MMAP_QSPI (CFG_MBAR + 0x00000340)
+#define MMAP_DTMR0 (CFG_MBAR + 0x00000400)
+#define MMAP_DTMR1 (CFG_MBAR + 0x00000440)
+#define MMAP_DTMR2 (CFG_MBAR + 0x00000480)
+#define MMAP_DTMR3 (CFG_MBAR + 0x000004C0)
+#define MMAP_INTC0 (CFG_MBAR + 0x00000C00)
+#define MMAP_INTC1 (CFG_MBAR + 0x00000D00)
+#define MMAP_INTCACK (CFG_MBAR + 0x00000F00)
+#define MMAP_FEC (CFG_MBAR + 0x00001000)
+#define MMAP_FECFIFO (CFG_MBAR + 0x00001400)
+#define MMAP_GPIO (CFG_MBAR + 0x00100000)
+#define MMAP_CCM (CFG_MBAR + 0x00110000)
+#define MMAP_PLL (CFG_MBAR + 0x00120000)
+#define MMAP_EPORT (CFG_MBAR + 0x00130000)
+#define MMAP_WDOG (CFG_MBAR + 0x00140000)
+#define MMAP_PIT0 (CFG_MBAR + 0x00150000)
+#define MMAP_PIT1 (CFG_MBAR + 0x00160000)
+#define MMAP_PIT2 (CFG_MBAR + 0x00170000)
+#define MMAP_PIT3 (CFG_MBAR + 0x00180000)
+#define MMAP_MDHA (CFG_MBAR + 0x00190000)
+#define MMAP_RNG (CFG_MBAR + 0x001A0000)
+#define MMAP_SKHA (CFG_MBAR + 0x001B0000)
+#define MMAP_CAN1 (CFG_MBAR + 0x001C0000)
+#define MMAP_ETPU (CFG_MBAR + 0x001D0000)
+#define MMAP_CAN2 (CFG_MBAR + 0x001F0000)
+
+/* System Control Module register */
+typedef struct scm_ctrl {
+ u32 ipsbar; /* 0x00 - MBAR */
+ u32 res1; /* 0x04 */
+ u32 rambar; /* 0x08 - RAMBAR */
+ u32 res2; /* 0x0C */
+ u8 crsr; /* 0x10 Core Reset Status Register */
+ u8 cwcr; /* 0x11 Core Watchdog Control Register */
+ u8 lpicr; /* 0x12 Low-Power Interrupt Control Register */
+ u8 cwsr; /* 0x13 Core Watchdog Service Register */
+ u32 dmareqc; /* 0x14 */
+ u32 res3; /* 0x18 */
+ u32 mpark; /* 0x1C */
+ u8 mpr; /* 0x20 */
+ u8 res4[3]; /* 0x21 - 0x23 */
+ u8 pacr0; /* 0x24 */
+ u8 pacr1; /* 0x25 */
+ u8 pacr2; /* 0x26 */
+ u8 pacr3; /* 0x27 */
+ u8 pacr4; /* 0x28 */
+ u32 res5; /* 0x29 */
+ u8 pacr5; /* 0x2a */
+ u8 pacr6; /* 0x2b */
+ u8 pacr7; /* 0x2c */
+ u32 res6; /* 0x2d */
+ u8 pacr8; /* 0x2e */
+ u32 res7; /* 0x2f */
+ u8 gpacr; /* 0x30 */
+ u8 res8[3]; /* 0x31 - 0x33 */
+} scm_t;
+
+/* SDRAM controller registers */
+typedef struct sdram_ctrl {
+ u16 dcr; /* 0x00 Control register */
+ u16 res1[3]; /* 0x02 - 0x07 */
+ u32 dacr0; /* 0x08 address and control register 0 */
+ u32 dmr0; /* 0x0C mask register block 0 */
+ u32 dacr1; /* 0x10 address and control register 1 */
+ u32 dmr1; /* 0x14 mask register block 1 */
+} sdram_t;
+
+/* Flexbus module Chip select registers */
+typedef struct fbcs_ctrl {
+ u16 csar0; /* 0x00 Chip-Select Address Register 0 */
+ u16 res0;
+ u32 csmr0; /* 0x04 Chip-Select Mask Register 0 */
+ u16 res1; /* 0x08 */
+ u16 cscr0; /* 0x0A Chip-Select Control Register 0 */
+
+ u16 csar1; /* 0x0C Chip-Select Address Register 1 */
+ u16 res2;
+ u32 csmr1; /* 0x10 Chip-Select Mask Register 1 */
+ u16 res3; /* 0x14 */
+ u16 cscr1; /* 0x16 Chip-Select Control Register 1 */
+
+ u16 csar2; /* 0x18 Chip-Select Address Register 2 */
+ u16 res4;
+ u32 csmr2; /* 0x1C Chip-Select Mask Register 2 */
+ u16 res5; /* 0x20 */
+ u16 cscr2; /* 0x22 Chip-Select Control Register 2 */
+
+ u16 csar3; /* 0x24 Chip-Select Address Register 3 */
+ u16 res6;
+ u32 csmr3; /* 0x28 Chip-Select Mask Register 3 */
+ u16 res7; /* 0x2C */
+ u16 cscr3; /* 0x2E Chip-Select Control Register 3 */
+
+ u16 csar4; /* 0x30 Chip-Select Address Register 4 */
+ u16 res8;
+ u32 csmr4; /* 0x34 Chip-Select Mask Register 4 */
+ u16 res9; /* 0x38 */
+ u16 cscr4; /* 0x3A Chip-Select Control Register 4 */
+
+ u16 csar5; /* 0x3C Chip-Select Address Register 5 */
+ u16 res10;
+ u32 csmr5; /* 0x40 Chip-Select Mask Register 5 */
+ u16 res11; /* 0x44 */
+ u16 cscr5; /* 0x46 Chip-Select Control Register 5 */
+
+ u16 csar6; /* 0x48 Chip-Select Address Register 5 */
+ u16 res12;
+ u32 csmr6; /* 0x4C Chip-Select Mask Register 5 */
+ u16 res13; /* 0x50 */
+ u16 cscr6; /* 0x52 Chip-Select Control Register 5 */
+
+ u16 csar7; /* 0x54 Chip-Select Address Register 5 */
+ u16 res14;
+ u32 csmr7; /* 0x58 Chip-Select Mask Register 5 */
+ u16 res15; /* 0x5C */
+ u16 cscr7; /* 0x5E Chip-Select Control Register 5 */
+} fbcs_t;
+
+/* QSPI module registers */
+typedef struct qspi_ctrl {
+ u16 qmr; /* Mode register */
+ u16 res1;
+ u16 qdlyr; /* Delay register */
+ u16 res2;
+ u16 qwr; /* Wrap register */
+ u16 res3;
+ u16 qir; /* Interrupt register */
+ u16 res4;
+ u16 qar; /* Address register */
+ u16 res5;
+ u16 qdr; /* Data register */
+ u16 res6;
+} qspi_t;
+
+/* Interrupt module registers */
+typedef struct int0_ctrl {
+ /* Interrupt Controller 0 */
+ u32 iprh0; /* 0x00 Pending Register High */
+ u32 iprl0; /* 0x04 Pending Register Low */
+ u32 imrh0; /* 0x08 Mask Register High */
+ u32 imrl0; /* 0x0C Mask Register Low */
+ u32 frch0; /* 0x10 Force Register High */
+ u32 frcl0; /* 0x14 Force Register Low */
+ u8 irlr; /* 0x18 */
+ u8 iacklpr; /* 0x19 */
+ u16 res1[19]; /* 0x1a - 0x3c */
+ u8 icr0[64]; /* 0x40 - 0x7F Control registers */
+ u32 res3[24]; /* 0x80 - 0xDF */
+ u8 swiack0; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res4[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack0_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res5[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack0_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE9 - 0xEB */
+ u8 Lniack0_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xED - 0xEF */
+ u8 Lniack0_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack0_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack0_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF9 - 0xFB */
+ u8 Lniack0_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xFD - 0xFF */
+} int0_t;
+
+typedef struct int1_ctrl {
+ /* Interrupt Controller 1 */
+ u32 iprh1; /* 0x00 Pending Register High */
+ u32 iprl1; /* 0x04 Pending Register Low */
+ u32 imrh1; /* 0x08 Mask Register High */
+ u32 imrl1; /* 0x0C Mask Register Low */
+ u32 frch1; /* 0x10 Force Register High */
+ u32 frcl1; /* 0x14 Force Register Low */
+ u8 irlr; /* 0x18 */
+ u8 iacklpr; /* 0x19 */
+ u16 res1[19]; /* 0x1a - 0x3c */
+ u8 icr1[64]; /* 0x40 - 0x7F */
+ u32 res4[24]; /* 0x80 - 0xDF */
+ u8 swiack1; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res5[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack1_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack1_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xE9 - 0xEB */
+ u8 Lniack1_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xED - 0xEF */
+ u8 Lniack1_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack1_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack1_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xF9 - 0xFB */
+ u8 Lniack1_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resc[3]; /* 0xFD - 0xFF */
+} int1_t;
+
+typedef struct intgack_ctrl1 {
+ /* Global IACK Registers */
+ u8 swiack; /* 0xE0 Global Software Interrupt Acknowledge */
+ u8 Lniack[7]; /* 0xE1 - 0xE7 Global Level 0 Interrupt Acknowledge */
+} intgack_t;
+
+/* GPIO port registers */
+typedef struct gpio_ctrl {
+ /* Port Output Data Registers */
+ u8 podr_addr; /* 0x00 */
+ u8 podr_datah; /* 0x01 */
+ u8 podr_datal; /* 0x02 */
+ u8 podr_busctl; /* 0x03 */
+ u8 podr_bs; /* 0x04 */
+ u8 podr_cs; /* 0x05 */
+ u8 podr_sdram; /* 0x06 */
+ u8 podr_feci2c; /* 0x07 */
+ u8 podr_uarth; /* 0x08 */
+ u8 podr_uartl; /* 0x09 */
+ u8 podr_qspi; /* 0x0A */
+ u8 podr_timer; /* 0x0B */
+ u8 podr_etpu; /* 0x0C */
+ u8 res1[3]; /* 0x0D - 0x0F */
+
+ /* Port Data Direction Registers */
+ u8 pddr_addr; /* 0x10 */
+ u8 pddr_datah; /* 0x11 */
+ u8 pddr_datal; /* 0x12 */
+ u8 pddr_busctl; /* 0x13 */
+ u8 pddr_bs; /* 0x14 */
+ u8 pddr_cs; /* 0x15 */
+ u8 pddr_sdram; /* 0x16 */
+ u8 pddr_feci2c; /* 0x17 */
+ u8 pddr_uarth; /* 0x18 */
+ u8 pddr_uartl; /* 0x19 */
+ u8 pddr_qspi; /* 0x1A */
+ u8 pddr_timer; /* 0x1B */
+ u8 pddr_etpu; /* 0x1C */
+ u8 res2[3]; /* 0x1D - 0x1F */
+
+ /* Port Data Direction Registers */
+ u8 ppdsdr_addr; /* 0x20 */
+ u8 ppdsdr_datah; /* 0x21 */
+ u8 ppdsdr_datal; /* 0x22 */
+ u8 ppdsdr_busctl; /* 0x23 */
+ u8 ppdsdr_bs; /* 0x24 */
+ u8 ppdsdr_cs; /* 0x25 */
+ u8 ppdsdr_sdram; /* 0x26 */
+ u8 ppdsdr_feci2c; /* 0x27 */
+ u8 ppdsdr_uarth; /* 0x28 */
+ u8 ppdsdr_uartl; /* 0x29 */
+ u8 ppdsdr_qspi; /* 0x2A */
+ u8 ppdsdr_timer; /* 0x2B */
+ u8 ppdsdr_etpu; /* 0x2C */
+ u8 res3[3]; /* 0x2D - 0x2F */
+
+ /* Port Clear Output Data Registers */
+ u8 pclrr_addr; /* 0x30 */
+ u8 pclrr_datah; /* 0x31 */
+ u8 pclrr_datal; /* 0x32 */
+ u8 pclrr_busctl; /* 0x33 */
+ u8 pclrr_bs; /* 0x34 */
+ u8 pclrr_cs; /* 0x35 */
+ u8 pclrr_sdram; /* 0x36 */
+ u8 pclrr_feci2c; /* 0x37 */
+ u8 pclrr_uarth; /* 0x38 */
+ u8 pclrr_uartl; /* 0x39 */
+ u8 pclrr_qspi; /* 0x3A */
+ u8 pclrr_timer; /* 0x3B */
+ u8 pclrr_etpu; /* 0x3C */
+ u8 res4[3]; /* 0x3D - 0x3F */
+
+ /* Pin Assignment Registers */
+ u8 par_ad; /* 0x40 */
+ u8 res5; /* 0x41 */
+ u16 par_busctl; /* 0x42 */
+ u8 par_bs; /* 0x44 */
+ u8 par_cs; /* 0x45 */
+ u8 par_sdram; /* 0x46 */
+ u8 par_feci2c; /* 0x47 */
+ u16 par_uart; /* 0x48 */
+ u8 par_qspi; /* 0x4A */
+ u8 res6; /* 0x4B */
+ u16 par_timer; /* 0x4C */
+ u8 par_etpu; /* 0x4E */
+ u8 res7; /* 0x4F */
+
+ /* Drive Strength Control Registers */
+ u8 dscr_eim; /* 0x50 */
+ u8 dscr_etpu; /* 0x51 */
+ u8 dscr_feci2c; /* 0x52 */
+ u8 dscr_uart; /* 0x53 */
+ u8 dscr_qspi; /* 0x54 */
+ u8 dscr_timer; /* 0x55 */
+ u16 res8; /* 0x56 */
+} gpio_t;
+
+/*Chip configuration module registers */
+typedef struct ccm_ctrl {
+ u8 rcr; /* 0x01 */
+ u8 rsr; /* 0x02 */
+ u16 res1; /* 0x03 */
+ u16 ccr; /* 0x04 Chip configuration register */
+ u16 lpcr; /* 0x06 Low-power Control register */
+ u16 rcon; /* 0x08 Rreset configuration register */
+ u16 cir; /* 0x0a Chip identification register */
+} ccm_t;
+
+/* Clock Module registers */
+typedef struct pll_ctrl {
+ u32 syncr; /* 0x00 synthesizer control register */
+ u32 synsr; /* 0x04 synthesizer status register */
+} pll_t;
+
+/* Watchdog registers */
+typedef struct wdog_ctrl {
+ u16 cr; /* 0x00 Control register */
+ u16 mr; /* 0x02 Modulus register */
+ u16 cntr; /* 0x04 Count register */
+ u16 sr; /* 0x06 Service register */
+} wdog_t;
+
+/* FlexCan module registers */
+typedef struct can_ctrl {
+ u32 mcr; /* 0x00 Module Configuration register */
+ u32 ctrl; /* 0x04 Control register */
+ u32 timer; /* 0x08 Free Running Timer */
+ u32 res1; /* 0x0C */
+ u32 rxgmask; /* 0x10 Rx Global Mask */
+ u32 rx14mask; /* 0x14 RxBuffer 14 Mask */
+ u32 rx15mask; /* 0x18 RxBuffer 15 Mask */
+ u32 errcnt; /* 0x1C Error Counter Register */
+ u32 errstat; /* 0x20 Error and status Register */
+ u32 res2; /* 0x24 */
+ u32 imask; /* 0x28 Interrupt Mask Register */
+ u32 res3; /* 0x2C */
+ u32 iflag; /* 0x30 Interrupt Flag Register */
+ u32 res4[19]; /* 0x34 - 0x7F */
+ u32 MB0_15[2048]; /* 0x80 Message Buffer 0-15 */
+} can_t;
+
+#endif /* __IMMAP_5235__ */
diff --git a/include/asm-m68k/immap_5249.h b/include/asm-m68k/immap_5249.h
index a2c1271..6c6fbcc 100644
--- a/include/asm-m68k/immap_5249.h
+++ b/include/asm-m68k/immap_5249.h
@@ -25,19 +25,11 @@
#ifndef __IMMAP_5249__
#define __IMMAP_5249__
-/* Timer module registers
- */
-typedef struct timer_ctrl {
- ushort timer_tmr;
- ushort res1;
- ushort timer_trr;
- ushort res2;
- ushort timer_tcap;
- ushort res3;
- ushort timer_tcn;
- ushort res4;
- ushort timer_ter;
- uchar res5[14];
-} timer_t;
+#define MMAP_INTC (CFG_MBAR + 0x00000040)
+#define MMAP_DTMR0 (CFG_MBAR + 0x00000140)
+#define MMAP_DTMR1 (CFG_MBAR + 0x00000180)
+#define MMAP_UART0 (CFG_MBAR + 0x000001C0)
+#define MMAP_UART1 (CFG_MBAR + 0x00000200)
+#define MMAP_QSPI (CFG_MBAR + 0x00000400)
-#endif /* __IMMAP_5249__ */
+#endif /* __IMMAP_5249__ */
diff --git a/include/asm-m68k/immap_5253.h b/include/asm-m68k/immap_5253.h
new file mode 100644
index 0000000..aafbdd0
--- /dev/null
+++ b/include/asm-m68k/immap_5253.h
@@ -0,0 +1,95 @@
+/*
+ * MCF5253 Internal Memory Map
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5249__
+#define __IMMAP_5249__
+
+#define MMAP_INTC (CFG_MBAR + 0x00000040)
+#define MMAP_DTMR0 (CFG_MBAR + 0x00000140)
+#define MMAP_DTMR1 (CFG_MBAR + 0x00000180)
+#define MMAP_UART0 (CFG_MBAR + 0x000001C0)
+#define MMAP_UART1 (CFG_MBAR + 0x00000200)
+#define MMAP_I2C0 (CFG_MBAR + 0x00000280)
+#define MMAP_QSPI (CFG_MBAR + 0x00000400)
+#define MMAP_CAN0 (CFG_MBAR + 0x00010000)
+#define MMAP_CAN1 (CFG_MBAR + 0x00011000)
+
+#define MMAP_I2C1 (CFG_MBAR2 + 0x00000440)
+#define MMAP_UART2 (CFG_MBAR2 + 0x00000C00)
+
+/*********************************************************************
+* ATA Module (ATAC)
+*********************************************************************/
+
+/* Register read/write struct */
+typedef struct atac {
+ /* PIO */
+ u8 toff; /* 0x00 */
+ u8 ton; /* 0x01 */
+ u8 t1; /* 0x02 */
+ u8 t2w; /* 0x03 */
+ u8 t2r; /* 0x04 */
+ u8 ta; /* 0x05 */
+ u8 trd; /* 0x06 */
+ u8 t4; /* 0x07 */
+ u8 t9; /* 0x08 */
+
+ /* DMA */
+ u8 tm; /* 0x09 */
+ u8 tn; /* 0x0A */
+ u8 td; /* 0x0B */
+ u8 tk; /* 0x0C */
+ u8 tack; /* 0x0D */
+ u8 tenv; /* 0x0E */
+ u8 trp; /* 0x0F */
+ u8 tzah; /* 0x10 */
+ u8 tmli; /* 0x11 */
+ u8 tdvh; /* 0x12 */
+ u8 tdzfs; /* 0x13 */
+ u8 tdvs; /* 0x14 */
+ u8 tcvh; /* 0x15 */
+ u8 tss; /* 0x16 */
+ u8 tcyc; /* 0x17 */
+
+ /* FIFO */
+ u32 fifo32; /* 0x18 */
+ u16 fifo16; /* 0x1C */
+ u8 rsvd0[2];
+ u8 ffill; /* 0x20 */
+ u8 rsvd1[3];
+
+ /* ATA */
+ u8 cr; /* 0x24 */
+ u8 rsvd2[3];
+ u8 isr; /* 0x28 */
+ u8 rsvd3[3];
+ u8 ier; /* 0x2C */
+ u8 rsvd4[3];
+ u8 icr; /* 0x30 */
+ u8 rsvd5[3];
+ u8 falarm; /* 0x34 */
+} atac_t;
+
+#endif /* __IMMAP_5249__ */
diff --git a/include/asm-m68k/immap_5271.h b/include/asm-m68k/immap_5271.h
index 424dc1d..d9dc015 100644
--- a/include/asm-m68k/immap_5271.h
+++ b/include/asm-m68k/immap_5271.h
@@ -26,73 +26,73 @@
#ifndef __IMMAP_5271__
#define __IMMAP_5271__
-/* Interrupt module registers
-*/
-typedef struct int_ctrl {
- uint int_icr1;
- uint int_icr2;
- uint int_icr3;
- uint int_icr4;
- uint int_isr;
- uint int_pitr;
- uint int_piwr;
- uchar res1[3];
- uchar int_pivr;
-} intctrl_t;
+#define MMAP_SCM (CFG_MBAR + 0x00000000)
+#define MMAP_SDRAM (CFG_MBAR + 0x00000040)
+#define MMAP_FBCS (CFG_MBAR + 0x00000080)
+#define MMAP_DMA0 (CFG_MBAR + 0x00000100)
+#define MMAP_DMA1 (CFG_MBAR + 0x00000110)
+#define MMAP_DMA2 (CFG_MBAR + 0x00000120)
+#define MMAP_DMA3 (CFG_MBAR + 0x00000130)
+#define MMAP_UART0 (CFG_MBAR + 0x00000200)
+#define MMAP_UART1 (CFG_MBAR + 0x00000240)
+#define MMAP_UART2 (CFG_MBAR + 0x00000280)
+#define MMAP_I2C (CFG_MBAR + 0x00000300)
+#define MMAP_QSPI (CFG_MBAR + 0x00000340)
+#define MMAP_DTMR0 (CFG_MBAR + 0x00000400)
+#define MMAP_DTMR1 (CFG_MBAR + 0x00000440)
+#define MMAP_DTMR2 (CFG_MBAR + 0x00000480)
+#define MMAP_DTMR3 (CFG_MBAR + 0x000004C0)
+#define MMAP_INTC0 (CFG_MBAR + 0x00000C00)
+#define MMAP_INTC1 (CFG_MBAR + 0x00000D00)
+#define MMAP_INTCACK (CFG_MBAR + 0x00000F00)
+#define MMAP_FEC (CFG_MBAR + 0x00001000)
+#define MMAP_FECFIFO (CFG_MBAR + 0x00001400)
+#define MMAP_GPIO (CFG_MBAR + 0x00100000)
+#define MMAP_CCM (CFG_MBAR + 0x00110000)
+#define MMAP_PLL (CFG_MBAR + 0x00120000)
+#define MMAP_EPORT (CFG_MBAR + 0x00130000)
+#define MMAP_WDOG (CFG_MBAR + 0x00140000)
+#define MMAP_PIT0 (CFG_MBAR + 0x00150000)
+#define MMAP_PIT1 (CFG_MBAR + 0x00160000)
+#define MMAP_PIT2 (CFG_MBAR + 0x00170000)
+#define MMAP_PIT3 (CFG_MBAR + 0x00180000)
+#define MMAP_MDHA (CFG_MBAR + 0x00190000)
+#define MMAP_RNG (CFG_MBAR + 0x001A0000)
+#define MMAP_SKHA (CFG_MBAR + 0x001B0000)
+#define MMAP_CAN1 (CFG_MBAR + 0x001C0000)
+#define MMAP_ETPU (CFG_MBAR + 0x001D0000)
+#define MMAP_CAN2 (CFG_MBAR + 0x001F0000)
-/* Timer module registers
- */
-typedef struct timer_ctrl {
- ushort timer_tmr;
- ushort res1;
- ushort timer_trr;
- ushort res2;
- ushort timer_tcap;
- ushort res3;
- ushort timer_tcn;
- ushort res4;
- ushort timer_ter;
- uchar res5[14];
-} timer_t;
+/* Interrupt module registers */
+typedef struct int0_ctrl {
+ /* Interrupt Controller 0 */
+ u32 iprh0; /* 0x00 Pending Register High */
+ u32 iprl0; /* 0x04 Pending Register Low */
+ u32 imrh0; /* 0x08 Mask Register High */
+ u32 imrl0; /* 0x0C Mask Register Low */
+ u32 frch0; /* 0x10 Force Register High */
+ u32 frcl0; /* 0x14 Force Register Low */
+ u8 irlr; /* 0x18 */
+ u8 iacklpr; /* 0x19 */
+ u16 res1[19]; /* 0x1a - 0x3c */
+ u8 icr0[64]; /* 0x40 - 0x7F Control registers */
+ u32 res3[24]; /* 0x80 - 0xDF */
+ u8 swiack0; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res4[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack0_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res5[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack0_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE9 - 0xEB */
+ u8 Lniack0_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xED - 0xEF */
+ u8 Lniack0_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack0_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack0_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF9 - 0xFB */
+ u8 Lniack0_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xFD - 0xFF */
+} int0_t;
- /* Fast ethernet controller registers
- */
-typedef struct fec {
- uint res1;
- uint fec_ievent;
- uint fec_imask;
- uint res2;
- uint fec_r_des_active;
- uint fec_x_des_active;
- uint res3[3];
- uint fec_ecntrl;
- uint res4[6];
- uint fec_mii_data;
- uint fec_mii_speed;
- uint res5[7];
- uint fec_mibc;
- uint res6[7];
- uint fec_r_cntrl;
- uint res7[15];
- uint fec_x_cntrl;
- uint res8[7];
- uint fec_addr_low;
- uint fec_addr_high;
- uint fec_opd;
- uint res9[10];
- uint fec_ihash_table_high;
- uint fec_ihash_table_low;
- uint fec_ghash_table_high;
- uint fec_ghash_table_low;
- uint res10[7];
- uint fec_tfwr;
- uint res11;
- uint fec_r_bound;
- uint fec_r_fstart;
- uint res12[11];
- uint fec_r_des_start;
- uint fec_x_des_start;
- uint fec_r_buff_size;
-} fec_t;
-
-#endif /* __IMMAP_5271__ */
+#endif /* __IMMAP_5271__ */
diff --git a/include/asm-m68k/immap_5272.h b/include/asm-m68k/immap_5272.h
index ecb4906..2ebb140 100644
--- a/include/asm-m68k/immap_5272.h
+++ b/include/asm-m68k/immap_5272.h
@@ -25,423 +25,326 @@
#ifndef __IMMAP_5272__
#define __IMMAP_5272__
-/* System configuration registers
-*/
-typedef struct sys_ctrl {
- uint sc_mbar;
- ushort sc_scr;
- ushort sc_spr;
- uint sc_pmr;
- char res1[2];
- ushort sc_alpr;
- uint sc_dir;
- char res2[12];
+#define MMAP_CFG (CFG_MBAR + 0x00000000)
+#define MMAP_INTC (CFG_MBAR + 0x00000020)
+#define MMAP_FBCS (CFG_MBAR + 0x00000040)
+#define MMAP_GPIO (CFG_MBAR + 0x00000080)
+#define MMAP_QSPI (CFG_MBAR + 0x000000A0)
+#define MMAP_PWM (CFG_MBAR + 0x000000C0)
+#define MMAP_DMA0 (CFG_MBAR + 0x000000E0)
+#define MMAP_UART0 (CFG_MBAR + 0x00000100)
+#define MMAP_UART1 (CFG_MBAR + 0x00000140)
+#define MMAP_SDRAM (CFG_MBAR + 0x00000180)
+#define MMAP_TMR0 (CFG_MBAR + 0x00000200)
+#define MMAP_TMR1 (CFG_MBAR + 0x00000220)
+#define MMAP_TMR2 (CFG_MBAR + 0x00000240)
+#define MMAP_TMR3 (CFG_MBAR + 0x00000260)
+#define MMAP_WDOG (CFG_MBAR + 0x00000280)
+#define MMAP_PLIC (CFG_MBAR + 0x00000300)
+#define MMAP_FEC (CFG_MBAR + 0x00000840)
+#define MMAP_USB (CFG_MBAR + 0x00001000)
+
+/* System configuration registers */
+typedef struct sys_ctrl {
+ uint sc_mbar;
+ ushort sc_scr;
+ ushort sc_spr;
+ uint sc_pmr;
+ char res1[2];
+ ushort sc_alpr;
+ uint sc_dir;
+ char res2[12];
} sysctrl_t;
-/* Interrupt module registers
-*/
+/* Interrupt module registers */
typedef struct int_ctrl {
- uint int_icr1;
- uint int_icr2;
- uint int_icr3;
- uint int_icr4;
- uint int_isr;
- uint int_pitr;
- uint int_piwr;
- uchar res1[3];
- uchar int_pivr;
+ uint int_icr1;
+ uint int_icr2;
+ uint int_icr3;
+ uint int_icr4;
+ uint int_isr;
+ uint int_pitr;
+ uint int_piwr;
+ uchar res1[3];
+ uchar int_pivr;
} intctrl_t;
-/* Chip select module registers.
-*/
-typedef struct cs_ctlr {
- uint cs_br0;
- uint cs_or0;
- uint cs_br1;
- uint cs_or1;
- uint cs_br2;
- uint cs_or2;
- uint cs_br3;
- uint cs_or3;
- uint cs_br4;
- uint cs_or4;
- uint cs_br5;
- uint cs_or5;
- uint cs_br6;
- uint cs_or6;
- uint cs_br7;
- uint cs_or7;
+/* Chip select module registers */
+typedef struct cs_ctlr {
+ uint cs_br0;
+ uint cs_or0;
+ uint cs_br1;
+ uint cs_or1;
+ uint cs_br2;
+ uint cs_or2;
+ uint cs_br3;
+ uint cs_or3;
+ uint cs_br4;
+ uint cs_or4;
+ uint cs_br5;
+ uint cs_or5;
+ uint cs_br6;
+ uint cs_or6;
+ uint cs_br7;
+ uint cs_or7;
} csctrl_t;
-/* GPIO port registers
-*/
-typedef struct gpio_ctrl {
- uint gpio_pacnt;
- ushort gpio_paddr;
- ushort gpio_padat;
- uint gpio_pbcnt;
- ushort gpio_pbddr;
- ushort gpio_pbdat;
- uchar res1[4];
- ushort gpio_pcddr;
- ushort gpio_pcdat;
- uint gpio_pdcnt;
- uchar res2[4];
+/* GPIO port registers */
+typedef struct gpio_ctrl {
+ uint gpio_pacnt;
+ ushort gpio_paddr;
+ ushort gpio_padat;
+ uint gpio_pbcnt;
+ ushort gpio_pbddr;
+ ushort gpio_pbdat;
+ uchar res1[4];
+ ushort gpio_pcddr;
+ ushort gpio_pcdat;
+ uint gpio_pdcnt;
+ uchar res2[4];
} gpio_t;
-/* QSPI module registers
- */
-typedef struct qspi_ctrl {
- ushort qspi_qmr;
- uchar res1[2];
- ushort qspi_qdlyr;
- uchar res2[2];
- ushort qspi_qwr;
- uchar res3[2];
- ushort qspi_qir;
- uchar res4[2];
- ushort qspi_qar;
- uchar res5[2];
- ushort qspi_qdr;
- uchar res6[10];
+/* QSPI module registers */
+typedef struct qspi_ctrl {
+ ushort qspi_qmr;
+ uchar res1[2];
+ ushort qspi_qdlyr;
+ uchar res2[2];
+ ushort qspi_qwr;
+ uchar res3[2];
+ ushort qspi_qir;
+ uchar res4[2];
+ ushort qspi_qar;
+ uchar res5[2];
+ ushort qspi_qdr;
+ uchar res6[10];
} qspi_t;
-/* PWM module registers
- */
-typedef struct pwm_ctrl {
- uchar pwm_pwcr0;
- uchar res1[3];
- uchar pwm_pwcr1;
- uchar res2[3];
- uchar pwm_pwcr2;
- uchar res3[7];
- uchar pwm_pwwd0;
- uchar res4[3];
- uchar pwm_pwwd1;
- uchar res5[3];
- uchar pwm_pwwd2;
- uchar res6[7];
+/* PWM module registers */
+typedef struct pwm_ctrl {
+ uchar pwm_pwcr0;
+ uchar res1[3];
+ uchar pwm_pwcr1;
+ uchar res2[3];
+ uchar pwm_pwcr2;
+ uchar res3[7];
+ uchar pwm_pwwd0;
+ uchar res4[3];
+ uchar pwm_pwwd1;
+ uchar res5[3];
+ uchar pwm_pwwd2;
+ uchar res6[7];
} pwm_t;
-/* DMA module registers
- */
-typedef struct dma_ctrl {
- ulong dma_dmr;
- uchar res1[2];
- ushort dma_dir;
- ulong dma_dbcr;
- ulong dma_dsar;
- ulong dma_ddar;
- uchar res2[12];
+/* DMA module registers */
+typedef struct dma_ctrl {
+ ulong dma_dmr;
+ uchar res1[2];
+ ushort dma_dir;
+ ulong dma_dbcr;
+ ulong dma_dsar;
+ ulong dma_ddar;
+ uchar res2[12];
} dma_t;
-/* UART module registers
- */
-typedef struct uart_ctrl {
- uchar uart_umr;
- uchar res1[3];
- uchar uart_usr_ucsr;
- uchar res2[3];
- uchar uart_ucr;
- uchar res3[3];
- uchar uart_urb_utb;
- uchar res4[3];
- uchar uart_uipcr_uacr;
- uchar res5[3];
- uchar uart_uisr_uimr;
- uchar res6[3];
- uchar uart_udu;
- uchar res7[3];
- uchar uart_udl;
- uchar res8[3];
- uchar uart_uabu;
- uchar res9[3];
- uchar uart_uabl;
- uchar res10[3];
- uchar uart_utf;
- uchar res11[3];
- uchar uart_urf;
- uchar res12[3];
- uchar uart_ufpd;
- uchar res13[3];
- uchar uart_uip;
- uchar res14[3];
- uchar uart_uop1;
- uchar res15[3];
- uchar uart_uop0;
- uchar res16[3];
-} uart_t;
-
-/* SDRAM controller registers, offset: 0x180
- */
+/* SDRAM controller registers, offset: 0x180 */
typedef struct sdram_ctrl {
- uchar res1[2];
- ushort sdram_sdcr;
- uchar res2[2];
- ushort sdram_sdtr;
- uchar res3[120];
+ uchar res1[2];
+ ushort sdram_sdcr;
+ uchar res2[2];
+ ushort sdram_sdtr;
+ uchar res3[120];
} sdramctrl_t;
-/* Timer module registers
- */
-typedef struct timer_ctrl {
- ushort timer_tmr;
- ushort res1;
- ushort timer_trr;
- ushort res2;
- ushort timer_tcap;
- ushort res3;
- ushort timer_tcn;
- ushort res4;
- ushort timer_ter;
- uchar res5[14];
-} timer_t;
-
-/* Watchdog registers
- */
+/* Watchdog registers */
typedef struct wdog_ctrl {
- ushort wdog_wrrr;
- ushort res1;
- ushort wdog_wirr;
- ushort res2;
- ushort wdog_wcr;
- ushort res3;
- ushort wdog_wer;
- uchar res4[114];
+ ushort wdog_wrrr;
+ ushort res1;
+ ushort wdog_wirr;
+ ushort res2;
+ ushort wdog_wcr;
+ ushort res3;
+ ushort wdog_wer;
+ uchar res4[114];
} wdog_t;
-/* PLIC module registers
- */
+/* PLIC module registers */
typedef struct plic_ctrl {
- ulong plic_p0b1rr;
- ulong plic_p1b1rr;
- ulong plic_p2b1rr;
- ulong plic_p3b1rr;
- ulong plic_p0b2rr;
- ulong plic_p1b2rr;
- ulong plic_p2b2rr;
- ulong plic_p3b2rr;
- uchar plic_p0drr;
- uchar plic_p1drr;
- uchar plic_p2drr;
- uchar plic_p3drr;
- uchar res1[4];
- ulong plic_p0b1tr;
- ulong plic_p1b1tr;
- ulong plic_p2b1tr;
- ulong plic_p3b1tr;
- ulong plic_p0b2tr;
- ulong plic_p1b2tr;
- ulong plic_p2b2tr;
- ulong plic_p3b2tr;
- uchar plic_p0dtr;
- uchar plic_p1dtr;
- uchar plic_p2dtr;
- uchar plic_p3dtr;
- uchar res2[4];
- ushort plic_p0cr;
- ushort plic_p1cr;
- ushort plic_p2cr;
- ushort plic_p3cr;
- ushort plic_p0icr;
- ushort plic_p1icr;
- ushort plic_p2icr;
- ushort plic_p3icr;
- ushort plic_p0gmr;
- ushort plic_p1gmr;
- ushort plic_p2gmr;
- ushort plic_p3gmr;
- ushort plic_p0gmt;
- ushort plic_p1gmt;
- ushort plic_p2gmt;
- ushort plic_p3gmt;
- uchar res3;
- uchar plic_pgmts;
- uchar plic_pgmta;
- uchar res4;
- uchar plic_p0gcir;
- uchar plic_p1gcir;
- uchar plic_p2gcir;
- uchar plic_p3gcir;
- uchar plic_p0gcit;
- uchar plic_p1gcit;
- uchar plic_p2gcit;
- uchar plic_p3gcit;
- uchar res5[3];
- uchar plic_pgcitsr;
- uchar res6[3];
- uchar plic_pdcsr;
- ushort plic_p0psr;
- ushort plic_p1psr;
- ushort plic_p2psr;
- ushort plic_p3psr;
- ushort plic_pasr;
- uchar res7;
- uchar plic_plcr;
- ushort res8;
- ushort plic_pdrqr;
- ushort plic_p0sdr;
- ushort plic_p1sdr;
- ushort plic_p2sdr;
- ushort plic_p3sdr;
- ushort res9;
- ushort plic_pcsr;
- uchar res10[1184];
+ ulong plic_p0b1rr;
+ ulong plic_p1b1rr;
+ ulong plic_p2b1rr;
+ ulong plic_p3b1rr;
+ ulong plic_p0b2rr;
+ ulong plic_p1b2rr;
+ ulong plic_p2b2rr;
+ ulong plic_p3b2rr;
+ uchar plic_p0drr;
+ uchar plic_p1drr;
+ uchar plic_p2drr;
+ uchar plic_p3drr;
+ uchar res1[4];
+ ulong plic_p0b1tr;
+ ulong plic_p1b1tr;
+ ulong plic_p2b1tr;
+ ulong plic_p3b1tr;
+ ulong plic_p0b2tr;
+ ulong plic_p1b2tr;
+ ulong plic_p2b2tr;
+ ulong plic_p3b2tr;
+ uchar plic_p0dtr;
+ uchar plic_p1dtr;
+ uchar plic_p2dtr;
+ uchar plic_p3dtr;
+ uchar res2[4];
+ ushort plic_p0cr;
+ ushort plic_p1cr;
+ ushort plic_p2cr;
+ ushort plic_p3cr;
+ ushort plic_p0icr;
+ ushort plic_p1icr;
+ ushort plic_p2icr;
+ ushort plic_p3icr;
+ ushort plic_p0gmr;
+ ushort plic_p1gmr;
+ ushort plic_p2gmr;
+ ushort plic_p3gmr;
+ ushort plic_p0gmt;
+ ushort plic_p1gmt;
+ ushort plic_p2gmt;
+ ushort plic_p3gmt;
+ uchar res3;
+ uchar plic_pgmts;
+ uchar plic_pgmta;
+ uchar res4;
+ uchar plic_p0gcir;
+ uchar plic_p1gcir;
+ uchar plic_p2gcir;
+ uchar plic_p3gcir;
+ uchar plic_p0gcit;
+ uchar plic_p1gcit;
+ uchar plic_p2gcit;
+ uchar plic_p3gcit;
+ uchar res5[3];
+ uchar plic_pgcitsr;
+ uchar res6[3];
+ uchar plic_pdcsr;
+ ushort plic_p0psr;
+ ushort plic_p1psr;
+ ushort plic_p2psr;
+ ushort plic_p3psr;
+ ushort plic_pasr;
+ uchar res7;
+ uchar plic_plcr;
+ ushort res8;
+ ushort plic_pdrqr;
+ ushort plic_p0sdr;
+ ushort plic_p1sdr;
+ ushort plic_p2sdr;
+ ushort plic_p3sdr;
+ ushort res9;
+ ushort plic_pcsr;
+ uchar res10[1184];
} plic_t;
-/* Fast ethernet controller registers
- */
-typedef struct fec {
- uint fec_ecntrl; /* ethernet control register */
- uint fec_ievent; /* interrupt event register */
- uint fec_imask; /* interrupt mask register */
- uint fec_ivec; /* interrupt level and vector status */
- uint fec_r_des_active; /* Rx ring updated flag */
- uint fec_x_des_active; /* Tx ring updated flag */
- uint res3[10]; /* reserved */
- uint fec_mii_data; /* MII data register */
- uint fec_mii_speed; /* MII speed control register */
- uint res4[17]; /* reserved */
- uint fec_r_bound; /* end of RAM (read-only) */
- uint fec_r_fstart; /* Rx FIFO start address */
- uint res5[6]; /* reserved */
- uint fec_x_fstart; /* Tx FIFO start address */
- uint res7[21]; /* reserved */
- uint fec_r_cntrl; /* Rx control register */
- uint fec_r_hash; /* Rx hash register */
- uint res8[14]; /* reserved */
- uint fec_x_cntrl; /* Tx control register */
- uint res9[0x9e]; /* reserved */
- uint fec_addr_low; /* lower 32 bits of station address */
- uint fec_addr_high; /* upper 16 bits of station address */
- uint fec_hash_table_high; /* upper 32-bits of hash table */
- uint fec_hash_table_low; /* lower 32-bits of hash table */
- uint fec_r_des_start; /* beginning of Rx descriptor ring */
- uint fec_x_des_start; /* beginning of Tx descriptor ring */
- uint fec_r_buff_size; /* Rx buffer size */
- uint res2[9]; /* reserved */
- uchar fec_fifo[960]; /* fifo RAM */
-} fec_t;
-
-/* USB module registers
-*/
+/* USB module registers */
typedef struct usb {
- ushort res1;
- ushort usb_fnr;
- ushort res2;
- ushort usb_fnmr;
- ushort res3;
- ushort usb_rfmr;
- ushort res4;
- ushort usb_rfmmr;
- uchar res5[3];
- uchar usb_far;
- ulong usb_asr;
- ulong usb_drr1;
- ulong usb_drr2;
- ushort res6;
- ushort usb_specr;
- ushort res7;
- ushort usb_ep0sr;
- ulong usb_iep0cfg;
- ulong usb_oep0cfg;
- ulong usb_ep1cfg;
- ulong usb_ep2cfg;
- ulong usb_ep3cfg;
- ulong usb_ep4cfg;
- ulong usb_ep5cfg;
- ulong usb_ep6cfg;
- ulong usb_ep7cfg;
- ulong usb_ep0ctl;
- ushort res8;
- ushort usb_ep1ctl;
- ushort res9;
- ushort usb_ep2ctl;
- ushort res10;
- ushort usb_ep3ctl;
- ushort res11;
- ushort usb_ep4ctl;
- ushort res12;
- ushort usb_ep5ctl;
- ushort res13;
- ushort usb_ep6ctl;
- ushort res14;
- ushort usb_ep7ctl;
- ulong usb_ep0isr;
- ushort res15;
- ushort usb_ep1isr;
- ushort res16;
- ushort usb_ep2isr;
- ushort res17;
- ushort usb_ep3isr;
- ushort res18;
- ushort usb_ep4isr;
- ushort res19;
- ushort usb_ep5isr;
- ushort res20;
- ushort usb_ep6isr;
- ushort res21;
- ushort usb_ep7isr;
- ulong usb_ep0imr;
- ushort res22;
- ushort usb_ep1imr;
- ushort res23;
- ushort usb_ep2imr;
- ushort res24;
- ushort usb_ep3imr;
- ushort res25;
- ushort usb_ep4imr;
- ushort res26;
- ushort usb_ep5imr;
- ushort res27;
- ushort usb_ep6imr;
- ushort res28;
- ushort usb_ep7imr;
- ulong usb_ep0dr;
- ulong usb_ep1dr;
- ulong usb_ep2dr;
- ulong usb_ep3dr;
- ulong usb_ep4dr;
- ulong usb_ep5dr;
- ulong usb_ep6dr;
- ulong usb_ep7dr;
- ushort res29;
- ushort usb_ep0dpr;
- ushort res30;
- ushort usb_ep1dpr;
- ushort res31;
- ushort usb_ep2dpr;
- ushort res32;
- ushort usb_ep3dpr;
- ushort res33;
- ushort usb_ep4dpr;
- ushort res34;
- ushort usb_ep5dpr;
- ushort res35;
- ushort usb_ep6dpr;
- ushort res36;
- ushort usb_ep7dpr;
- uchar res37[788];
- uchar usb_cfgram[1024];
+ ushort res1;
+ ushort usb_fnr;
+ ushort res2;
+ ushort usb_fnmr;
+ ushort res3;
+ ushort usb_rfmr;
+ ushort res4;
+ ushort usb_rfmmr;
+ uchar res5[3];
+ uchar usb_far;
+ ulong usb_asr;
+ ulong usb_drr1;
+ ulong usb_drr2;
+ ushort res6;
+ ushort usb_specr;
+ ushort res7;
+ ushort usb_ep0sr;
+ ulong usb_iep0cfg;
+ ulong usb_oep0cfg;
+ ulong usb_ep1cfg;
+ ulong usb_ep2cfg;
+ ulong usb_ep3cfg;
+ ulong usb_ep4cfg;
+ ulong usb_ep5cfg;
+ ulong usb_ep6cfg;
+ ulong usb_ep7cfg;
+ ulong usb_ep0ctl;
+ ushort res8;
+ ushort usb_ep1ctl;
+ ushort res9;
+ ushort usb_ep2ctl;
+ ushort res10;
+ ushort usb_ep3ctl;
+ ushort res11;
+ ushort usb_ep4ctl;
+ ushort res12;
+ ushort usb_ep5ctl;
+ ushort res13;
+ ushort usb_ep6ctl;
+ ushort res14;
+ ushort usb_ep7ctl;
+ ulong usb_ep0isr;
+ ushort res15;
+ ushort usb_ep1isr;
+ ushort res16;
+ ushort usb_ep2isr;
+ ushort res17;
+ ushort usb_ep3isr;
+ ushort res18;
+ ushort usb_ep4isr;
+ ushort res19;
+ ushort usb_ep5isr;
+ ushort res20;
+ ushort usb_ep6isr;
+ ushort res21;
+ ushort usb_ep7isr;
+ ulong usb_ep0imr;
+ ushort res22;
+ ushort usb_ep1imr;
+ ushort res23;
+ ushort usb_ep2imr;
+ ushort res24;
+ ushort usb_ep3imr;
+ ushort res25;
+ ushort usb_ep4imr;
+ ushort res26;
+ ushort usb_ep5imr;
+ ushort res27;
+ ushort usb_ep6imr;
+ ushort res28;
+ ushort usb_ep7imr;
+ ulong usb_ep0dr;
+ ulong usb_ep1dr;
+ ulong usb_ep2dr;
+ ulong usb_ep3dr;
+ ulong usb_ep4dr;
+ ulong usb_ep5dr;
+ ulong usb_ep6dr;
+ ulong usb_ep7dr;
+ ushort res29;
+ ushort usb_ep0dpr;
+ ushort res30;
+ ushort usb_ep1dpr;
+ ushort res31;
+ ushort usb_ep2dpr;
+ ushort res32;
+ ushort usb_ep3dpr;
+ ushort res33;
+ ushort usb_ep4dpr;
+ ushort res34;
+ ushort usb_ep5dpr;
+ ushort res35;
+ ushort usb_ep6dpr;
+ ushort res36;
+ ushort usb_ep7dpr;
+ uchar res37[788];
+ uchar usb_cfgram[1024];
} usb_t;
-/* Internal memory map.
-*/
-typedef struct immap {
- sysctrl_t sysctrl_reg; /* System configuration registers */
- intctrl_t intctrl_reg; /* Interrupt controller registers */
- csctrl_t csctrl_reg; /* Chip select controller registers */
- gpio_t gpio_reg; /* GPIO controller registers */
- qspi_t qspi_reg; /* QSPI controller registers */
- pwm_t pwm_reg; /* Pulse width modulation registers */
- dma_t dma_reg; /* DMA registers */
- uart_t uart_reg[2]; /* UART registers */
- sdramctrl_t sdram_reg; /* SDRAM controller registers */
- timer_t timer_reg[4]; /* Timer registers */
- wdog_t wdog_reg; /* Watchdog registers */
- plic_t plic_reg; /* Physical layer interface registers */
- fec_t fec_reg; /* Fast ethernet controller registers */
- usb_t usb_reg; /* USB controller registers */
-} immap_t;
-
-#endif /* __IMMAP_5272__ */
+#endif /* __IMMAP_5272__ */
diff --git a/include/asm-m68k/immap_5282.h b/include/asm-m68k/immap_5282.h
index 6553b08..e82960a 100644
--- a/include/asm-m68k/immap_5282.h
+++ b/include/asm-m68k/immap_5282.h
@@ -25,61 +25,168 @@
#ifndef __IMMAP_5282__
#define __IMMAP_5282__
-struct sys_ctrl {
- uint ipsbar;
- char res1[4];
- uint rambar;
- char res2[4];
- uchar crsr;
- uchar cwcr;
- uchar lpicr;
- uchar cwsr;
- uint dmareqc;
- char res3[4];
- uint mpark;
+#define MMAP_SCM (CFG_MBAR + 0x00000000)
+#define MMAP_SDRAMC (CFG_MBAR + 0x00000040)
+#define MMAP_FBCS (CFG_MBAR + 0x00000080)
+#define MMAP_DMA0 (CFG_MBAR + 0x00000100)
+#define MMAP_DMA1 (CFG_MBAR + 0x00000140)
+#define MMAP_DMA2 (CFG_MBAR + 0x00000180)
+#define MMAP_DMA3 (CFG_MBAR + 0x000001C0)
+#define MMAP_UART0 (CFG_MBAR + 0x00000200)
+#define MMAP_UART1 (CFG_MBAR + 0x00000240)
+#define MMAP_UART2 (CFG_MBAR + 0x00000280)
+#define MMAP_I2C (CFG_MBAR + 0x00000300)
+#define MMAP_QSPI (CFG_MBAR + 0x00000340)
+#define MMAP_DTMR0 (CFG_MBAR + 0x00000400)
+#define MMAP_DTMR1 (CFG_MBAR + 0x00000440)
+#define MMAP_DTMR2 (CFG_MBAR + 0x00000480)
+#define MMAP_DTMR3 (CFG_MBAR + 0x000004C0)
+#define MMAP_INTC0 (CFG_MBAR + 0x00000C00)
+#define MMAP_INTC1 (CFG_MBAR + 0x00000D00)
+#define MMAP_INTCACK (CFG_MBAR + 0x00000F00)
+#define MMAP_FEC (CFG_MBAR + 0x00001000)
+#define MMAP_FECFIFO (CFG_MBAR + 0x00001400)
+#define MMAP_GPIO (CFG_MBAR + 0x00100000)
+#define MMAP_CCM (CFG_MBAR + 0x00110000)
+#define MMAP_PLL (CFG_MBAR + 0x00120000)
+#define MMAP_EPORT (CFG_MBAR + 0x00130000)
+#define MMAP_WDOG (CFG_MBAR + 0x00140000)
+#define MMAP_PIT0 (CFG_MBAR + 0x00150000)
+#define MMAP_PIT1 (CFG_MBAR + 0x00160000)
+#define MMAP_PIT2 (CFG_MBAR + 0x00170000)
+#define MMAP_PIT3 (CFG_MBAR + 0x00180000)
+#define MMAP_QADC (CFG_MBAR + 0x00190000)
+#define MMAP_GPTMRA (CFG_MBAR + 0x001A0000)
+#define MMAP_GPTMRB (CFG_MBAR + 0x001B0000)
+#define MMAP_CAN (CFG_MBAR + 0x001C0000)
+#define MMAP_CFMC (CFG_MBAR + 0x001D0000)
+#define MMAP_CFMMEM (CFG_MBAR + 0x04000000)
- /* TODO: finish these */
-};
+/* System Control Module */
+typedef struct scm_ctrl {
+ u32 ipsbar;
+ u32 res1;
+ u32 rambar;
+ u32 res2;
+ u8 crsr;
+ u8 cwcr;
+ u8 lpicr;
+ u8 cwsr;
+ u32 res3;
+ u8 mpark;
+ u8 res4[3];
+ u8 pacr0;
+ u8 pacr1;
+ u8 pacr2;
+ u8 pacr3;
+ u8 pacr4;
+ u8 res5;
+ u8 pacr5;
+ u8 pacr6;
+ u8 pacr7;
+ u8 res6;
+ u8 pacr8;
+ u8 res7;
+ u8 gpacr0;
+ u8 gpacr1;
+ u16 res8;
+} scm_t;
-/* Fast ethernet controller registers
- */
-typedef struct fec {
- uint res1; /* reserved 1000*/
- uint fec_ievent; /* interrupt event register 1004*/ /* EIR */
- uint fec_imask; /* interrupt mask register 1008*/ /* EIMR */
- uint res2; /* reserved 100c*/
- uint fec_r_des_active; /* Rx ring updated flag 1010*/ /* RDAR */
- uint fec_x_des_active; /* Tx ring updated flag 1014*/ /* XDAR */
- uint res3[3]; /* reserved 1018*/
- uint fec_ecntrl; /* ethernet control register 1024*/ /* ECR */
- uint res4[6]; /* reserved 1028*/
- uint fec_mii_data; /* MII data register 1040*/ /* MDATA */
- uint fec_mii_speed; /* MII speed control register 1044*/ /* MSCR */
- /*1044*/
- uint res5[7]; /* reserved 1048*/
- uint fec_mibc; /* MIB Control/Status register 1064*/ /* MIBC */
- uint res6[7]; /* reserved 1068*/
- uint fec_r_cntrl; /* Rx control register 1084*/ /* RCR */
- uint res7[15]; /* reserved 1088*/
- uint fec_x_cntrl; /* Tx control register 10C4*/ /* TCR */
- uint res8[7]; /* reserved 10C8*/
- uint fec_addr_low; /* lower 32 bits of station address */ /* PALR */
- uint fec_addr_high; /* upper 16 bits of station address */ /* PAUR */
- uint fec_opd; /* opcode + pause duration 10EC*/ /* OPD */
- uint res9[10]; /* reserved 10F0*/
- uint fec_ihash_table_high; /* upper 32-bits of individual hash */ /* IAUR */
- uint fec_ihash_table_low; /* lower 32-bits of individual hash */ /* IALR */
- uint fec_ghash_table_high; /* upper 32-bits of group hash */ /* GAUR */
- uint fec_ghash_table_low; /* lower 32-bits of group hash */ /* GALR */
- uint res10[7]; /* reserved 1128*/
- uint fec_tfwr; /* Transmit FIFO watermark 1144*/ /* TFWR */
- uint res11; /* reserved 1148*/
- uint fec_r_bound; /* FIFO Receive Bound Register = end of */ /* FRBR */
- uint fec_r_fstart; /* FIFO Receive FIfo Start Registers = */ /* FRSR */
- uint res12[11]; /* reserved 1154*/
- uint fec_r_des_start;/* beginning of Rx descriptor ring 1180*/ /* ERDSR */
- uint fec_x_des_start;/* beginning of Tx descriptor ring 1184*/ /* ETDSR */
- uint fec_r_buff_size;/* Rx buffer size 1188*/ /* EMRBR */
-} fec_t;
+/* Flexbus module Chip select registers */
+typedef struct fbcs_ctrl {
+ u16 csar0; /* 0x00 Chip-Select Address Register 0 */
+ u16 res0;
+ u32 csmr0; /* 0x04 Chip-Select Mask Register 0 */
+ u16 res1; /* 0x08 */
+ u16 cscr0; /* 0x0A Chip-Select Control Register 0 */
-#endif /* __IMMAP_5282__ */
+ u16 csar1; /* 0x0C Chip-Select Address Register 1 */
+ u16 res2;
+ u32 csmr1; /* 0x10 Chip-Select Mask Register 1 */
+ u16 res3; /* 0x14 */
+ u16 cscr1; /* 0x16 Chip-Select Control Register 1 */
+
+ u16 csar2; /* 0x18 Chip-Select Address Register 2 */
+ u16 res4;
+ u32 csmr2; /* 0x1C Chip-Select Mask Register 2 */
+ u16 res5; /* 0x20 */
+ u16 cscr2; /* 0x22 Chip-Select Control Register 2 */
+
+ u16 csar3; /* 0x24 Chip-Select Address Register 3 */
+ u16 res6;
+ u32 csmr3; /* 0x28 Chip-Select Mask Register 3 */
+ u16 res7; /* 0x2C */
+ u16 cscr3; /* 0x2E Chip-Select Control Register 3 */
+
+ u16 csar4; /* 0x30 Chip-Select Address Register 4 */
+ u16 res8;
+ u32 csmr4; /* 0x34 Chip-Select Mask Register 4 */
+ u16 res9; /* 0x38 */
+ u16 cscr4; /* 0x3A Chip-Select Control Register 4 */
+
+ u16 csar5; /* 0x3C Chip-Select Address Register 5 */
+ u16 res10;
+ u32 csmr5; /* 0x40 Chip-Select Mask Register 5 */
+ u16 res11; /* 0x44 */
+ u16 cscr5; /* 0x46 Chip-Select Control Register 5 */
+
+ u16 csar6; /* 0x48 Chip-Select Address Register 5 */
+ u16 res12;
+ u32 csmr6; /* 0x4C Chip-Select Mask Register 5 */
+ u16 res13; /* 0x50 */
+ u16 cscr6; /* 0x52 Chip-Select Control Register 5 */
+
+ u16 csar7; /* 0x54 Chip-Select Address Register 5 */
+ u16 res14;
+ u32 csmr7; /* 0x58 Chip-Select Mask Register 5 */
+ u16 res15; /* 0x5C */
+ u16 cscr7; /* 0x5E Chip-Select Control Register 5 */
+} fbcs_t;
+
+/* Interrupt module registers */
+typedef struct int0_ctrl {
+ /* Interrupt Controller 0 */
+ u32 iprh0; /* 0x00 Pending Register High */
+ u32 iprl0; /* 0x04 Pending Register Low */
+ u32 imrh0; /* 0x08 Mask Register High */
+ u32 imrl0; /* 0x0C Mask Register Low */
+ u32 frch0; /* 0x10 Force Register High */
+ u32 frcl0; /* 0x14 Force Register Low */
+ u8 irlr; /* 0x18 */
+ u8 iacklpr; /* 0x19 */
+ u16 res1[19]; /* 0x1a - 0x3c */
+ u8 icr0[64]; /* 0x40 - 0x7F Control registers */
+ u32 res3[24]; /* 0x80 - 0xDF */
+ u8 swiack0; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res4[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack0_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res5[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack0_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE9 - 0xEB */
+ u8 Lniack0_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xED - 0xEF */
+ u8 Lniack0_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack0_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack0_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF9 - 0xFB */
+ u8 Lniack0_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xFD - 0xFF */
+} int0_t;
+
+/* Clock Module registers */
+typedef struct pll_ctrl {
+ u16 syncr; /* 0x00 synthesizer control register */
+ u16 synsr; /* 0x02 synthesizer status register */
+} pll_t;
+
+/* Watchdog registers */
+typedef struct wdog_ctrl {
+ ushort wcr;
+ ushort wmr;
+ ushort wcntr;
+ ushort wsr;
+} wdog_t;
+
+#endif /* __IMMAP_5282__ */
diff --git a/include/asm-m68k/immap_5329.h b/include/asm-m68k/immap_5329.h
new file mode 100644
index 0000000..2a3980c
--- /dev/null
+++ b/include/asm-m68k/immap_5329.h
@@ -0,0 +1,793 @@
+/*
+ * MCF5329 Internal Memory Map
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5329__
+#define __IMMAP_5329__
+
+#define MMAP_SCM1 0xEC000000
+#define MMAP_MDHA 0xEC080000
+#define MMAP_SKHA 0xEC084000
+#define MMAP_RNG 0xEC088000
+#define MMAP_SCM2 0xFC000000
+#define MMAP_XBS 0xFC004000
+#define MMAP_FBCS 0xFC008000
+#define MMAP_CAN 0xFC020000
+#define MMAP_FEC 0xFC030000
+#define MMAP_SCM3 0xFC040000
+#define MMAP_EDMA 0xFC044000
+#define MMAP_TCD 0xFC045000
+#define MMAP_INTC0 0xFC048000
+#define MMAP_INTC1 0xFC04C000
+#define MMAP_INTCACK 0xFC054000
+#define MMAP_I2C 0xFC058000
+#define MMAP_QSPI 0xFC05C000
+#define MMAP_UART0 0xFC060000
+#define MMAP_UART1 0xFC064000
+#define MMAP_UART2 0xFC068000
+#define MMAP_DTMR0 0xFC070000
+#define MMAP_DTMR1 0xFC074000
+#define MMAP_DTMR2 0xFC078000
+#define MMAP_DTMR3 0xFC07C000
+#define MMAP_PIT0 0xFC080000
+#define MMAP_PIT1 0xFC084000
+#define MMAP_PIT2 0xFC088000
+#define MMAP_PIT3 0xFC08C000
+#define MMAP_PWM 0xFC090000
+#define MMAP_EPORT 0xFC094000
+#define MMAP_WDOG 0xFC098000
+#define MMAP_CCM 0xFC0A0000
+#define MMAP_GPIO 0xFC0A4000
+#define MMAP_RTC 0xFC0A8000
+#define MMAP_LCDC 0xFC0AC000
+#define MMAP_USBOTG 0xFC0B0000
+#define MMAP_USBH 0xFC0B4000
+#define MMAP_SDRAM 0xFC0B8000
+#define MMAP_SSI 0xFC0BC000
+#define MMAP_PLL 0xFC0C0000
+
+/* System control module registers */
+typedef struct scm1_ctrl {
+ u32 mpr0; /* 0x00 Master Privilege Register 0 */
+ u32 res1[15]; /* 0x04 - 0x3F */
+ u32 pacrh; /* 0x40 Peripheral Access Control Register H */
+ u32 res2[3]; /* 0x44 - 0x53 */
+ u32 bmt0; /*0x54 Bus Monitor Timeout 0 */
+} scm1_t;
+
+/* Message Digest Hardware Accelerator */
+typedef struct mdha_ctrl {
+ u32 mdmr; /* 0x00 MDHA Mode Register */
+ u32 mdcr; /* 0x04 Control register */
+ u32 mdcmr; /* 0x08 Command Register */
+ u32 mdsr; /* 0x0C Status Register */
+ u32 mdisr; /* 0x10 Interrupt Status Register */
+ u32 mdimr; /* 0x14 Interrupt Mask Register */
+ u32 mddsr; /* 0x1C Data Size Register */
+ u32 mdin; /* 0x20 Input FIFO */
+ u32 res1[3]; /* 0x24 - 0x2F */
+ u32 mdao; /* 0x30 Message Digest AO Register */
+ u32 mdbo; /* 0x34 Message Digest BO Register */
+ u32 mdco; /* 0x38 Message Digest CO Register */
+ u32 mddo; /* 0x3C Message Digest DO Register */
+ u32 mdeo; /* 0x40 Message Digest EO Register */
+ u32 mdmds; /* 0x44 Message Data Size Register */
+ u32 res[10]; /* 0x48 - 0x6F */
+ u32 mda1; /* 0x70 Message Digest A1 Register */
+ u32 mdb1; /* 0x74 Message Digest B1 Register */
+ u32 mdc1; /* 0x78 Message Digest C1 Register */
+ u32 mdd1; /* 0x7C Message Digest D1 Register */
+ u32 mde1; /* 0x80 Message Digest E1 Register */
+} mdha_t;
+
+/* Symmetric Key Hardware Accelerator */
+typedef struct skha_ctrl {
+ u32 mr; /* 0x00 Mode Register */
+ u32 cr; /* 0x04 Control Register */
+ u32 cmr; /* 0x08 Command Register */
+ u32 sr; /* 0x0C Status Register */
+ u32 esr; /* 0x10 Error Status Register */
+ u32 emr; /* 0x14 Error Status Mask Register) */
+ u32 ksr; /* 0x18 Key Size Register */
+ u32 dsr; /* 0x1C Data Size Register */
+ u32 in; /* 0x20 Input FIFO */
+ u32 out; /* 0x24 Output FIFO */
+ u32 res1[2]; /* 0x28 - 0x2F */
+ u32 kdr1; /* 0x30 Key Data Register 1 */
+ u32 kdr2; /* 0x34 Key Data Register 2 */
+ u32 kdr3; /* 0x38 Key Data Register 3 */
+ u32 kdr4; /* 0x3C Key Data Register 4 */
+ u32 kdr5; /* 0x40 Key Data Register 5 */
+ u32 kdr6; /* 0x44 Key Data Register 6 */
+ u32 res2[10]; /* 0x48 - 0x6F */
+ u32 c1; /* 0x70 Context 1 */
+ u32 c2; /* 0x74 Context 2 */
+ u32 c3; /* 0x78 Context 3 */
+ u32 c4; /* 0x7C Context 4 */
+ u32 c5; /* 0x80 Context 5 */
+ u32 c6; /* 0x84 Context 6 */
+ u32 c7; /* 0x88 Context 7 */
+ u32 c8; /* 0x8C Context 8 */
+ u32 c9; /* 0x90 Context 9 */
+ u32 c10; /* 0x94 Context 10 */
+ u32 c11; /* 0x98 Context 11 */
+} skha_t;
+
+/* Random Number Generator */
+typedef struct rng_ctrl {
+ u32 rngcr; /* 0x00 RNG Control Register */
+ u32 rngsr; /* 0x04 RNG Status Register */
+ u32 rnger; /* 0x08 RNG Entropy Register */
+ u32 rngout; /* 0x0C RNG Output FIFO */
+} rng_t;
+
+/* System control module registers 2 */
+typedef struct scm2_ctrl {
+ u32 mpr1; /* 0x00 Master Privilege Register */
+ u32 res1[7]; /* 0x04 - 0x1F */
+ u32 pacra; /* 0x20 Peripheral Access Control Register A */
+ u32 pacrb; /* 0x24 Peripheral Access Control Register B */
+ u32 pacrc; /* 0x28 Peripheral Access Control Register C */
+ u32 pacrd; /* 0x2C Peripheral Access Control Register D */
+ u32 res2[4]; /* 0x30 - 0x3F */
+ u32 pacre; /* 0x40 Peripheral Access Control Register E */
+ u32 pacrf; /* 0x44 Peripheral Access Control Register F */
+ u32 pacrg; /* 0x48 Peripheral Access Control Register G */
+ u32 res3[2]; /* 0x4C - 0x53 */
+ u32 bmt1; /* 0x54 Bus Monitor Timeout 1 */
+} scm2_t;
+
+/* Cross-Bar Switch Module */
+typedef struct xbs_ctrl {
+ u32 prs1; /* 0x100 Priority Register Slave 1 */
+ u32 res1[3]; /* 0x104 - 0F */
+ u32 crs1; /* 0x110 Control Register Slave 1 */
+ u32 res2[187]; /* 0x114 - 0x3FF */
+
+ u32 prs4; /* 0x400 Priority Register Slave 4 */
+ u32 res3[3]; /* 0x404 - 0F */
+ u32 crs4; /* 0x410 Control Register Slave 4 */
+ u32 res4[123]; /* 0x414 - 0x5FF */
+
+ u32 prs6; /* 0x600 Priority Register Slave 6 */
+ u32 res5[3]; /* 0x604 - 0F */
+ u32 crs6; /* 0x610 Control Register Slave 6 */
+ u32 res6[59]; /* 0x614 - 0x6FF */
+
+ u32 prs7; /* 0x700 Priority Register Slave 7 */
+ u32 res7[3]; /* 0x704 - 0F */
+ u32 crs7; /* 0x710 Control Register Slave 7 */
+} xbs_t;
+
+/* Flexbus module Chip select registers */
+typedef struct fbcs_ctrl {
+ u16 csar0; /* 0x00 Chip-Select Address Register 0 */
+ u16 res0;
+ u32 csmr0; /* 0x04 Chip-Select Mask Register 0 */
+ u32 cscr0; /* 0x08 Chip-Select Control Register 0 */
+
+ u16 csar1; /* 0x0C Chip-Select Address Register 1 */
+ u16 res1;
+ u32 csmr1; /* 0x10 Chip-Select Mask Register 1 */
+ u32 cscr1; /* 0x14 Chip-Select Control Register 1 */
+
+ u16 csar2; /* 0x18 Chip-Select Address Register 2 */
+ u16 res2;
+ u32 csmr2; /* 0x1C Chip-Select Mask Register 2 */
+ u32 cscr2; /* 0x20 Chip-Select Control Register 2 */
+
+ u16 csar3; /* 0x24 Chip-Select Address Register 3 */
+ u16 res3;
+ u32 csmr3; /* 0x28 Chip-Select Mask Register 3 */
+ u32 cscr3; /* 0x2C Chip-Select Control Register 3 */
+
+ u16 csar4; /* 0x30 Chip-Select Address Register 4 */
+ u16 res4;
+ u32 csmr4; /* 0x34 Chip-Select Mask Register 4 */
+ u32 cscr4; /* 0x38 Chip-Select Control Register 4 */
+
+ u16 csar5; /* 0x3C Chip-Select Address Register 5 */
+ u16 res5;
+ u32 csmr5; /* 0x40 Chip-Select Mask Register 5 */
+ u32 cscr5; /* 0x44 Chip-Select Control Register 5 */
+} fbcs_t;
+
+/* FlexCan module registers */
+typedef struct can_ctrl {
+ u32 mcr; /* 0x00 Module Configuration register */
+ u32 ctrl; /* 0x04 Control register */
+ u32 timer; /* 0x08 Free Running Timer */
+ u32 res1; /* 0x0C */
+ u32 rxgmask; /* 0x10 Rx Global Mask */
+ u32 rx14mask; /* 0x14 RxBuffer 14 Mask */
+ u32 rx15mask; /* 0x18 RxBuffer 15 Mask */
+ u32 errcnt; /* 0x1C Error Counter Register */
+ u32 errstat; /* 0x20 Error and status Register */
+ u32 res2; /* 0x24 */
+ u32 imask; /* 0x28 Interrupt Mask Register */
+ u32 res3; /* 0x2C */
+ u32 iflag; /* 0x30 Interrupt Flag Register */
+ u32 res4[19]; /* 0x34 - 0x7F */
+ u32 MB0_15[2048]; /* 0x80 Message Buffer 0-15 */
+} can_t;
+
+/* System Control Module register 3 */
+typedef struct scm3_ctrl {
+ u8 res1[19]; /* 0x00 - 0x12 */
+ u8 wcr; /* 0x13 wakeup control register */
+ u16 res2; /* 0x14 - 0x15 */
+ u16 cwcr; /* 0x16 Core Watchdog Control Register */
+ u8 res3[3]; /* 0x18 - 0x1A */
+ u8 cwsr; /* 0x1B Core Watchdog Service Register */
+ u8 res4[2]; /* 0x1C - 0x1D */
+ u8 scmisr; /* 0x1F Interrupt Status Register */
+ u32 res5; /* 0x20 */
+ u32 bcr; /* 0x24 Burst Configuration Register */
+ u32 res6[18]; /* 0x28 - 0x6F */
+ u32 cfadr; /* 0x70 Core Fault Address Register */
+ u8 res7[4]; /* 0x71 - 0x74 */
+ u8 cfier; /* 0x75 Core Fault Interrupt Enable Register */
+ u8 cfloc; /* 0x76 Core Fault Location Register */
+ u8 cfatr; /* 0x77 Core Fault Attributes Register */
+ u32 res8; /* 0x78 */
+ u32 cfdtr; /* 0x7C Core Fault Data Register */
+} scm3_t;
+
+/* eDMA module registers */
+typedef struct edma_ctrl {
+ u32 cr; /* 0x00 Control Register */
+ u32 es; /* 0x04 Error Status Register */
+ u16 res1[3]; /* 0x08 - 0x0D */
+ u16 erq; /* 0x0E Enable Request Register */
+ u16 res2[3]; /* 0x10 - 0x15 */
+ u16 eei; /* 0x16 Enable Error Interrupt Request */
+ u8 serq; /* 0x18 Set Enable Request */
+ u8 cerq; /* 0x19 Clear Enable Request */
+ u8 seei; /* 0x1A Set Enable Error Interrupt Request */
+ u8 ceei; /* 0x1B Clear Enable Error Interrupt Request */
+ u8 cint; /* 0x1C Clear Interrupt Enable Register */
+ u8 cerr; /* 0x1D Clear Error Register */
+ u8 ssrt; /* 0x1E Set START Bit Register */
+ u8 cdne; /* 0x1F Clear DONE Status Bit Register */
+ u16 res3[3]; /* 0x20 - 0x25 */
+ u16 intr; /* 0x26 Interrupt Request Register */
+ u16 res4[3]; /* 0x28 - 0x2D */
+ u16 err; /* 0x2E Error Register */
+ u32 res5[52]; /* 0x30 - 0xFF */
+ u8 dchpri0; /* 0x100 Channel 0 Priority Register */
+ u8 dchpri1; /* 0x101 Channel 1 Priority Register */
+ u8 dchpri2; /* 0x102 Channel 2 Priority Register */
+ u8 dchpri3; /* 0x103 Channel 3 Priority Register */
+ u8 dchpri4; /* 0x104 Channel 4 Priority Register */
+ u8 dchpri5; /* 0x105 Channel 5 Priority Register */
+ u8 dchpri6; /* 0x106 Channel 6 Priority Register */
+ u8 dchpri7; /* 0x107 Channel 7 Priority Register */
+ u8 dchpri8; /* 0x108 Channel 8 Priority Register */
+ u8 dchpri9; /* 0x109 Channel 9 Priority Register */
+ u8 dchpri10; /* 0x110 Channel 10 Priority Register */
+ u8 dchpri11; /* 0x111 Channel 11 Priority Register */
+ u8 dchpri12; /* 0x112 Channel 12 Priority Register */
+ u8 dchpri13; /* 0x113 Channel 13 Priority Register */
+ u8 dchpri14; /* 0x114 Channel 14 Priority Register */
+ u8 dchpri15; /* 0x115 Channel 15 Priority Register */
+} edma_t;
+
+/* TCD - eDMA*/
+typedef struct tcd_ctrl {
+ u32 saddr; /* 0x00 Source Address */
+ u16 attr; /* 0x04 Transfer Attributes */
+ u16 soff; /* 0x06 Signed Source Address Offset */
+ u32 nbytes; /* 0x08 Minor Byte Count */
+ u32 slast; /* 0x0C Last Source Address Adjustment */
+ u32 daddr; /* 0x10 Destination address */
+ u16 citer; /* 0x14 Current Minor Loop Link, Major Loop Count */
+ u16 doff; /* 0x16 Signed Destination Address Offset */
+ u32 dlast_sga; /* 0x18 Last Destination Address Adjustment/Scatter Gather Address */
+ u16 biter; /* 0x1C Beginning Minor Loop Link, Major Loop Count */
+ u16 csr; /* 0x1E Control and Status */
+} tcd_st;
+
+typedef struct tcd_multiple {
+ tcd_st tcd[16];
+} tcd_t;
+
+/* Interrupt module registers */
+typedef struct int0_ctrl {
+ /* Interrupt Controller 0 */
+ u32 iprh0; /* 0x00 Pending Register High */
+ u32 iprl0; /* 0x04 Pending Register Low */
+ u32 imrh0; /* 0x08 Mask Register High */
+ u32 imrl0; /* 0x0C Mask Register Low */
+ u32 frch0; /* 0x10 Force Register High */
+ u32 frcl0; /* 0x14 Force Register Low */
+ u16 res1; /* 0x18 - 0x19 */
+ u16 icfg0; /* 0x1A Configuration Register */
+ u8 simr0; /* 0x1C Set Interrupt Mask */
+ u8 cimr0; /* 0x1D Clear Interrupt Mask */
+ u8 clmask0; /* 0x1E Current Level Mask */
+ u8 slmask; /* 0x1F Saved Level Mask */
+ u32 res2[8]; /* 0x20 - 0x3F */
+ u8 icr0[64]; /* 0x40 - 0x7F Control registers */
+ u32 res3[24]; /* 0x80 - 0xDF */
+ u8 swiack0; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res4[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack0_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res5[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack0_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE9 - 0xEB */
+ u8 Lniack0_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xED - 0xEF */
+ u8 Lniack0_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack0_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack0_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF9 - 0xFB */
+ u8 Lniack0_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xFD - 0xFF */
+} int0_t;
+
+typedef struct int1_ctrl {
+ /* Interrupt Controller 1 */
+ u32 iprh1; /* 0x00 Pending Register High */
+ u32 iprl1; /* 0x04 Pending Register Low */
+ u32 imrh1; /* 0x08 Mask Register High */
+ u32 imrl1; /* 0x0C Mask Register Low */
+ u32 frch1; /* 0x10 Force Register High */
+ u32 frcl1; /* 0x14 Force Register Low */
+ u16 res1; /* 0x18 */
+ u16 icfg1; /* 0x1A Configuration Register */
+ u8 simr1; /* 0x1C Set Interrupt Mask */
+ u8 cimr1; /* 0x1D Clear Interrupt Mask */
+ u16 res2; /* 0x1E - 0x1F */
+ u32 res3[8]; /* 0x20 - 0x3F */
+ u8 icr1[64]; /* 0x40 - 0x7F */
+ u32 res4[24]; /* 0x80 - 0xDF */
+ u8 swiack1; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res5[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack1_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack1_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xE9 - 0xEB */
+ u8 Lniack1_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xED - 0xEF */
+ u8 Lniack1_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack1_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack1_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xF9 - 0xFB */
+ u8 Lniack1_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resc[3]; /* 0xFD - 0xFF */
+} int1_t;
+
+typedef struct intgack_ctrl1 {
+ /* Global IACK Registers */
+ u8 swiack; /* 0xE0 Global Software Interrupt Acknowledge */
+ u8 Lniack[7]; /* 0xE1 - 0xE7 Global Level 0 Interrupt Acknowledge */
+} intgack_t;
+
+/*I2C module registers */
+typedef struct i2c_ctrl {
+ u8 adr; /* 0x00 address register */
+ u8 res1[3]; /* 0x01 - 0x03 */
+ u8 fdr; /* 0x04 frequency divider register */
+ u8 res2[3]; /* 0x05 - 0x07 */
+ u8 cr; /* 0x08 control register */
+ u8 res3[3]; /* 0x09 - 0x0B */
+ u8 sr; /* 0x0C status register */
+ u8 res4[3]; /* 0x0D - 0x0F */
+ u8 dr; /* 0x10 data register */
+ u8 res5[3]; /* 0x11 - 0x13 */
+} i2c_t;
+
+/* QSPI module registers */
+typedef struct qspi_ctrl {
+ u16 qmr; /* Mode register */
+ u16 res1;
+ u16 qdlyr; /* Delay register */
+ u16 res2;
+ u16 qwr; /* Wrap register */
+ u16 res3;
+ u16 qir; /* Interrupt register */
+ u16 res4;
+ u16 qar; /* Address register */
+ u16 res5;
+ u16 qdr; /* Data register */
+ u16 res6;
+} qspi_t;
+
+/* PWM module registers */
+typedef struct pwm_ctrl {
+ u8 en; /* 0x00 PWM Enable Register */
+ u8 pol; /* 0x01 Polarity Register */
+ u8 clk; /* 0x02 Clock Select Register */
+ u8 prclk; /* 0x03 Prescale Clock Select Register */
+ u8 cae; /* 0x04 Center Align Enable Register */
+ u8 ctl; /* 0x05 Control Register */
+ u8 res1[2]; /* 0x06 - 0x07 */
+ u8 scla; /* 0x08 Scale A register */
+ u8 sclb; /* 0x09 Scale B register */
+ u8 res2[2]; /* 0x0A - 0x0B */
+ u8 cnt0; /* 0x0C Channel 0 Counter register */
+ u8 cnt1; /* 0x0D Channel 1 Counter register */
+ u8 cnt2; /* 0x0E Channel 2 Counter register */
+ u8 cnt3; /* 0x0F Channel 3 Counter register */
+ u8 cnt4; /* 0x10 Channel 4 Counter register */
+ u8 cnt5; /* 0x11 Channel 5 Counter register */
+ u8 cnt6; /* 0x12 Channel 6 Counter register */
+ u8 cnt7; /* 0x13 Channel 7 Counter register */
+ u8 per0; /* 0x14 Channel 0 Period register */
+ u8 per1; /* 0x15 Channel 1 Period register */
+ u8 per2; /* 0x16 Channel 2 Period register */
+ u8 per3; /* 0x17 Channel 3 Period register */
+ u8 per4; /* 0x18 Channel 4 Period register */
+ u8 per5; /* 0x19 Channel 5 Period register */
+ u8 per6; /* 0x1A Channel 6 Period register */
+ u8 per7; /* 0x1B Channel 7 Period register */
+ u8 dty0; /* 0x1C Channel 0 Duty register */
+ u8 dty1; /* 0x1D Channel 1 Duty register */
+ u8 dty2; /* 0x1E Channel 2 Duty register */
+ u8 dty3; /* 0x1F Channel 3 Duty register */
+ u8 dty4; /* 0x20 Channel 4 Duty register */
+ u8 dty5; /* 0x21 Channel 5 Duty register */
+ u8 dty6; /* 0x22 Channel 6 Duty register */
+ u8 dty7; /* 0x23 Channel 7 Duty register */
+ u8 sdn; /* 0x24 Shutdown register */
+ u8 res3[3]; /* 0x25 - 0x27 */
+} pwm_t;
+
+/* Edge Port module registers */
+typedef struct eport_ctrl {
+ u16 par; /* 0x00 Pin Assignment Register */
+ u8 ddar; /* 0x02 Data Direction Register */
+ u8 ier; /* 0x03 Interrupt Enable Register */
+ u8 dr; /* 0x04 Data Register */
+ u8 pdr; /* 0x05 Pin Data Register */
+ u8 fr; /* 0x06 Flag_Register */
+ u8 res1;
+} eport_t;
+
+/* Watchdog registers */
+typedef struct wdog_ctrl {
+ u16 cr; /* 0x00 Control register */
+ u16 mr; /* 0x02 Modulus register */
+ u16 cntr; /* 0x04 Count register */
+ u16 sr; /* 0x06 Service register */
+} wdog_t;
+
+/*Chip configuration module registers */
+typedef struct ccm_ctrl {
+ u8 rstctrl; /* 0x00 Reset Controller register */
+ u8 rststat; /* 0x01 Reset Status register */
+ u16 res1; /* 0x02 - 0x03 */
+ u16 ccr; /* 0x04 Chip configuration register */
+ u16 res2; /* 0x06 */
+ u16 rcon; /* 0x08 Rreset configuration register */
+ u16 cir; /* 0x0A Chip identification register */
+ u32 res3; /* 0x0C */
+ u16 misccr; /* 0x10 Miscellaneous control register */
+ u16 cdr; /* 0x12 Clock divider register */
+ u16 uhcsr; /* 0x14 USB Host controller status register */
+ u16 uocsr; /* 0x16 USB On-the-Go Controller Status Register */
+} ccm_t;
+
+/* GPIO port registers */
+typedef struct gpio_ctrl {
+ /* Port Output Data Registers */
+ u8 podr_fech; /* 0x00 */
+ u8 podr_fecl; /* 0x01 */
+ u8 podr_ssi; /* 0x02 */
+ u8 podr_busctl; /* 0x03 */
+ u8 podr_be; /* 0x04 */
+ u8 podr_cs; /* 0x05 */
+ u8 podr_pwm; /* 0x06 */
+ u8 podr_feci2c; /* 0x07 */
+ u8 res1; /* 0x08 */
+ u8 podr_uart; /* 0x09 */
+ u8 podr_qspi; /* 0x0A */
+ u8 podr_timer; /* 0x0B */
+ u8 res2; /* 0x0C */
+ u8 podr_lcddatah; /* 0x0D */
+ u8 podr_lcddatam; /* 0x0E */
+ u8 podr_lcddatal; /* 0x0F */
+ u8 podr_lcdctlh; /* 0x10 */
+ u8 podr_lcdctll; /* 0x11 */
+
+ /* Port Data Direction Registers */
+ u16 res3; /* 0x12 - 0x13 */
+ u8 pddr_fech; /* 0x14 */
+ u8 pddr_fecl; /* 0x15 */
+ u8 pddr_ssi; /* 0x16 */
+ u8 pddr_busctl; /* 0x17 */
+ u8 pddr_be; /* 0x18 */
+ u8 pddr_cs; /* 0x19 */
+ u8 pddr_pwm; /* 0x1A */
+ u8 pddr_feci2c; /* 0x1B */
+ u8 res4; /* 0x1C */
+ u8 pddr_uart; /* 0x1D */
+ u8 pddr_qspi; /* 0x1E */
+ u8 pddr_timer; /* 0x1F */
+ u8 res5; /* 0x20 */
+ u8 pddr_lcddatah; /* 0x21 */
+ u8 pddr_lcddatam; /* 0x22 */
+ u8 pddr_lcddatal; /* 0x23 */
+ u8 pddr_lcdctlh; /* 0x24 */
+ u8 pddr_lcdctll; /* 0x25 */
+ u16 res6; /* 0x26 - 0x27 */
+
+ /* Port Data Direction Registers */
+ u8 ppd_fech; /* 0x28 */
+ u8 ppd_fecl; /* 0x29 */
+ u8 ppd_ssi; /* 0x2A */
+ u8 ppd_busctl; /* 0x2B */
+ u8 ppd_be; /* 0x2C */
+ u8 ppd_cs; /* 0x2D */
+ u8 ppd_pwm; /* 0x2E */
+ u8 ppd_feci2c; /* 0x2F */
+ u8 res7; /* 0x30 */
+ u8 ppd_uart; /* 0x31 */
+ u8 ppd_qspi; /* 0x32 */
+ u8 ppd_timer; /* 0x33 */
+ u8 res8; /* 0x34 */
+ u8 ppd_lcddatah; /* 0x35 */
+ u8 ppd_lcddatam; /* 0x36 */
+ u8 ppd_lcddatal; /* 0x37 */
+ u8 ppd_lcdctlh; /* 0x38 */
+ u8 ppd_lcdctll; /* 0x39 */
+ u16 res9; /* 0x3A - 0x3B */
+
+ /* Port Clear Output Data Registers */
+ u8 pclrr_fech; /* 0x3C */
+ u8 pclrr_fecl; /* 0x3D */
+ u8 pclrr_ssi; /* 0x3E */
+ u8 pclrr_busctl; /* 0x3F */
+ u8 pclrr_be; /* 0x40 */
+ u8 pclrr_cs; /* 0x41 */
+ u8 pclrr_pwm; /* 0x42 */
+ u8 pclrr_feci2c; /* 0x43 */
+ u8 res10; /* 0x44 */
+ u8 pclrr_uart; /* 0x45 */
+ u8 pclrr_qspi; /* 0x46 */
+ u8 pclrr_timer; /* 0x47 */
+ u8 res11; /* 0x48 */
+ u8 pclrr_lcddatah; /* 0x49 */
+ u8 pclrr_lcddatam; /* 0x4A */
+ u8 pclrr_lcddatal; /* 0x4B */
+ u8 pclrr_lcdctlh; /* 0x4C */
+ u8 pclrr_lcdctll; /* 0x4D */
+ u16 res12; /* 0x4E - 0x4F */
+
+ /* Pin Assignment Registers */
+ u8 par_fec; /* 0x50 */
+ u8 par_pwm; /* 0x51 */
+ u8 par_busctl; /* 0x52 */
+ u8 par_feci2c; /* 0x53 */
+ u8 par_be; /* 0x54 */
+ u8 par_cs; /* 0x55 */
+ u16 par_ssi; /* 0x56 */
+ u16 par_uart; /* 0x58 */
+ u16 par_qspi; /* 0x5A */
+ u8 par_timer; /* 0x5C */
+ u8 par_lcddata; /* 0x5D */
+ u16 par_lcdctl; /* 0x5E */
+ u16 par_irq; /* 0x60 */
+ u16 res16; /* 0x62 - 0x63 */
+
+ /* Mode Select Control Registers */
+ u8 mscr_flexbus; /* 0x64 */
+ u8 mscr_sdram; /* 0x65 */
+ u16 res17; /* 0x66 - 0x67 */
+
+ /* Drive Strength Control Registers */
+ u8 dscr_i2c; /* 0x68 */
+ u8 dscr_pwm; /* 0x69 */
+ u8 dscr_fec; /* 0x6A */
+ u8 dscr_uart; /* 0x6B */
+ u8 dscr_qspi; /* 0x6C */
+ u8 dscr_timer; /* 0x6D */
+ u8 dscr_ssi; /* 0x6E */
+ u8 dscr_lcd; /* 0x6F */
+ u8 dscr_debug; /* 0x70 */
+ u8 dscr_clkrst; /* 0x71 */
+ u8 dscr_irq; /* 0x72 */
+} gpio_t;
+
+/* LCD module registers */
+typedef struct lcd_ctrl {
+ u32 ssar; /* 0x00 Screen Start Address Register */
+ u32 sr; /* 0x04 LCD Size Register */
+ u32 vpw; /* 0x08 Virtual Page Width Register */
+ u32 cpr; /* 0x0C Cursor Position Register */
+ u32 cwhb; /* 0x10 Cursor Width Height and Blink Register */
+ u32 ccmr; /* 0x14 Color Cursor Mapping Register */
+ u32 pcr; /* 0x18 Panel Configuration Register */
+ u32 hcr; /* 0x1C Horizontal Configuration Register */
+ u32 vcr; /* 0x20 Vertical Configuration Register */
+ u32 por; /* 0x24 Panning Offset Register */
+ u32 scr; /* 0x28 Sharp Configuration Register */
+ u32 pccr; /* 0x2C PWM Contrast Control Register */
+ u32 dcr; /* 0x30 DMA Control Register */
+ u32 rmcr; /* 0x34 Refresh Mode Control Register */
+ u32 icr; /* 0x38 Refresh Mode Control Register */
+ u32 ier; /* 0x3C Interrupt Enable Register */
+ u32 isr; /* 0x40 Interrupt Status Register */
+ u32 res[4];
+ u32 gwsar; /* 0x50 Graphic Window Start Address Register */
+ u32 gwsr; /* 0x54 Graphic Window Size Register */
+ u32 gwvpw; /* 0x58 Graphic Window Virtual Page Width Register */
+ u32 gwpor; /* 0x5C Graphic Window Panning Offset Register */
+ u32 gwpr; /* 0x60 Graphic Window Position Register */
+ u32 gwcr; /* 0x64 Graphic Window Control Register */
+ u32 gwdcr; /* 0x68 Graphic Window DMA Control Register */
+} lcd_t;
+
+typedef struct lcdbg_ctrl {
+ u32 bglut[255];
+} lcdbg_t;
+
+typedef struct lcdgw_ctrl {
+ u32 gwlut[255];
+} lcdgw_t;
+
+/* USB OTG module registers */
+typedef struct usb_otg {
+ u32 id; /* 0x000 Identification Register */
+ u32 hwgeneral; /* 0x004 General HW Parameters */
+ u32 hwhost; /* 0x008 Host HW Parameters */
+ u32 hwdev; /* 0x00C Device HW parameters */
+ u32 hwtxbuf; /* 0x010 TX Buffer HW Parameters */
+ u32 hwrxbuf; /* 0x014 RX Buffer HW Parameters */
+ u32 res1[58]; /* 0x18 - 0xFF */
+ u8 caplength; /* 0x100 Capability Register Length */
+ u8 res2; /* 0x101 */
+ u16 hciver; /* 0x102 Host Interface Version Number */
+ u32 hcsparams; /* 0x104 Host Structural Parameters */
+ u32 hccparams; /* 0x108 Host Capability Parameters */
+ u32 res3[5]; /* 0x10C - 0x11F */
+ u16 dciver; /* 0x120 Device Interface Version Number */
+ u16 res4; /* 0x122 */
+ u32 dccparams; /* 0x124 Device Capability Parameters */
+ u32 res5[6]; /* 0x128 - 0x13F */
+ u32 cmd; /* 0x140 USB Command */
+ u32 sts; /* 0x144 USB Status */
+ u32 intr; /* 0x148 USB Interrupt Enable */
+ u32 frindex; /* 0x14C USB Frame Index */
+ u32 res6; /* 0x150 */
+ u32 prd_dev; /* 0x154 Periodic Frame List Base or Device Address */
+ u32 aync_ep; /* 0x158 Current Asynchronous List or Address at Endpoint List Address */
+ u32 ttctrl; /* 0x15C Host TT Asynchronous Buffer Control */
+ u32 burstsize; /* 0x160 Master Interface Data Burst Size */
+ u32 txfill; /* 0x164 Host Transmit FIFO Tuning Control */
+ u32 res7[6]; /* 0x168 - 0x17F */
+ u32 cfgflag; /* 0x180 Configure Flag Register */
+ u32 portsc1; /* 0x184 Port Status/Control */
+ u32 res8[7]; /* 0x188 - 0x1A3 */
+ u32 otgsc; /* 0x1A4 On The Go Status and Control */
+ u32 mode; /* 0x1A8 USB mode register */
+ u32 eptsetstat; /* 0x1AC Endpoint Setup status */
+ u32 eptprime; /* 0x1B0 Endpoint initialization */
+ u32 eptflush; /* 0x1B4 Endpoint de-initialize */
+ u32 eptstat; /* 0x1B8 Endpoint status */
+ u32 eptcomplete; /* 0x1BC Endpoint Complete */
+ u32 eptctrl0; /* 0x1C0 Endpoint control 0 */
+ u32 eptctrl1; /* 0x1C4 Endpoint control 1 */
+ u32 eptctrl2; /* 0x1C8 Endpoint control 2 */
+ u32 eptctrl3; /* 0x1CC Endpoint control 3 */
+} usbotg_t;
+
+/* USB Host module registers */
+typedef struct usb_host {
+ u32 id; /* 0x000 Identification Register */
+ u32 hwgeneral; /* 0x004 General HW Parameters */
+ u32 hwhost; /* 0x008 Host HW Parameters */
+ u32 res1; /* 0x0C */
+ u32 hwtxbuf; /* 0x010 TX Buffer HW Parameters */
+ u32 hwrxbuf; /* 0x014 RX Buffer HW Parameters */
+ u32 res2[58]; /* 0x18 - 0xFF */
+
+ /* Host Controller Capability Register */
+ u8 caplength; /* 0x100 Capability Register Length */
+ u8 res3; /* 0x101 */
+ u16 hciver; /* 0x102 Host Interface Version Number */
+ u32 hcsparams; /* 0x104 Host Structural Parameters */
+ u32 hccparams; /* 0x108 Host Capability Parameters */
+ u32 res4[13]; /* 0x10C - 0x13F */
+
+ /* Host Controller Operational Register */
+ u32 cmd; /* 0x140 USB Command */
+ u32 sts; /* 0x144 USB Status */
+ u32 intr; /* 0x148 USB Interrupt Enable */
+ u32 frindex; /* 0x14C USB Frame Index */
+ u32 res5; /* 0x150 (ctrl segment register in EHCI spec) */
+ u32 prdlst; /* 0x154 Periodic Frame List Base Address */
+ u32 aynclst; /* 0x158 Current Asynchronous List Address */
+ u32 ttctrl; /* 0x15C Host TT Asynchronous Buffer Control (non-ehci) */
+ u32 burstsize; /* 0x160 Master Interface Data Burst Size (non-ehci) */
+ u32 txfill; /* 0x164 Host Transmit FIFO Tuning Control (non-ehci) */
+ u32 res6[6]; /* 0x168 - 0x17F */
+ u32 cfgflag; /* 0x180 Configure Flag Register */
+ u32 portsc1; /* 0x184 Port Status/Control */
+ u32 res7[8]; /* 0x188 - 0x1A7 */
+
+ /* non-ehci registers */
+ u32 mode; /* 0x1A8 USB mode register */
+ u32 eptsetstat; /* 0x1AC Endpoint Setup status */
+ u32 eptprime; /* 0x1B0 Endpoint initialization */
+ u32 eptflush; /* 0x1B4 Endpoint de-initialize */
+ u32 eptstat; /* 0x1B8 Endpoint status */
+ u32 eptcomplete; /* 0x1BC Endpoint Complete */
+ u32 eptctrl0; /* 0x1C0 Endpoint control 0 */
+ u32 eptctrl1; /* 0x1C4 Endpoint control 1 */
+ u32 eptctrl2; /* 0x1C8 Endpoint control 2 */
+ u32 eptctrl3; /* 0x1CC Endpoint control 3 */
+} usbhost_t;
+
+/* SDRAM controller registers */
+typedef struct sdram_ctrl {
+ u32 mode; /* 0x00 Mode/Extended Mode register */
+ u32 ctrl; /* 0x04 Control register */
+ u32 cfg1; /* 0x08 Configuration register 1 */
+ u32 cfg2; /* 0x0C Configuration register 2 */
+ u32 res1[64]; /* 0x10 - 0x10F */
+ u32 cs0; /* 0x110 Chip Select 0 Configuration */
+ u32 cs1; /* 0x114 Chip Select 1 Configuration */
+} sdram_t;
+
+/* Synchronous serial interface */
+typedef struct ssi_ctrl {
+ u32 tx0; /* 0x00 Transmit Data Register 0 */
+ u32 tx1; /* 0x04 Transmit Data Register 1 */
+ u32 rx0; /* 0x08 Receive Data Register 0 */
+ u32 rx1; /* 0x0C Receive Data Register 1 */
+ u32 cr; /* 0x10 Control Register */
+ u32 isr; /* 0x14 Interrupt Status Register */
+ u32 ier; /* 0x18 Interrupt Enable Register */
+ u32 tcr; /* 0x1C Transmit Configuration Register */
+ u32 rcr; /* 0x20 Receive Configuration Register */
+ u32 ccr; /* 0x24 Clock Control Register */
+ u32 res1; /* 0x28 */
+ u32 fcsr; /* 0x2C FIFO Control/Status Register */
+ u32 res2[2]; /* 0x30 - 0x37 */
+ u32 acr; /* 0x38 AC97 Control Register */
+ u32 acadd; /* 0x3C AC97 Command Address Register */
+ u32 acdat; /* 0x40 AC97 Command Data Register */
+ u32 atag; /* 0x44 AC97 Tag Register */
+ u32 tmask; /* 0x48 Transmit Time Slot Mask Register */
+ u32 rmask; /* 0x4C Receive Time Slot Mask Register */
+} ssi_t;
+
+/* Clock Module registers */
+typedef struct pll_ctrl {
+ u8 podr; /* 0x00 Output Divider Register */
+ u8 res1[3];
+ u8 pcr; /* 0x04 Control Register */
+ u8 res2[3];
+ u8 pmdr; /* 0x08 Modulation Divider Register */
+ u8 res3[3];
+ u8 pfdr; /* 0x0C Feedback Divider Register */
+ u8 res4[3];
+} pll_t;
+
+#endif /* __IMMAP_5329__ */
diff --git a/include/asm-m68k/immap_5445x.h b/include/asm-m68k/immap_5445x.h
new file mode 100644
index 0000000..d091d7b
--- /dev/null
+++ b/include/asm-m68k/immap_5445x.h
@@ -0,0 +1,937 @@
+/*
+ * MCF5445x Internal Memory Map
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __IMMAP_5445X__
+#define __IMMAP_5445X__
+
+/* Module Base Addresses */
+#define MMAP_SCM1 0xFC000000
+#define MMAP_XBS 0xFC004000
+#define MMAP_FBCS 0xFC008000
+#define MMAP_FEC0 0xFC030000
+#define MMAP_FEC1 0xFC034000
+#define MMAP_RTC 0xFC03C000
+#define MMAP_EDMA 0xFC044000
+#define MMAP_INTC0 0xFC048000
+#define MMAP_INTC1 0xFC04C000
+#define MMAP_IACK 0xFC054000
+#define MMAP_I2C 0xFC058000
+#define MMAP_DSPI 0xFC05C000
+#define MMAP_UART0 0xFC060000
+#define MMAP_UART1 0xFC064000
+#define MMAP_UART2 0xFC068000
+#define MMAP_DTMR0 0xFC070000
+#define MMAP_DTMR1 0xFC074000
+#define MMAP_DTMR2 0xFC078000
+#define MMAP_DTMR3 0xFC07C000
+#define MMAP_PIT0 0xFC080000
+#define MMAP_PIT1 0xFC084000
+#define MMAP_PIT2 0xFC088000
+#define MMAP_PIT3 0xFC08C000
+#define MMAP_EPORT 0xFC094000
+#define MMAP_WTM 0xFC098000
+#define MMAP_SBF 0xFC0A0000
+#define MMAP_RCM 0xFC0A0000
+#define MMAP_CCM 0xFC0A0000
+#define MMAP_GPIO 0xFC0A4000
+#define MMAP_PCI 0xFC0A8000
+#define MMAP_PCIARB 0xFC0AC000
+#define MMAP_RNG 0xFC0B4000
+#define MMAP_SDRAM 0xFC0B8000
+#define MMAP_SSI 0xFC0BC000
+#define MMAP_PLL 0xFC0C4000
+#define MMAP_ATA 0x90000000
+
+/*********************************************************************
+* ATA
+*********************************************************************/
+
+typedef struct atac {
+ /* PIO */
+ u8 toff; /* 0x00 */
+ u8 ton; /* 0x01 */
+ u8 t1; /* 0x02 */
+ u8 t2w; /* 0x03 */
+ u8 t2r; /* 0x04 */
+ u8 ta; /* 0x05 */
+ u8 trd; /* 0x06 */
+ u8 t4; /* 0x07 */
+ u8 t9; /* 0x08 */
+
+ /* DMA */
+ u8 tm; /* 0x09 */
+ u8 tn; /* 0x0A */
+ u8 td; /* 0x0B */
+ u8 tk; /* 0x0C */
+ u8 tack; /* 0x0D */
+ u8 tenv; /* 0x0E */
+ u8 trp; /* 0x0F */
+ u8 tzah; /* 0x10 */
+ u8 tmli; /* 0x11 */
+ u8 tdvh; /* 0x12 */
+ u8 tdzfs; /* 0x13 */
+ u8 tdvs; /* 0x14 */
+ u8 tcvh; /* 0x15 */
+ u8 tss; /* 0x16 */
+ u8 tcyc; /* 0x17 */
+
+ /* FIFO */
+ u32 fifo32; /* 0x18 */
+ u16 fifo16; /* 0x1C */
+ u8 rsvd0[2];
+ u8 ffill; /* 0x20 */
+ u8 rsvd1[3];
+
+ /* ATA */
+ u8 cr; /* 0x24 */
+ u8 rsvd2[3];
+ u8 isr; /* 0x28 */
+ u8 rsvd3[3];
+ u8 ier; /* 0x2C */
+ u8 rsvd4[3];
+ u8 icr; /* 0x30 */
+ u8 rsvd5[3];
+ u8 falarm; /* 0x34 */
+ u8 rsvd6[106];
+} atac_t;
+
+/*********************************************************************
+* Cross-bar switch (XBS)
+*********************************************************************/
+
+typedef struct xbs {
+ u8 resv0[0x100];
+ u32 prs1; /* XBS Priority Register */
+ u8 resv1[0xC];
+ u32 crs1; /* XBS Control Register */
+ u8 resv2[0xEC];
+ u32 prs2; /* XBS Priority Register */
+ u8 resv3[0xC];
+ u32 crs2; /* XBS Control Register */
+ u8 resv4[0xEC];
+ u32 prs3; /* XBS Priority Register */
+ u8 resv5[0xC];
+ u32 crs3; /* XBS Control Register */
+ u8 resv6[0xEC];
+ u32 prs4; /* XBS Priority Register */
+ u8 resv7[0xC];
+ u32 crs4; /* XBS Control Register */
+ u8 resv8[0xEC];
+ u32 prs5; /* XBS Priority Register */
+ u8 resv9[0xC];
+ u32 crs5; /* XBS Control Register */
+ u8 resv10[0xEC];
+ u32 prs6; /* XBS Priority Register */
+ u8 resv11[0xC];
+ u32 crs6; /* XBS Control Register */
+ u8 resv12[0xEC];
+ u32 prs7; /* XBS Priority Register */
+ u8 resv13[0xC];
+ u32 crs7; /* XBS Control Register */
+} xbs_t;
+
+/*********************************************************************
+* FlexBus Chip Selects (FBCS)
+*********************************************************************/
+
+typedef struct fbcs {
+ u32 csar0; /* Chip-select Address Register */
+ u32 csmr0; /* Chip-select Mask Register */
+ u32 cscr0; /* Chip-select Control Register */
+ u32 csar1; /* Chip-select Address Register */
+ u32 csmr1; /* Chip-select Mask Register */
+ u32 cscr1; /* Chip-select Control Register */
+ u32 csar2; /* Chip-select Address Register */
+ u32 csmr2; /* Chip-select Mask Register */
+ u32 cscr2; /* Chip-select Control Register */
+ u32 csar3; /* Chip-select Address Register */
+ u32 csmr3; /* Chip-select Mask Register */
+ u32 cscr3; /* Chip-select Control Register */
+} fbcs_t;
+
+/*********************************************************************
+* Enhanced DMA (EDMA)
+*********************************************************************/
+
+typedef struct edma {
+ u32 cr;
+ u32 es;
+ u8 resv0[0x6];
+ u16 erq;
+ u8 resv1[0x6];
+ u16 eei;
+ u8 serq;
+ u8 cerq;
+ u8 seei;
+ u8 ceei;
+ u8 cint;
+ u8 cerr;
+ u8 ssrt;
+ u8 cdne;
+ u8 resv2[0x6];
+ u16 intr;
+ u8 resv3[0x6];
+ u16 err;
+ u8 resv4[0xD0];
+ u8 dchpri0;
+ u8 dchpri1;
+ u8 dchpri2;
+ u8 dchpri3;
+ u8 dchpri4;
+ u8 dchpri5;
+ u8 dchpri6;
+ u8 dchpri7;
+ u8 dchpri8;
+ u8 dchpri9;
+ u8 dchpri10;
+ u8 dchpri11;
+ u8 dchpri12;
+ u8 dchpri13;
+ u8 dchpri14;
+ u8 dchpri15;
+ u8 resv5[0xEF0];
+ u32 tcd0_saddr;
+ u16 tcd0_attr;
+ u16 tcd0_soff;
+ u32 tcd0_nbytes;
+ u32 tcd0_slast;
+ u32 tcd0_daddr;
+ union {
+ u16 tcd0_citer_elink;
+ u16 tcd0_citer;
+ };
+ u16 tcd0_doff;
+ u32 tcd0_dlast_sga;
+ union {
+ u16 tcd0_biter_elink;
+ u16 tcd0_biter;
+ };
+ u16 tcd0_csr;
+ u32 tcd1_saddr;
+ u16 tcd1_attr;
+ u16 tcd1_soff;
+ u32 tcd1_nbytes;
+ u32 tcd1_slast;
+ u32 tcd1_daddr;
+ union {
+ u16 tcd1_citer_elink;
+ u16 tcd1_citer;
+ };
+ u16 tcd1_doff;
+ u32 tcd1_dlast_sga;
+ union {
+ u16 tcd1_biter;
+ u16 tcd1_biter_elink;
+ };
+ u16 tcd1_csr;
+ u32 tcd2_saddr;
+ u16 tcd2_attr;
+ u16 tcd2_soff;
+ u32 tcd2_nbytes;
+ u32 tcd2_slast;
+ u32 tcd2_daddr;
+ union {
+ u16 tcd2_citer;
+ u16 tcd2_citer_elink;
+ };
+ u16 tcd2_doff;
+ u32 tcd2_dlast_sga;
+ union {
+ u16 tcd2_biter_elink;
+ u16 tcd2_biter;
+ };
+ u16 tcd2_csr;
+ u32 tcd3_saddr;
+ u16 tcd3_attr;
+ u16 tcd3_soff;
+ u32 tcd3_nbytes;
+ u32 tcd3_slast;
+ u32 tcd3_daddr;
+ union {
+ u16 tcd3_citer;
+ u16 tcd3_citer_elink;
+ };
+ u16 tcd3_doff;
+ u32 tcd3_dlast_sga;
+ union {
+ u16 tcd3_biter_elink;
+ u16 tcd3_biter;
+ };
+ u16 tcd3_csr;
+ u32 tcd4_saddr;
+ u16 tcd4_attr;
+ u16 tcd4_soff;
+ u32 tcd4_nbytes;
+ u32 tcd4_slast;
+ u32 tcd4_daddr;
+ union {
+ u16 tcd4_citer;
+ u16 tcd4_citer_elink;
+ };
+ u16 tcd4_doff;
+ u32 tcd4_dlast_sga;
+ union {
+ u16 tcd4_biter;
+ u16 tcd4_biter_elink;
+ };
+ u16 tcd4_csr;
+ u32 tcd5_saddr;
+ u16 tcd5_attr;
+ u16 tcd5_soff;
+ u32 tcd5_nbytes;
+ u32 tcd5_slast;
+ u32 tcd5_daddr;
+ union {
+ u16 tcd5_citer;
+ u16 tcd5_citer_elink;
+ };
+ u16 tcd5_doff;
+ u32 tcd5_dlast_sga;
+ union {
+ u16 tcd5_biter_elink;
+ u16 tcd5_biter;
+ };
+ u16 tcd5_csr;
+ u32 tcd6_saddr;
+ u16 tcd6_attr;
+ u16 tcd6_soff;
+ u32 tcd6_nbytes;
+ u32 tcd6_slast;
+ u32 tcd6_daddr;
+ union {
+ u16 tcd6_citer;
+ u16 tcd6_citer_elink;
+ };
+ u16 tcd6_doff;
+ u32 tcd6_dlast_sga;
+ union {
+ u16 tcd6_biter_elink;
+ u16 tcd6_biter;
+ };
+ u16 tcd6_csr;
+ u32 tcd7_saddr;
+ u16 tcd7_attr;
+ u16 tcd7_soff;
+ u32 tcd7_nbytes;
+ u32 tcd7_slast;
+ u32 tcd7_daddr;
+ union {
+ u16 tcd7_citer;
+ u16 tcd7_citer_elink;
+ };
+ u16 tcd7_doff;
+ u32 tcd7_dlast_sga;
+ union {
+ u16 tcd7_biter_elink;
+ u16 tcd7_biter;
+ };
+ u16 tcd7_csr;
+ u32 tcd8_saddr;
+ u16 tcd8_attr;
+ u16 tcd8_soff;
+ u32 tcd8_nbytes;
+ u32 tcd8_slast;
+ u32 tcd8_daddr;
+ union {
+ u16 tcd8_citer;
+ u16 tcd8_citer_elink;
+ };
+ u16 tcd8_doff;
+ u32 tcd8_dlast_sga;
+ union {
+ u16 tcd8_biter_elink;
+ u16 tcd8_biter;
+ };
+ u16 tcd8_csr;
+ u32 tcd9_saddr;
+ u16 tcd9_attr;
+ u16 tcd9_soff;
+ u32 tcd9_nbytes;
+ u32 tcd9_slast;
+ u32 tcd9_daddr;
+ union {
+ u16 tcd9_citer_elink;
+ u16 tcd9_citer;
+ };
+ u16 tcd9_doff;
+ u32 tcd9_dlast_sga;
+ union {
+ u16 tcd9_biter_elink;
+ u16 tcd9_biter;
+ };
+ u16 tcd9_csr;
+ u32 tcd10_saddr;
+ u16 tcd10_attr;
+ u16 tcd10_soff;
+ u32 tcd10_nbytes;
+ u32 tcd10_slast;
+ u32 tcd10_daddr;
+ union {
+ u16 tcd10_citer_elink;
+ u16 tcd10_citer;
+ };
+ u16 tcd10_doff;
+ u32 tcd10_dlast_sga;
+ union {
+ u16 tcd10_biter;
+ u16 tcd10_biter_elink;
+ };
+ u16 tcd10_csr;
+ u32 tcd11_saddr;
+ u16 tcd11_attr;
+ u16 tcd11_soff;
+ u32 tcd11_nbytes;
+ u32 tcd11_slast;
+ u32 tcd11_daddr;
+ union {
+ u16 tcd11_citer;
+ u16 tcd11_citer_elink;
+ };
+ u16 tcd11_doff;
+ u32 tcd11_dlast_sga;
+ union {
+ u16 tcd11_biter;
+ u16 tcd11_biter_elink;
+ };
+ u16 tcd11_csr;
+ u32 tcd12_saddr;
+ u16 tcd12_attr;
+ u16 tcd12_soff;
+ u32 tcd12_nbytes;
+ u32 tcd12_slast;
+ u32 tcd12_daddr;
+ union {
+ u16 tcd12_citer;
+ u16 tcd12_citer_elink;
+ };
+ u16 tcd12_doff;
+ u32 tcd12_dlast_sga;
+ union {
+ u16 tcd12_biter;
+ u16 tcd12_biter_elink;
+ };
+ u16 tcd12_csr;
+ u32 tcd13_saddr;
+ u16 tcd13_attr;
+ u16 tcd13_soff;
+ u32 tcd13_nbytes;
+ u32 tcd13_slast;
+ u32 tcd13_daddr;
+ union {
+ u16 tcd13_citer_elink;
+ u16 tcd13_citer;
+ };
+ u16 tcd13_doff;
+ u32 tcd13_dlast_sga;
+ union {
+ u16 tcd13_biter_elink;
+ u16 tcd13_biter;
+ };
+ u16 tcd13_csr;
+ u32 tcd14_saddr;
+ u16 tcd14_attr;
+ u16 tcd14_soff;
+ u32 tcd14_nbytes;
+ u32 tcd14_slast;
+ u32 tcd14_daddr;
+ union {
+ u16 tcd14_citer;
+ u16 tcd14_citer_elink;
+ };
+ u16 tcd14_doff;
+ u32 tcd14_dlast_sga;
+ union {
+ u16 tcd14_biter_elink;
+ u16 tcd14_biter;
+ };
+ u16 tcd14_csr;
+ u32 tcd15_saddr;
+ u16 tcd15_attr;
+ u16 tcd15_soff;
+ u32 tcd15_nbytes;
+ u32 tcd15_slast;
+ u32 tcd15_daddr;
+ union {
+ u16 tcd15_citer_elink;
+ u16 tcd15_citer;
+ };
+ u16 tcd15_doff;
+ u32 tcd15_dlast_sga;
+ union {
+ u16 tcd15_biter;
+ u16 tcd15_biter_elink;
+ };
+ u16 tcd15_csr;
+} edma_t;
+
+/*********************************************************************
+* Interrupt Controller (INTC)
+*********************************************************************/
+
+typedef struct int0_ctrl {
+ u32 iprh0; /* 0x00 Pending Register High */
+ u32 iprl0; /* 0x04 Pending Register Low */
+ u32 imrh0; /* 0x08 Mask Register High */
+ u32 imrl0; /* 0x0C Mask Register Low */
+ u32 frch0; /* 0x10 Force Register High */
+ u32 frcl0; /* 0x14 Force Register Low */
+ u16 res1; /* 0x18 - 0x19 */
+ u16 icfg0; /* 0x1A Configuration Register */
+ u8 simr0; /* 0x1C Set Interrupt Mask */
+ u8 cimr0; /* 0x1D Clear Interrupt Mask */
+ u8 clmask0; /* 0x1E Current Level Mask */
+ u8 slmask; /* 0x1F Saved Level Mask */
+ u32 res2[8]; /* 0x20 - 0x3F */
+ u8 icr0[64]; /* 0x40 - 0x7F Control registers */
+ u32 res3[24]; /* 0x80 - 0xDF */
+ u8 swiack0; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res4[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack0_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res5[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack0_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE9 - 0xEB */
+ u8 Lniack0_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xED - 0xEF */
+ u8 Lniack0_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack0_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack0_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF9 - 0xFB */
+ u8 Lniack0_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xFD - 0xFF */
+} int0_t;
+
+typedef struct int1_ctrl {
+ /* Interrupt Controller 1 */
+ u32 iprh1; /* 0x00 Pending Register High */
+ u32 iprl1; /* 0x04 Pending Register Low */
+ u32 imrh1; /* 0x08 Mask Register High */
+ u32 imrl1; /* 0x0C Mask Register Low */
+ u32 frch1; /* 0x10 Force Register High */
+ u32 frcl1; /* 0x14 Force Register Low */
+ u16 res1; /* 0x18 */
+ u16 icfg1; /* 0x1A Configuration Register */
+ u8 simr1; /* 0x1C Set Interrupt Mask */
+ u8 cimr1; /* 0x1D Clear Interrupt Mask */
+ u16 res2; /* 0x1E - 0x1F */
+ u32 res3[8]; /* 0x20 - 0x3F */
+ u8 icr1[64]; /* 0x40 - 0x7F */
+ u32 res4[24]; /* 0x80 - 0xDF */
+ u8 swiack1; /* 0xE0 Software Interrupt Acknowledge */
+ u8 res5[3]; /* 0xE1 - 0xE3 */
+ u8 Lniack1_1; /* 0xE4 Level n interrupt acknowledge resister */
+ u8 res6[3]; /* 0xE5 - 0xE7 */
+ u8 Lniack1_2; /* 0xE8 Level n interrupt acknowledge resister */
+ u8 res7[3]; /* 0xE9 - 0xEB */
+ u8 Lniack1_3; /* 0xEC Level n interrupt acknowledge resister */
+ u8 res8[3]; /* 0xED - 0xEF */
+ u8 Lniack1_4; /* 0xF0 Level n interrupt acknowledge resister */
+ u8 res9[3]; /* 0xF1 - 0xF3 */
+ u8 Lniack1_5; /* 0xF4 Level n interrupt acknowledge resister */
+ u8 resa[3]; /* 0xF5 - 0xF7 */
+ u8 Lniack1_6; /* 0xF8 Level n interrupt acknowledge resister */
+ u8 resb[3]; /* 0xF9 - 0xFB */
+ u8 Lniack1_7; /* 0xFC Level n interrupt acknowledge resister */
+ u8 resc[3]; /* 0xFD - 0xFF */
+} int1_t;
+
+/*********************************************************************
+* Global Interrupt Acknowledge (IACK)
+*********************************************************************/
+
+typedef struct iack {
+ u8 resv0[0xE0];
+ u8 gswiack;
+ u8 resv1[0x3];
+ u8 gl1iack;
+ u8 resv2[0x3];
+ u8 gl2iack;
+ u8 resv3[0x3];
+ u8 gl3iack;
+ u8 resv4[0x3];
+ u8 gl4iack;
+ u8 resv5[0x3];
+ u8 gl5iack;
+ u8 resv6[0x3];
+ u8 gl6iack;
+ u8 resv7[0x3];
+ u8 gl7iack;
+} iack_t;
+
+/*********************************************************************
+* DMA Serial Peripheral Interface (DSPI)
+*********************************************************************/
+
+typedef struct dspi {
+ u32 dmcr;
+ u8 resv0[0x4];
+ u32 dtcr;
+ u32 dctar0;
+ u32 dctar1;
+ u32 dctar2;
+ u32 dctar3;
+ u32 dctar4;
+ u32 dctar5;
+ u32 dctar6;
+ u32 dctar7;
+ u32 dsr;
+ u32 dirsr;
+ u32 dtfr;
+ u32 drfr;
+ u32 dtfdr0;
+ u32 dtfdr1;
+ u32 dtfdr2;
+ u32 dtfdr3;
+ u8 resv1[0x30];
+ u32 drfdr0;
+ u32 drfdr1;
+ u32 drfdr2;
+ u32 drfdr3;
+} dspi_t;
+
+/*********************************************************************
+* Edge Port Module (EPORT)
+*********************************************************************/
+
+typedef struct eport {
+ u16 eppar;
+ u8 epddr;
+ u8 epier;
+ u8 epdr;
+ u8 eppdr;
+ u8 epfr;
+} eport_t;
+
+/*********************************************************************
+* Watchdog Timer Modules (WTM)
+*********************************************************************/
+
+typedef struct wtm {
+ u16 wcr;
+ u16 wmr;
+ u16 wcntr;
+ u16 wsr;
+} wtm_t;
+
+/*********************************************************************
+* Serial Boot Facility (SBF)
+*********************************************************************/
+
+typedef struct sbf {
+ u8 resv0[0x18];
+ u16 sbfsr; /* Serial Boot Facility Status Register */
+ u8 resv1[0x6];
+ u16 sbfcr; /* Serial Boot Facility Control Register */
+} sbf_t;
+
+/*********************************************************************
+* Reset Controller Module (RCM)
+*********************************************************************/
+
+typedef struct rcm {
+ u8 rcr;
+ u8 rsr;
+} rcm_t;
+
+/*********************************************************************
+* Chip Configuration Module (CCM)
+*********************************************************************/
+
+typedef struct ccm {
+ u8 ccm_resv0[0x4];
+ u16 ccr; /* Chip Configuration Register (256 TEPBGA, Read-only) */
+ u8 resv1[0x2];
+ u16 rcon; /* Reset Configuration (256 TEPBGA, Read-only) */
+ u16 cir; /* Chip Identification Register (Read-only) */
+ u8 resv2[0x4];
+ u16 misccr; /* Miscellaneous Control Register */
+ u16 cdr; /* Clock Divider Register */
+ u16 uocsr; /* USB On-the-Go Controller Status Register */
+} ccm_t;
+
+/*********************************************************************
+* General Purpose I/O Module (GPIO)
+*********************************************************************/
+
+typedef struct gpio {
+ u8 podr_fec0h; /* FEC0 High Port Output Data Register */
+ u8 podr_fec0l; /* FEC0 Low Port Output Data Register */
+ u8 podr_ssi; /* SSI Port Output Data Register */
+ u8 podr_fbctl; /* Flexbus Control Port Output Data Register */
+ u8 podr_be; /* Flexbus Byte Enable Port Output Data Register */
+ u8 podr_cs; /* Flexbus Chip-Select Port Output Data Register */
+ u8 podr_dma; /* DMA Port Output Data Register */
+ u8 podr_feci2c; /* FEC1 / I2C Port Output Data Register */
+ u8 resv0[0x1];
+ u8 podr_uart; /* UART Port Output Data Register */
+ u8 podr_dspi; /* DSPI Port Output Data Register */
+ u8 podr_timer; /* Timer Port Output Data Register */
+ u8 podr_pci; /* PCI Port Output Data Register */
+ u8 podr_usb; /* USB Port Output Data Register */
+ u8 podr_atah; /* ATA High Port Output Data Register */
+ u8 podr_atal; /* ATA Low Port Output Data Register */
+ u8 podr_fec1h; /* FEC1 High Port Output Data Register */
+ u8 podr_fec1l; /* FEC1 Low Port Output Data Register */
+ u8 resv1[0x2];
+ u8 podr_fbadh; /* Flexbus AD High Port Output Data Register */
+ u8 podr_fbadmh; /* Flexbus AD Med-High Port Output Data Register */
+ u8 podr_fbadml; /* Flexbus AD Med-Low Port Output Data Register */
+ u8 podr_fbadl; /* Flexbus AD Low Port Output Data Register */
+ u8 pddr_fec0h; /* FEC0 High Port Data Direction Register */
+ u8 pddr_fec0l; /* FEC0 Low Port Data Direction Register */
+ u8 pddr_ssi; /* SSI Port Data Direction Register */
+ u8 pddr_fbctl; /* Flexbus Control Port Data Direction Register */
+ u8 pddr_be; /* Flexbus Byte Enable Port Data Direction Register */
+ u8 pddr_cs; /* Flexbus Chip-Select Port Data Direction Register */
+ u8 pddr_dma; /* DMA Port Data Direction Register */
+ u8 pddr_feci2c; /* FEC1 / I2C Port Data Direction Register */
+ u8 resv2[0x1];
+ u8 pddr_uart; /* UART Port Data Direction Register */
+ u8 pddr_dspi; /* DSPI Port Data Direction Register */
+ u8 pddr_timer; /* Timer Port Data Direction Register */
+ u8 pddr_pci; /* PCI Port Data Direction Register */
+ u8 pddr_usb; /* USB Port Data Direction Register */
+ u8 pddr_atah; /* ATA High Port Data Direction Register */
+ u8 pddr_atal; /* ATA Low Port Data Direction Register */
+ u8 pddr_fec1h; /* FEC1 High Port Data Direction Register */
+ u8 pddr_fec1l; /* FEC1 Low Port Data Direction Register */
+ u8 resv3[0x2];
+ u8 pddr_fbadh; /* Flexbus AD High Port Data Direction Register */
+ u8 pddr_fbadmh; /* Flexbus AD Med-High Port Data Direction Register */
+ u8 pddr_fbadml; /* Flexbus AD Med-Low Port Data Direction Register */
+ u8 pddr_fbadl; /* Flexbus AD Low Port Data Direction Register */
+ u8 ppdsdr_fec0h; /* FEC0 High Port Pin Data/Set Data Register */
+ u8 ppdsdr_fec0l; /* FEC0 Low Port Clear Output Data Register */
+ u8 ppdsdr_ssi; /* SSI Port Pin Data/Set Data Register */
+ u8 ppdsdr_fbctl; /* Flexbus Control Port Pin Data/Set Data Register */
+ u8 ppdsdr_be; /* Flexbus Byte Enable Port Pin Data/Set Data Register */
+ u8 ppdsdr_cs; /* Flexbus Chip-Select Port Pin Data/Set Data Register */
+ u8 ppdsdr_dma; /* DMA Port Pin Data/Set Data Register */
+ u8 ppdsdr_feci2c; /* FEC1 / I2C Port Pin Data/Set Data Register */
+ u8 resv4[0x1];
+ u8 ppdsdr_uart; /* UART Port Pin Data/Set Data Register */
+ u8 ppdsdr_dspi; /* DSPI Port Pin Data/Set Data Register */
+ u8 ppdsdr_timer; /* FTimer Port Pin Data/Set Data Register */
+ u8 ppdsdr_pci; /* PCI Port Pin Data/Set Data Register */
+ u8 ppdsdr_usb; /* USB Port Pin Data/Set Data Register */
+ u8 ppdsdr_atah; /* ATA High Port Pin Data/Set Data Register */
+ u8 ppdsdr_atal; /* ATA Low Port Pin Data/Set Data Register */
+ u8 ppdsdr_fec1h; /* FEC1 High Port Pin Data/Set Data Register */
+ u8 ppdsdr_fec1l; /* FEC1 Low Port Pin Data/Set Data Register */
+ u8 resv5[0x2];
+ u8 ppdsdr_fbadh; /* Flexbus AD High Port Pin Data/Set Data Register */
+ u8 ppdsdr_fbadmh; /* Flexbus AD Med-High Port Pin Data/Set Data Register */
+ u8 ppdsdr_fbadml; /* Flexbus AD Med-Low Port Pin Data/Set Data Register */
+ u8 ppdsdr_fbadl; /* Flexbus AD Low Port Pin Data/Set Data Register */
+ u8 pclrr_fec0h; /* FEC0 High Port Clear Output Data Register */
+ u8 pclrr_fec0l; /* FEC0 Low Port Pin Data/Set Data Register */
+ u8 pclrr_ssi; /* SSI Port Clear Output Data Register */
+ u8 pclrr_fbctl; /* Flexbus Control Port Clear Output Data Register */
+ u8 pclrr_be; /* Flexbus Byte Enable Port Clear Output Data Register */
+ u8 pclrr_cs; /* Flexbus Chip-Select Port Clear Output Data Register */
+ u8 pclrr_dma; /* DMA Port Clear Output Data Register */
+ u8 pclrr_feci2c; /* FEC1 / I2C Port Clear Output Data Register */
+ u8 resv6[0x1];
+ u8 pclrr_uart; /* UART Port Clear Output Data Register */
+ u8 pclrr_dspi; /* DSPI Port Clear Output Data Register */
+ u8 pclrr_timer; /* Timer Port Clear Output Data Register */
+ u8 pclrr_pci; /* PCI Port Clear Output Data Register */
+ u8 pclrr_usb; /* USB Port Clear Output Data Register */
+ u8 pclrr_atah; /* ATA High Port Clear Output Data Register */
+ u8 pclrr_atal; /* ATA Low Port Clear Output Data Register */
+ u8 pclrr_fec1h; /* FEC1 High Port Clear Output Data Register */
+ u8 pclrr_fec1l; /* FEC1 Low Port Clear Output Data Register */
+ u8 resv7[0x2];
+ u8 pclrr_fbadh; /* Flexbus AD High Port Clear Output Data Register */
+ u8 pclrr_fbadmh; /* Flexbus AD Med-High Port Clear Output Data Register */
+ u8 pclrr_fbadml; /* Flexbus AD Med-Low Port Clear Output Data Register */
+ u8 pclrr_fbadl; /* Flexbus AD Low Port Clear Output Data Register */
+ u8 par_fec; /* FEC Pin Assignment Register */
+ u8 par_dma; /* DMA Pin Assignment Register */
+ u8 par_fbctl; /* Flexbus Control Pin Assignment Register */
+ u8 par_dspi; /* DSPI Pin Assignment Register */
+ u8 par_be; /* Flexbus Byte-Enable Pin Assignment Register */
+ u8 par_cs; /* Flexbus Chip-Select Pin Assignment Register */
+ u8 par_timer; /* Time Pin Assignment Register */
+ u8 par_usb; /* USB Pin Assignment Register */
+ u8 resv8[0x1];
+ u8 par_uart; /* UART Pin Assignment Register */
+ u16 par_feci2c; /* FEC / I2C Pin Assignment Register */
+ u16 par_ssi; /* SSI Pin Assignment Register */
+ u16 par_ata; /* ATA Pin Assignment Register */
+ u8 par_irq; /* IRQ Pin Assignment Register */
+ u8 resv9[0x1];
+ u16 par_pci; /* PCI Pin Assignment Register */
+ u8 mscr_sdram; /* SDRAM Mode Select Control Register */
+ u8 mscr_pci; /* PCI Mode Select Control Register */
+ u8 resv10[0x2];
+ u8 dscr_i2c; /* I2C Drive Strength Control Register */
+ u8 dscr_flexbus; /* FLEXBUS Drive Strength Control Register */
+ u8 dscr_fec; /* FEC Drive Strength Control Register */
+ u8 dscr_uart; /* UART Drive Strength Control Register */
+ u8 dscr_dspi; /* DSPI Drive Strength Control Register */
+ u8 dscr_timer; /* TIMER Drive Strength Control Register */
+ u8 dscr_ssi; /* SSI Drive Strength Control Register */
+ u8 dscr_dma; /* DMA Drive Strength Control Register */
+ u8 dscr_debug; /* DEBUG Drive Strength Control Register */
+ u8 dscr_reset; /* RESET Drive Strength Control Register */
+ u8 dscr_irq; /* IRQ Drive Strength Control Register */
+ u8 dscr_usb; /* USB Drive Strength Control Register */
+ u8 dscr_ata; /* ATA Drive Strength Control Register */
+} gpio_t;
+
+/*********************************************************************
+* Random Number Generator (RNG)
+*********************************************************************/
+
+typedef struct rng {
+ u32 rngcr;
+ u32 rngsr;
+ u32 rnger;
+ u32 rngout;
+} rng_t;
+
+/*********************************************************************
+* SDRAM Controller (SDRAMC)
+*********************************************************************/
+
+typedef struct sdramc {
+ u32 sdmr; /* SDRAM Mode/Extended Mode Register */
+ u32 sdcr; /* SDRAM Control Register */
+ u32 sdcfg1; /* SDRAM Configuration Register 1 */
+ u32 sdcfg2; /* SDRAM Chip Select Register */
+ u8 resv0[0x100];
+ u32 sdcs0; /* SDRAM Mode/Extended Mode Register */
+ u32 sdcs1; /* SDRAM Mode/Extended Mode Register */
+} sdramc_t;
+
+/*********************************************************************
+* Synchronous Serial Interface (SSI)
+*********************************************************************/
+
+typedef struct ssi {
+ u32 tx0;
+ u32 tx1;
+ u32 rx0;
+ u32 rx1;
+ u32 cr;
+ u32 isr;
+ u32 ier;
+ u32 tcr;
+ u32 rcr;
+ u32 ccr;
+ u8 resv0[0x4];
+ u32 fcsr;
+ u8 resv1[0x8];
+ u32 acr;
+ u32 acadd;
+ u32 acdat;
+ u32 atag;
+ u32 tmask;
+ u32 rmask;
+} ssi_t;
+
+/*********************************************************************
+* Phase Locked Loop (PLL)
+*********************************************************************/
+
+typedef struct pll {
+ u32 pcr; /* PLL Control Register */
+ u32 psr; /* PLL Status Register */
+} pll_t;
+
+typedef struct pci {
+ u32 idr; /* 0x00 Device Id / Vendor Id Register */
+ u32 scr; /* 0x04 Status / command Register */
+ u32 ccrir; /* 0x08 Class Code / Revision Id Register */
+ u32 cr1; /* 0x0c Configuration 1 Register */
+ u32 bar0; /* 0x10 Base address register 0 Register */
+ u32 bar1; /* 0x14 Base address register 1 Register */
+ u32 bar2; /* 0x18 Base address register 2 Register */
+ u32 bar3; /* 0x1c Base address register 3 Register */
+ u32 bar4; /* 0x20 Base address register 4 Register */
+ u32 bar5; /* 0x24 Base address register 5 Register */
+ u32 ccpr; /* 0x28 Cardbus CIS Pointer Register */
+ u32 sid; /* 0x2c Subsystem ID / Subsystem Vendor ID Register */
+ u32 erbar; /* 0x30 Expansion ROM Base Address Register */
+ u32 cpr; /* 0x34 Capabilities Pointer Register */
+ u32 rsvd1; /* 0x38 */
+ u32 cr2; /* 0x3c Configuration Register 2 */
+ u32 rsvd2[8]; /* 0x40 - 0x5f */
+
+ /* General control / status registers */
+ u32 gscr; /* 0x60 Global Status / Control Register */
+ u32 tbatr0a; /* 0x64 Target Base Address Translation Register 0 */
+ u32 tbatr1a; /* 0x68 Target Base Address Translation Register 1 */
+ u32 tcr1; /* 0x6c Target Control 1 Register */
+ u32 iw0btar; /* 0x70 Initiator Window 0 Base/Translation addr */
+ u32 iw1btar; /* 0x74 Initiator Window 1 Base/Translation addr */
+ u32 iw2btar; /* 0x78 Initiator Window 2 Base/Translation addr */
+ u32 rsvd3; /* 0x7c */
+ u32 iwcr; /* 0x80 Initiator Window Configuration Register */
+ u32 icr; /* 0x84 Initiator Control Register */
+ u32 isr; /* 0x88 Initiator Status Register */
+ u32 tcr2; /* 0x8c Target Control 2 Register */
+ u32 tbatr0; /* 0x90 Target Base Address Translation Register 0 */
+ u32 tbatr1; /* 0x94 Target Base Address Translation Register 1 */
+ u32 tbatr2; /* 0x98 Target Base Address Translation Register 2 */
+ u32 tbatr3; /* 0x9c Target Base Address Translation Register 3 */
+ u32 tbatr4; /* 0xa0 Target Base Address Translation Register 4 */
+ u32 tbatr5; /* 0xa4 Target Base Address Translation Register 5 */
+ u32 intr; /* 0xa8 Interrupt Register */
+ u32 rsvd4[19]; /* 0xac - 0xf7 */
+ u32 car; /* 0xf8 Configuration Address Register */
+} pci_t;
+
+typedef struct pci_arbiter {
+ /* Pci Arbiter Registers */
+ union {
+ u32 acr; /* Arbiter Control Register */
+ u32 asr; /* Arbiter Status Register */
+ };
+} pciarb_t;
+
+/* Register read/write struct */
+typedef struct scm1 {
+ u32 mpr; /* 0x00 Master Privilege Register */
+ u32 rsvd1[7];
+ u32 pacra; /* 0x20 Peripheral Access Control Register A */
+ u32 pacrb; /* 0x24 Peripheral Access Control Register B */
+ u32 pacrc; /* 0x28 Peripheral Access Control Register C */
+ u32 pacrd; /* 0x2C Peripheral Access Control Register D */
+ u32 rsvd2[4];
+ u32 pacre; /* 0x40 Peripheral Access Control Register E */
+ u32 pacrf; /* 0x44 Peripheral Access Control Register F */
+ u32 pacrg; /* 0x48 Peripheral Access Control Register G */
+} scm1_t;
+/********************************************************************/
+
+typedef struct rtcex {
+ u32 rsvd1[3];
+ u32 gocu;
+ u32 gocl;
+} rtcex_t;
+#endif /* __IMMAP_5445X__ */
diff --git a/include/asm-m68k/io.h b/include/asm-m68k/io.h
index 7bbdefb..e14a581 100644
--- a/include/asm-m68k/io.h
+++ b/include/asm-m68k/io.h
@@ -1,8 +1,221 @@
-#ifndef __ASM_M68K_IO_H_
-#define __ASM_M68K_IO_H_
+/*
+ * IO header file
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ASM_M68K_IO_H__
+#define __ASM_M68K_IO_H__
+
+#include <asm/byteorder.h>
+
+#define readb(addr) in_8((volatile u8 *)(addr))
+#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
+#if !defined(__BIG_ENDIAN)
+#define readw(addr) (*(volatile u16 *) (addr))
+#define readl(addr) (*(volatile u32 *) (addr))
+#define writew(b,addr) ((*(volatile u16 *) (addr)) = (b))
+#define writel(b,addr) ((*(volatile u32 *) (addr)) = (b))
+#else
+#define readw(addr) in_le16((volatile u16 *)(addr))
+#define readl(addr) in_le32((volatile u32 *)(addr))
+#define writew(b,addr) out_le16((volatile u16 *)(addr),(b))
+#define writel(b,addr) out_le32((volatile u32 *)(addr),(b))
+#endif
+
+/*
+ * The insw/outsw/insl/outsl macros don't do byte-swapping.
+ * They are only used in practice for transferring buffers which
+ * are arrays of bytes, and byte-swapping is not appropriate in
+ * that case. - paulus
+ */
+#define insb(port, buf, ns) _insb((u8 *)((port)+_IO_BASE), (buf), (ns))
+#define outsb(port, buf, ns) _outsb((u8 *)((port)+_IO_BASE), (buf), (ns))
+#define insw(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define outsw(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define insl(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+#define outsl(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+
+#define inb(port) in_8((u8 *)((port)+_IO_BASE))
+#define outb(val, port) out_8((u8 *)((port)+_IO_BASE), (val))
+#if !defined(__BIG_ENDIAN)
+#define inw(port) in_be16((u16 *)((port)+_IO_BASE))
+#define outw(val, port) out_be16((u16 *)((port)+_IO_BASE), (val))
+#define inl(port) in_be32((u32 *)((port)+_IO_BASE))
+#define outl(val, port) out_be32((u32 *)((port)+_IO_BASE), (val))
+#else
+#define inw(port) in_le16((u16 *)((port)+_IO_BASE))
+#define outw(val, port) out_le16((u16 *)((port)+_IO_BASE), (val))
+#define inl(port) in_le32((u32 *)((port)+_IO_BASE))
+#define outl(val, port) out_le32((u32 *)((port)+_IO_BASE), (val))
+#endif
+
+extern inline void _insb(volatile u8 * port, void *buf, int ns)
+{
+ u8 *data = (u8 *) buf;
+ while (ns--)
+ *data++ = *port;
+}
+
+extern inline void _outsb(volatile u8 * port, const void *buf, int ns)
+{
+ u8 *data = (u8 *) buf;
+ while (ns--)
+ *port = *data++;
+}
+
+extern inline void _insw(volatile u16 * port, void *buf, int ns)
+{
+ u16 *data = (u16 *) buf;
+ while (ns--)
+ *data++ = __sw16(*port);
+}
+
+extern inline void _outsw(volatile u16 * port, const void *buf, int ns)
+{
+ u16 *data = (u16 *) buf;
+ while (ns--) {
+ *port = __sw16(*data);
+ data++;
+ }
+}
+
+extern inline void _insl(volatile u32 * port, void *buf, int nl)
+{
+ u32 *data = (u32 *) buf;
+ while (nl--)
+ *data++ = __sw32(*port);
+}
+
+extern inline void _outsl(volatile u32 * port, const void *buf, int nl)
+{
+ u32 *data = (u32 *) buf;
+ while (nl--) {
+ *port = __sw32(*data);
+ data++;
+ }
+}
+
+extern inline void _insw_ns(volatile u16 * port, void *buf, int ns)
+{
+ u16 *data = (u16 *) buf;
+ while (ns--)
+ *data++ = *port;
+}
+
+extern inline void _outsw_ns(volatile u16 * port, const void *buf, int ns)
+{
+ u16 *data = (u16 *) buf;
+ while (ns--) {
+ *port = *data++;
+ }
+}
+
+extern inline void _insl_ns(volatile u32 * port, void *buf, int nl)
+{
+ u32 *data = (u32 *) buf;
+ while (nl--)
+ *data++ = *port;
+}
+
+extern inline void _outsl_ns(volatile u32 * port, const void *buf, int nl)
+{
+ u32 *data = (u32 *) buf;
+ while (nl--) {
+ *port = *data;
+ data++;
+ }
+}
+
+/*
+ * The *_ns versions below don't do byte-swapping.
+ * Neither do the standard versions now, these are just here
+ * for older code.
+ */
+#define insw_ns(port, buf, ns) _insw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define outsw_ns(port, buf, ns) _outsw_ns((u16 *)((port)+_IO_BASE), (buf), (ns))
+#define insl_ns(port, buf, nl) _insl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+#define outsl_ns(port, buf, nl) _outsl_ns((u32 *)((port)+_IO_BASE), (buf), (nl))
+
+#define IO_SPACE_LIMIT ~0
+
+/*
+ * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
+ */
+extern inline int in_8(volatile u8 * addr)
+{
+ return (int)*addr;
+}
+
+extern inline void out_8(volatile u8 * addr, int val)
+{
+ *addr = (u8) val;
+}
+
+extern inline int in_le16(volatile u16 * addr)
+{
+ return __sw16(*addr);
+}
+
+extern inline int in_be16(volatile u16 * addr)
+{
+ return (*addr & 0xFFFF);
+}
+
+extern inline void out_le16(volatile u16 * addr, int val)
+{
+ *addr = __sw16(val);
+}
+
+extern inline void out_be16(volatile u16 * addr, int val)
+{
+ *addr = (u16) val;
+}
+
+extern inline unsigned in_le32(volatile u32 * addr)
+{
+ return __sw32(*addr);
+}
+
+extern inline unsigned in_be32(volatile u32 * addr)
+{
+ return (*addr);
+}
+
+extern inline void out_le32(volatile unsigned *addr, int val)
+{
+ *addr = __sw32(val);
+}
+
+extern inline void out_be32(volatile unsigned *addr, int val)
+{
+ *addr = val;
+}
static inline void sync(void)
{
+ /* This sync function is for PowerPC or other architecture instruction
+ * ColdFire does not have this instruction. Dummy function, added for
+ * compatibility (CFI driver)
+ */
}
-
-#endif /* __ASM_M68K_IO_H_ */
+#endif /* __ASM_M68K_IO_H__ */
diff --git a/include/asm-m68k/m5235.h b/include/asm-m68k/m5235.h
new file mode 100644
index 0000000..b98b452
--- /dev/null
+++ b/include/asm-m68k/m5235.h
@@ -0,0 +1,905 @@
+/*
+ * mcf5329.h -- Definitions for Freescale Coldfire 5329
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef mcf5235_h
+#define mcf5235_h
+/****************************************************************************/
+
+/*********************************************************************
+* System Control Module (SCM)
+*********************************************************************/
+
+/* Bit definition and macros for SCM_IPSBAR */
+#define SCM_IPSBAR_BA(x) (((x)&0x03)<<30)
+#define SCM_IPSBAR_V (0x00000001)
+
+/* Bit definition and macros for SCM_RAMBAR */
+#define SCM_RAMBAR_BA(x) (((x)&0xFFFF)<<16)
+#define SCM_RAMBAR_BDE (0x00000200)
+
+/* Bit definition and macros for SCM_CRSR */
+#define SCM_CRSR_EXT (0x80)
+
+/* Bit definitions and macros for SCM_CWCR */
+#define SCM_CWCR_CWE (0x80)
+#define SCM_CWCR_CWRI (0x40)
+#define SCM_CWCR_CWT(x) (((x)&0x07)<<3)
+#define SCM_CWCR_CWTA (0x04)
+#define SCM_CWCR_CWTAVAL (0x02)
+#define SCM_CWCR_CWTIC (0x01)
+
+/* Bit definitions and macros for SCM_LPICR */
+#define SCM_LPICR_ENBSTOP (0x80)
+#define SCM_LPICR_XLPM_IPL(x) (((x)&0x07)<<4)
+#define SCM_LPICR_XLPM_IPL_ANY (0x00)
+#define SCM_LPICR_XLPM_IPL_L2_7 (0x10)
+#define SCM_LPICR_XLPM_IPL_L3_7 (0x20)
+#define SCM_LPICR_XLPM_IPL_L4_7 (0x30)
+#define SCM_LPICR_XLPM_IPL_L5_7 (0x40)
+#define SCM_LPICR_XLPM_IPL_L6_7 (0x50)
+#define SCM_LPICR_XLPM_IPL_L7 (0x70)
+
+/* Bit definitions and macros for SCM_DMAREQC */
+#define SCM_DMAREQC_EXT(x) (((x)&0x0F)<<16)
+#define SCM_DMAREQC_EXT_ETPU (0x00080000)
+#define SCM_DMAREQC_EXT_EXTDREQ2 (0x00040000)
+#define SCM_DMAREQC_EXT_EXTDREQ1 (0x00020000)
+#define SCM_DMAREQC_EXT_EXTDREQ0 (0x00010000)
+#define SCM_DMAREQC_DMAC3(x) (((x)&0x0F)<<12)
+#define SCM_DMAREQC_DMAC2(x) (((x)&0x0F)<<8)
+#define SCM_DMAREQC_DMAC1(x) (((x)&0x0F)<<4)
+#define SCM_DMAREQC_DMAC0(x) (((x)&0x0F))
+#define SCM_DMAREQC_DMACn_DTMR0 (0x04)
+#define SCM_DMAREQC_DMACn_DTMR1 (0x05)
+#define SCM_DMAREQC_DMACn_DTMR2 (0x06)
+#define SCM_DMAREQC_DMACn_DTMR3 (0x07)
+#define SCM_DMAREQC_DMACn_UART0RX (0x08)
+#define SCM_DMAREQC_DMACn_UART1RX (0x09)
+#define SCM_DMAREQC_DMACn_UART2RX (0x0A)
+#define SCM_DMAREQC_DMACn_UART0TX (0x0C)
+#define SCM_DMAREQC_DMACn_UART1TX (0x0D)
+#define SCM_DMAREQC_DMACn_UART3TX (0x0E)
+
+/* Bit definitions and macros for SCM_MPARK */
+#define SCM_MPARK_M2_P_EN (0x02000000)
+#define SCM_MPARK_M3_PRTY_MSK (0x00C00000)
+#define SCM_MPARK_M3_PRTY_4TH (0x00000000)
+#define SCM_MPARK_M3_PRTY_3RD (0x00400000)
+#define SCM_MPARK_M3_PRTY_2ND (0x00800000)
+#define SCM_MPARK_M3_PRTY_1ST (0x00C00000)
+#define SCM_MPARK_M2_PRTY_MSK (0x00300000)
+#define SCM_MPARK_M2_PRTY_4TH (0x00000000)
+#define SCM_MPARK_M2_PRTY_3RD (0x00100000)
+#define SCM_MPARK_M2_PRTY_2ND (0x00200000)
+#define SCM_MPARK_M2_PRTY_1ST (0x00300000)
+#define SCM_MPARK_M0_PRTY_MSK (0x000C0000)
+#define SCM_MPARK_M0_PRTY_4TH (0x00000000)
+#define SCM_MPARK_M0_PRTY_3RD (0x00040000)
+#define SCM_MPARK_M0_PRTY_2ND (0x00080000)
+#define SCM_MPARK_M0_PRTY_1ST (0x000C0000)
+#define SCM_MPARK_FIXED (0x00004000)
+#define SCM_MPARK_TIMEOUT (0x00002000)
+#define SCM_MPARK_PRKLAST (0x00001000)
+#define SCM_MPARK_LCKOUT_TIME(x) (((x)&0x0F)<<8)
+
+/* Bit definitions and macros for SCM_MPR */
+#define SCM_MPR_MPR3 (0x08)
+#define SCM_MPR_MPR2 (0x04)
+#define SCM_MPR_MPR1 (0x02)
+#define SCM_MPR_MPR0 (0x01)
+
+/* Bit definitions and macros for SCM_PACRn */
+#define SCM_PACRn_LOCK1 (0x80)
+#define SCM_PACRn_ACCESSCTRL1(x) (((x)&0x07)<<4)
+#define SCM_PACRn_LOCK0 (0x08)
+#define SCM_PACRn_ACCESSCTRL0(x) (((x)&0x07))
+
+/* Bit definitions and macros for SCM_GPACR */
+#define SCM_PACRn_LOCK (0x80)
+#define SCM_PACRn_ACCESSCTRL0(x) (((x)&0x07))
+
+/*********************************************************************
+* SDRAM Controller (SDRAMC)
+*********************************************************************/
+/* Bit definitions and macros for SDRAMC_DCR */
+#define SDRAMC_DCR_NAM (0x2000)
+#define SDRAMC_DCR_COC (0x1000)
+#define SDRAMC_DCR_IS (0x0800)
+#define SDRAMC_DCR_RTIM_MASK (0x0C00)
+#define SDRAMC_DCR_RTIM_3CLKS (0x0000)
+#define SDRAMC_DCR_RTIM_6CLKS (0x0200)
+#define SDRAMC_DCR_RTIM_9CLKS (0x0400)
+#define SDRAMC_DCR_RC(x) (((x)&0xFF)<<8)
+
+/* Bit definitions and macros for SDRAMC_DARCn */
+#define SDRAMC_DARCn_BA(x) (((x)&0xFFFC)<<18)
+#define SDRAMC_DARCn_RE (0x00008000)
+#define SDRAMC_DARCn_CASL_MASK (0x00003000)
+#define SDRAMC_DARCn_CASL_C0 (0x00000000)
+#define SDRAMC_DARCn_CASL_C1 (0x00001000)
+#define SDRAMC_DARCn_CASL_C2 (0x00002000)
+#define SDRAMC_DARCn_CASL_C3 (0x00003000)
+#define SDRAMC_DARCn_CBM_MASK (0x00000700)
+#define SDRAMC_DARCn_CBM_CMD17 (0x00000000)
+#define SDRAMC_DARCn_CBM_CMD18 (0x00000100)
+#define SDRAMC_DARCn_CBM_CMD19 (0x00000200)
+#define SDRAMC_DARCn_CBM_CMD20 (0x00000300)
+#define SDRAMC_DARCn_CBM_CMD21 (0x00000400)
+#define SDRAMC_DARCn_CBM_CMD22 (0x00000500)
+#define SDRAMC_DARCn_CBM_CMD23 (0x00000600)
+#define SDRAMC_DARCn_CBM_CMD24 (0x00000700)
+#define SDRAMC_DARCn_IMRS (0x00000040)
+#define SDRAMC_DARCn_PS_MASK (0x00000030)
+#define SDRAMC_DARCn_PS_32 (0x00000000)
+#define SDRAMC_DARCn_PS_16 (0x00000010)
+#define SDRAMC_DARCn_PS_8 (0x00000020)
+#define SDRAMC_DARCn_IP (0x00000008)
+
+/* Bit definitions and macros for SDRAMC_DMRn */
+#define SDRAMC_DMRn_BAM(x) (((x)&0x3FFF)<<18)
+#define SDRAMC_DMRn_WP (0x00000100)
+#define SDRAMC_DMRn_V (0x00000001)
+
+/*********************************************************************
+* FlexBus Chip Selects (FBCS)
+*********************************************************************/
+/* Bit definitions and macros for FBCS_CSMR */
+#define FBCS_CSMR_BAM(x) (((x)&0xFFFF)<<16)
+#define FBCS_CSMR_BAM_4G (0xFFFF0000)
+#define FBCS_CSMR_BAM_2G (0x7FFF0000)
+#define FBCS_CSMR_BAM_1G (0x3FFF0000)
+#define FBCS_CSMR_BAM_1024M (0x3FFF0000)
+#define FBCS_CSMR_BAM_512M (0x1FFF0000)
+#define FBCS_CSMR_BAM_256M (0x0FFF0000)
+#define FBCS_CSMR_BAM_128M (0x07FF0000)
+#define FBCS_CSMR_BAM_64M (0x03FF0000)
+#define FBCS_CSMR_BAM_32M (0x01FF0000)
+#define FBCS_CSMR_BAM_16M (0x00FF0000)
+#define FBCS_CSMR_BAM_8M (0x007F0000)
+#define FBCS_CSMR_BAM_4M (0x003F0000)
+#define FBCS_CSMR_BAM_2M (0x001F0000)
+#define FBCS_CSMR_BAM_1M (0x000F0000)
+#define FBCS_CSMR_BAM_1024K (0x000F0000)
+#define FBCS_CSMR_BAM_512K (0x00070000)
+#define FBCS_CSMR_BAM_256K (0x00030000)
+#define FBCS_CSMR_BAM_128K (0x00010000)
+#define FBCS_CSMR_BAM_64K (0x00000000)
+#define FBCS_CSMR_WP (0x00000100)
+#define FBCS_CSMR_V (0x00000001)
+
+/* Bit definitions and macros for FBCS_CSCR */
+#define FBCS_CSCR_SRWS(x) (((x)&0x03)<<14)
+#define FBCS_CSCR_IWS(x) (((x)&0x0F)<<10)
+#define FBCS_CSCR_AA (0x0100)
+#define FBCS_CSCR_PS_MASK (0x00C0)
+#define FBCS_CSCR_PS_32 (0x0000)
+#define FBCS_CSCR_PS_16 (0x0080)
+#define FBCS_CSCR_PS_8 (0x0040)
+#define FBCS_CSCR_BEM (0x0020)
+#define FBCS_CSCR_BSTR (0x0010)
+#define FBCS_CSCR_BSTW (0x0008)
+#define FBCS_CSCR_SWWS(x) ((x)&0x07)
+
+/*********************************************************************
+* Queued Serial Peripheral Interface (QSPI)
+*********************************************************************/
+/* Bit definitions and macros for QSPI_QMR */
+#define QSPI_QMR_MSTR (0x8000)
+#define QSPI_QMR_DOHIE (0x4000)
+#define QSPI_QMR_BITS(x) (((x)&0x000F)<<10)
+#define QSPI_QMR_CPOL (0x0200)
+#define QSPI_QMR_CPHA (0x0100)
+#define QSPI_QMR_BAUD(x) ((x)&0x00FF)
+
+/* Bit definitions and macros for QSPI_QDLYR */
+#define QSPI_QDLYR_SPE (0x8000)
+#define QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8)
+#define QSPI_QDLYR_DTL(x) ((x)&0x00FF)
+
+/* Bit definitions and macros for QSPI_QWR */
+#define QSPI_QWR_HALT (0x8000)
+#define QSPI_QWR_WREN (0x4000)
+#define QSPI_QWR_WRTO (0x2000)
+#define QSPI_QWR_CSIV (0x1000)
+#define QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8)
+#define QSPI_QWR_NEWQP(x) ((x)&0x000F)
+
+/* Bit definitions and macros for QSPI_QIR */
+#define QSPI_QIR_WCEFB (0x8000)
+#define QSPI_QIR_ABRTB (0x4000)
+#define QSPI_QIR_ABRTL (0x1000)
+#define QSPI_QIR_WCEFE (0x0800)
+#define QSPI_QIR_ABRTE (0x0400)
+#define QSPI_QIR_SPIFE (0x0100)
+#define QSPI_QIR_WCEF (0x0008)
+#define QSPI_QIR_ABRT (0x0004)
+#define QSPI_QIR_SPIF (0x0001)
+
+/* Bit definitions and macros for QSPI_QAR */
+#define QSPI_QAR_ADDR(x) ((x)&0x003F)
+
+/* Bit definitions and macros for QSPI_QDR */
+#define QSPI_QDR_CONT (0x8000)
+#define QSPI_QDR_BITSE (0x4000)
+#define QSPI_QDR_DT (0x2000)
+#define QSPI_QDR_DSCK (0x1000)
+#define QSPI_QDR_QSPI_CS3 (0x0800)
+#define QSPI_QDR_QSPI_CS2 (0x0400)
+#define QSPI_QDR_QSPI_CS1 (0x0200)
+#define QSPI_QDR_QSPI_CS0 (0x0100)
+
+/*********************************************************************
+* Interrupt Controller (INTC)
+*********************************************************************/
+#define INT0_LO_RSVD0 (0)
+#define INT0_LO_EPORT1 (1)
+#define INT0_LO_EPORT2 (2)
+#define INT0_LO_EPORT3 (3)
+#define INT0_LO_EPORT4 (4)
+#define INT0_LO_EPORT5 (5)
+#define INT0_LO_EPORT6 (6)
+#define INT0_LO_EPORT7 (7)
+#define INT0_LO_SCM (8)
+#define INT0_LO_DMA0 (9)
+#define INT0_LO_DMA1 (10)
+#define INT0_LO_DMA2 (11)
+#define INT0_LO_DMA3 (12)
+#define INT0_LO_UART0 (13)
+#define INT0_LO_UART1 (14)
+#define INT0_LO_UART2 (15)
+#define INT0_LO_RSVD1 (16)
+#define INT0_LO_I2C (17)
+#define INT0_LO_QSPI (18)
+#define INT0_LO_DTMR0 (19)
+#define INT0_LO_DTMR1 (20)
+#define INT0_LO_DTMR2 (21)
+#define INT0_LO_DTMR3 (22)
+#define INT0_LO_FEC_TXF (23)
+#define INT0_LO_FEC_TXB (24)
+#define INT0_LO_FEC_UN (25)
+#define INT0_LO_FEC_RL (26)
+#define INT0_LO_FEC_RXF (27)
+#define INT0_LO_FEC_RXB (28)
+#define INT0_LO_FEC_MII (29)
+#define INT0_LO_FEC_LC (30)
+#define INT0_LO_FEC_HBERR (31)
+#define INT0_HI_FEC_GRA (32)
+#define INT0_HI_FEC_EBERR (33)
+#define INT0_HI_FEC_BABT (34)
+#define INT0_HI_FEC_BABR (35)
+#define INT0_HI_PIT0 (36)
+#define INT0_HI_PIT1 (37)
+#define INT0_HI_PIT2 (38)
+#define INT0_HI_PIT3 (39)
+#define INT0_HI_RNG (40)
+#define INT0_HI_SKHA (41)
+#define INT0_HI_MDHA (42)
+#define INT0_HI_CAN1_BUF0I (43)
+#define INT0_HI_CAN1_BUF1I (44)
+#define INT0_HI_CAN1_BUF2I (45)
+#define INT0_HI_CAN1_BUF3I (46)
+#define INT0_HI_CAN1_BUF4I (47)
+#define INT0_HI_CAN1_BUF5I (48)
+#define INT0_HI_CAN1_BUF6I (49)
+#define INT0_HI_CAN1_BUF7I (50)
+#define INT0_HI_CAN1_BUF8I (51)
+#define INT0_HI_CAN1_BUF9I (52)
+#define INT0_HI_CAN1_BUF10I (53)
+#define INT0_HI_CAN1_BUF11I (54)
+#define INT0_HI_CAN1_BUF12I (55)
+#define INT0_HI_CAN1_BUF13I (56)
+#define INT0_HI_CAN1_BUF14I (57)
+#define INT0_HI_CAN1_BUF15I (58)
+#define INT0_HI_CAN1_ERRINT (59)
+#define INT0_HI_CAN1_BOFFINT (60)
+/* 60-63 Reserved */
+
+/* 0 - 7 Reserved */
+#define INT1_LO_CAN1_BUF0I (8)
+#define INT1_LO_CAN1_BUF1I (9)
+#define INT1_LO_CAN1_BUF2I (10)
+#define INT1_LO_CAN1_BUF3I (11)
+#define INT1_LO_CAN1_BUF4I (12)
+#define INT1_LO_CAN1_BUF5I (13)
+#define INT1_LO_CAN1_BUF6I (14)
+#define INT1_LO_CAN1_BUF7I (15)
+#define INT1_LO_CAN1_BUF8I (16)
+#define INT1_LO_CAN1_BUF9I (17)
+#define INT1_LO_CAN1_BUF10I (18)
+#define INT1_LO_CAN1_BUF11I (19)
+#define INT1_LO_CAN1_BUF12I (20)
+#define INT1_LO_CAN1_BUF13I (21)
+#define INT1_LO_CAN1_BUF14I (22)
+#define INT1_LO_CAN1_BUF15I (23)
+#define INT1_LO_CAN1_ERRINT (24)
+#define INT1_LO_CAN1_BOFFINT (25)
+/* 26 Reserved */
+#define INT1_LO_ETPU_TC0F (27)
+#define INT1_LO_ETPU_TC1F (28)
+#define INT1_LO_ETPU_TC2F (29)
+#define INT1_LO_ETPU_TC3F (30)
+#define INT1_LO_ETPU_TC4F (31)
+#define INT1_HI_ETPU_TC5F (32)
+#define INT1_HI_ETPU_TC6F (33)
+#define INT1_HI_ETPU_TC7F (34)
+#define INT1_HI_ETPU_TC8F (35)
+#define INT1_HI_ETPU_TC9F (36)
+#define INT1_HI_ETPU_TC10F (37)
+#define INT1_HI_ETPU_TC11F (38)
+#define INT1_HI_ETPU_TC12F (39)
+#define INT1_HI_ETPU_TC13F (40)
+#define INT1_HI_ETPU_TC14F (41)
+#define INT1_HI_ETPU_TC15F (42)
+#define INT1_HI_ETPU_TC16F (43)
+#define INT1_HI_ETPU_TC17F (44)
+#define INT1_HI_ETPU_TC18F (45)
+#define INT1_HI_ETPU_TC19F (46)
+#define INT1_HI_ETPU_TC20F (47)
+#define INT1_HI_ETPU_TC21F (48)
+#define INT1_HI_ETPU_TC22F (49)
+#define INT1_HI_ETPU_TC23F (50)
+#define INT1_HI_ETPU_TC24F (51)
+#define INT1_HI_ETPU_TC25F (52)
+#define INT1_HI_ETPU_TC26F (53)
+#define INT1_HI_ETPU_TC27F (54)
+#define INT1_HI_ETPU_TC28F (55)
+#define INT1_HI_ETPU_TC29F (56)
+#define INT1_HI_ETPU_TC30F (57)
+#define INT1_HI_ETPU_TC31F (58)
+#define INT1_HI_ETPU_TGIF (59)
+
+/* Bit definitions and macros for INTC_IPRH */
+#define INTC_IPRH_INT63 (0x80000000)
+#define INTC_IPRH_INT62 (0x40000000)
+#define INTC_IPRH_INT61 (0x20000000)
+#define INTC_IPRH_INT60 (0x10000000)
+#define INTC_IPRH_INT59 (0x08000000)
+#define INTC_IPRH_INT58 (0x04000000)
+#define INTC_IPRH_INT57 (0x02000000)
+#define INTC_IPRH_INT56 (0x01000000)
+#define INTC_IPRH_INT55 (0x00800000)
+#define INTC_IPRH_INT54 (0x00400000)
+#define INTC_IPRH_INT53 (0x00200000)
+#define INTC_IPRH_INT52 (0x00100000)
+#define INTC_IPRH_INT51 (0x00080000)
+#define INTC_IPRH_INT50 (0x00040000)
+#define INTC_IPRH_INT49 (0x00020000)
+#define INTC_IPRH_INT48 (0x00010000)
+#define INTC_IPRH_INT47 (0x00008000)
+#define INTC_IPRH_INT46 (0x00004000)
+#define INTC_IPRH_INT45 (0x00002000)
+#define INTC_IPRH_INT44 (0x00001000)
+#define INTC_IPRH_INT43 (0x00000800)
+#define INTC_IPRH_INT42 (0x00000400)
+#define INTC_IPRH_INT41 (0x00000200)
+#define INTC_IPRH_INT40 (0x00000100)
+#define INTC_IPRH_INT39 (0x00000080)
+#define INTC_IPRH_INT38 (0x00000040)
+#define INTC_IPRH_INT37 (0x00000020)
+#define INTC_IPRH_INT36 (0x00000010)
+#define INTC_IPRH_INT35 (0x00000008)
+#define INTC_IPRH_INT34 (0x00000004)
+#define INTC_IPRH_INT33 (0x00000002)
+#define INTC_IPRH_INT32 (0x00000001)
+
+/* Bit definitions and macros for INTC_IPRL */
+#define INTC_IPRL_INT31 (0x80000000)
+#define INTC_IPRL_INT30 (0x40000000)
+#define INTC_IPRL_INT29 (0x20000000)
+#define INTC_IPRL_INT28 (0x10000000)
+#define INTC_IPRL_INT27 (0x08000000)
+#define INTC_IPRL_INT26 (0x04000000)
+#define INTC_IPRL_INT25 (0x02000000)
+#define INTC_IPRL_INT24 (0x01000000)
+#define INTC_IPRL_INT23 (0x00800000)
+#define INTC_IPRL_INT22 (0x00400000)
+#define INTC_IPRL_INT21 (0x00200000)
+#define INTC_IPRL_INT20 (0x00100000)
+#define INTC_IPRL_INT19 (0x00080000)
+#define INTC_IPRL_INT18 (0x00040000)
+#define INTC_IPRL_INT17 (0x00020000)
+#define INTC_IPRL_INT16 (0x00010000)
+#define INTC_IPRL_INT15 (0x00008000)
+#define INTC_IPRL_INT14 (0x00004000)
+#define INTC_IPRL_INT13 (0x00002000)
+#define INTC_IPRL_INT12 (0x00001000)
+#define INTC_IPRL_INT11 (0x00000800)
+#define INTC_IPRL_INT10 (0x00000400)
+#define INTC_IPRL_INT9 (0x00000200)
+#define INTC_IPRL_INT8 (0x00000100)
+#define INTC_IPRL_INT7 (0x00000080)
+#define INTC_IPRL_INT6 (0x00000040)
+#define INTC_IPRL_INT5 (0x00000020)
+#define INTC_IPRL_INT4 (0x00000010)
+#define INTC_IPRL_INT3 (0x00000008)
+#define INTC_IPRL_INT2 (0x00000004)
+#define INTC_IPRL_INT1 (0x00000002)
+#define INTC_IPRL_INT0 (0x00000001)
+
+/* Bit definitions and macros for INTC_IRLR */
+#define INTC_IRLRn(x) (((x)&0x7F)<<1)
+
+/* Bit definitions and macros for INTC_IACKLPRn */
+#define INTC_IACKLPRn_LEVEL(x) (((x)&0x07)<<4)
+#define INTC_IACKLPRn_PRI(x) ((x)&0x0F)
+
+/* Bit definitions and macros for INTC_ICRnx */
+#define INTC_ICRnx_IL(x) (((x)&0x07)<<3)
+#define INTC_ICRnx_IP(x) ((x)&0x07)
+
+/*********************************************************************
+* General Purpose I/O (GPIO)
+*********************************************************************/
+/* Bit definitions and macros for GPIO_PODR */
+#define GPIO_PODR_ADDR(x) (((x)&0x07)<<5)
+#define GPIO_PODR_ADDR_MASK (0xE0)
+#define GPIO_PODR_BS(x) ((x)&0x0F)
+#define GPIO_PODR_BS_MASK (0x0F)
+#define GPIO_PODR_CS(x) (((x)&0x7F)<<1)
+#define GPIO_PODR_CS_MASK (0xFE)
+#define GPIO_PODR_SDRAM(X) ((x)&0x3F)
+#define GPIO_PODR_SDRAM_MASK (0x3F)
+#define GPIO_PODR_FECI2C(x) GPIO_PODR_BS(x)
+#define GPIO_PODR_FECI2C_MASK GPIO_PODR_BS_MASK
+#define GPIO_PODR_UARTH(x) ((x)&0x03)
+#define GPIO_PODR_UARTH_MASK (0x03)
+#define GPIO_PODR_QSPI(x) ((x)&0x1F)
+#define GPIO_PODR_QSPI_MASK (0x1F)
+#define GPIO_PODR_ETPU(x) ((x)&0x07)
+#define GPIO_PODR_ETPU_MASK (0x07)
+
+/* Bit definitions and macros for GPIO_PDDR */
+#define GPIO_PDDR_ADDR(x) GPIO_PODR_ADDR(x)
+#define GPIO_PDDR_ADDR_MASK GPIO_PODR_ADDR_MASK
+#define GPIO_PDDR_BS(x) GPIO_PODR_BS(x)
+#define GPIO_PDDR_BS_MASK GPIO_PODR_BS_MASK
+#define GPIO_PDDR_CS(x) GPIO_PODR_CS(x)
+#define GPIO_PDDR_CS_MASK GPIO_PODR_CS_MASK
+#define GPIO_PDDR_SDRAM(X) GPIO_PODR_SDRAM(X)
+#define GPIO_PDDR_SDRAM_MASK GPIO_PODR_SDRAM_MASK
+#define GPIO_PDDR_FECI2C(x) GPIO_PDDR_BS(x)
+#define GPIO_PDDR_FECI2C_MASK GPIO_PDDR_BS_MASK
+#define GPIO_PDDR_UARTH(x) GPIO_PODR_UARTH(x)
+#define GPIO_PDDR_UARTH_MASK GPIO_PODR_UARTH_MASK
+#define GPIO_PDDR_QSPI(x) GPIO_PODR_QSPI(x)
+#define GPIO_PDDR_QSPI_MASK GPIO_PODR_QSPI_MASK
+#define GPIO_PDDR_ETPU(x) GPIO_PODR_ETPU(x)
+#define GPIO_PDDR_ETPU_MASK GPIO_PODR_ETPU_MASK
+
+/* Bit definitions and macros for GPIO_PPDSDR */
+#define GPIO_PPDSDR_ADDR(x) GPIO_PODR_ADDR(x)
+#define GPIO_PPDSDR_ADDR_MASK GPIO_PODR_ADDR_MASK
+#define GPIO_PPDSDR_BS(x) GPIO_PODR_BS(x)
+#define GPIO_PPDSDR_BS_MASK GPIO_PODR_BS_MASK
+#define GPIO_PPDSDR_CS(x) GPIO_PODR_CS(x)
+#define GPIO_PPDSDR_CS_MASK GPIO_PODR_CS_MASK
+#define GPIO_PPDSDR_SDRAM(X) GPIO_PODR_SDRAM(X)
+#define GPIO_PPDSDR_SDRAM_MASK GPIO_PODR_SDRAM_MASK
+#define GPIO_PPDSDR_FECI2C(x) GPIO_PPDSDR_BS(x)
+#define GPIO_PPDSDR_FECI2C_MASK GPIO_PPDSDR_BS_MASK
+#define GPIO_PPDSDR_UARTH(x) GPIO_PODR_UARTH(x)
+#define GPIO_PPDSDR_UARTH_MASK GPIO_PODR_UARTH_MASK
+#define GPIO_PPDSDR_QSPI(x) GPIO_PODR_QSPI(x)
+#define GPIO_PPDSDR_QSPI_MASK GPIO_PODR_QSPI_MASK
+#define GPIO_PPDSDR_ETPU(x) GPIO_PODR_ETPU(x)
+#define GPIO_PPDSDR_ETPU_MASK GPIO_PODR_ETPU_MASK
+
+/* Bit definitions and macros for GPIO_PCLRR */
+#define GPIO_PCLRR_ADDR(x) GPIO_PODR_ADDR(x)
+#define GPIO_PCLRR_ADDR_MASK GPIO_PODR_ADDR_MASK
+#define GPIO_PCLRR_BS(x) GPIO_PODR_BS(x)
+#define GPIO_PCLRR_BS_MASK GPIO_PODR_BS_MASK
+#define GPIO_PCLRR_CS(x) GPIO_PODR_CS(x)
+#define GPIO_PCLRR_CS_MASK GPIO_PODR_CS_MASK
+#define GPIO_PCLRR_SDRAM(X) GPIO_PODR_SDRAM(X)
+#define GPIO_PCLRR_SDRAM_MASK GPIO_PODR_SDRAM_MASK
+#define GPIO_PCLRR_FECI2C(x) GPIO_PCLRR_BS(x)
+#define GPIO_PCLRR_FECI2C_MASK GPIO_PCLRR_BS_MASK
+#define GPIO_PCLRR_UARTH(x) GPIO_PODR_UARTH(x)
+#define GPIO_PCLRR_UARTH_MASK GPIO_PODR_UARTH_MASK
+#define GPIO_PCLRR_QSPI(x) GPIO_PODR_QSPI(x)
+#define GPIO_PCLRR_QSPI_MASK GPIO_PODR_QSPI_MASK
+#define GPIO_PCLRR_ETPU(x) GPIO_PODR_ETPU(x)
+#define GPIO_PCLRR_ETPU_MASK GPIO_PODR_ETPU_MASK
+
+/* Bit definitions and macros for GPIO_PAR */
+#define GPIO_PAR_AD_ADDR23 (0x80)
+#define GPIO_PAR_AD_ADDR22 (0x40)
+#define GPIO_PAR_AD_ADDR21 (0x20)
+#define GPIO_PAR_AD_DATAL (0x01)
+#define GPIO_PAR_BUSCTL_OE (0x4000)
+#define GPIO_PAR_BUSCTL_TA (0x1000)
+#define GPIO_PAR_BUSCTL_TEA(x) (((x)&0x03)<<10)
+#define GPIO_PAR_BUSCTL_TEA_MASK (0x0C00)
+#define GPIO_PAR_BUSCTL_TEA_GPIO (0x0400)
+#define GPIO_PAR_BUSCTL_TEA_DREQ1 (0x0800)
+#define GPIO_PAR_BUSCTL_TEA_EXTBUS (0x0C00)
+#define GPIO_PAR_BUSCTL_RWB (0x0100)
+#define GPIO_PAR_BUSCTL_TSIZ1 (0x0040)
+#define GPIO_PAR_BUSCTL_TSIZ0 (0x0010)
+#define GPIO_PAR_BUSCTL_TS(x) (((x)&0x03)<<2)
+#define GPIO_PAR_BUSCTL_TS_MASK (0x0C)
+#define GPIO_PAR_BUSCTL_TS_GPIO (0x04)
+#define GPIO_PAR_BUSCTL_TS_DACK2 (0x08)
+#define GPIO_PAR_BUSCTL_TS_EXTBUS (0x0C)
+#define GPIO_PAR_BUSCTL_TIP(x) ((x)&0x03)
+#define GPIO_PAR_BUSCTL_TIP_MASK (0x03)
+#define GPIO_PAR_BUSCTL_TIP_GPIO (0x01)
+#define GPIO_PAR_BUSCTL_TIP_DREQ0 (0x02)
+#define GPIO_PAR_BUSCTL_TIP_EXTBUS (0x03)
+#define GPIO_PAR_BS(x) ((x)&0x0F)
+#define GPIO_PAR_BS_MASK (0x0F)
+#define GPIO_PAR_CS(x) (((x)&0x7F)<<1)
+#define GPIO_PAR_CS_MASK (0xFE)
+#define GPIO_PAR_CS_CS7 (0x80)
+#define GPIO_PAR_CS_CS6 (0x40)
+#define GPIO_PAR_CS_CS5 (0x20)
+#define GPIO_PAR_CS_CS4 (0x10)
+#define GPIO_PAR_CS_CS3 (0x08)
+#define GPIO_PAR_CS_CS2 (0x04)
+#define GPIO_PAR_CS_CS1 (0x02)
+#define GPIO_PAR_CS_SD3 GPIO_PAR_CS_CS3
+#define GPIO_PAR_CS_SD2 GPIO_PAR_CS_CS2
+#define GPIO_PAR_SDRAM_CSSDCS(x) (((x)&0x03)<<6)
+#define GPIO_PAR_SDRAM_CSSDCS_MASK (0xC0)
+#define GPIO_PAR_SDRAM_SDWE (0x20)
+#define GPIO_PAR_SDRAM_SCAS (0x10)
+#define GPIO_PAR_SDRAM_SRAS (0x08)
+#define GPIO_PAR_SDRAM_SCKE (0x04)
+#define GPIO_PAR_SDRAM_SDCS(x) ((x)&0x03)
+#define GPIO_PAR_SDRAM_SDCS_MASK (0x03)
+#define GPIO_PAR_FECI2C_EMDC(x) (((x)&0x03)<<6)
+#define GPIO_PAR_FECI2C_EMDC_MASK (0xC0)
+#define GPIO_PAR_FECI2C_EMDC_U2TXD (0x40)
+#define GPIO_PAR_FECI2C_EMDC_I2CSCL (0x80)
+#define GPIO_PAR_FECI2C_EMDC_FECEMDC (0xC0)
+#define GPIO_PAR_FECI2C_EMDIO(x) (((x)&0x03)<<4)
+#define GPIO_PAR_FECI2C_EMDIO_MASK (0x30)
+#define GPIO_PAR_FECI2C_EMDIO_U2RXD (0x10)
+#define GPIO_PAR_FECI2C_EMDIO_I2CSDA (0x20)
+#define GPIO_PAR_FECI2C_EMDIO_FECEMDIO (0x30)
+#define GPIO_PAR_FECI2C_SCL(x) (((x)&0x03)<<2)
+#define GPIO_PAR_FECI2C_SCL_MASK (0x0C)
+#define GPIO_PAR_FECI2C_SCL_CAN0RX (0x08)
+#define GPIO_PAR_FECI2C_SCL_I2CSCL (0x0C)
+#define GPIO_PAR_FECI2C_SDA(x) ((x)&0x03)
+#define GPIO_PAR_FECI2C_SDA_MASK (0x03)
+#define GPIO_PAR_FECI2C_SDA_CAN0TX (0x02)
+#define GPIO_PAR_FECI2C_SDA_I2CSDA (0x03)
+#define GPIO_PAR_UART_DREQ2 (0x8000)
+#define GPIO_PAR_UART_CAN1EN (0x4000)
+#define GPIO_PAR_UART_U2RXD (0x2000)
+#define GPIO_PAR_UART_U2TXD (0x1000)
+#define GPIO_PAR_UART_U1RXD(x) (((x)&0x03)<<10)
+#define GPIO_PAR_UART_U1RXD_MASK (0x0C00)
+#define GPIO_PAR_UART_U1RXD_CAN0RX (0x0800)
+#define GPIO_PAR_UART_U1RXD_U1RXD (0x0C00)
+#define GPIO_PAR_UART_U1TXD(x) (((x)&0x03)<<8)
+#define GPIO_PAR_UART_U1TXD_MASK (0x0300)
+#define GPIO_PAR_UART_U1TXD_CAN0TX (0x0200)
+#define GPIO_PAR_UART_U1TXD_U1TXD (0x0300)
+#define GPIO_PAR_UART_U1CTS(x) (((x)&0x03)<<6)
+#define GPIO_PAR_UART_U1CTS_MASK (0x00C0)
+#define GPIO_PAR_UART_U1CTS_U2CTS (0x0080)
+#define GPIO_PAR_UART_U1CTS_U1CTS (0x00C0)
+#define GPIO_PAR_UART_U1RTS(x) (((x)&0x03)<<4)
+#define GPIO_PAR_UART_U1RTS_MASK (0x0030)
+#define GPIO_PAR_UART_U1RTS_U2RTS (0x0020)
+#define GPIO_PAR_UART_U1RTS_U1RTS (0x0030)
+#define GPIO_PAR_UART_U0RXD (0x0008)
+#define GPIO_PAR_UART_U0TXD (0x0004)
+#define GPIO_PAR_UART_U0CTS (0x0002)
+#define GPIO_PAR_UART_U0RTS (0x0001)
+#define GPIO_PAR_QSPI_CS1(x) (((x)&0x03)<<6)
+#define GPIO_PAR_QSPI_CS1_MASK (0xC0)
+#define GPIO_PAR_QSPI_CS1_SDRAMSCKE (0x80)
+#define GPIO_PAR_QSPI_CS1_QSPICS1 (0xC0)
+#define GPIO_PAR_QSPI_CS0 (0x20)
+#define GPIO_PAR_QSPI_DIN(x) (((x)&0x03)<<3)
+#define GPIO_PAR_QSPI_DIN_MASK (0x18)
+#define GPIO_PAR_QSPI_DIN_I2CSDA (0x10)
+#define GPIO_PAR_QSPI_DIN_QSPIDIN (0x18)
+#define GPIO_PAR_QSPI_DOUT (0x04)
+#define GPIO_PAR_QSPI_SCK(x) ((x)&0x03)
+#define GPIO_PAR_QSPI_SCK_MASK (0x03)
+#define GPIO_PAR_QSPI_SCK_I2CSCL (0x02)
+#define GPIO_PAR_QSPI_SCK_QSPISCK (0x03)
+#define GPIO_PAR_DT3IN(x) (((x)&0x03)<<14)
+#define GPIO_PAR_DT3IN_MASK (0xC000)
+#define GPIO_PAR_DT3IN_QSPICS2 (0x4000)
+#define GPIO_PAR_DT3IN_U2CTS (0x8000)
+#define GPIO_PAR_DT3IN_DT3IN (0xC000)
+#define GPIO_PAR_DT2IN(x) (((x)&0x03)<<12)
+#define GPIO_PAR_DT2IN_MASK (0x3000)
+#define GPIO_PAR_DT2IN_DT2OUT (0x1000)
+#define GPIO_PAR_DT2IN_DREQ2 (0x2000)
+#define GPIO_PAR_DT2IN_DT2IN (0x3000)
+#define GPIO_PAR_DT1IN(x) (((x)&0x03)<<10)
+#define GPIO_PAR_DT1IN_MASK (0x0C00)
+#define GPIO_PAR_DT1IN_DT1OUT (0x0400)
+#define GPIO_PAR_DT1IN_DREQ1 (0x0800)
+#define GPIO_PAR_DT1IN_DT1IN (0x0C00)
+#define GPIO_PAR_DT0IN(x) (((x)&0x03)<<8)
+#define GPIO_PAR_DT0IN_MASK (0x0300)
+#define GPIO_PAR_DT0IN_DREQ0 (0x0200)
+#define GPIO_PAR_DT0IN_DT0IN (0x0300)
+#define GPIO_PAR_DT3OUT(x) (((x)&0x03)<<6)
+#define GPIO_PAR_DT3OUT_MASK (0x00C0)
+#define GPIO_PAR_DT3OUT_QSPICS3 (0x0040)
+#define GPIO_PAR_DT3OUT_U2RTS (0x0080)
+#define GPIO_PAR_DT3OUT_DT3OUT (0x00C0)
+#define GPIO_PAR_DT2OUT(x) (((x)&0x03)<<4)
+#define GPIO_PAR_DT2OUT_MASK (0x0030)
+#define GPIO_PAR_DT2OUT_DACK2 (0x0020)
+#define GPIO_PAR_DT2OUT_DT2OUT (0x0030)
+#define GPIO_PAR_DT1OUT(x) (((x)&0x03)<<2)
+#define GPIO_PAR_DT1OUT_MASK (0x000C)
+#define GPIO_PAR_DT1OUT_DACK1 (0x0008)
+#define GPIO_PAR_DT1OUT_DT1OUT (0x000C)
+#define GPIO_PAR_DT0OUT(x) ((x)&0x03)
+#define GPIO_PAR_DT0OUT_MASK (0x0003)
+#define GPIO_PAR_DT0OUT_DACK0 (0x0002)
+#define GPIO_PAR_DT0OUT_DT0OUT (0x0003)
+#define GPIO_PAR_ETPU_TCRCLK (0x04)
+#define GPIO_PAR_ETPU_UTPU_ODIS (0x02)
+#define GPIO_PAR_ETPU_LTPU_ODIS (0x01)
+
+/* Bit definitions and macros for GPIO_DSCR */
+#define GPIO_DSCR_EIM_EIM1 (0x10)
+#define GPIO_DSCR_EIM_EIM0 (0x01)
+#define GPIO_DSCR_ETPU_ETPU31_24 (0x40)
+#define GPIO_DSCR_ETPU_ETPU23_16 (0x10)
+#define GPIO_DSCR_ETPU_ETPU15_8 (0x04)
+#define GPIO_DSCR_ETPU_ETPU7_0 (0x01)
+#define GPIO_DSCR_FECI2C_FEC (0x10)
+#define GPIO_DSCR_FECI2C_I2C (0x01)
+#define GPIO_DSCR_UART_IRQ (0x40)
+#define GPIO_DSCR_UART_UART2 (0x10)
+#define GPIO_DSCR_UART_UART1 (0x04)
+#define GPIO_DSCR_UART_UART0 (0x01)
+#define GPIO_DSCR_QSPI_QSPI (0x01)
+#define GPIO_DSCR_TIMER (0x01)
+
+/*********************************************************************
+* Chip Configuration Module (CCM)
+*********************************************************************/
+/* Bit definitions and macros for CCM_RCR */
+#define CCM_RCR_SOFTRST (0x80)
+#define CCM_RCR_FRCRSTOUT (0x40)
+
+/* Bit definitions and macros for CCM_RSR */
+#define CCM_RSR_SOFT (0x20)
+#define CCM_RSR_WDR (0x10)
+#define CCM_RSR_POR (0x08)
+#define CCM_RSR_EXT (0x04)
+#define CCM_RSR_LOC (0x02)
+#define CCM_RSR_LOL (0x01)
+
+/* Bit definitions and macros for CCM_CCR */
+#define CCM_CCR_LOAD (0x8000)
+#define CCM_CCR_SZEN (0x0040)
+#define CCM_CCR_PSTEN (0x0020)
+#define CCM_CCR_BME (0x0008)
+#define CCM_CCR_BMT(x) ((x)&0x07)
+#define CCM_CCR_BMT_MASK (0x0007)
+#define CCM_CCR_BMT_64K (0x0000)
+#define CCM_CCR_BMT_32K (0x0001)
+#define CCM_CCR_BMT_16K (0x0002)
+#define CCM_CCR_BMT_8K (0x0003)
+#define CCM_CCR_BMT_4K (0x0004)
+#define CCM_CCR_BMT_2K (0x0005)
+#define CCM_CCR_BMT_1K (0x0006)
+#define CCM_CCR_BMT_512 (0x0007)
+
+/* Bit definitions and macros for CCM_RCON */
+#define CCM_RCON_RCSC(x) (((x)&0x0003)<<8)
+#define CCM_RCON_RLOAD (0x0020)
+#define CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3)
+#define CCM_RCON_BOOTPS_MASK (0x0018)
+#define CCM_RCON_BOOTPS_32 (0x0018)
+#define CCM_RCON_BOOTPS_16 (0x0008)
+#define CCM_RCON_BOOTPS_8 (0x0010)
+#define CCM_RCON_MODE (0x0001)
+
+/* Bit definitions and macros for CCM_CIR */
+#define CCM_CIR_PIN(x) (((x)&0x03FF)<<6)
+#define CCM_CIR_PRN(x) ((x)&0x003F)
+
+/*********************************************************************
+* PLL Clock Module
+*********************************************************************/
+/* Bit definitions and macros for PLL_SYNCR */
+#define PLL_SYNCR_MFD(x) (((x)&0x07)<<24)
+#define PLL_SYNCR_MFD_MASK (0x07000000)
+#define PLL_SYNCR_RFC(x) (((x)&0x07)<<19)
+#define PLL_SYNCR_RFC_MASK (0x00380000)
+#define PLL_SYNCR_LOCEN (0x00040000)
+#define PLL_SYNCR_LOLRE (0x00020000)
+#define PLL_SYNCR_LOCRE (0x00010000)
+#define PLL_SYNCR_DISCLK (0x00008000)
+#define PLL_SYNCR_LOLIRQ (0x00004000)
+#define PLL_SYNCR_LOCIRQ (0x00002000)
+#define PLL_SYNCR_RATE (0x00001000)
+#define PLL_SYNCR_DEPTH(x) (((x)&0x03)<<10)
+#define PLL_SYNCR_EXP(x) ((x)&0x03FF)
+
+/* Bit definitions and macros for PLL_SYNSR */
+#define PLL_SYNSR_LOLF (0x00000200)
+#define PLL_SYNSR_LOC (0x00000100)
+#define PLL_SYNSR_MODE (0x00000080)
+#define PLL_SYNSR_PLLSEL (0x00000040)
+#define PLL_SYNSR_PLLREF (0x00000020)
+#define PLL_SYNSR_LOCKS (0x00000010)
+#define PLL_SYNSR_LOCK (0x00000008)
+#define PLL_SYNSR_LOCF (0x00000004)
+#define PLL_SYNSR_CALDONE (0x00000002)
+#define PLL_SYNSR_CALPASS (0x00000001)
+
+/*********************************************************************
+ * Edge Port
+*********************************************************************/
+#define EPORT_EPPAR_EPPA7(x) (((x)&0x03)<<14)
+#define EPORT_EPPAR_EPPA6(x) (((x)&0x03)<<12)
+#define EPORT_EPPAR_EPPA5(x) (((x)&0x03)<<10)
+#define EPORT_EPPAR_EPPA4(x) (((x)&0x03)<<8)
+#define EPORT_EPPAR_EPPA3(x) (((x)&0x03)<<6)
+#define EPORT_EPPAR_EPPA2(x) (((x)&0x03)<<4)
+#define EPORT_EPPAR_EPPA1(x) (((x)&0x03)<<2)
+
+#define EPORT_EPDDR_EPDD7(x) EPORT_EPPAR_EPPA7(x)
+#define EPORT_EPDDR_EPDD6(x) EPORT_EPPAR_EPPA6(x)
+#define EPORT_EPDDR_EPDD5(x) EPORT_EPPAR_EPPA5(x)
+#define EPORT_EPDDR_EPDD4(x) EPORT_EPPAR_EPPA4(x)
+#define EPORT_EPDDR_EPDD3(x) EPORT_EPPAR_EPPA3(x)
+#define EPORT_EPDDR_EPDD2(x) EPORT_EPPAR_EPPA2(x)
+#define EPORT_EPDDR_EPDD1(x) EPORT_EPPAR_EPPA1(x)
+
+#define EPORT_EPIER_EPIE7 (0x80)
+#define EPORT_EPIER_EPIE6 (0x40)
+#define EPORT_EPIER_EPIE5 (0x20)
+#define EPORT_EPIER_EPIE4 (0x10)
+#define EPORT_EPIER_EPIE3 (0x08)
+#define EPORT_EPIER_EPIE2 (0x04)
+#define EPORT_EPIER_EPIE1 (0x02)
+
+#define EPORT_EPDR_EPDR7 EPORT_EPIER_EPIE7
+#define EPORT_EPDR_EPDR6 EPORT_EPIER_EPIE6
+#define EPORT_EPDR_EPDR5 EPORT_EPIER_EPIE5
+#define EPORT_EPDR_EPDR4 EPORT_EPIER_EPIE4
+#define EPORT_EPDR_EPDR3 EPORT_EPIER_EPIE3
+#define EPORT_EPDR_EPDR2 EPORT_EPIER_EPIE2
+#define EPORT_EPDR_EPDR1 EPORT_EPIER_EPIE1
+
+#define EPORT_EPPDR_EPPDR7 EPORT_EPIER_EPIE7
+#define EPORT_EPPDR_EPPDR6 EPORT_EPIER_EPIE6
+#define EPORT_EPPDR_EPPDR5 EPORT_EPIER_EPIE5
+#define EPORT_EPPDR_EPPDR4 EPORT_EPIER_EPIE4
+#define EPORT_EPPDR_EPPDR3 EPORT_EPIER_EPIE3
+#define EPORT_EPPDR_EPPDR2 EPORT_EPIER_EPIE2
+#define EPORT_EPPDR_EPPDR1 EPORT_EPIER_EPIE1
+
+/*********************************************************************
+* Watchdog Timer Modules (WTM)
+*********************************************************************/
+/* Bit definitions and macros for WTM_WCR */
+#define WTM_WCR_WAIT (0x0008)
+#define WTM_WCR_DOZE (0x0004)
+#define WTM_WCR_HALTED (0x0002)
+#define WTM_WCR_EN (0x0001)
+
+/*********************************************************************
+* FlexCAN Module (CAN)
+*********************************************************************/
+/* Bit definitions and macros for CAN_CANMCR */
+#define CANMCR_MDIS (0x80000000)
+#define CANMCR_FRZ (0x40000000)
+#define CANMCR_HALT (0x10000000)
+#define CANMCR_NORDY (0x08000000)
+#define CANMCR_SOFTRST (0x02000000)
+#define CANMCR_FRZACK (0x01000000)
+#define CANMCR_SUPV (0x00800000)
+#define CANMCR_LPMACK (0x00100000)
+#define CANMCR_MAXMB(x) (((x)&0x0F))
+
+/* Bit definitions and macros for CAN_CANCTRL */
+#define CANCTRL_PRESDIV(x) (((x)&0xFF)<<24)
+#define CANCTRL_RJW(x) (((x)&0x03)<<22)
+#define CANCTRL_PSEG1(x) (((x)&0x07)<<19)
+#define CANCTRL_PSEG2(x) (((x)&0x07)<<16)
+#define CANCTRL_BOFFMSK (0x00008000)
+#define CANCTRL_ERRMSK (0x00004000)
+#define CANCTRL_CLKSRC (0x00002000)
+#define CANCTRL_LPB (0x00001000)
+#define CANCTRL_SMP (0x00000080)
+#define CANCTRL_BOFFREC (0x00000040)
+#define CANCTRL_TSYNC (0x00000020)
+#define CANCTRL_LBUF (0x00000010)
+#define CANCTRL_LOM (0x00000008)
+#define CANCTRL_PROPSEG(x) (((x)&0x07))
+
+/* Bit definitions and macros for CAN_TIMER */
+#define TIMER_TIMER(x) ((x)&0xFFFF)
+
+/* Bit definitions and macros for CAN_RXGMASK */
+#define RXGMASK_MI(x) ((x)&0x1FFFFFFF)
+
+/* Bit definitions and macros for CAN_ERRCNT */
+#define ERRCNT_TXECTR(x) (((x)&0xFF))
+#define ERRCNT_RXECTR(x) (((x)&0xFF)<<8)
+
+/* Bit definitions and macros for CAN_ERRSTAT */
+#define ERRSTAT_BITERR1 (0x00008000)
+#define ERRSTAT_BITERR0 (0x00004000)
+#define ERRSTAT_ACKERR (0x00002000)
+#define ERRSTAT_CRCERR (0x00001000)
+#define ERRSTAT_FRMERR (0x00000800)
+#define ERRSTAT_STFERR (0x00000400)
+#define ERRSTAT_TXWRN (0x00000200)
+#define ERRSTAT_RXWRN (0x00000100)
+#define ERRSTAT_IDLE (0x00000080)
+#define ERRSTAT_TXRX (0x00000040)
+#define ERRSTAT_FLT_BUSOFF (0x00000020)
+#define ERRSTAT_FLT_PASSIVE (0x00000010)
+#define ERRSTAT_FLT_ACTIVE (0x00000000)
+#define ERRSTAT_BOFFINT (0x00000004)
+#define ERRSTAT_ERRINT (0x00000002)
+
+/* Bit definitions and macros for CAN_IMASK */
+#define IMASK_BUF15M (0x00008000)
+#define IMASK_BUF14M (0x00004000)
+#define IMASK_BUF13M (0x00002000)
+#define IMASK_BUF12M (0x00001000)
+#define IMASK_BUF11M (0x00000800)
+#define IMASK_BUF10M (0x00000400)
+#define IMASK_BUF9M (0x00000200)
+#define IMASK_BUF8M (0x00000100)
+#define IMASK_BUF7M (0x00000080)
+#define IMASK_BUF6M (0x00000040)
+#define IMASK_BUF5M (0x00000020)
+#define IMASK_BUF4M (0x00000010)
+#define IMASK_BUF3M (0x00000008)
+#define IMASK_BUF2M (0x00000004)
+#define IMASK_BUF1M (0x00000002)
+#define IMASK_BUF0M (0x00000001)
+
+/* Bit definitions and macros for CAN_IFLAG */
+#define IFLAG_BUF15I (0x00008000)
+#define IFLAG_BUF14I (0x00004000)
+#define IFLAG_BUF13I (0x00002000)
+#define IFLAG_BUF12I (0x00001000)
+#define IFLAG_BUF11I (0x00000800)
+#define IFLAG_BUF10I (0x00000400)
+#define IFLAG_BUF9I (0x00000200)
+#define IFLAG_BUF8I (0x00000100)
+#define IFLAG_BUF7I (0x00000080)
+#define IFLAG_BUF6I (0x00000040)
+#define IFLAG_BUF5I (0x00000020)
+#define IFLAG_BUF4I (0x00000010)
+#define IFLAG_BUF3I (0x00000008)
+#define IFLAG_BUF2I (0x00000004)
+#define IFLAG_BUF1I (0x00000002)
+#define IFLAG_BUF0I (0x00000001)
+
+#endif /* mcf5235_h */
diff --git a/include/asm-m68k/m5249.h b/include/asm-m68k/m5249.h
index 8c1b077..5ed3cbc 100644
--- a/include/asm-m68k/m5249.h
+++ b/include/asm-m68k/m5249.h
@@ -24,7 +24,6 @@
* MA 02111-1307 USA
*/
-
#ifndef mcf5249_h
#define mcf5249_h
/****************************************************************************/
@@ -32,22 +31,21 @@
/*
* useful definitions for reading/writing MBAR offset memory
*/
-#define mbar_readLong(x) *((volatile unsigned long *) (CFG_MBAR + x))
-#define mbar_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR + x)) = y
-#define mbar_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR + x)) = y
-#define mbar_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR + x)) = y
-#define mbar2_readLong(x) *((volatile unsigned long *) (CFG_MBAR2 + x))
-#define mbar2_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR2 + x)) = y
-#define mbar2_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR2 + x)) = y
-#define mbar2_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR2 + x)) = y
-
+#define mbar_readLong(x) *((volatile unsigned long *) (CFG_MBAR + x))
+#define mbar_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR + x)) = y
+#define mbar_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR + x)) = y
+#define mbar_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR + x)) = y
+#define mbar2_readLong(x) *((volatile unsigned long *) (CFG_MBAR2 + x))
+#define mbar2_writeLong(x,y) *((volatile unsigned long *) (CFG_MBAR2 + x)) = y
+#define mbar2_writeShort(x,y) *((volatile unsigned short *) (CFG_MBAR2 + x)) = y
+#define mbar2_writeByte(x,y) *((volatile unsigned char *) (CFG_MBAR2 + x)) = y
/*
* Size of internal RAM
*/
-#define INT_RAM_SIZE 32768 /* RAMBAR0 - 32k */
-#define INT_RAM_SIZE2 65536 /* RAMBAR1 - 64k */
+#define INT_RAM_SIZE 32768 /* RAMBAR0 - 32k */
+#define INT_RAM_SIZE2 65536 /* RAMBAR1 - 64k */
/*
* Define the 5249 SIM register set addresses.
@@ -56,51 +54,47 @@
/*****************
***** MBAR1 *****
*****************/
-#define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */
-#define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w)*/
-#define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */
-#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
-#define MCFSIM_MPARK 0x0c /* Bus master park register (r/w) */
+#define MCFSIM_RSR 0x00 /* Reset Status reg (r/w) */
+#define MCFSIM_SYPCR 0x01 /* System Protection reg (r/w) */
+#define MCFSIM_SWIVR 0x02 /* SW Watchdog intr reg (r/w) */
+#define MCFSIM_SWSR 0x03 /* SW Watchdog service (r/w) */
+#define MCFSIM_MPARK 0x0c /* Bus master park register (r/w) */
-#define MCFSIM_SIMR 0x00 /* SIM Config reg (r/w) */
-#define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */
-#define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */
-#define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */
-#define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */
-#define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */
-#define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */
-#define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */
-#define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */
-#define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */
-#define MCFSIM_ICR9 0x55 /* Intr Ctrl reg 9 (r/w) */
-#define MCFSIM_ICR10 0x56 /* Intr Ctrl reg 10 (r/w) */
-#define MCFSIM_ICR11 0x57 /* Intr Ctrl reg 11 (r/w) */
+#define MCFSIM_SIMR 0x00 /* SIM Config reg (r/w) */
+#define MCFSIM_ICR0 0x4c /* Intr Ctrl reg 0 (r/w) */
+#define MCFSIM_ICR1 0x4d /* Intr Ctrl reg 1 (r/w) */
+#define MCFSIM_ICR2 0x4e /* Intr Ctrl reg 2 (r/w) */
+#define MCFSIM_ICR3 0x4f /* Intr Ctrl reg 3 (r/w) */
+#define MCFSIM_ICR4 0x50 /* Intr Ctrl reg 4 (r/w) */
+#define MCFSIM_ICR5 0x51 /* Intr Ctrl reg 5 (r/w) */
+#define MCFSIM_ICR6 0x52 /* Intr Ctrl reg 6 (r/w) */
+#define MCFSIM_ICR7 0x53 /* Intr Ctrl reg 7 (r/w) */
+#define MCFSIM_ICR8 0x54 /* Intr Ctrl reg 8 (r/w) */
+#define MCFSIM_ICR9 0x55 /* Intr Ctrl reg 9 (r/w) */
+#define MCFSIM_ICR10 0x56 /* Intr Ctrl reg 10 (r/w) */
+#define MCFSIM_ICR11 0x57 /* Intr Ctrl reg 11 (r/w) */
-#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
-#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
+#define MCFSIM_IPR 0x40 /* Interrupt Pend reg (r/w) */
+#define MCFSIM_IMR 0x44 /* Interrupt Mask reg (r/w) */
-#define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */
-#define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */
-#define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */
-#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
-#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
-#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
-#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
-#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
-#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
-#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
-#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
-#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
+#define MCFSIM_CSAR0 0x80 /* CS 0 Address 0 reg (r/w) */
+#define MCFSIM_CSMR0 0x84 /* CS 0 Mask 0 reg (r/w) */
+#define MCFSIM_CSCR0 0x8a /* CS 0 Control reg (r/w) */
+#define MCFSIM_CSAR1 0x8c /* CS 1 Address reg (r/w) */
+#define MCFSIM_CSMR1 0x90 /* CS 1 Mask reg (r/w) */
+#define MCFSIM_CSCR1 0x96 /* CS 1 Control reg (r/w) */
+#define MCFSIM_CSAR2 0x98 /* CS 2 Address reg (r/w) */
+#define MCFSIM_CSMR2 0x9c /* CS 2 Mask reg (r/w) */
+#define MCFSIM_CSCR2 0xa2 /* CS 2 Control reg (r/w) */
+#define MCFSIM_CSAR3 0xa4 /* CS 3 Address reg (r/w) */
+#define MCFSIM_CSMR3 0xa8 /* CS 3 Mask reg (r/w) */
+#define MCFSIM_CSCR3 0xae /* CS 3 Control reg (r/w) */
-#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */
-#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */
-#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */
-#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
-#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
-
-/** UART Bases **/
-#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
-#define MCFUART_BASE2 0x200 /* Base address of UART2 */
+#define MCFSIM_DCR 0x100 /* DRAM Control reg (r/w) */
+#define MCFSIM_DACR0 0x108 /* DRAM 0 Addr and Ctrl (r/w) */
+#define MCFSIM_DMR0 0x10c /* DRAM 0 Mask reg (r/w) */
+#define MCFSIM_DACR1 0x110 /* DRAM 1 Addr and Ctrl (r/w) */
+#define MCFSIM_DMR1 0x114 /* DRAM 1 Mask reg (r/w) */
/*****************
***** MBAR2 *****
@@ -109,39 +103,39 @@
/* GPIO Addresses
* Note: These are offset from MBAR2!
*/
-#define MCFSIM_GPIO_READ 0x00 /* Read-Only access to gpio 0-31 (MBAR2) (r) */
-#define MCFSIM_GPIO_OUT 0x04 /* Output register for gpio 0-31 (MBAR2) (r/w)*/
-#define MCFSIM_GPIO_EN 0x08 /* gpio 0-31 enable (r/w)*/
-#define MCFSIM_GPIO_FUNC 0x0c /* gpio 0-31 function select (r/w) */
-#define MCFSIM_GPIO1_READ 0xb0 /* Read-Only access to gpio 32-63 (MBAR2) (r) */
-#define MCFSIM_GPIO1_OUT 0xb4 /* Output register for gpio 32-63 (MBAR2) (r/w) */
-#define MCFSIM_GPIO1_EN 0xb8 /* gpio 32-63 enable (r/w) */
-#define MCFSIM_GPIO1_FUNC 0xbc /* gpio 32-63 function select (r/w) */
+#define MCFSIM_GPIO_READ 0x00 /* Read-Only access to gpio 0-31 (MBAR2) (r) */
+#define MCFSIM_GPIO_OUT 0x04 /* Output register for gpio 0-31 (MBAR2) (r/w) */
+#define MCFSIM_GPIO_EN 0x08 /* gpio 0-31 enable (r/w) */
+#define MCFSIM_GPIO_FUNC 0x0c /* gpio 0-31 function select (r/w) */
+#define MCFSIM_GPIO1_READ 0xb0 /* Read-Only access to gpio 32-63 (MBAR2) (r) */
+#define MCFSIM_GPIO1_OUT 0xb4 /* Output register for gpio 32-63 (MBAR2) (r/w) */
+#define MCFSIM_GPIO1_EN 0xb8 /* gpio 32-63 enable (r/w) */
+#define MCFSIM_GPIO1_FUNC 0xbc /* gpio 32-63 function select (r/w) */
-#define MCFSIM_GPIO_INT_STAT 0xc0 /* Secondary Interrupt status (r) */
-#define MCFSIM_GPIO_INT_CLEAR 0xc0 /* Secondary Interrupt status (w) */
-#define MCFSIM_GPIO_INT_EN 0xc4 /* Secondary Interrupt status (r/w) */
+#define MCFSIM_GPIO_INT_STAT 0xc0 /* Secondary Interrupt status (r) */
+#define MCFSIM_GPIO_INT_CLEAR 0xc0 /* Secondary Interrupt status (w) */
+#define MCFSIM_GPIO_INT_EN 0xc4 /* Secondary Interrupt status (r/w) */
-#define MCFSIM_INT_STAT3 0xe0 /* 3rd Interrupt ctrl status (r) */
-#define MCFSIM_INT_CLEAR3 0xe0 /* 3rd Interrupt ctrl clear (w) */
-#define MCFSIM_INT_EN3 0xe4 /* 3rd Interrupt ctrl enable (r/w) */
+#define MCFSIM_INT_STAT3 0xe0 /* 3rd Interrupt ctrl status (r) */
+#define MCFSIM_INT_CLEAR3 0xe0 /* 3rd Interrupt ctrl clear (w) */
+#define MCFSIM_INT_EN3 0xe4 /* 3rd Interrupt ctrl enable (r/w) */
-#define MCFSIM_INTLEV1 0x140 /* Interrupts 0 - 7 (r/w) */
-#define MCFSIM_INTLEV2 0x144 /* Interrupts 8 -15 (r/w) */
-#define MCFSIM_INTLEV3 0x148 /* Interrupts 16-23 (r/w) */
-#define MCFSIM_INTLEV4 0x14c /* Interrupts 24-31 (r/w) */
-#define MCFSIM_INTLEV5 0x150 /* Interrupts 32-39 (r/w) */
-#define MCFSIM_INTLEV6 0x154 /* Interrupts 40-47 (r/w) */
-#define MCFSIM_INTLEV7 0x158 /* Interrupts 48-55 (r/w) */
-#define MCFSIM_INTLEV8 0x15c /* Interrupts 56-63 (r/w) */
+#define MCFSIM_INTLEV1 0x140 /* Interrupts 0 - 7 (r/w) */
+#define MCFSIM_INTLEV2 0x144 /* Interrupts 8 -15 (r/w) */
+#define MCFSIM_INTLEV3 0x148 /* Interrupts 16-23 (r/w) */
+#define MCFSIM_INTLEV4 0x14c /* Interrupts 24-31 (r/w) */
+#define MCFSIM_INTLEV5 0x150 /* Interrupts 32-39 (r/w) */
+#define MCFSIM_INTLEV6 0x154 /* Interrupts 40-47 (r/w) */
+#define MCFSIM_INTLEV7 0x158 /* Interrupts 48-55 (r/w) */
+#define MCFSIM_INTLEV8 0x15c /* Interrupts 56-63 (r/w) */
-#define MCFSIM_SPURVEC 0x167 /* Spurious Vector Register (r/w) */
-#define MCFSIM_INTBASE 0x16b /* Software interrupt base address (r/w) */
+#define MCFSIM_SPURVEC 0x167 /* Spurious Vector Register (r/w) */
+#define MCFSIM_INTBASE 0x16b /* Software interrupt base address (r/w) */
-#define MCFSIM_IDECONFIG1 0x18c /* IDE config register 1 (r/w) */
-#define MCFSIM_IDECONFIG2 0x190 /* IDE config register 1 (r/w) */
+#define MCFSIM_IDECONFIG1 0x18c /* IDE config register 1 (r/w) */
+#define MCFSIM_IDECONFIG2 0x190 /* IDE config register 1 (r/w) */
-#define MCFSIM_PLLCR 0x180 /* PLL Control register */
+#define MCFSIM_PLLCR 0x180 /* PLL Control register */
/*
* Some symbol defines for the above...
@@ -158,21 +152,20 @@
/*
* Bit definitions for the ICR family of registers.
*/
-#define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
-#define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
-#define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
-#define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
-#define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
-#define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
-#define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
-#define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
-#define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
+#define MCFSIM_ICR_AUTOVEC 0x80 /* Auto-vectored intr */
+#define MCFSIM_ICR_LEVEL0 0x00 /* Level 0 intr */
+#define MCFSIM_ICR_LEVEL1 0x04 /* Level 1 intr */
+#define MCFSIM_ICR_LEVEL2 0x08 /* Level 2 intr */
+#define MCFSIM_ICR_LEVEL3 0x0c /* Level 3 intr */
+#define MCFSIM_ICR_LEVEL4 0x10 /* Level 4 intr */
+#define MCFSIM_ICR_LEVEL5 0x14 /* Level 5 intr */
+#define MCFSIM_ICR_LEVEL6 0x18 /* Level 6 intr */
+#define MCFSIM_ICR_LEVEL7 0x1c /* Level 7 intr */
-#define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
-#define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */
-#define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */
-#define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */
-
+#define MCFSIM_ICR_PRI0 0x00 /* Priority 0 intr */
+#define MCFSIM_ICR_PRI1 0x01 /* Priority 1 intr */
+#define MCFSIM_ICR_PRI2 0x02 /* Priority 2 intr */
+#define MCFSIM_ICR_PRI3 0x03 /* Priority 3 intr */
/*
* Macros to read/set IMR register. It is 32 bits on the 5249.
@@ -184,4 +177,4 @@
#define mcf_setimr(imr) \
*((volatile unsigned long *) (MCF_MBAR + MCFSIM_IMR)) = (imr);
-#endif /* mcf5249_h */
+#endif /* mcf5249_h */
diff --git a/include/asm-m68k/m5253.h b/include/asm-m68k/m5253.h
new file mode 100644
index 0000000..eda3472
--- /dev/null
+++ b/include/asm-m68k/m5253.h
@@ -0,0 +1,73 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef m5253_h
+#define m5253_h
+/****************************************************************************/
+
+/*
+* PLL Module (PLL)
+*/
+
+/* Register read/write macros */
+#define PLL_PLLCR (0x000180)
+
+#define SIM_RSR (0x000000)
+#define SIM_SYPCR (0x000001)
+#define SIM_SWIVR (0x000002)
+#define SIM_SWSR (0x000003)
+#define SIM_MPARK (0x00000C)
+
+/* Bit definitions and macros for RSR */
+#define SIM_RSR_SWTR (0x20)
+#define SIM_RSR_HRST (0x80)
+
+/* Register read/write macros */
+#define CIM_MISCCR (0x000500)
+#define CIM_ATA_DADDR (0x000504)
+#define CIM_ATA_DCOUNT (0x000508)
+#define CIM_RTC_TIME (0x00050C)
+#define CIM_USB_CANCLK (0x000510)
+
+/* Bit definitions and macros for MISCCR */
+#define CIM_MISCCR_ADTA (0x00000001)
+#define CIM_MISCCR_ADTD (0x00000002)
+#define CIM_MISCCR_ADIE (0x00000004)
+#define CIM_MISCCR_ADIC (0x00000008)
+#define CIM_MISCCR_ADIP (0x00000010)
+#define CIM_MISCCR_CPUEND (0x00000020)
+#define CIM_MISCCR_DMAEND (0x00000040)
+#define CIM_MISCCR_RTCCLR (0x00000080)
+#define CIM_MISCCR_RTCPL (0x00000100)
+#define CIM_MISCCR_URIE (0x00000800)
+#define CIM_MISCCR_URIC (0x00001000)
+#define CIM_MISCCR_URIP (0x00002000)
+
+/* Bit definitions and macros for ATA_DADDR */
+#define CIM_ATA_DADDR_ATAADDR(x) (((x)&0x00003FFF)<<2)
+#define CIM_ATA_DADDR_RAMADDR(x) (((x)&0x00003FFF)<<18)
+
+/* Bit definitions and macros for ATA_DCOUNT */
+#define CIM_ATA_DCOUNT_COUNT(x) (((x)&0x0000FFFF))
+
+#endif /* m5253_h */
diff --git a/include/asm-m68k/m5271.h b/include/asm-m68k/m5271.h
index e0f02cf..be34398 100644
--- a/include/asm-m68k/m5271.h
+++ b/include/asm-m68k/m5271.h
@@ -25,7 +25,6 @@
* MA 02111-1307 USA
*/
-
#ifndef _MCF5271_H_
#define _MCF5271_H_
@@ -91,7 +90,7 @@
#define MCF_GPIO_PAR_UART_U1RXD_UART1 0x0C00
#define MCF_GPIO_PAR_UART_U1TXD_UART1 0x0300
-#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6)
+#define MCF_GPIO_PAR_SDRAM_PAR_CSSDCS(x) (((x)&0x03)<<6)
#define MCF_SDRAMC_DCR 0x000040
#define MCF_SDRAMC_DACR0 0x000048
@@ -117,4 +116,104 @@
#define MCFSIM_ICR1 0x000C41
-#endif /* _MCF5271_H_ */
+/*********************************************************************
+* Interrupt Controller (INTC)
+*********************************************************************/
+#define INT0_LO_RSVD0 (0)
+#define INT0_LO_EPORT1 (1)
+#define INT0_LO_EPORT2 (2)
+#define INT0_LO_EPORT3 (3)
+#define INT0_LO_EPORT4 (4)
+#define INT0_LO_EPORT5 (5)
+#define INT0_LO_EPORT6 (6)
+#define INT0_LO_EPORT7 (7)
+#define INT0_LO_SCM (8)
+#define INT0_LO_DMA0 (9)
+#define INT0_LO_DMA1 (10)
+#define INT0_LO_DMA2 (11)
+#define INT0_LO_DMA3 (12)
+#define INT0_LO_UART0 (13)
+#define INT0_LO_UART1 (14)
+#define INT0_LO_UART2 (15)
+#define INT0_LO_RSVD1 (16)
+#define INT0_LO_I2C (17)
+#define INT0_LO_QSPI (18)
+#define INT0_LO_DTMR0 (19)
+#define INT0_LO_DTMR1 (20)
+#define INT0_LO_DTMR2 (21)
+#define INT0_LO_DTMR3 (22)
+#define INT0_LO_FEC_TXF (23)
+#define INT0_LO_FEC_TXB (24)
+#define INT0_LO_FEC_UN (25)
+#define INT0_LO_FEC_RL (26)
+#define INT0_LO_FEC_RXF (27)
+#define INT0_LO_FEC_RXB (28)
+#define INT0_LO_FEC_MII (29)
+#define INT0_LO_FEC_LC (30)
+#define INT0_LO_FEC_HBERR (31)
+#define INT0_HI_FEC_GRA (32)
+#define INT0_HI_FEC_EBERR (33)
+#define INT0_HI_FEC_BABT (34)
+#define INT0_HI_FEC_BABR (35)
+#define INT0_HI_PIT0 (36)
+#define INT0_HI_PIT1 (37)
+#define INT0_HI_PIT2 (38)
+#define INT0_HI_PIT3 (39)
+#define INT0_HI_RNG (40)
+#define INT0_HI_SKHA (41)
+#define INT0_HI_MDHA (42)
+#define INT0_HI_CAN1_BUF0I (43)
+#define INT0_HI_CAN1_BUF1I (44)
+#define INT0_HI_CAN1_BUF2I (45)
+#define INT0_HI_CAN1_BUF3I (46)
+#define INT0_HI_CAN1_BUF4I (47)
+#define INT0_HI_CAN1_BUF5I (48)
+#define INT0_HI_CAN1_BUF6I (49)
+#define INT0_HI_CAN1_BUF7I (50)
+#define INT0_HI_CAN1_BUF8I (51)
+#define INT0_HI_CAN1_BUF9I (52)
+#define INT0_HI_CAN1_BUF10I (53)
+#define INT0_HI_CAN1_BUF11I (54)
+#define INT0_HI_CAN1_BUF12I (55)
+#define INT0_HI_CAN1_BUF13I (56)
+#define INT0_HI_CAN1_BUF14I (57)
+#define INT0_HI_CAN1_BUF15I (58)
+#define INT0_HI_CAN1_ERRINT (59)
+#define INT0_HI_CAN1_BOFFINT (60)
+/* 60-63 Reserved */
+
+/* Bit definitions and macros for INTC_IPRL */
+#define INTC_IPRL_INT31 (0x80000000)
+#define INTC_IPRL_INT30 (0x40000000)
+#define INTC_IPRL_INT29 (0x20000000)
+#define INTC_IPRL_INT28 (0x10000000)
+#define INTC_IPRL_INT27 (0x08000000)
+#define INTC_IPRL_INT26 (0x04000000)
+#define INTC_IPRL_INT25 (0x02000000)
+#define INTC_IPRL_INT24 (0x01000000)
+#define INTC_IPRL_INT23 (0x00800000)
+#define INTC_IPRL_INT22 (0x00400000)
+#define INTC_IPRL_INT21 (0x00200000)
+#define INTC_IPRL_INT20 (0x00100000)
+#define INTC_IPRL_INT19 (0x00080000)
+#define INTC_IPRL_INT18 (0x00040000)
+#define INTC_IPRL_INT17 (0x00020000)
+#define INTC_IPRL_INT16 (0x00010000)
+#define INTC_IPRL_INT15 (0x00008000)
+#define INTC_IPRL_INT14 (0x00004000)
+#define INTC_IPRL_INT13 (0x00002000)
+#define INTC_IPRL_INT12 (0x00001000)
+#define INTC_IPRL_INT11 (0x00000800)
+#define INTC_IPRL_INT10 (0x00000400)
+#define INTC_IPRL_INT9 (0x00000200)
+#define INTC_IPRL_INT8 (0x00000100)
+#define INTC_IPRL_INT7 (0x00000080)
+#define INTC_IPRL_INT6 (0x00000040)
+#define INTC_IPRL_INT5 (0x00000020)
+#define INTC_IPRL_INT4 (0x00000010)
+#define INTC_IPRL_INT3 (0x00000008)
+#define INTC_IPRL_INT2 (0x00000004)
+#define INTC_IPRL_INT1 (0x00000002)
+#define INTC_IPRL_INT0 (0x00000001)
+
+#endif /* _MCF5271_H_ */
diff --git a/include/asm-m68k/m5272.h b/include/asm-m68k/m5272.h
index 54d4a32..895f89d 100644
--- a/include/asm-m68k/m5272.h
+++ b/include/asm-m68k/m5272.h
@@ -24,7 +24,6 @@
* MA 02111-1307 USA
*/
-
#ifndef mcf5272_h
#define mcf5272_h
/****************************************************************************/
@@ -35,65 +34,173 @@
#define INT_RAM_SIZE 4096
+#define GPIO_PACNT_PA15MSK (0xC0000000)
+#define GPIO_PACNT_DGNT1 (0x40000000)
+#define GPIO_PACNT_PA14MSK (0x30000000)
+#define GPIO_PACNT_DREQ1 (0x10000000)
+#define GPIO_PACNT_PA13MSK (0x0C000000)
+#define GPIO_PACNT_DFSC3 (0x04000000)
+#define GPIO_PACNT_PA12MSK (0x03000000)
+#define GPIO_PACNT_DFSC2 (0x01000000)
+#define GPIO_PACNT_PA11MSK (0x00C00000)
+#define GPIO_PACNT_QSPI_CS1 (0x00800000)
+#define GPIO_PACNT_PA10MSK (0x00300000)
+#define GPIO_PACNT_DREQ0 (0x00100000)
+#define GPIO_PACNT_PA9MSK (0x000C0000)
+#define GPIO_PACNT_DGNT0 (0x00040000)
+#define GPIO_PACNT_PA8MSK (0x00030000)
+#define GPIO_PACNT_FSC0 (0x00010000)
+#define GPIO_PACNT_FSR0 (0x00010000)
+#define GPIO_PACNT_PA7MSK (0x0000C000)
+#define GPIO_PACNT_DOUT3 (0x00008000)
+#define GPIO_PACNT_QSPI_CS3 (0x00004000)
+#define GPIO_PACNT_PA6MSK (0x00003000)
+#define GPIO_PACNT_USB_RXD (0x00001000)
+#define GPIO_PACNT_PA5MSK (0x00000C00)
+#define GPIO_PACNT_USB_TXEN (0x00000400)
+#define GPIO_PACNT_PA4MSK (0x00000300)
+#define GPIO_PACNT_USB_SUSP (0x00000100)
+#define GPIO_PACNT_PA3MSK (0x000000C0)
+#define GPIO_PACNT_USB_TN (0x00000040)
+#define GPIO_PACNT_PA2MSK (0x00000030)
+#define GPIO_PACNT_USB_RN (0x00000010)
+#define GPIO_PACNT_PA1MSK (0x0000000C)
+#define GPIO_PACNT_USB_RP (0x00000004)
+#define GPIO_PACNT_PA0MSK (0x00000003)
+#define GPIO_PACNT_USB_TP (0x00000001)
-/*
- * Define the 5272 SIM register set addresses.
- */
-#define MCFSIM_SCR 0x04 /* SIM Config reg (r/w) */
-#define MCFSIM_SPR 0x06 /* System Protection reg (r/w)*/
-#define MCFSIM_PMR 0x08 /* Power Management reg (r/w) */
-#define MCFSIM_APMR 0x0e /* Active Low Power reg (r/w) */
-#define MCFSIM_DIR 0x10 /* Device Identity reg (r/w) */
+#define GPIO_PBCNT_PB15MSK (0xC0000000)
+#define GPIO_PBCNT_E_MDC (0x40000000)
+#define GPIO_PBCNT_PB14MSK (0x30000000)
+#define GPIO_PBCNT_E_RXER (0x10000000)
+#define GPIO_PBCNT_PB13MSK (0x0C000000)
+#define GPIO_PBCNT_E_RXD1 (0x04000000)
+#define GPIO_PBCNT_PB12MSK (0x03000000)
+#define GPIO_PBCNT_E_RXD2 (0x01000000)
+#define GPIO_PBCNT_PB11MSK (0x00C00000)
+#define GPIO_PBCNT_E_RXD3 (0x00400000)
+#define GPIO_PBCNT_PB10MSK (0x00300000)
+#define GPIO_PBCNT_E_TXD1 (0x00100000)
+#define GPIO_PBCNT_PB9MSK (0x000C0000)
+#define GPIO_PBCNT_E_TXD2 (0x00040000)
+#define GPIO_PBCNT_PB8MSK (0x00030000)
+#define GPIO_PBCNT_E_TXD3 (0x00010000)
+#define GPIO_PBCNT_PB7MSK (0x0000C000)
+#define GPIO_PBCNT_TOUT0 (0x00004000)
+#define GPIO_PBCNT_PB6MSK (0x00003000)
+#define GPIO_PBCNT_TA (0x00001000)
+#define GPIO_PBCNT_PB4MSK (0x00000300)
+#define GPIO_PBCNT_URT0_CLK (0x00000100)
+#define GPIO_PBCNT_PB3MSK (0x000000C0)
+#define GPIO_PBCNT_URT0_RTS (0x00000040)
+#define GPIO_PBCNT_PB2MSK (0x00000030)
+#define GPIO_PBCNT_URT0_CTS (0x00000010)
+#define GPIO_PBCNT_PB1MSK (0x0000000C)
+#define GPIO_PBCNT_URT0_RXD (0x00000004)
+#define GPIO_PBCNT_URT0_TIN2 (0x00000004)
+#define GPIO_PBCNT_PB0MSK (0x00000003)
+#define GPIO_PBCNT_URT0_TXD (0x00000001)
-#define MCFSIM_ICR1 0x20 /* Intr Ctrl reg 1 (r/w) */
-#define MCFSIM_ICR2 0x24 /* Intr Ctrl reg 2 (r/w) */
-#define MCFSIM_ICR3 0x28 /* Intr Ctrl reg 3 (r/w) */
-#define MCFSIM_ICR4 0x2c /* Intr Ctrl reg 4 (r/w) */
+#define GPIO_PDCNT_PD7MSK (0x0000C000)
+#define GPIO_PDCNT_TIN1 (0x00008000)
+#define GPIO_PDCNT_PWM_OUT2 (0x00004000)
+#define GPIO_PDCNT_PD6MSK (0x00003000)
+#define GPIO_PDCNT_TOUT1 (0x00002000)
+#define GPIO_PDCNT_PWM_OUT1 (0x00001000)
+#define GPIO_PDCNT_PD5MSK (0x00000C00)
+#define GPIO_PDCNT_INT4 (0x00000C00)
+#define GPIO_PDCNT_DIN3 (0x00000800)
+#define GPIO_PDCNT_PD4MSK (0x00000300)
+#define GPIO_PDCNT_URT1_TXD (0x00000200)
+#define GPIO_PDCNT_DOUT0 (0x00000100)
+#define GPIO_PDCNT_PD3MSK (0x000000C0)
+#define GPIO_PDCNT_INT5 (0x000000C0)
+#define GPIO_PDCNT_URT1_RTS (0x00000080)
+#define GPIO_PDCNT_PD2MSK (0x00000030)
+#define GPIO_PDCNT_QSPI_CS2 (0x00000030)
+#define GPIO_PDCNT_URT1_CTS (0x00000020)
+#define GPIO_PDCNT_PD1MSK (0x0000000C)
+#define GPIO_PDCNT_URT1_RXD (0x00000008)
+#define GPIO_PDCNT_URT1_TIN3 (0x00000008)
+#define GPIO_PDCNT_DIN0 (0x00000004)
+#define GPIO_PDCNT_PD0MSK (0x00000003)
+#define GPIO_PDCNT_URT1_CLK (0x00000002)
+#define GPIO_PDCNT_DCL0 (0x00000001)
-#define MCFSIM_ISR 0x30 /* Interrupt Source reg (r/w) */
-#define MCFSIM_PITR 0x34 /* Interrupt Transition (r/w) */
-#define MCFSIM_PIWR 0x38 /* Interrupt Wakeup reg (r/w) */
-#define MCFSIM_PIVR 0x3f /* Interrupt Vector reg (r/w( */
+#define INT_RSVD0 (0)
+#define INT_INT1 (1)
+#define INT_INT2 (2)
+#define INT_INT3 (3)
+#define INT_INT4 (4)
+#define INT_TMR0 (5)
+#define INT_TMR1 (6)
+#define INT_TMR2 (7)
+#define INT_TMR3 (8)
+#define INT_UART1 (9)
+#define INT_UART2 (10)
+#define INT_PLIP (11)
+#define INT_PLIA (12)
+#define INT_USB0 (13)
+#define INT_USB1 (14)
+#define INT_USB2 (15)
+#define INT_USB3 (16)
+#define INT_USB4 (17)
+#define INT_USB5 (18)
+#define INT_USB6 (19)
+#define INT_USB7 (20)
+#define INT_DMA (21)
+#define INT_ERX (22)
+#define INT_ETX (23)
+#define INT_ENTC (24)
+#define INT_QSPI (25)
+#define INT_INT5 (26)
+#define INT_INT6 (27)
+#define INT_SWTO (28)
-#define MCFSIM_WRRR 0x280 /* Watchdog reference (r/w) */
-#define MCFSIM_WIRR 0x284 /* Watchdog interrupt (r/w) */
-#define MCFSIM_WCR 0x288 /* Watchdog counter (r/w) */
-#define MCFSIM_WER 0x28c /* Watchdog event (r/w) */
+#define INT_ICR1_TMR0MASK (0x000F000)
+#define INT_ICR1_TMR0PI (0x0008000)
+#define INT_ICR1_TMR0IPL(x) (((x)&0x7)<<12)
+#define INT_ICR1_TMR1MASK (0x0000F00)
+#define INT_ICR1_TMR1PI (0x0000800)
+#define INT_ICR1_TMR1IPL(x) (((x)&0x7)<<8)
+#define INT_ICR1_TMR2MASK (0x00000F0)
+#define INT_ICR1_TMR2PI (0x0000080)
+#define INT_ICR1_TMR2IPL(x) (((x)&0x7)<<4)
+#define INT_ICR1_TMR3MASK (0x000000F)
+#define INT_ICR1_TMR3PI (0x0000008)
+#define INT_ICR1_TMR3IPL(x) (((x)&0x7))
-#define MCFSIM_CSBR0 0x40 /* CS0 Base Address (r/w) */
-#define MCFSIM_CSOR0 0x44 /* CS0 Option (r/w) */
-#define MCFSIM_CSBR1 0x48 /* CS1 Base Address (r/w) */
-#define MCFSIM_CSOR1 0x4c /* CS1 Option (r/w) */
-#define MCFSIM_CSBR2 0x50 /* CS2 Base Address (r/w) */
-#define MCFSIM_CSOR2 0x54 /* CS2 Option (r/w) */
-#define MCFSIM_CSBR3 0x58 /* CS3 Base Address (r/w) */
-#define MCFSIM_CSOR3 0x5c /* CS3 Option (r/w) */
-#define MCFSIM_CSBR4 0x60 /* CS4 Base Address (r/w) */
-#define MCFSIM_CSOR4 0x64 /* CS4 Option (r/w) */
-#define MCFSIM_CSBR5 0x68 /* CS5 Base Address (r/w) */
-#define MCFSIM_CSOR5 0x6c /* CS5 Option (r/w) */
-#define MCFSIM_CSBR6 0x70 /* CS6 Base Address (r/w) */
-#define MCFSIM_CSOR6 0x74 /* CS6 Option (r/w) */
-#define MCFSIM_CSBR7 0x78 /* CS7 Base Address (r/w) */
-#define MCFSIM_CSOR7 0x7c /* CS7 Option (r/w) */
+#define INT_ISR_INT31 (0x80000000)
+#define INT_ISR_INT30 (0x40000000)
+#define INT_ISR_INT29 (0x20000000)
+#define INT_ISR_INT28 (0x10000000)
+#define INT_ISR_INT27 (0x08000000)
+#define INT_ISR_INT26 (0x04000000)
+#define INT_ISR_INT25 (0x02000000)
+#define INT_ISR_INT24 (0x01000000)
+#define INT_ISR_INT23 (0x00800000)
+#define INT_ISR_INT22 (0x00400000)
+#define INT_ISR_INT21 (0x00200000)
+#define INT_ISR_INT20 (0x00100000)
+#define INT_ISR_INT19 (0x00080000)
+#define INT_ISR_INT18 (0x00040000)
+#define INT_ISR_INT17 (0x00020000)
+#define INT_ISR_INT16 (0x00010000)
+#define INT_ISR_INT15 (0x00008000)
+#define INT_ISR_INT14 (0x00004000)
+#define INT_ISR_INT13 (0x00002000)
+#define INT_ISR_INT12 (0x00001000)
+#define INT_ISR_INT11 (0x00000800)
+#define INT_ISR_INT10 (0x00000400)
+#define INT_ISR_INT9 (0x00000200)
+#define INT_ISR_INT8 (0x00000100)
+#define INT_ISR_INT7 (0x00000080)
+#define INT_ISR_INT6 (0x00000040)
+#define INT_ISR_INT5 (0x00000020)
+#define INT_ISR_INT4 (0x00000010)
+#define INT_ISR_INT3 (0x00000008)
+#define INT_ISR_INT2 (0x00000004)
+#define INT_ISR_INT1 (0x00000002)
+#define INT_ISR_INT0 (0x00000001)
-#define MCFSIM_SDCR 0x180 /* SDRAM Configuration (r/w) */
-#define MCFSIM_SDTR 0x184 /* SDRAM Timing (r/w) */
-#define MCFSIM_DCAR0 0x4c /* DRAM 0 Address reg(r/w) */
-#define MCFSIM_DCMR0 0x50 /* DRAM 0 Mask reg (r/w) */
-#define MCFSIM_DCCR0 0x57 /* DRAM 0 Control reg (r/w) */
-#define MCFSIM_DCAR1 0x58 /* DRAM 1 Address reg (r/w) */
-#define MCFSIM_DCMR1 0x5c /* DRAM 1 Mask reg (r/w) */
-#define MCFSIM_DCCR1 0x63 /* DRAM 1 Control reg (r/w) */
-
-#define MCFSIM_PACNT 0x80 /* Port A Control (r/w) */
-#define MCFSIM_PADDR 0x84 /* Port A Direction (r/w) */
-#define MCFSIM_PADAT 0x86 /* Port A Data (r/w) */
-#define MCFSIM_PBCNT 0x88 /* Port B Control (r/w) */
-#define MCFSIM_PBDDR 0x8c /* Port B Direction (r/w) */
-#define MCFSIM_PBDAT 0x8e /* Port B Data (r/w) */
-#define MCFSIM_PCDDR 0x94 /* Port C Direction (r/w) */
-#define MCFSIM_PCDAT 0x96 /* Port C Data (r/w) */
-#define MCFSIM_PDCNT 0x98 /* Port D Control (r/w) */
-
-#endif /* mcf5272_h */
+#endif /* mcf5272_h */
diff --git a/include/asm-m68k/m5282.h b/include/asm-m68k/m5282.h
index e5058a4..7473bb9 100644
--- a/include/asm-m68k/m5282.h
+++ b/include/asm-m68k/m5282.h
@@ -23,7 +23,99 @@
/****************************************************************************/
#ifndef m5282_h
#define m5282_h
-/****************************************************************************/
+
+/*********************************************************************
+* PLL Clock Module
+*********************************************************************/
+/* Bit definitions and macros for PLL_SYNCR */
+#define PLL_SYNCR_LOLRE (0x8000)
+#define PLL_SYNCR_MFD2 (0x4000)
+#define PLL_SYNCR_MFD1 (0x2000)
+#define PLL_SYNCR_MFD0 (0x1000)
+#define PLL_SYNCR_LOCRE (0x0800)
+#define PLL_SYNCR_RFC2 (0x0400)
+#define PLL_SYNCR_RFC1 (0x0200)
+#define PLL_SYNCR_RFC0 (0x0100)
+#define PLL_SYNCR_LOCEN (0x0080)
+#define PLL_SYNCR_DISCLK (0x0040)
+#define PLL_SYNCR_FWKUP (0x0020)
+#define PLL_SYNCR_STPMD1 (0x0008)
+#define PLL_SYNCR_STPMD0 (0x0004)
+
+/* Bit definitions and macros for PLL_SYNSR */
+#define PLL_SYNSR_MODE (0x0080)
+#define PLL_SYNSR_PLLSEL (0x0040)
+#define PLL_SYNSR_PLLREF (0x0020)
+#define PLL_SYNSR_LOCKS (0x0010)
+#define PLL_SYNSR_LOCK (0x0008)
+#define PLL_SYNSR_LOCS (0x0004)
+
+/*********************************************************************
+* Interrupt Controller (INTC)
+*********************************************************************/
+#define INT0_LO_RSVD0 (0)
+#define INT0_LO_EPORT1 (1)
+#define INT0_LO_EPORT2 (2)
+#define INT0_LO_EPORT3 (3)
+#define INT0_LO_EPORT4 (4)
+#define INT0_LO_EPORT5 (5)
+#define INT0_LO_EPORT6 (6)
+#define INT0_LO_EPORT7 (7)
+#define INT0_LO_SCM_SWT1 (8)
+#define INT0_LO_DMA_00 (9)
+#define INT0_LO_DMA_01 (10)
+#define INT0_LO_DMA_02 (11)
+#define INT0_LO_DMA_03 (12)
+#define INT0_LO_UART0 (13)
+#define INT0_LO_UART1 (14)
+#define INT0_LO_UART2 (15)
+#define INT0_LO_RSVD1 (16)
+#define INT0_LO_I2C (17)
+#define INT0_LO_QSPI (18)
+#define INT0_LO_DTMR0 (19)
+#define INT0_LO_DTMR1 (20)
+#define INT0_LO_DTMR2 (21)
+#define INT0_LO_DTMR3 (22)
+#define INT0_LO_FEC_TXF (23)
+#define INT0_LO_FEC_TXB (24)
+#define INT0_LO_FEC_UN (25)
+#define INT0_LO_FEC_RL (26)
+#define INT0_LO_FEC_RXF (27)
+#define INT0_LO_FEC_RXB (28)
+#define INT0_LO_FEC_MII (29)
+#define INT0_LO_FEC_LC (30)
+#define INT0_LO_FEC_HBERR (31)
+#define INT0_HI_FEC_GRA (32)
+#define INT0_HI_FEC_EBERR (33)
+#define INT0_HI_FEC_BABT (34)
+#define INT0_HI_FEC_BABR (35)
+#define INT0_HI_PMM_LVDF (36)
+#define INT0_HI_QADC_CF1 (37)
+#define INT0_HI_QADC_CF2 (38)
+#define INT0_HI_QADC_PF1 (39)
+#define INT0_HI_QADC_PF2 (40)
+#define INT0_HI_GPTA_TOF (41)
+#define INT0_HI_GPTA_PAIF (42)
+#define INT0_HI_GPTA_PAOVF (43)
+#define INT0_HI_GPTA_C0F (44)
+#define INT0_HI_GPTA_C1F (45)
+#define INT0_HI_GPTA_C2F (46)
+#define INT0_HI_GPTA_C3F (47)
+#define INT0_HI_GPTB_TOF (48)
+#define INT0_HI_GPTB_PAIF (49)
+#define INT0_HI_GPTB_PAOVF (50)
+#define INT0_HI_GPTB_C0F (51)
+#define INT0_HI_GPTB_C1F (52)
+#define INT0_HI_GPTB_C2F (53)
+#define INT0_HI_GPTB_C3F (54)
+#define INT0_HI_PIT0 (55)
+#define INT0_HI_PIT1 (56)
+#define INT0_HI_PIT2 (57)
+#define INT0_HI_PIT3 (58)
+#define INT0_HI_CFM_CBEIF (59)
+#define INT0_HI_CFM_CCIF (60)
+#define INT0_HI_CFM_PVIF (61)
+#define INT0_HI_CFM_AEIF (62)
/*
* Size of internal RAM
@@ -96,49 +188,49 @@
#define MCFGPIO_SETD (*(vu_char *) (CFG_MBAR+0x10002B))
#define MCFGPIO_SETE (*(vu_char *) (CFG_MBAR+0x10002C))
#define MCFGPIO_SETF (*(vu_char *) (CFG_MBAR+0x10002D))
-#define MCFGPIO_SETG (*(vu_char *) (CFG_MBAR+0x10002E))
-#define MCFGPIO_SETH (*(vu_char *) (CFG_MBAR+0x10002F))
-#define MCFGPIO_SETJ (*(vu_char *) (CFG_MBAR+0x100030))
-#define MCFGPIO_SETDD (*(vu_char *) (CFG_MBAR+0x100031))
-#define MCFGPIO_SETEH (*(vu_char *) (CFG_MBAR+0x100032))
-#define MCFGPIO_SETEL (*(vu_char *) (CFG_MBAR+0x100033))
-#define MCFGPIO_SETAS (*(vu_char *) (CFG_MBAR+0x100034))
-#define MCFGPIO_SETQS (*(vu_char *) (CFG_MBAR+0x100035))
-#define MCFGPIO_SETSD (*(vu_char *) (CFG_MBAR+0x100036))
-#define MCFGPIO_SETTC (*(vu_char *) (CFG_MBAR+0x100037))
-#define MCFGPIO_SETTD (*(vu_char *) (CFG_MBAR+0x100038))
-#define MCFGPIO_SETUA (*(vu_char *) (CFG_MBAR+0x100039))
+#define MCFGPIO_SETG (*(vu_char *) (CFG_MBAR+0x10002E))
+#define MCFGPIO_SETH (*(vu_char *) (CFG_MBAR+0x10002F))
+#define MCFGPIO_SETJ (*(vu_char *) (CFG_MBAR+0x100030))
+#define MCFGPIO_SETDD (*(vu_char *) (CFG_MBAR+0x100031))
+#define MCFGPIO_SETEH (*(vu_char *) (CFG_MBAR+0x100032))
+#define MCFGPIO_SETEL (*(vu_char *) (CFG_MBAR+0x100033))
+#define MCFGPIO_SETAS (*(vu_char *) (CFG_MBAR+0x100034))
+#define MCFGPIO_SETQS (*(vu_char *) (CFG_MBAR+0x100035))
+#define MCFGPIO_SETSD (*(vu_char *) (CFG_MBAR+0x100036))
+#define MCFGPIO_SETTC (*(vu_char *) (CFG_MBAR+0x100037))
+#define MCFGPIO_SETTD (*(vu_char *) (CFG_MBAR+0x100038))
+#define MCFGPIO_SETUA (*(vu_char *) (CFG_MBAR+0x100039))
-#define MCFGPIO_CLRA (*(vu_char *) (CFG_MBAR+0x10003C))
-#define MCFGPIO_CLRB (*(vu_char *) (CFG_MBAR+0x10003D))
-#define MCFGPIO_CLRC (*(vu_char *) (CFG_MBAR+0x10003E))
-#define MCFGPIO_CLRD (*(vu_char *) (CFG_MBAR+0x10003F))
-#define MCFGPIO_CLRE (*(vu_char *) (CFG_MBAR+0x100040))
-#define MCFGPIO_CLRF (*(vu_char *) (CFG_MBAR+0x100041))
-#define MCFGPIO_CLRG (*(vu_char *) (CFG_MBAR+0x100042))
-#define MCFGPIO_CLRH (*(vu_char *) (CFG_MBAR+0x100043))
-#define MCFGPIO_CLRJ (*(vu_char *) (CFG_MBAR+0x100044))
-#define MCFGPIO_CLRDD (*(vu_char *) (CFG_MBAR+0x100045))
-#define MCFGPIO_CLREH (*(vu_char *) (CFG_MBAR+0x100046))
-#define MCFGPIO_CLREL (*(vu_char *) (CFG_MBAR+0x100047))
-#define MCFGPIO_CLRAS (*(vu_char *) (CFG_MBAR+0x100048))
-#define MCFGPIO_CLRQS (*(vu_char *) (CFG_MBAR+0x100049))
-#define MCFGPIO_CLRSD (*(vu_char *) (CFG_MBAR+0x10004A))
-#define MCFGPIO_CLRTC (*(vu_char *) (CFG_MBAR+0x10004B))
-#define MCFGPIO_CLRTD (*(vu_char *) (CFG_MBAR+0x10004C))
-#define MCFGPIO_CLRUA (*(vu_char *) (CFG_MBAR+0x10004D))
+#define MCFGPIO_CLRA (*(vu_char *) (CFG_MBAR+0x10003C))
+#define MCFGPIO_CLRB (*(vu_char *) (CFG_MBAR+0x10003D))
+#define MCFGPIO_CLRC (*(vu_char *) (CFG_MBAR+0x10003E))
+#define MCFGPIO_CLRD (*(vu_char *) (CFG_MBAR+0x10003F))
+#define MCFGPIO_CLRE (*(vu_char *) (CFG_MBAR+0x100040))
+#define MCFGPIO_CLRF (*(vu_char *) (CFG_MBAR+0x100041))
+#define MCFGPIO_CLRG (*(vu_char *) (CFG_MBAR+0x100042))
+#define MCFGPIO_CLRH (*(vu_char *) (CFG_MBAR+0x100043))
+#define MCFGPIO_CLRJ (*(vu_char *) (CFG_MBAR+0x100044))
+#define MCFGPIO_CLRDD (*(vu_char *) (CFG_MBAR+0x100045))
+#define MCFGPIO_CLREH (*(vu_char *) (CFG_MBAR+0x100046))
+#define MCFGPIO_CLREL (*(vu_char *) (CFG_MBAR+0x100047))
+#define MCFGPIO_CLRAS (*(vu_char *) (CFG_MBAR+0x100048))
+#define MCFGPIO_CLRQS (*(vu_char *) (CFG_MBAR+0x100049))
+#define MCFGPIO_CLRSD (*(vu_char *) (CFG_MBAR+0x10004A))
+#define MCFGPIO_CLRTC (*(vu_char *) (CFG_MBAR+0x10004B))
+#define MCFGPIO_CLRTD (*(vu_char *) (CFG_MBAR+0x10004C))
+#define MCFGPIO_CLRUA (*(vu_char *) (CFG_MBAR+0x10004D))
-#define MCFGPIO_PBCDPAR (*(vu_char *) (CFG_MBAR+0x100050))
-#define MCFGPIO_PFPAR (*(vu_char *) (CFG_MBAR+0x100051))
-#define MCFGPIO_PEPAR (*(vu_short *)(CFG_MBAR+0x100052))
-#define MCFGPIO_PJPAR (*(vu_char *) (CFG_MBAR+0x100054))
-#define MCFGPIO_PSDPAR (*(vu_char *) (CFG_MBAR+0x100055))
-#define MCFGPIO_PASPAR (*(vu_short *)(CFG_MBAR+0x100056))
-#define MCFGPIO_PEHLPAR (*(vu_char *) (CFG_MBAR+0x100058))
-#define MCFGPIO_PQSPAR (*(vu_char *) (CFG_MBAR+0x100059))
-#define MCFGPIO_PTCPAR (*(vu_char *) (CFG_MBAR+0x10005A))
-#define MCFGPIO_PTDPAR (*(vu_char *) (CFG_MBAR+0x10005B))
-#define MCFGPIO_PUAPAR (*(vu_char *) (CFG_MBAR+0x10005C))
+#define MCFGPIO_PBCDPAR (*(vu_char *) (CFG_MBAR+0x100050))
+#define MCFGPIO_PFPAR (*(vu_char *) (CFG_MBAR+0x100051))
+#define MCFGPIO_PEPAR (*(vu_short *)(CFG_MBAR+0x100052))
+#define MCFGPIO_PJPAR (*(vu_char *) (CFG_MBAR+0x100054))
+#define MCFGPIO_PSDPAR (*(vu_char *) (CFG_MBAR+0x100055))
+#define MCFGPIO_PASPAR (*(vu_short *)(CFG_MBAR+0x100056))
+#define MCFGPIO_PEHLPAR (*(vu_char *) (CFG_MBAR+0x100058))
+#define MCFGPIO_PQSPAR (*(vu_char *) (CFG_MBAR+0x100059))
+#define MCFGPIO_PTCPAR (*(vu_char *) (CFG_MBAR+0x10005A))
+#define MCFGPIO_PTDPAR (*(vu_char *) (CFG_MBAR+0x10005B))
+#define MCFGPIO_PUAPAR (*(vu_char *) (CFG_MBAR+0x10005C))
/* Bit level definitions and macros */
#define MCFGPIO_PORT7 (0x80)
@@ -171,7 +263,6 @@
#define MCFGPIO_Px0 (0x01)
#define MCFGPIO_Px(x) (0x01<<x)
-
#define MCFGPIO_PBCDPAR_PBPA (0x80)
#define MCFGPIO_PBCDPAR_PCDPA (0x40)
@@ -236,7 +327,7 @@
/* System Conrol Module SCM */
-#define MCFSCM_RAMBAR (*(vu_long *) (CFG_MBAR+0x00000008))
+#define MCFSCM_RAMBAR (*(vu_long *) (CFG_MBAR+0x00000008))
#define MCFSCM_CRSR (*(vu_char *) (CFG_MBAR+0x00000010))
#define MCFSCM_CWCR (*(vu_char *) (CFG_MBAR+0x00000011))
#define MCFSCM_LPICR (*(vu_char *) (CFG_MBAR+0x00000012))
@@ -256,34 +347,33 @@
#define MCFSCM_GPACR0 (*(vu_char *) (CFG_MBAR+0x00000030))
#define MCFSCM_GPACR1 (*(vu_char *) (CFG_MBAR+0x00000031))
-
#define MCFSCM_CRSR_EXT (0x80)
#define MCFSCM_CRSR_CWDR (0x20)
-#define MCFSCM_RAMBAR_BA(x) ((x)&0xFFFF0000)
-#define MCFSCM_RAMBAR_BDE (0x00000200)
+#define MCFSCM_RAMBAR_BA(x) ((x)&0xFFFF0000)
+#define MCFSCM_RAMBAR_BDE (0x00000200)
/* Reset Controller Module RCM */
#define MCFRESET_RCR (*(vu_char *) (CFG_MBAR+0x00110000))
#define MCFRESET_RSR (*(vu_char *) (CFG_MBAR+0x00110001))
-#define MCFRESET_RCR_SOFTRST (0x80)
-#define MCFRESET_RCR_FRCRSTOUT (0x40)
-#define MCFRESET_RCR_LVDF (0x10)
-#define MCFRESET_RCR_LVDIE (0x08)
-#define MCFRESET_RCR_LVDRE (0x04)
-#define MCFRESET_RCR_LVDE (0x01)
+#define MCFRESET_RCR_SOFTRST (0x80)
+#define MCFRESET_RCR_FRCRSTOUT (0x40)
+#define MCFRESET_RCR_LVDF (0x10)
+#define MCFRESET_RCR_LVDIE (0x08)
+#define MCFRESET_RCR_LVDRE (0x04)
+#define MCFRESET_RCR_LVDE (0x01)
-#define MCFRESET_RSR_LVD (0x40)
-#define MCFRESET_RSR_SOFT (0x20)
-#define MCFRESET_RSR_WDR (0x10)
-#define MCFRESET_RSR_POR (0x08)
-#define MCFRESET_RSR_EXT (0x04)
-#define MCFRESET_RSR_LOC (0x02)
-#define MCFRESET_RSR_LOL (0x01)
-#define MCFRESET_RSR_ALL (0x7F)
-#define MCFRESET_RCR_SOFTRST (0x80)
-#define MCFRESET_RCR_FRCRSTOUT (0x40)
+#define MCFRESET_RSR_LVD (0x40)
+#define MCFRESET_RSR_SOFT (0x20)
+#define MCFRESET_RSR_WDR (0x10)
+#define MCFRESET_RSR_POR (0x08)
+#define MCFRESET_RSR_EXT (0x04)
+#define MCFRESET_RSR_LOC (0x02)
+#define MCFRESET_RSR_LOL (0x01)
+#define MCFRESET_RSR_ALL (0x7F)
+#define MCFRESET_RCR_SOFTRST (0x80)
+#define MCFRESET_RCR_FRCRSTOUT (0x40)
/* Chip Configuration Module CCM */
@@ -291,26 +381,25 @@
#define MCFCCM_RCON (*(vu_short *)(CFG_MBAR+0x00110008))
#define MCFCCM_CIR (*(vu_short *)(CFG_MBAR+0x0011000A))
-
/* Bit level definitions and macros */
#define MCFCCM_CCR_LOAD (0x8000)
#define MCFCCM_CCR_MODE(x) (((x)&0x0007)<<8)
-#define MCFCCM_CCR_SZEN (0x0040)
-#define MCFCCM_CCR_PSTEN (0x0020)
+#define MCFCCM_CCR_SZEN (0x0040)
+#define MCFCCM_CCR_PSTEN (0x0020)
#define MCFCCM_CCR_BME (0x0008)
-#define MCFCCM_CCR_BMT(x) (((x)&0x0007))
+#define MCFCCM_CCR_BMT(x) (((x)&0x0007))
#define MCFCCM_CIR_PIN_MASK (0xFF00)
#define MCFCCM_CIR_PRN_MASK (0x00FF)
/* Clock Module */
-#define MCFCLOCK_SYNCR (*(vu_short *)(CFG_MBAR+0x120000))
-#define MCFCLOCK_SYNSR (*(vu_char *) (CFG_MBAR+0x120002))
+#define MCFCLOCK_SYNCR (*(vu_short *)(CFG_MBAR+0x120000))
+#define MCFCLOCK_SYNSR (*(vu_char *) (CFG_MBAR+0x120002))
-#define MCFCLOCK_SYNCR_MFD(x) (((x)&0x0007)<<12)
-#define MCFCLOCK_SYNCR_RFD(x) (((x)&0x0007)<<8)
-#define MCFCLOCK_SYNSR_LOCK 0x08
+#define MCFCLOCK_SYNCR_MFD(x) (((x)&0x0007)<<12)
+#define MCFCLOCK_SYNCR_RFD(x) (((x)&0x0007)<<8)
+#define MCFCLOCK_SYNSR_LOCK 0x08
#define MCFSDRAMC_DCR (*(vu_short *)(CFG_MBAR+0x00000040))
#define MCFSDRAMC_DACR0 (*(vu_long *) (CFG_MBAR+0x00000048))
@@ -337,19 +426,19 @@
#define MCFSDRAMC_DACR_IMRS (0x00000040)
#define MCFSDRAMC_DMR_BAM_16M (0x00FC0000)
-#define MCFSDRAMC_DMR_WP (0x00000100)
-#define MCFSDRAMC_DMR_CI (0x00000040)
-#define MCFSDRAMC_DMR_AM (0x00000020)
-#define MCFSDRAMC_DMR_SC (0x00000010)
-#define MCFSDRAMC_DMR_SD (0x00000008)
-#define MCFSDRAMC_DMR_UC (0x00000004)
-#define MCFSDRAMC_DMR_UD (0x00000002)
-#define MCFSDRAMC_DMR_V (0x00000001)
+#define MCFSDRAMC_DMR_WP (0x00000100)
+#define MCFSDRAMC_DMR_CI (0x00000040)
+#define MCFSDRAMC_DMR_AM (0x00000020)
+#define MCFSDRAMC_DMR_SC (0x00000010)
+#define MCFSDRAMC_DMR_SD (0x00000008)
+#define MCFSDRAMC_DMR_UC (0x00000004)
+#define MCFSDRAMC_DMR_UD (0x00000002)
+#define MCFSDRAMC_DMR_V (0x00000001)
-#define MCFWTM_WCR (*(vu_short *)(CFG_MBAR+0x00140000))
-#define MCFWTM_WMR (*(vu_short *)(CFG_MBAR+0x00140002))
-#define MCFWTM_WCNTR (*(vu_short *)(CFG_MBAR+0x00140004))
-#define MCFWTM_WSR (*(vu_short *)(CFG_MBAR+0x00140006))
+#define MCFWTM_WCR (*(vu_short *)(CFG_MBAR+0x00140000))
+#define MCFWTM_WMR (*(vu_short *)(CFG_MBAR+0x00140002))
+#define MCFWTM_WCNTR (*(vu_short *)(CFG_MBAR+0x00140004))
+#define MCFWTM_WSR (*(vu_short *)(CFG_MBAR+0x00140006))
/* Chip SELECT Module CSM */
#define MCFCSM_CSAR0 (*(vu_short *)(CFG_MBAR+0x00000080))
@@ -375,9 +464,7 @@
#define MCFCSM_CSCR_PS_16 (0x0080)
/*********************************************************************
-*
* General Purpose Timer (GPT) Module
-*
*********************************************************************/
#define MCFGPTA_GPTIOS (*(vu_char *)(CFG_MBAR+0x1A0000))
@@ -403,7 +490,6 @@
#define MCFGPTA_GPTPORT (*(vu_char *)(CFG_MBAR+0x1A001D))
#define MCFGPTA_GPTDDR (*(vu_char *)(CFG_MBAR+0x1A001E))
-
#define MCFGPTB_GPTIOS (*(vu_char *)(CFG_MBAR+0x1B0000))
#define MCFGPTB_GPTCFORC (*(vu_char *)(CFG_MBAR+0x1B0001))
#define MCFGPTB_GPTOC3M (*(vu_char *)(CFG_MBAR+0x1B0002))
@@ -542,4 +628,4 @@
#define MCFCFM_CMD_MASERS 0x41
/****************************************************************************/
-#endif /* m5282_h */
+#endif /* m5282_h */
diff --git a/include/asm-m68k/m5329.h b/include/asm-m68k/m5329.h
new file mode 100644
index 0000000..cd69fb0
--- /dev/null
+++ b/include/asm-m68k/m5329.h
@@ -0,0 +1,1658 @@
+/*
+ * mcf5329.h -- Definitions for Freescale Coldfire 5329
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef mcf5329_h
+#define mcf5329_h
+/****************************************************************************/
+
+/*********************************************************************
+* System Control Module (SCM)
+*********************************************************************/
+/* Bit definitions and macros for SCM_MPR */
+#define SCM_MPR_MPROT0(x) (((x)&0x0F)<<28)
+#define SCM_MPR_MPROT1(x) (((x)&0x0F)<<24)
+#define SCM_MPR_MPROT2(x) (((x)&0x0F)<<20)
+#define SCM_MPR_MPROT4(x) (((x)&0x0F)<<12)
+#define SCM_MPR_MPROT5(x) (((x)&0x0F)<<8)
+#define SCM_MPR_MPROT6(x) (((x)&0x0F)<<4)
+#define MPROT_MTR 4
+#define MPROT_MTW 2
+#define MPROT_MPL 1
+
+/* Bit definitions and macros for SCM_BMT */
+#define BMT_BME (0x08)
+#define BMT_8 (0x07)
+#define BMT_16 (0x06)
+#define BMT_32 (0x05)
+#define BMT_64 (0x04)
+#define BMT_128 (0x03)
+#define BMT_256 (0x02)
+#define BMT_512 (0x01)
+#define BMT_1024 (0x00)
+
+/* Bit definitions and macros for SCM_PACRA */
+#define SCM_PACRA_PACR0(x) (((x)&0x0F)<<28)
+#define SCM_PACRA_PACR1(x) (((x)&0x0F)<<24)
+#define SCM_PACRA_PACR2(x) (((x)&0x0F)<<20)
+#define PACR_SP 4
+#define PACR_WP 2
+#define PACR_TP 1
+
+/* Bit definitions and macros for SCM_PACRB */
+#define SCM_PACRB_PACR8(x) (((x)&0x0F)<<28)
+#define SCM_PACRB_PACR12(x) (((x)&0x0F)<<12)
+
+/* Bit definitions and macros for SCM_PACRC */
+#define SCM_PACRC_PACR16(x) (((x)&0x0F)<<28)
+#define SCM_PACRC_PACR17(x) (((x)&0x0F)<<24)
+#define SCM_PACRC_PACR18(x) (((x)&0x0F)<<20)
+#define SCM_PACRC_PACR19(x) (((x)&0x0F)<<16)
+#define SCM_PACRC_PACR21(x) (((x)&0x0F)<<8)
+#define SCM_PACRC_PACR22(x) (((x)&0x0F)<<4)
+#define SCM_PACRC_PACR23(x) (((x)&0x0F)<<0)
+
+/* Bit definitions and macros for SCM_PACRD */
+#define SCM_PACRD_PACR24(x) (((x)&0x0F)<<28)
+#define SCM_PACRD_PACR25(x) (((x)&0x0F)<<24)
+#define SCM_PACRD_PACR26(x) (((x)&0x0F)<<20)
+#define SCM_PACRD_PACR28(x) (((x)&0x0F)<<12)
+#define SCM_PACRD_PACR29(x) (((x)&0x0F)<<8)
+#define SCM_PACRD_PACR30(x) (((x)&0x0F)<<4)
+#define SCM_PACRD_PACR31(x) (((x)&0x0F)<<0)
+
+/* Bit definitions and macros for SCM_PACRE */
+#define SCM_PACRE_PACR32(x) (((x)&0x0F)<<28)
+#define SCM_PACRE_PACR33(x) (((x)&0x0F)<<24)
+#define SCM_PACRE_PACR34(x) (((x)&0x0F)<<20)
+#define SCM_PACRE_PACR35(x) (((x)&0x0F)<<16)
+#define SCM_PACRE_PACR36(x) (((x)&0x0F)<<12)
+#define SCM_PACRE_PACR37(x) (((x)&0x0F)<<8)
+#define SCM_PACRE_PACR38(x) (((x)&0x0F)<<4)
+
+/* Bit definitions and macros for SCM_PACRF */
+#define SCM_PACRF_PACR40(x) (((x)&0x0F)<<28)
+#define SCM_PACRF_PACR41(x) (((x)&0x0F)<<24)
+#define SCM_PACRF_PACR42(x) (((x)&0x0F)<<20)
+#define SCM_PACRF_PACR43(x) (((x)&0x0F)<<16)
+#define SCM_PACRF_PACR44(x) (((x)&0x0F)<<12)
+#define SCM_PACRF_PACR45(x) (((x)&0x0F)<<8)
+#define SCM_PACRF_PACR46(x) (((x)&0x0F)<<4)
+#define SCM_PACRF_PACR47(x) (((x)&0x0F)<<0)
+
+/* Bit definitions and macros for SCM_PACRG */
+#define SCM_PACRG_PACR48(x) (((x)&0x0F)<<28)
+
+/* Bit definitions and macros for SCM_PACRH */
+#define SCM_PACRH_PACR56(x) (((x)&0x0F)<<28)
+#define SCM_PACRH_PACR57(x) (((x)&0x0F)<<24)
+#define SCM_PACRH_PACR58(x) (((x)&0x0F)<<20)
+
+/* PACRn Assignments */
+#define PACR0(x) SCM_PACRA_PACR0(x)
+#define PACR1(x) SCM_PACRA_PACR1(x)
+#define PACR2(x) SCM_PACRA_PACR2(x)
+#define PACR8(x) SCM_PACRB_PACR8(x)
+#define PACR12(x) SCM_PACRB_PACR12(x)
+#define PACR16(x) SCM_PACRC_PACR16(x)
+#define PACR17(x) SCM_PACRC_PACR17(x)
+#define PACR18(x) SCM_PACRC_PACR18(x)
+#define PACR19(x) SCM_PACRC_PACR19(x)
+#define PACR21(x) SCM_PACRC_PACR21(x)
+#define PACR22(x) SCM_PACRC_PACR22(x)
+#define PACR23(x) SCM_PACRC_PACR23(x)
+#define PACR24(x) SCM_PACRD_PACR24(x)
+#define PACR25(x) SCM_PACRD_PACR25(x)
+#define PACR26(x) SCM_PACRD_PACR26(x)
+#define PACR28(x) SCM_PACRD_PACR28(x)
+#define PACR29(x) SCM_PACRD_PACR29(x)
+#define PACR30(x) SCM_PACRD_PACR30(x)
+#define PACR31(x) SCM_PACRD_PACR31(x)
+#define PACR32(x) SCM_PACRE_PACR32(x)
+#define PACR33(x) SCM_PACRE_PACR33(x)
+#define PACR34(x) SCM_PACRE_PACR34(x)
+#define PACR35(x) SCM_PACRE_PACR35(x)
+#define PACR36(x) SCM_PACRE_PACR36(x)
+#define PACR37(x) SCM_PACRE_PACR37(x)
+#define PACR38(x) SCM_PACRE_PACR38(x)
+#define PACR40(x) SCM_PACRF_PACR40(x)
+#define PACR41(x) SCM_PACRF_PACR41(x)
+#define PACR42(x) SCM_PACRF_PACR42(x)
+#define PACR43(x) SCM_PACRF_PACR43(x)
+#define PACR44(x) SCM_PACRF_PACR44(x)
+#define PACR45(x) SCM_PACRF_PACR45(x)
+#define PACR46(x) SCM_PACRF_PACR46(x)
+#define PACR47(x) SCM_PACRF_PACR47(x)
+#define PACR48(x) SCM_PACRG_PACR48(x)
+#define PACR56(x) SCM_PACRH_PACR56(x)
+#define PACR57(x) SCM_PACRH_PACR57(x)
+#define PACR58(x) SCM_PACRH_PACR58(x)
+
+/* Bit definitions and macros for SCM_CWCR */
+#define CWCR_RO (0x8000)
+#define CWCR_CWR_WH (0x0100)
+#define CWCR_CWE (0x0080)
+#define CWRI_WINDOW (0x0060)
+#define CWRI_RESET (0x0040)
+#define CWRI_INT_RESET (0x0020)
+#define CWRI_INT (0x0000)
+#define CWCR_CWT(x) (((x)&0x001F))
+
+/* Bit definitions and macros for SCM_ISR */
+#define SCMISR_CFEI (0x02)
+#define SCMISR_CWIC (0x01)
+
+/* Bit definitions and macros for SCM_BCR */
+#define BCR_GBR (0x00000200)
+#define BCR_GBW (0x00000100)
+#define BCR_S7 (0x00000080)
+#define BCR_S6 (0x00000040)
+#define BCR_S4 (0x00000010)
+#define BCR_S1 (0x00000002)
+
+/* Bit definitions and macros for SCM_CFIER */
+#define CFIER_ECFEI (0x01)
+
+/* Bit definitions and macros for SCM_CFLOC */
+#define CFLOC_LOC (0x80)
+
+/* Bit definitions and macros for SCM_CFATR */
+#define CFATR_WRITE (0x80)
+#define CFATR_SZ32 (0x20)
+#define CFATR_SZ16 (0x10)
+#define CFATR_SZ08 (0x00)
+#define CFATR_CACHE (0x08)
+#define CFATR_MODE (0x02)
+#define CFATR_TYPE (0x01)
+
+/*********************************************************************
+* FlexBus Chip Selects (FBCS)
+*********************************************************************/
+/* Bit definitions and macros for FBCS_CSAR */
+#define CSAR_BA(x) (((x)&0xFFFF)<<16)
+
+/* Bit definitions and macros for FBCS_CSMR */
+#define CSMR_BAM(x) (((x)&0xFFFF)<<16)
+#define CSMR_BAM_4G (0xFFFF0000)
+#define CSMR_BAM_2G (0x7FFF0000)
+#define CSMR_BAM_1G (0x3FFF0000)
+#define CSMR_BAM_1024M (0x3FFF0000)
+#define CSMR_BAM_512M (0x1FFF0000)
+#define CSMR_BAM_256M (0x0FFF0000)
+#define CSMR_BAM_128M (0x07FF0000)
+#define CSMR_BAM_64M (0x03FF0000)
+#define CSMR_BAM_32M (0x01FF0000)
+#define CSMR_BAM_16M (0x00FF0000)
+#define CSMR_BAM_8M (0x007F0000)
+#define CSMR_BAM_4M (0x003F0000)
+#define CSMR_BAM_2M (0x001F0000)
+#define CSMR_BAM_1M (0x000F0000)
+#define CSMR_BAM_1024K (0x000F0000)
+#define CSMR_BAM_512K (0x00070000)
+#define CSMR_BAM_256K (0x00030000)
+#define CSMR_BAM_128K (0x00010000)
+#define CSMR_BAM_64K (0x00000000)
+#define CSMR_WP (0x00000100)
+#define CSMR_V (0x00000001)
+
+/* Bit definitions and macros for FBCS_CSCR */
+#define CSCR_SWS(x) (((x)&0x3F)<<26)
+#define CSCR_ASET(x) (((x)&0x03)<<20)
+#define CSCR_SWSEN (0x00800000)
+#define CSCR_ASET_4CLK (0x00300000)
+#define CSCR_ASET_3CLK (0x00200000)
+#define CSCR_ASET_2CLK (0x00100000)
+#define CSCR_ASET_1CLK (0x00000000)
+#define CSCR_RDAH(x) (((x)&0x03)<<18)
+#define CSCR_RDAH_4CYC (0x000C0000)
+#define CSCR_RDAH_3CYC (0x00080000)
+#define CSCR_RDAH_2CYC (0x00040000)
+#define CSCR_RDAH_1CYC (0x00000000)
+#define CSCR_WRAH(x) (((x)&0x03)<<16)
+#define CSCR_WDAH_4CYC (0x00003000)
+#define CSCR_WDAH_3CYC (0x00002000)
+#define CSCR_WDAH_2CYC (0x00001000)
+#define CSCR_WDAH_1CYC (0x00000000)
+#define CSCR_WS(x) (((x)&0x3F)<<10)
+#define CSCR_SBM (0x00000200)
+#define CSCR_AA (0x00000100)
+#define CSCR_PS_MASK (0x000000C0)
+#define CSCR_PS_32 (0x00000000)
+#define CSCR_PS_16 (0x00000080)
+#define CSCR_PS_8 (0x00000040)
+#define CSCR_BEM (0x00000020)
+#define CSCR_BSTR (0x00000010)
+#define CSCR_BSTW (0x00000008)
+
+/*********************************************************************
+* FlexCAN Module (CAN)
+*********************************************************************/
+/* Bit definitions and macros for CAN_CANMCR */
+#define CANMCR_MDIS (0x80000000)
+#define CANMCR_FRZ (0x40000000)
+#define CANMCR_HALT (0x10000000)
+#define CANMCR_NORDY (0x08000000)
+#define CANMCR_SOFTRST (0x02000000)
+#define CANMCR_FRZACK (0x01000000)
+#define CANMCR_SUPV (0x00800000)
+#define CANMCR_LPMACK (0x00100000)
+#define CANMCR_MAXMB(x) (((x)&0x0F))
+
+/* Bit definitions and macros for CAN_CANCTRL */
+#define CANCTRL_PRESDIV(x) (((x)&0xFF)<<24)
+#define CANCTRL_RJW(x) (((x)&0x03)<<22)
+#define CANCTRL_PSEG1(x) (((x)&0x07)<<19)
+#define CANCTRL_PSEG2(x) (((x)&0x07)<<16)
+#define CANCTRL_BOFFMSK (0x00008000)
+#define CANCTRL_ERRMSK (0x00004000)
+#define CANCTRL_CLKSRC (0x00002000)
+#define CANCTRL_LPB (0x00001000)
+#define CANCTRL_SMP (0x00000080)
+#define CANCTRL_BOFFREC (0x00000040)
+#define CANCTRL_TSYNC (0x00000020)
+#define CANCTRL_LBUF (0x00000010)
+#define CANCTRL_LOM (0x00000008)
+#define CANCTRL_PROPSEG(x) (((x)&0x07))
+
+/* Bit definitions and macros for CAN_TIMER */
+#define TIMER_TIMER(x) ((x)&0xFFFF)
+
+/* Bit definitions and macros for CAN_RXGMASK */
+#define RXGMASK_MI(x) ((x)&0x1FFFFFFF)
+
+/* Bit definitions and macros for CAN_ERRCNT */
+#define ERRCNT_TXECTR(x) (((x)&0xFF))
+#define ERRCNT_RXECTR(x) (((x)&0xFF)<<8)
+
+/* Bit definitions and macros for CAN_ERRSTAT */
+#define ERRSTAT_BITERR1 (0x00008000)
+#define ERRSTAT_BITERR0 (0x00004000)
+#define ERRSTAT_ACKERR (0x00002000)
+#define ERRSTAT_CRCERR (0x00001000)
+#define ERRSTAT_FRMERR (0x00000800)
+#define ERRSTAT_STFERR (0x00000400)
+#define ERRSTAT_TXWRN (0x00000200)
+#define ERRSTAT_RXWRN (0x00000100)
+#define ERRSTAT_IDLE (0x00000080)
+#define ERRSTAT_TXRX (0x00000040)
+#define ERRSTAT_FLT_BUSOFF (0x00000020)
+#define ERRSTAT_FLT_PASSIVE (0x00000010)
+#define ERRSTAT_FLT_ACTIVE (0x00000000)
+#define ERRSTAT_BOFFINT (0x00000004)
+#define ERRSTAT_ERRINT (0x00000002)
+#define ERRSTAT_WAKINT (0x00000001)
+
+/* Bit definitions and macros for CAN_IMASK */
+#define IMASK_BUF15M (0x00008000)
+#define IMASK_BUF14M (0x00004000)
+#define IMASK_BUF13M (0x00002000)
+#define IMASK_BUF12M (0x00001000)
+#define IMASK_BUF11M (0x00000800)
+#define IMASK_BUF10M (0x00000400)
+#define IMASK_BUF9M (0x00000200)
+#define IMASK_BUF8M (0x00000100)
+#define IMASK_BUF7M (0x00000080)
+#define IMASK_BUF6M (0x00000040)
+#define IMASK_BUF5M (0x00000020)
+#define IMASK_BUF4M (0x00000010)
+#define IMASK_BUF3M (0x00000008)
+#define IMASK_BUF2M (0x00000004)
+#define IMASK_BUF1M (0x00000002)
+#define IMASK_BUF0M (0x00000001)
+
+/* Bit definitions and macros for CAN_IFLAG */
+#define IFLAG_BUF15I (0x00008000)
+#define IFLAG_BUF14I (0x00004000)
+#define IFLAG_BUF13I (0x00002000)
+#define IFLAG_BUF12I (0x00001000)
+#define IFLAG_BUF11I (0x00000800)
+#define IFLAG_BUF10I (0x00000400)
+#define IFLAG_BUF9I (0x00000200)
+#define IFLAG_BUF8I (0x00000100)
+#define IFLAG_BUF7I (0x00000080)
+#define IFLAG_BUF6I (0x00000040)
+#define IFLAG_BUF5I (0x00000020)
+#define IFLAG_BUF4I (0x00000010)
+#define IFLAG_BUF3I (0x00000008)
+#define IFLAG_BUF2I (0x00000004)
+#define IFLAG_BUF1I (0x00000002)
+#define IFLAG_BUF0I (0x00000001)
+
+/*********************************************************************
+* Interrupt Controller (INTC)
+*********************************************************************/
+#define INTC0_EPORT INTC_IPRL_INT1
+
+#define INT0_LO_RSVD0 (0)
+#define INT0_LO_EPORT1 (1)
+#define INT0_LO_EPORT2 (2)
+#define INT0_LO_EPORT3 (3)
+#define INT0_LO_EPORT4 (4)
+#define INT0_LO_EPORT5 (5)
+#define INT0_LO_EPORT6 (6)
+#define INT0_LO_EPORT7 (7)
+#define INT0_LO_EDMA_00 (8)
+#define INT0_LO_EDMA_01 (9)
+#define INT0_LO_EDMA_02 (10)
+#define INT0_LO_EDMA_03 (11)
+#define INT0_LO_EDMA_04 (12)
+#define INT0_LO_EDMA_05 (13)
+#define INT0_LO_EDMA_06 (14)
+#define INT0_LO_EDMA_07 (15)
+#define INT0_LO_EDMA_08 (16)
+#define INT0_LO_EDMA_09 (17)
+#define INT0_LO_EDMA_10 (18)
+#define INT0_LO_EDMA_11 (19)
+#define INT0_LO_EDMA_12 (20)
+#define INT0_LO_EDMA_13 (21)
+#define INT0_LO_EDMA_14 (22)
+#define INT0_LO_EDMA_15 (23)
+#define INT0_LO_EDMA_ERR (24)
+#define INT0_LO_SCM (25)
+#define INT0_LO_UART0 (26)
+#define INT0_LO_UART1 (27)
+#define INT0_LO_UART2 (28)
+#define INT0_LO_RSVD1 (29)
+#define INT0_LO_I2C (30)
+#define INT0_LO_QSPI (31)
+#define INT0_HI_DTMR0 (32)
+#define INT0_HI_DTMR1 (33)
+#define INT0_HI_DTMR2 (34)
+#define INT0_HI_DTMR3 (35)
+#define INT0_HI_FEC_TXF (36)
+#define INT0_HI_FEC_TXB (37)
+#define INT0_HI_FEC_UN (38)
+#define INT0_HI_FEC_RL (39)
+#define INT0_HI_FEC_RXF (40)
+#define INT0_HI_FEC_RXB (41)
+#define INT0_HI_FEC_MII (42)
+#define INT0_HI_FEC_LC (43)
+#define INT0_HI_FEC_HBERR (44)
+#define INT0_HI_FEC_GRA (45)
+#define INT0_HI_FEC_EBERR (46)
+#define INT0_HI_FEC_BABT (47)
+#define INT0_HI_FEC_BABR (48)
+/* 49 - 61 Reserved */
+#define INT0_HI_SCM (62)
+
+/* Bit definitions and macros for INTC_IPRH */
+#define INTC_IPRH_INT63 (0x80000000)
+#define INTC_IPRH_INT62 (0x40000000)
+#define INTC_IPRH_INT61 (0x20000000)
+#define INTC_IPRH_INT60 (0x10000000)
+#define INTC_IPRH_INT59 (0x08000000)
+#define INTC_IPRH_INT58 (0x04000000)
+#define INTC_IPRH_INT57 (0x02000000)
+#define INTC_IPRH_INT56 (0x01000000)
+#define INTC_IPRH_INT55 (0x00800000)
+#define INTC_IPRH_INT54 (0x00400000)
+#define INTC_IPRH_INT53 (0x00200000)
+#define INTC_IPRH_INT52 (0x00100000)
+#define INTC_IPRH_INT51 (0x00080000)
+#define INTC_IPRH_INT50 (0x00040000)
+#define INTC_IPRH_INT49 (0x00020000)
+#define INTC_IPRH_INT48 (0x00010000)
+#define INTC_IPRH_INT47 (0x00008000)
+#define INTC_IPRH_INT46 (0x00004000)
+#define INTC_IPRH_INT45 (0x00002000)
+#define INTC_IPRH_INT44 (0x00001000)
+#define INTC_IPRH_INT43 (0x00000800)
+#define INTC_IPRH_INT42 (0x00000400)
+#define INTC_IPRH_INT41 (0x00000200)
+#define INTC_IPRH_INT40 (0x00000100)
+#define INTC_IPRH_INT39 (0x00000080)
+#define INTC_IPRH_INT38 (0x00000040)
+#define INTC_IPRH_INT37 (0x00000020)
+#define INTC_IPRH_INT36 (0x00000010)
+#define INTC_IPRH_INT35 (0x00000008)
+#define INTC_IPRH_INT34 (0x00000004)
+#define INTC_IPRH_INT33 (0x00000002)
+#define INTC_IPRH_INT32 (0x00000001)
+
+/* Bit definitions and macros for INTC_IPRL */
+#define INTC_IPRL_INT31 (0x80000000)
+#define INTC_IPRL_INT30 (0x40000000)
+#define INTC_IPRL_INT29 (0x20000000)
+#define INTC_IPRL_INT28 (0x10000000)
+#define INTC_IPRL_INT27 (0x08000000)
+#define INTC_IPRL_INT26 (0x04000000)
+#define INTC_IPRL_INT25 (0x02000000)
+#define INTC_IPRL_INT24 (0x01000000)
+#define INTC_IPRL_INT23 (0x00800000)
+#define INTC_IPRL_INT22 (0x00400000)
+#define INTC_IPRL_INT21 (0x00200000)
+#define INTC_IPRL_INT20 (0x00100000)
+#define INTC_IPRL_INT19 (0x00080000)
+#define INTC_IPRL_INT18 (0x00040000)
+#define INTC_IPRL_INT17 (0x00020000)
+#define INTC_IPRL_INT16 (0x00010000)
+#define INTC_IPRL_INT15 (0x00008000)
+#define INTC_IPRL_INT14 (0x00004000)
+#define INTC_IPRL_INT13 (0x00002000)
+#define INTC_IPRL_INT12 (0x00001000)
+#define INTC_IPRL_INT11 (0x00000800)
+#define INTC_IPRL_INT10 (0x00000400)
+#define INTC_IPRL_INT9 (0x00000200)
+#define INTC_IPRL_INT8 (0x00000100)
+#define INTC_IPRL_INT7 (0x00000080)
+#define INTC_IPRL_INT6 (0x00000040)
+#define INTC_IPRL_INT5 (0x00000020)
+#define INTC_IPRL_INT4 (0x00000010)
+#define INTC_IPRL_INT3 (0x00000008)
+#define INTC_IPRL_INT2 (0x00000004)
+#define INTC_IPRL_INT1 (0x00000002)
+#define INTC_IPRL_INT0 (0x00000001)
+
+/* Bit definitions and macros for INTC_ICONFIG */
+#define INTC_ICFG_ELVLPRI7 (0x8000)
+#define INTC_ICFG_ELVLPRI6 (0x4000)
+#define INTC_ICFG_ELVLPRI5 (0x2000)
+#define INTC_ICFG_ELVLPRI4 (0x1000)
+#define INTC_ICFG_ELVLPRI3 (0x0800)
+#define INTC_ICFG_ELVLPRI2 (0x0400)
+#define INTC_ICFG_ELVLPRI1 (0x0200)
+#define INTC_ICFG_EMASK (0x0020)
+
+/* Bit definitions and macros for INTC_SIMR */
+#define INTC_SIMR_SALL (0x40)
+#define INTC_SIMR_SIMR(x) ((x)&0x3F)
+
+/* Bit definitions and macros for INTC_CIMR */
+#define INTC_CIMR_CALL (0x40)
+#define INTC_CIMR_CIMR(x) ((x)&0x3F)
+
+/* Bit definitions and macros for INTC_CLMASK */
+#define INTC_CLMASK_CLMASK(x) ((x)&0x0F)
+
+/* Bit definitions and macros for INTC_SLMASK */
+#define INTC_SLMASK_SLMASK(x) ((x)&0x0F)
+
+/* Bit definitions and macros for INTC_ICR */
+#define INTC_ICR_IL(x) ((x)&0x07)
+
+/*********************************************************************
+* Queued Serial Peripheral Interface (QSPI)
+*********************************************************************/
+/* Bit definitions and macros for QSPI_QMR */
+#define QSPI_QMR_MSTR (0x8000)
+#define QSPI_QMR_DOHIE (0x4000)
+#define QSPI_QMR_BITS(x) (((x)&0x000F)<<10)
+#define QSPI_QMR_CPOL (0x0200)
+#define QSPI_QMR_CPHA (0x0100)
+#define QSPI_QMR_BAUD(x) ((x)&0x00FF)
+
+/* Bit definitions and macros for QSPI_QDLYR */
+#define QSPI_QDLYR_SPE (0x8000)
+#define QSPI_QDLYR_QCD(x) (((x)&0x007F)<<8)
+#define QSPI_QDLYR_DTL(x) ((x)&0x00FF)
+
+/* Bit definitions and macros for QSPI_QWR */
+#define QSPI_QWR_NEWQP(x) ((x)&0x000F)
+#define QSPI_QWR_ENDQP(x) (((x)&0x000F)<<8)
+#define QSPI_QWR_CSIV (0x1000)
+#define QSPI_QWR_WRTO (0x2000)
+#define QSPI_QWR_WREN (0x4000)
+#define QSPI_QWR_HALT (0x8000)
+
+/* Bit definitions and macros for QSPI_QIR */
+#define QSPI_QIR_WCEFB (0x8000)
+#define QSPI_QIR_ABRTB (0x4000)
+#define QSPI_QIR_ABRTL (0x1000)
+#define QSPI_QIR_WCEFE (0x0800)
+#define QSPI_QIR_ABRTE (0x0400)
+#define QSPI_QIR_SPIFE (0x0100)
+#define QSPI_QIR_WCEF (0x0008)
+#define QSPI_QIR_ABRT (0x0004)
+#define QSPI_QIR_SPIF (0x0001)
+
+/* Bit definitions and macros for QSPI_QAR */
+#define QSPI_QAR_ADDR(x) ((x)&0x003F)
+#define QSPI_QAR_TRANS (0x0000)
+#define QSPI_QAR_RECV (0x0010)
+#define QSPI_QAR_CMD (0x0020)
+
+/* Bit definitions and macros for QSPI_QDR */
+#define QSPI_QDR_CONT (0x8000)
+#define QSPI_QDR_BITSE (0x4000)
+#define QSPI_QDR_DT (0x2000)
+#define QSPI_QDR_DSCK (0x1000)
+#define QSPI_QDR_QSPI_CS3 (0x0800)
+#define QSPI_QDR_QSPI_CS2 (0x0400)
+#define QSPI_QDR_QSPI_CS1 (0x0200)
+#define QSPI_QDR_QSPI_CS0 (0x0100)
+
+/*********************************************************************
+* Pulse Width Modulation (PWM)
+*********************************************************************/
+/* Bit definitions and macros for PWM_E */
+#define PWM_EN_PWME7 (0x80)
+#define PWM_EN_PWME5 (0x20)
+#define PWM_EN_PWME3 (0x08)
+#define PWM_EN_PWME1 (0x02)
+
+/* Bit definitions and macros for PWM_POL */
+#define PWM_POL_PPOL7 (0x80)
+#define PWM_POL_PPOL5 (0x20)
+#define PWM_POL_PPOL3 (0x08)
+#define PWM_POL_PPOL1 (0x02)
+
+/* Bit definitions and macros for PWM_CLK */
+#define PWM_CLK_PCLK7 (0x80)
+#define PWM_CLK_PCLK5 (0x20)
+#define PWM_CLK_PCLK3 (0x08)
+#define PWM_CLK_PCLK1 (0x02)
+
+/* Bit definitions and macros for PWM_PRCLK */
+#define PWM_PRCLK_PCKB(x) (((x)&0x07)<<4)
+#define PWM_PRCLK_PCKA(x) ((x)&0x07)
+
+/* Bit definitions and macros for PWM_CAE */
+#define PWM_CAE_CAE7 (0x80)
+#define PWM_CAE_CAE5 (0x20)
+#define PWM_CAE_CAE3 (0x08)
+#define PWM_CAE_CAE1 (0x02)
+
+/* Bit definitions and macros for PWM_CTL */
+#define PWM_CTL_CON67 (0x80)
+#define PWM_CTL_CON45 (0x40)
+#define PWM_CTL_CON23 (0x20)
+#define PWM_CTL_CON01 (0x10)
+#define PWM_CTL_PSWAR (0x08)
+#define PWM_CTL_PFRZ (0x04)
+
+/* Bit definitions and macros for PWM_SDN */
+#define PWM_SDN_IF (0x80)
+#define PWM_SDN_IE (0x40)
+#define PWM_SDN_RESTART (0x20)
+#define PWM_SDN_LVL (0x10)
+#define PWM_SDN_PWM7IN (0x04)
+#define PWM_SDN_PWM7IL (0x02)
+#define PWM_SDN_SDNEN (0x01)
+
+/*********************************************************************
+* Watchdog Timer Modules (WTM)
+*********************************************************************/
+/* Bit definitions and macros for WTM_WCR */
+#define WTM_WCR_WAIT (0x0008)
+#define WTM_WCR_DOZE (0x0004)
+#define WTM_WCR_HALTED (0x0002)
+#define WTM_WCR_EN (0x0001)
+
+/*********************************************************************
+* Chip Configuration Module (CCM)
+*********************************************************************/
+/* Bit definitions and macros for CCM_CCR */
+#define CCM_CCR_CSC(x) (((x)&0x0003)<<8|0x0001)
+#define CCM_CCR_LIMP (0x0041)
+#define CCM_CCR_LOAD (0x0021)
+#define CCM_CCR_BOOTPS(x) (((x)&0x0003)<<3|0x0001)
+#define CCM_CCR_OSC_MODE (0x0005)
+#define CCM_CCR_PLL_MODE (0x0003)
+#define CCM_CCR_RESERVED (0x0001)
+
+/* Bit definitions and macros for CCM_RCON */
+#define CCM_RCON_CSC(x) (((x)&0x0003)<<8|0x0001)
+#define CCM_RCON_LIMP (0x0041)
+#define CCM_RCON_LOAD (0x0021)
+#define CCM_RCON_BOOTPS(x) (((x)&0x0003)<<3|0x0001)
+#define CCM_RCON_OSC_MODE (0x0005)
+#define CCM_RCON_PLL_MODE (0x0003)
+#define CCM_RCON_RESERVED (0x0001)
+
+/* Bit definitions and macros for CCM_CIR */
+#define CCM_CIR_PIN(x) (((x)&0x03FF)<<6)
+#define CCM_CIR_PRN(x) ((x)&0x003F)
+
+/* Bit definitions and macros for CCM_MISCCR */
+#define CCM_MISCCR_PLL_LOCK (0x2000)
+#define CCM_MISCCR_LIMP (0x1000)
+#define CCM_MISCCR_LCD_CHEN (0x0100)
+#define CCM_MISCCR_SSI_PUE (0x0080)
+#define CCM_MISCCR_SSI_PUS (0x0040)
+#define CCM_MISCCR_TIM_DMA (0x0020)
+#define CCM_MISCCR_SSI_SRC (0x0010)
+#define CCM_MISCCR_USBDIV (0x0002)
+#define CCM_MISCCR_USBSRC (0x0001)
+
+/* Bit definitions and macros for CCM_CDR */
+#define CCM_CDR_LPDIV(x) (((x)&0x000F)<<8)
+#define CCM_CDR_SSIDIV(x) ((x)&0x000F)
+
+/* Bit definitions and macros for CCM_UHCSR */
+#define CCM_UHCSR_PORTIND(x) (((x)&0x0003)<<14)
+#define CCM_UHCSR_WKUP (0x0004)
+#define CCM_UHCSR_UHMIE (0x0002)
+#define CCM_UHCSR_XPDE (0x0001)
+
+/* Bit definitions and macros for CCM_UOCSR */
+#define CCM_UOCSR_PORTIND(x) (((x)&0x0003)<<14)
+#define CCM_UOCSR_DPPD (0x2000)
+#define CCM_UOCSR_DMPD (0x1000)
+#define CCM_UOCSR_DRV_VBUS (0x0800)
+#define CCM_UOCSR_CRG_VBUS (0x0400)
+#define CCM_UOCSR_DCR_VBUS (0x0200)
+#define CCM_UOCSR_DPPU (0x0100)
+#define CCM_UOCSR_AVLD (0x0080)
+#define CCM_UOCSR_BVLD (0x0040)
+#define CCM_UOCSR_VVLD (0x0020)
+#define CCM_UOCSR_SEND (0x0010)
+#define CCM_UOCSR_PWRFLT (0x0008)
+#define CCM_UOCSR_WKUP (0x0004)
+#define CCM_UOCSR_UOMIE (0x0002)
+#define CCM_UOCSR_XPDE (0x0001)
+
+/* not done yet */
+/*********************************************************************
+* General Purpose I/O (GPIO)
+*********************************************************************/
+/* Bit definitions and macros for GPIO_PODR_FECH_L */
+#define GPIO_PODR_FECH_L7 (0x80)
+#define GPIO_PODR_FECH_L6 (0x40)
+#define GPIO_PODR_FECH_L5 (0x20)
+#define GPIO_PODR_FECH_L4 (0x10)
+#define GPIO_PODR_FECH_L3 (0x08)
+#define GPIO_PODR_FECH_L2 (0x04)
+#define GPIO_PODR_FECH_L1 (0x02)
+#define GPIO_PODR_FECH_L0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_SSI */
+#define GPIO_PODR_SSI_4 (0x10)
+#define GPIO_PODR_SSI_3 (0x08)
+#define GPIO_PODR_SSI_2 (0x04)
+#define GPIO_PODR_SSI_1 (0x02)
+#define GPIO_PODR_SSI_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_BUSCTL */
+#define GPIO_PODR_BUSCTL_3 (0x08)
+#define GPIO_PODR_BUSCTL_2 (0x04)
+#define GPIO_PODR_BUSCTL_1 (0x02)
+#define GPIO_PODR_BUSCTL_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_BE */
+#define GPIO_PODR_BE_3 (0x08)
+#define GPIO_PODR_BE_2 (0x04)
+#define GPIO_PODR_BE_1 (0x02)
+#define GPIO_PODR_BE_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_CS */
+#define GPIO_PODR_CS_5 (0x20)
+#define GPIO_PODR_CS_4 (0x10)
+#define GPIO_PODR_CS_3 (0x08)
+#define GPIO_PODR_CS_2 (0x04)
+#define GPIO_PODR_CS_1 (0x02)
+
+/* Bit definitions and macros for GPIO_PODR_PWM */
+#define GPIO_PODR_PWM_5 (0x20)
+#define GPIO_PODR_PWM_4 (0x10)
+#define GPIO_PODR_PWM_3 (0x08)
+#define GPIO_PODR_PWM_2 (0x04)
+
+/* Bit definitions and macros for GPIO_PODR_FECI2C */
+#define GPIO_PODR_FECI2C_3 (0x08)
+#define GPIO_PODR_FECI2C_2 (0x04)
+#define GPIO_PODR_FECI2C_1 (0x02)
+#define GPIO_PODR_FECI2C_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_UART */
+#define GPIO_PODR_UART_7 (0x80)
+#define GPIO_PODR_UART_6 (0x40)
+#define GPIO_PODR_UART_5 (0x20)
+#define GPIO_PODR_UART_4 (0x10)
+#define GPIO_PODR_UART_3 (0x08)
+#define GPIO_PODR_UART_2 (0x04)
+#define GPIO_PODR_UART_1 (0x02)
+#define GPIO_PODR_UART_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_QSPI */
+#define GPIO_PODR_QSPI_5 (0x20)
+#define GPIO_PODR_QSPI_4 (0x10)
+#define GPIO_PODR_QSPI_3 (0x08)
+#define GPIO_PODR_QSPI_2 (0x04)
+#define GPIO_PODR_QSPI_1 (0x02)
+#define GPIO_PODR_QSPI_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_TIMER */
+#define GPIO_PODR_TIMER_3 (0x08)
+#define GPIO_PODR_TIMER_2 (0x04)
+#define GPIO_PODR_TIMER_1 (0x02)
+#define GPIO_PODR_TIMER_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_LCDDATAH */
+#define GPIO_PODR_LCDDATAH_1 (0x02)
+#define GPIO_PODR_LCDDATAH_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_LCDDATAM */
+#define GPIO_PODR_LCDDATAM_7 (0x80)
+#define GPIO_PODR_LCDDATAM_6 (0x40)
+#define GPIO_PODR_LCDDATAM_5 (0x20)
+#define GPIO_PODR_LCDDATAM_4 (0x10)
+#define GPIO_PODR_LCDDATAM_3 (0x08)
+#define GPIO_PODR_LCDDATAM_2 (0x04)
+#define GPIO_PODR_LCDDATAM_1 (0x02)
+#define GPIO_PODR_LCDDATAM_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_LCDDATAL */
+#define GPIO_PODR_LCDDATAL_7 (0x80)
+#define GPIO_PODR_LCDDATAL_6 (0x40)
+#define GPIO_PODR_LCDDATAL_5 (0x20)
+#define GPIO_PODR_LCDDATAL_4 (0x10)
+#define GPIO_PODR_LCDDATAL_3 (0x08)
+#define GPIO_PODR_LCDDATAL_2 (0x04)
+#define GPIO_PODR_LCDDATAL_1 (0x02)
+#define GPIO_PODR_LCDDATAL_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_LCDCTLH */
+#define GPIO_PODR_LCDCTLH_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PODR_LCDCTLL */
+#define GPIO_PODR_LCDCTLL_7 (0x80)
+#define GPIO_PODR_LCDCTLL_6 (0x40)
+#define GPIO_PODR_LCDCTLL_5 (0x20)
+#define GPIO_PODR_LCDCTLL_4 (0x10)
+#define GPIO_PODR_LCDCTLL_3 (0x08)
+#define GPIO_PODR_LCDCTLL_2 (0x04)
+#define GPIO_PODR_LCDCTLL_1 (0x02)
+#define GPIO_PODR_LCDCTLL_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PDDR_FECH */
+#define GPIO_PDDR_FECH_L7 (0x80)
+#define GPIO_PDDR_FECH_L6 (0x40)
+#define GPIO_PDDR_FECH_L5 (0x20)
+#define GPIO_PDDR_FECH_L4 (0x10)
+#define GPIO_PDDR_FECH_L3 (0x08)
+#define GPIO_PDDR_FECH_L2 (0x04)
+#define GPIO_PDDR_FECH_L1 (0x02)
+#define GPIO_PDDR_FECH_L0 (0x01)
+
+/* Bit definitions and macros for GPIO_PDDR_SSI */
+#define GPIO_PDDR_SSI_4 (0x10)
+#define GPIO_PDDR_SSI_3 (0x08)
+#define GPIO_PDDR_SSI_2 (0x04)
+#define GPIO_PDDR_SSI_1 (0x02)
+#define GPIO_PDDR_SSI_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PDDR_BUSCTL */
+#define GPIO_PDDR_BUSCTL_3 (0x08)
+#define GPIO_PDDR_BUSCTL_2 (0x04)
+#define GPIO_PDDR_BUSCTL_1 (0x02)
+#define GPIO_PDDR_BUSCTL_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PDDR_BE */
+#define GPIO_PDDR_BE_3 (0x08)
+#define GPIO_PDDR_BE_2 (0x04)
+#define GPIO_PDDR_BE_1 (0x02)
+#define GPIO_PDDR_BE_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PDDR_CS */
+#define GPIO_PDDR_CS_1 (0x02)
+#define GPIO_PDDR_CS_2 (0x04)
+#define GPIO_PDDR_CS_3 (0x08)
+#define GPIO_PDDR_CS_4 (0x10)
+#define GPIO_PDDR_CS_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PDDR_PWM */
+#define GPIO_PDDR_PWM_2 (0x04)
+#define GPIO_PDDR_PWM_3 (0x08)
+#define GPIO_PDDR_PWM_4 (0x10)
+#define GPIO_PDDR_PWM_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PDDR_FECI2C */
+#define GPIO_PDDR_FECI2C_0 (0x01)
+#define GPIO_PDDR_FECI2C_1 (0x02)
+#define GPIO_PDDR_FECI2C_2 (0x04)
+#define GPIO_PDDR_FECI2C_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PDDR_UART */
+#define GPIO_PDDR_UART_0 (0x01)
+#define GPIO_PDDR_UART_1 (0x02)
+#define GPIO_PDDR_UART_2 (0x04)
+#define GPIO_PDDR_UART_3 (0x08)
+#define GPIO_PDDR_UART_4 (0x10)
+#define GPIO_PDDR_UART_5 (0x20)
+#define GPIO_PDDR_UART_6 (0x40)
+#define GPIO_PDDR_UART_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PDDR_QSPI */
+#define GPIO_PDDR_QSPI_0 (0x01)
+#define GPIO_PDDR_QSPI_1 (0x02)
+#define GPIO_PDDR_QSPI_2 (0x04)
+#define GPIO_PDDR_QSPI_3 (0x08)
+#define GPIO_PDDR_QSPI_4 (0x10)
+#define GPIO_PDDR_QSPI_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PDDR_TIMER */
+#define GPIO_PDDR_TIMER_0 (0x01)
+#define GPIO_PDDR_TIMER_1 (0x02)
+#define GPIO_PDDR_TIMER_2 (0x04)
+#define GPIO_PDDR_TIMER_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PDDR_LCDDATAH */
+#define GPIO_PDDR_LCDDATAH_0 (0x01)
+#define GPIO_PDDR_LCDDATAH_1 (0x02)
+
+/* Bit definitions and macros for GPIO_PDDR_LCDDATAM */
+#define GPIO_PDDR_LCDDATAM_0 (0x01)
+#define GPIO_PDDR_LCDDATAM_1 (0x02)
+#define GPIO_PDDR_LCDDATAM_2 (0x04)
+#define GPIO_PDDR_LCDDATAM_3 (0x08)
+#define GPIO_PDDR_LCDDATAM_4 (0x10)
+#define GPIO_PDDR_LCDDATAM_5 (0x20)
+#define GPIO_PDDR_LCDDATAM_6 (0x40)
+#define GPIO_PDDR_LCDDATAM_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PDDR_LCDDATAL */
+#define GPIO_PDDR_LCDDATAL_0 (0x01)
+#define GPIO_PDDR_LCDDATAL_1 (0x02)
+#define GPIO_PDDR_LCDDATAL_2 (0x04)
+#define GPIO_PDDR_LCDDATAL_3 (0x08)
+#define GPIO_PDDR_LCDDATAL_4 (0x10)
+#define GPIO_PDDR_LCDDATAL_5 (0x20)
+#define GPIO_PDDR_LCDDATAL_6 (0x40)
+#define GPIO_PDDR_LCDDATAL_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PDDR_LCDCTLH */
+#define GPIO_PDDR_LCDCTLH_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PDDR_LCDCTLL */
+#define GPIO_PDDR_LCDCTLL_0 (0x01)
+#define GPIO_PDDR_LCDCTLL_1 (0x02)
+#define GPIO_PDDR_LCDCTLL_2 (0x04)
+#define GPIO_PDDR_LCDCTLL_3 (0x08)
+#define GPIO_PDDR_LCDCTLL_4 (0x10)
+#define GPIO_PDDR_LCDCTLL_5 (0x20)
+#define GPIO_PDDR_LCDCTLL_6 (0x40)
+#define GPIO_PDDR_LCDCTLL_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PPDSDR_FECH */
+#define GPIO_PPDSDR_FECH_L0 (0x01)
+#define GPIO_PPDSDR_FECH_L1 (0x02)
+#define GPIO_PPDSDR_FECH_L2 (0x04)
+#define GPIO_PPDSDR_FECH_L3 (0x08)
+#define GPIO_PPDSDR_FECH_L4 (0x10)
+#define GPIO_PPDSDR_FECH_L5 (0x20)
+#define GPIO_PPDSDR_FECH_L6 (0x40)
+#define GPIO_PPDSDR_FECH_L7 (0x80)
+
+/* Bit definitions and macros for GPIO_PPDSDR_SSI */
+#define GPIO_PPDSDR_SSI_0 (0x01)
+#define GPIO_PPDSDR_SSI_1 (0x02)
+#define GPIO_PPDSDR_SSI_2 (0x04)
+#define GPIO_PPDSDR_SSI_3 (0x08)
+#define GPIO_PPDSDR_SSI_4 (0x10)
+
+/* Bit definitions and macros for GPIO_PPDSDR_BUSCTL */
+#define GPIO_PPDSDR_BUSCTL_0 (0x01)
+#define GPIO_PPDSDR_BUSCTL_1 (0x02)
+#define GPIO_PPDSDR_BUSCTL_2 (0x04)
+#define GPIO_PPDSDR_BUSCTL_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PPDSDR_BE */
+#define GPIO_PPDSDR_BE_0 (0x01)
+#define GPIO_PPDSDR_BE_1 (0x02)
+#define GPIO_PPDSDR_BE_2 (0x04)
+#define GPIO_PPDSDR_BE_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PPDSDR_CS */
+#define GPIO_PPDSDR_CS_1 (0x02)
+#define GPIO_PPDSDR_CS_2 (0x04)
+#define GPIO_PPDSDR_CS_3 (0x08)
+#define GPIO_PPDSDR_CS_4 (0x10)
+#define GPIO_PPDSDR_CS_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PPDSDR_PWM */
+#define GPIO_PPDSDR_PWM_2 (0x04)
+#define GPIO_PPDSDR_PWM_3 (0x08)
+#define GPIO_PPDSDR_PWM_4 (0x10)
+#define GPIO_PPDSDR_PWM_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PPDSDR_FECI2C */
+#define GPIO_PPDSDR_FECI2C_0 (0x01)
+#define GPIO_PPDSDR_FECI2C_1 (0x02)
+#define GPIO_PPDSDR_FECI2C_2 (0x04)
+#define GPIO_PPDSDR_FECI2C_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PPDSDR_UART */
+#define GPIO_PPDSDR_UART_0 (0x01)
+#define GPIO_PPDSDR_UART_1 (0x02)
+#define GPIO_PPDSDR_UART_2 (0x04)
+#define GPIO_PPDSDR_UART_3 (0x08)
+#define GPIO_PPDSDR_UART_4 (0x10)
+#define GPIO_PPDSDR_UART_5 (0x20)
+#define GPIO_PPDSDR_UART_6 (0x40)
+#define GPIO_PPDSDR_UART_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PPDSDR_QSPI */
+#define GPIO_PPDSDR_QSPI_0 (0x01)
+#define GPIO_PPDSDR_QSPI_1 (0x02)
+#define GPIO_PPDSDR_QSPI_2 (0x04)
+#define GPIO_PPDSDR_QSPI_3 (0x08)
+#define GPIO_PPDSDR_QSPI_4 (0x10)
+#define GPIO_PPDSDR_QSPI_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PPDSDR_TIMER */
+#define GPIO_PPDSDR_TIMER_0 (0x01)
+#define GPIO_PPDSDR_TIMER_1 (0x02)
+#define GPIO_PPDSDR_TIMER_2 (0x04)
+#define GPIO_PPDSDR_TIMER_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PPDSDR_LCDDATAH */
+#define GPIO_PPDSDR_LCDDATAH_0 (0x01)
+#define GPIO_PPDSDR_LCDDATAH_1 (0x02)
+
+/* Bit definitions and macros for GPIO_PPDSDR_LCDDATAM */
+#define GPIO_PPDSDR_LCDDATAM_0 (0x01)
+#define GPIO_PPDSDR_LCDDATAM_1 (0x02)
+#define GPIO_PPDSDR_LCDDATAM_2 (0x04)
+#define GPIO_PPDSDR_LCDDATAM_3 (0x08)
+#define GPIO_PPDSDR_LCDDATAM_4 (0x10)
+#define GPIO_PPDSDR_LCDDATAM_5 (0x20)
+#define GPIO_PPDSDR_LCDDATAM_6 (0x40)
+#define GPIO_PPDSDR_LCDDATAM_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PPDSDR_LCDDATAL */
+#define GPIO_PPDSDR_LCDDATAL_0 (0x01)
+#define GPIO_PPDSDR_LCDDATAL_1 (0x02)
+#define GPIO_PPDSDR_LCDDATAL_2 (0x04)
+#define GPIO_PPDSDR_LCDDATAL_3 (0x08)
+#define GPIO_PPDSDR_LCDDATAL_4 (0x10)
+#define GPIO_PPDSDR_LCDDATAL_5 (0x20)
+#define GPIO_PPDSDR_LCDDATAL_6 (0x40)
+#define GPIO_PPDSDR_LCDDATAL_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PPDSDR_LCDCTLH */
+#define GPIO_PPDSDR_LCDCTLH_0 (0x01)
+
+/* Bit definitions and macros for GPIO_PPDSDR_LCDCTLL */
+#define GPIO_PPDSDR_LCDCTLL_0 (0x01)
+#define GPIO_PPDSDR_LCDCTLL_1 (0x02)
+#define GPIO_PPDSDR_LCDCTLL_2 (0x04)
+#define GPIO_PPDSDR_LCDCTLL_3 (0x08)
+#define GPIO_PPDSDR_LCDCTLL_4 (0x10)
+#define GPIO_PPDSDR_LCDCTLL_5 (0x20)
+#define GPIO_PPDSDR_LCDCTLL_6 (0x40)
+#define GPIO_PPDSDR_LCDCTLL_7 (0x80)
+
+/* Bit definitions and macros for GPIO_PCLRR_FECH */
+#define GPIO_PCLRR_FECH_L0 (0x01)
+#define GPIO_PCLRR_FECH_L1 (0x02)
+#define GPIO_PCLRR_FECH_L2 (0x04)
+#define GPIO_PCLRR_FECH_L3 (0x08)
+#define GPIO_PCLRR_FECH_L4 (0x10)
+#define GPIO_PCLRR_FECH_L5 (0x20)
+#define GPIO_PCLRR_FECH_L6 (0x40)
+#define GPIO_PCLRR_FECH_L7 (0x80)
+
+/* Bit definitions and macros for GPIO_PCLRR_SSI */
+#define GPIO_PCLRR_SSI_0 (0x01)
+#define GPIO_PCLRR_SSI_1 (0x02)
+#define GPIO_PCLRR_SSI_2 (0x04)
+#define GPIO_PCLRR_SSI_3 (0x08)
+#define GPIO_PCLRR_SSI_4 (0x10)
+
+/* Bit definitions and macros for GPIO_PCLRR_BUSCTL */
+#define GPIO_PCLRR_BUSCTL_L0 (0x01)
+#define GPIO_PCLRR_BUSCTL_L1 (0x02)
+#define GPIO_PCLRR_BUSCTL_L2 (0x04)
+#define GPIO_PCLRR_BUSCTL_L3 (0x08)
+
+/* Bit definitions and macros for GPIO_PCLRR_BE */
+#define GPIO_PCLRR_BE_0 (0x01)
+#define GPIO_PCLRR_BE_1 (0x02)
+#define GPIO_PCLRR_BE_2 (0x04)
+#define GPIO_PCLRR_BE_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PCLRR_CS */
+#define GPIO_PCLRR_CS_1 (0x02)
+#define GPIO_PCLRR_CS_2 (0x04)
+#define GPIO_PCLRR_CS_3 (0x08)
+#define GPIO_PCLRR_CS_4 (0x10)
+#define GPIO_PCLRR_CS_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PCLRR_PWM */
+#define GPIO_PCLRR_PWM_2 (0x04)
+#define GPIO_PCLRR_PWM_3 (0x08)
+#define GPIO_PCLRR_PWM_4 (0x10)
+#define GPIO_PCLRR_PWM_5 (0x20)
+
+/* Bit definitions and macros for GPIO_PCLRR_FECI2C */
+#define GPIO_PCLRR_FECI2C_0 (0x01)
+#define GPIO_PCLRR_FECI2C_1 (0x02)
+#define GPIO_PCLRR_FECI2C_2 (0x04)
+#define GPIO_PCLRR_FECI2C_3 (0x08)
+
+/* Bit definitions and macros for GPIO_PCLRR_UART */
+#define GPIO_PCLRR_UART0 (0x01)
+#define GPIO_PCLRR_UART1 (0x02)
+#define GPIO_PCLRR_UART2 (0x04)
+#define GPIO_PCLRR_UART3 (0x08)
+#define GPIO_PCLRR_UART4 (0x10)
+#define GPIO_PCLRR_UART5 (0x20)
+#define GPIO_PCLRR_UART6 (0x40)
+#define GPIO_PCLRR_UART7 (0x80)
+
+/* Bit definitions and macros for GPIO_PCLRR_QSPI */
+#define GPIO_PCLRR_QSPI0 (0x01)
+#define GPIO_PCLRR_QSPI1 (0x02)
+#define GPIO_PCLRR_QSPI2 (0x04)
+#define GPIO_PCLRR_QSPI3 (0x08)
+#define GPIO_PCLRR_QSPI4 (0x10)
+#define GPIO_PCLRR_QSPI5 (0x20)
+
+/* Bit definitions and macros for GPIO_PCLRR_TIMER */
+#define GPIO_PCLRR_TIMER0 (0x01)
+#define GPIO_PCLRR_TIMER1 (0x02)
+#define GPIO_PCLRR_TIMER2 (0x04)
+#define GPIO_PCLRR_TIMER3 (0x08)
+
+/* Bit definitions and macros for GPIO_PCLRR_LCDDATAH */
+#define GPIO_PCLRR_LCDDATAH0 (0x01)
+#define GPIO_PCLRR_LCDDATAH1 (0x02)
+
+/* Bit definitions and macros for GPIO_PCLRR_LCDDATAM */
+#define GPIO_PCLRR_LCDDATAM0 (0x01)
+#define GPIO_PCLRR_LCDDATAM1 (0x02)
+#define GPIO_PCLRR_LCDDATAM2 (0x04)
+#define GPIO_PCLRR_LCDDATAM3 (0x08)
+#define GPIO_PCLRR_LCDDATAM4 (0x10)
+#define GPIO_PCLRR_LCDDATAM5 (0x20)
+#define GPIO_PCLRR_LCDDATAM6 (0x40)
+#define GPIO_PCLRR_LCDDATAM7 (0x80)
+
+/* Bit definitions and macros for GPIO_PCLRR_LCDDATAL */
+#define GPIO_PCLRR_LCDDATAL0 (0x01)
+#define GPIO_PCLRR_LCDDATAL1 (0x02)
+#define GPIO_PCLRR_LCDDATAL2 (0x04)
+#define GPIO_PCLRR_LCDDATAL3 (0x08)
+#define GPIO_PCLRR_LCDDATAL4 (0x10)
+#define GPIO_PCLRR_LCDDATAL5 (0x20)
+#define GPIO_PCLRR_LCDDATAL6 (0x40)
+#define GPIO_PCLRR_LCDDATAL7 (0x80)
+
+/* Bit definitions and macros for GPIO_PCLRR_LCDCTLH */
+#define GPIO_PCLRR_LCDCTLH_PCLRR_LCDCTLH0 (0x01)
+
+/* Bit definitions and macros for GPIO_PCLRR_LCDCTLL */
+#define GPIO_PCLRR_LCDCTLL0 (0x01)
+#define GPIO_PCLRR_LCDCTLL1 (0x02)
+#define GPIO_PCLRR_LCDCTLL2 (0x04)
+#define GPIO_PCLRR_LCDCTLL3 (0x08)
+#define GPIO_PCLRR_LCDCTLL4 (0x10)
+#define GPIO_PCLRR_LCDCTLL5 (0x20)
+#define GPIO_PCLRR_LCDCTLL6 (0x40)
+#define GPIO_PCLRR_LCDCTLL7 (0x80)
+
+/* Bit definitions and macros for GPIO_PAR_FEC */
+#define GPIO_PAR_FEC_MII(x) (((x)&0x03)<<0)
+#define GPIO_PAR_FEC_7W(x) (((x)&0x03)<<2)
+#define GPIO_PAR_FEC_7W_GPIO (0x00)
+#define GPIO_PAR_FEC_7W_URTS1 (0x04)
+#define GPIO_PAR_FEC_7W_FEC (0x0C)
+#define GPIO_PAR_FEC_MII_GPIO (0x00)
+#define GPIO_PAR_FEC_MII_UART (0x01)
+#define GPIO_PAR_FEC_MII_FEC (0x03)
+
+/* Bit definitions and macros for GPIO_PAR_PWM */
+#define GPIO_PAR_PWM1(x) (((x)&0x03)<<0)
+#define GPIO_PAR_PWM3(x) (((x)&0x03)<<2)
+#define GPIO_PAR_PWM5 (0x10)
+#define GPIO_PAR_PWM7 (0x20)
+
+/* Bit definitions and macros for GPIO_PAR_BUSCTL */
+#define GPIO_PAR_BUSCTL_TS(x) (((x)&0x03)<<3)
+#define GPIO_PAR_BUSCTL_RWB (0x20)
+#define GPIO_PAR_BUSCTL_TA (0x40)
+#define GPIO_PAR_BUSCTL_OE (0x80)
+#define GPIO_PAR_BUSCTL_OE_GPIO (0x00)
+#define GPIO_PAR_BUSCTL_OE_OE (0x80)
+#define GPIO_PAR_BUSCTL_TA_GPIO (0x00)
+#define GPIO_PAR_BUSCTL_TA_TA (0x40)
+#define GPIO_PAR_BUSCTL_RWB_GPIO (0x00)
+#define GPIO_PAR_BUSCTL_RWB_RWB (0x20)
+#define GPIO_PAR_BUSCTL_TS_GPIO (0x00)
+#define GPIO_PAR_BUSCTL_TS_DACK0 (0x10)
+#define GPIO_PAR_BUSCTL_TS_TS (0x18)
+
+/* Bit definitions and macros for GPIO_PAR_FECI2C */
+#define GPIO_PAR_FECI2C_SDA(x) (((x)&0x03)<<0)
+#define GPIO_PAR_FECI2C_SCL(x) (((x)&0x03)<<2)
+#define GPIO_PAR_FECI2C_MDIO(x) (((x)&0x03)<<4)
+#define GPIO_PAR_FECI2C_MDC(x) (((x)&0x03)<<6)
+#define GPIO_PAR_FECI2C_MDC_GPIO (0x00)
+#define GPIO_PAR_FECI2C_MDC_UTXD2 (0x40)
+#define GPIO_PAR_FECI2C_MDC_SCL (0x80)
+#define GPIO_PAR_FECI2C_MDC_EMDC (0xC0)
+#define GPIO_PAR_FECI2C_MDIO_GPIO (0x00)
+#define GPIO_PAR_FECI2C_MDIO_URXD2 (0x10)
+#define GPIO_PAR_FECI2C_MDIO_SDA (0x20)
+#define GPIO_PAR_FECI2C_MDIO_EMDIO (0x30)
+#define GPIO_PAR_FECI2C_SCL_GPIO (0x00)
+#define GPIO_PAR_FECI2C_SCL_UTXD2 (0x04)
+#define GPIO_PAR_FECI2C_SCL_SCL (0x0C)
+#define GPIO_PAR_FECI2C_SDA_GPIO (0x00)
+#define GPIO_PAR_FECI2C_SDA_URXD2 (0x02)
+#define GPIO_PAR_FECI2C_SDA_SDA (0x03)
+
+/* Bit definitions and macros for GPIO_PAR_BE */
+#define GPIO_PAR_BE0 (0x01)
+#define GPIO_PAR_BE1 (0x02)
+#define GPIO_PAR_BE2 (0x04)
+#define GPIO_PAR_BE3 (0x08)
+
+/* Bit definitions and macros for GPIO_PAR_CS */
+#define GPIO_PAR_CS1 (0x02)
+#define GPIO_PAR_CS2 (0x04)
+#define GPIO_PAR_CS3 (0x08)
+#define GPIO_PAR_CS4 (0x10)
+#define GPIO_PAR_CS5 (0x20)
+#define GPIO_PAR_CS1_GPIO (0x00)
+#define GPIO_PAR_CS1_SDCS1 (0x01)
+#define GPIO_PAR_CS1_CS1 (0x03)
+
+/* Bit definitions and macros for GPIO_PAR_SSI */
+#define GPIO_PAR_SSI_MCLK (0x0080)
+#define GPIO_PAR_SSI_TXD(x) (((x)&0x0003)<<8)
+#define GPIO_PAR_SSI_RXD(x) (((x)&0x0003)<<10)
+#define GPIO_PAR_SSI_FS(x) (((x)&0x0003)<<12)
+#define GPIO_PAR_SSI_BCLK(x) (((x)&0x0003)<<14)
+
+/* Bit definitions and macros for GPIO_PAR_UART */
+#define GPIO_PAR_UART_TXD0 (0x0001)
+#define GPIO_PAR_UART_RXD0 (0x0002)
+#define GPIO_PAR_UART_RTS0 (0x0004)
+#define GPIO_PAR_UART_CTS0 (0x0008)
+#define GPIO_PAR_UART_TXD1(x) (((x)&0x0003)<<4)
+#define GPIO_PAR_UART_RXD1(x) (((x)&0x0003)<<6)
+#define GPIO_PAR_UART_RTS1(x) (((x)&0x0003)<<8)
+#define GPIO_PAR_UART_CTS1(x) (((x)&0x0003)<<10)
+#define GPIO_PAR_UART_CTS1_GPIO (0x0000)
+#define GPIO_PAR_UART_CTS1_SSI_BCLK (0x0800)
+#define GPIO_PAR_UART_CTS1_ULPI_D7 (0x0400)
+#define GPIO_PAR_UART_CTS1_UCTS1 (0x0C00)
+#define GPIO_PAR_UART_RTS1_GPIO (0x0000)
+#define GPIO_PAR_UART_RTS1_SSI_FS (0x0200)
+#define GPIO_PAR_UART_RTS1_ULPI_D6 (0x0100)
+#define GPIO_PAR_UART_RTS1_URTS1 (0x0300)
+#define GPIO_PAR_UART_RXD1_GPIO (0x0000)
+#define GPIO_PAR_UART_RXD1_SSI_RXD (0x0080)
+#define GPIO_PAR_UART_RXD1_ULPI_D5 (0x0040)
+#define GPIO_PAR_UART_RXD1_URXD1 (0x00C0)
+#define GPIO_PAR_UART_TXD1_GPIO (0x0000)
+#define GPIO_PAR_UART_TXD1_SSI_TXD (0x0020)
+#define GPIO_PAR_UART_TXD1_ULPI_D4 (0x0010)
+#define GPIO_PAR_UART_TXD1_UTXD1 (0x0030)
+
+/* Bit definitions and macros for GPIO_PAR_QSPI */
+#define GPIO_PAR_QSPI_SCK(x) (((x)&0x0003)<<4)
+#define GPIO_PAR_QSPI_DOUT(x) (((x)&0x0003)<<6)
+#define GPIO_PAR_QSPI_DIN(x) (((x)&0x0003)<<8)
+#define GPIO_PAR_QSPI_PCS0(x) (((x)&0x0003)<<10)
+#define GPIO_PAR_QSPI_PCS1(x) (((x)&0x0003)<<12)
+#define GPIO_PAR_QSPI_PCS2(x) (((x)&0x0003)<<14)
+
+/* Bit definitions and macros for GPIO_PAR_TIMER */
+#define GPIO_PAR_TIN0(x) (((x)&0x03)<<0)
+#define GPIO_PAR_TIN1(x) (((x)&0x03)<<2)
+#define GPIO_PAR_TIN2(x) (((x)&0x03)<<4)
+#define GPIO_PAR_TIN3(x) (((x)&0x03)<<6)
+#define GPIO_PAR_TIN3_GPIO (0x00)
+#define GPIO_PAR_TIN3_TOUT3 (0x80)
+#define GPIO_PAR_TIN3_URXD2 (0x40)
+#define GPIO_PAR_TIN3_TIN3 (0xC0)
+#define GPIO_PAR_TIN2_GPIO (0x00)
+#define GPIO_PAR_TIN2_TOUT2 (0x20)
+#define GPIO_PAR_TIN2_UTXD2 (0x10)
+#define GPIO_PAR_TIN2_TIN2 (0x30)
+#define GPIO_PAR_TIN1_GPIO (0x00)
+#define GPIO_PAR_TIN1_TOUT1 (0x08)
+#define GPIO_PAR_TIN1_DACK1 (0x04)
+#define GPIO_PAR_TIN1_TIN1 (0x0C)
+#define GPIO_PAR_TIN0_GPIO (0x00)
+#define GPIO_PAR_TIN0_TOUT0 (0x02)
+#define GPIO_PAR_TIN0_DREQ0 (0x01)
+#define GPIO_PAR_TIN0_TIN0 (0x03)
+
+/* Bit definitions and macros for GPIO_PAR_LCDDATA */
+#define GPIO_PAR_LCDDATA_LD7_0(x) ((x)&0x03)
+#define GPIO_PAR_LCDDATA_LD15_8(x) (((x)&0x03)<<2)
+#define GPIO_PAR_LCDDATA_LD16(x) (((x)&0x03)<<4)
+#define GPIO_PAR_LCDDATA_LD17(x) (((x)&0x03)<<6)
+
+/* Bit definitions and macros for GPIO_PAR_LCDCTL */
+#define GPIO_PAR_LCDCTL_CLS (0x0001)
+#define GPIO_PAR_LCDCTL_PS (0x0002)
+#define GPIO_PAR_LCDCTL_REV (0x0004)
+#define GPIO_PAR_LCDCTL_SPL_SPR (0x0008)
+#define GPIO_PAR_LCDCTL_CONTRAST (0x0010)
+#define GPIO_PAR_LCDCTL_LSCLK (0x0020)
+#define GPIO_PAR_LCDCTL_LP_HSYNC (0x0040)
+#define GPIO_PAR_LCDCTL_FLM_VSYNC (0x0080)
+#define GPIO_PAR_LCDCTL_ACD_OE (0x0100)
+
+/* Bit definitions and macros for GPIO_PAR_IRQ */
+#define GPIO_PAR_IRQ1(x) (((x)&0x0003)<<4)
+#define GPIO_PAR_IRQ2(x) (((x)&0x0003)<<6)
+#define GPIO_PAR_IRQ4(x) (((x)&0x0003)<<8)
+#define GPIO_PAR_IRQ5(x) (((x)&0x0003)<<10)
+#define GPIO_PAR_IRQ6(x) (((x)&0x0003)<<12)
+
+/* Bit definitions and macros for GPIO_MSCR_FLEXBUS */
+#define GPIO_MSCR_FLEXBUS_ADDRCTL(x) ((x)&0x03)
+#define GPIO_MSCR_FLEXBUS_DLOWER(x) (((x)&0x03)<<2)
+#define GPIO_MSCR_FLEXBUS_DUPPER(x) (((x)&0x03)<<4)
+
+/* Bit definitions and macros for GPIO_MSCR_SDRAM */
+#define GPIO_MSCR_SDRAM_SDRAM(x) ((x)&0x03)
+#define GPIO_MSCR_SDRAM_SDCLK(x) (((x)&0x03)<<2)
+#define GPIO_MSCR_SDRAM_SDCLKB(x) (((x)&0x03)<<4)
+
+/* Bit definitions and macros for GPIO_DSCR_I2C */
+#define GPIO_DSCR_I2C_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_PWM */
+#define GPIO_DSCR_PWM_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_FEC */
+#define GPIO_DSCR_FEC_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_UART */
+#define GPIO_DSCR_UART0_DSE(x) ((x)&0x03)
+#define GPIO_DSCR_UART1_DSE(x) (((x)&0x03)<<2)
+
+/* Bit definitions and macros for GPIO_DSCR_QSPI */
+#define GPIO_DSCR_QSPI_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_TIMER */
+#define GPIO_DSCR_TIMER_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_SSI */
+#define GPIO_DSCR_SSI_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_LCD */
+#define GPIO_DSCR_LCD_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_DEBUG */
+#define GPIO_DSCR_DEBUG_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_CLKRST */
+#define GPIO_DSCR_CLKRST_DSE(x) ((x)&0x03)
+
+/* Bit definitions and macros for GPIO_DSCR_IRQ */
+#define GPIO_DSCR_IRQ_DSE(x) ((x)&0x03)
+
+/* not done yet */
+/*********************************************************************
+* LCD Controller (LCDC)
+*********************************************************************/
+/* Bit definitions and macros for LCDC_LSSAR */
+#define LCDC_LSSAR_SSA(x) (((x)&0x3FFFFFFF)<<2)
+
+/* Bit definitions and macros for LCDC_LSR */
+#define LCDC_LSR_YMAX(x) (((x)&0x000003FF)<<0)
+#define LCDC_LSR_XMAX(x) (((x)&0x0000003F)<<20)
+
+/* Bit definitions and macros for LCDC_LVPWR */
+#define LCDC_LVPWR_VPW(x) (((x)&0x000003FF)<<0)
+
+/* Bit definitions and macros for LCDC_LCPR */
+#define LCDC_LCPR_CYP(x) (((x)&0x000003FF)<<0)
+#define LCDC_LCPR_CXP(x) (((x)&0x000003FF)<<16)
+#define LCDC_LCPR_OP (0x10000000)
+#define LCDC_LCPR_CC(x) (((x)&0x00000003)<<30)
+#define LCDC_LCPR_CC_TRANSPARENT (0x00000000)
+#define LCDC_LCPR_CC_OR (0x40000000)
+#define LCDC_LCPR_CC_XOR (0x80000000)
+#define LCDC_LCPR_CC_AND (0xC0000000)
+#define LCDC_LCPR_OP_ON (0x10000000)
+#define LCDC_LCPR_OP_OFF (0x00000000)
+
+/* Bit definitions and macros for LCDC_LCWHBR */
+#define LCDC_LCWHBR_BD(x) (((x)&0x000000FF)<<0)
+#define LCDC_LCWHBR_CH(x) (((x)&0x0000001F)<<16)
+#define LCDC_LCWHBR_CW(x) (((x)&0x0000001F)<<24)
+#define LCDC_LCWHBR_BK_EN (0x80000000)
+#define LCDC_LCWHBR_BK_EN_ON (0x80000000)
+#define LCDC_LCWHBR_BK_EN_OFF (0x00000000)
+
+/* Bit definitions and macros for LCDC_LCCMR */
+#define LCDC_LCCMR_CUR_COL_B(x) (((x)&0x0000003F)<<0)
+#define LCDC_LCCMR_CUR_COL_G(x) (((x)&0x0000003F)<<6)
+#define LCDC_LCCMR_CUR_COL_R(x) (((x)&0x0000003F)<<12)
+
+/* Bit definitions and macros for LCDC_LPCR */
+#define LCDC_LPCR_PCD(x) (((x)&0x0000003F)<<0)
+#define LCDC_LPCR_SHARP (0x00000040)
+#define LCDC_LPCR_SCLKSEL (0x00000080)
+#define LCDC_LPCR_ACD(x) (((x)&0x0000007F)<<8)
+#define LCDC_LPCR_ACDSEL (0x00008000)
+#define LCDC_LPCR_REV_VS (0x00010000)
+#define LCDC_LPCR_SWAP_SEL (0x00020000)
+#define LCDC_LPCR_ENDSEL (0x00040000)
+#define LCDC_LPCR_SCLKIDLE (0x00080000)
+#define LCDC_LPCR_OEPOL (0x00100000)
+#define LCDC_LPCR_CLKPOL (0x00200000)
+#define LCDC_LPCR_LPPOL (0x00400000)
+#define LCDC_LPCR_FLM (0x00800000)
+#define LCDC_LPCR_PIXPOL (0x01000000)
+#define LCDC_LPCR_BPIX(x) (((x)&0x00000007)<<25)
+#define LCDC_LPCR_PBSIZ(x) (((x)&0x00000003)<<28)
+#define LCDC_LPCR_COLOR (0x40000000)
+#define LCDC_LPCR_TFT (0x80000000)
+#define LCDC_LPCR_MODE_MONOCHROME (0x00000000)
+#define LCDC_LPCR_MODE_CSTN (0x40000000)
+#define LCDC_LPCR_MODE_TFT (0xC0000000)
+#define LCDC_LPCR_PBSIZ_1 (0x00000000)
+#define LCDC_LPCR_PBSIZ_2 (0x10000000)
+#define LCDC_LPCR_PBSIZ_4 (0x20000000)
+#define LCDC_LPCR_PBSIZ_8 (0x30000000)
+#define LCDC_LPCR_BPIX_1bpp (0x00000000)
+#define LCDC_LPCR_BPIX_2bpp (0x02000000)
+#define LCDC_LPCR_BPIX_4bpp (0x04000000)
+#define LCDC_LPCR_BPIX_8bpp (0x06000000)
+#define LCDC_LPCR_BPIX_12bpp (0x08000000)
+#define LCDC_LPCR_BPIX_16bpp (0x0A000000)
+#define LCDC_LPCR_BPIX_18bpp (0x0C000000)
+
+#define LCDC_LPCR_PANEL_TYPE(x) (((x)&0x00000003)<<30)
+
+/* Bit definitions and macros for LCDC_LHCR */
+#define LCDC_LHCR_H_WAIT_2(x) (((x)&0x000000FF)<<0)
+#define LCDC_LHCR_H_WAIT_1(x) (((x)&0x000000FF)<<8)
+#define LCDC_LHCR_H_WIDTH(x) (((x)&0x0000003F)<<26)
+
+/* Bit definitions and macros for LCDC_LVCR */
+#define LCDC_LVCR_V_WAIT_2(x) (((x)&0x000000FF)<<0)
+#define LCDC_LVCR_V_WAIT_1(x) (((x)&0x000000FF)<<8)
+#define LCDC_LVCR_V_WIDTH(x) (((x)&0x0000003F)<<26)
+
+/* Bit definitions and macros for LCDC_LPOR */
+#define LCDC_LPOR_POS(x) (((x)&0x0000001F)<<0)
+
+/* Bit definitions and macros for LCDC_LPCCR */
+#define LCDC_LPCCR_PW(x) (((x)&0x000000FF)<<0)
+#define LCDC_LPCCR_CC_EN (0x00000100)
+#define LCDC_LPCCR_SCR(x) (((x)&0x00000003)<<9)
+#define LCDC_LPCCR_LDMSK (0x00008000)
+#define LCDC_LPCCR_CLS_HI_WIDTH(x) (((x)&0x000001FF)<<16)
+#define LCDC_LPCCR_SCR_LINEPULSE (0x00000000)
+#define LCDC_LPCCR_SCR_PIXELCLK (0x00002000)
+#define LCDC_LPCCR_SCR_LCDCLOCK (0x00004000)
+
+/* Bit definitions and macros for LCDC_LDCR */
+#define LCDC_LDCR_TM(x) (((x)&0x0000001F)<<0)
+#define LCDC_LDCR_HM(x) (((x)&0x0000001F)<<16)
+#define LCDC_LDCR_BURST (0x80000000)
+
+/* Bit definitions and macros for LCDC_LRMCR */
+#define LCDC_LRMCR_SEL_REF (0x00000001)
+
+/* Bit definitions and macros for LCDC_LICR */
+#define LCDC_LICR_INTCON (0x00000001)
+#define LCDC_LICR_INTSYN (0x00000004)
+#define LCDC_LICR_GW_INT_CON (0x00000010)
+
+/* Bit definitions and macros for LCDC_LIER */
+#define LCDC_LIER_BOF_EN (0x00000001)
+#define LCDC_LIER_EOF_EN (0x00000002)
+#define LCDC_LIER_ERR_RES_EN (0x00000004)
+#define LCDC_LIER_UDR_ERR_EN (0x00000008)
+#define LCDC_LIER_GW_BOF_EN (0x00000010)
+#define LCDC_LIER_GW_EOF_EN (0x00000020)
+#define LCDC_LIER_GW_ERR_RES_EN (0x00000040)
+#define LCDC_LIER_GW_UDR_ERR_EN (0x00000080)
+
+/* Bit definitions and macros for LCDC_LISR */
+#define LCDC_LISR_BOF (0x00000001)
+#define LCDC_LISR_EOF (0x00000002)
+#define LCDC_LISR_ERR_RES (0x00000004)
+#define LCDC_LISR_UDR_ERR (0x00000008)
+#define LCDC_LISR_GW_BOF (0x00000010)
+#define LCDC_LISR_GW_EOF (0x00000020)
+#define LCDC_LISR_GW_ERR_RES (0x00000040)
+#define LCDC_LISR_GW_UDR_ERR (0x00000080)
+
+/* Bit definitions and macros for LCDC_LGWSAR */
+#define LCDC_LGWSAR_GWSA(x) (((x)&0x3FFFFFFF)<<2)
+
+/* Bit definitions and macros for LCDC_LGWSR */
+#define LCDC_LGWSR_GWH(x) (((x)&0x000003FF)<<0)
+#define LCDC_LGWSR_GWW(x) (((x)&0x0000003F)<<20)
+
+/* Bit definitions and macros for LCDC_LGWVPWR */
+#define LCDC_LGWVPWR_GWVPW(x) (((x)&0x000003FF)<<0)
+
+/* Bit definitions and macros for LCDC_LGWPOR */
+#define LCDC_LGWPOR_GWPO(x) (((x)&0x0000001F)<<0)
+
+/* Bit definitions and macros for LCDC_LGWPR */
+#define LCDC_LGWPR_GWYP(x) (((x)&0x000003FF)<<0)
+#define LCDC_LGWPR_GWXP(x) (((x)&0x000003FF)<<16)
+
+/* Bit definitions and macros for LCDC_LGWCR */
+#define LCDC_LGWCR_GWCKB(x) (((x)&0x0000003F)<<0)
+#define LCDC_LGWCR_GWCKG(x) (((x)&0x0000003F)<<6)
+#define LCDC_LGWCR_GWCKR(x) (((x)&0x0000003F)<<12)
+#define LCDC_LGWCR_GW_RVS (0x00200000)
+#define LCDC_LGWCR_GWE (0x00400000)
+#define LCDC_LGWCR_GWCKE (0x00800000)
+#define LCDC_LGWCR_GWAV(x) (((x)&0x000000FF)<<24)
+
+/* Bit definitions and macros for LCDC_LGWDCR */
+#define LCDC_LGWDCR_GWTM(x) (((x)&0x0000001F)<<0)
+#define LCDC_LGWDCR_GWHM(x) (((x)&0x0000001F)<<16)
+#define LCDC_LGWDCR_GWBT (0x80000000)
+
+/*********************************************************************
+* SDRAM Controller (SDRAMC)
+*********************************************************************/
+/* Bit definitions and macros for SDRAMC_SDMR */
+#define SDRAMC_SDMR_BNKAD_LEMR (0x40000000)
+#define SDRAMC_SDMR_BNKAD_LMR (0x00000000)
+#define SDRAMC_SDMR_AD(x) (((x)&0x00000FFF)<<18)
+#define SDRAMC_SDMR_CMD (0x00010000)
+
+/* Bit definitions and macros for SDRAMC_SDCR */
+#define SDRAMC_SDCR_MODE_EN (0x80000000)
+#define SDRAMC_SDCR_CKE (0x40000000)
+#define SDRAMC_SDCR_DDR (0x20000000)
+#define SDRAMC_SDCR_REF (0x10000000)
+#define SDRAMC_SDCR_MUX(x) (((x)&0x00000003)<<24)
+#define SDRAMC_SDCR_OE_RULE (0x00400000)
+#define SDRAMC_SDCR_RCNT(x) (((x)&0x0000003F)<<16)
+#define SDRAMC_SDCR_PS_32 (0x00000000)
+#define SDRAMC_SDCR_PS_16 (0x00002000)
+#define SDRAMC_SDCR_DQS_OE(x) (((x)&0x0000000F)<<8)
+#define SDRAMC_SDCR_IREF (0x00000004)
+#define SDRAMC_SDCR_IPALL (0x00000002)
+
+/* Bit definitions and macros for SDRAMC_SDCFG1 */
+#define SDRAMC_SDCFG1_SRD2RW(x) (((x)&0x0000000F)<<28)
+#define SDRAMC_SDCFG1_SWT2RD(x) (((x)&0x00000007)<<24)
+#define SDRAMC_SDCFG1_RDLAT(x) (((x)&0x0000000F)<<20)
+#define SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16)
+#define SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12)
+#define SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8)
+#define SDRAMC_SDCFG1_WTLAT(x) (((x)&0x00000007)<<4)
+
+/* Bit definitions and macros for SDRAMC_SDCFG2 */
+#define SDRAMC_SDCFG2_BRD2PRE(x) (((x)&0x0000000F)<<28)
+#define SDRAMC_SDCFG2_BWT2RW(x) (((x)&0x0000000F)<<24)
+#define SDRAMC_SDCFG2_BRD2WT(x) (((x)&0x0000000F)<<20)
+#define SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16)
+
+/* Bit definitions and macros for SDRAMC_SDDS */
+#define SDRAMC_SDDS_SB_E(x) (((x)&0x00000003)<<8)
+#define SDRAMC_SDDS_SB_C(x) (((x)&0x00000003)<<6)
+#define SDRAMC_SDDS_SB_A(x) (((x)&0x00000003)<<4)
+#define SDRAMC_SDDS_SB_S(x) (((x)&0x00000003)<<2)
+#define SDRAMC_SDDS_SB_D(x) ((x)&0x00000003)
+
+/* Bit definitions and macros for SDRAMC_SDCS */
+#define SDRAMC_SDCS_BASE(x) (((x)&0x00000FFF)<<20)
+#define SDRAMC_SDCS_CSSZ(x) ((x)&0x0000001F)
+#define SDRAMC_SDCS_CSSZ_4GBYTE (0x0000001F)
+#define SDRAMC_SDCS_CSSZ_2GBYTE (0x0000001E)
+#define SDRAMC_SDCS_CSSZ_1GBYTE (0x0000001D)
+#define SDRAMC_SDCS_CSSZ_512MBYTE (0x0000001C)
+#define SDRAMC_SDCS_CSSZ_256MBYTE (0x0000001B)
+#define SDRAMC_SDCS_CSSZ_128MBYTE (0x0000001A)
+#define SDRAMC_SDCS_CSSZ_64MBYTE (0x00000019)
+#define SDRAMC_SDCS_CSSZ_32MBYTE (0x00000018)
+#define SDRAMC_SDCS_CSSZ_16MBYTE (0x00000017)
+#define SDRAMC_SDCS_CSSZ_8MBYTE (0x00000016)
+#define SDRAMC_SDCS_CSSZ_4MBYTE (0x00000015)
+#define SDRAMC_SDCS_CSSZ_2MBYTE (0x00000014)
+#define SDRAMC_SDCS_CSSZ_1MBYTE (0x00000013)
+#define SDRAMC_SDCS_CSSZ_DIABLE (0x00000000)
+
+/*********************************************************************
+* Synchronous Serial Interface (SSI)
+*********************************************************************/
+/* Bit definitions and macros for SSI_CR */
+#define SSI_CR_CIS (0x00000200)
+#define SSI_CR_TCH (0x00000100)
+#define SSI_CR_MCE (0x00000080)
+#define SSI_CR_I2S_SLAVE (0x00000040)
+#define SSI_CR_I2S_MASTER (0x00000020)
+#define SSI_CR_I2S_NORMAL (0x00000000)
+#define SSI_CR_SYN (0x00000010)
+#define SSI_CR_NET (0x00000008)
+#define SSI_CR_RE (0x00000004)
+#define SSI_CR_TE (0x00000002)
+#define SSI_CR_SSI_EN (0x00000001)
+
+/* Bit definitions and macros for SSI_ISR */
+#define SSI_ISR_CMDAU (0x00040000)
+#define SSI_ISR_CMDDU (0x00020000)
+#define SSI_ISR_RXT (0x00010000)
+#define SSI_ISR_RDR1 (0x00008000)
+#define SSI_ISR_RDR0 (0x00004000)
+#define SSI_ISR_TDE1 (0x00002000)
+#define SSI_ISR_TDE0 (0x00001000)
+#define SSI_ISR_ROE1 (0x00000800)
+#define SSI_ISR_ROE0 (0x00000400)
+#define SSI_ISR_TUE1 (0x00000200)
+#define SSI_ISR_TUE0 (0x00000100)
+#define SSI_ISR_TFS (0x00000080)
+#define SSI_ISR_RFS (0x00000040)
+#define SSI_ISR_TLS (0x00000020)
+#define SSI_ISR_RLS (0x00000010)
+#define SSI_ISR_RFF1 (0x00000008)
+#define SSI_ISR_RFF0 (0x00000004)
+#define SSI_ISR_TFE1 (0x00000002)
+#define SSI_ISR_TFE0 (0x00000001)
+
+/* Bit definitions and macros for SSI_IER */
+#define SSI_IER_RDMAE (0x00400000)
+#define SSI_IER_RIE (0x00200000)
+#define SSI_IER_TDMAE (0x00100000)
+#define SSI_IER_TIE (0x00080000)
+#define SSI_IER_CMDAU (0x00040000)
+#define SSI_IER_CMDU (0x00020000)
+#define SSI_IER_RXT (0x00010000)
+#define SSI_IER_RDR1 (0x00008000)
+#define SSI_IER_RDR0 (0x00004000)
+#define SSI_IER_TDE1 (0x00002000)
+#define SSI_IER_TDE0 (0x00001000)
+#define SSI_IER_ROE1 (0x00000800)
+#define SSI_IER_ROE0 (0x00000400)
+#define SSI_IER_TUE1 (0x00000200)
+#define SSI_IER_TUE0 (0x00000100)
+#define SSI_IER_TFS (0x00000080)
+#define SSI_IER_RFS (0x00000040)
+#define SSI_IER_TLS (0x00000020)
+#define SSI_IER_RLS (0x00000010)
+#define SSI_IER_RFF1 (0x00000008)
+#define SSI_IER_RFF0 (0x00000004)
+#define SSI_IER_TFE1 (0x00000002)
+#define SSI_IER_TFE0 (0x00000001)
+
+/* Bit definitions and macros for SSI_TCR */
+#define SSI_TCR_TXBIT0 (0x00000200)
+#define SSI_TCR_TFEN1 (0x00000100)
+#define SSI_TCR_TFEN0 (0x00000080)
+#define SSI_TCR_TFDIR (0x00000040)
+#define SSI_TCR_TXDIR (0x00000020)
+#define SSI_TCR_TSHFD (0x00000010)
+#define SSI_TCR_TSCKP (0x00000008)
+#define SSI_TCR_TFSI (0x00000004)
+#define SSI_TCR_TFSL (0x00000002)
+#define SSI_TCR_TEFS (0x00000001)
+
+/* Bit definitions and macros for SSI_RCR */
+#define SSI_RCR_RXEXT (0x00000400)
+#define SSI_RCR_RXBIT0 (0x00000200)
+#define SSI_RCR_RFEN1 (0x00000100)
+#define SSI_RCR_RFEN0 (0x00000080)
+#define SSI_RCR_RSHFD (0x00000010)
+#define SSI_RCR_RSCKP (0x00000008)
+#define SSI_RCR_RFSI (0x00000004)
+#define SSI_RCR_RFSL (0x00000002)
+#define SSI_RCR_REFS (0x00000001)
+
+/* Bit definitions and macros for SSI_CCR */
+#define SSI_CCR_DIV2 (0x00040000)
+#define SSI_CCR_PSR (0x00020000)
+#define SSI_CCR_WL(x) (((x)&0x0000000F)<<13)
+#define SSI_CCR_DC(x) (((x)&0x0000001F)<<8)
+#define SSI_CCR_PM(x) ((x)&0x000000FF)
+
+/* Bit definitions and macros for SSI_FCSR */
+#define SSI_FCSR_RFCNT1(x) (((x)&0x0000000F)<<28)
+#define SSI_FCSR_TFCNT1(x) (((x)&0x0000000F)<<24)
+#define SSI_FCSR_RFWM1(x) (((x)&0x0000000F)<<20)
+#define SSI_FCSR_TFWM1(x) (((x)&0x0000000F)<<16)
+#define SSI_FCSR_RFCNT0(x) (((x)&0x0000000F)<<12)
+#define SSI_FCSR_TFCNT0(x) (((x)&0x0000000F)<<8)
+#define SSI_FCSR_RFWM0(x) (((x)&0x0000000F)<<4)
+#define SSI_FCSR_TFWM0(x) ((x)&0x0000000F)
+
+/* Bit definitions and macros for SSI_ACR */
+#define SSI_ACR_FRDIV(x) (((x)&0x0000003F)<<5)
+#define SSI_ACR_WR (0x00000010)
+#define SSI_ACR_RD (0x00000008)
+#define SSI_ACR_TIF (0x00000004)
+#define SSI_ACR_FV (0x00000002)
+#define SSI_ACR_AC97EN (0x00000001)
+
+/* Bit definitions and macros for SSI_ACADD */
+#define SSI_ACADD_SSI_ACADD(x) ((x)&0x0007FFFF)
+
+/* Bit definitions and macros for SSI_ACDAT */
+#define SSI_ACDAT_SSI_ACDAT(x) ((x)&0x0007FFFF)
+
+/* Bit definitions and macros for SSI_ATAG */
+#define SSI_ATAG_DDI_ATAG(x) ((x)&0x0000FFFF)
+
+/*********************************************************************
+* Phase Locked Loop (PLL)
+*********************************************************************/
+/* Bit definitions and macros for PLL_PODR */
+#define PLL_PODR_CPUDIV(x) (((x)&0x0F)<<4)
+#define PLL_PODR_BUSDIV(x) ((x)&0x0F)
+
+/* Bit definitions and macros for PLL_PLLCR */
+#define PLL_PLLCR_DITHEN (0x80)
+#define PLL_PLLCR_DITHDEV(x) ((x)&0x07)
+
+#endif /* mcf5329_h */
diff --git a/include/asm-m68k/m5445x.h b/include/asm-m68k/m5445x.h
new file mode 100644
index 0000000..8b886b0
--- /dev/null
+++ b/include/asm-m68k/m5445x.h
@@ -0,0 +1,1541 @@
+/*
+ * MCF5445x Internal Memory Map
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MCF5445X__
+#define __MCF5445X__
+
+/*********************************************************************
+* Cross-bar switch (XBS)
+*********************************************************************/
+
+/* Bit definitions and macros for PRS group */
+#define XBS_PRS_M0(x) (((x)&0x00000007)) /* Core */
+#define XBS_PRS_M1(x) (((x)&0x00000007)<<4) /* eDMA */
+#define XBS_PRS_M2(x) (((x)&0x00000007)<<8) /* FEC0 */
+#define XBS_PRS_M3(x) (((x)&0x00000007)<<12) /* FEC1 */
+#define XBS_PRS_M5(x) (((x)&0x00000007)<<20) /* PCI controller */
+#define XBS_PRS_M6(x) (((x)&0x00000007)<<24) /* USB OTG */
+#define XBS_PRS_M7(x) (((x)&0x00000007)<<28) /* Serial Boot */
+
+/* Bit definitions and macros for CRS group */
+#define XBS_CRS_PARK(x) (((x)&0x00000007)) /* Master parking ctrl */
+#define XBS_CRS_PCTL(x) (((x)&0x00000003)<<4) /* Parking mode ctrl */
+#define XBS_CRS_ARB (0x00000100) /* Arbitration Mode */
+#define XBS_CRS_RO (0x80000000) /* Read Only */
+
+#define XBS_CRS_PCTL_PARK_FIELD (0)
+#define XBS_CRS_PCTL_PARK_ON_LAST (1)
+#define XBS_CRS_PCTL_PARK_NONE (2)
+#define XBS_CRS_PCTL_PARK_CORE (0)
+#define XBS_CRS_PCTL_PARK_EDMA (1)
+#define XBS_CRS_PCTL_PARK_FEC0 (2)
+#define XBS_CRS_PCTL_PARK_FEC1 (3)
+#define XBS_CRS_PCTL_PARK_PCI (5)
+#define XBS_CRS_PCTL_PARK_USB (6)
+#define XBS_CRS_PCTL_PARK_SBF (7)
+
+/*********************************************************************
+* FlexBus Chip Selects (FBCS)
+*********************************************************************/
+
+/* Bit definitions and macros for CSAR group */
+#define FBCS_CSAR_BA(x) ((x)&0xFFFF0000)
+
+/* Bit definitions and macros for CSMR group */
+#define FBCS_CSMR_V (0x00000001) /* Valid bit */
+#define FBCS_CSMR_WP (0x00000100) /* Write protect */
+#define FBCS_CSMR_BAM(x) (((x)&0x0000FFFF)<<16) /* Base address mask */
+#define FBCS_CSMR_BAM_4G (0xFFFF0000)
+#define FBCS_CSMR_BAM_2G (0x7FFF0000)
+#define FBCS_CSMR_BAM_1G (0x3FFF0000)
+#define FBCS_CSMR_BAM_1024M (0x3FFF0000)
+#define FBCS_CSMR_BAM_512M (0x1FFF0000)
+#define FBCS_CSMR_BAM_256M (0x0FFF0000)
+#define FBCS_CSMR_BAM_128M (0x07FF0000)
+#define FBCS_CSMR_BAM_64M (0x03FF0000)
+#define FBCS_CSMR_BAM_32M (0x01FF0000)
+#define FBCS_CSMR_BAM_16M (0x00FF0000)
+#define FBCS_CSMR_BAM_8M (0x007F0000)
+#define FBCS_CSMR_BAM_4M (0x003F0000)
+#define FBCS_CSMR_BAM_2M (0x001F0000)
+#define FBCS_CSMR_BAM_1M (0x000F0000)
+#define FBCS_CSMR_BAM_1024K (0x000F0000)
+#define FBCS_CSMR_BAM_512K (0x00070000)
+#define FBCS_CSMR_BAM_256K (0x00030000)
+#define FBCS_CSMR_BAM_128K (0x00010000)
+#define FBCS_CSMR_BAM_64K (0x00000000)
+
+/* Bit definitions and macros for CSCR group */
+#define FBCS_CSCR_BSTW (0x00000008) /* Burst-write enable */
+#define FBCS_CSCR_BSTR (0x00000010) /* Burst-read enable */
+#define FBCS_CSCR_BEM (0x00000020) /* Byte-enable mode */
+#define FBCS_CSCR_PS(x) (((x)&0x00000003)<<6) /* Port size */
+#define FBCS_CSCR_AA (0x00000100) /* Auto-acknowledge */
+#define FBCS_CSCR_WS(x) (((x)&0x0000003F)<<10) /* Wait states */
+#define FBCS_CSCR_WRAH(x) (((x)&0x00000003)<<16) /* Write address hold or deselect */
+#define FBCS_CSCR_RDAH(x) (((x)&0x00000003)<<18) /* Read address hold or deselect */
+#define FBCS_CSCR_ASET(x) (((x)&0x00000003)<<20) /* Address setup */
+#define FBCS_CSCR_SWSEN (0x00800000) /* Secondary wait state enable */
+#define FBCS_CSCR_SWS(x) (((x)&0x0000003F)<<26) /* Secondary wait states */
+
+#define FBCS_CSCR_PS_8 (0x00000040)
+#define FBCS_CSCR_PS_16 (0x00000080)
+#define FBCS_CSCR_PS_32 (0x00000000)
+
+/*********************************************************************
+* Interrupt Controller (INTC)
+*********************************************************************/
+#define INT0_LO_RSVD0 (0)
+#define INT0_LO_EPORT1 (1)
+#define INT0_LO_EPORT2 (2)
+#define INT0_LO_EPORT3 (3)
+#define INT0_LO_EPORT4 (4)
+#define INT0_LO_EPORT5 (5)
+#define INT0_LO_EPORT6 (6)
+#define INT0_LO_EPORT7 (7)
+#define INT0_LO_EDMA_00 (8)
+#define INT0_LO_EDMA_01 (9)
+#define INT0_LO_EDMA_02 (10)
+#define INT0_LO_EDMA_03 (11)
+#define INT0_LO_EDMA_04 (12)
+#define INT0_LO_EDMA_05 (13)
+#define INT0_LO_EDMA_06 (14)
+#define INT0_LO_EDMA_07 (15)
+#define INT0_LO_EDMA_08 (16)
+#define INT0_LO_EDMA_09 (17)
+#define INT0_LO_EDMA_10 (18)
+#define INT0_LO_EDMA_11 (19)
+#define INT0_LO_EDMA_12 (20)
+#define INT0_LO_EDMA_13 (21)
+#define INT0_LO_EDMA_14 (22)
+#define INT0_LO_EDMA_15 (23)
+#define INT0_LO_EDMA_ERR (24)
+#define INT0_LO_SCM (25)
+#define INT0_LO_UART0 (26)
+#define INT0_LO_UART1 (27)
+#define INT0_LO_UART2 (28)
+#define INT0_LO_RSVD1 (29)
+#define INT0_LO_I2C (30)
+#define INT0_LO_QSPI (31)
+#define INT0_HI_DTMR0 (32)
+#define INT0_HI_DTMR1 (33)
+#define INT0_HI_DTMR2 (34)
+#define INT0_HI_DTMR3 (35)
+#define INT0_HI_FEC0_TXF (36)
+#define INT0_HI_FEC0_TXB (37)
+#define INT0_HI_FEC0_UN (38)
+#define INT0_HI_FEC0_RL (39)
+#define INT0_HI_FEC0_RXF (40)
+#define INT0_HI_FEC0_RXB (41)
+#define INT0_HI_FEC0_MII (42)
+#define INT0_HI_FEC0_LC (43)
+#define INT0_HI_FEC0_HBERR (44)
+#define INT0_HI_FEC0_GRA (45)
+#define INT0_HI_FEC0_EBERR (46)
+#define INT0_HI_FEC0_BABT (47)
+#define INT0_HI_FEC0_BABR (48)
+#define INT0_HI_FEC1_TXF (49)
+#define INT0_HI_FEC1_TXB (50)
+#define INT0_HI_FEC1_UN (51)
+#define INT0_HI_FEC1_RL (52)
+#define INT0_HI_FEC1_RXF (53)
+#define INT0_HI_FEC1_RXB (54)
+#define INT0_HI_FEC1_MII (55)
+#define INT0_HI_FEC1_LC (56)
+#define INT0_HI_FEC1_HBERR (57)
+#define INT0_HI_FEC1_GRA (58)
+#define INT0_HI_FEC1_EBERR (59)
+#define INT0_HI_FEC1_BABT (60)
+#define INT0_HI_FEC1_BABR (61)
+#define INT0_HI_SCMIR (62)
+#define INT0_HI_RTC_ISR (63)
+
+#define INT1_HI_DSPI_EOQF (33)
+#define INT1_HI_DSPI_TFFF (34)
+#define INT1_HI_DSPI_TCF (35)
+#define INT1_HI_DSPI_TFUF (36)
+#define INT1_HI_DSPI_RFDF (37)
+#define INT1_HI_DSPI_RFOF (38)
+#define INT1_HI_DSPI_RFOF_TFUF (39)
+#define INT1_HI_RNG_EI (40)
+#define INT1_HI_PIT0_PIF (43)
+#define INT1_HI_PIT1_PIF (44)
+#define INT1_HI_PIT2_PIF (45)
+#define INT1_HI_PIT3_PIF (46)
+#define INT1_HI_USBOTG_USBSTS (47)
+#define INT1_HI_SSI_ISR (49)
+#define INT1_HI_CCM_UOCSR (53)
+#define INT1_HI_ATA_ISR (54)
+#define INT1_HI_PCI_SCR (55)
+#define INT1_HI_PCI_ASR (56)
+#define INT1_HI_PLL_LOCKS (57)
+
+/* Bit definitions and macros for IPRH */
+#define INTC_IPRH_INT32 (0x00000001)
+#define INTC_IPRH_INT33 (0x00000002)
+#define INTC_IPRH_INT34 (0x00000004)
+#define INTC_IPRH_INT35 (0x00000008)
+#define INTC_IPRH_INT36 (0x00000010)
+#define INTC_IPRH_INT37 (0x00000020)
+#define INTC_IPRH_INT38 (0x00000040)
+#define INTC_IPRH_INT39 (0x00000080)
+#define INTC_IPRH_INT40 (0x00000100)
+#define INTC_IPRH_INT41 (0x00000200)
+#define INTC_IPRH_INT42 (0x00000400)
+#define INTC_IPRH_INT43 (0x00000800)
+#define INTC_IPRH_INT44 (0x00001000)
+#define INTC_IPRH_INT45 (0x00002000)
+#define INTC_IPRH_INT46 (0x00004000)
+#define INTC_IPRH_INT47 (0x00008000)
+#define INTC_IPRH_INT48 (0x00010000)
+#define INTC_IPRH_INT49 (0x00020000)
+#define INTC_IPRH_INT50 (0x00040000)
+#define INTC_IPRH_INT51 (0x00080000)
+#define INTC_IPRH_INT52 (0x00100000)
+#define INTC_IPRH_INT53 (0x00200000)
+#define INTC_IPRH_INT54 (0x00400000)
+#define INTC_IPRH_INT55 (0x00800000)
+#define INTC_IPRH_INT56 (0x01000000)
+#define INTC_IPRH_INT57 (0x02000000)
+#define INTC_IPRH_INT58 (0x04000000)
+#define INTC_IPRH_INT59 (0x08000000)
+#define INTC_IPRH_INT60 (0x10000000)
+#define INTC_IPRH_INT61 (0x20000000)
+#define INTC_IPRH_INT62 (0x40000000)
+#define INTC_IPRH_INT63 (0x80000000)
+
+/* Bit definitions and macros for IPRL */
+#define INTC_IPRL_INT0 (0x00000001)
+#define INTC_IPRL_INT1 (0x00000002)
+#define INTC_IPRL_INT2 (0x00000004)
+#define INTC_IPRL_INT3 (0x00000008)
+#define INTC_IPRL_INT4 (0x00000010)
+#define INTC_IPRL_INT5 (0x00000020)
+#define INTC_IPRL_INT6 (0x00000040)
+#define INTC_IPRL_INT7 (0x00000080)
+#define INTC_IPRL_INT8 (0x00000100)
+#define INTC_IPRL_INT9 (0x00000200)
+#define INTC_IPRL_INT10 (0x00000400)
+#define INTC_IPRL_INT11 (0x00000800)
+#define INTC_IPRL_INT12 (0x00001000)
+#define INTC_IPRL_INT13 (0x00002000)
+#define INTC_IPRL_INT14 (0x00004000)
+#define INTC_IPRL_INT15 (0x00008000)
+#define INTC_IPRL_INT16 (0x00010000)
+#define INTC_IPRL_INT17 (0x00020000)
+#define INTC_IPRL_INT18 (0x00040000)
+#define INTC_IPRL_INT19 (0x00080000)
+#define INTC_IPRL_INT20 (0x00100000)
+#define INTC_IPRL_INT21 (0x00200000)
+#define INTC_IPRL_INT22 (0x00400000)
+#define INTC_IPRL_INT23 (0x00800000)
+#define INTC_IPRL_INT24 (0x01000000)
+#define INTC_IPRL_INT25 (0x02000000)
+#define INTC_IPRL_INT26 (0x04000000)
+#define INTC_IPRL_INT27 (0x08000000)
+#define INTC_IPRL_INT28 (0x10000000)
+#define INTC_IPRL_INT29 (0x20000000)
+#define INTC_IPRL_INT30 (0x40000000)
+#define INTC_IPRL_INT31 (0x80000000)
+
+/* Bit definitions and macros for IMRH */
+#define INTC_IMRH_INT_MASK32 (0x00000001)
+#define INTC_IMRH_INT_MASK33 (0x00000002)
+#define INTC_IMRH_INT_MASK34 (0x00000004)
+#define INTC_IMRH_INT_MASK35 (0x00000008)
+#define INTC_IMRH_INT_MASK36 (0x00000010)
+#define INTC_IMRH_INT_MASK37 (0x00000020)
+#define INTC_IMRH_INT_MASK38 (0x00000040)
+#define INTC_IMRH_INT_MASK39 (0x00000080)
+#define INTC_IMRH_INT_MASK40 (0x00000100)
+#define INTC_IMRH_INT_MASK41 (0x00000200)
+#define INTC_IMRH_INT_MASK42 (0x00000400)
+#define INTC_IMRH_INT_MASK43 (0x00000800)
+#define INTC_IMRH_INT_MASK44 (0x00001000)
+#define INTC_IMRH_INT_MASK45 (0x00002000)
+#define INTC_IMRH_INT_MASK46 (0x00004000)
+#define INTC_IMRH_INT_MASK47 (0x00008000)
+#define INTC_IMRH_INT_MASK48 (0x00010000)
+#define INTC_IMRH_INT_MASK49 (0x00020000)
+#define INTC_IMRH_INT_MASK50 (0x00040000)
+#define INTC_IMRH_INT_MASK51 (0x00080000)
+#define INTC_IMRH_INT_MASK52 (0x00100000)
+#define INTC_IMRH_INT_MASK53 (0x00200000)
+#define INTC_IMRH_INT_MASK54 (0x00400000)
+#define INTC_IMRH_INT_MASK55 (0x00800000)
+#define INTC_IMRH_INT_MASK56 (0x01000000)
+#define INTC_IMRH_INT_MASK57 (0x02000000)
+#define INTC_IMRH_INT_MASK58 (0x04000000)
+#define INTC_IMRH_INT_MASK59 (0x08000000)
+#define INTC_IMRH_INT_MASK60 (0x10000000)
+#define INTC_IMRH_INT_MASK61 (0x20000000)
+#define INTC_IMRH_INT_MASK62 (0x40000000)
+#define INTC_IMRH_INT_MASK63 (0x80000000)
+
+/* Bit definitions and macros for IMRL */
+#define INTC_IMRL_INT_MASK0 (0x00000001)
+#define INTC_IMRL_INT_MASK1 (0x00000002)
+#define INTC_IMRL_INT_MASK2 (0x00000004)
+#define INTC_IMRL_INT_MASK3 (0x00000008)
+#define INTC_IMRL_INT_MASK4 (0x00000010)
+#define INTC_IMRL_INT_MASK5 (0x00000020)
+#define INTC_IMRL_INT_MASK6 (0x00000040)
+#define INTC_IMRL_INT_MASK7 (0x00000080)
+#define INTC_IMRL_INT_MASK8 (0x00000100)
+#define INTC_IMRL_INT_MASK9 (0x00000200)
+#define INTC_IMRL_INT_MASK10 (0x00000400)
+#define INTC_IMRL_INT_MASK11 (0x00000800)
+#define INTC_IMRL_INT_MASK12 (0x00001000)
+#define INTC_IMRL_INT_MASK13 (0x00002000)
+#define INTC_IMRL_INT_MASK14 (0x00004000)
+#define INTC_IMRL_INT_MASK15 (0x00008000)
+#define INTC_IMRL_INT_MASK16 (0x00010000)
+#define INTC_IMRL_INT_MASK17 (0x00020000)
+#define INTC_IMRL_INT_MASK18 (0x00040000)
+#define INTC_IMRL_INT_MASK19 (0x00080000)
+#define INTC_IMRL_INT_MASK20 (0x00100000)
+#define INTC_IMRL_INT_MASK21 (0x00200000)
+#define INTC_IMRL_INT_MASK22 (0x00400000)
+#define INTC_IMRL_INT_MASK23 (0x00800000)
+#define INTC_IMRL_INT_MASK24 (0x01000000)
+#define INTC_IMRL_INT_MASK25 (0x02000000)
+#define INTC_IMRL_INT_MASK26 (0x04000000)
+#define INTC_IMRL_INT_MASK27 (0x08000000)
+#define INTC_IMRL_INT_MASK28 (0x10000000)
+#define INTC_IMRL_INT_MASK29 (0x20000000)
+#define INTC_IMRL_INT_MASK30 (0x40000000)
+#define INTC_IMRL_INT_MASK31 (0x80000000)
+
+/* Bit definitions and macros for INTFRCH */
+#define INTC_INTFRCH_INTFRC32 (0x00000001)
+#define INTC_INTFRCH_INTFRC33 (0x00000002)
+#define INTC_INTFRCH_INTFRC34 (0x00000004)
+#define INTC_INTFRCH_INTFRC35 (0x00000008)
+#define INTC_INTFRCH_INTFRC36 (0x00000010)
+#define INTC_INTFRCH_INTFRC37 (0x00000020)
+#define INTC_INTFRCH_INTFRC38 (0x00000040)
+#define INTC_INTFRCH_INTFRC39 (0x00000080)
+#define INTC_INTFRCH_INTFRC40 (0x00000100)
+#define INTC_INTFRCH_INTFRC41 (0x00000200)
+#define INTC_INTFRCH_INTFRC42 (0x00000400)
+#define INTC_INTFRCH_INTFRC43 (0x00000800)
+#define INTC_INTFRCH_INTFRC44 (0x00001000)
+#define INTC_INTFRCH_INTFRC45 (0x00002000)
+#define INTC_INTFRCH_INTFRC46 (0x00004000)
+#define INTC_INTFRCH_INTFRC47 (0x00008000)
+#define INTC_INTFRCH_INTFRC48 (0x00010000)
+#define INTC_INTFRCH_INTFRC49 (0x00020000)
+#define INTC_INTFRCH_INTFRC50 (0x00040000)
+#define INTC_INTFRCH_INTFRC51 (0x00080000)
+#define INTC_INTFRCH_INTFRC52 (0x00100000)
+#define INTC_INTFRCH_INTFRC53 (0x00200000)
+#define INTC_INTFRCH_INTFRC54 (0x00400000)
+#define INTC_INTFRCH_INTFRC55 (0x00800000)
+#define INTC_INTFRCH_INTFRC56 (0x01000000)
+#define INTC_INTFRCH_INTFRC57 (0x02000000)
+#define INTC_INTFRCH_INTFRC58 (0x04000000)
+#define INTC_INTFRCH_INTFRC59 (0x08000000)
+#define INTC_INTFRCH_INTFRC60 (0x10000000)
+#define INTC_INTFRCH_INTFRC61 (0x20000000)
+#define INTC_INTFRCH_INTFRC62 (0x40000000)
+#define INTC_INTFRCH_INTFRC63 (0x80000000)
+
+/* Bit definitions and macros for INTFRCL */
+#define INTC_INTFRCL_INTFRC0 (0x00000001)
+#define INTC_INTFRCL_INTFRC1 (0x00000002)
+#define INTC_INTFRCL_INTFRC2 (0x00000004)
+#define INTC_INTFRCL_INTFRC3 (0x00000008)
+#define INTC_INTFRCL_INTFRC4 (0x00000010)
+#define INTC_INTFRCL_INTFRC5 (0x00000020)
+#define INTC_INTFRCL_INTFRC6 (0x00000040)
+#define INTC_INTFRCL_INTFRC7 (0x00000080)
+#define INTC_INTFRCL_INTFRC8 (0x00000100)
+#define INTC_INTFRCL_INTFRC9 (0x00000200)
+#define INTC_INTFRCL_INTFRC10 (0x00000400)
+#define INTC_INTFRCL_INTFRC11 (0x00000800)
+#define INTC_INTFRCL_INTFRC12 (0x00001000)
+#define INTC_INTFRCL_INTFRC13 (0x00002000)
+#define INTC_INTFRCL_INTFRC14 (0x00004000)
+#define INTC_INTFRCL_INTFRC15 (0x00008000)
+#define INTC_INTFRCL_INTFRC16 (0x00010000)
+#define INTC_INTFRCL_INTFRC17 (0x00020000)
+#define INTC_INTFRCL_INTFRC18 (0x00040000)
+#define INTC_INTFRCL_INTFRC19 (0x00080000)
+#define INTC_INTFRCL_INTFRC20 (0x00100000)
+#define INTC_INTFRCL_INTFRC21 (0x00200000)
+#define INTC_INTFRCL_INTFRC22 (0x00400000)
+#define INTC_INTFRCL_INTFRC23 (0x00800000)
+#define INTC_INTFRCL_INTFRC24 (0x01000000)
+#define INTC_INTFRCL_INTFRC25 (0x02000000)
+#define INTC_INTFRCL_INTFRC26 (0x04000000)
+#define INTC_INTFRCL_INTFRC27 (0x08000000)
+#define INTC_INTFRCL_INTFRC28 (0x10000000)
+#define INTC_INTFRCL_INTFRC29 (0x20000000)
+#define INTC_INTFRCL_INTFRC30 (0x40000000)
+#define INTC_INTFRCL_INTFRC31 (0x80000000)
+
+/* Bit definitions and macros for ICONFIG */
+#define INTC_ICONFIG_EMASK (0x0020)
+#define INTC_ICONFIG_ELVLPRI1 (0x0200)
+#define INTC_ICONFIG_ELVLPRI2 (0x0400)
+#define INTC_ICONFIG_ELVLPRI3 (0x0800)
+#define INTC_ICONFIG_ELVLPRI4 (0x1000)
+#define INTC_ICONFIG_ELVLPRI5 (0x2000)
+#define INTC_ICONFIG_ELVLPRI6 (0x4000)
+#define INTC_ICONFIG_ELVLPRI7 (0x8000)
+
+/* Bit definitions and macros for SIMR */
+#define INTC_SIMR_SIMR(x) (((x)&0x7F))
+
+/* Bit definitions and macros for CIMR */
+#define INTC_CIMR_CIMR(x) (((x)&0x7F))
+
+/* Bit definitions and macros for CLMASK */
+#define INTC_CLMASK_CLMASK(x) (((x)&0x0F))
+
+/* Bit definitions and macros for SLMASK */
+#define INTC_SLMASK_SLMASK(x) (((x)&0x0F))
+
+/* Bit definitions and macros for ICR group */
+#define INTC_ICR_IL(x) (((x)&0x07))
+
+/*********************************************************************
+* DMA Serial Peripheral Interface (DSPI)
+*********************************************************************/
+
+/* Bit definitions and macros for DMCR */
+#define DSPI_DMCR_HALT (0x00000001)
+#define DSPI_DMCR_SMPL_PT(x) (((x)&0x00000003)<<8)
+#define DSPI_DMCR_CRXF (0x00000400)
+#define DSPI_DMCR_CTXF (0x00000800)
+#define DSPI_DMCR_DRXF (0x00001000)
+#define DSPI_DMCR_DTXF (0x00002000)
+#define DSPI_DMCR_CSIS0 (0x00010000)
+#define DSPI_DMCR_CSIS2 (0x00040000)
+#define DSPI_DMCR_CSIS3 (0x00080000)
+#define DSPI_DMCR_CSIS5 (0x00200000)
+#define DSPI_DMCR_ROOE (0x01000000)
+#define DSPI_DMCR_PCSSE (0x02000000)
+#define DSPI_DMCR_MTFE (0x04000000)
+#define DSPI_DMCR_FRZ (0x08000000)
+#define DSPI_DMCR_DCONF(x) (((x)&0x00000003)<<28)
+#define DSPI_DMCR_CSCK (0x40000000)
+#define DSPI_DMCR_MSTR (0x80000000)
+
+/* Bit definitions and macros for DTCR */
+#define DSPI_DTCR_SPI_TCNT(x) (((x)&0x0000FFFF)<<16)
+
+/* Bit definitions and macros for DCTAR group */
+#define DSPI_DCTAR_BR(x) (((x)&0x0000000F))
+#define DSPI_DCTAR_DT(x) (((x)&0x0000000F)<<4)
+#define DSPI_DCTAR_ASC(x) (((x)&0x0000000F)<<8)
+#define DSPI_DCTAR_CSSCK(x) (((x)&0x0000000F)<<12)
+#define DSPI_DCTAR_PBR(x) (((x)&0x00000003)<<16)
+#define DSPI_DCTAR_PDT(x) (((x)&0x00000003)<<18)
+#define DSPI_DCTAR_PASC(x) (((x)&0x00000003)<<20)
+#define DSPI_DCTAR_PCSSCK(x) (((x)&0x00000003)<<22)
+#define DSPI_DCTAR_LSBFE (0x01000000)
+#define DSPI_DCTAR_CPHA (0x02000000)
+#define DSPI_DCTAR_CPOL (0x04000000)
+#define DSPI_DCTAR_TRSZ(x) (((x)&0x0000000F)<<27)
+#define DSPI_DCTAR_PCSSCK_1CLK (0x00000000)
+#define DSPI_DCTAR_PCSSCK_3CLK (0x00400000)
+#define DSPI_DCTAR_PCSSCK_5CLK (0x00800000)
+#define DSPI_DCTAR_PCSSCK_7CLK (0x00A00000)
+#define DSPI_DCTAR_PASC_1CLK (0x00000000)
+#define DSPI_DCTAR_PASC_3CLK (0x00100000)
+#define DSPI_DCTAR_PASC_5CLK (0x00200000)
+#define DSPI_DCTAR_PASC_7CLK (0x00300000)
+#define DSPI_DCTAR_PDT_1CLK (0x00000000)
+#define DSPI_DCTAR_PDT_3CLK (0x00040000)
+#define DSPI_DCTAR_PDT_5CLK (0x00080000)
+#define DSPI_DCTAR_PDT_7CLK (0x000A0000)
+#define DSPI_DCTAR_PBR_1CLK (0x00000000)
+#define DSPI_DCTAR_PBR_3CLK (0x00010000)
+#define DSPI_DCTAR_PBR_5CLK (0x00020000)
+#define DSPI_DCTAR_PBR_7CLK (0x00030000)
+
+/* Bit definitions and macros for DSR */
+#define DSPI_DSR_RXPTR(x) (((x)&0x0000000F))
+#define DSPI_DSR_RXCTR(x) (((x)&0x0000000F)<<4)
+#define DSPI_DSR_TXPTR(x) (((x)&0x0000000F)<<8)
+#define DSPI_DSR_TXCTR(x) (((x)&0x0000000F)<<12)
+#define DSPI_DSR_RFDF (0x00020000)
+#define DSPI_DSR_RFOF (0x00080000)
+#define DSPI_DSR_TFFF (0x02000000)
+#define DSPI_DSR_TFUF (0x08000000)
+#define DSPI_DSR_EOQF (0x10000000)
+#define DSPI_DSR_TXRXS (0x40000000)
+#define DSPI_DSR_TCF (0x80000000)
+
+/* Bit definitions and macros for DIRSR */
+#define DSPI_DIRSR_RFDFS (0x00010000)
+#define DSPI_DIRSR_RFDFE (0x00020000)
+#define DSPI_DIRSR_RFOFE (0x00080000)
+#define DSPI_DIRSR_TFFFS (0x01000000)
+#define DSPI_DIRSR_TFFFE (0x02000000)
+#define DSPI_DIRSR_TFUFE (0x08000000)
+#define DSPI_DIRSR_EOQFE (0x10000000)
+#define DSPI_DIRSR_TCFE (0x80000000)
+
+/* Bit definitions and macros for DTFR */
+#define DSPI_DTFR_TXDATA(x) (((x)&0x0000FFFF))
+#define DSPI_DTFR_CS0 (0x00010000)
+#define DSPI_DTFR_CS2 (0x00040000)
+#define DSPI_DTFR_CS3 (0x00080000)
+#define DSPI_DTFR_CS5 (0x00200000)
+#define DSPI_DTFR_CTCNT (0x04000000)
+#define DSPI_DTFR_EOQ (0x08000000)
+#define DSPI_DTFR_CTAS(x) (((x)&0x00000007)<<28)
+#define DSPI_DTFR_CONT (0x80000000)
+
+/* Bit definitions and macros for DRFR */
+#define DSPI_DRFR_RXDATA(x) (((x)&0x0000FFFF))
+
+/* Bit definitions and macros for DTFDR group */
+#define DSPI_DTFDR_TXDATA(x) (((x)&0x0000FFFF))
+#define DSPI_DTFDR_TXCMD(x) (((x)&0x0000FFFF)<<16)
+
+/* Bit definitions and macros for DRFDR group */
+#define DSPI_DRFDR_RXDATA(x) (((x)&0x0000FFFF))
+
+/*********************************************************************
+* Edge Port Module (EPORT)
+*********************************************************************/
+
+/* Bit definitions and macros for EPPAR */
+#define EPORT_EPPAR_EPPA1(x) (((x)&0x0003)<<2)
+#define EPORT_EPPAR_EPPA2(x) (((x)&0x0003)<<4)
+#define EPORT_EPPAR_EPPA3(x) (((x)&0x0003)<<6)
+#define EPORT_EPPAR_EPPA4(x) (((x)&0x0003)<<8)
+#define EPORT_EPPAR_EPPA5(x) (((x)&0x0003)<<10)
+#define EPORT_EPPAR_EPPA6(x) (((x)&0x0003)<<12)
+#define EPORT_EPPAR_EPPA7(x) (((x)&0x0003)<<14)
+#define EPORT_EPPAR_LEVEL (0)
+#define EPORT_EPPAR_RISING (1)
+#define EPORT_EPPAR_FALLING (2)
+#define EPORT_EPPAR_BOTH (3)
+#define EPORT_EPPAR_EPPA7_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA7_RISING (0x4000)
+#define EPORT_EPPAR_EPPA7_FALLING (0x8000)
+#define EPORT_EPPAR_EPPA7_BOTH (0xC000)
+#define EPORT_EPPAR_EPPA6_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA6_RISING (0x1000)
+#define EPORT_EPPAR_EPPA6_FALLING (0x2000)
+#define EPORT_EPPAR_EPPA6_BOTH (0x3000)
+#define EPORT_EPPAR_EPPA5_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA5_RISING (0x0400)
+#define EPORT_EPPAR_EPPA5_FALLING (0x0800)
+#define EPORT_EPPAR_EPPA5_BOTH (0x0C00)
+#define EPORT_EPPAR_EPPA4_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA4_RISING (0x0100)
+#define EPORT_EPPAR_EPPA4_FALLING (0x0200)
+#define EPORT_EPPAR_EPPA4_BOTH (0x0300)
+#define EPORT_EPPAR_EPPA3_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA3_RISING (0x0040)
+#define EPORT_EPPAR_EPPA3_FALLING (0x0080)
+#define EPORT_EPPAR_EPPA3_BOTH (0x00C0)
+#define EPORT_EPPAR_EPPA2_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA2_RISING (0x0010)
+#define EPORT_EPPAR_EPPA2_FALLING (0x0020)
+#define EPORT_EPPAR_EPPA2_BOTH (0x0030)
+#define EPORT_EPPAR_EPPA1_LEVEL (0x0000)
+#define EPORT_EPPAR_EPPA1_RISING (0x0004)
+#define EPORT_EPPAR_EPPA1_FALLING (0x0008)
+#define EPORT_EPPAR_EPPA1_BOTH (0x000C)
+
+/* Bit definitions and macros for EPDDR */
+#define EPORT_EPDDR_EPDD1 (0x02)
+#define EPORT_EPDDR_EPDD2 (0x04)
+#define EPORT_EPDDR_EPDD3 (0x08)
+#define EPORT_EPDDR_EPDD4 (0x10)
+#define EPORT_EPDDR_EPDD5 (0x20)
+#define EPORT_EPDDR_EPDD6 (0x40)
+#define EPORT_EPDDR_EPDD7 (0x80)
+
+/* Bit definitions and macros for EPIER */
+#define EPORT_EPIER_EPIE1 (0x02)
+#define EPORT_EPIER_EPIE2 (0x04)
+#define EPORT_EPIER_EPIE3 (0x08)
+#define EPORT_EPIER_EPIE4 (0x10)
+#define EPORT_EPIER_EPIE5 (0x20)
+#define EPORT_EPIER_EPIE6 (0x40)
+#define EPORT_EPIER_EPIE7 (0x80)
+
+/* Bit definitions and macros for EPDR */
+#define EPORT_EPDR_EPD1 (0x02)
+#define EPORT_EPDR_EPD2 (0x04)
+#define EPORT_EPDR_EPD3 (0x08)
+#define EPORT_EPDR_EPD4 (0x10)
+#define EPORT_EPDR_EPD5 (0x20)
+#define EPORT_EPDR_EPD6 (0x40)
+#define EPORT_EPDR_EPD7 (0x80)
+
+/* Bit definitions and macros for EPPDR */
+#define EPORT_EPPDR_EPPD1 (0x02)
+#define EPORT_EPPDR_EPPD2 (0x04)
+#define EPORT_EPPDR_EPPD3 (0x08)
+#define EPORT_EPPDR_EPPD4 (0x10)
+#define EPORT_EPPDR_EPPD5 (0x20)
+#define EPORT_EPPDR_EPPD6 (0x40)
+#define EPORT_EPPDR_EPPD7 (0x80)
+
+/* Bit definitions and macros for EPFR */
+#define EPORT_EPFR_EPF1 (0x02)
+#define EPORT_EPFR_EPF2 (0x04)
+#define EPORT_EPFR_EPF3 (0x08)
+#define EPORT_EPFR_EPF4 (0x10)
+#define EPORT_EPFR_EPF5 (0x20)
+#define EPORT_EPFR_EPF6 (0x40)
+#define EPORT_EPFR_EPF7 (0x80)
+
+/*********************************************************************
+* Watchdog Timer Modules (WTM)
+*********************************************************************/
+
+/* Bit definitions and macros for WCR */
+#define WTM_WCR_EN (0x0001)
+#define WTM_WCR_HALTED (0x0002)
+#define WTM_WCR_DOZE (0x0004)
+#define WTM_WCR_WAIT (0x0008)
+
+/*********************************************************************
+* Serial Boot Facility (SBF)
+*********************************************************************/
+
+/* Bit definitions and macros for SBFCR */
+#define SBF_SBFCR_BLDIV(x) (((x)&0x000F)) /* Boot loader clock divider */
+#define SBF_SBFCR_FR (0x0010) /* Fast read */
+
+/*********************************************************************
+* Reset Controller Module (RCM)
+*********************************************************************/
+
+/* Bit definitions and macros for RCR */
+#define RCM_RCR_FRCRSTOUT (0x40)
+#define RCM_RCR_SOFTRST (0x80)
+
+/* Bit definitions and macros for RSR */
+#define RCM_RSR_LOL (0x01)
+#define RCM_RSR_WDR_CORE (0x02)
+#define RCM_RSR_EXT (0x04)
+#define RCM_RSR_POR (0x08)
+#define RCM_RSR_SOFT (0x20)
+
+/*********************************************************************
+* Chip Configuration Module (CCM)
+*********************************************************************/
+
+/* Bit definitions and macros for CCR_360 */
+#define CCM_CCR_360_PLLMULT2(x) (((x)&0x0003)) /* 2-Bit PLL clock mode */
+#define CCM_CCR_360_PCISLEW (0x0004) /* PCI pad slew rate mode */
+#define CCM_CCR_360_PCIMODE (0x0008) /* PCI host/agent mode */
+#define CCM_CCR_360_PLLMODE (0x0010) /* PLL Mode */
+#define CCM_CCR_360_FBCONFIG(x) (((x)&0x0007)<<5) /* Flexbus/PCI port size configuration */
+#define CCM_CCR_360_PLLMULT3(x) (((x)&0x0007)) /* 3-Bit PLL Clock Mode */
+#define CCM_CCR_360_OSCMODE (0x0008) /* Oscillator Clock Mode */
+#define CCM_CCR_360_FBCONFIG_MASK (0x00E0)
+#define CCM_CCR_360_PLLMULT2_MASK (0x0003)
+#define CCM_CCR_360_PLLMULT3_MASK (0x0007)
+#define CCM_CCR_360_FBCONFIG_NM_NP_32 (0x0000)
+#define CCM_CCR_360_FBCONFIG_NM_NP_8 (0x0020)
+#define CCM_CCR_360_FBCONFIG_NM_NP_16 (0x0040)
+#define CCM_CCR_360_FBCONFIG_M_P_16 (0x0060)
+#define CCM_CCR_360_FBCONFIG_M_NP_32 (0x0080)
+#define CCM_CCR_360_FBCONFIG_M_NP_8 (0x00A0)
+#define CCM_CCR_360_FBCONFIG_M_NP_16 (0x00C0)
+#define CCM_CCR_360_FBCONFIG_M_P_8 (0x00E0)
+#define CCM_CCR_360_PLLMULT2_12X (0x0000)
+#define CCM_CCR_360_PLLMULT2_6X (0x0001)
+#define CCM_CCR_360_PLLMULT2_16X (0x0002)
+#define CCM_CCR_360_PLLMULT2_8X (0x0003)
+#define CCM_CCR_360_PLLMULT3_20X (0x0000)
+#define CCM_CCR_360_PLLMULT3_10X (0x0001)
+#define CCM_CCR_360_PLLMULT3_24X (0x0002)
+#define CCM_CCR_360_PLLMULT3_18X (0x0003)
+#define CCM_CCR_360_PLLMULT3_12X (0x0004)
+#define CCM_CCR_360_PLLMULT3_6X (0x0005)
+#define CCM_CCR_360_PLLMULT3_16X (0x0006)
+#define CCM_CCR_360_PLLMULT3_8X (0x0007)
+
+/* Bit definitions and macros for CCR_256 */
+#define CCM_CCR_256_PLLMULT3(x) (((x)&0x0007)) /* 3-Bit PLL clock mode */
+#define CCM_CCR_256_OSCMODE (0x0008) /* Oscillator clock mode */
+#define CCM_CCR_256_PLLMODE (0x0010) /* PLL Mode */
+#define CCM_CCR_256_FBCONFIG(x) (((x)&0x0007)<<5) /* Flexbus/PCI port size configuration */
+#define CCM_CCR_256_FBCONFIG_MASK (0x00E0)
+#define CCM_CCR_256_FBCONFIG_NM_32 (0x0000)
+#define CCM_CCR_256_FBCONFIG_NM_8 (0x0020)
+#define CCM_CCR_256_FBCONFIG_NM_16 (0x0040)
+#define CCM_CCR_256_FBCONFIG_M_32 (0x0080)
+#define CCM_CCR_256_FBCONFIG_M_8 (0x00A0)
+#define CCM_CCR_256_FBCONFIG_M_16 (0x00C0)
+#define CCM_CCR_256_PLLMULT3_MASK (0x0007)
+#define CCM_CCR_256_PLLMULT3_20X (0x0000)
+#define CCM_CCR_256_PLLMULT3_10X (0x0001)
+#define CCM_CCR_256_PLLMULT3_24X (0x0002)
+#define CCM_CCR_256_PLLMULT3_18X (0x0003)
+#define CCM_CCR_256_PLLMULT3_12X (0x0004)
+#define CCM_CCR_256_PLLMULT3_6X (0x0005)
+#define CCM_CCR_256_PLLMULT3_16X (0x0006)
+#define CCM_CCR_256_PLLMULT3_8X (0x0007)
+
+/* Bit definitions and macros for RCON_360 */
+#define CCM_RCON_360_PLLMULT(x) (((x)&0x0003)) /* PLL clock mode */
+#define CCM_RCON_360_PCISLEW (0x0004) /* PCI pad slew rate mode */
+#define CCM_RCON_360_PCIMODE (0x0008) /* PCI host/agent mode */
+#define CCM_RCON_360_PLLMODE (0x0010) /* PLL Mode */
+#define CCM_RCON_360_FBCONFIG(x) (((x)&0x0007)<<5) /* Flexbus/PCI port size configuration */
+
+/* Bit definitions and macros for RCON_256 */
+#define CCM_RCON_256_PLLMULT(x) (((x)&0x0007)) /* PLL clock mode */
+#define CCM_RCON_256_OSCMODE (0x0008) /* Oscillator clock mode */
+#define CCM_RCON_256_PLLMODE (0x0010) /* PLL Mode */
+#define CCM_RCON_256_FBCONFIG(x) (((x)&0x0007)<<5) /* Flexbus/PCI port size configuration */
+
+/* Bit definitions and macros for CIR */
+#define CCM_CIR_PRN(x) (((x)&0x003F)) /* Part revision number */
+#define CCM_CIR_PIN(x) (((x)&0x03FF)<<6) /* Part identification number */
+#define CCM_CIR_PIN_MASK (0xFFC0)
+#define CCM_CIR_PRN_MASK (0x003F)
+#define CCM_CIR_PIN_MCF54450 (0x4F<<6)
+#define CCM_CIR_PIN_MCF54451 (0x4D<<6)
+#define CCM_CIR_PIN_MCF54452 (0x4B<<6)
+#define CCM_CIR_PIN_MCF54453 (0x49<<6)
+#define CCM_CIR_PIN_MCF54454 (0x4A<<6)
+#define CCM_CIR_PIN_MCF54455 (0x48<<6)
+
+/* Bit definitions and macros for MISCCR */
+#define CCM_MISCCR_USBSRC (0x0001) /* USB clock source */
+#define CCM_MISCCR_USBOC (0x0002) /* USB VBUS over-current sense polarity */
+#define CCM_MISCCR_USBPUE (0x0004) /* USB transceiver pull-up enable */
+#define CCM_MISCCR_SSISRC (0x0010) /* SSI clock source */
+#define CCM_MISCCR_TIMDMA (0x0020) /* Timer DMA mux selection */
+#define CCM_MISCCR_SSIPUS (0x0040) /* SSI RXD/TXD pull select */
+#define CCM_MISCCR_SSIPUE (0x0080) /* SSI RXD/TXD pull enable */
+#define CCM_MISCCR_BMT(x) (((x)&0x0007)<<8) /* Bus monitor timing field */
+#define CCM_MISCCR_BME (0x0800) /* Bus monitor external enable bit */
+#define CCM_MISCCR_LIMP (0x1000) /* Limp mode enable */
+#define CCM_MISCCR_BMT_65536 (0)
+#define CCM_MISCCR_BMT_32768 (1)
+#define CCM_MISCCR_BMT_16384 (2)
+#define CCM_MISCCR_BMT_8192 (3)
+#define CCM_MISCCR_BMT_4096 (4)
+#define CCM_MISCCR_BMT_2048 (5)
+#define CCM_MISCCR_BMT_1024 (6)
+#define CCM_MISCCR_BMT_512 (7)
+#define CCM_MISCCR_SSIPUS_UP (1)
+#define CCM_MISCCR_SSIPUS_DOWN (0)
+#define CCM_MISCCR_TIMDMA_TIM (1)
+#define CCM_MISCCR_TIMDMA_SSI (0)
+#define CCM_MISCCR_SSISRC_CLKIN (0)
+#define CCM_MISCCR_SSISRC_PLL (1)
+#define CCM_MISCCR_USBOC_ACTHI (0)
+#define CCM_MISCCR_USBOV_ACTLO (1)
+#define CCM_MISCCR_USBSRC_CLKIN (0)
+#define CCM_MISCCR_USBSRC_PLL (1)
+
+/* Bit definitions and macros for CDR */
+#define CCM_CDR_SSIDIV(x) (((x)&0x00FF)) /* SSI oversampling clock divider */
+#define CCM_CDR_LPDIV(x) (((x)&0x000F)<<8) /* Low power clock divider */
+
+/* Bit definitions and macros for UOCSR */
+#define CCM_UOCSR_XPDE (0x0001) /* On-chip transceiver pull-down enable */
+#define CCM_UOCSR_UOMIE (0x0002) /* USB OTG misc interrupt enable */
+#define CCM_UOCSR_WKUP (0x0004) /* USB OTG controller wake-up event */
+#define CCM_UOCSR_PWRFLT (0x0008) /* VBUS power fault */
+#define CCM_UOCSR_SEND (0x0010) /* Session end */
+#define CCM_UOCSR_VVLD (0x0020) /* VBUS valid indicator */
+#define CCM_UOCSR_BVLD (0x0040) /* B-peripheral valid indicator */
+#define CCM_UOCSR_AVLD (0x0080) /* A-peripheral valid indicator */
+#define CCM_UOCSR_DPPU (0x0100) /* D+ pull-up for FS enabled (read-only) */
+#define CCM_UOCSR_DCR_VBUS (0x0200) /* VBUS discharge resistor enabled (read-only) */
+#define CCM_UOCSR_CRG_VBUS (0x0400) /* VBUS charge resistor enabled (read-only) */
+#define CCM_UOCSR_DMPD (0x1000) /* D- 15Kohm pull-down (read-only) */
+#define CCM_UOCSR_DPPD (0x2000) /* D+ 15Kohm pull-down (read-only) */
+
+/*********************************************************************
+* General Purpose I/O Module (GPIO)
+*********************************************************************/
+
+/* Bit definitions and macros for PAR_FEC */
+#define GPIO_PAR_FEC_FEC0(x) (((x)&0x07))
+#define GPIO_PAR_FEC_FEC1(x) (((x)&0x07)<<4)
+#define GPIO_PAR_FEC_FEC1_MASK (0x8F)
+#define GPIO_PAR_FEC_FEC1_MII (0x70)
+#define GPIO_PAR_FEC_FEC1_RMII_GPIO (0x30)
+#define GPIO_PAR_FEC_FEC1_RMII_ATA (0x20)
+#define GPIO_PAR_FEC_FEC1_ATA (0x10)
+#define GPIO_PAR_FEC_FEC1_GPIO (0x00)
+#define GPIO_PAR_FEC_FEC0_MASK (0xF8)
+#define GPIO_PAR_FEC_FEC0_MII (0x07)
+#define GPIO_PAR_FEC_FEC0_RMII_GPIO (0x03)
+#define GPIO_PAR_FEC_FEC0_RMII_ATA (0x02)
+#define GPIO_PAR_FEC_FEC0_ATA (0x01)
+#define GPIO_PAR_FEC_FEC0_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_DMA */
+#define GPIO_PAR_DMA_DREQ0 (0x01)
+#define GPIO_PAR_DMA_DACK0(x) (((x)&0x03)<<2)
+#define GPIO_PAR_DMA_DREQ1(x) (((x)&0x03)<<4)
+#define GPIO_PAR_DMA_DACK1(x) (((x)&0x03)<<6)
+#define GPIO_PAR_DMA_DACK1_MASK (0x3F)
+#define GPIO_PAR_DMA_DACK1_DACK1 (0xC0)
+#define GPIO_PAR_DMA_DACK1_ULPI_DIR (0x40)
+#define GPIO_PAR_DMA_DACK1_GPIO (0x00)
+#define GPIO_PAR_DMA_DREQ1_MASK (0xCF)
+#define GPIO_PAR_DMA_DREQ1_DREQ1 (0x30)
+#define GPIO_PAR_DMA_DREQ1_USB_CLKIN (0x10)
+#define GPIO_PAR_DMA_DREQ1_GPIO (0x00)
+#define GPIO_PAR_DMA_DACK0_MASK (0xF3)
+#define GPIO_PAR_DMA_DACK0_DACK1 (0x0C)
+#define GPIO_PAR_DMA_DACK0_ULPI_DIR (0x04)
+#define GPIO_PAR_DMA_DACK0_GPIO (0x00)
+#define GPIO_PAR_DMA_DREQ0_DREQ0 (0x01)
+#define GPIO_PAR_DMA_DREQ0_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_FBCTL */
+#define GPIO_PAR_FBCTL_TS(x) (((x)&0x03)<<3)
+#define GPIO_PAR_FBCTL_RW (0x20)
+#define GPIO_PAR_FBCTL_TA (0x40)
+#define GPIO_PAR_FBCTL_OE (0x80)
+#define GPIO_PAR_FBCTL_OE_OE (0x80)
+#define GPIO_PAR_FBCTL_OE_GPIO (0x00)
+#define GPIO_PAR_FBCTL_TA_TA (0x40)
+#define GPIO_PAR_FBCTL_TA_GPIO (0x00)
+#define GPIO_PAR_FBCTL_RW_RW (0x20)
+#define GPIO_PAR_FBCTL_RW_GPIO (0x00)
+#define GPIO_PAR_FBCTL_TS_MASK (0xE7)
+#define GPIO_PAR_FBCTL_TS_TS (0x18)
+#define GPIO_PAR_FBCTL_TS_ALE (0x10)
+#define GPIO_PAR_FBCTL_TS_TBST (0x08)
+#define GPIO_PAR_FBCTL_TS_GPIO (0x80)
+
+/* Bit definitions and macros for PAR_DSPI */
+#define GPIO_PAR_DSPI_SCK (0x01)
+#define GPIO_PAR_DSPI_SOUT (0x02)
+#define GPIO_PAR_DSPI_SIN (0x04)
+#define GPIO_PAR_DSPI_PCS0 (0x08)
+#define GPIO_PAR_DSPI_PCS1 (0x10)
+#define GPIO_PAR_DSPI_PCS2 (0x20)
+#define GPIO_PAR_DSPI_PCS5 (0x40)
+#define GPIO_PAR_DSPI_PCS5_PCS5 (0x40)
+#define GPIO_PAR_DSPI_PCS5_GPIO (0x00)
+#define GPIO_PAR_DSPI_PCS2_PCS2 (0x20)
+#define GPIO_PAR_DSPI_PCS2_GPIO (0x00)
+#define GPIO_PAR_DSPI_PCS1_PCS1 (0x10)
+#define GPIO_PAR_DSPI_PCS1_GPIO (0x00)
+#define GPIO_PAR_DSPI_PCS0_PCS0 (0x08)
+#define GPIO_PAR_DSPI_PCS0_GPIO (0x00)
+#define GPIO_PAR_DSPI_SIN_SIN (0x04)
+#define GPIO_PAR_DSPI_SIN_GPIO (0x00)
+#define GPIO_PAR_DSPI_SOUT_SOUT (0x02)
+#define GPIO_PAR_DSPI_SOUT_GPIO (0x00)
+#define GPIO_PAR_DSPI_SCK_SCK (0x01)
+#define GPIO_PAR_DSPI_SCK_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_BE */
+#define GPIO_PAR_BE_BS0 (0x01)
+#define GPIO_PAR_BE_BS1 (0x04)
+#define GPIO_PAR_BE_BS2(x) (((x)&0x03)<<4)
+#define GPIO_PAR_BE_BS3(x) (((x)&0x03)<<6)
+#define GPIO_PAR_BE_BE3_MASK (0x3F)
+#define GPIO_PAR_BE_BE3_BE3 (0xC0)
+#define GPIO_PAR_BE_BE3_TSIZ1 (0x80)
+#define GPIO_PAR_BE_BE3_GPIO (0x00)
+#define GPIO_PAR_BE_BE2_MASK (0xCF)
+#define GPIO_PAR_BE_BE2_BE2 (0x30)
+#define GPIO_PAR_BE_BE2_TSIZ0 (0x20)
+#define GPIO_PAR_BE_BE2_GPIO (0x00)
+#define GPIO_PAR_BE_BE1_BE1 (0x04)
+#define GPIO_PAR_BE_BE1_GPIO (0x00)
+#define GPIO_PAR_BE_BE0_BE0 (0x01)
+#define GPIO_PAR_BE_BE0_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_CS */
+#define GPIO_PAR_CS_CS1 (0x02)
+#define GPIO_PAR_CS_CS2 (0x04)
+#define GPIO_PAR_CS_CS3 (0x08)
+#define GPIO_PAR_CS_CS3_CS3 (0x08)
+#define GPIO_PAR_CS_CS3_GPIO (0x00)
+#define GPIO_PAR_CS_CS2_CS2 (0x04)
+#define GPIO_PAR_CS_CS2_GPIO (0x00)
+#define GPIO_PAR_CS_CS1_CS1 (0x02)
+#define GPIO_PAR_CS_CS1_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_TIMER */
+#define GPIO_PAR_TIMER_T0IN(x) (((x)&0x03))
+#define GPIO_PAR_TIMER_T1IN(x) (((x)&0x03)<<2)
+#define GPIO_PAR_TIMER_T2IN(x) (((x)&0x03)<<4)
+#define GPIO_PAR_TIMER_T3IN(x) (((x)&0x03)<<6)
+#define GPIO_PAR_TIMER_T3IN_MASK (0x3F)
+#define GPIO_PAR_TIMER_T3IN_T3IN (0xC0)
+#define GPIO_PAR_TIMER_T3IN_T3OUT (0x80)
+#define GPIO_PAR_TIMER_T3IN_U2RXD (0x40)
+#define GPIO_PAR_TIMER_T3IN_GPIO (0x00)
+#define GPIO_PAR_TIMER_T2IN_MASK (0xCF)
+#define GPIO_PAR_TIMER_T2IN_T2IN (0x30)
+#define GPIO_PAR_TIMER_T2IN_T2OUT (0x20)
+#define GPIO_PAR_TIMER_T2IN_U2TXD (0x10)
+#define GPIO_PAR_TIMER_T2IN_GPIO (0x00)
+#define GPIO_PAR_TIMER_T1IN_MASK (0xF3)
+#define GPIO_PAR_TIMER_T1IN_T1IN (0x0C)
+#define GPIO_PAR_TIMER_T1IN_T1OUT (0x08)
+#define GPIO_PAR_TIMER_T1IN_U2CTS (0x04)
+#define GPIO_PAR_TIMER_T1IN_GPIO (0x00)
+#define GPIO_PAR_TIMER_T0IN_MASK (0xFC)
+#define GPIO_PAR_TIMER_T0IN_T0IN (0x03)
+#define GPIO_PAR_TIMER_T0IN_T0OUT (0x02)
+#define GPIO_PAR_TIMER_T0IN_U2RTS (0x01)
+#define GPIO_PAR_TIMER_T0IN_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_USB */
+#define GPIO_PAR_USB_VBUSOC(x) (((x)&0x03))
+#define GPIO_PAR_USB_VBUSEN(x) (((x)&0x03)<<2)
+#define GPIO_PAR_USB_VBUSEN_MASK (0xF3)
+#define GPIO_PAR_USB_VBUSEN_VBUSEN (0x0C)
+#define GPIO_PAR_USB_VBUSEN_USBPULLUP (0x08)
+#define GPIO_PAR_USB_VBUSEN_ULPI_NXT (0x04)
+#define GPIO_PAR_USB_VBUSEN_GPIO (0x00)
+#define GPIO_PAR_USB_VBUSOC_MASK (0xFC)
+#define GPIO_PAR_USB_VBUSOC_VBUSOC (0x03)
+#define GPIO_PAR_USB_VBUSOC_ULPI_STP (0x01)
+#define GPIO_PAR_USB_VBUSOC_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_UART */
+#define GPIO_PAR_UART_U0TXD (0x01)
+#define GPIO_PAR_UART_U0RXD (0x02)
+#define GPIO_PAR_UART_U0RTS (0x04)
+#define GPIO_PAR_UART_U0CTS (0x08)
+#define GPIO_PAR_UART_U1TXD (0x10)
+#define GPIO_PAR_UART_U1RXD (0x20)
+#define GPIO_PAR_UART_U1RTS (0x40)
+#define GPIO_PAR_UART_U1CTS (0x80)
+#define GPIO_PAR_UART_U1CTS_U1CTS (0x80)
+#define GPIO_PAR_UART_U1CTS_GPIO (0x00)
+#define GPIO_PAR_UART_U1RTS_U1RTS (0x40)
+#define GPIO_PAR_UART_U1RTS_GPIO (0x00)
+#define GPIO_PAR_UART_U1RXD_U1RXD (0x20)
+#define GPIO_PAR_UART_U1RXD_GPIO (0x00)
+#define GPIO_PAR_UART_U1TXD_U1TXD (0x10)
+#define GPIO_PAR_UART_U1TXD_GPIO (0x00)
+#define GPIO_PAR_UART_U0CTS_U0CTS (0x08)
+#define GPIO_PAR_UART_U0CTS_GPIO (0x00)
+#define GPIO_PAR_UART_U0RTS_U0RTS (0x04)
+#define GPIO_PAR_UART_U0RTS_GPIO (0x00)
+#define GPIO_PAR_UART_U0RXD_U0RXD (0x02)
+#define GPIO_PAR_UART_U0RXD_GPIO (0x00)
+#define GPIO_PAR_UART_U0TXD_U0TXD (0x01)
+#define GPIO_PAR_UART_U0TXD_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_FECI2C */
+#define GPIO_PAR_FECI2C_SDA(x) (((x)&0x0003))
+#define GPIO_PAR_FECI2C_SCL(x) (((x)&0x0003)<<2)
+#define GPIO_PAR_FECI2C_MDIO0 (0x0010)
+#define GPIO_PAR_FECI2C_MDC0 (0x0040)
+#define GPIO_PAR_FECI2C_MDIO1(x) (((x)&0x0003)<<8)
+#define GPIO_PAR_FECI2C_MDC1(x) (((x)&0x0003)<<10)
+#define GPIO_PAR_FECI2C_MDC1_MASK (0xF3FF)
+#define GPIO_PAR_FECI2C_MDC1_MDC1 (0x0C00)
+#define GPIO_PAR_FECI2C_MDC1_ATA_DIOR (0x0800)
+#define GPIO_PAR_FECI2C_MDC1_GPIO (0x0000)
+#define GPIO_PAR_FECI2C_MDIO1_MASK (0xFCFF)
+#define GPIO_PAR_FECI2C_MDIO1_MDIO1 (0x0300)
+#define GPIO_PAR_FECI2C_MDIO1_ATA_DIOW (0x0200)
+#define GPIO_PAR_FECI2C_MDIO1_GPIO (0x0000)
+#define GPIO_PAR_FECI2C_MDC0_MDC0 (0x0040)
+#define GPIO_PAR_FECI2C_MDC0_GPIO (0x0000)
+#define GPIO_PAR_FECI2C_MDIO0_MDIO0 (0x0010)
+#define GPIO_PAR_FECI2C_MDIO0_GPIO (0x0000)
+#define GPIO_PAR_FECI2C_SCL_MASK (0xFFF3)
+#define GPIO_PAR_FECI2C_SCL_SCL (0x000C)
+#define GPIO_PAR_FECI2C_SCL_U2TXD (0x0004)
+#define GPIO_PAR_FECI2C_SCL_GPIO (0x0000)
+#define GPIO_PAR_FECI2C_SDA_MASK (0xFFFC)
+#define GPIO_PAR_FECI2C_SDA_SDA (0x0003)
+#define GPIO_PAR_FECI2C_SDA_U2RXD (0x0001)
+#define GPIO_PAR_FECI2C_SDA_GPIO (0x0000)
+
+/* Bit definitions and macros for PAR_SSI */
+#define GPIO_PAR_SSI_MCLK (0x0001)
+#define GPIO_PAR_SSI_STXD(x) (((x)&0x0003)<<2)
+#define GPIO_PAR_SSI_SRXD(x) (((x)&0x0003)<<4)
+#define GPIO_PAR_SSI_FS(x) (((x)&0x0003)<<6)
+#define GPIO_PAR_SSI_BCLK(x) (((x)&0x0003)<<8)
+#define GPIO_PAR_SSI_BCLK_MASK (0xFCFF)
+#define GPIO_PAR_SSI_BCLK_BCLK (0x0300)
+#define GPIO_PAR_SSI_BCLK_U1CTS (0x0200)
+#define GPIO_PAR_SSI_BCLK_GPIO (0x0000)
+#define GPIO_PAR_SSI_FS_MASK (0xFF3F)
+#define GPIO_PAR_SSI_FS_FS (0x00C0)
+#define GPIO_PAR_SSI_FS_U1RTS (0x0080)
+#define GPIO_PAR_SSI_FS_GPIO (0x0000)
+#define GPIO_PAR_SSI_SRXD_MASK (0xFFCF)
+#define GPIO_PAR_SSI_SRXD_SRXD (0x0030)
+#define GPIO_PAR_SSI_SRXD_U1RXD (0x0020)
+#define GPIO_PAR_SSI_SRXD_GPIO (0x0000)
+#define GPIO_PAR_SSI_STXD_MASK (0xFFF3)
+#define GPIO_PAR_SSI_STXD_STXD (0x000C)
+#define GPIO_PAR_SSI_STXD_U1TXD (0x0008)
+#define GPIO_PAR_SSI_STXD_GPIO (0x0000)
+#define GPIO_PAR_SSI_MCLK_MCLK (0x0001)
+#define GPIO_PAR_SSI_MCLK_GPIO (0x0000)
+
+/* Bit definitions and macros for PAR_ATA */
+#define GPIO_PAR_ATA_IORDY (0x0001)
+#define GPIO_PAR_ATA_DMARQ (0x0002)
+#define GPIO_PAR_ATA_RESET (0x0004)
+#define GPIO_PAR_ATA_DA0 (0x0020)
+#define GPIO_PAR_ATA_DA1 (0x0040)
+#define GPIO_PAR_ATA_DA2 (0x0080)
+#define GPIO_PAR_ATA_CS0 (0x0100)
+#define GPIO_PAR_ATA_CS1 (0x0200)
+#define GPIO_PAR_ATA_BUFEN (0x0400)
+#define GPIO_PAR_ATA_BUFEN_BUFEN (0x0400)
+#define GPIO_PAR_ATA_BUFEN_GPIO (0x0000)
+#define GPIO_PAR_ATA_CS1_CS1 (0x0200)
+#define GPIO_PAR_ATA_CS1_GPIO (0x0000)
+#define GPIO_PAR_ATA_CS0_CS0 (0x0100)
+#define GPIO_PAR_ATA_CS0_GPIO (0x0000)
+#define GPIO_PAR_ATA_DA2_DA2 (0x0080)
+#define GPIO_PAR_ATA_DA2_GPIO (0x0000)
+#define GPIO_PAR_ATA_DA1_DA1 (0x0040)
+#define GPIO_PAR_ATA_DA1_GPIO (0x0000)
+#define GPIO_PAR_ATA_DA0_DA0 (0x0020)
+#define GPIO_PAR_ATA_DA0_GPIO (0x0000)
+#define GPIO_PAR_ATA_RESET_RESET (0x0004)
+#define GPIO_PAR_ATA_RESET_GPIO (0x0000)
+#define GPIO_PAR_ATA_DMARQ_DMARQ (0x0002)
+#define GPIO_PAR_ATA_DMARQ_GPIO (0x0000)
+#define GPIO_PAR_ATA_IORDY_IORDY (0x0001)
+#define GPIO_PAR_ATA_IORDY_GPIO (0x0000)
+
+/* Bit definitions and macros for PAR_IRQ */
+#define GPIO_PAR_IRQ_IRQ1 (0x02)
+#define GPIO_PAR_IRQ_IRQ4 (0x10)
+#define GPIO_PAR_IRQ_IRQ4_IRQ4 (0x10)
+#define GPIO_PAR_IRQ_IRQ4_GPIO (0x00)
+#define GPIO_PAR_IRQ_IRQ1_IRQ1 (0x02)
+#define GPIO_PAR_IRQ_IRQ1_GPIO (0x00)
+
+/* Bit definitions and macros for PAR_PCI */
+#define GPIO_PAR_PCI_REQ0 (0x0001)
+#define GPIO_PAR_PCI_REQ1 (0x0004)
+#define GPIO_PAR_PCI_REQ2 (0x0010)
+#define GPIO_PAR_PCI_REQ3(x) (((x)&0x0003)<<6)
+#define GPIO_PAR_PCI_GNT0 (0x0100)
+#define GPIO_PAR_PCI_GNT1 (0x0400)
+#define GPIO_PAR_PCI_GNT2 (0x1000)
+#define GPIO_PAR_PCI_GNT3(x) (((x)&0x0003)<<14)
+#define GPIO_PAR_PCI_GNT3_MASK (0x3FFF)
+#define GPIO_PAR_PCI_GNT3_GNT3 (0xC000)
+#define GPIO_PAR_PCI_GNT3_ATA_DMACK (0x8000)
+#define GPIO_PAR_PCI_GNT3_GPIO (0x0000)
+#define GPIO_PAR_PCI_GNT2_GNT2 (0x1000)
+#define GPIO_PAR_PCI_GNT2_GPIO (0x0000)
+#define GPIO_PAR_PCI_GNT1_GNT1 (0x0400)
+#define GPIO_PAR_PCI_GNT1_GPIO (0x0000)
+#define GPIO_PAR_PCI_GNT0_GNT0 (0x0100)
+#define GPIO_PAR_PCI_GNT0_GPIO (0x0000)
+#define GPIO_PAR_PCI_REQ3_MASK (0xFF3F)
+#define GPIO_PAR_PCI_REQ3_REQ3 (0x00C0)
+#define GPIO_PAR_PCI_REQ3_ATA_INTRQ (0x0080)
+#define GPIO_PAR_PCI_REQ3_GPIO (0x0000)
+#define GPIO_PAR_PCI_REQ2_REQ2 (0x0010)
+#define GPIO_PAR_PCI_REQ2_GPIO (0x0000)
+#define GPIO_PAR_PCI_REQ1_REQ1 (0x0040)
+#define GPIO_PAR_PCI_REQ1_GPIO (0x0000)
+#define GPIO_PAR_PCI_REQ0_REQ0 (0x0001)
+#define GPIO_PAR_PCI_REQ0_GPIO (0x0000)
+
+/* Bit definitions and macros for MSCR_SDRAM */
+#define GPIO_MSCR_SDRAM_SDCTL(x) (((x)&0x03))
+#define GPIO_MSCR_SDRAM_SDCLK(x) (((x)&0x03)<<2)
+#define GPIO_MSCR_SDRAM_SDDQS(x) (((x)&0x03)<<4)
+#define GPIO_MSCR_SDRAM_SDDATA(x) (((x)&0x03)<<6)
+#define GPIO_MSCR_SDRAM_SDDATA_MASK (0x3F)
+#define GPIO_MSCR_SDRAM_SDDATA_DDR1 (0xC0)
+#define GPIO_MSCR_SDRAM_SDDATA_DDR2 (0x80)
+#define GPIO_MSCR_SDRAM_SDDATA_FS_LPDDR (0x40)
+#define GPIO_MSCR_SDRAM_SDDATA_HS_LPDDR (0x00)
+#define GPIO_MSCR_SDRAM_SDDQS_MASK (0xCF)
+#define GPIO_MSCR_SDRAM_SDDQS_DDR1 (0x30)
+#define GPIO_MSCR_SDRAM_SDDQS_DDR2 (0x20)
+#define GPIO_MSCR_SDRAM_SDDQS_FS_LPDDR (0x10)
+#define GPIO_MSCR_SDRAM_SDDQS_HS_LPDDR (0x00)
+#define GPIO_MSCR_SDRAM_SDCLK_MASK (0xF3)
+#define GPIO_MSCR_SDRAM_SDCLK_DDR1 (0x0C)
+#define GPIO_MSCR_SDRAM_SDCLK_DDR2 (0x08)
+#define GPIO_MSCR_SDRAM_SDCLK_FS_LPDDR (0x04)
+#define GPIO_MSCR_SDRAM_SDCLK_HS_LPDDR (0x00)
+#define GPIO_MSCR_SDRAM_SDCTL_MASK (0xFC)
+#define GPIO_MSCR_SDRAM_SDCTL_DDR1 (0x03)
+#define GPIO_MSCR_SDRAM_SDCTL_DDR2 (0x02)
+#define GPIO_MSCR_SDRAM_SDCTL_FS_LPDDR (0x01)
+#define GPIO_MSCR_SDRAM_SDCTL_HS_LPDDR (0x00)
+
+/* Bit definitions and macros for MSCR_PCI */
+#define GPIO_MSCR_PCI_PCI (0x01)
+#define GPIO_MSCR_PCI_PCI_HI_66MHZ (0x01)
+#define GPIO_MSCR_PCI_PCI_LO_33MHZ (0x00)
+
+/* Bit definitions and macros for DSCR_I2C */
+#define GPIO_DSCR_I2C_I2C(x) (((x)&0x03))
+#define GPIO_DSCR_I2C_I2C_LOAD_50PF (0x03)
+#define GPIO_DSCR_I2C_I2C_LOAD_30PF (0x02)
+#define GPIO_DSCR_I2C_I2C_LOAD_20PF (0x01)
+#define GPIO_DSCR_I2C_I2C_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_FLEXBUS */
+#define GPIO_DSCR_FLEXBUS_FBADL(x) (((x)&0x03))
+#define GPIO_DSCR_FLEXBUS_FBADH(x) (((x)&0x03)<<2)
+#define GPIO_DSCR_FLEXBUS_FBCTL(x) (((x)&0x03)<<4)
+#define GPIO_DSCR_FLEXBUS_FBCLK(x) (((x)&0x03)<<6)
+#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_50PF (0xC0)
+#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_30PF (0x80)
+#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_20PF (0x40)
+#define GPIO_DSCR_FLEXBUS_FBCLK_LOAD_10PF (0x00)
+#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_50PF (0x30)
+#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_30PF (0x20)
+#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_20PF (0x10)
+#define GPIO_DSCR_FLEXBUS_FBCTL_LOAD_10PF (0x00)
+#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_50PF (0x0C)
+#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_30PF (0x08)
+#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_20PF (0x04)
+#define GPIO_DSCR_FLEXBUS_FBADH_LOAD_10PF (0x00)
+#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_50PF (0x03)
+#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_30PF (0x02)
+#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_20PF (0x01)
+#define GPIO_DSCR_FLEXBUS_FBADL_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_FEC */
+#define GPIO_DSCR_FEC_FEC0(x) (((x)&0x03))
+#define GPIO_DSCR_FEC_FEC1(x) (((x)&0x03)<<2)
+#define GPIO_DSCR_FEC_FEC1_LOAD_50PF (0x0C)
+#define GPIO_DSCR_FEC_FEC1_LOAD_30PF (0x08)
+#define GPIO_DSCR_FEC_FEC1_LOAD_20PF (0x04)
+#define GPIO_DSCR_FEC_FEC1_LOAD_10PF (0x00)
+#define GPIO_DSCR_FEC_FEC0_LOAD_50PF (0x03)
+#define GPIO_DSCR_FEC_FEC0_LOAD_30PF (0x02)
+#define GPIO_DSCR_FEC_FEC0_LOAD_20PF (0x01)
+#define GPIO_DSCR_FEC_FEC0_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_UART */
+#define GPIO_DSCR_UART_UART0(x) (((x)&0x03))
+#define GPIO_DSCR_UART_UART1(x) (((x)&0x03)<<2)
+#define GPIO_DSCR_UART_UART1_LOAD_50PF (0x0C)
+#define GPIO_DSCR_UART_UART1_LOAD_30PF (0x08)
+#define GPIO_DSCR_UART_UART1_LOAD_20PF (0x04)
+#define GPIO_DSCR_UART_UART1_LOAD_10PF (0x00)
+#define GPIO_DSCR_UART_UART0_LOAD_50PF (0x03)
+#define GPIO_DSCR_UART_UART0_LOAD_30PF (0x02)
+#define GPIO_DSCR_UART_UART0_LOAD_20PF (0x01)
+#define GPIO_DSCR_UART_UART0_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_DSPI */
+#define GPIO_DSCR_DSPI_DSPI(x) (((x)&0x03))
+#define GPIO_DSCR_DSPI_DSPI_LOAD_50PF (0x03)
+#define GPIO_DSCR_DSPI_DSPI_LOAD_30PF (0x02)
+#define GPIO_DSCR_DSPI_DSPI_LOAD_20PF (0x01)
+#define GPIO_DSCR_DSPI_DSPI_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_TIMER */
+#define GPIO_DSCR_TIMER_TIMER(x) (((x)&0x03))
+#define GPIO_DSCR_TIMER_TIMER_LOAD_50PF (0x03)
+#define GPIO_DSCR_TIMER_TIMER_LOAD_30PF (0x02)
+#define GPIO_DSCR_TIMER_TIMER_LOAD_20PF (0x01)
+#define GPIO_DSCR_TIMER_TIMER_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_SSI */
+#define GPIO_DSCR_SSI_SSI(x) (((x)&0x03))
+#define GPIO_DSCR_SSI_SSI_LOAD_50PF (0x03)
+#define GPIO_DSCR_SSI_SSI_LOAD_30PF (0x02)
+#define GPIO_DSCR_SSI_SSI_LOAD_20PF (0x01)
+#define GPIO_DSCR_SSI_SSI_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_DMA */
+#define GPIO_DSCR_DMA_DMA(x) (((x)&0x03))
+#define GPIO_DSCR_DMA_DMA_LOAD_50PF (0x03)
+#define GPIO_DSCR_DMA_DMA_LOAD_30PF (0x02)
+#define GPIO_DSCR_DMA_DMA_LOAD_20PF (0x01)
+#define GPIO_DSCR_DMA_DMA_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_DEBUG */
+#define GPIO_DSCR_DEBUG_DEBUG(x) (((x)&0x03))
+#define GPIO_DSCR_DEBUG_DEBUG_LOAD_50PF (0x03)
+#define GPIO_DSCR_DEBUG_DEBUG_LOAD_30PF (0x02)
+#define GPIO_DSCR_DEBUG_DEBUG_LOAD_20PF (0x01)
+#define GPIO_DSCR_DEBUG_DEBUG_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_RESET */
+#define GPIO_DSCR_RESET_RESET(x) (((x)&0x03))
+#define GPIO_DSCR_RESET_RESET_LOAD_50PF (0x03)
+#define GPIO_DSCR_RESET_RESET_LOAD_30PF (0x02)
+#define GPIO_DSCR_RESET_RESET_LOAD_20PF (0x01)
+#define GPIO_DSCR_RESET_RESET_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_IRQ */
+#define GPIO_DSCR_IRQ_IRQ(x) (((x)&0x03))
+#define GPIO_DSCR_IRQ_IRQ_LOAD_50PF (0x03)
+#define GPIO_DSCR_IRQ_IRQ_LOAD_30PF (0x02)
+#define GPIO_DSCR_IRQ_IRQ_LOAD_20PF (0x01)
+#define GPIO_DSCR_IRQ_IRQ_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_USB */
+#define GPIO_DSCR_USB_USB(x) (((x)&0x03))
+#define GPIO_DSCR_USB_USB_LOAD_50PF (0x03)
+#define GPIO_DSCR_USB_USB_LOAD_30PF (0x02)
+#define GPIO_DSCR_USB_USB_LOAD_20PF (0x01)
+#define GPIO_DSCR_USB_USB_LOAD_10PF (0x00)
+
+/* Bit definitions and macros for DSCR_ATA */
+#define GPIO_DSCR_ATA_ATA(x) (((x)&0x03))
+#define GPIO_DSCR_ATA_ATA_LOAD_50PF (0x03)
+#define GPIO_DSCR_ATA_ATA_LOAD_30PF (0x02)
+#define GPIO_DSCR_ATA_ATA_LOAD_20PF (0x01)
+#define GPIO_DSCR_ATA_ATA_LOAD_10PF (0x00)
+
+/*********************************************************************
+* Random Number Generator (RNG)
+*********************************************************************/
+
+/* Bit definitions and macros for RNGCR */
+#define RNG_RNGCR_GO (0x00000001)
+#define RNG_RNGCR_HA (0x00000002)
+#define RNG_RNGCR_IM (0x00000004)
+#define RNG_RNGCR_CI (0x00000008)
+
+/* Bit definitions and macros for RNGSR */
+#define RNG_RNGSR_SV (0x00000001)
+#define RNG_RNGSR_LRS (0x00000002)
+#define RNG_RNGSR_FUF (0x00000004)
+#define RNG_RNGSR_EI (0x00000008)
+#define RNG_RNGSR_OFL(x) (((x)&0x000000FF)<<8)
+#define RNG_RNGSR_OFS(x) (((x)&0x000000FF)<<16)
+
+/*********************************************************************
+* SDRAM Controller (SDRAMC)
+*********************************************************************/
+
+/* Bit definitions and macros for SDMR */
+#define SDRAMC_SDMR_DDR2_AD(x) (((x)&0x00003FFF)) /* Address for DDR2 */
+#define SDRAMC_SDMR_CMD (0x00010000) /* Command */
+#define SDRAMC_SDMR_AD(x) (((x)&0x00000FFF)<<18) /* Address */
+#define SDRAMC_SDMR_BK(x) (((x)&0x00000003)<<30) /* Bank Address */
+#define SDRAMC_SDMR_BK_LMR (0x00000000)
+#define SDRAMC_SDMR_BK_LEMR (0x40000000)
+
+/* Bit definitions and macros for SDCR */
+#define SDRAMC_SDCR_DPD (0x00000001) /* Deep Power-Down Mode */
+#define SDRAMC_SDCR_IPALL (0x00000002) /* Initiate Precharge All */
+#define SDRAMC_SDCR_IREF (0x00000004) /* Initiate Refresh */
+#define SDRAMC_SDCR_DQS_OE(x) (((x)&0x00000003)<<10) /* DQS Output Enable */
+#define SDRAMC_SDCR_MEM_PS (0x00002000) /* Data Port Size */
+#define SDRAMC_SDCR_REF_CNT(x) (((x)&0x0000003F)<<16) /* Periodic Refresh Counter */
+#define SDRAMC_SDCR_OE_RULE (0x00400000) /* Drive Rule Selection */
+#define SDRAMC_SDCR_ADDR_MUX(x) (((x)&0x00000003)<<24) /* Internal Address Mux Select */
+#define SDRAMC_SDCR_DDR2_MODE (0x08000000) /* DDR2 Mode Select */
+#define SDRAMC_SDCR_REF_EN (0x10000000) /* Refresh Enable */
+#define SDRAMC_SDCR_DDR_MODE (0x20000000) /* DDR Mode Select */
+#define SDRAMC_SDCR_CKE (0x40000000) /* Clock Enable */
+#define SDRAMC_SDCR_MODE_EN (0x80000000) /* SDRAM Mode Register Programming Enable */
+#define SDRAMC_SDCR_DQS_OE_BOTH (0x00000C000)
+
+/* Bit definitions and macros for SDCFG1 */
+#define SDRAMC_SDCFG1_WT_LAT(x) (((x)&0x00000007)<<4) /* Write Latency */
+#define SDRAMC_SDCFG1_REF2ACT(x) (((x)&0x0000000F)<<8) /* Refresh to active delay */
+#define SDRAMC_SDCFG1_PRE2ACT(x) (((x)&0x00000007)<<12) /* Precharge to active delay */
+#define SDRAMC_SDCFG1_ACT2RW(x) (((x)&0x00000007)<<16) /* Active to read/write delay */
+#define SDRAMC_SDCFG1_RD_LAT(x) (((x)&0x0000000F)<<20) /* Read CAS Latency */
+#define SDRAMC_SDCFG1_SWT2RWP(x) (((x)&0x00000007)<<24) /* Single write to read/write/precharge delay */
+#define SDRAMC_SDCFG1_SRD2RWP(x) (((x)&0x0000000F)<<28) /* Single read to read/write/precharge delay */
+
+/* Bit definitions and macros for SDCFG2 */
+#define SDRAMC_SDCFG2_BL(x) (((x)&0x0000000F)<<16) /* Burst Length */
+#define SDRAMC_SDCFG2_BRD2W(x) (((x)&0x0000000F)<<20) /* Burst read to write delay */
+#define SDRAMC_SDCFG2_BWT2RWP(x) (((x)&0x0000000F)<<24) /* Burst write to read/write/precharge delay */
+#define SDRAMC_SDCFG2_BRD2RP(x) (((x)&0x0000000F)<<28) /* Burst read to read/precharge delay */
+
+/* Bit definitions and macros for SDCS group */
+#define SDRAMC_SDCS_CSSZ(x) (((x)&0x0000001F)) /* Chip-Select Size */
+#define SDRAMC_SDCS_CSBA(x) (((x)&0x00000FFF)<<20) /* Chip-Select Base Address */
+#define SDRAMC_SDCS_BA(x) ((x)&0xFFF00000)
+#define SDRAMC_SDCS_CSSZ_DISABLE (0x00000000)
+#define SDRAMC_SDCS_CSSZ_1MBYTE (0x00000013)
+#define SDRAMC_SDCS_CSSZ_2MBYTE (0x00000014)
+#define SDRAMC_SDCS_CSSZ_4MBYTE (0x00000015)
+#define SDRAMC_SDCS_CSSZ_8MBYTE (0x00000016)
+#define SDRAMC_SDCS_CSSZ_16MBYTE (0x00000017)
+#define SDRAMC_SDCS_CSSZ_32MBYTE (0x00000018)
+#define SDRAMC_SDCS_CSSZ_64MBYTE (0x00000019)
+#define SDRAMC_SDCS_CSSZ_128MBYTE (0x0000001A)
+#define SDRAMC_SDCS_CSSZ_256MBYTE (0x0000001B)
+#define SDRAMC_SDCS_CSSZ_512MBYTE (0x0000001C)
+#define SDRAMC_SDCS_CSSZ_1GBYTE (0x0000001D)
+#define SDRAMC_SDCS_CSSZ_2GBYTE (0x0000001E)
+#define SDRAMC_SDCS_CSSZ_4GBYTE (0x0000001F)
+
+/*********************************************************************
+* Synchronous Serial Interface (SSI)
+*********************************************************************/
+
+/* Bit definitions and macros for CR */
+#define SSI_CR_SSI_EN (0x00000001)
+#define SSI_CR_TE (0x00000002)
+#define SSI_CR_RE (0x00000004)
+#define SSI_CR_NET (0x00000008)
+#define SSI_CR_SYN (0x00000010)
+#define SSI_CR_I2S(x) (((x)&0x00000003)<<5)
+#define SSI_CR_MCE (0x00000080)
+#define SSI_CR_TCH (0x00000100)
+#define SSI_CR_CIS (0x00000200)
+#define SSI_CR_I2S_NORMAL (0x00000000)
+#define SSI_CR_I2S_MASTER (0x00000020)
+#define SSI_CR_I2S_SLAVE (0x00000040)
+
+/* Bit definitions and macros for ISR */
+#define SSI_ISR_TFE0 (0x00000001)
+#define SSI_ISR_TFE1 (0x00000002)
+#define SSI_ISR_RFF0 (0x00000004)
+#define SSI_ISR_RFF1 (0x00000008)
+#define SSI_ISR_RLS (0x00000010)
+#define SSI_ISR_TLS (0x00000020)
+#define SSI_ISR_RFS (0x00000040)
+#define SSI_ISR_TFS (0x00000080)
+#define SSI_ISR_TUE0 (0x00000100)
+#define SSI_ISR_TUE1 (0x00000200)
+#define SSI_ISR_ROE0 (0x00000400)
+#define SSI_ISR_ROE1 (0x00000800)
+#define SSI_ISR_TDE0 (0x00001000)
+#define SSI_ISR_TDE1 (0x00002000)
+#define SSI_ISR_RDR0 (0x00004000)
+#define SSI_ISR_RDR1 (0x00008000)
+#define SSI_ISR_RXT (0x00010000)
+#define SSI_ISR_CMDDU (0x00020000)
+#define SSI_ISR_CMDAU (0x00040000)
+
+/* Bit definitions and macros for IER */
+#define SSI_IER_TFE0 (0x00000001)
+#define SSI_IER_TFE1 (0x00000002)
+#define SSI_IER_RFF0 (0x00000004)
+#define SSI_IER_RFF1 (0x00000008)
+#define SSI_IER_RLS (0x00000010)
+#define SSI_IER_TLS (0x00000020)
+#define SSI_IER_RFS (0x00000040)
+#define SSI_IER_TFS (0x00000080)
+#define SSI_IER_TUE0 (0x00000100)
+#define SSI_IER_TUE1 (0x00000200)
+#define SSI_IER_ROE0 (0x00000400)
+#define SSI_IER_ROE1 (0x00000800)
+#define SSI_IER_TDE0 (0x00001000)
+#define SSI_IER_TDE1 (0x00002000)
+#define SSI_IER_RDR0 (0x00004000)
+#define SSI_IER_RDR1 (0x00008000)
+#define SSI_IER_RXT (0x00010000)
+#define SSI_IER_CMDU (0x00020000)
+#define SSI_IER_CMDAU (0x00040000)
+#define SSI_IER_TIE (0x00080000)
+#define SSI_IER_TDMAE (0x00100000)
+#define SSI_IER_RIE (0x00200000)
+#define SSI_IER_RDMAE (0x00400000)
+
+/* Bit definitions and macros for TCR */
+#define SSI_TCR_TEFS (0x00000001)
+#define SSI_TCR_TFSL (0x00000002)
+#define SSI_TCR_TFSI (0x00000004)
+#define SSI_TCR_TSCKP (0x00000008)
+#define SSI_TCR_TSHFD (0x00000010)
+#define SSI_TCR_TXDIR (0x00000020)
+#define SSI_TCR_TFDIR (0x00000040)
+#define SSI_TCR_TFEN0 (0x00000080)
+#define SSI_TCR_TFEN1 (0x00000100)
+#define SSI_TCR_TXBIT0 (0x00000200)
+
+/* Bit definitions and macros for RCR */
+#define SSI_RCR_REFS (0x00000001)
+#define SSI_RCR_RFSL (0x00000002)
+#define SSI_RCR_RFSI (0x00000004)
+#define SSI_RCR_RSCKP (0x00000008)
+#define SSI_RCR_RSHFD (0x00000010)
+#define SSI_RCR_RFEN0 (0x00000080)
+#define SSI_RCR_RFEN1 (0x00000100)
+#define SSI_RCR_RXBIT0 (0x00000200)
+#define SSI_RCR_RXEXT (0x00000400)
+
+/* Bit definitions and macros for CCR */
+#define SSI_CCR_PM(x) (((x)&0x000000FF))
+#define SSI_CCR_DC(x) (((x)&0x0000001F)<<8)
+#define SSI_CCR_WL(x) (((x)&0x0000000F)<<13)
+#define SSI_CCR_PSR (0x00020000)
+#define SSI_CCR_DIV2 (0x00040000)
+
+/* Bit definitions and macros for FCSR */
+#define SSI_FCSR_TFWM0(x) (((x)&0x0000000F))
+#define SSI_FCSR_RFWM0(x) (((x)&0x0000000F)<<4)
+#define SSI_FCSR_TFCNT0(x) (((x)&0x0000000F)<<8)
+#define SSI_FCSR_RFCNT0(x) (((x)&0x0000000F)<<12)
+#define SSI_FCSR_TFWM1(x) (((x)&0x0000000F)<<16)
+#define SSI_FCSR_RFWM1(x) (((x)&0x0000000F)<<20)
+#define SSI_FCSR_TFCNT1(x) (((x)&0x0000000F)<<24)
+#define SSI_FCSR_RFCNT1(x) (((x)&0x0000000F)<<28)
+
+/* Bit definitions and macros for ACR */
+#define SSI_ACR_AC97EN (0x00000001)
+#define SSI_ACR_FV (0x00000002)
+#define SSI_ACR_TIF (0x00000004)
+#define SSI_ACR_RD (0x00000008)
+#define SSI_ACR_WR (0x00000010)
+#define SSI_ACR_FRDIV(x) (((x)&0x0000003F)<<5)
+
+/* Bit definitions and macros for ACADD */
+#define SSI_ACADD_SSI_ACADD(x) (((x)&0x0007FFFF))
+
+/* Bit definitions and macros for ACDAT */
+#define SSI_ACDAT_SSI_ACDAT(x) (((x)&0x0007FFFF))
+
+/* Bit definitions and macros for ATAG */
+#define SSI_ATAG_DDI_ATAG(x) (((x)&0x0000FFFF))
+
+/*********************************************************************
+* Phase Locked Loop (PLL)
+*********************************************************************/
+
+/* Bit definitions and macros for PCR */
+#define PLL_PCR_OUTDIV1(x) (((x)&0x0000000F)) /* Output divider for CPU clock frequency */
+#define PLL_PCR_OUTDIV2(x) (((x)&0x0000000F)<<4) /* Output divider for internal bus clock frequency */
+#define PLL_PCR_OUTDIV3(x) (((x)&0x0000000F)<<8) /* Output divider for Flexbus clock frequency */
+#define PLL_PCR_OUTDIV4(x) (((x)&0x0000000F)<<12) /* Output divider for PCI clock frequency */
+#define PLL_PCR_OUTDIV5(x) (((x)&0x0000000F)<<16) /* Output divider for USB clock frequency */
+#define PLL_PCR_PFDR(x) (((x)&0x000000FF)<<24) /* Feedback divider for VCO frequency */
+#define PLL_PCR_PFDR_MASK (0x000F0000)
+#define PLL_PCR_OUTDIV5_MASK (0x000F0000)
+#define PLL_PCR_OUTDIV4_MASK (0x0000F000)
+#define PLL_PCR_OUTDIV3_MASK (0x00000F00)
+#define PLL_PCR_OUTDIV2_MASK (0x000000F0)
+#define PLL_PCR_OUTDIV1_MASK (0x0000000F)
+
+/* Bit definitions and macros for PSR */
+#define PLL_PSR_LOCKS (0x00000001) /* PLL lost lock - sticky */
+#define PLL_PSR_LOCK (0x00000002) /* PLL lock status */
+#define PLL_PSR_LOLIRQ (0x00000004) /* PLL loss-of-lock interrupt enable */
+#define PLL_PSR_LOLRE (0x00000008) /* PLL loss-of-lock reset enable */
+
+/*********************************************************************
+* PCI
+*********************************************************************/
+
+/* Bit definitions and macros for SCR */
+#define PCI_SCR_PE (0x80000000) /* Parity Error detected */
+#define PCI_SCR_SE (0x40000000) /* System error signalled */
+#define PCI_SCR_MA (0x20000000) /* Master aboart received */
+#define PCI_SCR_TR (0x10000000) /* Target abort received */
+#define PCI_SCR_TS (0x08000000) /* Target abort signalled */
+#define PCI_SCR_DT (0x06000000) /* PCI_DEVSEL timing */
+#define PCI_SCR_DP (0x01000000) /* Master data parity err */
+#define PCI_SCR_FC (0x00800000) /* Fast back-to-back */
+#define PCI_SCR_R (0x00400000) /* Reserved */
+#define PCI_SCR_66M (0x00200000) /* 66Mhz */
+#define PCI_SCR_C (0x00100000) /* Capabilities list */
+#define PCI_SCR_F (0x00000200) /* Fast back-to-back enable */
+#define PCI_SCR_S (0x00000100) /* SERR enable */
+#define PCI_SCR_ST (0x00000080) /* Addr and Data stepping */
+#define PCI_SCR_PER (0x00000040) /* Parity error response */
+#define PCI_SCR_V (0x00000020) /* VGA palette snoop enable */
+#define PCI_SCR_MW (0x00000010) /* Memory write and invalidate enable */
+#define PCI_SCR_SP (0x00000008) /* Special cycle monitor or ignore */
+#define PCI_SCR_B (0x00000004) /* Bus master enable */
+#define PCI_SCR_M (0x00000002) /* Memory access control */
+#define PCI_SCR_IO (0x00000001) /* I/O access control */
+
+#define PCI_CR1_BIST(x) ((x & 0xFF) << 24) /* Built in self test */
+#define PCI_CR1_HDR(x) ((x & 0xFF) << 16) /* Header type */
+#define PCI_CR1_LTMR(x) ((x & 0xF8) << 8) /* Latency timer */
+#define PCI_CR1_CLS(x) (x & 0x0F) /* Cache line size */
+
+#define PCI_BAR_BAR0(x) (x & 0xFFFC0000)
+#define PCI_BAR_BAR1(x) (x & 0xFFF00000)
+#define PCI_BAR_BAR2(x) (x & 0xFFC00000)
+#define PCI_BAR_BAR3(x) (x & 0xFF000000)
+#define PCI_BAR_BAR4(x) (x & 0xF8000000)
+#define PCI_BAR_BAR5(x) (x & 0xE0000000)
+#define PCI_BAR_PREF (0x00000004) /* Prefetchable access */
+#define PCI_BAR_RANGE (0x00000002) /* Fixed to 00 */
+#define PCI_BAR_IO_M (0x00000001) /* IO / memory space */
+
+#define PCI_CR2_MAXLAT(x) ((x & 0xFF) << 24) /* Maximum latency */
+#define PCI_CR2_MINGNT(x) ((x & 0xFF) << 16) /* Minimum grant */
+#define PCI_CR2_INTPIN(x) ((x & 0xFF) << 8) /* Interrupt Pin */
+#define PCI_CR2_INTLIN(x) (x & 0xFF) /* Interrupt Line */
+
+#define PCI_GSCR_DRD (0x80000000) /* Delayed read discarded */
+#define PCI_GSCR_PE (0x20000000) /* PCI_PERR detected */
+#define PCI_GSCR_SE (0x10000000) /* SERR detected */
+#define PCI_GSCR_ER (0x08000000) /* Error response detected */
+#define PCI_GSCR_DRDE (0x00008000) /* Delayed read discarded enable */
+#define PCI_GSCR_PEE (0x00002000) /* PERR detected interrupt enable */
+#define PCI_GSCR_SEE (0x00001000) /* SERR detected interrupt enable */
+#define PCI_GSCR_PR (0x00000001) /* PCI reset */
+
+#define PCI_TCR1_LD (0x01000000) /* Latency rule disable */
+#define PCI_TCR1_PID (0x00020000) /* Prefetch invalidate and disable */
+#define PCI_TCR1_P (0x00010000) /* Prefetch reads */
+#define PCI_TCR1_WCD (0x00000100) /* Write combine disable */
+
+#define PCI_TCR1_B5E (0x00002000) /* */
+#define PCI_TCR1_B4E (0x00001000) /* */
+#define PCI_TCR1_B3E (0x00000800) /* */
+#define PCI_TCR1_B2E (0x00000400) /* */
+#define PCI_TCR1_B1E (0x00000200) /* */
+#define PCI_TCR1_B0E (0x00000100) /* */
+#define PCI_TCR1_CR (0x00000001) /* */
+
+#define PCI_TBATR_BAT(x) ((x & 0xFFF) << 20)
+#define PCI_TBATR_EN (0x00000001) /* Enable */
+
+#define PCI_IWCR_W0C_IO (0x08000000) /* Windows Maps to PCI I/O */
+#define PCI_IWCR_W0C_PRC_RDMUL (0x04000000) /* PCI Memory Read multiple */
+#define PCI_IWCR_W0C_PRC_RDLN (0x02000000) /* PCI Memory Read line */
+#define PCI_IWCR_W0C_PRC_RD (0x00000000) /* PCI Memory Read */
+#define PCI_IWCR_W0C_EN (0x01000000) /* Enable - Register initialize */
+#define PCI_IWCR_W1C_IO (0x00080000) /* Windows Maps to PCI I/O */
+#define PCI_IWCR_W1C_PRC_RDMUL (0x00040000) /* PCI Memory Read multiple */
+#define PCI_IWCR_W1C_PRC_RDLN (0x00020000) /* PCI Memory Read line */
+#define PCI_IWCR_W1C_PRC_RD (0x00000000) /* PCI Memory Read */
+#define PCI_IWCR_W1C_EN (0x00010000) /* Enable - Register initialize */
+#define PCI_IWCR_W2C_IO (0x00000800) /* Windows Maps to PCI I/O */
+#define PCI_IWCR_W2C_PRC_RDMUL (0x00000400) /* PCI Memory Read multiple */
+#define PCI_IWCR_W2C_PRC_RDLN (0x00000200) /* PCI Memory Read line */
+#define PCI_IWCR_W2C_PRC_RD (0x00000000) /* PCI Memory Read */
+#define PCI_IWCR_W2C_EN (0x00000100) /* Enable - Register initialize */
+
+#define PCI_ICR_REE (0x04000000) /* Retry error enable */
+#define PCI_ICR_IAE (0x02000000) /* Initiator abort enable */
+#define PCI_ICR_TAE (0x01000000) /* Target abort enable */
+
+#define PCI_IDR_DEVID (
+
+/********************************************************************/
+
+#endif /* __MCF5445X__ */
diff --git a/include/asm-m68k/mcftimer.h b/include/asm-m68k/mcftimer.h
deleted file mode 100644
index a73b80e..0000000
--- a/include/asm-m68k/mcftimer.h
+++ /dev/null
@@ -1,113 +0,0 @@
-/*
- * mcftimer.h -- ColdFire internal TIMER support defines.
- *
- * Based on mcftimer.h of uCLinux distribution:
- * (C) Copyright 1999-2002, Greg Ungerer (gerg@snapgear.com)
- * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************/
-#ifndef mcftimer_h
-#define mcftimer_h
-/****************************************************************************/
-
-#include <linux/config.h>
-
-/*
- * Get address specific defines for this ColdFire member.
- */
-#if defined(CONFIG_M5204) || defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#define MCFTIMER_BASE1 0x100 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x120 /* Base address of TIMER2 */
-#elif defined(CONFIG_M5272)
-#define MCFTIMER_BASE1 0x200 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x220 /* Base address of TIMER2 */
-#define MCFTIMER_BASE3 0x240 /* Base address of TIMER4 */
-#define MCFTIMER_BASE4 0x260 /* Base address of TIMER3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#define MCFTIMER_BASE1 0x140 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x180 /* Base address of TIMER2 */
-#elif defined(CONFIG_M5282) | defined(CONFIG_M5271)
-#define MCFTIMER_BASE1 0x150000 /* Base address of TIMER1 */
-#define MCFTIMER_BASE2 0x160000 /* Base address of TIMER2 */
-#define MCFTIMER_BASE3 0x170000 /* Base address of TIMER4 */
-#define MCFTIMER_BASE4 0x180000 /* Base address of TIMER3 */
-#endif
-
-/*
- * Define the TIMER register set addresses.
- */
-#define MCFTIMER_TMR 0x00 /* Timer Mode reg (r/w) */
-#define MCFTIMER_TRR 0x02 /* Timer Reference (r/w) */
-#define MCFTIMER_TCR 0x04 /* Timer Capture reg (r/w) */
-#define MCFTIMER_TCN 0x06 /* Timer Counter reg (r/w) */
-#define MCFTIMER_TER 0x11 /* Timer Event reg (r/w) */
-
-
-/*
- * Define the TIMER register set addresses for 5282.
- */
-#define MCFTIMER_PCSR 0
-#define MCFTIMER_PMR 1
-#define MCFTIMER_PCNTR 2
-
-/*
- * Bit definitions for the Timer Mode Register (TMR).
- * Register bit flags are common accross ColdFires.
- */
-#define MCFTIMER_TMR_PREMASK 0xff00 /* Prescalar mask */
-#define MCFTIMER_TMR_DISCE 0x0000 /* Disable capture */
-#define MCFTIMER_TMR_ANYCE 0x00c0 /* Capture any edge */
-#define MCFTIMER_TMR_FALLCE 0x0080 /* Capture fallingedge */
-#define MCFTIMER_TMR_RISECE 0x0040 /* Capture rising edge */
-#define MCFTIMER_TMR_ENOM 0x0020 /* Enable output toggle */
-#define MCFTIMER_TMR_DISOM 0x0000 /* Do single output pulse */
-#define MCFTIMER_TMR_ENORI 0x0010 /* Enable ref interrupt */
-#define MCFTIMER_TMR_DISORI 0x0000 /* Disable ref interrupt */
-#define MCFTIMER_TMR_RESTART 0x0008 /* Restart counter */
-#define MCFTIMER_TMR_FREERUN 0x0000 /* Free running counter */
-#define MCFTIMER_TMR_CLKTIN 0x0006 /* Input clock is TIN */
-#define MCFTIMER_TMR_CLK16 0x0004 /* Input clock is /16 */
-#define MCFTIMER_TMR_CLK1 0x0002 /* Input clock is /1 */
-#define MCFTIMER_TMR_CLKSTOP 0x0000 /* Stop counter */
-#define MCFTIMER_TMR_ENABLE 0x0001 /* Enable timer */
-#define MCFTIMER_TMR_DISABLE 0x0000 /* Disable timer */
-
-/*
- * Bit definitions for the Timer Event Registers (TER).
- */
-#define MCFTIMER_TER_CAP 0x01 /* Capture event */
-#define MCFTIMER_TER_REF 0x02 /* Refernece event */
-
-/*
- * Bit definitions for the 5282 PIT Control and Status Register (PCSR).
- */
-#define MCFTIMER_PCSR_EN 0x0001
-#define MCFTIMER_PCSR_RLD 0x0002
-#define MCFTIMER_PCSR_PIF 0x0004
-#define MCFTIMER_PCSR_PIE 0x0008
-#define MCFTIMER_PCSR_OVW 0x0010
-#define MCFTIMER_PCSR_HALTED 0x0020
-#define MCFTIMER_PCSR_DOZE 0x0040
-
-
-/****************************************************************************/
-#endif /* mcftimer_h */
diff --git a/include/asm-m68k/mcfuart.h b/include/asm-m68k/mcfuart.h
deleted file mode 100644
index 7c0999d..0000000
--- a/include/asm-m68k/mcfuart.h
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * mcfuart.h -- ColdFire internal UART support defines.
- *
- * File copied from mcfuart.h of uCLinux distribution:
- * (C) Copyright 1999, Greg Ungerer (gerg@snapgear.com)
- * (C) Copyright 2000, Lineo Inc. (www.lineo.com)
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/****************************************************************************/
-#ifndef mcfuart_h
-#define mcfuart_h
-/****************************************************************************/
-
-#include <linux/config.h>
-
-/*
- * Define the base address of the UARTS within the MBAR address
- * space.
- */
-#if defined(CONFIG_M5272)
-#define MCFUART_BASE1 0x100 /* Base address of UART1 */
-#define MCFUART_BASE2 0x140 /* Base address of UART2 */
-#elif defined(CONFIG_M5204) || defined(CONFIG_M5206) || defined(CONFIG_M5206e)
-#if defined(CONFIG_NETtel)
-#define MCFUART_BASE1 0x180 /* Base address of UART1 */
-#define MCFUART_BASE2 0x140 /* Base address of UART2 */
-#else
-#define MCFUART_BASE1 0x140 /* Base address of UART1 */
-#define MCFUART_BASE2 0x180 /* Base address of UART2 */
-#endif
-#elif defined(CONFIG_M5282) || defined(CONFIG_M5271)
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x240 /* Base address of UART2 */
-#define MCFUART_BASE3 0x280 /* Base address of UART3 */
-#elif defined(CONFIG_M5249) || defined(CONFIG_M5307) || defined(CONFIG_M5407)
-#if defined(CONFIG_NETtel) || defined(CONFIG_DISKtel) || defined(CONFIG_SECUREEDGEMP3)
-#define MCFUART_BASE1 0x200 /* Base address of UART1 */
-#define MCFUART_BASE2 0x1c0 /* Base address of UART2 */
-#else
-#define MCFUART_BASE1 0x1c0 /* Base address of UART1 */
-#define MCFUART_BASE2 0x200 /* Base address of UART2 */
-#endif
-#endif
-
-
-/*
- * Define the ColdFire UART register set addresses.
- */
-#define MCFUART_UMR 0x00 /* Mode register (r/w) */
-#define MCFUART_USR 0x04 /* Status register (r) */
-#define MCFUART_UCSR 0x04 /* Clock Select (w) */
-#define MCFUART_UCR 0x08 /* Command register (w) */
-#define MCFUART_URB 0x0c /* Receiver Buffer (r) */
-#define MCFUART_UTB 0x0c /* Transmit Buffer (w) */
-#define MCFUART_UIPCR 0x10 /* Input Port Change (r) */
-#define MCFUART_UACR 0x10 /* Auxiliary Control (w) */
-#define MCFUART_UISR 0x14 /* Interrup Status (r) */
-#define MCFUART_UIMR 0x14 /* Interrupt Mask (w) */
-#define MCFUART_UBG1 0x18 /* Baud Rate MSB (r/w) */
-#define MCFUART_UBG2 0x1c /* Baud Rate LSB (r/w) */
-#ifdef CONFIG_M5272
-#define MCFUART_UTF 0x28 /* Transmitter FIFO (r/w) */
-#define MCFUART_URF 0x2c /* Receiver FIFO (r/w) */
-#define MCFUART_UFPD 0x30 /* Frac Prec. Divider (r/w) */
-#else
-#define MCFUART_UIVR 0x30 /* Interrupt Vector (r/w) */
-#endif
-#define MCFUART_UIPR 0x34 /* Input Port (r) */
-#define MCFUART_UOP1 0x38 /* Output Port Bit Set (w) */
-#define MCFUART_UOP0 0x3c /* Output Port Bit Reset (w) */
-
-#ifdef CONFIG_M5249
-/* Note: This isn't in the 5249 docs */
-#define MCFUART_UFPD 0x30 /* Frac Prec. Divider (r/w) */
-#endif
-
-/*
- * Define bit flags in Mode Register 1 (MR1).
- */
-#define MCFUART_MR1_RXRTS 0x80 /* Auto RTS flow control */
-#define MCFUART_MR1_RXIRQFULL 0x40 /* RX IRQ type FULL */
-#define MCFUART_MR1_RXIRQRDY 0x00 /* RX IRQ type RDY */
-#define MCFUART_MR1_RXERRBLOCK 0x20 /* RX block error mode */
-#define MCFUART_MR1_RXERRCHAR 0x00 /* RX char error mode */
-
-#define MCFUART_MR1_PARITYNONE 0x10 /* No parity */
-#define MCFUART_MR1_PARITYEVEN 0x00 /* Even parity */
-#define MCFUART_MR1_PARITYODD 0x04 /* Odd parity */
-#define MCFUART_MR1_PARITYSPACE 0x08 /* Space parity */
-#define MCFUART_MR1_PARITYMARK 0x0c /* Mark parity */
-
-#define MCFUART_MR1_CS5 0x00 /* 5 bits per char */
-#define MCFUART_MR1_CS6 0x01 /* 6 bits per char */
-#define MCFUART_MR1_CS7 0x02 /* 7 bits per char */
-#define MCFUART_MR1_CS8 0x03 /* 8 bits per char */
-
-/*
- * Define bit flags in Mode Register 2 (MR2).
- */
-#define MCFUART_MR2_LOOPBACK 0x80 /* Loopback mode */
-#define MCFUART_MR2_REMOTELOOP 0xc0 /* Remote loopback mode */
-#define MCFUART_MR2_AUTOECHO 0x40 /* Automatic echo */
-#define MCFUART_MR2_TXRTS 0x20 /* Assert RTS on TX */
-#define MCFUART_MR2_TXCTS 0x10 /* Auto CTS flow control */
-
-#define MCFUART_MR2_STOP1 0x07 /* 1 stop bit */
-#define MCFUART_MR2_STOP15 0x08 /* 1.5 stop bits */
-#define MCFUART_MR2_STOP2 0x0f /* 2 stop bits */
-
-/*
- * Define bit flags in Status Register (USR).
- */
-#define MCFUART_USR_RXBREAK 0x80 /* Received BREAK */
-#define MCFUART_USR_RXFRAMING 0x40 /* Received framing error */
-#define MCFUART_USR_RXPARITY 0x20 /* Received parity error */
-#define MCFUART_USR_RXOVERRUN 0x10 /* Received overrun error */
-#define MCFUART_USR_TXEMPTY 0x08 /* Transmitter empty */
-#define MCFUART_USR_TXREADY 0x04 /* Transmitter ready */
-#define MCFUART_USR_RXFULL 0x02 /* Receiver full */
-#define MCFUART_USR_RXREADY 0x01 /* Receiver ready */
-
-#define MCFUART_USR_RXERR (MCFUART_USR_RXBREAK | MCFUART_USR_RXFRAMING | \
- MCFUART_USR_RXPARITY | MCFUART_USR_RXOVERRUN)
-
-/*
- * Define bit flags in Clock Select Register (UCSR).
- */
-#define MCFUART_UCSR_RXCLKTIMER 0xd0 /* RX clock is timer */
-#define MCFUART_UCSR_RXCLKEXT16 0xe0 /* RX clock is external x16 */
-#define MCFUART_UCSR_RXCLKEXT1 0xf0 /* RX clock is external x1 */
-
-#define MCFUART_UCSR_TXCLKTIMER 0x0d /* TX clock is timer */
-#define MCFUART_UCSR_TXCLKEXT16 0x0e /* TX clock is external x16 */
-#define MCFUART_UCSR_TXCLKEXT1 0x0f /* TX clock is external x1 */
-
-/*
- * Define bit flags in Command Register (UCR).
- */
-#define MCFUART_UCR_CMDNULL 0x00 /* No command */
-#define MCFUART_UCR_CMDRESETMRPTR 0x10 /* Reset MR pointer */
-#define MCFUART_UCR_CMDRESETRX 0x20 /* Reset receiver */
-#define MCFUART_UCR_CMDRESETTX 0x30 /* Reset transmitter */
-#define MCFUART_UCR_CMDRESETERR 0x40 /* Reset error status */
-#define MCFUART_UCR_CMDRESETBREAK 0x50 /* Reset BREAK change */
-#define MCFUART_UCR_CMDBREAKSTART 0x60 /* Start BREAK */
-#define MCFUART_UCR_CMDBREAKSTOP 0x70 /* Stop BREAK */
-
-#define MCFUART_UCR_TXNULL 0x00 /* No TX command */
-#define MCFUART_UCR_TXENABLE 0x04 /* Enable TX */
-#define MCFUART_UCR_TXDISABLE 0x08 /* Disable TX */
-#define MCFUART_UCR_RXNULL 0x00 /* No RX command */
-#define MCFUART_UCR_RXENABLE 0x01 /* Enable RX */
-#define MCFUART_UCR_RXDISABLE 0x02 /* Disable RX */
-
-/*
- * Define bit flags in Input Port Change Register (UIPCR).
- */
-#define MCFUART_UIPCR_CTSCOS 0x10 /* CTS change of state */
-#define MCFUART_UIPCR_CTS 0x01 /* CTS value */
-
-/*
- * Define bit flags in Input Port Register (UIP).
- */
-#define MCFUART_UIPR_CTS 0x01 /* CTS value */
-
-/*
- * Define bit flags in Output Port Registers (UOP).
- * Clear bit by writing to UOP0, set by writing to UOP1.
- */
-#define MCFUART_UOP_RTS 0x01 /* RTS set or clear */
-
-/*
- * Define bit flags in the Auxiliary Control Register (UACR).
- */
-#define MCFUART_UACR_IEC 0x01 /* Input enable control */
-
-/*
- * Define bit flags in Interrupt Status Register (UISR).
- * These same bits are used for the Interrupt Mask Register (UIMR).
- */
-#define MCFUART_UIR_COS 0x80 /* Change of state (CTS) */
-#define MCFUART_UIR_DELTABREAK 0x04 /* Break start or stop */
-#define MCFUART_UIR_RXREADY 0x02 /* Receiver ready */
-#define MCFUART_UIR_TXREADY 0x01 /* Transmitter ready */
-
-#ifdef CONFIG_M5272
-/*
- * Define bit flags in the Transmitter FIFO Register (UTF).
- */
-#define MCFUART_UTF_TXB 0x1f /* transmitter data level */
-#define MCFUART_UTF_FULL 0x20 /* transmitter fifo full */
-#define MCFUART_UTF_TXS 0xc0 /* transmitter status */
-
-/*
- * Define bit flags in the Receiver FIFO Register (URF).
- */
-#define MCFUART_URF_RXB 0x1f /* receiver data level */
-#define MCFUART_URF_FULL 0x20 /* receiver fifo full */
-#define MCFUART_URF_RXS 0xc0 /* receiver status */
-#endif
-
-/****************************************************************************/
-#endif /* mcfuart_h */
diff --git a/include/asm-m68k/ptrace.h b/include/asm-m68k/ptrace.h
index 75b2418..01535be 100644
--- a/include/asm-m68k/ptrace.h
+++ b/include/asm-m68k/ptrace.h
@@ -28,32 +28,32 @@
#ifndef __ASSEMBLY__
struct pt_regs {
- ulong d0;
- ulong d1;
- ulong d2;
- ulong d3;
- ulong d4;
- ulong d5;
- ulong d6;
- ulong d7;
- ulong a0;
- ulong a1;
- ulong a2;
- ulong a3;
- ulong a4;
- ulong a5;
- ulong a6;
-#if defined(CONFIG_M5272) || defined(CONFIG_M5282) || defined(CONFIG_M5249) || defined(CONFIG_M5271)
- unsigned format : 4; /* frame format specifier */
- unsigned vector : 12; /* vector offset */
+ ulong d0;
+ ulong d1;
+ ulong d2;
+ ulong d3;
+ ulong d4;
+ ulong d5;
+ ulong d6;
+ ulong d7;
+ ulong a0;
+ ulong a1;
+ ulong a2;
+ ulong a3;
+ ulong a4;
+ ulong a5;
+ ulong a6;
+#if defined(__M68K__)
+ unsigned format:4; /* frame format specifier */
+ unsigned vector:12; /* vector offset */
unsigned short sr;
- unsigned long pc;
+ unsigned long pc;
#else
unsigned short sr;
- unsigned long pc;
+ unsigned long pc;
#endif
};
-#endif /* #ifndef __ASSEMBLY__ */
+#endif /* #ifndef __ASSEMBLY__ */
-#endif /* #ifndef _M68K_PTRACE_H */
+#endif /* #ifndef _M68K_PTRACE_H */
diff --git a/include/asm-m68k/rtc.h b/include/asm-m68k/rtc.h
new file mode 100644
index 0000000..7651ca9
--- /dev/null
+++ b/include/asm-m68k/rtc.h
@@ -0,0 +1,109 @@
+/*
+ * RealTime Clock
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __MCFRTC_H__
+#define __MCFRTC_H__
+
+/* Real time Clock */
+typedef struct rtc_ctrl {
+ u32 hourmin; /* 0x00 Hours and Minutes Counter Register */
+ u32 seconds; /* 0x04 Seconds Counter Register */
+ u32 alrm_hm; /* 0x08 Hours and Minutes Alarm Register */
+ u32 alrm_sec; /* 0x0C Seconds Alarm Register */
+ u32 cr; /* 0x10 Control Register */
+ u32 isr; /* 0x14 Interrupt Status Register */
+ u32 ier; /* 0x18 Interrupt Enable Register */
+ u32 stpwatch; /* 0x1C Stopwatch Minutes Register */
+ u32 days; /* 0x20 Days Counter Register */
+ u32 alrm_day; /* 0x24 Days Alarm Register */
+ void *extended;
+} rtc_t;
+
+/* Bit definitions and macros for HOURMIN */
+#define RTC_HOURMIN_MINUTES(x) (((x)&0x0000003F))
+#define RTC_HOURMIN_HOURS(x) (((x)&0x0000001F)<<8)
+
+/* Bit definitions and macros for SECONDS */
+#define RTC_SECONDS_SECONDS(x) (((x)&0x0000003F))
+
+/* Bit definitions and macros for ALRM_HM */
+#define RTC_ALRM_HM_MINUTES(x) (((x)&0x0000003F))
+#define RTC_ALRM_HM_HOURS(x) (((x)&0x0000001F)<<8)
+
+/* Bit definitions and macros for ALRM_SEC */
+#define RTC_ALRM_SEC_SECONDS(x) (((x)&0x0000003F))
+
+/* Bit definitions and macros for CR */
+#define RTC_CR_SWR (0x00000001)
+#define RTC_CR_XTL(x) (((x)&0x00000003)<<5)
+#define RTC_CR_EN (0x00000080)
+#define RTC_CR_32768 (0x0)
+#define RTC_CR_32000 (0x1)
+#define RTC_CR_38400 (0x2)
+
+/* Bit definitions and macros for ISR */
+#define RTC_ISR_SW (0x00000001)
+#define RTC_ISR_MIN (0x00000002)
+#define RTC_ISR_ALM (0x00000004)
+#define RTC_ISR_DAY (0x00000008)
+#define RTC_ISR_1HZ (0x00000010)
+#define RTC_ISR_HR (0x00000020)
+#define RTC_ISR_2HZ (0x00000080)
+#define RTC_ISR_SAM0 (0x00000100)
+#define RTC_ISR_SAM1 (0x00000200)
+#define RTC_ISR_SAM2 (0x00000400)
+#define RTC_ISR_SAM3 (0x00000800)
+#define RTC_ISR_SAM4 (0x00001000)
+#define RTC_ISR_SAM5 (0x00002000)
+#define RTC_ISR_SAM6 (0x00004000)
+#define RTC_ISR_SAM7 (0x00008000)
+
+/* Bit definitions and macros for IER */
+#define RTC_IER_SW (0x00000001)
+#define RTC_IER_MIN (0x00000002)
+#define RTC_IER_ALM (0x00000004)
+#define RTC_IER_DAY (0x00000008)
+#define RTC_IER_1HZ (0x00000010)
+#define RTC_IER_HR (0x00000020)
+#define RTC_IER_2HZ (0x00000080)
+#define RTC_IER_SAM0 (0x00000100)
+#define RTC_IER_SAM1 (0x00000200)
+#define RTC_IER_SAM2 (0x00000400)
+#define RTC_IER_SAM3 (0x00000800)
+#define RTC_IER_SAM4 (0x00001000)
+#define RTC_IER_SAM5 (0x00002000)
+#define RTC_IER_SAM6 (0x00004000)
+#define RTC_IER_SAM7 (0x00008000)
+
+/* Bit definitions and macros for STPWCH */
+#define RTC_STPWCH_CNT(x) (((x)&0x0000003F))
+
+/* Bit definitions and macros for DAYS */
+#define RTC_DAYS_DAYS(x) (((x)&0x0000FFFF))
+
+/* Bit definitions and macros for ALRM_DAY */
+#define RTC_ALRM_DAY_DAYS(x) (((x)&0x0000FFFF))
+
+#endif /* __MCFRTC_H__ */
diff --git a/include/asm-m68k/timer.h b/include/asm-m68k/timer.h
new file mode 100644
index 0000000..030720c
--- /dev/null
+++ b/include/asm-m68k/timer.h
@@ -0,0 +1,118 @@
+/*
+ * timer.h -- ColdFire internal TIMER support defines.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/****************************************************************************/
+#ifndef timer_h
+#define timer_h
+/****************************************************************************/
+
+/****************************************************************************/
+/* Timer structure */
+/****************************************************************************/
+/* DMA Timer module registers */
+typedef struct dtimer_ctrl {
+#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
+ u16 tmr; /* 0x00 Mode register */
+ u16 res1; /* 0x02 */
+ u16 trr; /* 0x04 Reference register */
+ u16 res2; /* 0x06 */
+ u16 tcr; /* 0x08 Capture register */
+ u16 res3; /* 0x0A */
+ u16 tcn; /* 0x0C Counter register */
+ u16 res4; /* 0x0E */
+ u8 res6; /* 0x10 */
+ u8 ter; /* 0x11 Event register */
+ u16 res7; /* 0x12 */
+#else
+ u16 tmr; /* 0x00 Mode register */
+ u8 txmr; /* 0x02 Extended Mode register */
+ u8 ter; /* 0x03 Event register */
+ u32 trr; /* 0x04 Reference register */
+ u32 tcr; /* 0x08 Capture register */
+ u32 tcn; /* 0x0C Counter register */
+#endif
+} dtmr_t;
+
+/*Programmable Interrupt Timer */
+typedef struct pit_ctrl {
+ u16 pcsr; /* 0x00 Control and Status Register */
+ u16 pmr; /* 0x02 Modulus Register */
+ u16 pcntr; /* 0x04 Count Register */
+} pit_t;
+
+/*********************************************************************
+* DMA Timers (DTIM)
+*********************************************************************/
+/* Bit definitions and macros for DTMR */
+#define DTIM_DTMR_RST (0x0001) /* Reset */
+#define DTIM_DTMR_CLK(x) (((x)&0x0003)<<1) /* Input clock source */
+#define DTIM_DTMR_FRR (0x0008) /* Free run/restart */
+#define DTIM_DTMR_ORRI (0x0010) /* Output reference request/interrupt enable */
+#define DTIM_DTMR_OM (0x0020) /* Output Mode */
+#define DTIM_DTMR_CE(x) (((x)&0x0003)<<6) /* Capture Edge */
+#define DTIM_DTMR_PS(x) (((x)&0x00FF)<<8) /* Prescaler value */
+#define DTIM_DTMR_RST_EN (0x0001)
+#define DTIM_DTMR_RST_RST (0x0000)
+#define DTIM_DTMR_CE_ANY (0x00C0)
+#define DTIM_DTMR_CE_FALL (0x0080)
+#define DTIM_DTMR_CE_RISE (0x0040)
+#define DTIM_DTMR_CE_NONE (0x0000)
+#define DTIM_DTMR_CLK_DTIN (0x0006)
+#define DTIM_DTMR_CLK_DIV16 (0x0004)
+#define DTIM_DTMR_CLK_DIV1 (0x0002)
+#define DTIM_DTMR_CLK_STOP (0x0000)
+
+/* Bit definitions and macros for DTXMR */
+#define DTIM_DTXMR_MODE16 (0x01) /* Increment Mode */
+#define DTIM_DTXMR_DMAEN (0x80) /* DMA request */
+
+/* Bit definitions and macros for DTER */
+#define DTIM_DTER_CAP (0x01) /* Capture event */
+#define DTIM_DTER_REF (0x02) /* Output reference event */
+
+/*********************************************************************
+*
+* Programmable Interrupt Timer Modules (PIT)
+*
+*********************************************************************/
+
+/* Bit definitions and macros for PCSR */
+#define PIT_PCSR_EN (0x0001)
+#define PIT_PCSR_RLD (0x0002)
+#define PIT_PCSR_PIF (0x0004)
+#define PIT_PCSR_PIE (0x0008)
+#define PIT_PCSR_OVW (0x0010)
+#define PIT_PCSR_HALTED (0x0020)
+#define PIT_PCSR_DOZE (0x0040)
+#define PIT_PCSR_PRE(x) (((x)&0x000F)<<8)
+
+/* Bit definitions and macros for PMR */
+#define PIT_PMR_PM(x) (x)
+
+/* Bit definitions and macros for PCNTR */
+#define PIT_PCNTR_PC(x) (x)
+
+/****************************************************************************/
+#endif /* timer_h */
diff --git a/include/asm-m68k/u-boot.h b/include/asm-m68k/u-boot.h
index 7a6a8c1..93a6959 100644
--- a/include/asm-m68k/u-boot.h
+++ b/include/asm-m68k/u-boot.h
@@ -37,24 +37,44 @@
#ifndef __ASSEMBLY__
typedef struct bd_info {
- unsigned long bi_memstart; /* start of DRAM memory */
- unsigned long bi_memsize; /* size of DRAM memory in bytes */
- unsigned long bi_flashstart; /* start of FLASH memory */
- unsigned long bi_flashsize; /* size of FLASH memory */
- unsigned long bi_flashoffset; /* reserved area for startup monitor */
- unsigned long bi_sramstart; /* start of SRAM memory */
- unsigned long bi_sramsize; /* size of SRAM memory */
- unsigned long bi_mbar_base; /* base of internal registers */
- unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
- unsigned long bi_boot_params; /* where this board expects params */
- unsigned long bi_ip_addr; /* IP Address */
- unsigned char bi_enetaddr[6]; /* Ethernet adress */
- unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
- unsigned long bi_intfreq; /* Internal Freq, in MHz */
- unsigned long bi_busfreq; /* Bus Freq, in MHz */
- unsigned long bi_baudrate; /* Console Baudrate */
+ unsigned long bi_memstart; /* start of DRAM memory */
+ unsigned long bi_memsize; /* size of DRAM memory in bytes */
+ unsigned long bi_flashstart; /* start of FLASH memory */
+ unsigned long bi_flashsize; /* size of FLASH memory */
+ unsigned long bi_flashoffset; /* reserved area for startup monitor */
+ unsigned long bi_sramstart; /* start of SRAM memory */
+ unsigned long bi_sramsize; /* size of SRAM memory */
+ unsigned long bi_mbar_base; /* base of internal registers */
+ unsigned long bi_bootflags; /* boot / reboot flag (for LynxOS) */
+ unsigned long bi_boot_params; /* where this board expects params */
+ unsigned long bi_ip_addr; /* IP Address */
+ unsigned char bi_enetaddr[6]; /* Ethernet adress */
+ unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
+ unsigned long bi_intfreq; /* Internal Freq, in MHz */
+ unsigned long bi_busfreq; /* Bus Freq, in MHz */
+#ifdef CONFIG_PCI
+ unsigned long bi_pcifreq; /* pci Freq in MHz */
+#endif
+#ifdef CONFIG_EXTRA_CLOCK
+ unsigned long bi_inpfreq; /* input Freq in MHz */
+ unsigned long bi_vcofreq; /* vco Freq in MHz */
+ unsigned long bi_flbfreq; /* Flexbus Freq in MHz */
+#endif
+ unsigned long bi_baudrate; /* Console Baudrate */
+
+#ifdef CONFIG_HAS_ETH1
+ /* second onboard ethernet port */
+ unsigned char bi_enet1addr[6];
+#endif
+#ifdef CONFIG_HAS_ETH2
+ /* third onboard ethernet port */
+ unsigned char bi_enet2addr[6];
+#endif
+#ifdef CONFIG_HAS_ETH3
+ unsigned char bi_enet3addr[6];
+#endif
} bd_t;
-#endif /* __ASSEMBLY__ */
+#endif /* __ASSEMBLY__ */
-#endif /* __U_BOOT_H__ */
+#endif /* __U_BOOT_H__ */
diff --git a/include/asm-m68k/uart.h b/include/asm-m68k/uart.h
new file mode 100644
index 0000000..9a528ea
--- /dev/null
+++ b/include/asm-m68k/uart.h
@@ -0,0 +1,171 @@
+/*
+ * uart.h -- ColdFire internal UART support defines.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/****************************************************************************/
+#ifndef uart_h
+#define uart_h
+/****************************************************************************/
+
+/* UART module registers */
+/* Register read/write struct */
+typedef struct uart {
+ u8 umr; /* 0x00 Mode Register */
+ u8 resv0[0x3];
+ union {
+ u8 usr; /* 0x04 Status Register */
+ u8 ucsr; /* 0x04 Clock Select Register */
+ };
+ u8 resv1[0x3];
+ u8 ucr; /* 0x08 Command Register */
+ u8 resv2[0x3];
+ union {
+ u8 utb; /* 0x0c Transmit Buffer */
+ u8 urb; /* 0x0c Receive Buffer */
+ };
+ u8 resv3[0x3];
+ union {
+ u8 uipcr; /* 0x10 Input Port Change Register */
+ u8 uacr; /* 0x10 Auxiliary Control reg */
+ };
+ u8 resv4[0x3];
+ union {
+ u8 uimr; /* 0x14 Interrupt Mask reg */
+ u8 uisr; /* 0x14 Interrupt Status reg */
+ };
+ u8 resv5[0x3];
+ u8 ubg1; /* 0x18 Counter Timer Upper Register */
+ u8 resv6[0x3];
+ u8 ubg2; /* 0x1c Counter Timer Lower Register */
+ u8 resv7[0x17];
+ u8 uip; /* 0x34 Input Port Register */
+ u8 resv8[0x3];
+ u8 uop1; /* 0x38 Output Port Set Register */
+ u8 resv9[0x3];
+ u8 uop0; /* 0x3c Output Port Reset Register */
+} uart_t;
+
+/*********************************************************************
+* Universal Asynchronous Receiver Transmitter (UART)
+*********************************************************************/
+/* Bit definitions and macros for UMR */
+#define UART_UMR_BC(x) (((x)&0x03))
+#define UART_UMR_PT (0x04)
+#define UART_UMR_PM(x) (((x)&0x03)<<3)
+#define UART_UMR_ERR (0x20)
+#define UART_UMR_RXIRQ (0x40)
+#define UART_UMR_RXRTS (0x80)
+#define UART_UMR_SB(x) (((x)&0x0F))
+#define UART_UMR_TXCTS (0x10) /* Trsnsmit CTS */
+#define UART_UMR_TXRTS (0x20) /* Transmit RTS */
+#define UART_UMR_CM(x) (((x)&0x03)<<6) /* CM bits */
+#define UART_UMR_PM_MULTI_ADDR (0x1C)
+#define UART_UMR_PM_MULTI_DATA (0x18)
+#define UART_UMR_PM_NONE (0x10)
+#define UART_UMR_PM_FORCE_HI (0x0C)
+#define UART_UMR_PM_FORCE_LO (0x08)
+#define UART_UMR_PM_ODD (0x04)
+#define UART_UMR_PM_EVEN (0x00)
+#define UART_UMR_BC_5 (0x00)
+#define UART_UMR_BC_6 (0x01)
+#define UART_UMR_BC_7 (0x02)
+#define UART_UMR_BC_8 (0x03)
+#define UART_UMR_CM_NORMAL (0x00)
+#define UART_UMR_CM_ECH (0x40)
+#define UART_UMR_CM_LOCAL_LOOP (0x80)
+#define UART_UMR_CM_REMOTE_LOOP (0xC0)
+#define UART_UMR_SB_STOP_BITS_1 (0x07)
+#define UART_UMR_SB_STOP_BITS_15 (0x08)
+#define UART_UMR_SB_STOP_BITS_2 (0x0F)
+
+/* Bit definitions and macros for USR */
+#define UART_USR_RXRDY (0x01)
+#define UART_USR_FFULL (0x02)
+#define UART_USR_TXRDY (0x04)
+#define UART_USR_TXEMP (0x08)
+#define UART_USR_OE (0x10)
+#define UART_USR_PE (0x20)
+#define UART_USR_FE (0x40)
+#define UART_USR_RB (0x80)
+
+/* Bit definitions and macros for UCSR */
+#define UART_UCSR_TCS(x) (((x)&0x0F))
+#define UART_UCSR_RCS(x) (((x)&0x0F)<<4)
+#define UART_UCSR_RCS_SYS_CLK (0xD0)
+#define UART_UCSR_RCS_CTM16 (0xE0)
+#define UART_UCSR_RCS_CTM (0xF0)
+#define UART_UCSR_TCS_SYS_CLK (0x0D)
+#define UART_UCSR_TCS_CTM16 (0x0E)
+#define UART_UCSR_TCS_CTM (0x0F)
+
+/* Bit definitions and macros for UCR */
+#define UART_UCR_RXC(x) (((x)&0x03))
+#define UART_UCR_TXC(x) (((x)&0x03)<<2)
+#define UART_UCR_MISC(x) (((x)&0x07)<<4)
+#define UART_UCR_NONE (0x00)
+#define UART_UCR_STOP_BREAK (0x70)
+#define UART_UCR_START_BREAK (0x60)
+#define UART_UCR_BKCHGINT (0x50)
+#define UART_UCR_RESET_ERROR (0x40)
+#define UART_UCR_RESET_TX (0x30)
+#define UART_UCR_RESET_RX (0x20)
+#define UART_UCR_RESET_MR (0x10)
+#define UART_UCR_TX_DISABLED (0x08)
+#define UART_UCR_TX_ENABLED (0x04)
+#define UART_UCR_RX_DISABLED (0x02)
+#define UART_UCR_RX_ENABLED (0x01)
+
+/* Bit definitions and macros for UIPCR */
+#define UART_UIPCR_CTS (0x01)
+#define UART_UIPCR_COS (0x10)
+
+/* Bit definitions and macros for UACR */
+#define UART_UACR_IEC (0x01)
+
+/* Bit definitions and macros for UIMR */
+#define UART_UIMR_TXRDY (0x01)
+#define UART_UIMR_RXRDY_FU (0x02)
+#define UART_UIMR_DB (0x04)
+#define UART_UIMR_COS (0x80)
+
+/* Bit definitions and macros for UISR */
+#define UART_UISR_TXRDY (0x01)
+#define UART_UISR_RXRDY_FU (0x02)
+#define UART_UISR_DB (0x04)
+#define UART_UISR_RXFTO (0x08)
+#define UART_UISR_TXFIFO (0x10)
+#define UART_UISR_RXFIFO (0x20)
+#define UART_UISR_COS (0x80)
+
+/* Bit definitions and macros for UIP */
+#define UART_UIP_CTS (0x01)
+
+/* Bit definitions and macros for UOP1 */
+#define UART_UOP1_RTS (0x01)
+
+/* Bit definitions and macros for UOP0 */
+#define UART_UOP0_RTS (0x01)
+
+/****************************************************************************/
+#endif /* mcfuart_h */
diff --git a/include/asm-microblaze/asm.h b/include/asm-microblaze/asm.h
new file mode 100644
index 0000000..f10f89c
--- /dev/null
+++ b/include/asm-microblaze/asm.h
@@ -0,0 +1,98 @@
+/*
+ * (C) Copyright 2007 Michal Simek
+ *
+ * Michal SIMEK <monstr@monstr.eu>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* FSL macros */
+#define NGET(val, fslnum) \
+ __asm__ __volatile__ ("nget %0, rfsl" #fslnum :"=r" (val));
+
+#define GET(val, fslnum) \
+ __asm__ __volatile__ ("get %0, rfsl" #fslnum :"=r" (val));
+
+#define NCGET(val, fslnum) \
+ __asm__ __volatile__ ("ncget %0, rfsl" #fslnum :"=r" (val));
+
+#define CGET(val, fslnum) \
+ __asm__ __volatile__ ("cget %0, rfsl" #fslnum :"=r" (val));
+
+#define NPUT(val, fslnum) \
+ __asm__ __volatile__ ("nput %0, rfsl" #fslnum ::"r" (val));
+
+#define PUT(val, fslnum) \
+ __asm__ __volatile__ ("put %0, rfsl" #fslnum ::"r" (val));
+
+#define NCPUT(val, fslnum) \
+ __asm__ __volatile__ ("ncput %0, rfsl" #fslnum ::"r" (val));
+
+#define CPUT(val, fslnum) \
+ __asm__ __volatile__ ("cput %0, rfsl" #fslnum ::"r" (val));
+
+/* CPU dependent */
+/* machine status register */
+#define MFS(val, reg) \
+ __asm__ __volatile__ ("mfs %0," #reg :"=r" (val));
+
+#define MTS(val, reg) \
+ __asm__ __volatile__ ("mts " #reg ", %0"::"r" (val));
+
+/* get return address from interrupt */
+#define R14(val) \
+ __asm__ __volatile__ ("addi %0, r14, 0":"=r" (val));
+
+#define NOP __asm__ __volatile__ ("nop");
+
+/* use machine status registe USE_MSR_REG */
+#ifdef XILINX_USE_MSR_INSTR
+#define MSRSET(val) \
+ __asm__ __volatile__ ("msrset r0," #val );
+
+#define MSRCLR(val) \
+ __asm__ __volatile__ ("msrclr r0," #val );
+
+#else
+#define MSRSET(val) \
+{ \
+ register unsigned tmp; \
+ __asm__ __volatile__ (" \
+ mfs %0, rmsr; \
+ ori %0, %0, "#val"; \
+ mts rmsr, %0; \
+ nop;" \
+ : "=r" (tmp) \
+ : "d" (val) \
+ : "memory"); \
+}
+
+#define MSRCLR(val) \
+{ \
+ register unsigned tmp; \
+ __asm__ __volatile__ (" \
+ mfs %0, rmsr; \
+ andi %0, %0, ~"#val"; \
+ mts rmsr, %0; \
+ nop;" \
+ : "=r" (tmp) \
+ : "d" (val) \
+ : "memory"); \
+}
+#endif
diff --git a/include/asm-microblaze/microblaze_intc.h b/include/asm-microblaze/microblaze_intc.h
index 6635aea..4c385aa 100644
--- a/include/asm-microblaze/microblaze_intc.h
+++ b/include/asm-microblaze/microblaze_intc.h
@@ -38,3 +38,6 @@
void *arg;
int count; /* number of interrupt */
};
+
+void install_interrupt_handler (int irq, interrupt_handler_t * hdlr,
+ void *arg);
diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h
index 463a111..c42ad82 100644
--- a/include/asm-mips/string.h
+++ b/include/asm-mips/string.h
@@ -1,126 +1,31 @@
-/* $Id: string.h,v 1.13 2000/02/19 14:12:14 harald Exp $
- *
+/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
- * Copyright (c) 1994, 1995, 1996, 1997, 1998 by Ralf Baechle
+ * Copyright (c) 1994, 95, 96, 97, 98, 2000, 01 Ralf Baechle
+ * Copyright (c) 2000 by Silicon Graphics, Inc.
+ * Copyright (c) 2001 MIPS Technologies, Inc.
*/
-#ifndef __ASM_MIPS_STRING_H
-#define __ASM_MIPS_STRING_H
+#ifndef _ASM_STRING_H
+#define _ASM_STRING_H
-#include <linux/config.h>
+/*
+ * We don't do inline string functions, since the
+ * optimised inline asm versions are not small.
+ */
-#define __HAVE_ARCH_STRCPY
-extern __inline__ char *strcpy(char *__dest, __const__ char *__src)
-{
- char *__xdest = __dest;
+#undef __HAVE_ARCH_STRCPY
+extern char *strcpy(char *__dest, __const__ char *__src);
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n"
- "1:\tlbu\t$1,(%1)\n\t"
- "addiu\t%1,1\n\t"
- "sb\t$1,(%0)\n\t"
- "bnez\t$1,1b\n\t"
- "addiu\t%0,1\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (__dest), "=r" (__src)
- : "0" (__dest), "1" (__src)
- : "$1","memory");
+#undef __HAVE_ARCH_STRNCPY
+extern char *strncpy(char *__dest, __const__ char *__src, size_t __n);
- return __xdest;
-}
+#undef __HAVE_ARCH_STRCMP
+extern int strcmp(__const__ char *__cs, __const__ char *__ct);
-#define __HAVE_ARCH_STRNCPY
-extern __inline__ char *strncpy(char *__dest, __const__ char *__src, size_t __n)
-{
- char *__xdest = __dest;
-
- if (__n == 0)
- return __xdest;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n"
- "1:\tlbu\t$1,(%1)\n\t"
- "subu\t%2,1\n\t"
- "sb\t$1,(%0)\n\t"
- "beqz\t$1,2f\n\t"
- "addiu\t%0,1\n\t"
- "bnez\t%2,1b\n\t"
- "addiu\t%1,1\n"
- "2:\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (__dest), "=r" (__src), "=r" (__n)
- : "0" (__dest), "1" (__src), "2" (__n)
- : "$1","memory");
-
- return __dest;
-}
-
-#define __HAVE_ARCH_STRCMP
-extern __inline__ int strcmp(__const__ char *__cs, __const__ char *__ct)
-{
- int __res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n\t"
- "lbu\t%2,(%0)\n"
- "1:\tlbu\t$1,(%1)\n\t"
- "addiu\t%0,1\n\t"
- "bne\t$1,%2,2f\n\t"
- "addiu\t%1,1\n\t"
- "bnez\t%2,1b\n\t"
- "lbu\t%2,(%0)\n\t"
-#if defined(CONFIG_CPU_R3000)
- "nop\n\t"
-#endif
- "move\t%2,$1\n"
- "2:\tsubu\t%2,$1\n"
- "3:\t.set\tat\n\t"
- ".set\treorder"
- : "=r" (__cs), "=r" (__ct), "=r" (__res)
- : "0" (__cs), "1" (__ct)
- : "$1");
-
- return __res;
-}
-
-#define __HAVE_ARCH_STRNCMP
-extern __inline__ int
-strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count)
-{
- int __res;
-
- __asm__ __volatile__(
- ".set\tnoreorder\n\t"
- ".set\tnoat\n"
- "1:\tlbu\t%3,(%0)\n\t"
- "beqz\t%2,2f\n\t"
- "lbu\t$1,(%1)\n\t"
- "subu\t%2,1\n\t"
- "bne\t$1,%3,3f\n\t"
- "addiu\t%0,1\n\t"
- "bnez\t%3,1b\n\t"
- "addiu\t%1,1\n"
- "2:\n\t"
-#if defined(CONFIG_CPU_R3000)
- "nop\n\t"
-#endif
- "move\t%3,$1\n"
- "3:\tsubu\t%3,$1\n\t"
- ".set\tat\n\t"
- ".set\treorder"
- : "=r" (__cs), "=r" (__ct), "=r" (__count), "=r" (__res)
- : "0" (__cs), "1" (__ct), "2" (__count)
- : "$1");
-
- return __res;
-}
+#undef __HAVE_ARCH_STRNCMP
+extern int strncmp(__const__ char *__cs, __const__ char *__ct, size_t __count);
#undef __HAVE_ARCH_MEMSET
extern void *memset(void *__s, int __c, size_t __count);
@@ -131,27 +36,4 @@
#undef __HAVE_ARCH_MEMMOVE
extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
-/* Don't build bcopy at all ... */
-#define __HAVE_ARCH_BCOPY
-
-#define __HAVE_ARCH_MEMSCAN
-extern __inline__ void *memscan(void *__addr, int __c, size_t __size)
-{
- char *__end = (char *)__addr + __size;
-
- __asm__(".set\tpush\n\t"
- ".set\tnoat\n\t"
- ".set\treorder\n\t"
- "1:\tbeq\t%0,%1,2f\n\t"
- "addiu\t%0,1\n\t"
- "lb\t$1,-1(%0)\n\t"
- "bne\t$1,%4,1b\n"
- "2:\t.set\tpop"
- : "=r" (__addr), "=r" (__end)
- : "0" (__addr), "1" (__end), "r" (__c)
- : "$1");
-
- return __addr;
-}
-
-#endif /* __ASM_MIPS_STRING_H */
+#endif /* _ASM_STRING_H */
diff --git a/include/asm-ppc/e300.h b/include/asm-ppc/e300.h
index ff9512f..de82399 100644
--- a/include/asm-ppc/e300.h
+++ b/include/asm-ppc/e300.h
@@ -6,19 +6,10 @@
#ifndef __E300_H__
#define __E300_H__
-/*
- * e300 Processor Version & Revision Numbers
- */
-#define PVR_83xx 0x80830000
-#define PVR_8349_REV10 (PVR_83xx | 0x0010)
-#define PVR_8349_REV11 (PVR_83xx | 0x0011)
-#define PVR_8360_REV10 (PVR_83xx | 0x0020)
-#define PVR_8360_REV11 (PVR_83xx | 0x0020)
-
-#if defined(CONFIG_MPC832X)
-#undef PVR_83xx
-#define PVR_83xx 0x80840000
-#endif
+#define PVR_E300C1 0x80830000
+#define PVR_E300C2 0x80840000
+#define PVR_E300C3 0x80850000
+#define PVR_E300C4 0x80860000
/*
* Hardware Implementation-Dependent Register 0 (HID0)
diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h
index 26bc875..4676e2c 100644
--- a/include/asm-ppc/global_data.h
+++ b/include/asm-ppc/global_data.h
@@ -55,11 +55,13 @@
#if defined(CONFIG_MPC83XX)
/* There are other clocks in the MPC83XX */
u32 csb_clk;
-#if defined (CONFIG_MPC834X)
+#if defined (CONFIG_MPC834X) || defined(CONFIG_MPC831X)
u32 tsec1_clk;
u32 tsec2_clk;
- u32 usbmph_clk;
u32 usbdr_clk;
+#endif
+#if defined (CONFIG_MPC834X)
+ u32 usbmph_clk;
#endif /* CONFIG_MPC834X */
u32 core_clk;
u32 i2c1_clk;
@@ -69,20 +71,24 @@
u32 lclk_clk;
u32 ddr_clk;
u32 pci_clk;
+#if defined(CONFIG_MPC8360)
+ u32 ddr_sec_clk;
+#endif /* CONFIG_MPC8360 */
+#endif
#if defined(CONFIG_QE)
u32 qe_clk;
u32 brg_clk;
uint mp_alloc_base;
uint mp_alloc_top;
#endif /* CONFIG_QE */
-#if defined (CONFIG_MPC8360)
- u32 ddr_sec_clk;
-#endif /* CONFIG_MPC8360 */
-#endif
#if defined(CONFIG_MPC5xxx)
unsigned long ipb_clk;
unsigned long pci_clk;
#endif
+#if defined(CONFIG_MPC512X)
+ u32 ipb_clk;
+ u32 csb_clk;
+#endif /* CONFIG_MPC512X */
#if defined(CONFIG_MPC8220)
unsigned long bExtUart;
unsigned long inp_clk;
@@ -127,7 +133,7 @@
unsigned long do_mdm_init;
unsigned long be_quiet;
#endif
-#ifdef CONFIG_LWMON
+#if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5)
unsigned long kbd_status;
#endif
void **jt; /* jump table */
diff --git a/include/asm-ppc/gpio.h b/include/asm-ppc/gpio.h
index 114dc92..c9b6a36 100644
--- a/include/asm-ppc/gpio.h
+++ b/include/asm-ppc/gpio.h
@@ -45,12 +45,14 @@
typedef enum gpio_out { GPIO_OUT_0, GPIO_OUT_1, GPIO_OUT_NO_CHG } gpio_out_t;
typedef struct {
- unsigned long add; /* gpio core base address */
- gpio_driver_t in_out; /* Driver Setting */
- gpio_select_t alt_nb; /* Selected Alternate */
+ unsigned long add; /* gpio core base address */
+ gpio_driver_t in_out; /* Driver Setting */
+ gpio_select_t alt_nb; /* Selected Alternate */
+ gpio_out_t out_val;/* Default Output Value */
} gpio_param_s;
#endif
void gpio_config(int pin, int in_out, int gpio_alt, int out_val);
void gpio_write_bit(int pin, int val);
+int gpio_read_out_bit(int pin);
void gpio_set_chip_configuration(void);
diff --git a/include/asm-ppc/immap_512x.h b/include/asm-ppc/immap_512x.h
new file mode 100644
index 0000000..23d10d4
--- /dev/null
+++ b/include/asm-ppc/immap_512x.h
@@ -0,0 +1,569 @@
+/*
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * MPC512x Internal Memory Map
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ * Based on the MPC83xx header.
+ */
+
+#ifndef __IMMAP_512x__
+#define __IMMAP_512x__
+
+#include <asm/types.h>
+
+typedef struct law512x {
+ u32 bar; /* Base Addr Register */
+ u32 ar; /* Attributes Register */
+} law521x_t;
+
+/*
+ * System configuration registers
+ */
+typedef struct sysconf512x {
+ u32 immrbar; /* Internal memory map base address register */
+ u8 res0[0x1c];
+ u32 lpbaw; /* LP Boot Access Window */
+ u32 lpcs0aw; /* LP CS0 Access Window */
+ u32 lpcs1aw; /* LP CS1 Access Window */
+ u32 lpcs2aw; /* LP CS2 Access Window */
+ u32 lpcs3aw; /* LP CS3 Access Window */
+ u32 lpcs4aw; /* LP CS4 Access Window */
+ u32 lpcs5aw; /* LP CS5 Access Window */
+ u32 lpcs6aw; /* LP CS6 Access Window */
+ u32 lpcs7aw; /* LP CS7 Access Window */
+ u8 res1[0x1c];
+ law521x_t pcilaw[3]; /* PCI Local Access Window 0-2 Registers */
+ u8 res2[0x28];
+ law521x_t ddrlaw; /* DDR Local Access Window */
+ u8 res3[0x18];
+ u32 mbxbar; /* MBX Base Address */
+ u32 srambar; /* SRAM Base Address */
+ u32 nfcbar; /* NFC Base Address */
+ u8 res4[0x34];
+ u32 spridr; /* System Part and Revision ID Register */
+ u32 spcr; /* System Priority Configuration Register */
+ u8 res5[0xf8];
+} sysconf512x_t;
+
+/*
+ * Watch Dog Timer (WDT) Registers
+ */
+typedef struct wdt512x {
+ u8 res0[4];
+ u32 swcrr; /* System watchdog control register */
+ u32 swcnr; /* System watchdog count register */
+ u8 res1[2];
+ u16 swsrr; /* System watchdog service register */
+ u8 res2[0xF0];
+} wdt512x_t;
+
+/*
+ * RTC Module Registers
+ */
+typedef struct rtclk512x {
+ u8 fixme[0x100];
+} rtclk512x_t;
+
+/*
+ * General Purpose Timer
+ */
+typedef struct gpt512x {
+ u8 fixme[0x100];
+} gpt512x_t;
+
+/*
+ * Integrated Programmable Interrupt Controller
+ */
+typedef struct ipic512x {
+ u8 fixme[0x100];
+} ipic512x_t;
+
+/*
+ * System Arbiter Registers
+ */
+typedef struct arbiter512x {
+ u32 acr; /* Arbiter Configuration Register */
+ u32 atr; /* Arbiter Timers Register */
+ u32 ater; /* Arbiter Transfer Error Register */
+ u32 aer; /* Arbiter Event Register */
+ u32 aidr; /* Arbiter Interrupt Definition Register */
+ u32 amr; /* Arbiter Mask Register */
+ u32 aeatr; /* Arbiter Event Attributes Register */
+ u32 aeadr; /* Arbiter Event Address Register */
+ u32 aerr; /* Arbiter Event Response Register */
+ u8 res1[0xDC];
+} arbiter512x_t;
+
+/*
+ * Reset Module
+ */
+typedef struct reset512x {
+ u32 rcwl; /* Reset Configuration Word Low Register */
+ u32 rcwh; /* Reset Configuration Word High Register */
+ u8 res0[8];
+ u32 rsr; /* Reset Status Register */
+ u32 rmr; /* Reset Mode Register */
+ u32 rpr; /* Reset protection Register */
+ u32 rcr; /* Reset Control Register */
+ u32 rcer; /* Reset Control Enable Register */
+ u8 res1[0xDC];
+} reset512x_t;
+
+/*
+ * Clock Module
+ */
+typedef struct clk512x {
+ u32 spmr; /* System PLL Mode Register */
+ u32 sccr[2]; /* System Clock Control Registers */
+ u32 scfr[2]; /* System Clock Frequency Registers */
+ u8 res0[4];
+ u32 bcr; /* Bread Crumb Register */
+ u32 pscccr[12]; /* PSC0-11 Clock Control Registers */
+ u32 spccr; /* SPDIF Clock Control Registers */
+ u32 cccr; /* CFM Clock Control Registers */
+ u32 dccr; /* DIU Clock Control Registers */
+ u8 res1[0xa8];
+} clk512x_t;
+
+/*
+ * Power Management Control Module
+ */
+typedef struct pmc512x {
+ u8 fixme[0x100];
+} pmc512x_t;
+
+/*
+ * General purpose I/O module
+ */
+typedef struct gpio512x {
+ u8 fixme[0x100];
+} gpio512x_t;
+
+/*
+ * DDR Memory Controller Memory Map
+ */
+typedef struct ddr512x {
+ u32 ddr_sys_config; /* System Configuration Register */
+ u32 ddr_time_config0; /* Timing Configuration Register */
+ u32 ddr_time_config1; /* Timing Configuration Register */
+ u32 ddr_time_config2; /* Timing Configuration Register */
+ u32 ddr_command; /* Command Register */
+ u32 ddr_compact_command; /* Compact Command Register */
+ u32 self_refresh_cmd_0; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_1; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_2; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_3; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_4; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_5; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_6; /* Enter/Exit Self Refresh Registers */
+ u32 self_refresh_cmd_7; /* Enter/Exit Self Refresh Registers */
+ u32 DQS_config_offset_count; /* DQS Config Offset Count */
+ u32 DQS_config_offset_time; /* DQS Config Offset Time */
+ u32 DQS_delay_status; /* DQS Delay Status */
+ u32 res0[0xF];
+ u32 prioman_config1; /* Priority Manager Configuration */
+ u32 prioman_config2; /* Priority Manager Configuration */
+ u32 hiprio_config; /* High Priority Configuration */
+ u32 lut_table0_main_upper; /* LUT0 Main Upper */
+ u32 lut_table1_main_upper; /* LUT1 Main Upper */
+ u32 lut_table2_main_upper; /* LUT2 Main Upper */
+ u32 lut_table3_main_upper; /* LUT3 Main Upper */
+ u32 lut_table4_main_upper; /* LUT4 Main Upper */
+ u32 lut_table0_main_lower; /* LUT0 Main Lower */
+ u32 lut_table1_main_lower; /* LUT1 Main Lower */
+ u32 lut_table2_main_lower; /* LUT2 Main Lower */
+ u32 lut_table3_main_lower; /* LUT3 Main Lower */
+ u32 lut_table4_main_lower; /* LUT4 Main Lower */
+ u32 lut_table0_alternate_upper; /* LUT0 Alternate Upper */
+ u32 lut_table1_alternate_upper; /* LUT1 Alternate Upper */
+ u32 lut_table2_alternate_upper; /* LUT2 Alternate Upper */
+ u32 lut_table3_alternate_upper; /* LUT3 Alternate Upper */
+ u32 lut_table4_alternate_upper; /* LUT4 Alternate Upper */
+ u32 lut_table0_alternate_lower; /* LUT0 Alternate Lower */
+ u32 lut_table1_alternate_lower; /* LUT1 Alternate Lower */
+ u32 lut_table2_alternate_lower; /* LUT2 Alternate Lower */
+ u32 lut_table3_alternate_lower; /* LUT3 Alternate Lower */
+ u32 lut_table4_alternate_lower; /* LUT4 Alternate Lower */
+ u32 performance_monitor_config;
+ u32 event_time_counter;
+ u32 event_time_preset;
+ u32 performance_monitor1_address_low;
+ u32 performance_monitor2_address_low;
+ u32 performance_monitor1_address_hi;
+ u32 performance_monitor2_address_hi;
+ u32 res1[2];
+ u32 performance_monitor1_read_counter;
+ u32 performance_monitor2_read_counter;
+ u32 performance_monitor1_write_counter;
+ u32 performance_monitor2_write_counter;
+ u32 granted_ack_counter0;
+ u32 granted_ack_counter1;
+ u32 granted_ack_counter2;
+ u32 granted_ack_counter3;
+ u32 granted_ack_counter4;
+ u32 cumulative_wait_counter0;
+ u32 cumulative_wait_counter1;
+ u32 cumulative_wait_counter2;
+ u32 cumulative_wait_counter3;
+ u32 cumulative_wait_counter4;
+ u32 summed_priority_counter0;
+ u32 summed_priority_counter1;
+ u32 summed_priority_counter2;
+ u32 summed_priority_counter3;
+ u32 summed_priority_counter4;
+ u32 res2[0x3AD];
+} ddr512x_t;
+
+
+/*
+ * DMA/Messaging Unit
+ */
+typedef struct dma512x {
+ u8 fixme[0x1800];
+} dma512x_t;
+
+/*
+ * PCI Software Configuration Registers
+ */
+typedef struct pciconf512x {
+ u8 fixme[0x80];
+} pciconf512x_t;
+
+/*
+ * Sequencer
+ */
+typedef struct ios512x {
+ u8 fixme[0x100];
+} ios512x_t;
+
+/*
+ * PCI Controller
+ */
+typedef struct pcictrl512x {
+ u8 fixme[0x100];
+} pcictrl512x_t;
+
+
+/*
+ * MSCAN
+ */
+typedef struct mscan512x {
+ u8 fixme[0x100];
+} mscan512x_t;
+
+/*
+ * BDLC
+ */
+typedef struct bdlc512x {
+ u8 fixme[0x100];
+} bdlc512x_t;
+
+/*
+ * SDHC
+ */
+typedef struct sdhc512x {
+ u8 fixme[0x100];
+} sdhc512x_t;
+
+/*
+ * SPDIF
+ */
+typedef struct spdif512x {
+ u8 fixme[0x100];
+} spdif512x_t;
+
+/*
+ * I2C
+ */
+typedef struct i2c512x_dev {
+ volatile u32 madr; /* I2Cn + 0x00 */
+ volatile u32 mfdr; /* I2Cn + 0x04 */
+ volatile u32 mcr; /* I2Cn + 0x08 */
+ volatile u32 msr; /* I2Cn + 0x0C */
+ volatile u32 mdr; /* I2Cn + 0x10 */
+ u8 res0[0x0C];
+} i2c512x_dev_t;
+
+typedef struct i2c512x {
+ i2c512x_dev_t dev[3];
+ volatile u32 icr;
+ volatile u32 mifr;
+ u8 res0[0x98];
+} i2c512x_t;
+
+/*
+ * AXE
+ */
+typedef struct axe512x {
+ u8 fixme[0x100];
+} axe512x_t;
+
+/*
+ * DIU
+ */
+typedef struct diu512x {
+ u8 fixme[0x100];
+} diu512x_t;
+
+/*
+ * CFM
+ */
+typedef struct cfm512x {
+ u8 fixme[0x100];
+} cfm512x_t;
+
+/*
+ * FEC
+ */
+typedef struct fec512x {
+ u8 fixme[0x800];
+} fec512x_t;
+
+/*
+ * ULPI
+ */
+typedef struct ulpi512x {
+ u8 fixme[0x600];
+} ulpi512x_t;
+
+/*
+ * UTMI
+ */
+typedef struct utmi512x {
+ u8 fixme[0x3000];
+} utmi512x_t;
+
+/*
+ * PCI DMA
+ */
+typedef struct pcidma512x {
+ u8 fixme[0x300];
+} pcidma512x_t;
+
+/*
+ * IO Control
+ */
+typedef struct ioctrl512x {
+ u32 regs[0x400];
+} ioctrl512x_t;
+
+/*
+ * IIM
+ */
+typedef struct iim512x {
+ u8 fixme[0x1000];
+} iim512x_t;
+
+/*
+ * LPC
+ */
+typedef struct lpc512x {
+ u32 cs_cfg[8]; /* Chip Select N Configuration Registers
+ No dedicated entry for CS Boot as == CS0 */
+ u32 cs_cr; /* Chip Select Control Register */
+ u32 cs_sr; /* Chip Select Status Register */
+ u32 cs_bcr; /* Chip Select Burst Control Register */
+ u32 cs_dccr; /* Chip Select Deadcycle Control Register */
+ u32 cs_hccr; /* Chip Select Holdcycle Control Register */
+ u8 res0[0xcc];
+ u32 sclpc_psr; /* SCLPC Packet Size Register */
+ u32 sclpc_sar; /* SCLPC Start Address Register */
+ u32 sclpc_cr; /* SCLPC Control Register */
+ u32 sclpc_er; /* SCLPC Enable Register */
+ u32 sclpc_nar; /* SCLPC NextAddress Register */
+ u32 sclpc_sr; /* SCLPC Status Register */
+ u32 sclpc_bdr; /* SCLPC Bytes Done Register */
+ u32 emb_scr; /* EMB Share Counter Register */
+ u32 emb_pcr; /* EMB Pause Control Register */
+ u8 res1[0x1c];
+ u32 lpc_fdwr; /* LPC RX/TX FIFO Data Word Register */
+ u32 lpc_fsr; /* LPC RX/TX FIFO Status Register */
+ u32 lpc_cr; /* LPC RX/TX FIFO Control Register */
+ u32 lpc_ar; /* LPC RX/TX FIFO Alarm Register */
+ u8 res2[0xb0];
+} lpc512x_t;
+
+/*
+ * PATA
+ */
+typedef struct pata512x {
+ u8 fixme[0x100];
+} pata512x_t;
+
+/*
+ * PSC
+ */
+typedef struct psc512x {
+ volatile u8 mode; /* PSC + 0x00 */
+ volatile u8 res0[3];
+ union { /* PSC + 0x04 */
+ volatile u16 status;
+ volatile u16 clock_select;
+ } sr_csr;
+#define psc_status sr_csr.status
+#define psc_clock_select sr_csr.clock_select
+ volatile u16 res1;
+ volatile u8 command; /* PSC + 0x08 */
+ volatile u8 res2[3];
+ union { /* PSC + 0x0c */
+ volatile u8 buffer_8;
+ volatile u16 buffer_16;
+ volatile u32 buffer_32;
+ } buffer;
+#define psc_buffer_8 buffer.buffer_8
+#define psc_buffer_16 buffer.buffer_16
+#define psc_buffer_32 buffer.buffer_32
+ union { /* PSC + 0x10 */
+ volatile u8 ipcr;
+ volatile u8 acr;
+ } ipcr_acr;
+#define psc_ipcr ipcr_acr.ipcr
+#define psc_acr ipcr_acr.acr
+ volatile u8 res3[3];
+ union { /* PSC + 0x14 */
+ volatile u16 isr;
+ volatile u16 imr;
+ } isr_imr;
+#define psc_isr isr_imr.isr
+#define psc_imr isr_imr.imr
+ volatile u16 res4;
+ volatile u8 ctur; /* PSC + 0x18 */
+ volatile u8 res5[3];
+ volatile u8 ctlr; /* PSC + 0x1c */
+ volatile u8 res6[3];
+ volatile u32 ccr; /* PSC + 0x20 */
+ volatile u8 res7[12];
+ volatile u8 ivr; /* PSC + 0x30 */
+ volatile u8 res8[3];
+ volatile u8 ip; /* PSC + 0x34 */
+ volatile u8 res9[3];
+ volatile u8 op1; /* PSC + 0x38 */
+ volatile u8 res10[3];
+ volatile u8 op0; /* PSC + 0x3c */
+ volatile u8 res11[3];
+ volatile u32 sicr; /* PSC + 0x40 */
+ volatile u8 res12[60];
+ volatile u32 tfcmd; /* PSC + 0x80 */
+ volatile u32 tfalarm; /* PSC + 0x84 */
+ volatile u32 tfstat; /* PSC + 0x88 */
+ volatile u32 tfintstat; /* PSC + 0x8C */
+ volatile u32 tfintmask; /* PSC + 0x90 */
+ volatile u32 tfcount; /* PSC + 0x94 */
+ volatile u16 tfwptr; /* PSC + 0x98 */
+ volatile u16 tfrptr; /* PSC + 0x9A */
+ volatile u32 tfsize; /* PSC + 0x9C */
+ volatile u8 res13[28];
+ union { /* PSC + 0xBC */
+ volatile u8 buffer_8;
+ volatile u16 buffer_16;
+ volatile u32 buffer_32;
+ } tfdata_buffer;
+#define tfdata_8 tfdata_buffer.buffer_8
+#define tfdata_16 tfdata_buffer.buffer_16
+#define tfdata_32 tfdata_buffer.buffer_32
+
+ volatile u32 rfcmd; /* PSC + 0xC0 */
+ volatile u32 rfalarm; /* PSC + 0xC4 */
+ volatile u32 rfstat; /* PSC + 0xC8 */
+ volatile u32 rfintstat; /* PSC + 0xCC */
+ volatile u32 rfintmask; /* PSC + 0xD0 */
+ volatile u32 rfcount; /* PSC + 0xD4 */
+ volatile u16 rfwptr; /* PSC + 0xD8 */
+ volatile u16 rfrptr; /* PSC + 0xDA */
+ volatile u32 rfsize; /* PSC + 0xDC */
+ volatile u8 res18[28];
+ union { /* PSC + 0xFC */
+ volatile u8 buffer_8;
+ volatile u16 buffer_16;
+ volatile u32 buffer_32;
+ } rfdata_buffer;
+#define rfdata_8 rfdata_buffer.buffer_8
+#define rfdata_16 rfdata_buffer.buffer_16
+#define rfdata_32 rfdata_buffer.buffer_32
+} psc512x_t;
+
+/*
+ * FIFOC
+ */
+typedef struct fifoc512x {
+ u32 fifoc_cmd;
+ u32 fifoc_int;
+ u32 fifoc_dma;
+ u32 fifoc_axe;
+ u32 fifoc_debug;
+ u8 fixme[0xEC];
+} fifoc512x_t;
+
+/*
+ * SATA
+ */
+typedef struct sata512x {
+ u8 fixme[0x2000];
+} sata512x_t;
+
+typedef struct immap {
+ sysconf512x_t sysconf; /* System configuration */
+ u8 res0[0x700];
+ wdt512x_t wdt; /* Watch Dog Timer (WDT) */
+ rtclk512x_t rtc; /* Real Time Clock Module */
+ gpt512x_t gpt; /* General Purpose Timer */
+ ipic512x_t ipic; /* Integrated Programmable Interrupt Controller */
+ arbiter512x_t arbiter; /* CSB Arbiter */
+ reset512x_t reset; /* Reset Module */
+ clk512x_t clk; /* Clock Module */
+ pmc512x_t pmc; /* Power Management Control Module */
+ gpio512x_t gpio; /* General purpose I/O module */
+ u8 res1[0x100];
+ mscan512x_t mscan; /* MSCAN */
+ bdlc512x_t bdlc; /* BDLC */
+ sdhc512x_t sdhc; /* SDHC */
+ spdif512x_t spdif; /* SPDIF */
+ i2c512x_t i2c; /* I2C Controllers */
+ u8 res2[0x800];
+ axe512x_t axe; /* AXE */
+ diu512x_t diu; /* Display Interface Unit */
+ cfm512x_t cfm; /* Clock Frequency Measurement */
+ u8 res3[0x500];
+ fec512x_t fec; /* Fast Ethernet Controller */
+ ulpi512x_t ulpi; /* USB ULPI */
+ u8 res4[0xa00];
+ utmi512x_t utmi; /* USB UTMI */
+ u8 res5[0x1000];
+ pcidma512x_t pci_dma; /* PCI DMA */
+ pciconf512x_t pci_conf; /* PCI Configuration */
+ u8 res6[0x80];
+ ios512x_t ios; /* PCI Sequencer */
+ pcictrl512x_t pci_ctrl; /* PCI Controller Control and Status */
+ u8 res7[0xa00];
+ ddr512x_t mddrc; /* Multi-port DDR Memory Controller */
+ ioctrl512x_t io_ctrl; /* IO Control */
+ iim512x_t iim; /* IC Identification module */
+ u8 res8[0x4000];
+ lpc512x_t lpc; /* LocalPlus Controller */
+ pata512x_t pata; /* Parallel ATA */
+ u8 res9[0xd00];
+ psc512x_t psc[12]; /* PSCs */
+ u8 res10[0x300];
+ fifoc512x_t fifoc; /* FIFO Controller */
+ u8 res11[0x2000];
+ dma512x_t dma; /* DMA */
+ u8 res12[0xa800];
+ sata512x_t sata; /* Serial ATA */
+ u8 res13[0xde000];
+} immap_t;
+#endif /* __IMMAP_512x__ */
diff --git a/include/asm-ppc/immap_83xx.h b/include/asm-ppc/immap_83xx.h
index 5e088d6..0de9338 100644
--- a/include/asm-ppc/immap_83xx.h
+++ b/include/asm-ppc/immap_83xx.h
@@ -206,7 +206,9 @@
u32 pmccr; /* PMC Configuration Register */
u32 pmcer; /* PMC Event Register */
u32 pmcmr; /* PMC Mask Register */
- u8 res0[0xF4];
+ u32 pmccr1; /* PMC Configuration Register 1 */
+ u32 pmccr2; /* PMC Configuration Register 2 */
+ u8 res0[0xEC];
} pmc83xx_t;
/*
@@ -355,7 +357,8 @@
u8 res2[0x8];
u32 mrtpr; /* Memory Refresh Timer Prescaler Register */
u32 mdr; /* UPM Data Register */
- u8 res3[0x8];
+ u8 res3[0x4];
+ u32 lsor; /* Special Operation Initiation Register */
u32 lsdmr; /* SDRAM Mode Register */
u8 res4[0x8];
u32 lurt; /* UPM Refresh Timer */
@@ -369,8 +372,14 @@
u8 res6[0xC];
u32 lbcr; /* Configuration Register */
u32 lcrr; /* Clock Ratio Register */
- u8 res7[0x28];
- u8 res8[0xF00];
+ u8 res7[0x8];
+ u32 fmr; /* Flash Mode Register */
+ u32 fir; /* Flash Instruction Register */
+ u32 fcr; /* Flash Command Register */
+ u32 fbar; /* Flash Block Addr Register */
+ u32 fpar; /* Flash Page Addr Register */
+ u32 fbcr; /* Flash Byte Count Register */
+ u8 res8[0xF08];
} lbus83xx_t;
/*
@@ -527,7 +536,7 @@
* USB
*/
typedef struct usb83xx {
- u8 fixme[0x2000];
+ u8 fixme[0x1000];
} usb83xx_t;
/*
@@ -574,7 +583,42 @@
ios83xx_t ios; /* Sequencer */
pcictrl83xx_t pci_ctrl[2]; /* PCI Controller Control and Status Registers */
u8 res5[0x19900];
- usb83xx_t usb;
+ usb83xx_t usb[2];
+ tsec83xx_t tsec[2];
+ u8 res6[0xA000];
+ security83xx_t security;
+ u8 res7[0xC0000];
+} immap_t;
+
+#elif defined(CONFIG_MPC831X)
+typedef struct immap {
+ sysconf83xx_t sysconf; /* System configuration */
+ wdt83xx_t wdt; /* Watch Dog Timer (WDT) Registers */
+ rtclk83xx_t rtc; /* Real Time Clock Module Registers */
+ rtclk83xx_t pit; /* Periodic Interval Timer */
+ gtm83xx_t gtm[2]; /* Global Timers Module */
+ ipic83xx_t ipic; /* Integrated Programmable Interrupt Controller */
+ arbiter83xx_t arbiter; /* System Arbiter Registers */
+ reset83xx_t reset; /* Reset Module */
+ clk83xx_t clk; /* System Clock Module */
+ pmc83xx_t pmc; /* Power Management Control Module */
+ gpio83xx_t gpio[1]; /* General purpose I/O module */
+ u8 res0[0x1300];
+ ddr83xx_t ddr; /* DDR Memory Controller Memory */
+ fsl_i2c_t i2c[2]; /* I2C Controllers */
+ u8 res1[0x1300];
+ duart83xx_t duart[2]; /* DUART */
+ u8 res2[0x900];
+ lbus83xx_t lbus; /* Local Bus Controller Registers */
+ u8 res3[0x1000];
+ spi83xx_t spi; /* Serial Peripheral Interface */
+ dma83xx_t dma; /* DMA */
+ pciconf83xx_t pci_conf[1]; /* PCI Software Configuration Registers */
+ u8 res4[0x80];
+ ios83xx_t ios; /* Sequencer */
+ pcictrl83xx_t pci_ctrl[1]; /* PCI Controller Control and Status Registers */
+ u8 res5[0x1aa00];
+ usb83xx_t usb[1];
tsec83xx_t tsec[2];
u8 res6[0xA000];
security83xx_t security;
diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h
index 5377c2e..496fc72 100644
--- a/include/asm-ppc/immap_85xx.h
+++ b/include/asm-ppc/immap_85xx.h
@@ -1,6 +1,8 @@
/*
* MPC85xx Internal Memory Map
*
+ * Copyright 2007 Freescale Semiconductor.
+ *
* Copyright(c) 2002,2003 Motorola Inc.
* Xianghua Xiao (x.xiao@motorola.com)
*
@@ -1520,14 +1522,39 @@
char res58[60176];
} ccsr_rio_t;
+/* Quick Engine Block Pin Muxing Registers (0xe_0100 - 0xe_01bf) */
+typedef struct par_io {
+ uint cpodr; /* 0x100 */
+ uint cpdat; /* 0x104 */
+ uint cpdir1; /* 0x108 */
+ uint cpdir2; /* 0x10c */
+ uint cppar1; /* 0x110 */
+ uint cppar2; /* 0x114 */
+ char res[8];
+}par_io_t;
+
/*
* Global Utilities Register Block(0xe_0000-0xf_ffff)
*/
typedef struct ccsr_gur {
uint porpllsr; /* 0xe0000 - POR PLL ratio status register */
uint porbmsr; /* 0xe0004 - POR boot mode status register */
+#define MPC85xx_PORBMSR_HA 0x00070000
uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
uint pordevsr; /* 0xe000c - POR I/O device status regsiter */
+#define MPC85xx_PORDEVSR_SGMII1_DIS 0x20000000
+#define MPC85xx_PORDEVSR_SGMII2_DIS 0x10000000
+#define MPC85xx_PORDEVSR_SGMII3_DIS 0x08000000
+#define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000
+#define MPC85xx_PORDEVSR_IO_SEL 0x00380000
+#define MPC85xx_PORDEVSR_PCI2_ARB 0x00040000
+#define MPC85xx_PORDEVSR_PCI1_ARB 0x00020000
+#define MPC85xx_PORDEVSR_PCI1_PCI32 0x00010000
+#define MPC85xx_PORDEVSR_PCI1_SPD 0x00008000
+#define MPC85xx_PORDEVSR_PCI2_SPD 0x00004000
+#define MPC85xx_PORDEVSR_DRAM_RTYPE 0x00000060
+#define MPC85xx_PORDEVSR_RIO_CTLS 0x00000008
+#define MPC85xx_PORDEVSR_RIO_DEV_ID 0x00000007
uint pordbgmsr; /* 0xe0010 - POR debug mode status register */
char res1[12];
uint gpporcr; /* 0xe0020 - General-purpose POR configuration register */
@@ -1541,6 +1568,25 @@
uint pmuxcr; /* 0xe0060 - Alternate function signal multiplex control */
char res6[12];
uint devdisr; /* 0xe0070 - Device disable control */
+#define MPC85xx_DEVDISR_PCI1 0x80000000
+#define MPC85xx_DEVDISR_PCI2 0x40000000
+#define MPC85xx_DEVDISR_PCIE 0x20000000
+#define MPC85xx_DEVDISR_LBC 0x08000000
+#define MPC85xx_DEVDISR_PCIE2 0x04000000
+#define MPC85xx_DEVDISR_PCIE3 0x02000000
+#define MPC85xx_DEVDISR_SEC 0x01000000
+#define MPC85xx_DEVDISR_SRIO 0x00080000
+#define MPC85xx_DEVDISR_RMSG 0x00040000
+#define MPC85xx_DEVDISR_DDR 0x00010000
+#define MPC85xx_DEVDISR_CPU 0x00008000
+#define MPC85xx_DEVDISR_TB 0x00004000
+#define MPC85xx_DEVDISR_DMA 0x00000400
+#define MPC85xx_DEVDISR_TSEC1 0x00000080
+#define MPC85xx_DEVDISR_TSEC2 0x00000040
+#define MPC85xx_DEVDISR_TSEC3 0x00000020
+#define MPC85xx_DEVDISR_TSEC4 0x00000010
+#define MPC85xx_DEVDISR_I2C 0x00000004
+#define MPC85xx_DEVDISR_DUART 0x00000002
char res7[12];
uint powmgtcsr; /* 0xe0080 - Power management status and control register */
char res8[12];
@@ -1548,7 +1594,15 @@
char res9[12];
uint pvr; /* 0xe00a0 - Processor version register */
uint svr; /* 0xe00a4 - System version register */
- char res10[3416];
+ char res10a[8];
+ uint rstcr; /* 0xe00b0 - Reset control register */
+#ifdef CONFIG_MPC8568
+ char res10b[76];
+ par_io_t qe_par_io[7]; /* 0xe0100 - 0xe01bf */
+ char res10c[3136];
+#else
+ char res10b[3404];
+#endif
uint clkocr; /* 0xe0e00 - Clock out select register */
char res11[12];
uint ddrdllcr; /* 0xe0e10 - DDR DLL control register */
@@ -1560,7 +1614,7 @@
uint ddrioovcr; /* 0xe0f24 - DDR IO Override Control */
uint res14; /* 0xe0f28 */
uint tsec34ioovcr; /* 0xe0f2c - eTSEC 3/4 IO override control */
- char res15[61651];
+ char res15[61648]; /* 0xe0f30 to 0xefffff */
} ccsr_gur_t;
#define PORDEVSR_PCI (0x00800000) /* PCI Mode */
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index 0e3fc34..169725b 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1257,9 +1257,12 @@
uint porpllsr; /* 0xe0000 - POR PLL ratio status register */
uint porbmsr; /* 0xe0004 - POR boot mode status register */
#define MPC86xx_PORBMSR_HA 0x00060000
+#define MPC85xx_PORBMSR_HA 0x00070000
uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */
uint pordevsr; /* 0xe000c - POR I/O device status regsiter */
-#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000
+#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000
+#define MPC85xx_PORDEVSR_IO_SEL 0x00380000 /* 85xx platform type */
+#define MPC86xx_PORDEVSR_CORE1TE 0x00000080 /* ASMP (Core1 addr trans) */
uint pordbgmsr; /* 0xe0010 - POR debug mode status register */
char res1[12];
uint gpporcr; /* 0xe0020 - General-purpose POR configuration register */
@@ -1273,8 +1276,11 @@
uint pmuxcr; /* 0xe0060 - Alternate function signal multiplex control */
char res6[12];
uint devdisr; /* 0xe0070 - Device disable control */
-#define MPC86xx_DEVDISR_PCIEX1 0x80000000
-#define MPC86xx_DEVDISR_PCIEX2 0x40000000
+#define MPC86xx_DEVDISR_PCIEX1 0x80000000
+#define MPC86xx_DEVDISR_PCIEX2 0x40000000
+#define MPC86xx_DEVDISR_PCI1 0x80000000
+#define MPC86xx_DEVDISR_PCIE1 0x40000000
+#define MPC86xx_DEVDISR_PCIE2 0x20000000
char res7[12];
uint powmgtcsr; /* 0xe0080 - Power management status and control register */
char res8[12];
@@ -1282,7 +1288,9 @@
char res9[12];
uint pvr; /* 0xe00a0 - Processor version register */
uint svr; /* 0xe00a4 - System version register */
- char res10[3416];
+ char res10a[1880];
+ uint clkdvdr; /* 0xe0800 - Clock Divide register */
+ char res10b[1532];
uint clkocr; /* 0xe0e00 - Clock out select register */
char res11[12];
uint ddrdllcr; /* 0xe0e10 - DDR DLL control register */
diff --git a/include/asm-ppc/immap_fsl_pci.h b/include/asm-ppc/immap_fsl_pci.h
new file mode 100644
index 0000000..bd732b6
--- /dev/null
+++ b/include/asm-ppc/immap_fsl_pci.h
@@ -0,0 +1,150 @@
+/* (C) Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+
+#ifndef __IMMAP_85xx_fsl_pci__
+#define __IMMAP_85xx_fsl_pci__
+
+/*
+ * Common PCI/PCIE Register structure for mpc85xx and mpc86xx
+ */
+
+/*
+ * PCI Translation Registers
+ */
+typedef struct pci_outbound_window {
+ u32 potar; /* 0x00 - Address */
+ u32 potear; /* 0x04 - Address Extended */
+ u32 powbar; /* 0x08 - Window Base Address */
+ u32 res1;
+ u32 powar; /* 0x10 - Window Attributes */
+#define POWAR_EN 0x80000000
+#define POWAR_IO_READ 0x00080000
+#define POWAR_MEM_READ 0x00040000
+#define POWAR_IO_WRITE 0x00008000
+#define POWAR_MEM_WRITE 0x00004000
+ u32 res2[3];
+} pot_t;
+
+typedef struct pci_inbound_window {
+ u32 pitar; /* 0x00 - Address */
+ u32 res1;
+ u32 piwbar; /* 0x08 - Window Base Address */
+ u32 piwbear; /* 0x0c - Window Base Address Extended */
+ u32 piwar; /* 0x10 - Window Attributes */
+#define PIWAR_EN 0x80000000
+#define PIWAR_PF 0x20000000
+#define PIWAR_LOCAL 0x00f00000
+#define PIWAR_READ_SNOOP 0x00050000
+#define PIWAR_WRITE_SNOOP 0x00005000
+ u32 res2[3];
+} pit_t;
+
+/* PCI/PCI Express Registers */
+typedef struct ccsr_pci {
+ u32 cfg_addr; /* 0x000 - PCI Configuration Address Register */
+ u32 cfg_data; /* 0x004 - PCI Configuration Data Register */
+ u32 int_ack; /* 0x008 - PCI Interrupt Acknowledge Register */
+ u32 out_comp_to; /* 0x00C - PCI Outbound Completion Timeout Register */
+ u32 out_conf_to; /* 0x010 - PCI Configuration Timeout Register */
+ u32 config; /* 0x014 - PCIE CONFIG Register */
+ char res2[8];
+ u32 pme_msg_det; /* 0x020 - PCIE PME & message detect register */
+ u32 pme_msg_dis; /* 0x024 - PCIE PME & message disable register */
+ u32 pme_msg_int_en; /* 0x028 - PCIE PME & message interrupt enable register */
+ u32 pm_command; /* 0x02c - PCIE PM Command register */
+ char res4[3016]; /* (- #xbf8 #x30)3016 */
+ u32 block_rev1; /* 0xbf8 - PCIE Block Revision register 1 */
+ u32 block_rev2; /* 0xbfc - PCIE Block Revision register 2 */
+
+ pot_t pot[5]; /* 0xc00 - 0xc9f Outbound ATMU's 0, 1, 2, 3, and 4 */
+ u32 res5[64];
+ pit_t pit[3]; /* 0xda0 - 0xdff Inbound ATMU's 3, 2, and 1 */
+#define PIT3 0
+#define PIT2 1
+#define PIT1 2
+
+#if 0
+ u32 potar0; /* 0xc00 - PCI Outbound Transaction Address Register 0 */
+ u32 potear0; /* 0xc04 - PCI Outbound Translation Extended Address Register 0 */
+ char res5[8];
+ u32 powar0; /* 0xc10 - PCI Outbound Window Attributes Register 0 */
+ char res6[12];
+ u32 potar1; /* 0xc20 - PCI Outbound Transaction Address Register 1 */
+ u32 potear1; /* 0xc24 - PCI Outbound Translation Extended Address Register 1 */
+ u32 powbar1; /* 0xc28 - PCI Outbound Window Base Address Register 1 */
+ char res7[4];
+ u32 powar1; /* 0xc30 - PCI Outbound Window Attributes Register 1 */
+ char res8[12];
+ u32 potar2; /* 0xc40 - PCI Outbound Transaction Address Register 2 */
+ u32 potear2; /* 0xc44 - PCI Outbound Translation Extended Address Register 2 */
+ u32 powbar2; /* 0xc48 - PCI Outbound Window Base Address Register 2 */
+ char res9[4];
+ u32 powar2; /* 0xc50 - PCI Outbound Window Attributes Register 2 */
+ char res10[12];
+ u32 potar3; /* 0xc60 - PCI Outbound Transaction Address Register 3 */
+ u32 potear3; /* 0xc64 - PCI Outbound Translation Extended Address Register 3 */
+ u32 powbar3; /* 0xc68 - PCI Outbound Window Base Address Register 3 */
+ char res11[4];
+ u32 powar3; /* 0xc70 - PCI Outbound Window Attributes Register 3 */
+ char res12[12];
+ u32 potar4; /* 0xc80 - PCI Outbound Transaction Address Register 4 */
+ u32 potear4; /* 0xc84 - PCI Outbound Translation Extended Address Register 4 */
+ u32 powbar4; /* 0xc88 - PCI Outbound Window Base Address Register 4 */
+ char res13[4];
+ u32 powar4; /* 0xc90 - PCI Outbound Window Attributes Register 4 */
+ char res14[268];
+ u32 pitar3; /* 0xda0 - PCI Inbound Translation Address Register 3 */
+ char res15[4];
+ u32 piwbar3; /* 0xda8 - PCI Inbound Window Base Address Register 3 */
+ u32 piwbear3; /* 0xdac - PCI Inbound Window Base Extended Address Register 3 */
+ u32 piwar3; /* 0xdb0 - PCI Inbound Window Attributes Register 3 */
+ char res16[12];
+ u32 pitar2; /* 0xdc0 - PCI Inbound Translation Address Register 2 */
+ char res17[4];
+ u32 piwbar2; /* 0xdc8 - PCI Inbound Window Base Address Register 2 */
+ u32 piwbear2; /* 0xdcc - PCI Inbound Window Base Extended Address Register 2 */
+ u32 piwar2; /* 0xdd0 - PCI Inbound Window Attributes Register 2 */
+ char res18[12];
+ u32 pitar1; /* 0xde0 - PCI Inbound Translation Address Register 1 */
+ char res19[4];
+ u32 piwbar1; /* 0xde8 - PCI Inbound Window Base Address Register 1 */
+ char res20[4];
+ u32 piwar1; /* 0xdf0 - PCI Inbound Window Attributes Register 1 */
+ char res21[12];
+#endif
+ u32 pedr; /* 0xe00 - PCI Error Detect Register */
+ u32 pecdr; /* 0xe04 - PCI Error Capture Disable Register */
+ u32 peer; /* 0xe08 - PCI Error Interrupt Enable Register */
+ u32 peattrcr; /* 0xe0c - PCI Error Attributes Capture Register */
+ u32 peaddrcr; /* 0xe10 - PCI Error Address Capture Register */
+/* u32 perr_disr * 0xe10 - PCIE Erorr Disable Register */
+ u32 peextaddrcr; /* 0xe14 - PCI Error Extended Address Capture Register */
+ u32 pedlcr; /* 0xe18 - PCI Error Data Low Capture Register */
+ u32 pedhcr; /* 0xe1c - PCI Error Error Data High Capture Register */
+ u32 gas_timr; /* 0xe20 - PCI Gasket Timer Register */
+/* u32 perr_cap_stat; * 0xe20 - PCIE Error Capture Status Register */
+ char res22[4];
+ u32 perr_cap0; /* 0xe28 - PCIE Error Capture Register 0 */
+ u32 perr_cap1; /* 0xe2c - PCIE Error Capture Register 1 */
+ u32 perr_cap2; /* 0xe30 - PCIE Error Capture Register 2 */
+ u32 perr_cap3; /* 0xe34 - PCIE Error Capture Register 3 */
+ char res23[456]; /* (- #x1000 #xe38) 456 */
+} ccsr_fsl_pci_t;
+
+#endif /*__IMMAP_fsl_pci__*/
diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h
index 950b949..a16a6d3 100644
--- a/include/asm-ppc/immap_qe.h
+++ b/include/asm-ppc/immap_qe.h
@@ -281,6 +281,17 @@
u8 res4[0x200 - 0x091];
} __attribute__ ((packed)) ucc_slow_t;
+typedef struct ucc_mii_mng {
+ u32 miimcfg; /* MII management configuration reg */
+ u32 miimcom; /* MII management command reg */
+ u32 miimadd; /* MII management address reg */
+ u32 miimcon; /* MII management control reg */
+ u32 miimstat; /* MII management status reg */
+ u32 miimind; /* MII management indication reg */
+ u32 ifctl; /* interface control reg */
+ u32 ifstat; /* interface statux reg */
+} __attribute__ ((packed))uec_mii_t;
+
typedef struct ucc_ethernet {
u32 maccfg1; /* mac configuration reg. 1 */
u32 maccfg2; /* mac configuration reg. 2 */
@@ -540,14 +551,21 @@
u8 res14[0x300];
u8 res15[0x3A00];
u8 res16[0x8000]; /* 0x108000 - 0x110000 */
+#if defined(CONFIG_MPC8568)
+ u8 muram[0x10000]; /* 0x1_0000 - 0x2_0000 Multi-user RAM */
+ u8 res17[0x20000]; /* 0x2_0000 - 0x4_0000 */
+#else
u8 muram[0xC000]; /* 0x110000 - 0x11C000 Multi-user RAM */
u8 res17[0x24000]; /* 0x11C000 - 0x140000 */
u8 res18[0xC0000]; /* 0x140000 - 0x200000 */
+#endif
} __attribute__ ((packed)) qe_map_t;
extern qe_map_t *qe_immr;
-#if defined(CONFIG_MPC8360)
+#if defined(CONFIG_MPC8568)
+#define QE_MURAM_SIZE 0x10000UL
+#elif defined(CONFIG_MPC8360)
#define QE_MURAM_SIZE 0xc000UL
#elif defined(CONFIG_MPC832X)
#define QE_MURAM_SIZE 0x4000UL
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index bbc9ba0..11dfa1c 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -13,6 +13,9 @@
#define SIO_CONFIG_RA 0x398
#define SIO_CONFIG_RD 0x399
+#ifndef _IO_BASE
+#define _IO_BASE 0
+#endif
#define readb(addr) in_8((volatile u8 *)(addr))
#define writeb(b,addr) out_8((volatile u8 *)(addr), (b))
@@ -105,6 +108,11 @@
__asm__ __volatile__ ("sync" : : : "memory");
}
+static inline void isync(void)
+{
+ __asm__ __volatile__ ("isync" : : : "memory");
+}
+
/* Enforce in-order execution of data I/O.
* No distinction between read/write on PPC; use eieio for all three.
*/
@@ -114,74 +122,90 @@
/*
* 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
+ *
+ * Read operations have additional twi & isync to make sure the read
+ * is actually performed (i.e. the data has come back) before we start
+ * executing any following instructions.
*/
-extern inline int in_8(volatile u8 *addr)
+#define __iomem
+extern inline int in_8(const volatile unsigned char __iomem *addr)
{
- int ret;
+ int ret;
- __asm__ __volatile__("lbz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
- return ret;
+ __asm__ __volatile__(
+ "sync; lbz%U1%X1 %0,%1;\n"
+ "twi 0,%0,0;\n"
+ "isync" : "=r" (ret) : "m" (*addr));
+ return ret;
}
-extern inline void out_8(volatile u8 *addr, int val)
+extern inline void out_8(volatile unsigned char __iomem *addr, int val)
{
- __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+ __asm__ __volatile__("stb%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
}
-extern inline int in_le16(volatile u16 *addr)
+extern inline int in_le16(const volatile unsigned short __iomem *addr)
{
- int ret;
+ int ret;
- __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) :
- "r" (addr), "m" (*addr));
- return ret;
+ __asm__ __volatile__("sync; lhbrx %0,0,%1;\n"
+ "twi 0,%0,0;\n"
+ "isync" : "=r" (ret) :
+ "r" (addr), "m" (*addr));
+ return ret;
}
-extern inline int in_be16(volatile u16 *addr)
+extern inline int in_be16(const volatile unsigned short __iomem *addr)
{
- int ret;
+ int ret;
- __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
- return ret;
+ __asm__ __volatile__("sync; lhz%U1%X1 %0,%1;\n"
+ "twi 0,%0,0;\n"
+ "isync" : "=r" (ret) : "m" (*addr));
+ return ret;
}
-extern inline void out_le16(volatile u16 *addr, int val)
+extern inline void out_le16(volatile unsigned short __iomem *addr, int val)
{
- __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) :
- "r" (val), "r" (addr));
+ __asm__ __volatile__("sync; sthbrx %1,0,%2" : "=m" (*addr) :
+ "r" (val), "r" (addr));
}
-extern inline void out_be16(volatile u16 *addr, int val)
+extern inline void out_be16(volatile unsigned short __iomem *addr, int val)
{
- __asm__ __volatile__("sth%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+ __asm__ __volatile__("sync; sth%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
-extern inline unsigned in_le32(volatile u32 *addr)
+extern inline unsigned in_le32(const volatile unsigned __iomem *addr)
{
- unsigned ret;
+ unsigned ret;
- __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) :
- "r" (addr), "m" (*addr));
- return ret;
+ __asm__ __volatile__("sync; lwbrx %0,0,%1;\n"
+ "twi 0,%0,0;\n"
+ "isync" : "=r" (ret) :
+ "r" (addr), "m" (*addr));
+ return ret;
}
-extern inline unsigned in_be32(volatile u32 *addr)
+extern inline unsigned in_be32(const volatile unsigned __iomem *addr)
{
- unsigned ret;
+ unsigned ret;
- __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr));
- return ret;
+ __asm__ __volatile__("sync; lwz%U1%X1 %0,%1;\n"
+ "twi 0,%0,0;\n"
+ "isync" : "=r" (ret) : "m" (*addr));
+ return ret;
}
-extern inline void out_le32(volatile unsigned *addr, int val)
+extern inline void out_le32(volatile unsigned __iomem *addr, int val)
{
- __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) :
- "r" (val), "r" (addr));
+ __asm__ __volatile__("sync; stwbrx %1,0,%2" : "=m" (*addr) :
+ "r" (val), "r" (addr));
}
-extern inline void out_be32(volatile unsigned *addr, int val)
+extern inline void out_be32(volatile unsigned __iomem *addr, int val)
{
- __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val));
+ __asm__ __volatile__("sync; stw%U0%X0 %1,%0" : "=m" (*addr) : "r" (val));
}
#endif
diff --git a/include/asm-ppc/mmu.h b/include/asm-ppc/mmu.h
index 48fd982..b3cfa9b 100644
--- a/include/asm-ppc/mmu.h
+++ b/include/asm-ppc/mmu.h
@@ -645,6 +645,9 @@
unsigned long mftlb1(unsigned long index);
unsigned long mftlb2(unsigned long index);
unsigned long mftlb3(unsigned long index);
+
+void program_tlb(u32 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value);
+void remove_tlb(u32 vaddr, u32 size);
#endif /* __ASSEMBLY__ */
#endif /* CONFIG_440 */
diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h
index 5efc3ee..0a160e2 100644
--- a/include/asm-ppc/processor.h
+++ b/include/asm-ppc/processor.h
@@ -35,18 +35,18 @@
#define MSR_DWE (1<<10) /* Debug Wait Enable (4xx) */
#define MSR_UBLE (1<<10) /* BTB lock enable (e500) */
#define MSR_BE (1<<9) /* Branch Trace */
-#define MSR_DE (1<<9) /* Debug Exception Enable */
+#define MSR_DE (1<<9) /* Debug Exception Enable */
#define MSR_FE1 (1<<8) /* Floating Exception mode 1 */
#define MSR_IP (1<<6) /* Exception prefix 0x000/0xFFF */
-#define MSR_IR (1<<5) /* Instruction Relocate */
+#define MSR_IR (1<<5) /* Instruction Relocate */
#define MSR_IS (1<<5) /* Book E Instruction space */
-#define MSR_DR (1<<4) /* Data Relocate */
+#define MSR_DR (1<<4) /* Data Relocate */
#define MSR_DS (1<<4) /* Book E Data space */
#define MSR_PE (1<<3) /* Protection Enable */
#define MSR_PX (1<<2) /* Protection Exclusive Mode */
#define MSR_PMM (1<<2) /* Performance monitor mark bit (e500) */
#define MSR_RI (1<<1) /* Recoverable Exception */
-#define MSR_LE (1<<0) /* Little Endian */
+#define MSR_LE (1<<0) /* Little Endian */
#ifdef CONFIG_APUS_FAST_EXCEPT
#define MSR_ MSR_ME|MSR_IP|MSR_RI
@@ -58,7 +58,6 @@
#else
#define MSR_KERNEL MSR_ME
#endif
-#define MSR_USER MSR_KERNEL|MSR_PR|MSR_EE
/* Floating Point Status and Control Register (FPSCR) Fields */
@@ -123,9 +122,9 @@
#define DBCR_EDM 0x80000000
#define DBCR_IDM 0x40000000
#define DBCR_RST(x) (((x) & 0x3) << 28)
-#define DBCR_RST_NONE 0
-#define DBCR_RST_CORE 1
-#define DBCR_RST_CHIP 2
+#define DBCR_RST_NONE 0
+#define DBCR_RST_CORE 1
+#define DBCR_RST_CHIP 2
#define DBCR_RST_SYSTEM 3
#define DBCR_IC 0x08000000 /* Instruction Completion Debug Evnt */
#define DBCR_BT 0x04000000 /* Branch Taken Debug Event */
@@ -218,12 +217,14 @@
#define HID0_DPM (1<<20)
#define HID0_ICE (1<<HID0_ICE_SHIFT) /* Instruction Cache Enable */
#define HID0_DCE (1<<HID0_DCE_SHIFT) /* Data Cache Enable */
+#define HID0_TBEN (1<<14) /* Time Base Enable */
#define HID0_ILOCK (1<<13) /* Instruction Cache Lock */
#define HID0_DLOCK (1<<HID0_DLOCK_SHIFT) /* Data Cache Lock */
#define HID0_ICFI (1<<11) /* Instr. Cache Flash Invalidate */
#define HID0_DCFI (1<<10) /* Data Cache Flash Invalidate */
#define HID0_DCI HID0_DCFI
#define HID0_SPD (1<<9) /* Speculative disable */
+#define HID0_ENMAS7 (1<<7) /* Enable MAS7 Update for 36-bit phys */
#define HID0_SGE (1<<7) /* Store Gathering Enable */
#define HID0_SIED HID_SGE /* Serial Instr. Execution [Disable] */
#define HID0_DCFA (1<<6) /* Data Cache Flush Assist */
@@ -266,7 +267,7 @@
#define SPRN_ICMP 0x3D5 /* Instruction TLB Compare Register */
#define SPRN_ICTC 0x3FB /* Instruction Cache Throttling Control Reg */
#define SPRN_IMISS 0x3D4 /* Instruction TLB Miss Register */
-#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
+#define SPRN_IMMR 0x27E /* Internal Memory Map Register */
#define SPRN_LDSTCR 0x3F8 /* Load/Store Control Register */
#define SPRN_L2CR 0x3F9 /* Level 2 Cache Control Regsiter */
#define SPRN_LR 0x008 /* Link Register */
@@ -308,7 +309,7 @@
#define SPRN_SRR0 0x01A /* Save/Restore Register 0 */
#define SPRN_SRR1 0x01B /* Save/Restore Register 1 */
#define SPRN_SRR2 0x3DE /* Save/Restore Register 2 */
-#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */
+#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */
#ifdef CONFIG_BOOKE
#define SPRN_SVR 0x3FF /* System Version Register */
#else
@@ -451,10 +452,23 @@
#define SPRN_PID1 0x279 /* Process ID Register 1 */
#define SPRN_PID2 0x27a /* Process ID Register 2 */
#define SPRN_MCSR 0x23c /* Machine Check Syndrome register */
+#define SPRN_MCAR 0x23d /* Machine Check Address register */
+#ifdef CONFIG_440
+#define MCSR_MCS 0x80000000 /* Machine Check Summary */
+#define MCSR_IB 0x40000000 /* Instruction PLB Error */
+#define MCSR_DRB 0x20000000 /* Data Read PLB Error */
+#define MCSR_DWB 0x10000000 /* Data Write PLB Error */
+#define MCSR_TLBP 0x08000000 /* TLB Parity Error */
+#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */
+#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */
+#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */
+#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */
+#endif
#define ESR_ST 0x00800000 /* Store Operation */
#if defined(CONFIG_MPC86xx)
-#define SPRN_MSSCRO 0x3f6
+#define SPRN_MSSCR0 0x3f6
+#define SPRN_MSSSR0 0x3f7
#endif
@@ -484,17 +498,17 @@
#define DBCR0 SPRN_DBCR0 /* Debug Control Register 0 */
#define DBCR1 SPRN_DBCR1 /* Debug Control Register 1 */
#define DBSR SPRN_DBSR /* Debug Status Register */
-#define DCMP SPRN_DCMP /* Data TLB Compare Register */
-#define DEC SPRN_DEC /* Decrement Register */
-#define DMISS SPRN_DMISS /* Data TLB Miss Register */
+#define DCMP SPRN_DCMP /* Data TLB Compare Register */
+#define DEC SPRN_DEC /* Decrement Register */
+#define DMISS SPRN_DMISS /* Data TLB Miss Register */
#define DSISR SPRN_DSISR /* Data Storage Interrupt Status Register */
-#define EAR SPRN_EAR /* External Address Register */
+#define EAR SPRN_EAR /* External Address Register */
#define ESR SPRN_ESR /* Exception Syndrome Register */
#define HASH1 SPRN_HASH1 /* Primary Hash Address Register */
#define HASH2 SPRN_HASH2 /* Secondary Hash Address Register */
#define HID0 SPRN_HID0 /* Hardware Implementation Register 0 */
#define HID1 SPRN_HID1 /* Hardware Implementation Register 1 */
-#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
+#define IABR SPRN_IABR /* Instruction Address Breakpoint Register */
#define IAC1 SPRN_IAC1 /* Instruction Address Register 1 */
#define IAC2 SPRN_IAC2 /* Instruction Address Register 2 */
#define IBAT0L SPRN_IBAT0L /* Instruction BAT 0 Lower Register */
@@ -511,17 +525,17 @@
#define IBAT5U SPRN_IBAT5U /* Instruction BAT 5 Upper Register */
#define IBAT6L SPRN_IBAT6L /* Instruction BAT 6 Lower Register */
#define IBAT6U SPRN_IBAT6U /* Instruction BAT 6 Upper Register */
-#define IBAT7L SPRN_IBAT7L /* Instruction BAT 7 Lower Register */
+#define IBAT7L SPRN_IBAT7L /* Instruction BAT 7 Lower Register */
#define IBAT7U SPRN_IBAT7U /* Instruction BAT 7 Lower Register */
#define ICMP SPRN_ICMP /* Instruction TLB Compare Register */
#define IMISS SPRN_IMISS /* Instruction TLB Miss Register */
-#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */
+#define IMMR SPRN_IMMR /* PPC 860/821 Internal Memory Map Register */
#define LDSTCR SPRN_LDSTCR /* Load/Store Control Register */
-#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
+#define L2CR SPRN_L2CR /* PPC 750 L2 control register */
#define LR SPRN_LR
#define MBAR SPRN_MBAR /* System memory base address */
#if defined(CONFIG_MPC86xx)
-#define MSSCR0 SPRN_MSSCRO
+#define MSSCR0 SPRN_MSSCR0
#endif
#if defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
#define PIR SPRN_PIR
@@ -529,7 +543,7 @@
#define SVR SPRN_SVR /* System-On-Chip Version Register */
#define PVR SPRN_PVR /* Processor Version */
#define RPA SPRN_RPA /* Required Physical Address Register */
-#define SDR1 SPRN_SDR1 /* MMU hash base register */
+#define SDR1 SPRN_SDR1 /* MMU hash base register */
#define SPR0 SPRN_SPRG0 /* Supervisor Private Registers */
#define SPR1 SPRN_SPRG1
#define SPR2 SPRN_SPRG2
@@ -544,6 +558,8 @@
#define SPRG7 SPRN_SPRG7
#define SRR0 SPRN_SRR0 /* Save and Restore Register 0 */
#define SRR1 SPRN_SRR1 /* Save and Restore Register 1 */
+#define SRR2 SPRN_SRR2 /* Save and Restore Register 2 */
+#define SRR3 SPRN_SRR3 /* Save and Restore Register 3 */
#define SVR SPRN_SVR /* System Version Register */
#define TBRL SPRN_TBRL /* Time Base Read Lower Register */
#define TBRU SPRN_TBRU /* Time Base Read Upper Register */
@@ -598,7 +614,7 @@
#define IVOR35 SPRN_IVOR35
#define MCSRR0 SPRN_MCSRR0
#define MCSRR1 SPRN_MCSRR1
-#define L1CSR0 SPRN_L1CSR0
+#define L1CSR0 SPRN_L1CSR0
#define L1CSR1 SPRN_L1CSR1
#define MCSR SPRN_MCSR
#define MMUCSR0 SPRN_MMUCSR0
@@ -607,7 +623,7 @@
#define PID1 SPRN_PID1
#define PID2 SPRN_PID2
#define MAS0 SPRN_MAS0
-#define MAS1 SPRN_MAS1
+#define MAS1 SPRN_MAS1
#define MAS2 SPRN_MAS2
#define MAS3 SPRN_MAS3
#define MAS4 SPRN_MAS4
@@ -615,11 +631,17 @@
#define MAS6 SPRN_MAS6
#define MAS7 SPRN_MAS7
+#if defined(CONFIG_4xx) || defined(CONFIG_44x) || defined(CONFIG_MPC85xx)
+#define DAR_DEAR DEAR
+#else
+#define DAR_DEAR DAR
+#endif
+
/* Device Control Registers */
#define DCRN_BEAR 0x090 /* Bus Error Address Register */
#define DCRN_BESR 0x091 /* Bus Error Syndrome Register */
-#define BESR_DSES 0x80000000 /* Data-Side Error Status */
+#define BESR_DSES 0x80000000 /* Data-Side Error Status */
#define BESR_DMES 0x40000000 /* DMA Error Status */
#define BESR_RWS 0x20000000 /* Read/Write Status */
#define BESR_ETMASK 0x1C000000 /* Error Type */
@@ -676,8 +698,8 @@
#define IOCR_E3LP 0x01000000
#define IOCR_E4TE 0x00800000
#define IOCR_E4LP 0x00400000
-#define IOCR_EDT 0x00080000
-#define IOCR_SOR 0x00040000
+#define IOCR_EDT 0x00080000
+#define IOCR_SOR 0x00040000
#define IOCR_EDO 0x00008000
#define IOCR_2XC 0x00004000
#define IOCR_ATC 0x00002000
@@ -802,7 +824,7 @@
#define PVR_823 PVR_821
#define PVR_850 PVR_821
#define PVR_860 PVR_821
-#define PVR_7400 0x000C0000
+#define PVR_7400 0x000C0000
#define PVR_8240 0x00810100
/*
diff --git a/include/at45.h b/include/at45.h
new file mode 100644
index 0000000..40bb4a0
--- /dev/null
+++ b/include/at45.h
@@ -0,0 +1,69 @@
+
+#ifndef _AT45_H_
+#define _AT45_H_
+#ifdef DATAFLASH_MMC_SELECT
+extern void AT91F_SelectMMC(void);
+extern void AT91F_SelectSPI(void);
+extern int AT91F_GetMuxStatus(void);
+#endif
+extern void AT91F_SpiInit(void);
+extern void AT91F_SpiEnable(int cs);
+extern unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc );
+extern AT91S_DataFlashStatus AT91F_DataFlashSendCommand(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char OpCode,
+ unsigned int CmdSize,
+ unsigned int DataflashAddress);
+extern AT91S_DataFlashStatus AT91F_DataFlashGetStatus (
+ AT91PS_DataflashDesc pDesc);
+extern AT91S_DataFlashStatus AT91F_DataFlashWaitReady (
+ AT91PS_DataflashDesc pDataFlashDesc,
+ unsigned int timeout);
+extern AT91S_DataFlashStatus AT91F_DataFlashContinuousRead (
+ AT91PS_DataFlash pDataFlash,
+ int src,
+ unsigned char *dataBuffer,
+ int sizeToRead );
+extern AT91S_DataFlashStatus AT91F_DataFlashPagePgmBuf(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char *src,
+ unsigned int dest,
+ unsigned int SizeToWrite);
+extern AT91S_DataFlashStatus AT91F_MainMemoryToBufferTransfert(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char BufferCommand,
+ unsigned int page);
+extern AT91S_DataFlashStatus AT91F_DataFlashWriteBuffer (
+ AT91PS_DataFlash pDataFlash,
+ unsigned char BufferCommand,
+ unsigned char *dataBuffer,
+ unsigned int bufferAddress,
+ int SizeToWrite );
+extern AT91S_DataFlashStatus AT91F_PageErase(
+ AT91PS_DataFlash pDataFlash,
+ unsigned int page);
+extern AT91S_DataFlashStatus AT91F_BlockErase(
+ AT91PS_DataFlash pDataFlash,
+ unsigned int block);
+extern AT91S_DataFlashStatus AT91F_WriteBufferToMain (
+ AT91PS_DataFlash pDataFlash,
+ unsigned char BufferCommand,
+ unsigned int dest );
+extern AT91S_DataFlashStatus AT91F_PartialPageWrite (
+ AT91PS_DataFlash pDataFlash,
+ unsigned char *src,
+ unsigned int dest,
+ unsigned int size);
+extern AT91S_DataFlashStatus AT91F_DataFlashWrite(
+ AT91PS_DataFlash pDataFlash,
+ unsigned char *src,
+ int dest,
+ int size );
+extern int AT91F_DataFlashRead(
+ AT91PS_DataFlash pDataFlash,
+ unsigned long addr,
+ unsigned long size,
+ char *buffer);
+extern int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc);
+
+#endif
diff --git a/include/ata.h b/include/ata.h
index 8584226..aa6e90d 100644
--- a/include/ata.h
+++ b/include/ata.h
@@ -83,6 +83,66 @@
#define ATA_DEVICE(x) ((x & 1)<<4)
#define ATA_LBA 0xE0
+enum {
+ ATA_MAX_DEVICES = 1, /* per bus/port */
+ ATA_MAX_PRD = 256, /* we could make these 256/256 */
+ ATA_SECT_SIZE = 256, /*256 words per sector */
+
+ /* bits in ATA command block registers */
+ ATA_HOB = (1 << 7), /* LBA48 selector */
+ ATA_NIEN = (1 << 1), /* disable-irq flag */
+ /*ATA_LBA = (1 << 6), */ /* LBA28 selector */
+ ATA_DEV1 = (1 << 4), /* Select Device 1 (slave) */
+ ATA_DEVICE_OBS = (1 << 7) | (1 << 5), /* obs bits in dev reg */
+ ATA_DEVCTL_OBS = (1 << 3), /* obsolete bit in devctl reg */
+ ATA_BUSY = (1 << 7), /* BSY status bit */
+ ATA_DRDY = (1 << 6), /* device ready */
+ ATA_DF = (1 << 5), /* device fault */
+ ATA_DRQ = (1 << 3), /* data request i/o */
+ ATA_ERR = (1 << 0), /* have an error */
+ ATA_SRST = (1 << 2), /* software reset */
+ ATA_ABORTED = (1 << 2), /* command aborted */
+ /* ATA command block registers */
+ ATA_REG_DATA = 0x00,
+ ATA_REG_ERR = 0x01,
+ ATA_REG_NSECT = 0x02,
+ ATA_REG_LBAL = 0x03,
+ ATA_REG_LBAM = 0x04,
+ ATA_REG_LBAH = 0x05,
+ ATA_REG_DEVICE = 0x06,
+ ATA_REG_STATUS = 0x07,
+ ATA_PCI_CTL_OFS = 0x02,
+ /* and their aliases */
+ ATA_REG_FEATURE = ATA_REG_ERR,
+ ATA_REG_CMD = ATA_REG_STATUS,
+ ATA_REG_BYTEL = ATA_REG_LBAM,
+ ATA_REG_BYTEH = ATA_REG_LBAH,
+ ATA_REG_DEVSEL = ATA_REG_DEVICE,
+ ATA_REG_IRQ = ATA_REG_NSECT,
+
+ /* SETFEATURES stuff */
+ SETFEATURES_XFER = 0x03,
+ XFER_UDMA_7 = 0x47,
+ XFER_UDMA_6 = 0x46,
+ XFER_UDMA_5 = 0x45,
+ XFER_UDMA_4 = 0x44,
+ XFER_UDMA_3 = 0x43,
+ XFER_UDMA_2 = 0x42,
+ XFER_UDMA_1 = 0x41,
+ XFER_UDMA_0 = 0x40,
+ XFER_MW_DMA_2 = 0x22,
+ XFER_MW_DMA_1 = 0x21,
+ XFER_MW_DMA_0 = 0x20,
+ XFER_PIO_4 = 0x0C,
+ XFER_PIO_3 = 0x0B,
+ XFER_PIO_2 = 0x0A,
+ XFER_PIO_1 = 0x09,
+ XFER_PIO_0 = 0x08,
+ XFER_SW_DMA_2 = 0x12,
+ XFER_SW_DMA_1 = 0x11,
+ XFER_SW_DMA_0 = 0x10,
+ XFER_PIO_SLOW = 0x00
+};
/*
* ATA Commands (only mandatory commands listed here)
*/
diff --git a/include/cmd_confdefs.h b/include/cmd_confdefs.h
deleted file mode 100644
index cf36583..0000000
--- a/include/cmd_confdefs.h
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
- * (C) Copyright 2000-2002
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * See file CREDITS for list of people who contributed to this
- * project.
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation; either version 2 of
- * the License, or (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
- * MA 02111-1307 USA
- */
-
-/*
- * Definitions for Configuring the monitor commands
- */
-#ifndef _CMD_CONFIG_H
-#define _CMD_CONFIG_H
-
-/*
- * Configurable monitor commands
- */
-#define CFG_CMD_BDI 0x00000001ULL /* bdinfo */
-#define CFG_CMD_LOADS 0x00000002ULL /* loads */
-#define CFG_CMD_LOADB 0x00000004ULL /* loadb */
-#define CFG_CMD_IMI 0x00000008ULL /* iminfo */
-#define CFG_CMD_CACHE 0x00000010ULL /* icache, dcache */
-#define CFG_CMD_FLASH 0x00000020ULL /* flinfo, erase, protect */
-#define CFG_CMD_MEMORY 0x00000040ULL /* md, mm, nm, mw, cp, cmp, */
- /* crc, base, loop, mtest */
-#define CFG_CMD_NET 0x00000080ULL /* bootp, tftpboot, rarpboot */
-#define CFG_CMD_ENV 0x00000100ULL /* saveenv */
-#define CFG_CMD_KGDB 0x0000000000000200ULL /* kgdb */
-#define CFG_CMD_PCMCIA 0x00000400ULL /* PCMCIA support */
-#define CFG_CMD_IDE 0x00000800ULL /* IDE harddisk support */
-#define CFG_CMD_PCI 0x00001000ULL /* pciinfo */
-#define CFG_CMD_IRQ 0x00002000ULL /* irqinfo */
-#define CFG_CMD_BOOTD 0x00004000ULL /* bootd */
-#define CFG_CMD_CONSOLE 0x00008000ULL /* coninfo */
-#define CFG_CMD_EEPROM 0x00010000ULL /* EEPROM read/write support */
-#define CFG_CMD_ASKENV 0x00020000ULL /* ask for env variable */
-#define CFG_CMD_RUN 0x00040000ULL /* run command in env variable */
-#define CFG_CMD_ECHO 0x00080000ULL /* echo arguments */
-#define CFG_CMD_I2C 0x00100000ULL /* I2C serial bus support */
-#define CFG_CMD_REGINFO 0x00200000ULL /* Register dump */
-#define CFG_CMD_IMMAP 0x00400000ULL /* IMMR dump support */
-#define CFG_CMD_DATE 0x00800000ULL /* support for RTC, date/time...*/
-#define CFG_CMD_DHCP 0x01000000ULL /* DHCP Support */
-#define CFG_CMD_BEDBUG 0x02000000ULL /* Include BedBug Debugger */
-#define CFG_CMD_FDC 0x04000000ULL /* Floppy Disk Support */
-#define CFG_CMD_SCSI 0x08000000ULL /* SCSI Support */
-#define CFG_CMD_AUTOSCRIPT 0x10000000ULL /* Autoscript Support */
-#define CFG_CMD_MII 0x20000000ULL /* MII support */
-#define CFG_CMD_SETGETDCR 0x40000000ULL /* DCR support on 4xx */
-#define CFG_CMD_BSP 0x80000000ULL /* Board Specific functions */
-
-#define CFG_CMD_ELF 0x0000000100000000ULL /* ELF (VxWorks) load/boot cmd */
-#define CFG_CMD_MISC 0x0000000200000000ULL /* Misc functions like sleep etc*/
-#define CFG_CMD_USB 0x0000000400000000ULL /* USB Support */
-#define CFG_CMD_DOC 0x0000000800000000ULL /* Disk-On-Chip Support */
-#define CFG_CMD_JFFS2 0x0000001000000000ULL /* JFFS2 Support */
-#define CFG_CMD_DTT 0x0000002000000000ULL /* Digital Therm and Thermostat */
-#define CFG_CMD_SDRAM 0x0000004000000000ULL /* SDRAM DIMM SPD info printout */
-#define CFG_CMD_DIAG 0x0000008000000000ULL /* Diagnostics */
-#define CFG_CMD_FPGA 0x0000010000000000ULL /* FPGA configuration Support */
-#define CFG_CMD_HWFLOW 0x0000020000000000ULL /* RTS/CTS hw flow control */
-#define CFG_CMD_SAVES 0x0000040000000000ULL /* save S record dump */
-#define CFG_CMD_SPI 0x0000100000000000ULL /* SPI utility */
-#define CFG_CMD_FDOS 0x0000200000000000ULL /* Floppy DOS support */
-#define CFG_CMD_VFD 0x0000400000000000ULL /* VFD support (TRAB) */
-#define CFG_CMD_NAND 0x0000800000000000ULL /* NAND support */
-#define CFG_CMD_BMP 0x0001000000000000ULL /* BMP support */
-#define CFG_CMD_PORTIO 0x0002000000000000ULL /* Port I/O */
-#define CFG_CMD_PING 0x0004000000000000ULL /* ping support */
-#define CFG_CMD_MMC 0x0008000000000000ULL /* MMC support */
-#define CFG_CMD_FAT 0x0010000000000000ULL /* FAT support */
-#define CFG_CMD_IMLS 0x0020000000000000ULL /* List all found images */
-#define CFG_CMD_ITEST 0x0040000000000000ULL /* Integer (and string) test */
-#define CFG_CMD_NFS 0x0080000000000000ULL /* NFS support */
-#define CFG_CMD_REISER 0x0100000000000000ULL /* Reiserfs support */
-#define CFG_CMD_CDP 0x0200000000000000ULL /* Cisco Discovery Protocol */
-#define CFG_CMD_XIMG 0x0400000000000000ULL /* Load part of Multi Image */
-#define CFG_CMD_UNIVERSE 0x0800000000000000ULL /* Tundra Universe Support */
-#define CFG_CMD_EXT2 0x1000000000000000ULL /* EXT2 Support */
-#define CFG_CMD_SNTP 0x2000000000000000ULL /* SNTP support */
-#define CFG_CMD_DISPLAY 0x4000000000000000ULL /* Display support */
-
-#define CFG_CMD_ALL 0xFFFFFFFFFFFFFFFFULL /* ALL commands */
-
-/* Commands that are considered "non-standard" for some reason
- * (memory hogs, requires special hardware, not fully tested, etc.)
- */
-#define CFG_CMD_NONSTD (CFG_CMD_ASKENV | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_CACHE | \
- CFG_CMD_CDP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FDC | \
- CFG_CMD_FAT | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_IMMAP | \
- CFG_CMD_IRQ | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGDB | \
- CFG_CMD_MII | \
- CFG_CMD_MMC | \
- CFG_CMD_NAND | \
- CFG_CMD_PCI | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_PING | \
- CFG_CMD_PORTIO | \
- CFG_CMD_REGINFO | \
- CFG_CMD_REISER | \
- CFG_CMD_SAVES | \
- CFG_CMD_SCSI | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP | \
- CFG_CMD_SPI | \
- CFG_CMD_UNIVERSE | \
- CFG_CMD_USB | \
- CFG_CMD_VFD )
-
-/* Default configuration
- */
-#define CONFIG_CMD_DFL (CFG_CMD_ALL & ~CFG_CMD_NONSTD)
-
-#ifndef CONFIG_COMMANDS
-#define CONFIG_COMMANDS CONFIG_CMD_DFL
-#endif
-
-
-/*
- * optional BOOTP fields
- */
-
-#define CONFIG_BOOTP_SUBNETMASK 0x00000001
-#define CONFIG_BOOTP_GATEWAY 0x00000002
-#define CONFIG_BOOTP_HOSTNAME 0x00000004
-#define CONFIG_BOOTP_NISDOMAIN 0x00000008
-#define CONFIG_BOOTP_BOOTPATH 0x00000010
-#define CONFIG_BOOTP_BOOTFILESIZE 0x00000020
-#define CONFIG_BOOTP_DNS 0x00000040
-#define CONFIG_BOOTP_DNS2 0x00000080
-#define CONFIG_BOOTP_SEND_HOSTNAME 0x00000100
-#define CONFIG_BOOTP_NTPSERVER 0x00000200
-#define CONFIG_BOOTP_TIMEOFFSET 0x00000400
-
-#define CONFIG_BOOTP_VENDOREX 0x80000000
-
-#define CONFIG_BOOTP_ALL (~CONFIG_BOOTP_VENDOREX)
-
-
-#define CONFIG_BOOTP_DEFAULT (CONFIG_BOOTP_SUBNETMASK | \
- CONFIG_BOOTP_GATEWAY | \
- CONFIG_BOOTP_HOSTNAME | \
- CONFIG_BOOTP_BOOTPATH)
-
-#ifndef CONFIG_BOOTP_MASK
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-#endif
-
-#endif /* _CMD_CONFIG_H */
diff --git a/include/command.h b/include/command.h
index a2936ad..0597c10 100644
--- a/include/command.h
+++ b/include/command.h
@@ -84,12 +84,6 @@
#define CMD_FLAG_REPEAT 0x0001 /* repeat last command */
#define CMD_FLAG_BOOTD 0x0002 /* command is from bootd */
-/*
- * Configurable monitor commands definitions have been moved
- * to include/cmd_confdefs.h
- */
-
-
#define Struct_Section __attribute__ ((unused,section (".u_boot_cmd")))
#ifdef CFG_LONGHELP
diff --git a/include/common.h b/include/common.h
index b162dbd..aca281b 100644
--- a/include/common.h
+++ b/include/common.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2000-2004
+ * (C) Copyright 2000-2007
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -38,7 +38,7 @@
#include <linux/string.h>
#include <asm/ptrace.h>
#include <stdarg.h>
-#if defined(CONFIG_PCI) && defined(CONFIG_440)
+#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
#include <pci.h>
#endif
#if defined(CONFIG_8xx)
@@ -63,10 +63,19 @@
#endif
#elif defined(CONFIG_5xx)
#include <asm/5xx_immap.h>
+#define CONFIG_RELOC_FIXUP_WORKS
#elif defined(CONFIG_MPC5xxx)
#include <mpc5xxx.h>
+#define CONFIG_RELOC_FIXUP_WORKS
+#elif defined(CONFIG_MPC512X)
+#include <mpc512x.h>
+#include <asm/immap_512x.h>
+#define CONFIG_RELOC_FIXUP_WORKS
#elif defined(CONFIG_MPC8220)
#include <asm/immap_8220.h>
+#define CONFIG_RELOC_FIXUP_WORKS
+#elif defined(CONFIG_824X)
+#define CONFIG_RELOC_FIXUP_WORKS
#elif defined(CONFIG_8260)
#if defined(CONFIG_MPC8247) \
|| defined(CONFIG_MPC8248) \
@@ -78,6 +87,7 @@
#define CONFIG_MPC8260 1
#endif
#include <asm/immap_8260.h>
+#define CONFIG_RELOC_FIXUP_WORKS
#endif
#ifdef CONFIG_MPC86xx
#include <mpc86xx.h>
@@ -90,6 +100,7 @@
#ifdef CONFIG_MPC83XX
#include <mpc83xx.h>
#include <asm/immap_83xx.h>
+#define CONFIG_RELOC_FIXUP_WORKS
#endif
#ifdef CONFIG_4xx
#include <ppc4xx.h>
@@ -230,6 +241,9 @@
void inline setenv (char *, char *);
#else
void setenv (char *, char *);
+#ifdef CONFIG_HAS_UID
+void forceenv (char *, char *);
+#endif
#endif /* CONFIG_PPC */
#ifdef CONFIG_ARM
# include <asm/mach-types.h>
@@ -248,10 +262,11 @@
void pci_init_board(void);
void pciinfo (int, int);
-#if defined(CONFIG_PCI) && defined(CONFIG_440)
-# if defined(CFG_PCI_PRE_INIT)
+#if defined(CONFIG_PCI) && (defined(CONFIG_4xx) && !defined(CONFIG_AP1000))
int pci_pre_init (struct pci_controller * );
-# endif
+#endif
+
+#if defined(CONFIG_PCI) && defined(CONFIG_440)
# if defined(CFG_PCI_TARGET_INIT)
void pci_target_init (struct pci_controller *);
# endif
@@ -260,7 +275,7 @@
# endif
int is_pci_host (struct pci_controller *);
#if defined(CONFIG_440SPE)
- void pcie_setup_hoses(void);
+ void pcie_setup_hoses(int busno);
#endif
#endif
@@ -402,6 +417,10 @@
void ppcSync(void);
void ppcDcbz(unsigned long value);
#endif
+#if defined (CONFIG_MICROBLAZE)
+unsigned short in16(unsigned int);
+void out16(unsigned int, unsigned short value);
+#endif
#if defined (CONFIG_MPC83XX)
void ppcDWload(unsigned int *addr, unsigned int *ret);
@@ -415,6 +434,13 @@
void upmconfig (unsigned int, unsigned int *, unsigned int);
ulong get_tbclk (void);
void reset_cpu (ulong addr);
+#if defined (CONFIG_OF_LIBFDT) && defined (CONFIG_OF_BOARD_SETUP)
+void ft_cpu_setup(void *blob, bd_t *bd);
+#ifdef CONFIG_PCI
+void ft_pci_setup(void *blob, bd_t *bd);
+#endif
+#endif
+
/* $(CPU)/serial.c */
int serial_init (void);
@@ -440,11 +466,12 @@
int adjust_sdram_tbs_8xx (void);
#if defined(CONFIG_8260)
int prt_8260_clks (void);
-#elif defined(CONFIG_MPC83XX)
-int print_clock_conf(void);
#elif defined(CONFIG_MPC5xxx)
int prt_mpc5xxx_clks (void);
#endif
+#if defined(CONFIG_MPC512x)
+int prt_mpc512xxx_clks (void);
+#endif
#if defined(CONFIG_MPC8220)
int prt_mpc8220_clks (void);
#endif
@@ -509,6 +536,8 @@
int cpu_init_r (void);
#if defined(CONFIG_8260)
int prt_8260_rsr (void);
+#elif defined(CONFIG_MPC83XX)
+int prt_83xx_rsr (void);
#endif
/* $(CPU)/interrupts.c */
@@ -623,9 +652,13 @@
int pcmcia_init (void);
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-void show_boot_progress (int status);
+#ifdef CONFIG_STATUS_LED
+# include <status_led.h>
#endif
+/*
+ * Board-specific Platform code can reimplement show_boot_progress () if needed
+ */
+void inline show_boot_progress (int val);
#ifdef CONFIG_INIT_CRITICAL
#error CONFIG_INIT_CRITICAL is deprecated!
diff --git a/include/config_cmd_all.h b/include/config_cmd_all.h
new file mode 100644
index 0000000..3d91e99
--- /dev/null
+++ b/include/config_cmd_all.h
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License Version 2. This file is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef _CONFIG_CMD_ALL_H
+#define _CONFIG_CMD_ALL_H
+
+/*
+ * Alphabetical list of all possible commands.
+ */
+
+#define CONFIG_CMD_ASKENV /* ask for env variable */
+#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */
+#define CONFIG_CMD_BDI /* bdinfo */
+#define CONFIG_CMD_BEDBUG /* Include BedBug Debugger */
+#define CONFIG_CMD_BMP /* BMP support */
+#define CONFIG_CMD_BOOTD /* bootd */
+#define CONFIG_CMD_BSP /* Board Specific functions */
+#define CONFIG_CMD_CACHE /* icache, dcache */
+#define CONFIG_CMD_CDP /* Cisco Discovery Protocol */
+#define CONFIG_CMD_CONSOLE /* coninfo */
+#define CONFIG_CMD_DATE /* support for RTC, date/time...*/
+#define CONFIG_CMD_DHCP /* DHCP Support */
+#define CONFIG_CMD_DIAG /* Diagnostics */
+#define CONFIG_CMD_DISPLAY /* Display support */
+#define CONFIG_CMD_DOC /* Disk-On-Chip Support */
+#define CONFIG_CMD_DTT /* Digital Therm and Thermostat */
+#define CONFIG_CMD_ECHO /* echo arguments */
+#define CONFIG_CMD_EEPROM /* EEPROM read/write support */
+#define CONFIG_CMD_ELF /* ELF (VxWorks) load/boot cmd */
+#define CONFIG_CMD_ENV /* saveenv */
+#define CONFIG_CMD_EXT2 /* EXT2 Support */
+#define CONFIG_CMD_FAT /* FAT support */
+#define CONFIG_CMD_FDC /* Floppy Disk Support */
+#define CONFIG_CMD_FDOS /* Floppy DOS support */
+#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#define CONFIG_CMD_FPGA /* FPGA configuration Support */
+#define CONFIG_CMD_HWFLOW /* RTS/CTS hw flow control */
+#define CONFIG_CMD_I2C /* I2C serial bus support */
+#define CONFIG_CMD_IDE /* IDE harddisk support */
+#define CONFIG_CMD_IMI /* iminfo */
+#define CONFIG_CMD_IMLS /* List all found images */
+#define CONFIG_CMD_IMMAP /* IMMR dump support */
+#define CONFIG_CMD_IRQ /* irqinfo */
+#define CONFIG_CMD_ITEST /* Integer (and string) test */
+#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
+#define CONFIG_CMD_KGDB /* kgdb */
+#define CONFIG_CMD_LOADB /* loadb */
+#define CONFIG_CMD_LOADS /* loads */
+#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
+#define CONFIG_CMD_MFSL /* FSL support for Microblaze */
+#define CONFIG_CMD_MII /* MII support */
+#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
+#define CONFIG_CMD_MMC /* MMC support */
+#define CONFIG_CMD_NAND /* NAND support */
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+#define CONFIG_CMD_NFS /* NFS support */
+#define CONFIG_CMD_PCI /* pciinfo */
+#define CONFIG_CMD_PCMCIA /* PCMCIA support */
+#define CONFIG_CMD_PING /* ping support */
+#define CONFIG_CMD_PORTIO /* Port I/O */
+#define CONFIG_CMD_REGINFO /* Register dump */
+#define CONFIG_CMD_REISER /* Reiserfs support */
+#define CONFIG_CMD_RUN /* run command in env variable */
+#define CONFIG_CMD_SAVES /* save S record dump */
+#define CONFIG_CMD_SCSI /* SCSI Support */
+#define CONFIG_CMD_SDRAM /* SDRAM DIMM SPD info printout */
+#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
+#define CONFIG_CMD_SNTP /* SNTP support */
+#define CONFIG_CMD_SPI /* SPI utility */
+#define CONFIG_CMD_UNIVERSE /* Tundra Universe Support */
+#define CONFIG_CMD_USB /* USB Support */
+#define CONFIG_CMD_VFD /* VFD support (TRAB) */
+#define CONFIG_CMD_XIMG /* Load part of Multi Image */
+#define CONFIG_CMD_MUX /* AT91 MMC/SPI Mux Support */
+
+#endif /* _CONFIG_CMD_ALL_H */
diff --git a/include/config_cmd_default.h b/include/config_cmd_default.h
new file mode 100644
index 0000000..f61cfc9
--- /dev/null
+++ b/include/config_cmd_default.h
@@ -0,0 +1,40 @@
+/*
+ * Copyright 2007 Freescale Semiconductor, Inc.
+ *
+ * This file is licensed under the terms of the GNU General Public
+ * License Version 2. This file is licensed "as is" without any
+ * warranty of any kind, whether express or implied.
+ */
+
+#ifndef _CONFIG_CMD_DEFAULT_H
+#define _CONFIG_CMD_DEFAULT_H
+
+/*
+ * Alphabetical list of all commands that are configured by default.
+ * This is essentially all commands minus those that are considered
+ * "non-standard" for some reason (memory hogs, requires special
+ * hardware, not fully tested, etc.).
+ */
+
+#define CONFIG_CMD_AUTOSCRIPT /* Autoscript Support */
+#define CONFIG_CMD_BDI /* bdinfo */
+#define CONFIG_CMD_BOOTD /* bootd */
+#define CONFIG_CMD_CONSOLE /* coninfo */
+#define CONFIG_CMD_ECHO /* echo arguments */
+#define CONFIG_CMD_ENV /* saveenv */
+#define CONFIG_CMD_FLASH /* flinfo, erase, protect */
+#define CONFIG_CMD_FPGA /* FPGA configuration Support */
+#define CONFIG_CMD_IMI /* iminfo */
+#define CONFIG_CMD_IMLS /* List all found images */
+#define CONFIG_CMD_ITEST /* Integer (and string) test */
+#define CONFIG_CMD_LOADB /* loadb */
+#define CONFIG_CMD_LOADS /* loads */
+#define CONFIG_CMD_MEMORY /* md mm nm mw cp cmp crc base loop mtest */
+#define CONFIG_CMD_MISC /* Misc functions like sleep etc*/
+#define CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
+#define CONFIG_CMD_NFS /* NFS support */
+#define CONFIG_CMD_RUN /* run command in env variable */
+#define CONFIG_CMD_SETGETDCR /* DCR support on 4xx */
+#define CONFIG_CMD_XIMG /* Load part of Multi Image */
+
+#endif /* _CONFIG_CMD_DEFAULT_H */
diff --git a/include/configs/A3000.h b/include/configs/A3000.h
index ca9592c..0a9a1ff 100644
--- a/include/configs/A3000.h
+++ b/include/configs/A3000.h
@@ -52,23 +52,20 @@
#define CONFIG_BOOTDELAY 5
-#if 0
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BSP | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_FLASH | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_NET | \
- CFG_CMD_PCI )
-#endif
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
/*
@@ -309,7 +306,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ADCIOP.h b/include/configs/ADCIOP.h
index 821efe5..4632991 100644
--- a/include/configs/ADCIOP.h
+++ b/include/configs/ADCIOP.h
@@ -59,21 +59,32 @@
#define CONFIG_IPADDR 10.0.18.222
#define CONFIG_SERVERIP 10.0.18.190
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_ASKENV )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ASKENV
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -185,7 +196,7 @@
*/
#define CFG_DCACHE_SIZE 2048 /* For PLX IOP480 */
#define CFG_CACHELINE_SIZE 16 /* For AMCC 401/403 CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ADNPESC1.h b/include/configs/ADNPESC1.h
index 2efca10..77938b1 100644
--- a/include/configs/ADNPESC1.h
+++ b/include/configs/ADNPESC1.h
@@ -401,15 +401,8 @@
#define CONFIG_RTC_DS1306 1 /* Dallas 1306 real time clock */
#define CFG_SPI_RTC_DEVID 0 /* as 1st SPI device */
-#define __SPI_CMD_OFF 0 /* allow default commands: */
- /* CFG_CMD_SPI */
- /* CFG_CMD_DATE */
-
#else
#undef CONFIG_NIOS_SPI /* NO SPI support */
-#define __SPI_CMD_OFF ( CFG_CMD_SPI \
- | CFG_CMD_DATE \
- )
#endif
/*------------------------------------------------------------------------
@@ -570,45 +563,55 @@
#define CONFIG_POST CFG_POST_RTC
#define CFG_NIOS_POST_WORD_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CFG_CMD_ASKENV | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_CACHE | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_IDE | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGDB | \
- CFG_CMD_NAND | \
- CFG_CMD_NFS | \
- CFG_CMD_MMC | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_SCSI | \
- CFG_CMD_VFD | \
- CFG_CMD_USB | \
- CFG_CMD_XIMG | \
- __SPI_CMD_OFF ) )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
-#include <cmd_confdefs.h>
+#undef CONFIG_CMD_ASKENV
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_CACHE
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_FAT
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_XIMG
+
+#if (CFG_NIOS_CPU_SPI_NUMS != 1)
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_DATE
+#endif
/*------------------------------------------------------------------------
* KGDB
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 9600
#endif
@@ -651,7 +654,6 @@
#undef CFG_LOAD_ADDR /* force error break */
#endif
-
/* MEM test area */
#if (CFG_SDRAM_SIZE != 0)
diff --git a/include/configs/ADS860.h b/include/configs/ADS860.h
index df20965..2ee8c61 100644
--- a/include/configs/ADS860.h
+++ b/include/configs/ADS860.h
@@ -37,13 +37,19 @@
#define CONFIG_DRAM_50MHZ 1
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_PCMCIA \
- | CFG_CMD_PING \
- )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_PING
+
+/* This is picked up again in fads.h */
+#define FADS_COMMANDS_ALREADY_DEFINED
#include "fads.h"
diff --git a/include/configs/AMX860.h b/include/configs/AMX860.h
index 14d56bf..6f64038 100644
--- a/include/configs/AMX860.h
+++ b/include/configs/AMX860.h
@@ -61,7 +61,25 @@
#undef CONFIG_BOOTARGS
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+#define CONFIG_SCC1_ENET 1 /* use SCC1 ethernet */
+
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
+
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -70,29 +88,22 @@
#endif
-#undef CONFIG_WATCHDOG /* watchdog disabled */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_SUBNETMASK
-#define CONFIG_SCC1_ENET 1 /* use SCC1 ethernet */
-
-#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -196,7 +207,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/AP1000.h b/include/configs/AP1000.h
index ba4b1a2..d25aa74 100644
--- a/include/configs/AP1000.h
+++ b/include/configs/AP1000.h
@@ -66,18 +66,28 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_IRQ | \
- CFG_CMD_MVENV | \
- CFG_CMD_PCI | \
- CFG_CMD_PING \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MVENV
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -89,7 +99,7 @@
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -188,7 +198,7 @@
*/
#define CFG_DCACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -228,7 +238,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/APC405.h b/include/configs/APC405.h
index 3df99a0..f6495e4 100644
--- a/include/configs/APC405.h
+++ b/include/configs/APC405.h
@@ -67,27 +67,38 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/
@@ -106,7 +117,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -266,7 +277,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/AR405.h b/include/configs/AR405.h
index 1cd0280..0f301ec 100644
--- a/include/configs/AR405.h
+++ b/include/configs/AR405.h
@@ -71,17 +71,29 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_BSP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_BSP
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -92,7 +104,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -207,7 +219,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h
index d03c05b..9adbba9 100644
--- a/include/configs/ASH405.h
+++ b/include/configs/ASH405.h
@@ -53,25 +53,41 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
+
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -91,7 +107,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -132,40 +148,18 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define CFG_NAND_LEGACY
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
-
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CONFIG_MTD_NAND_VERIFY_WRITE 1 /* verify all writes!!! */
-#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff
@@ -270,7 +264,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/Adder.h b/include/configs/Adder.h
index 0e6b50f..4304ecc 100644
--- a/include/configs/Adder.h
+++ b/include/configs/Adder.h
@@ -52,15 +52,26 @@
#define CFG_8xx_CPUCLK_MAX 133000000
#endif /* CONFIG_MPC852T */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- )
-/* This must be included AFTER the definition of CONFIG_COMMANDS */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm fe040000" /* Autoboot command */
diff --git a/include/configs/AdderUSB.h b/include/configs/AdderUSB.h
new file mode 100644
index 0000000..a4f7f9a
--- /dev/null
+++ b/include/configs/AdderUSB.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (C) 2006 CodeHermit.
+ * Bryan O'Donoghue <bodonoghue@codehermit.ie>
+ *
+ * Provides support for USB console on the Analogue & Micro Adder87x
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __ADDERUSB__
+#define __ADDERUSB__
+
+/* Include the board port */
+#include "Adder.h"
+
+#define CONFIG_USB_DEVICE /* Include UDC driver */
+#define CONFIG_USB_TTY /* Bind the TTY driver to UDC */
+#define CFG_USB_EXTC_CLK 0x02 /* Oscillator on EXTC_CLK 2 */
+#define CFG_USB_BRG_CLK 0x04 /* or use Baud rate generator 0x04 */
+#define CFG_CONSOLE_IS_IN_ENV /* Console is in env */
+
+/* If you have a USB-IF assigned VendorID then you may wish to define
+ * your own vendor specific values either in BoardName.h or directly in
+ * usbd_vendor_info.h
+ */
+
+/*
+#define CONFIG_USBD_MANUFACTURER "CodeHermit.ie"
+#define CONFIG_USBD_PRODUCT_NAME "Das U-Boot"
+#define CONFIG_USBD_VENDORID 0xFFFF
+#define CONFIG_USBD_PRODUCTID_GSERIAL 0xFFFF
+#define CONFIG_USBD_PRODUCTID_CDCACM 0xFFFE
+*/
+
+#endif /* __ADDERUSB_H__ */
diff --git a/include/configs/Alaska8220.h b/include/configs/Alaska8220.h
index c08b2c3..3f2f614 100644
--- a/include/configs/Alaska8220.h
+++ b/include/configs/Alaska8220.h
@@ -39,12 +39,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -70,31 +64,40 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BOOTD | \
- CFG_CMD_CACHE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#define CONFIG_NET_MULTI
#define CONFIG_MII
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Autobooting
*/
@@ -282,7 +285,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -298,6 +301,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/AmigaOneG3SE.h b/include/configs/AmigaOneG3SE.h
index ea50f41..d914dcc 100644
--- a/include/configs/AmigaOneG3SE.h
+++ b/include/configs/AmigaOneG3SE.h
@@ -56,38 +56,46 @@
#define CONFIG_BOOTARGS "root=/dev/ram rw ramdisk=4096"
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_AMIGA_PARTITION
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_NET | \
- CFG_CMD_IDE | \
- CFG_CMD_FDC | \
- CFG_CMD_CACHE | \
- CFG_CMD_CONSOLE| \
- CFG_CMD_USB | \
- CFG_CMD_BSP | \
- CFG_CMD_PCI )
-/* CFG_CMD_MII | \ */
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FDC
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_CONSOLE|
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_PCI
+
#define CONFIG_PCI 1
/* #define CONFIG_PCI_SCAN_SHOW 1 */
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
- */
-#include <cmd_confdefs.h>
-
+#define atoi(x) simple_strtoul(x,NULL,10)
/*
* Miscellaneous configurable options
@@ -247,7 +255,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -348,8 +356,6 @@
#define CONFIG_3COM
/* #define CONFIG_BOOTP_RANDOM_DELAY */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
/*
* USB configuration
diff --git a/include/configs/B2.h b/include/configs/B2.h
index e55858d..f1411db 100644
--- a/include/configs/B2.h
+++ b/include/configs/B2.h
@@ -72,16 +72,26 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+
#define CONFIG_BOOTDELAY 5
#define CONFIG_ETHADDR 00:50:c2:1e:af:fb
diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h
index 46bdfa2..c11e9c9 100644
--- a/include/configs/BAB7xx.h
+++ b/include/configs/BAB7xx.h
@@ -66,14 +66,30 @@
#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_JFFS2 |\
- CFG_CMD_SCSI | CFG_CMD_IDE | CFG_CMD_DATE |\
- CFG_CMD_FDC | CFG_CMD_ELF)
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_SCSI
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_FDC
+#define CONFIG_CMD_ELF
+
/*
* Miscellaneous configurable options
@@ -86,7 +102,7 @@
*/
#define CONFIG_CONS_INDEX 1
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -436,7 +452,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/BC3450.h b/include/configs/BC3450.h
index 5b54f30..5c2bfc9 100644
--- a/include/configs/BC3450.h
+++ b/include/configs/BC3450.h
@@ -61,11 +61,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -106,12 +101,6 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
-#ifdef CONFIG_PCI
-# define ADD_PCI_CMD CFG_CMD_PCI
-#else
-# define ADD_PCI_CMD 0
-#endif
-
/*
* Video console
*/
@@ -126,12 +115,6 @@
# define CONFIG_SPLASH_SCREEN
# define CFG_CONSOLE_IS_IN_ENV
-#ifdef CONFIG_VIDEO
-# define ADD_BMP_CMD CFG_CMD_BMP
-#else
-# define ADD_BMP_CMD 0
-#endif
-
/*
* Partitions
*/
@@ -144,10 +127,7 @@
*/
#ifdef CONFIG_BC3450_USB
# define CONFIG_USB_OHCI
-# define ADD_USB_CMD CFG_CMD_USB
# define CONFIG_USB_STORAGE
-#else /* !CONFIG_BC3450_USB */
-# define ADD_USB_CMD 0
#endif /* CONFIG_BC3450_USB */
/*
@@ -158,66 +138,69 @@
CFG_POST_I2C)
#ifdef CONFIG_POST
-# define CFG_CMD_POST_DIAG CFG_CMD_DIAG
/* preserve space for the post_word at end of on-chip SRAM */
# define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#else
-# define CFG_CMD_POST_DIAG 0
#endif /* CONFIG_POST */
+
/*
- * IDE
+ * BOOTP options
*/
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_BSP
+
+#ifdef CONFIG_VIDEO
+ #define CONFIG_CMD_BMP
+#endif
+
#ifdef CONFIG_BC3450_IDE
-# define ADD_IDE_CMD CFG_CMD_IDE
-#else
-# define ADD_IDE_CMD 0
-#endif /* CONFIG_BC3450_IDE */
+ #define CONFIG_CMD_IDE
+#endif
-/*
- * Filesystem support
- */
-#if defined (CONFIG_BC3450_IDE) || defined (CONFIG_BC3450_USB)
-#ifdef CONFIG_FAT
-# define ADD_FAT_CMD CFG_CMD_FAT
-#else
-# define ADD_FAT_CMD 0
-#endif /* CONFIG_FAT */
+#if defined(CONFIG_BC3450_IDE) || defined(CONFIG_BC3450_USB)
+ #ifdef CONFIG_FAT
+ #define CONFIG_CMD_FAT
+ #endif
-#ifdef CONFIG_EXT2
-# define ADD_EXT2_CMD CFG_CMD_EXT2
-#else
-# define ADD_EXT2_CMD 0
-#endif /* CONFIG_EXT2 */
-#endif /* CONFIG_BC3450_IDE / _USB */
+ #ifdef CONFIG_EXT2
+ #define CONFIG_CMD_EXT2
+ #endif
+#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_BMP_CMD | \
- ADD_IDE_CMD | \
- ADD_FAT_CMD | \
- ADD_EXT2_CMD | \
- ADD_PCI_CMD | \
- ADD_USB_CMD | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP | \
- CFG_CMD_BSP)
+#ifdef CONFIG_BC3450_USB
+ #define CONFIG_CMD_USB
+#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#ifdef CONFIG_PCI
+ #define CONFIG_CMD_PCI
+#endif
+
+#ifdef CONFIG_POST
+ #define CONFIG_CMD_DIAG
+#endif
+
#define CONFIG_TIMESTAMP /* display image timestamps */
@@ -282,17 +265,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet
- * hasn't been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#if defined(CFG_IPBSPEED_133)
-# define CFG_PCISPEED_66 /* define for 66MHz speed */
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
+# define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -450,7 +433,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -469,9 +452,13 @@
#define CFG_HZ 1000 /* dec freq: 1ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -488,7 +475,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
# define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
# define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/BMW.h b/include/configs/BMW.h
index 3bd43d8..bb7856f 100644
--- a/include/configs/BMW.h
+++ b/include/configs/BMW.h
@@ -64,28 +64,35 @@
#define CFG_DOC_SUPPORT_2000 1
#define CFG_DOC_SUPPORT_MILLENNIUM 1
#define CFG_DOC_SHORT_TIMEOUT 1
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DOC | \
- CFG_CMD_ELF | \
- 0 )
-/* CFG_CMD_DOC required legacy NAND support */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_ELF
+
+
+/* CONFIG_CMD_DOC required legacy NAND support */
#define CFG_NAND_LEGACY
#if 0
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | \
- CFG_CMD_PCI | CFG_CMD_DOC | CFG_CMD_DATE)
-
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
#endif
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
- */
-#include <cmd_confdefs.h>
-
-
/*
* Miscellaneous configurable options
*/
@@ -293,7 +300,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h
index e0262a8..ae32f6b 100644
--- a/include/configs/CANBT.h
+++ b/include/configs/CANBT.h
@@ -56,13 +56,26 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_COMMANDS (( CONFIG_CMD_DFL | \
- CFG_CMD_IRQ | \
- CFG_CMD_EEPROM ) & \
- ~CFG_CMD_NET)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_EEPROM
+
+#undef CONFIG_CMD_NET
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -73,7 +86,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -173,7 +186,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CATcenter.h b/include/configs/CATcenter.h
index 7ec4599..0321650 100644
--- a/include/configs/CATcenter.h
+++ b/include/configs/CATcenter.h
@@ -119,24 +119,36 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NAND | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/
@@ -155,7 +167,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -387,6 +399,8 @@
#define CFG_ENV_ADDR_REDUND 0xFFFFA000
#define CFG_ENV_SIZE_REDUND 0x2000
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
#define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */
#define CFG_NVRAM_SIZE 242 /* NVRAM size */
@@ -413,7 +427,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CCM.h b/include/configs/CCM.h
index e8994ff..9f06957 100644
--- a/include/configs/CCM.h
+++ b/include/configs/CCM.h
@@ -94,27 +94,35 @@
#define CONFIG_MAC_PARTITION /* nod used yet */
#define CONFIG_DOS_PARTITION
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_EEPROM | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/*----------------------------------------------------------------------*/
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/CMS700.h b/include/configs/CMS700.h
index 1cca285..21cd9c1 100644
--- a/include/configs/CMS700.h
+++ b/include/configs/CMS700.h
@@ -60,28 +60,35 @@
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_BSP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_I2C | \
- CFG_CMD_DATE | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-#define CFG_NAND_LEGACY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -100,7 +107,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -148,36 +155,18 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff
@@ -289,7 +278,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPC45.h b/include/configs/CPC45.h
index b882f7a..aea8523 100644
--- a/include/configs/CPC45.h
+++ b/include/configs/CPC45.h
@@ -54,27 +54,36 @@
#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
- CFG_CMD_FLASH | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
-
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
+/*
+ * BOOTP options
*/
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
/*
@@ -325,7 +334,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCI2DP.h b/include/configs/CPCI2DP.h
index 56fd9a6..a3717b9 100644
--- a/include/configs/CPCI2DP.h
+++ b/include/configs/CPCI2DP.h
@@ -54,16 +54,29 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & ~CFG_CMD_NET) | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
+#undef CONFIG_CMD_NET
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -80,7 +93,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -216,7 +229,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h
index 047e2f1..1b948f6 100644
--- a/include/configs/CPCI405.h
+++ b/include/configs/CPCI405.h
@@ -55,32 +55,43 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME )
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_EEPROM )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-#define CFG_NAND_LEGACY
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -96,7 +107,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -260,7 +271,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h
index d756f44..fb71c5f 100644
--- a/include/configs/CPCI4052.h
+++ b/include/configs/CPCI4052.h
@@ -37,6 +37,7 @@
#define CONFIG_4xx 1 /* ...member of PPC4xx family */
#define CONFIG_CPCI405 1 /* ...on a CPCI405 board */
#define CONFIG_CPCI405_VER2 1 /* ...version 2 */
+#undef CONFIG_CPCI405_6U /* enable this for 6U boards */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
@@ -56,28 +57,44 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#if 0 /* test-only */
#define CONFIG_NETCONSOLE
@@ -97,11 +114,6 @@
#define CONFIG_AUTO_UPDATE 1 /* autoupdate via compactflash */
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-#define CFG_NAND_LEGACY
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -117,7 +129,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -311,7 +323,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h
index 852d94a..4994319 100644
--- a/include/configs/CPCI405AB.h
+++ b/include/configs/CPCI405AB.h
@@ -57,39 +57,49 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-#define CFG_NAND_LEGACY
-
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -105,7 +115,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -284,7 +294,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCI405DT.h b/include/configs/CPCI405DT.h
index 2260327..29f9292 100644
--- a/include/configs/CPCI405DT.h
+++ b/include/configs/CPCI405DT.h
@@ -56,28 +56,44 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
+#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
+
+#define CONFIG_NET_MULTI 1
+#undef CONFIG_HAS_ETH1
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#if 0 /* test-only */
#define CONFIG_NETCONSOLE
@@ -95,11 +111,6 @@
#undef CONFIG_AUTO_UPDATE /* autoupdate via compactflash */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-#define CFG_NAND_LEGACY
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -115,7 +126,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -314,7 +325,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCI440.h b/include/configs/CPCI440.h
index 90d3a8d..318ada1 100644
--- a/include/configs/CPCI440.h
+++ b/include/configs/CPCI440.h
@@ -33,6 +33,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_CPCI440 1 /* Board is ebony */
#define CONFIG_440GP 1 /* Specifc GP support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#undef CFG_DRAM_TEST /* Disable-takes long time! */
@@ -171,29 +172,27 @@
#define CONFIG_PHY_ADDR 1 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#if 0 /* test-only */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_IRQ | \
- CFG_CMD_I2C | \
- CFG_CMD_KGDB | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_ELF )
-#else
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM )
-/* test-only: support fehlt bisher... */
-/* CFG_CMD_IDE | \*/
-/* CFG_CMD_PCI | \*/
-#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -204,7 +203,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -268,7 +267,7 @@
*/
#define CFG_DCACHE_SIZE 32768 /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -290,7 +289,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/CPCI750.h b/include/configs/CPCI750.h
index bc23fc0..48e29a2 100644
--- a/include/configs/CPCI750.h
+++ b/include/configs/CPCI750.h
@@ -133,30 +133,37 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_ALTIVEC /* undef to disable */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C \
- | CFG_CMD_CACHE \
- | CFG_CMD_EEPROM \
- | CFG_CMD_PCI \
- | CFG_CMD_ELF \
- | CFG_CMD_DATE \
- | CFG_CMD_NET \
- | CFG_CMD_PING \
- | CFG_CMD_IDE \
- | CFG_CMD_FAT \
- | CFG_CMD_EXT2 \
- )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_USE_CPCIDVI
#ifdef CONFIG_USE_CPCIDVI
@@ -179,7 +186,7 @@
#define CFG_GT_DUAL_CPU /* also for JTAG even with one cpu */
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -585,7 +592,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h
index 93d49f3..c7b623a 100644
--- a/include/configs/CPCIISER4.h
+++ b/include/configs/CPCIISER4.h
@@ -54,15 +54,36 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -73,7 +94,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -189,7 +210,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h
index 16a9ea5..c589f28 100644
--- a/include/configs/CPU86.h
+++ b/include/configs/CPU86.h
@@ -68,9 +68,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
- *
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -163,27 +161,37 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -348,7 +356,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CPU87.h b/include/configs/CPU87.h
index ce969ec..b087eba 100644
--- a/include/configs/CPU87.h
+++ b/include/configs/CPU87.h
@@ -69,9 +69,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
- *
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -167,27 +165,31 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
#ifdef CONFIG_PCI
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_PCI)
-#else /* ! PCI */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C )
-#endif /* CONFIG_PCI */
+ #define CONFIG_CMD_PCI
+#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CFG_NAND_LEGACY
@@ -196,7 +198,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -369,7 +371,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h
index 63d7a92..a965c12 100644
--- a/include/configs/CRAYL1.h
+++ b/include/configs/CRAYL1.h
@@ -75,38 +75,42 @@
#define CONFIG_AUTOSCRIPT 1
-#define CONFIG_COMMANDS (\
- CFG_CMD_BDI|\
- CFG_CMD_IMI|\
- CFG_CMD_FLASH|\
- CFG_CMD_MEMORY|\
- CFG_CMD_NET|\
- CFG_CMD_ENV|\
- CFG_CMD_CONSOLE|\
- CFG_CMD_ASKENV|\
- CFG_CMD_ECHO|\
- CFG_CMD_IMMAP|\
- CFG_CMD_REGINFO|\
- CFG_CMD_DHCP|\
- CFG_CMD_DATE|\
- CFG_CMD_RUN|\
- CFG_CMD_I2C|\
- CFG_CMD_EEPROM|\
- CFG_CMD_DIAG|\
- CFG_CMD_AUTOSCRIPT|\
- CFG_CMD_SETGETDCR)
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_SETGETDCR
+
/*
- * optional BOOTP / DHCP fields
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (\
- CONFIG_BOOTP_VENDOREX|\
- CONFIG_BOOTP_SUBNETMASK|\
- CONFIG_BOOTP_GATEWAY|\
- CONFIG_BOOTP_DNS|\
- CONFIG_BOOTP_HOSTNAME|\
- CONFIG_BOOTP_BOOTFILESIZE|\
- CONFIG_BOOTP_BOOTPATH)
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_VENDOREX
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_BOOTFILESIZE
+
/*
* how many time to fail & restart a net-TFTP before giving up & resetting
@@ -123,9 +127,6 @@
#define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
diff --git a/include/configs/CU824.h b/include/configs/CU824.h
index acc8484..68e816a 100644
--- a/include/configs/CU824.h
+++ b/include/configs/CU824.h
@@ -55,21 +55,29 @@
#define CONFIG_BOOTCOMMAND "bootm FE020000" /* autoboot command */
#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- 0 /* CFG_CMD_DATE */ | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
+/*
+ * Command line configuration.
*/
-#include <cmd_confdefs.h>
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
/*
@@ -278,7 +286,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h
index 997e1ba..627ea14 100644
--- a/include/configs/DASA_SIM.h
+++ b/include/configs/DASA_SIM.h
@@ -57,32 +57,35 @@
#define CONFIG_IPADDR 10.0.18.222
#define CONFIG_SERVERIP 10.0.18.190
-#if 0
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_IRQ | \
- CFG_CMD_BSP | \
- CFG_CMD_ASKENV | \
- CFG_CMD_ELF )
-#else
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP )
-#endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+
#if 0 /* Does not appear to be used?! If it is used, needs to be fixed */
#define CONFIG_SOFT_I2C /* Software I2C support enabled */
#endif
#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -184,7 +187,7 @@
*/
#define CFG_DCACHE_SIZE 2048 /* For PLX IOP480 */
#define CFG_CACHELINE_SIZE 16 /* For AMCC 401/403 CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/DB64360.h b/include/configs/DB64360.h
index bd7aff1..db2e96c 100644
--- a/include/configs/DB64360.h
+++ b/include/configs/DB64360.h
@@ -215,8 +215,16 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_ALTIVEC /* undef to disable */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
/*
* JFFS2 partitions
*
@@ -239,17 +247,20 @@
#define MTDPARTS_DEFAULT "mtdparts=db64360-1:-(jffs2)"
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C \
- | CFG_CMD_EEPROM \
- | CFG_CMD_CACHE \
- | CFG_CMD_JFFS2 \
- | CFG_CMD_PCI \
- | CFG_CMD_NET )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+
/*
* Miscellaneous configurable options
@@ -261,7 +272,7 @@
/* #define CFG_GT_DUAL_CPU also for JTAG even with one cpu */
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -558,7 +569,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/DB64460.h b/include/configs/DB64460.h
index 4b72e9b..b5d3f77 100644
--- a/include/configs/DB64460.h
+++ b/include/configs/DB64460.h
@@ -153,8 +153,16 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_ALTIVEC /* undef to disable */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
/*
* JFFS2 partitions
*
@@ -177,17 +185,20 @@
#define MTDPARTS_DEFAULT "mtdparts=db64460-1:-(jffs2)"
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C \
- | CFG_CMD_EEPROM \
- | CFG_CMD_CACHE \
- | CFG_CMD_JFFS2 \
- | CFG_CMD_PCI \
- | CFG_CMD_NET )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_NET
+
/*
* Miscellaneous configurable options
@@ -199,7 +210,7 @@
/* #define CFG_GT_DUAL_CPU also for JTAG even with one cpu */
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -496,7 +507,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/DK1C20.h b/include/configs/DK1C20.h
index b58846d..0ddf0e3 100644
--- a/include/configs/DK1C20.h
+++ b/include/configs/DK1C20.h
@@ -446,46 +446,55 @@
#define CONFIG_NIOS_ASMI /* Enable ASMI */
#define CFG_NIOS_ASMIBASE CFG_NIOS_CPU_ASMI0 /* ASMI base address */
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CFG_CMD_ASKENV | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGDB | \
- CFG_CMD_NAND | \
- CFG_CMD_NFS | \
- CFG_CMD_MMC | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_REISER | \
- CFG_CMD_SCSI | \
- CFG_CMD_SPI | \
- CFG_CMD_VFD | \
- CFG_CMD_USB | \
- CFG_CMD_XIMG ) )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
+
+#undef CONFIG_CMD_ASKENV
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_BSP
+#undef CONFIG_CMD_CACHE
+#undef CONFIG_CMD_DATE
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_XIMG
+
/*------------------------------------------------------------------------
* COMPACT FLASH
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
#define CONFIG_IDE_PREINIT /* Implement id_preinit */
#define CFG_IDE_MAXBUS 1 /* 1 IDE bus */
#define CFG_IDE_MAXDEVICE 1 /* 1 drive per IDE bus */
@@ -503,12 +512,12 @@
#define CFG_CF_POWER 0x009209c0 /* CF Power FET PIO base*/
#define CFG_CF_ATASEL 0x009209d0 /* CF ATASEL PIO base */
-#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
+#endif
/*------------------------------------------------------------------------
* KGDB
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 9600
#endif
diff --git a/include/configs/DK1S10.h b/include/configs/DK1S10.h
index 3e3803c..0032fd3 100644
--- a/include/configs/DK1S10.h
+++ b/include/configs/DK1S10.h
@@ -454,47 +454,55 @@
#endif /* CFG_NIOS_CPU_PIO_NUMS */
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CFG_CMD_ASKENV | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_IDE | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGDB | \
- CFG_CMD_NAND | \
- CFG_CMD_NFS | \
- CFG_CMD_MMC | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_SCSI | \
- CFG_CMD_SPI | \
- CFG_CMD_VFD | \
- CFG_CMD_USB | \
- CFG_CMD_XIMG ) )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
+
+#undef CONFIG_CMD_ASKENV
+#undef COND_CMD_BEDBUG
+#undef COND_CMD_BMP
+#undef COND_CMD_BSP
+#undef COND_CMD_CACHE
+#undef COND_CMD_DATE
+#undef COND_CMD_DOC
+#undef COND_CMD_DTT
+#undef COND_CMD_EEPROM
+#undef COND_CMD_ELF
+#undef COND_CMD_FAT
+#undef COND_CMD_FDC
+#undef COND_CMD_FDOS
+#undef COND_CMD_HWFLOW
+#undef COND_CMD_IDE
+#undef COND_CMD_I2C
+#undef COND_CMD_JFFS2
+#undef COND_CMD_KGDB
+#undef COND_CMD_NAND
+#undef COND_CMD_NFS
+#undef COND_CMD_MMC
+#undef COND_CMD_MII
+#undef COND_CMD_PCI
+#undef COND_CMD_PCMCIA
+#undef COND_CMD_SCSI
+#undef COND_CMD_SPI
+#undef COND_CMD_VFD
+#undef COND_CMD_USB
+#undef COND_CMD_XIMG
+
/*------------------------------------------------------------------------
* KGDB
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 9600
#endif
diff --git a/include/configs/DP405.h b/include/configs/DP405.h
index 2ae794d..2eadbea 100644
--- a/include/configs/DP405.h
+++ b/include/configs/DP405.h
@@ -55,17 +55,29 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_DHCP | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -87,7 +99,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -235,7 +247,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/DU405.h b/include/configs/DU405.h
index 5489a53..5c595f5 100644
--- a/include/configs/DU405.h
+++ b/include/configs/DU405.h
@@ -58,21 +58,33 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_DATE | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_RTC_MC146818 /* BQ3285 is MC146818 compatible*/
@@ -85,7 +97,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -225,7 +237,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/EB+MCF-EV123.h b/include/configs/EB+MCF-EV123.h
index 720b335..dae5295 100644
--- a/include/configs/EB+MCF-EV123.h
+++ b/include/configs/EB+MCF-EV123.h
@@ -40,9 +40,8 @@
#define CONFIG_MISC_INIT_R
-#define FEC_ENET
-#define CONFIG_ETHADDR 00:CF:52:82:EB:01
-
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 9600
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
@@ -68,17 +67,61 @@
#define CFG_ENV_IS_IN_FLASH 1
#endif
-/*#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADS | CFG_CMD_LOADB) ) */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADB))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_LOADB
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
+
+#ifdef CONFIG_MCFFEC
+# define CONFIG_ETHADDR 00:CF:52:82:EB:01
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* CONFIG_MCFFEC */
#define CONFIG_BOOTDELAY 5
#define CFG_PROMPT "\nEV123 U-Boot> "
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -110,9 +153,6 @@
*/
#define CFG_MBAR 0x40000000
-#define CFG_DISCOVER_PHY
-/* #define CFG_ENET_BD_BASE 0x380000 */
-
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
@@ -139,6 +179,7 @@
#define CFG_FLASH_BASE 0xFFE00000
#define CFG_INT_FLASH_BASE 0xF0000000
+#define CFG_INT_FLASH_ENABLE 0x21
/* If M5282 port is fully implemented the monitor base will be behind
* the vector table. */
diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h
index 2c99b4b..bb77188 100644
--- a/include/configs/ELPPC.h
+++ b/include/configs/ELPPC.h
@@ -66,12 +66,25 @@
#define CONFIG_LOADS_ECHO 0 /* echo off for serial download */
#define CFG_LOADS_BAUD_CHANGE /* allow baudrate changes */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_JFFS2)
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_JFFS2
+
/*
* Miscellaneous configurable options
@@ -84,7 +97,7 @@
*/
#define CONFIG_CONS_INDEX 1
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -317,7 +330,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ELPT860.h b/include/configs/ELPT860.h
index e73bcec..f927a2c 100644
--- a/include/configs/ELPT860.h
+++ b/include/configs/ELPT860.h
@@ -81,7 +81,15 @@
""
#define CONFIG_BOOTCOMMAND "run ramboot"
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
@@ -91,12 +99,15 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+
/*
* Miscellaneous configurable options
@@ -104,7 +115,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "LEOX_elpt860: " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -224,7 +235,7 @@
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/EP1C20.h b/include/configs/EP1C20.h
index 5507f35..cfa6335 100644
--- a/include/configs/EP1C20.h
+++ b/include/configs/EP1C20.h
@@ -160,25 +160,36 @@
#define CONFIG_IPADDR 192.168.2.21
#define CONFIG_SERVERIP 192.168.2.16
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IRQ | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_RUN | \
- CFG_CMD_SAVES )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_BOOTD
+#undef CONFIG_CMD_CONSOLE
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IMLS
+#undef CONFIG_CMD_ITEST
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
+
/*------------------------------------------------------------------------
* MISC
diff --git a/include/configs/EP1S10.h b/include/configs/EP1S10.h
index 6eca9f2..7c526f7 100644
--- a/include/configs/EP1S10.h
+++ b/include/configs/EP1S10.h
@@ -154,25 +154,35 @@
#define CONFIG_IPADDR 192.168.2.21
#define CONFIG_SERVERIP 192.168.2.16
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IRQ | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_RUN | \
- CFG_CMD_SAVES )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+
/*------------------------------------------------------------------------
* MISC
diff --git a/include/configs/EP1S40.h b/include/configs/EP1S40.h
index 976e79a..1fe8f68 100644
--- a/include/configs/EP1S40.h
+++ b/include/configs/EP1S40.h
@@ -154,25 +154,35 @@
#define CONFIG_IPADDR 192.168.2.21
#define CONFIG_SERVERIP 192.168.2.16
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IRQ | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_RUN | \
- CFG_CMD_SAVES )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+
/*------------------------------------------------------------------------
* MISC
diff --git a/include/configs/EP88x.h b/include/configs/EP88x.h
index 738763b..89e0eeb 100644
--- a/include/configs/EP88x.h
+++ b/include/configs/EP88x.h
@@ -50,15 +50,25 @@
#define CFG_8xx_CPUCLK_MIN 40000000
#define CFG_8xx_CPUCLK_MAX 133000000
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* This must be included AFTER the definition of CONFIG_COMMANDS */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#define CONFIG_BOOTDELAY 5 /* Autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm fe060000" /* Autoboot command */
diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h
index c203aea..5d48d2b 100644
--- a/include/configs/ERIC.h
+++ b/include/configs/ERIC.h
@@ -96,23 +96,26 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH)
/*
- * #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | \
- * CFG_CMD_KGDB | CFG_CMD_I2C | CFG_CMD_EEPROM | \
- * CFG_CMD_ENV | CFG_CMD_FLASH)
+ * BOOTP options
*/
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* CFG_CMD_ENV est definie */
-/* ((CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_KGDB) & ~(CFG_CMD_ENV))
+
+/*
+ * Command line configuration.
*/
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -121,7 +124,7 @@
*/
#undef CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -325,7 +328,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -365,7 +368,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ESTEEM192E.h b/include/configs/ESTEEM192E.h
index b176c6f..66e1203 100644
--- a/include/configs/ESTEEM192E.h
+++ b/include/configs/ESTEEM192E.h
@@ -70,10 +70,21 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "BOOT: " /* Monitor Command Prompt */
diff --git a/include/configs/ETX094.h b/include/configs/ETX094.h
index d55eb7d..ed439b1 100644
--- a/include/configs/ETX094.h
+++ b/include/configs/ETX094.h
@@ -82,17 +82,29 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -179,7 +191,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h
index 78e5716..1c44a0c 100644
--- a/include/configs/EVB64260.h
+++ b/include/configs/EVB64260.h
@@ -103,21 +103,30 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_ALTIVEC /* undef to disable */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_ASKENV)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_ASKENV
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -391,7 +400,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/EXBITGEN.h b/include/configs/EXBITGEN.h
index d85be42..a3f38bb 100644
--- a/include/configs/EXBITGEN.h
+++ b/include/configs/EXBITGEN.h
@@ -82,10 +82,21 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 0 /* PHY address */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -94,7 +105,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -206,7 +217,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/FADS823.h b/include/configs/FADS823.h
index 1b562d6..f810af2 100644
--- a/include/configs/FADS823.h
+++ b/include/configs/FADS823.h
@@ -46,7 +46,6 @@
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
-/*Now included by CFG_CMD_PCMCIA */
/*#define CONFIG_PCMCIA 1 / * To enable PCMCIA support */
/* Video related */
@@ -105,17 +104,39 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_NISDOMAIN
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_TIMEOFFSET
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT ":>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -185,12 +206,13 @@
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/FADS850SAR.h b/include/configs/FADS850SAR.h
index 2a986f0..a09c0e0 100644
--- a/include/configs/FADS850SAR.h
+++ b/include/configs/FADS850SAR.h
@@ -61,15 +61,28 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
/*
* Miscellaneous configurable options
*/
#undef CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT ":>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -143,12 +156,13 @@
#define CFG_ENV_IS_IN_FLASH 1
#define CFG_ENV_OFFSET 0x00040000 /* Offset of Environment Sector */
#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/FLAGADM.h b/include/configs/FLAGADM.h
index 8babee1..431844c 100644
--- a/include/configs/FLAGADM.h
+++ b/include/configs/FLAGADM.h
@@ -62,21 +62,39 @@
/*#define CONFIG_WATCHDOG*/ /* watchdog enabled */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CFG_CMD_BDI | CFG_CMD_IMI | CFG_CMD_CACHE | \
- CFG_CMD_MEMORY | CFG_CMD_FLASH | CFG_CMD_LOADB | CFG_CMD_LOADS | \
- CFG_CMD_ENV | CFG_CMD_REGINFO | CFG_CMD_IMMAP | CFG_CMD_NET)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_NET
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "EEG> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -152,7 +170,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/FPS850L.h b/include/configs/FPS850L.h
index 0dd21bc..3b0ddb4 100644
--- a/include/configs/FPS850L.h
+++ b/include/configs/FPS850L.h
@@ -39,45 +39,90 @@
#undef CONFIG_8xx_CONS_SMC1
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#undef CONFIG_8xx_CONS_NONE
-#define CONFIG_BAUDRATE 19200
-#if 0
-#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
-#else
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#endif
-#define CONFIG_BOOTCOMMAND "bootm 40020000" /* autoboot command */
+#define CONFIG_BAUDRATE 115200
-#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
+#define CONFIG_BOOTCOUNT_LIMIT
+
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOARD_TYPES 1 /* support board types */
-#define CONFIG_BOOTARGS "root=/dev/nfs rw " \
- "nfsroot=10.0.0.2:/opt/eldk/ppc_8xx " \
- "nfsaddrs=10.0.0.99:10.0.0.2"
+#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_8xx\0" \
+ "bootfile=/tftpboot/fps850L/uImage\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_NISDOMAIN
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_TIMEOFFSET
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~( \
- CFG_CMD_CONSOLE | \
- CFG_CMD_BDI | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_CACHE ) )
+#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -160,7 +205,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/FPS860L.h b/include/configs/FPS860L.h
index 423d74e..6fec075 100644
--- a/include/configs/FPS860L.h
+++ b/include/configs/FPS860L.h
@@ -40,44 +40,89 @@
#define CONFIG_8xx_CONS_SMC2 1 /* Console is on SMC2 */
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 115200
-#if 0
-#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
-#else
+
+#define CONFIG_BOOTCOUNT_LIMIT
+
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#endif
-#define CONFIG_BOOTCOMMAND "bootm 40040000" /* autoboot command */
#define CONFIG_BOARD_TYPES 1 /* support board types */
-#define CONFIG_BOOTARGS "root=/dev/nfs rw " \
- "nfsroot=10.0.0.2:/opt/eldk/ppc_8xx " \
- "nfsaddrs=10.0.0.99:10.0.0.2"
+#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root filesystem over NFS;echo"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "flash_nfs=run nfsargs addip;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
+ "rootpath=/opt/eldk/ppc_8xx\0" \
+ "bootfile=/tftpboot/fps850L/uImage\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_ALL
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_NISDOMAIN
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_TIMEOFFSET
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
-#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -160,7 +205,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/G2000.h b/include/configs/G2000.h
index db42fd0..9c713c6 100644
--- a/include/configs/G2000.h
+++ b/include/configs/G2000.h
@@ -88,20 +88,32 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
#endif
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -120,7 +132,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -324,7 +336,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index 6613f90..bfbf3a8 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -132,9 +132,12 @@
/*
* BOOTP options
*/
-#define CONFIG_BOOTP_MASK ( CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE \
- )
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
/*
* The GEN860T network interface uses the on-chip 10/100 FEC with
@@ -222,35 +225,30 @@
CFG_POST_UART | \
CFG_POST_SPR )
-#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
-#else
-#define CFG_CMD_POST_DIAG 0
-#endif
/*
- * List of available monitor commands. Use the system default list
- * plus add some of the "non-standard" commands back in.
- * See ./cmd_confdefs.h
+ * Command line configuration.
*/
-#define BASE_CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_FPGA | \
- CFG_CMD_MII | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_POST_DIAG )
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_BEDBUG
#if !defined(CONFIG_SC)
-#define CONFIG_COMMANDS ( BASE_CONFIG_COMMANDS | CFG_CMD_DOC )
-#else
-#define CONFIG_COMMANDS BASE_CONFIG_COMMANDS
+ #define CONFIG_CMD_DOC
+#endif
+
+#ifdef CONFIG_POST
+#define CONFIG_CMD_DIAG
#endif
/*
@@ -279,11 +277,6 @@
#define CFG_FPGA_PROG_FEEDBACK
-/************************************************************************
- * This must be included AFTER the definition of any CONFIG_COMMANDS
- */
-#include <cmd_confdefs.h>
-
#define CFG_NAND_LEGACY
/*
@@ -306,7 +299,7 @@
/*
* Set buffer size for console I/O
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024
#else
#define CFG_CBSIZE 256
@@ -471,7 +464,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of above value */
#endif
diff --git a/include/configs/GENIETV.h b/include/configs/GENIETV.h
index 8c01d97..785355a 100644
--- a/include/configs/GENIETV.h
+++ b/include/configs/GENIETV.h
@@ -105,15 +105,28 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT ":>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -193,7 +206,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/GTH.h b/include/configs/GTH.h
index 03b9659..79f5714 100644
--- a/include/configs/GTH.h
+++ b/include/configs/GTH.h
@@ -97,18 +97,32 @@
#error Both CONFIG_SCC1_ENET and CONFIG_FEC_ENET configured
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IDE
+
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_PROMPT "=>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -190,7 +204,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/HH405.h b/include/configs/HH405.h
index dc40ebc..8967b3f 100644
--- a/include/configs/HH405.h
+++ b/include/configs/HH405.h
@@ -98,26 +98,40 @@
#define CONFIG_VIDEO_BMP_GZIP /* gzip compressed bmp images */
#define CFG_VIDEO_LOGO_MAX_SIZE (2 << 20) /* for decompressed img */
-#define ADD_BMP_CMD CFG_CMD_BMP
-#else
-#define ADD_BMP_CMD 0
#endif /* CONFIG_VIDEO */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_EXT2 | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_I2C | \
- CFG_CMD_DATE | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- ADD_BMP_CMD | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#endif
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -127,11 +141,6 @@
#define CONFIG_AUTO_UPDATE 1 /* autoupdate via compactflash */
#undef CONFIG_AUTO_UPDATE_SHOW /* use board show routine */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-#define CFG_NAND_LEGACY
-
#undef CONFIG_BZIP2 /* include support for bzip2 compressed images */
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -148,7 +157,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -198,36 +207,18 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff
@@ -377,7 +368,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/HIDDEN_DRAGON.h b/include/configs/HIDDEN_DRAGON.h
index 6864740..26dd954 100644
--- a/include/configs/HIDDEN_DRAGON.h
+++ b/include/configs/HIDDEN_DRAGON.h
@@ -52,16 +52,27 @@
#define CONFIG_BAUDRATE 9600
#define CONFIG_DRAM_SPEED 100 /* MHz */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_NET | \
- CFG_CMD_PCI | \
- CFG_CMD_PING )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
/*
* Miscellaneous configurable options
@@ -363,7 +374,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/HMI10.h b/include/configs/HMI10.h
index 7cce876..02ae5d0 100644
--- a/include/configs/HMI10.h
+++ b/include/configs/HMI10.h
@@ -117,7 +117,15 @@
#define CONFIG_CAN_DRIVER 1 /* CAN Driver support enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -125,31 +133,25 @@
#define CONFIG_RTC_DS1337 /* Use ds1337 rtc via i2c */
#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
#ifdef CONFIG_SPLASH_SCREEN
-# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BMP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#else
-# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+ #define CONFIG_CMD_BMP
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
@@ -164,7 +166,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -247,7 +249,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/HUB405.h b/include/configs/HUB405.h
index f84e356..1ff7108 100644
--- a/include/configs/HUB405.h
+++ b/include/configs/HUB405.h
@@ -60,18 +60,30 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -88,7 +100,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -135,38 +147,18 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#define CFG_NAND_LEGACY
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff
@@ -271,7 +263,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/IAD210.h b/include/configs/IAD210.h
index 35d84ae..bd0894c 100644
--- a/include/configs/IAD210.h
+++ b/include/configs/IAD210.h
@@ -84,7 +84,15 @@
/* #define CONFIG_STATUS_LED 1*/ /* Status LED enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
# undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
# define CONFIG_FEC_ENET 1 /* use FEC ethernet */
@@ -123,20 +131,23 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -217,7 +228,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h
index cd17935..da54cef 100644
--- a/include/configs/ICU862.h
+++ b/include/configs/ICU862.h
@@ -81,7 +81,15 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#undef CONFIG_SCC1_ENET /* disable SCC1 ethernet */
#define CONFIG_FEC_ENET 1 /* use FEC ethernet */
@@ -123,25 +131,28 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -223,12 +234,13 @@
#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment sector */
#define CFG_ENV_SIZE 0x4000 /* Used Size of Environment Sector */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/IDS8247.h b/include/configs/IDS8247.h
index 29eb874..85d2bb3 100644
--- a/include/configs/IDS8247.h
+++ b/include/configs/IDS8247.h
@@ -128,9 +128,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
- *
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -159,24 +157,34 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_NFS | \
- CFG_CMD_NAND | \
- CFG_CMD_I2C | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -234,7 +242,7 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_LEGACY
#define CFG_NAND0_BASE 0xE1000000
@@ -295,7 +303,7 @@
#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)(adr + 0x0)) = (__u8)d; } while(0)
#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)(adr + 0x0)))
-#endif /* CFG_CMD_NAND */
+#endif /* CONFIG_CMD_NAND */
/*-----------------------------------------------------------------------
* Hard Reset Configuration Words
@@ -355,7 +363,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -474,7 +482,7 @@
#define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH_SIZE) |\
ORxG_SCY_6_CLK )
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
/* Bank 1 - NAND Flash
*/
#define CFG_NAND_BASE CFG_NAND0_BASE
diff --git a/include/configs/IP860.h b/include/configs/IP860.h
index 0e20e56..bd961d8 100644
--- a/include/configs/IP860.h
+++ b/include/configs/IP860.h
@@ -88,28 +88,32 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/*----------------------------------------------------------------------*/
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-/*----------------------------------------------------------------------*/
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -202,7 +206,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/IPHASE4539.h b/include/configs/IPHASE4539.h
index c1565fc..6fee455 100644
--- a/include/configs/IPHASE4539.h
+++ b/include/configs/IPHASE4539.h
@@ -67,8 +67,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -95,7 +94,14 @@
#define CONFIG_8260_CLKIN 66666666 /* in Hz */
#define CONFIG_BAUDRATE 19200
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
/*
* select i2c support configuration
@@ -124,17 +130,18 @@
#define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
#endif /* CONFIG_SOFT_I2C */
-#define CONFIG_COMMANDS CONFIG_CMD_DFL
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm 100000" /* autoboot command */
#define CONFIG_BOOTARGS "root=/dev/ram rw"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -149,7 +156,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -257,7 +264,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ISPAN.h b/include/configs/ISPAN.h
index 706bdb9..965b515 100644
--- a/include/configs/ISPAN.h
+++ b/include/configs/ISPAN.h
@@ -58,8 +58,7 @@
* for FCC).
*
* If CONFIG_ETHER_NONE is defined, then either the Ethernet routines must
- * be defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * be defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* Define if Ethernet on SCC */
#define CONFIG_ETHER_ON_FCC /* Define if Ethernet on FCC */
@@ -106,17 +105,28 @@
#define CONFIG_8260_CLKIN 65536000 /* in Hz */
#define CONFIG_BAUDRATE 38400
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- | CFG_CMD_REGINFO \
- )
-/* This must be included AFTER the definition of CONFIG_COMMANDS */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm fe010000" /* autoboot command */
diff --git a/include/configs/IVML24.h b/include/configs/IVML24.h
index a0cb1dd..1142f2a 100644
--- a/include/configs/IVML24.h
+++ b/include/configs/IVML24.h
@@ -72,24 +72,33 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IDE
+
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_BOOTP_MASK \
- ((CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) & ~CONFIG_BOOTP_GATEWAY)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-/*----------------------------------------------------------------------*/
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -182,7 +191,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/IVMS8.h b/include/configs/IVMS8.h
index 46b4d53..bd19dad 100644
--- a/include/configs/IVMS8.h
+++ b/include/configs/IVMS8.h
@@ -72,24 +72,32 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_IDE)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IDE
+
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_BOOTP_MASK \
- ((CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) & ~CONFIG_BOOTP_GATEWAY)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-/*----------------------------------------------------------------------*/
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -179,7 +187,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 5988112..4c16d22 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -37,11 +37,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -69,7 +64,6 @@
#define CONFIG_PCI_IO_BUS 0x50000000
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
-#define ADD_PCI_CMD CFG_CMD_PCI
#endif
#define CFG_XLB_PIPELINING 1
@@ -80,11 +74,8 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
-#else /* MPC5100 */
-
+#else
#define CONFIG_MII 1
-#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
-
#endif
/* Partitions */
@@ -93,31 +84,44 @@
#define CONFIG_ISO_PARTITION
/* USB */
-#if 1
-#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
+#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
-#endif
+#define CFG_OHCI_BE_CONTROLLER
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT 1
+#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
+#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP | \
- ADD_PCI_CMD | \
- ADD_USB_CMD )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
+
+#if defined(CONFIG_PCI)
+#define CONFIG_CMD_PCI
+#endif
+
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
@@ -167,19 +171,16 @@
* IPB Bus clocking configuration.
*/
#if defined(CONFIG_LITE5200B)
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#else
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
#endif /* CONFIG_MPC5200 */
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
@@ -312,7 +313,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -328,6 +329,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
index ccd1f19..ea3b0b4 100644
--- a/include/configs/JSE.h
+++ b/include/configs/JSE.h
@@ -49,6 +49,7 @@
/* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */
#define CONFIG_SYSTEMACE 1
#define CFG_SYSTEMACE_BASE 0xf0000000
+#define CFG_SYSTEMACE_WIDTH 8
#define CONFIG_DOS_PARTITION 1
/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
@@ -134,20 +135,32 @@
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_PHY_ADDR 1 /* PHY address */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_FLASH | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_PCI | \
- CFG_CMD_PING )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+
/* watchdog disabled */
#undef CONFIG_WATCHDOG
@@ -166,7 +179,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -271,7 +284,7 @@
*/
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405GPr CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -297,7 +310,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/KAREF.h b/include/configs/KAREF.h
index 2ad6f06..3644e43 100644
--- a/include/configs/KAREF.h
+++ b/include/configs/KAREF.h
@@ -38,6 +38,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_KAREF 1 /* Board is Kamino Ref Variant */
#define CONFIG_440GX 1 /* Specifc GX support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
@@ -177,23 +178,34 @@
#define CFG_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */
-/*-----------------------------------------------------------------------
- * Console/Commands/Parser
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_I2C | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_PING | \
- CFG_CMD_DIAG | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_ELF | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+
/* Include NetConsole support */
#define CONFIG_NETCONSOLE
@@ -202,10 +214,6 @@
#define CONFIG_AUTO_COMPLETE 1
#define CFG_ALT_MEMTEST 1 /* use real memory test */
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "KaRefDes=> " /* Monitor Command Prompt */
@@ -216,7 +224,7 @@
/*-----------------------------------------------------------------------
* Console Buffer
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -262,7 +270,6 @@
#define CFG_PCI_TARGBASE (CFG_PCI_MEMBASE)
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init*/
#define CFG_PCI_TARGET_INIT /* let board init pci target*/
#define CFG_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
@@ -279,7 +286,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above */
#endif
@@ -291,7 +298,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
#endif
diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h
index 9b950fc..f6c31ea 100644
--- a/include/configs/KUP4K.h
+++ b/include/configs/KUP4K.h
@@ -89,7 +89,15 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -156,32 +164,31 @@
#define CONFIG_POST (CFG_POST_CPU | \
CFG_POST_RTC | \
CFG_POST_I2C)
+#endif
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
-#else
-#define CFG_CMD_POST_DIAG 0
+ #define CONFIG_CMD_DIAG
#endif
-#endif
-
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_SNTP )
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -269,7 +276,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/KUP4X.h b/include/configs/KUP4X.h
index cd38b0f..e558aa4 100644
--- a/include/configs/KUP4X.h
+++ b/include/configs/KUP4X.h
@@ -99,7 +99,15 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -167,34 +175,33 @@
#define CONFIG_POST (CFG_POST_CPU | \
CFG_POST_RTC | \
CFG_POST_I2C)
+#endif
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
-#else
-#define CFG_CMD_POST_DIAG 0
+ #define CONFIG_CMD_DIAG
#endif
-#endif
-
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_SNTP | \
- CFG_CMD_USB )
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -281,7 +288,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h
index e44f1cc..46edd08 100644
--- a/include/configs/LANTEC.h
+++ b/include/configs/LANTEC.h
@@ -74,64 +74,68 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_CMD_MINIMAL 0
-#define CONFIG_CMD_TINY (CFG_CMD_FLASH | \
- CFG_CMD_MEMORY | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB)
-#define CONFIG_CMD_NORMAL (CONFIG_CMD_DFL & ~CFG_CMD_BOOTD & ~CFG_CMD_REISER)
-#define CONFIG_CMD_GDB (CONFIG_CMD_NORMAL | CFG_CMD_KGDB)
-#define CONFIG_CMD_FULL (CFG_CMD_ALL & ~CFG_CMD_BEDBUG \
- & ~CFG_CMD_BMP \
- & ~CFG_CMD_BSP \
- & ~CFG_CMD_DISPLAY \
- & ~CFG_CMD_DOC \
- & ~CFG_CMD_DTT \
- & ~CFG_CMD_EEPROM \
- & ~CFG_CMD_ELF \
- & ~CFG_CMD_EXT2 \
- & ~CFG_CMD_FDC \
- & ~CFG_CMD_FDOS \
- & ~CFG_CMD_HWFLOW \
- & ~CFG_CMD_I2C \
- & ~CFG_CMD_IDE \
- & ~CFG_CMD_IRQ \
- & ~CFG_CMD_JFFS2 \
- & ~CFG_CMD_KGDB \
- & ~CFG_CMD_MII \
- & ~CFG_CMD_MMC \
- & ~CFG_CMD_NAND \
- & ~CFG_CMD_PCI \
- & ~CFG_CMD_PCMCIA \
- & ~CFG_CMD_REISER \
- & ~CFG_CMD_SCSI \
- & ~CFG_CMD_SPI \
- & ~CFG_CMD_UNIVERSE\
- & ~CFG_CMD_USB \
- & ~CFG_CMD_VFD \
- & ~CFG_CMD_XIMG )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
+
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_BSP
+#undef CONFIG_CMD_DISPLAY
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MFSL
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_UNIVERSE
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_XIMG
+
+#if !(CONFIG_LANTEC >= 2)
+ #undef CONFIG_CMD_DATE
+ #undef CONFIG_CMD_NET
+#endif
+
#if CONFIG_LANTEC >= 2
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
#endif
-#if CONFIG_LANTEC >= 2
-# define CONFIG_COMMANDS CONFIG_CMD_FULL
-#else
-# define CONFIG_COMMANDS (CONFIG_CMD_FULL & ~CFG_CMD_DATE & ~CFG_CMD_NET)
-#endif
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -203,7 +207,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
new file mode 100644
index 0000000..7f544c8
--- /dev/null
+++ b/include/configs/M5235EVB.h
@@ -0,0 +1,261 @@
+/*
+ * Configuation settings for the Freescale MCF5329 FireEngine board.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5235EVB_H
+#define _M5235EVB_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF523x /* define processor family */
+#define CONFIG_M5235 /* define processor type */
+
+#undef DEBUG
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
+
+/* Timer */
+#define CONFIG_MCFTMR
+#undef CONFIG_MCFPIT
+
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C /* I2C with hw support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 80000
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_OFFSET 0x00000300
+#define CFG_IMMR CFG_MBAR
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
+#define CONFIG_BOOTFILE "u-boot.bin"
+#ifdef CONFIG_MCFFEC
+# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* FEC_ENET */
+
+#define CONFIG_HOSTNAME M5235EVB
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=10000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ffe00000 ffe3ffff;" \
+ "era ffe00000 ffe3ffff;" \
+ "cp.b ${loadaddr} ffe00000 ${filesize};"\
+ "save\0" \
+ ""
+
+#define CONFIG_PRAM 512 /* 512 KB */
+#define CFG_PROMPT "-> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if defined(CONFIG_KGDB)
+# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR (CFG_SDRAM_BASE+0x20000)
+
+#define CFG_HZ 1000
+#define CFG_CLK 75000000
+#define CFG_CPU_CLK CFG_CLK * 2
+
+#define CFG_MBAR 0x40000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
+#define CFG_INIT_RAM_CTRL 0x21
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE - 0x10)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+
+#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400
+#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20)
+
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+
+#define CFG_BOOTPARAMS_LEN 64*1024
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+/* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_FLASH_CFI
+#ifdef CFG_FLASH_CFI
+# define CFG_FLASH_CFI_DRIVER 1
+# define CFG_FLASH_SIZE 0x800000 /* Max size that the board might have */
+#ifdef NORFLASH_PS32BIT
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_32BIT
+#else
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+#endif
+# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
+# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
+#endif
+
+#define CFG_FLASH_BASE (CFG_CS0_BASE << 16)
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_IS_EMBEDDED 1
+#ifdef NORFLASH_PS32BIT
+# define CFG_ENV_OFFSET (0x8000)
+# define CFG_ENV_SIZE 0x4000
+# define CFG_ENV_SECT_SIZE 0x4000
+#else
+# define CFG_ENV_OFFSET (0x4000)
+# define CFG_ENV_SIZE 0x2000
+# define CFG_ENV_SECT_SIZE 0x2000
+#endif
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Chipselect bank definitions
+ */
+/*
+ * CS0 - NOR Flash 1, 2, 4, or 8MB
+ * CS1 - Available
+ * CS2 - Available
+ * CS3 - Available
+ * CS4 - Available
+ * CS5 - Available
+ * CS6 - Available
+ * CS7 - Available
+ */
+#ifdef NORFLASH_PS32BIT
+# define CFG_CS0_BASE 0xFFC0
+# define CFG_CS0_MASK 0x003f0001
+# define CFG_CS0_CTRL 0x1D00
+#else
+# define CFG_CS0_BASE 0xFFE0
+# define CFG_CS0_MASK 0x001f0001
+# define CFG_CS0_CTRL 0x1D80
+#endif
+
+#endif /* _M5329EVB_H */
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
new file mode 100644
index 0000000..de7ea42
--- /dev/null
+++ b/include/configs/M5249EVB.h
@@ -0,0 +1,194 @@
+/*
+ * Configuation settings for the esd TASREG board.
+ *
+ * (C) Copyright 2004
+ * Stefan Roese, esd gmbh germany, stefan.roese@esd-electronics.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5249EVB_H
+#define _M5249EVB_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5249 /* define processor type */
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
+#define CONFIG_BAUDRATE 19200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG
+
+#undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */
+
+/*
+ * BOOTP options
+ */
+#undef CONFIG_BOOTP_BOOTFILESIZE
+#undef CONFIG_BOOTP_BOOTPATH
+#undef CONFIG_BOOTP_GATEWAY
+#undef CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET
+
+#define CFG_PROMPT "=> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_DEVICE_NULLDEV 1 /* include nulldev device */
+#define CFG_CONSOLE_INFO_QUIET 1 /* don't print console @ startup */
+#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
+#define CONFIG_LOOPW 1 /* enable loopw command */
+#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
+
+#define CFG_LOAD_ADDR 0x200000 /* default load address */
+
+#define CFG_MEMTEST_START 0x400
+#define CFG_MEMTEST_END 0x380000
+
+#define CFG_HZ 1000
+
+/*
+ * Clock configuration: enable only one of the following options
+ */
+
+#undef CFG_PLL_BYPASS /* bypass PLL for test purpose */
+#define CFG_FAST_CLK 1 /* MCF5249 can run at 140MHz */
+#define CFG_CLK 132025600 /* MCF5249 can run at 140MHz */
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR 0x10000000 /* Register Base Addrs */
+#define CFG_MBAR2 0x80000000
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_OFFSET 0x4000 /* Address of Environment Sector*/
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+#define CFG_ENV_SECT_SIZE 0x2000 /* see README - env sector total size */
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CFG_FLASH_BASE (CFG_CSAR0 << 16)
+
+#if 0 /* test-only */
+#define CONFIG_PRAM 512 /* test-only for SDRAM problem!!!!!!!!!!!!!!!!!!!! */
+#endif
+
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+
+#define CFG_MONITOR_LEN 0x20000
+#define CFG_MALLOC_LEN (1 * 1024*1024) /* Reserve 1 MB for malloc() */
+#define CFG_BOOTPARAMS_LEN 64*1024
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_FLASH_CFI
+#ifdef CFG_FLASH_CFI
+
+# define CFG_FLASH_CFI_DRIVER 1
+# define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
+# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
+# define CFG_FLASH_CHECKSUM
+# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+#endif
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+
+/* CS0 - AMD Flash, address 0xffc00000 */
+#define CFG_CSAR0 0xffe0
+#define CFG_CSCR0 0x1980 /* WS=0110, AA=1, PS=10 */
+/** Note: There is a CSMR0/DRAM vector problem, need to disable C/I ***/
+#define CFG_CSMR0 0x003f0021 /* 4MB, AA=0, WP=0, C/I=1, V=1 */
+
+/* CS1 - FPGA, address 0xe0000000 */
+#define CFG_CSAR1 0xe000
+#define CFG_CSCR1 0x0d80 /* WS=0011, AA=1, PS=10 */
+#define CFG_CSMR1 0x00010001 /* 128kB, AA=0, WP=0, C/I=0, V=1*/
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CFG_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
+#define CFG_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54*/
+#define CFG_GPIO_EN 0x00000008 /* Set gpio output enable */
+#define CFG_GPIO1_EN 0x00c70000 /* Set gpio output enable */
+#define CFG_GPIO_OUT 0x00000008 /* Set outputs to default state */
+#define CFG_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
+#define CFG_GPIO1_LED 0x00400000 /* user led */
+
+#endif /* M5249 */
diff --git a/include/configs/M5253EVBE.h b/include/configs/M5253EVBE.h
new file mode 100644
index 0000000..48170e7
--- /dev/null
+++ b/include/configs/M5253EVBE.h
@@ -0,0 +1,212 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * Hayden Fraser (Hayden.Fraser@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _M5253EVBE_H
+#define _M5253EVBE_H
+
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5253 /* define processor type */
+#define CONFIG_M5253EVBE /* define board type */
+
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
+#define CONFIG_BAUDRATE 19200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG /* disable watchdog */
+
+#define CONFIG_BOOTDELAY 5
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#ifndef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_ENV_OFFSET 0x4000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#else
+#define CFG_ENV_ADDR 0xffe04000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#endif
+
+/*
+ * BOOTP options
+ */
+#undef CONFIG_BOOTP_BOOTFILESIZE
+#undef CONFIG_BOOTP_BOOTPATH
+#undef CONFIG_BOOTP_GATEWAY
+#undef CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#undef CONFIG_CMD_NET
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+
+/* ATA */
+#define CONFIG_DOS_PARTITION
+#define CONFIG_MAC_PARTITION
+#define CONFIG_IDE_RESET 1
+#define CONFIG_IDE_PREINIT 1
+#define CONFIG_ATAPI
+#undef CONFIG_LBA48
+
+#define CFG_IDE_MAXBUS 1
+#define CFG_IDE_MAXDEVICE 2
+
+#define CFG_ATA_BASE_ADDR (CFG_MBAR2 + 0x800)
+#define CFG_ATA_IDE0_OFFSET 0
+
+#define CFG_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
+#define CFG_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
+#define CFG_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
+#define CFG_ATA_STRIDE 4 /* Interval between registers */
+#define _IO_BASE 0
+
+#define CFG_PROMPT "=> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR 0x00100000
+
+#define CFG_MEMTEST_START 0x400
+#define CFG_MEMTEST_END 0x380000
+
+#define CFG_HZ 1000
+
+#undef CFG_PLL_BYPASS /* bypass PLL for test purpose */
+#define CFG_FAST_CLK
+#ifdef CFG_FAST_CLK
+# define CFG_PLLCR 0x1243E054
+# define CFG_CLK 140000000
+#else
+# define CFG_PLLCR 0x135a4140
+# define CFG_CLK 70000000
+#endif
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+#define CFG_MBAR 0x10000000 /* Register Base Addrs */
+#define CFG_MBAR2 0x80000000 /* Module Base Addrs 2 */
+
+/*
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+
+#ifdef CONFIG_MONITOR_IS_IN_RAM
+#define CFG_MONITOR_BASE 0x20000
+#else
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#endif
+
+#define CFG_MONITOR_LEN 0x40000
+#define CFG_MALLOC_LEN (256 << 10)
+#define CFG_BOOTPARAMS_LEN (64*1024)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+
+/* FLASH organization */
+#define CFG_FLASH_BASE 0xffe00000
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 35 /* max number of sectors on one chip */
+#define CFG_FLASH_ERASE_TOUT 1000
+
+#define CFG_FLASH_CFI 1
+#define CFG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_SIZE 0x200000
+#define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+
+/* Cache Configuration */
+#define CFG_CACHELINE_SIZE 16
+
+/* Port configuration */
+#define CFG_FECI2C 0xF0
+
+#define CFG_CSAR0 0xFFE0
+#define CFG_CSMR0 0x001F0021
+#define CFG_CSCR0 0x1D80
+
+#define CFG_CSAR1 0
+#define CFG_CSMR1 0
+#define CFG_CSCR1 0
+
+#define CFG_CSAR2 0
+#define CFG_CSMR2 0
+#define CFG_CSCR2 0
+
+#define CFG_CSAR3 0
+#define CFG_CSMR3 0
+#define CFG_CSCR3 0
+
+/*-----------------------------------------------------------------------
+ * Port configuration
+ */
+#define CFG_GPIO_FUNC 0x00000008 /* Set gpio pins: none */
+#define CFG_GPIO1_FUNC 0x00df00f0 /* 36-39(SWITCH),48-52(FPGAs),54 */
+#define CFG_GPIO_EN 0x00000008 /* Set gpio output enable */
+#define CFG_GPIO1_EN 0x00c70000 /* Set gpio output enable */
+#define CFG_GPIO_OUT 0x00000008 /* Set outputs to default state */
+#define CFG_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
+#define CFG_GPIO1_LED 0x00400000 /* user led */
+
+#endif /* _M5253EVB_H */
diff --git a/include/configs/M5271EVB.h b/include/configs/M5271EVB.h
index f0fc013..798ec0c 100644
--- a/include/configs/M5271EVB.h
+++ b/include/configs/M5271EVB.h
@@ -31,7 +31,6 @@
#ifndef _M5271EVB_H
#define _M5271EVB_H
-#define DEBUG
#undef DEBUG
/*
@@ -41,46 +40,119 @@
#define CONFIG_M5271 /* define processor type */
#define CONFIG_M5271EVB /* define board type */
-#define CONFIG_IPADDR 192.168.30.1
-#define CONFIG_SERVERIP 192.168.1.1
-#define CONFIG_ETHADDR 00:06:3b:01:41:55
+#define CONFIG_MCFTMR
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#undef CONFIG_WATCHDOG /* disable watchdog */
-#define CONFIG_BOOTDELAY 5
-
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
*/
#ifndef CONFIG_MONITOR_IS_IN_RAM
#define CFG_ENV_OFFSET 0x4000
-#define CFG_ENV_SECT_SIZE 0x2000
-#define CFG_ENV_IS_IN_FLASH 1
#else
#define CFG_ENV_ADDR 0xffe04000
+#endif
#define CFG_ENV_SECT_SIZE 0x2000
#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
#endif
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C /* I2C with hw support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 80000
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_OFFSET 0x00000300
+#define CFG_IMMR CFG_MBAR
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
+#define CONFIG_BOOTFILE "u-boot.bin"
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_RETRY_COUNT 5
+# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* FEC_ENET */
+
+#define CONFIG_HOSTNAME M5235EVB
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=10000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ffe00000 ffe2ffff;" \
+ "era ffe00000 ffe2ffff;" \
+ "cp.b ${loadaddr} 0 ${filesize};" \
+ "save\0" \
+ ""
#define CFG_PROMPT "=> "
-#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_LOAD_ADDR 0x00100000
@@ -98,16 +170,11 @@
#define CFG_MBAR 0x40000000 /* Register Base Addrs */
-/* Enable FEC ethernet */
-#define FEC_ENET
-#define CONFIG_NET_RETRY_COUNT 5
-#define CFG_ENET_BD_BASE 0x480000
-
/*
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CFG_INIT_RAM_ADDR 0x20000000
-#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
@@ -118,7 +185,7 @@
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
#define CFG_FLASH_BASE 0xffe00000
#ifdef CONFIG_MONITOR_IS_IN_RAM
@@ -136,11 +203,11 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
/* FLASH organization */
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 1000
#define CFG_FLASH_CFI 1
@@ -153,4 +220,4 @@
/* Port configuration */
#define CFG_FECI2C 0xF0
-#endif /* _M5271EVB_H */
+#endif /* _M5271EVB_H */
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 5fd6a95..2b8734b 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -33,18 +33,20 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_MCF52x2 /* define processor family */
-#define CONFIG_M5272 /* define processor type */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5272 /* define processor type */
-#define FEC_ENET
+#define CONFIG_MCFTMR
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
-#define CONFIG_WATCHDOG
+#undef CONFIG_WATCHDOG
#define CONFIG_WATCHDOG_TIMEOUT 10000 /* timeout in milliseconds */
-#define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
+#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
@@ -60,30 +62,90 @@
#define CFG_ENV_IS_IN_FLASH 1
#endif
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADS | CFG_CMD_LOADB) | \
- CFG_CMD_MII)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
#define CONFIG_BOOTDELAY 5
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
+
+#ifdef CONFIG_MCFFEC
+# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* CONFIG_MCFFEC */
+
+#define CONFIG_HOSTNAME M5272C3
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=10000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ffe00000 ffe3ffff;" \
+ "era ffe00000 ffe3ffff;" \
+ "cp.b ${loadaddr} ffe00000 ${filesize};"\
+ "save\0" \
+ ""
#define CFG_PROMPT "-> "
-#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_LOAD_ADDR 0x20000
-
#define CFG_MEMTEST_START 0x400
#define CFG_MEMTEST_END 0x380000
-
#define CFG_HZ 1000
#define CFG_CLK 66000000
@@ -92,20 +154,15 @@
* (address mappings, register initial values, etc.)
* You should know what you are doing if you make changes here.
*/
-
#define CFG_MBAR 0x10000000 /* Register Base Addrs */
-
#define CFG_SCR 0x0003;
#define CFG_SPR 0xffff;
-#define CFG_DISCOVER_PHY
-#define CFG_ENET_BD_BASE 0x380000
-
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
#define CFG_INIT_RAM_ADDR 0x20000000
-#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in internal SRAM */
#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
@@ -116,7 +173,7 @@
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
+#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
#define CFG_FLASH_BASE 0xffe00000
#ifdef CONFIG_MONITOR_IS_IN_RAM
@@ -134,13 +191,13 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
-#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 11 /* max number of sectors on one chip */
#define CFG_FLASH_ERASE_TOUT 1000
/*-----------------------------------------------------------------------
@@ -153,25 +210,18 @@
*/
#define CFG_BR0_PRELIM 0xFFE00201
#define CFG_OR0_PRELIM 0xFFE00014
-
#define CFG_BR1_PRELIM 0
#define CFG_OR1_PRELIM 0
-
#define CFG_BR2_PRELIM 0x30000001
#define CFG_OR2_PRELIM 0xFFF80000
-
#define CFG_BR3_PRELIM 0
#define CFG_OR3_PRELIM 0
-
#define CFG_BR4_PRELIM 0
#define CFG_OR4_PRELIM 0
-
#define CFG_BR5_PRELIM 0
#define CFG_OR5_PRELIM 0
-
#define CFG_BR6_PRELIM 0
#define CFG_OR6_PRELIM 0
-
#define CFG_BR7_PRELIM 0x00000701
#define CFG_OR7_PRELIM 0xFFC0007C
@@ -181,9 +231,8 @@
#define CFG_PACNT 0x00000000
#define CFG_PADDR 0x0000
#define CFG_PADAT 0x0000
-#define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
+#define CFG_PBCNT 0x55554155 /* Ethernet/UART configuration */
#define CFG_PBDDR 0x0000
#define CFG_PBDAT 0x0000
#define CFG_PDCNT 0x00000000
-
-#endif /* _M5272C3_H */
+#endif /* _M5272C3_H */
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index cbb3e3b..3c17c1e 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -33,15 +33,17 @@
* High Level Configuration Options
* (easy to change)
*/
-#define CONFIG_MCF52x2 /* define processor family */
-#define CONFIG_M5282 /* define processor type */
+#define CONFIG_MCF52x2 /* define processor family */
+#define CONFIG_M5282 /* define processor type */
-#define FEC_ENET
+#define CONFIG_MCFTMR
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
-#define CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
+#undef CONFIG_MONITOR_IS_IN_RAM /* define if monitor is started from a pre-loader */
/* Configuration for environment
* Environment is embedded in u-boot in the second sector of the flash
@@ -50,24 +52,81 @@
#define CFG_ENV_SIZE 0x2000
#define CFG_ENV_IS_IN_FLASH 1
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL & ~(CFG_CMD_LOADS | CFG_CMD_LOADB) )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
+
#define CONFIG_BOOTDELAY 5
+#ifdef CONFIG_MCFFEC
+# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* CONFIG_MCFFEC */
+
+#define CONFIG_HOSTNAME M5272C3
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=10000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off ffe00000 ffe3ffff;" \
+ "era ffe00000 ffe3ffff;" \
+ "cp.b ${loadaddr} ffe00000 ${filesize};"\
+ "save\0" \
+ ""
#define CFG_PROMPT "-> "
-#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
#endif
-#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
-#define CFG_MAXARGS 16 /* max number of command args */
-#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
#define CFG_LOAD_ADDR 0x20000
@@ -77,6 +136,10 @@
#define CFG_HZ 1000000
#define CFG_CLK 64000000
+/* PLL Configuration: Ext Clock * 6 (see table 9-4 of MCF user manual) */
+
+#define CFG_MFD 0x02 /* PLL Multiplication Factor Devider */
+#define CFG_RFD 0x00 /* PLL Reduce Frecuency Devider */
/*
* Low Level Configuration Settings
@@ -85,15 +148,12 @@
*/
#define CFG_MBAR 0x40000000
-#undef CFG_DISCOVER_PHY
-#define CFG_ENET_BD_BASE 0x380000
-
/*-----------------------------------------------------------------------
* Definitions for initial stack pointer and data area (in DPRAM)
*/
-#define CFG_INIT_RAM_ADDR 0x20000000
-#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
-#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
+#define CFG_INIT_RAM_ADDR 0x20000000
+#define CFG_INIT_RAM_END 0x10000 /* End of used area in internal SRAM */
+#define CFG_GBL_DATA_SIZE 64 /* size in bytes reserved for initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
@@ -103,49 +163,88 @@
* Please note that CFG_SDRAM_BASE _must_ start at 0
*/
#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 4 /* SDRAM size in MB */
+#define CFG_SDRAM_SIZE 8 /* SDRAM size in MB */
#define CFG_FLASH_BASE 0xffe00000
#define CFG_INT_FLASH_BASE 0xf0000000
+#define CFG_INT_FLASH_ENABLE 0x21
/* If M5282 port is fully implemented the monitor base will be behind
* the vector table. */
-/* #define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400) */
-#define CFG_MONITOR_BASE 0x20000
+#if (TEXT_BASE != CFG_INT_FLASH_BASE)
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#else
+#define CFG_MONITOR_BASE (TEXT_BASE + 0x418) /* 24 Byte for CFM-Config */
+#endif
#define CFG_MONITOR_LEN 0x20000
#define CFG_MALLOC_LEN (256 << 10)
#define CFG_BOOTPARAMS_LEN 64*1024
-
/*
* For booting Linux, the board info and command line data
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CFG_MAX_FLASH_SECT 35
-#define CFG_MAX_FLASH_BANKS 1
-#define CFG_FLASH_ERASE_TOUT 10000000
+#define CFG_FLASH_CFI
+#ifdef CFG_FLASH_CFI
+
+# define CFG_FLASH_CFI_DRIVER 1
+# define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
+# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
+# define CFG_FLASH_CHECKSUM
+# define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+#endif
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16
-
/*-----------------------------------------------------------------------
* Memory bank definitions
*/
-
-
+#define CFG_CS0_BASE CFG_FLASH_BASE
+#define CFG_CS0_SIZE 2*1024*1024
+#define CFG_CS0_WIDTH 16
+#define CFG_CS0_RO 0
+#define CFG_CS0_WS 6
+/*
+#define CFG_CS3_BASE 0xE0000000
+#define CFG_CS3_SIZE 1*1024*1024
+#define CFG_CS3_WIDTH 16
+#define CFG_CS3_RO 0
+#define CFG_CS3_WS 6
+*/
/*-----------------------------------------------------------------------
* Port configuration
*/
+#define CFG_PACNT 0x0000000 /* Port A D[31:24] */
+#define CFG_PADDR 0x0000000
+#define CFG_PADAT 0x0000000
+#define CFG_PBCNT 0x0000000 /* Port B D[23:16] */
+#define CFG_PBDDR 0x0000000
+#define CFG_PBDAT 0x0000000
-#endif /* _CONFIG_M5282EVB_H */
+#define CFG_PCCNT 0x0000000 /* Port C D[15:08] */
+#define CFG_PCDDR 0x0000000
+#define CFG_PCDAT 0x0000000
+
+#define CFG_PDCNT 0x0000000 /* Port D D[07:00] */
+#define CFG_PCDDR 0x0000000
+#define CFG_PCDAT 0x0000000
+
+#define CFG_PEHLPAR 0xC0
+#define CFG_PUAPAR 0x0F /* UA0..UA3 = Uart 0 +1 */
+#define CFG_DDRUA 0x05
+#define CFG_PJPAR 0xFF;
+
+#endif /* _CONFIG_M5282EVB_H */
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
new file mode 100644
index 0000000..d3b1605
--- /dev/null
+++ b/include/configs/M5329EVB.h
@@ -0,0 +1,267 @@
+/*
+ * Configuation settings for the Freescale MCF5329 FireEngine board.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _M5329EVB_H
+#define _M5329EVB_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF532x /* define processor family */
+#define CONFIG_M5329 /* define processor type */
+
+#undef DEBUG
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG
+#define CONFIG_WATCHDOG_TIMEOUT 5000 /* timeout in milliseconds, max timeout is 6.71sec */
+
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+#ifdef NANDFLASH_SIZE
+# define CONFIG_CMD_NAND
+#endif
+
+#define CFG_UNIFY_CACHE
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
+
+#define CONFIG_MCFRTC
+#undef RTC_DEBUG
+
+/* Timer */
+#define CONFIG_MCFTMR
+#undef CONFIG_MCFPIT
+
+/* I2C */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C /* I2C with hw support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 80000
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_OFFSET 0x58000
+#define CFG_IMMR CFG_MBAR
+
+#define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
+#define CONFIG_UDP_CHECKSUM
+
+#ifdef CONFIG_MCFFEC
+# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+#endif /* FEC_ENET */
+
+#define CONFIG_HOSTNAME M5329EVB
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=40010000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off 0 2ffff;" \
+ "era 0 2ffff;" \
+ "cp.b ${loadaddr} 0 ${filesize};" \
+ "save\0" \
+ ""
+
+#define CONFIG_PRAM 512 /* 512 KB */
+#define CFG_PROMPT "-> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#ifdef CONFIG_CMD_KGDB
+# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR 0x40010000
+
+#define CFG_HZ 1000
+#define CFG_CLK 80000000
+#define CFG_CPU_CLK CFG_CLK * 3
+
+#define CFG_MBAR 0xFC000000
+
+#define CFG_LATCH_ADDR (CFG_CS1_BASE + 0x80000)
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x80000000
+#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
+#define CFG_INIT_RAM_CTRL 0x221
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 0x10)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x40000000
+#define CFG_SDRAM_SIZE 16 /* SDRAM size in MB */
+#define CFG_SDRAM_CFG1 0x53722730
+#define CFG_SDRAM_CFG2 0x56670000
+#define CFG_SDRAM_CTRL 0xE1092000
+#define CFG_SDRAM_EMOD 0x40010000
+#define CFG_SDRAM_MODE 0x018D0000
+
+#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400
+#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20)
+
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+
+#define CFG_BOOTPARAMS_LEN 64*1024
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_FLASH_CFI
+#ifdef CFG_FLASH_CFI
+# define CFG_FLASH_CFI_DRIVER 1
+# define CFG_FLASH_SIZE 0x800000 /* Max size that the board might have */
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_16BIT
+# define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
+# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
+#endif
+
+#ifdef NANDFLASH_SIZE
+# define CFG_MAX_NAND_DEVICE 1
+# define CFG_NAND_BASE (CFG_CS2_BASE << 16)
+# define CFG_NAND_SIZE 1
+# define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+# define NAND_MAX_CHIPS 1
+# define NAND_ALLOW_ERASE_ALL 1
+# define CONFIG_JFFS2_NAND 1
+# define CONFIG_JFFS2_DEV "nand0"
+# define CONFIG_JFFS2_PART_SIZE (CFG_CS2_MASK & ~1)
+# define CONFIG_JFFS2_PART_OFFSET 0x00000000
+#endif
+
+#define CFG_FLASH_BASE (CFG_CS0_BASE << 16)
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#define CFG_ENV_OFFSET 0x4000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_IS_EMBEDDED 1
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Chipselect bank definitions
+ */
+/*
+ * CS0 - NOR Flash 1, 2, 4, or 8MB
+ * CS1 - CompactFlash and registers
+ * CS2 - NAND Flash 16, 32, or 64MB
+ * CS3 - Available
+ * CS4 - Available
+ * CS5 - Available
+ */
+#define CFG_CS0_BASE 0
+#define CFG_CS0_MASK 0x007f0001
+#define CFG_CS0_CTRL 0x00001fa0
+
+#define CFG_CS1_BASE 0x1000
+#define CFG_CS1_MASK 0x001f0001
+#define CFG_CS1_CTRL 0x002A3780
+
+#ifdef NANDFLASH_SIZE
+#define CFG_CS2_BASE 0x2000
+#define CFG_CS2_MASK ((NANDFLASH_SIZE << 20) | 1)
+#define CFG_CS2_CTRL 0x00001f60
+#endif
+
+#endif /* _M5329EVB_H */
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
new file mode 100644
index 0000000..6f4859c
--- /dev/null
+++ b/include/configs/M54455EVB.h
@@ -0,0 +1,391 @@
+/*
+ * Configuation settings for the Freescale MCF54455 EVB board.
+ *
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef _JAMICA54455_H
+#define _JAMICA54455_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_MCF5445x /* define processor family */
+#define CONFIG_M54455 /* define processor type */
+#define CONFIG_M54455EVB /* M54455EVB board */
+
+#undef DEBUG
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
+
+#undef CONFIG_WATCHDOG
+
+#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/* Command line configuration */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+
+/* Network configuration */
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CONFIG_CF_DOMII
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC1_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define CFG_FEC1_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+# define CONFIG_HAS_ETH1
+
+# define CONFIG_BOOTDELAY 1 /* autoboot after 5 seconds */
+# define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw rootfstype=jffs2 ip=none mtdparts=physmap-flash.0:5M(kernel)ro,-(jffs2)"
+# define CONFIG_ETHADDR 00:e0:0c:bc:e5:60
+# define CONFIG_ETH1ADDR 00:e0:0c:bc:e5:61
+# define CONFIG_ETHPRIME "FEC0"
+# define CONFIG_IPADDR 192.162.1.2
+# define CONFIG_NETMASK 255.255.255.0
+# define CONFIG_SERVERIP 192.162.1.1
+# define CONFIG_GATEWAYIP 192.162.1.1
+# define CONFIG_OVERWRITE_ETHADDR_ONCE
+
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
+
+#define CONFIG_HOSTNAME M54455EVB
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "inpclk=" MK_STR(CFG_INPUT_CLKSRC) "\0" \
+ "loadaddr=40010000\0" \
+ "u-boot=u-boot.bin\0" \
+ "load=tftp ${loadaddr) ${u-boot}\0" \
+ "upd=run load; run prog\0" \
+ "prog=prot off 0 2ffff;" \
+ "era 0 2ffff;" \
+ "cp.b ${loadaddr} 0 ${filesize};" \
+ "save\0" \
+ ""
+
+/* ATA configuration */
+#define CONFIG_ISO_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_IDE_RESET 1
+#define CONFIG_IDE_PREINIT 1
+#define CONFIG_ATAPI
+#undef CONFIG_LBA48
+
+#define CFG_IDE_MAXBUS 1
+#define CFG_IDE_MAXDEVICE 2
+
+#define CFG_ATA_BASE_ADDR 0x90000000
+#define CFG_ATA_IDE0_OFFSET 0
+
+#define CFG_ATA_DATA_OFFSET 0xA0 /* Offset for data I/O */
+#define CFG_ATA_REG_OFFSET 0xA0 /* Offset for normal register accesses */
+#define CFG_ATA_ALT_OFFSET 0xC0 /* Offset for alternate registers */
+#define CFG_ATA_STRIDE 4 /* Interval between registers */
+#define _IO_BASE 0
+
+/* Realtime clock */
+#define CONFIG_MCFRTC
+#undef RTC_DEBUG
+#define CFG_RTC_OSCILLATOR (32 * CFG_HZ)
+
+/* Timer */
+#define CONFIG_MCFTMR
+#undef CONFIG_MCFPIT
+
+/* I2c */
+#define CONFIG_FSL_I2C
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 80000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_OFFSET 0x58000
+#define CFG_IMMR CFG_MBAR
+
+/* PCI */
+#define CONFIG_PCI 1
+
+#define CFG_PCI_MEM_BUS 0xA0000000
+#define CFG_PCI_MEM_PHYS CFG_PCI_MEM_BUS
+#define CFG_PCI_MEM_SIZE 0x10000000
+
+#define CFG_PCI_IO_BUS 0xB1000000
+#define CFG_PCI_IO_PHYS CFG_PCI_IO_BUS
+#define CFG_PCI_IO_SIZE 0x01000000
+
+#define CFG_PCI_CFG_BUS 0xB0000000
+#define CFG_PCI_CFG_PHYS CFG_PCI_CFG_BUS
+#define CFG_PCI_CFG_SIZE 0x01000000
+
+/* FPGA - Spartan 2 */
+/* experiment
+#define CONFIG_FPGA CFG_SPARTAN3
+#define CONFIG_FPGA_COUNT 1
+#define CFG_FPGA_PROG_FEEDBACK
+#define CFG_FPGA_CHECK_CTRLC
+*/
+
+/* Input, PCI, Flexbus, and VCO */
+#define CONFIG_EXTRA_CLOCK
+
+#define CONFIG_PRAM 512 /* 512 KB */
+
+#define CFG_PROMPT "-> "
+#define CFG_LONGHELP /* undef to save memory */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_LOAD_ADDR (CFG_SDRAM_BASE + 0x10000)
+
+#define CFG_HZ 1000
+
+#define CFG_MBAR 0xFC000000
+
+/*
+ * Low Level Configuration Settings
+ * (address mappings, register initial values, etc.)
+ * You should know what you are doing if you make changes here.
+ */
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in DPRAM)
+ */
+#define CFG_INIT_RAM_ADDR 0x80000000
+#define CFG_INIT_RAM_END 0x8000 /* End of used area in internal SRAM */
+#define CFG_INIT_RAM_CTRL 0x221
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) - 16)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x40000000
+#define CFG_SDRAM_BASE1 0x48000000
+#define CFG_SDRAM_SIZE 256 /* SDRAM size in MB */
+#define CFG_SDRAM_CFG1 0x65311610
+#define CFG_SDRAM_CFG2 0x59670000
+#define CFG_SDRAM_CTRL 0xEA0B2000
+#define CFG_SDRAM_EMOD 0x40010000
+#define CFG_SDRAM_MODE 0x00010033
+
+#define CFG_MEMTEST_START CFG_SDRAM_BASE + 0x400
+#define CFG_MEMTEST_END ((CFG_SDRAM_SIZE - 3) << 20)
+
+#define CFG_MONITOR_BASE (CFG_FLASH_BASE + 0x400)
+#define CFG_BOOTPARAMS_LEN 64*1024
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
+#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization ??
+ */
+/* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
+
+/* Configuration for environment
+ * Environment is embedded in u-boot in the second sector of the flash
+ */
+#define CFG_ENV_OFFSET 0x4000
+#define CFG_ENV_SECT_SIZE 0x2000
+#define CFG_ENV_IS_IN_FLASH 1
+#define CONFIG_ENV_OVERWRITE 1
+#undef CFG_ENV_IS_EMBEDDED
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#ifdef CFG_ATMEL_BOOT
+# define CFG_FLASH_BASE 0
+# define CFG_FLASH0_BASE CFG_CS0_BASE
+# define CFG_FLASH1_BASE CFG_CS1_BASE
+#else
+# define CFG_FLASH_BASE CFG_FLASH0_BASE
+# define CFG_FLASH0_BASE CFG_CS1_BASE
+# define CFG_FLASH1_BASE CFG_CS0_BASE
+#endif
+
+/* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
+/* M54455EVB has one non CFI flash, defined CFG_FLASH_CFI will cause the system
+ keep reset. */
+#undef CFG_FLASH_CFI
+#ifdef CFG_FLASH_CFI
+
+# define CFG_FLASH_CFI_DRIVER 1
+# define CFG_FLASH_SIZE 0x1000000 /* Max size that the board might have */
+# define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
+# define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+# define CFG_MAX_FLASH_SECT 137 /* max number of sectors on one chip */
+# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
+# define CFG_FLASH_CHECKSUM
+# define CFG_FLASH_BANKS_LIST { CFG_CS0_BASE, CFG_CS1_BASE }
+
+#else
+
+# define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+
+# define CFG_ATMEL_REGION 4
+# define CFG_ATMEL_TOTALSECT 11
+# define CFG_ATMEL_SECT {1, 2, 1, 7}
+# define CFG_ATMEL_SECTSZ {0x4000, 0x2000, 0x8000, 0x10000}
+# define CFG_INTEL_SECT 137
+
+/* max number of sectors on one chip */
+# define CFG_MAX_FLASH_SECT (CFG_ATMEL_TOTALSECT + CFG_INTEL_SECT)
+# define CFG_FLASH_ERASE_TOUT 2000 /* Atmel needs longer timeout */
+# define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
+# define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
+# define CFG_FLASH_UNLOCK_TOUT 100 /* Timeout for Flash Clear Lock Bits (in ms) */
+# define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
+# define CFG_FLASH_CHECKSUM
+
+#endif
+
+/*
+ * This is setting for JFFS2 support in u-boot.
+ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
+ */
+#ifdef CFG_ATMEL_BOOT
+# define CONFIG_JFFS2_DEV "nor0"
+# define CONFIG_JFFS2_PART_SIZE 0x01000000
+# define CONFIG_JFFS2_PART_OFFSET CFG_FLASH1_BASE
+#else
+# define CONFIG_JFFS2_DEV "nor0"
+# define CONFIG_JFFS2_PART_SIZE (0x01000000 - 0x500000)
+# define CONFIG_JFFS2_PART_OFFSET (CFG_FLASH0_BASE + 0x500000)
+#endif
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 16
+
+/*-----------------------------------------------------------------------
+ * Memory bank definitions
+ */
+/*
+ * CS0 - NOR Flash 1, 2, 4, or 8MB
+ * CS1 - CompactFlash and registers
+ * CS2 - CPLD
+ * CS3 - FPGA
+ * CS4 - Available
+ * CS5 - Available
+ */
+
+#ifdef CFG_ATMEL_BOOT
+ /* Atmel Flash */
+#define CFG_CS0_BASE 0
+#define CFG_CS0_MASK 0x00070001
+#define CFG_CS0_CTRL 0x00001140
+/* Intel Flash */
+#define CFG_CS1_BASE 0x04000000
+#define CFG_CS1_MASK 0x01FF0001
+#define CFG_CS1_CTRL 0x003F3D60
+
+#define CFG_ATMEL_BASE CFG_CS0_BASE
+#else
+/* Intel Flash */
+#define CFG_CS0_BASE 0
+#define CFG_CS0_MASK 0x01FF0001
+#define CFG_CS0_CTRL 0x003F3D60
+ /* Atmel Flash */
+#define CFG_CS1_BASE 0x04000000
+#define CFG_CS1_MASK 0x00070001
+#define CFG_CS1_CTRL 0x00001140
+
+#define CFG_ATMEL_BASE CFG_CS1_BASE
+#endif
+
+/* CPLD */
+#define CFG_CS2_BASE 0x08000000
+#define CFG_CS2_MASK 0x00070001
+#define CFG_CS2_CTRL 0x003f1140
+
+/* FPGA */
+#define CFG_CS3_BASE 0x09000000
+#define CFG_CS3_MASK 0x00070001
+#define CFG_CS3_CTRL 0x00000020
+
+#endif /* _JAMICA54455_H */
diff --git a/include/configs/MBX.h b/include/configs/MBX.h
index d6e3fb8..d9f2add 100644
--- a/include/configs/MBX.h
+++ b/include/configs/MBX.h
@@ -71,14 +71,28 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_COMMANDS ( CFG_CMD_NET | CONFIG_CMD_DFL | CFG_CMD_SDRAM | \
- CFG_CMD_PCMCIA | CFG_CMD_IDE )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DFL
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_IDE
+
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -88,7 +102,7 @@
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -187,7 +201,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/MBX860T.h b/include/configs/MBX860T.h
index 0ca0970..69d195d 100644
--- a/include/configs/MBX860T.h
+++ b/include/configs/MBX860T.h
@@ -151,7 +151,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/METROBOX.h b/include/configs/METROBOX.h
index 465a4ec..8d7ec59 100644
--- a/include/configs/METROBOX.h
+++ b/include/configs/METROBOX.h
@@ -104,6 +104,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_METROBOX 1 /* Board is Metrobox */
#define CONFIG_440GX 1 /* Specifc GX support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_F 1 /* Call board misc_init_f */
@@ -241,26 +242,33 @@
#define CFG_RX_ETH_BUFFER 32 /* #eth rx buff & descrs */
-/*-----------------------------------------------------------------------
- * Console/Commands/Parser
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_I2C | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_PING | \
- CFG_CMD_DIAG | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_ELF | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* tbs 09-March-2005 Removed to be able to use 2nd serial */
-/* CFG_CMD_KGDB | \ */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
/* Include NetConsole support */
@@ -271,10 +279,6 @@
#define CONFIG_AUTO_COMPLETE 1
#define CFG_ALT_MEMTEST 1 /* use real memory test */
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "MetroBox=> " /* Monitor Command Prompt */
@@ -285,7 +289,7 @@
/*-----------------------------------------------------------------------
* Console Buffer
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -331,7 +335,6 @@
#define CFG_PCI_TARGBASE (CFG_PCI_MEMBASE)
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init*/
#define CFG_PCI_TARGET_INIT /* let board init pci target*/
#define CFG_PCI_SUBSYS_VENDORID 0x17BA /* Sandburst */
@@ -348,7 +351,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above */
#endif
@@ -360,7 +363,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal PowerOn: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port baud */
#define CONFIG_KGDB_SER_INDEX 2 /* kgdb serial port */
#endif
diff --git a/include/configs/MHPC.h b/include/configs/MHPC.h
index 53684ca..dde7742 100644
--- a/include/configs/MHPC.h
+++ b/include/configs/MHPC.h
@@ -115,25 +115,36 @@
#define CONFIG_BR0_WORKAROUND 1
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_REGINFO )
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_REGINFO
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -225,7 +236,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h
index 7e57a0f..5b526a0 100644
--- a/include/configs/MIP405.h
+++ b/include/configs/MIP405.h
@@ -50,41 +50,43 @@
***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
-/***********************************************************
- * Command definitions
- ***********************************************************/
-#define MIP405_COMMON_CMDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_IRQ | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SAVES | \
- CFG_CMD_BSP )
-#if defined(CONFIG_MIP405T)
-#define CONFIG_COMMANDS \
- MIP405_COMMON_CMDS
-#else
-#define CONFIG_COMMANDS \
- (MIP405_COMMON_CMDS | \
- CFG_CMD_USB | \
- CFG_CMD_DOC )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_BSP
+
+#if !defined(CONFIG_MIP405T)
+ #define CONFIG_CMD_USB
+ #define CONFIG_CMD_DOC
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CFG_NAND_LEGACY
@@ -165,7 +167,7 @@
**********************************************************/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -260,7 +262,7 @@
*/
#define CFG_DCACHE_SIZE 0x4000 /* For AMCC 405GPr CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -426,7 +428,7 @@
/************************************************************
* Debug support
************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ML2.h b/include/configs/ML2.h
index d8805ea..f488275 100644
--- a/include/configs/ML2.h
+++ b/include/configs/ML2.h
@@ -76,20 +76,31 @@
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & \
- ~( CFG_CMD_NET | \
- CFG_CMD_RTC | \
- CFG_CMD_PCI | \
- CFG_CMD_I2C \
- ) ) | \
- CFG_CMD_IRQ | \
- CFG_CMD_KGDB | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_ELF | \
- CFG_CMD_JFFS2 )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_KGDB
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_JFFS2
+
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_RTC
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_I2C
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -102,7 +113,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -195,7 +206,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -236,7 +247,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h
index 6ad2feb..9370c24 100644
--- a/include/configs/MOUSSE.h
+++ b/include/configs/MOUSSE.h
@@ -58,14 +58,31 @@
#endif
#define CONFIG_BOOTARGS "console=ttyS0 root=/dev/nfs rw nfsroot=209.128.93.133:/boot nfsaddrs=209.128.93.133:209.128.93.138"
#define CONFIG_BOOTDELAY 3
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL|CFG_CMD_ASKENV|CFG_CMD_DATE)
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+
+
#define CONFIG_ENV_OVERWRITE 1
#define CONFIG_ETH_ADDR "00:10:18:10:00:06"
#define CONFIG_DOS_PARTITION 1 /* MSDOS bootable partitiion support */
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
- */
-#include <cmd_confdefs.h>
+
#include "../board/mousse/mousse.h"
/*
diff --git a/include/configs/MPC8260ADS.h b/include/configs/MPC8260ADS.h
index 6195bca..713518d 100644
--- a/include/configs/MPC8260ADS.h
+++ b/include/configs/MPC8260ADS.h
@@ -101,8 +101,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -198,59 +197,69 @@
#define CONFIG_BAUDRATE 115200
-#define CFG_EXCLUDE CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_IDE | \
- CFG_CMD_KGDB | \
- CFG_CMD_MMC | \
- CFG_CMD_NAND | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_REISER | \
- CFG_CMD_SCSI | \
- CFG_CMD_SPI | \
- CFG_CMD_SNTP | \
- CFG_CMD_UNIVERSE | \
- CFG_CMD_USB | \
- CFG_CMD_VFD | \
- CFG_CMD_XIMG
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
+
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_BSP
+#undef CONFIG_CMD_DATE
+#undef CONFIG_CMD_DISPLAY
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FAT
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MFSL
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_SNTP
+#undef CONFIG_CMD_UNIVERSE
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_XIMG
#if CONFIG_ADSTYPE == CFG_8272ADS
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CFG_CMD_SDRAM | \
- CFG_CMD_I2C | \
- CFG_EXCLUDE ) )
+ #undef CONFIG_CMD_SDRAM
+ #undef CONFIG_CMD_I2C
+
#elif CONFIG_ADSTYPE >= CFG_PQ2FADS
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CFG_CMD_SDRAM | \
- CFG_CMD_I2C | \
- CFG_CMD_PCI | \
- CFG_EXCLUDE ) )
+ #undef CONFIG_CMD_SDRAM
+ #undef CONFIG_CMD_I2C
+ #undef CONFIG_CMD_PCI
+
#else
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CMD_CFG_PCI | \
- CFG_EXCLUDE ) )
+ #undef CONFIG_CMD_PCI
+
#endif /* CONFIG_ADSTYPE >= CFG_PQ2FADS */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm fff80000" /* autoboot command */
#define CONFIG_BOOTARGS "root=/dev/mtdblock2"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -268,7 +277,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -384,7 +393,7 @@
#endif /* CFG_RAMBOOT */
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -397,9 +406,9 @@
#define CFG_BCR 0x100C0000
#define CFG_SIUMCR 0x0A200000
#define CFG_SCCR SCCR_DFBRG01
-#define CFG_BR0_PRELIM CFG_FLASH_BASE | 0x00001801
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | 0x00001801)
#define CFG_OR0_PRELIM 0xFF800876
-#define CFG_BR1_PRELIM CFG_BCSR | 0x00001801
+#define CFG_BR1_PRELIM (CFG_BCSR | 0x00001801)
#define CFG_OR1_PRELIM 0xFFFF8010
/*We need to configure chip select to use CPLD PCI IC on MPC8272ADS*/
diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h
index 4953b70..14b041e 100644
--- a/include/configs/MPC8266ADS.h
+++ b/include/configs/MPC8266ADS.h
@@ -83,8 +83,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -141,40 +140,43 @@
*/
#define SPD_EEPROM_ADDRESS 0x50
-
#define CONFIG_8260_CLKIN 66000000 /* in Hz */
#define CONFIG_BAUDRATE 115200
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
-#define CONFIG_COMMANDS ( CFG_CMD_ALL & ~( \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_IDE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGDB | \
- CFG_CMD_MMC | \
- CFG_CMD_NAND | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_REISER | \
- CFG_CMD_SCSI | \
- CFG_CMD_SPI | \
- CFG_CMD_SNTP | \
- CFG_CMD_VFD | \
- CFG_CMD_UNIVERSE | \
- CFG_CMD_USB | \
- CFG_CMD_XIMG ) )
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_BSP
+#undef CONFIG_CMD_DATE
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DISPLAY
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MFSL
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_SNTP
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_UNIVERSE
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_XIMG
/* Define a command string that is automatically executed when no character
* is read on the console interface withing "Boot Delay" after reset.
@@ -202,21 +204,19 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_NFS */
-/* Add support for a few extra bootp options like:
- * - File size
- * - DNS
+/*
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE | \
- CONFIG_BOOTP_DNS)
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -231,7 +231,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -283,7 +283,6 @@
#define SDRAM_SPD_ADDR 0x50
-
/*-----------------------------------------------------------------------
* BR2,BR3 - Base Register
* Ref: Section 10.3.1 on page 10-14
@@ -381,7 +380,6 @@
#error "INVALID SDRAM CONFIGURATION"
#endif
-
#define RS232EN_1 0x02000002
#define RS232EN_2 0x01000001
#define FETHIEN 0x08000008
@@ -393,7 +391,6 @@
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-
/* Use this HRCW for booting from address 0xfe00000 (JP3 in setting 1-2) */
/* 0x0EB2B645 */
#define CFG_HRCW_MASTER (( HRCW_BPS11 | HRCW_CIP ) |\
@@ -450,13 +447,11 @@
# define CFG_ENV_SIZE 0x200
#endif /* CFG_RAMBOOT */
-
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
-
/*-----------------------------------------------------------------------
* HIDx - Hardware Implementation-dependent Registers 2-11
*-----------------------------------------------------------------------
diff --git a/include/configs/MPC8313ERDB.h b/include/configs/MPC8313ERDB.h
new file mode 100644
index 0000000..6568fe1
--- /dev/null
+++ b/include/configs/MPC8313ERDB.h
@@ -0,0 +1,569 @@
+/*
+ * Copyright (C) Freescale Semiconductor, Inc. 2006.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * mpc8313epb board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1
+#define CONFIG_MPC83XX 1
+#define CONFIG_MPC831X 1
+#define CONFIG_MPC8313 1
+#define CONFIG_MPC8313ERDB 1
+
+#define CONFIG_PCI
+#define CONFIG_83XX_GENERIC_PCI
+
+#ifdef CFG_66MHZ
+#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
+#elif defined(CFG_33MHZ)
+#define CONFIG_83XX_CLKIN 33333333 /* in Hz */
+#else
+#error Unknown oscillator frequency.
+#endif
+
+#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
+
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+
+#define CFG_IMMR 0xE0000000
+
+#define CFG_MEMTEST_START 0x00001000
+#define CFG_MEMTEST_END 0x07f00000
+
+/* Early revs of this board will lock up hard when attempting
+ * to access the PMC registers, unless a JTAG debugger is
+ * connected, or some resistor modifications are made.
+ */
+#define CFG_8313ERDB_BROKEN_PMC 1
+
+#define CFG_ACR_PIPE_DEP 3 /* Arbiter pipeline depth (0-3) */
+#define CFG_ACR_RPTCNT 3 /* Arbiter repeat count (0-7) */
+
+/*
+ * DDR Setup
+ */
+#define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/
+#define CFG_SDRAM_BASE CFG_DDR_BASE
+#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
+
+/*
+ * Manually set up DDR parameters, as this board does not
+ * seem to have the SPD connected to I2C.
+ */
+#define CFG_DDR_SIZE 128 /* MB */
+#define CFG_DDR_CONFIG ( CSCONFIG_EN | CSCONFIG_AP \
+ | 0x00040000 /* TODO */ \
+ | CSCONFIG_ROW_BIT_13 | CSCONFIG_COL_BIT_10 )
+ /* 0x80840102 */
+
+#define CFG_DDR_TIMING_3 0x00000000
+#define CFG_DDR_TIMING_0 ( ( 0 << TIMING_CFG0_RWT_SHIFT ) \
+ | ( 0 << TIMING_CFG0_WRT_SHIFT ) \
+ | ( 0 << TIMING_CFG0_RRT_SHIFT ) \
+ | ( 0 << TIMING_CFG0_WWT_SHIFT ) \
+ | ( 2 << TIMING_CFG0_ACT_PD_EXIT_SHIFT ) \
+ | ( 2 << TIMING_CFG0_PRE_PD_EXIT_SHIFT ) \
+ | ( 8 << TIMING_CFG0_ODT_PD_EXIT_SHIFT ) \
+ | ( 2 << TIMING_CFG0_MRS_CYC_SHIFT ) )
+ /* 0x00220802 */
+#define CFG_DDR_TIMING_1 ( ( 3 << TIMING_CFG1_PRETOACT_SHIFT ) \
+ | ( 9 << TIMING_CFG1_ACTTOPRE_SHIFT ) \
+ | ( 3 << TIMING_CFG1_ACTTORW_SHIFT ) \
+ | ( 5 << TIMING_CFG1_CASLAT_SHIFT ) \
+ | (13 << TIMING_CFG1_REFREC_SHIFT ) \
+ | ( 3 << TIMING_CFG1_WRREC_SHIFT ) \
+ | ( 2 << TIMING_CFG1_ACTTOACT_SHIFT ) \
+ | ( 2 << TIMING_CFG1_WRTORD_SHIFT ) )
+ /* 0x3935d322 */
+#define CFG_DDR_TIMING_2 ( ( 0 << TIMING_CFG2_ADD_LAT_SHIFT ) \
+ | (31 << TIMING_CFG2_CPO_SHIFT ) \
+ | ( 2 << TIMING_CFG2_WR_LAT_DELAY_SHIFT ) \
+ | ( 2 << TIMING_CFG2_RD_TO_PRE_SHIFT ) \
+ | ( 2 << TIMING_CFG2_WR_DATA_DELAY_SHIFT ) \
+ | ( 3 << TIMING_CFG2_CKE_PLS_SHIFT ) \
+ | (10 << TIMING_CFG2_FOUR_ACT_SHIFT) )
+ /* 0x0f9048ca */ /* P9-45,may need tuning */
+#define CFG_DDR_INTERVAL ( ( 800 << SDRAM_INTERVAL_REFINT_SHIFT ) \
+ | ( 100 << SDRAM_INTERVAL_BSTOPRE_SHIFT ) )
+ /* 0x03200064 */
+#if defined(CONFIG_DDR_2T_TIMING)
+#define CFG_SDRAM_CFG ( SDRAM_CFG_SREN \
+ | SDRAM_CFG_SDRAM_TYPE_DDR2 \
+ | SDRAM_CFG_2T_EN \
+ | SDRAM_CFG_DBW_32 )
+#else
+#define CFG_SDRAM_CFG ( SDRAM_CFG_SREN \
+ | SDRAM_CFG_SDRAM_TYPE_DDR2 \
+ | SDRAM_CFG_32_BE )
+ /* 0x43080000 */
+#endif
+#define CFG_SDRAM_CFG2 0x00401000;
+/* set burst length to 8 for 32-bit data path */
+#define CFG_DDR_MODE ( ( 0x4440 << SDRAM_MODE_ESD_SHIFT ) \
+ | ( 0x0232 << SDRAM_MODE_SD_SHIFT ) )
+ /* 0x44400232 */
+#define CFG_DDR_MODE_2 0x8000C000;
+
+#define CFG_DDR_CLK_CNTL DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05
+ /*0x02000000*/
+#define CFG_DDRCDR_VALUE ( DDRCDR_EN \
+ | DDRCDR_PZ_NOMZ \
+ | DDRCDR_NZ_NOMZ \
+ | DDRCDR_M_ODR )
+
+/*
+ * FLASH on the Local Bus
+ */
+#define CFG_FLASH_CFI /* use the Common Flash Interface */
+#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CFG_FLASH_BASE 0xFE000000 /* start of FLASH */
+#define CFG_FLASH_SIZE 8 /* flash size in MB */
+#define CFG_FLASH_EMPTY_INFO /* display empty sectors */
+#define CFG_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */
+
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* flash Base address */ \
+ (2 << BR_PS_SHIFT) | /* 16 bit port size */ \
+ BR_V) /* valid */
+#define CFG_OR0_PRELIM ( 0xFF000000 /* 16 MByte */ \
+ | OR_GPCM_XACS \
+ | OR_GPCM_SCY_9 \
+ | OR_GPCM_EHTR \
+ | OR_GPCM_EAD )
+ /* 0xFF006FF7 TODO SLOW 16 MB flash size */
+#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* window base at flash base */
+#define CFG_LBLAWAR0_PRELIM 0x80000017 /* 16 MB window size */
+
+#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
+#define CFG_MAX_FLASH_SECT 135 /* sectors per device */
+
+#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
+
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#define CFG_RAMBOOT
+#endif
+
+#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_ADDR 0xFD000000 /* Initial RAM address */
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in RAM*/
+
+#define CFG_GBL_DATA_SIZE 0x100 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
+
+/*
+ * Local Bus LCRR and LBCR regs
+ */
+#define CFG_LCRR LCRR_EADC_1 | LCRR_CLKDIV_2 /* 0x00010002 */
+#define CFG_LBC_LBCR ( 0x00040000 /* TODO */ \
+ | (0xFF << LBCR_BMT_SHIFT) \
+ | 0xF ) /* 0x0004ff0f */
+
+#define CFG_LBC_MRTPR 0x20000000 /*TODO */ /* LB refresh timer prescal, 266MHz/32 */
+
+/* drivers/nand/nand.c */
+#define CFG_NAND_BASE 0xE2800000 /* 0xF0000000 */
+#define CFG_MAX_NAND_DEVICE 1
+#define NAND_MAX_CHIPS 1
+#define CONFIG_MTD_NAND_VERIFY_WRITE
+
+#define CFG_BR1_PRELIM ( CFG_NAND_BASE \
+ | (2<<BR_DECC_SHIFT) /* Use HW ECC */ \
+ | BR_PS_8 /* Port Size = 8 bit */ \
+ | BR_MS_FCM /* MSEL = FCM */ \
+ | BR_V ) /* valid */
+#define CFG_OR1_PRELIM ( 0xFFFF8000 /* length 32K */ \
+ | OR_FCM_CSCT \
+ | OR_FCM_CST \
+ | OR_FCM_CHT \
+ | OR_FCM_SCY_1 \
+ | OR_FCM_TRLX \
+ | OR_FCM_EHTR )
+ /* 0xFFFF8396 */
+#define CFG_LBLAWBAR1_PRELIM CFG_NAND_BASE
+#define CFG_LBLAWAR1_PRELIM 0x8000000E /* 32KB */
+
+#define CFG_VSC7385_BASE 0xF0000000
+
+#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
+#define CFG_BR2_PRELIM 0xf0000801 /* VSC7385 Base address */
+#define CFG_OR2_PRELIM 0xfffe09ff /* VSC7385, 128K bytes*/
+#define CFG_LBLAWBAR2_PRELIM CFG_VSC7385_BASE/* Access window base at VSC7385 base */
+#define CFG_LBLAWAR2_PRELIM 0x80000010 /* Access window size 128K */
+
+/* local bus read write buffer mapping */
+#define CFG_BR3_PRELIM 0xFA000801 /* map at 0xFA000000 */
+#define CFG_OR3_PRELIM 0xFFFF8FF7 /* 32kB */
+#define CFG_LBLAWBAR3_PRELIM 0xFA000000
+#define CFG_LBLAWAR3_PRELIM 0x8000000E /* 32KB */
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,8313@0"
+#define OF_SOC "soc8313@e0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc8313@e0000000/serial@4500"
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_CLK get_bus_freq(0)
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+
+#define CFG_NS16550_COM1 (CFG_IMMR+0x4500)
+#define CFG_NS16550_COM2 (CFG_IMMR+0x4600)
+
+/* Use the HUSH parser */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+/* I2C */
+#define CONFIG_HARD_I2C /* I2C with hardware support*/
+#define CONFIG_FSL_I2C
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET 0x3000
+#define CFG_I2C2_OFFSET 0x3100
+
+/* TSEC */
+#define CFG_TSEC1_OFFSET 0x24000
+#define CFG_TSEC1 (CFG_IMMR+CFG_TSEC1_OFFSET)
+#define CFG_TSEC2_OFFSET 0x25000
+#define CFG_TSEC2 (CFG_IMMR+CFG_TSEC2_OFFSET)
+#define CONFIG_NET_MULTI
+
+/*
+ * General PCI
+ * Addresses are mapped 1-1.
+ */
+#define CFG_PCI1_MEM_BASE 0x80000000
+#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
+#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MMIO_BASE 0x90000000
+#define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE
+#define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_IO_BASE 0x00000000
+#define CFG_PCI1_IO_PHYS 0xE2000000
+#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */
+
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
+
+/*
+ * TSEC configuration
+ */
+#define CONFIG_TSEC_ENET /* TSEC ethernet support */
+
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI 1
+#endif
+
+#define CONFIG_GMII 1 /* MII PHY management */
+#define CONFIG_TSEC1 1
+
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
+#define TSEC1_PHY_ADDR 0x1c
+#define TSEC2_PHY_ADDR 4
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+#define TSEC1_PHYIDX 0
+#define TSEC2_PHYIDX 0
+
+/* Options are: TSEC[0-1] */
+#define CONFIG_ETHPRIME "TSEC1"
+
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_DS1337
+#define CFG_I2C_RTC_ADDR 0x68
+
+/*
+ * Environment
+ */
+#ifndef CFG_RAMBOOT
+ #define CFG_ENV_IS_IN_FLASH 1
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
+ #define CFG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */
+ #define CFG_ENV_SIZE 0x2000
+
+/* Address and size of Redundant Environment Sector */
+#else
+ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
+ #define CFG_ENV_SIZE 0x2000
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_PCI
+
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
+#define CONFIG_CMDLINE_EDITING 1
+
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LOAD_ADDR 0x2000000 /* default load address */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+
+/* Cache Configuration */
+#define CFG_DCACHE_SIZE 16384
+#define CFG_CACHELINE_SIZE 32
+#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
+
+#define CFG_RCWH_PCIHOST 0x80000000 /* PCIHOST */
+
+#ifdef CFG_66MHZ
+
+/* 66MHz IN, 133MHz CSB, 266 DDR, 266 CORE */
+/* 0x62040000 */
+#define CFG_HRCW_LOW (\
+ 0x20000000 /* reserved, must be set */ |\
+ HRCWL_DDRCM |\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_2X1 |\
+ HRCWL_CSB_TO_CLKIN_2X1 |\
+ HRCWL_CORE_TO_CSB_2X1)
+
+#elif defined(CFG_33MHZ)
+
+/* 33MHz IN, 165MHz CSB, 330 DDR, 330 CORE */
+/* 0x65040000 */
+#define CFG_HRCW_LOW (\
+ 0x20000000 /* reserved, must be set */ |\
+ HRCWL_DDRCM |\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_2X1 |\
+ HRCWL_CSB_TO_CLKIN_5X1 |\
+ HRCWL_CORE_TO_CSB_2X1)
+
+#endif
+
+/* 0xa0606c00 */
+#define CFG_HRCW_HIGH (\
+ HRCWH_PCI_HOST |\
+ HRCWH_PCI1_ARBITER_ENABLE |\
+ HRCWH_CORE_ENABLE |\
+ HRCWH_FROM_0X00000100 |\
+ HRCWH_BOOTSEQ_DISABLE |\
+ HRCWH_SW_WATCHDOG_DISABLE |\
+ HRCWH_ROM_LOC_LOCAL_16BIT |\
+ HRCWH_RL_EXT_LEGACY |\
+ HRCWH_TSEC1M_IN_RGMII |\
+ HRCWH_TSEC2M_IN_RGMII |\
+ HRCWH_BIG_ENDIAN |\
+ HRCWH_LALE_NORMAL)
+
+/* System IO Config */
+#define CFG_SICRH (SICRH_TSOBI1 | SICRH_TSOBI2) /* RGMII */
+#define CFG_SICRL SICRL_USBDR /* Enable Internal USB Phy */
+
+#define CFG_HID0_INIT 0x000000000
+#define CFG_HID0_FINAL (HID0_ENABLE_MACHINE_CHECK | \
+ HID0_ENABLE_DYNAMIC_POWER_MANAGMENT)
+
+#define CFG_HID2 HID2_HBE
+
+/* DDR @ 0x00000000 */
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* PCI @ 0x80000000 */
+#define CFG_IBAT1L (CFG_PCI1_MEM_BASE | BATL_PP_10)
+#define CFG_IBAT1U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT2L (CFG_PCI1_MMIO_BASE | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT2U (CFG_PCI1_MMIO_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* PCI2 not supported on 8313 */
+#define CFG_IBAT3L (0)
+#define CFG_IBAT3U (0)
+#define CFG_IBAT4L (0)
+#define CFG_IBAT4U (0)
+
+/* IMMRBAR @ 0xE0000000, PCI IO @ 0xE2000000 & BCSR @ 0xE2400000 */
+#define CFG_IBAT5L (CFG_IMMR | BATL_PP_10 | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT5U (CFG_IMMR | BATU_BL_256M | BATU_VS | BATU_VP)
+
+/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */
+#define CFG_IBAT6L (0xF0000000 | BATL_PP_10)
+#define CFG_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP)
+
+#define CFG_IBAT7L (0)
+#define CFG_IBAT7U (0)
+
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+#define CFG_DBAT1L CFG_IBAT1L
+#define CFG_DBAT1U CFG_IBAT1U
+#define CFG_DBAT2L CFG_IBAT2L
+#define CFG_DBAT2U CFG_IBAT2U
+#define CFG_DBAT3L CFG_IBAT3L
+#define CFG_DBAT3U CFG_IBAT3U
+#define CFG_DBAT4L CFG_IBAT4L
+#define CFG_DBAT4U CFG_IBAT4U
+#define CFG_DBAT5L CFG_IBAT5L
+#define CFG_DBAT5U CFG_IBAT5U
+#define CFG_DBAT6L CFG_IBAT6L
+#define CFG_DBAT6U CFG_IBAT6U
+#define CFG_DBAT7L CFG_IBAT7L
+#define CFG_DBAT7U CFG_IBAT7U
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_ETHADDR 00:E0:0C:00:95:01
+#define CONFIG_HAS_ETH1
+#define CONFIG_HAS_ETH0
+#define CONFIG_ETH1ADDR 00:E0:0C:00:95:02
+
+#define CONFIG_IPADDR 10.0.0.2
+#define CONFIG_SERVERIP 10.0.0.1
+#define CONFIG_GATEWAYIP 10.0.0.1
+#define CONFIG_NETMASK 255.0.0.0
+#define CONFIG_NETDEV eth1
+
+#define CONFIG_HOSTNAME mpc8313erdb
+#define CONFIG_ROOTPATH /nfs/root/path
+#define CONFIG_BOOTFILE uImage
+#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
+#define CONFIG_FDTFILE mpc8313erdb.dtb
+
+#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
+#define CONFIG_BAUDRATE 115200
+
+#define XMK_STR(x) #x
+#define MK_STR(x) XMK_STR(x)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \
+ "ethprime=TSEC1\0" \
+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot; " \
+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
+ "console=ttyS0\0" \
+ "setbootargs=setenv bootargs " \
+ "root=$rootdev rw console=$console,$baudrate $othbootargs\0" \
+ "setipargs=setenv bootargs nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "root=$rootdev rw console=$console,$baudrate $othbootargs\0"
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv rootdev /dev/nfs;" \
+ "run setbootargs;" \
+ "run setipargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv rootdev /dev/ram;" \
+ "run setbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#undef MK_STR
+#undef XMK_STR
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8323ERDB.h b/include/configs/MPC8323ERDB.h
new file mode 100644
index 0000000..376973b
--- /dev/null
+++ b/include/configs/MPC8323ERDB.h
@@ -0,0 +1,583 @@
+/*
+ * Copyright (C) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#undef DEBUG
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1 /* E300 family */
+#define CONFIG_QE 1 /* Has QE */
+#define CONFIG_MPC83XX 1 /* MPC83xx family */
+#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
+
+#define CONFIG_PCI 1
+#define CONFIG_83XX_GENERIC_PCI 1
+
+/*
+ * System Clock Setup
+ */
+#define CONFIG_83XX_CLKIN 66666667 /* in Hz */
+
+#ifndef CONFIG_SYS_CLK_FREQ
+#define CONFIG_SYS_CLK_FREQ CONFIG_83XX_CLKIN
+#endif
+
+/*
+ * Hardware Reset Configuration Word
+ */
+#define CFG_HRCW_LOW (\
+ HRCWL_LCL_BUS_TO_SCB_CLK_1X1 |\
+ HRCWL_DDR_TO_SCB_CLK_2X1 |\
+ HRCWL_VCO_1X2 |\
+ HRCWL_CSB_TO_CLKIN_2X1 |\
+ HRCWL_CORE_TO_CSB_2_5X1 |\
+ HRCWL_CE_PLL_VCO_DIV_2 |\
+ HRCWL_CE_PLL_DIV_1X1 |\
+ HRCWL_CE_TO_PLL_1X3)
+
+#define CFG_HRCW_HIGH (\
+ HRCWH_PCI_HOST |\
+ HRCWH_PCI1_ARBITER_ENABLE |\
+ HRCWH_CORE_ENABLE |\
+ HRCWH_FROM_0X00000100 |\
+ HRCWH_BOOTSEQ_DISABLE |\
+ HRCWH_SW_WATCHDOG_DISABLE |\
+ HRCWH_ROM_LOC_LOCAL_16BIT |\
+ HRCWH_BIG_ENDIAN |\
+ HRCWH_LALE_NORMAL)
+
+/*
+ * System IO Config
+ */
+#define CFG_SICRL 0x00000000
+
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+
+/*
+ * IMMR new address
+ */
+#define CFG_IMMR 0xE0000000
+
+/*
+ * DDR Setup
+ */
+#define CFG_DDR_BASE 0x00000000 /* DDR is system memory */
+#define CFG_SDRAM_BASE CFG_DDR_BASE
+#define CFG_DDR_SDRAM_BASE CFG_DDR_BASE
+#define CFG_DDRCDR 0x73000002 /* DDR II voltage is 1.8V */
+
+#undef CONFIG_SPD_EEPROM
+#if defined(CONFIG_SPD_EEPROM)
+/* Determine DDR configuration from I2C interface
+ */
+#define SPD_EEPROM_ADDRESS 0x51 /* DDR SODIMM */
+#else
+/* Manually set up DDR parameters
+ */
+#define CFG_DDR_SIZE 64 /* MB */
+#define CFG_DDR_CS0_CONFIG 0x80840101
+#define CFG_DDR_TIMING_0 0x00220802
+#define CFG_DDR_TIMING_1 0x3935d322
+#define CFG_DDR_TIMING_2 0x0f9048ca
+#define CFG_DDR_TIMING_3 0x00000000
+#define CFG_DDR_CLK_CNTL 0x02000000
+#define CFG_DDR_MODE 0x44400232
+#define CFG_DDR_MODE2 0x8000c000
+#define CFG_DDR_INTERVAL 0x03200064
+#define CFG_DDR_CS0_BNDS 0x00000003
+#define CFG_DDR_SDRAM_CFG 0x43080000
+#define CFG_DDR_SDRAM_CFG2 0x00401000
+#endif
+
+/*
+ * Memory test
+ */
+#undef CFG_DRAM_TEST /* memory test, takes time */
+#define CFG_MEMTEST_START 0x00030000 /* memtest region */
+#define CFG_MEMTEST_END 0x03f00000
+
+/*
+ * The reserved memory
+ */
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#define CFG_RAMBOOT
+#else
+#undef CFG_RAMBOOT
+#endif
+
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+
+/*
+ * Initial RAM Base Address Setup
+ */
+#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_ADDR 0xE6000000 /* Initial RAM address */
+#define CFG_INIT_RAM_END 0x1000 /* End of used area in RAM */
+#define CFG_GBL_DATA_SIZE 0x100 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+
+/*
+ * Local Bus Configuration & Clock Setup
+ */
+#define CFG_LCRR (LCRR_DBYP | LCRR_CLKDIV_2)
+#define CFG_LBC_LBCR 0x00000000
+
+/*
+ * FLASH on the Local Bus
+ */
+#define CFG_FLASH_CFI /* use the Common Flash Interface */
+#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CFG_FLASH_BASE 0xFE000000 /* FLASH base address */
+#define CFG_FLASH_SIZE 16 /* FLASH size is 16M */
+
+#define CFG_LBLAWBAR0_PRELIM CFG_FLASH_BASE /* Window base at flash base */
+#define CFG_LBLAWAR0_PRELIM 0x80000018 /* 32MB window size */
+
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | /* Flash Base address */ \
+ (2 << BR_PS_SHIFT) | /* 16 bit port size */ \
+ BR_V) /* valid */
+#define CFG_OR0_PRELIM 0xfe006ff7 /* 16MB Flash size */
+
+#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
+#define CFG_MAX_FLASH_SECT 128 /* sectors per device */
+
+#undef CFG_FLASH_CHECKSUM
+
+/*
+ * SDRAM on the Local Bus
+ */
+#undef CFG_LB_SDRAM /* The board has not SRDAM on local bus */
+
+#ifdef CFG_LB_SDRAM
+#define CFG_LBC_SDRAM_BASE 0xF0000000 /* SDRAM base address */
+#define CFG_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
+
+#define CFG_LBLAWBAR2_PRELIM CFG_LBC_SDRAM_BASE
+#define CFG_LBLAWAR2_PRELIM 0x80000019 /* 64MB */
+
+/*local bus BR2, OR2 definition for SDRAM if soldered on the EPB board */
+/*
+ * Base Register 2 and Option Register 2 configure SDRAM.
+ * The SDRAM base address, CFG_LBC_SDRAM_BASE, is 0xf0000000.
+ *
+ * For BR2, need:
+ * Base address of 0xf0000000 = BR[0:16] = 1111 0000 0000 0000 0
+ * port size = 32-bits = BR2[19:20] = 11
+ * no parity checking = BR2[21:22] = 00
+ * SDRAM for MSEL = BR2[24:26] = 011
+ * Valid = BR[31] = 1
+ *
+ * 0 4 8 12 16 20 24 28
+ * 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861
+ *
+ * CFG_LBC_SDRAM_BASE should be masked and OR'ed into
+ * the top 17 bits of BR2.
+ */
+
+#define CFG_BR2_PRELIM 0xf0001861 /*Port size=32bit, MSEL=SDRAM */
+
+/*
+ * The SDRAM size in MB, CFG_LBC_SDRAM_SIZE, is 64.
+ *
+ * For OR2, need:
+ * 64MB mask for AM, OR2[0:7] = 1111 1100
+ * XAM, OR2[17:18] = 11
+ * 9 columns OR2[19-21] = 010
+ * 13 rows OR2[23-25] = 100
+ * EAD set for extra time OR[31] = 1
+ *
+ * 0 4 8 12 16 20 24 28
+ * 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901
+ */
+
+#define CFG_OR2_PRELIM 0xfc006901
+
+#define CFG_LBC_LSRT 0x32000000 /* LB sdram refresh timer, about 6us */
+#define CFG_LBC_MRTPR 0x20000000 /* LB refresh timer prescal, 266MHz/32 */
+
+/*
+ * LSDMR masks
+ */
+#define CFG_LBC_LSDMR_OP_NORMAL (0 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_ARFRSH (1 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_SRFRSH (2 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_MRW (3 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_PRECH (4 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_PCHALL (5 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_ACTBNK (6 << (31 - 4))
+#define CFG_LBC_LSDMR_OP_RWINV (7 << (31 - 4))
+
+#define CFG_LBC_LSDMR_COMMON 0x0063b723
+
+/*
+ * SDRAM Controller configuration sequence.
+ */
+#define CFG_LBC_LSDMR_1 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_PCHALL)
+#define CFG_LBC_LSDMR_2 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_ARFRSH)
+#define CFG_LBC_LSDMR_3 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_ARFRSH)
+#define CFG_LBC_LSDMR_4 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_MRW)
+#define CFG_LBC_LSDMR_5 ( CFG_LBC_LSDMR_COMMON \
+ | CFG_LBC_LSDMR_OP_NORMAL)
+
+#endif
+
+/*
+ * Windows to access PIB via local bus
+ */
+#define CFG_LBLAWBAR3_PRELIM 0xf8008000 /* windows base 0xf8008000 */
+#define CFG_LBLAWAR3_PRELIM 0x8000000f /* windows size 64KB */
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_CLK get_bus_freq(0)
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+
+#define CFG_NS16550_COM1 (CFG_IMMR+0x4500)
+#define CFG_NS16550_COM2 (CFG_IMMR+0x4600)
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+/* Use the HUSH parser */
+#define CFG_HUSH_PARSER
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,8323@0"
+#define OF_SOC "soc8323@e0000000"
+#define OF_QE "qe@e0100000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc8323@e0000000/serial@4500"
+
+/* I2C */
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_FSL_I2C
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_NOPROBES {0x51} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET 0x3000
+
+/*
+ * Config on-board RTC
+ */
+#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */
+#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
+
+/*
+ * General PCI
+ * Addresses are mapped 1-1.
+ */
+#define CFG_PCI1_MEM_BASE 0x80000000
+#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
+#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MMIO_BASE 0x90000000
+#define CFG_PCI1_MMIO_PHYS CFG_PCI1_MMIO_BASE
+#define CFG_PCI1_MMIO_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_IO_BASE 0xd0000000
+#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE
+#define CFG_PCI1_IO_SIZE 0x04000000 /* 64M */
+
+#ifdef CONFIG_PCI
+
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+
+#undef CONFIG_EEPRO100
+#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CFG_PCI_SUBSYS_VENDORID 0x1957 /* Freescale */
+
+#endif /* CONFIG_PCI */
+
+
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI 1
+#endif
+
+/*
+ * QE UEC ethernet configuration
+ */
+#define CONFIG_UEC_ETH
+#define CONFIG_ETHPRIME "Freescale GETH"
+
+#define CONFIG_UEC_ETH1 /* ETH3 */
+
+#ifdef CONFIG_UEC_ETH1
+#define CFG_UEC1_UCC_NUM 2 /* UCC3 */
+#define CFG_UEC1_RX_CLK QE_CLK9
+#define CFG_UEC1_TX_CLK QE_CLK10
+#define CFG_UEC1_ETH_TYPE FAST_ETH
+#define CFG_UEC1_PHY_ADDR 4
+#define CFG_UEC1_INTERFACE_MODE ENET_100_MII
+#endif
+
+#define CONFIG_UEC_ETH2 /* ETH4 */
+
+#ifdef CONFIG_UEC_ETH2
+#define CFG_UEC2_UCC_NUM 1 /* UCC2 */
+#define CFG_UEC2_RX_CLK QE_CLK16
+#define CFG_UEC2_TX_CLK QE_CLK3
+#define CFG_UEC2_ETH_TYPE FAST_ETH
+#define CFG_UEC2_PHY_ADDR 0
+#define CFG_UEC2_INTERFACE_MODE ENET_100_MII
+#endif
+
+/*
+ * Environment
+ */
+#ifndef CFG_RAMBOOT
+ #define CFG_ENV_IS_IN_FLASH 1
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
+ #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
+ #define CFG_ENV_SIZE 0x2000
+#else
+ #define CFG_NO_FLASH 1 /* Flash is not usable now */
+ #define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
+ #define CFG_ENV_SIZE 0x2000
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_ASKENV
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
+#endif
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LOAD_ADDR 0x2000000 /* default load address */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if (CONFIG_CMD_KGDB)
+ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*
+ * Core HID Setup
+ */
+#define CFG_HID0_INIT 0x000000000
+#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
+#define CFG_HID2 HID2_HBE
+
+/*
+ * Cache Config
+ */
+#define CFG_DCACHE_SIZE 16384
+#define CFG_CACHELINE_SIZE 32
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
+#endif
+
+/*
+ * MMU Setup
+ */
+
+/* DDR: cache cacheable */
+#define CFG_IBAT0L (CFG_SDRAM_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT0U (CFG_SDRAM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT0L CFG_IBAT0L
+#define CFG_DBAT0U CFG_IBAT0U
+
+/* IMMRBAR & PCI IO: cache-inhibit and guarded */
+#define CFG_IBAT1L (CFG_IMMR | BATL_PP_10 | \
+ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT1U (CFG_IMMR | BATU_BL_4M | BATU_VS | BATU_VP)
+#define CFG_DBAT1L CFG_IBAT1L
+#define CFG_DBAT1U CFG_IBAT1U
+
+/* FLASH: icache cacheable, but dcache-inhibit and guarded */
+#define CFG_IBAT2L (CFG_FLASH_BASE | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT2U (CFG_FLASH_BASE | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CFG_DBAT2L (CFG_FLASH_BASE | BATL_PP_10 | \
+ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT2U CFG_IBAT2U
+
+#define CFG_IBAT3L (0)
+#define CFG_IBAT3U (0)
+#define CFG_DBAT3L CFG_IBAT3L
+#define CFG_DBAT3U CFG_IBAT3U
+
+/* Stack in dcache: cacheable, no memory coherence */
+#define CFG_IBAT4L (CFG_INIT_RAM_ADDR | BATL_PP_10)
+#define CFG_IBAT4U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
+#define CFG_DBAT4L CFG_IBAT4L
+#define CFG_DBAT4U CFG_IBAT4U
+
+#ifdef CONFIG_PCI
+/* PCI MEM space: cacheable */
+#define CFG_IBAT5L (CFG_PCI1_MEM_PHYS | BATL_PP_10 | BATL_MEMCOHERENCE)
+#define CFG_IBAT5U (CFG_PCI1_MEM_PHYS | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT5L CFG_IBAT5L
+#define CFG_DBAT5U CFG_IBAT5U
+/* PCI MMIO space: cache-inhibit and guarded */
+#define CFG_IBAT6L (CFG_PCI1_MMIO_PHYS | BATL_PP_10 | \
+ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_IBAT6U (CFG_PCI1_MMIO_PHYS | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_DBAT6L CFG_IBAT6L
+#define CFG_DBAT6U CFG_IBAT6U
+#else
+#define CFG_IBAT5L (0)
+#define CFG_IBAT5U (0)
+#define CFG_IBAT6L (0)
+#define CFG_IBAT6U (0)
+#define CFG_DBAT5L CFG_IBAT5L
+#define CFG_DBAT5U CFG_IBAT5U
+#define CFG_DBAT6L CFG_IBAT6L
+#define CFG_DBAT6U CFG_IBAT6U
+#endif
+
+/* Nothing in BAT7 */
+#define CFG_IBAT7L (0)
+#define CFG_IBAT7U (0)
+#define CFG_DBAT7L CFG_IBAT7L
+#define CFG_DBAT7U CFG_IBAT7U
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if (CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_ETHADDR 00:04:9f:ef:03:01
+#define CONFIG_HAS_ETH1 /* add support for "eth1addr" */
+#define CONFIG_ETH1ADDR 00:04:9f:ef:03:02
+
+#define CONFIG_IPADDR 10.0.0.2
+#define CONFIG_SERVERIP 10.0.0.1
+#define CONFIG_GATEWAYIP 10.0.0.1
+#define CONFIG_NETMASK 255.0.0.0
+#define CONFIG_NETDEV eth1
+
+#define CONFIG_HOSTNAME mpc8323erdb
+#define CONFIG_ROOTPATH /nfsroot
+#define CONFIG_RAMDISKFILE rootfs.ext2.gz.uboot
+#define CONFIG_BOOTFILE uImage
+#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
+#define CONFIG_FDTFILE mpc832x_rdb.dtb
+
+#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+#define CONFIG_BOOTDELAY -1 /* -1 disables auto-boot */
+#define CONFIG_BAUDRATE 115200
+
+#define XMK_STR(x) #x
+#define MK_STR(x) XMK_STR(x)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=" MK_STR(CONFIG_NETDEV) "\0" \
+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
+ "tftpflash=tftp $loadaddr $uboot;" \
+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=" MK_STR(CONFIG_FDTFILE) "\0" \
+ "ramdiskaddr=1000000\0" \
+ "ramdiskfile=" MK_STR(CONFIG_RAMDISKFILE) "\0" \
+ "console=ttyS0\0" \
+ "setbootargs=setenv bootargs " \
+ "root=$rootdev rw console=$console,$baudrate $othbootargs\0" \
+ "setipargs=setenv bootargs nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "root=$rootdev rw console=$console,$baudrate $othbootargs\0"
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv rootdev /dev/nfs;" \
+ "run setbootargs;" \
+ "run setipargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv rootdev /dev/ram;" \
+ "run setbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#undef MK_STR
+#undef XMK_STR
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/MPC832XEMDS.h b/include/configs/MPC832XEMDS.h
index cecb225..c9c6d88 100644
--- a/include/configs/MPC832XEMDS.h
+++ b/include/configs/MPC832XEMDS.h
@@ -30,6 +30,8 @@
#define CONFIG_MPC83XX 1 /* MPC83xx family */
#define CONFIG_MPC832X 1 /* MPC832x CPU specific */
#define CONFIG_MPC832XEMDS 1 /* MPC832XEMDS board specific */
+#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
+#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */
/*
* System Clock Setup
@@ -87,6 +89,7 @@
#define CFG_SICRL 0x00000000
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_R
/*
* IMMR new address
@@ -315,12 +318,9 @@
#endif
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8323@0"
#define OF_SOC "soc8323@e0000000"
#define OF_QE "qe@e0100000"
@@ -423,41 +423,33 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_ASKENV
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#endif
-#else
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C )
-#endif
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -468,7 +460,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -498,7 +490,7 @@
*/
#define CFG_DCACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
@@ -575,7 +567,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/MPC8349EMDS.h b/include/configs/MPC8349EMDS.h
index 0460be9..92555ba 100644
--- a/include/configs/MPC8349EMDS.h
+++ b/include/configs/MPC8349EMDS.h
@@ -339,12 +339,9 @@
#endif
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8349@0"
#define OF_SOC "soc8349@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
@@ -432,14 +429,16 @@
#endif
#define CONFIG_GMII 1 /* MII PHY management */
-#define CONFIG_MPC83XX_TSEC1 1
-#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC83XX_TSEC2 1
-#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
@@ -475,44 +474,35 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C \
- | CFG_CMD_DATE) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_DATE) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#endif
-#else
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_DATE \
- )
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII \
- | CFG_CMD_DATE \
- )
-#endif
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -523,7 +513,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -544,7 +534,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -695,7 +685,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -708,6 +698,7 @@
#if defined(CONFIG_TSEC_ENET)
#define CONFIG_ETHADDR 00:04:9f:ef:23:33
#define CONFIG_HAS_ETH1
+#define CONFIG_HAS_ETH0
#define CONFIG_ETH1ADDR 00:E0:0C:00:7E:21
#endif
diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h
index 37bbfb3..54cab52 100644
--- a/include/configs/MPC8349ITX.h
+++ b/include/configs/MPC8349ITX.h
@@ -154,6 +154,9 @@
#define CFG_MEMTEST_START 0x1000 /* memtest region */
#define CFG_MEMTEST_END 0x2000
+#define CFG_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \
+ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_05)
+
#ifdef CONFIG_HARD_I2C
#define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/
#endif
@@ -286,18 +289,16 @@
#define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
+#define CONFIG_CONSOLE ttyS0
#define CONFIG_BAUDRATE 115200
#define CFG_NS16550_COM1 (CFG_IMMR + 0x4500)
#define CFG_NS16550_COM2 (CFG_IMMR + 0x4600)
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8349@0"
#define OF_SOC "soc8349@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
@@ -369,24 +370,27 @@
#define CONFIG_NET_MULTI
#define CONFIG_MII
-#define CONFIG_PHY_GIGE /* In case CFG_CMD_MII is specified */
+#define CONFIG_PHY_GIGE /* In case CONFIG_CMD_MII is specified */
-#define CONFIG_MPC83XX_TSEC1
+#define CONFIG_TSEC1
-#ifdef CONFIG_MPC83XX_TSEC1
-#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
+#ifdef CONFIG_TSEC1
+#define CONFIG_HAS_ETH0
+#define CONFIG_TSEC1_NAME "TSEC0"
#define CFG_TSEC1_OFFSET 0x24000
#define TSEC1_PHY_ADDR 0x1c /* VSC8201 uses address 0x1c */
#define TSEC1_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
#endif
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
#define CONFIG_HAS_ETH1
-#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC2_NAME "TSEC1"
#define CFG_TSEC2_OFFSET 0x25000
#define CONFIG_UNKNOWN_TSEC /* TSEC2 is proprietary */
#define TSEC2_PHY_ADDR 4
#define TSEC2_PHYIDX 0
+#define TSEC2_FLAGS TSEC_GIGABIT
#endif
#define CONFIG_ETHPRIME "Freescale TSEC"
@@ -405,6 +409,7 @@
#define CFG_ENV_SIZE 0x2000
#else
#define CFG_NO_FLASH /* Flash is not usable now */
+ #undef CFG_FLASH_CFI_DRIVER
#define CFG_ENV_IS_NOWHERE /* Store ENV in memory only */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - 0x1000)
#define CFG_ENV_SIZE 0x2000
@@ -413,40 +418,41 @@
#define CONFIG_LOADS_ECHO /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE /* allow baudrate change */
-/* CONFIG_COMMANDS */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
#ifdef CONFIG_COMPACT_FLASH
-#define CONFIG_COMMANDS_CF (CFG_CMD_IDE | CFG_CMD_FAT)
-#else
-#define CONFIG_COMMANDS_CF 0
+ #define CONFIG_CMD_IDE
+ #define CONFIG_CMD_FAT
#endif
#ifdef CONFIG_PCI
-#define CONFIG_COMMANDS_PCI CFG_CMD_PCI
-#else
-#define CONFIG_COMMANDS_PCI 0
+ #define CONFIG_CMD_PCI
#endif
#ifdef CONFIG_HARD_I2C
-#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
-#else
-#define CONFIG_COMMANDS_I2C 0
+ #define CONFIG_CMD_I2C
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CONFIG_COMMANDS_CF | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CONFIG_COMMANDS_I2C | \
- CONFIG_COMMANDS_PCI | \
- CFG_CMD_SDRAM | \
- CFG_CMD_DATE | \
- CFG_CMD_CACHE | \
- CFG_CMD_IRQ)
-#include <cmd_confdefs.h>
-
/* Watchdog */
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
/*
@@ -466,7 +472,7 @@
#define CFG_PROMPT "MPC8349E-mITX-GP> " /* Monitor Command Prompt */
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -489,7 +495,7 @@
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log2 of the above value */
#endif
@@ -614,7 +620,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -625,11 +631,11 @@
*/
#define CONFIG_ENV_OVERWRITE
-#ifdef CONFIG_MPC83XX_TSEC1
+#ifdef CONFIG_TSEC1
#define CONFIG_ETHADDR 00:E0:0C:00:8C:01
#endif
-#ifdef CONFIG_MPC83XX_TSEC2
+#ifdef CONFIG_TSEC2
#define CONFIG_ETH1ADDR 00:E0:0C:00:8C:02
#endif
@@ -667,9 +673,10 @@
" ip=" MK_STR(CONFIG_IPADDR) ":" MK_STR(CONFIG_SERVERIP) ":" \
MK_STR(CONFIG_GATEWAYIP) ":" MK_STR(CONFIG_NETMASK) ":" \
MK_STR(CONFIG_HOSTNAME) ":" MK_STR(CONFIG_NETDEV) ":off" \
- " console=ttyS0," MK_STR(CONFIG_BAUDRATE)
+ " console=" MK_STR(CONFIG_CONSOLE) "," MK_STR(CONFIG_BAUDRATE)
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "console=" MK_STR(CONFIG_CONSOLE) "\0" \
"netdev=" MK_STR(CONFIG_NETDEV) "\0" \
"uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
"tftpflash=tftpboot $loadaddr $uboot; " \
diff --git a/include/configs/MPC8360EMDS.h b/include/configs/MPC8360EMDS.h
index 79937dc..41f062c 100644
--- a/include/configs/MPC8360EMDS.h
+++ b/include/configs/MPC8360EMDS.h
@@ -32,6 +32,8 @@
#define CONFIG_MPC83XX 1 /* MPC83XX family */
#define CONFIG_MPC8360 1 /* MPC8360 CPU specific */
#define CONFIG_MPC8360EMDS 1 /* MPC8360EMDS board specific */
+#undef CONFIG_PQ_MDS_PIB /* POWERQUICC MDS Platform IO Board */
+#undef CONFIG_PQ_MDS_PIB_ATM /* QOC3 ATM card */
/*
* System Clock Setup
@@ -88,6 +90,7 @@
#define CFG_SICRL 0x40000000
#define CONFIG_BOARD_EARLY_INIT_F /* call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_R
/*
* IMMR new address
@@ -309,13 +312,13 @@
/*
* CS4 on Local Bus, to PIB
*/
-#define CFG_BR4_PRELIM 0xf8008801 /* CS4 base address at 0xf8008000 */
+#define CFG_BR4_PRELIM 0xf8010801 /* CS4 base address at 0xf8010000 */
#define CFG_OR4_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */
/*
* CS5 on Local Bus, to PIB
*/
-#define CFG_BR5_PRELIM 0xf8010801 /* CS5 base address at 0xf8010000 */
+#define CFG_BR5_PRELIM 0xf8008801 /* CS5 base address at 0xf8008000 */
#define CFG_OR5_PRELIM 0xffffe9f7 /* size 32KB, port size 8bit, GPCM */
/*
@@ -348,10 +351,6 @@
#define CONFIG_OF_HAS_BD_T 1
#define CONFIG_OF_HAS_UBOOT_ENV 1
-
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8360@0"
#define OF_SOC "soc8360@e0000000"
#define OF_QE "qe@e0100000"
@@ -457,41 +456,33 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_ASKENV
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#endif
-#else
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_ASKENV \
- | CFG_CMD_I2C )
-#endif
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -502,7 +493,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -532,7 +523,7 @@
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
@@ -610,7 +601,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index 5aeea58..be603ac 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -301,9 +301,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8540@0"
#define OF_SOC "soc8540@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -366,14 +363,16 @@
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
#if CONFIG_HAS_FEC
@@ -381,6 +380,7 @@
#define CONFIG_MPC85XX_FEC_NAME "FEC"
#define FEC_PHY_ADDR 3
#define FEC_PHYIDX 0
+#define FEC_FLAGS 0
#endif
/* Options are: TSEC[0-1], FEC */
@@ -407,37 +407,33 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #else
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #else
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -448,7 +444,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -469,7 +465,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -481,7 +477,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -493,6 +489,7 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
@@ -520,7 +517,7 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"consoledev=ttyS0\0" \
- "ramdiskaddr=600000\0" \
+ "ramdiskaddr=1000000\0" \
"ramdiskfile=your.ramdisk.u-boot\0" \
"fdtaddr=400000\0" \
"fdtfile=your.fdt.dtb\0"
@@ -540,7 +537,7 @@
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
- "bootm $loadaddr $ramdiskaddr"
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
diff --git a/include/configs/MPC8540EVAL.h b/include/configs/MPC8540EVAL.h
index 418a3a3..e376c11 100644
--- a/include/configs/MPC8540EVAL.h
+++ b/include/configs/MPC8540EVAL.h
@@ -212,11 +212,14 @@
#elif defined(CONFIG_TSEC_ENET)
#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_HAS_ETH0
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_HAS_ETH1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define CONFIG_MPC85XX_FEC 1
+#define CONFIG_HAS_ETH2
#define CONFIG_MPC85XX_FEC_NAME "FEC"
#define TSEC1_PHY_ADDR 7
#define TSEC2_PHY_ADDR 4
@@ -224,6 +227,10 @@
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
#define FEC_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+#define FEC_FLAGS 0
+
/* Options are: TSEC[0-1], FEC */
#define CONFIG_ETHPRIME "TSEC0"
@@ -259,26 +266,33 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING \
- | CFG_CMD_PCI | CFG_CMD_I2C ) & \
- ~(CFG_CMD_ENV | CFG_CMD_LOADS ))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING \
- | CFG_CMD_I2C ) & \
- ~(CFG_CMD_ENV | CFG_CMD_LOADS ))
-#endif
-#else
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI \
- | CFG_CMD_PING | CFG_CMD_I2C )
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_I2C )
-#endif
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -288,7 +302,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "MPC8540EVAL=> "/* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -308,7 +322,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -320,7 +334,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/MPC8541CDS.h b/include/configs/MPC8541CDS.h
index fb360d2..4e061bd 100644
--- a/include/configs/MPC8541CDS.h
+++ b/include/configs/MPC8541CDS.h
@@ -312,9 +312,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8541@0"
#define OF_SOC "soc8541@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -350,6 +347,13 @@
#define CFG_PCI2_IO_PHYS 0xe2100000
#define CFG_PCI2_IO_SIZE 0x100000 /* 1M */
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
#if defined(CONFIG_PCI)
@@ -373,17 +377,16 @@
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
-#undef CONFIG_MPC85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
-#define FEC_PHY_ADDR 3
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
-#define FEC_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
@@ -401,19 +404,28 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -423,7 +435,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -443,7 +455,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -455,7 +467,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -466,6 +478,7 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 4c34308..f580cca 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -34,14 +34,14 @@
#define CONFIG_MPC8544 1
#define CONFIG_MPC8544DS 1
-#undef CONFIG_PCI /* Enable PCI/PCIE */
-#undef CONFIG_PCI1 /* PCI controller 1 */
-#undef CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
-#undef CONFIG_PCIE2 /* PCIE controler 2 (slot 2) */
-#undef CONFIG_PCIE3 /* PCIE controler 3 (ULI bridge) */
-#undef CONFIG_FSL_PCI_INIT /* Use common FSL init code */
+#define CONFIG_PCI 1 /* Enable PCI/PCIE */
+#define CONFIG_PCI1 1 /* PCI controller 1 */
+#define CONFIG_PCIE1 1 /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCIE2 1 /* PCIE controler 2 (slot 2) */
+#define CONFIG_PCIE3 1 /* PCIE controler 3 (ULI bridge) */
+#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
-#define CONFIG_TSEC_ENET /* tsec ethernet support */
+#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
#undef CONFIG_DDR_DLL
@@ -52,6 +52,7 @@
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
#define CONFIG_DDR_ECC_CMD
+#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
/*
* When initializing flash, if we cannot find the manufacturer ID,
@@ -70,7 +71,7 @@
/*
* These can be toggled for performance analysis, otherwise use default.
*/
-#define CONFIG_L2_CACHE /* toggle L2 cache */
+#define CONFIG_L2_CACHE /* toggle L2 cache */
#define CONFIG_BTB /* toggle branch predition */
#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
#define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */
@@ -86,13 +87,13 @@
#define CFG_MEMTEST_START 0x00200000 /* memtest works on */
#define CFG_MEMTEST_END 0x00400000
#define CFG_ALT_MEMTEST
-#define CONFIG_PANIC_HANG /* do not reset board on panic */
+#define CONFIG_PANIC_HANG /* do not reset board on panic */
/*
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*/
-#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
+#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
@@ -180,6 +181,7 @@
#define CFG_BR3_PRELIM 0xf8100801 /* port size 8bit */
#define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
+#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
#define PIXIS_BASE 0xf8100000 /* PIXIS registers */
#define PIXIS_ID 0x0 /* Board ID at offset 0 */
#define PIXIS_VER 0x1 /* Board version at offset 1 */
@@ -251,9 +253,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8544@0"
#define OF_SOC "soc8544@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -281,7 +280,7 @@
#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
#define CFG_PCI1_IO_BASE 0x00000000
#define CFG_PCI1_IO_PHYS 0xe1000000
-#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */
+#define CFG_PCI1_IO_SIZE 0x00010000 /* 64k */
/* PCI view of System Memory */
#define CFG_PCI_MEMORY_BUS 0x00000000
@@ -293,27 +292,27 @@
#define CFG_PCIE2_MEM_PHYS CFG_PCIE2_MEM_BASE
#define CFG_PCIE2_MEM_SIZE 0x20000000 /* 512M */
#define CFG_PCIE2_IO_BASE 0x00000000
-#define CFG_PCIE2_IO_PHYS 0xe2000000
-#define CFG_PCIE2_IO_SIZE 0x00100000 /* 1M */
+#define CFG_PCIE2_IO_PHYS 0xe1010000
+#define CFG_PCIE2_IO_SIZE 0x00010000 /* 64k */
/* controller 1, Slot 2,tgtid 2, Base address a000 */
#define CFG_PCIE1_MEM_BASE 0xa0000000
#define CFG_PCIE1_MEM_PHYS CFG_PCIE1_MEM_BASE
-#define CFG_PCIE1_MEM_SIZE 0x08000000 /* 128M */
-#define CFG_PCIE1_MEM_BASE2 0xa8000000
-#define CFG_PCIE1_MEM_PHYS2 CFG_PCIE1_MEM_BASE2
-#define CFG_PCIE1_MEM_SIZE2 0x04000000 /* 64M */
-#define CFG_PCIE1_IO_BASE 0x00000000 /* reuse mem LAW */
-#define CFG_PCIE1_IO_PHYS 0xaf000000
-#define CFG_PCIE1_IO_SIZE 0x00100000 /* 1M */
+#define CFG_PCIE1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCIE1_IO_BASE 0x00000000
+#define CFG_PCIE1_IO_PHYS 0xe1020000
+#define CFG_PCIE1_IO_SIZE 0x00010000 /* 64k */
/* controller 3, direct to uli, tgtid 3, Base address b000 */
#define CFG_PCIE3_MEM_BASE 0xb0000000
#define CFG_PCIE3_MEM_PHYS CFG_PCIE3_MEM_BASE
-#define CFG_PCIE3_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCIE3_MEM_SIZE 0x00100000 /* 1M */
#define CFG_PCIE3_IO_BASE 0x00000000
-#define CFG_PCIE3_IO_PHYS 0xe3000000
+#define CFG_PCIE3_IO_PHYS 0xb0100000 /* reuse mem LAW */
#define CFG_PCIE3_IO_SIZE 0x00100000 /* 1M */
+#define CFG_PCIE3_MEM_BASE2 0xb0200000
+#define CFG_PCIE3_MEM_PHYS2 CFG_PCIE3_MEM_BASE2
+#define CFG_PCIE3_MEM_SIZE2 0x00200000 /* 1M */
#if defined(CONFIG_PCI)
@@ -344,7 +343,7 @@
#define CONFIG_SATA_ULI5288
#define CFG_SCSI_MAX_SCSI_ID 4
#define CFG_SCSI_MAX_LUN 1
-#define CFG_SCSI_MAX_DEVICE (CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN)
+#define CFG_SCSI_MAX_DEVICE (CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN)
#define CFG_SCSI_MAXDEVICE CFG_SCSI_MAX_DEVICE
#endif /* SCSCI */
@@ -354,27 +353,28 @@
#if defined(CONFIG_TSEC_ENET)
#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI 1
+#define CONFIG_NET_MULTI 1
#endif
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_MII_DEFAULT_TSEC 1 /* Allow unregistered phys */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "eTSEC1"
-#define CONFIG_MPC85XX_TSEC3 1
-#define CONFIG_MPC85XX_TSEC3_NAME "eTSEC3"
-#undef CONFIG_MPC85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "eTSEC1"
+#define CONFIG_TSEC3 1
+#define CONFIG_TSEC3_NAME "eTSEC3"
#define TSEC1_PHY_ADDR 0
#define TSEC3_PHY_ADDR 1
+#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
+#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
+
#define TSEC1_PHYIDX 0
#define TSEC3_PHYIDX 0
#define CONFIG_ETHPRIME "eTSEC1"
#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
-
#endif /* CONFIG_TSEC_ENET */
/*
@@ -392,21 +392,32 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII \
- | CFG_CMD_BEDBUG \
- | CFG_CMD_NET)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
+ #define CONFIG_CMD_PCI
+ #define CONFIG_CMD_BEDBUG
+ #define CONFIG_CMD_NET
+ #define CONFIG_CMD_SCSI
+ #define CONFIG_CMD_EXT2
#endif
-#include <cmd_confdefs.h>
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -416,7 +427,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -431,12 +442,12 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
-#define CFG_DCACHE_SIZE 32768
+#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -448,7 +459,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -459,6 +470,7 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:02:00:FD
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:02:01:FD
@@ -472,7 +484,8 @@
#define CONFIG_HOSTNAME 8544ds_unknown
#define CONFIG_ROOTPATH /nfs/mpc85xx
-#define CONFIG_BOOTFILE 8544ds_tmt/uImage.uboot
+#define CONFIG_BOOTFILE 8544ds/uImage.uboot
+#define CONFIG_UBOOTPATH 8544ds/u-boot.bin /* TFTP server */
#define CONFIG_SERVERIP 192.168.0.1
#define CONFIG_GATEWAYIP 192.168.0.1
@@ -481,7 +494,7 @@
#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
#define CONFIG_BAUDRATE 115200
@@ -489,10 +502,7 @@
#define PCIE_ENV \
"pciereg=md ${a}000 6; md ${a}020 4; md ${a}bf8 2; echo o;md ${a}c00 25;" \
"echo i; md ${a}da0 15; echo e;md ${a}e00 e; echo d; md ${a}f00 c\0" \
- "pcie1regs=setenv a e000a; run pciereg\0" \
- "pcie2regs=setenv a e0009; run pciereg\0" \
- "pcie3regs=setenv a e000b; run pciereg\0" \
- "pcieerr=md ${a}020 1; md ${a}e00;" \
+ "pcieerr=md ${a}020 1; md ${a}e00 e;" \
"pci d.b $b.0 7 1; pci d.w $b.0 1e 1;" \
"pci d.w $b.0 56 1;" \
"pci d $b.0 104 1;pci d $b.0 110 1;pci d $b.0 130 1\0" \
@@ -501,12 +511,18 @@
"pci w $b.0 104 ffffffff; pci w $b.0 110 ffffffff;" \
"pci w $b.0 130 ffffffff\0" \
"pciecfg=pci d $b.0 0 20; pci d $b.0 100 e; pci d $b.0 400 69\0" \
- "pcie1err=setenv a e000a; run pcieerr\0" \
- "pcie2err=setenv a e0009; run pcieerr\0" \
- "pcie3err=setenv a e000b; run pcieerr\0" \
- "pcie1errc=setenv a e000a; run pcieerrc\0" \
- "pcie2errc=setenv a e0009; run pcieerrc\0" \
- "pcie3errc=setenv a e000b; run pcieerrc\0"
+ "pcie1regs=setenv a e000a; run pciereg\0" \
+ "pcie2regs=setenv a e0009; run pciereg\0" \
+ "pcie3regs=setenv a e000b; run pciereg\0" \
+ "pcie1cfg=setenv b 3; run pciecfg\0" \
+ "pcie2cfg=setenv b 5; run pciecfg\0" \
+ "pcie3cfg=setenv b 0; run pciecfg\0" \
+ "pcie1err=setenv a e000a; setenv b 3; run pcieerr\0" \
+ "pcie2err=setenv a e0009; setenv b 5; run pcieerr\0" \
+ "pcie3err=setenv a e000b; setenv b 0; run pcieerr\0" \
+ "pcie1errc=setenv a e000a; setenv b 3; run pcieerrc\0" \
+ "pcie2errc=setenv a e0009; setenv b 5; run pcieerrc\0" \
+ "pcie3errc=setenv a e000b; setenv b 0; run pcieerrc\0"
#else
#define PCIE_ENV ""
#endif
@@ -514,14 +530,14 @@
#if defined(CONFIG_PCI1)
#define PCI_ENV \
"pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da0 15;" \
- "echo e;md ${a}e00 9\0" \
+ "echo e;md ${a}e00 9\0" \
"pci1regs=setenv a e0008; run pcireg\0" \
"pcierr=md ${a}e00 8; pci d.b $b.0 7 1; pci d.w $b.0 1e 1;" \
"pci d.w $b.0 56 1\0" \
- "pcierrc=mw ${a}e00 ffffffff; pci w.b $b.0 7 ff; pci w.w $b.0 1e ffff;" \
- "pci w.w $b.0 56 ffff\0" \
- "pci1err=setenv a e0008; run pcierr\0" \
- "pci1errc=setenv a e0008; run pcierrc\0"
+ "pcierrc=mw ${a}e00 ffffffff; mw ${a}e0c 0; pci w.b $b.0 7 ff;" \
+ "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff\0" \
+ "pci1err=setenv a e0008; setenv b 7; run pcierr\0" \
+ "pci1errc=setenv a e0008; setenv b 7; run pcierrc\0"
#else
#define PCI_ENV ""
#endif
@@ -541,25 +557,39 @@
#define ENET_ENV ""
#endif
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot; " \
+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
- "ramdiskfile=8544ds_tmt/ramdisk.uboot\0" \
- "fdtaddr=400000\0" \
- "fdtfile=8544ds_tmt/mpc8544ds.dtb\0" \
- "eoi=mw e00400b0 0\0" \
- "iack=md e00400a0 1\0" \
+ "ramdiskfile=8544ds/ramdisk.uboot\0" \
+ "dtbaddr=c00000\0" \
+ "dtbfile=8544ds/mpc8544ds.dtb\0" \
+ "bdev=sda3\0" \
+ "eoi=mw e00400b0 0\0" \
+ "iack=md e00400a0 1\0" \
"ddrreg=md ${a}000 8; md ${a}080 8;md ${a}100 d; md ${a}140 4; md ${a}bf0 4;" \
"md ${a}e00 3; md ${a}e20 3; md ${a}e40 7; md ${a}f00 5\0" \
- "ddrregs=setenv a e0002; run ddrreg\0" \
+ "ddrregs=setenv a e0002; run ddrreg\0" \
"gureg=md ${a}000 2c; md ${a}0b0 1; md ${a}0c0 1; md ${a}b20 3;" \
- "md ${a}e00 1; md ${a}e60 1; md ${a}ef0 15\0" \
- "guregs=setenv a e00e0; run gureg\0" \
+ "md ${a}e00 1; md ${a}e60 1; md ${a}ef0 15\0" \
+ "guregs=setenv a e00e0; run gureg\0" \
"ecmreg=md ${a}000 1; md ${a}010 1; md ${a}bf8 2; md ${a}e00 6\0" \
- "ecmregs=setenv a e0001; run ecmreg\0" \
- PCIE_ENV \
- PCI_ENV \
+ "ecmregs=setenv a e0001; run ecmreg\0" \
+ "lawregs=md e0000c08 4b\0" \
+ "lbcregs=md e0005000 36\0" \
+ "dma0regs=md e0021100 12\0" \
+ "dma1regs=md e0021180 12\0" \
+ "dma2regs=md e0021200 12\0" \
+ "dma3regs=md e0021280 12\0" \
+ PCIE_ENV \
+ PCI_ENV \
ENET_ENV
@@ -569,23 +599,23 @@
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
- "tftp $fdtaddr $fdtfile;" \
- "bootm $loadaddr - $fdtaddr"
+ "tftp $dtbaddr $dtbfile;" \
+ "bootm $loadaddr - $dtbaddr"
-#define CONFIG_RAMBOOTCOMMAND \
+#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
- "tftp $fdtaddr $fdtfile;" \
- "bootm $loadaddr $ramdiskaddr $fdtaddr"
+ "tftp $dtbaddr $dtbfile;" \
+ "bootm $loadaddr $ramdiskaddr $dtbaddr"
-#define CONFIG_BOOTCOMMAND \
- "setenv bootargs root=/dev/sda3 rw " \
+#define CONFIG_BOOTCOMMAND \
+ "setenv bootargs root=/dev/$bdev rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
- "tftp $fdtaddr $fdtfile;" \
- "bootm $loadaddr - $fdtaddr"
+ "tftp $dtbaddr $dtbfile;" \
+ "bootm $loadaddr - $dtbaddr"
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 680009d..6083715 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -1,5 +1,5 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -11,7 +11,7 @@
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
@@ -36,8 +36,14 @@
#define CONFIG_MPC8548 1 /* MPC8548 specific */
#define CONFIG_MPC8548CDS 1 /* MPC8548CDS board specific */
-#define CONFIG_PCI
-#define CONFIG_TSEC_ENET /* tsec ethernet support */
+#define CONFIG_PCI /* enable any pci type devices */
+#define CONFIG_PCI1 /* PCI controller 1 */
+#define CONFIG_PCIE1 /* PCIE controler 1 (slot 1) */
+#undef CONFIG_RIO
+#undef CONFIG_PCI2
+#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
+
+#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_DLL /* possible DLL fix needed */
@@ -46,6 +52,7 @@
#define CONFIG_DDR_ECC /* only for ECC DDR module */
#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_INTERRUPTS /* enable pci, srio, ddr interrupts */
/*
@@ -65,16 +72,16 @@
/*
* These can be toggled for performance analysis, otherwise use default.
*/
-#define CONFIG_L2_CACHE /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
+#define CONFIG_L2_CACHE /* toggle L2 cache */
+#define CONFIG_BTB /* toggle branch predition */
+#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
+#define CONFIG_CLEAR_LAW0 /* Clear LAW0 in cpu_init_r */
/*
* Only possible on E500 Version 2 or newer cores.
*/
#define CONFIG_ENABLE_36BIT_PHYS 1
-
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CFG_DRAM_TEST /* memory test, takes time */
@@ -85,10 +92,14 @@
* Base addresses -- Note these are effective addresses where the
* actual resources get mapped (not physical addresses)
*/
-#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
+#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
+#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
+#define CFG_PCI2_ADDR (CFG_CCSRBAR+0x9000)
+#define CFG_PCIE1_ADDR (CFG_CCSRBAR+0xa000)
+
/*
* DDR Setup
*/
@@ -106,7 +117,6 @@
#undef CONFIG_CLOCKS_IN_MHZ
-
/*
* Local Bus Definitions
*/
@@ -124,9 +134,9 @@
* Use GPCM = BRx[24:26] = 000
* Valid = BRx[31] = 1
*
- * 0 4 8 12 16 20 24 28
- * 1111 1111 1000 0000 0001 0000 0000 0001 = ff801001 BR0
- * 1111 1111 0000 0000 0001 0000 0000 0001 = ff001001 BR1
+ * 0 4 8 12 16 20 24 28
+ * 1111 1111 1000 0000 0001 0000 0000 0001 = ff801001 BR0
+ * 1111 1111 0000 0000 0001 0000 0000 0001 = ff001001 BR1
*
* OR0, OR1:
* Addr Mask = 8M = ORx[0:16] = 1111 1111 1000 0000 0
@@ -137,11 +147,12 @@
* TRLX = use relaxed timing = ORx[29] = 1
* EAD = use external address latch delay = OR[31] = 1
*
- * 0 4 8 12 16 20 24 28
- * 1111 1111 1000 0000 0110 1110 0110 0101 = ff806e65 ORx
+ * 0 4 8 12 16 20 24 28
+ * 1111 1111 1000 0000 0110 1110 0110 0101 = ff806e65 ORx
*/
-#define CFG_FLASH_BASE 0xff000000 /* start of FLASH 8M */
+#define CFG_BOOT_BLOCK 0xff000000 /* boot TLB block */
+#define CFG_FLASH_BASE CFG_BOOT_BLOCK /* start of FLASH 16M */
#define CFG_BR0_PRELIM 0xff801001
#define CFG_BR1_PRELIM 0xff001001
@@ -156,7 +167,7 @@
#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
-#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
@@ -166,7 +177,12 @@
/*
* SDRAM on the Local Bus
*/
-#define CFG_LBC_SDRAM_BASE 0xf0000000 /* Localbus SDRAM */
+#define CFG_LBC_CACHE_BASE 0xf0000000 /* Localbus cacheable */
+#define CFG_LBC_CACHE_SIZE 64
+#define CFG_LBC_NONCACHE_BASE 0xf8000000 /* Localbus non-cacheable */
+#define CFG_LBC_NONCACHE_SIZE 64
+
+#define CFG_LBC_SDRAM_BASE CFG_LBC_CACHE_BASE /* Localbus SDRAM */
#define CFG_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */
/*
@@ -180,14 +196,14 @@
* SDRAM for MSEL = BR2[24:26] = 011
* Valid = BR[31] = 1
*
- * 0 4 8 12 16 20 24 28
+ * 0 4 8 12 16 20 24 28
* 1111 0000 0000 0000 0001 1000 0110 0001 = f0001861
*
* FIXME: CFG_LBC_SDRAM_BASE should be masked and OR'ed into
* FIXME: the top 17 bits of BR2.
*/
-#define CFG_BR2_PRELIM 0xf0001861
+#define CFG_BR2_PRELIM 0xf0001861
/*
* The SDRAM size in MB, CFG_LBC_SDRAM_SIZE, is 64.
@@ -196,19 +212,19 @@
* 64MB mask for AM, OR2[0:7] = 1111 1100
* XAM, OR2[17:18] = 11
* 9 columns OR2[19-21] = 010
- * 13 rows OR2[23-25] = 100
+ * 13 rows OR2[23-25] = 100
* EAD set for extra time OR[31] = 1
*
- * 0 4 8 12 16 20 24 28
+ * 0 4 8 12 16 20 24 28
* 1111 1100 0000 0000 0110 1001 0000 0001 = fc006901
*/
#define CFG_OR2_PRELIM 0xfc006901
-#define CFG_LBC_LCRR 0x00030004 /* LB clock ratio reg */
-#define CFG_LBC_LBCR 0x00000000 /* LB config reg */
-#define CFG_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
-#define CFG_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
+#define CFG_LBC_LCRR 0x00030004 /* LB clock ratio reg */
+#define CFG_LBC_LBCR 0x00000000 /* LB config reg */
+#define CFG_LBC_LSRT 0x20000000 /* LB sdram refresh timer */
+#define CFG_LBC_MRTPR 0x00000000 /* LB refresh timer prescal*/
/*
* LSDMR masks
@@ -236,7 +252,7 @@
/*
* Common settings for all Local Bus SDRAM commands.
* At run time, either BSMA1516 (for CPU 1.1)
- * or BSMA1617 (for CPU 1.0) (old)
+ * or BSMA1617 (for CPU 1.0) (old)
* is OR'ed in too.
*/
#define CFG_LBC_LSDMR_COMMON ( CFG_LBC_LSDMR_RFCR16 \
@@ -256,61 +272,63 @@
* Base address of 0xf8000000 = BR[0:16] = 1111 1000 0000 0000 0
* port-size = 8-bits = BR[19:20] = 01
* no parity checking = BR[21:22] = 00
- * GPMC for MSEL = BR[24:26] = 000
- * Valid = BR[31] = 1
+ * GPMC for MSEL = BR[24:26] = 000
+ * Valid = BR[31] = 1
*
- * 0 4 8 12 16 20 24 28
+ * 0 4 8 12 16 20 24 28
* 1111 1000 0000 0000 0000 1000 0000 0001 = f8000801
*
* For OR3, need:
- * 1 MB mask for AM, OR[0:16] = 1111 1111 1111 0000 0
+ * 1 MB mask for AM, OR[0:16] = 1111 1111 1111 0000 0
* disable buffer ctrl OR[19] = 0
- * CSNT OR[20] = 1
- * ACS OR[21:22] = 11
- * XACS OR[23] = 1
+ * CSNT OR[20] = 1
+ * ACS OR[21:22] = 11
+ * XACS OR[23] = 1
* SCY 15 wait states OR[24:27] = 1111 max is suboptimal but safe
- * SETA OR[28] = 0
- * TRLX OR[29] = 1
- * EHTR OR[30] = 1
- * EAD extra time OR[31] = 1
+ * SETA OR[28] = 0
+ * TRLX OR[29] = 1
+ * EHTR OR[30] = 1
+ * EAD extra time OR[31] = 1
*
- * 0 4 8 12 16 20 24 28
+ * 0 4 8 12 16 20 24 28
* 1111 1111 1111 0000 0000 1111 1111 0111 = fff00ff7
*/
#define CADMUS_BASE_ADDR 0xf8000000
-#define CFG_BR3_PRELIM 0xf8000801
-#define CFG_OR3_PRELIM 0xfff00ff7
+#define CFG_BR3_PRELIM 0xf8000801
+#define CFG_OR3_PRELIM 0xfff00ff7
#define CONFIG_L1_INIT_RAM
-#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_LOCK 1
#define CFG_INIT_RAM_ADDR 0xe4010000 /* Initial RAM address */
-#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
+#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
-#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
+#define CFG_INIT_L2_ADDR 0xf8f80000 /* relocate boot L2SRAM */
+
+#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
/* Serial Port */
-#define CONFIG_CONS_INDEX 2
+#define CONFIG_CONS_INDEX 2
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CFG_NS16550
#define CFG_NS16550_SERIAL
-#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_REG_SIZE 1
#define CFG_NS16550_CLK get_bus_freq(0)
-#define CFG_BAUDRATE_TABLE \
+#define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
-#define CFG_NS16550_COM1 (CFG_CCSRBAR+0x4500)
-#define CFG_NS16550_COM2 (CFG_CCSRBAR+0x4600)
+#define CFG_NS16550_COM1 (CFG_CCSRBAR+0x4500)
+#define CFG_NS16550_COM2 (CFG_CCSRBAR+0x4600)
/* Use the HUSH parser */
#define CFG_HUSH_PARSER
-#ifdef CFG_HUSH_PARSER
+#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
@@ -318,9 +336,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8548@0"
#define OF_SOC "soc8548@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -331,55 +346,74 @@
*/
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
-#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_EEPROM_ADDR 0x57
#define CFG_I2C_SLAVE 0x7F
-#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C_OFFSET 0x3000
/*
* General PCI
* Memory space is mapped 1-1, but I/O space must start from 0.
*/
+#define CFG_PCI_PHYS 0x80000000 /* 1G PCI TLB */
+
#define CFG_PCI1_MEM_BASE 0x80000000
#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
#define CFG_PCI1_IO_BASE 0x00000000
#define CFG_PCI1_IO_PHYS 0xe2000000
-#define CFG_PCI1_IO_SIZE 0x00800000 /* 8M */
+#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */
-#define CFG_PCI2_MEM_BASE 0x90000000
+#ifdef CONFIG_PCI2
+#define CFG_PCI2_MEM_BASE 0xa0000000
#define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */
#define CFG_PCI2_IO_BASE 0x00000000
#define CFG_PCI2_IO_PHYS 0xe2800000
-#define CFG_PCI2_IO_SIZE 0x00800000 /* 8M */
+#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */
+#endif
-#define CFG_PEX_MEM_BASE 0xa0000000
-#define CFG_PEX_MEM_PHYS CFG_PEX_MEM_BASE
-#define CFG_PEX_MEM_SIZE 0x20000000 /* 512M */
-#define CFG_PEX_IO_BASE 0x00000000
-#define CFG_PEX_IO_PHYS 0xe3000000
-#define CFG_PEX_IO_SIZE 0x01000000 /* 16M */
+#ifdef CONFIG_PCIE1
+#define CFG_PCIE1_MEM_BASE 0xa0000000
+#define CFG_PCIE1_MEM_PHYS CFG_PCIE1_MEM_BASE
+#define CFG_PCIE1_MEM_SIZE 0x20000000 /* 512M */
+#define CFG_PCIE1_IO_BASE 0x00000000
+#define CFG_PCIE1_IO_PHYS 0xe3000000
+#define CFG_PCIE1_IO_SIZE 0x00100000 /* 1M */
+#endif
+#ifdef CONFIG_RIO
/*
* RapidIO MMU
*/
#define CFG_RIO_MEM_BASE 0xC0000000
#define CFG_RIO_MEM_SIZE 0x20000000 /* 512M */
+#endif
+
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
#if defined(CONFIG_PCI)
#define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_85XX_PCI2
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
#undef CONFIG_EEPRO100
#undef CONFIG_TULIP
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
+
+/* PCI view of System Memory */
+#define CFG_PCI_MEMORY_BUS 0x00000000
+#define CFG_PCI_MEMORY_PHYS 0x00000000
+#define CFG_PCI_MEMORY_SIZE 0x80000000
#endif /* CONFIG_PCI */
@@ -387,18 +421,18 @@
#if defined(CONFIG_TSEC_ENET)
#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI 1
+#define CONFIG_NET_MULTI 1
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "eTSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "eTSEC1"
-#define CONFIG_MPC85XX_TSEC3 1
-#define CONFIG_MPC85XX_TSEC3_NAME "eTSEC2"
-#undef CONFIG_MPC85XX_TSEC4
-#define CONFIG_MPC85XX_TSEC4_NAME "eTSEC3"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "eTSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "eTSEC1"
+#define CONFIG_TSEC3 1
+#define CONFIG_TSEC3_NAME "eTSEC2"
+#define CONFIG_TSEC4
+#define CONFIG_TSEC4_NAME "eTSEC3"
#undef CONFIG_MPC85XX_FEC
#define TSEC1_PHY_ADDR 0
@@ -410,10 +444,14 @@
#define TSEC2_PHYIDX 0
#define TSEC3_PHYIDX 0
#define TSEC4_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
+#define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
/* Options are: eTSEC[0-3] */
#define CONFIG_ETHPRIME "eTSEC0"
-
+#define CONFIG_PHY_GIGE 1 /* Include GbE speed/duplex detection */
#endif /* CONFIG_TSEC_ENET */
/*
@@ -427,19 +465,28 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -449,7 +496,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -464,12 +511,12 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization.
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -481,7 +528,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -492,58 +539,154 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET)
-#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
+#define CONFIG_HAS_ETH0
+#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
+#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
#define CONFIG_HAS_ETH2
-#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD
+#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD
#define CONFIG_HAS_ETH3
-#define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD
+#define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD
#endif
-#define CONFIG_IPADDR 192.168.1.253
+#define CONFIG_IPADDR 192.168.1.253
-#define CONFIG_HOSTNAME unknown
-#define CONFIG_ROOTPATH /nfsroot
-#define CONFIG_BOOTFILE your.uImage
+#define CONFIG_HOSTNAME unknown
+#define CONFIG_ROOTPATH /nfsroot
+#define CONFIG_BOOTFILE 8548cds/uImage.uboot
+#define CONFIG_UBOOTPATH 8548cds/u-boot.bin /* TFTP server */
-#define CONFIG_SERVERIP 192.168.1.1
+#define CONFIG_SERVERIP 192.168.1.1
#define CONFIG_GATEWAYIP 192.168.1.1
-#define CONFIG_NETMASK 255.255.255.0
+#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_LOADADDR 200000 /*default location for tftp and bootm*/
+#define CONFIG_LOADADDR 1000000 /*default location for tftp and bootm*/
-#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
-#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
+#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
#define CONFIG_BAUDRATE 115200
-#define CONFIG_EXTRA_ENV_SETTINGS \
- "netdev=eth0\0" \
- "consoledev=ttyS1\0" \
- "ramdiskaddr=600000\0" \
- "ramdiskfile=your.ramdisk.u-boot\0" \
- "fdtaddr=400000\0" \
- "fdtfile=your.fdt.dtb\0"
+#if defined(CONFIG_PCIE1)
+#define PCIE_ENV \
+ "pciereg=md ${a}000 6; md ${a}020 4; md ${a}bf8 2; echo o;md ${a}c00 25;" \
+ "echo i; md ${a}da0 15; echo e;md ${a}e00 e; echo d; md ${a}f00 c\0" \
+ "pcieerr=md ${a}020 1; md ${a}e00 e; pci d.b $b.0 7 1; pci d.w $b.0 1e 1;" \
+ "pci d.w $b.0 56 1; pci d $b.0 104 1; pci d $b.0 110 1;" \
+ "pci d $b.0 130 1\0" \
+ "pcieerrc=mw ${a}020 ffffffff; mw ${a}e00 ffffffff; pci w.b $b.0 7 ff;" \
+ "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff; pci w $b.0 104 ffffffff;"\
+ "pci w $b.0 110 ffffffff; pci w $b.0 130 ffffffff\0" \
+ "pciecfg=pci d $b.0 0 20; pci d $b.0 100 e; pci d $b.0 400 69\0" \
+ "pcie1regs=setenv a e000a; run pciereg\0" \
+ "pcie1cfg=setenv b 3; run pciecfg\0" \
+ "pcie1err=setenv a e000a; setenv b 3; run pcieerr\0" \
+ "pcie1errc=setenv a e000a; setenv b 3; run pcieerrc\0"
+#else
+#define PCIE_ENV ""
+#endif
+#if defined(CONFIG_PCI1) || defined(CONFIG_PCI2)
+#define PCI_ENV \
+ "pcireg=md ${a}000 3; echo o;md ${a}c00 25; echo i; md ${a}da0 15;" \
+ "echo e;md ${a}e00 9\0" \
+ "pcierr=md ${a}e00 8; pci d.b $b.0 7 1;pci d.w $b.0 1e 1;" \
+ "pci d.w $b.0 56 1\0" \
+ "pcierrc=mw ${a}e00 ffffffff; mw ${a}e0c 0; pci w.b $b.0 7 ff;" \
+ "pci w.w $b.0 1e ffff; pci w.w $b.0 56 ffff\0"
+#else
+#define PCI_ENV ""
+#endif
-#define CONFIG_NFSBOOTCOMMAND \
- "setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$serverip:$rootpath " \
+#if defined(CONFIG_PCI1)
+#define PCI_ENV1 \
+ "pci1regs=setenv a e0008; run pcireg\0" \
+ "pci1err=setenv a e0008; setenv b 0; run pcierr\0" \
+ "pci1errc=setenv a e0008; setenv b 0; run pcierrc\0"
+#else
+#define PCI_ENV1 ""
+#endif
+
+#if defined(CONFIG_PCI2)
+#define PCI_ENV2 \
+ "pci2regs=setenv a e0009; run pcireg\0" \
+ "pci2err=setenv a e0009; setenv b 123; run pcierr\0" \
+ "pci2errc=setenv a e0009; setenv b 123; run pcierrc\0"
+#else
+#define PCI_ENV2 ""
+#endif
+
+#if defined(CONFIG_TSEC_ENET)
+#define ENET_ENV \
+ "enetreg1=md ${a}000 2; md ${a}010 9; md ${a}050 4; md ${a}08c 1;" \
+ "md ${a}098 2\0" \
+ "enetregt=echo t;md ${a}100 6; md ${a}140 2; md ${a}180 10; md ${a}200 10\0" \
+ "enetregr=echo r;md ${a}300 6; md ${a}330 5; md ${a}380 10; md ${a}400 10\0" \
+ "enetregm=echo mac;md ${a}500 5; md ${a}520 28;echo fifo;md ${a}a00 1;" \
+ "echo mib;md ${a}680 31\0" \
+ "enetreg=run enetreg1; run enetregm; run enetregt; run enetregr\0" \
+ "enet1regs=setenv a e0024; run enetreg\0" \
+ "enet2regs=setenv a e0025; run enetreg\0" \
+ "enet3regs=setenv a e0026; run enetreg\0" \
+ "enet4regs=setenv a e0027; run enetreg\0"
+#else
+#define ENET_ENV ""
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot; " \
+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
+ "consoledev=ttyS1\0" \
+ "ramdiskaddr=2000000\0" \
+ "ramdiskfile=ramdisk.uboot\0" \
+ "fdtaddr=c00000\0" \
+ "fdtfile=mpc8548cds.dtb\0" \
+ "eoi=mw e00400b0 0\0" \
+ "iack=md e00400a0 1\0" \
+ "ddrreg=md ${a}000 8; md ${a}080 8;md ${a}100 d; md ${a}140 4; md ${a}bf0 4;" \
+ "md ${a}e00 3; md ${a}e20 3; md ${a}e40 7; md ${a}f00 5\0" \
+ "ddrregs=setenv a e0002; run ddrreg\0" \
+ "gureg=md ${a}000 2c; md ${a}0b0 1; md ${a}0c0 1; md ${a}b20 3;" \
+ "md ${a}e00 1; md ${a}e60 1; md ${a}ef0 15\0" \
+ "guregs=setenv a e00e0; run gureg\0" \
+ "ecmreg=md ${a}000 1; md ${a}010 1; md ${a}bf8 2; md ${a}e00 6\0" \
+ "ecmregs=setenv a e0001; run ecmreg\0" \
+ "lawregs=md e0000c08 4b\0" \
+ "lbcregs=md e0005000 36\0" \
+ "dma0regs=md e0021100 12\0" \
+ "dma1regs=md e0021180 12\0" \
+ "dma2regs=md e0021200 12\0" \
+ "dma3regs=md e0021280 12\0" \
+ PCIE_ENV \
+ PCI_ENV \
+ PCI_ENV1 \
+ PCI_ENV2 \
+ ENET_ENV
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
- "console=$consoledev,$baudrate $othbootargs;" \
- "tftp $loadaddr $bootfile;" \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
"tftp $fdtaddr $fdtfile;" \
"bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
- "setenv bootargs root=/dev/ram rw " \
- "console=$consoledev,$baudrate $othbootargs;" \
- "tftp $ramdiskaddr $ramdiskfile;" \
- "tftp $loadaddr $bootfile;" \
- "bootm $loadaddr $ramdiskaddr"
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
-#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
+#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
#endif /* __CONFIG_H */
diff --git a/include/configs/MPC8555CDS.h b/include/configs/MPC8555CDS.h
index 4c8b4e7..1d1b7c9 100644
--- a/include/configs/MPC8555CDS.h
+++ b/include/configs/MPC8555CDS.h
@@ -312,9 +312,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8555@0"
#define OF_SOC "soc8555@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -350,6 +347,13 @@
#define CFG_PCI2_IO_PHYS 0xe2100000
#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */
+#ifdef CONFIG_LEGACY
+#define BRIDGE_ID 17
+#define VIA_ID 2
+#else
+#define BRIDGE_ID 28
+#define VIA_ID 4
+#endif
#if defined(CONFIG_PCI)
@@ -373,17 +377,16 @@
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
-#undef CONFIG_MPC85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
-#define FEC_PHY_ADDR 3
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
-#define FEC_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
@@ -401,19 +404,28 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -423,7 +435,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -443,7 +455,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -455,7 +467,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -466,6 +478,7 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 21e6637..a8f362f 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -43,9 +43,7 @@
#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
-#undef CONFIG_TSEC_ENET /* tsec ethernet support */
-#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
-#define CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
+#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_DLL /* possible DLL fix needed */
@@ -294,9 +292,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8560@0"
#define OF_SOC "soc8560@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -349,29 +344,33 @@
#endif /* CONFIG_PCI */
-#if defined(CONFIG_TSEC_ENET)
+#ifdef CONFIG_TSEC_ENET
#ifndef CONFIG_NET_MULTI
#define CONFIG_NET_MULTI 1
#endif
+#ifndef CONFIG_MII
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
-#undef CONFIG_MPC85XX_FEC
+#endif
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
-#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
+#endif /* CONFIG_TSEC_ENET */
-#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
+#ifdef CONFIG_ETHER_ON_FCC /* CPM FCC Ethernet */
+
#undef CONFIG_ETHER_NONE /* define if ether on something else */
#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
@@ -392,7 +391,10 @@
#define FETH3_RST 0x80
#endif /* CONFIG_ETHER_INDEX */
-#define CONFIG_MII /* MII PHY management */
+#ifndef CONFIG_MII
+#define CONFIG_MII 1 /* MII PHY management */
+#endif
+
#define CONFIG_BITBANGMII /* bit-bang MII PHY management */
/*
@@ -432,46 +434,36 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #elif defined(CONFIG_TSEC_ENET)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & ~(CFG_CMD_ENV))
- #elif defined(CONFIG_ETHER_ON_FCC)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & ~(CFG_CMD_ENV))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #elif defined(CONFIG_TSEC_ENET)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #elif defined(CONFIG_ETHER_ON_FCC)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #endif
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CONFIG_ETHER_ON_FCC)
+ #define CONFIG_CMD_MII
+#endif
+
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -482,7 +474,7 @@
#define CFG_LOAD_ADDR 0x1000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -503,7 +495,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -515,7 +507,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -527,6 +519,7 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
@@ -553,9 +546,11 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
- "consoledev=ttyS0\0" \
- "ramdiskaddr=400000\0" \
- "ramdiskfile=your.ramdisk.u-boot\0"
+ "consoledev=ttyCPM\0" \
+ "ramdiskaddr=1000000\0" \
+ "ramdiskfile=your.ramdisk.u-boot\0" \
+ "fdtaddr=400000\0" \
+ "fdtfile=mpc8560ads.dtb\0"
#define CONFIG_NFSBOOTCOMMAND \
"setenv bootargs root=/dev/nfs rw " \
@@ -563,14 +558,16 @@
"ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $loadaddr $bootfile;" \
- "bootm $loadaddr"
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
#define CONFIG_RAMBOOTCOMMAND \
"setenv bootargs root=/dev/ram rw " \
"console=$consoledev,$baudrate $othbootargs;" \
"tftp $ramdiskaddr $ramdiskfile;" \
"tftp $loadaddr $bootfile;" \
- "bootm $loadaddr $ramdiskaddr"
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
#define CONFIG_BOOTCOMMAND CONFIG_NFSBOOTCOMMAND
diff --git a/include/configs/MPC8568MDS.h b/include/configs/MPC8568MDS.h
index 3f65644..ba744e9 100644
--- a/include/configs/MPC8568MDS.h
+++ b/include/configs/MPC8568MDS.h
@@ -28,20 +28,21 @@
/* High Level Configuration Options */
#define CONFIG_BOOKE 1 /* BOOKE */
-#define CONFIG_E500 1 /* BOOKE e500 family */
+#define CONFIG_E500 1 /* BOOKE e500 family */
#define CONFIG_MPC85xx 1 /* MPC8540/60/55/41/48/68 */
#define CONFIG_MPC8568 1 /* MPC8568 specific */
#define CONFIG_MPC8568MDS 1 /* MPC8568MDS board specific */
-#undef CONFIG_PCI
+#define CONFIG_PCI
#define CONFIG_TSEC_ENET /* tsec ethernet support */
+#define CONFIG_QE /* Enable QE */
#define CONFIG_ENV_OVERWRITE
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/
#define CONFIG_DDR_DLL /* possible DLL fix needed */
/*#define CONFIG_DDR_2T_TIMING Sets the 2T timing bit */
/*#define CONFIG_DDR_ECC*/ /* only for ECC DDR module */
-/*#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER*/ /* DDR controller or DMA? */
+/*#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER*/ /* DDR controller or DMA? */
#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
@@ -62,9 +63,9 @@
/*
* These can be toggled for performance analysis, otherwise use default.
*/
-/*#define CONFIG_L2_CACHE*/ /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
+#define CONFIG_L2_CACHE /* toggle L2 cache */
+#define CONFIG_BTB /* toggle branch predition */
+#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
/*
* Only possible on E500 Version 2 or newer cores.
@@ -292,11 +293,9 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8568@0"
#define OF_SOC "soc8568@e0000000"
+#define OF_QE "qe@e0080000"
#define OF_TBCLK (bd->bi_busfreq / 8)
#define OF_STDOUT_PATH "/soc8568@e0000000/serial@4600"
@@ -306,11 +305,14 @@
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
-#define CFG_I2C_EEPROM_ADDR 0x57
+#define CFG_I2C_EEPROM_ADDR 0x52
#define CFG_I2C_SLAVE 0x7F
-#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
#define CFG_I2C_OFFSET 0x3000
+#define CFG_I2C2_OFFSET 0x3100
/*
* General PCI
@@ -318,7 +320,7 @@
*/
#define CFG_PCI1_MEM_BASE 0x80000000
#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
-#define CFG_PCI1_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
#define CFG_PCI1_IO_BASE 0x00000000
#define CFG_PCI1_IO_PHYS 0xe2000000
#define CFG_PCI1_IO_SIZE 0x00800000 /* 8M */
@@ -337,6 +339,44 @@
#define CONFIG_NET_MULTI
#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#ifdef CONFIG_QE
+/*
+ * QE UEC ethernet configuration
+ */
+#define CONFIG_UEC_ETH
+#ifndef CONFIG_TSEC_ENET
+#define CONFIG_ETHPRIME "FSL UEC0"
+#endif
+#define CONFIG_PHY_MODE_NEED_CHANGE
+#define CONFIG_eTSEC_MDIO_BUS
+
+#ifdef CONFIG_eTSEC_MDIO_BUS
+#define CONFIG_MIIM_ADDRESS 0xE0024520
+#endif
+
+#define CONFIG_UEC_ETH1 /* GETH1 */
+
+#ifdef CONFIG_UEC_ETH1
+#define CFG_UEC1_UCC_NUM 0 /* UCC1 */
+#define CFG_UEC1_RX_CLK QE_CLK_NONE
+#define CFG_UEC1_TX_CLK QE_CLK16
+#define CFG_UEC1_ETH_TYPE GIGA_ETH
+#define CFG_UEC1_PHY_ADDR 7
+#define CFG_UEC1_INTERFACE_MODE ENET_1000_GMII
+#endif
+
+#define CONFIG_UEC_ETH2 /* GETH2 */
+
+#ifdef CONFIG_UEC_ETH2
+#define CFG_UEC2_UCC_NUM 1 /* UCC2 */
+#define CFG_UEC2_RX_CLK QE_CLK_NONE
+#define CFG_UEC2_TX_CLK QE_CLK16
+#define CFG_UEC2_ETH_TYPE GIGA_ETH
+#define CFG_UEC2_PHY_ADDR 1
+#define CFG_UEC2_INTERFACE_MODE ENET_1000_GMII
+#endif
+#endif /* CONFIG_QE */
+
#undef CONFIG_EEPRO100
#undef CONFIG_TULIP
@@ -345,21 +385,17 @@
#endif /* CONFIG_PCI */
-
-#if defined(CONFIG_TSEC_ENET)
-
#ifndef CONFIG_NET_MULTI
#define CONFIG_NET_MULTI 1
#endif
+#if defined(CONFIG_TSEC_ENET)
+
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "eTSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "eTSEC1"
-#undef CONFIG_MPC85XX_TSEC3
-#undef CONFIG_MPC85XX_TSEC4
-#undef CONFIG_MPC85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "eTSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "eTSEC1"
#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 3
@@ -367,7 +403,10 @@
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
-/* Options are: eTSEC[0-3] */
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+
+/* Options are: eTSEC[0-1] */
#define CONFIG_ETHPRIME "eTSEC0"
#endif /* CONFIG_TSEC_ENET */
@@ -383,19 +422,29 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -405,7 +454,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -425,7 +474,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -437,7 +486,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -447,12 +496,15 @@
*/
/* The mac addresses for all ethernet interface */
-#if defined(CONFIG_TSEC_ENET)
+#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_UEC_ETH)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:E0:0C:00:00:FD
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:E0:0C:00:01:FD
#define CONFIG_HAS_ETH2
#define CONFIG_ETH2ADDR 00:E0:0C:00:02:FD
+#define CONFIG_HAS_ETH3
+#define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD
#endif
#define CONFIG_IPADDR 192.168.1.253
diff --git a/include/configs/MPC8641HPCN.h b/include/configs/MPC8641HPCN.h
index bbe3505..7d8a380 100644
--- a/include/configs/MPC8641HPCN.h
+++ b/include/configs/MPC8641HPCN.h
@@ -46,8 +46,10 @@
#define CFG_RESET_ADDRESS 0xfff00100
-/*#undef CONFIG_PCI*/
-#define CONFIG_PCI
+#define CONFIG_PCI 1 /* Enable PCI/PCIE */
+#define CONFIG_PCI1 1 /* PCIE controler 1 (ULI bridge) */
+#define CONFIG_PCI2 1 /* PCIE controler 2 (slot) */
+#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
#define CONFIG_TSEC_ENET /* tsec ethernet support */
#define CONFIG_ENV_OVERWRITE
@@ -76,6 +78,9 @@
#define L2_ENABLE (L2CR_L2E)
#ifndef CONFIG_SYS_CLK_FREQ
+#ifndef __ASSEMBLY__
+extern unsigned long get_board_sys_clk(unsigned long dummy);
+#endif
#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
#endif
@@ -93,6 +98,9 @@
#define CFG_CCSRBAR 0xf8000000 /* relocated CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
+#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
+#define CFG_PCI2_ADDR (CFG_CCSRBAR+0x9000)
+
/*
* DDR Setup
*/
@@ -177,6 +185,7 @@
#define CFG_OR3_PRELIM 0xfff06ff7 /* 1MB PIXIS area*/
+#define CONFIG_FSL_PIXIS 1 /* use common PIXIS code */
#define PIXIS_BASE 0xf8100000 /* PIXIS registers */
#define PIXIS_ID 0x0 /* Board ID at offset 0 */
#define PIXIS_VER 0x1 /* Board version at offset 1 */
@@ -232,7 +241,7 @@
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+#define CFG_MALLOC_LEN (1024 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CONFIG_CONS_INDEX 1
@@ -260,9 +269,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8641@0"
#define OF_SOC "soc8641@f8000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
@@ -296,9 +302,9 @@
#define CFG_PCI1_MEM_BASE 0x80000000
#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
-#define CFG_PCI1_IO_BASE 0xe2000000
-#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE
-#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */
+#define CFG_PCI1_IO_BASE 0x00000000
+#define CFG_PCI1_IO_PHYS 0xe2000000
+#define CFG_PCI1_IO_SIZE 0x00100000 /* 1M */
/* PCI view of System Memory */
#define CFG_PCI_MEMORY_BUS 0x00000000
@@ -311,10 +317,10 @@
#define CFG_PCI2_MEM_BASE 0xa0000000
#define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE
-#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */
-#define CFG_PCI2_IO_BASE 0xe3000000
-#define CFG_PCI2_IO_PHYS CFG_PCI2_IO_BASE
-#define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */
+#define CFG_PCI2_MEM_SIZE 0x20000000 /* 512M */
+#define CFG_PCI2_IO_BASE 0x00000000
+#define CFG_PCI2_IO_PHYS 0xe3000000
+#define CFG_PCI2_IO_SIZE 0x00100000 /* 1M */
#if defined(CONFIG_PCI)
@@ -330,12 +336,43 @@
#undef CONFIG_EEPRO100
#undef CONFIG_TULIP
+/************************************************************
+ * USB support
+ ************************************************************/
+#define CONFIG_PCI_OHCI 1
+#define CONFIG_USB_OHCI_NEW 1
+#define CONFIG_USB_KEYBOARD 1
+#define CFG_DEVICE_DEREGISTER
+#define CFG_USB_EVENT_POLL 1
+#define CFG_USB_OHCI_SLOT_NAME "ohci_pci"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
#if !defined(CONFIG_PCI_PNP)
#define PCI_ENET0_IOADDR 0xe0000000
#define PCI_ENET0_MEMADDR 0xe0000000
#define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
#endif
+/*PCIE video card used*/
+#define VIDEO_IO_OFFSET CFG_PCI2_IO_PHYS
+
+/*PCI video card used*/
+/*#define VIDEO_IO_OFFSET CFG_PCI1_IO_PHYS*/
+
+/* video */
+#define CONFIG_VIDEO
+
+#if defined(CONFIG_VIDEO)
+#define CONFIG_BIOSEMU
+#define CONFIG_CFB_CONSOLE
+#define CONFIG_VIDEO_SW_CURSOR
+#define CONFIG_VGA_AS_SINGLE_DEVICE
+#define CONFIG_ATI_RADEON_FB
+#define CONFIG_VIDEO_LOGO
+/*#define CONFIG_CONSOLE_CURSOR*/
+#define CFG_ISA_IO_BASE_ADDRESS CFG_PCI2_IO_PHYS
+#endif
+
#undef CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CONFIG_DOS_PARTITION
@@ -349,6 +386,8 @@
#define CFG_SCSI_MAXDEVICE CFG_SCSI_MAX_DEVICE
#endif
+#define CONFIG_MPC86XX_PCI2
+
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
@@ -359,14 +398,14 @@
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC86XX_TSEC1 1
-#define CONFIG_MPC86XX_TSEC1_NAME "eTSEC1"
-#define CONFIG_MPC86XX_TSEC2 1
-#define CONFIG_MPC86XX_TSEC2_NAME "eTSEC2"
-#define CONFIG_MPC86XX_TSEC3 1
-#define CONFIG_MPC86XX_TSEC3_NAME "eTSEC3"
-#define CONFIG_MPC86XX_TSEC4 1
-#define CONFIG_MPC86XX_TSEC4_NAME "eTSEC4"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "eTSEC1"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "eTSEC2"
+#define CONFIG_TSEC3 1
+#define CONFIG_TSEC3_NAME "eTSEC3"
+#define CONFIG_TSEC4 1
+#define CONFIG_TSEC4_NAME "eTSEC4"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
@@ -376,6 +415,10 @@
#define TSEC2_PHYIDX 0
#define TSEC3_PHYIDX 0
#define TSEC4_PHYIDX 0
+#define TSEC1_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
+#define TSEC2_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
+#define TSEC3_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
+#define TSEC4_FLAGS (TSEC_GIGABIT | TSEC_REDUCED)
#define CONFIG_ETHPRIME "eTSEC1"
@@ -396,20 +439,20 @@
* 0xa000_0000 512M PCI-Express 2 Memory
* Changed it for operating from 0xd0000000
*/
-#define CFG_DBAT1L ( CFG_PCI1_MEM_BASE | BATL_PP_RW \
+#define CFG_DBAT1L ( CFG_PCI1_MEM_PHYS | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_DBAT1U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
-#define CFG_IBAT1L (CFG_PCI1_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_DBAT1U (CFG_PCI1_MEM_PHYS | BATU_BL_1G | BATU_VS | BATU_VP)
+#define CFG_IBAT1L (CFG_PCI1_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CFG_IBAT1U CFG_DBAT1U
/*
* BAT2 512M Cache-inhibited, guarded
* 0xc000_0000 512M RapidIO Memory
*/
-#define CFG_DBAT2L (CFG_RIO_MEM_BASE | BATL_PP_RW \
+#define CFG_DBAT2L (CFG_RIO_MEM_PHYS | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_DBAT2U (CFG_RIO_MEM_BASE | BATU_BL_512M | BATU_VS | BATU_VP)
-#define CFG_IBAT2L (CFG_RIO_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_DBAT2U (CFG_RIO_MEM_PHYS | BATU_BL_512M | BATU_VS | BATU_VP)
+#define CFG_IBAT2L (CFG_RIO_MEM_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CFG_IBAT2U CFG_DBAT2U
/*
@@ -428,10 +471,10 @@
* 0xe300_0000 16M PCI-Express 2 I/0
* Note that this is at 0xe0000000
*/
-#define CFG_DBAT4L ( CFG_PCI1_IO_BASE | BATL_PP_RW \
+#define CFG_DBAT4L ( CFG_PCI1_IO_PHYS | BATL_PP_RW \
| BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
-#define CFG_DBAT4U (CFG_PCI1_IO_BASE | BATU_BL_32M | BATU_VS | BATU_VP)
-#define CFG_IBAT4L (CFG_PCI1_IO_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_DBAT4U (CFG_PCI1_IO_PHYS | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CFG_IBAT4L (CFG_PCI1_IO_PHYS | BATL_PP_RW | BATL_CACHEINHIBIT)
#define CFG_IBAT4U CFG_DBAT4U
/*
@@ -463,8 +506,8 @@
*/
#ifndef CFG_RAMBOOT
#define CFG_ENV_IS_IN_FLASH 1
- #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
- #define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
+ #define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x60000)
+ #define CFG_ENV_SECT_SIZE 0x10000 /* 64K(one sector) for env */
#define CFG_ENV_SIZE 0x2000
#else
#define CFG_ENV_IS_NOWHERE 1 /* Store ENV in memory only */
@@ -475,39 +518,34 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C \
- | CFG_CMD_SCSI \
- | CFG_CMD_EXT2) \
- & \
- ~(CFG_CMD_ENV))
- #else
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_SCSI \
- | CFG_CMD_EXT2)
- #else
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #endif
+ #undef CONFIG_CMD_ENV
#endif
-#include <cmd_confdefs.h>
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
+ #define CONFIG_CMD_SCSI
+ #define CONFIG_CMD_EXT2
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -518,7 +556,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -539,8 +577,8 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
+#if defined(CONFIG_CMD_KGDB)
+ #define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
/*
@@ -551,9 +589,9 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
-#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#if defined(CONFIG_CMD_KGDB)
+ #define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+ #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*
@@ -568,6 +606,7 @@
#define CONFIG_ETH3ADDR 00:E0:0C:00:03:FD
#endif
+#define CONFIG_HAS_ETH0 1
#define CONFIG_HAS_ETH1 1
#define CONFIG_HAS_ETH2 1
#define CONFIG_HAS_ETH3 1
@@ -577,6 +616,7 @@
#define CONFIG_HOSTNAME unknown
#define CONFIG_ROOTPATH /opt/nfsroot
#define CONFIG_BOOTFILE uImage
+#define CONFIG_UBOOTPATH u-boot.bin /* U-Boot image on TFTP server */
#define CONFIG_SERVERIP 192.168.1.1
#define CONFIG_GATEWAYIP 192.168.1.1
@@ -592,10 +632,17 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
+ "uboot=" MK_STR(CONFIG_UBOOTPATH) "\0" \
+ "tftpflash=tftpboot $loadaddr $uboot; " \
+ "protect off " MK_STR(TEXT_BASE) " +$filesize; " \
+ "erase " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize; " \
+ "protect on " MK_STR(TEXT_BASE) " +$filesize; " \
+ "cmp.b $loadaddr " MK_STR(TEXT_BASE) " $filesize\0" \
"consoledev=ttyS0\0" \
"ramdiskaddr=2000000\0" \
"ramdiskfile=your.ramdisk.u-boot\0" \
- "dtbaddr=400000\0" \
+ "dtbaddr=c00000\0" \
"dtbfile=mpc8641_hpcn.dtb\0" \
"en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \
"dis-wd=mw.b f8100010 0x00; echo -expect:- 00; md.b f8100010 1\0" \
diff --git a/include/configs/MUSENKI.h b/include/configs/MUSENKI.h
index da52e0e..f8cf01e 100644
--- a/include/configs/MUSENKI.h
+++ b/include/configs/MUSENKI.h
@@ -52,11 +52,20 @@
#define CONFIG_BOOTDELAY 5
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
/*
@@ -280,7 +289,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/MVBLUE.h b/include/configs/MVBLUE.h
index 88eefa1..0defafe 100644
--- a/include/configs/MVBLUE.h
+++ b/include/configs/MVBLUE.h
@@ -76,15 +76,44 @@
#define CONFIG_ZERO_BOOTDELAY_CHECK
#define CONFIG_RESET_TO_RETRY 60
-#define CONFIG_COMMANDS ( CFG_CMD_ASKENV | CFG_CMD_BOOTD | CFG_CMD_CACHE | CFG_CMD_DHCP | \
- CFG_CMD_ECHO | CFG_CMD_ENV | CFG_CMD_FLASH | CFG_CMD_IMI | \
- CFG_CMD_IRQ | CFG_CMD_NET | CFG_CMD_PCI | CFG_CMD_RUN )
+
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_RUN
-#define CONFIG_BOOTP_MASK ( 0xffffffff )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_NISDOMAIN
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_BOOTP_NTPSERVER
+#define CONFIG_BOOTP_TIMEOFFSET
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
@@ -310,7 +339,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/MVS1.h b/include/configs/MVS1.h
index 5995918..75efd1e 100644
--- a/include/configs/MVS1.h
+++ b/include/configs/MVS1.h
@@ -63,27 +63,36 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_VENDOREX )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_VENDOREX
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-/* MVsensor uses a really minimal U-Boot ! */
-#define CONFIG_COMMANDS (CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_IMI | \
- CFG_CMD_FLASH | \
- CFG_CMD_MEMORY | \
- CFG_CMD_NET | \
- CFG_CMD_DHCP | \
- CFG_CMD_ENV | \
- CFG_CMD_BOOTD | \
- CFG_CMD_RUN )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_RUN
+
/*
* Miscellaneous configurable options
@@ -96,7 +105,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -172,7 +181,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NC650.h b/include/configs/NC650.h
index a12c8da..c051a35 100644
--- a/include/configs/NC650.h
+++ b/include/configs/NC650.h
@@ -85,7 +85,15 @@
#undef CONFIG_STATUS_LED /* Status LED disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_FEC_ENET 1 /* use FEC ethernet */
#define FEC_ENET
@@ -134,25 +142,28 @@
#define CONFIG_RTC_PCF8563
#define CFG_I2C_RTC_ADDR 0x51
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_NAND | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -230,7 +241,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NETPHONE.h b/include/configs/NETPHONE.h
index 444f721..bb3d19d 100644
--- a/include/configs/NETPHONE.h
+++ b/include/configs/NETPHONE.h
@@ -82,7 +82,15 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE | CONFIG_BOOTP_NISDOMAIN)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_NISDOMAIN
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
@@ -105,20 +113,22 @@
#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_NAND | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_MII | \
- CFG_CMD_CDP \
- )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_CDP
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -128,7 +138,7 @@
#define CFG_HUSH_PARSER 1
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -220,7 +230,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NETTA.h b/include/configs/NETTA.h
index 25b6345..19743c0 100644
--- a/include/configs/NETTA.h
+++ b/include/configs/NETTA.h
@@ -77,7 +77,16 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE | CONFIG_BOOTP_NISDOMAIN)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_NISDOMAIN
+
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
@@ -111,26 +120,28 @@
CFG_POST_CODEC | \
CFG_POST_DSP )
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_CDP | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_FAT | \
- CFG_CMD_IDE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NAND | \
- CFG_CMD_NFS | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_PING | \
- 0)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CDP
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_PING
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -140,7 +151,7 @@
#define CFG_HUSH_PARSER 1
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -223,7 +234,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NETTA2.h b/include/configs/NETTA2.h
index e20e724..fb8085d 100644
--- a/include/configs/NETTA2.h
+++ b/include/configs/NETTA2.h
@@ -82,7 +82,16 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE | CONFIG_BOOTP_NISDOMAIN)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_NISDOMAIN
+
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
@@ -105,20 +114,22 @@
#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_NAND | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_MII | \
- CFG_CMD_CDP \
- )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_CDP
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -128,7 +139,7 @@
#define CFG_HUSH_PARSER 1
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -220,7 +231,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NETVIA.h b/include/configs/NETVIA.h
index e30be09..d4cb9e7 100644
--- a/include/configs/NETVIA.h
+++ b/include/configs/NETVIA.h
@@ -81,35 +81,45 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE | CONFIG_BOOTP_NISDOMAIN)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_NISDOMAIN
+
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS_BASE ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
#if defined(CONFIG_NETVIA_VERSION) && CONFIG_NETVIA_VERSION >= 2
-#define CONFIG_COMMANDS (CONFIG_COMMANDS_BASE | CFG_CMD_NAND)
-#else
-#define CONFIG_COMMANDS CONFIG_COMMANDS_BASE
+#define CONFIG_CMD_NAND
#endif
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -192,7 +202,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NSCU.h b/include/configs/NSCU.h
index d994420..4cd4472 100644
--- a/include/configs/NSCU.h
+++ b/include/configs/NSCU.h
@@ -84,7 +84,15 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -93,16 +101,19 @@
#define CONFIG_ISP1362_USB /* ISP1362 USB OTG controller */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -117,7 +128,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -201,7 +212,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/NX823.h b/include/configs/NX823.h
index 1cb8b8f..524aa06 100644
--- a/include/configs/NX823.h
+++ b/include/configs/NX823.h
@@ -55,22 +55,35 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
#undef CONFIG_WATCHDOG /* watchdog disabled, for now */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_AUTOSCRIPT)
#define CONFIG_AUTOSCRIPT
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_AUTOSCRIPT
+
+
/* call various generic functions */
#define CONFIG_MISC_INIT_R
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -152,7 +165,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h
index aa9d1ba..5840ea2 100644
--- a/include/configs/OCRTC.h
+++ b/include/configs/OCRTC.h
@@ -54,20 +54,32 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ASKENV | \
- CFG_CMD_ELF | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -77,7 +89,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -215,7 +227,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h
index 2e7c505..937df22 100644
--- a/include/configs/ORSG.h
+++ b/include/configs/ORSG.h
@@ -54,20 +54,32 @@
#define CONFIG_PHY_ADDR 0 /* PHY address */
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ASKENV | \
- CFG_CMD_ELF | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
@@ -77,7 +89,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -213,7 +225,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/OXC.h b/include/configs/OXC.h
index 787407c..8d61bcd 100644
--- a/include/configs/OXC.h
+++ b/include/configs/OXC.h
@@ -51,10 +51,23 @@
#define CONFIG_BAUDRATE 9600
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_ELF)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+
/*
* Miscellaneous configurable options
@@ -299,7 +312,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/P3G4.h b/include/configs/P3G4.h
index a933e1b..ef970f1 100644
--- a/include/configs/P3G4.h
+++ b/include/configs/P3G4.h
@@ -120,30 +120,40 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_ALTIVEC /* undef to disable */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_UNIVERSE| \
- CFG_CMD_BSP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_UNIVERSE
+#define CONFIG_CMD_BSP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -396,7 +406,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PATI.h b/include/configs/PATI.h
index d88fff3..0de7591 100644
--- a/include/configs/PATI.h
+++ b/include/configs/PATI.h
@@ -39,14 +39,35 @@
#define CONFIG_BAUDRATE 9600
-#define CONFIG_COMMANDS (CFG_CMD_MEMORY | CFG_CMD_LOADB | CFG_CMD_REGINFO | \
- CFG_CMD_FLASH | CFG_CMD_LOADS | CFG_CMD_ENV | CFG_CMD_REGINFO | \
- CFG_CMD_BDI | CFG_CMD_CONSOLE | CFG_CMD_RUN | CFG_CMD_BSP | \
- CFG_CMD_IMI | CFG_CMD_EEPROM | CFG_CMD_IRQ | CFG_CMD_MISC \
-)
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MISC
+
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
@@ -71,7 +92,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "pati=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h
index 027dd22..d6e7082 100644
--- a/include/configs/PCI405.h
+++ b/include/configs/PCI405.h
@@ -68,17 +68,29 @@
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -97,7 +109,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -244,7 +256,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PCI5441.h b/include/configs/PCI5441.h
index 3a7f7f0..24b25d9 100644
--- a/include/configs/PCI5441.h
+++ b/include/configs/PCI5441.h
@@ -122,22 +122,32 @@
#define CFG_NIOS_TMRCNT (CFG_NIOS_TMRMS * (CONFIG_SYS_CLK_FREQ/1000))
#define CFG_HZ (CONFIG_SYS_CLK_FREQ/(CFG_NIOS_TMRCNT + 1))
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_ECHO | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IRQ | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_RUN | \
- CFG_CMD_SAVES )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+
/*------------------------------------------------------------------------
* MISC
diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h
index 3a97fbc..268b034 100644
--- a/include/configs/PCIPPC2.h
+++ b/include/configs/PCIPPC2.h
@@ -53,30 +53,37 @@
#define CONFIG_PREBOOT ""
#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_ELF | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
- */
-#include <cmd_confdefs.h>
-
#define CFG_NAND_LEGACY
/*
@@ -223,7 +230,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h
index 130beb7..250b586 100644
--- a/include/configs/PCIPPC6.h
+++ b/include/configs/PCIPPC6.h
@@ -53,32 +53,39 @@
#define CONFIG_PREBOOT ""
#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_ELF | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SCSI | \
- CFG_CMD_SNTP )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SCSI
+#define CONFIG_CMD_SNTP
#define CONFIG_PCI 1
#define CONFIG_PCI_PNP 1 /* PCI plug-and-play */
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
- */
-#include <cmd_confdefs.h>
-
#define CFG_NAND_LEGACY
/*
@@ -225,7 +232,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h
index 806e95f..efa0157 100644
--- a/include/configs/PIP405.h
+++ b/include/configs/PIP405.h
@@ -40,33 +40,42 @@
***********************************************************/
#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
-/***********************************************************
- * Command definitions
- ***********************************************************/
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_IDE | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_CACHE | \
- CFG_CMD_IRQ | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_REGINFO | \
- CFG_CMD_FDC | \
- CFG_CMD_SCSI | \
- CFG_CMD_FAT | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF | \
- CFG_CMD_USB | \
- CFG_CMD_MII | \
- CFG_CMD_SDRAM | \
- CFG_CMD_DOC | \
- CFG_CMD_PING | \
- CFG_CMD_SAVES | \
- CFG_CMD_BSP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_FDC
+#define CONFIG_CMD_SCSI
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_BSP
+
#define CFG_NAND_LEGACY
@@ -150,7 +159,7 @@
**********************************************************/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -227,7 +236,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -366,7 +375,7 @@
/************************************************************
* Debug support
************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/PK1C20.h b/include/configs/PK1C20.h
index 83a7ec2..d90351a 100644
--- a/include/configs/PK1C20.h
+++ b/include/configs/PK1C20.h
@@ -160,30 +160,41 @@
#define CONFIG_IPADDR 192.168.2.21
#define CONFIG_SERVERIP 192.168.2.16
-/*------------------------------------------------------------------------
- * COMMANDS
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IRQ | \
- CFG_CMD_LOADS | \
- CFG_CMD_LOADB | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_RUN | \
- CFG_CMD_SAVES )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_SAVES
+
/*------------------------------------------------------------------------
* COMPACT FLASH
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
#define CONFIG_IDE_PREINIT /* Implement id_preinit */
#define CFG_IDE_MAXBUS 1 /* 1 IDE bus */
#define CFG_IDE_MAXDEVICE 1 /* 1 drive per IDE bus */
@@ -201,12 +212,12 @@
#define CFG_CF_POWER 0x00900890 /* CF Power FET PIO base*/
#define CFG_CF_ATASEL 0x009008a0 /* CF ATASEL PIO base */
-#endif /* CONFIG_COMMANDS & CFG_CMD_IDE */
+#endif
/*------------------------------------------------------------------------
* JFFS2
*----------------------------------------------------------------------*/
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#define CFG_JFFS_CUSTOM_PART /* board defined part */
#endif
diff --git a/include/configs/PLU405.h b/include/configs/PLU405.h
index d02c39b..652210c 100644
--- a/include/configs/PLU405.h
+++ b/include/configs/PLU405.h
@@ -61,19 +61,34 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -81,10 +96,6 @@
#define CONFIG_SUPPORT_VFAT
#define CONFIG_AUTO_UPDATE 1 /* autoupdate via compactflash */
-#define CONFIG_AUTO_UPDATE_SHOW 1 /* use board show routine */
-
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -104,7 +115,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -156,38 +167,18 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#define CFG_NAND_LEGACY
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff
@@ -264,11 +255,6 @@
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
-#if 0 /* test-only */
-#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */
-#define CFG_JFFS2_NUM_BANKS 1 /* ! second bank contains U-Boot */
-#endif
-
/*-----------------------------------------------------------------------
* Start addresses for the final memory configuration
* (Set up by the startup code)
@@ -294,9 +280,6 @@
#define CFG_ENV_SIZE 0x700 /* 2048 bytes may be used for env vars*/
/* total size of a CAT24WC16 is 2048 bytes */
-#define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */
-#define CFG_NVRAM_SIZE 242 /* NVRAM size */
-
/*-----------------------------------------------------------------------
* I2C EEPROM (CAT24WC16) for environment
*/
@@ -305,7 +288,7 @@
#define CFG_I2C_SLAVE 0x7F
#define CFG_I2C_EEPROM_ADDR 0x50 /* EEPROM CAT24WC08 */
-#if 1 /* test-only */
+
/* CAT24WC08/16... */
#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
/* mask of address bits that overflow into the "EEPROM chip address" */
@@ -313,15 +296,6 @@
#define CFG_EEPROM_PAGE_WRITE_BITS 4 /* The Catalyst CAT24WC08 has */
/* 16 byte page write mode using*/
/* last 4 bits of the address */
-#else
-/* CAT24WC32/64... */
-#define CFG_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
-/* mask of address bits that overflow into the "EEPROM chip address" */
-#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
-#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
- /* 32 byte page write mode using*/
- /* last 5 bits of the address */
-#endif
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
#define CFG_EEPROM_PAGE_WRITE_ENABLE
@@ -331,7 +305,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PM520.h b/include/configs/PM520.h
index 9c241e6..5ba8f4a 100644
--- a/include/configs/PM520.h
+++ b/include/configs/PM520.h
@@ -40,11 +40,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -77,12 +72,6 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#undef CONFIG_NS8382X
-#define ADD_PCI_CMD CFG_CMD_PCI
-
-#else /* MPC5100 */
-
-#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
-
#endif
/* Partitions */
@@ -91,39 +80,48 @@
/* USB */
#if 1
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
#endif
-#if defined(CONFIG_BOOT_ROM)
-#define ADD_DOC_CMD 0
-#else
-#define ADD_DOC_CMD CFG_CMD_DOC
+#if !defined(CONFIG_BOOT_ROM)
/* DoC requires legacy NAND for now */
#define CFG_NAND_LEGACY
#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_DOC_CMD | \
- ADD_PCI_CMD | \
- ADD_USB_CMD | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
+
+#if !defined(CONFIG_BOOT_ROM)
+#define CONFIG_CMD_DOC
+#endif
+
+#if defined(CONFIG_MPC5200)
+#define CONFIG_CMD_PCI
+#endif
+
/*
* Autobooting
@@ -160,7 +158,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
* I2C configuration
@@ -294,7 +292,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -310,6 +308,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/PM826.h b/include/configs/PM826.h
index 88fdb51..c80b153 100644
--- a/include/configs/PM826.h
+++ b/include/configs/PM826.h
@@ -103,8 +103,7 @@
* - CONFIG_NET_MULTI must be defined
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#define CONFIG_NET_MULTI
#undef CONFIG_ETHER_NONE /* define if ether on something else */
@@ -152,33 +151,34 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
#ifdef CONFIG_PCI
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
-#else /* ! PCI */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#endif /* CONFIG_PCI */
+#define CONFIG_CMD_PCI
+#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CFG_NAND_LEGACY
@@ -197,7 +197,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -345,7 +345,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PM828.h b/include/configs/PM828.h
index 37ee977..8f5be5f 100644
--- a/include/configs/PM828.h
+++ b/include/configs/PM828.h
@@ -103,8 +103,7 @@
* - CONFIG_NET_MULTI must be defined
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#define CONFIG_NET_MULTI
#undef CONFIG_ETHER_NONE /* define if ether on something else */
@@ -152,33 +151,34 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
#ifdef CONFIG_PCI
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
-#else /* ! PCI */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#endif /* CONFIG_PCI */
+#define CONFIG_CMD_PCI
+#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Disk-On-Chip configuration
@@ -196,7 +196,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -338,7 +338,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PM854.h b/include/configs/PM854.h
index 4fb5440..a6a1e73 100644
--- a/include/configs/PM854.h
+++ b/include/configs/PM854.h
@@ -262,23 +262,27 @@
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
#define CONFIG_MPC85XX_FEC 1
#define CONFIG_MPC85XX_FEC_NAME "FEC"
#define FEC_PHY_ADDR 3
#define FEC_PHYIDX 0
+#define FEC_FLAGS 0
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
+#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1 1
#define CONFIG_HAS_ETH2 1
@@ -303,43 +307,36 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #else
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_EEPROM \
- | CFG_CMD_DATE \
- | CFG_CMD_MII \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #else
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_EEPROM \
- | CFG_CMD_DATE \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -350,7 +347,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -372,7 +369,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -384,7 +381,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/PM856.h b/include/configs/PM856.h
index 87ab934..9a17e3d 100644
--- a/include/configs/PM856.h
+++ b/include/configs/PM856.h
@@ -258,15 +258,16 @@
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
-#undef CONFIG_MPC85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 0
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
#endif /* CONFIG_TSEC_ENET */
@@ -306,41 +307,35 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #else
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_EEPROM \
- | CFG_CMD_DATE \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #else
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_EEPROM \
- | CFG_CMD_DATE \
- | CFG_CMD_PING \
- | CFG_CMD_I2C)
- #endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -351,7 +346,7 @@
#define CFG_LOAD_ADDR 0x1000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -373,7 +368,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -385,7 +380,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -397,6 +392,7 @@
/* The mac addresses for all ethernet interface */
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:40:42:01:00:00
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:40:42:01:00:01
diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h
index 6e0bd7f..b29f368 100644
--- a/include/configs/PMC405.h
+++ b/include/configs/PMC405.h
@@ -63,25 +63,37 @@
#define CONFIG_NETCONSOLE /* include NetConsole support */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_I2C | \
- CFG_CMD_PING | \
- CFG_CMD_UNIVERSE | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_UNIVERSE
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/
@@ -100,7 +112,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -263,7 +275,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PN62.h b/include/configs/PN62.h
index a717659..72acf5a 100644
--- a/include/configs/PN62.h
+++ b/include/configs/PN62.h
@@ -42,15 +42,29 @@
#define CONFIG_CONS_INDEX 1
-#define REMOVE_COMMANDS ( CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_LOADS | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMLS )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & ~REMOVE_COMMANDS) |\
- CFG_CMD_PCI |\
- CFG_CMD_BSP)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_BSP
+
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_ENV
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+
#define CONFIG_BAUDRATE 19200 /* console baudrate */
@@ -82,10 +96,6 @@
"loadp 200000; bootm"
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-
/*
* Miscellaneous configurable options
*/
@@ -287,7 +297,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/PPChameleonEVB.h b/include/configs/PPChameleonEVB.h
index 16e2cc6..8a74c4f 100644
--- a/include/configs/PPChameleonEVB.h
+++ b/include/configs/PPChameleonEVB.h
@@ -113,26 +113,38 @@
#endif
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NAND | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_RTC_M41T11 1 /* uses a M41T00 RTC */
@@ -162,7 +174,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -417,6 +429,8 @@
#define CFG_ENV_ADDR_REDUND 0xFFFFA000
#define CFG_ENV_SIZE_REDUND 0x2000
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
#endif /* ENVIRONMENT_IN_EEPROM */
@@ -446,7 +460,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/QS823.h b/include/configs/QS823.h
index 235bc48..3657fea 100644
--- a/include/configs/QS823.h
+++ b/include/configs/QS823.h
@@ -189,27 +189,37 @@
#undef CONFIG_STATUS_LED /* Status LED disabled */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_BOOTD | \
- CFG_CMD_CONSOLE | \
- CFG_CMD_DATE | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IMMAP | \
- CFG_CMD_MEMORY | \
- CFG_CMD_NET | \
- CFG_CMD_RUN)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_RUN
+
/*-----------------------------------------------------------------------
* Environment variable storage is in FLASH, one sector before U-boot
@@ -228,7 +238,7 @@
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -303,7 +313,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/QS850.h b/include/configs/QS850.h
index 967582b..3db539f 100644
--- a/include/configs/QS850.h
+++ b/include/configs/QS850.h
@@ -189,27 +189,37 @@
#undef CONFIG_STATUS_LED /* Status LED disabled */
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_BOOTD | \
- CFG_CMD_CONSOLE | \
- CFG_CMD_DATE | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IMMAP | \
- CFG_CMD_MEMORY | \
- CFG_CMD_NET | \
- CFG_CMD_RUN)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_RUN
+
/*-----------------------------------------------------------------------
* Environment variable storage is in FLASH, one sector before U-boot
@@ -228,7 +238,7 @@
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -303,7 +313,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/QS860T.h b/include/configs/QS860T.h
index 32faa61..b3442de 100644
--- a/include/configs/QS860T.h
+++ b/include/configs/QS860T.h
@@ -92,23 +92,33 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ASKENV | \
- CFG_CMD_NET | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
/* TODO */
@@ -136,7 +146,7 @@
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -210,7 +220,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/R360MPI.h b/include/configs/R360MPI.h
index 82228c0..a98b4af 100644
--- a/include/configs/R360MPI.h
+++ b/include/configs/R360MPI.h
@@ -79,7 +79,14 @@
#define CONFIG_CAN_DRIVER /* CAN Driver support enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -111,20 +118,23 @@
#define CFG_I2C_KEY_ADDR 0x9 /* Keyboard coprocessor */
#define CFG_I2C_TEM_ADDR 0x49 /* Temperature Sensors */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NFS | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BMP
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -134,7 +144,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -223,12 +233,13 @@
#define CFG_ENV_OFFSET 0x40000 /* Offset of Environment */
#define CFG_ENV_SECT_SIZE 0x20000 /* Total Size of Environment sector */
#define CFG_ENV_SIZE 0x4000 /* Used Size of Environment sector */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/RBC823.h b/include/configs/RBC823.h
index 242c837..2f6de81 100644
--- a/include/configs/RBC823.h
+++ b/include/configs/RBC823.h
@@ -79,7 +79,15 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#undef CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -94,42 +102,45 @@
#define CFG_EEPROM_WRITE_BITS 4
#define CFG_EEPROM_WRITE_DELAY_MS 10
-#define CONFIG_COMMANDS ( CFG_CMD_ALL & \
- ~CFG_CMD_BSP & \
- ~CFG_CMD_DATE & \
- ~CFG_CMD_DISPLAY& \
- ~CFG_CMD_DTT & \
- ~CFG_CMD_EXT2 & \
- ~CFG_CMD_FDC & \
- ~CFG_CMD_FDOS & \
- ~CFG_CMD_HWFLOW & \
- ~CFG_CMD_IDE & \
- ~CFG_CMD_IRQ & \
- ~CFG_CMD_JFFS2 & \
- ~CFG_CMD_MII & \
- ~CFG_CMD_MMC & \
- ~CFG_CMD_NAND & \
- ~CFG_CMD_PCI & \
- ~CFG_CMD_PCMCIA & \
- ~CFG_CMD_REISER & \
- ~CFG_CMD_SCSI & \
- ~CFG_CMD_SETGETDCR & \
- ~CFG_CMD_SNTP & \
- ~CFG_CMD_SPI & \
- ~CFG_CMD_UNIVERSE & \
- ~CFG_CMD_USB & \
- ~CFG_CMD_VFD & \
- ~CFG_CMD_XIMG )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#undef CONFIG_CMD_BSP
+#undef CONFIG_CMD_DATE
+#undef CONFIG_CMD_DISPLAY
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_IRQ
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_MFSL
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_SNTP
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_UNIVERSE
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_XIMG
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -205,7 +216,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/RPXClassic.h b/include/configs/RPXClassic.h
index 591382c..793b1db 100644
--- a/include/configs/RPXClassic.h
+++ b/include/configs/RPXClassic.h
@@ -88,15 +88,26 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_CLOCKS_IN_MHZ 1 /* clocks passsed to Linux in MHz */
-#define CONFIG_COMMANDS ((CFG_CMD_ALL & ~CFG_CMD_NONSTD) | CFG_CMD_ELF)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_ELF
+
/*
* Miscellaneous configurable options
@@ -104,7 +115,7 @@
#define CFG_RESET_ADDRESS 0x80000000
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -182,7 +193,7 @@
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0xFF000000
-#if defined(DEBUG) || defined (CONFIG_VIDEO_SED13806) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG) || defined (CONFIG_VIDEO_SED13806) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
@@ -222,7 +233,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/RPXlite.h b/include/configs/RPXlite.h
index 48ada0e..3c5e6b8 100644
--- a/include/configs/RPXlite.h
+++ b/include/configs/RPXlite.h
@@ -62,17 +62,28 @@
#define CONFIG_BZIP2 /* Include support for bzip2 compressed images */
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -154,7 +165,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/RPXlite_DW.h b/include/configs/RPXlite_DW.h
index 3102547..872765c 100644
--- a/include/configs/RPXlite_DW.h
+++ b/include/configs/RPXlite_DW.h
@@ -115,29 +115,36 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_STATUS_LED /* disturbs display. Status LED disabled. */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#if 1 /* Enable this stuff could make image enlarge about 25KB. Mask it if you
don't want the advanced function */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_DHCP
+
#ifdef CONFIG_SPLASH_SCREEN
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BMP | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_PING | \
- CFG_CMD_ELF | \
- CFG_CMD_REGINFO | \
- CFG_CMD_DHCP )
-#else
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_PING | \
- CFG_CMD_ELF | \
- CFG_CMD_REGINFO | \
- CFG_CMD_DHCP )
-#endif /* CONFIG_SPLASH_SCREEN */
+#define CONFIG_CMD_BMP
+#endif
+
/* test-only */
#define CFG_JFFS2_FIRST_BANK 0 /* use for JFFS2 */
@@ -147,16 +154,13 @@
#endif /* 1 */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "u-boot>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -200,7 +204,7 @@
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0xFF000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
@@ -239,7 +243,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/RPXsuper.h b/include/configs/RPXsuper.h
index 45907aa..dfadd2a 100644
--- a/include/configs/RPXsuper.h
+++ b/include/configs/RPXsuper.h
@@ -91,8 +91,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
@@ -150,13 +149,28 @@
/* Monitor Command Prompt */
#define CFG_PROMPT "=> "
-/* What U-Boot subsytems do you want enabled? */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ASKENV | \
- CFG_CMD_I2C | \
- CFG_CMD_REGINFO & \
- ~CFG_CMD_KGDB )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_REGINFO
+
+#undef CONFIG_CMD_KGDB
+
/* Where do the internal registers live? */
#define CFG_IMMR 0xF0000000
@@ -176,13 +190,10 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -310,7 +321,7 @@
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h
index 3885bcd..32e2285 100644
--- a/include/configs/RRvision.h
+++ b/include/configs/RRvision.h
@@ -92,7 +92,15 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -135,23 +143,26 @@
#endif /* CONFIG_SOFT_I2C */
-#define CONFIG_COMMANDS ( ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_DATE ) & \
- ~( CFG_CMD_PCMCIA | \
- CFG_CMD_IDE ) )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DATE
+
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_IDE
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -224,11 +235,13 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/Rattler.h b/include/configs/Rattler.h
index dbc57e8..d7652fa 100644
--- a/include/configs/Rattler.h
+++ b/include/configs/Rattler.h
@@ -62,8 +62,8 @@
* SCC, 1-3 for FCC)
*
* If CONFIG_ETHER_NONE is defined, then either the ethernet routines
- * must be defined elsewhere (as for the console), or CFG_CMD_NET must
- * be removed from CONFIG_COMMANDS to remove support for networking.
+ * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
+ * must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */
#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */
@@ -125,22 +125,33 @@
#define CONFIG_BAUDRATE 38400
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_JFFS2 \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm FE040000" /* autoboot command */
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rw mtdparts=phys:1M(ROM)ro,-(root)"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -158,7 +169,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -184,7 +195,7 @@
#define CFG_DIRECT_FLASH_TFTP
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#define CFG_JFFS2_NUM_BANKS CFG_MAX_FLASH_BANKS
#define CFG_JFFS2_SORT_FRAGMENTS
@@ -205,7 +216,7 @@
#define MTDIDS_DEFAULT "nor0=rattler-0"
#define MTDPARTS_DEFAULT "mtdparts=rattler-0:-@1m(jffs2)"
*/
-#endif /* CFG_CMD_JFFS2 */
+#endif /* CONFIG_CMD_JFFS2 */
#define CFG_MONITOR_BASE TEXT_BASE
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
@@ -256,7 +267,7 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/SBC8540.h b/include/configs/SBC8540.h
index f8e3397..f2c3699 100644
--- a/include/configs/SBC8540.h
+++ b/include/configs/SBC8540.h
@@ -338,28 +338,37 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV | \
- CFG_CMD_LOADS ))
- #elif (defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC))
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_PING | CFG_CMD_I2C)
- #elif (defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC))
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_PING | CFG_CMD_I2C)
- #endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+ #define CONFIG_CMD_MII
+#endif
+
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -368,7 +377,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "SBC8540=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -389,7 +398,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -401,7 +410,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/SCM.h b/include/configs/SCM.h
index e263db6..f900968 100644
--- a/include/configs/SCM.h
+++ b/include/configs/SCM.h
@@ -133,8 +133,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*
* (On TQM8260 either SCC1 or FCC2 may be chosen: SCC1 is hardwired to the
* X.29 connector, and FCC2 is hardwired to the X.1 connector)
@@ -191,23 +190,33 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_BSP)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_BSP
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -353,7 +362,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/SL8245.h b/include/configs/SL8245.h
index 61896d0..4d9d41b 100644
--- a/include/configs/SL8245.h
+++ b/include/configs/SL8245.h
@@ -53,11 +53,22 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
/*
@@ -255,7 +266,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/SM850.h b/include/configs/SM850.h
index 4977629..41a54f0 100644
--- a/include/configs/SM850.h
+++ b/include/configs/SM850.h
@@ -68,23 +68,34 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB) && defined(KGDB_DEBUG)
+#if defined(CONFIG_CMD_KGDB) && defined(KGDB_DEBUG)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -167,7 +178,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/SMN42.h b/include/configs/SMN42.h
new file mode 100644
index 0000000..a5d3d69
--- /dev/null
+++ b/include/configs/SMN42.h
@@ -0,0 +1,206 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Configuation settings for the SMN42 board from Siemens.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * If we are developing, we might want to start u-boot from ram
+ * so we MUST NOT initialize critical regs like mem-timing ...
+ */
+#undef CONFIG_INIT_CRITICAL /* undef for developing */
+
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
+#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
+#define CONFIG_LPC2292
+#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
+
+#undef CONFIG_USE_IRQ /* don't need them anymore */
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL1 1 /* we use Serial line 1 */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 115200
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/* enable I2C and select the hardware/software driver */
+#undef CONFIG_HARD_I2C /* I2C with hardware support */
+#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
+/* this would be 0xAE if E0, E1 and E2 were pulled high */
+#define CFG_I2C_SLAVE 0xA0
+#define CFG_I2C_EEPROM_ADDR (0xA0 >> 1)
+#define CFG_I2C_EEPROM_ADDR_LEN 2 /* 16 bit address */
+#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes per write */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+/* not used but required by devices.c */
+#define CFG_I2C_SPEED 10000
+
+#ifdef CONFIG_SOFT_I2C
+/*
+ * Software (bit-bang) I2C driver configuration
+ */
+#define SCL 0x00000004 /* P0.2 */
+#define SDA 0x00000008 /* P0.3 */
+
+#define I2C_READ ((GET32(IO0PIN) & SDA) ? 1 : 0)
+#define I2C_SDA(x) { if (x) PUT32(IO0SET, SDA); else PUT32(IO0CLR, SDA); }
+#define I2C_SCL(x) { if (x) PUT32(IO0SET, SCL); else PUT32(IO0CLR, SCL); }
+#define I2C_DELAY { udelay(100); }
+#define I2C_ACTIVE { unsigned int i2ctmp; \
+ i2ctmp = GET32(IO0DIR); \
+ i2ctmp |= SDA; \
+ PUT32(IO0DIR, i2ctmp); }
+#define I2C_TRISTATE { unsigned int i2ctmp; \
+ i2ctmp = GET32(IO0DIR); \
+ i2ctmp &= ~SDA; \
+ PUT32(IO0DIR, i2ctmp); }
+#endif /* CONFIG_SOFT_I2C */
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PING
+
+
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_BOOTDELAY 5
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "SMN42 # " /* Monitor Command Prompt */
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x81800000 /* memtest works on */
+#define CFG_MEMTEST_END 0x83000000 /* 24 MB in SRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0x81000000 /* default load address */
+ /* for uClinux img is here*/
+
+#define CFG_SYS_CLK_FREQ 58982400 /* Hz */
+#define CFG_HZ 2048 /* decrementer freq in Hz */
+
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+/*-----------------------------------------------------------------------
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*-----------------------------------------------------------------------
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of SRAM */
+#define PHYS_SDRAM_1 0x81000000 /* SRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB SRAM */
+
+/* This is the external flash */
+#define PHYS_FLASH_1 0x80000000 /* Flash Bank #1 */
+#define PHYS_FLASH_SIZE 0x01000000 /* 16 MB */
+
+/*-----------------------------------------------------------------------
+ * FLASH and environment organization
+ */
+
+/*
+ * The first entry in CFG_FLASH_BANKS_LIST is a dummy, but it must be present.
+ */
+#define CFG_FLASH_BANKS_LIST { 0, PHYS_FLASH_1 }
+#define CFG_FLASH_ADDR0 0x555
+#define CFG_FLASH_ADDR1 0x2AA
+#define CFG_FLASH_ERASE_TOUT 16384 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 5 /* Timeout for Flash Write (in ms) */
+
+#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+
+#define CFG_ENV_IS_IN_FLASH 1
+/* The Environment Sector is in the CPU-internal flash */
+#define CFG_FLASH_BASE 0
+#define CFG_ENV_OFFSET 0x3C000
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_ENV_OFFSET)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_INITRD_TAG
+#define CONFIG_MMC 1
+/* we use this ethernet chip */
+#define CONFIG_ENC28J60
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/SPD823TS.h b/include/configs/SPD823TS.h
index ae4dcc2..395c7a1 100644
--- a/include/configs/SPD823TS.h
+++ b/include/configs/SPD823TS.h
@@ -59,15 +59,29 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_COMMANDS \
-((CONFIG_CMD_DFL & ~(CFG_CMD_FLASH)) | CFG_CMD_IDE) /* no Flash, but IDE */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IDE
+
+#undef CONFIG_CMD_FLASH
+
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*----------------------------------------------------------------------*/
#define CONFIG_ETHADDR 00:D0:93:00:01:CB
@@ -82,7 +96,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -160,7 +174,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/SX1.h b/include/configs/SX1.h
index 6ed98b8..05cef87 100644
--- a/include/configs/SX1.h
+++ b/include/configs/SX1.h
@@ -93,12 +93,26 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (( CONFIG_CMD_DFL | \
- CFG_CMD_I2C ) & \
- ~CFG_CMD_NET)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_I2C
+
+#undef CONFIG_CMD_NET
+
+
#include <configs/omap1510.h>
#define CONFIG_BOOTARGS "mem=16M console=ttyS0,115200n8 root=/dev/mtdblock3 rw"
diff --git a/include/configs/SXNI855T.h b/include/configs/SXNI855T.h
index a8454d9..8f2a5ec 100644
--- a/include/configs/SXNI855T.h
+++ b/include/configs/SXNI855T.h
@@ -146,14 +146,26 @@
#define CFG_DISCOVER_PHY
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NAND | \
- CFG_CMD_DATE)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DATE
+
#define CFG_JFFS2_SORT_FRAGMENTS
@@ -226,7 +238,7 @@
*/
#define CFG_LONGHELP /* undef to save a little memory */
#define CFG_PROMPT "=>" /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -309,7 +321,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/Sandpoint8240.h b/include/configs/Sandpoint8240.h
index f4339ec..5bbe3c5 100644
--- a/include/configs/Sandpoint8240.h
+++ b/include/configs/Sandpoint8240.h
@@ -80,18 +80,30 @@
""
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_SDRAM | \
- CFG_CMD_EEPROM | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+
#define CONFIG_DRAM_SPEED 100 /* MHz */
@@ -384,7 +396,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/Sandpoint8245.h b/include/configs/Sandpoint8245.h
index d42bd69..a08451e 100644
--- a/include/configs/Sandpoint8245.h
+++ b/include/configs/Sandpoint8245.h
@@ -51,17 +51,28 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
/*
@@ -363,7 +374,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TASREG.h b/include/configs/TASREG.h
index 119bc24..dccdf0c 100644
--- a/include/configs/TASREG.h
+++ b/include/configs/TASREG.h
@@ -43,6 +43,10 @@
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
+#define CONFIG_MCFTMR
+
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
@@ -50,20 +54,34 @@
#undef CONFIG_MONITOR_IS_IN_RAM /* no pre-loader required!!! ;-) */
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C ) & \
- ~(CFG_CMD_NET))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+
+#undef CONFIG_CMD_NET
+
+
#define CONFIG_BOOTDELAY 3
#define CFG_PROMPT "=> "
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/TB5200.h b/include/configs/TB5200.h
index 8a6e5a6..1c6a9ae 100644
--- a/include/configs/TB5200.h
+++ b/include/configs/TB5200.h
@@ -42,11 +42,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -72,12 +67,6 @@
#define CFG_CONSOLE_IS_IN_ENV
#endif
-#ifdef CONFIG_VIDEO
-#define ADD_BMP_CMD CFG_CMD_BMP
-#else
-#define ADD_BMP_CMD 0
-#endif
-
/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -85,7 +74,6 @@
/* USB */
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
/* POST support */
@@ -94,41 +82,51 @@
CFG_POST_I2C)
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
/* preserve space for the post_word at end of on-chip SRAM */
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#else
-#define CFG_CMD_POST_DIAG 0
#endif
-/* IDE */
-#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_BMP_CMD | \
- ADD_IDE_CMD | \
- ADD_PCI_CMD | \
- ADD_USB_CMD | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP | \
- CFG_CMD_BSP)
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_USB
+
+#ifdef CONFIG_VIDEO
+#define CONFIG_CMD_BMP
+#endif
+
+#ifdef CONFIG_POST
+#define CONFIG__CMD_DIAG
+#endif
+
#define CONFIG_TIMESTAMP /* display image timestamps */
@@ -200,17 +198,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -394,7 +392,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -403,6 +401,11 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/* Enable an alternate, more extensive memory test */
#define CFG_ALT_MEMTEST
@@ -414,8 +417,7 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -432,7 +434,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/TOP5200.h b/include/configs/TOP5200.h
index f41dbd0..7240ce1 100644
--- a/include/configs/TOP5200.h
+++ b/include/configs/TOP5200.h
@@ -50,11 +50,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -81,12 +76,6 @@
# define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
# define CONFIG_PCI_IO_SIZE 0x01000000
-# define ADD_PCI_CMD CFG_CMD_PCI
-
-#else /* no Evaluation board */
-
-# define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
-
#endif
/* USB */
@@ -99,49 +88,49 @@
# else
# define CONFIG_USB_CONFIG 0x00001000
# endif
-# define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
# define CONFIG_DOS_PARTITION
# define CONFIG_USB_STORAGE
-#else
-
-# define ADD_USB_CMD 0
-
#endif
/* IDE */
#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
-
-# define ADD_IDE_CMD CFG_CMD_IDE | CFG_CMD_FAT
# define CONFIG_DOS_PARTITION
-
-#else
-
-# define ADD_IDE_CMD 0
-
#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- ADD_PCI_CMD | \
- ADD_USB_CMD | \
- ADD_IDE_CMD | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_BEDBUG \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_REGINFO
+
+#if defined (CONFIG_EVAL5200) || defined (CONFIG_LITE5200)
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_PCI
+#endif
+
/*
* MUST be low boot - HIGHBOOT is not supported anymore
@@ -186,7 +175,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
@@ -336,7 +325,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -352,6 +341,12 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+
#ifdef CONFIG_EVAL5200 /* M48T08 is available with the Evaluation board only */
#define CONFIG_RTC_MK48T59 1 /* use M48T08 on EVAL5200 */
#define RTC(reg) (0xf0010000+reg)
diff --git a/include/configs/TOP860.h b/include/configs/TOP860.h
index 2344b96..66f7a11 100644
--- a/include/configs/TOP860.h
+++ b/include/configs/TOP860.h
@@ -107,30 +107,28 @@
*/
#define CFG_MATCH_PARTIAL_CMD
+
/*
- * List of available monitor commands. Use the system default list
- * plus add some of the "non-standard" commands back in.
- * See ./cmd_confdefs.h
+ * Command line configuration.
*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ELF | \
- CFG_CMD_DATE | \
- CFG_CMD_MII | \
- CFG_CMD_BEDBUG \
- )
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_BEDBUG
+
#define CONFIG_AUTOSCRIPT 1
#define CFG_LOADS_BAUD_CHANGE 1
#undef CONFIG_LOADS_ECHO /* NO echo on for serial download */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
@@ -141,7 +139,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -239,7 +237,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
@@ -411,10 +409,11 @@
/*
* BOOTP options
*/
-#undef CONFIG_BOOTP_MASK
-#define CONFIG_BOOTP_MASK ( CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE \
- )
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
/*
diff --git a/include/configs/TQM5200.h b/include/configs/TQM5200.h
index 7069b35..e0c9d81 100644
--- a/include/configs/TQM5200.h
+++ b/include/configs/TQM5200.h
@@ -44,14 +44,9 @@
#define CFG_MPC5XXX_CLKIN 33000000 /* ... running at 33.000000MHz */
-#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -105,12 +100,6 @@
#define CONFIG_NS8382X 1
#endif /* CONFIG_STK52XX */
-#ifdef CONFIG_PCI
-#define ADD_PCI_CMD CFG_CMD_PCI
-#else
-#define ADD_PCI_CMD 0
-#endif
-
/*
* Video console
*/
@@ -133,11 +122,6 @@
#define CFG_CONSOLE_IS_IN_ENV
#endif /* #ifndef CONFIG_TQM5200S */
-#ifdef CONFIG_VIDEO
-#define ADD_BMP_CMD CFG_CMD_BMP
-#else
-#define ADD_BMP_CMD 0
-#endif
/* Partitions */
#define CONFIG_MAC_PARTITION
@@ -146,11 +130,17 @@
/* USB */
#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
-#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
+#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_USB
+
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT
+#define CFG_USB_OHCI_REGS_BASE MPC5XXX_USB
+#define CFG_USB_OHCI_SLOT_NAME "mpc5200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
#endif
#ifndef CONFIG_CAM5200
@@ -161,44 +151,61 @@
#endif
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
/* preserve space for the post_word at end of on-chip SRAM */
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#else
-#define CFG_CMD_POST_DIAG 0
#endif
-/* IDE */
-#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX) || defined(CONFIG_FO300)
-#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
-#else
-#define ADD_IDE_CMD 0
-#endif
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_BMP_CMD | \
- ADD_IDE_CMD | \
- ADD_PCI_CMD | \
- ADD_USB_CMD | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP | \
- CFG_CMD_BSP)
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_BSP
+
+#ifdef CONFIG_VIDEO
+ #define CONFIG_CMD_BMP
+#endif
+
+#ifdef CONFIG_PCI
+#define CONFIG_CMD_CMD_PCI
+#endif
+
+#if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
+ #define CONFIG_CMD_IDE
+ #define CONFIG_CMD_FAT
+ #define CONFIG_CMD_EXT2
+#endif
+
+#if defined(CONFIG_STK52XX) || defined(CONFIG_FO300)
+ #define CONFIG_CFG_USB
+ #define CONFIG_CFG_FAT
+#endif
+
+#ifdef CONFIG_POST
+ #define CONFIG_CMD_DIAG
+#endif
+
#define CONFIG_TIMESTAMP /* display image timestamps */
@@ -234,15 +241,21 @@
#ifndef CONFIG_CAM5200
#define CUSTOM_ENV_SETTINGS \
"bootfile=/tftpboot/tqm5200/uImage\0" \
+ "bootfile_fdt=/tftpboot/tqm5200/uImage_fdt\0" \
+ "fdt_file=/tftpboot/tqm5200/tqm5200.dtb\0" \
"u-boot=/tftpboot/tqm5200/u-boot.bin\0"
#else
-#define CUSTOM_ENV_SETTINGS \
+#define CUSTOM_ENV_SETTINGS \
"bootfile=cam5200/uImage\0" \
"u-boot=cam5200/u-boot.bin\0" \
"setup=tftp 200000 cam5200/setup.img; autoscr 200000\0"
#endif
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "console=ttyS0\0" \
+ "kernel_addr=200000\0" \
+ "fdt_addr=400000\0" \
+ "hostname=tqm5200\0" \
"netdev=eth0\0" \
"rootpath=/opt/eldk/ppc_6xx\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
@@ -252,13 +265,17 @@
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
"addcons=setenv bootargs ${bootargs} " \
- "console=ttyS0,${baudrate}\0" \
+ "console=${console},${baudrate}\0" \
"flash_self=run ramargs addip addcons;" \
"bootm ${kernel_addr} ${ramdisk_addr}\0" \
"flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
- "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addcons;" \
- "bootm\0" \
+ "net_nfs=tftp ${kernel_addr} ${bootfile};" \
+ "run nfsargs addip addcons;bootm\0" \
+ "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt};" \
+ "tftp ${fdt_addr} ${fdt_file};setenv console ttyPSC0;" \
+ "run nfsargs addip addcons;" \
+ "bootm ${kernel_addr} - ${fdt_addr}\0" \
CUSTOM_ENV_SETTINGS \
"load=tftp 200000 ${u-boot}\0" \
ENV_UPDT \
@@ -269,17 +286,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133) && !defined(CONFIG_CAM5200)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK) && !defined(CONFIG_CAM5200)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock of
+ * 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -556,7 +573,12 @@
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -576,8 +598,7 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -594,7 +615,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
@@ -676,4 +697,16 @@
/* Interval between registers */
#define CFG_ATA_STRIDE 4
+/*-----------------------------------------------------------------------
+ * Open firmware flat tree support
+ *-----------------------------------------------------------------------
+ */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,5200@0"
+#define OF_SOC "soc5200@f0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
+
#endif /* __CONFIG_H */
diff --git a/include/configs/TQM823L.h b/include/configs/TQM823L.h
index 247f705..7a38010 100644
--- a/include/configs/TQM823L.h
+++ b/include/configs/TQM823L.h
@@ -70,8 +70,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM823L/uImage\0" \
- "kernel_addr=40040000\0" \
- "ramdisk_addr=40100000\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -88,34 +89,38 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
#ifdef CONFIG_SPLASH_SCREEN
-# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BMP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#else
-# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+ #define CONFIG_CMD_BMP
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
@@ -129,7 +134,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -201,6 +206,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -212,7 +219,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM823M.h b/include/configs/TQM823M.h
index 1461b5f..e8b6a80 100644
--- a/include/configs/TQM823M.h
+++ b/include/configs/TQM823M.h
@@ -70,8 +70,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM823M/uImage\0" \
- "kernel_addr=40080000\0" \
- "ramdisk_addr=40180000\0" \
+ "fdt_addr=40080000\0" \
+ "kernel_addr=400A0000\0" \
+ "ramdisk_addr=40280000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -88,23 +89,34 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -118,7 +130,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -191,6 +203,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -202,7 +216,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM8260.h b/include/configs/TQM8260.h
index ffd5c0b..3b78323 100644
--- a/include/configs/TQM8260.h
+++ b/include/configs/TQM8260.h
@@ -167,8 +167,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*
* (On TQM8260 either SCC1 or FCC2 may be chosen: SCC1 is hardwired to the
* X.29 connector, and FCC2 is hardwired to the X.1 connector)
@@ -220,17 +219,28 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -244,7 +254,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -385,7 +395,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM8272.h b/include/configs/TQM8272.h
index 925bf34..50f6752 100644
--- a/include/configs/TQM8272.h
+++ b/include/configs/TQM8272.h
@@ -97,10 +97,6 @@
/* enable I2C and select the hardware/software driver */
#undef CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
-#define ADD_CMD_I2C CFG_CMD_I2C | \
- CFG_CMD_DATE |\
- CFG_CMD_DTT |\
- CFG_CMD_EEPROM
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
@@ -140,7 +136,6 @@
#else
#undef CONFIG_HARD_I2C
#undef CONFIG_SOFT_I2C
-#define ADD_CMD_I2C 0
#endif
/*
@@ -177,8 +172,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*
* (On TQM8272 either SCC1 or FCC2 may be chosen: SCC1 is hardwired to the
* X.29 connector, and FCC2 is hardwired to the X.1 connector)
@@ -272,20 +266,37 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_NAND | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- ADD_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SNTP
+
+#if CONFIG_I2C
+ #define CONFIG_CMD_I2C
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_DTT
+ #define CONFIG_CMD_EEPROM
+#endif
+
/*
* Miscellaneous configurable options
@@ -301,7 +312,7 @@
#endif
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -392,7 +403,7 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_CS_DIST 0x80
#define CFG_NAND_UPM_WRITE_CMD_OFS 0x20
@@ -430,7 +441,7 @@
WRITE_NAND(d, addr); \
} while(0)
-#endif /* CFG_CMD_NAND */
+#endif /* CONFIG_CMD_NAND */
#define CONFIG_PCI
#ifdef CONFIG_PCI
@@ -502,7 +513,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM834x.h b/include/configs/TQM834x.h
index ed03577..0147252 100644
--- a/include/configs/TQM834x.h
+++ b/include/configs/TQM834x.h
@@ -28,9 +28,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define DEBUG
-#undef DEBUG
-
/*
* High Level Configuration Options
*/
@@ -248,14 +245,16 @@
#define CONFIG_NET_MULTI
#endif
-#define CONFIG_MPC83XX_TSEC1 1
-#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC83XX_TSEC2 1
-#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
@@ -281,7 +280,6 @@
#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE
#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */
-
#undef CONFIG_EEPRO100
#define CONFIG_EEPRO100
#undef CONFIG_TULIP
@@ -316,39 +314,37 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-/* Common commands */
-#define CFG_CMD_TQM8349_COMMON CFG_CMD_DATE | CFG_CMD_I2C | CFG_CMD_DTT\
- | CFG_CMD_PING | CFG_CMD_EEPROM \
- | CFG_CMD_MII | CFG_CMD_JFFS2
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
+#endif
#if defined(CFG_RAMBOOT)
-
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI \
- | CFG_CMD_TQM8349_COMMON) \
- & \
- ~(CFG_CMD_ENV | CFG_CMD_LOADS))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_TQM8349_COMMON) \
- & \
- ~(CFG_CMD_ENV | CFG_CMD_LOADS))
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
#endif
-#else /* CFG_RAMBOOT */
-
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI \
- | CFG_CMD_TQM8349_COMMON)
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_TQM8349_COMMON)
-#endif
-
-#endif /* CFG_RAMBOOT */
-
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -362,7 +358,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -387,7 +383,7 @@
*/
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -495,7 +491,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -505,6 +501,7 @@
*/
#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR D2:DA:5E:44:BC:29
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 1E:F3:40:21:92:53
diff --git a/include/configs/TQM850L.h b/include/configs/TQM850L.h
index 90ecbad..beeca63 100644
--- a/include/configs/TQM850L.h
+++ b/include/configs/TQM850L.h
@@ -66,8 +66,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM850L/uImage\0" \
- "kernel_addr=40040000\0" \
- "ramdisk_addr=40100000\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -80,23 +81,33 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -110,7 +121,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -182,6 +193,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -193,7 +206,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM850M.h b/include/configs/TQM850M.h
index b3f8f8d..d5609c1 100644
--- a/include/configs/TQM850M.h
+++ b/include/configs/TQM850M.h
@@ -64,8 +64,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM850M/uImage\0" \
- "kernel_addr=40080000\0" \
- "ramdisk_addr=40180000\0" \
+ "fdt_addr=40080000\0" \
+ "kernel_addr=400A0000\0" \
+ "ramdisk_addr=40280000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -78,23 +79,33 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -108,7 +119,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -181,6 +192,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -192,7 +205,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM855L.h b/include/configs/TQM855L.h
index 49aaeea..e35b5b2 100644
--- a/include/configs/TQM855L.h
+++ b/include/configs/TQM855L.h
@@ -69,8 +69,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM855L/uImage\0" \
- "kernel_addr=40040000\0" \
- "ramdisk_addr=40100000\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -83,23 +84,34 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -113,7 +125,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -185,6 +197,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -196,7 +210,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM855M.h b/include/configs/TQM855M.h
index 50df49e..cd5212e 100644
--- a/include/configs/TQM855M.h
+++ b/include/configs/TQM855M.h
@@ -69,8 +69,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM855M/uImage\0" \
- "kernel_addr=40080000\0" \
- "ramdisk_addr=40180000\0" \
+ "fdt_addr=40080000\0" \
+ "kernel_addr=400A0000\0" \
+ "ramdisk_addr=40280000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -116,24 +117,35 @@
#define CFG_EEPROM_PAGE_WRITE_BITS 5
#endif
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -147,7 +159,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -220,6 +232,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -231,7 +245,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM85xx.h b/include/configs/TQM85xx.h
index f45f3a2..6dbd392 100644
--- a/include/configs/TQM85xx.h
+++ b/include/configs/TQM85xx.h
@@ -94,7 +94,6 @@
*/
#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
-#define CONFIG_ADD_RAM_INFO 1 /* print additional info*/
#if defined(CONFIG_TQM8540) || defined(CONFIG_TQM8560)
/* TQM8540 & 8560 need DLL-override */
@@ -258,16 +257,20 @@
#define CONFIG_NET_MULTI 1
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 1
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
#define FEC_PHY_ADDR 3
#define FEC_PHYIDX 0
+#define FEC_FLAGS 0
+#define CONFIG_HAS_ETH0
#define CONFIG_HAS_ETH1
#define CONFIG_HAS_ETH2
@@ -357,24 +360,35 @@
#define CONFIG_TIMESTAMP /* Print image info with ts */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_MII
+
#if defined(CONFIG_PCI)
-# define ADD_PCI_CMD (CFG_CMD_PCI)
-#else
-# define ADD_PCI_CMD 0
+ #define CONFIG_CMD_PCI
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP | \
- ADD_PCI_CMD | \
- CFG_CMD_I2C | \
- CFG_CMD_DATE | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DTT | \
- CFG_CMD_MII | \
- CFG_CMD_PING )
-#include <cmd_confdefs.h>
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -385,7 +399,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -406,7 +420,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value */
#endif
@@ -418,7 +432,7 @@
#define BOOTFLAG_COLD 0x01 /* Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port*/
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -435,7 +449,7 @@
#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
#define CONFIG_EXTRA_ENV_SETTINGS \
- CFG_BOOTFILE \
+ "bootfile="CFG_BOOTFILE_PATH"\0" \
"netdev=eth0\0" \
"consdev=ttyS0\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
diff --git a/include/configs/TQM860L.h b/include/configs/TQM860L.h
index 9be5db1..d5838db 100644
--- a/include/configs/TQM860L.h
+++ b/include/configs/TQM860L.h
@@ -69,8 +69,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM860L/uImage\0" \
- "kernel_addr=40040000\0" \
- "ramdisk_addr=40100000\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -83,27 +84,38 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
#define CONFIG_NETCONSOLE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -116,7 +128,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -188,6 +200,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -199,7 +213,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM860M.h b/include/configs/TQM860M.h
index 37f6c98..684b86f 100644
--- a/include/configs/TQM860M.h
+++ b/include/configs/TQM860M.h
@@ -69,8 +69,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM860M/uImage\0" \
- "kernel_addr=40080000\0" \
- "ramdisk_addr=40180000\0" \
+ "fdt_addr=40080000\0" \
+ "kernel_addr=400A0000\0" \
+ "ramdisk_addr=40280000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -83,24 +84,35 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -114,7 +126,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -187,6 +199,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -198,7 +212,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM862L.h b/include/configs/TQM862L.h
index f03690a..f09d3d1 100644
--- a/include/configs/TQM862L.h
+++ b/include/configs/TQM862L.h
@@ -72,8 +72,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM862L/uImage\0" \
- "kernel_addr=40040000\0" \
- "ramdisk_addr=40100000\0" \
+ "fdt_addr=40040000\0" \
+ "kernel_addr=40060000\0" \
+ "ramdisk_addr=40200000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -86,23 +87,34 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -116,7 +128,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -189,6 +201,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -200,7 +214,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM862M.h b/include/configs/TQM862M.h
index 4959340..039aa3a 100644
--- a/include/configs/TQM862M.h
+++ b/include/configs/TQM862M.h
@@ -72,8 +72,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM862M/uImage\0" \
- "kernel_addr=40080000\0" \
- "ramdisk_addr=40180000\0" \
+ "fdt_addr=40080000\0" \
+ "kernel_addr=400A0000\0" \
+ "ramdisk_addr=40280000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -86,23 +87,34 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -116,7 +128,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -190,6 +202,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -201,7 +215,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h
index 148490b..0d77891 100644
--- a/include/configs/TQM866M.h
+++ b/include/configs/TQM866M.h
@@ -81,8 +81,9 @@
"net_nfs=tftp 200000 ${bootfile};run nfsargs addip;bootm\0" \
"rootpath=/opt/eldk/ppc_8xx\0" \
"bootfile=/tftpboot/TQM866M/uImage\0" \
- "kernel_addr=40080000\0" \
- "ramdisk_addr=40180000\0" \
+ "fdt_addr=40080000\0" \
+ "kernel_addr=400A0000\0" \
+ "ramdisk_addr=40280000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -125,7 +126,15 @@
#define CFG_EEPROM_PAGE_WRITE_BITS 4
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -134,16 +143,19 @@
#define CONFIG_TIMESTAMP /* but print image timestmps */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+
/*
* Miscellaneous configurable options
@@ -157,7 +169,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -230,6 +242,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -241,7 +255,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/TQM885D.h b/include/configs/TQM885D.h
index d470ade..f36b729 100644
--- a/include/configs/TQM885D.h
+++ b/include/configs/TQM885D.h
@@ -131,7 +131,15 @@
# define CONFIG_RTC_DS1337 1
# define CFG_I2C_RTC_ADDR 0x68
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -140,19 +148,22 @@
#define CONFIG_TIMESTAMP /* but print image timestmps */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+
/*
* Miscellaneous configurable options
@@ -166,7 +177,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -187,8 +198,7 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
/*
- * Enable loopw commando. This has only effect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -258,7 +268,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
@@ -478,7 +488,7 @@
#define CONFIG_ETHER_ON_FEC1 /* ... for FEC1 */
#define CONFIG_ETHER_ON_FEC2 /* ... for FEC2 */
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_CMD_MII)
#define CFG_DISCOVER_PHY
#endif
diff --git a/include/configs/Total5200.h b/include/configs/Total5200.h
index 8175703..9edf790 100644
--- a/include/configs/Total5200.h
+++ b/include/configs/Total5200.h
@@ -48,11 +48,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -63,7 +58,6 @@
/*
* Video console
*/
-#if 1
#define CONFIG_VIDEO
#define CONFIG_VIDEO_SED13806
#define CONFIG_VIDEO_SED13806_16BPP
@@ -76,10 +70,6 @@
#define CONFIG_VIDEO_SW_CURSOR
#define CONFIG_SPLASH_SCREEN
-#define ADD_VIDEO_CMD CFG_CMD_BMP
-#else
-#define ADD_VIDEO_CMD 0
-#endif
#ifdef CONFIG_MPC5200 /* MGT5100 PCI is not supported yet. */
/*
@@ -105,12 +95,9 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
-#define ADD_PCI_CMD CFG_CMD_PCI
-
#else /* MGT5100 */
#define CONFIG_MII 1
-#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
#endif
@@ -119,29 +106,36 @@
#define CONFIG_DOS_PARTITION
/* USB */
-#if 1
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
-#endif
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PING | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_IDE | \
- ADD_VIDEO_CMD | \
- ADD_PCI_CMD | \
- ADD_USB_CMD)
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#if defined(CONFIG_MPC5200)
+ #define CONFIG_CMD_PCI
+#endif
+
+#define CONFIG_CMD_BMP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
#if (TEXT_BASE == 0xFE000000) /* Boot low */
# define CFG_LOWBOOT 1
@@ -183,7 +177,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
@@ -303,7 +297,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -319,6 +313,12 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+
/*
* Various low-level settings
*/
diff --git a/include/configs/VCMA9.h b/include/configs/VCMA9.h
index 5f48a70..df6894f 100644
--- a/include/configs/VCMA9.h
+++ b/include/configs/VCMA9.h
@@ -48,27 +48,33 @@
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- /*CFG_CMD_JFFS2 |*/ \
- /*CFG_CMD_NAND |*/ \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_USB | \
- CFG_CMD_REGINFO | \
- CFG_CMD_FAT | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_BSP)
-/* this must be included after the definiton of CONFIG_COMMANDS */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_BSP
+
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
@@ -145,7 +151,7 @@
#define CONFIG_IPADDR 10.0.0.110
#define CONFIG_SERVERIP 10.0.0.1
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
@@ -246,7 +252,7 @@
/*-----------------------------------------------------------------------
* NAND flash settings
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#define CFG_NAND_LEGACY
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
@@ -280,6 +286,6 @@
#define CONFIG_MTD_NAND_VERIFY_WRITE 1
#define CONFIG_MTD_NAND_ECC_JFFS2 1
-#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
+#endif
#endif /* __CONFIG_H */
diff --git a/include/configs/VOH405.h b/include/configs/VOH405.h
index 96f3d26..14848ab 100644
--- a/include/configs/VOH405.h
+++ b/include/configs/VOH405.h
@@ -58,28 +58,40 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_RTC_MC146818 /* DS1685 is MC146818 compatible*/
@@ -98,7 +110,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -141,38 +153,18 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#define CFG_NAND_LEGACY
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
+#define CFG_NAND_QUIET 1
/*-----------------------------------------------------------------------
* PCI stuff
@@ -319,7 +311,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/VOM405.h b/include/configs/VOM405.h
index f2f3ea7..5512f4b 100644
--- a/include/configs/VOM405.h
+++ b/include/configs/VOM405.h
@@ -60,24 +60,33 @@
#define CONFIG_LXT971_NO_SLEEP 1 /* disable sleep mode in LXT971 */
#define CONFIG_RESET_PHY_R 1 /* use reset_phy() to disable phy sleep mode */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_BSP | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -96,7 +105,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -244,7 +253,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/VoVPN-GW.h b/include/configs/VoVPN-GW.h
index 92bade5..1405784 100644
--- a/include/configs/VoVPN-GW.h
+++ b/include/configs/VoVPN-GW.h
@@ -95,8 +95,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC
#define CONFIG_ETHER_ON_FCC
@@ -138,24 +137,34 @@
#endif
-/* configure commands */
-#define CONFIG_COMMANDS ( CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_BDI | \
- CFG_CMD_CONSOLE | \
- CFG_CMD_ECHO | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_IMLS | \
- CFG_CMD_LOADB | \
- CFG_CMD_MEMORY | \
- CFG_CMD_MISC | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_RUN )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IMLS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+
/*
* boot options & environment
@@ -206,7 +215,7 @@
#define CFG_PROMPT "=> "
/* console i/o buffer size */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024
#else
#define CFG_CBSIZE 256
@@ -305,7 +314,7 @@
/* cache configuration */
#define CFG_CACHELINE_SIZE 32 /* for MPC8260 */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of above */
#endif
diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h
index 8dc623e..fc177fb 100644
--- a/include/configs/W7OLMC.h
+++ b/include/configs/W7OLMC.h
@@ -70,13 +70,31 @@
#define CONFIG_RTC_M48T35A 1 /* ST Electronics M48 timekeeper */
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | CFG_CMD_BEDBUG | CFG_CMD_DATE | CFG_CMD_I2C | \
- CFG_CMD_EEPROM | CFG_CMD_ELF | CFG_CMD_BSP | CFG_CMD_REGINFO)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_REGINFO
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_HW_WATCHDOG /* HW Watchdog, board specific */
@@ -92,7 +110,7 @@
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -277,7 +295,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above val. */
#endif
@@ -309,7 +327,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/W7OLMG.h b/include/configs/W7OLMG.h
index 2bd98b3..20d693f 100644
--- a/include/configs/W7OLMG.h
+++ b/include/configs/W7OLMG.h
@@ -75,14 +75,34 @@
#define CFG_DTT_LOW_TEMP -30
#define CFG_DTT_HYSTERESIS 3
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | CFG_CMD_BEDBUG | CFG_CMD_DATE | CFG_CMD_I2C | \
- CFG_CMD_EEPROM | CFG_CMD_ELF | CFG_CMD_BSP | CFG_CMD_REGINFO | \
- CFG_CMD_DTT)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_DTT
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_HW_WATCHDOG /* HW Watchdog, board specific */
@@ -98,7 +118,7 @@
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -278,7 +298,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above val. */
#endif
@@ -310,7 +330,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/WUH405.h b/include/configs/WUH405.h
index faf855d..656784a 100644
--- a/include/configs/WUH405.h
+++ b/include/configs/WUH405.h
@@ -60,19 +60,31 @@
#define CONFIG_PHY_CLK_FREQ EMAC_STACR_CLK_66MHZ /* 66 MHz OPB clock*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_IRQ | \
- CFG_CMD_ELF | \
- CFG_CMD_NAND | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -92,7 +104,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -133,38 +145,16 @@
* NAND-FLASH stuff
*-----------------------------------------------------------------------
*/
-#define CFG_NAND_LEGACY
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE }
+#define NAND_MAX_CHIPS 1
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_BIG_DELAY_US 25
-#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
-#define SECTORSIZE 512
+#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
+#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
+#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
+#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define ADDR_COLUMN 1
-#define ADDR_PAGE 2
-#define ADDR_COLUMN_PAGE 3
-
-#define NAND_ChipID_UNKNOWN 0x00
-#define NAND_MAX_FLOORS 1
-#define NAND_MAX_CHIPS 1
-
-#define CFG_NAND_CE (0x80000000 >> 1) /* our CE is GPIO1 */
-#define CFG_NAND_CLE (0x80000000 >> 2) /* our CLE is GPIO2 */
-#define CFG_NAND_ALE (0x80000000 >> 3) /* our ALE is GPIO3 */
-#define CFG_NAND_RDY (0x80000000 >> 4) /* our RDY is GPIO4 */
-
-#define NAND_DISABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CE);} while(0)
-#define NAND_ENABLE_CE(nand) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CE);} while(0)
-#define NAND_CTL_CLRALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_ALE);} while(0)
-#define NAND_CTL_SETALE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_ALE);} while(0)
-#define NAND_CTL_CLRCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) & ~CFG_NAND_CLE);} while(0)
-#define NAND_CTL_SETCLE(nandptr) do { out32(GPIO0_OR, in32(GPIO0_OR) | CFG_NAND_CLE);} while(0)
-#define NAND_WAIT_READY(nand) while (!(in32(GPIO0_IR) & CFG_NAND_RDY))
-
-#define WRITE_NAND_COMMAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND_ADDRESS(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)(d); } while(0)
-#define WRITE_NAND(d, adr) do{ *(volatile __u8 *)((unsigned long)adr) = (__u8)d; } while(0)
-#define READ_NAND(adr) ((volatile unsigned char)(*(volatile __u8 *)(unsigned long)adr))
-
-#define CONFIG_MTD_NAND_VERIFY_WRITE 1 /* verify all writes!!! */
#define CFG_NAND_SKIP_BAD_DOT_I 1 /* ".i" read skips bad blocks */
/*-----------------------------------------------------------------------
@@ -270,7 +260,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/XPEDITE1K.h b/include/configs/XPEDITE1K.h
index 9b32514..611f5a6 100644
--- a/include/configs/XPEDITE1K.h
+++ b/include/configs/XPEDITE1K.h
@@ -182,25 +182,33 @@
#define CONFIG_HAS_ETH2 1 /* add support for "eth2addr" */
#define CONFIG_HAS_ETH3 1 /* add support for "eth3addr" */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_I2C | \
- CFG_CMD_DATE | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_PING | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_DIAG | \
- CFG_CMD_FAT )
-/* CFG_CMD_DHCP | \ */
-/* CFG_CMD_KGDB | \ */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_FAT
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -209,7 +217,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -238,7 +246,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#define CFG_PCI_SUBSYS_VENDORID 0x1014 /* IBM */
@@ -255,7 +262,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 440GX CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -267,7 +274,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/Yukon8220.h b/include/configs/Yukon8220.h
index 37ef105..00c4ff0 100644
--- a/include/configs/Yukon8220.h
+++ b/include/configs/Yukon8220.h
@@ -39,12 +39,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -70,31 +64,40 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BOOTD | \
- CFG_CMD_CACHE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#define CONFIG_NET_MULTI
#define CONFIG_MII
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Autobooting
*/
@@ -293,7 +296,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -309,6 +312,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/ZPC1900.h b/include/configs/ZPC1900.h
index a5085cf..7c1a5b9 100644
--- a/include/configs/ZPC1900.h
+++ b/include/configs/ZPC1900.h
@@ -55,8 +55,8 @@
* SCC, 1-3 for FCC)
*
* If CONFIG_ETHER_NONE is defined, then either the ethernet routines
- * must be defined elsewhere (as for the console), or CFG_CMD_NET must
- * be removed from CONFIG_COMMANDS to remove support for networking.
+ * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
+ * must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */
#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */
@@ -106,22 +106,33 @@
#define CONFIG_BAUDRATE 38400
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_DHCP \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "dhcp;bootm" /* autoboot command */
#define CONFIG_BOOTARGS "root=/dev/nfs rw ip=:::::eth0:dhcp"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -139,7 +150,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -223,7 +234,7 @@
#endif
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -248,18 +259,18 @@
#define CFG_LSRT 0x0F
#define CFG_MPTPR 0x4000
-#define CFG_PSDRAM_BR CFG_SDRAM_BASE | 0x00000041
+#define CFG_PSDRAM_BR (CFG_SDRAM_BASE | 0x00000041)
#define CFG_PSDRAM_OR 0xFC0028C0
-#define CFG_LSDRAM_BR CFG_LSDRAM_BASE | 0x00001861
+#define CFG_LSDRAM_BR (CFG_LSDRAM_BASE | 0x00001861)
#define CFG_LSDRAM_OR 0xFF803480
-#define CFG_BR0_PRELIM CFG_FLASH_BASE | 0x00000801
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | 0x00000801)
#define CFG_OR0_PRELIM 0xFFE00856
-#define CFG_BR5_PRELIM CFG_EEPROM | 0x00000801
+#define CFG_BR5_PRELIM (CFG_EEPROM | 0x00000801)
#define CFG_OR5_PRELIM 0xFFFF03F6
-#define CFG_BR6_PRELIM CFG_FLSIMM_BASE | 0x00001801
+#define CFG_BR6_PRELIM (CFG_FLSIMM_BASE | 0x00001801)
#define CFG_OR6_PRELIM 0xFF000856
-#define CFG_BR7_PRELIM CFG_BCSR | 0x00000801
+#define CFG_BR7_PRELIM (CFG_BCSR | 0x00000801)
#define CFG_OR7_PRELIM 0xFFFF83F6
#define CFG_RESET_ADDRESS 0xC0000000
diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h
index f163d00..5ba8d1a 100644
--- a/include/configs/ZUMA.h
+++ b/include/configs/ZUMA.h
@@ -101,17 +101,29 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#undef CONFIG_ALTIVEC /* undef to disable */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MII /* enable MII commands */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BSP | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_DATE)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DATE
+
/*
* JFFS2 partitions
@@ -131,15 +143,12 @@
#define MTDPARTS_DEFAULT "mtdparts=zuma-1:-(jffs2),zuma-2:-(user)"
*/
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -349,7 +358,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/acadia.h b/include/configs/acadia.h
index 35b6a51..e3f6e2c 100644
--- a/include/configs/acadia.h
+++ b/include/configs/acadia.h
@@ -34,7 +34,9 @@
#define CONFIG_ACADIA 1 /* Board is Acadia */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_405EZ 1 /* Specifc 405EZ support*/
-#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
+/* Detect Acadia PLL input clock automatically via CPLD bit */
+#define CONFIG_SYS_CLK_FREQ ((in8(CFG_CPLD_BASE + 0) == 0x0c) ? \
+ 66666666 : 33333000)
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_F 1 /* Call misc_init_f */
@@ -73,7 +75,7 @@
#define CFG_TEMP_STACK_OCM 1 /* OCM as init ram */
/* On Chip Memory location */
-#define CFG_OCM_DATA_ADDR 0xF8000000
+#define CFG_OCM_DATA_ADDR 0xf8000000
#define CFG_OCM_DATA_SIZE 0x4000 /* 16K of onchip SRAM */
#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of SRAM */
#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */
@@ -107,6 +109,7 @@
/*-----------------------------------------------------------------------
* FLASH related
*----------------------------------------------------------------------*/
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
#define CFG_FLASH_CFI /* The flash is CFI compatible */
#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
@@ -120,6 +123,10 @@
#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+#else
+#define CFG_NO_FLASH 1 /* No NOR on Acadia when NAND-booting */
+#endif
+
#ifdef CFG_ENV_IS_IN_FLASH
#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
@@ -130,6 +137,63 @@
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif
+/*
+ * IPL (Initial Program Loader, integrated inside CPU)
+ * Will load first 4k from NAND (SPL) into cache and execute it from there.
+ *
+ * SPL (Secondary Program Loader)
+ * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
+ * has to fit into 4kByte. It sets up the CPU and configures the SDRAM
+ * controller and the NAND controller so that the special U-Boot image can be
+ * loaded from NAND to SDRAM.
+ *
+ * NUB (NAND U-Boot)
+ * This NAND U-Boot (NUB) is a special U-Boot version which can be started
+ * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
+ *
+ * On 440EPx the SPL is copied to SDRAM before the NAND controller is
+ * set up. While still running from cache, I experienced problems accessing
+ * the NAND controller. sr - 2006-08-25
+ */
+#define CFG_NAND_BOOT_SPL_SRC 0xfffff000 /* SPL location */
+#define CFG_NAND_BOOT_SPL_SIZE (4 << 10) /* SPL size */
+#define CFG_NAND_BOOT_SPL_DST (CFG_OCM_DATA_ADDR + (16 << 10)) /* Copy SPL here*/
+#define CFG_NAND_U_BOOT_DST 0x01000000 /* Load NUB to this addr */
+#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST /* Start NUB from this addr */
+#define CFG_NAND_BOOT_SPL_DELTA (CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)
+
+/*
+ * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
+ */
+#define CFG_NAND_U_BOOT_OFFS (16 << 10) /* Offset to RAM U-Boot image */
+#define CFG_NAND_U_BOOT_SIZE (384 << 10) /* Size of RAM U-Boot image */
+
+/*
+ * Now the NAND chip has to be defined (no autodetection used!)
+ */
+#define CFG_NAND_PAGE_SIZE 512 /* NAND chip page size */
+#define CFG_NAND_BLOCK_SIZE (16 << 10) /* NAND chip block size */
+#define CFG_NAND_PAGE_COUNT 32 /* NAND chip page count */
+#define CFG_NAND_BAD_BLOCK_POS 5 /* Location of bad block marker */
+#undef CFG_NAND_4_ADDR_CYCLE /* No fourth addr used (<=32MB) */
+
+#define CFG_NAND_ECCSIZE 256
+#define CFG_NAND_ECCBYTES 3
+#define CFG_NAND_ECCSTEPS (CFG_NAND_PAGE_SIZE / CFG_NAND_ECCSIZE)
+#define CFG_NAND_OOBSIZE 16
+#define CFG_NAND_ECCTOTAL (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS)
+#define CFG_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
+
+#ifdef CFG_ENV_IS_IN_NAND
+/*
+ * For NAND booting the environment is embedded in the U-Boot image. Please take
+ * look at the file board/amcc/sequoia/u-boot-nand.lds for details.
+ */
+#define CFG_ENV_SIZE CFG_NAND_BLOCK_SIZE
+#define CFG_ENV_OFFSET (CFG_NAND_U_BOOT_OFFS + CFG_ENV_SIZE)
+#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
+#endif
+
/*-----------------------------------------------------------------------
* RAM (CRAM)
*----------------------------------------------------------------------*/
@@ -207,7 +271,11 @@
"update=protect off fffc0000 ffffffff;era fffc0000 ffffffff;" \
"cp.b ${fileaddr} fffc0000 ${filesize};" \
"setenv filesize;saveenv\0" \
- "upd=run load;run update\0" \
+ "upd=run load update\0" \
+ "nload=tftp 200000 acadia/u-boot-nand.bin\0" \
+ "nupdate=nand erase 0 60000;nand write 200000 0 60000;" \
+ "setenv filesize;saveenv\0" \
+ "nupd=run nload nupdate\0" \
"kozio=bootm ffc60000\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -224,16 +292,6 @@
#define CONFIG_USB_OHCI
#define CONFIG_USB_STORAGE
-#if 0 /* test-only */
-#define TEST_ONLY_NAND
-#endif
-
-#ifdef TEST_ONLY_NAND
-#define CMD_NAND CFG_CMD_NAND
-#else
-#define CMD_NAND 0
-#endif
-
/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -241,27 +299,45 @@
#define CONFIG_SUPPORT_VFAT
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DTT | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CMD_NAND | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_USB)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_USB
+
+/*
+ * No NOR on Acadia when NAND-booting
+ */
+#if defined(CONFIG_NAND_U_BOOT) || defined(CONFIG_NAND_SPL)
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#endif
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -270,7 +346,7 @@
*----------------------------------------------------------------------*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -300,7 +376,6 @@
*/
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-#ifdef TEST_ONLY_NAND
/*-----------------------------------------------------------------------
* NAND FLASH
*----------------------------------------------------------------------*/
@@ -308,26 +383,29 @@
#define NAND_MAX_CHIPS 1
#define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS)
#define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
-#endif
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405EZ CPU */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value*/
#endif
/*-----------------------------------------------------------------------
* External Bus Controller (EBC) Setup
*----------------------------------------------------------------------*/
-#define CFG_NAND_CS 0 /* NAND chip connected to CSx */
-
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CFG_NAND_CS 3
/* Memory Bank 0 (Flash) initialization */
#define CFG_EBC_PB0AP 0x03337200
#define CFG_EBC_PB0CR 0xfe0bc000
+/* Memory Bank 3 (NAND-FLASH) initialization */
+#define CFG_EBC_PB3AP 0x018003c0
+#define CFG_EBC_PB3CR (CFG_NAND_ADDR | 0x1c000)
+
/* Just initial configuration for CRAM. Will be changed in memory.c to sync mode*/
/* Memory Bank 1 (CRAM) initialization */
#define CFG_EBC_PB1AP 0x030400c0
@@ -336,10 +414,24 @@
/* Memory Bank 2 (CRAM) initialization */
#define CFG_EBC_PB2AP 0x030400c0
#define CFG_EBC_PB2CR 0x020bc000
+#else
+#define CFG_NAND_CS 0 /* NAND chip connected to CSx */
+/* Memory Bank 0 (NAND-FLASH) initialization */
+#define CFG_EBC_PB0AP 0x018003c0
+#define CFG_EBC_PB0CR (CFG_NAND_ADDR | 0x1c000)
-/* Memory Bank 3 (NAND-FLASH) initialization */
-#define CFG_EBC_PB3AP 0x018003c0
-#define CFG_EBC_PB3CR (CFG_NAND_ADDR | 0x1c000)
+/*
+ * When NAND-booting the CRAM EBC setup must be done in sync mode, since the
+ * NAND-SPL already initialized the CRAM and EBC to sync mode.
+ */
+/* Memory Bank 1 (CRAM) initialization */
+#define CFG_EBC_PB1AP 0x9C0201C0
+#define CFG_EBC_PB1CR 0x000bc000
+
+/* Memory Bank 2 (CRAM) initialization */
+#define CFG_EBC_PB2AP 0x9C0201C0
+#define CFG_EBC_PB2CR 0x020bc000
+#endif
/* Memory Bank 4 (CPLD) initialization */
#define CFG_EBC_PB4AP 0x04006000
@@ -351,14 +443,15 @@
* GPIO Setup
*----------------------------------------------------------------------*/
#define CFG_GPIO_CRAM_CLK 8
-#define CFG_GPIO_CRAM_WAIT 9
+#define CFG_GPIO_CRAM_WAIT 9 /* GPIO-In */
#define CFG_GPIO_CRAM_ADV 10
-#define CFG_GPIO_CRAM_CRE (32 + 21)
+#define CFG_GPIO_CRAM_CRE (32 + 21) /* GPIO-Out */
/*-----------------------------------------------------------------------
* Definitions for GPIO_0 setup (PPC405EZ specific)
*
- * GPIO0[0-3] - External Bus Controller CS_4 - CS_7 Outputs
+ * GPIO0[0-2] - External Bus Controller CS_4 - CS_6 Outputs
+ * GPIO0[3] - NAND FLASH Controller CE3 (NFCE3) Output
* GPIO0[4] - External Bus Controller Hold Input
* GPIO0[5] - External Bus Controller Priority Input
* GPIO0[6] - External Bus Controller HLDA Output
@@ -374,12 +467,12 @@
* GPIO0[28-30] - Trace Outputs / PWM Inputs
* GPIO0[31] - PWM_8 I/O
*/
-#define CFG_GPIO0_TCR 0xC0000000
-#define CFG_GPIO0_OSRL 0x50000000
-#define CFG_GPIO0_OSRH 0x00000055
-#define CFG_GPIO0_ISR1L 0x00000000
+#define CFG_GPIO0_TCR 0xC0A00000
+#define CFG_GPIO0_OSRL 0x50004400
+#define CFG_GPIO0_OSRH 0x02000055
+#define CFG_GPIO0_ISR1L 0x00001000
#define CFG_GPIO0_ISR1H 0x00000055
-#define CFG_GPIO0_TSRL 0x00000000
+#define CFG_GPIO0_TSRL 0x02000000
#define CFG_GPIO0_TSRH 0x00000055
/*-----------------------------------------------------------------------
@@ -396,13 +489,13 @@
* GPIO1[16] - SPI_SS_1_N Output
* GPIO1[17-20] - Trace Output/External Interrupts IRQ0 - IRQ3 inputs
*/
-#define CFG_GPIO1_OSRH 0x55455555
+#define CFG_GPIO1_TCR 0xFFFF8414
#define CFG_GPIO1_OSRL 0x40000110
-#define CFG_GPIO1_ISR1H 0x00000000
+#define CFG_GPIO1_OSRH 0x55455555
#define CFG_GPIO1_ISR1L 0x15555445
-#define CFG_GPIO1_TSRH 0x00000000
+#define CFG_GPIO1_ISR1H 0x00000000
#define CFG_GPIO1_TSRL 0x00000000
-#define CFG_GPIO1_TCR 0xFFFF8014
+#define CFG_GPIO1_TSRH 0x00000000
/*
* Internal Definitions
@@ -412,7 +505,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ads5121.h b/include/configs/ads5121.h
new file mode 100644
index 0000000..22eac1b
--- /dev/null
+++ b/include/configs/ads5121.h
@@ -0,0 +1,401 @@
+/*
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * ADS5121 board configuration file
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define DEBUG
+#undef DEBUG
+
+/*
+ * Memory map for the ADS5121 board:
+ *
+ * 0x0000_0000 - 0x0FFF_FFFF DDR RAM (256 MB)
+ * 0x3000_0000 - 0x3001_FFFF SRAM (128 KB)
+ * 0x8000_0000 - 0x803F_FFFF IMMR (4 MB)
+ * 0x8200_0000 - 0x8200_001F CPLD (32 B)
+ * 0xFC00_0000 - 0xFFFF_FFFF NOR Boot FLASH (64 MB)
+ */
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_E300 1 /* E300 Family */
+#define CONFIG_MPC512X 1 /* MPC512X family */
+
+#undef CONFIG_PCI
+
+#define CFG_MPC512X_CLKIN 66000000 /* in Hz */
+
+#define CONFIG_BOARD_EARLY_INIT_F /* call board_early_init_f() */
+
+#define CFG_IMMR 0x80000000
+
+#define CFG_MEMTEST_START 0x00200000 /* memtest region */
+#define CFG_MEMTEST_END 0x00400000
+
+/*
+ * DDR Setup - manually set all parameters as there's no SPD etc.
+ */
+#define CFG_DDR_SIZE 256 /* MB */
+#define CFG_DDR_BASE 0x00000000 /* DDR is system memory*/
+#define CFG_SDRAM_BASE CFG_DDR_BASE
+
+/* DDR Controller Configuration
+ *
+ * SYS_CFG:
+ * [31:31] MDDRC Soft Reset: Diabled
+ * [30:30] DRAM CKE pin: Enabled
+ * [29:29] DRAM CLK: Enabled
+ * [28:28] Command Mode: Enabled (For initialization only)
+ * [27:25] DRAM Row Select: dram_row[15:0] = magenta_address[25:10]
+ * [24:21] DRAM Bank Select: dram_bank[1:0] = magenta_address[11:10]
+ * [20:19] Read Test: DON'T USE
+ * [18:18] Self Refresh: Enabled
+ * [17:17] 16bit Mode: Disabled
+ * [16:13] Ready Delay: 2
+ * [12:12] Half DQS Delay: Disabled
+ * [11:11] Quarter DQS Delay: Disabled
+ * [10:08] Write Delay: 2
+ * [07:07] Early ODT: Disabled
+ * [06:06] On DIE Termination: Disabled
+ * [05:05] FIFO Overflow Clear: DON'T USE here
+ * [04:04] FIFO Underflow Clear: DON'T USE here
+ * [03:03] FIFO Overflow Pending: DON'T USE here
+ * [02:02] FIFO Underlfow Pending: DON'T USE here
+ * [01:01] FIFO Overlfow Enabled: Enabled
+ * [00:00] FIFO Underflow Enabled: Enabled
+ * TIME_CFG0
+ * [31:16] DRAM Refresh Time: 0 CSB clocks
+ * [15:8] DRAM Command Time: 0 CSB clocks
+ * [07:00] DRAM Precharge Time: 0 CSB clocks
+ * TIME_CFG1
+ * [31:26] DRAM tRFC:
+ * [25:21] DRAM tWR1:
+ * [20:17] DRAM tWRT1:
+ * [16:11] DRAM tDRR:
+ * [10:05] DRAM tRC:
+ * [04:00] DRAM tRAS:
+ * TIME_CFG2
+ * [31:28] DRAM tRCD:
+ * [27:23] DRAM tFAW:
+ * [22:19] DRAM tRTW1:
+ * [18:15] DRAM tCCD:
+ * [14:10] DRAM tRTP:
+ * [09:05] DRAM tRP:
+ * [04:00] DRAM tRPA
+ */
+
+#define CFG_MDDRC_SYS_CFG 0xF8604200
+#define CFG_MDDRC_SYS_CFG_RUN 0xE8604200
+#define CFG_MDDRC_SYS_CFG_EN 0x30000000
+#define CFG_MDDRC_TIME_CFG0 0x0000281E
+#define CFG_MDDRC_TIME_CFG0_RUN 0x01F4281E
+#define CFG_MDDRC_TIME_CFG1 0x54EC1168
+#define CFG_MDDRC_TIME_CFG2 0x35210864
+
+#define CFG_MICRON_NOP 0x01380000
+#define CFG_MICRON_PCHG_ALL 0x01100400
+#define CFG_MICRON_MR 0x01000022
+#define CFG_MICRON_EM2 0x01020000
+#define CFG_MICRON_EM3 0x01030000
+#define CFG_MICRON_EN_DLL 0x01010000
+#define CFG_MICRON_RST_DLL 0x01000932
+#define CFG_MICRON_RFSH 0x01080000
+#define CFG_MICRON_INIT_DEV_OP 0x01000832
+#define CFG_MICRON_OCD_DEFAULT 0x01010780
+#define CFG_MICRON_OCD_EXIT 0x01010400
+
+/* DDR Priority Manager Configuration */
+#define CFG_MDDRCGRP_PM_CFG1 0x000777AA
+#define CFG_MDDRCGRP_PM_CFG2 0x00000055
+#define CFG_MDDRCGRP_HIPRIO_CFG 0x00000000
+#define CFG_MDDRCGRP_LUT0_MU 0x11111117
+#define CFG_MDDRCGRP_LUT0_ML 0x7777777A
+#define CFG_MDDRCGRP_LUT1_MU 0x4444EEEE
+#define CFG_MDDRCGRP_LUT1_ML 0xEEEEEEEE
+#define CFG_MDDRCGRP_LUT2_MU 0x44444444
+#define CFG_MDDRCGRP_LUT2_ML 0x44444444
+#define CFG_MDDRCGRP_LUT3_MU 0x55555555
+#define CFG_MDDRCGRP_LUT3_ML 0x55555558
+#define CFG_MDDRCGRP_LUT4_MU 0x11111111
+#define CFG_MDDRCGRP_LUT4_ML 0x1111117C
+#define CFG_MDDRCGRP_LUT0_AU 0x33333377
+#define CFG_MDDRCGRP_LUT0_AL 0x7777EEEE
+#define CFG_MDDRCGRP_LUT1_AU 0x11111111
+#define CFG_MDDRCGRP_LUT1_AL 0x11111111
+#define CFG_MDDRCGRP_LUT2_AU 0x11111111
+#define CFG_MDDRCGRP_LUT2_AL 0x11111111
+#define CFG_MDDRCGRP_LUT3_AU 0x11111111
+#define CFG_MDDRCGRP_LUT3_AL 0x11111111
+#define CFG_MDDRCGRP_LUT4_AU 0x11111111
+#define CFG_MDDRCGRP_LUT4_AL 0x11111111
+
+/*
+ * NOR FLASH on the Local Bus
+ */
+#define CFG_FLASH_CFI /* use the Common Flash Interface */
+#define CFG_FLASH_CFI_DRIVER /* use the CFI driver */
+#define CFG_FLASH_BASE 0xFC000000 /* start of FLASH */
+#define CFG_FLASH_SIZE 0x04000000 /* max flash size in bytes */
+#define CFG_FLASH_USE_BUFFER_WRITE
+
+#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
+#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE}
+#define CFG_MAX_FLASH_SECT 256 /* max sectors per device */
+
+#undef CFG_FLASH_CHECKSUM
+
+/*
+ * CPLD registers area is really only 32 bytes in size, but the smallest possible LP
+ * window is 64KB
+ */
+#define CFG_CPLD_BASE 0x82000000
+#define CFG_CPLD_SIZE 0x00010000 /* 64 KB */
+
+#define CFG_SRAM_BASE 0x30000000
+#define CFG_SRAM_SIZE 0x00020000 /* 128 KB */
+
+#define CFG_CS0_CFG 0x05059310 /* ALE active low, data size 4bytes */
+#define CFG_CS2_CFG 0x05059010 /* ALE active low, data size 1byte */
+
+/* Use SRAM for initial stack */
+#define CFG_INIT_RAM_ADDR CFG_SRAM_BASE /* Initial RAM address */
+#define CFG_INIT_RAM_END CFG_SRAM_SIZE /* End of used area in RAM */
+
+#define CFG_GBL_DATA_SIZE 0x100 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE /* Start of monitor */
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
+
+/*
+ * Serial Port
+ */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 3 /* console is on PSC3 */
+#if CONFIG_PSC_CONSOLE != 3
+#error CONFIG_PSC_CONSOLE must be 3
+#endif
+#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+
+#define CONSOLE_FIFO_TX_SIZE FIFOC_PSC3_TX_SIZE
+#define CONSOLE_FIFO_TX_ADDR FIFOC_PSC3_TX_ADDR
+#define CONSOLE_FIFO_RX_SIZE FIFOC_PSC3_RX_SIZE
+#define CONSOLE_FIFO_RX_ADDR FIFOC_PSC3_RX_ADDR
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+/* Use the HUSH parser */
+#define CFG_HUSH_PARSER
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+/* I2C */
+#define CONFIG_HARD_I2C /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* so disable bit-banged I2C */
+#define CONFIG_I2C_MULTI_BUS
+#define CONFIG_I2C_CMD_TREE
+#define CFG_I2C_SPEED 100000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+#if 0
+#define CFG_I2C_NOPROBES {{0,0x69}} * Don't probe these addrs */
+#endif
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC512x_FEC 1
+#define CONFIG_NET_MULTI
+#define CONFIG_PHY_ADDR 0x1
+#define CONFIG_MII 1 /* MII PHY management */
+
+#if 0
+/*
+ * Configure on-board RTC
+ */
+#define CONFIG_RTC_DS1374 /* use ds1374 rtc via i2c */
+#define CFG_I2C_RTC_ADDR 0x68 /* at address 0x68 */
+#endif
+
+/*
+ * Environment
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+/* This has to be a multiple of the Flash sector size */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + CFG_MONITOR_LEN)
+#define CFG_ENV_SIZE 0x2000
+#define CFG_ENV_SECT_SIZE 0x40000 /* one sector (256K) for env */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+#if defined(CONFIG_PCI)
+#define CONFIG_CMD_PCI
+#endif
+
+/*
+ * Watchdog timeout = CFG_WATCHDOG_VALUE * 65536 / IPS clock.
+ * For example, when IPS is set to 66MHz and CFG_WATCHDOG_VALUE is set
+ * to 0xFFFF, watchdog timeouts after about 64s. For details refer
+ * to chapter 36 of the MPC5121e Reference Manual.
+ */
+#define CONFIG_WATCHDOG /* enable watchdog */
+#define CFG_WATCHDOG_VALUE 0xFFFF
+
+ /*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LOAD_ADDR 0x2000000 /* default load address */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#ifdef CONFIG_CMD_KGDB
+ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+
+#define CFG_PBSIZE (CFG_CBSIZE + sizeof(CFG_PROMPT) + 16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+
+/* Cache Configuration */
+#define CFG_DCACHE_SIZE 32768
+#define CFG_CACHELINE_SIZE 32
+#ifdef CONFIG_CMD_KGDB
+#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
+#endif
+
+#define CFG_HID0_INIT 0x000000000
+#define CFG_HID0_FINAL HID0_ENABLE_MACHINE_CHECK
+#define CFG_HID2 HID2_HBE
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_HOSTNAME ads5121
+#define CONFIG_BOOTFILE uImage
+
+#define CONFIG_LOADADDR 200000 /* default location for tftp and bootm */
+
+#define CONFIG_BOOTDELAY 5 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "load=tftp 200000 /tftpboot/ads5121/u-boot.bin\0" \
+ "update=protect off FFF00000 +${filesize};" \
+ "era FFF00000 +${filesize};cp.b 200000 FFF00000 ${filesize}\0" \
+ "upd=run load;run update\0" \
+ ""
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr - $fdtaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $fdtaddr $fdtfile;" \
+ "bootm $loadaddr $ramdiskaddr $fdtaddr"
+
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/adsvix.h b/include/configs/adsvix.h
index c410891..703d312 100644
--- a/include/configs/adsvix.h
+++ b/include/configs/adsvix.h
@@ -68,10 +68,28 @@
#define CONFIG_DOS_PARTITION 1
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_NET) | CFG_CMD_MMC | CFG_CMD_FAT | CFG_CMD_IDE | CFG_CMD_PCMCIA)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_PCMCIA
+
+#undef CONFIG_CMD_NET
+
#undef CONFIG_SHOW_BOOT_PROGRESS
@@ -162,7 +180,7 @@
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
/* #define CONFIG_INITRD_TAG 1 */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/aev.h b/include/configs/aev.h
index 8d9f0a1..5bab793 100644
--- a/include/configs/aev.h
+++ b/include/configs/aev.h
@@ -44,11 +44,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -91,34 +86,42 @@
CFG_POST_I2C)
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
/* preserve space for the post_word at end of on-chip SRAM */
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#else
-#define CFG_CMD_POST_DIAG 0
#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_BMP_CMD | \
- CFG_CMD_PCI | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+
+#ifdef CONFIG_POST
+#define CONFIG_CMD_DIAG
+#endif
+
#define CONFIG_TIMESTAMP /* display image timestamps */
@@ -166,17 +169,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -324,7 +327,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -343,9 +346,13 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -362,7 +369,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index 67f62d3..d88c3ad 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -29,6 +29,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_ALPR 1 /* Board is ebony */
#define CONFIG_440GX 1 /* Specifc GX support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_LAST_STAGE_INIT 1 /* call last_stage_init() */
@@ -94,7 +95,7 @@
#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
-#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
@@ -209,25 +210,37 @@
#define CONFIG_NETCONSOLE /* include NetConsole support */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_FPGA | \
- CFG_CMD_NAND | \
- CFG_CMD_REGINFO)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FPGA
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -236,7 +249,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -256,7 +269,7 @@
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CONFIG_LOOPW 1 /* enable loopw command */
-#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
+#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
@@ -274,7 +287,6 @@
#define CONFIG_PCI_BOOTDELAY 1 /* enable pci bootdelay variable*/
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#define CFG_PCI_MASTER_INIT
@@ -358,7 +370,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/armadillo.h b/include/configs/armadillo.h
index 9a1c559..73a8885 100644
--- a/include/configs/armadillo.h
+++ b/include/configs/armadillo.h
@@ -71,12 +71,21 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL) /* | CFG_CMD_JFFS2)*/
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=/dev/ram0 rootfstype=ext2 console=ttyAM0,115200"
diff --git a/include/configs/assabet.h b/include/configs/assabet.h
index 1a69ebe..226ad54 100644
--- a/include/configs/assabet.h
+++ b/include/configs/assabet.h
@@ -66,18 +66,30 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttySA0,115200n8 root=/dev/nfs ip=bootp"
#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
#define CFG_AUTOLOAD "n" /* No autoload */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h
index 8fad55d..a65c5f3 100644
--- a/include/configs/at91rm9200dk.h
+++ b/include/configs/at91rm9200dk.h
@@ -97,18 +97,31 @@
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_ENV_OVERWRITE 1 */
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | CFG_CMD_MII |\
- CFG_CMD_DHCP ) & \
- ~(CFG_CMD_BDI | \
- CFG_CMD_IMI | \
- CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_FPGA | \
- CFG_CMD_MISC | \
- CFG_CMD_LOADS ))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+#undef CONFIG_CMD_LOADS
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
@@ -150,6 +163,11 @@
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91C_USE_RMII
+/* AC Characteristics */
+/* DLYBS = tCSS = 250ns min and DLYBCT = tCSH = 250ns */
+#define DATAFLASH_TCSS (0xC << 16)
+#define DATAFLASH_TCHS (0x1 << 24)
+
#define CONFIG_HAS_DATAFLASH 1
#define CFG_SPI_WRITE_TOUT (5*CFG_HZ)
#define CFG_MAX_DATAFLASH_BANKS 2
diff --git a/include/configs/atc.h b/include/configs/atc.h
index bf6c170..3ff4b68 100644
--- a/include/configs/atc.h
+++ b/include/configs/atc.h
@@ -64,9 +64,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
- *
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#undef CONFIG_ETHER_NONE /* define if ether on something else */
@@ -124,27 +122,37 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_PCI | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_DATE | \
- CFG_CMD_IDE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_IDE
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -285,7 +293,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/atstk1002.h b/include/configs/atstk1002.h
index beaf385..75b153e 100644
--- a/include/configs/atstk1002.h
+++ b/include/configs/atstk1002.h
@@ -108,47 +108,29 @@
#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
#define CONFIG_NET_MULTI 1
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_SUBNETMASK \
- | CONFIG_BOOTP_GATEWAY)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_COMMANDS (CFG_CMD_BDI \
- | CFG_CMD_LOADS \
- | CFG_CMD_LOADB \
- | CFG_CMD_IMI \
- /* | CFG_CMD_CACHE */ \
- | CFG_CMD_FLASH \
- | CFG_CMD_MEMORY \
- | CFG_CMD_NET \
- | CFG_CMD_ENV \
- /* | CFG_CMD_IRQ */ \
- | CFG_CMD_BOOTD \
- | CFG_CMD_CONSOLE \
- /* | CFG_CMD_EEPROM */ \
- | CFG_CMD_ASKENV \
- | CFG_CMD_RUN \
- | CFG_CMD_ECHO \
- /* | CFG_CMD_I2C */ \
- | CFG_CMD_REGINFO \
- /* | CFG_CMD_DATE */ \
- | CFG_CMD_DHCP \
- /* | CFG_CMD_AUTOSCRIPT */ \
- /* | CFG_CMD_MII */ \
- | CFG_CMD_MISC \
- /* | CFG_CMD_SDRAM */ \
- /* | CFG_CMD_DIAG */ \
- /* | CFG_CMD_HWFLOW */ \
- /* | CFG_CMD_SAVES */ \
- /* | CFG_CMD_SPI */ \
- /* | CFG_CMD_PING */ \
- | CFG_CMD_MMC \
- | CFG_CMD_FAT \
- | CFG_CMD_IMLS \
- /* | CFG_CMD_ITEST */ \
- | CFG_CMD_EXT2 \
- | CFG_CMD_JFFS2 \
- )
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_REGINFO
+
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_XIMG
#define CONFIG_ATMEL_USART 1
#define CONFIG_MACB 1
@@ -201,10 +183,9 @@
#define CFG_LONGHELP 1
#define CFG_MEMTEST_START \
- ({ DECLARE_GLOBAL_DATA_PTR; gd->bd->bi_dram[0].start; })
+ ({ gd->bd->bi_dram[0].start; })
#define CFG_MEMTEST_END \
({ \
- DECLARE_GLOBAL_DATA_PTR; \
gd->bd->bi_dram[0].start + gd->bd->bi_dram[0].size; \
})
#define CFG_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
diff --git a/include/configs/bamboo.h b/include/configs/bamboo.h
index db58a9f..14c5638 100644
--- a/include/configs/bamboo.h
+++ b/include/configs/bamboo.h
@@ -32,6 +32,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_BAMBOO 1 /* Board is BAMBOO */
#define CONFIG_440EP 1 /* Specific PPC440EP support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
@@ -50,7 +51,7 @@
*----------------------------------------------------------------------*/
#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
-#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
+#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
#define CFG_FLASH_BASE 0xfff00000 /* start of FLASH */
#define CFG_PCI_MEMBASE 0xa0000000 /* mapped pci memory*/
@@ -73,9 +74,9 @@
* Initial RAM & stack pointer (placed in SDRAM)
*----------------------------------------------------------------------*/
#define CFG_INIT_RAM_DCACHE 1 /* d-cache as init ram */
-#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
+#define CFG_INIT_RAM_ADDR 0x70000000 /* DCache */
#define CFG_INIT_RAM_END (4 << 10)
-#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
+#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
@@ -104,21 +105,18 @@
/*-----------------------------------------------------------------------
* Environment
*----------------------------------------------------------------------*/
-/*
- * Define here the location of the environment variables (FLASH or EEPROM).
- * Note: DENX encourages to use redundant environment in FLASH.
- */
-#if 1
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
#else
-#define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
+#define CFG_ENV_IS_IN_NAND 1 /* use NAND for environment vars */
+#define CFG_ENV_IS_EMBEDDED 1 /* use embedded environment */
#endif
/*-----------------------------------------------------------------------
* FLASH related
*----------------------------------------------------------------------*/
-#define CFG_MAX_FLASH_BANKS 3 /* number of banks */
-#define CFG_MAX_FLASH_SECT 256 /* sectors per device */
+#define CFG_MAX_FLASH_BANKS 3 /* number of banks */
+#define CFG_MAX_FLASH_SECT 256 /* sectors per device */
#undef CFG_FLASH_CHECKSUM
#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
@@ -128,12 +126,12 @@
#define CFG_FLASH_ADDR1 0x2aa
#define CFG_FLASH_WORD_SIZE unsigned char
-#define CFG_FLASH_2ND_16BIT_DEV 1 /* bamboo has 8 and 16bit device */
-#define CFG_FLASH_2ND_ADDR 0x87800000 /* bamboo has 8 and 16bit device */
+#define CFG_FLASH_2ND_16BIT_DEV 1 /* bamboo has 8 and 16bit device */
+#define CFG_FLASH_2ND_ADDR 0x87800000 /* bamboo has 8 and 16bit device */
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
/* Address and size of Redundant Environment Sector */
@@ -141,22 +139,91 @@
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif /* CFG_ENV_IS_IN_FLASH */
+/*
+ * IPL (Initial Program Loader, integrated inside CPU)
+ * Will load first 4k from NAND (SPL) into cache and execute it from there.
+ *
+ * SPL (Secondary Program Loader)
+ * Will load special U-Boot version (NUB) from NAND and execute it. This SPL
+ * has to fit into 4kByte. It sets up the CPU and configures the SDRAM
+ * controller and the NAND controller so that the special U-Boot image can be
+ * loaded from NAND to SDRAM.
+ *
+ * NUB (NAND U-Boot)
+ * This NAND U-Boot (NUB) is a special U-Boot version which can be started
+ * from RAM. Therefore it mustn't (re-)configure the SDRAM controller.
+ *
+ * On 440EPx the SPL is copied to SDRAM before the NAND controller is
+ * set up. While still running from cache, I experienced problems accessing
+ * the NAND controller. sr - 2006-08-25
+ */
+#define CFG_NAND_BOOT_SPL_SRC 0xfffff000 /* SPL location */
+#define CFG_NAND_BOOT_SPL_SIZE (4 << 10) /* SPL size */
+#define CFG_NAND_BOOT_SPL_DST 0x00800000 /* Copy SPL here */
+#define CFG_NAND_U_BOOT_DST 0x01000000 /* Load NUB to this addr */
+#define CFG_NAND_U_BOOT_START CFG_NAND_U_BOOT_DST /* Start NUB from this addr */
+#define CFG_NAND_BOOT_SPL_DELTA (CFG_NAND_BOOT_SPL_SRC - CFG_NAND_BOOT_SPL_DST)
+
+/*
+ * Define the partitioning of the NAND chip (only RAM U-Boot is needed here)
+ */
+#define CFG_NAND_U_BOOT_OFFS (16 << 10) /* Offset to RAM U-Boot image */
+#define CFG_NAND_U_BOOT_SIZE (384 << 10) /* Size of RAM U-Boot image */
+
+/*
+ * Now the NAND chip has to be defined (no autodetection used!)
+ */
+#define CFG_NAND_PAGE_SIZE 512 /* NAND chip page size */
+#define CFG_NAND_BLOCK_SIZE (16 << 10) /* NAND chip block size */
+#define CFG_NAND_PAGE_COUNT 32 /* NAND chip page count */
+#define CFG_NAND_BAD_BLOCK_POS 5 /* Location of bad block marker */
+#define CFG_NAND_4_ADDR_CYCLE 1 /* Fourth addr used (>32MB) */
+
+#define CFG_NAND_ECCSIZE 256
+#define CFG_NAND_ECCBYTES 3
+#define CFG_NAND_ECCSTEPS (CFG_NAND_PAGE_SIZE / CFG_NAND_ECCSIZE)
+#define CFG_NAND_OOBSIZE 16
+#define CFG_NAND_ECCTOTAL (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS)
+#define CFG_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
+
+#ifdef CFG_ENV_IS_IN_NAND
+/*
+ * For NAND booting the environment is embedded in the U-Boot image. Please take
+ * look at the file board/amcc/sequoia/u-boot-nand.lds for details.
+ */
+#define CFG_ENV_SIZE CFG_NAND_BLOCK_SIZE
+#define CFG_ENV_OFFSET (CFG_NAND_U_BOOT_OFFS + CFG_ENV_SIZE)
+#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET + CFG_ENV_SIZE)
+#endif
+
/*-----------------------------------------------------------------------
* NAND FLASH
*----------------------------------------------------------------------*/
-#define CFG_MAX_NAND_DEVICE 1
-#define NAND_MAX_CHIPS 1
-#define CFG_NAND_CS 1
+#define CFG_MAX_NAND_DEVICE 2
+#define NAND_MAX_CHIPS CFG_MAX_NAND_DEVICE
#define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS)
+#define CFG_NAND_BASE_LIST { CFG_NAND_BASE, CFG_NAND_ADDR + 2 }
#define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */
+#if !defined(CONFIG_NAND_U_BOOT) && !defined(CONFIG_NAND_SPL)
+#define CFG_NAND_CS 1
+#else
+#define CFG_NAND_CS 0 /* NAND chip connected to CSx */
+/* Memory Bank 0 (NAND-FLASH) initialization */
+#define CFG_EBC_PB0AP 0x018003c0
+#define CFG_EBC_PB0CR (CFG_NAND_ADDR | 0x1c000)
+#endif
+
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------------- */
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#undef CONFIG_DDR_ECC /* don't use ECC */
#define CFG_SIMULATE_SPD_EEPROM 0xff /* simulate spd eeprom on this address */
-#define SPD_EEPROM_ADDRESS {CFG_SIMULATE_SPD_EEPROM, 0x50, 0x51}
+#define SPD_EEPROM_ADDRESS {CFG_SIMULATE_SPD_EEPROM, 0x50, 0x51}
+#define CFG_MBYTES_SDRAM (64) /* 64MB fixed size for early-sdram-init */
+#define CONFIG_PROG_SDRAM_TLB
+#undef CFG_DRAM_TEST
/*-----------------------------------------------------------------------
* I2C
@@ -251,45 +318,55 @@
#define USB_2_0_DEVICE
#endif /*CONFIG_440EP*/
-#ifdef CONFIG_BAMBOO_NAND
-#define _CFG_CMD_NAND CFG_CMD_NAND
-#else
-#define _CFG_CMD_NAND 0
-#endif /* CONFIG_BAMBOO_NAND */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_USB | \
- CFG_CMD_FAT | \
- CFG_CMD_EXT2 | \
- _CFG_CMD_NAND | \
- CFG_CMD_SNTP )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_SNTP
+
+#ifdef CONFIG_BAMBOO_NAND
+#define CONFIG_CMD_NAND
+#endif
+
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -324,7 +401,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT
#define CFG_PCI_MASTER_INIT
@@ -343,7 +419,7 @@
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -355,7 +431,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/barco.h b/include/configs/barco.h
index 624fa1d..0bb446f 100644
--- a/include/configs/barco.h
+++ b/include/configs/barco.h
@@ -70,22 +70,30 @@
#define CONFIG_BOOTARGS "mem=32M"
-/* Add support for a few extra bootp options like:
- * - File size
- * - DNS
+
+/*
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE | \
- CONFIG_BOOTP_DNS)
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_EEPROM | \
- CFG_CMD_PCI )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PCI
+
+#undef CONFIG_CMD_NET
+
#define CONFIG_HUSH_PARSER 1 /* use "hush" command parser */
#define CONFIG_BOOTDELAY 1
@@ -110,7 +118,6 @@
*/
#define CONFIG_PCI /* include pci support */
#undef CONFIG_PCI_PNP
-#undef CFG_CMD_NET
#define PCI_ENET0_IOADDR 0x80000000
#define PCI_ENET0_MEMADDR 0x80000000
@@ -340,7 +347,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/bf533-ezkit.h b/include/configs/bf533-ezkit.h
index 65dfc81..6cb6bc4 100644
--- a/include/configs/bf533-ezkit.h
+++ b/include/configs/bf533-ezkit.h
@@ -97,19 +97,31 @@
#define CONFIG_LOADS_ECHO 1
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PING | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_DATE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_DATE
+
+
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 ip=192.168.0.15:192.168.0.2:192.168.0.1:255.255.255.0:ezkit:eth0:off console=ttyBF0,57600"
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CFG_PROMPT "ezkit> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/bf533-stamp.h b/include/configs/bf533-stamp.h
index 79a1404..cce6ef7 100644
--- a/include/configs/bf533-stamp.h
+++ b/include/configs/bf533-stamp.h
@@ -240,23 +240,6 @@
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600"
-#if (CONFIG_DRIVER_SMC91111)
-#define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \
- CFG_CMD_PING | \
- CFG_CMD_ELF | \
- CFG_CMD_CACHE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DATE)
-
-#else
-#define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \
- CFG_CMD_ELF | \
- CFG_CMD_CACHE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DATE)
-#endif
#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT)
#if (CONFIG_DRIVER_SMC91111)
@@ -305,20 +288,39 @@
#endif
#endif
-#if (CONFIG_SOFT_I2C)
-#define CONFIG_COMMANDS2 CFG_CMD_I2C
-#else
-#define CONFIG_COMMANDS2 0
-#endif /* CONFIG_SOFT_I2C */
-#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT)
-#define CONFIG_COMMANDS ( CONFIG_COMMANDS1 | CONFIG_COMMANDS2 | CFG_CMD_DHCP)
-#elif (BFIN_BOOT_MODE == BF533_SPI_BOOT)
-#define CONFIG_COMMANDS ( CONFIG_COMMANDS1 | CONFIG_COMMANDS2)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+
+#if (CONFIG_DRIVER_SMC91111)
+#define CONFIG_CMD_PING
#endif
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#if (CONFIG_SOFT_I2C)
+#define CONFIG_CMD_I2C
+#endif
+
+#if (BFIN_BOOT_MODE == BF533_BYPASS_BOOT)
+#define CONFIG_CMD_DHCP
+#endif
+
/*
* Console settings
@@ -345,7 +347,7 @@
#endif
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -395,7 +397,7 @@
/* Enabled below option for CF support */
/* #define CONFIG_STAMP_CF 1 */
-#if defined(CONFIG_STAMP_CF) && (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_STAMP_CF) && defined(CONFIG_CMD_IDE)
#define CONFIG_MISC_INIT_R 1
#define CONFIG_DOS_PARTITION 1
diff --git a/include/configs/bf537-stamp.h b/include/configs/bf537-stamp.h
index f6755ac..b9a9e3c 100644
--- a/include/configs/bf537-stamp.h
+++ b/include/configs/bf537-stamp.h
@@ -144,11 +144,8 @@
#endif
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
#define FLASH_START_POST_BLOCK 11 /* Should > = 11 */
#define FLASH_END_POST_BLOCK 71 /* Should < = 71 */
-#else
-#define CFG_CMD_POST_DIAG 0
#endif
/* CF-CARD IDE-HDD Support */
@@ -159,51 +156,65 @@
#if defined(CONFIG_BFIN_CF_IDE) || defined(CONFIG_BFIN_HDD_IDE) || defined(CONFIG_BFIN_TRUE_IDE)
# define CONFIG_BFIN_IDE 1
-# define ADD_IDE_CMD CFG_CMD_IDE
-#else
-# define ADD_IDE_CMD 0
#endif
/*#define CONFIG_BF537_NAND */ /* Add nand flash support */
-#ifdef CONFIG_BF537_NAND
-# define ADD_NAND_CMD CFG_CMD_NAND
-#else
-# define ADD_NAND_CMD 0
-#endif
-
#define CONFIG_NETCONSOLE 1
#define CONFIG_NET_MULTI 1
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#if (BFIN_BOOT_MODE == BF537_BYPASS_BOOT) || (BFIN_BOOT_MODE == BF537_SPI_MASTER_BOOT)
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+
#if (BFIN_CPU == ADSP_BF534)
-#define CONFIG_BFIN_CMD (CONFIG_CMD_DFL & ~CFG_CMD_NET)
+#undef CONFIG_CMD_NET
#else
-#define CONFIG_BFIN_CMD (CONFIG_CMD_DFL | CFG_CMD_PING)
+#define CONFIG_CMD_PING
+#endif
+
+#if defined(CONFIG_BFIN_CF_IDE) \
+ || defined(CONFIG_BFIN_HDD_IDE) \
+ || defined(CONFIG_BFIN_TRUE_IDE)
+#define CONFIG_CMD_IDE
+#endif
+
#endif
#if (BFIN_BOOT_MODE == BF537_BYPASS_BOOT)
-#define CONFIG_COMMANDS (CONFIG_BFIN_CMD| \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_CACHE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DHCP | \
- ADD_IDE_CMD | \
- ADD_NAND_CMD | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_DATE)
-#elif (BFIN_BOOT_MODE == BF537_SPI_MASTER_BOOT)
-#define CONFIG_COMMANDS (CONFIG_BFIN_CMD| \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_CACHE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_EEPROM | \
- ADD_IDE_CMD | \
- CFG_CMD_DATE)
+
+#define CONFIG_CMD_DHCP
+
+#if defined(CONFIG_POST)
+#define CONFIG_CMD_DIAG
#endif
+#ifdef CONFIG_BF537_NAND
+#define CONFIG_CMD_NAND
+#endif
+
+#endif
+
+
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600"
#define CONFIG_LOADADDR 0x1000000
@@ -256,9 +267,6 @@
#endif
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#if (BFIN_BOOT_MODE == BF537_SPI_MASTER_BOOT)
#if (BFIN_CPU == ADSP_BF534)
#define CFG_PROMPT "serial_bf534> " /* Monitor Command Prompt */
@@ -277,7 +285,7 @@
#endif
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/bf561-ezkit.h b/include/configs/bf561-ezkit.h
index 8d826fa..2966260 100644
--- a/include/configs/bf561-ezkit.h
+++ b/include/configs/bf561-ezkit.h
@@ -164,12 +164,6 @@
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 rw console=ttyBF0,57600"
#if (CONFIG_DRIVER_SMC91111)
-#define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \
- CFG_CMD_PING | \
- CFG_CMD_ELF | \
- CFG_CMD_CACHE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_DHCP)
#define CONFIG_EXTRA_ENV_SETTINGS \
"ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):" \
@@ -186,20 +180,36 @@
"cp.b $(loadaddr) 0x20000000 $(filesize)\0" \
""
#else
-#define CONFIG_COMMANDS1 (CONFIG_CMD_DFL | \
- CFG_CMD_ELF | \
- CFG_CMD_CACHE | \
- CFG_CMD_JFFS2)
#define CONFIG_EXTRA_ENV_SETTINGS \
"ramargs=setenv bootargs root=/dev/mtdblock0 rw console=ttyBF0,57600\0" \
"flashboot=bootm 0x20100000\0" \
""
#endif
-#define CONFIG_COMMANDS ( CONFIG_COMMANDS1 | CONFIG_COMMANDS2 )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_JFFS2
+
+#if defined(CONFIG_DRIVER_SMC91111)
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#endif
+
/*
* Console settings
@@ -208,7 +218,7 @@
#define CFG_PROMPT "ezkit> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/bubinga.h b/include/configs/bubinga.h
index 10c48143..7736a1e 100644
--- a/include/configs/bubinga.h
+++ b/include/configs/bubinga.h
@@ -137,25 +137,37 @@
#define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Bubinga */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -166,7 +178,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -219,7 +231,7 @@
#define CFG_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
-#if (CONFIG_COMMANDS & CFG_CMD_EEPROM)
+#if defined(CONFIG_CMD_EEPROM)
#define CFG_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */
#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
#endif
@@ -314,7 +326,7 @@
*/
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405EP CPU */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -426,7 +438,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/c2mon.h b/include/configs/c2mon.h
index ae75539..a9a5254 100644
--- a/include/configs/c2mon.h
+++ b/include/configs/c2mon.h
@@ -68,7 +68,15 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -77,15 +85,18 @@
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
@@ -98,7 +109,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -174,7 +185,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/canmb.h b/include/configs/canmb.h
index 2c160a4..d577b95 100644
--- a/include/configs/canmb.h
+++ b/include/configs/canmb.h
@@ -38,11 +38,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_R
/*
@@ -52,21 +47,30 @@
#define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IMMAP | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+
/*
* MUST be low boot - HIGHBOOT is not supported anymore
@@ -111,7 +115,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* Flash configuration, expect one 16 Megabyte Bank at most
@@ -181,7 +185,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -199,6 +203,11 @@
#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/cerf250.h b/include/configs/cerf250.h
index 6997c7a..e06735d 100644
--- a/include/configs/cerf250.h
+++ b/include/configs/cerf250.h
@@ -61,10 +61,21 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_ETHADDR 00:D0:CA:F1:3C:D2
@@ -75,7 +86,7 @@
#define CONFIG_BOOTARGS "root=/dev/mtdblock3 rootfstype=jffs2 console=ttyS0,38400"
#define CONFIG_CMDLINE_TAG
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/cm4008.h b/include/configs/cm4008.h
index 5947c2a..ae40b35 100644
--- a/include/configs/cm4008.h
+++ b/include/configs/cm4008.h
@@ -58,10 +58,23 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-#undef CONFIG_COMMANDS
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~(CFG_CMD_NONSTD | CFG_CMD_ENV))
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_ENV
+
#define CONFIG_BOOTDELAY 0
#define CONFIG_BOOTARGS "mem=16M console=ttyAM0,115200"
diff --git a/include/configs/cm41xx.h b/include/configs/cm41xx.h
index e62fc06..c1dd33d 100644
--- a/include/configs/cm41xx.h
+++ b/include/configs/cm41xx.h
@@ -58,10 +58,23 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-#undef CONFIG_COMMANDS
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~(CFG_CMD_NONSTD | CFG_CMD_ENV))
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_ENV
+
#define CONFIG_BOOTDELAY 0
#define CONFIG_BOOTARGS "mem=32M console=ttyAM0,115200"
diff --git a/include/configs/cm5200.h b/include/configs/cm5200.h
new file mode 100644
index 0000000..d554348
--- /dev/null
+++ b/include/configs/cm5200.h
@@ -0,0 +1,338 @@
+/*
+ * (C) Copyright 2003-2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ */
+#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
+#define CONFIG_MPC5200 1 /* (more precisely an MPC5200 CPU) */
+#define CONFIG_CM5200 1 /* ... on CM5200 platform */
+
+/*
+ * Supported commands
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
+
+/*
+ * Serial console configuration
+ */
+#define CONFIG_PSC_CONSOLE 1 /* console is on PSC1 */
+#define CONFIG_BAUDRATE 57600 /* ... at 57600 bps */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
+#define CONFIG_SILENT_CONSOLE 1 /* needed to silence i2c_init() */
+
+/*
+ * Ethernet configuration
+ */
+#define CONFIG_MPC5xxx_FEC 1
+#define CONFIG_PHY_ADDR 0x00
+#define CONFIG_ENV_OVERWRITE 1 /* allow overwriting of ethaddr */
+/* use misc_init_r() to read ethaddr from I2C EEPROM (see CFG_I2C_EEPROM) */
+#define CONFIG_MISC_INIT_R 1
+#define CONFIG_MAC_OFFSET 0x35 /* MAC address offset in I2C EEPROM */
+
+/*
+ * POST support
+ */
+#define CONFIG_POST (CFG_POST_MEMORY | CFG_POST_CPU | CFG_POST_I2C)
+#define MPC5XXX_SRAM_POST_SIZE (MPC5XXX_SRAM_SIZE - 4)
+/* List of I2C addresses to be verified by POST */
+#define I2C_ADDR_LIST { CFG_I2C_SLAVE, CFG_I2C_IO, CFG_I2C_EEPROM }
+
+/* display image timestamps */
+#define CONFIG_TIMESTAMP 1
+
+/*
+ * Autobooting
+ */
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run net_nfs_fdt\" to mount root filesystem over NFS;" \
+ "echo"
+#undef CONFIG_BOOTARGS
+
+/*
+ * Default environment settings
+ */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "netmask=255.255.0.0\0" \
+ "ipaddr=192.168.160.33\0" \
+ "serverip=192.168.1.1\0" \
+ "gatewayip=192.168.1.1\0" \
+ "console=ttyPSC0\0" \
+ "u-boot_addr=100000\0" \
+ "kernel_addr=200000\0" \
+ "kernel_addr_flash=fc0c0000\0" \
+ "fdt_addr=400000\0" \
+ "fdt_addr_flash=fc0a0000\0" \
+ "ramdisk_addr=500000\0" \
+ "rootpath=/opt/eldk-4.1/ppc_6xx\0" \
+ "u-boot=/tftpboot/cm5200/u-boot.bin\0" \
+ "bootfile_fdt=/tftpboot/cm5200/uImage\0" \
+ "fdt_file=/tftpboot/cm5200/cm5200.dtb\0" \
+ "load=tftp ${u-boot_addr} ${u-boot}\0" \
+ "update=prot off fc000000 +${filesize}; " \
+ "era fc000000 +${filesize}; " \
+ "cp.b ${u-boot_addr} fc000000 ${filesize}; " \
+ "prot on fc000000 +${filesize}\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "flashargs=setenv bootargs root=/dev/mtdblock5 rw\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addinit=setenv bootargs ${bootargs} init=/linuxrc\0" \
+ "addcons=setenv bootargs ${bootargs} " \
+ "console=${console},${baudrate}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:" \
+ "${netmask}:${hostname}:${netdev}:off panic=1\0" \
+ "flash_flash=run flashargs addinit addip addcons;" \
+ "bootm ${kernel_addr_flash} - ${fdt_addr_flash}\0" \
+ "net_nfs_fdt=tftp ${kernel_addr} ${bootfile_fdt}; " \
+ "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip " \
+ "addcons; bootm ${kernel_addr} - ${fdt_addr}\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_flash"
+
+/*
+ * Low level configuration
+ */
+
+/*
+ * Clock configuration
+ */
+#define CFG_MPC5XXX_CLKIN 33000000 /* SYS_XTAL_IN = 33MHz */
+#define CFG_IPBCLK_EQUALS_XLBCLK 1 /* IPB = 133MHz */
+
+/*
+ * Memory map
+ */
+#define CFG_MBAR 0xF0000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_DEFAULT_MBAR 0x80000000
+
+#define CFG_LOWBOOT 1
+
+/* Use ON-Chip SRAM until RAM will be available */
+#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
+#ifdef CONFIG_POST
+/* preserve space for the post_word at end of on-chip SRAM */
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_POST_SIZE
+#else
+#define CFG_INIT_RAM_END MPC5XXX_SRAM_SIZE
+#endif
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CONFIG_BOARD_TYPES 1 /* we use board_type */
+
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MONITOR_LEN (384 << 10) /* 384 kB for Monitor */
+#define CFG_MALLOC_LEN (256 << 10) /* 256 kB for malloc() */
+#define CFG_BOOTMAPSZ (8 << 20) /* initial mem map for Linux */
+
+/*
+ * Flash configuration
+ */
+#define CFG_FLASH_CFI 1
+#define CFG_FLASH_CFI_DRIVER 1
+#define CFG_FLASH_BASE 0xfc000000
+/* we need these despite using CFI */
+#define CFG_MAX_FLASH_BANKS 1 /* max num of flash banks */
+#define CFG_MAX_FLASH_SECT 256 /* max num of sectors on one chip */
+#define CFG_FLASH_SIZE 0x02000000 /* 32 MiB */
+
+
+#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
+#define CFG_RAMBOOT 1
+#undef CFG_LOWBOOT
+#endif
+
+
+/*
+ * Chip selects configuration
+ */
+/* Boot Chipselect */
+#define CFG_BOOTCS_START CFG_FLASH_BASE
+#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
+#define CFG_BOOTCS_CFG 0x00087D31 /* for pci_clk = 33 MHz */
+/* use board_early_init_r to enable flash write in CS_BOOT */
+#define CONFIG_BOARD_EARLY_INIT_R
+
+/* Flash memory addressing */
+#define CFG_CS0_START CFG_FLASH_BASE
+#define CFG_CS0_SIZE CFG_FLASH_SIZE
+
+/* No burst, dead cycle = 1 for CS0 (Flash) */
+#define CFG_CS_BURST 0x00000000
+#define CFG_CS_DEADCYCLE 0x00000001
+
+/*
+ * SDRAM configuration
+ * settings for k4s561632E-xx75, assuming XLB = 132 MHz
+ */
+#define SDRAM_MODE 0x00CD0000 /* CASL 3, burst length 8 */
+#define SDRAM_CONTROL 0x514F0000
+#define SDRAM_CONFIG1 0xE2333900
+#define SDRAM_CONFIG2 0x8EE70000
+
+/*
+ * MTD configuration
+ */
+#define CONFIG_JFFS2_CMDLINE 1
+#define MTDIDS_DEFAULT "nor0=cm5200-0"
+#define MTDPARTS_DEFAULT "mtdparts=cm5200-0:" \
+ "384k(uboot),128k(env)," \
+ "128k(redund_env),128k(dtb)," \
+ "2m(kernel),27904k(rootfs)," \
+ "-(config)"
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_MODULE 2 /* Select I2C module #2 */
+#define CFG_I2C_SPEED 40000 /* 40 kHz */
+#define CFG_I2C_SLAVE 0x0
+#define CFG_I2C_IO 0x38 /* PCA9554AD I2C I/O port address */
+#define CFG_I2C_EEPROM 0x53 /* I2C EEPROM device address */
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_MPC5200 1 /* use internal MPC5200 RTC */
+
+/*
+ * USB configuration
+ */
+#define CONFIG_USB_OHCI 1
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_USB_CLOCK 0x0001BBBB
+#define CONFIG_USB_CONFIG 0x00001000
+/* Partitions (for USB) */
+#define CONFIG_MAC_PARTITION 1
+#define CONFIG_DOS_PARTITION 1
+#define CONFIG_ISO_PARTITION 1
+
+/*
+ * Invoke our last_stage_init function - needed by fwupdate
+ */
+#define CONFIG_LAST_STAGE_INIT 1
+
+/*
+ * Environment settings
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_SIZE 0x10000
+#define CFG_ENV_SECT_SIZE 0x20000
+#define CFG_ENV_ADDR (CFG_FLASH_BASE + CFG_MONITOR_LEN)
+/* Configuration of redundant environment */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*
+ * Pin multiplexing configuration
+ */
+
+/*
+ * CS1/GPIO_WKUP_6: GPIO (default)
+ * ALTs: CAN1 on I2C1, CAN2 on TIMER0/1
+ * IRDA/PSC6: UART
+ * Ether: Ethernet 100Mbit with MD
+ * PCI_DIS: PCI controller disabled
+ * USB: USB
+ * PSC3: SPI with UART3
+ * PSC2: UART
+ * PSC1: UART
+ */
+#define CFG_GPS_PORT_CONFIG 0x10559C44
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP 1 /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_ALT_MEMTEST 1
+#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
+#define CFG_MEMTEST_END 0x03f00000 /* 1 .. 63 MiB in SDRAM */
+
+#define CONFIG_LOOPW 1
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+/*
+ * Various low-level settings
+ */
+#define CFG_HID0_INIT HID0_ICE | HID0_ICFI
+#define CFG_HID0_FINAL HID0_ICE
+
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_XLB_PIPELINING 1 /* enable transaction pipeling */
+
+/*
+ * Cache Configuration
+ */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#ifdef CONFIG_CMD_KGDB
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Flat Device Tree support
+ */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+#define OF_CPU "PowerPC,5200@0"
+#define OF_SOC "soc5200@f0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/cmc_pu2.h b/include/configs/cmc_pu2.h
index 572a70f..f32c8c2 100644
--- a/include/configs/cmc_pu2.h
+++ b/include/configs/cmc_pu2.h
@@ -104,35 +104,44 @@
#define CFG_I2C_EEPROM_ADDR 0x50
#define CFG_I2C_EEPROM_ADDR_LEN 1
#define CFG_I2C_EEPROM_ADDR_OVERFLOW
+#else
+#define CONFIG_TIMESTAMP
#endif
/* still about 20 kB free with this defined */
#define CFG_LONGHELP
#define CONFIG_BOOTDELAY 1
-#ifdef CONFIG_HARD_I2C
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP ) & \
- ~(CFG_CMD_FPGA | CFG_CMD_MISC) )
-#else
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP ) & \
- ~(CFG_CMD_FPGA | CFG_CMD_MISC) )
-#define CONFIG_TIMESTAMP
-#endif
-#define CFG_LONGHELP
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+
+#if defined(CONFIG_HARD_I2C)
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_EEPROM
+ #define CONFIG_CMD_I2C
+#endif
+
+
+#define CFG_LONGHELP
#define AT91_SMART_MEDIA_ALE (1 << 22) /* our ALE is AD22 */
#define AT91_SMART_MEDIA_CLE (1 << 21) /* our CLE is AD21 */
diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h
index e459919..a869364 100644
--- a/include/configs/cmi_mpc5xx.h
+++ b/include/configs/cmi_mpc5xx.h
@@ -44,13 +44,35 @@
#define CONFIG_BAUDRATE 57600
-#define CONFIG_COMMANDS (CFG_CMD_MEMORY | CFG_CMD_LOADB | CFG_CMD_REGINFO | \
- CFG_CMD_FLASH | CFG_CMD_LOADS | CFG_CMD_ASKENV | \
- CFG_CMD_BDI | CFG_CMD_CONSOLE | CFG_CMD_ENV | CFG_CMD_RUN | \
- CFG_CMD_IMI)
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_NET /* disabeled - causes compile errors */
+
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_IMI
+
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
@@ -73,7 +95,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -149,8 +171,9 @@
#define CFG_ENV_IS_IN_FLASH 1
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_OFFSET 0x00020000 /* Environment starts at this adress */
-#define CFG_ENV_SIZE 0x00010000 /* Set whole sector as env */
+#define CFG_ENV_OFFSET 0x00020000 /* Environment starts at this adress */
+#define CFG_ENV_SIZE 0x00010000 /* Set whole sector as env */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
#endif
/*-----------------------------------------------------------------------
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index 9033fa8..104d94e 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -65,8 +65,10 @@
* Enable use of Ethernet
* ---
*/
+#define CONFIG_MCFFEC
-#define FEC_ENET
+/* Enable Dma Timer */
+#define CONFIG_MCFTMR
/* ---
* Define baudrate for UART1 (console output, tftp, ...)
@@ -76,6 +78,8 @@
* ---
*/
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
@@ -130,16 +134,47 @@
#define CFG_ENV_IS_IN_FLASH 1
#endif
-/* ---
- * Define which commmands should be available at u-boot command prompt
- * ---
+
+/*
+ * BOOTP options
*/
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | CFG_CMD_PING & ~(CFG_CMD_LOADS | \
-CFG_CMD_LOADB) | CFG_CMD_MII)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_MII
+
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
/*
*-----------------------------------------------------------------------------
@@ -184,7 +219,7 @@
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/cogent_mpc8260.h b/include/configs/cogent_mpc8260.h
index aea2e64..84d50c7 100644
--- a/include/configs/cogent_mpc8260.h
+++ b/include/configs/cogent_mpc8260.h
@@ -71,8 +71,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#undef CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -88,10 +87,25 @@
#define CONFIG_BAUDRATE 9600
#endif
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL|CFG_CMD_KGDB)&~CFG_CMD_NET)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_KGDB
+
+#undef CONFIG_CMD_NET
+
#ifdef DEBUG
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
@@ -102,7 +116,7 @@
#define CONFIG_BOOTARGS "root=/dev/ram rw"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#undef CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -124,7 +138,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -256,7 +270,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value*/
#endif
diff --git a/include/configs/cogent_mpc8xx.h b/include/configs/cogent_mpc8xx.h
index 80962d3..ce38af1 100644
--- a/include/configs/cogent_mpc8xx.h
+++ b/include/configs/cogent_mpc8xx.h
@@ -59,10 +59,25 @@
#define CFG_I2C_SLAVE 0x7F
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_KGDB | CFG_CMD_I2C) & ~CFG_CMD_NET)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_KGDB
+#define CONFIG_CMD_I2C
+
+#undef CONFIG_CMD_NET
+
#if 0
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
@@ -73,7 +88,7 @@
#define CONFIG_BOOTARGS "root=/dev/ram rw"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#undef CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#define CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -88,7 +103,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -200,7 +215,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/cpci5200.h b/include/configs/cpci5200.h
index f9586fb..ce4ea1f 100644
--- a/include/configs/cpci5200.h
+++ b/include/configs/cpci5200.h
@@ -50,11 +50,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -92,12 +87,6 @@
#define CONFIG_NS8382X 1
#endif
-#define ADD_PCI_CMD CFG_CMD_PCI
-
-#else /* MPC5100 */
-
-#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
-
#endif
/* Partitions */
@@ -107,28 +96,35 @@
/* USB */
#if 0
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
#endif
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_IDE | \
- CFG_CMD_I2C | \
- CFG_CMD_BSP | \
- CFG_CMD_ELF | \
- CFG_CMD_EXT2 | \
- CFG_CMD_DATE | \
- ADD_PCI_CMD )
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#if defined(CONFIG_PCI)
+#define CONFIG_CMD_PCI
+#endif
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_DATE
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
@@ -179,7 +175,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
* I2C configuration
@@ -277,7 +273,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -295,6 +291,11 @@
#define CFG_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/cradle.h b/include/configs/cradle.h
index 776e1d2..eb93a8f 100644
--- a/include/configs/cradle.h
+++ b/include/configs/cradle.h
@@ -61,10 +61,21 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 console=ttyS0,115200"
diff --git a/include/configs/csb226.h b/include/configs/csb226.h
index f04102e..0be0f21 100644
--- a/include/configs/csb226.h
+++ b/include/configs/csb226.h
@@ -57,10 +57,34 @@
#define CONFIG_BAUDRATE 19200
#undef CONFIG_MISC_INIT_R /* not used yet */
-#define CONFIG_COMMANDS (CFG_CMD_BDI|CFG_CMD_LOADB|CFG_CMD_IMI|CFG_CMD_FLASH|CFG_CMD_MEMORY|CFG_CMD_NET|CFG_CMD_ENV|CFG_CMD_RUN|CFG_CMD_ASKENV|CFG_CMD_ECHO|CFG_CMD_DHCP|CFG_CMD_CACHE)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_CACHE
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttyS0,19200 ip=192.168.1.10,192.168.1.5,,255,255,255,0,csb root=/dev/nfs, ether=0,0x08000000,eth0"
@@ -73,7 +97,7 @@
#define CONFIG_CMDLINE_TAG 1
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/csb272.h b/include/configs/csb272.h
index 27d64c1..c43b497 100644
--- a/include/configs/csb272.h
+++ b/include/configs/csb272.h
@@ -73,30 +73,32 @@
#endif
/*
- * BOOTP/DHCP protocol configuration
- *
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK ( CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_BOOTFILESIZE )
-/*
- * U-Boot Monitor Command Line Functions Configuration
- *
- */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_ELF | \
- CFG_CMD_IRQ | \
- CFG_CMD_I2C | \
- CFG_CMD_PCI | \
- CFG_CMD_DATE | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_DHCP )
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS2
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
/*
* Serial download configuration
@@ -109,7 +111,7 @@
* KGDB Configuration
*
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -125,7 +127,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/csb472.h b/include/configs/csb472.h
index 09d52de..a7120aa 100644
--- a/include/configs/csb472.h
+++ b/include/configs/csb472.h
@@ -73,30 +73,31 @@
#endif
/*
- * BOOTP/DHCP protocol configuration
- *
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK ( CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_BOOTFILESIZE )
-/*
- * U-Boot Monitor Command Line Functions Configuration
- *
- */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_ELF | \
- CFG_CMD_IRQ | \
- CFG_CMD_I2C | \
- CFG_CMD_PCI | \
- CFG_CMD_DATE | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_DHCP )
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS2
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
/*
* Serial download configuration
@@ -109,7 +110,7 @@
* KGDB Configuration
*
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -125,7 +126,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/csb637.h b/include/configs/csb637.h
index 071d5b7..976dae3 100644
--- a/include/configs/csb637.h
+++ b/include/configs/csb637.h
@@ -99,20 +99,32 @@
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_ENV_OVERWRITE 1 */
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING ) & \
- ~(CFG_CMD_BDI | \
- CFG_CMD_IMI | \
- CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_FPGA | \
- CFG_CMD_MISC | \
- CFG_CMD_LOADS ))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_IMI
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+#undef CONFIG_CMD_LOADS
+
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
diff --git a/include/configs/davinci_dvevm.h b/include/configs/davinci_dvevm.h
new file mode 100644
index 0000000..8ecd059
--- /dev/null
+++ b/include/configs/davinci_dvevm.h
@@ -0,0 +1,214 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*
+ * Define this to make U-Boot skip low level initialization when loaded
+ * by initial bootloader. Not required by NAND U-Boot version but IS
+ * required for a NOR version used to burn the real NOR U-Boot into
+ * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
+ * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
+ * NOR U-Boot is loaded directly from Flash so it must perform all the
+ * low level initialization itself. NAND version is loaded by an initial
+ * bootloader (UBL in TI-ese) that performs such an initialization so it's
+ * skipped in NAND version. The third DaVinci boot mode loads a bootloader
+ * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
+ * performing low level init prior to loading. All that means we can NOT use
+ * NAND version to put U-Boot into NOR because it doesn't have NOR support and
+ * we can NOT use NOR version because it performs low level initialization
+ * effectively destroying itself in DDR memory. That's why a separate NOR
+ * version with this define is needed. It is loaded via UART, then one uses
+ * it to somehow download a proper NOR version built WITHOUT this define to
+ * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
+ * NOR support into the initial bootloader so it won't be needed but DaVinci
+ * static RAM might be too small for this (I have something like 2Kbytes left
+ * as of now, without NOR support) so this might've not happened...
+ *
+#define CONFIG_NOR_UART_BOOT
+ */
+
+/*=======*/
+/* Board */
+/*=======*/
+#define DV_EVM
+#define CFG_NAND_SMALLPAGE
+#define CFG_USE_NOR
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
+#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
+#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
+#define CFG_HZ 1000
+/*====================================================*/
+/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
+/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
+/*====================================================*/
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS 6
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
+#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
+#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
+#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
+#define PHYS_SDRAM_1_SIZE 0x10000000 /* DDR size 256MB */
+#define DDR_8BANKS /* 8-bank DDR2 (256MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
+#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
+#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#ifdef CFG_USE_NAND
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
+#ifdef CFG_NAND_SMALLPAGE
+#define CFG_ENV_SECT_SIZE 512 /* Env sector Size */
+#define CFG_ENV_SIZE SZ_16K
+#else
+#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */
+#define CFG_ENV_SIZE SZ_128K
+#endif
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#define CFG_NAND_BASE 0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS 1
+#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+#define DEF_BOOTM ""
+#elif defined(CFG_USE_NOR)
+#ifdef CONFIG_NOR_UART_BOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#else
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+#define CFG_ENV_IS_IN_FLASH
+#undef CFG_NO_FLASH
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_MAX_FLASH_BANKS 1 /* max number of flash banks */
+#define CFG_FLASH_SECT_SZ 0x10000 /* 64KB sect size AMD Flash */
+#define CFG_ENV_OFFSET (CFG_FLASH_SECT_SZ*3)
+#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
+#define CFG_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
+#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
+#define CFG_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
+#define CFG_ENV_SECT_SIZE CFG_FLASH_SECT_SZ /* Env sector Size */
+#endif
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR 0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS "mem=120M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2050000"
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#ifdef CFG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+#elif defined(CFG_USE_NOR)
+#define CONFIG_CMD_JFFS2
+#else
+#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!"
+#endif
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/davinci_schmoogie.h b/include/configs/davinci_schmoogie.h
new file mode 100644
index 0000000..96c9a30
--- /dev/null
+++ b/include/configs/davinci_schmoogie.h
@@ -0,0 +1,157 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*=======*/
+/* Board */
+/*=======*/
+#define SCHMOOGIE
+#define CFG_NAND_LARGEPAGE
+#define CFG_USE_NAND
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
+#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
+#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
+#define CFG_HZ 1000
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN (0x10000 + 256*1024) /* malloc() len */
+#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
+#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
+#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
+#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
+#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
+#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
+#define CFG_ENV_SECT_SIZE 2048 /* Env sector Size */
+#define CFG_ENV_SIZE SZ_128K
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#define CFG_NAND_BASE 0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS 1
+#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+/*=====================*/
+/* Board related stuff */
+/*=====================*/
+#define CONFIG_RTC_DS1307 /* RTC chip on SCHMOOGIE */
+#define CFG_I2C_RTC_ADDR 0x6f /* RTC chip I2C address */
+#define CONFIG_HAS_UID
+#define CONFIG_UID_DS28CM00 /* Unique ID on SCHMOOGIE */
+#define CFG_UID_ADDR 0x50 /* UID chip I2C address */
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR 0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot"
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_NAND
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/davinci_sonata.h b/include/configs/davinci_sonata.h
new file mode 100644
index 0000000..de8c4fa
--- /dev/null
+++ b/include/configs/davinci_sonata.h
@@ -0,0 +1,209 @@
+/*
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+#include <asm/sizes.h>
+
+/*
+ * Define this to make U-Boot skip low level initialization when loaded
+ * by initial bootloader. Not required by NAND U-Boot version but IS
+ * required for a NOR version used to burn the real NOR U-Boot into
+ * NOR Flash. NAND and NOR support for DaVinci chips is mutually exclusive
+ * so it is NOT possible to build a U-Boot with both NAND and NOR routines.
+ * NOR U-Boot is loaded directly from Flash so it must perform all the
+ * low level initialization itself. NAND version is loaded by an initial
+ * bootloader (UBL in TI-ese) that performs such an initialization so it's
+ * skipped in NAND version. The third DaVinci boot mode loads a bootloader
+ * via UART0 and that bootloader in turn loads and runs U-Boot (or whatever)
+ * performing low level init prior to loading. All that means we can NOT use
+ * NAND version to put U-Boot into NOR because it doesn't have NOR support and
+ * we can NOT use NOR version because it performs low level initialization
+ * effectively destroying itself in DDR memory. That's why a separate NOR
+ * version with this define is needed. It is loaded via UART, then one uses
+ * it to somehow download a proper NOR version built WITHOUT this define to
+ * RAM (tftp?) and burn it to NOR Flash. I would be probably able to squeeze
+ * NOR support into the initial bootloader so it won't be needed but DaVinci
+ * static RAM might be too small for this (I have something like 2Kbytes left
+ * as of now, without NOR support) so this might've not happened...
+ *
+#define CONFIG_NOR_UART_BOOT
+ */
+
+/*=======*/
+/* Board */
+/*=======*/
+#define SONATA_BOARD
+#define CFG_NAND_SMALLPAGE
+#define CFG_USE_NOR
+/*===================*/
+/* SoC Configuration */
+/*===================*/
+#define CONFIG_ARM926EJS /* arm926ejs CPU core */
+#define CONFIG_SYS_CLK_FREQ 297000000 /* Arm Clock frequency */
+#define CFG_TIMERBASE 0x01c21400 /* use timer 0 */
+#define CFG_HZ_CLOCK 27000000 /* Timer Input clock freq */
+#define CFG_HZ 1000
+/*====================================================*/
+/* EEPROM definitions for Atmel 24C256BN SEEPROM chip */
+/* on Sonata/DV_EVM board. No EEPROM on schmoogie. */
+/*====================================================*/
+#define CFG_I2C_EEPROM_ADDR_LEN 2
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_EEPROM_PAGE_WRITE_BITS 6
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 20
+/*=============*/
+/* Memory Info */
+/*=============*/
+#define CFG_MALLOC_LEN (0x10000 + 128*1024) /* malloc() len */
+#define CFG_GBL_DATA_SIZE 128 /* reserved for initial data */
+#define CFG_MEMTEST_START 0x80000000 /* memtest start address */
+#define CFG_MEMTEST_END 0x81000000 /* 16MB RAM test */
+#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
+#define CONFIG_STACKSIZE (256*1024) /* regular stack */
+#define PHYS_SDRAM_1 0x80000000 /* DDR Start */
+#define PHYS_SDRAM_1_SIZE 0x08000000 /* DDR size 128MB */
+#define DDR_4BANKS /* 4-bank DDR2 (128MB) */
+/*====================*/
+/* Serial Driver info */
+/*====================*/
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 4 /* NS16550 register size */
+#define CFG_NS16550_COM1 0x01c20000 /* Base address of UART0 */
+#define CFG_NS16550_CLK 27000000 /* Input clock to NS16550 */
+#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
+#define CONFIG_BAUDRATE 115200 /* Default baud rate */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+/*===================*/
+/* I2C Configuration */
+/*===================*/
+#define CONFIG_HARD_I2C
+#define CONFIG_DRIVER_DAVINCI_I2C
+#define CFG_I2C_SPEED 80000 /* 100Kbps won't work, silicon bug */
+#define CFG_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
+/*==================================*/
+/* Network & Ethernet Configuration */
+/*==================================*/
+#define CONFIG_DRIVER_TI_EMAC
+#define CONFIG_MII
+#define CONFIG_BOOTP_DEFAULT
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+#define CONFIG_NET_RETRY_COUNT 10
+/*=====================*/
+/* Flash & Environment */
+/*=====================*/
+#ifdef CFG_USE_NAND
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_NO_FLASH
+#define CFG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
+#define CFG_ENV_SECT_SIZE 512 /* Env sector Size */
+#define CFG_ENV_SIZE SZ_16K
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#define CFG_NAND_BASE 0x02000000
+#define CFG_NAND_HW_ECC
+#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
+#define NAND_MAX_CHIPS 1
+#define CFG_ENV_OFFSET 0x0 /* Block 0--not used by bootcode */
+#define DEF_BOOTM ""
+#elif defined(CFG_USE_NOR)
+#ifdef CONFIG_NOR_UART_BOOT
+#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is loaded by a bootloader */
+#define CONFIG_SKIP_RELOCATE_UBOOT /* to a proper address, init done */
+#else
+#undef CONFIG_SKIP_LOWLEVEL_INIT
+#undef CONFIG_SKIP_RELOCATE_UBOOT
+#endif
+#define CFG_ENV_IS_IN_FLASH
+#undef CFG_NO_FLASH
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_MAX_FLASH_BANKS 1 /* max number of flash banks */
+#define CFG_FLASH_SECT_SZ 0x20000 /* 128KB sect size AMD Flash */
+#define CFG_ENV_OFFSET (CFG_FLASH_SECT_SZ*2)
+#define PHYS_FLASH_1 0x02000000 /* CS2 Base address */
+#define CFG_FLASH_BASE PHYS_FLASH_1 /* Flash Base for U-Boot */
+#define PHYS_FLASH_SIZE 0x2000000 /* Flash size 32MB */
+#define CFG_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CFG_FLASH_SECT_SZ)
+#define CFG_ENV_SECT_SIZE CFG_FLASH_SECT_SZ /* Env sector Size */
+#endif
+/*==============================*/
+/* U-Boot general configuration */
+/*==============================*/
+#undef CONFIG_USE_IRQ /* No IRQ/FIQ in U-Boot */
+#define CONFIG_MISC_INIT_R
+#undef CONFIG_BOOTDELAY
+#define CONFIG_BOOTFILE "uImage" /* Boot file name */
+#define CFG_PROMPT "U-Boot > " /* Monitor Command Prompt */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print buffer sz */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_LOAD_ADDR 0x80700000 /* default Linux kernel load address */
+#define CONFIG_VERSION_VARIABLE
+#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
+#define CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#define CONFIG_CMDLINE_EDITING
+#define CFG_LONGHELP
+#define CONFIG_CRC32_VERIFY
+#define CONFIG_MX_CYCLIC
+/*===================*/
+/* Linux Information */
+/*===================*/
+#define LINUX_BOOT_PARAM_ADDR 0x80000100
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_BOOTARGS "mem=56M console=ttyS0,115200n8 root=/dev/hda1 rw noinitrd ip=dhcp"
+#define CONFIG_BOOTCOMMAND "setenv setboot setenv bootargs \\$(bootargs) video=dm64xxfb:output=\\$(videostd);run setboot; bootm 0x2060000"
+/*=================*/
+/* U-Boot commands */
+/*=================*/
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_SETGETDCR
+#ifdef CFG_USE_NAND
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+#define CONFIG_CMD_NAND
+#elif defined(CFG_USE_NOR)
+#define CONFIG_CMD_JFFS2
+#else
+#error "Either CFG_USE_NAND or CFG_USE_NOR _MUST_ be defined !!!"
+#endif
+/*=======================*/
+/* KGDB support (if any) */
+/*=======================*/
+#ifdef CONFIG_CMD_KGDB
+#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/dbau1x00.h b/include/configs/dbau1x00.h
index 4cc5085..b2f606f 100644
--- a/include/configs/dbau1x00.h
+++ b/include/configs/dbau1x00.h
@@ -75,21 +75,57 @@
#ifdef CONFIG_DBAU1550
/* Boot from flash by default, revert to bootp */
#define CONFIG_BOOTCOMMAND "bootm 0xbfc20000; bootp; bootm"
-
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_FLASH | CFG_CMD_LOADB | CFG_CMD_NET) & \
- ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FPGA | CFG_CMD_IDE | \
- CFG_CMD_MII | CFG_CMD_RUN | CFG_CMD_BDI | CFG_CMD_BEDBUG | \
- CFG_CMD_NFS | CFG_CMD_ELF | CFG_CMD_PCMCIA | CFG_CMD_I2C))
#else /* CONFIG_DBAU1550 */
#define CONFIG_BOOTCOMMAND "bootp;bootm"
-
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP | CFG_CMD_ELF) & \
- ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
- CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | \
- CFG_CMD_ELF | CFG_CMD_BDI | CFG_CMD_BEDBUG))
#endif /* CONFIG_DBAU1550 */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_ENV
+#undef CONFIG_CMD_FAT
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_RUN
+
+
+#ifdef CONFIG_DBAU1550
+
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_NET
+
+#undef CONFIG_CMD_I2C
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_PCMCIA
+
+#else
+
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_LOADS
+
+#endif
+
/*
* Miscellaneous configurable options
diff --git a/include/configs/debris.h b/include/configs/debris.h
index 8ff963f..7667e5e 100644
--- a/include/configs/debris.h
+++ b/include/configs/debris.h
@@ -122,23 +122,35 @@
#define CONFIG_BAUDRATE 9600
#define CONFIG_DRAM_SPEED 100 /* MHz */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGBD | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_SAVES | \
- CFG_CMD_SDRAM)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_KGBD
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SAVES
+#define CONFIG_CMD_SDRAM
/*
@@ -435,7 +447,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8240 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/delta.h b/include/configs/delta.h
index 1568120..09667ed 100644
--- a/include/configs/delta.h
+++ b/include/configs/delta.h
@@ -87,22 +87,49 @@
#define CONFIG_BAUDRATE 115200
-/* #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT) */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#ifdef TURN_ON_ETHERNET
-# define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
+
+#define CONFIG_CMD_PING
+
#else
-# define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_ENV \
- | CFG_CMD_NAND \
- | CFG_CMD_I2C) \
- & ~(CFG_CMD_NET \
- | CFG_CMD_FLASH \
- | CFG_CMD_IMLS))
+
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_I2C
+
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_IMLS
+
#endif
+/* USB */
+#define CONFIG_USB_OHCI_NEW 1
+#define CONFIG_USB_STORAGE 1
+#define CONFIG_DOS_PARTITION 1
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT 1
+#define CFG_USB_OHCI_REGS_BASE OHCI_REGS_BASE
+#define CFG_USB_OHCI_SLOT_NAME "delta"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 3
+
+#define LITTLEENDIAN 1 /* used by usb_ohci.c */
#define CONFIG_BOOTDELAY -1
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
@@ -114,7 +141,7 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_TIMESTAMP
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/dnp1110.h b/include/configs/dnp1110.h
index 9ac2856..d32e046 100644
--- a/include/configs/dnp1110.h
+++ b/include/configs/dnp1110.h
@@ -66,10 +66,21 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
@@ -80,7 +91,7 @@
#define CONFIG_BOOTFILE "dnp1110"
#define CONFIG_BOOTCOMMAND "tftp; bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/eXalion.h b/include/configs/eXalion.h
index a014c7c..f8e2c88 100644
--- a/include/configs/eXalion.h
+++ b/include/configs/eXalion.h
@@ -58,17 +58,27 @@
/*#define CONFIG_DRAM_SPEED 66 */ /* MHz */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_FLASH | \
- CFG_CMD_SDRAM | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_ENV | \
- CFG_CMD_PCI )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_PCI
/*-----------------------------------------------------------------------
@@ -398,7 +408,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ebony.h b/include/configs/ebony.h
index a42319b..2c626a0 100644
--- a/include/configs/ebony.h
+++ b/include/configs/ebony.h
@@ -32,6 +32,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_EBONY 1 /* Board is ebony */
#define CONFIG_440GP 1 /* Specifc GP support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#undef CFG_DRAM_TEST /* Disable-takes long time! */
@@ -121,7 +122,7 @@
#define CFG_FLASH_WORD_SIZE unsigned char
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
@@ -207,26 +208,38 @@
#define CONFIG_NETCONSOLE /* include NetConsole support */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -235,7 +248,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -269,7 +282,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
@@ -286,7 +298,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -298,7 +310,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ep7312.h b/include/configs/ep7312.h
index bdda629..f5cf477 100644
--- a/include/configs/ep7312.h
+++ b/include/configs/ep7312.h
@@ -62,12 +62,23 @@
#define CONFIG_BAUDRATE 9600
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_JFFS2)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
@@ -78,7 +89,7 @@
/*#define CONFIG_BOOTFILE "impa7" */
#define CONFIG_BOOTCOMMAND "bootp;bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ep8248.h b/include/configs/ep8248.h
index 04147a5..85ad70a 100644
--- a/include/configs/ep8248.h
+++ b/include/configs/ep8248.h
@@ -60,8 +60,8 @@
* SCC, 1-3 for FCC)
*
* If CONFIG_ETHER_NONE is defined, then either the ethernet routines
- * must be defined elsewhere (as for the console), or CFG_CMD_NET must
- * be removed from CONFIG_COMMANDS to remove support for networking.
+ * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
+ * must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */
#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */
@@ -123,23 +123,34 @@
#define CONFIG_BAUDRATE 38400
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_ECHO \
- | CFG_CMD_I2C \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#define CONFIG_BOOTCOMMAND "bootm FF860000" /* autoboot command */
#define CONFIG_BOOTARGS "root=/dev/mtdblock1 rw mtdparts=phys:7M(root),-(root)ro"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -157,7 +168,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -183,20 +194,20 @@
#define CFG_DIRECT_FLASH_TFTP
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#define CFG_JFFS2_FIRST_BANK 0
#define CFG_JFFS2_NUM_BANKS CFG_MAX_FLASH_BANKS
#define CFG_JFFS2_FIRST_SECTOR 0
#define CFG_JFFS2_LAST_SECTOR 62
#define CFG_JFFS2_SORT_FRAGMENTS
#define CFG_JFFS_CUSTOM_PART
-#endif /* CFG_CMD_JFFS2 */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
#define CFG_I2C_SPEED 100000 /* I2C speed */
#define CFG_I2C_SLAVE 0x7F /* I2C slave address */
-#endif /* CFG_CMD_I2C */
+#endif
#define CFG_MONITOR_BASE TEXT_BASE
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
@@ -240,7 +251,7 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h
index 6862519..025c249 100644
--- a/include/configs/ep8260.h
+++ b/include/configs/ep8260.h
@@ -183,8 +183,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
@@ -291,37 +290,49 @@
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
-/* What U-Boot subsytems do you want enabled? */
+
/*
-*/
-#define CONFIG_COMMANDS ( CFG_CMD_ALL & \
- ~( CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_DCR | \
- CFG_CMD_DHCP | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DOC | \
- CFG_CMD_DTT | \
- CFG_CMD_EEPROM | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_IDE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_KGDB | \
- CFG_CMD_MII | \
- CFG_CMD_MMC | \
- CFG_CMD_NAND | \
- CFG_CMD_PCI | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_REISER | \
- CFG_CMD_SCSI | \
- CFG_CMD_SPI | \
- CFG_CMD_UNIVERSE| \
- CFG_CMD_USB | \
- CFG_CMD_VFD | \
- CFG_CMD_XIMG ) )
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
+
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_BSP
+#undef CONFIG_CMD_DCR
+#undef CONFIG_CMD_DHCP
+#undef CONFIG_CMD_DISPLAY
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_DTT
+#undef CONFIG_CMD_EEPROM
+#undef CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_KGDB
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_MFSL
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_UNIVERSE
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_XIMG
/* Where do the internal registers live? */
@@ -342,13 +353,10 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -496,7 +504,7 @@
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h
index a77ccef..4febd32 100644
--- a/include/configs/ep82xxm.h
+++ b/include/configs/ep82xxm.h
@@ -60,8 +60,8 @@
* SCC, 1-3 for FCC)
*
* If CONFIG_ETHER_NONE is defined, then either the ethernet routines
- * must be defined elsewhere (as for the console), or CFG_CMD_NET must
- * be removed from CONFIG_COMMANDS to remove support for networking.
+ * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
+ * must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */
#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */
@@ -108,22 +108,34 @@
#define CFG_VXWORKS_MAC_PTR 0x4300 /* Pass Ethernet MAC to VxWorks */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_DHCP \
- | CFG_CMD_ECHO \
- | CFG_CMD_I2C \
- | CFG_CMD_IMMAP \
- | CFG_CMD_MII \
- | CFG_CMD_PING \
- | CFG_CMD_DATE \
- | CFG_CMD_DTT \
- | CFG_CMD_EEPROM \
- | CFG_CMD_PCI \
- | CFG_CMD_DIAG \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_DIAG
+
#define CONFIG_ETHADDR 00:10:EC:00:88:65
#define CONFIG_HAS_ETH1
@@ -138,7 +150,7 @@
#define CONFIG_AUTO_COMPLETE 1
#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3 ETHERNET"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -156,7 +168,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "ep82xxm=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -308,20 +320,20 @@
#define CFG_DIRECT_FLASH_TFTP
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2)
+#if defined(CONFIG_CMD_JFFS2)
#define CFG_JFFS2_FIRST_BANK 0
#define CFG_JFFS2_NUM_BANKS CFG_MAX_FLASH_BANKS
#define CFG_JFFS2_FIRST_SECTOR 0
#define CFG_JFFS2_LAST_SECTOR 62
#define CFG_JFFS2_SORT_FRAGMENTS
#define CFG_JFFS_CUSTOM_PART
-#endif /* CFG_CMD_JFFS2 */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
#define CONFIG_HARD_I2C 1 /* To enable I2C support */
#define CFG_I2C_SPEED 100000 /* I2C speed */
#define CFG_I2C_SLAVE 0x7F /* I2C slave address */
-#endif /* CFG_CMD_I2C */
+#endif
#define CFG_MONITOR_BASE TEXT_BASE
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
@@ -358,7 +370,7 @@
#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/evb4510.h b/include/configs/evb4510.h
index 88c2c74..66500c2 100644
--- a/include/configs/evb4510.h
+++ b/include/configs/evb4510.h
@@ -72,12 +72,23 @@
#define CONFIG_BAUDRATE 19200
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+
#define CONFIG_ETHADDR 00:40:95:36:35:33
#define CONFIG_NETMASK 255.255.255.0
@@ -89,7 +100,7 @@
#define CONFIG_BOOTCOMMAND "tftp 100000 uImage"
/* #define CONFIG_BOOTARGS "console=ttyS0,19200 initrd=0x100a0040,530K root=/dev/ram keepinitrd" */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 19200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/gcplus.h b/include/configs/gcplus.h
index b68a2dc..e11ce4c 100644
--- a/include/configs/gcplus.h
+++ b/include/configs/gcplus.h
@@ -79,18 +79,30 @@
#define CONFIG_BAUDRATE 38400
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttySA0,38400n8 mtdparts=sa1100-flash:1m@0(zImage),3m@1m(ramdisk.gz),12m@4m(userfs) root=/dev/nfs ip=bootp"
#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
#define CFG_AUTOLOAD "n" /* No autoload */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 38400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/gth2.h b/include/configs/gth2.h
index a49ed3b..c2a50c1 100644
--- a/include/configs/gth2.h
+++ b/include/configs/gth2.h
@@ -71,12 +71,37 @@
/* Boot from Compact flash partition 2 as default */
#define CONFIG_BOOTCOMMAND "ide reset;disk 0x81000000 0:2;run addmisc;bootm"
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_IDE | CFG_CMD_DHCP ) & \
- ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | \
- CFG_CMD_MII | CFG_CMD_LOADS | CFG_CMD_LOADB | CFG_CMD_ELF | \
- CFG_CMD_BDI | CFG_CMD_BEDBUG | CFG_CMD_NFS | CFG_CMD_AUTOSCRIPT ))
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_ENV
+#undef CONFIG_CMD_FAT
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MII
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_AUTOSCRIPT
+
/*
* Miscellaneous configurable options
diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h
index 4f83b19..ff57240 100644
--- a/include/configs/gw8260.h
+++ b/include/configs/gw8260.h
@@ -194,8 +194,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC
@@ -286,13 +285,16 @@
#undef CONFIG_AUTOBOOT_DELAY_STR
#define DEBUG_BOOTKEYS 0
-/* Add support for a few extra bootp options like:
- * - File size
- * - DNS
+/*
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE | \
- CONFIG_BOOTP_DNS)
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS
/* undef this to save memory */
#define CFG_LONGHELP
@@ -300,14 +302,21 @@
/* Monitor Command Prompt */
#define CFG_PROMPT "=> "
-/* What U-Boot subsytems do you want enabled? */
-#define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_ELF | \
- CFG_CMD_ASKENV | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_MII)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_MII
+
+#undef CONFIG_CMD_KGDB
+
/* Where do the internal registers live? */
#define CFG_IMMR 0xf0000000
@@ -331,13 +340,10 @@
#define CONFIG_GW8260 1 /* on an GW8260 Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -473,7 +479,7 @@
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/hcu4.h b/include/configs/hcu4.h
new file mode 100644
index 0000000..577f459
--- /dev/null
+++ b/include/configs/hcu4.h
@@ -0,0 +1,348 @@
+/*
+ *(C) Copyright 2005-2007 Netstal Maschinen AG
+ * Niklaus Giger (Niklaus.Giger@netstal.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * hcu4.h - configuration for HCU4 board (similar to hcu5.h)
+ ***********************************************************************/
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*-----------------------------------------------------------------------
+ * High Level Configuration Options
+ *----------------------------------------------------------------------*/
+#define CONFIG_HCU4 1 /* Board is HCU4 */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_405GPr 1 /* HCU4 has a 405GPr */
+#define CONFIG_405GP 1
+#define CONFIG_4xx 1
+
+#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+
+/*-----------------------------------------------------------------------
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+*----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
+#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
+
+
+#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */
+#define CFG_MONITOR_BASE TEXT_BASE
+
+/* ... with on-chip memory here (4KBytes) */
+#define CFG_OCM_DATA_ADDR 0xF4000000
+#define CFG_OCM_DATA_SIZE 0x00001000
+/* Do not set up locked dcache as init ram. */
+#undef CFG_INIT_DCACHE_CS
+
+/* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
+#define CFG_TEMP_STACK_OCM 1
+
+#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* OCM */
+#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE
+#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Serial Port
+ *----------------------------------------------------------------------*/
+/*
+ * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
+ * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
+ * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
+ * The Linux BASE_BAUD define should match this configuration.
+ * baseBaud = cpuClock/(uartDivisor*16)
+ * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
+ * set Linux BASE_BAUD to 403200.
+ */
+#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
+#undef CONFIG_SERIAL_MULTI /* needed to be able to define
+ CONFIG_SERIAL_SOFTWARE_FIFO */
+#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
+#define CFG_BASE_BAUD 691200
+
+/* Size (bytes) of interrupt driven serial port buffer.
+ * Set to 0 to use polling instead of interrupts.
+ * Setting to 0 will also disable RTS/CTS handshaking.
+ */
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+
+/* Set console baudrate to 9600 */
+#define CONFIG_BAUDRATE 9600
+
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+/*-----------------------------------------------------------------------
+ * Environment
+ *----------------------------------------------------------------------*/
+
+#undef CFG_ENV_IS_IN_NVRAM
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_IS_IN_EEPROM
+#undef CFG_ENV_IS_NOWHERE
+
+#ifdef CFG_ENV_IS_IN_EEPROM
+/* Put the environment after the SDRAM configuration */
+#define PROM_SIZE 2048
+#define CFG_ENV_OFFSET 512
+#define CFG_ENV_SIZE (PROM_SIZE-CFG_ENV_OFFSET)
+#endif
+
+#ifdef CFG_ENV_IS_IN_FLASH
+/* Put the environment in Flash */
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#endif
+
+/*-----------------------------------------------------------------------
+ * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
+ * the first internal I2C controller of the PPC440EPx
+ *----------------------------------------------------------------------*/
+#define CFG_SPD_BUS_NUM 0
+
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+/* This is the 7bit address of the device, not including P. */
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+
+/* The EEPROM can do 16byte ( 1 << 4 ) page writes. */
+#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
+#define CFG_EEPROM_PAGE_WRITE_BITS 4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
+#define CFG_EEPROM_PAGE_WRITE_ENABLE
+#undef CFG_I2C_MULTI_EEPROMS
+
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+/* Setup some board specific values for the default environment variables */
+#define CONFIG_HOSTNAME hcu4
+#define CONFIG_IPADDR 172.25.1.42
+#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_SERVERIP 172.25.1.3
+
+#define CFG_TFTP_LOADADDR 0x01000000 /* @16 MB */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=0x01000000\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/home/diagnose/eldk/ppc_4xx\0" \
+ "bootfile=/tftpboot/hcu4/uImage\0" \
+ "load=tftp 100000 hcu4/u-boot.bin\0" \
+ "update=protect off FFFa0000 FFFFFFFF;era FFFa0000 FFFFFFFF;" \
+ "cp.b 100000 FFFa0000 60000\0" \
+ "upd=run load;run update\0" \
+ "vx=tftp ${loadaddr} hcu4_vx_rom;" \
+ "setenv bootargs emac(0,0)hcu4_vx_rom e=${ipaddr} " \
+ " h=${serverip} u=dpu pw=netstal8752 tn=hcu4 f=0x3008;" \
+ "bootvx ${loadaddr}\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run vx"
+
+#if 0
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_PHY_ADDR 1 /* PHY address */
+
+#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
+
+#define CONFIG_HAS_ETH0
+#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+/* SPD EEPROM (sdram speed config) disabled */
+#define CONFIG_SPD_EEPROM 1
+#define SPD_EEPROM_ADDRESS 0x50
+
+/*-----------------------------------------------------------------------
+ * Miscellaneous configurable options
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if defined(CONFIG_CMD_KGDB)
+ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CONFIG_LOOPW 1 /* enable loopw command */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ */
+
+/* Memory Bank 0 (Flash Bank 0) initialization */
+#define CFG_EBC_PB0AP 0x02005400
+#define CFG_EBC_PB0CR 0xFFF18000 /* BAS=0xFFF,BS=1MB,BU=R/W,BW=8bit */
+
+#define CFG_EBC_PB1AP 0x03041200
+#define CFG_EBC_PB1CR 0x7009A000 /* BAS=,BS=MB,BU=R/W,BW=bit */
+
+#define CFG_EBC_PB2AP 0x02054500
+#define CFG_EBC_PB2CR 0x78018000 /* BAS=,BS=MB,BU=R/W,BW=bit */
+
+#define CFG_EBC_PB3AP 0x01840300
+#define CFG_EBC_PB3CR 0x7c0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
+
+#define CFG_EBC_PB4AP 0x01800300
+#define CFG_EBC_PB4CR 0x7e0ba000 /* BAS=,BS=MB,BU=R/W,BW=bit */
+
+#define CFG_GPIO0_TCR 0x7ffe0000 /* GPIO value */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+/* Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
+
+
+/* Configuration Port location */
+#define CONFIG_PORT_ADDR 0xF0000500
+
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ *----------------------------------------------------------------------*/
+#define CFG_DCACHE_SIZE 16384 /* For IBM 405GPr CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_HUSH_PARSER /* use "hush" command parser */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/hcu5.h b/include/configs/hcu5.h
new file mode 100644
index 0000000..9085881
--- /dev/null
+++ b/include/configs/hcu5.h
@@ -0,0 +1,391 @@
+/*
+ * (C) Copyright 2007 Netstal Maschinen AG
+ * Niklaus Giger (Niklaus.Giger@netstal.com)
+ *
+ * (C) Copyright 2006-2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * (C) Copyright 2006
+ * Jacqueline Pira-Ferriol, AMCC/IBM, jpira-ferriol@fr.ibm.com
+ * Alain Saurel, AMCC/IBM, alain.saurel@fr.ibm.com
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * hcu5.h - configuration for HCU5 board (derived from sequoia.h)
+ ***********************************************************************/
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*-----------------------------------------------------------------------
+ * High Level Configuration Options
+ *----------------------------------------------------------------------*/
+#define CONFIG_HCU5 1 /* Board is HCU5 */
+#define CONFIG_440EPX 1 /* Specific PPC440EPx */
+#define CONFIG_440 1 /* ... PPC440 family */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+
+/*-----------------------------------------------------------------------
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (384 * 1024) /* Reserve 384 kB for Monitor */
+#define CFG_MALLOC_LEN (256 * 1024) /* Reserve 256 kB for malloc() */
+
+#define CFG_BOOT_BASE_ADDR 0xfff00000
+#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CFG_FLASH_BASE 0xfff80000 /* start of FLASH */
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_OCM_BASE 0xe0010000 /* ocm */
+#define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */
+#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
+#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
+#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
+#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
+
+/* Don't change either of these */
+#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
+
+#define CFG_USB2D0_BASE 0xe0000100
+#define CFG_USB_DEVICE 0xe0000000
+#define CFG_USB_HOST 0xe0000400
+
+/*-----------------------------------------------------------------------
+ * Initial RAM & stack pointer
+ *----------------------------------------------------------------------*/
+/* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache */
+#define CFG_INIT_RAM_ADDR CFG_OCM_BASE /* OCM */
+
+#define CFG_INIT_RAM_END (4 << 10)
+#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * Serial Port
+ *----------------------------------------------------------------------*/
+#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
+#define CONFIG_BAUDRATE 9600
+#undef CONFIG_SERIAL_MULTI /* needed to be able to define
+ CONFIG_SERIAL_SOFTWARE_FIFO, but
+ CONFIG_SERIAL_SOFTWARE_FIFO (16) does not work */
+/* Size (bytes) of interrupt driven serial port buffer.
+ * Set to 0 to use polling instead of interrupts.
+ * Setting to 0 will also disable RTS/CTS handshaking.
+ */
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#undef CONFIG_UART1_CONSOLE
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+/*-----------------------------------------------------------------------
+ * Environment
+ *----------------------------------------------------------------------*/
+
+#undef CFG_ENV_IS_IN_NVRAM
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_IS_IN_EEPROM
+#undef CFG_ENV_IS_NOWHERE
+
+#ifdef CFG_ENV_IS_IN_EEPROM
+/* Put the environment after the SDRAM and bootstrap configuration */
+#define PROM_SIZE 2048
+#define CFG_BOOSTRAP_OPTION_OFFSET 512
+#define CFG_ENV_OFFSET (CFG_BOOSTRAP_OPTION_OFFSET + 0x10)
+#define CFG_ENV_SIZE (PROM_SIZE-CFG_ENV_OFFSET)
+#endif
+
+#ifdef CFG_ENV_IS_IN_FLASH
+/* Put the environment in Flash */
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#endif
+
+/*-----------------------------------------------------------------------
+ * DDR SDRAM
+ *----------------------------------------------------------------------*/
+#define CFG_MBYTES_SDRAM (128) /* 128 MB or 256 MB */
+#define CFG_DDR_CACHED_ADDR 0x40000000 /* setup 2nd TLB cached here */
+#undef CONFIG_DDR_DATA_EYE /* Do not use DDR2 optimization */
+#define CONFIG_DDR_ECC 1 /* enable ECC */
+
+/*-----------------------------------------------------------------------
+ * I2C stuff for a ATMEL AT24C16 (2kB holding ENV, we are using the
+ * the second internal I2C controller of the PPC440EPx
+ *----------------------------------------------------------------------*/
+#define CFG_SPD_BUS_NUM 1
+
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+/* This is the 7bit address of the device, not including P. */
+#define CFG_I2C_EEPROM_ADDR 0x50
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+
+/* The EEPROM can do 16byte ( 1 << 4 ) page writes. */
+#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
+#define CFG_EEPROM_PAGE_WRITE_BITS 4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
+#define CFG_EEPROM_PAGE_WRITE_ENABLE
+#undef CFG_I2C_MULTI_EEPROMS
+
+
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run nfs\" to mount Linux root filesystem over NFS;"\
+ "echo"
+
+#undef CONFIG_BOOTARGS
+
+/* Setup some board specific values for the default environment variables */
+#define CONFIG_HOSTNAME hcu5
+#define CONFIG_IPADDR 172.25.1.42
+#define CONFIG_ETHADDR 00:60:13:00:00:00 /* Netstal Machines AG MAC */
+#define CONFIG_OVERWRITE_ETHADDR_ONCE
+#define CONFIG_SERVERIP 172.25.1.3
+
+#define CFG_TFTP_LOADADDR 0x01000000 /* @16 MB */
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "loadaddr=0x01000000\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "bootfile=hcu5/uImage\0" \
+ "rootpath=/home/hcu/eldk/ppc_4xxFP\0" \
+ "load=tftp 100000 hcu5/u-boot.bin\0" \
+ "update=protect off FFFa0000 FFFFFFFF;era FFFa0000 FFFFFFFF;" \
+ "cp.b 100000 FFFa0000 60000\0" \
+ "upd=run load;run update\0" \
+ "vx=tftp ${loadaddr} hcu5/hcu5_vx_rom;" \
+ "setenv bootargs emac(0,0)hcu5_vx_rom e=${ipaddr} " \
+ " h=${serverip} u=dpu pw=netstal8752 tn=hcu5 f=0x3008;" \
+ "bootvx ${loadaddr}\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run vx"
+
+#if 0
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_M88E1111_PHY 1
+#define CONFIG_IBM_EMAC4_V4 1
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_PHY_ADDR 0 /* PHY address, See schematics */
+
+#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
+
+#define CONFIG_HAS_ETH0
+#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
+
+#define CONFIG_NET_MULTI 1
+#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
+#define CONFIG_PHY1_ADDR 1
+
+/* USB */
+#define CONFIG_USB_OHCI
+#define CONFIG_USB_STORAGE
+
+/* Comment this out to enable USB 1.1 device */
+#define USB_2_0_DEVICE
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_USB
+
+#define CONFIG_SUPPORT_VFAT
+
+/*-----------------------------------------------------------------------
+ * Miscellaneous configurable options
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CONFIG_LOOPW 1 /* enable loopw command */
+#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ *----------------------------------------------------------------------*/
+/* General PCI */
+#define CONFIG_PCI /* include pci support */
+#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
+
+/* Board-specific PCI */
+#define CFG_PCI_TARGET_INIT
+#define CFG_PCI_MASTER_INIT
+
+#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
+#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH CFG_FLASH_BASE
+#define CFG_CS_1 0xC8000000 /* CAN */
+#define CFG_CS_2 0xCC000000 /* CPLD and IMC-Bus Standard */
+#define CFG_CPLD CFG_CS_2
+#define CFG_CS_3 0xCD000000 /* CPLD and IMC-Bus Fast */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ * Memory Bank 0 (BOOT-FLASH) initialization
+ */
+#define CFG_BOOTFLASH_CS 0 /* Boot Flash chip connected to CSx */
+#define CFG_EBC_PB0AP 0x02005400
+#define CFG_EBC_PB0CR 0xFFF18000 /* (CFG_FLASH | 0xda000) */
+#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 32 /* max number of sectors on one chip */
+
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+/* Memory Bank 1 CAN-Chips initialization */
+#define CFG_EBC_PB1AP 0x02054500
+#define CFG_EBC_PB1CR 0xC8018000
+
+/* Memory Bank 2 CPLD/IMC-Bus standard initialization */
+#define CFG_EBC_PB2AP 0x01840300
+#define CFG_EBC_PB2CR 0xCC0BA000
+
+/* Memory Bank 3 IMC-Bus fast mode initialization */
+#define CFG_EBC_PB3AP 0x01800300
+#define CFG_EBC_PB3CR 0xCE0BA000
+
+/* Memory Bank 4 (not used) initialization */
+#undef CFG_EBC_PB4AP
+#undef CFG_EBC_PB4CR
+
+/* Memory Bank 5 (not used) initialization */
+#undef CFG_EBC_PB5AP
+#undef CFG_EBC_PB5CR
+
+#define HCU_CPLD_VERSION_REGISTER ( CFG_CPLD + 0x0F00000 )
+#define HCU_HW_VERSION_REGISTER ( CFG_CPLD + 0x1400000 )
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ *----------------------------------------------------------------------*/
+#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#define CFG_HUSH_PARSER /* use "hush" command parser */
+#ifdef CFG_HUSH_PARSER
+ #define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/hermes.h b/include/configs/hermes.h
index 91117ba..e3a2ed2 100644
--- a/include/configs/hermes.h
+++ b/include/configs/hermes.h
@@ -64,23 +64,28 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_COMMANDS CONFIG_CMD_DFL
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/*----------------------------------------------------------------------*/
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
-/*----------------------------------------------------------------------*/
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -157,7 +162,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/hmi1001.h b/include/configs/hmi1001.h
index 095b5f6..6c15b4e 100644
--- a/include/configs/hmi1001.h
+++ b/include/configs/hmi1001.h
@@ -38,11 +38,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_R
/*
@@ -55,22 +50,31 @@
/* Partitions */
#define CONFIG_DOS_PARTITION
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DISPLAY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
@@ -110,7 +114,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
@@ -222,7 +226,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -231,6 +235,11 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/* Enable an alternate, more extensive memory test */
#define CFG_ALT_MEMTEST
@@ -242,8 +251,7 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
diff --git a/include/configs/hymod.h b/include/configs/hymod.h
index 8cad98d..2547afb 100644
--- a/include/configs/hymod.h
+++ b/include/configs/hymod.h
@@ -69,8 +69,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ether on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ether on FCC */
@@ -174,32 +173,44 @@
#define CONFIG_LAST_STAGE_INIT
-#define CONFIG_COMMANDS (CFG_CMD_ALL & ~( \
- CFG_CMD_BEDBUG | \
- CFG_CMD_BMP | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DOC | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FDC | \
- CFG_CMD_FDOS | \
- CFG_CMD_FPGA | \
- CFG_CMD_HWFLOW | \
- CFG_CMD_IDE | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NAND | \
- CFG_CMD_MMC | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_PCI | \
- CFG_CMD_USB | \
- CFG_CMD_REISER | \
- CFG_CMD_SCSI | \
- CFG_CMD_SPI | \
- CFG_CMD_UNIVERSE| \
- CFG_CMD_VFD | \
- CFG_CMD_XIMG ) )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_all.h>
+
+#undef CONFIG_CMD_BEDBUG
+#undef CONFIG_CMD_BMP
+#undef CONFIG_CMD_DISPLAY
+#undef CONFIG_CMD_DOC
+#undef CONFIG_CMD_EXT2
+#undef CONFIG_CMD_FDC
+#undef CONFIG_CMD_FDOS
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_HWFLOW
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_JFFS2
+#undef CONFIG_CMD_NAND
+#undef CONFIG_CMD_MFSL
+#undef CONFIG_CMD_MMC
+#undef CONFIG_CMD_PCMCIA
+#undef CONFIG_CMD_PCI
+#undef CONFIG_CMD_USB
+#undef CONFIG_CMD_REISER
+#undef CONFIG_CMD_SCSI
+#undef CONFIG_CMD_SPI
+#undef CONFIG_CMD_UNIVERSE
+#undef CONFIG_CMD_VFD
+#undef CONFIG_CMD_XIMG
+
#ifdef DEBUG
#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
@@ -218,7 +229,7 @@
#define DEBUG_BOOTKEYS 0
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
@@ -247,7 +258,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -395,12 +406,13 @@
#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment Sector */
#define CFG_ENV_SECT_SIZE 0x40000 /* see README - env sect real size */
#define CFG_ENV_ADDR (CFG_FLASH_BASE+CFG_MONITOR_LEN-CFG_ENV_SECT_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
/*-----------------------------------------------------------------------
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value*/
#endif
diff --git a/include/configs/idmr.h b/include/configs/idmr.h
index b1dbe2c..3821ebc 100644
--- a/include/configs/idmr.h
+++ b/include/configs/idmr.h
@@ -44,6 +44,8 @@
*/
#define CONFIG_BOOTCOMMAND "run net_nfs"
#define CONFIG_BOOTDELAY 5
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
#define CONFIG_ETHADDR 00:06:3b:01:41:55
@@ -58,6 +60,8 @@
#define CONFIG_PREBOOT "echo;echo Type \"run flash_nfs\" to mount root " \
"filesystem over NFS; echo"
+#define CONFIG_MCFTMR
+
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
@@ -78,18 +82,27 @@
"u-boot=/tftpboot/idmr/u-boot.bin\0" \
""
-/*
- * Commands' definition
- */
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | \
- CFG_CMD_PING | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NET) & \
- ~(CFG_CMD_LOADS | \
- CFG_CMD_LOADB))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NET
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
/*
@@ -112,14 +125,16 @@
#define CFG_ENV_IS_IN_FLASH
#endif /* !CONFIG_MONITOR_IS_IN_RAM */
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
#define CFG_PROMPT "=> "
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
-#else /* !(CONFIG_COMMANDS & CFG_CMD_KGDB) */
+#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
-#endif /* (CONFIG_COMMANDS & CFG_CMD_KGDB) */
+#endif
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
@@ -138,11 +153,27 @@
/*
* Ethernet
*/
-#define FEC_ENET
-#define CONFIG_NET_RETRY_COUNT 5
-#define CFG_ENET_BD_BASE 0x480000
-#define CFG_DISCOVER_PHY 1
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
#define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
/*
* Definitions for initial stack pointer and data area (in DPRAM)
@@ -177,7 +208,7 @@
* have to be in the first 8 MB of memory, since this is
* the maximum mapped by the Linux kernel during initialization ??
*/
-#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+#define CFG_BOOTMAPSZ (CFG_SDRAM_BASE + (CFG_SDRAM_SIZE << 20))
/* FLASH organization */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
@@ -206,8 +237,8 @@
"2m(rootfs)," \
"-(user)";
-#if (CONFIG_COMMANDS & CFG_CMD_MII)
-#error MII commands don't work on iDMR board and sholud not be enabled.
-#endif /* (CONFIG_COMMANDS & CFG_CMD_MII) */
+#if defined(CONFIG_CMD_MII)
+#error "MII commands don't work on iDMR board and should not be enabled."
+#endif
#endif /* _IDMR_H */
diff --git a/include/configs/impa7.h b/include/configs/impa7.h
index 8b841ff..0e52ffe 100644
--- a/include/configs/impa7.h
+++ b/include/configs/impa7.h
@@ -61,12 +61,23 @@
#define CONFIG_BAUDRATE 9600
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_JFFS2)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "devfs=mount root=ramfs console=ttyS0,9600"
@@ -77,7 +88,7 @@
/*#define CONFIG_BOOTFILE "impa7" */
#define CONFIG_BOOTCOMMAND "bootp;bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/incaip.h b/include/configs/incaip.h
index 1c6216b..4caf54e 100644
--- a/include/configs/incaip.h
+++ b/include/configs/incaip.h
@@ -81,15 +81,29 @@
""
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_SNTP )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SNTP
+
/*
* Miscellaneous configurable options
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h
index 773d5d2..0fac28f 100644
--- a/include/configs/inka4x0.h
+++ b/include/configs/inka4x0.h
@@ -40,11 +40,6 @@
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -76,21 +71,30 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_SNTP | \
- CFG_CMD_USB )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
+
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
@@ -147,7 +151,7 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* Flash configuration
@@ -239,7 +243,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -248,6 +252,11 @@
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/* Enable an alternate, more extensive memory test */
#define CFG_ALT_MEMTEST
@@ -259,8 +268,7 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
diff --git a/include/configs/innokom.h b/include/configs/innokom.h
index 3cb9ebc..5310e0d 100644
--- a/include/configs/innokom.h
+++ b/include/configs/innokom.h
@@ -54,10 +54,34 @@
#define CONFIG_BAUDRATE 19200
#define CONFIG_MISC_INIT_R 1 /* we have a misc_init_r() function */
-#define CONFIG_COMMANDS (CFG_CMD_BDI|CFG_CMD_LOADB|CFG_CMD_IMI|CFG_CMD_FLASH|CFG_CMD_MEMORY|CFG_CMD_NET|CFG_CMD_ENV|CFG_CMD_RUN|CFG_CMD_ASKENV|CFG_CMD_ECHO|CFG_CMD_I2C|CFG_CMD_DHCP|CFG_CMD_CACHE)
-/* CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP) */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_RUN
+
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200" */
diff --git a/include/configs/integratorap.h b/include/configs/integratorap.h
index 2f6e399..1452bf2 100644
--- a/include/configs/integratorap.h
+++ b/include/configs/integratorap.h
@@ -66,15 +66,26 @@
#define CFG_SERIAL0 0x16000000
#define CFG_SERIAL1 0x17000000
-/*#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_PCI) */
/*#define CONFIG_NET_MULTI */
-/*#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT */
-
-#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_MEMORY
+
#define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 mem=32M console=ttyAM0 console=tty"
diff --git a/include/configs/integratorcp.h b/include/configs/integratorcp.h
index 4189f9c..69310d4 100644
--- a/include/configs/integratorcp.h
+++ b/include/configs/integratorcp.h
@@ -70,17 +70,28 @@
#define CFG_SERIAL0 0x16000000
#define CFG_SERIAL1 0x17000000
+
/*
-#define CONFIG_COMMANDS (CFG_CMD_DFL | CFG_CMD_PCI)
-*/
-#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | \
- CFG_CMD_BDI | CFG_CMD_MEMORY | CFG_CMD_FLASH | CFG_CMD_ENV \
- )
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* #define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+
#if 0
#define CONFIG_BOOTDELAY 2
diff --git a/include/configs/ixdp425.h b/include/configs/ixdp425.h
index 9f9fdb2..bc5f9e1 100644
--- a/include/configs/ixdp425.h
+++ b/include/configs/ixdp425.h
@@ -53,14 +53,28 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_ELF | CFG_CMD_PCI)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_PCI
+
#define CONFIG_PCI
#define CONFIG_NET_MULTI
#define CONFIG_EEPRO100
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-/* These are u-boot generic parameters */
-#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 3
/*#define CONFIG_ETHADDR 08:00:3e:26:0a:5b*/
@@ -71,7 +85,7 @@
#define CONFIG_BOOTARGS "root=/dev/mtdblock2 rootfstype=cramfs console=ttyS0,115200"
#define CONFIG_CMDLINE_TAG
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ixdpg425.h b/include/configs/ixdpg425.h
index af4ecf6..da59230 100644
--- a/include/configs/ixdpg425.h
+++ b/include/configs/ixdpg425.h
@@ -75,16 +75,27 @@
#define CONFIG_BAUDRATE 115200
#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_NET | \
- CFG_CMD_MII | \
- CFG_CMD_PING)
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-/* These are u-boot generic parameters */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
diff --git a/include/configs/jupiter.h b/include/configs/jupiter.h
index 5b97526..b7100e9 100644
--- a/include/configs/jupiter.h
+++ b/include/configs/jupiter.h
@@ -41,11 +41,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -71,7 +66,6 @@
#define CONFIG_PCI_IO_BUS 0x50000000
#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
#define CONFIG_PCI_IO_SIZE 0x01000000
-#define ADD_PCI_CMD CFG_CMD_PCI
#endif
#define CFG_XLB_PIPELINING 1
@@ -87,15 +81,28 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
+#if defined(CONFIG_PCI)
+#define CODFIG_CMD_PCI
+#endif
+
/*
* Autobooting
@@ -138,12 +145,9 @@
#if 0
/* pass open firmware flat tree */
-#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_LIBFDT 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,5200@0"
#define OF_SOC "soc5200@f0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -254,7 +258,7 @@
#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -271,6 +275,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/katmai.h b/include/configs/katmai.h
index cc47a16..7908e5a 100644
--- a/include/configs/katmai.h
+++ b/include/configs/katmai.h
@@ -42,7 +42,6 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
-#define CONFIG_ADD_RAM_INFO 1 /* Print additional info */
#undef CONFIG_SHOW_BOOT_PROGRESS
/*-----------------------------------------------------------------------
@@ -67,11 +66,11 @@
#define CFG_PCIE_BASE 0xe0000000 /* PCIe UTL regs */
#define CFG_PCIE0_CFGBASE 0xc0000000
-#define CFG_PCIE0_XCFGBASE 0xc0000400
-#define CFG_PCIE1_CFGBASE 0xc0001000
-#define CFG_PCIE1_XCFGBASE 0xc0001400
-#define CFG_PCIE2_CFGBASE 0xc0002000
-#define CFG_PCIE2_XCFGBASE 0xc0002400
+#define CFG_PCIE1_CFGBASE 0xc1000000
+#define CFG_PCIE2_CFGBASE 0xc2000000
+#define CFG_PCIE0_XCFGBASE 0xc3000000
+#define CFG_PCIE1_XCFGBASE 0xc3001000
+#define CFG_PCIE2_XCFGBASE 0xc3002000
/* System RAM mapped to PCI space */
#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
@@ -202,6 +201,7 @@
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
"kozio=bootm ffc60000\0" \
+ "pciconfighost=1\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -210,28 +210,40 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_DTT | \
- CFG_CMD_ELF | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
#define CONFIG_IBM_EMAC4_V4 1 /* 440SPe has this EMAC version */
#define CONFIG_MII 1 /* MII PHY management */
@@ -254,7 +266,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -311,10 +323,9 @@
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
-#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT 1 /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#undef CFG_PCI_MASTER_INIT
@@ -421,7 +432,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -433,7 +444,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/kb9202.h b/include/configs/kb9202.h
index 6590f6f..75d9c3b 100644
--- a/include/configs/kb9202.h
+++ b/include/configs/kb9202.h
@@ -78,17 +78,29 @@
#define CONFIG_BOOTDELAY 3
#define CONFIG_ENV_OVERWRITE 1
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | \
- CFG_CMD_I2C | \
- CFG_CMD_PING | \
- CFG_CMD_DHCP ) & \
- ~(CFG_CMD_BDI | \
- CFG_CMD_FPGA | \
- CFG_CMD_MISC))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_MISC
+
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
diff --git a/include/configs/kvme080.h b/include/configs/kvme080.h
index 61cf705..569800a 100644
--- a/include/configs/kvme080.h
+++ b/include/configs/kvme080.h
@@ -60,33 +60,45 @@
#undef CONFIG_WATCHDOG
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_DS164x
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_CACHE | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#define CONFIG_NETCONSOLE
-#include <cmd_confdefs.h>
-
#define CFG_LONGHELP
#define CFG_PROMPT "=> "
#define CFG_CBSIZE 256
@@ -178,7 +190,7 @@
#define CONFIG_SYS_CLK_FREQ 33333333
#define CFG_CACHELINE_SIZE 32
-#if CONFIG_COMMANDS & CFG_CMD_KGDB
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5
#endif
diff --git a/include/configs/lart.h b/include/configs/lart.h
index a00640b..8f18c9f 100644
--- a/include/configs/lart.h
+++ b/include/configs/lart.h
@@ -59,10 +59,21 @@
#define CONFIG_BAUDRATE 9600
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600"
@@ -73,7 +84,7 @@
#define CONFIG_BOOTFILE "elinos-lart"
#define CONFIG_BOOTCOMMAND "tftp; bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/logodl.h b/include/configs/logodl.h
index 715ed74..2b2d377 100644
--- a/include/configs/logodl.h
+++ b/include/configs/logodl.h
@@ -54,10 +54,26 @@
#define CONFIG_BAUDRATE 19200
#undef CONFIG_MISC_INIT_R /* FIXME: misc_init_r() missing */
-#define CONFIG_COMMANDS (CFG_CMD_FLASH|CFG_CMD_MEMORY|CFG_CMD_ENV|CFG_CMD_RUN|CFG_CMD_ASKENV|CFG_CMD_ECHO)
-/* CONFIG_CMD_DFL|CFG_CMD_I2C|CFG_CMD_EEPROM|CFG_CMD_NET|CFG_CMD_JFFS2|CFG_CMD_DHCP) */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_RUN
+
#define CONFIG_BOOTDELAY 3
/* #define CONFIG_BOOTARGS "root=/dev/nfs ip=bootp console=ttyS0,19200" */
diff --git a/include/configs/lpc2292sodimm.h b/include/configs/lpc2292sodimm.h
index 7e51523..e3fef5e 100644
--- a/include/configs/lpc2292sodimm.h
+++ b/include/configs/lpc2292sodimm.h
@@ -1,12 +1,8 @@
/*
- * (C) Copyright 2000
- * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
- * Marius Groeger <mgroeger@sysgo.de>
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
*
- * Configuation settings for the EP7312 board.
- *
- * Modified to work on Armadillo HT1070 ARM720T board
- * (C) Copyright 2005 Rowel Atienza rowel@diwalabs.com
+ * Configuation settings for the LPC2292SODIMM board from Embedded Artists.
*
* See file CREDITS for list of people who contributed to this
* project.
@@ -31,7 +27,7 @@
#define __CONFIG_H
/*
- * If we are developing, we might want to start armboot from ram
+ * If we are developing, we might want to start u-boot from ram
* so we MUST NOT initialize critical regs like mem-timing ...
*/
#undef CONFIG_INIT_CRITICAL /* undef for developing */
@@ -46,7 +42,7 @@
#define CONFIG_ARM7 1 /* This is a ARM7 CPU */
#define CONFIG_ARM_THUMB 1 /* this is an ARM720TDMI */
#define CONFIG_LPC2292
-#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
+#undef CONFIG_ARM7_REVD /* disable ARM720 REV.D Workarounds */
#undef CONFIG_USE_IRQ /* don't need them anymore */
@@ -70,24 +66,31 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
/*
- * Supported commands
+ * Command line configuration.
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_FAT | \
- CFG_CMD_MMC | \
- CFG_CMD_NET | \
- CFG_CMD_PING)
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_BOOTDELAY 5
/*
@@ -103,11 +106,12 @@
#define CFG_MEMTEST_START 0x40000000 /* memtest works on */
#define CFG_MEMTEST_END 0x40000000 /* 4 ... 8 MB in DRAM */
-#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
-#define CFG_LOAD_ADDR 0x00040000 /* default load address for armadillo: kernel img is here*/
+#define CFG_LOAD_ADDR 0x00040000 /* default load address for */
+ /* armadillo: kernel img is here*/
-#define CFG_SYS_CLK_FREQ 58982400 /* Hz */
+#define CFG_SYS_CLK_FREQ 58982400 /* Hz */
#define CFG_HZ 2048 /* decrementer freq in Hz */
/* valid baudrates */
@@ -154,5 +158,7 @@
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
#define CONFIG_MMC 1
+/* we use this ethernet chip */
+#define CONFIG_ENC28J60
#endif /* __CONFIG_H */
diff --git a/include/configs/lpd7a400.h b/include/configs/lpd7a400.h
index d7d0460..0414889 100644
--- a/include/configs/lpd7a400.h
+++ b/include/configs/lpd7a400.h
@@ -55,19 +55,32 @@
#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#ifndef USE_920T_MMU
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING) & ~(CFG_CMD_CACHE))
+ #define CONFIG_CMD_PING
+ #undef CONFIG_CMD_CACHE
#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DATE)
+ #define CONFIG_CMD_DATE
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_BOOTDELAY 3
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/lpd7a404.h b/include/configs/lpd7a404.h
index 4002e68..11ede96 100644
--- a/include/configs/lpd7a404.h
+++ b/include/configs/lpd7a404.h
@@ -55,19 +55,32 @@
#define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#ifndef USE_920T_MMU
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING) & ~(CFG_CMD_CACHE))
+ #define CONFIG_CMD_PING)
+ #undef CONFIG_CMD_CACHE
#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DATE)
+ #define CONFIG_CMD_DATE
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_BOOTDELAY 3
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/luan.h b/include/configs/luan.h
index 9c8769b..a09dd74 100644
--- a/include/configs/luan.h
+++ b/include/configs/luan.h
@@ -39,7 +39,6 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f() */
#define CONFIG_MISC_INIT_R 1 /* call misc_init_r() */
-#define CONFIG_ADD_RAM_INFO 1 /* Print additional info */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
@@ -135,7 +134,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM 1 /* Use SPD EEPROM for setup */
#define SPD_EEPROM_ADDRESS {0x53, 0x52} /* SPD i2c spd addresses*/
-#undef CONFIG_DDR_ECC /* no ECC support for now */
+#define CONFIG_DDR_ECC 1 /* with ECC support */
/*-----------------------------------------------------------------------
* I2C
@@ -212,31 +211,38 @@
#define CONFIG_HW_WATCHDOG /* watchdog */
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- 0)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -264,7 +270,7 @@
* PCI stuff
*-----------------------------------------------------------------------
*/
-#if (CONFIG_COMMANDS & CFG_CMD_PCI)
+#if defined(CONFIG_CMD_PCI)
/* General PCI */
#define CONFIG_PCI /* include pci support */
@@ -272,14 +278,13 @@
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT
#undef CFG_PCI_MASTER_INIT
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
#define CFG_PCI_SUBSYS_DEVICEID 0x4403 /* whatever */
-#endif /* CONFIG_COMMANDS & CFG_CMD_PCI */
+#endif
/*
* For booting Linux, the board info and command line data
@@ -293,7 +298,7 @@
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -305,7 +310,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/lubbock.h b/include/configs/lubbock.h
index ad1035b..4adf254 100644
--- a/include/configs/lubbock.h
+++ b/include/configs/lubbock.h
@@ -67,10 +67,24 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
@@ -82,7 +96,7 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_TIMESTAMP
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/lwmon.h b/include/configs/lwmon.h
index 9b4c004..8a82702 100644
--- a/include/configs/lwmon.h
+++ b/include/configs/lwmon.h
@@ -170,34 +170,41 @@
#define CONFIG_RTC_PCF8563 /* use Philips PCF8563 RTC */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_BMP
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
-#else
-#define CFG_CMD_POST_DIAG 0
+#define CONFIG_CMD_DIAG
#endif
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BMP | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_SNTP )
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-/*----------------------------------------------------------------------*/
/*
* Miscellaneous configurable options
@@ -210,7 +217,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -276,7 +283,7 @@
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
@@ -370,7 +377,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/lwmon5.h b/include/configs/lwmon5.h
new file mode 100644
index 0000000..be48324
--- /dev/null
+++ b/include/configs/lwmon5.h
@@ -0,0 +1,505 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * lwmon5.h - configuration for lwmon5 board
+ ***********************************************************************/
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*-----------------------------------------------------------------------
+ * High Level Configuration Options
+ *----------------------------------------------------------------------*/
+#define CONFIG_LWMON5 1 /* Board is lwmon5 */
+#define CONFIG_440EPX 1 /* Specific PPC440EPx */
+#define CONFIG_440 1 /* ... PPC440 family */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_SYS_CLK_FREQ 33300000 /* external freq to pll */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_BOARD_POSTCLK_INIT 1 /* Call board_postclk_init */
+#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+
+/*-----------------------------------------------------------------------
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+ *----------------------------------------------------------------------*/
+#define CFG_MONITOR_LEN (512 * 1024) /* Reserve 512 kB for Monitor */
+#define CFG_MALLOC_LEN (512 * 1024) /* Reserve 512 kB for malloc() */
+
+#define CFG_BOOT_BASE_ADDR 0xf0000000
+#define CFG_SDRAM_BASE 0x00000000 /* _must_ be 0 */
+#define CFG_FLASH_BASE 0xf8000000 /* start of FLASH */
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_LIME_BASE_0 0xc0000000
+#define CFG_LIME_BASE_1 0xc1000000
+#define CFG_LIME_BASE_2 0xc2000000
+#define CFG_LIME_BASE_3 0xc3000000
+#define CFG_FPGA_BASE_0 0xc4000000
+#define CFG_FPGA_BASE_1 0xc4200000
+#define CFG_OCM_BASE 0xe0010000 /* ocm */
+#define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */
+#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
+#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
+#define CFG_PCI_MEMBASE2 CFG_PCI_MEMBASE1 + 0x10000000
+#define CFG_PCI_MEMBASE3 CFG_PCI_MEMBASE2 + 0x10000000
+
+/* Don't change either of these */
+#define CFG_PERIPHERAL_BASE 0xef600000 /* internal peripherals */
+
+#define CFG_USB2D0_BASE 0xe0000100
+#define CFG_USB_DEVICE 0xe0000000
+#define CFG_USB_HOST 0xe0000400
+
+/*-----------------------------------------------------------------------
+ * Initial RAM & stack pointer
+ *----------------------------------------------------------------------*/
+/* 440EPx/440GRx have 16KB of internal SRAM, so no need for D-Cache */
+#define CFG_INIT_RAM_ADDR CFG_OCM_BASE /* OCM */
+#define CFG_OCM_DATA_ADDR CFG_OCM_BASE
+
+#define CFG_INIT_RAM_END (4 << 10)
+#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
+#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
+
+/*-----------------------------------------------------------------------
+ * Serial Port
+ *----------------------------------------------------------------------*/
+#undef CFG_EXT_SERIAL_CLOCK /* no external clock provided */
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SERIAL_MULTI 1
+/* define this if you want console on UART1 */
+#define CONFIG_UART1_CONSOLE 1 /* use UART1 as console */
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200}
+
+/*-----------------------------------------------------------------------
+ * Environment
+ *----------------------------------------------------------------------*/
+#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+
+/*-----------------------------------------------------------------------
+ * FLASH related
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+
+#define CFG_FLASH0 0xFC000000
+#define CFG_FLASH1 0xF8000000
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH1, CFG_FLASH0 }
+
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CFG_FLASH_PROTECTION 1 /* use hardware flash protection */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
+
+#define CFG_ENV_SECT_SIZE 0x40000 /* size of one complete sector */
+#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+/*-----------------------------------------------------------------------
+ * DDR SDRAM
+ *----------------------------------------------------------------------*/
+#define CFG_MBYTES_SDRAM (256) /* 256MB */
+#define CFG_DDR_CACHED_ADDR 0x40000000 /* setup 2nd TLB cached here */
+#define CONFIG_DDR_DATA_EYE 1 /* use DDR2 optimization */
+#if 0 /* test-only: disable ECC for now */
+#define CONFIG_DDR_ECC 1 /* enable ECC */
+#define CFG_POST_ECC_ON CFG_POST_ECC
+#else
+#define CFG_POST_ECC_ON 0
+#endif
+
+/* POST support */
+#define CONFIG_POST (CFG_POST_CACHE | \
+ CFG_POST_CPU | \
+ CFG_POST_ECC_ON | \
+ CFG_POST_ETHER | \
+ CFG_POST_FPU | \
+ CFG_POST_I2C | \
+ CFG_POST_MEMORY | \
+ CFG_POST_RTC | \
+ CFG_POST_SPR | \
+ CFG_POST_UART)
+
+#define CFG_POST_CACHE_ADDR 0x10000000 /* free virtual address */
+#define CONFIG_LOGBUFFER
+#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
+
+/*-----------------------------------------------------------------------
+ * I2C
+ *----------------------------------------------------------------------*/
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 100000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+#define CFG_I2C_EEPROM_ADDR 0x53 /* EEPROM AT24C128 */
+#define CFG_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
+#define CFG_EEPROM_PAGE_WRITE_BITS 6 /* The Atmel AT24C128 has */
+ /* 64 byte page write mode using*/
+ /* last 6 bits of the address */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
+#define CFG_EEPROM_PAGE_WRITE_ENABLE
+
+#define CONFIG_RTC_PCF8563 1 /* enable Philips PCF8563 RTC */
+#define CFG_I2C_RTC_ADDR 0x51 /* Philips PCF8563 RTC address */
+#define CFG_I2C_KEYBD_ADDR 0x56 /* PIC LWE keyboard */
+
+#define CONFIG_POST_KEY_MAGIC "3C+3E" /* press F3 + F5 keys to force POST */
+#if 0
+#define CONFIG_AUTOBOOT_KEYED /* Enable "password" protection */
+#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
+#define CONFIG_AUTOBOOT_DELAY_STR " " /* "password" */
+#endif
+
+#define CONFIG_PREBOOT "setenv bootdelay 15"
+
+#undef CONFIG_BOOTARGS
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "hostname=lwmon5\0" \
+ "netdev=eth0\0" \
+ "unlock=yes\0" \
+ "logversion=2\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS1,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "rootpath=/opt/eldk/ppc_4xxFP\0" \
+ "bootfile=/tftpboot/lwmon5/uImage\0" \
+ "kernel_addr=FC000000\0" \
+ "ramdisk_addr=FC180000\0" \
+ "load=tftp 200000 /tftpboot/${hostname}/u-boot.bin\0" \
+ "update=protect off FFF80000 FFFFFFFF;era FFF80000 FFFFFFFF;" \
+ "cp.b 200000 FFF80000 80000\0" \
+ "upd=run load;run update\0" \
+ "lwe_env=tftp 200000 /tftpboot.dev/lwmon5/env_uboot.bin;" \
+ "autoscr 200000\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#if 0
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_IBM_EMAC4_V4 1
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_PHY_ADDR 3 /* PHY address, See schematics */
+
+#define CONFIG_PHY_RESET 1 /* reset phy upon startup */
+#define CONFIG_PHY_RESET_DELAY 300
+
+#define CONFIG_HAS_ETH0
+#define CFG_RX_ETH_BUFFER 32 /* Number of ethernet rx buffers & descriptors */
+
+#define CONFIG_NET_MULTI 1
+#define CONFIG_HAS_ETH1 1 /* add support for "eth1addr" */
+#define CONFIG_PHY1_ADDR 1
+
+/* USB */
+#ifdef CONFIG_440EPX
+#define CONFIG_USB_OHCI
+#define CONFIG_USB_STORAGE
+
+/* Comment this out to enable USB 1.1 device */
+#define USB_2_0_DEVICE
+
+#endif /* CONFIG_440EPX */
+
+/* Partitions */
+#define CONFIG_MAC_PARTITION
+#define CONFIG_DOS_PARTITION
+#define CONFIG_ISO_PARTITION
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+#ifdef CONFIG_440EPX
+#define CONFIG_CMD_USB
+#endif
+
+/*-----------------------------------------------------------------------
+ * Miscellaneous configurable options
+ *----------------------------------------------------------------------*/
+#define CONFIG_SUPPORT_VFAT
+
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CONFIG_LOOPW 1 /* enable loopw command */
+#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ *----------------------------------------------------------------------*/
+/* General PCI */
+#define CONFIG_PCI /* include pci support */
+#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
+
+/* Board-specific PCI */
+#define CFG_PCI_TARGET_INIT
+#define CFG_PCI_MASTER_INIT
+
+#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
+#define CFG_PCI_SUBSYS_ID 0xcafe /* Whatever */
+
+#define CONFIG_HW_WATCHDOG 1 /* Use external HW-Watchdog */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ *----------------------------------------------------------------------*/
+#define CFG_FLASH CFG_FLASH_BASE
+
+/* Memory Bank 0 (NOR-FLASH) initialization */
+#define CFG_EBC_PB0AP 0x03050200
+#define CFG_EBC_PB0CR (CFG_FLASH | 0xfc000)
+
+/* Memory Bank 1 (Lime) initialization */
+#define CFG_EBC_PB1AP 0x01004380
+#define CFG_EBC_PB1CR (CFG_LIME_BASE_0 | 0xdc000)
+
+/* Memory Bank 2 (FPGA) initialization */
+#define CFG_EBC_PB2AP 0x01004400
+#define CFG_EBC_PB2CR (CFG_FPGA_BASE_0 | 0x1c000)
+
+/* Memory Bank 3 (FPGA2) initialization */
+#define CFG_EBC_PB3AP 0x01004400
+#define CFG_EBC_PB3CR (CFG_FPGA_BASE_1 | 0x1c000)
+
+#define CFG_EBC_CFG 0xb8400000
+
+/*-----------------------------------------------------------------------
+ * Graphics (Fujitsu Lime)
+ *----------------------------------------------------------------------*/
+/* SDRAM Clock frequency adjustment register */
+#define CFG_LIME_SDRAM_CLOCK 0xC1FC0038
+/* Lime Clock frequency is to set 100MHz */
+#define CFG_LIME_CLOCK_100MHZ 0x00000
+#if 0
+/* Lime Clock frequency for 133MHz */
+#define CFG_LIME_CLOCK_133MHZ 0x10000
+#endif
+
+/* SDRAM Parameter register */
+#define CFG_LIME_MMR 0xC1FCFFFC
+/* SDRAM parameter value; was 0x414FB7F2, caused several vertical bars
+ and pixel flare on display when 133MHz was configured. According to
+ SDRAM chip datasheet CAS Latency is 3 for 133MHz and -75 Speed Grade */
+#ifdef CFG_LIME_CLOCK_133MHZ
+#define CFG_LIME_MMR_VALUE 0x414FB7F3
+#else
+#define CFG_LIME_MMR_VALUE 0x414FB7F2
+#endif
+
+/*-----------------------------------------------------------------------
+ * GPIO Setup
+ *----------------------------------------------------------------------*/
+#define CFG_GPIO_PHY1_RST 12
+#define CFG_GPIO_FLASH_WP 14
+#define CFG_GPIO_PHY0_RST 22
+#define CFG_GPIO_EEPROM_EXT_WP 55
+#define CFG_GPIO_EEPROM_INT_WP 57
+#define CFG_GPIO_LIME_S 59
+#define CFG_GPIO_LIME_RST 60
+#define CFG_GPIO_WATCHDOG 63
+
+/*-----------------------------------------------------------------------
+ * PPC440 GPIO Configuration
+ */
+#define CFG_440_GPIO_TABLE { /* Out GPIO Alternate1 Alternate2 Alternate3 */ \
+{ \
+/* GPIO Core 0 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO0 EBC_ADDR(7) DMA_REQ(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO1 EBC_ADDR(6) DMA_ACK(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO2 EBC_ADDR(5) DMA_EOT/TC(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO3 EBC_ADDR(4) DMA_REQ(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO4 EBC_ADDR(3) DMA_ACK(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO5 EBC_ADDR(2) DMA_EOT/TC(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO6 EBC_CS_N(1) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO7 EBC_CS_N(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO8 EBC_CS_N(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO9 EBC_CS_N(4) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO10 EBC_CS_N(5) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO11 EBC_BUS_ERR */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO12 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO13 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO14 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO15 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO16 GMCTxD(4) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO17 GMCTxD(5) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO18 GMCTxD(6) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO19 GMCTxD(7) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO20 RejectPkt0 */ \
+{GPIO0_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO21 RejectPkt1 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO22 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO23 SCPD0 */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO24 GMCTxD(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_0}, /* GPIO25 GMCTxD(3) */ \
+{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO26 */ \
+{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO27 EXT_EBC_REQ USB2D_RXERROR */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO28 USB2D_TXVALID */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO29 EBC_EXT_HDLA USB2D_PAD_SUSPNDM */ \
+{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO30 EBC_EXT_ACK USB2D_XCVRSELECT*/ \
+{GPIO0_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO31 EBC_EXR_BUSREQ USB2D_TERMSELECT*/ \
+}, \
+{ \
+/* GPIO Core 1 */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO32 USB2D_OPMODE0 EBC_DATA(2) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO33 USB2D_OPMODE1 EBC_DATA(3) */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_0}, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT3, GPIO_OUT_0}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO36 UART0_8PIN_CTS_N EBC_DATA(0) UART3_SIN*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_0}, /* GPIO37 UART0_RTS_N EBC_DATA(1) UART3_SOUT*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_0}, /* GPIO38 UART0_DTR_N UART1_SOUT */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT2, GPIO_OUT_0}, /* GPIO39 UART0_RI_N UART1_SIN */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO40 UIC_IRQ(0) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO41 UIC_IRQ(1) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO42 UIC_IRQ(2) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO43 UIC_IRQ(3) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO44 UIC_IRQ(4) DMA_ACK(1) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO45 UIC_IRQ(6) DMA_EOT/TC(1) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \
+{GPIO1_BASE, GPIO_IN , GPIO_ALT1, GPIO_OUT_0}, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO49 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL , GPIO_OUT_0}, /* GPIO50 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO51 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO52 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO53 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO54 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO55 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO56 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO57 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_1}, /* GPIO58 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO59 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO60 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO61 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN , GPIO_SEL , GPIO_OUT_0}, /* GPIO62 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_SEL , GPIO_OUT_0}, /* GPIO63 Unselect via TraceSelect Bit */ \
+} \
+}
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ *----------------------------------------------------------------------*/
+#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/configs/mcc200.h b/include/configs/mcc200.h
index 621a81c..cc2dbcd 100644
--- a/include/configs/mcc200.h
+++ b/include/configs/mcc200.h
@@ -40,11 +40,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*
@@ -92,27 +87,37 @@
/* USB */
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
/* automatic software updates (see board/mcc200/auto_update.c) */
#define CONFIG_AUTO_UPDATE 1
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_USB_CMD | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_USB
+
+#undef CONFIG_CMD_NET
+
/*
* Autobooting
*/
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#define CONFIG_BOOTDELAY 1 /* autoboot after 1 second */
#define CONFIG_PREBOOT "echo;" \
"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
@@ -128,20 +133,30 @@
# define CFG__LINUX_CONSOLE "ttyS0"
#else
# define CFG__BOARDNAME "mcc200"
-# define CFG__LINUX_CONSOLE "ttyEU7"
+# define CFG__LINUX_CONSOLE "ttyEU5"
#endif
+/* Network */
+#define CONFIG_ETHADDR 00:17:17:ff:00:00
+#define CONFIG_IPADDR 10.76.9.29
+#define CONFIG_SERVERIP 10.76.9.1
+
+#include <version.h> /* For U-Boot version */
+
#define CONFIG_EXTRA_ENV_SETTINGS \
+ "ubootver=" U_BOOT_VERSION "\0" \
"netdev=eth0\0" \
"hostname=" CFG__BOARDNAME "\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
- "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "ramargs=setenv bootargs root=/dev/mtdblock2 " \
+ "rootfstype=cramfs\0" \
"addip=setenv bootargs ${bootargs} " \
"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
":${hostname}:${netdev}:off panic=1\0" \
"addcons=setenv bootargs ${bootargs} " \
- "console=${console},${baudrate}\0" \
+ "console=${console},${baudrate} " \
+ "ubootver=${ubootver} board=${board}\0" \
"flash_nfs=run nfsargs addip addcons;" \
"bootm ${kernel_addr}\0" \
"flash_self=run ramargs addip addcons;" \
@@ -153,6 +168,7 @@
"bootfile=/tftpboot/" CFG__BOARDNAME "/uImage\0" \
"load=tftp 200000 /tftpboot/" CFG__BOARDNAME "/u-boot.bin\0" \
"text_base=" MK_STR(TEXT_BASE) "\0" \
+ "kernel_addr=0xFC0C0000\0" \
"update=protect off ${text_base} +${filesize};" \
"era ${text_base} +${filesize};" \
"cp.b 200000 ${text_base} ${filesize}\0" \
@@ -169,7 +185,7 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
@@ -253,7 +269,7 @@
/*
* Ethernet configuration
*/
-#define CONFIG_MPC5xxx_FEC 1
+/*#define CONFIG_MPC5xxx_FEC 1*/
/*
* Define CONFIG_FEC_10MBIT to force FEC at 10Mb
*/
@@ -291,7 +307,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -307,6 +323,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
@@ -329,6 +350,13 @@
#define CFG_CS1_SIZE 0x00001000
#define CFG_CS1_CFG 0x1d300
+/* Leica - build revision resistors */
+/*
+#define CFG_CS3_START 0x80020000
+#define CFG_CS3_SIZE 0x00000004
+#define CFG_CS3_CFG 0x1d300
+*/
+
/*
* Select one of quarts as a default
* console. If undefined - PSC console
@@ -384,4 +412,8 @@
#define CONFIG_USB_CLOCK 0x0001BBBB
#define CONFIG_USB_CONFIG 0x00005000
+#define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */
+#define CONFIG_AUTOBOOT_STOP_STR "432"
+#define CONFIG_SILENT_CONSOLE 1
+
#endif /* __CONFIG_H */
diff --git a/include/configs/mecp5200.h b/include/configs/mecp5200.h
index 0c10294..49919fb 100644
--- a/include/configs/mecp5200.h
+++ b/include/configs/mecp5200.h
@@ -50,11 +50,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -88,26 +83,32 @@
/* USB */
#if 0
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_EXT2 | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_BSP | \
- CFG_CMD_ELF)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_ELF
+
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
@@ -258,7 +259,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -276,6 +277,11 @@
#define CFG_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/ml300.h b/include/configs/ml300.h
index 6762cd6..0183041 100644
--- a/include/configs/ml300.h
+++ b/include/configs/ml300.h
@@ -87,13 +87,28 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define REMOVE_COMMANDS (CFG_CMD_FLASH | CFG_CMD_LOADS | CFG_CMD_FAT | \
- CFG_CMD_IMLS )
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_NET) \
- & ~REMOVE_COMMANDS)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NET
+
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_FAT
+#undef CONFIG_CMD_IMLS
+
/* #define CONFIG_SYS_CLK_FREQ XPAR_CORE_CLOCK_FREQ_HZ */
/* 300000000 */
diff --git a/include/configs/ml401.h b/include/configs/ml401.h
index cb159e7..7eeae70 100644
--- a/include/configs/ml401.h
+++ b/include/configs/ml401.h
@@ -28,6 +28,7 @@
#include "../board/xilinx/ml401/xparameters.h"
#define CONFIG_MICROBLAZE 1 /* MicroBlaze CPU */
+#define MICROBLAZE_V5 1
#define CONFIG_ML401 1 /* ML401 Board */
/* uart */
@@ -36,11 +37,11 @@
#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
/* setting reset address */
-#define CFG_RESET_ADDRESS TEXT_BASE
+/*#define CFG_RESET_ADDRESS TEXT_BASE*/
/* ethernet */
#define CONFIG_EMACLITE 1
-#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES
+#define XPAR_EMAC_0_DEVICE_ID XPAR_OPB_ETHERNET_0_DEVICE_ID
/* gpio */
#define CFG_GPIO_0 1
@@ -58,6 +59,10 @@
#define FREQUENCE XILINX_CLOCK_FREQ
#define CFG_TIMER_0_PRELOAD ( FREQUENCE/1000 )
+/* FSL */
+#define CFG_FSL_2
+#define FSL_INTR_2 1
+
/*
* memory layout - Example
* TEXT_BASE = 0x1200_0000;
@@ -93,7 +98,8 @@
/* global pointer */
#define CFG_GBL_DATA_SIZE 0x1000 /* size of global data */
-#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE) /* start of global data */
+/* start of global data */
+#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_BASE + CFG_SDRAM_SIZE - CFG_GBL_DATA_SIZE)
/* monitor code */
#define SIZE 0x40000
@@ -117,6 +123,7 @@
#define CFG_FLASH_EMPTY_INFO 1 /* ?empty sector */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
+ #define CFG_FLASH_PROTECTION /* hardware flash protection */
#ifdef RAMENV
#define CFG_ENV_IS_NOWHERE 1
@@ -135,69 +142,62 @@
#define CFG_ENV_IS_NOWHERE 1
#define CFG_ENV_SIZE 0x1000
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
+ #define CFG_FLASH_PROTECTION /* hardware flash protection */
#endif /* !FLASH */
-#ifdef FLASH
- #ifdef RAMENV
- #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
- CFG_CMD_MEMORY |\
- CFG_CMD_MISC |\
- CFG_CMD_AUTOSCRIPT |\
- CFG_CMD_IRQ |\
- CFG_CMD_ASKENV |\
- CFG_CMD_BDI |\
- CFG_CMD_RUN |\
- CFG_CMD_LOADS |\
- CFG_CMD_LOADB |\
- CFG_CMD_IMI |\
- CFG_CMD_NET |\
- CFG_CMD_CACHE |\
- CFG_CMD_IMLS |\
- CFG_CMD_FLASH |\
- CFG_CMD_PING \
- )
- #else /* !RAMENV */
- #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
- CFG_CMD_MEMORY |\
- CFG_CMD_MISC |\
- CFG_CMD_AUTOSCRIPT |\
- CFG_CMD_IRQ |\
- CFG_CMD_ASKENV |\
- CFG_CMD_BDI |\
- CFG_CMD_RUN |\
- CFG_CMD_LOADS |\
- CFG_CMD_LOADB |\
- CFG_CMD_IMI |\
- CFG_CMD_NET |\
- CFG_CMD_CACHE |\
- CFG_CMD_IMLS |\
- CFG_CMD_FLASH |\
- CFG_CMD_PING |\
- CFG_CMD_ENV |\
- CFG_CMD_SAVES \
- )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_MFSL
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+
+#if defined(FLASH)
+ #define CONFIG_CMD_ECHO
+ #define CONFIG_CMD_FLASH
+ #define CONFIG_CMD_IMLS
+ #define CONFIG_CMD_JFFS2
+
+ #if !defined(RAMENV)
+ #define CONFIG_CMD_ENV
+ #define CONFIG_CMD_SAVES
#endif
+#endif
-#else /* !FLASH */
- #define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
- CFG_CMD_MEMORY |\
- CFG_CMD_MISC |\
- CFG_CMD_AUTOSCRIPT |\
- CFG_CMD_IRQ |\
- CFG_CMD_ASKENV |\
- CFG_CMD_BDI |\
- CFG_CMD_RUN |\
- CFG_CMD_LOADS |\
- CFG_CMD_LOADB |\
- CFG_CMD_IMI |\
- CFG_CMD_NET |\
- CFG_CMD_CACHE |\
- CFG_CMD_PING \
- )
-#endif /* !FLASH */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#if defined(CONFIG_CMD_JFFS2)
+/* JFFS2 partitions */
+#define CONFIG_JFFS2_CMDLINE /* mtdparts command line support */
+#define MTDIDS_DEFAULT "nor0=ml401-0"
+
+/* default mtd partition table */
+#define MTDPARTS_DEFAULT "mtdparts=ml401-0:256k(u-boot),"\
+ "256k(env),3m(kernel),1m(romfs),"\
+ "1m(cramfs),-(jffs2)"
+#endif
/* Miscellaneous configurable options */
#define CFG_PROMPT "U-Boot-mONStR> "
@@ -207,7 +207,7 @@
#define CFG_LONGHELP
#define CFG_LOAD_ADDR 0x12000000 /* default load address */
-#define CONFIG_BOOTDELAY 30
+#define CONFIG_BOOTDELAY 30
#define CONFIG_BOOTARGS "root=romfs"
#define CONFIG_HOSTNAME "ml401"
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
@@ -221,10 +221,19 @@
#define CFG_HZ 1000
/* system ace */
-/*#define CONFIG_SYSTEMACE
-#define DEBUG_SYSTEMACE
-#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
-#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
-#define CONFIG_DOS_PARTITION
-*/
+#define CONFIG_SYSTEMACE
+/* #define DEBUG_SYSTEMACE */
+#define SYSTEMACE_CONFIG_FPGA
+#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
+#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
+#define CONFIG_DOS_PARTITION
+
+#define CONFIG_PREBOOT "echo U-BOOT for ML401;setenv preboot;echo"
+
+#define CONFIG_EXTRA_ENV_SETTINGS "unlock=yes\0" /* hardware flash protection */\
+ "nor0=ml401-0\0"\
+ "mtdparts=mtdparts=ml401-0:"\
+ "256k(u-boot),256k(env),3m(kernel),"\
+ "1m(romfs),1m(cramfs),-(jffs2)\0"
+
#endif /* __CONFIG_H */
diff --git a/include/configs/modnet50.h b/include/configs/modnet50.h
index 2028767..4461bdf 100644
--- a/include/configs/modnet50.h
+++ b/include/configs/modnet50.h
@@ -63,12 +63,23 @@
#define CONFIG_BAUDRATE 38400
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT|CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_JFFS2))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
+
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_IPADDR 192.168.30.2
@@ -81,7 +92,7 @@
#define CONFIG_BOOTCOMMAND "bootm 0x10020000 0x100a0000"
#define CONFIG_BOOTARGS "console=ttyS0,38400 initrd=0x100a0040,530K root=/dev/ram keepinitrd"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/motionpro.h b/include/configs/motionpro.h
index 5328e8d..9a21632 100644
--- a/include/configs/motionpro.h
+++ b/include/configs/motionpro.h
@@ -26,12 +26,10 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-
/*
* High Level Configuration Options
*/
-
/* CPU and board */
#define CONFIG_MPC5xxx 1 /* This is an MPC5xxx CPU */
#define CONFIG_MPC5200 1 /* More exactly a MPC5200 */
@@ -39,21 +37,35 @@
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_ELF | \
- CFG_CMD_MII | \
- CFG_CMD_BEDBUG | \
- CFG_CMD_NET | \
- CFG_CMD_PING)
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_BEDBUG
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DTT
/*
@@ -71,7 +83,7 @@
#define CONFIG_MPC5xxx_FEC 1
#define CONFIG_PHY_ADDR 0x2
#define CONFIG_PHY_TYPE 0x79c874
-
+#define CONFIG_RESET_PHY_R 1
/*
* Autobooting
@@ -94,42 +106,51 @@
* Default environment settings
*/
#define CONFIG_EXTRA_ENV_SETTINGS \
- "sdram_test=0\0" \
"netdev=eth0\0" \
"hostname=motionpro\0" \
"netmask=255.255.0.0\0" \
"ipaddr=192.168.160.22\0" \
"serverip=192.168.1.1\0" \
"gatewayip=192.168.1.1\0" \
- "kernel_addr=200000\0" \
+ "console=ttyPSC0,115200\0" \
"u-boot_addr=100000\0" \
- "kernel_sector=20\0" \
- "kernel_size=1000\0" \
- "console=ttyS0,115200\0" \
+ "kernel_addr=200000\0" \
+ "fdt_addr=400000\0" \
+ "ramdisk_addr=500000\0" \
+ "multi_image_addr=800000\0" \
"rootpath=/opt/eldk-4.1/ppc_6xx\0" \
- "bootfile=/tftpboot/motionpro/uImage\0" \
"u-boot=/tftpboot/motionpro/u-boot.bin\0" \
- "load=tftp $(u-boot_addr) $(u-boot)\0" \
+ "bootfile=/tftpboot/motionpro/uImage\0" \
+ "fdt_file=/tftpboot/motionpro/motionpro.dtb\0" \
+ "ramdisk_file=/tftpboot/motionpro/uRamdisk\0" \
+ "multi_image_file=kernel+initrd+dtb.img\0" \
+ "load=tftp ${u-boot_addr} ${u-boot}\0" \
"update=prot off fff00000 fff3ffff; era fff00000 fff3ffff; " \
- "cp.b $(u-boot_addr) fff00000 $(filesize);" \
+ "cp.b ${u-boot_addr} fff00000 ${filesize};" \
"prot on fff00000 fff3ffff\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
- "addip=setenv bootargs $(bootargs) console=$(console) " \
- "ip=$(ipaddr):$(serverip):$(gatewayip):" \
- "$(netmask):$(hostname):$(netdev):off panic=1\0" \
- "flash_nfs=run nfsargs addip;bootm $(kernel_addr)\0" \
- "flash_self=run ramargs addip;bootm $(kernel_addr) " \
- "$(ramdisk_addr)\0" \
- "net_nfs=tftp $(kernel_addr) $(bootfile); run nfsargs addip; " \
- "bootm $(kernel_addr)\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
- "nfsroot=$(serverip):$(rootpath)\0" \
- "fstype=ext3\0" \
- "fatargs=setenv bootargs init=/linuxrc rw\0" \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "fat_args=setenv bootargs rw\0" \
+ "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:" \
+ "${netmask}:${hostname}:${netdev}:off panic=1 " \
+ "console=${console}\0" \
+ "net_nfs=tftp ${kernel_addr} ${bootfile}; " \
+ "tftp ${fdt_addr} ${fdt_file}; run nfsargs addip; " \
+ "bootm ${kernel_addr} - ${fdt_addr}\0" \
+ "net_self=tftp ${kernel_addr} ${bootfile}; " \
+ "tftp ${fdt_addr} ${fdt_file}; " \
+ "tftp ${ramdisk_addr} ${ramdisk_file}; " \
+ "run ramargs addip; " \
+ "bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
+ "fat_multi=run fat_args addip; fatload ide 0:1 " \
+ "${multi_image_addr} ${multi_image_file}; " \
+ "bootm ${multi_image_addr}\0" \
""
#define CONFIG_BOOTCOMMAND "run net_nfs"
-
/*
* do board-specific init
*/
@@ -148,6 +169,12 @@
/*
+ * Set IPB speed to 100MHz
+ */
+#define CFG_IPBCLK_EQUALS_XLBCLK
+
+
+/*
* Memory map
*/
/*
@@ -243,6 +270,84 @@
#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
#define CONFIG_FLASH_16BIT /* Flash is 16-bit */
+/*
+ * MTD configuration
+ */
+#define CONFIG_JFFS2_CMDLINE
+#define MTDIDS_DEFAULT "nor0=motionpro-0"
+#define MTDPARTS_DEFAULT "mtdparts=motionpro-0:" \
+ "13m(fs),2m(kernel),256k(uboot)," \
+ "64k(env),64k(redund_env),64k(dtb)," \
+ "-(user_data)"
+
+/*
+ * IDE/ATA configuration
+ */
+#define CFG_ATA_BASE_ADDR MPC5XXX_ATA
+#define CFG_IDE_MAXBUS 1
+#define CFG_IDE_MAXDEVICE 1
+#define CONFIG_IDE_PREINIT
+
+#define CFG_ATA_DATA_OFFSET 0x0060
+#define CFG_ATA_REG_OFFSET CFG_ATA_DATA_OFFSET
+#define CFG_ATA_STRIDE 4
+#define CONFIG_DOS_PARTITION
+
+
+/*
+ * I2C configuration
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#define CFG_I2C_MODULE 2 /* select I2C module #2 */
+#define CFG_I2C_SPEED 100000 /* 100 kHz */
+#define CFG_I2C_SLAVE 0x7F
+
+
+/*
+ * EEPROM configuration
+ */
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* DTT driver needs this */
+#define CFG_EEPROM_PAGE_WRITE_BITS 1 /* 2 bytes per write cycle */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 5 /* 2ms/cycle + 3ms extra */
+#define CFG_I2C_MULTI_EEPROMS 1 /* 2 EEPROMs (addr:50,52) */
+
+
+/*
+ * RTC configuration
+ */
+#define CONFIG_RTC_DS1337 1
+#define CFG_I2C_RTC_ADDR 0x68
+
+
+/*
+ * Status LED configuration
+ */
+#define CONFIG_STATUS_LED /* Status LED enabled */
+#define CONFIG_BOARD_SPECIFIC_LED
+
+#define ENABLE_GPIO_OUT 0x00000024
+#define LED_ON 0x00000010
+
+#ifndef __ASSEMBLY__
+/*
+ * In case of Motion-PRO, a LED is identified by its corresponding
+ * GPT Enable and Mode Select Register.
+ */
+typedef volatile unsigned long * led_id_t;
+
+extern void __led_init(led_id_t id, int state);
+extern void __led_toggle(led_id_t id);
+extern void __led_set(led_id_t id, int state);
+#endif /* __ASSEMBLY__ */
+
+
+/*
+ * Temperature sensor
+ */
+#define CONFIG_DTT_LM75 1
+#define CONFIG_DTT_SENSORS { 0x49 }
+
/*
* Environment settings
@@ -253,6 +358,9 @@
#define CFG_ENV_SIZE 0x1000
#define CFG_ENV_SECT_SIZE 0x10000
+/* Configuration of redundant environment */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR + CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
/*
* Pin multiplexing configuration
@@ -270,11 +378,17 @@
/*
+ * Motion-PRO's CPLD revision control register
+ */
+#define CPLD_REV_REGISTER (CFG_CS2_START + 0x06)
+
+
+/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
#define CFG_MAXARGS 16 /* max number of command args */
#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
@@ -302,4 +416,13 @@
/* Not needed for MPC 5xxx U-Boot, but used by tools/updater */
#define CFG_RESET_ADDRESS 0xfff00100
+/* pass open firmware flat tree */
+#define CONFIG_OF_LIBFDT 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,5200@0"
+#define OF_SOC "soc5200@f0000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc5200@f0000000/serial@2000"
+
#endif /* __CONFIG_H */
diff --git a/include/configs/mp2usb.h b/include/configs/mp2usb.h
index 04f1f24..ea5a44b 100644
--- a/include/configs/mp2usb.h
+++ b/include/configs/mp2usb.h
@@ -101,12 +101,18 @@
#undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */
-#define CONFIG_USB_OHCI 1
+#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_KEYBOARD 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
#define CONFIG_AT91C_PQFP_UHPBUG 1
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT 1
+#define CFG_USB_OHCI_REGS_BASE AT91_USB_HOST_BASE
+#define CFG_USB_OHCI_SLOT_NAME "at91rm9200"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
#undef CONFIG_HARD_I2C
#ifdef CONFIG_HARD_I2C
@@ -123,40 +129,56 @@
#define CONFIG_BOOTDELAY 3
-#ifdef CONFIG_HARD_I2C
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP | \
- CFG_CMD_MISC))
-#else
-#define CONFIG_COMMANDS \
- ((CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP | \
- CFG_CMD_USB | \
- CFG_CMD_CACHE) & \
- ~(CFG_CMD_BDI | \
- CFG_CMD_IMI | \
- CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_FPGA | \
- CFG_CMD_MISC | \
- CFG_CMD_LOADS ))
+#if !defined(CONFIG_HARD_I2C)
#define CONFIG_TIMESTAMP
#endif
-#define CFG_LONGHELP
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
+#if defined(CONFIG_HARD_I2C)
+
+ #define CONFIG_CMD_DATE
+ #define CONFIG_CMD_EEPROM
+ #define CONFIG_CMD_I2C
+ #define CONFIG_CMD_MISC
+
+#else
+
+ #define CONFIG_CMD_USB
+ #define CONFIG_CMD_CACHE
+
+ #undef CONFIG_CMD_AUTOSCRIPT
+ #undef CONFIG_CMD_BDI
+ #undef CONFIG_CMD_FPGA
+ #undef CONFIG_CMD_IMI
+ #undef CONFIG_CMD_LOADS
+ #undef CONFIG_CMD_MISC
+
+#endif
+
+
+#define CFG_LONGHELP
#define CONFIG_NR_DRAM_BANKS 1
#define PHYS_SDRAM 0x20000000
-#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
+#define PHYS_SDRAM_SIZE 0x08000000 /* 128 megs */
#define CFG_MEMTEST_START PHYS_SDRAM
#define CFG_MEMTEST_END CFG_MEMTEST_START + PHYS_SDRAM_SIZE - 262144
diff --git a/include/configs/mpc7448hpc2.h b/include/configs/mpc7448hpc2.h
index 243a3f6..bd3107a 100644
--- a/include/configs/mpc7448hpc2.h
+++ b/include/configs/mpc7448hpc2.h
@@ -80,9 +80,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,7448@0"
#define OF_TSI "tsi108@c0000000"
#define OF_TBCLK (bd->bi_busfreq / 8)
@@ -146,25 +143,34 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_CACHE \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C \
- | CFG_CMD_SDRAM \
- | CFG_CMD_EEPROM \
- | CFG_CMD_FLASH \
- | CFG_CMD_ENV \
- | CFG_CMD_BSP \
- | CFG_CMD_DHCP \
- | CFG_CMD_PING \
- | CFG_CMD_DATE)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DATE
+
/*set date in u-boot*/
#define CONFIG_RTC_M48T35A
@@ -182,7 +188,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */
#else
@@ -366,9 +372,9 @@
/*-----------------------------------------------------------------------
* FLASH organization
*/
-#define CFG_MAX_FLASH_BANKS 1/* Flash can be at one of two addresses */
+#define CFG_MAX_FLASH_BANKS 1 /* Flash can be at one of two addresses */
#define FLASH_BANK_SIZE 0x01000000 /* 16 MB Total */
-#define CFG_FLASH_BANKS_LIST {CFG_FLASH_BASE, CFG_FLASH_BASE2}
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE, /* CFG_FLASH_BASE2 */ }
#define CFG_FLASH_CFI_DRIVER
#define CFG_FLASH_CFI
@@ -387,7 +393,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/mx1ads.h b/include/configs/mx1ads.h
index 7f3dfd5..5125b21 100644
--- a/include/configs/mx1ads.h
+++ b/include/configs/mx1ads.h
@@ -78,25 +78,32 @@
#define CONFIG_BAUDRATE 115200
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- CFG_CMD_REGINFO | \
- CFG_CMD_ELF)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_ELF
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=/dev/msdk mem=48M"
#define CONFIG_BOOTFILE "mx1ads"
#define CONFIG_BOOTCOMMAND "tftp; bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/mx1fs2.h b/include/configs/mx1fs2.h
index 9816be8..d527d09 100644
--- a/include/configs/mx1fs2.h
+++ b/include/configs/mx1fs2.h
@@ -34,22 +34,30 @@
#undef _CONFIG_UART4 /* internal uart 4 */
#undef CONFIG_SILENT_CONSOLE /* use this to disable output */
-/*
- * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
- * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
- * functionality or size of u-boot code.
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- & ~CFG_CMD_LOADS \
- & ~CFG_CMD_CONSOLE \
- & ~CFG_CMD_AUTOSCRIPT \
- & ~CFG_CMD_NET \
- & ~CFG_CMD_PING \
- & ~CFG_CMD_DHCP \
- | CFG_CMD_JFFS2 \
- )
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_CONSOLE
+#undef CONFIG_CMD_AUTOSCRIPT
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_PING
+#undef CONFIG_CMD_DHCP
+
/*
* Boot options. Setting delay to -1 stops autostart count down.
@@ -160,7 +168,7 @@
* Right now there is no gain for user, but later on booting kernel might be
* possible. Consider using XIP kernel running from flash to save RAM
* footprint.
- * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support.
+ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
*/
/*
diff --git a/include/configs/netstar.h b/include/configs/netstar.h
index 697796a..33159d3 100644
--- a/include/configs/netstar.h
+++ b/include/configs/netstar.h
@@ -140,43 +140,38 @@
#define MTDIDS_DEFAULT "nor0=omapflash.0,nand0=omapnand.0"
#define MTDPARTS_DEFAULT "mtdparts=omapflash.0:8k@16k(env),8k(r_env),448k@576k(u-boot);omapnand.0:48M(rootfs0),48M(rootfs1),-(data)"
-#if 0
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_BOOTD | \
- CFG_CMD_DHCP | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_IMI | \
- CFG_CMD_LOADB | \
- CFG_CMD_NET | \
- CFG_CMD_MEMORY | \
- CFG_CMD_PING | \
- CFG_CMD_RUN)
-#else
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_BOOTD | \
- CFG_CMD_DHCP | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_NAND | \
- CFG_CMD_IMI | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_LOADB | \
- CFG_CMD_NET | \
- CFG_CMD_MEMORY | \
- CFG_CMD_PING | \
- CFG_CMD_RUN)
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+
#define CONFIG_JFFS2_NAND 1 /* jffs2 on nand support */
-#endif
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
#define CONFIG_LOOPW
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_BOOTDELAY 3
#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
#undef CONFIG_BOOTARGS /* the boot command will set bootargs*/
diff --git a/include/configs/ns9750dev.h b/include/configs/ns9750dev.h
index 0b1541d..1d691f9 100644
--- a/include/configs/ns9750dev.h
+++ b/include/configs/ns9750dev.h
@@ -69,33 +69,28 @@
#define CONFIG_BAUDRATE 38400
-/***********************************************************
- * Command definition
- ***********************************************************/
-#if 0 /* @TODO */
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- /*CFG_CMD_NAND |*/ \
- /*CFG_CMD_EEPROM |*/ \
- /*CFG_CMD_I2C |*/ \
- /*CFG_CMD_USB |*/ \
- CFG_CMD_REGINFO | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF)
-#else
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_BDI | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_CONSOLE | \
- CFG_CMD_LOADB | \
- CFG_CMD_LOADS | \
- CFG_CMD_MEMORY)
-#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+
#define CONFIG_BOOTDELAY 3
/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
@@ -108,7 +103,7 @@
/*#define CONFIG_BOOTFILE "elinos-lart" */
/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/o2dnt.h b/include/configs/o2dnt.h
index 5c05a74..f1d73e4 100644
--- a/include/configs/o2dnt.h
+++ b/include/configs/o2dnt.h
@@ -37,11 +37,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -73,8 +68,6 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
-#define ADD_PCI_CMD CFG_CMD_PCI
-
/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -82,20 +75,29 @@
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- ADD_PCI_CMD )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_PCI
+
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
@@ -137,17 +139,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
#endif
@@ -246,7 +248,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -262,6 +264,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
@@ -276,7 +283,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
/*
* For 66 MHz PCI clock additional Wait State is needed for CS0 (flash).
*/
diff --git a/include/configs/ocotea.h b/include/configs/ocotea.h
index fe4e638..bc2fd33 100644
--- a/include/configs/ocotea.h
+++ b/include/configs/ocotea.h
@@ -41,6 +41,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_OCOTEA 1 /* Board is ebony */
#define CONFIG_440GX 1 /* Specifc GX support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
#undef CFG_DRAM_TEST /* Disable-takes long time! */
@@ -136,7 +137,7 @@
#define CFG_FLASH_WORD_SIZE unsigned char
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
@@ -231,26 +232,38 @@
#define CONFIG_NETCONSOLE /* include NetConsole support */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -259,7 +272,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -293,7 +306,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
@@ -310,7 +322,7 @@
*/
#define CFG_DCACHE_SIZE 32768 /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -322,7 +334,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/omap1510inn.h b/include/configs/omap1510inn.h
index 016d3d8..8623ed3 100644
--- a/include/configs/omap1510inn.h
+++ b/include/configs/omap1510inn.h
@@ -86,11 +86,24 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
#include <configs/omap1510.h>
#define CONFIG_BOOTDELAY 3
@@ -98,7 +111,7 @@
#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
#define CFG_AUTOLOAD "n" /* No autoload */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/omap1610h2.h b/include/configs/omap1610h2.h
index c6ca689..74bba05 100644
--- a/include/configs/omap1610h2.h
+++ b/include/configs/omap1610h2.h
@@ -81,11 +81,24 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
#include <configs/omap1510.h>
#define CONFIG_BOOTDELAY 3
@@ -93,7 +106,7 @@
#define CONFIG_BOOTCOMMAND "bootp;tftp;bootm"
#define CFG_AUTOLOAD "n" /* No autoload */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
#endif
diff --git a/include/configs/omap1610inn.h b/include/configs/omap1610inn.h
index f28ede0..734f354 100644
--- a/include/configs/omap1610inn.h
+++ b/include/configs/omap1610inn.h
@@ -82,11 +82,24 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
#include <configs/omap1510.h>
#define CONFIG_BOOTDELAY 3
@@ -98,7 +111,7 @@
#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
#define CONFIG_BOOTFILE "uImage" /* file to load */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
#endif
diff --git a/include/configs/omap2420h4.h b/include/configs/omap2420h4.h
index 5837461..8ae8efe 100644
--- a/include/configs/omap2420h4.h
+++ b/include/configs/omap2420h4.h
@@ -119,15 +119,34 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE {9600, 19200, 38400, 57600, 115200}
-#ifdef CFG_NAND_BOOT
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_NAND | CFG_CMD_JFFS2)
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_I2C | CFG_CMD_JFFS2) & ~CFG_CMD_AUTOSCRIPT)
-#endif
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#ifdef CFG_NAND_BOOT
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_I2C
+ #define CONFIG_CMD_NAND
+ #define CONFIG_CMD_JFFS2
+#else
+ #define CONFIG_CMD_DHCP
+ #define CONFIG_CMD_I2C
+ #define CONFIG_CMD_JFFS2
+
+ #undef CONFIG_CMD_AUTOSCRIPT
+#endif
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
/*
* Board NAND Info.
diff --git a/include/configs/omap5912osk.h b/include/configs/omap5912osk.h
index 5db4f52..16ce2f6 100644
--- a/include/configs/omap5912osk.h
+++ b/include/configs/omap5912osk.h
@@ -86,11 +86,24 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
#include <configs/omap1510.h>
#define CONFIG_BOOTDELAY 3
@@ -102,7 +115,7 @@
#define CONFIG_SERVERIP 156.117.97.139 /* current IP of my dev pc */
#define CONFIG_BOOTFILE "uImage" /* file to load */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
#endif
diff --git a/include/configs/omap730p2.h b/include/configs/omap730p2.h
index fda55cf..c4d253a 100644
--- a/include/configs/omap730p2.h
+++ b/include/configs/omap730p2.h
@@ -90,14 +90,24 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_DHCP)
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
/*
- * This must be included AFTER the definition of CONFIG_COMMANDS (if any)
+ * Command line configuration.
*/
+#include <config_cmd_default.h>
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_DHCP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
#include <configs/omap730.h>
#include <configs/h2_p2_dbg_board.h>
@@ -112,7 +122,7 @@
#define CONFIG_SERVERIP 192.150.0.100
#define CONFIG_BOOTFILE "uImage" /* File to load */
-#if defined (CONFIG_COMMANDS) && defined (CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* Speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 1 /* Which serial port to use */
#endif
diff --git a/include/configs/p3mx.h b/include/configs/p3mx.h
index 54462f0..bec442d 100644
--- a/include/configs/p3mx.h
+++ b/include/configs/p3mx.h
@@ -60,7 +60,6 @@
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_BOARD_EARLY_INIT_R 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r() */
-#define CONFIG_ADD_RAM_INFO 1 /* Print additional info */
/*-----------------------------------------------------------------------
* Base addresses -- Note these are effective addresses where the
@@ -251,26 +250,36 @@
#endif
#define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_PCI | \
- CFG_CMD_CACHE | \
- CFG_CMD_SDRAM)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_SDRAM
+
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
@@ -280,7 +289,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -421,7 +430,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For all MPC74xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/p3p440.h b/include/configs/p3p440.h
index aa0901f..51f19a1 100644
--- a/include/configs/p3p440.h
+++ b/include/configs/p3p440.h
@@ -35,6 +35,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_P3P440 1 /* Board is P3P440 */
#define CONFIG_440GP 1 /* Specifc GP support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
@@ -167,25 +168,37 @@
#define CONFIG_NETCONSOLE /* include NetConsole support */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_SNTP
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -194,7 +207,7 @@
*----------------------------------------------------------------------*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -226,7 +239,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#define CONFIG_DISABLE_PISE_TEST /* disable PISE test (PCIX only)*/
@@ -285,7 +297,7 @@
#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
-#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
@@ -304,7 +316,7 @@
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -316,7 +328,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/pb1x00.h b/include/configs/pb1x00.h
index ed1893f..810e0f0 100644
--- a/include/configs/pb1x00.h
+++ b/include/configs/pb1x00.h
@@ -132,11 +132,8 @@
/*---USB -------------------------------------------*/
#if 0
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
#define CONFIG_DOS_PARTITION
-#else
-#define ADD_USB_CMD 0
#endif
/*---ATA PCMCIA ------------------------------------*/
@@ -179,11 +176,36 @@
#define CFG_ICACHE_SIZE 16384
#define CFG_CACHELINE_SIZE 32
-#define CONFIG_COMMANDS \
- (((CONFIG_CMD_DFL | CFG_CMD_DHCP | CFG_CMD_ELF | CFG_CMD_MII | CFG_CMD_PING) & \
- ~(CFG_CMD_ENV | CFG_CMD_FAT | CFG_CMD_FLASH | CFG_CMD_FPGA | CFG_CMD_IDE | \
- CFG_CMD_LOADS | CFG_CMD_RUN | CFG_CMD_LOADB | CFG_CMD_ELF | \
- CFG_CMD_BDI | CFG_CMD_BEDBUG)) | ADD_USB_CMD)
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
+#undef CONFIG_CMD_ENV
+#undef CONFIG_CMD_FAT
+#undef CONFIG_CMD_FLASH
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_IDE
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_RUN
+#undef CONFIG_CMD_LOADB
+#undef CONFIG_CMD_ELF
+#undef CONFIG_CMD_BDI
+#undef CONFIG_CMD_BEDBUG
#endif /* __CONFIG_H */
diff --git a/include/configs/pcs440ep.h b/include/configs/pcs440ep.h
index 23bdfc8..7653ba1 100644
--- a/include/configs/pcs440ep.h
+++ b/include/configs/pcs440ep.h
@@ -32,6 +32,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_PCS440EP 1 /* Board is PCS440EP */
#define CONFIG_440EP 1 /* Specific PPC440EP support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
@@ -103,21 +104,28 @@
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+#define CONFIG_ENV_OVERWRITE 1
/* Address and size of Redundant Environment Sector */
#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif /* CFG_ENV_IS_IN_FLASH */
+#define ENV_NAME_REVLEV "revision_level"
+#define ENV_NAME_SOLDER "solder_switch"
+#define ENV_NAME_DIP "dip"
+
/*-----------------------------------------------------------------------
* DDR SDRAM
*----------------------------------------------------------------------*/
#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for setup */
#undef CONFIG_DDR_ECC /* don't use ECC */
#define SPD_EEPROM_ADDRESS {0x50}
+#define CONFIG_PROG_SDRAM_TLB 1
/*-----------------------------------------------------------------------
* I2C
@@ -142,6 +150,8 @@
#define CONFIG_EXTRA_ENV_SETTINGS \
"netdev=eth0\0" \
"hostname=pcs440ep\0" \
+ "use_eeprom_ethaddr=default\0" \
+ "cs_test=off\0" \
"nfsargs=setenv bootargs root=/dev/nfs rw " \
"nfsroot=${serverip}:${rootpath}\0" \
"ramargs=setenv bootargs root=/dev/ram rw\0" \
@@ -172,6 +182,36 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
#endif
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+/* check U-Boot image with SHA1 sum */
+#define CONFIG_SHA1_CHECK_UB_IMG 1
+#define CONFIG_SHA1_START CFG_MONITOR_BASE
+#define CONFIG_SHA1_LEN CFG_MONITOR_LEN
+
+/*-----------------------------------------------------------------------
+ * Definitions for status LED
+ */
+#define CONFIG_STATUS_LED 1 /* Status LED enabled */
+#define CONFIG_BOARD_SPECIFIC_LED 1
+
+#define STATUS_LED_BIT 0x08 /* DIAG1 is on GPIO_PPC_1 */
+#define STATUS_LED_PERIOD ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE STATUS_LED_OFF
+#define STATUS_LED_BIT1 0x04 /* DIAG2 is on GPIO_PPC_2 */
+#define STATUS_LED_PERIOD1 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE1 STATUS_LED_ON
+#define STATUS_LED_BIT2 0x02 /* DIAG3 is on GPIO_PPC_3 */
+#define STATUS_LED_PERIOD2 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE2 STATUS_LED_OFF
+#define STATUS_LED_BIT3 0x01 /* DIAG4 is on GPIO_PPC_4 */
+#define STATUS_LED_PERIOD3 ((CFG_HZ / 2) / 5) /* blink at 5 Hz */
+#define STATUS_LED_STATE3 STATUS_LED_OFF
+
+#define CONFIG_SHOW_BOOT_PROGRESS 1
+
#define CONFIG_BAUDRATE 115200
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
@@ -207,37 +247,48 @@
#define CONFIG_HW_WATCHDOG /* watchdog */
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_EXT2 | \
- CFG_CMD_FAT | \
- CFG_CMD_USB )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_REISER
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_USB
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -266,7 +317,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT
#define CFG_PCI_MASTER_INIT
@@ -315,76 +365,76 @@
/*-----------------------------------------------------------------------
* PPC440 GPIO Configuration
*/
-#define CFG_440_GPIO_TABLE { /* GPIO Alternate1 Alternate2 Alternate3 */ \
+#define CFG_440_GPIO_TABLE { /* Out GPIO Alternate1 Alternate2 Alternate3 */ \
{ \
/* GPIO Core 0 */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO0 EBC_ADDR(7) DMA_REQ(2) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO1 EBC_ADDR(6) DMA_ACK(2) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO2 EBC_ADDR(5) DMA_EOT/TC(2) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO3 EBC_ADDR(4) DMA_REQ(3) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO4 EBC_ADDR(3) DMA_ACK(3) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO5 EBC_ADDR(2) DMA_EOT/TC(3) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO6 EBC_CS_N(1) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO7 EBC_CS_N(2) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO8 EBC_CS_N(3) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO9 EBC_CS_N(4) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO10 EBC_CS_N(5) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_SEL }, /* GPIO11 EBC_BUS_ERR */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO12 ZII_p0Rxd(0) */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO13 ZII_p0Rxd(1) */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO14 ZII_p0Rxd(2) */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO15 ZII_p0Rxd(3) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO16 ZII_p0Txd(0) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO17 ZII_p0Txd(1) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO18 ZII_p0Txd(2) */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO19 ZII_p0Txd(3) */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO20 ZII_p0Rx_er */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO21 ZII_p0Rx_dv */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO22 ZII_p0RxCrs */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO23 ZII_p0Tx_er */ \
-{ GPIO0_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO24 ZII_p0Tx_en */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO25 ZII_p0Col */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO26 USB2D_RXVALID */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO27 EXT_EBC_REQ USB2D_RXERROR */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO28 USB2D_TXVALID */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO29 EBC_EXT_HDLA USB2D_PAD_SUSPNDM */ \
-{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO30 EBC_EXT_ACK USB2D_XCVRSELECT*/ \
-{ GPIO0_BASE, GPIO_IN, GPIO_SEL }, /* GPIO31 EBC_EXR_BUSREQ USB2D_TERMSELECT*/ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO0 EBC_ADDR(7) DMA_REQ(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO1 EBC_ADDR(6) DMA_ACK(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO2 EBC_ADDR(5) DMA_EOT/TC(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO3 EBC_ADDR(4) DMA_REQ(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO4 EBC_ADDR(3) DMA_ACK(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO5 EBC_ADDR(2) DMA_EOT/TC(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO6 EBC_CS_N(1) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO7 EBC_CS_N(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO8 EBC_CS_N(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO9 EBC_CS_N(4) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO10 EBC_CS_N(5) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO11 EBC_BUS_ERR */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO12 ZII_p0Rxd(0) */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO13 ZII_p0Rxd(1) */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO14 ZII_p0Rxd(2) */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO15 ZII_p0Rxd(3) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO16 ZII_p0Txd(0) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO17 ZII_p0Txd(1) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO18 ZII_p0Txd(2) */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO19 ZII_p0Txd(3) */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO20 ZII_p0Rx_er */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO21 ZII_p0Rx_dv */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO22 ZII_p0RxCrs */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO23 ZII_p0Tx_er */ \
+{GPIO0_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO24 ZII_p0Tx_en */ \
+{GPIO0_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO25 ZII_p0Col */ \
+{GPIO0_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO26 USB2D_RXVALID */ \
+{GPIO0_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO27 EXT_EBC_REQ USB2D_RXERROR */ \
+{GPIO0_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO28 USB2D_TXVALID */ \
+{GPIO0_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO29 EBC_EXT_HDLA USB2D_PAD_SUSPNDM */ \
+{GPIO0_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO30 EBC_EXT_ACK USB2D_XCVRSELECT*/ \
+{GPIO0_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO31 EBC_EXR_BUSREQ USB2D_TERMSELECT*/ \
}, \
{ \
/* GPIO Core 1 */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO32 USB2D_OPMODE0 */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO33 USB2D_OPMODE1 */ \
-{ GPIO1_BASE, GPIO_OUT, GPIO_ALT3 }, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT3 }, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO36 UART0_8PIN_CTS_N UART3_SIN*/ \
-{ GPIO1_BASE, GPIO_OUT, GPIO_ALT1 }, /* GPIO37 UART0_RTS_N */ \
-{ GPIO1_BASE, GPIO_OUT, GPIO_ALT2 }, /* GPIO38 UART0_DTR_N UART1_SOUT */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT2 }, /* GPIO39 UART0_RI_N UART1_SIN */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO40 UIC_IRQ(0) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO41 UIC_IRQ(1) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO42 UIC_IRQ(2) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO43 UIC_IRQ(3) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_ALT1 }, /* GPIO44 UIC_IRQ(4) DMA_ACK(1) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO45 UIC_IRQ(6) DMA_EOT/TC(1) */ \
-{ GPIO1_BASE, GPIO_BI, GPIO_SEL }, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO49 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO50 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO51 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO52 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO53 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO54 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO55 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO56 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO57 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO58 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO59 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO60 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO61 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO62 Unselect via TraceSelect Bit */ \
-{ GPIO1_BASE, GPIO_IN, GPIO_SEL }, /* GPIO63 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO32 USB2D_OPMODE0 */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO33 USB2D_OPMODE1 */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT3, GPIO_OUT_NO_CHG}, /* GPIO34 UART0_DCD_N UART1_DSR_CTS_N UART2_SOUT*/ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT3, GPIO_OUT_NO_CHG}, /* GPIO35 UART0_8PIN_DSR_N UART1_RTS_DTR_N UART2_SIN*/ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO36 UART0_8PIN_CTS_N UART3_SIN*/ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO37 UART0_RTS_N */ \
+{GPIO1_BASE, GPIO_OUT, GPIO_ALT2, GPIO_OUT_NO_CHG}, /* GPIO38 UART0_DTR_N UART1_SOUT */ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT2, GPIO_OUT_NO_CHG}, /* GPIO39 UART0_RI_N UART1_SIN */ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO40 UIC_IRQ(0) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO41 UIC_IRQ(1) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO42 UIC_IRQ(2) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO43 UIC_IRQ(3) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG}, /* GPIO44 UIC_IRQ(4) DMA_ACK(1) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO45 UIC_IRQ(6) DMA_EOT/TC(1) */ \
+{GPIO1_BASE, GPIO_BI, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO46 UIC_IRQ(7) DMA_REQ(0) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO47 UIC_IRQ(8) DMA_ACK(0) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO48 UIC_IRQ(9) DMA_EOT/TC(0) */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO49 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO50 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO51 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO52 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO53 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO54 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO55 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO56 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO57 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO58 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO59 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO60 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO61 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO62 Unselect via TraceSelect Bit */ \
+{GPIO1_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG}, /* GPIO63 Unselect via TraceSelect Bit */ \
} \
}
@@ -393,7 +443,7 @@
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -405,9 +455,38 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
+/*-----------------------------------------------------------------------
+ * IDE/ATA stuff Supports IDE harddisk
+ *-----------------------------------------------------------------------
+ */
+
+#undef CONFIG_IDE_8xx_PCCARD /* Use IDE with PC Card Adapter */
+
+#undef CONFIG_IDE_8xx_DIRECT /* Direct IDE not supported */
+#undef CONFIG_IDE_LED /* LED for ide not supported */
+
+#define CFG_IDE_MAXBUS 1 /* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus */
+
+#define CONFIG_IDE_PREINIT 1
+#define CONFIG_IDE_RESET 1
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR CFG_CF1
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET 0
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET (CFG_ATA_DATA_OFFSET)
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET (0x0000)
+
#endif /* __CONFIG_H */
diff --git a/include/configs/pcu_e.h b/include/configs/pcu_e.h
index 73aa3a8..e3c8843 100644
--- a/include/configs/pcu_e.h
+++ b/include/configs/pcu_e.h
@@ -89,28 +89,34 @@
* ---------------------------------------------------------------- */
#define CFG_SPI_INIT_OFFSET 0xB00
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#define CONFIG_BOOTP_MASK \
- ((CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) & ~CONFIG_BOOTP_GATEWAY)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-/*----------------------------------------------------------------------*/
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/pdnb3.h b/include/configs/pdnb3.h
index 06c6652..5b5b0ef 100644
--- a/include/configs/pdnb3.h
+++ b/include/configs/pdnb3.h
@@ -71,25 +71,33 @@
#define CONFIG_BAUDRATE 115200
#define CFG_IXP425_CONSOLE IXP425_UART1 /* we use UART1 for console */
-#if defined(CONFIG_SCPU)
-#define CMD_NAND_ADD 0
-#else
-#define CMD_NAND_ADD CFG_CMD_NAND
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_PING
+
+#if !defined(CONFIG_SCPU)
+#define CONFIG_CMD_NAND
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DHCP | \
- CFG_CMD_DATE | \
- CFG_CMD_NET | \
- CFG_CMD_MII | \
- CMD_NAND_ADD | \
- CFG_CMD_I2C | \
- CFG_CMD_ELF | \
- CFG_CMD_PING)
-
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-/* These are u-boot generic parameters */
-#include <cmd_confdefs.h>
#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
diff --git a/include/configs/pf5200.h b/include/configs/pf5200.h
index fefdb3c..18d0c87 100644
--- a/include/configs/pf5200.h
+++ b/include/configs/pf5200.h
@@ -49,11 +49,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -90,13 +85,6 @@
#define CFG_RX_ETH_BUFFER 8 /* use 8 rx buffer on eepro100 */
#define CONFIG_NS8382X 1
#endif
-
-#define ADD_PCI_CMD CFG_CMD_PCI
-
-#else /* MPC5100 */
-
-#define ADD_PCI_CMD 0 /* no CFG_CMD_PCI */
-
#endif
/* Partitions */
@@ -106,26 +94,35 @@
/* USB */
#if 0
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_EEPROM | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_BSP | \
- CFG_CMD_ELF | \
- ADD_PCI_CMD )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+
+#ifdef CONFIG_MPC5200
+#define CONFIG_CMD_PCI
+#endif
+
#if (TEXT_BASE == 0xFF000000) /* Boot low with 16 MB Flash */
# define CFG_LOWBOOT 1
@@ -171,7 +168,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
* I2C configuration
@@ -263,7 +260,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -281,6 +278,11 @@
#define CFG_VXWORKS_MAC_PTR 0x00000000 /* Pass Ethernet MAC to VxWorks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/pleb2.h b/include/configs/pleb2.h
index a6c2371..863029d 100644
--- a/include/configs/pleb2.h
+++ b/include/configs/pleb2.h
@@ -66,10 +66,23 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_NET)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_NET
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
@@ -83,7 +96,7 @@
#define CONFIG_INITRD_TAG
#define CONFIG_SETUP_MEMORY_TAGS
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/ppmc7xx.h b/include/configs/ppmc7xx.h
index 072b9dd..fe7de7b 100644
--- a/include/configs/ppmc7xx.h
+++ b/include/configs/ppmc7xx.h
@@ -25,75 +25,91 @@
/*
* Debug
*
- * DEBUG - Define this is you want extra debug info
- * GTREGREAD - Required to build with debug
- * do_bdinfo - Required to build with debug
+ * DEBUG - Define this is you want extra debug info
+ * GTREGREAD - Required to build with debug
+ * do_bdinfo - Required to build with debug
*/
#undef DEBUG
-#define GTREGREAD(x) 0xFFFFFFFF
+#ifdef DEBUG
+#define GTREGREAD(x) 0xFFFFFFFF
#define do_bdinfo(a,b,c,d)
-
+#endif
/*
* CPU type
*
- * CONFIG_7xx - We have a 750 or 755 CPU
- * CONFIG_74xx - We have a 7400 CPU
- * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400)
- * CONFIG_BUS_CLK - System bus clock in Hz
+ * CONFIG_7xx - We have a 750 or 755 CPU
+ * CONFIG_74xx - We have a 7400 CPU
+ * CONFIG_ALTIVEC - We have altivec enabled CPU (only 7400)
+ * CONFIG_BUS_CLK - System bus clock in Hz
*/
#define CONFIG_7xx
#undef CONFIG_74xx
#undef CONFIG_ALTIVEC
-#define CONFIG_BUS_CLK 66000000
+#define CONFIG_BUS_CLK 66000000
/*
* Monitor configuration
*
- * CONFIG_COMMANDS - List of command sets to include in shell
+ * List of command sets to include in shell
*
* The following command sets have been tested and known to work:
*
- * CFG_CMD_CACHE - Cache control commands
- * CFG_CMD_MEMORY - Memory display, change and test commands
- * CFG_CMD_FLASH - Erase and program flash
- * CFG_CMD_ENV - Environment commands
- * CFG_CMD_RUN - Run commands stored in env vars
- * CFG_CMD_ELF - Load ELF files
- * CFG_CMD_NET - Networking/file download commands
- * CFG_CMD_PING - ICMP Echo Request command
- * CFG_CMD_PCI - PCI Bus scanning command
+ * CMD_CACHE - Cache control commands
+ * CMD_MEMORY - Memory display, change and test commands
+ * CMD_FLASH - Erase and program flash
+ * CMD_ENV - Environment commands
+ * CMD_RUN - Run commands stored in env vars
+ * CMD_ELF - Load ELF files
+ * CMD_NET - Networking/file download commands
+ * CMD_PIN - ICMP Echo Request command
+ * CMD_PCI - PCI Bus scanning command
*/
-#define CONFIG_COMMANDS ( (CFG_CMD_DFL & ~(CFG_CMD_KGDB)) | \
- CFG_CMD_FLASH | \
- CFG_CMD_ENV | \
- CFG_CMD_RUN | \
- CFG_CMD_ELF | \
- CFG_CMD_NET | \
- CFG_CMD_PING | \
- CFG_CMD_PCI)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_PCI
+
+#undef CONFIG_CMD_KGDB
/*
* Serial configuration
*
* CONFIG_CONS_INDEX - Serial console port number (COM1)
- * CONFIG_BAUDRATE - Serial speed
+ * CONFIG_BAUDRATE - Serial speed
*/
-#define CONFIG_CONS_INDEX 1
-#define CONFIG_BAUDRATE 9600
+#define CONFIG_CONS_INDEX 1
+#define CONFIG_BAUDRATE 9600
/*
* PCI config
*
- * CONFIG_PCI - Enable PCI bus
- * CONFIG_PCI_PNP - Enable Plug & Play support
+ * CONFIG_PCI - Enable PCI bus
+ * CONFIG_PCI_PNP - Enable Plug & Play support
* CONFIG_PCI_SCAN_SHOW - Enable display of devices at startup
*/
@@ -105,9 +121,9 @@
/*
* Network config
*
- * CONFIG_NET_MULTI - Support for multiple network interfaces
- * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller
- * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
+ * CONFIG_NET_MULTI - Support for multiple network interfaces
+ * CONFIG_EEPRO100 - Intel 8255x Ethernet Controller
+ * CONFIG_EEPRO100_SROM_WRITE - Enable writing to network card ROM
*/
#define CONFIG_NET_MULTI
@@ -130,7 +146,7 @@
* Boot config
*
* CONFIG_BOOTCOMMAND - Command(s) to execute to auto-boot
- * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec)
+ * CONFIG_BOOTDELAY - How long to wait before auto-boot (in sec)
*/
#define CONFIG_BOOTCOMMAND \
@@ -149,87 +165,84 @@
*/
-#include <cmd_confdefs.h>
-
-
/*
* Memory map
*
* This board runs in a standard CHRP (Map-B) configuration.
*
- * Type Start End Size Width Chip Sel
+ * Type Start End Size Width Chip Sel
* ----------- ----------- ----------- ------- ------- --------
- * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0
- * User LED's 0x78000000 RCS3
- * UART 0x7C000000 RCS2
- * Mailbox 0xFF000000 RCS1
- * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0
+ * SDRAM 0x00000000 0x04000000 64MB 64b SDRAMCS0
+ * User LED's 0x78000000 RCS3
+ * UART 0x7C000000 RCS2
+ * Mailbox 0xFF000000 RCS1
+ * Flash 0xFFC00000 0xFFFFFFFF 4MB 64b RCS0
*
* Flash sectors are laid out as follows.
*
- * Sector Start End Size Comments
+ * Sector Start End Size Comments
* ------- ----------- ----------- ------- -----------
- * 0 0xFFC00000 0xFFC3FFFF 256KB
- * 1 0xFFC40000 0xFFC7FFFF 256KB
- * 2 0xFFC80000 0xFFCBFFFF 256KB
- * 3 0xFFCC0000 0xFFCFFFFF 256KB
- * 4 0xFFD00000 0xFFD3FFFF 256KB
- * 5 0xFFD40000 0xFFD7FFFF 256KB
- * 6 0xFFD80000 0xFFDBFFFF 256KB
- * 7 0xFFDC0000 0xFFDFFFFF 256KB
- * 8 0xFFE00000 0xFFE3FFFF 256KB
- * 9 0xFFE40000 0xFFE7FFFF 256KB
- * 10 0xFFE80000 0xFFEBFFFF 256KB
- * 11 0xFFEC0000 0xFFEFFFFF 256KB
- * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here
- * 13 0xFFF40000 0xFFF7FFFF 256KB
- * 14 0xFFF80000 0xFFFBFFFF 256KB
- * 15 0xFFFC0000 0xFFFDFFFF 128KB
- * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here
- * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here
- * 18 0xFFFF0000 0xFFFFFFFF 64KB
+ * 0 0xFFC00000 0xFFC3FFFF 256KB
+ * 1 0xFFC40000 0xFFC7FFFF 256KB
+ * 2 0xFFC80000 0xFFCBFFFF 256KB
+ * 3 0xFFCC0000 0xFFCFFFFF 256KB
+ * 4 0xFFD00000 0xFFD3FFFF 256KB
+ * 5 0xFFD40000 0xFFD7FFFF 256KB
+ * 6 0xFFD80000 0xFFDBFFFF 256KB
+ * 7 0xFFDC0000 0xFFDFFFFF 256KB
+ * 8 0xFFE00000 0xFFE3FFFF 256KB
+ * 9 0xFFE40000 0xFFE7FFFF 256KB
+ * 10 0xFFE80000 0xFFEBFFFF 256KB
+ * 11 0xFFEC0000 0xFFEFFFFF 256KB
+ * 12 0xFFF00000 0xFFF3FFFF 256KB U-Boot code here
+ * 13 0xFFF40000 0xFFF7FFFF 256KB
+ * 14 0xFFF80000 0xFFFBFFFF 256KB
+ * 15 0xFFFC0000 0xFFFDFFFF 128KB
+ * 16 0xFFFE0000 0xFFFE7FFF 32KB U-Boot env vars here
+ * 17 0xFFFE8000 0xFFFEFFFF 32KB U-Boot backup copy of env vars here
+ * 18 0xFFFF0000 0xFFFFFFFF 64KB
*/
/*
* SDRAM config - see memory map details above.
*
- * CFG_SDRAM_BASE - Start address of SDRAM, this _must_ be zero!
- * CFG_SDRAM_SIZE - Total size of contiguous SDRAM bank(s)
+ * CFG_SDRAM_BASE - Start address of SDRAM, this _must_ be zero!
+ * CFG_SDRAM_SIZE - Total size of contiguous SDRAM bank(s)
*/
-#define CFG_SDRAM_BASE 0x00000000
-#define CFG_SDRAM_SIZE 0x04000000
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_SDRAM_SIZE 0x04000000
/*
* Flash config - see memory map details above.
*
- * CFG_FLASH_BASE - Start address of flash memory
- * CFG_FLASH_SIZE - Total size of contiguous flash mem
+ * CFG_FLASH_BASE - Start address of flash memory
+ * CFG_FLASH_SIZE - Total size of contiguous flash mem
* CFG_FLASH_ERASE_TOUT - Erase timeout in ms
* CFG_FLASH_WRITE_TOUT - Write timeout in ms
* CFG_MAX_FLASH_BANKS - Number of banks of flash on board
* CFG_MAX_FLASH_SECT - Number of sectors in a bank
*/
-#define CFG_FLASH_BASE 0xFFC00000
-#define CFG_FLASH_SIZE 0x00400000
+#define CFG_FLASH_BASE 0xFFC00000
+#define CFG_FLASH_SIZE 0x00400000
#define CFG_FLASH_ERASE_TOUT 250000
#define CFG_FLASH_WRITE_TOUT 5000
-#define CFG_MAX_FLASH_BANKS 1
-#define CFG_MAX_FLASH_SECT 19
+#define CFG_MAX_FLASH_BANKS 1
+#define CFG_MAX_FLASH_SECT 19
/*
* Monitor config - see memory map details above
*
- * CFG_MONITOR_BASE - Base address of monitor code
- * CFG_MALLOC_LEN - Size of malloc pool (128KB)
+ * CFG_MONITOR_BASE - Base address of monitor code
+ * CFG_MALLOC_LEN - Size of malloc pool (128KB)
*/
-#define CFG_MONITOR_BASE TEXT_BASE
-#define CFG_MALLOC_LEN 0x20000
+#define CFG_MONITOR_BASE TEXT_BASE
+#define CFG_MALLOC_LEN 0x20000
/*
@@ -247,16 +260,16 @@
* CFG_PROMPT - Prompt string
*/
-#define CFG_BARGSIZE 1024
-#define CFG_BOOTMAPSZ 0x800000
-#define CFG_CBSIZE 1024
-#define CFG_LOAD_ADDR 0x100000
+#define CFG_BARGSIZE 1024
+#define CFG_BOOTMAPSZ 0x800000
+#define CFG_CBSIZE 1024
+#define CFG_LOAD_ADDR 0x100000
#define CFG_LONGHELP
-#define CFG_MAXARGS 16
-#define CFG_MEMTEST_START 0x00040000
-#define CFG_MEMTEST_END 0x00040100
-#define CFG_PBSIZE 1024
-#define CFG_PROMPT "=> "
+#define CFG_MAXARGS 16
+#define CFG_MEMTEST_START 0x00040000
+#define CFG_MEMTEST_END 0x00040100
+#define CFG_PBSIZE 1024
+#define CFG_PROMPT "=> "
/*
@@ -268,12 +281,12 @@
* CFG_ENV_SECT_SIZE - Size of sector containing env vars (32KB)
*/
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_ADDR 0xFFFE0000
-#define CFG_ENV_SIZE 0x1000
-#define CFG_ENV_ADDR_REDUND 0xFFFE8000
-#define CFG_ENV_SIZE_REDUND 0x1000
-#define CFG_ENV_SECT_SIZE 0x8000
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR 0xFFFE0000
+#define CFG_ENV_SIZE 0x1000
+#define CFG_ENV_ADDR_REDUND 0xFFFE8000
+#define CFG_ENV_SIZE_REDUND 0x1000
+#define CFG_ENV_SECT_SIZE 0x8000
/*
@@ -284,15 +297,15 @@
* copied to top of RAM by the init code.
*
* CFG_INIT_RAM_ADDR - Address of Init RAM, above exception vect
- * CFG_INIT_RAM_END - Size of Init RAM
+ * CFG_INIT_RAM_END - Size of Init RAM
* CFG_GBL_DATA_SIZE - Ammount of RAM to reserve for global data
* CFG_GBL_DATA_OFFSET - Start of global data, top of stack
*/
-#define CFG_INIT_RAM_ADDR (CFG_SDRAM_BASE + 0x4000)
-#define CFG_INIT_RAM_END 0x4000
-#define CFG_GBL_DATA_SIZE 128
-#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_RAM_ADDR (CFG_SDRAM_BASE + 0x4000)
+#define CFG_INIT_RAM_END 0x4000
+#define CFG_GBL_DATA_SIZE 128
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
/*
@@ -329,71 +342,71 @@
* Cache config
*
* CFG_CACHELINE_SIZE - Size of a cache line (CPU specific)
- * CFG_L2 - L2 cache enabled if defined
- * L2_INIT - L2 cache init flags
- * L2_ENABLE - L2 cache enable flags
+ * CFG_L2 - L2 cache enabled if defined
+ * L2_INIT - L2 cache init flags
+ * L2_ENABLE - L2 cache enable flags
*/
-#define CFG_CACHELINE_SIZE 32
+#define CFG_CACHELINE_SIZE 32
#undef CFG_L2
-#define L2_INIT 0
-#define L2_ENABLE 0
+#define L2_INIT 0
+#define L2_ENABLE 0
/*
* Clocks config
*
- * CFG_BUS_HZ - Bus clock frequency in Hz
- * CFG_BUS_CLK - As above (?)
- * CFG_HZ - Decrementer freq in Hz
+ * CFG_BUS_HZ - Bus clock frequency in Hz
+ * CFG_BUS_CLK - As above (?)
+ * CFG_HZ - Decrementer freq in Hz
*/
-#define CFG_BUS_HZ CONFIG_BUS_CLK
-#define CFG_BUS_CLK CONFIG_BUS_CLK
-#define CFG_HZ 1000
+#define CFG_BUS_HZ CONFIG_BUS_CLK
+#define CFG_BUS_CLK CONFIG_BUS_CLK
+#define CFG_HZ 1000
/*
* Serial port config
*
* CFG_BAUDRATE_TABLE - List of valid baud rates
- * CFG_NS16550 - Include the NS16550 driver
+ * CFG_NS16550 - Include the NS16550 driver
* CFG_NS16550_SERIAL - Include the serial (wrapper) driver
- * CFG_NS16550_CLK - Frequency of reference clock
+ * CFG_NS16550_CLK - Frequency of reference clock
* CFG_NS16550_REG_SIZE - 64-bit accesses to 8-bit port
- * CFG_NS16550_COM1 - Base address of 1st serial port
+ * CFG_NS16550_COM1 - Base address of 1st serial port
*/
-#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
#define CFG_NS16550
#define CFG_NS16550_SERIAL
-#define CFG_NS16550_CLK 3686400
+#define CFG_NS16550_CLK 3686400
#define CFG_NS16550_REG_SIZE -8
-#define CFG_NS16550_COM1 0x7C000000
+#define CFG_NS16550_COM1 0x7C000000
/*
* PCI Config - Address Map B (CHRP)
*/
-#define CFG_PCI_MEMORY_BUS 0x00000000
-#define CFG_PCI_MEMORY_PHYS 0x00000000
-#define CFG_PCI_MEMORY_SIZE 0x40000000
-#define CFG_PCI_MEM_BUS 0x80000000
-#define CFG_PCI_MEM_PHYS 0x80000000
-#define CFG_PCI_MEM_SIZE 0x7D000000
-#define CFG_ISA_MEM_BUS 0x00000000
-#define CFG_ISA_MEM_PHYS 0xFD000000
-#define CFG_ISA_MEM_SIZE 0x01000000
-#define CFG_PCI_IO_BUS 0x00800000
-#define CFG_PCI_IO_PHYS 0xFE800000
-#define CFG_PCI_IO_SIZE 0x00400000
-#define CFG_ISA_IO_BUS 0x00000000
-#define CFG_ISA_IO_PHYS 0xFE000000
-#define CFG_ISA_IO_SIZE 0x00800000
+#define CFG_PCI_MEMORY_BUS 0x00000000
+#define CFG_PCI_MEMORY_PHYS 0x00000000
+#define CFG_PCI_MEMORY_SIZE 0x40000000
+#define CFG_PCI_MEM_BUS 0x80000000
+#define CFG_PCI_MEM_PHYS 0x80000000
+#define CFG_PCI_MEM_SIZE 0x7D000000
+#define CFG_ISA_MEM_BUS 0x00000000
+#define CFG_ISA_MEM_PHYS 0xFD000000
+#define CFG_ISA_MEM_SIZE 0x01000000
+#define CFG_PCI_IO_BUS 0x00800000
+#define CFG_PCI_IO_PHYS 0xFE800000
+#define CFG_PCI_IO_SIZE 0x00400000
+#define CFG_ISA_IO_BUS 0x00000000
+#define CFG_ISA_IO_PHYS 0xFE000000
+#define CFG_ISA_IO_SIZE 0x00800000
#define CFG_ISA_IO_BASE_ADDRESS CFG_ISA_IO_PHYS
-#define CFG_ISA_IO CFG_ISA_IO_PHYS
-#define CFG_60X_PCI_IO_OFFSET CFG_ISA_IO_PHYS
+#define CFG_ISA_IO CFG_ISA_IO_PHYS
+#define CFG_60X_PCI_IO_OFFSET CFG_ISA_IO_PHYS
/*
@@ -408,12 +421,12 @@
/*
* Boot flags
*
- * BOOTFLAG_COLD - Indicates a power-on boot
- * BOOTFLAG_WARM - Indicates a software reset
+ * BOOTFLAG_COLD - Indicates a power-on boot
+ * BOOTFLAG_WARM - Indicates a software reset
*/
-#define BOOTFLAG_COLD 0x01
-#define BOOTFLAG_WARM 0x02
+#define BOOTFLAG_COLD 0x01
+#define BOOTFLAG_WARM 0x02
#endif /* __CONFIG_H */
diff --git a/include/configs/ppmc8260.h b/include/configs/ppmc8260.h
index d671dcc..fb5ae99 100644
--- a/include/configs/ppmc8260.h
+++ b/include/configs/ppmc8260.h
@@ -169,8 +169,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */
@@ -261,13 +260,17 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_NFS */
-/* Add support for a few extra bootp options like:
- * - File size
- * - DNS
+
+/*
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE | \
- CONFIG_BOOTP_DNS)
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS
+
/* undef this to save memory */
#define CFG_LONGHELP
@@ -275,14 +278,20 @@
/* Monitor Command Prompt */
#define CFG_PROMPT "=> "
-/* What U-Boot subsytems do you want enabled? */
-#define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
- CFG_CMD_ELF | \
- CFG_CMD_ASKENV | \
- CFG_CMD_REGINFO | \
- CFG_CMD_MEMTEST | \
- CFG_CMD_MII | \
- CFG_CMD_IMMAP)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_MEMTEST
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_IMMAP
+
+#undef CONFIG_CMD_KGDB
/* Where do the internal registers live? */
@@ -298,13 +307,10 @@
#define CONFIG_PPMC8260 1 /* on an Wind River PPMC8260 Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -477,7 +483,7 @@
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/purple.h b/include/configs/purple.h
index 2ecb7fb..6eb618e 100644
--- a/include/configs/purple.h
+++ b/include/configs/purple.h
@@ -81,8 +81,23 @@
""
#define CONFIG_BOOTCOMMAND "run flash_self"
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_ELF)
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+
#define CFG_SDRAM_BASE 0x80000000
diff --git a/include/configs/pxa255_idp.h b/include/configs/pxa255_idp.h
index e5e2772..0e884fc 100644
--- a/include/configs/pxa255_idp.h
+++ b/include/configs/pxa255_idp.h
@@ -102,10 +102,25 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT | CFG_CMD_DHCP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_DHCP
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTCOMMAND "bootm 40000"
@@ -192,7 +207,7 @@
/* "protect off" */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/quantum.h b/include/configs/quantum.h
index 21ec5ac..f49e2b0 100644
--- a/include/configs/quantum.h
+++ b/include/configs/quantum.h
@@ -92,18 +92,28 @@
#define CFG_NVRAM_SIZE 2048
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP )
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
@@ -113,7 +123,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -172,7 +182,7 @@
#endif
/*%%% #define CFG_FLASH_BASE 0xFFF00000 */
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
@@ -222,7 +232,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/r5200.h b/include/configs/r5200.h
index e1e406b..fc7658b 100644
--- a/include/configs/r5200.h
+++ b/include/configs/r5200.h
@@ -39,13 +39,10 @@
#define CONFIG_M5271 /* define processor type */
#define CONFIG_R5200 /* define board type */
-#define FEC_ENET
-#define CONFIG_NET_RETRY_COUNT 5
+#define CONFIG_MCFTMR
-#define CONFIG_IPADDR 192.168.0.172
-#define CONFIG_SERVERIP 192.168.0.148
-#define CONFIG_ETHADDR 00:06:3b:00:44:55
-
+#define CONFIG_MCFUART
+#define CFG_UART_PORT (0)
#define CONFIG_BAUDRATE 19200
#define CFG_BAUDRATE_TABLE { 9600 , 19200 , 38400 , 57600, 115200 }
@@ -66,10 +63,48 @@
#define CFG_ENV_IS_IN_FLASH 1
#endif
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | CFG_CMD_NET ) & ~(CFG_CMD_LOADS | CFG_CMD_LOADB))
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NET
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_LOADB
+
+#define CONFIG_MCFFEC
+#ifdef CONFIG_MCFFEC
+# define CONFIG_NET_MULTI 1
+# define CONFIG_MII 1
+# define CFG_DISCOVER_PHY
+# define CFG_RX_ETH_BUFFER 8
+# define CFG_FAULT_ECHO_LINK_DOWN
+
+# define CFG_FEC0_PINMUX 0
+# define CFG_FEC0_MIIBASE CFG_FEC0_IOBASE
+# define MCFFEC_TOUT_LOOP 50000
+/* If CFG_DISCOVER_PHY is not defined - hardcoded */
+# ifndef CFG_DISCOVER_PHY
+# define FECDUPLEX FULL
+# define FECSPEED _100BASET
+# else
+# ifndef CFG_FAULT_ECHO_LINK_DOWN
+# define CFG_FAULT_ECHO_LINK_DOWN
+# endif
+# endif /* CFG_DISCOVER_PHY */
+#endif
/* Note: We only copy one sectors worth of application code from location
* 10200000 for speed purposes. Increase the size if necessary */
@@ -79,7 +114,7 @@
#define CFG_PROMPT "u-boot> "
#define CFG_LONGHELP /* undef to save memory */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
diff --git a/include/configs/rmu.h b/include/configs/rmu.h
index b319cf4..2ca60b7 100644
--- a/include/configs/rmu.h
+++ b/include/configs/rmu.h
@@ -87,17 +87,28 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_I2C | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
#define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
@@ -108,7 +119,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -152,7 +163,7 @@
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE (0-flash_info[0].size) /* Put flash at end */
-#if defined(DEBUG) || (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */
@@ -193,7 +204,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h
index 6c9e392..814082c 100644
--- a/include/configs/rsdproto.h
+++ b/include/configs/rsdproto.h
@@ -64,8 +64,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC /* define if ethernet on SCC */
#define CONFIG_ETHER_ON_FCC /* define if ethernet on FCC */
@@ -102,7 +101,23 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL & ~CFG_CMD_KGDB)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_KGDB
+
/* Define this if you want to boot from 0x00000100. If you don't define
* this, you will need to program the bootloader to 0xfff00000, and
@@ -112,15 +127,12 @@
*/
#define CFG_RSD_BOOT_LOW 1
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_BOOTDELAY 5
#define CONFIG_BOOTARGS "devfs=mount root=ramfs"
#define CONFIG_ETHADDR 08:00:3e:26:0a:5a
#define CONFIG_NETMASK 255.255.0.0
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -130,7 +142,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -287,7 +299,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h
index 97b52fa..c474acd 100644
--- a/include/configs/sacsng.h
+++ b/include/configs/sacsng.h
@@ -159,8 +159,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC
@@ -470,16 +469,18 @@
#define CONFIG_BOOTP_RANDOM_DELAY /* Randomize the BOOTP retry delay */
-/* Add support for a few extra bootp options like:
- * - File size
- * - DNS (up to 2 servers)
- * - Send hostname to DHCP server
+/*
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME)
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+
/* undef this to save memory */
#define CFG_LONGHELP
@@ -502,31 +503,28 @@
*/
#define CONFIG_VERSION_VARIABLE
-/* What U-Boot subsytems do you want enabled? */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_SPI
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_PING
+
+#undef CONFIG_CMD_KGDB
+
#ifdef CONFIG_ETHER_ON_FCC
-# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
- CFG_CMD_ELF | \
- CFG_CMD_ASKENV | \
- CFG_CMD_I2C | \
- CFG_CMD_SPI | \
- CFG_CMD_SDRAM | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_IRQ | \
- CFG_CMD_PING | \
- CFG_CMD_MII )
-#else
-# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
- CFG_CMD_ELF | \
- CFG_CMD_ASKENV | \
- CFG_CMD_I2C | \
- CFG_CMD_SPI | \
- CFG_CMD_SDRAM | \
- CFG_CMD_REGINFO | \
- CFG_CMD_IMMAP | \
- CFG_CMD_IRQ | \
- CFG_CMD_PING )
-#endif /* CONFIG_ETHER_ON_FCC */
+#define CONFIG_CMD_MII
+#endif
+
/* Where do the internal registers live? */
#define CFG_IMMR 0xF0000000
@@ -544,10 +542,6 @@
#define CONFIG_SACSng 1 /* munged for the SACSng */
#define CONFIG_CPM2 1 /* Has a CPM2 */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
-
/*
* Miscellaneous configurable options
*/
@@ -589,7 +583,7 @@
#define CFG_TFTP_TIMEOUT_COUNT 5 /* How many timeouts TFTP will allow */
/* before it gives up. */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -732,7 +726,7 @@
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/sbc2410x.h b/include/configs/sbc2410x.h
index 866f7b0..b4a063a 100644
--- a/include/configs/sbc2410x.h
+++ b/include/configs/sbc2410x.h
@@ -82,24 +82,29 @@
#define CONFIG_BAUDRATE 115200
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- /*CFG_CMD_NAND |*/ \
- /*CFG_CMD_EEPROM |*/ \
- /*CFG_CMD_I2C |*/ \
- /*CFG_CMD_USB |*/ \
- CFG_CMD_REGINFO | \
- CFG_CMD_DATE | \
- CFG_CMD_PING | \
- CFG_CMD_DHCP | \
- CFG_CMD_ELF)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttySAC0 root=/dev/nfs nfsroot=192.168.0.1:/friendly-arm/rootfs_netserv ip=192.168.0.69:192.168.0.1:192.168.0.1:255.255.255.0:debian:eth0:off"
@@ -110,7 +115,7 @@
/*#define CONFIG_BOOTFILE "elinos-lart" */
#define CONFIG_BOOTCOMMAND "dhcp; bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
@@ -193,7 +198,7 @@
/*-----------------------------------------------------------------------
* NAND flash settings
*/
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
#define CFG_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
#define SECTORSIZE 512
@@ -219,7 +224,7 @@
#define NAND_CTL_CLRCLE(nandptr)
#define NAND_CTL_SETCLE(nandptr)
/* #undef CONFIG_MTD_NAND_VERIFY_WRITE */
-#endif /* CONFIG_COMMANDS & CFG_CMD_NAND */
+#endif /* CONFIG_CMD_NAND */
#define CONFIG_SETUP_MEMORY_TAGS
#define CONFIG_INITRD_TAG
diff --git a/include/configs/sbc405.h b/include/configs/sbc405.h
index beff28a..dc906b1 100644
--- a/include/configs/sbc405.h
+++ b/include/configs/sbc405.h
@@ -84,23 +84,33 @@
#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_SDRAM | \
- 0 )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -123,7 +133,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -229,7 +239,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/sbc8240.h b/include/configs/sbc8240.h
index d891e07..0e878f0 100644
--- a/include/configs/sbc8240.h
+++ b/include/configs/sbc8240.h
@@ -75,24 +75,33 @@
#define CONFIG_BOOTDELAY 5
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BSP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_ENV | \
- CFG_CMD_FLASH | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_SDRAM | \
- 0 )
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
+/*
+ * Command line configuration.
*/
-#include <cmd_confdefs.h>
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SDRAM
+
/*
* Miscellaneous configurable options
@@ -340,7 +349,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h
index 9cf0654..b1d41a6 100644
--- a/include/configs/sbc8260.h
+++ b/include/configs/sbc8260.h
@@ -182,8 +182,7 @@
* for FCC)
*
* if CONFIG_ETHER_NONE is defined, then either the ethernet routines must be
- * defined elsewhere (as for the console), or CFG_CMD_NET must be removed
- * from CONFIG_COMMANDS to remove support for networking.
+ * defined elsewhere (as for the console), or CONFIG_CMD_NET must be unset.
*/
#undef CONFIG_ETHER_ON_SCC
@@ -412,16 +411,18 @@
"bootm"
#endif /* CONFIG_BOOT_ROOT_NFS */
-/* Add support for a few extra bootp options like:
- * - File size
- * - DNS (up to 2 servers)
- * - Send hostname to DHCP server
+/*
+ * BOOTP options
*/
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \
- CONFIG_BOOTP_BOOTFILESIZE | \
- CONFIG_BOOTP_DNS | \
- CONFIG_BOOTP_DNS2 | \
- CONFIG_BOOTP_SEND_HOSTNAME)
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_DNS
+#define CONFIG_BOOTP_DNS2
+#define CONFIG_BOOTP_SEND_HOSTNAME
+
/* undef this to save memory */
#define CFG_LONGHELP
@@ -444,27 +445,26 @@
*/
#define CONFIG_VERSION_VARIABLE
-/* What U-Boot subsytems do you want enabled? */
-#ifdef CONFIG_ETHER_ON_FCC
-# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
- CFG_CMD_ASKENV | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IMMAP | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM )
-#else
-# define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \
- CFG_CMD_ASKENV | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IMMAP | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM )
-#endif /* CONFIG_ETHER_ON_FCC */
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+#undef CONFIG_CMD_KGDB
+
+#if defined(CONFIG_ETHER_ON_FCC)
+ #define CONFIG_CMD_CMD_MII
+#endif
+
#undef CONFIG_WATCHDOG /* disable the watchdog */
@@ -481,13 +481,11 @@
#define CONFIG_SBC8260 1 /* on an EST SBC8260 Board */
#define CONFIG_CPM2 1 /* Has a CPM2 */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
*/
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
# define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -627,7 +625,7 @@
*/
#define CFG_CACHELINE_SIZE 32 /* For MPC8260 CPU */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h
index 65aac5c..e7d8a5a 100644
--- a/include/configs/sbc8349.h
+++ b/include/configs/sbc8349.h
@@ -313,9 +313,6 @@
#define CONFIG_OF_FLAT_TREE 1
#define CONFIG_OF_BOARD_SETUP 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,8349@0"
#define OF_SOC "soc8349@e0000000"
#define OF_TBCLK (bd->bi_busfreq / 4)
@@ -328,7 +325,7 @@
#define CONFIG_I2C_CMD_TREE
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
-#define CFG_I2C_NOPROBES {{0,0x69}} /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
#define CFG_I2C1_OFFSET 0x3000
#define CFG_I2C2_OFFSET 0x3100
#define CFG_I2C_OFFSET CFG_I2C2_OFFSET
@@ -401,15 +398,17 @@
#define CONFIG_NET_MULTI 1
#endif
-#define CONFIG_MPC83XX_TSEC1 1
-#define CONFIG_MPC83XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC83XX_TSEC2 1
-#define CONFIG_MPC83XX_TSEC2_NAME "TSEC1"
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define CONFIG_PHY_BCM5421S 1
#define TSEC1_PHY_ADDR 0x19
#define TSEC2_PHY_ADDR 0x1a
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
/* Options are: TSEC[0-1] */
#define CONFIG_ETHPRIME "TSEC0"
@@ -439,40 +438,34 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+
#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_PCI \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#else
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C) \
- & \
- ~(CFG_CMD_ENV \
- | CFG_CMD_LOADS))
-#endif
-#else
-#if defined(CONFIG_PCI)
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PCI \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- )
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_PING \
- | CFG_CMD_I2C \
- | CFG_CMD_MII \
- )
-#endif
+ #define CONFG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -483,7 +476,7 @@
#define CFG_LOAD_ADDR 0x2000000 /* default load address */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -504,7 +497,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
#endif
@@ -655,7 +648,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed of kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
@@ -666,6 +659,7 @@
#define CONFIG_ENV_OVERWRITE
#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:a0:1e:a0:13:8d
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:a0:1e:a0:13:8e
diff --git a/include/configs/sbc8560.h b/include/configs/sbc8560.h
index 6e4fdb2..defc428 100644
--- a/include/configs/sbc8560.h
+++ b/include/configs/sbc8560.h
@@ -320,28 +320,37 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV | \
- CFG_CMD_LOADS ))
- #elif (defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC))
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_PING | CFG_CMD_I2C)
- #elif (defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC))
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_PING | CFG_CMD_I2C)
- #endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+ #define CONFIG_CMD_MII
+#endif
+
+#if defined(CFG_RAMBOOT) || defined(CONFIG_RAM_AS_FLASH)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -350,7 +359,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "SBC8560=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -371,7 +380,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -383,7 +392,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/sbc8641d.h b/include/configs/sbc8641d.h
new file mode 100644
index 0000000..54eac38
--- /dev/null
+++ b/include/configs/sbc8641d.h
@@ -0,0 +1,606 @@
+/*
+ * Copyright 2007 Wind River Systems <www.windriver.com>
+ * Copyright 2007 Embedded Specialties, Inc.
+ * Joe Hamman <joe.hamman@embeddedspecialties.com>
+ *
+ * Copyright 2006 Freescale Semiconductor.
+ *
+ * Srikanth Srinivasan (srikanth.srinivasan@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * SBC8641D board configuration file
+ *
+ * Make sure you change the MAC address and other network params first,
+ * search for CONFIG_ETHADDR, CONFIG_SERVERIP, etc in this file.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/* High Level Configuration Options */
+#define CONFIG_MPC86xx 1 /* MPC86xx */
+#define CONFIG_MPC8641 1 /* MPC8641 specific */
+#define CONFIG_SBC8641D 1 /* SBC8641D board specific */
+#define CONFIG_NUM_CPUS 2 /* Number of CPUs in the system */
+#define CONFIG_LINUX_RESET_VEC 0x100 /* Reset vector used by Linux */
+
+#ifdef RUN_DIAG
+#define CFG_DIAG_ADDR 0xff800000
+#endif
+
+#define CFG_RESET_ADDRESS 0xfff00100
+
+#define CONFIG_PCI 1 /* Enable PCIE */
+#define CONFIG_PCI1 1 /* PCIE controler 1 (slot 1) */
+#define CONFIG_PCI2 1 /* PCIE controler 2 (slot 2) */
+#define CONFIG_FSL_PCI_INIT 1 /* Use common FSL init code */
+
+#define CONFIG_TSEC_ENET /* tsec ethernet support */
+#define CONFIG_ENV_OVERWRITE
+
+#undef CONFIG_SPD_EEPROM /* Do not use SPD EEPROM for DDR setup*/
+#undef CONFIG_DDR_DLL /* possible DLL fix needed */
+#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#define CONFIG_ECC_INIT_VIA_DDRCONTROLLER /* DDR controller or DMA? */
+#define CONFIG_MEM_INIT_VALUE 0xDeadBeef
+#define CONFIG_NUM_DDR_CONTROLLERS 2
+#define CACHE_LINE_INTERLEAVING 0x20000000
+#define PAGE_INTERLEAVING 0x21000000
+#define BANK_INTERLEAVING 0x22000000
+#define SUPER_BANK_INTERLEAVING 0x23000000
+
+
+#define CONFIG_ALTIVEC 1
+
+/*
+ * L2CR setup -- make sure this is right for your board!
+ */
+#define CFG_L2
+#define L2_INIT 0
+#define L2_ENABLE (L2CR_L2E)
+
+#ifndef CONFIG_SYS_CLK_FREQ
+#define CONFIG_SYS_CLK_FREQ get_board_sys_clk(0)
+#endif
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
+
+#undef CFG_DRAM_TEST /* memory test, takes time */
+#define CFG_MEMTEST_START 0x00200000 /* memtest region */
+#define CFG_MEMTEST_END 0x00400000
+
+/*
+ * Base addresses -- Note these are effective addresses where the
+ * actual resources get mapped (not physical addresses)
+ */
+#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
+#define CFG_CCSRBAR 0xf8000000 /* relocated CCSRBAR */
+#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
+
+#define CFG_PCI1_ADDR (CFG_CCSRBAR+0x8000)
+#define CFG_PCI2_ADDR (CFG_CCSRBAR+0x9000)
+
+/*
+ * DDR Setup
+ */
+#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
+#define CFG_DDR_SDRAM_BASE2 0x10000000 /* DDR bank 2 */
+#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
+#define CFG_SDRAM_BASE2 CFG_DDR_SDRAM_BASE2
+#define CONFIG_VERY_BIG_RAM
+
+#define MPC86xx_DDR_SDRAM_CLK_CNTL
+
+#if defined(CONFIG_SPD_EEPROM)
+ /*
+ * Determine DDR configuration from I2C interface.
+ */
+ #define SPD_EEPROM_ADDRESS1 0x51 /* DDR DIMM */
+ #define SPD_EEPROM_ADDRESS2 0x52 /* DDR DIMM */
+ #define SPD_EEPROM_ADDRESS3 0x53 /* DDR DIMM */
+ #define SPD_EEPROM_ADDRESS4 0x54 /* DDR DIMM */
+
+#else
+ /*
+ * Manually set up DDR1 & DDR2 parameters
+ */
+
+ #define CFG_SDRAM_SIZE 512 /* DDR is 512MB */
+
+ #define CFG_DDR_CS0_BNDS 0x0000000F
+ #define CFG_DDR_CS1_BNDS 0x00000000
+ #define CFG_DDR_CS2_BNDS 0x00000000
+ #define CFG_DDR_CS3_BNDS 0x00000000
+ #define CFG_DDR_CS0_CONFIG 0x80010102
+ #define CFG_DDR_CS1_CONFIG 0x00000000
+ #define CFG_DDR_CS2_CONFIG 0x00000000
+ #define CFG_DDR_CS3_CONFIG 0x00000000
+ #define CFG_DDR_EXT_REFRESH 0x00000000
+ #define CFG_DDR_TIMING_0 0x00220802
+ #define CFG_DDR_TIMING_1 0x38377322
+ #define CFG_DDR_TIMING_2 0x002040c7
+ #define CFG_DDR_CFG_1A 0x43008008
+ #define CFG_DDR_CFG_2 0x24401000
+ #define CFG_DDR_MODE_1 0x23c00542
+ #define CFG_DDR_MODE_2 0x00000000
+ #define CFG_DDR_MODE_CTL 0x00000000
+ #define CFG_DDR_INTERVAL 0x05080100
+ #define CFG_DDR_DATA_INIT 0x00000000
+ #define CFG_DDR_CLK_CTRL 0x03800000
+ #define CFG_DDR_CFG_1B 0xC3008008
+
+ #define CFG_DDR2_CS0_BNDS 0x0010001F
+ #define CFG_DDR2_CS1_BNDS 0x00000000
+ #define CFG_DDR2_CS2_BNDS 0x00000000
+ #define CFG_DDR2_CS3_BNDS 0x00000000
+ #define CFG_DDR2_CS0_CONFIG 0x80010102
+ #define CFG_DDR2_CS1_CONFIG 0x00000000
+ #define CFG_DDR2_CS2_CONFIG 0x00000000
+ #define CFG_DDR2_CS3_CONFIG 0x00000000
+ #define CFG_DDR2_EXT_REFRESH 0x00000000
+ #define CFG_DDR2_TIMING_0 0x00220802
+ #define CFG_DDR2_TIMING_1 0x38377322
+ #define CFG_DDR2_TIMING_2 0x002040c7
+ #define CFG_DDR2_CFG_1A 0x43008008
+ #define CFG_DDR2_CFG_2 0x24401000
+ #define CFG_DDR2_MODE_1 0x23c00542
+ #define CFG_DDR2_MODE_2 0x00000000
+ #define CFG_DDR2_MODE_CTL 0x00000000
+ #define CFG_DDR2_INTERVAL 0x05080100
+ #define CFG_DDR2_DATA_INIT 0x00000000
+ #define CFG_DDR2_CLK_CTRL 0x03800000
+ #define CFG_DDR2_CFG_1B 0xC3008008
+
+
+#endif
+
+/* #define CFG_ID_EEPROM 1
+#define ID_EEPROM_ADDR 0x57 */
+
+/*
+ * The SBC8641D contains 16MB flash space at ff000000.
+ */
+#define CFG_FLASH_BASE 0xff000000 /* start of FLASH 16M */
+
+/* Flash */
+#define CFG_BR0_PRELIM 0xff001001 /* port size 16bit */
+#define CFG_OR0_PRELIM 0xff006e65 /* 16MB Boot Flash area */
+
+/* 64KB EEPROM */
+#define CFG_BR1_PRELIM 0xf0000801 /* port size 16bit */
+#define CFG_OR1_PRELIM 0xffff6e65 /* 64K EEPROM area */
+
+/* EPLD - User switches, board id, LEDs */
+#define CFG_BR2_PRELIM 0xf1000801 /* port size 16bit */
+#define CFG_OR2_PRELIM 0xfff06e65 /* EPLD (switches, board ID, LEDs) area */
+
+/* Local bus SDRAM 128MB */
+#define CFG_BR3_PRELIM 0xe0001861 /* port size ?bit */
+#define CFG_OR3_PRELIM 0xfc006cc0 /* 128MB local bus SDRAM area (1st half) */
+#define CFG_BR4_PRELIM 0xe4001861 /* port size ?bit */
+#define CFG_OR4_PRELIM 0xfc006cc0 /* 128MB local bus SDRAM area (2nd half) */
+
+/* Disk on Chip (DOC) 128MB */
+#define CFG_BR5_PRELIM 0xe8001001 /* port size ?bit */
+#define CFG_OR5_PRELIM 0xf8006e65 /* 128MB local bus SDRAM area (2nd half) */
+
+/* LCD */
+#define CFG_BR6_PRELIM 0xf4000801 /* port size ?bit */
+#define CFG_OR6_PRELIM 0xfff06e65 /* 128MB local bus SDRAM area (2nd half) */
+
+/* Control logic & misc peripherals */
+#define CFG_BR7_PRELIM 0xf2000801 /* port size ?bit */
+#define CFG_OR7_PRELIM 0xfff06e65 /* 128MB local bus SDRAM area (2nd half) */
+
+#define CFG_MAX_FLASH_BANKS 1 /* number of banks */
+#define CFG_MAX_FLASH_SECT 131 /* sectors per device */
+
+#undef CFG_FLASH_CHECKSUM
+#define CFG_FLASH_ERASE_TOUT 60000 /* Flash Erase Timeout (ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (ms) */
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+
+#define CFG_FLASH_CFI_DRIVER
+#define CFG_FLASH_CFI
+#define CFG_WRITE_SWAPPED_DATA
+#define CFG_FLASH_EMPTY_INFO
+#define CFG_FLASH_PROTECTION
+
+#undef CONFIG_CLOCKS_IN_MHZ
+
+#define CONFIG_L1_INIT_RAM
+#define CFG_INIT_RAM_LOCK 1
+#ifndef CFG_INIT_RAM_LOCK
+#define CFG_INIT_RAM_ADDR 0x0fd00000 /* Initial RAM address */
+#else
+#define CFG_INIT_RAM_ADDR 0xf8400000 /* Initial RAM address */
+#endif
+#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
+
+#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserved for malloc */
+
+/* Serial Port */
+#define CONFIG_CONS_INDEX 1
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_CLK get_bus_freq(0)
+
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400,115200}
+
+#define CFG_NS16550_COM1 (CFG_CCSRBAR+0x4500)
+#define CFG_NS16550_COM2 (CFG_CCSRBAR+0x4600)
+
+/* Use the HUSH parser */
+#define CFG_HUSH_PARSER
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+/*
+ * Pass open firmware flat tree to kernel
+ */
+#define CONFIG_OF_FLAT_TREE 1
+#define CONFIG_OF_BOARD_SETUP 1
+
+#define OF_CPU "PowerPC,8641@0"
+#define OF_SOC "soc@f8000000"
+#define OF_TBCLK (bd->bi_busfreq / 4)
+#define OF_STDOUT_PATH "/soc@f8000000/serial@4500"
+
+#define CFG_64BIT_VSPRINTF 1
+#define CFG_64BIT_STRTOUL 1
+
+/*
+ * I2C
+ */
+#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
+#define CONFIG_HARD_I2C /* I2C with hardware support*/
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+#define CFG_I2C_NOPROBES {0x69} /* Don't probe these addrs */
+#define CFG_I2C_OFFSET 0x3100
+
+/*
+ * RapidIO MMU
+ */
+#define CFG_RIO_MEM_BASE 0xc0000000 /* base address */
+#define CFG_RIO_MEM_PHYS CFG_RIO_MEM_BASE
+#define CFG_RIO_MEM_SIZE 0x20000000 /* 128M */
+
+/*
+ * General PCI
+ * Addresses are mapped 1-1.
+ */
+#define CFG_PCI1_MEM_BASE 0x80000000
+#define CFG_PCI1_MEM_PHYS CFG_PCI1_MEM_BASE
+#define CFG_PCI1_MEM_SIZE 0x20000000 /* 512M */
+#define CFG_PCI1_IO_BASE 0xe2000000
+#define CFG_PCI1_IO_PHYS CFG_PCI1_IO_BASE
+#define CFG_PCI1_IO_SIZE 0x1000000 /* 16M */
+
+/* PCI view of System Memory */
+#define CFG_PCI_MEMORY_BUS 0x00000000
+#define CFG_PCI_MEMORY_PHYS 0x00000000
+#define CFG_PCI_MEMORY_SIZE 0x80000000
+
+#define CFG_PCI2_MEM_BASE 0xa0000000
+#define CFG_PCI2_MEM_PHYS CFG_PCI2_MEM_BASE
+#define CFG_PCI2_MEM_SIZE 0x10000000 /* 256M */
+#define CFG_PCI2_IO_BASE 0xe3000000
+#define CFG_PCI2_IO_PHYS CFG_PCI2_IO_BASE
+#define CFG_PCI2_IO_SIZE 0x1000000 /* 16M */
+
+#if defined(CONFIG_PCI)
+
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+
+#undef CFG_SCSI_SCAN_BUS_REVERSE
+
+#define CONFIG_NET_MULTI
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+
+#undef CONFIG_EEPRO100
+#undef CONFIG_TULIP
+
+#if !defined(CONFIG_PCI_PNP)
+ #define PCI_ENET0_IOADDR 0xe0000000
+ #define PCI_ENET0_MEMADDR 0xe0000000
+ #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
+#endif
+
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+
+#define CONFIG_DOS_PARTITION
+#undef CONFIG_SCSI_AHCI
+
+#ifdef CONFIG_SCSI_AHCI
+#define CONFIG_SATA_ULI5288
+#define CFG_SCSI_MAX_SCSI_ID 4
+#define CFG_SCSI_MAX_LUN 1
+#define CFG_SCSI_MAX_DEVICE (CFG_SCSI_MAX_SCSI_ID * CFG_SCSI_MAX_LUN)
+#define CFG_SCSI_MAXDEVICE CFG_SCSI_MAX_DEVICE
+#endif
+
+#endif /* CONFIG_PCI */
+
+#if defined(CONFIG_TSEC_ENET)
+
+#ifndef CONFIG_NET_MULTI
+#define CONFIG_NET_MULTI 1
+#endif
+
+/* #define CONFIG_MII 1 */ /* MII PHY management */
+
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "eTSEC1"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "eTSEC2"
+#define CONFIG_TSEC3 1
+#define CONFIG_TSEC3_NAME "eTSEC3"
+#define CONFIG_TSEC4 1
+#define CONFIG_TSEC4_NAME "eTSEC4"
+
+#define TSEC1_PHY_ADDR 0x1F
+#define TSEC2_PHY_ADDR 0x00
+#define TSEC3_PHY_ADDR 0x01
+#define TSEC4_PHY_ADDR 0x02
+#define TSEC1_PHYIDX 0
+#define TSEC2_PHYIDX 0
+#define TSEC3_PHYIDX 0
+#define TSEC4_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
+#define TSEC3_FLAGS TSEC_GIGABIT
+#define TSEC4_FLAGS TSEC_GIGABIT
+
+#define CFG_TBIPA_VALUE 0x1e /* Set TBI address not to conflict with TSEC1_PHY_ADDR */
+
+#define CONFIG_ETHPRIME "eTSEC1"
+
+#endif /* CONFIG_TSEC_ENET */
+
+/*
+ * BAT0 2G Cacheable, non-guarded
+ * 0x0000_0000 2G DDR
+ */
+#define CFG_DBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE)
+#define CFG_DBAT0U (BATU_BL_2G | BATU_VS | BATU_VP)
+#define CFG_IBAT0L (BATL_PP_RW | BATL_MEMCOHERENCE )
+#define CFG_IBAT0U CFG_DBAT0U
+
+/*
+ * BAT1 1G Cache-inhibited, guarded
+ * 0x8000_0000 512M PCI-Express 1 Memory
+ * 0xa000_0000 512M PCI-Express 2 Memory
+ * Changed it for operating from 0xd0000000
+ */
+#define CFG_DBAT1L ( CFG_PCI1_MEM_BASE | BATL_PP_RW \
+ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT1U (CFG_PCI1_MEM_BASE | BATU_BL_256M | BATU_VS | BATU_VP)
+#define CFG_IBAT1L (CFG_PCI1_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT1U CFG_DBAT1U
+
+/*
+ * BAT2 512M Cache-inhibited, guarded
+ * 0xc000_0000 512M RapidIO Memory
+ */
+#define CFG_DBAT2L (CFG_RIO_MEM_BASE | BATL_PP_RW \
+ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT2U (CFG_RIO_MEM_BASE | BATU_BL_512M | BATU_VS | BATU_VP)
+#define CFG_IBAT2L (CFG_RIO_MEM_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT2U CFG_DBAT2U
+
+/*
+ * BAT3 4M Cache-inhibited, guarded
+ * 0xf800_0000 4M CCSR
+ */
+#define CFG_DBAT3L ( CFG_CCSRBAR | BATL_PP_RW \
+ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT3U (CFG_CCSRBAR | BATU_BL_4M | BATU_VS | BATU_VP)
+#define CFG_IBAT3L (CFG_CCSRBAR | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT3U CFG_DBAT3U
+
+/*
+ * BAT4 32M Cache-inhibited, guarded
+ * 0xe200_0000 16M PCI-Express 1 I/O
+ * 0xe300_0000 16M PCI-Express 2 I/0
+ * Note that this is at 0xe0000000
+ */
+#define CFG_DBAT4L ( CFG_PCI1_IO_BASE | BATL_PP_RW \
+ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT4U (CFG_PCI1_IO_BASE | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CFG_IBAT4L (CFG_PCI1_IO_BASE | BATL_PP_RW | BATL_CACHEINHIBIT)
+#define CFG_IBAT4U CFG_DBAT4U
+
+/*
+ * BAT5 128K Cacheable, non-guarded
+ * 0xe401_0000 128K Init RAM for stack in the CPU DCache (no backing memory)
+ */
+#define CFG_DBAT5L (CFG_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE)
+#define CFG_DBAT5U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP)
+#define CFG_IBAT5L CFG_DBAT5L
+#define CFG_IBAT5U CFG_DBAT5U
+
+/*
+ * BAT6 32M Cache-inhibited, guarded
+ * 0xfe00_0000 32M FLASH
+ */
+#define CFG_DBAT6L ((CFG_FLASH_BASE & 0xfe000000) | BATL_PP_RW \
+ | BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE)
+#define CFG_DBAT6U ((CFG_FLASH_BASE & 0xfe000000) | BATU_BL_32M | BATU_VS | BATU_VP)
+#define CFG_IBAT6L ((CFG_FLASH_BASE & 0xfe000000) | BATL_PP_RW | BATL_MEMCOHERENCE)
+#define CFG_IBAT6U CFG_DBAT6U
+
+#define CFG_DBAT7L 0x00000000
+#define CFG_DBAT7U 0x00000000
+#define CFG_IBAT7L 0x00000000
+#define CFG_IBAT7U 0x00000000
+
+/*
+ * Environment
+ */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE + 0x40000)
+#define CFG_ENV_SECT_SIZE 0x40000 /* 256K(one sector) for env */
+#define CFG_ENV_SIZE 0x2000
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#include <config_cmd_default.h>
+ #define CONFIG_CMD_PING
+ #define CONFIG_CMD_I2C
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
+#endif
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_LOAD_ADDR 0x2000000 /* default load address */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#if defined(CONFIG_CMD_KGDB)
+ #define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+ #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_HZ 1000 /* decrementer freq: 1ms ticks */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux*/
+
+/* Cache Configuration */
+#define CFG_DCACHE_SIZE 32768
+#define CFG_CACHELINE_SIZE 32
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /*log base 2 of the above value*/
+#endif
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Environment Configuration
+ */
+
+/* The mac addresses for all ethernet interface */
+#if defined(CONFIG_TSEC_ENET)
+#define CONFIG_ETHADDR 02:E0:0C:00:00:01
+#define CONFIG_ETH1ADDR 02:E0:0C:00:01:FD
+#define CONFIG_ETH2ADDR 02:E0:0C:00:02:FD
+#define CONFIG_ETH3ADDR 02:E0:0C:00:03:FD
+#endif
+
+#define CONFIG_HAS_ETH0 1
+#define CONFIG_HAS_ETH1 1
+#define CONFIG_HAS_ETH2 1
+#define CONFIG_HAS_ETH3 1
+
+#define CONFIG_IPADDR 192.168.0.50
+
+#define CONFIG_HOSTNAME sbc8641d
+#define CONFIG_ROOTPATH /opt/eldk/ppc_74xx
+#define CONFIG_BOOTFILE uImage
+
+#define CONFIG_SERVERIP 192.168.0.2
+#define CONFIG_GATEWAYIP 192.168.0.1
+#define CONFIG_NETMASK 255.255.255.0
+
+/* default location for tftp and bootm */
+#define CONFIG_LOADADDR 1000000
+
+#define CONFIG_BOOTDELAY 10 /* -1 disables auto-boot */
+#undef CONFIG_BOOTARGS /* the boot command will set bootargs */
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "netdev=eth0\0" \
+ "consoledev=ttyS0\0" \
+ "ramdiskaddr=2000000\0" \
+ "ramdiskfile=uRamdisk\0" \
+ "dtbaddr=400000\0" \
+ "dtbfile=sbc8641d.dtb\0" \
+ "en-wd=mw.b f8100010 0x08; echo -expect:- 08; md.b f8100010 1\0" \
+ "dis-wd=mw.b f8100010 0x00; echo -expect:- 00; md.b f8100010 1\0" \
+ "maxcpus=1"
+
+#define CONFIG_NFSBOOTCOMMAND \
+ "setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=$serverip:$rootpath " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $dtbaddr $dtbfile;" \
+ "bootm $loadaddr - $dtbaddr"
+
+#define CONFIG_RAMBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "tftp $ramdiskaddr $ramdiskfile;" \
+ "tftp $loadaddr $bootfile;" \
+ "tftp $dtbaddr $dtbfile;" \
+ "bootm $loadaddr $ramdiskaddr $dtbaddr"
+
+#define CONFIG_FLASHBOOTCOMMAND \
+ "setenv bootargs root=/dev/ram rw " \
+ "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off " \
+ "console=$consoledev,$baudrate $othbootargs;" \
+ "bootm ffd00000 ffb00000 ffa00000"
+
+#define CONFIG_BOOTCOMMAND CONFIG_FLASHBOOTCOMMAND
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/sc3.h b/include/configs/sc3.h
index 6b6acfa..cb22536 100644
--- a/include/configs/sc3.h
+++ b/include/configs/sc3.h
@@ -58,7 +58,7 @@
* 0xFFE00000 .... 0xFFFFFFFF -> BOOT-ROM (2 MiB)
*/
-#define CONFIG_SOLIDCARD3 1
+#define CONFIG_SC3 1
#define CONFIG_4xx 1
#define CONFIG_405GP 1
@@ -68,8 +68,7 @@
* Define IDE_USES_ISA_EMULATION for slower IDE access in the ISA-IO address range
* If undefined, IDE access uses a seperat emulation with higher access speed.
* Consider to inform your Linux IDE driver about the different addresses!
- * IDE_USES_ISA_EMULATION is only used if your CONFIG_COMMANDS macro includes
- * the CFG_CMD_IDE macro!
+ * IDE_USES_ISA_EMULATION is only used if you define CONFIG_CMD_IDE!
*/
#define IDE_USES_ISA_EMULATION
@@ -134,7 +133,8 @@
#if 1 /* feel free to disable for development */
#define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
#define CONFIG_AUTOBOOT_PROMPT "\nSC3 - booting... stop with ENTER\n"
-#define CONFIG_AUTOBOOT_DELAY_STR "\n" /* 1st "password" */
+#define CONFIG_AUTOBOOT_DELAY_STR "\r" /* 1st "password" */
+#define CONFIG_AUTOBOOT_DELAY_STR2 "\n" /* 1st "password" */
#endif
/*
@@ -168,25 +168,36 @@
#define CONFIG_MII 1 /* add 405GP MII PHY management */
#define CONFIG_PHY_ADDR 1 /* the connected Phy defaults to address 1 */
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_AUTOSCRIPT | \
- CFG_CMD_PCI | \
- CFG_CMD_IRQ | \
- CFG_CMD_NET | \
- CFG_CMD_MII | \
- CFG_CMD_PING | \
- CFG_CMD_NAND | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_CACHE | \
- CFG_CMD_ELF )
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_ELF
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -276,7 +287,7 @@
* External peripheral base address
*-----------------------------------------------------------------------
*/
-#if !(CONFIG_COMMANDS & CFG_CMD_IDE)
+#if !defined(CONFIG_CMD_IDE)
#undef CONFIG_IDE_LED /* no led for ide supported */
#undef CONFIG_IDE_RESET /* no reset for ide supported */
@@ -285,7 +296,7 @@
* IDE/ATA stuff
*-----------------------------------------------------------------------
*/
-#else /* !(CONFIG_COMMANDS & CFG_CMD_IDE) */
+#else
#define CONFIG_START_IDE 1 /* check, if use IDE */
#undef CONFIG_IDE_8xx_DIRECT /* no pcmcia interface required */
@@ -345,7 +356,7 @@
#endif /* IDE_USES_ISA_EMULATION */
-#endif /* !(CONFIG_COMMANDS & CFG_CMD_IDE) */
+#endif
/*
#define CFG_KEY_REG_BASE_ADDR 0xF0100000
@@ -436,7 +447,7 @@
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h
index d7d07a6..8491d97 100644
--- a/include/configs/sc520_cdp.h
+++ b/include/configs/sc520_cdp.h
@@ -64,24 +64,37 @@
*/
#define CONFIG_MALLOC_SIZE (CFG_ENV_SIZE + 128*1024)
-
#define CONFIG_BAUDRATE 9600
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_JFFS2 | CFG_CMD_IDE | CFG_CMD_NET | CFG_CMD_EEPROM)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_EEPROM
#define CONFIG_BOOTDELAY 15
#define CONFIG_BOOTARGS "root=/dev/mtdblock0 console=ttyS0,9600"
/* #define CONFIG_BOOTCOMMAND "bootm 38000000" */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
-
/*
* Miscellaneous configurable options
*/
@@ -104,7 +117,6 @@
/* valid baudrates */
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-
/*-----------------------------------------------------------------------
* Physical Memory Map
*/
@@ -113,8 +125,6 @@
/*-----------------------------------------------------------------------
* FLASH and environment organization
*/
-
-
#define CFG_MAX_FLASH_BANKS 3 /* max number of memory banks */
#define CFG_MAX_FLASH_SECT 64 /* max number of sectors on one chip */
@@ -125,11 +135,9 @@
#define CONFIG_SPI_EEPROM /* Support for SPI EEPROMs (AT25128) */
#define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */
-
/* allow to overwrite serial and ethaddr */
#define CONFIG_ENV_OVERWRITE
-
/* Environment in EEPROM */
#define CFG_ENV_IS_IN_EEPROM 1
#define CONFIG_SPI
@@ -182,6 +190,15 @@
#undef CONFIG_IDE_RESET_ROUTINE /* no special reset function */
/************************************************************
+*SATA/Native Stuff
+************************************************************/
+#define CFG_SATA_SUPPORTED 1
+#define CFG_SATA_MAXBUS 2 /*Max Sata buses supported */
+#define CFG_SATA_DEVS_PER_BUS 2 /*Max no. of devices per bus/port */
+#define CFG_SATA_MAXDEVICES (CFG_SATA_MAXBUS* CFG_SATA_DEVS_PER_BUS)
+#define CFG_ATA_PIIX 1 /*Supports ata_piix driver */
+
+/************************************************************
* ATAPI support (experimental)
************************************************************/
#define CONFIG_ATAPI /* enable ATAPI Support */
@@ -200,7 +217,6 @@
#define CONFIG_I8042_KBD
#define CFG_ISA_IO 0
-
/************************************************************
* RTC
***********************************************************/
diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h
index a8e3555..c6f7f15 100644
--- a/include/configs/sc520_spunk.h
+++ b/include/configs/sc520_spunk.h
@@ -64,16 +64,34 @@
#define CONFIG_BAUDRATE 9600
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_JFFS2 | CFG_CMD_IDE | CFG_CMD_NET | CFG_CMD_PCMCIA | CFG_CMD_EEPROM)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCMCIA
+#define CONFIG_CMD_EEPROM
+
#define CONFIG_BOOTDELAY 15
#define CONFIG_BOOTARGS "root=/dev/mtdblock1 console=ttyS0,9600 mtdparts=phys:7936k(root),256k(uboot) "
#define CONFIG_BOOTCOMMAND "setenv bootargs root=/dev/nfs ip=autoconf console=ttyS0,9600 mtdparts=phys:7808k(root),128k(env),256k(uboot); bootp; bootm"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/scb9328.h b/include/configs/scb9328.h
index a4249c4..d140241 100644
--- a/include/configs/scb9328.h
+++ b/include/configs/scb9328.h
@@ -36,20 +36,27 @@
/*
- * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
- * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
- * functionality or size of u-boot code.
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- & ~CFG_CMD_LOADS \
- & ~CFG_CMD_CONSOLE \
- & ~CFG_CMD_AUTOSCRIPT \
- | CFG_CMD_NET \
- | CFG_CMD_PING \
- | CFG_CMD_DHCP \
- )
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_CONSOLE
+#undef CONFIG_CMD_AUTOSCRIPT
+
/*
* Boot options. Setting delay to -1 stops autostart count down.
@@ -182,7 +189,7 @@
* Right now there is no gain for user, but later on booting kernel might be
* possible. Consider using XIP kernel running from flash to save RAM
* footprint.
- * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support.
+ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
*/
#define CFG_JFFS2_FIRST_BANK 0
#define CFG_JFFS2_FIRST_SECTOR 5
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h
index b7f79c2..c2e1386 100644
--- a/include/configs/sequoia.h
+++ b/include/configs/sequoia.h
@@ -37,10 +37,11 @@
#else
#define CONFIG_440GRX 1 /* Specific PPC440GRx */
#endif
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
/* Detect Sequoia PLL input clock automatically via CPLD bit */
#define CONFIG_SYS_CLK_FREQ ((in8(CFG_BCSR_BASE + 3) & 0x80) ? \
- 3333333 : 33000000)
+ 33333333 : 33000000)
#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
@@ -58,6 +59,7 @@
#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_NAND_ADDR 0xd0000000 /* NAND Flash */
#define CFG_OCM_BASE 0xe0010000 /* ocm */
+#define CFG_OCM_DATA_ADDR CFG_OCM_BASE
#define CFG_PCI_BASE 0xe0000000 /* Internal PCI regs */
#define CFG_PCI_MEMBASE 0x80000000 /* mapped pci memory */
#define CFG_PCI_MEMBASE1 CFG_PCI_MEMBASE + 0x10000000
@@ -80,7 +82,7 @@
#define CFG_INIT_RAM_END (4 << 10)
#define CFG_GBL_DATA_SIZE 256 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
-#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+#define CFG_INIT_SP_OFFSET CFG_POST_WORD_ADDR
/*-----------------------------------------------------------------------
* Serial Port
@@ -125,7 +127,7 @@
#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
@@ -168,12 +170,19 @@
/*
* Now the NAND chip has to be defined (no autodetection used!)
*/
-#define CFG_NAND_PAGE_SIZE (512) /* NAND chip page size */
+#define CFG_NAND_PAGE_SIZE 512 /* NAND chip page size */
#define CFG_NAND_BLOCK_SIZE (16 << 10) /* NAND chip block size */
-#define CFG_NAND_PAGE_COUNT (32) /* NAND chip page count */
-#define CFG_NAND_BAD_BLOCK_POS (5) /* Location of bad block marker */
+#define CFG_NAND_PAGE_COUNT 32 /* NAND chip page count */
+#define CFG_NAND_BAD_BLOCK_POS 5 /* Location of bad block marker */
#undef CFG_NAND_4_ADDR_CYCLE /* No fourth addr used (<=32MB) */
+#define CFG_NAND_ECCSIZE 256
+#define CFG_NAND_ECCBYTES 3
+#define CFG_NAND_ECCSTEPS (CFG_NAND_PAGE_SIZE / CFG_NAND_ECCSIZE)
+#define CFG_NAND_OOBSIZE 16
+#define CFG_NAND_ECCTOTAL (CFG_NAND_ECCBYTES * CFG_NAND_ECCSTEPS)
+#define CFG_NAND_ECCPOS {0, 1, 2, 3, 6, 7}
+
#ifdef CFG_ENV_IS_IN_NAND
/*
* For NAND booting the environment is embedded in the U-Boot image. Please take
@@ -290,9 +299,6 @@
/* Comment this out to enable USB 1.1 device */
#define USB_2_0_DEVICE
-#define CMD_USB CFG_CMD_USB
-#else
-#define CMD_USB 0 /* no USB on 440GRx */
#endif /* CONFIG_440EPX */
/* Partitions */
@@ -300,37 +306,73 @@
#define CONFIG_DOS_PARTITION
#define CONFIG_ISO_PARTITION
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DTT | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NAND | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CMD_USB)
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+#ifdef CONFIG_440EPX
+#define CONFIG_CMD_USB
+#endif
+
+#ifndef CONFIG_RAINIER
+#define CFG_POST_FPU_ON CFG_POST_FPU
+#else
+#define CFG_POST_FPU_ON 0
+#endif
+
+/* POST support */
+#define CONFIG_POST (CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_UART | \
+ CFG_POST_I2C | \
+ CFG_POST_CACHE | \
+ CFG_POST_FPU_ON | \
+ CFG_POST_ETHER | \
+ CFG_POST_SPR)
+
+#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 0x4)
+#define CONFIG_LOGBUFFER
+#define CFG_POST_CACHE_ADDR 0x10000000 /* free virtual address */
+
+#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
#define CONFIG_SUPPORT_VFAT
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*-----------------------------------------------------------------------
* Miscellaneous configurable options
*----------------------------------------------------------------------*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -358,12 +400,12 @@
*----------------------------------------------------------------------*/
/* General PCI */
#define CONFIG_PCI /* include pci support */
-#undef CONFIG_PCI_PNP /* do (not) pci plug-and-play */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CFG_PCI_CACHE_LINE_SIZE 0 /* to avoid problems with PNP */
#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT
#define CFG_PCI_MASTER_INIT
@@ -421,7 +463,7 @@
*----------------------------------------------------------------------*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -433,7 +475,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/shannon.h b/include/configs/shannon.h
index 572985b..c1fa53f 100644
--- a/include/configs/shannon.h
+++ b/include/configs/shannon.h
@@ -66,21 +66,28 @@
#define CONFIG_BAUDRATE 115200
-#if 0 /* XXX - cannot test IDE anyway, so disabled for now - wd */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_PCMCIA | \
- CFG_CMD_IDE)
-#endif /* 0 */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,115200"
#define CONFIG_NETMASK 255.255.0.0
#define CONFIG_BOOTCOMMAND "help"
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/smdk2400.h b/include/configs/smdk2400.h
index a137f9d..05f6053 100644
--- a/include/configs/smdk2400.h
+++ b/include/configs/smdk2400.h
@@ -86,24 +86,32 @@
/* Use s3c2400's RTC */
#define CONFIG_RTC_S3C24X0 1
-#ifndef USE_920T_MMU
-#define CONFIG_COMMANDS_tmp ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
- CFG_CMD_DATE | \
- CFG_CMD_SNTP )
-#else
-#define CONFIG_COMMANDS_tmp (CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_SNTP )
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_SNTP
+
+#if defined(CONFIG_HWFLOW)
+ #define CONFIG_CONFIG_HWFLOW
#endif
-#ifdef CONFIG_HWFLOW
-#define CONFIG_COMMANDS (CONFIG_COMMANDS_tmp | CFG_CMD_HWFLOW)
-#else
-#define CONFIG_COMMANDS CONFIG_COMMANDS_tmp
+#if !defined(USE_920T_MMU)
+ #undef CONFIG_CMD_CACHE
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY 3
#if 0
@@ -118,7 +126,7 @@
#define CONFIG_BOOTCOMMAND "tftp; bootm"
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/smdk2410.h b/include/configs/smdk2410.h
index 7edec0d..ca404ff 100644
--- a/include/configs/smdk2410.h
+++ b/include/configs/smdk2410.h
@@ -72,22 +72,26 @@
#define CONFIG_BAUDRATE 115200
-/***********************************************************
- * Command definition
- ***********************************************************/
-#define CONFIG_COMMANDS \
- (CONFIG_CMD_DFL | \
- CFG_CMD_CACHE | \
- /*CFG_CMD_NAND |*/ \
- /*CFG_CMD_EEPROM |*/ \
- /*CFG_CMD_I2C |*/ \
- /*CFG_CMD_USB |*/ \
- CFG_CMD_REGINFO | \
- CFG_CMD_DATE | \
- CFG_CMD_ELF)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ELF
+
#define CONFIG_BOOTDELAY 3
/*#define CONFIG_BOOTARGS "root=ramfs devfs=mount console=ttySA0,9600" */
@@ -98,7 +102,7 @@
/*#define CONFIG_BOOTFILE "elinos-lart" */
/*#define CONFIG_BOOTCOMMAND "tftp; bootm" */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
diff --git a/include/configs/smmaco4.h b/include/configs/smmaco4.h
index e106b3b..ad68c75 100644
--- a/include/configs/smmaco4.h
+++ b/include/configs/smmaco4.h
@@ -42,11 +42,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -65,33 +60,41 @@
CFG_POST_I2C)
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
/* preserve space for the post_word at end of on-chip SRAM */
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#else
-#define CFG_CMD_POST_DIAG 0
#endif
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+
+#ifdef CONFIG_POST
+#define CONFIG_CMD_DIAG
+#endif
+
#define CONFIG_TIMESTAMP /* display image timestamps */
@@ -138,17 +141,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -319,7 +322,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -338,9 +341,13 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -357,7 +364,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/sorcery.h b/include/configs/sorcery.h
index 4937638..fe014ea 100644
--- a/include/configs/sorcery.h
+++ b/include/configs/sorcery.h
@@ -39,12 +39,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
-
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -69,30 +63,35 @@
#define CONFIG_PCI_CFG_PHYS CONFIG_PCI_CFG_BUS
#define CONFIG_PCI_CFG_SIZE 0x01000000
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_BOOTD | \
- CFG_CMD_CACHE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP | \
- 0)
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* CFG_CMD_MII | \ */
-/* CFG_CMD_USB | \ */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
/*
* Default Environment
@@ -268,7 +267,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -284,6 +283,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC8220 CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/spc1920.h b/include/configs/spc1920.h
index 09bbebd..2efc8f1 100644
--- a/include/configs/spc1920.h
+++ b/include/configs/spc1920.h
@@ -31,14 +31,9 @@
#undef CONFIG_8xx_CONS_NONE
#define CONFIG_MII
-/* #define MII_DEBUG */
-/* #define CONFIG_FEC_ENET */
#undef CONFIG_ETHER_ON_FEC1
#define CONFIG_ETHER_ON_FEC2
#define FEC_ENET
-/* #define CONFIG_FEC2_PHY_NORXERR */
-/* #define CFG_DISCOVER_PHY */
-/* #define CONFIG_PHY_ADDR 0x1 */
#define CONFIG_FEC2_PHY 1
#define CONFIG_BAUDRATE 19200
@@ -80,24 +75,31 @@
#undef CONFIG_WATCHDOG /* watchdog disabled */
#define CONFIG_BZIP2 /* include support for bzip2 compressed images */
-#ifndef CONFIG_COMMANDS
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- | CFG_CMD_ASKENV \
- | CFG_CMD_DATE \
- | CFG_CMD_ECHO \
- | CFG_CMD_IMMAP \
- | CFG_CMD_JFFS2 \
- | CFG_CMD_PING \
- | CFG_CMD_DHCP \
- | CFG_CMD_I2C \
- | CFG_CMD_MII)
- /* & ~( CFG_CMD_NET)) */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-#endif /* !CONFIG_COMMANDS */
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_IMMAP
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
/*
* Miscellaneous configurable options
@@ -107,7 +109,7 @@
#define CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -194,7 +196,7 @@
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
-#ifdef CFG_CMD_DATE
+#ifdef CONFIG_CMD_DATE
# define CONFIG_RTC_DS3231
# define CFG_I2C_RTC_ADDR 0x68
#endif
@@ -202,7 +204,7 @@
/*-----------------------------------------------------------------------
* I2C configuration
*/
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+#if defined(CONFIG_CMD_I2C)
/* enable I2C and select the hardware/software driver */
#undef CONFIG_HARD_I2C /* I2C with hardware support */
#define CONFIG_SOFT_I2C 1 /* I2C bit-banged */
diff --git a/include/configs/spieval.h b/include/configs/spieval.h
index f40dde2..4b618f3 100644
--- a/include/configs/spieval.h
+++ b/include/configs/spieval.h
@@ -44,11 +44,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -88,12 +83,6 @@
#define CONFIG_NS8382X 1
#endif /* CONFIG_STK52XX */
-#ifdef CONFIG_PCI
-#define ADD_PCI_CMD CFG_CMD_PCI
-#else
-#define ADD_PCI_CMD 0
-#endif
-
/*
* Video console
*/
@@ -110,12 +99,6 @@
#define CFG_CONSOLE_IS_IN_ENV
#endif
-#ifdef CONFIG_VIDEO
-#define ADD_BMP_CMD CFG_CMD_BMP
-#else
-#define ADD_BMP_CMD 0
-#endif
-
/* Partitions */
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -124,10 +107,7 @@
/* USB */
#ifdef CONFIG_STK52XX
#define CONFIG_USB_OHCI
-#define ADD_USB_CMD CFG_CMD_USB | CFG_CMD_FAT
#define CONFIG_USB_STORAGE
-#else
-#define ADD_USB_CMD 0
#endif
/* POST support */
@@ -136,43 +116,60 @@
CFG_POST_I2C)
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
/* preserve space for the post_word at end of on-chip SRAM */
#define MPC5XXX_SRAM_POST_SIZE MPC5XXX_SRAM_SIZE-4
-#else
-#define CFG_CMD_POST_DIAG 0
#endif
-/* IDE */
-#if defined (CONFIG_MINIFAP) || defined (CONFIG_STK52XX)
-#define ADD_IDE_CMD (CFG_CMD_IDE | CFG_CMD_FAT | CFG_CMD_EXT2)
-#else
-#define ADD_IDE_CMD 0
-#endif
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- ADD_BMP_CMD | \
- ADD_IDE_CMD | \
- ADD_PCI_CMD | \
- ADD_USB_CMD | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_ECHO | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SNTP )
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SNTP
+
+#if defined(CONFIG_MINIFAP) || defined(CONFIG_STK52XX)
+ #define CONFIG_CMD_IDE
+ #define CONFIG_CMD_FAT
+ #define CONFIG_CMD_EXT2
+#endif
+
+#ifdef CONFIG_STK52XX
+ #define CONFIG_CMD_USB
+ #define CONFIG_CMD_FAT
+#endif
+
+#ifdef CONFIG_VIDEO
+ #define CONFIG_CMD_BMP
+#endif
+
+#ifdef CONFIG_PCI
+ #define CONFIG_CMD_PCI
+#endif
+
+#ifdef CONFIG_POST
+#define CONFIG_CMD_DIAG
+#endif
+
#define CONFIG_TIMESTAMP /* display image timestamps */
@@ -219,17 +216,17 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
-#if defined(CFG_IPBSPEED_133)
+#if defined(CFG_IPBCLK_EQUALS_XLBCLK)
/*
* PCI Bus clocking configuration
*
* Actually a PCI Clock of 66 MHz is only set (in cpu_init.c) if
- * CFG_IPBSPEED_133 is defined. This is because a PCI Clock of 66 MHz yet hasn't
- * been tested with a IPB Bus Clock of 66 MHz.
+ * CFG_IPBCLK_EQUALS_XLBCLK is defined. This is because a PCI Clock
+ * of 66 MHz yet hasn't been tested with a IPB Bus Clock of 66 MHz.
*/
-#define CFG_PCISPEED_66 /* define for 66MHz speed */
+#define CFG_PCICLK_EQUALS_IPBCLK_DIV2 /* define for 66MHz speed */
#endif
/*
@@ -406,7 +403,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -425,9 +422,13 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -444,7 +445,7 @@
#define CFG_BOOTCS_START CFG_FLASH_BASE
#define CFG_BOOTCS_SIZE CFG_FLASH_SIZE
-#ifdef CFG_PCISPEED_66
+#ifdef CFG_PCICLK_EQUALS_IPBCLK_DIV2
#define CFG_BOOTCS_CFG 0x0008DF30 /* for pci_clk = 66 MHz */
#else
#define CFG_BOOTCS_CFG 0x0004DF30 /* for pci_clk = 33 MHz */
diff --git a/include/configs/stxgp3.h b/include/configs/stxgp3.h
index 625cf20..c5ae0cd 100644
--- a/include/configs/stxgp3.h
+++ b/include/configs/stxgp3.h
@@ -230,16 +230,17 @@
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
-#undef CONFIG_MPS85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 4
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
#define CONFIG_ETHPRIME "TSEC0"
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
@@ -298,34 +299,38 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV | \
- CFG_CMD_LOADS ))
- #elif defined(CONFIG_TSEC_ENET)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | \
- CFG_CMD_MII | CFG_CMD_I2C ) & \
- ~(CFG_CMD_ENV))
- #elif defined(CONFIG_ETHER_ON_FCC)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV))
- #endif
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_ELF | CFG_CMD_PING | CFG_CMD_I2C)
- #elif defined(CONFIG_TSEC_ENET)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING | \
- CFG_CMD_ELF | CFG_CMD_MII | CFG_CMD_I2C)
- #elif defined(CONFIG_ETHER_ON_FCC)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_ELF | CFG_CMD_PING | CFG_CMD_I2C)
- #endif
+ #define CONFIG_CMD_ELF
#endif
-#include <cmd_confdefs.h>
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
+#endif
+
+#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+ #define CONFIG_CMD_MII
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -334,7 +339,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "GPPP=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -355,7 +360,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -367,13 +372,14 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*Note: change below for your network setting!!! */
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:e0:0c:07:9b:8a
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:e0:0c:07:9b:8b
diff --git a/include/configs/stxssa.h b/include/configs/stxssa.h
index 8624f4b..b41dafa 100644
--- a/include/configs/stxssa.h
+++ b/include/configs/stxssa.h
@@ -42,20 +42,20 @@
#define CONFIG_CPM2 1 /* has CPM2 */
#define CONFIG_STXSSA 1 /* Silicon Tx GPPP SSA board specific*/
-#undef CONFIG_PCI /* pci ethernet support */
-#define CONFIG_TSEC_ENET /* tsec ethernet support*/
-#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
+#define CONFIG_PCI /* PCI ethernet support */
+#define CONFIG_TSEC_ENET /* tsec ethernet support*/
+#undef CONFIG_ETHER_ON_FCC /* cpm FCC ethernet support */
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
-#undef CONFIG_DDR_ECC /* only for ECC DDR module */
-#undef CONFIG_DDR_DLL /* possible DLL fix needed */
+#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */
+#undef CONFIG_DDR_ECC /* only for ECC DDR module */
+#undef CONFIG_DDR_DLL /* possible DLL fix needed */
#define CONFIG_DDR_2T_TIMING /* Sets the 2T timing bit */
/* sysclk for MPC85xx
*/
-#define CONFIG_SYS_CLK_FREQ 33000000 /* most pci cards are 33Mhz */
+#define CONFIG_SYS_CLK_FREQ 33000000 /* most pci cards are 33Mhz */
/* Blinkin' LEDs for Robert :-)
*/
@@ -64,36 +64,40 @@
/*
* These can be toggled for performance analysis, otherwise use default.
*/
-#define CONFIG_L2_CACHE /* toggle L2 cache */
-#define CONFIG_BTB /* toggle branch predition */
-#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
+#define CONFIG_L2_CACHE /* toggle L2 cache */
+#define CONFIG_BTB /* toggle branch predition */
+#define CONFIG_ADDR_STREAMING /* toggle addr streaming */
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_pre_init */
-#undef CFG_DRAM_TEST /* memory test, takes time */
-#define CFG_MEMTEST_START 0x00200000 /* memtest region */
-#define CFG_MEMTEST_END 0x00400000
+#undef CFG_DRAM_TEST /* memory test, takes time */
+#define CFG_MEMTEST_START 0x00200000 /* memtest region */
+#define CFG_MEMTEST_END 0x00400000
-/* Localbus connector. There are many options that can be
+/* Localbus connector. There are many options that can be
* connected here, including sdram or lots of flash.
* This address, however, is used to configure a 256M local bus
* window that includes the Config latch below.
*/
-#define CFG_LBC_OPTION_BASE 0xf0000000 /* Localbus Extension */
+#define CFG_LBC_OPTION_BASE 0xF0000000 /* Localbus Extension */
#define CFG_LBC_OPTION_SIZE 256 /* 256MB */
/* There are various flash options used, we configure for the largest,
* which is 64Mbytes. The CFI works fine and will discover the proper
* sizes.
*/
-#define CFG_FLASH_BASE 0xFC000000 /* start of FLASH 64M */
-#define CFG_BR0_PRELIM 0xFC001801 /* port size 32bit */
-#define CFG_OR0_PRELIM 0xFC000FF7 /* 64 MB Flash */
+#ifdef CONFIG_STXSSA_4M
+#define CFG_FLASH_BASE 0xFFC00000 /* start of 4 MiB flash */
+#else
+#define CFG_FLASH_BASE 0xFC000000 /* start of 64 MiB flash */
+#endif
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | 0x1801) /* port size 32bit */
+#define CFG_OR0_PRELIM (CFG_FLASH_BASE | 0x0FF7)
#define CFG_FLASH_CFI 1
#define CFG_FLASH_CFI_DRIVER 1
-#undef CFG_FLASH_USE_BUFFER_WRITE /* use buffered writes (20x faster) */
+#undef CFG_FLASH_USE_BUFFER_WRITE /* use buffered writes (20x faster) */
#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
@@ -104,24 +108,24 @@
/* The configuration latch is Chip Select 1.
* It's an 8-bit latch in the lower 8 bits of the word.
*/
-#define CFG_LBC_CFGLATCH_BASE 0xfb000000 /* Base of config latch */
-#define CFG_BR1_PRELIM 0xfb001801 /* 32-bit port */
-#define CFG_OR1_PRELIM 0xffff0ff7 /* 64K is enough */
+#define CFG_LBC_CFGLATCH_BASE 0xFB000000 /* Base of config latch */
+#define CFG_BR1_PRELIM 0xFB001801 /* 32-bit port */
+#define CFG_OR1_PRELIM 0xFFFF0FF7 /* 64K is enough */
-#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
+#define CFG_MONITOR_BASE TEXT_BASE /* start of monitor */
#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
#define CFG_RAMBOOT
#else
-#undef CFG_RAMBOOT
+#undef CFG_RAMBOOT
#endif
#ifdef CFG_RAMBOOT
-#define CFG_CCSRBAR_DEFAULT 0x40000000 /* CCSRBAR by BDI cfg */
+#define CFG_CCSRBAR_DEFAULT 0x40000000 /* CCSRBAR by BDI cfg */
#else
-#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
+#define CFG_CCSRBAR_DEFAULT 0xff700000 /* CCSRBAR Default */
#endif
-#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
+#define CFG_CCSRBAR 0xe0000000 /* relocated CCSRBAR */
#define CFG_IMMR CFG_CCSRBAR /* PQII uses CFG_IMMR */
@@ -136,14 +140,14 @@
#define CFG_DDR_SDRAM_BASE 0x00000000 /* DDR is system memory */
#define CFG_SDRAM_BASE CFG_DDR_SDRAM_BASE
-#define SPD_EEPROM_ADDRESS 0x54 /* DDR DIMM */
+#define SPD_EEPROM_ADDRESS 0x54 /* DDR DIMM */
#undef CONFIG_CLOCKS_IN_MHZ
/* local bus definitions */
-#define CFG_BR2_PRELIM 0xf8001861 /* 64MB localbus SDRAM */
+#define CFG_BR2_PRELIM 0xf8001861 /* 64MB localbus SDRAM */
#define CFG_OR2_PRELIM 0xfc006901
-#define CFG_LBC_LCRR 0x00030004 /* local bus freq */
+#define CFG_LBC_LCRR 0x00030004 /* local bus freq */
#define CFG_LBC_LBCR 0x00000000
#define CFG_LBC_LSRT 0x20000000
#define CFG_LBC_MRTPR 0x20000000
@@ -154,52 +158,52 @@
#define CFG_LBC_LSDMR_5 0x4061b723
#define CONFIG_L1_INIT_RAM
-#define CFG_INIT_RAM_LOCK 1
-#define CFG_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */
-#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
+#define CFG_INIT_RAM_LOCK 1
+#define CFG_INIT_RAM_ADDR 0x60000000 /* Initial RAM address */
+#define CFG_INIT_RAM_END 0x4000 /* End of used area in RAM */
-#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
+#define CFG_GBL_DATA_SIZE 128 /* num bytes initial data */
#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
-#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
-#define CFG_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Mon */
+#define CFG_MALLOC_LEN (512 * 1024) /* Reserved for malloc */
/* Serial Port */
#define CONFIG_CONS_INDEX 2
#undef CONFIG_SERIAL_SOFTWARE_FIFO
#define CFG_NS16550
#define CFG_NS16550_SERIAL
-#define CFG_NS16550_REG_SIZE 1
+#define CFG_NS16550_REG_SIZE 1
#define CFG_NS16550_CLK get_bus_freq(0)
#define CFG_BAUDRATE_TABLE \
{300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 115200}
-#define CFG_NS16550_COM1 (CFG_CCSRBAR+0x4500)
-#define CFG_NS16550_COM2 (CFG_CCSRBAR+0x4600)
+#define CFG_NS16550_COM1 (CFG_CCSRBAR+0x4500)
+#define CFG_NS16550_COM2 (CFG_CCSRBAR+0x4600)
#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
#define CFG_HUSH_PARSER 1 /* Use the HUSH parser */
-#ifdef CFG_HUSH_PARSER
+#ifdef CFG_HUSH_PARSER
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
/* I2C */
#define CONFIG_FSL_I2C /* Use FSL common I2C driver */
-#define CONFIG_HARD_I2C /* I2C with hardware support*/
+#define CONFIG_HARD_I2C /* I2C with hardware support*/
#undef CONFIG_SOFT_I2C /* I2C bit-banged */
#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
#define CFG_I2C_SLAVE 0x7F
#if 0
-#define CFG_I2C_NOPROBES {0x00} /* Don't probe these addrs */
+#define CFG_I2C_NOPROBES {0x00} /* Don't probe these addrs */
#else
/* I did the 'if 0' so we could keep the syntax above if ever needed. */
#undef CFG_I2C_NOPROBES
#endif
#define CFG_I2C_OFFSET 0x3000
-/* I2C EEPROM. AT24C32, we keep our environment in here.
+/* I2C EEPROM. AT24C32, we keep our environment in here.
*/
#define CFG_I2C_EEPROM_ADDR 0x51 /* 1010001x */
#define CFG_I2C_EEPROM_ADDR_LEN 2
@@ -226,49 +230,50 @@
#define CFG_PCI2_IO_SIZE 0x01000000 /* 16M */
#if defined(CONFIG_PCI) /* PCI Ethernet card */
-
+#define CONFIG_MPC85XX_PCI2 1
#define CONFIG_NET_MULTI
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#undef CONFIG_EEPRO100
-#undef CONFIG_TULIP
+#define CONFIG_EEPRO100
+#define CONFIG_TULIP
#if !defined(CONFIG_PCI_PNP)
- #define PCI_ENET0_IOADDR 0xe0000000
- #define PCI_ENET0_MEMADDR 0xe0000000
- #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
+ #define PCI_ENET0_IOADDR 0xe0000000
+ #define PCI_ENET0_MEMADDR 0xe0000000
+ #define PCI_IDSEL_NUMBER 0x0c /* slot0->3(IDSEL)=12->15 */
#endif
-#undef CONFIG_PCI_SCAN_SHOW
-#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
+#define CONFIG_PCI_SCAN_SHOW
+#define CFG_PCI_SUBSYS_VENDORID 0x1057 /* Motorola */
#endif /* CONFIG_PCI */
#if defined(CONFIG_TSEC_ENET)
#ifndef CONFIG_NET_MULTI
-#define CONFIG_NET_MULTI 1
+#define CONFIG_NET_MULTI 1
#endif
#define CONFIG_MII 1 /* MII PHY management */
-#define CONFIG_MPC85XX_TSEC1 1
-#define CONFIG_MPC85XX_TSEC1_NAME "TSEC0"
-#define CONFIG_MPC85XX_TSEC2 1
-#define CONFIG_MPC85XX_TSEC2_NAME "TSEC1"
-#undef CONFIG_MPS85XX_FEC
+#define CONFIG_TSEC1 1
+#define CONFIG_TSEC1_NAME "TSEC0"
+#define CONFIG_TSEC2 1
+#define CONFIG_TSEC2_NAME "TSEC1"
#define TSEC1_PHY_ADDR 2
#define TSEC2_PHY_ADDR 4
#define TSEC1_PHYIDX 0
#define TSEC2_PHYIDX 0
+#define TSEC1_FLAGS TSEC_GIGABIT
+#define TSEC2_FLAGS TSEC_GIGABIT
#define CONFIG_ETHPRIME "TSEC0"
#elif defined(CONFIG_ETHER_ON_FCC) /* CPM FCC Ethernet */
-#define CONFIG_ETHER_ON_FCC2 /* define if ether on FCC */
-#undef CONFIG_ETHER_NONE /* define if ether on something else */
-#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
+#define CONFIG_ETHER_ON_FCC2 /* define if ether on FCC */
+#undef CONFIG_ETHER_NONE /* define if ether on something else */
+#define CONFIG_ETHER_INDEX 2 /* which channel for ether */
#if (CONFIG_ETHER_INDEX == 2)
/*
@@ -277,19 +282,19 @@
* - Select bus for bd/buffers
* - Full duplex
*/
- #define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
- #define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
- #define CFG_CPMFCR_RAMTYPE 0
+ #define CFG_CMXFCR_MASK (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
+ #define CFG_CMXFCR_VALUE (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
+ #define CFG_CPMFCR_RAMTYPE 0
#if 0
- #define CFG_FCC_PSMR (FCC_PSMR_FDE)
+ #define CFG_FCC_PSMR (FCC_PSMR_FDE)
#else
- #define CFG_FCC_PSMR 0
+ #define CFG_FCC_PSMR 0
#endif
#define FETH2_RST 0x01
#elif (CONFIG_ETHER_INDEX == 3)
/* need more definitions here for FE3 */
#define FETH3_RST 0x80
-#endif /* CONFIG_ETHER_INDEX */
+#endif /* CONFIG_ETHER_INDEX */
/* MDIO is done through the TSEC0 control.
*/
@@ -300,17 +305,20 @@
/* Environment - default config is in flash, see below */
#if 0 /* in EEPROM */
-#define CFG_ENV_IS_IN_EEPROM 1
-#define CFG_ENV_OFFSET 0
-#define CFG_ENV_SIZE 2048
+# define CFG_ENV_IS_IN_EEPROM 1
+# define CFG_ENV_OFFSET 0
+# define CFG_ENV_SIZE 2048
#else /* in flash */
-#define CFG_ENV_IS_IN_FLASH 1
-#define CFG_ENV_SECT_SIZE 0x40000
-
-#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE 0x4000
-#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR - CFG_ENV_SECT_SIZE)
-#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+# define CFG_ENV_IS_IN_FLASH 1
+# ifdef CONFIG_STXSSA_4M
+# define CFG_ENV_SECT_SIZE 0x20000
+# else /* default configuration - 64 MiB flash */
+# define CFG_ENV_SECT_SIZE 0x40000
+# endif
+# define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SECT_SIZE)
+# define CFG_ENV_SIZE 0x4000
+# define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR - CFG_ENV_SECT_SIZE)
+# define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
#endif
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
@@ -318,34 +326,39 @@
#define CONFIG_TIMESTAMP /* Print image info with ts */
-#if defined(CFG_RAMBOOT)
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV | \
- CFG_CMD_LOADS ))
- #elif defined(CONFIG_TSEC_ENET)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_PING | \
- CFG_CMD_MII | CFG_CMD_I2C ) & \
- ~(CFG_CMD_ENV))
- #elif defined(CONFIG_ETHER_ON_FCC)
- #define CONFIG_COMMANDS ((CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_PING | CFG_CMD_I2C) & \
- ~(CFG_CMD_ENV))
- #endif
-#else
- #if defined(CONFIG_PCI)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | \
- CFG_CMD_ELF | CFG_CMD_PING | CFG_CMD_I2C)
- #elif defined(CONFIG_TSEC_ENET)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING | \
- CFG_CMD_ELF | CFG_CMD_MII | CFG_CMD_I2C)
- #elif defined(CONFIG_ETHER_ON_FCC)
- #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MII | \
- CFG_CMD_ELF | CFG_CMD_PING | CFG_CMD_I2C)
- #endif
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_I2C
+
+#if defined(CONFIG_PCI)
+ #define CONFIG_CMD_PCI
#endif
-#include <cmd_confdefs.h>
+
+#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+ #define CONFIG_CMD_MII
+#endif
+
+#if defined(CFG_RAMBOOT)
+ #undef CONFIG_CMD_ENV
+ #undef CONFIG_CMD_LOADS
+#else
+ #define CONFIG_CMD_ELF
+#endif
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -354,7 +367,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "SSA=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -375,7 +388,7 @@
/* Cache Configuration */
#define CFG_DCACHE_SIZE 32768
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -387,13 +400,14 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
/*Note: change below for your network setting!!! */
#if defined(CONFIG_TSEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
+#define CONFIG_HAS_ETH0
#define CONFIG_ETHADDR 00:e0:0c:07:9b:8a
#define CONFIG_HAS_ETH1
#define CONFIG_ETH1ADDR 00:e0:0c:07:9b:8b
@@ -408,13 +422,13 @@
*/
#ifdef CFG_ENV_IS_IN_EEPROM /* use restricted "standard" environment */
-#define CONFIG_BAUDRATE 38400
+#define CONFIG_BAUDRATE 38400
#define CONFIG_BOOTDELAY 3 /* -1 disable autoboot */
#define CONFIG_BOOTCOMMAND "bootm 0xffc00000 0xffd00000"
#define CONFIG_BOOTARGS "root=/dev/nfs rw ip=any console=ttyS1,$baudrate"
#define CONFIG_SERVERIP 192.168.85.1
-#define CONFIG_IPADDR 192.168.85.60
+#define CONFIG_IPADDR 192.168.85.60
#define CONFIG_GATEWAYIP 192.168.85.1
#define CONFIG_NETMASK 255.255.255.0
#define CONFIG_HOSTNAME STX_SSA
@@ -424,7 +438,7 @@
#else /* ENV IS IN FLASH -- use a full-blown envionment */
-#define CONFIG_BAUDRATE 115200
+#define CONFIG_BAUDRATE 115200
#define CONFIG_BOOTDELAY 5 /* -1 disable autoboot */
diff --git a/include/configs/stxxtc.h b/include/configs/stxxtc.h
index 614a046..b035857 100644
--- a/include/configs/stxxtc.h
+++ b/include/configs/stxxtc.h
@@ -77,7 +77,16 @@
#define CONFIG_STATUS_LED 1 /* Status LED enabled */
#define CONFIG_BOARD_SPECIFIC_LED /* version has board specific leds */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE | CONFIG_BOOTP_NISDOMAIN)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_NISDOMAIN
+
#undef CONFIG_MAC_PARTITION
#undef CONFIG_DOS_PARTITION
@@ -100,19 +109,22 @@
#define CONFIG_ENV_OVERWRITE 1 /* allow modification of vendor params */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_NAND | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_MII | \
- CFG_CMD_NFS)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NAND
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+
#define CONFIG_BOARD_EARLY_INIT_F 1
#define CONFIG_MISC_INIT_R
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -122,7 +134,7 @@
#define CFG_HUSH_PARSER 1
#define CFG_PROMPT_HUSH_PS2 "> "
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -213,7 +225,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
@@ -580,9 +592,6 @@
/* pass open firmware flat tree */
#define CONFIG_OF_FLAT_TREE 1
-/* maximum size of the flat tree (8K) */
-#define OF_FLAT_TREE_MAX_SIZE 8192
-
#define OF_CPU "PowerPC,MPC870@0"
#define OF_TBCLK (MPC8XX_HZ / 16)
#define CONFIG_OF_HAS_BD_T 1
diff --git a/include/configs/suzaku.h b/include/configs/suzaku.h
index 8224555..08ac9cb 100644
--- a/include/configs/suzaku.h
+++ b/include/configs/suzaku.h
@@ -55,10 +55,21 @@
#define MICROBLAZE_SYSREG_BASE_ADDR 0xFFFFA000
#define MICROBLAZE_SYSREG_RECONFIGURE (1 << 0)
-#define CONFIG_COMMANDS (CONFIG__CMD_DFL)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#define CFG_UART1_BASE (0xFFFF2000)
#define CONFIG_SERIAL_BASE CFG_UART1_BASE
diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h
index 92ee8cb..3b90f3c 100644
--- a/include/configs/svm_sc8xx.h
+++ b/include/configs/svm_sc8xx.h
@@ -125,22 +125,32 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DOC | \
-/* CFG_CMD_IDE |*/ \
- CFG_CMD_DATE )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DOC
+#define CONFIG_CMD_DATE
+
+
#define CFG_NAND_LEGACY
/*
@@ -153,7 +163,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -246,7 +256,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/taihu.h b/include/configs/taihu.h
new file mode 100644
index 0000000..d623e56
--- /dev/null
+++ b/include/configs/taihu.h
@@ -0,0 +1,476 @@
+/*
+ * (C) Copyright 2000-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2005-2007
+ * Beijing UD Technology Co., Ltd., taihusupport@amcc.com
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+
+#define CONFIG_405EP 1 /* this is a PPC405 CPU */
+#define CONFIG_4xx 1 /* member of PPC4xx family */
+#define CONFIG_TAIHU 1 /* on a taihu board */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* call board_early_init_f */
+
+#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
+
+#define CONFIG_NO_SERIAL_EEPROM
+
+/*----------------------------------------------------------------------------*/
+#ifdef CONFIG_NO_SERIAL_EEPROM
+
+/*
+!-------------------------------------------------------------------------------
+! PLL settings for 333MHz CPU, 111MHz PLB/SDRAM, 55MHz EBC, 33MHz PCI,
+! assuming a 33MHz input clock to the 405EP from the C9531.
+!-------------------------------------------------------------------------------
+*/
+#define PLLMR0_333_111_55_37 (PLL_CPUDIV_1 | PLL_PLBDIV_3 | \
+ PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \
+ PLL_MALDIV_1 | PLL_PCIDIV_3)
+#define PLLMR1_333_111_55_37 (PLL_FBKDIV_10 | \
+ PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
+ PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
+#define PLLMR0_333_111_55_111 (PLL_CPUDIV_1 | PLL_PLBDIV_3 | \
+ PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \
+ PLL_MALDIV_1 | PLL_PCIDIV_1)
+#define PLLMR1_333_111_55_111 (PLL_FBKDIV_10 | \
+ PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
+ PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
+
+#define PLLMR0_DEFAULT PLLMR0_333_111_55_37
+#define PLLMR1_DEFAULT PLLMR1_333_111_55_37
+#define PLLMR0_DEFAULT_PCI66 PLLMR0_333_111_55_111
+#define PLLMR1_DEFAULT_PCI66 PLLMR1_333_111_55_111
+
+#endif
+/*----------------------------------------------------------------------------*/
+
+#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+
+#define CONFIG_ENV_OVERWRITE 1
+#define CONFIG_PREBOOT "echo;" \
+ "echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
+ "echo"
+
+#undef CONFIG_BOOTARGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "bootfile=/tftpboot/taihu/uImage\0" \
+ "rootpath=/opt/eldk/ppc_4xx\0" \
+ "netdev=eth0\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw " \
+ "nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0,${baudrate}\0"\
+ "flash_nfs=run nfsargs addip addtty;" \
+ "bootm ${kernel_addr}\0" \
+ "flash_self=run ramargs addip addtty;" \
+ "bootm ${kernel_addr} ${ramdisk_addr}\0" \
+ "net_nfs=tftp 200000 ${bootfile};run nfsargs addip addtty;" \
+ "bootm\0" \
+ "kernel_addr=FC000000\0" \
+ "ramdisk_addr=FC180000\0" \
+ "load=tftp 200000 /tftpboot/taihu/u-boot.bin\0" \
+ "update=protect off FFFC0000 FFFFFFFF;era FFFC0000 FFFFFFFF;" \
+ "cp.b 200000 FFFC0000 40000\0" \
+ "upd=run load;run update\0" \
+ ""
+#define CONFIG_BOOTCOMMAND "run flash_self"
+
+#if 0
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_PHY_ADDR 0x14 /* PHY address */
+#define CONFIG_HAS_ETH1
+#define CONFIG_PHY1_ADDR 0x10 /* EMAC1 PHY address */
+#define CONFIG_NET_MULTI 1
+#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
+#define CONFIG_PHY_RESET 1
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SPI
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+#undef CONFIG_SPD_EEPROM /* use SPD EEPROM for setup */
+#define CFG_SDRAM_SIZE_PER_BANK 0x04000000 /* 64MB */
+#define CFG_SDRAM_BANKS 2
+
+/*
+ * SDRAM configuration (please see cpu/ppc/sdram.[ch])
+ */
+#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
+#define CONFIG_SDRAM_BANK1 1 /* init onboard SDRAM bank 1 */
+
+/* SDRAM timings used in datasheet */
+#define CFG_SDRAM_CL 3 /* CAS latency */
+#define CFG_SDRAM_tRP 20 /* PRECHARGE command period */
+#define CFG_SDRAM_tRC 66 /* ACTIVE-to-ACTIVE command period */
+#define CFG_SDRAM_tRCD 20 /* ACTIVE-to-READ delay */
+#define CFG_SDRAM_tRFC 66 /* Auto refresh period */
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* print buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+/*
+ * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
+ * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
+ * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
+ * The Linux BASE_BAUD define should match this configuration.
+ * baseBaud = cpuClock/(uartDivisor*16)
+ * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
+ * set Linux BASE_BAUD to 403200.
+ */
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
+#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
+#define CFG_BASE_BAUD 691200
+
+#define CONFIG_BAUDRATE 115200
+
+#define CONFIG_UART1_CONSOLE 1
+
+/* The following table includes the supported baudrates */
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_AUTO_COMPLETE 1 /* add autocompletion support */
+#define CONFIG_LOOPW 1 /* enable loopw command */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
+/*-----------------------------------------------------------------------
+ * I2C stuff
+ *-----------------------------------------------------------------------
+ */
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+#define CFG_I2C_NOPROBES { 0x69 } /* avoid iprobe hangup (why?) */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 6 /* 24C02 requires 5ms delay */
+
+#define CFG_I2C_EEPROM_ADDR 0x50 /* I2C boot EEPROM (24C02W) */
+#define CFG_I2C_EEPROM_ADDR_LEN 1 /* Bytes of address */
+
+#define CONFIG_SOFT_SPI
+#define SPI_SCL spi_scl
+#define SPI_SDA spi_sda
+#define SPI_READ spi_read()
+#define SPI_DELAY udelay(2)
+#ifndef __ASSEMBLY__
+void spi_scl(int);
+void spi_sda(int);
+unsigned char spi_read(void);
+#endif
+
+/* standard dtt sensor configuration */
+#define CONFIG_DTT_DS1775 1
+#define CONFIG_DTT_SENSORS { 0 }
+
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ *-----------------------------------------------------------------------
+ */
+#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
+#define PCI_HOST_FORCE 1 /* configure as pci host */
+#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
+
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
+#define CONFIG_PCI_PNP /* do pci plug-and-play */
+ /* resource configuration */
+#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
+
+#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
+#define CFG_PCI_SUBSYS_DEVICEID 0xcafe /* Whatever */
+#define CFG_PCI_CLASSCODE 0x0600 /* PCI Class Code: bridge/host */
+#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
+#define CFG_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
+#define CFG_PCI_PTM2LA 0x00000000 /* disabled */
+#define CFG_PCI_PTM2MS 0x00000000 /* disabled */
+#define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
+#define CONFIG_EEPRO100 1
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0xFFE00000
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
+#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+
+#define CFG_MAX_FLASH_BANKS 2 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_ADDR0 0x555
+#define CFG_FLASH_ADDR1 0x2aa
+#define CFG_FLASH_WORD_SIZE unsigned short
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
+#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#endif /* CFG_ENV_IS_IN_FLASH */
+
+/*-----------------------------------------------------------------------
+ * NVRAM organization
+ */
+#define CFG_NVRAM_BASE_ADDR 0xf0000000 /* NVRAM base address */
+#define CFG_NVRAM_SIZE 0x1ff8 /* NVRAM size */
+
+#ifdef CFG_ENV_IS_IN_NVRAM
+#define CFG_ENV_SIZE 0x0ff8 /* Size of Environment vars */
+#define CFG_ENV_ADDR \
+ (CFG_NVRAM_BASE_ADDR+CFG_NVRAM_SIZE-CFG_ENV_SIZE) /* Env*/
+#endif
+
+/*-----------------------------------------------------------------------
+ * PPC405 GPIO Configuration
+ */
+#define CFG_440_GPIO_TABLE { /* GPIO Alternate1 */ \
+{ \
+/* GPIO Core 0 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO0 PerBLast SPI CS */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO1 TS1E */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO2 TS2E */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO3 TS1O */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO4 TS2O */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO5 TS3 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO6 TS4 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO7 TS5 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO8 TS6 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO9 TrcClk */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO10 PerCS1 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO11 PerCS2 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO12 PerCS3 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO13 PerCS4 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO14 PerAddr03 SPI SCLK */ \
+{ GPIO_BASE, GPIO_IN, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO15 PerAddr04 SPI DI */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO16 PerAddr05 SPI DO */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO17 IRQ0 PCI INTA */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO18 IRQ1 PCI INTB */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO19 IRQ2 PCI INTC */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO20 IRQ3 PCI INTD */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO21 IRQ4 USB */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO22 IRQ5 EBC */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO23 IRQ6 unused */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO24 UART0_DCD UART1 */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO25 UART0_DSR */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO26 UART0_RI */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO27 UART0_DTR */ \
+{ GPIO_BASE, GPIO_IN, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO28 UART1_Rx UART0 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_ALT1, GPIO_OUT_NO_CHG }, /* GPIO29 UART1_Tx */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO30 RejectPkt0 User LED1 */ \
+{ GPIO_BASE, GPIO_OUT, GPIO_SEL, GPIO_OUT_NO_CHG }, /* GPIO31 RejectPkt1 User LED2 */ \
+} \
+}
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE 16384 /* For IBM 405EP CPU */
+#define CFG_CACHELINE_SIZE 32
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+
+/*
+ * Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0xFC000000 /* FLASH bank #1 */
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in data cache)
+ */
+/* use on chip memory (OCM) for temperary stack until sdram is tested */
+#define CFG_TEMP_STACK_OCM 1
+
+/* On Chip Memory location */
+#define CFG_OCM_DATA_ADDR 0xF8000000
+#define CFG_OCM_DATA_SIZE 0x1000
+#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of SDRAM */
+#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+#define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ */
+
+/* Memory Bank 0 (Flash/SRAM) initialization */
+#define CFG_EBC_PB0AP 0x03815600
+#define CFG_EBC_PB0CR 0xFFE3A000 /* BAS=0xFFE,BS=2MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 1 (NVRAM/RTC) initialization */
+#define CFG_EBC_PB1AP 0x05815600
+#define CFG_EBC_PB1CR 0xFC0BA000 /* BAS=0xFc0,BS=32MB,BU=R/W,BW=16bit */
+
+/* Memory Bank 2 (USB device) initialization */
+#define CFG_EBC_PB2AP 0x03016600
+#define CFG_EBC_PB2CR 0x50018000 /* BAS=0x500,BS=1MB,BU=R/W,BW=8bit */
+
+/* Memory Bank 3 (LCM and D-flip-flop) initialization */
+#define CFG_EBC_PB3AP 0x158FF600
+#define CFG_EBC_PB3CR 0x50118000 /* BAS=0x501,BS=1MB,BU=R/W,BW=8bit */
+
+/* Memory Bank 4 (not install) initialization */
+#define CFG_EBC_PB4AP 0x158FF600
+#define CFG_EBC_PB4CR 0x5021A000
+
+/*-----------------------------------------------------------------------
+ * Definitions for GPIO setup (PPC405EP specific)
+ *
+ * GPIO0[0] - External Bus Controller BLAST output
+ * GPIO0[1-9] - Instruction trace outputs
+ * GPIO0[10-13] - External Bus Controller CS_1 - CS_4 outputs
+ * GPIO0[14-16] - External Bus Controller ABUS3-ABUS5 outputs
+ * GPIO0[17-23] - External Interrupts IRQ0 - IRQ6 inputs
+ * GPIO0[24-27] - UART0 control signal inputs/outputs
+ * GPIO0[28-29] - UART1 data signal input/output
+ * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
+ */
+#define CFG_GPIO0_OSRH 0x15555550 /* output select high/low */
+#define CFG_GPIO0_OSRL 0x00000110
+#define CFG_GPIO0_ISR1H 0x00000001 /* input select high/low */
+#define CFG_GPIO0_ISR1L 0x15545440
+#define CFG_GPIO0_TSRH 0x00000000 /* three-state select high/low */
+#define CFG_GPIO0_TSRL 0x00000000
+#define CFG_GPIO0_TCR 0xFFFE8117 /* three-state control */
+#define CFG_GPIO0_ODR 0x00000000 /* open drain */
+
+#define GPIO0 0 /* GPIO controller 0 */
+
+/* the GPIO macros in include/ppc405.h for High/Low registers are backwards */
+
+#define GPIOx_OSL (GPIO0_OSRH-GPIO_BASE)
+#define GPIOx_TSL (GPIO0_TSRH-GPIO_BASE)
+#define GPIOx_IS1L (GPIO0_ISR1H-GPIO_BASE)
+#define GPIOx_IS2L (GPIO0_ISR1H-GPIO_BASE)
+#define GPIOx_IS3L (GPIO0_ISR1H-GPIO_BASE)
+
+#define GPIO_OS(x) (x+GPIOx_OSL) /* GPIO output select */
+#define GPIO_TS(x) (x+GPIOx_TSL) /* GPIO three-state select */
+#define GPIO_IS1(x) (x+GPIOx_IS1L) /* GPIO input select */
+#define GPIO_IS2(x) (x+GPIOx_IS1L)
+#define GPIO_IS3(x) (x+GPIOx_IS1L)
+
+#define CPLD_REG0_ADDR 0x50100000
+#define CPLD_REG1_ADDR 0x50100001
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/taishan.h b/include/configs/taishan.h
index 2b28f93..baa4fbd 100644
--- a/include/configs/taishan.h
+++ b/include/configs/taishan.h
@@ -30,6 +30,7 @@
*----------------------------------------------------------------------*/
#define CONFIG_TAISHAN 1 /* Board is taishan */
#define CONFIG_440GX 1 /* Specifc GX support */
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#undef CFG_DRAM_TEST /* Disable-takes long time! */
#define CONFIG_SYS_CLK_FREQ 33333333 /* external freq to pll */
@@ -217,8 +218,8 @@
#define CONFIG_EMAC_NR_START 2 /* start with EMAC 2 (skip 0&1) */
#define CONFIG_MII 1 /* MII PHY management */
#define CONFIG_NET_MULTI 1
-#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
-#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */
+#define CONFIG_PHY_ADDR 0xff /* no phy on EMAC0 */
+#define CONFIG_PHY1_ADDR 0xff /* no phy on EMAC1 */
#define CONFIG_PHY2_ADDR 0x1
#define CONFIG_PHY3_ADDR 0x3
#define CONFIG_ET1011C_PHY 1
@@ -233,27 +234,36 @@
#define CONFIG_NETCONSOLE /* include NetConsole support */
-/*-----------------------------------------------------------------------
- * Console/Commands/Parser
- *----------------------------------------------------------------------*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_DTT | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -262,7 +272,7 @@
*----------------------------------------------------------------------*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -297,7 +307,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE */
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#define CFG_PCI_SUBSYS_VENDORID 0x10e8 /* AMCC */
@@ -315,7 +324,7 @@
*----------------------------------------------------------------------*/
#define CFG_DCACHE_SIZE 32768 /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -327,7 +336,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/tb0229.h b/include/configs/tb0229.h
index dac1eb7..a21af21 100644
--- a/include/configs/tb0229.h
+++ b/include/configs/tb0229.h
@@ -87,13 +87,27 @@
/*#define CONFIG_BOOTCOMMAND "run flash_local" */
#define CONFIG_BOOTCOMMAND "run netboot"
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_PCI | \
- CFG_CMD_ELF )
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_ELF
+
/*
* Miscellaneous configurable options
diff --git a/include/configs/trab.h b/include/configs/trab.h
index a2dc8e7..b9088a8 100644
--- a/include/configs/trab.h
+++ b/include/configs/trab.h
@@ -80,10 +80,17 @@
#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
/* USB stuff */
-#define CONFIG_USB_OHCI 1
+#define CONFIG_USB_OHCI_NEW 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_DOS_PARTITION 1
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT 1
+
+#define CFG_USB_OHCI_REGS_BASE 0x14200000
+#define CFG_USB_OHCI_SLOT_NAME "s3c2400"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
+
/*
* Size of malloc() pool
*/
@@ -130,60 +137,50 @@
/* Use s3c2400's RTC */
#define CONFIG_RTC_S3C24X0 1
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BSP
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+#define CONFIG_CMD_USB
+
#ifdef CONFIG_HWFLOW
-#define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
-#else
-#define CONFIG_COMMANDS_ADD_HWFLOW 0
+ #define CONFIG_CMD_HWFLOW
#endif
#ifdef CONFIG_VFD
-#define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
-#else
-#define CONFIG_COMMANDS_ADD_VFD 0
+ #define CONFIG_CMD_VFD
#endif
#ifdef CONFIG_DRIVER_S3C24X0_I2C
-#define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
-#define CONFIG_COMMANDS_I2C CFG_CMD_I2C
-#else
-#define CONFIG_COMMANDS_ADD_EEPROM 0
-#define CONFIG_COMMANDS_I2C 0
+ #define CONFIG_CMD_EEPROM
+ #define CONFIG_CMD_I2C
#endif
#ifndef USE_920T_MMU
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
- CONFIG_COMMANDS_ADD_HWFLOW | \
- CONFIG_COMMANDS_ADD_VFD | \
- CONFIG_COMMANDS_ADD_EEPROM | \
- CONFIG_COMMANDS_I2C | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_FAT | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP | \
- CFG_CMD_USB )
-#else
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CONFIG_COMMANDS_ADD_HWFLOW | \
- CONFIG_COMMANDS_ADD_VFD | \
- CONFIG_COMMANDS_ADD_EEPROM | \
- CONFIG_COMMANDS_I2C | \
- CFG_CMD_BSP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_FAT | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP | \
- CFG_CMD_USB )
+ #undef CONFIG_CMD_CACHE
#endif
+
/* moved up */
#define CFG_HUSH_PARSER 1 /* use "hush" command parser */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
#define CONFIG_BOOTDELAY 5
#define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
#define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
@@ -296,7 +293,7 @@
#define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
/* what's this ? it's not used anywhere */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
@@ -422,6 +419,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/* Initial value of the on-board touch screen brightness */
#define CFG_BRIGHTNESS 0x20
diff --git a/include/configs/trizepsiv.h b/include/configs/trizepsiv.h
new file mode 100644
index 0000000..84998d4
--- /dev/null
+++ b/include/configs/trizepsiv.h
@@ -0,0 +1,325 @@
+/*
+ * (C) Copyright 2007
+ * Stefano Babic, DENX Gmbh, sbabic@denx.de
+ *
+ * (C) Copyright 2004
+ * Robert Whaley, Applied Data Systems, Inc. rwhaley@applieddata.net
+ *
+ * (C) Copyright 2002
+ * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
+ *
+ * (C) Copyright 2002
+ * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
+ * Marius Groeger <mgroeger@sysgo.de>
+ *
+ * Configuation settings for the LUBBOCK board.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options
+ * (easy to change)
+ */
+#define CONFIG_PXA27X 1 /* This is an PXA27x CPU */
+
+#define LITTLEENDIAN 1 /* used by usb_ohci.c */
+
+#define CONFIG_MMC 1
+#define BOARD_LATE_INIT 1
+
+#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
+
+#define RTC
+
+/*
+ * Size of malloc() pool
+ */
+#define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+
+/*
+ * Hardware drivers
+ */
+
+/*
+ * select serial console configuration
+ */
+#define CONFIG_SERIAL_MULTI
+#define CONFIG_FFUART 1 /* we use FFUART on Conxs */
+#define CONFIG_BTUART 1 /* we use BTUART on Conxs */
+#define CONFIG_STUART 1 /* we use STUART on Conxs */
+
+/* allow to overwrite serial and ethaddr */
+#define CONFIG_ENV_OVERWRITE
+
+#define CONFIG_BAUDRATE 38400
+
+#define CONFIG_DOS_PARTITION 1
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_IMLS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_USB
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+
+#undef CONFIG_SHOW_BOOT_PROGRESS
+
+#define CONFIG_BOOTDELAY 3
+#define CONFIG_SERVERIP 192.168.1.99
+#define CONFIG_BOOTCOMMAND "run boot_flash"
+#define CONFIG_BOOTARGS "console=ttyS0,38400 ramdisk_size=12288"\
+ " rw root=/dev/ram initrd=0xa0800000,5m"
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "program_boot_mmc=" \
+ "mw.b 0xa0010000 0xff 0x20000; " \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0010000 u-boot.bin; " \
+ "then " \
+ "protect off 0x0 0x1ffff; " \
+ "erase 0x0 0x1ffff; " \
+ "cp.b 0xa0010000 0x0 0x20000; " \
+ "fi\0" \
+ "program_uzImage_mmc=" \
+ "mw.b 0xa0010000 0xff 0x180000; " \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0010000 uzImage; " \
+ "then " \
+ "protect off 0x40000 0x1bffff; " \
+ "erase 0x40000 0x1bffff; " \
+ "cp.b 0xa0010000 0x40000 0x180000; " \
+ "fi\0" \
+ "program_ramdisk_mmc=" \
+ "mw.b 0xa0010000 0xff 0x500000; " \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0010000 ramdisk.gz; " \
+ "then " \
+ "protect off 0x1c0000 0x6bffff; " \
+ "erase 0x1c0000 0x6bffff; " \
+ "cp.b 0xa0010000 0x1c0000 0x500000; " \
+ "fi\0" \
+ "boot_mmc=" \
+ "if mmcinit && " \
+ "fatload mmc 0 0xa0030000 uzImage && " \
+ "fatload mmc 0 0xa0800000 ramdisk.gz; " \
+ "then " \
+ "bootm 0xa0030000; " \
+ "fi\0" \
+ "boot_flash=" \
+ "cp.b 0x1c0000 0xa0800000 0x500000; " \
+ "bootm 0x40000\0" \
+
+#define CONFIG_SETUP_MEMORY_TAGS 1
+#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
+/* #define CONFIG_INITRD_TAG 1 */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_HUSH_PARSER 1
+#define CFG_PROMPT_HUSH_PS2 "> "
+
+#define CFG_LONGHELP /* undef to save memory */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT "$ " /* Monitor Command Prompt */
+#else
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#endif
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+#define CFG_DEVICE_NULLDEV 1
+
+#define CFG_MEMTEST_START 0xa0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
+
+#undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
+
+#define CFG_LOAD_ADDR 0xa1000000 /* default load address */
+
+#define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */
+#define CFG_CPUSPEED 0x207 /* need to look more closely, I think this is Turbo = 2x, L=91Mhz */
+
+ /* valid baudrates */
+#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
+
+#define CFG_MMC_BASE 0xF0000000
+
+/*
+ * Stack sizes
+ *
+ * The stack sizes are set up in start.S using the settings below
+ */
+#define CONFIG_STACKSIZE (128*1024) /* regular stack */
+#ifdef CONFIG_USE_IRQ
+#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
+#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
+#endif
+
+/*
+ * Physical Memory Map
+ */
+#define CONFIG_NR_DRAM_BANKS 4 /* we have 2 banks of DRAM */
+#define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
+#define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
+#define PHYS_SDRAM_2 0xa4000000 /* SDRAM Bank #2 */
+#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_3 0xa8000000 /* SDRAM Bank #3 */
+#define PHYS_SDRAM_3_SIZE 0x00000000 /* 0 MB */
+#define PHYS_SDRAM_4 0xac000000 /* SDRAM Bank #4 */
+#define PHYS_SDRAM_4_SIZE 0x00000000 /* 0 MB */
+
+#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
+
+#define CFG_DRAM_BASE 0xa0000000
+#define CFG_DRAM_SIZE 0x04000000
+
+#define CFG_FLASH_BASE PHYS_FLASH_1
+
+/*
+ * GPIO settings
+ */
+#define CFG_GPSR0_VAL 0x00018000
+#define CFG_GPSR1_VAL 0x00000000
+#define CFG_GPSR2_VAL 0x400dc000
+#define CFG_GPSR3_VAL 0x00000000
+#define CFG_GPCR0_VAL 0x00000000
+#define CFG_GPCR1_VAL 0x00000000
+#define CFG_GPCR2_VAL 0x00000000
+#define CFG_GPCR3_VAL 0x00000000
+#define CFG_GPDR0_VAL 0x00018000
+#define CFG_GPDR1_VAL 0x00028801
+#define CFG_GPDR2_VAL 0x520dc000
+#define CFG_GPDR3_VAL 0x0001E000
+#define CFG_GAFR0_L_VAL 0x801c0000
+#define CFG_GAFR0_U_VAL 0x00000013
+#define CFG_GAFR1_L_VAL 0x6990100A
+#define CFG_GAFR1_U_VAL 0x00000008
+#define CFG_GAFR2_L_VAL 0xA0000000
+#define CFG_GAFR2_U_VAL 0x010900F2
+#define CFG_GAFR3_L_VAL 0x54000003
+#define CFG_GAFR3_U_VAL 0x00002401
+#define CFG_GRER0_VAL 0x00000000
+#define CFG_GRER1_VAL 0x00000000
+#define CFG_GRER2_VAL 0x00000000
+#define CFG_GRER3_VAL 0x00000000
+#define CFG_GFER0_VAL 0x00000000
+#define CFG_GFER1_VAL 0x00000000
+#define CFG_GFER2_VAL 0x00000000
+#define CFG_GFER3_VAL 0x00000020
+
+
+#define CFG_PSSR_VAL 0x20 /* CHECK */
+
+/*
+ * Clock settings
+ */
+#define CFG_CKEN 0x01FFFFFF /* CHECK */
+#define CFG_CCCR 0x02000290 /* 520Mhz */
+
+/*
+ * Memory settings
+ */
+
+#define CFG_MSC0_VAL 0x4df84df0
+#define CFG_MSC1_VAL 0x7ff87ff4
+#define CFG_MSC2_VAL 0xa26936d4
+#define CFG_MDCNFG_VAL 0x880009C9
+#define CFG_MDREFR_VAL 0x20ca201e
+#define CFG_MDMRS_VAL 0x00220022
+
+#define CFG_FLYCNFG_VAL 0x00000000
+#define CFG_SXCNFG_VAL 0x40044004
+
+/*
+ * PCMCIA and CF Interfaces
+ */
+#define CFG_MECR_VAL 0x00000001
+#define CFG_MCMEM0_VAL 0x00004204
+#define CFG_MCMEM1_VAL 0x00010204
+#define CFG_MCATT0_VAL 0x00010504
+#define CFG_MCATT1_VAL 0x00010504
+#define CFG_MCIO0_VAL 0x00008407
+#define CFG_MCIO1_VAL 0x0000c108
+
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DRIVER_DM9000 1
+#define CONFIG_DM9000_BASE 0x08000000
+#define DM9000_IO CONFIG_DM9000_BASE
+#define DM9000_DATA (CONFIG_DM9000_BASE+0x8004)
+/* #define CONFIG_DM9000_USE_8BIT */
+/* #define CONFIG_DM9000_USE_16BIT */
+#define CONFIG_DM9000_USE_32BIT
+
+#define CONFIG_USB_OHCI_NEW 1
+#define CFG_USB_OHCI_BOARD_INIT 1
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 3
+#define CFG_USB_OHCI_REGS_BASE 0x4C000000
+#define CFG_USB_OHCI_SLOT_NAME "trizepsiv"
+#define CONFIG_USB_STORAGE 1
+#define CFG_USB_OHCI_CPU_INIT 1
+
+/*
+ * FLASH and environment organization
+ */
+
+#define CFG_FLASH_CFI
+#define CFG_FLASH_CFI_DRIVER 1
+
+#define CFG_MONITOR_BASE 0
+#define CFG_MONITOR_LEN 0x40000
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 4 + 255 /* max number of sectors on one chip */
+
+/* timeout values are in ticks */
+#define CFG_FLASH_ERASE_TOUT (25*CFG_HZ) /* Timeout for Flash Erase */
+#define CFG_FLASH_WRITE_TOUT (25*CFG_HZ) /* Timeout for Flash Write */
+
+/* write flash less slowly */
+#define CFG_FLASH_USE_BUFFER_WRITE 1
+
+/* Flash environment locations */
+#define CFG_ENV_IS_IN_FLASH 1
+#define CFG_ENV_ADDR (PHYS_FLASH_1 + CFG_MONITOR_LEN) /* Addr of Environment Sector */
+#define CFG_ENV_SIZE 0x40000 /* Total Size of Environment */
+#define CFG_ENV_SECT_SIZE 0x40000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/uc100.h b/include/configs/uc100.h
index c4e629a..92148e2 100644
--- a/include/configs/uc100.h
+++ b/include/configs/uc100.h
@@ -98,7 +98,15 @@
#undef CONFIG_STATUS_LED /* no status-led */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
@@ -117,32 +125,32 @@
CFG_POST_SPR )
#undef CONFIG_POST
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_SNTP
+
#ifdef CONFIG_POST
-#define CFG_CMD_POST_DIAG CFG_CMD_DIAG
-#else
-#define CFG_CMD_POST_DIAG 0
+#define CONFIG_CMD_DIAG
#endif
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_MII | \
- CFG_CMD_NFS | \
- CFG_CMD_PING | \
- CFG_CMD_POST_DIAG | \
- CFG_CMD_SNTP )
#define CONFIG_NETCONSOLE
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
@@ -156,7 +164,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -246,7 +254,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/uc101.h b/include/configs/uc101.h
index 8cd8e9b..aed80ec 100644
--- a/include/configs/uc101.h
+++ b/include/configs/uc101.h
@@ -38,11 +38,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
#define CONFIG_BOARD_EARLY_INIT_R
/*
@@ -55,25 +50,34 @@
/* Partitions */
#define CONFIG_DOS_PARTITION
-/*
- * Supported commands
- */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_DATE | \
- CFG_CMD_DISPLAY | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_DTT | \
- CFG_CMD_IDE | \
- CFG_CMD_FAT | \
- CFG_CMD_NFS | \
- CFG_CMD_MII | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DISPLAY
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DTT
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_SNTP
+
#define CONFIG_TIMESTAMP 1 /* Print image info with timestamp */
@@ -114,7 +118,7 @@
/*
* IPB Bus clocking configuration.
*/
-#define CFG_IPBSPEED_133 /* define for 133MHz speed */
+#define CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
/*
* I2C configuration
@@ -245,7 +249,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -264,9 +268,13 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
- * Enable loopw commando. This has only affect, if CFG_CMD_MEM is defined,
- * which is normally part of the default commands (CFV_CMD_DFL)
+ * Enable loopw command.
*/
#define CONFIG_LOOPW
@@ -324,7 +332,6 @@
#define CFG_IDE_MAXDEVICE 2 /* max. 2 drives per IDE bus */
#define CONFIG_IDE_PREINIT 1
-/* #define CONFIG_IDE_RESET 1 beispile siehe tqm5200.c */
#define CFG_ATA_IDE0_OFFSET 0x0000
diff --git a/include/configs/utx8245.h b/include/configs/utx8245.h
index e5d4397..cd00c49 100644
--- a/include/configs/utx8245.h
+++ b/include/configs/utx8245.h
@@ -86,18 +86,36 @@
#define CONFIG_ENV_OVERWRITE
-#define CONFIG_COMMANDS (CFG_CMD_DFL | CFG_CMD_BDI | CFG_CMD_PCI \
- | CFG_CMD_FLASH | CFG_CMD_MEMORY \
- | CFG_CMD_ENV | CFG_CMD_CONSOLE \
- | CFG_CMD_LOADS | CFG_CMD_LOADB \
- | CFG_CMD_IMI | CFG_CMD_CACHE \
- | CFG_CMD_REGINFO | CFG_CMD_NET\
- | CFG_CMD_DHCP | CFG_CMD_I2C \
- | CFG_CMD_DATE)
-/* This must be included AFTER the definition of CONFIG_COMMANDS (if any)
+/*
+ * BOOTP options
*/
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_ENV
+#define CONFIG_CMD_CONSOLE
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_DATE
/*
@@ -403,7 +421,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 32
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
diff --git a/include/configs/v37.h b/include/configs/v37.h
index a2e99b5..0407253 100644
--- a/include/configs/v37.h
+++ b/include/configs/v37.h
@@ -76,16 +76,30 @@
#define CONFIG_CAN_DRIVER 1 /* CAN Driver support enabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_DATE )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_DATE
+
/*
* JFFS2 partitions
@@ -105,15 +119,12 @@
#define MTDPARTS_DEFAULT "mtdparts=v37-1:-(jffs2)"
*/
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -194,7 +205,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/v38b.h b/include/configs/v38b.h
index e19591d..c0b1a15 100644
--- a/include/configs/v38b.h
+++ b/include/configs/v38b.h
@@ -46,11 +46,6 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
-# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
/*
* Serial console configuration
*/
@@ -89,29 +84,38 @@
#define CONFIG_USB_CLOCK 0x0001BBBB
#define CONFIG_USB_CONFIG 0x00001000
+
/*
- * Supported commands
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_FAT | \
- CFG_CMD_I2C | \
- CFG_CMD_IDE | \
- CFG_CMD_PING | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_IRQ | \
- CFG_CMD_JFFS2 | \
- CFG_CMD_MII | \
- CFG_CMD_SDRAM | \
- CFG_CMD_DATE | \
- CFG_CMD_USB | \
- CFG_CMD_FAT)
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_JFFS2
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_USB
+#define CONFIG_CMD_FAT
+
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
-
/*
* Boot low with 16 MB Flash
*/
@@ -167,7 +171,7 @@
/*
* IPB Bus clocking configuration.
*/
-#undef CFG_IPBSPEED_133 /* define for 133MHz speed */
+#undef CFG_IPBCLK_EQUALS_XLBCLK /* define for 133MHz speed */
#endif
/*
@@ -254,7 +258,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -270,6 +274,11 @@
#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+#define CFG_CACHELINE_SIZE 32 /* For MPC5xxx CPUs */
+#if defined(CONFIG_CMD_KGDB)
+# define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
/*
* Various low-level settings
*/
diff --git a/include/configs/versatile.h b/include/configs/versatile.h
index 16db43b..d250150 100644
--- a/include/configs/versatile.h
+++ b/include/configs/versatile.h
@@ -96,14 +96,29 @@
#define CFG_SERIAL0 0x101F1000
#define CFG_SERIAL1 0x101F2000
-#define CONFIG_COMMANDS (CFG_CMD_DHCP | CFG_CMD_IMI | CFG_CMD_NET | CFG_CMD_PING | CFG_CMD_BDI | CFG_CMD_MEMORY | CFG_CMD_FLASH | CFG_CMD_ENV)
-/*#define CONFIG_COMMANDS (CFG_CMD_IMI | CFG_CMD_BDI | CFG_CMD_MEMORY) */
+/*
+ * Command line configuration.
+ */
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_ENV
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
#define CONFIG_BOOTDELAY 2
#define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=25,0,0xf1010000,0xf1010010,eth0"
diff --git a/include/configs/virtlab2.h b/include/configs/virtlab2.h
index 06d8536..edae6f4 100644
--- a/include/configs/virtlab2.h
+++ b/include/configs/virtlab2.h
@@ -89,34 +89,38 @@
#undef CONFIG_CAN_DRIVER /* CAN Driver support disabled */
-#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE)
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_BOOTFILESIZE
+
#define CONFIG_MAC_PARTITION
#define CONFIG_DOS_PARTITION
#define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */
-#ifdef CONFIG_SPLASH_SCREEN
-# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_BMP | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
-#else
-# define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_IDE | \
- CFG_CMD_NFS | \
- CFG_CMD_SNTP )
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_IDE
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SNTP
+
+#if defined(CONFIG_SPLASH_SCREEN)
+ #define CONFIG_CMD_BMP
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
@@ -131,7 +135,7 @@
#define CFG_PROMPT_HUSH_PS2 "> "
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -203,6 +207,8 @@
#define CFG_ENV_OFFSET_REDUND (CFG_ENV_OFFSET+CFG_ENV_SIZE)
#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#define CFG_USE_PPCENV /* Environment embedded in sect .ppcenv */
+
/*-----------------------------------------------------------------------
* Hardware Information Block
*/
@@ -214,7 +220,7 @@
* Cache Configuration
*/
#define CFG_CACHELINE_SIZE 16 /* For all MPC8xx CPUs */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 4 /* log base 2 of the above value */
#endif
diff --git a/include/configs/voiceblue.h b/include/configs/voiceblue.h
index 4e97b01..7cab31d 100644
--- a/include/configs/voiceblue.h
+++ b/include/configs/voiceblue.h
@@ -131,33 +131,38 @@
#define CONFIG_BAUDRATE 115200
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
-#ifdef VOICEBLUE_SMALL_FLASH
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_LOADB | \
- CFG_CMD_IMI | \
- CFG_CMD_FLASH | \
- CFG_CMD_MEMORY | \
- CFG_CMD_NET | \
- CFG_CMD_BOOTD | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_RUN)
-#else
-#define CONFIG_COMMANDS (CFG_CMD_BDI | \
- CFG_CMD_LOADB | \
- CFG_CMD_IMI | \
- CFG_CMD_FLASH | \
- CFG_CMD_MEMORY | \
- CFG_CMD_NET | \
- CFG_CMD_ENV | \
- CFG_CMD_BOOTD | \
- CFG_CMD_DHCP | \
- CFG_CMD_PING | \
- CFG_CMD_RUN | \
- CFG_CMD_JFFS2)
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_FLASH
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_BOOTD
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_RUN
+
+#if !defined(VOICEBLUE_SMALL_FLASH)
+ #define CONFIG_CMD_ENV
+ #define CONFIG_CMD_JFFS2
#endif
-#define CONFIG_BOOTP_MASK CONFIG_BOOTP_DEFAULT
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_SUBNETMASK
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+#define CONFIG_BOOTP_BOOTPATH
+
+
#define CONFIG_LOOPW
#ifdef VOICEBLUE_SMALL_FLASH
@@ -220,8 +225,6 @@
#endif /* VOICEBLUE_SMALL_FLASH */
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
/*
* Miscellaneous configurable options
diff --git a/include/configs/walnut.h b/include/configs/walnut.h
index b34dc71..180549e 100644
--- a/include/configs/walnut.h
+++ b/include/configs/walnut.h
@@ -98,26 +98,38 @@
#define CONFIG_RTC_DS174x 1 /* use DS1743 RTC in Walnut */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DATE | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_EEPROM | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
#undef CONFIG_WATCHDOG /* watchdog disabled */
@@ -128,7 +140,7 @@
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -283,7 +295,7 @@
#define CFG_DCACHE_SIZE 16384 /* For AMCC 405 CPUs, older 405 ppc's */
/* have only 8kB, 16kB is save here */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -340,7 +352,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h
index 47251bb..c67b301 100644
--- a/include/configs/wepep250.h
+++ b/include/configs/wepep250.h
@@ -36,18 +36,24 @@
/*
- * Definition of u-boot build in commands. Check out CONFIG_CMD_DFL if
- * neccessary in include/cmd_confdefs.h file. (Un)comment for getting
- * functionality or size of u-boot code.
+ * BOOTP options
*/
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL \
- & ~CFG_CMD_NET \
- & ~CFG_CMD_LOADS \
- & ~CFG_CMD_CONSOLE \
- & ~CFG_CMD_AUTOSCRIPT \
-/* | CFG_CMD_JFFS2 */ \
- )
-#include <cmd_confdefs.h>
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_LOADS
+#undef CONFIG_CMD_CONSOLE
+#undef CONFIG_CMD_AUTOSCRIPT
+
/*
* Boot options. Setting delay to -1 stops autostart count down.
@@ -152,7 +158,7 @@
* Right now there is no gain for user, but later on booting kernel might be
* possible. Consider using XIP kernel running from flash to save RAM
* footprint.
- * NOTE: Enable CFG_CMD_JFFS2 for JFFS2 support.
+ * NOTE: Enable CONFIG_CMD_JFFS2 for JFFS2 support.
*/
#define CFG_JFFS2_FIRST_BANK 0
#define CFG_JFFS2_FIRST_SECTOR 5
diff --git a/include/configs/xaeniax.h b/include/configs/xaeniax.h
index 1039762..7418986 100644
--- a/include/configs/xaeniax.h
+++ b/include/configs/xaeniax.h
@@ -64,15 +64,29 @@
#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* valid baudrates */
-#define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_DTT) | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_NFS | \
- CFG_CMD_SDRAM | \
- CFG_CMD_SNTP )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_SDRAM
+#define CONFIG_CMD_SNTP
+
+#undef CONFIG_CMD_DTT
+
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
#define CONFIG_NETMASK 255.255.255.0
@@ -86,7 +100,7 @@
#define CONFIG_SETUP_MEMORY_TAGS 1
#define CONFIG_INITRD_TAG 1
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
#endif
diff --git a/include/configs/xm250.h b/include/configs/xm250.h
index 825bfd1..bcd16ec 100644
--- a/include/configs/xm250.h
+++ b/include/configs/xm250.h
@@ -81,14 +81,26 @@
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DATE | \
- CFG_CMD_I2C )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DATE
+#define CONFIG_CMD_I2C
+
#define CONFIG_BOOTDELAY 3
diff --git a/include/configs/xsengine.h b/include/configs/xsengine.h
index dc702cf..5733933 100644
--- a/include/configs/xsengine.h
+++ b/include/configs/xsengine.h
@@ -102,10 +102,26 @@
/* allow to overwrite serial and ethaddr */
#define CONFIG_BAUDRATE 115200
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_MMC | CFG_CMD_FAT | CFG_CMD_PING | CFG_CMD_JFFS2)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MMC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_JFFS2
+
#define CONFIG_BOOTDELAY 3
#define CONFIG_ETHADDR FF:FF:FF:FF:FF:FF
diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h
index a2f4810..35001d7 100644
--- a/include/configs/xupv2p.h
+++ b/include/configs/xupv2p.h
@@ -118,25 +118,39 @@
#define CFG_ENV_IS_NOWHERE 1
#define CFG_ENV_SIZE 0x1000
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
-#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
- CFG_CMD_MEMORY |\
- CFG_CMD_IRQ |\
- CFG_CMD_BDI |\
- CFG_CMD_NET |\
- CFG_CMD_IMI |\
- CFG_CMD_ECHO |\
- CFG_CMD_CACHE |\
- CFG_CMD_RUN |\
- CFG_CMD_AUTOSCRIPT |\
- CFG_CMD_ASKENV |\
- CFG_CMD_LOADS |\
- CFG_CMD_LOADB |\
- CFG_CMD_MISC |\
- CFG_CMD_PING \
- )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_MEMORY
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_BDI
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_IMI
+#define CONFIG_CMD_ECHO
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_RUN
+#define CONFIG_CMD_AUTOSCRIPT
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_LOADS
+#define CONFIG_CMD_LOADB
+#define CONFIG_CMD_MISC
+#define CONFIG_CMD_FAT
+#define CONFIG_CMD_EXT2
+#define CONFIG_CMD_PING
+
/* Miscellaneous configurable options */
#define CFG_PROMPT "U-Boot-mONStR> "
@@ -163,12 +177,12 @@
"base 0;" \
"echo"
-
/* system ace */
-/*#define CONFIG_SYSTEMACE
-#define DEBUG_SYSTEMACE
-#define CFG_SYSTEMACE_BASE 0xCF000000
-#define CFG_SYSTEMACE_WIDTH 16
-#define CONFIG_DOS_PARTITION*/
+#define CONFIG_SYSTEMACE
+/* #define DEBUG_SYSTEMACE */
+#define SYSTEMACE_CONFIG_FPGA
+#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
+#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
+#define CONFIG_DOS_PARTITION
#endif /* __CONFIG_H */
diff --git a/include/configs/yosemite.h b/include/configs/yosemite.h
index b68ae54..6a5b7f1 100644
--- a/include/configs/yosemite.h
+++ b/include/configs/yosemite.h
@@ -38,6 +38,7 @@
#define CONFIG_440GR 1 /* Specific PPC440GR support */
#define CONFIG_HOSTNAME yellowstone
#endif
+#define CONFIG_440 1 /* ... PPC440 family */
#define CONFIG_4xx 1 /* ... PPC4xx family */
#define CONFIG_SYS_CLK_FREQ 66666666 /* external freq to pll */
@@ -122,7 +123,7 @@
#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
#ifdef CFG_ENV_IS_IN_FLASH
-#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
#define CFG_ENV_ADDR (CFG_MONITOR_BASE-CFG_ENV_SECT_SIZE)
#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
@@ -232,17 +233,20 @@
#ifdef CONFIG_440EP
/* USB */
-#define CONFIG_USB_OHCI
+#define CONFIG_USB_OHCI_NEW
#define CONFIG_USB_STORAGE
+#define CFG_OHCI_BE_CONTROLLER
+
+#undef CFG_USB_OHCI_BOARD_INIT
+#define CFG_USB_OHCI_CPU_INIT 1
+#define CFG_USB_OHCI_REGS_BASE (CFG_PERIPHERAL_BASE | 0x1000)
+#define CFG_USB_OHCI_SLOT_NAME "ppc440"
+#define CFG_USB_OHCI_MAX_ROOT_PORTS 15
/* Comment this out to enable USB 1.1 device */
#define USB_2_0_DEVICE
-#define CMD_USB (CFG_CMD_USB | CFG_CMD_FAT | CFG_CMD_EXT2)
-
#define CONFIG_SUPPORT_VFAT
-#else
-#define CMD_USB 0 /* no USB on 440GR */
#endif /* CONFIG_440EP */
#ifdef DEBUG
@@ -251,32 +255,49 @@
#define CONFIG_HW_WATCHDOG /* watchdog */
#endif
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_EEPROM | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM | \
- CMD_USB)
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
+#ifdef CONFIG_440EP
+ #define CONFIG_CMD_USB
+ #define CONFIG_CMD_FAT
+ #define CONFIG_CMD_EXT2
+#endif
+
/*
* Miscellaneous configurable options
*/
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -311,7 +332,6 @@
#define CFG_PCI_TARGBASE 0x80000000 /* PCIaddr mapped to CFG_PCI_MEMBASE*/
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT
#define CFG_PCI_MASTER_INIT
@@ -344,7 +364,7 @@
*/
#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -356,7 +376,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/yucca.h b/include/configs/yucca.h
index 7f8b022..74033b4 100644
--- a/include/configs/yucca.h
+++ b/include/configs/yucca.h
@@ -46,7 +46,6 @@
#define EXTCLK_83 83333333
#define CONFIG_MISC_INIT_F 1 /* Use misc_init_f() */
-#define CONFIG_ADD_RAM_INFO 1 /* Print additional info */
#undef CONFIG_SHOW_BOOT_PROGRESS
#undef CONFIG_STRESS
@@ -69,11 +68,11 @@
#define CFG_PCIE_BASE 0xe0000000 /* PCIe UTL regs */
#define CFG_PCIE0_CFGBASE 0xc0000000
-#define CFG_PCIE0_XCFGBASE 0xc0000400
-#define CFG_PCIE1_CFGBASE 0xc0001000
-#define CFG_PCIE1_XCFGBASE 0xc0001400
-#define CFG_PCIE2_CFGBASE 0xc0002000
-#define CFG_PCIE2_XCFGBASE 0xc0002400
+#define CFG_PCIE1_CFGBASE 0xc1000000
+#define CFG_PCIE2_CFGBASE 0xc2000000
+#define CFG_PCIE0_XCFGBASE 0xc3000000
+#define CFG_PCIE1_XCFGBASE 0xc3001000
+#define CFG_PCIE2_XCFGBASE 0xc3002000
/* System RAM mapped to PCI space */
#define CONFIG_PCI_SYS_MEM_BUS CFG_SDRAM_BASE
@@ -136,7 +135,7 @@
/* Don't probe these addrs */
#define CFG_I2C_NOPROBES {0x50, 0x52, 0x53, 0x54}
-/* #if (CONFIG_COMMANDS & CFG_CMD_EEPROM) */
+/* #if defined(CONFIG_CMD_EEPROM) */
/* #define CFG_I2C_EEPROM_ADDR 0x50 */ /* I2C boot EEPROM */
#define CFG_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
/* #endif */
@@ -183,6 +182,7 @@
"cp.b ${fileaddr} FFFB0000 ${filesize};" \
"setenv filesize;saveenv\0" \
"upd=run load;run update\0" \
+ "pciconfighost=1\0" \
""
#define CONFIG_BOOTCOMMAND "run flash_self"
@@ -191,24 +191,36 @@
#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
-#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
- CFG_CMD_ASKENV | \
- CFG_CMD_EEPROM | \
- CFG_CMD_DHCP | \
- CFG_CMD_DIAG | \
- CFG_CMD_ELF | \
- CFG_CMD_I2C | \
- CFG_CMD_IRQ | \
- CFG_CMD_MII | \
- CFG_CMD_NET | \
- CFG_CMD_NFS | \
- CFG_CMD_PCI | \
- CFG_CMD_PING | \
- CFG_CMD_REGINFO | \
- CFG_CMD_SDRAM )
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PCI
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+#define CONFIG_CMD_SDRAM
+
#define CONFIG_IBM_EMAC4_V4 1
#define CONFIG_MII 1 /* MII PHY management */
@@ -232,7 +244,7 @@
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
@@ -286,10 +298,9 @@
#define CONFIG_PCI /* include pci support */
#define CONFIG_PCI_PNP 1 /* do pci plug-and-play */
#define CONFIG_PCI_SCAN_SHOW 1 /* show pci devices on startup */
-#undef CONFIG_PCI_CONFIG_HOST_BRIDGE
+#define CONFIG_PCI_CONFIG_HOST_BRIDGE
/* Board-specific PCI */
-#define CFG_PCI_PRE_INIT 1 /* enable board pci_pre_init() */
#define CFG_PCI_TARGET_INIT /* let board init pci target */
#undef CFG_PCI_MASTER_INIT
@@ -314,7 +325,7 @@
*/
#define CFG_DCACHE_SIZE 8192 /* For AMCC 405 CPUs */
#define CFG_CACHELINE_SIZE 32 /* ... */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
#endif
@@ -326,7 +337,7 @@
#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
#define BOOTFLAG_WARM 0x02 /* Software reboot */
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/configs/zeus.h b/include/configs/zeus.h
new file mode 100644
index 0000000..605755a
--- /dev/null
+++ b/include/configs/zeus.h
@@ -0,0 +1,382 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/************************************************************************
+ * zeus.h - configuration for Zeus board
+ ***********************************************************************/
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*-----------------------------------------------------------------------
+ * High Level Configuration Options
+ *----------------------------------------------------------------------*/
+#define CONFIG_ZEUS 1 /* Board is Zeus */
+#define CONFIG_4xx 1 /* ... PPC4xx family */
+#define CONFIG_405EP 1 /* Specifc 405EP support*/
+
+#define CONFIG_SYS_CLK_FREQ 33000000 /* external frequency to pll */
+
+#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
+#define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */
+
+#define PLLMR0_DEFAULT PLLMR0_333_111_55_111
+#define PLLMR1_DEFAULT PLLMR1_333_111_55_111
+
+#define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
+
+#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
+
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_PHY_ADDR 0x01 /* PHY address */
+#define CONFIG_HAS_ETH1 1
+#define CONFIG_PHY1_ADDR 0x11 /* EMAC1 PHY address */
+#define CONFIG_NET_MULTI 1
+#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers & descriptors */
+#define CONFIG_PHY_RESET 1
+#define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay */
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
+#define CONFIG_CMD_ASKENV
+#define CONFIG_CMD_CACHE
+#define CONFIG_CMD_DHCP
+#define CONFIG_CMD_DIAG
+#define CONFIG_CMD_EEPROM
+#define CONFIG_CMD_ELF
+#define CONFIG_CMD_I2C
+#define CONFIG_CMD_IRQ
+#define CONFIG_CMD_LOG
+#define CONFIG_CMD_MII
+#define CONFIG_CMD_NET
+#define CONFIG_CMD_NFS
+#define CONFIG_CMD_PING
+#define CONFIG_CMD_REGINFO
+
+/* POST support */
+#define CONFIG_POST (CFG_POST_MEMORY | \
+ CFG_POST_CPU | \
+ CFG_POST_CACHE | \
+ CFG_POST_UART | \
+ CFG_POST_ETHER)
+
+#define CFG_POST_ETHER_EXT_LOOPBACK /* eth POST using ext loopack connector */
+
+/* Define here the base-addresses of the UARTs to test in POST */
+#define CFG_POST_UART_TABLE {UART0_BASE}
+
+#define CONFIG_LOGBUFFER
+#define CFG_POST_CACHE_ADDR 0x00800000 /* free virtual address */
+
+#define CFG_CONSOLE_IS_IN_ENV /* Otherwise it catches logbuffer as output */
+
+#undef CONFIG_WATCHDOG /* watchdog disabled */
+
+/*-----------------------------------------------------------------------
+ * SDRAM
+ *----------------------------------------------------------------------*/
+/*
+ * SDRAM configuration (please see cpu/ppc/sdram.[ch])
+ */
+#define CONFIG_SDRAM_BANK0 1 /* init onboard SDRAM bank 0 */
+#define CONFIG_SDRAM_BANK1 1 /* init onboard SDRAM bank 1 */
+
+/* SDRAM timings used in datasheet */
+#define CFG_SDRAM_CL 3 /* CAS latency */
+#define CFG_SDRAM_tRP 20 /* PRECHARGE command period */
+#define CFG_SDRAM_tRC 66 /* ACTIVE-to-ACTIVE command period */
+#define CFG_SDRAM_tRCD 20 /* ACTIVE-to-READ delay */
+#define CFG_SDRAM_tRFC 66 /* Auto refresh period */
+
+/*-----------------------------------------------------------------------
+ * Serial Port
+ *----------------------------------------------------------------------*/
+#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
+#define CFG_BASE_BAUD 691200
+#define CONFIG_BAUDRATE 115200
+#define CONFIG_SERIAL_MULTI
+
+/* The following table includes the supported baudrates */
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+
+/*-----------------------------------------------------------------------
+ * Miscellaneous configurable options
+ *----------------------------------------------------------------------*/
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+#if defined(CONFIG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_CMDLINE_EDITING 1 /* add command line history */
+#define CONFIG_LOOPW 1 /* enable loopw command */
+#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
+#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
+#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
+
+/*-----------------------------------------------------------------------
+ * I2C
+ *----------------------------------------------------------------------*/
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+/* these are for the ST M24C02 2kbit serial i2c eeprom */
+#define CFG_I2C_EEPROM_ADDR 0x50 /* base address */
+#define CFG_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
+/* mask of address bits that overflow into the "EEPROM chip address" */
+#define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x07
+
+#define CFG_EEPROM_PAGE_WRITE_ENABLE 1 /* write eeprom in pages */
+#define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 byte write page size */
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
+
+/*
+ * The layout of the I2C EEPROM, used for bootstrap setup and for board-
+ * specific values, like ethaddr... that can be restored via the sw-reset
+ * button
+ */
+#define FACTORY_RESET_I2C_EEPROM 0x50
+#define FACTORY_RESET_ENV_OFFS 0x80
+#define FACTORY_RESET_ENV_SIZE 0x80
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0xFF000000
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
+#define CFG_MONITOR_BASE (-CFG_MONITOR_LEN)
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_FLASH_CFI /* The flash is CFI compatible */
+#define CFG_FLASH_CFI_DRIVER /* Use common CFI driver */
+
+#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
+
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+#define CFG_FLASH_USE_BUFFER_WRITE 1 /* use buffered writes (20x faster) */
+#define CFG_FLASH_PROTECTION 1 /* use hardware flash protection */
+
+#define CFG_FLASH_EMPTY_INFO /* print 'E' for empty sector on flinfo */
+#define CFG_FLASH_QUIET_TEST 1 /* don't warn upon unknown flash */
+
+#ifdef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_SECT_SIZE 0x20000 /* size of one complete sector */
+#define CFG_ENV_ADDR ((-CFG_MONITOR_LEN)-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE 0x2000 /* Total Size of Environment Sector */
+
+/* Address and size of Redundant Environment Sector */
+#define CFG_ENV_ADDR_REDUND (CFG_ENV_ADDR-CFG_ENV_SECT_SIZE)
+#define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
+#endif
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE 16384 /* For IBM 405EP CPU */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+
+/*-----------------------------------------------------------------------
+ * Definitions for initial stack pointer and data area (in data cache)
+ */
+/* use on chip memory (OCM) for temperary stack until sdram is tested */
+#define CFG_TEMP_STACK_OCM 1
+
+/* On Chip Memory location */
+#define CFG_OCM_DATA_ADDR 0xF8000000
+#define CFG_OCM_DATA_SIZE 0x1000
+#define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR /* inside of OCM */
+#define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE /* End of used area in RAM */
+
+#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
+#define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+/* reserve some memory for POST and BOOT limit info */
+#define CFG_INIT_SP_OFFSET (CFG_GBL_DATA_OFFSET - 16)
+
+/* extra data in OCM */
+#define CFG_POST_WORD_ADDR (CFG_GBL_DATA_OFFSET - 4)
+#define CFG_POST_MAGIC (CFG_OCM_DATA_ADDR + CFG_GBL_DATA_OFFSET - 8)
+#define CFG_POST_VAL (CFG_OCM_DATA_ADDR + CFG_GBL_DATA_OFFSET - 12)
+
+/*-----------------------------------------------------------------------
+ * External Bus Controller (EBC) Setup
+ */
+
+/* Memory Bank 0 (Flash 16M) initialization */
+#define CFG_EBC_PB0AP 0x05815600
+#define CFG_EBC_PB0CR 0xFF09A000 /* BAS=0xFF0,BS=16MB,BU=R/W,BW=16bit */
+
+/*-----------------------------------------------------------------------
+ * Definitions for GPIO setup (PPC405EP specific)
+ *
+ * GPIO0[0] - External Bus Controller BLAST output
+ * GPIO0[1-9] - Instruction trace outputs
+ * GPIO0[10-13] - External Bus Controller CS_1 - CS_4 outputs
+ * GPIO0[14-16] - External Bus Controller ABUS3-ABUS5 outputs
+ * GPIO0[17-23] - External Interrupts IRQ0 - IRQ6 inputs
+ * GPIO0[24-27] - UART0 control signal inputs/outputs
+ * GPIO0[28-29] - UART1 data signal input/output
+ * GPIO0[30-31] - EMAC0 and EMAC1 reject packet inputs
+ */
+#define CFG_GPIO0_OSRH 0x15555550 /* Chip selects */
+#define CFG_GPIO0_OSRL 0x00000110 /* UART_DTR-pin 27 alt out */
+#define CFG_GPIO0_ISR1H 0x10000041 /* Pin 2, 12 is input */
+#define CFG_GPIO0_ISR1L 0x15505440 /* OUT: LEDs 22/23; IN: pin12,2, NVALID# */
+#define CFG_GPIO0_TSRH 0x00000000
+#define CFG_GPIO0_TSRL 0x00000000
+#define CFG_GPIO0_TCR 0xBFF68317 /* 3-state OUT: 22/23/29; 12,2 is not 3-state */
+#define CFG_GPIO0_ODR 0x00000000
+
+#define CFG_GPIO_SW_RESET 1
+#define CFG_GPIO_ZEUS_PE 12
+#define CFG_GPIO_LED_RED 22
+#define CFG_GPIO_LED_GREEN 23
+
+/* Time in milli-seconds */
+#define CFG_TIME_POST 5000
+#define CFG_TIME_FACTORY_RESET 10000
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if defined(CONFIG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+
+/* ENVIRONMENT VARS */
+
+#define CONFIG_PREBOOT "echo;echo Welcome to Bulletendpoints board v1.1;echo"
+#define CONFIG_IPADDR 192.168.1.10
+#define CONFIG_SERVERIP 192.168.1.100
+#define CONFIG_GATEWAYIP 192.168.1.100
+#define CONFIG_ETHADDR 50:00:00:00:06:00
+#define CONFIG_ETH1ADDR 50:00:00:00:06:01
+#if 0
+#define CONFIG_BOOTDELAY -1 /* autoboot disabled */
+#else
+#define CONFIG_BOOTDELAY 3 /* autoboot after 5 seconds */
+#endif
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ "logversion=2\0" \
+ "hostname=zeus\0" \
+ "netdev=eth0\0" \
+ "ethact=ppc_4xx_eth0\0" \
+ "netmask=255.255.255.0\0" \
+ "ramdisk_size=50000\0" \
+ "nfsargs=setenv bootargs root=/dev/nfs rw" \
+ " nfsroot=${serverip}:${rootpath}\0" \
+ "ramargs=setenv bootargs root=/dev/ram rw" \
+ " ramdisk=${ramdisk_size}\0" \
+ "addip=setenv bootargs ${bootargs} " \
+ "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
+ ":${hostname}:${netdev}:off panic=1\0" \
+ "addtty=setenv bootargs ${bootargs} console=ttyS0," \
+ "${baudrate}\0" \
+ "net_nfs=tftp ${kernel_mem_addr} ${file_kernel};" \
+ "run nfsargs addip addtty;bootm\0" \
+ "net_ram=tftp ${kernel_mem_addr} ${file_kernel};" \
+ "tftp ${ramdisk_mem_addr} ${file_fs};" \
+ "run ramargs addip addtty;" \
+ "bootm ${kernel_mem_addr} ${ramdisk_mem_addr}\0" \
+ "rootpath=/target_fs/zeus\0" \
+ "kernel_fl_addr=ff000000\0" \
+ "kernel_mem_addr=200000\0" \
+ "ramdisk_fl_addr=ff300000\0" \
+ "ramdisk_mem_addr=4000000\0" \
+ "uboot_fl_addr=fffc0000\0" \
+ "uboot_mem_addr=100000\0" \
+ "file_uboot=/zeus/u-boot.bin\0" \
+ "tftp_uboot=tftp 100000 ${file_uboot}\0" \
+ "update_uboot=protect off fffc0000 ffffffff;" \
+ "era fffc0000 ffffffff;cp.b 100000 fffc0000 40000;" \
+ "protect on fffc0000 ffffffff\0" \
+ "upd_uboot=run tftp_uboot;run update_uboot\0" \
+ "file_kernel=/zeus/uImage_ba\0" \
+ "tftp_kernel=tftp 100000 ${file_kernel}\0" \
+ "update_kernel=protect off ff000000 ff17ffff;" \
+ "era ff000000 ff17ffff;cp.b 100000 ff000000 180000\0" \
+ "upd_kernel=run tftp_kernel;run update_kernel\0" \
+ "file_fs=/zeus/rootfs_ba.img\0" \
+ "tftp_fs=tftp 100000 ${file_fs}\0" \
+ "update_fs=protect off ff300000 ff87ffff;era ff300000 ff87ffff;"\
+ "cp.b 100000 ff300000 580000\0" \
+ "upd_fs=run tftp_fs;run update_fs\0" \
+ "bootcmd=chkreset;run ramargs addip addtty addmisc;" \
+ "bootm ${kernel_fl_addr} ${ramdisk_fl_addr}\0" \
+ ""
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/zylonite.h b/include/configs/zylonite.h
index 1e8ed7a..517ecb1 100644
--- a/include/configs/zylonite.h
+++ b/include/configs/zylonite.h
@@ -76,19 +76,32 @@
#define CONFIG_BAUDRATE 115200
+
+/*
+ * BOOTP options
+ */
+#define CONFIG_BOOTP_BOOTFILESIZE
+#define CONFIG_BOOTP_BOOTPATH
+#define CONFIG_BOOTP_GATEWAY
+#define CONFIG_BOOTP_HOSTNAME
+
+
+/*
+ * Command line configuration.
+ */
+#include <config_cmd_default.h>
+
#ifdef TURN_ON_ETHERNET
-# define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PING)
+ #define CONFIG_CMD_PING
#else
-# define CONFIG_COMMANDS ((CONFIG_CMD_DFL \
- | CFG_CMD_ENV \
- | CFG_CMD_NAND) \
- & ~(CFG_CMD_NET \
- | CFG_CMD_FLASH \
- | CFG_CMD_IMLS))
+ #define CONFIG_CMD_ENV
+ #define CONFIG_CMD_NAND
+
+ #undef CONFIG_CMD_NET
+ #undef CONFIG_CMD_FLASH
+ #undef CONFIG_CMD_IMLS
#endif
-/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
-#include <cmd_confdefs.h>
#define CONFIG_BOOTDELAY -1
#define CONFIG_ETHADDR 08:00:3e:26:0a:5b
@@ -100,7 +113,7 @@
#define CONFIG_CMDLINE_TAG
#define CONFIG_TIMESTAMP
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
#endif
diff --git a/include/da9030.h b/include/da9030.h
index 41108b9..3e3b202 100644
--- a/include/da9030.h
+++ b/include/da9030.h
@@ -104,3 +104,15 @@
#define SYS_CONTROL_A_HWRES_ENABLE (1<<2)
#define SYS_CONTROL_A_WDOG_ACTION (1<<3)
#define SYS_CONTROL_A_WATCHDOG (1<<7)
+
+#define MISC_CONTROLB_USB_INT_RISING (1<<2)
+#define MISC_CONTROLB_SESSION_VALID_EN (1<<3)
+
+#define USB_PUMP_USBVE (1<<0)
+#define USB_PUMP_USBVEP (1<<1)
+#define USB_PUMP_SRP_DETECT (1<<2)
+#define USB_PUMP_SESSION_VALID (1<<3)
+#define USB_PUMP_VBUS_VALID_4_0 (1<<4)
+#define USB_PUMP_VBUS_VALID_4_4 (1<<5)
+#define USB_PUMP_EN_USBVE (1<<6)
+#define USB_PUMP_EN_USBVEP (1<<7)
diff --git a/include/dataflash.h b/include/dataflash.h
index 650454e..fbd5e17 100644
--- a/include/dataflash.h
+++ b/include/dataflash.h
@@ -38,13 +38,47 @@
#include "config.h"
/*number of protected area*/
-#define NB_DATAFLASH_AREA 4
+#ifdef CONFIG_NEW_PARTITION
+# define NB_DATAFLASH_AREA 6
+#else
+# define NB_DATAFLASH_AREA 4
+#endif
+
+#ifdef CFG_NO_FLASH
+
+/*-----------------------------------------------------------------------
+ * return codes from flash_write():
+ */
+# define ERR_OK 0
+# define ERR_TIMOUT 1
+# define ERR_NOT_ERASED 2
+# define ERR_PROTECTED 4
+# define ERR_INVAL 8
+# define ERR_ALIGN 16
+# define ERR_UNKNOWN_FLASH_VENDOR 32
+# define ERR_UNKNOWN_FLASH_TYPE 64
+# define ERR_PROG_ERROR 128
+
+/*-----------------------------------------------------------------------
+ * Protection Flags for flash_protect():
+ */
+# define FLAG_PROTECT_SET 0x01
+# define FLAG_PROTECT_CLEAR 0x02
+# define FLAG_PROTECT_INVALID 0x03
+
+/*-----------------------------------------------------------------------
+ * Set Environment according to label:
+ */
+# define FLAG_SETENV 0x80
+#endif /* CFG_NO_FLASH */
/*define the area structure*/
typedef struct {
unsigned long start;
unsigned long end;
unsigned char protected;
+ unsigned char setenv;
+ unsigned char label[20];
} dataflash_protect_t;
typedef unsigned int AT91S_DataFlashStatus;
@@ -96,6 +130,7 @@
AT91S_DataflashDesc Desc;
AT91S_DataflashFeatures Device; /* Pointer on a dataflash features array */
unsigned long logical_address;
+ unsigned long end_address;
unsigned int id; /* device id */
} AT91S_DATAFLASH_INFO, *AT91PS_DATAFLASH_INFO;
@@ -106,6 +141,7 @@
#define AT45DB321 0x34
#define AT45DB642 0x3c
#define AT45DB128 0x10
+#define PAGES_PER_BLOCK 8
#define AT91C_DATAFLASH_TIMEOUT 10000 /* For AT91F_DataFlashWaitReady */
@@ -168,6 +204,7 @@
extern int size_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr, unsigned long size);
extern int prot_dataflash (AT91PS_DataFlash pdataFlash, unsigned long addr);
+extern int addr2ram(ulong addr);
extern int dataflash_real_protect (int flag, unsigned long start_addr, unsigned long end_addr);
extern int addr_dataflash (unsigned long addr);
extern int read_dataflash (unsigned long addr, unsigned long size, char *result);
@@ -175,4 +212,8 @@
extern void dataflash_print_info (void);
extern void dataflash_perror (int err);
+#ifdef CONFIG_NEW_DF_PARTITION
+extern int AT91F_DataflashSetEnv (void); #endif
+#endif
+
#endif
diff --git a/include/asm-avr32/div64.h b/include/div64.h
similarity index 100%
rename from include/asm-avr32/div64.h
rename to include/div64.h
diff --git a/include/dm9161.h b/include/dm9161.h
index f5bfb19..d5d0e8d 100644
--- a/include/dm9161.h
+++ b/include/dm9161.h
@@ -43,9 +43,9 @@
#define DM9161_COLLISION_TEST (1 << 7)
/*--Bit definitions: DM9161_BMSR */
-#define DM9161_100BASE_T4 (1 << 15)
+#define DM9161_100BASE_TX (1 << 15)
#define DM9161_100BASE_TX_FD (1 << 14)
-#define DM9161_100BASE_T4_HD (1 << 13)
+#define DM9161_100BASE_TX_HD (1 << 13)
#define DM9161_10BASE_T_FD (1 << 12)
#define DM9161_10BASE_T_HD (1 << 11)
#define DM9161_MF_PREAMB_SUPPR (1 << 6)
diff --git a/include/dp83848.h b/include/dp83848.h
new file mode 100644
index 0000000..274bc4c
--- /dev/null
+++ b/include/dp83848.h
@@ -0,0 +1,88 @@
+/*
+ * DP83848 ethernet Physical layer
+ *
+ * Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
+ *
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+
+/* National Semiconductor PHYSICAL LAYER TRANSCEIVER DP83848 */
+
+#define DP83848_CTL_REG 0x0 /* Basic Mode Control Reg */
+#define DP83848_STAT_REG 0x1 /* Basic Mode Status Reg */
+#define DP83848_PHYID1_REG 0x2 /* PHY Idendifier Reg 1 */
+#define DP83848_PHYID2_REG 0x3 /* PHY Idendifier Reg 2 */
+#define DP83848_ANA_REG 0x4 /* Auto_Neg Advt Reg */
+#define DP83848_ANLPA_REG 0x5 /* Auto_neg Link Partner Ability Reg */
+#define DP83848_ANE_REG 0x6 /* Auto-neg Expansion Reg */
+#define DP83848_PHY_STAT_REG 0x10 /* PHY Status Register */
+#define DP83848_PHY_INTR_CTRL_REG 0x11 /* PHY Interrupt Control Register */
+#define DP83848_PHY_CTRL_REG 0x19 /* PHY Status Register */
+
+/*--Bit definitions: DP83848_CTL_REG */
+#define DP83848_RESET (1 << 15) /* 1= S/W Reset */
+#define DP83848_LOOPBACK (1 << 14) /* 1=loopback Enabled */
+#define DP83848_SPEED_SELECT (1 << 13)
+#define DP83848_AUTONEG (1 << 12)
+#define DP83848_POWER_DOWN (1 << 11)
+#define DP83848_ISOLATE (1 << 10)
+#define DP83848_RESTART_AUTONEG (1 << 9)
+#define DP83848_DUPLEX_MODE (1 << 8)
+#define DP83848_COLLISION_TEST (1 << 7)
+
+/*--Bit definitions: DP83848_STAT_REG */
+#define DP83848_100BASE_T4 (1 << 15)
+#define DP83848_100BASE_TX_FD (1 << 14)
+#define DP83848_100BASE_TX_HD (1 << 13)
+#define DP83848_10BASE_T_FD (1 << 12)
+#define DP83848_10BASE_T_HD (1 << 11)
+#define DP83848_MF_PREAMB_SUPPR (1 << 6)
+#define DP83848_AUTONEG_COMP (1 << 5)
+#define DP83848_RMT_FAULT (1 << 4)
+#define DP83848_AUTONEG_ABILITY (1 << 3)
+#define DP83848_LINK_STATUS (1 << 2)
+#define DP83848_JABBER_DETECT (1 << 1)
+#define DP83848_EXTEND_CAPAB (1 << 0)
+
+/*--definitions: DP83848_PHYID1 */
+#define DP83848_PHYID1_OUI 0x2000
+#define DP83848_PHYID2_OUI 0x5c90
+
+/*--Bit definitions: DP83848_ANAR, DP83848_ANLPAR */
+#define DP83848_NP (1 << 15)
+#define DP83848_ACK (1 << 14)
+#define DP83848_RF (1 << 13)
+#define DP83848_PAUSE (1 << 10)
+#define DP83848_T4 (1 << 9)
+#define DP83848_TX_FDX (1 << 8)
+#define DP83848_TX_HDX (1 << 7)
+#define DP83848_10_FDX (1 << 6)
+#define DP83848_10_HDX (1 << 5)
+#define DP83848_AN_IEEE_802_3 0x0001
+
+/*--Bit definitions: DP83848_ANER */
+#define DP83848_PDF (1 << 4)
+#define DP83848_LP_NP_ABLE (1 << 3)
+#define DP83848_NP_ABLE (1 << 2)
+#define DP83848_PAGE_RX (1 << 1)
+#define DP83848_LP_AN_ABLE (1 << 0)
+
+/*--Bit definitions: DP83848_PHY_STAT */
+#define DP83848_RX_ERR_LATCH (1 << 13)
+#define DP83848_POLARITY_STAT (1 << 12)
+#define DP83848_FALSE_CAR_SENSE (1 << 11)
+#define DP83848_SIG_DETECT (1 << 10)
+#define DP83848_DESCRAM_LOCK (1 << 9)
+#define DP83848_PAGE_RCV (1 << 8)
+#define DP83848_PHY_RMT_FAULT (1 << 6)
+#define DP83848_JABBER (1 << 5)
+#define DP83848_AUTONEG_COMPLETE (1 << 4)
+#define DP83848_LOOPBACK_STAT (1 << 3)
+#define DP83848_DUPLEX (1 << 2)
+#define DP83848_SPEED (1 << 1)
+#define DP83848_LINK (1 << 0)
diff --git a/include/dtt.h b/include/dtt.h
index 842a761..2e8c690 100644
--- a/include/dtt.h
+++ b/include/dtt.h
@@ -29,6 +29,7 @@
#if defined(CONFIG_DTT_LM75) || \
defined(CONFIG_DTT_DS1621) || \
+ defined(CONFIG_DTT_DS1775) || \
defined(CONFIG_DTT_LM81) || \
defined(CONFIG_DTT_ADM1021)
@@ -78,6 +79,13 @@
#define DTT_CONFIG 0xAC
#endif
+#if defined(CONFIG_DTT_DS1775)
+#define DTT_READ_TEMP 0x0
+#define DTT_CONFIG 0x1
+#define DTT_TEMP_HYST 0x2
+#define DTT_TEMP_OS 0x3
+#endif
+
#if defined(CONFIG_DTT_ADM1021)
#define DTT_READ_LOC_VALUE 0x00
#define DTT_READ_REM_VALUE 0x01
diff --git a/include/exports.h b/include/exports.h
index 8f7f617..d6512cb 100644
--- a/include/exports.h
+++ b/include/exports.h
@@ -23,10 +23,15 @@
unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base);
char *getenv (char *name);
void setenv (char *varname, char *varvalue);
-#if (CONFIG_COMMANDS & CFG_CMD_I2C)
+long simple_strtol(const char *cp,char **endp,unsigned int base);
+int strcmp(const char * cs,const char * ct);
+#ifdef CONFIG_HAS_UID
+void forceenv (char *varname, char *varvalue);
+#endif
+#if defined(CONFIG_CMD_I2C)
int i2c_write (uchar, uint, int , uchar* , int);
int i2c_read (uchar, uint, int , uchar* , int);
-#endif /* CFG_CMD_I2C */
+#endif
void app_startup(char **);
@@ -40,7 +45,7 @@
XF_MAX
};
-#define XF_VERSION 3
+#define XF_VERSION 4
#if defined(CONFIG_I386)
extern gd_t *global_data;
diff --git a/include/fdt_support.h b/include/fdt_support.h
index a276834..60fa423 100644
--- a/include/fdt_support.h
+++ b/include/fdt_support.h
@@ -38,5 +38,11 @@
int fdt_bd_t(void *fdt);
#endif
+#ifdef CONFIG_OF_BOARD_SETUP
+void ft_board_setup(void *blob, bd_t *bd);
+void ft_cpu_setup(void *blob, bd_t *bd);
+void ft_pci_setup(void *blob, bd_t *bd);
+#endif
+
#endif /* ifdef CONFIG_OF_LIBFDT */
#endif /* ifndef __FDT_SUPPORT_H */
diff --git a/include/flash.h b/include/flash.h
index 43b9c6b..b0bf733 100644
--- a/include/flash.h
+++ b/include/flash.h
@@ -119,6 +119,11 @@
*/
#define FLAG_PROTECT_SET 0x01
#define FLAG_PROTECT_CLEAR 0x02
+#define FLAG_PROTECT_INVALID 0x03
+/*-----------------------------------------------------------------------
+ * Set Environment according to label:
+ */
+#define FLAG_SETENV 0x80
/*-----------------------------------------------------------------------
* Device IDs
diff --git a/include/ide.h b/include/ide.h
index 6976a6c..222f4f8 100644
--- a/include/ide.h
+++ b/include/ide.h
@@ -26,6 +26,8 @@
#define IDE_BUS(dev) (dev >> 1)
+#define ATA_CURR_BASE(dev) (CFG_ATA_BASE_ADDR+ide_bus_offset[IDE_BUS(dev)])
+
#ifdef CONFIG_IDE_LED
/*
diff --git a/include/image.h b/include/image.h
index 2f575fd..432fa22 100644
--- a/include/image.h
+++ b/include/image.h
@@ -77,6 +77,7 @@
#define IH_CPU_NIOS2 15 /* Nios-II */
#define IH_CPU_BLACKFIN 16 /* Blackfin */
#define IH_CPU_AVR32 17 /* AVR32 */
+#define IH_CPU_ST200 18 /* STMicroelectronics ST200 */
/*
* Image Types
diff --git a/include/lcd.h b/include/lcd.h
index b688583..8a4273c 100644
--- a/include/lcd.h
+++ b/include/lcd.h
@@ -173,10 +173,10 @@
/************************************************************************/
/* ** BITMAP DISPLAY SUPPORT */
/************************************************************************/
-#if (CONFIG_COMMANDS & CFG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
+#if defined(CONFIG_CMD_BMP) || defined(CONFIG_SPLASH_SCREEN)
# include <bmp_layout.h>
# include <asm/byteorder.h>
-#endif /* (CONFIG_COMMANDS & CFG_CMD_BMP) || CONFIG_SPLASH_SCREEN */
+#endif
/*
* Information about displays we are using. This is for configuring
diff --git a/include/led.h b/include/led.h
new file mode 100644
index 0000000..57c2b4a
--- /dev/null
+++ b/include/led.h
@@ -0,0 +1,45 @@
+/*
+ * (C) Copyright 2006
+ * Atmel Nordic AB <www.atmel.com>
+ * Ulf Samuelsson <ulf@atmel.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef __LED_H
+#define __LED_H
+
+#ifndef __ASSEMBLY__
+extern void LED_init (void);
+extern void red_LED_on(void);
+extern void red_LED_off(void);
+extern void green_LED_on(void);
+extern void green_LED_off(void);
+extern void yellow_LED_on(void);
+extern void yellow_LED_off(void);
+#else
+ .extern LED_init
+ .extern red_LED_on
+ .extern red_LED_off
+ .extern yellow_LED_on
+ .extern yellow_LED_off
+ .extern green_LED_on
+ .extern green_LED_off
+#endif
+#endif
diff --git a/include/libfdt.h b/include/libfdt.h
index f8bac73..38c65a9 100644
--- a/include/libfdt.h
+++ b/include/libfdt.h
@@ -77,7 +77,13 @@
const char *name, int namelen);
int fdt_subnode_offset(const void *fdt, int parentoffset, const char *name);
-int fdt_path_offset(const void *fdt, const char *path);
+int fdt_find_node_by_path(const void *fdt, const char *path);
+int fdt_find_node_by_type(const void *fdt, int nodeoffset, const char *type);
+
+int fdt_node_is_compatible(const void *fdt, int nodeoffset,
+ const char *compat);
+int fdt_find_compatible_node(const void *fdt, int nodeoffset,
+ const char *type, const char *compat);
struct fdt_property *fdt_get_property(const void *fdt, int nodeoffset,
const char *name, int *lenp);
@@ -134,6 +140,8 @@
})
#define fdt_setprop_string(fdt, nodeoffset, name, str) \
fdt_setprop((fdt), (nodeoffset), (name), (str), strlen(str)+1)
+int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
+ const void *val, int len, int create);
int fdt_delprop(void *fdt, int nodeoffset, const char *name);
int fdt_add_subnode_namelen(void *fdt, int parentoffset,
const char *name, int namelen);
diff --git a/include/libfdt_env.h b/include/libfdt_env.h
index e746314..78f7258 100644
--- a/include/libfdt_env.h
+++ b/include/libfdt_env.h
@@ -26,7 +26,7 @@
#include <asm/byteorder.h>
#include <linux/string.h>
-struct fdt_header *fdt; /* Pointer to the working fdt */
+extern struct fdt_header *fdt; /* Pointer to the working fdt */
#define fdt32_to_cpu(x) __be32_to_cpu(x)
#define cpu_to_fdt32(x) __cpu_to_be32(x)
diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h
index 4b48564..49ff80f 100644
--- a/include/linux/mtd/nand.h
+++ b/include/linux/mtd/nand.h
@@ -348,6 +348,7 @@
#define NAND_MFR_NATIONAL 0x8f
#define NAND_MFR_RENESAS 0x07
#define NAND_MFR_STMICRO 0x20
+#define NAND_MFR_MICRON 0x2c
/**
* struct nand_flash_dev - NAND Flash Device ID Structure
diff --git a/include/linux/stat.h b/include/linux/stat.h
index 43fd53f..37f2924 100644
--- a/include/linux/stat.h
+++ b/include/linux/stat.h
@@ -67,7 +67,8 @@
#endif /* __PPC__ */
-#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__)
+#if defined (__ARM__) || defined (__I386__) || defined (__M68K__) || defined (__bfin__) ||\
+ defined (__microblaze__)
struct stat {
unsigned short st_dev;
diff --git a/include/logbuff.h b/include/logbuff.h
index 3acfc18..d415729 100644
--- a/include/logbuff.h
+++ b/include/logbuff.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2002
+ * (C) Copyright 2002-2007
* Detlev Zundel, dzu@denx.de.
*
* See file CREDITS for list of people who contributed to this
@@ -25,6 +25,7 @@
#ifdef CONFIG_LOGBUFFER
+#define LOGBUFF_MAGIC 0xc0de4ced /* Forced by code, eh! */
#define LOGBUFF_LEN (16384) /* Must be 16k right now */
#define LOGBUFF_MASK (LOGBUFF_LEN-1)
#define LOGBUFF_OVERHEAD (4096) /* Logbuffer overhead for extra info */
@@ -32,6 +33,29 @@
#define LOGBUFF_INITIALIZED (1<<31)
+/* The mapping used here has to be the same as in setup_ext_logbuff ()
+ in linux/kernel/printk */
+
+typedef struct {
+ union {
+ struct {
+ unsigned long tag;
+ unsigned long start;
+ unsigned long con;
+ unsigned long end;
+ unsigned long chars;
+ } v2;
+ struct {
+ unsigned long dummy;
+ unsigned long tag;
+ unsigned long start;
+ unsigned long size;
+ unsigned long chars;
+ } v1;
+ };
+ unsigned char buf[0];
+} logbuff_t;
+
int drv_logbuff_init (void);
void logbuff_init_ptrs (void);
void logbuff_log(char *msg);
diff --git a/include/mk48t59.h b/include/mk48t59.h
index 03c992e..a4459c0 100644
--- a/include/mk48t59.h
+++ b/include/mk48t59.h
@@ -26,7 +26,7 @@
*/
-#if defined(CONFIG_RTC_MK48T59) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_MK48T59) && defined(CONFIG_CMD_DATE)
#define RTC_PORT_ADDR0 CFG_ISA_IO + 0x70
#define RTC_PORT_ADDR1 RTC_PORT_ADDR0 + 0x1
diff --git a/include/mpc512x.h b/include/mpc512x.h
new file mode 100644
index 0000000..a100b22
--- /dev/null
+++ b/include/mpc512x.h
@@ -0,0 +1,398 @@
+/*
+ * Copyright (C) 2004-2006 Freescale Semiconductor, Inc.
+ * (C) Copyright 2007 DENX Software Engineering
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * Derived from the MPC83xx header.
+ */
+
+#ifndef __MPC512X_H__
+#define __MPC512X_H__
+
+#include <config.h>
+#if defined(CONFIG_E300)
+#include <asm/e300.h>
+#endif
+
+/* System reset offset (PowerPC standard)
+ */
+#define EXC_OFF_SYS_RESET 0x0100
+#define _START_OFFSET EXC_OFF_SYS_RESET
+
+
+/* IMMRBAR - Internal Memory Register Base Address
+ */
+#define CONFIG_DEFAULT_IMMR 0xFF400000 /* Default IMMR base address */
+#define IMMRBAR 0x0000 /* Register offset to immr */
+#define IMMRBAR_BASE_ADDR 0xFFF00000 /* Base address mask */
+#define IMMRBAR_RES ~(IMMRBAR_BASE_ADDR)
+
+/* LAWBAR - Local Access Window Base Address Register
+ */
+#define LPBAW 0x0020 /* Register offset to immr */
+#define LPCS0AW 0x0024
+#define LPCS1AW 0x0028
+#define LPCS2AW 0x002C
+#define LPCS3AW 0x0030
+#define LPCS4AW 0x0034
+#define LPCS5AW 0x0038
+#define LPCS6AW 0x003C
+#define LPCA7AW 0x0040
+#define SRAMBAR 0x00C4
+
+#define LPC_OFFSET 0x10000
+
+#define CS0_CONFIG 0x00000
+#define CS1_CONFIG 0x00004
+#define CS2_CONFIG 0x00008
+#define CS3_CONFIG 0x0000C
+#define CS4_CONFIG 0x00010
+#define CS5_CONFIG 0x00014
+#define CS6_CONFIG 0x00018
+#define CS7_CONFIG 0x0001C
+
+#define CS_CTRL 0x00020
+#define CS_CTRL_ME 0x01000000 /* CS Master Enable bit */
+#define CS_CTRL_IE 0x08000000 /* CS Interrupt Enable bit */
+
+/* SPRIDR - System Part and Revision ID Register
+ */
+#define SPRIDR_PARTID 0xFFFF0000 /* Part Identification */
+#define SPRIDR_REVID 0x0000FFFF /* Revision Identification */
+
+#define SPR_5121E 0x80180000
+
+/* SPCR - System Priority Configuration Register
+ */
+#define SPCR_PCIHPE 0x10000000 /* PCI Highest Priority Enable */
+#define SPCR_PCIHPE_SHIFT (31-3)
+#define SPCR_PCIPR 0x03000000 /* PCI bridge system bus request priority */
+#define SPCR_PCIPR_SHIFT (31-7)
+#define SPCR_TBEN 0x00400000 /* E300 PowerPC core time base unit enable */
+#define SPCR_TBEN_SHIFT (31-9)
+#define SPCR_COREPR 0x00300000 /* E300 PowerPC Core system bus request priority */
+#define SPCR_COREPR_SHIFT (31-11)
+
+/* SWCRR - System Watchdog Control Register
+ */
+#define SWCRR 0x0904 /* Register offset to immr */
+#define SWCRR_SWTC 0xFFFF0000 /* Software Watchdog Time Count */
+#define SWCRR_SWEN 0x00000004 /* Watchdog Enable bit */
+#define SWCRR_SWRI 0x00000002 /* Software Watchdog Reset/Interrupt Select bit */
+#define SWCRR_SWPR 0x00000001 /* Software Watchdog Counter Prescale bit */
+#define SWCRR_RES ~(SWCRR_SWTC | SWCRR_SWEN | SWCRR_SWRI | SWCRR_SWPR)
+
+/* SWCNR - System Watchdog Counter Register
+ */
+#define SWCNR 0x0908 /* Register offset to immr */
+#define SWCNR_SWCN 0x0000FFFF /* Software Watchdog Count mask */
+#define SWCNR_RES ~(SWCNR_SWCN)
+
+/* SWSRR - System Watchdog Service Register
+ */
+#define SWSRR 0x090E /* Register offset to immr */
+
+/* ACR - Arbiter Configuration Register
+ */
+#define ACR_COREDIS 0x10000000 /* Core disable */
+#define ACR_COREDIS_SHIFT (31-7)
+#define ACR_PIPE_DEP 0x00070000 /* Pipeline depth */
+#define ACR_PIPE_DEP_SHIFT (31-15)
+#define ACR_PCI_RPTCNT 0x00007000 /* PCI repeat count */
+#define ACR_PCI_RPTCNT_SHIFT (31-19)
+#define ACR_RPTCNT 0x00000700 /* Repeat count */
+#define ACR_RPTCNT_SHIFT (31-23)
+#define ACR_APARK 0x00000030 /* Address parking */
+#define ACR_APARK_SHIFT (31-27)
+#define ACR_PARKM 0x0000000F /* Parking master */
+#define ACR_PARKM_SHIFT (31-31)
+
+/* ATR - Arbiter Timers Register
+ */
+#define ATR_DTO 0x00FF0000 /* Data time out */
+#define ATR_ATO 0x000000FF /* Address time out */
+
+/* AER - Arbiter Event Register
+ */
+#define AER_ETEA 0x00000020 /* Transfer error */
+#define AER_RES 0x00000010 /* Reserved transfer type */
+#define AER_ECW 0x00000008 /* External control word transfer type */
+#define AER_AO 0x00000004 /* Address Only transfer type */
+#define AER_DTO 0x00000002 /* Data time out */
+#define AER_ATO 0x00000001 /* Address time out */
+
+/* AEATR - Arbiter Event Address Register
+ */
+#define AEATR_EVENT 0x07000000 /* Event type */
+#define AEATR_MSTR_ID 0x001F0000 /* Master Id */
+#define AEATR_TBST 0x00000800 /* Transfer burst */
+#define AEATR_TSIZE 0x00000700 /* Transfer Size */
+#define AEATR_TTYPE 0x0000001F /* Transfer Type */
+
+/* RSR - Reset Status Register
+ */
+#define RSR_SWSR 0x00002000 /* software soft reset */
+#define RSR_SWSR_SHIFT 13
+#define RSR_SWHR 0x00001000 /* software hard reset */
+#define RSR_SWHR_SHIFT 12
+#define RSR_JHRS 0x00000200 /* jtag hreset */
+#define RSR_JHRS_SHIFT 9
+#define RSR_JSRS 0x00000100 /* jtag sreset status */
+#define RSR_JSRS_SHIFT 8
+#define RSR_CSHR 0x00000010 /* checkstop reset status */
+#define RSR_CSHR_SHIFT 4
+#define RSR_SWRS 0x00000008 /* software watchdog reset status */
+#define RSR_SWRS_SHIFT 3
+#define RSR_BMRS 0x00000004 /* bus monitop reset status */
+#define RSR_BMRS_SHIFT 2
+#define RSR_SRS 0x00000002 /* soft reset status */
+#define RSR_SRS_SHIFT 1
+#define RSR_HRS 0x00000001 /* hard reset status */
+#define RSR_HRS_SHIFT 0
+#define RSR_RES ~(RSR_SWSR | RSR_SWHR |\
+ RSR_JHRS | RSR_JSRS | RSR_CSHR | RSR_SWRS |\
+ RSR_BMRS | RSR_SRS | RSR_HRS)
+/* RMR - Reset Mode Register
+ */
+#define RMR_CSRE 0x00000001 /* checkstop reset enable */
+#define RMR_CSRE_SHIFT 0
+#define RMR_RES ~(RMR_CSRE)
+
+/* RCR - Reset Control Register
+ */
+#define RCR_SWHR 0x00000002 /* software hard reset */
+#define RCR_SWSR 0x00000001 /* software soft reset */
+#define RCR_RES ~(RCR_SWHR | RCR_SWSR)
+
+/* RCER - Reset Control Enable Register
+ */
+#define RCER_CRE 0x00000001 /* software hard reset */
+#define RCER_RES ~(RCER_CRE)
+
+/* SPMR - System PLL Mode Register
+ */
+#define SPMR_SPMF 0x0F000000
+#define SPMR_SPMF_SHIFT 24
+#define SPMR_CPMF 0x000F0000
+#define SPMR_CPMF_SHIFT 16
+
+/* SCFR1 System Clock Frequency Register 1
+ */
+#define SCFR1_IPS_DIV 0x2
+#define SCFR1_IPS_DIV_MASK 0x03800000
+#define SCFR1_IPS_DIV_SHIFT 23
+
+/* SCFR2 System Clock Frequency Register 2
+ */
+#define SCFR2_SYS_DIV 0xFC000000
+#define SCFR2_SYS_DIV_SHIFT 26
+
+/* SCCR - System Clock Control Registers
+ */
+
+/* System Clock Control Register 1 commands */
+#define CLOCK_SCCR1_CFG_EN 0x80000000
+#define CLOCK_SCCR1_LPC_EN 0x40000000
+#define CLOCK_SCCR1_NFC_EN 0x20000000
+#define CLOCK_SCCR1_PATA_EN 0x10000000
+#define CLOCK_SCCR1_PSC_EN(cn) (0x08000000 >> (cn))
+#define CLOCK_SCCR1_PSCFIFO_EN 0x00008000
+#define CLOCK_SCCR1_SATA_EN 0x00004000
+#define CLOCK_SCCR1_FEC_EN 0x00002000
+#define CLOCK_SCCR1_TPR_EN 0x00001000
+#define CLOCK_SCCR1_PCI_EN 0x00000800
+#define CLOCK_SCCR1_DDR_EN 0x00000400
+
+/* System Clock Control Register 2 commands */
+#define CLOCK_SCCR2_DIU_EN 0x80000000
+#define CLOCK_SCCR2_AXE_EN 0x40000000
+#define CLOCK_SCCR2_MEM_EN 0x20000000
+#define CLOCK_SCCR2_USB2_EN 0x10000000
+#define CLOCK_SCCR2_USB1_EN 0x08000000
+#define CLOCK_SCCR2_I2C_EN 0x04000000
+#define CLOCK_SCCR2_BDLC_EN 0x02000000
+#define CLOCK_SCCR2_SDHC_EN 0x01000000
+#define CLOCK_SCCR2_SPDIF_EN 0x00800000
+#define CLOCK_SCCR2_MBX_BUS_EN 0x00400000
+#define CLOCK_SCCR2_MBX_EN 0x00200000
+#define CLOCK_SCCR2_MBX_3D_EN 0x00100000
+#define CLOCK_SCCR2_IIM_EN 0x00080000
+
+/* PSC FIFO Command values */
+#define PSC_FIFO_RESET_SLICE 0x80
+#define PSC_FIFO_ENABLE_SLICE 0x01
+
+/* PSC FIFO Controller Command values */
+#define FIFOC_ENABLE_CLOCK_GATE 0x01
+#define FIFOC_DISABLE_CLOCK_GATE 0x00
+
+/* PSC FIFO status */
+#define PSC_FIFO_EMPTY 0x01
+
+/* PSC Command values */
+#define PSC_RX_ENABLE 0x01
+#define PSC_RX_DISABLE 0x02
+#define PSC_TX_ENABLE 0x04
+#define PSC_TX_DISABLE 0x08
+#define PSC_SEL_MODE_REG_1 0x10
+#define PSC_RST_RX 0x20
+#define PSC_RST_TX 0x30
+#define PSC_RST_ERR_STAT 0x40
+#define PSC_RST_BRK_CHG_INT 0x50
+#define PSC_START_BRK 0x60
+#define PSC_STOP_BRK 0x70
+
+/* PSC status register bits */
+#define PSC_SR_CDE 0x0080
+#define PSC_SR_TXEMP 0x0800
+#define PSC_SR_OE 0x1000
+#define PSC_SR_PE 0x2000
+#define PSC_SR_FE 0x4000
+#define PSC_SR_RB 0x8000
+
+/* PSC mode fields */
+#define PSC_MODE_5_BITS 0x00
+#define PSC_MODE_6_BITS 0x01
+#define PSC_MODE_7_BITS 0x02
+#define PSC_MODE_8_BITS 0x03
+#define PSC_MODE_PAREVEN 0x00
+#define PSC_MODE_PARODD 0x04
+#define PSC_MODE_PARFORCE 0x08
+#define PSC_MODE_PARNONE 0x10
+#define PSC_MODE_ENTIMEOUT 0x20
+#define PSC_MODE_RXRTS 0x80
+#define PSC_MODE_1_STOPBIT 0x07
+
+/*
+ * Centralized FIFO Controller has internal memory for all 12 PSCs FIFOs
+ *
+ * NOTE: individual PSC units are free to use whatever area (and size) of the
+ * FIFOC internal memory, so make sure memory areas for FIFO slices used by
+ * different PSCs do not overlap!
+ *
+ * Overall size of FIFOC memory is not documented in the MPC5121e RM, but
+ * tests indicate that it is 1024 words total.
+ */
+#define FIFOC_PSC0_TX_SIZE 0x0 /* number of 4-byte words for FIFO slice */
+#define FIFOC_PSC0_TX_ADDR 0x0
+#define FIFOC_PSC0_RX_SIZE 0x0
+#define FIFOC_PSC0_RX_ADDR 0x0
+
+#define FIFOC_PSC1_TX_SIZE 0x0
+#define FIFOC_PSC1_TX_ADDR 0x0
+#define FIFOC_PSC1_RX_SIZE 0x0
+#define FIFOC_PSC1_RX_ADDR 0x0
+
+#define FIFOC_PSC2_TX_SIZE 0x0
+#define FIFOC_PSC2_TX_ADDR 0x0
+#define FIFOC_PSC2_RX_SIZE 0x0
+#define FIFOC_PSC2_RX_ADDR 0x0
+
+#define FIFOC_PSC3_TX_SIZE 0x04
+#define FIFOC_PSC3_TX_ADDR 0x0
+#define FIFOC_PSC3_RX_SIZE 0x04
+#define FIFOC_PSC3_RX_ADDR 0x10
+
+#define FIFOC_PSC4_TX_SIZE 0x0
+#define FIFOC_PSC4_TX_ADDR 0x0
+#define FIFOC_PSC4_RX_SIZE 0x0
+#define FIFOC_PSC4_RX_ADDR 0x0
+
+#define FIFOC_PSC5_TX_SIZE 0x0
+#define FIFOC_PSC5_TX_ADDR 0x0
+#define FIFOC_PSC5_RX_SIZE 0x0
+#define FIFOC_PSC5_RX_ADDR 0x0
+
+#define FIFOC_PSC6_TX_SIZE 0x0
+#define FIFOC_PSC6_TX_ADDR 0x0
+#define FIFOC_PSC6_RX_SIZE 0x0
+#define FIFOC_PSC6_RX_ADDR 0x0
+
+#define FIFOC_PSC7_TX_SIZE 0x0
+#define FIFOC_PSC7_TX_ADDR 0x0
+#define FIFOC_PSC7_RX_SIZE 0x0
+#define FIFOC_PSC7_RX_ADDR 0x0
+
+#define FIFOC_PSC8_TX_SIZE 0x0
+#define FIFOC_PSC8_TX_ADDR 0x0
+#define FIFOC_PSC8_RX_SIZE 0x0
+#define FIFOC_PSC8_RX_ADDR 0x0
+
+#define FIFOC_PSC9_TX_SIZE 0x0
+#define FIFOC_PSC9_TX_ADDR 0x0
+#define FIFOC_PSC9_RX_SIZE 0x0
+#define FIFOC_PSC9_RX_ADDR 0x0
+
+#define FIFOC_PSC10_TX_SIZE 0x0
+#define FIFOC_PSC10_TX_ADDR 0x0
+#define FIFOC_PSC10_RX_SIZE 0x0
+#define FIFOC_PSC10_RX_ADDR 0x0
+
+#define FIFOC_PSC11_TX_SIZE 0x0
+#define FIFOC_PSC11_TX_ADDR 0x0
+#define FIFOC_PSC11_RX_SIZE 0x0
+#define FIFOC_PSC11_RX_ADDR 0x0
+
+/* IO Control Register
+ */
+
+/* Indexes in regs array */
+#define MEM_IDX 0x00
+#define SPDIF_TXCLOCK_IDX 0x73
+#define SPDIF_TX_IDX 0x74
+#define SPDIF_RX_IDX 0x75
+#define PSC0_0_IDX 0x83
+#define PSC0_1_IDX 0x84
+#define PSC0_2_IDX 0x85
+#define PSC0_3_IDX 0x86
+#define PSC0_4_IDX 0x87
+#define PSC1_0_IDX 0x88
+#define PSC1_1_IDX 0x89
+#define PSC1_2_IDX 0x8a
+#define PSC1_3_IDX 0x8b
+#define PSC1_4_IDX 0x8c
+#define PSC2_0_IDX 0x8d
+#define PSC2_1_IDX 0x8e
+#define PSC2_2_IDX 0x8f
+#define PSC2_3_IDX 0x90
+#define PSC2_4_IDX 0x91
+
+#define IOCTRL_FUNCMUX_SHIFT 7
+#define IOCTRL_FUNCMUX_FEC 1
+#define IOCTRL_MUX_FEC (IOCTRL_FUNCMUX_FEC << IOCTRL_FUNCMUX_SHIFT)
+
+/* Set for DDR */
+#define IOCTRL_MUX_DDR 0x00000036
+
+ /* Register Offset Base */
+#define MPC512X_FEC (CFG_IMMR + 0x02800)
+
+/* Number of I2C buses */
+#define I2C_BUS_CNT 3
+
+/* I2Cn control register bits */
+#define I2C_EN 0x80
+#define I2C_IEN 0x40
+#define I2C_STA 0x20
+#define I2C_TX 0x10
+#define I2C_TXAK 0x08
+#define I2C_RSTA 0x04
+#define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA)
+
+/* I2Cn status register bits */
+#define I2C_CF 0x80
+#define I2C_AAS 0x40
+#define I2C_BB 0x20
+#define I2C_AL 0x10
+#define I2C_SRW 0x04
+#define I2C_IF 0x02
+#define I2C_RXAK 0x01
+
+#endif /* __MPC512X_H__ */
diff --git a/include/mpc5xx.h b/include/mpc5xx.h
index 7508f6d..414651f 100644
--- a/include/mpc5xx.h
+++ b/include/mpc5xx.h
@@ -36,6 +36,7 @@
* Exception offsets (PowerPC standard)
*/
#define EXC_OFF_SYS_RESET 0x0100 /* System reset */
+#define _START_OFFSET EXC_OFF_SYS_RESET
/*-----------------------------------------------------------------------
* ISB bit in IMMR to set internal memory map
@@ -75,10 +76,10 @@
#define SIUMCR_DBPC01 0x00080000 /* - " - */
#define SIUMCR_DBPC10 0x00100000 /* - " - */
#define SIUMCR_DBPC11 0x00180000 /* - " - */
-#define SIUMCR_GPC00 0x00000000 /* General Pins Config */
-#define SIUMCR_GPC01 0x00020000 /* General Pins Config */
-#define SIUMCR_GPC10 0x00040000 /* General Pins Config */
-#define SIUMCR_GPC11 0x00060000 /* General Pins Config */
+#define SIUMCR_GPC00 0x00000000 /* General Pins Config */
+#define SIUMCR_GPC01 0x00020000 /* General Pins Config */
+#define SIUMCR_GPC10 0x00040000 /* General Pins Config */
+#define SIUMCR_GPC11 0x00060000 /* General Pins Config */
#define SIUMCR_DLK 0x00010000 /* Debug Register Lock */
#define SIUMCR_SC00 0x00000000 /* Multi Chip 32 bit */
#define SIUMCR_SC01 0x00004000 /* Muilt Chip 16 bit */
@@ -89,7 +90,7 @@
#define SIUMCR_MLRC01 0x00000400 /* - " - */
#define SIUMCR_MLRC10 0x00000800 /* - " - */
#define SIUMCR_MLRC11 0x00000c00 /* - " - */
-#define SIUMCR_MTSC 0x00000100 /* Memory transfer */
+#define SIUMCR_MTSC 0x00000100 /* Memory transfer */
/*-----------------------------------------------------------------------
* TBSCR - Time Base Status and Control Register
@@ -122,13 +123,13 @@
* SCCR - System Clock and reset Control Register
*/
#define SCCR_DFNL_MSK 0x00000070 /* DFNL mask */
-#define SCCR_DFNH_MSK 0x00000007 /* DFNH mask */
+#define SCCR_DFNH_MSK 0x00000007 /* DFNH mask */
#define SCCR_DFNL_SHIFT 0x0000004 /* DFNL shift value */
#define SCCR_RTSEL 0x00100000 /* RTC circuit input source select */
#define SCCR_EBDF00 0x00000000 /* Division factor 1. CLKOUT is GCLK2 */
#define SCCR_EBDF11 0x00060000 /* reserved */
#define SCCR_TBS 0x02000000 /* Time Base Source */
-#define SCCR_RTDIV 0x01000000 /* RTC Clock Divide */
+#define SCCR_RTDIV 0x01000000 /* RTC Clock Divide */
#define SCCR_COM00 0x00000000 /* full strength CLKOUT output buffer */
#define SCCR_COM01 0x20000000 /* half strength CLKOUT output buffer */
#define SCCR_DFNL000 0x00000000 /* Division by 2 (default = minimum) */
@@ -137,11 +138,11 @@
/*-----------------------------------------------------------------------
* MC - Memory Controller
*/
-#define BR_V 0x00000001 /* Bank valid */
-#define BR_BI 0x00000002 /* Burst inhibit */
-#define BR_PS_8 0x00000400 /* 8 bit port size */
-#define BR_PS_16 0x00000800 /* 16 bit port size */
-#define BR_PS_32 0x00000000 /* 32 bit port size */
+#define BR_V 0x00000001 /* Bank valid */
+#define BR_BI 0x00000002 /* Burst inhibit */
+#define BR_PS_8 0x00000400 /* 8 bit port size */
+#define BR_PS_16 0x00000800 /* 16 bit port size */
+#define BR_PS_32 0x00000000 /* 32 bit port size */
#define BR_LBDIR 0x00000008 /* Late burst data in progess */
#define BR_SETA 0x00000004 /* External Data Acknowledge */
#define OR_SCY_3 0x00000030 /* 3 clock cycles wait states */
@@ -158,8 +159,8 @@
/*-----------------------------------------------------------------------
* UMCR - UIMB Module Configuration Register
*/
-#define UMCR_FSPEED 0x00000000 /* Full speed. Opposit of UMCR_HSPEED */
-#define UMCR_HSPEED 0x10000000 /* Half speed */
+#define UMCR_FSPEED 0x00000000 /* Full speed. Opposit of UMCR_HSPEED */
+#define UMCR_HSPEED 0x10000000 /* Half speed */
/*-----------------------------------------------------------------------
* ICTRL - I-Bus Support Control Register
@@ -173,16 +174,16 @@
* SCI - Serial communication interface
*/
-#define SCI_TDRE 0x0100 /* Transmit data register empty */
-#define SCI_TE 0x0008 /* Transmitter enabled */
+#define SCI_TDRE 0x0100 /* Transmit data register empty */
+#define SCI_TE 0x0008 /* Transmitter enabled */
#define SCI_RE 0x0004 /* Receiver enabled */
-#define SCI_RDRF 0x0040 /* Receive data register full */
-#define SCI_PE 0x0400 /* Parity enable */
-#define SCI_SCXBR_MK 0x1fff /* Baudrate mask */
-#define SCI_SCXDR_MK 0x00ff /* Data register mask */
+#define SCI_RDRF 0x0040 /* Receive data register full */
+#define SCI_PE 0x0400 /* Parity enable */
+#define SCI_SCXBR_MK 0x1fff /* Baudrate mask */
+#define SCI_SCXDR_MK 0x00ff /* Data register mask */
#define SCI_M_11 0x0200 /* Frame size is 11 bit */
#define SCI_M_10 0x0000 /* Frame size is 10 bit */
-#define SCI_PORT_1 ((int)1) /* Place this later somewhere better */
+#define SCI_PORT_1 ((int)1) /* Place this later somewhere better */
#define SCI_PORT_2 ((int)2)
#endif /* __MPC5XX_H__ */
diff --git a/include/mpc5xxx.h b/include/mpc5xxx.h
index 089aa13..a4581a3 100644
--- a/include/mpc5xxx.h
+++ b/include/mpc5xxx.h
@@ -39,6 +39,7 @@
/* Exception offsets (PowerPC standard) */
#define EXC_OFF_SYS_RESET 0x0100
+#define _START_OFFSET EXC_OFF_SYS_RESET
/* useful macros for manipulating CSx_START/STOP */
#if defined(CONFIG_MGT5100)
diff --git a/include/mpc8220.h b/include/mpc8220.h
index ff7acc6..d3b1457 100644
--- a/include/mpc8220.h
+++ b/include/mpc8220.h
@@ -35,6 +35,7 @@
/* Exception offsets (PowerPC standard) */
#define EXC_OFF_SYS_RESET 0x0100
+#define _START_OFFSET EXC_OFF_SYS_RESET
/* Internal memory map */
/* MPC8220 Internal Register MMAP */
diff --git a/include/mpc824x.h b/include/mpc824x.h
index 30fc795..30f01d5 100644
--- a/include/mpc824x.h
+++ b/include/mpc824x.h
@@ -88,7 +88,7 @@
#define PREP_PCI_MEMORY_BUS 0x80000000
#define PREP_PCI_MEMORY_SIZE 0x80000000
#define MPC107_PCI_CMD 0x80000004 /* MPC107 PCI cmd reg */
-#define MPC107_PCI_STAT 0x80000006 /* MPC107 PCI status reg */
+#define MPC107_PCI_STAT 0x80000006 /* MPC107 PCI status reg */
#define PROC_INT1_ADR 0x800000a8 /* MPC107 Processor i/f cfg1 */
#define PROC_INT2_ADR 0x800000ac /* MPC107 Processor i/f cfg2 */
#define MEM_CONT1_ADR 0x800000f0 /* MPC107 Memory control config. 1 */
@@ -98,8 +98,8 @@
#define MEM_ERREN1_ADR 0x800000c0 /* MPC107 Memory error enable 1 */
#define MEM_START1_ADR 0x80000080 /* MPC107 Memory starting addr */
#define MEM_START2_ADR 0x80000084 /* MPC107 Memory starting addr-lo */
-#define XMEM_START1_ADR 0x80000088 /* MPC107 Extended mem. start addr-hi*/
-#define XMEM_START2_ADR 0x8000008c /* MPC107 Extended mem. start addr-lo*/
+#define XMEM_START1_ADR 0x80000088 /* MPC107 Extended mem. start addr-hi*/
+#define XMEM_START2_ADR 0x8000008c /* MPC107 Extended mem. start addr-lo*/
#define MEM_END1_ADR 0x80000090 /* MPC107 Memory ending address */
#define MEM_END2_ADR 0x80000094 /* MPC107 Memory ending addr-lo */
#define XMEM_END1_ADR 0x80000098 /* MPC107 Extended mem. end addrs-hi */
@@ -142,6 +142,8 @@
#define EXC_OFF_JMDDI 0x1600 /* Java Mode denorm detect Interr -- WTF??*/
#define EXC_OFF_RMTE 0x2000 /* Run Mode or Trace Exception */
+#define _START_OFFSET EXC_OFF_SYS_RESET
+
#define MAP_A_CONFIG_ADDR_HIGH 0x8000 /* Upper half of CONFIG_ADDR for Map A */
#define MAP_A_CONFIG_ADDR_LOW 0x0CF8 /* Lower half of CONFIG_ADDR for Map A */
#define MAP_A_CONFIG_DATA_HIGH 0x8000 /* Upper half of CONFIG_DAT for Map A */
diff --git a/include/mpc8260.h b/include/mpc8260.h
index d9dd92d..0525294 100644
--- a/include/mpc8260.h
+++ b/include/mpc8260.h
@@ -53,7 +53,7 @@
* Exception offsets (PowerPC standard)
*/
#define EXC_OFF_SYS_RESET 0x0100 /* System reset */
-
+#define _START_OFFSET EXC_OFF_SYS_RESET
/*-----------------------------------------------------------------------
* BCR - Bus Configuration Register 4-25
@@ -664,7 +664,7 @@
#define PSDMR_CL_3 0x00000003 /* CAS Latency = 3 */
/*-----------------------------------------------------------------------
- * LSDMR - Local Bus SDRAM Mode Register 10-24
+ * LSDMR - Local Bus SDRAM Mode Register 10-24
*/
/*
@@ -707,23 +707,23 @@
/*-----------------------------------------------------------------------
* TMR1-TMR4 - Timer Mode Registers 17-6
*/
-#define TMRx_PS_MSK 0xff00 /* Prescaler Value */
+#define TMRx_PS_MSK 0xff00 /* Prescaler Value */
#define TMRx_CE_MSK 0x00c0 /* Capture Edge and Enable Interrupt*/
-#define TMRx_OM 0x0020 /* Output Mode */
+#define TMRx_OM 0x0020 /* Output Mode */
#define TMRx_ORI 0x0010 /* Output Reference Interrupt Enable*/
-#define TMRx_FRR 0x0008 /* Free Run/Restart */
+#define TMRx_FRR 0x0008 /* Free Run/Restart */
#define TMRx_ICLK_MSK 0x0006 /* Timer Input Clock Source mask */
-#define TMRx_GE 0x0001 /* Gate Enable */
+#define TMRx_GE 0x0001 /* Gate Enable */
#define TMRx_CE_INTR_DIS 0x0000 /* Disable Interrupt on capture event*/
#define TMRx_CE_RISING 0x0040 /* Capture on Rising TINx edge only */
#define TMRx_CE_FALLING 0x0080 /* Capture on Falling TINx edge only */
-#define TMRx_CE_ANY 0x00c0 /* Capture on any TINx edge */
+#define TMRx_CE_ANY 0x00c0 /* Capture on any TINx edge */
-#define TMRx_ICLK_IN_CAS 0x0000 /* Internally cascaded input */
+#define TMRx_ICLK_IN_CAS 0x0000 /* Internally cascaded input */
#define TMRx_ICLK_IN_GEN 0x0002 /* Internal General system clock*/
#define TMRx_ICLK_IN_GEN_DIV16 0x0004 /* Internal General system clk div 16*/
-#define TMRx_ICLK_TIN_PIN 0x0006 /* TINx pin */
+#define TMRx_ICLK_TIN_PIN 0x0006 /* TINx pin */
/*-----------------------------------------------------------------------
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index c2a4ff5..4d32c6a 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -25,6 +25,7 @@
/* System reset offset (PowerPC standard)
*/
#define EXC_OFF_SYS_RESET 0x0100
+#define _START_OFFSET EXC_OFF_SYS_RESET
/* IMMRBAR - Internal Memory Register Base Address
*/
@@ -85,6 +86,8 @@
#define SPR_8360_REV12 0x80490012
#define SPR_8360E_REV20 0x80480020
#define SPR_8360_REV20 0x80490020
+#define SPR_8360E_REV21 0x80480021
+#define SPR_8360_REV21 0x80490021
#define SPR_8323E_REV10 0x80620010
#define SPR_8323_REV10 0x80630010
@@ -95,6 +98,11 @@
#define SPR_8321E_REV11 0x80660011
#define SPR_8321_REV11 0x80670011
+#define SPR_8311_REV10 0x80B30010
+#define SPR_8311E_REV10 0x80B20010
+#define SPR_8313_REV10 0x80B10010
+#define SPR_8313E_REV10 0x80B00010
+
/* SPCR - System Priority Configuration Register
*/
#define SPCR_PCIHPE 0x10000000 /* PCI Highest Priority Enable */
@@ -121,6 +129,15 @@
#define SPCR_TSEC2BDP_SHIFT (31-29)
#define SPCR_TSEC2EP 0x00000003 /* TSEC2 emergency priority */
#define SPCR_TSEC2EP_SHIFT (31-31)
+
+#elif defined(CONFIG_MPC831X)
+/* SPCR bits - MPC831x specific */
+#define SPCR_TSECDP 0x00003000 /* TSEC data priority */
+#define SPCR_TSECDP_SHIFT (31-19)
+#define SPCR_TSECEP 0x00000C00 /* TSEC emergency priority */
+#define SPCR_TSECEP_SHIFT (31-21)
+#define SPCR_TSECBDP 0x00000300 /* TSEC buffer descriptor priority */
+#define SPCR_TSECBDP_SHIFT (31-23)
#endif
/* SICRL/H - System I/O Configuration Register Low/High
@@ -195,6 +212,36 @@
#define SICRL_PCI_MSRC 0x10000000
#define SICRL_URT_CTPR 0x06000000
#define SICRL_IRQ_CTPR 0x00C00000
+
+#elif defined(CONFIG_MPC831X)
+/* SICRL bits - MPC831x specific */
+#define SICRL_LBC 0x30000000
+#define SICRL_UART 0x0C000000
+#define SICRL_SPI_A 0x03000000
+#define SICRL_SPI_B 0x00C00000
+#define SICRL_SPI_C 0x00300000
+#define SICRL_SPI_D 0x000C0000
+#define SICRL_USBDR 0x00000C00
+#define SICRL_ETSEC1_A 0x0000000C
+#define SICRL_ETSEC2_A 0x00000003
+
+/* SICRH bits - MPC831x specific */
+#define SICRH_INTR_A 0x02000000
+#define SICRH_INTR_B 0x00C00000
+#define SICRH_IIC 0x00300000
+#define SICRH_ETSEC2_B 0x000C0000
+#define SICRH_ETSEC2_C 0x00030000
+#define SICRH_ETSEC2_D 0x0000C000
+#define SICRH_ETSEC2_E 0x00003000
+#define SICRH_ETSEC2_F 0x00000C00
+#define SICRH_ETSEC2_G 0x00000300
+#define SICRH_ETSEC1_B 0x00000080
+#define SICRH_ETSEC1_C 0x00000060
+#define SICRH_GTX1_DLY 0x00000008
+#define SICRH_GTX2_DLY 0x00000004
+#define SICRH_TSOBI1 0x00000002
+#define SICRH_TSOBI2 0x00000001
+
#endif
/* SWCRR - System Watchdog Control Register
@@ -393,6 +440,28 @@
#define HRCWH_ROM_LOC_LOCAL_16BIT 0x00600000
#define HRCWH_ROM_LOC_LOCAL_32BIT 0x00700000
+#if defined(CONFIG_MPC831X)
+#define HRCWH_ROM_LOC_NAND_SP_8BIT 0x00100000
+#define HRCWH_ROM_LOC_NAND_SP_16BIT 0x00200000
+#define HRCWH_ROM_LOC_NAND_LP_8BIT 0x00500000
+#define HRCWH_ROM_LOC_NAND_LP_16BIT 0x00600000
+
+#define HRCWH_RL_EXT_LEGACY 0x00000000
+#define HRCWH_RL_EXT_NAND 0x00040000
+
+#define HRCWH_TSEC1M_IN_MII 0x00000000
+#define HRCWH_TSEC1M_IN_RMII 0x00002000
+#define HRCWH_TSEC1M_IN_RGMII 0x00006000
+#define HRCWH_TSEC1M_IN_RTBI 0x0000A000
+#define HRCWH_TSEC1M_IN_SGMII 0x0000C000
+
+#define HRCWH_TSEC2M_IN_MII 0x00000000
+#define HRCWH_TSEC2M_IN_RMII 0x00000400
+#define HRCWH_TSEC2M_IN_RGMII 0x00000C00
+#define HRCWH_TSEC2M_IN_RTBI 0x00001400
+#define HRCWH_TSEC2M_IN_SGMII 0x00001800
+#endif
+
#if defined(CONFIG_MPC834X)
#define HRCWH_TSEC1M_IN_RGMII 0x00000000
#define HRCWH_TSEC1M_IN_RTBI 0x00004000
@@ -523,6 +592,20 @@
#define SCCR_TSEC2CM_1 0x10000000
#define SCCR_TSEC2CM_2 0x20000000
#define SCCR_TSEC2CM_3 0x30000000
+
+#elif defined(CONFIG_MPC831X)
+/* TSEC1 bits are for TSEC2 as well */
+#define SCCR_TSEC1CM 0xc0000000
+#define SCCR_TSEC1CM_SHIFT 30
+#define SCCR_TSEC1CM_1 0x40000000
+#define SCCR_TSEC1CM_2 0x80000000
+#define SCCR_TSEC1CM_3 0xC0000000
+
+#define SCCR_TSEC1ON 0x20000000
+#define SCCR_TSEC1ON_SHIFT 29
+#define SCCR_TSEC2ON 0x10000000
+#define SCCR_TSEC2ON_SHIFT 28
+
#endif
#define SCCR_USBMPHCM 0x00c00000
@@ -556,6 +639,25 @@
#define CSCONFIG_COL_BIT_10 0x00000002
#define CSCONFIG_COL_BIT_11 0x00000003
+/* TIMING_CFG_0 - DDR SDRAM Timing Configuration 0
+ */
+#define TIMING_CFG0_RWT 0xC0000000
+#define TIMING_CFG0_RWT_SHIFT 30
+#define TIMING_CFG0_WRT 0x30000000
+#define TIMING_CFG0_WRT_SHIFT 28
+#define TIMING_CFG0_RRT 0x0C000000
+#define TIMING_CFG0_RRT_SHIFT 26
+#define TIMING_CFG0_WWT 0x03000000
+#define TIMING_CFG0_WWT_SHIFT 24
+#define TIMING_CFG0_ACT_PD_EXIT 0x00700000
+#define TIMING_CFG0_ACT_PD_EXIT_SHIFT 20
+#define TIMING_CFG0_PRE_PD_EXIT 0x00070000
+#define TIMING_CFG0_PRE_PD_EXIT_SHIFT 16
+#define TIMING_CFG0_ODT_PD_EXIT 0x00000F00
+#define TIMING_CFG0_ODT_PD_EXIT_SHIFT 8
+#define TIMING_CFG0_MRS_CYC 0x00000F00
+#define TIMING_CFG0_MRS_CYC_SHIFT 0
+
/* TIMING_CFG_1 - DDR SDRAM Timing Configuration 1
*/
#define TIMING_CFG1_PRETOACT 0x70000000
@@ -586,20 +688,33 @@
#define TIMING_CFG2_WR_DATA_DELAY_SHIFT 10
#define TIMING_CFG2_CPO_DEF 0x00000000 /* default (= CASLAT + 1) */
+#define TIMING_CFG2_ADD_LAT 0x70000000
+#define TIMING_CFG2_ADD_LAT_SHIFT 28
+#define TIMING_CFG2_WR_LAT_DELAY 0x00380000
+#define TIMING_CFG2_WR_LAT_DELAY_SHIFT 19
+#define TIMING_CFG2_RD_TO_PRE 0x0000E000
+#define TIMING_CFG2_RD_TO_PRE_SHIFT 13
+#define TIMING_CFG2_CKE_PLS 0x000001C0
+#define TIMING_CFG2_CKE_PLS_SHIFT 6
+#define TIMING_CFG2_FOUR_ACT 0x0000003F
+#define TIMING_CFG2_FOUR_ACT_SHIFT 0
+
/* DDR_SDRAM_CFG - DDR SDRAM Control Configuration
*/
#define SDRAM_CFG_MEM_EN 0x80000000
#define SDRAM_CFG_SREN 0x40000000
#define SDRAM_CFG_ECC_EN 0x20000000
#define SDRAM_CFG_RD_EN 0x10000000
-#define SDRAM_CFG_SDRAM_TYPE 0x03000000
+#define SDRAM_CFG_SDRAM_TYPE_DDR1 0x02000000
+#define SDRAM_CFG_SDRAM_TYPE_DDR2 0x03000000
+#define SDRAM_CFG_SDRAM_TYPE_MASK 0x07000000
#define SDRAM_CFG_SDRAM_TYPE_SHIFT 24
#define SDRAM_CFG_DYN_PWR 0x00200000
#define SDRAM_CFG_32_BE 0x00080000
#define SDRAM_CFG_8_BE 0x00040000
#define SDRAM_CFG_NCAP 0x00020000
#define SDRAM_CFG_2T_EN 0x00008000
-#define SDRAM_CFG_SDRAM_TYPE_DDR 0x02000000
+#define SDRAM_CFG_BI 0x00000001
/* DDR_SDRAM_MODE - DDR SDRAM Mode Register
*/
@@ -732,11 +847,15 @@
#define BR_PS_32 0x00001800 /* Port Size 32 bit */
#define BR_DECC 0x00000600
#define BR_DECC_SHIFT 9
+#define BR_DECC_OFF 0x00000000
+#define BR_DECC_CHK 0x00000200
+#define BR_DECC_CHK_GEN 0x00000400
#define BR_WP 0x00000100
#define BR_WP_SHIFT 8
#define BR_MSEL 0x000000E0
#define BR_MSEL_SHIFT 5
#define BR_MS_GPCM 0x00000000 /* GPCM */
+#define BR_MS_FCM 0x00000020 /* FCM */
#define BR_MS_SDRAM 0x00000060 /* SDRAM */
#define BR_MS_UPMA 0x00000080 /* UPMA */
#define BR_MS_UPMB 0x000000A0 /* UPMB */
@@ -803,6 +922,34 @@
#define OR_GPCM_EAD 0x00000001
#define OR_GPCM_EAD_SHIFT 0
+#define OR_FCM_AM 0xFFFF8000
+#define OR_FCM_AM_SHIFT 15
+#define OR_FCM_BCTLD 0x00001000
+#define OR_FCM_BCTLD_SHIFT 12
+#define OR_FCM_PGS 0x00000400
+#define OR_FCM_PGS_SHIFT 10
+#define OR_FCM_CSCT 0x00000200
+#define OR_FCM_CSCT_SHIFT 9
+#define OR_FCM_CST 0x00000100
+#define OR_FCM_CST_SHIFT 8
+#define OR_FCM_CHT 0x00000080
+#define OR_FCM_CHT_SHIFT 7
+#define OR_FCM_SCY 0x00000070
+#define OR_FCM_SCY_SHIFT 4
+#define OR_FCM_SCY_1 0x00000010
+#define OR_FCM_SCY_2 0x00000020
+#define OR_FCM_SCY_3 0x00000030
+#define OR_FCM_SCY_4 0x00000040
+#define OR_FCM_SCY_5 0x00000050
+#define OR_FCM_SCY_6 0x00000060
+#define OR_FCM_SCY_7 0x00000070
+#define OR_FCM_RST 0x00000008
+#define OR_FCM_RST_SHIFT 3
+#define OR_FCM_TRLX 0x00000004
+#define OR_FCM_TRLX_SHIFT 2
+#define OR_FCM_EHTR 0x00000002
+#define OR_FCM_EHTR_SHIFT 1
+
#define OR_UPM_AM 0xFFFF8000
#define OR_UPM_AM_SHIFT 15
#define OR_UPM_XAM 0x00006000
@@ -1019,4 +1166,118 @@
#define PIWAR_IWS_1G 0x0000001D
#define PIWAR_IWS_2G 0x0000001E
+/* PMCCR1 - PCI Configuration Register 1
+ */
+#define PMCCR1_POWER_OFF 0x00000020
+
+/* FMR - Flash Mode Register
+ */
+#define FMR_CWTO 0x0000F000
+#define FMR_CWTO_SHIFT 12
+#define FMR_BOOT 0x00000800
+#define FMR_ECCM 0x00000100
+#define FMR_AL 0x00000030
+#define FMR_AL_SHIFT 4
+#define FMR_OP 0x00000003
+#define FMR_OP_SHIFT 0
+
+/* FIR - Flash Instruction Register
+ */
+#define FIR_OP0 0xF0000000
+#define FIR_OP0_SHIFT 28
+#define FIR_OP1 0x0F000000
+#define FIR_OP1_SHIFT 24
+#define FIR_OP2 0x00F00000
+#define FIR_OP2_SHIFT 20
+#define FIR_OP3 0x000F0000
+#define FIR_OP3_SHIFT 16
+#define FIR_OP4 0x0000F000
+#define FIR_OP4_SHIFT 12
+#define FIR_OP5 0x00000F00
+#define FIR_OP5_SHIFT 8
+#define FIR_OP6 0x000000F0
+#define FIR_OP6_SHIFT 4
+#define FIR_OP7 0x0000000F
+#define FIR_OP7_SHIFT 0
+#define FIR_OP_NOP 0x0 /* No operation and end of sequence */
+#define FIR_OP_CA 0x1 /* Issue current column address */
+#define FIR_OP_PA 0x2 /* Issue current block+page address */
+#define FIR_OP_UA 0x3 /* Issue user defined address */
+#define FIR_OP_CM0 0x4 /* Issue command from FCR[CMD0] */
+#define FIR_OP_CM1 0x5 /* Issue command from FCR[CMD1] */
+#define FIR_OP_CM2 0x6 /* Issue command from FCR[CMD2] */
+#define FIR_OP_CM3 0x7 /* Issue command from FCR[CMD3] */
+#define FIR_OP_WB 0x8 /* Write FBCR bytes from FCM buffer */
+#define FIR_OP_WS 0x9 /* Write 1 or 2 bytes from MDR[AS] */
+#define FIR_OP_RB 0xA /* Read FBCR bytes to FCM buffer */
+#define FIR_OP_RS 0xB /* Read 1 or 2 bytes to MDR[AS] */
+#define FIR_OP_CW0 0xC /* Wait then issue FCR[CMD0] */
+#define FIR_OP_CW1 0xD /* Wait then issue FCR[CMD1] */
+#define FIR_OP_RBW 0xE /* Wait then read FBCR bytes */
+#define FIR_OP_RSW 0xF /* Wait then read 1 or 2 bytes */
+
+/* FCR - Flash Command Register
+ */
+#define FCR_CMD0 0xFF000000
+#define FCR_CMD0_SHIFT 24
+#define FCR_CMD1 0x00FF0000
+#define FCR_CMD1_SHIFT 16
+#define FCR_CMD2 0x0000FF00
+#define FCR_CMD2_SHIFT 8
+#define FCR_CMD3 0x000000FF
+#define FCR_CMD3_SHIFT 0
+
+/* FBAR - Flash Block Address Register
+ */
+#define FBAR_BLK 0x00FFFFFF
+
+/* FPAR - Flash Page Address Register
+ */
+#define FPAR_SP_PI 0x00007C00
+#define FPAR_SP_PI_SHIFT 10
+#define FPAR_SP_MS 0x00000200
+#define FPAR_SP_CI 0x000001FF
+#define FPAR_SP_CI_SHIFT 0
+#define FPAR_LP_PI 0x0003F000
+#define FPAR_LP_PI_SHIFT 12
+#define FPAR_LP_MS 0x00000800
+#define FPAR_LP_CI 0x000007FF
+#define FPAR_LP_CI_SHIFT 0
+
+/* LTESR - Transfer Error Status Register
+ */
+#define LTESR_BM 0x80000000
+#define LTESR_FCT 0x40000000
+#define LTESR_PAR 0x20000000
+#define LTESR_WP 0x04000000
+#define LTESR_ATMW 0x00800000
+#define LTESR_ATMR 0x00400000
+#define LTESR_CS 0x00080000
+#define LTESR_CC 0x00000001
+
+/* DDR Control Driver Register
+ */
+#define DDRCDR_EN 0x40000000
+#define DDRCDR_PZ 0x3C000000
+#define DDRCDR_PZ_MAXZ 0x00000000
+#define DDRCDR_PZ_HIZ 0x20000000
+#define DDRCDR_PZ_NOMZ 0x30000000
+#define DDRCDR_PZ_LOZ 0x38000000
+#define DDRCDR_PZ_MINZ 0x3C000000
+#define DDRCDR_NZ 0x3C000000
+#define DDRCDR_NZ_MAXZ 0x00000000
+#define DDRCDR_NZ_HIZ 0x02000000
+#define DDRCDR_NZ_NOMZ 0x03000000
+#define DDRCDR_NZ_LOZ 0x03800000
+#define DDRCDR_NZ_MINZ 0x03C00000
+#define DDRCDR_ODT 0x00080000
+#define DDRCDR_DDR_CFG 0x00040000
+#define DDRCDR_M_ODR 0x00000002
+#define DDRCDR_Q_DRN 0x00000001
+
+#ifndef __ASSEMBLY__
+struct pci_region;
+void mpc83xx_pci_init(int num_buses, struct pci_region **reg, int warmboot);
+#endif
+
#endif /* __MPC83XX_H__ */
diff --git a/include/mpc85xx.h b/include/mpc85xx.h
index a4d99b2..321b24f 100644
--- a/include/mpc85xx.h
+++ b/include/mpc85xx.h
@@ -1,13 +1,14 @@
/*
- * Copyright 2004 Freescale Semiconductor.
+ * Copyright 2004, 2007 Freescale Semiconductor.
* Copyright(c) 2003 Motorola Inc.
- * Xianghua Xiao (x.xiao@motorola.com)
*/
#ifndef __MPC85xx_H__
#define __MPC85xx_H__
-#define EXC_OFF_SYS_RESET 0x0100 /* System reset */
+/* define for common ppc_asm.tmpl */
+#define EXC_OFF_SYS_RESET 0x100 /* System reset */
+#define _START_OFFSET 0
#if defined(CONFIG_E500)
#include <e500.h>
diff --git a/include/mpc86xx.h b/include/mpc86xx.h
index 673bfed..9fd349a 100644
--- a/include/mpc86xx.h
+++ b/include/mpc86xx.h
@@ -8,7 +8,7 @@
#define __MPC86xx_H__
#define EXC_OFF_SYS_RESET 0x0100 /* System reset offset */
-
+#define _START_OFFSET EXC_OFF_SYS_RESET
/*
* platform register addresses
diff --git a/include/mpc8xx.h b/include/mpc8xx.h
index 2911758..bef748f 100644
--- a/include/mpc8xx.h
+++ b/include/mpc8xx.h
@@ -35,7 +35,7 @@
* Exception offsets (PowerPC standard)
*/
#define EXC_OFF_SYS_RESET 0x0100 /* System reset */
-
+#define _START_OFFSET EXC_OFF_SYS_RESET
/*-----------------------------------------------------------------------
* SYPCR - System Protection Control Register 11-9
@@ -208,12 +208,12 @@
#define SCCR_DFBRG10 0x00001000 /* BRGCLK division by 16 */
#define SCCR_DFBRG11 0x00001800 /* BRGCLK division by 64 */
#define SCCR_DFNL000 0x00000000 /* Division by 2 (default = minimum) */
-#define SCCR_DFNL001 0x00000100 /* Division by 4 */
-#define SCCR_DFNL010 0x00000200 /* Division by 8 */
-#define SCCR_DFNL011 0x00000300 /* Division by 16 */
-#define SCCR_DFNL100 0x00000400 /* Division by 32 */
-#define SCCR_DFNL101 0x00000500 /* Division by 64 */
-#define SCCR_DFNL110 0x00000600 /* Division by 128 */
+#define SCCR_DFNL001 0x00000100 /* Division by 4 */
+#define SCCR_DFNL010 0x00000200 /* Division by 8 */
+#define SCCR_DFNL011 0x00000300 /* Division by 16 */
+#define SCCR_DFNL100 0x00000400 /* Division by 32 */
+#define SCCR_DFNL101 0x00000500 /* Division by 64 */
+#define SCCR_DFNL110 0x00000600 /* Division by 128 */
#define SCCR_DFNL111 0x00000700 /* Division by 256 (maximum) */
#define SCCR_DFNH000 0x00000000 /* Division by 1 (default = minimum) */
#define SCCR_DFNH110 0x000000D0 /* Division by 64 (maximum) */
diff --git a/include/nand.h b/include/nand.h
index 23493f7..3c0752e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -32,6 +32,7 @@
extern int nand_curr_device;
extern nand_info_t nand_info[];
+extern void nand_init(void);
static inline int nand_read(nand_info_t *info, ulong ofs, ulong *len, u_char *buf)
{
diff --git a/include/net.h b/include/net.h
index 461e038..603452a 100644
--- a/include/net.h
+++ b/include/net.h
@@ -99,10 +99,12 @@
int state;
int (*init) (struct eth_device*, bd_t*);
- int (*send) (struct eth_device*, volatile void* pachet, int length);
+ int (*send) (struct eth_device*, volatile void* packet, int length);
int (*recv) (struct eth_device*);
void (*halt) (struct eth_device*);
-
+#ifdef CONFIG_MCAST_TFTP
+ int (*mcast) (struct eth_device*, u32 ip, u8 set);
+#endif
struct eth_device *next;
void *priv;
};
@@ -124,6 +126,11 @@
extern void eth_halt(void); /* stop SCC */
extern char *eth_get_name(void); /* get name of current device */
+#ifdef CONFIG_MCAST_TFTP
+int eth_mcast_join( IPaddr_t mcast_addr, u8 join);
+u32 ether_crc (size_t len, unsigned char const *p);
+#endif
+
/**********************************************************************/
/*
@@ -296,7 +303,7 @@
extern IPaddr_t NetOurGatewayIP; /* Our gateway IP addresse */
extern IPaddr_t NetOurSubnetMask; /* Our subnet mask (0 = unknown)*/
extern IPaddr_t NetOurDNSIP; /* Our Domain Name Server (0 = unknown)*/
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS2)
+#if defined(CONFIG_BOOTP_DNS2)
extern IPaddr_t NetOurDNS2IP; /* Our 2nd Domain Name Server (0 = unknown)*/
#endif
extern char NetOurNISDomain[32]; /* Our NIS domain */
@@ -341,17 +348,17 @@
/* from net/net.c */
extern char BootFile[128]; /* Boot File name */
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
extern IPaddr_t NetPingIP; /* the ip address to ping */
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
/* when CDP completes these hold the return values */
extern ushort CDPNativeVLAN;
extern ushort CDPApplianceVLAN;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
extern IPaddr_t NetNtpServerIP; /* the ip address to NTP */
extern int NetTimeOffset; /* offset time from UTC */
#endif
@@ -435,6 +442,29 @@
memcpy((void*)to, (void*)from, sizeof(ulong));
}
+/**
+ * is_zero_ether_addr - Determine if give Ethernet address is all zeros.
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Return true if the address is all zeroes.
+ */
+static inline int is_zero_ether_addr(const u8 *addr)
+{
+ return !(addr[0] | addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
+}
+
+/**
+ * is_multicast_ether_addr - Determine if the Ethernet address is a multicast.
+ * @addr: Pointer to a six-byte array containing the Ethernet address
+ *
+ * Return true if the address is a multicast address.
+ * By definition the broadcast address is also a multicast address.
+ */
+static inline int is_multicast_ether_addr(const u8 *addr)
+{
+ return (0x01 & addr[0]);
+}
+
/* Convert an IP address to a string */
extern void ip_to_string (IPaddr_t x, char *s);
diff --git a/include/pci.h b/include/pci.h
index 7c9a0e3..8e5dacc 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -302,6 +302,12 @@
#define PCI_MAX_PCI_DEVICES 32
#define PCI_MAX_PCI_FUNCTIONS 8
+#define PCI_DCR 0x54 /* PCIe Device Control Register */
+#define PCI_DSR 0x56 /* PCIe Device Status Register */
+#define PCI_LSR 0x5e /* PCIe Link Status Register */
+#define PCI_LTSSM 0x404 /* PCIe Link Training, Status State Machine */
+#define PCI_LTSSM_L0 0x16 /* L0 state */
+
/* Include the ID list */
#include <pci_ids.h>
diff --git a/include/pcmcia.h b/include/pcmcia.h
index 8f564da..7305805 100644
--- a/include/pcmcia.h
+++ b/include/pcmcia.h
@@ -31,8 +31,8 @@
* Allow configuration to select PCMCIA slot,
* or try to generate a useful default
*/
-#if ( CONFIG_COMMANDS & CFG_CMD_PCMCIA) || \
- ((CONFIG_COMMANDS & CFG_CMD_IDE) && \
+#if defined(CONFIG_CMD_PCMCIA) || \
+ (defined(CONFIG_CMD_IDE) && \
(defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
@@ -306,14 +306,14 @@
#define CISTPL_IDE_HAS_INDEX 0x20
#define CISTPL_IDE_IOIS16 0x40
-#endif /* CFG_CMD_PCMCIA || CFG_CMD_IDE && (CONFIG_IDE_8xx_PCCARD || CONFIG_IDE_8xx_DIRECT) */
+#endif
#ifdef CONFIG_8xx
extern u_int *pcmcia_pgcrx[];
#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \
+#if defined(CONFIG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD) \
|| defined(CONFIG_PXA_PCMCIA)
extern int check_ide_device(int slot);
#endif
diff --git a/include/post.h b/include/post.h
index cdefbdd..c8062bb 100644
--- a/include/post.h
+++ b/include/post.h
@@ -91,6 +91,8 @@
#define CFG_POST_SYSMON 0x00000800
#define CFG_POST_DSP 0x00001000
#define CFG_POST_CODEC 0x00002000
+#define CFG_POST_FPU 0x00004000
+#define CFG_POST_ECC 0x00008000
#endif /* CONFIG_POST */
diff --git a/include/ppc405.h b/include/ppc405.h
index a2503a9..0c7bf3e 100644
--- a/include/ppc405.h
+++ b/include/ppc405.h
@@ -27,6 +27,15 @@
/*--------------------------------------------------------------------- */
#define srr2 0x3de /* save/restore register 2 */
#define srr3 0x3df /* save/restore register 3 */
+
+ /*
+ * 405 does not really have CSRR0/1 but SRR2/3 are used during critical
+ * exception for the exact same purposes - let's alias them and have a
+ * common handling in crit_return() and CRIT_EXCEPTION
+ */
+ #define csrr0 srr2
+ #define csrr1 srr3
+
#define dbsr 0x3f0 /* debug status register */
#define dbcr0 0x3f2 /* debug control register 0 */
#define dbcr1 0x3bd /* debug control register 1 */
@@ -134,12 +143,12 @@
#define UIC_USBH1 0x00040000 /* USB Host 1 */
#define UIC_USBH2 0x00020000 /* USB Host 2 */
#define UIC_USBDEV 0x00010000 /* USB Device */
-#define UIC_ENET 0x00008000 /* Ethernet interrupt status */
-#define UIC_ENET1 0x00008000 /* dummy define */
+#define UIC_ENET 0x00008000 /* Ethernet interrupt status */
+#define UIC_ENET1 0x00008000 /* dummy define */
#define UIC_EMAC_WAKE 0x00004000 /* EMAC wake up */
#define UIC_MADMAL 0x00002000 /* Logical OR of following MadMAL int */
-#define UIC_MAL_SERR 0x00002000 /* MAL SERR */
+#define UIC_MAL_SERR 0x00002000 /* MAL SERR */
#define UIC_MAL_TXDE 0x00002000 /* MAL TXDE */
#define UIC_MAL_RXDE 0x00002000 /* MAL RXDE */
@@ -532,6 +541,18 @@
#define PLLMR1_266_66_33_33 (PLL_FBKDIV_8 | \
PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW)
+#define PLLMR0_333_111_55_37 (PLL_CPUDIV_1 | PLL_PLBDIV_3 | \
+ PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \
+ PLL_MALDIV_1 | PLL_PCIDIV_3)
+#define PLLMR1_333_111_55_37 (PLL_FBKDIV_10 | \
+ PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
+ PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
+#define PLLMR0_333_111_55_111 (PLL_CPUDIV_1 | PLL_PLBDIV_3 | \
+ PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \
+ PLL_MALDIV_1 | PLL_PCIDIV_1)
+#define PLLMR1_333_111_55_111 (PLL_FBKDIV_10 | \
+ PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \
+ PLL_TUNE_15_M_40 | PLL_TUNE_VCO_HI)
/*
* PLL Voltage Controlled Oscillator (VCO) definitions
@@ -547,8 +568,8 @@
#define sdrcfga (SDR_DCR_BASE+0x0) /* ADDR */
#define sdrcfgd (SDR_DCR_BASE+0x1) /* Data */
-#define mtsdr(reg, data) mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,data)
-#define mfsdr(reg, data) mtdcr(sdrcfga,reg);data = mfdcr(sdrcfgd)
+#define mtsdr(reg, data) do { mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,data); } while (0)
+#define mfsdr(reg, data) do { mtdcr(sdrcfga,reg);data = mfdcr(sdrcfgd); } while (0)
#define sdrnand0 0x4000
#define sdrultra0 0x4040
@@ -556,6 +577,11 @@
#define sdricintstat 0x4510
#define SDR_NAND0_NDEN 0x80000000
+#define SDR_NAND0_NDBTEN 0x40000000
+#define SDR_NAND0_NDBADR_MASK 0x30000000
+#define SDR_NAND0_NDBPG_MASK 0x0f000000
+#define SDR_NAND0_NDAREN 0x00800000
+#define SDR_NAND0_NDRBEN 0x00400000
#define SDR_ULTRA0_NDGPIOBP 0x80000000
#define SDR_ULTRA0_CSN_MASK 0x78000000
@@ -563,6 +589,9 @@
#define SDR_ULTRA0_CSNSEL1 0x20000000
#define SDR_ULTRA0_CSNSEL2 0x10000000
#define SDR_ULTRA0_CSNSEL3 0x08000000
+#define SDR_ULTRA0_EBCRDYEN 0x04000000
+#define SDR_ULTRA0_SPISSINEN 0x02000000
+#define SDR_ULTRA0_NFSRSTEN 0x01000000
#define SDR_ULTRA1_LEDNENABLE 0x40000000
@@ -593,13 +622,15 @@
/*
* Macro for accessing the indirect CPR register
*/
-#define mtcpr(reg, data) mtdcr(cprcfga,reg);mtdcr(cprcfgd,data)
-#define mfcpr(reg, data) mtdcr(cprcfga,reg);data = mfdcr(cprcfgd)
+#define mtcpr(reg, data) do { mtdcr(cprcfga,reg);mtdcr(cprcfgd,data); } while (0)
+#define mfcpr(reg, data) do { mtdcr(cprcfga,reg);data = mfdcr(cprcfgd); } while (0)
#define CPR_CLKUPD_ENPLLCH_EN 0x40000000 /* Enable CPR PLL Changes */
#define CPR_CLKUPD_ENDVCH_EN 0x20000000 /* Enable CPR Sys. Div. Changes */
#define CPR_PERD0_SPIDV_MASK 0x000F0000 /* SPI Clock Divider */
+#define PLLC_SRC_MASK 0x20000000 /* PLL feedback source */
+
#define PLLD_FBDV_MASK 0x1F000000 /* PLL feedback divider value */
#define PLLD_FWDVA_MASK 0x000F0000 /* PLL forward divider A value */
#define PLLD_FWDVB_MASK 0x00000700 /* PLL forward divider B value */
@@ -869,7 +900,7 @@
#define cntrl0 (CNTRL_DCR_BASE+0x1) /* Control 0 register */
#define cntrl1 (CNTRL_DCR_BASE+0x2) /* Control 1 register */
#define reset (CNTRL_DCR_BASE+0x3) /* reset register */
-#define strap (CNTRL_DCR_BASE+0x4) /* strap register */
+#define strap (CNTRL_DCR_BASE+0x4) /* strap register */
#define ecr (0xaa) /* edge conditioner register (405gpr) */
@@ -1102,13 +1133,13 @@
| UART Register Offsets
'----------------------------------------------------------------------------*/
#define DATA_REG 0x00
-#define DL_LSB 0x00
-#define DL_MSB 0x01
+#define DL_LSB 0x00
+#define DL_MSB 0x01
#define INT_ENABLE 0x01
#define FIFO_CONTROL 0x02
#define LINE_CONTROL 0x03
#define MODEM_CONTROL 0x04
-#define LINE_STATUS 0x05
+#define LINE_STATUS 0x05
#define MODEM_STATUS 0x06
#define SCRATCH 0x07
@@ -1209,6 +1240,8 @@
#define mtebc(reg, data) mtdcr(ebccfga,reg);mtdcr(ebccfgd,data)
#define mfebc(reg, data) mtdcr(ebccfga,reg);data = mfdcr(ebccfgd)
+#define mtsdram(reg, data) do { mtdcr(memcfga,reg);mtdcr(memcfgd,data); } while (0)
+#define mfsdram(reg, data) do { mtdcr(memcfga,reg);data = mfdcr(memcfgd); } while (0)
#ifndef __ASSEMBLY__
diff --git a/include/ppc440.h b/include/ppc440.h
index bc1d7aa..38809f3 100644
--- a/include/ppc440.h
+++ b/include/ppc440.h
@@ -82,10 +82,7 @@
#define ivor13 0x19d /* interrupt vector offset register 13 */
#define ivor14 0x19e /* interrupt vector offset register 14 */
#define ivor15 0x19f /* interrupt vector offset register 15 */
-#if defined(CONFIG_440GX) || \
- defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
- defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
- defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+#if defined(CONFIG_440)
#define mcsrr0 0x23a /* machine check save/restore register 0 */
#define mcsrr1 0x23b /* mahcine check save/restore register 1 */
#define mcsr 0x23c /* machine check status register */
@@ -115,7 +112,7 @@
#define icdbtrh 0x39f /* instruction cache debug tag register high */
#define mmucr 0x3b2 /* mmu control register */
#define ccr0 0x3b3 /* core configuration register 0 */
-#define ccr1 0x378 /* core configuration for 440x5 only */
+#define ccr1 0x378 /* core configuration for 440x5 only */
#define icdbdr 0x3d3 /* instruction cache debug data register */
#define dbdr 0x3f3 /* debug data register */
@@ -139,7 +136,7 @@
#define clk_opbd 0x00c0
#define clk_perd 0x00e0
#define clk_mald 0x0100
-#define clk_spcid 0x0120
+#define clk_spcid 0x0120
#define clk_icfg 0x0140
/* 440gx sdr register definations */
@@ -285,6 +282,30 @@
#define sdr_sdstp3 0x4003
#endif /* CONFIG_440GX */
+/*----------------------------------------------------------------------------+
+| Core Configuration/MMU configuration for 440 (CCR1 for 440x5 only).
++----------------------------------------------------------------------------*/
+#define CCR0_PRE 0x40000000
+#define CCR0_CRPE 0x08000000
+#define CCR0_DSTG 0x00200000
+#define CCR0_DAPUIB 0x00100000
+#define CCR0_DTB 0x00008000
+#define CCR0_GICBT 0x00004000
+#define CCR0_GDCBT 0x00002000
+#define CCR0_FLSTA 0x00000100
+#define CCR0_ICSLC_MASK 0x0000000C
+#define CCR0_ICSLT_MASK 0x00000003
+#define CCR1_TCS_MASK 0x00000080
+#define CCR1_TCS_INTCLK 0x00000000
+#define CCR1_TCS_EXTCLK 0x00000080
+#define MMUCR_SWOA 0x01000000
+#define MMUCR_U1TE 0x00400000
+#define MMUCR_U2SWOAE 0x00200000
+#define MMUCR_DULXE 0x00800000
+#define MMUCR_IULXE 0x00400000
+#define MMUCR_STS 0x00100000
+#define MMUCR_STID_MASK 0x000000FF
+
#ifdef CONFIG_440SPE
#undef sdr_sdstp2
#define sdr_sdstp2 0x0022
@@ -310,30 +331,6 @@
#define sdr_sdstp6 0x4005
#define sdr_sdstp7 0x4007
-/*----------------------------------------------------------------------------+
-| Core Configuration/MMU configuration for 440 (CCR1 for 440x5 only).
-+----------------------------------------------------------------------------*/
-#define CCR0_PRE 0x40000000
-#define CCR0_CRPE 0x08000000
-#define CCR0_DSTG 0x00200000
-#define CCR0_DAPUIB 0x00100000
-#define CCR0_DTB 0x00008000
-#define CCR0_GICBT 0x00004000
-#define CCR0_GDCBT 0x00002000
-#define CCR0_FLSTA 0x00000100
-#define CCR0_ICSLC_MASK 0x0000000C
-#define CCR0_ICSLT_MASK 0x00000003
-#define CCR1_TCS_MASK 0x00000080
-#define CCR1_TCS_INTCLK 0x00000000
-#define CCR1_TCS_EXTCLK 0x00000080
-#define MMUCR_SEOA 0x01000000
-#define MMUCR_U1TE 0x00400000
-#define MMUCR_U2SWOAE 0x00200000
-#define MMUCR_DULXE 0x00800000
-#define MMUCR_IULXE 0x00400000
-#define MMUCR_STS 0x00100000
-#define MMUCR_STID_MASK 0x000000FF
-
#define SDR0_CFGADDR 0x00E
#define SDR0_CFGDATA 0x00F
@@ -687,8 +684,8 @@
#define SDRAM_CODT_CKSE_SINGLE_END 0x00000008
#define SDRAM_CODT_FEEBBACK_RCV_SINGLE_END 0x00000004
#define SDRAM_CODT_FEEBBACK_DRV_SINGLE_END 0x00000002
-#define SDRAM_CODT_IO_HIZ 0x00000000
-#define SDRAM_CODT_IO_NMODE 0x00000001
+#define SDRAM_CODT_IO_HIZ 0x00000000
+#define SDRAM_CODT_IO_NMODE 0x00000001
/*-----------------------------------------------------------------------------+
| SDRAM Mode Register
@@ -956,7 +953,8 @@
#define plb1_bearl (PLB_ARBITER_BASE+ 0x0C)
#define plb1_bearh (PLB_ARBITER_BASE+ 0x0D)
-#if defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
/* Pin Function Control Register 1 */
#define SDR0_PFC1 0x4101
#define SDR0_PFC1_U1ME_MASK 0x02000000 /* UART1 Mode Enable */
@@ -1025,7 +1023,7 @@
#endif /* defined(CONFIG_440EP) || defined(CONFIG_440GR) */
#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
-#define SDR_USB2D0CR 0x0320
+#define SDR0_USB2D0CR 0x0320
#define SDR0_USB2D0CR_USB2DEV_EBC_SEL_MASK 0x00000004 /* USB 2.0 Device/EBC Master Selection */
#define SDR0_USB2D0CR_USB2DEV_SELECTION 0x00000004 /* USB 2.0 Device Selection */
#define SDR0_USB2D0CR_EBC_SELECTION 0x00000000 /* EBC Selection */
@@ -1103,6 +1101,8 @@
#define SDR0_PFC2_SELECT_CONFIG_5 0xC0000000 /* 2xRTBI using RGMII bridge */
#define SDR0_PFC2_SELECT_CONFIG_6 0x40000000 /* 2xSMII using ZMII bridge */
+#define SDR0_PFC4 0x4104
+
/* USB2PHY0 Control Register */
#define SDR0_USB2PHY0CR 0x4103
#define SDR0_USB2PHY0CR_UTMICN_MASK 0x00100000 /* PHY UTMI interface connection */
@@ -1421,13 +1421,10 @@
#define uicvr uic0vr
#define uicvcr uic0vcr
-#if defined(CONFIG_440SPE)
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX)
/*----------------------------------------------------------------------------+
| Clock / Power-on-reset DCR's.
+----------------------------------------------------------------------------*/
-#define CPR0_CFGADDR 0x00C
-#define CPR0_CFGDATA 0x00D
-
#define CPR0_CLKUPD 0x20
#define CPR0_CLKUPD_BSY_MASK 0x80000000
#define CPR0_CLKUPD_BSY_COMPLETED 0x00000000
@@ -1493,9 +1490,11 @@
#define CPR0_OPBD_OPBDV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x03)+1)
#define CPR0_PERD 0xE0
+#if !defined(CONFIG_440EPX)
#define CPR0_PERD_PERDV0_MASK 0x03000000
#define CPR0_PERD_PERDV0_ENCODE(n) ((((unsigned long)(n))&0x03)<<24)
#define CPR0_PERD_PERDV0_DECODE(n) ((((((unsigned long)(n))>>24)-1)&0x03)+1)
+#endif
#define CPR0_MALD 0x100
#define CPR0_MALD_MALDV0_MASK 0x03000000
@@ -3314,6 +3313,23 @@
#define mtsdr(reg, data) do { mtdcr(sdrcfga,reg);mtdcr(sdrcfgd,data); } while (0)
#define mfsdr(reg, data) do { mtdcr(sdrcfga,reg);data = mfdcr(sdrcfgd); } while (0)
+/*
+ * All 44x except 440GP have CPR registers (indirect DCR)
+ */
+#if !defined(CONFIG_440GP)
+#define CPR0_CFGADDR 0x00C
+#define CPR0_CFGDATA 0x00D
+
+#define mtcpr(reg, data) do { \
+ mtdcr(CPR0_CFGADDR, reg); \
+ mtdcr(CPR0_CFGDATA, data); \
+ } while (0)
+
+#define mfcpr(reg, data) do { \
+ mtdcr(CPR0_CFGADDR, reg); \
+ data = mfdcr(CPR0_CFGDATA); \
+ } while (0)
+#endif
#ifndef __ASSEMBLY__
@@ -3338,6 +3354,19 @@
unsigned long pciClkSync; /* PCI clock is synchronous */
} PPC440_SYS_INFO;
+static inline u32 get_mcsr(void)
+{
+ u32 val;
+
+ asm volatile("mfspr %0, 0x23c" : "=r" (val) :);
+ return val;
+}
+
+static inline void set_mcsr(u32 val)
+{
+ asm volatile("mtspr 0x23c, %0" : "=r" (val) :);
+}
+
#endif /* _ASMLANGUAGE */
#define RESET_VECTOR 0xfffffffc
diff --git a/include/ppc4xx.h b/include/ppc4xx.h
index 67759c7..ca241d2 100644
--- a/include/ppc4xx.h
+++ b/include/ppc4xx.h
@@ -22,6 +22,8 @@
#ifndef __PPC4XX_H__
#define __PPC4XX_H__
+#define EXC_OFF_SYS_RESET 0x0100 /* System reset */
+#define _START_OFFSET (EXC_OFF_SYS_RESET + 0x2000)
#if defined(CONFIG_440)
#include <ppc440.h>
diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl
index 3e47e82..0019d46 100644
--- a/include/ppc_asm.tmpl
+++ b/include/ppc_asm.tmpl
@@ -113,11 +113,11 @@
#if defined(CONFIG_5xx)
/* Some special purpose registers */
-#define DER 149 /* Debug Enable Register */
-#define COUNTA 150 /* Breakpoint Counter */
-#define COUNTB 151 /* Breakpoint Counter */
-#define LCTRL1 156 /* Load/Store Support */
-#define LCTRL2 157 /* Load/Store Support */
+#define DER 149 /* Debug Enable Register */
+#define COUNTA 150 /* Breakpoint Counter */
+#define COUNTB 151 /* Breakpoint Counter */
+#define LCTRL1 156 /* Load/Store Support */
+#define LCTRL2 157 /* Load/Store Support */
#define ICTRL 158 /* I-Bus Support Control Register */
#define EID 81
#endif /* CONFIG_5xx */
@@ -217,7 +217,7 @@
* We assume sprg3 has the physical address of the current
* task's thread_struct.
*/
-#define EXCEPTION_PROLOG \
+#define EXCEPTION_PROLOG(reg1, reg2) \
mtspr SPRG0,r20; \
mtspr SPRG1,r21; \
mfcr r20; \
@@ -235,8 +235,10 @@
stw r22,_CTR(r21); \
mfspr r20,XER; \
stw r20,_XER(r21); \
- mfspr r22,SRR0; \
- mfspr r23,SRR1; \
+ mfspr r20, DAR_DEAR; \
+ stw r20,_DAR(r21); \
+ mfspr r22,reg1; \
+ mfspr r23,reg2; \
stw r0,GPR0(r21); \
stw r1,GPR1(r21); \
stw r2,GPR2(r21); \
@@ -249,41 +251,6 @@
*/
/*
- * Critical exception entry code. This is just like the other exception
- * code except that it uses SRR2 and SRR3 instead of SRR0 and SRR1.
- */
-#define CRITICAL_EXCEPTION_PROLOG \
- mtspr SPRG0,r20; \
- mtspr SPRG1,r21; \
- mfcr r20; \
- subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\
- stw r20,_CCR(r21); /* save registers */ \
- stw r22,GPR22(r21); \
- stw r23,GPR23(r21); \
- mfspr r20,SPRG0; \
- stw r20,GPR20(r21); \
- mfspr r22,SPRG1; \
- stw r22,GPR21(r21); \
- mflr r20; \
- stw r20,_LINK(r21); \
- mfctr r22; \
- stw r22,_CTR(r21); \
- mfspr r20,XER; \
- stw r20,_XER(r21); \
- mfspr r22,990; /* SRR2 */ \
- mfspr r23,991; /* SRR3 */ \
- stw r0,GPR0(r21); \
- stw r1,GPR1(r21); \
- stw r2,GPR2(r21); \
- stw r1,0(r21); \
- mr r1,r21; /* set new kernel sp */ \
- SAVE_4GPRS(3, r21);
-/*
- * Note: code which follows this uses cr0.eq (set if from kernel),
- * r21, r22 (SRR2), and r23 (SRR3).
- */
-
-/*
* Exception vectors.
*
* The data words for `hdlr' and `int_return' are initialized with
@@ -293,30 +260,43 @@
#define STD_EXCEPTION(n, label, hdlr) \
. = n; \
label: \
- EXCEPTION_PROLOG; \
+ EXCEPTION_PROLOG(SRR0, SRR1); \
lwz r3,GOT(transfer_to_handler); \
mtlr r3; \
addi r3,r1,STACK_FRAME_OVERHEAD; \
li r20,MSR_KERNEL; \
rlwimi r20,r23,0,25,25; \
- blrl ; \
+ blrl; \
.L_ ## label : \
- .long hdlr - _start + EXC_OFF_SYS_RESET; \
- .long int_return - _start + EXC_OFF_SYS_RESET
+ .long hdlr - _start + _START_OFFSET; \
+ .long int_return - _start + _START_OFFSET
+#define CRIT_EXCEPTION(n, label, hdlr) \
+ . = n; \
+label: \
+ EXCEPTION_PROLOG(CSRR0, CSRR1); \
+ lwz r3,GOT(transfer_to_handler); \
+ mtlr r3; \
+ addi r3,r1,STACK_FRAME_OVERHEAD; \
+ li r20,(MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)); \
+ rlwimi r20,r23,0,25,25; \
+ blrl; \
+.L_ ## label : \
+ .long hdlr - _start + _START_OFFSET; \
+ .long crit_return - _start + _START_OFFSET
-#define CRIT_EXCEPTION(n, label, hdlr) \
- . = n; \
-label: \
- CRITICAL_EXCEPTION_PROLOG; \
- lwz r3,GOT(transfer_to_handler); \
- mtlr r3; \
- addi r3,r1,STACK_FRAME_OVERHEAD; \
- li r20,(MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)); \
- rlwimi r20,r23,0,25,25; \
- blrl ; \
-.L_ ## label : \
- .long hdlr - _start + EXC_OFF_SYS_RESET; \
- .long crit_return - _start + EXC_OFF_SYS_RESET
+#define MCK_EXCEPTION(n, label, hdlr) \
+ . = n; \
+label: \
+ EXCEPTION_PROLOG(MCSRR0, MCSRR1); \
+ lwz r3,GOT(transfer_to_handler); \
+ mtlr r3; \
+ addi r3,r1,STACK_FRAME_OVERHEAD; \
+ li r20,(MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)); \
+ rlwimi r20,r23,0,25,25; \
+ blrl; \
+.L_ ## label : \
+ .long hdlr - _start + _START_OFFSET; \
+ .long mck_return - _start + _START_OFFSET
#endif /* __PPC_ASM_TMPL__ */
diff --git a/include/radeon.h b/include/radeon.h
new file mode 100644
index 0000000..3d11b05
--- /dev/null
+++ b/include/radeon.h
@@ -0,0 +1,1984 @@
+#ifndef _RADEON_H
+#define _RADEON_H
+
+
+#define RADEON_REGSIZE 0x4000
+
+
+#define MM_INDEX 0x0000
+#define MM_DATA 0x0004
+#define BUS_CNTL 0x0030
+#define HI_STAT 0x004C
+#define BUS_CNTL1 0x0034
+#define I2C_CNTL_1 0x0094
+#define CONFIG_CNTL 0x00E0
+#define CONFIG_MEMSIZE 0x00F8
+#define CONFIG_APER_0_BASE 0x0100
+#define CONFIG_APER_1_BASE 0x0104
+#define CONFIG_APER_SIZE 0x0108
+#define CONFIG_REG_1_BASE 0x010C
+#define CONFIG_REG_APER_SIZE 0x0110
+#define PAD_AGPINPUT_DELAY 0x0164
+#define PAD_CTLR_STRENGTH 0x0168
+#define PAD_CTLR_UPDATE 0x016C
+#define PAD_CTLR_MISC 0x0aa0
+#define AGP_CNTL 0x0174
+#define BM_STATUS 0x0160
+#define CAP0_TRIG_CNTL 0x0950
+#define CAP1_TRIG_CNTL 0x09c0
+#define VIPH_CONTROL 0x0C40
+#define VENDOR_ID 0x0F00
+#define DEVICE_ID 0x0F02
+#define COMMAND 0x0F04
+#define STATUS 0x0F06
+#define REVISION_ID 0x0F08
+#define REGPROG_INF 0x0F09
+#define SUB_CLASS 0x0F0A
+#define BASE_CODE 0x0F0B
+#define CACHE_LINE 0x0F0C
+#define LATENCY 0x0F0D
+#define HEADER 0x0F0E
+#define BIST 0x0F0F
+#define REG_MEM_BASE 0x0F10
+#define REG_IO_BASE 0x0F14
+#define REG_REG_BASE 0x0F18
+#define ADAPTER_ID 0x0F2C
+#define BIOS_ROM 0x0F30
+#define CAPABILITIES_PTR 0x0F34
+#define INTERRUPT_LINE 0x0F3C
+#define INTERRUPT_PIN 0x0F3D
+#define MIN_GRANT 0x0F3E
+#define MAX_LATENCY 0x0F3F
+#define ADAPTER_ID_W 0x0F4C
+#define PMI_CAP_ID 0x0F50
+#define PMI_NXT_CAP_PTR 0x0F51
+#define PMI_PMC_REG 0x0F52
+#define PM_STATUS 0x0F54
+#define PMI_DATA 0x0F57
+#define AGP_CAP_ID 0x0F58
+#define AGP_STATUS 0x0F5C
+#define AGP_COMMAND 0x0F60
+#define AIC_CTRL 0x01D0
+#define AIC_STAT 0x01D4
+#define AIC_PT_BASE 0x01D8
+#define AIC_LO_ADDR 0x01DC
+#define AIC_HI_ADDR 0x01E0
+#define AIC_TLB_ADDR 0x01E4
+#define AIC_TLB_DATA 0x01E8
+#define DAC_CNTL 0x0058
+#define DAC_CNTL2 0x007c
+#define CRTC_GEN_CNTL 0x0050
+#define MEM_CNTL 0x0140
+#define MC_CNTL 0x0140
+#define EXT_MEM_CNTL 0x0144
+#define MC_TIMING_CNTL 0x0144
+#define MC_AGP_LOCATION 0x014C
+#define MEM_IO_CNTL_A0 0x0178
+#define MEM_REFRESH_CNTL 0x0178
+#define MEM_INIT_LATENCY_TIMER 0x0154
+#define MC_INIT_GFX_LAT_TIMER 0x0154
+#define MEM_SDRAM_MODE_REG 0x0158
+#define AGP_BASE 0x0170
+#define MEM_IO_CNTL_A1 0x017C
+#define MC_READ_CNTL_AB 0x017C
+#define MEM_IO_CNTL_B0 0x0180
+#define MC_INIT_MISC_LAT_TIMER 0x0180
+#define MEM_IO_CNTL_B1 0x0184
+#define MC_IOPAD_CNTL 0x0184
+#define MC_DEBUG 0x0188
+#define MC_STATUS 0x0150
+#define MEM_IO_OE_CNTL 0x018C
+#define MC_CHIP_IO_OE_CNTL_AB 0x018C
+#define MC_FB_LOCATION 0x0148
+/* #define MC_FB_LOCATION 0x0188 */
+#define HOST_PATH_CNTL 0x0130
+#define MEM_VGA_WP_SEL 0x0038
+#define MEM_VGA_RP_SEL 0x003C
+#define HDP_DEBUG 0x0138
+#define SW_SEMAPHORE 0x013C
+#define CRTC2_GEN_CNTL 0x03f8
+#define CRTC2_DISPLAY_BASE_ADDR 0x033c
+#define SURFACE_CNTL 0x0B00
+#define SURFACE0_LOWER_BOUND 0x0B04
+#define SURFACE1_LOWER_BOUND 0x0B14
+#define SURFACE2_LOWER_BOUND 0x0B24
+#define SURFACE3_LOWER_BOUND 0x0B34
+#define SURFACE4_LOWER_BOUND 0x0B44
+#define SURFACE5_LOWER_BOUND 0x0B54
+#define SURFACE6_LOWER_BOUND 0x0B64
+#define SURFACE7_LOWER_BOUND 0x0B74
+#define SURFACE0_UPPER_BOUND 0x0B08
+#define SURFACE1_UPPER_BOUND 0x0B18
+#define SURFACE2_UPPER_BOUND 0x0B28
+#define SURFACE3_UPPER_BOUND 0x0B38
+#define SURFACE4_UPPER_BOUND 0x0B48
+#define SURFACE5_UPPER_BOUND 0x0B58
+#define SURFACE6_UPPER_BOUND 0x0B68
+#define SURFACE7_UPPER_BOUND 0x0B78
+#define SURFACE0_INFO 0x0B0C
+#define SURFACE1_INFO 0x0B1C
+#define SURFACE2_INFO 0x0B2C
+#define SURFACE3_INFO 0x0B3C
+#define SURFACE4_INFO 0x0B4C
+#define SURFACE5_INFO 0x0B5C
+#define SURFACE6_INFO 0x0B6C
+#define SURFACE7_INFO 0x0B7C
+#define SURFACE_ACCESS_FLAGS 0x0BF8
+#define SURFACE_ACCESS_CLR 0x0BFC
+#define GEN_INT_CNTL 0x0040
+#define GEN_INT_STATUS 0x0044
+#define CRTC_EXT_CNTL 0x0054
+#define RB3D_CNTL 0x1C3C
+#define WAIT_UNTIL 0x1720
+#define ISYNC_CNTL 0x1724
+#define RBBM_GUICNTL 0x172C
+#define RBBM_STATUS 0x0E40
+#define RBBM_STATUS_alt_1 0x1740
+#define RBBM_CNTL 0x00EC
+#define RBBM_CNTL_alt_1 0x0E44
+#define RBBM_SOFT_RESET 0x00F0
+#define RBBM_SOFT_RESET_alt_1 0x0E48
+#define NQWAIT_UNTIL 0x0E50
+#define RBBM_DEBUG 0x0E6C
+#define RBBM_CMDFIFO_ADDR 0x0E70
+#define RBBM_CMDFIFO_DATAL 0x0E74
+#define RBBM_CMDFIFO_DATAH 0x0E78
+#define RBBM_CMDFIFO_STAT 0x0E7C
+#define CRTC_STATUS 0x005C
+#define GPIO_VGA_DDC 0x0060
+#define GPIO_DVI_DDC 0x0064
+#define GPIO_MONID 0x0068
+#define GPIO_CRT2_DDC 0x006c
+#define PALETTE_INDEX 0x00B0
+#define PALETTE_DATA 0x00B4
+#define PALETTE_30_DATA 0x00B8
+#define CRTC_H_TOTAL_DISP 0x0200
+#define CRTC_H_SYNC_STRT_WID 0x0204
+#define CRTC_V_TOTAL_DISP 0x0208
+#define CRTC_V_SYNC_STRT_WID 0x020C
+#define CRTC_VLINE_CRNT_VLINE 0x0210
+#define CRTC_CRNT_FRAME 0x0214
+#define CRTC_GUI_TRIG_VLINE 0x0218
+#define CRTC_DEBUG 0x021C
+#define CRTC_OFFSET_RIGHT 0x0220
+#define CRTC_OFFSET 0x0224
+#define CRTC_OFFSET_CNTL 0x0228
+#define CRTC_PITCH 0x022C
+#define OVR_CLR 0x0230
+#define OVR_WID_LEFT_RIGHT 0x0234
+#define OVR_WID_TOP_BOTTOM 0x0238
+#define DISPLAY_BASE_ADDR 0x023C
+#define SNAPSHOT_VH_COUNTS 0x0240
+#define SNAPSHOT_F_COUNT 0x0244
+#define N_VIF_COUNT 0x0248
+#define SNAPSHOT_VIF_COUNT 0x024C
+#define FP_CRTC_H_TOTAL_DISP 0x0250
+#define FP_CRTC_V_TOTAL_DISP 0x0254
+#define CRT_CRTC_H_SYNC_STRT_WID 0x0258
+#define CRT_CRTC_V_SYNC_STRT_WID 0x025C
+#define CUR_OFFSET 0x0260
+#define CUR_HORZ_VERT_POSN 0x0264
+#define CUR_HORZ_VERT_OFF 0x0268
+#define CUR_CLR0 0x026C
+#define CUR_CLR1 0x0270
+#define FP_HORZ_VERT_ACTIVE 0x0278
+#define CRTC_MORE_CNTL 0x027C
+#define CRTC_H_CUTOFF_ACTIVE_EN (1<<4)
+#define CRTC_V_CUTOFF_ACTIVE_EN (1<<5)
+#define DAC_EXT_CNTL 0x0280
+#define FP_GEN_CNTL 0x0284
+#define FP_HORZ_STRETCH 0x028C
+#define FP_VERT_STRETCH 0x0290
+#define FP_H_SYNC_STRT_WID 0x02C4
+#define FP_V_SYNC_STRT_WID 0x02C8
+#define AUX_WINDOW_HORZ_CNTL 0x02D8
+#define AUX_WINDOW_VERT_CNTL 0x02DC
+/* #define DDA_CONFIG 0x02e0 */
+/* #define DDA_ON_OFF 0x02e4 */
+#define DVI_I2C_CNTL_1 0x02e4
+#define GRPH_BUFFER_CNTL 0x02F0
+#define GRPH2_BUFFER_CNTL 0x03F0
+#define VGA_BUFFER_CNTL 0x02F4
+#define OV0_Y_X_START 0x0400
+#define OV0_Y_X_END 0x0404
+#define OV0_PIPELINE_CNTL 0x0408
+#define OV0_REG_LOAD_CNTL 0x0410
+#define OV0_SCALE_CNTL 0x0420
+#define OV0_V_INC 0x0424
+#define OV0_P1_V_ACCUM_INIT 0x0428
+#define OV0_P23_V_ACCUM_INIT 0x042C
+#define OV0_P1_BLANK_LINES_AT_TOP 0x0430
+#define OV0_P23_BLANK_LINES_AT_TOP 0x0434
+#define OV0_BASE_ADDR 0x043C
+#define OV0_VID_BUF0_BASE_ADRS 0x0440
+#define OV0_VID_BUF1_BASE_ADRS 0x0444
+#define OV0_VID_BUF2_BASE_ADRS 0x0448
+#define OV0_VID_BUF3_BASE_ADRS 0x044C
+#define OV0_VID_BUF4_BASE_ADRS 0x0450
+#define OV0_VID_BUF5_BASE_ADRS 0x0454
+#define OV0_VID_BUF_PITCH0_VALUE 0x0460
+#define OV0_VID_BUF_PITCH1_VALUE 0x0464
+#define OV0_AUTO_FLIP_CNTRL 0x0470
+#define OV0_DEINTERLACE_PATTERN 0x0474
+#define OV0_SUBMIT_HISTORY 0x0478
+#define OV0_H_INC 0x0480
+#define OV0_STEP_BY 0x0484
+#define OV0_P1_H_ACCUM_INIT 0x0488
+#define OV0_P23_H_ACCUM_INIT 0x048C
+#define OV0_P1_X_START_END 0x0494
+#define OV0_P2_X_START_END 0x0498
+#define OV0_P3_X_START_END 0x049C
+#define OV0_FILTER_CNTL 0x04A0
+#define OV0_FOUR_TAP_COEF_0 0x04B0
+#define OV0_FOUR_TAP_COEF_1 0x04B4
+#define OV0_FOUR_TAP_COEF_2 0x04B8
+#define OV0_FOUR_TAP_COEF_3 0x04BC
+#define OV0_FOUR_TAP_COEF_4 0x04C0
+#define OV0_FLAG_CNTRL 0x04DC
+#define OV0_SLICE_CNTL 0x04E0
+#define OV0_VID_KEY_CLR_LOW 0x04E4
+#define OV0_VID_KEY_CLR_HIGH 0x04E8
+#define OV0_GRPH_KEY_CLR_LOW 0x04EC
+#define OV0_GRPH_KEY_CLR_HIGH 0x04F0
+#define OV0_KEY_CNTL 0x04F4
+#define OV0_TEST 0x04F8
+#define SUBPIC_CNTL 0x0540
+#define SUBPIC_DEFCOLCON 0x0544
+#define SUBPIC_Y_X_START 0x054C
+#define SUBPIC_Y_X_END 0x0550
+#define SUBPIC_V_INC 0x0554
+#define SUBPIC_H_INC 0x0558
+#define SUBPIC_BUF0_OFFSET 0x055C
+#define SUBPIC_BUF1_OFFSET 0x0560
+#define SUBPIC_LC0_OFFSET 0x0564
+#define SUBPIC_LC1_OFFSET 0x0568
+#define SUBPIC_PITCH 0x056C
+#define SUBPIC_BTN_HLI_COLCON 0x0570
+#define SUBPIC_BTN_HLI_Y_X_START 0x0574
+#define SUBPIC_BTN_HLI_Y_X_END 0x0578
+#define SUBPIC_PALETTE_INDEX 0x057C
+#define SUBPIC_PALETTE_DATA 0x0580
+#define SUBPIC_H_ACCUM_INIT 0x0584
+#define SUBPIC_V_ACCUM_INIT 0x0588
+#define DISP_MISC_CNTL 0x0D00
+#define DAC_MACRO_CNTL 0x0D04
+#define DISP_PWR_MAN 0x0D08
+#define DISP_TEST_DEBUG_CNTL 0x0D10
+#define DISP_HW_DEBUG 0x0D14
+#define DAC_CRC_SIG1 0x0D18
+#define DAC_CRC_SIG2 0x0D1C
+#define OV0_LIN_TRANS_A 0x0D20
+#define OV0_LIN_TRANS_B 0x0D24
+#define OV0_LIN_TRANS_C 0x0D28
+#define OV0_LIN_TRANS_D 0x0D2C
+#define OV0_LIN_TRANS_E 0x0D30
+#define OV0_LIN_TRANS_F 0x0D34
+#define OV0_GAMMA_0_F 0x0D40
+#define OV0_GAMMA_10_1F 0x0D44
+#define OV0_GAMMA_20_3F 0x0D48
+#define OV0_GAMMA_40_7F 0x0D4C
+#define OV0_GAMMA_380_3BF 0x0D50
+#define OV0_GAMMA_3C0_3FF 0x0D54
+#define DISP_MERGE_CNTL 0x0D60
+#define DISP_OUTPUT_CNTL 0x0D64
+#define DISP_LIN_TRANS_GRPH_A 0x0D80
+#define DISP_LIN_TRANS_GRPH_B 0x0D84
+#define DISP_LIN_TRANS_GRPH_C 0x0D88
+#define DISP_LIN_TRANS_GRPH_D 0x0D8C
+#define DISP_LIN_TRANS_GRPH_E 0x0D90
+#define DISP_LIN_TRANS_GRPH_F 0x0D94
+#define DISP_LIN_TRANS_VID_A 0x0D98
+#define DISP_LIN_TRANS_VID_B 0x0D9C
+#define DISP_LIN_TRANS_VID_C 0x0DA0
+#define DISP_LIN_TRANS_VID_D 0x0DA4
+#define DISP_LIN_TRANS_VID_E 0x0DA8
+#define DISP_LIN_TRANS_VID_F 0x0DAC
+#define RMX_HORZ_FILTER_0TAP_COEF 0x0DB0
+#define RMX_HORZ_FILTER_1TAP_COEF 0x0DB4
+#define RMX_HORZ_FILTER_2TAP_COEF 0x0DB8
+#define RMX_HORZ_PHASE 0x0DBC
+#define DAC_EMBEDDED_SYNC_CNTL 0x0DC0
+#define DAC_BROAD_PULSE 0x0DC4
+#define DAC_SKEW_CLKS 0x0DC8
+#define DAC_INCR 0x0DCC
+#define DAC_NEG_SYNC_LEVEL 0x0DD0
+#define DAC_POS_SYNC_LEVEL 0x0DD4
+#define DAC_BLANK_LEVEL 0x0DD8
+#define CLOCK_CNTL_INDEX 0x0008
+#define CLOCK_CNTL_DATA 0x000C
+#define CP_RB_CNTL 0x0704
+#define CP_RB_BASE 0x0700
+#define CP_RB_RPTR_ADDR 0x070C
+#define CP_RB_RPTR 0x0710
+#define CP_RB_WPTR 0x0714
+#define CP_RB_WPTR_DELAY 0x0718
+#define CP_IB_BASE 0x0738
+#define CP_IB_BUFSZ 0x073C
+#define SCRATCH_REG0 0x15E0
+#define GUI_SCRATCH_REG0 0x15E0
+#define SCRATCH_REG1 0x15E4
+#define GUI_SCRATCH_REG1 0x15E4
+#define SCRATCH_REG2 0x15E8
+#define GUI_SCRATCH_REG2 0x15E8
+#define SCRATCH_REG3 0x15EC
+#define GUI_SCRATCH_REG3 0x15EC
+#define SCRATCH_REG4 0x15F0
+#define GUI_SCRATCH_REG4 0x15F0
+#define SCRATCH_REG5 0x15F4
+#define GUI_SCRATCH_REG5 0x15F4
+#define SCRATCH_UMSK 0x0770
+#define SCRATCH_ADDR 0x0774
+#define DP_BRUSH_FRGD_CLR 0x147C
+#define DP_BRUSH_BKGD_CLR 0x1478
+#define DST_LINE_START 0x1600
+#define DST_LINE_END 0x1604
+#define SRC_OFFSET 0x15AC
+#define SRC_PITCH 0x15B0
+#define SRC_TILE 0x1704
+#define SRC_PITCH_OFFSET 0x1428
+#define SRC_X 0x1414
+#define SRC_Y 0x1418
+#define SRC_X_Y 0x1590
+#define SRC_Y_X 0x1434
+#define DST_Y_X 0x1438
+#define DST_WIDTH_HEIGHT 0x1598
+#define DST_HEIGHT_WIDTH 0x143c
+#define DST_OFFSET 0x1404
+#define SRC_CLUT_ADDRESS 0x1780
+#define SRC_CLUT_DATA 0x1784
+#define SRC_CLUT_DATA_RD 0x1788
+#define HOST_DATA0 0x17C0
+#define HOST_DATA1 0x17C4
+#define HOST_DATA2 0x17C8
+#define HOST_DATA3 0x17CC
+#define HOST_DATA4 0x17D0
+#define HOST_DATA5 0x17D4
+#define HOST_DATA6 0x17D8
+#define HOST_DATA7 0x17DC
+#define HOST_DATA_LAST 0x17E0
+#define DP_SRC_ENDIAN 0x15D4
+#define DP_SRC_FRGD_CLR 0x15D8
+#define DP_SRC_BKGD_CLR 0x15DC
+#define SC_LEFT 0x1640
+#define SC_RIGHT 0x1644
+#define SC_TOP 0x1648
+#define SC_BOTTOM 0x164C
+#define SRC_SC_RIGHT 0x1654
+#define SRC_SC_BOTTOM 0x165C
+#define DP_CNTL 0x16C0
+#define DP_CNTL_XDIR_YDIR_YMAJOR 0x16D0
+#define DP_DATATYPE 0x16C4
+#define DP_MIX 0x16C8
+#define DP_WRITE_MSK 0x16CC
+#define DP_XOP 0x17F8
+#define CLR_CMP_CLR_SRC 0x15C4
+#define CLR_CMP_CLR_DST 0x15C8
+#define CLR_CMP_CNTL 0x15C0
+#define CLR_CMP_MSK 0x15CC
+#define DSTCACHE_MODE 0x1710
+#define DSTCACHE_CTLSTAT 0x1714
+#define DEFAULT_PITCH_OFFSET 0x16E0
+#define DEFAULT_SC_BOTTOM_RIGHT 0x16E8
+#define DEFAULT_SC_TOP_LEFT 0x16EC
+#define SRC_PITCH_OFFSET 0x1428
+#define DST_PITCH_OFFSET 0x142C
+#define DP_GUI_MASTER_CNTL 0x146C
+#define SC_TOP_LEFT 0x16EC
+#define SC_BOTTOM_RIGHT 0x16F0
+#define SRC_SC_BOTTOM_RIGHT 0x16F4
+#define RB2D_DSTCACHE_MODE 0x3428
+#define RB2D_DSTCACHE_CTLSTAT 0x342C
+#define LVDS_GEN_CNTL 0x02d0
+#define LVDS_PLL_CNTL 0x02d4
+#define FP2_GEN_CNTL 0x0288
+#define TMDS_CNTL 0x0294
+#define TMDS_CRC 0x02a0
+#define TMDS_TRANSMITTER_CNTL 0x02a4
+#define MPP_TB_CONFIG 0x01c0
+#define PAMAC0_DLY_CNTL 0x0a94
+#define PAMAC1_DLY_CNTL 0x0a98
+#define PAMAC2_DLY_CNTL 0x0a9c
+#define FW_CNTL 0x0118
+#define FCP_CNTL 0x0910
+#define VGA_DDA_ON_OFF 0x02ec
+#define TV_MASTER_CNTL 0x0800
+
+/* #define BASE_CODE 0x0f0b */
+#define BIOS_0_SCRATCH 0x0010
+#define BIOS_1_SCRATCH 0x0014
+#define BIOS_2_SCRATCH 0x0018
+#define BIOS_3_SCRATCH 0x001c
+#define BIOS_4_SCRATCH 0x0020
+#define BIOS_5_SCRATCH 0x0024
+#define BIOS_6_SCRATCH 0x0028
+#define BIOS_7_SCRATCH 0x002c
+
+#define HDP_SOFT_RESET (1 << 26)
+
+#define TV_DAC_CNTL 0x088c
+#define GPIOPAD_MASK 0x0198
+#define GPIOPAD_A 0x019c
+#define GPIOPAD_EN 0x01a0
+#define GPIOPAD_Y 0x01a4
+#define ZV_LCDPAD_MASK 0x01a8
+#define ZV_LCDPAD_A 0x01ac
+#define ZV_LCDPAD_EN 0x01b0
+#define ZV_LCDPAD_Y 0x01b4
+
+/* PLL Registers */
+#define CLK_PIN_CNTL 0x0001
+#define PPLL_CNTL 0x0002
+#define PPLL_REF_DIV 0x0003
+#define PPLL_DIV_0 0x0004
+#define PPLL_DIV_1 0x0005
+#define PPLL_DIV_2 0x0006
+#define PPLL_DIV_3 0x0007
+#define VCLK_ECP_CNTL 0x0008
+#define HTOTAL_CNTL 0x0009
+#define M_SPLL_REF_FB_DIV 0x000a
+#define AGP_PLL_CNTL 0x000b
+#define SPLL_CNTL 0x000c
+#define SCLK_CNTL 0x000d
+#define MPLL_CNTL 0x000e
+#define MDLL_CKO 0x000f
+#define MDLL_RDCKA 0x0010
+#define MCLK_CNTL 0x0012
+#define AGP_PLL_CNTL 0x000b
+#define PLL_TEST_CNTL 0x0013
+#define CLK_PWRMGT_CNTL 0x0014
+#define PLL_PWRMGT_CNTL 0x0015
+#define MCLK_MISC 0x001f
+#define P2PLL_CNTL 0x002a
+#define P2PLL_REF_DIV 0x002b
+#define PIXCLKS_CNTL 0x002d
+#define SCLK_MORE_CNTL 0x0035
+
+/* MCLK_CNTL bit constants */
+#define FORCEON_MCLKA (1 << 16)
+#define FORCEON_MCLKB (1 << 17)
+#define FORCEON_YCLKA (1 << 18)
+#define FORCEON_YCLKB (1 << 19)
+#define FORCEON_MC (1 << 20)
+#define FORCEON_AIC (1 << 21)
+
+/* SCLK_CNTL bit constants */
+#define DYN_STOP_LAT_MASK 0x00007ff8
+#define CP_MAX_DYN_STOP_LAT 0x0008
+#define SCLK_FORCEON_MASK 0xffff8000
+
+/* SCLK_MORE_CNTL bit constants */
+#define SCLK_MORE_FORCEON 0x0700
+
+/* BUS_CNTL bit constants */
+#define BUS_DBL_RESYNC 0x00000001
+#define BUS_MSTR_RESET 0x00000002
+#define BUS_FLUSH_BUF 0x00000004
+#define BUS_STOP_REQ_DIS 0x00000008
+#define BUS_ROTATION_DIS 0x00000010
+#define BUS_MASTER_DIS 0x00000040
+#define BUS_ROM_WRT_EN 0x00000080
+#define BUS_DIS_ROM 0x00001000
+#define BUS_PCI_READ_RETRY_EN 0x00002000
+#define BUS_AGP_AD_STEPPING_EN 0x00004000
+#define BUS_PCI_WRT_RETRY_EN 0x00008000
+#define BUS_MSTR_RD_MULT 0x00100000
+#define BUS_MSTR_RD_LINE 0x00200000
+#define BUS_SUSPEND 0x00400000
+#define LAT_16X 0x00800000
+#define BUS_RD_DISCARD_EN 0x01000000
+#define BUS_RD_ABORT_EN 0x02000000
+#define BUS_MSTR_WS 0x04000000
+#define BUS_PARKING_DIS 0x08000000
+#define BUS_MSTR_DISCONNECT_EN 0x10000000
+#define BUS_WRT_BURST 0x20000000
+#define BUS_READ_BURST 0x40000000
+#define BUS_RDY_READ_DLY 0x80000000
+
+/* PIXCLKS_CNTL */
+#define PIX2CLK_SRC_SEL_MASK 0x03
+#define PIX2CLK_SRC_SEL_CPUCLK 0x00
+#define PIX2CLK_SRC_SEL_PSCANCLK 0x01
+#define PIX2CLK_SRC_SEL_BYTECLK 0x02
+#define PIX2CLK_SRC_SEL_P2PLLCLK 0x03
+#define PIX2CLK_ALWAYS_ONb (1<<6)
+#define PIX2CLK_DAC_ALWAYS_ONb (1<<7)
+#define PIXCLK_TV_SRC_SEL (1 << 8)
+#define PIXCLK_LVDS_ALWAYS_ONb (1 << 14)
+#define PIXCLK_TMDS_ALWAYS_ONb (1 << 15)
+
+
+/* CLOCK_CNTL_INDEX bit constants */
+#define PLL_WR_EN 0x00000080
+
+/* CONFIG_CNTL bit constants */
+#define CFG_VGA_RAM_EN 0x00000100
+#define CFG_ATI_REV_ID_MASK (0xf << 16)
+#define CFG_ATI_REV_A11 (0 << 16)
+#define CFG_ATI_REV_A12 (1 << 16)
+#define CFG_ATI_REV_A13 (2 << 16)
+
+/* CRTC_EXT_CNTL bit constants */
+#define VGA_ATI_LINEAR 0x00000008
+#define VGA_128KAP_PAGING 0x00000010
+#define XCRT_CNT_EN (1 << 6)
+#define CRTC_HSYNC_DIS (1 << 8)
+#define CRTC_VSYNC_DIS (1 << 9)
+#define CRTC_DISPLAY_DIS (1 << 10)
+#define CRTC_CRT_ON (1 << 15)
+
+
+/* DSTCACHE_CTLSTAT bit constants */
+#define RB2D_DC_FLUSH (3 << 0)
+#define RB2D_DC_FLUSH_ALL 0xf
+#define RB2D_DC_BUSY (1 << 31)
+
+
+/* CRTC_GEN_CNTL bit constants */
+#define CRTC_DBL_SCAN_EN 0x00000001
+#define CRTC_CUR_EN 0x00010000
+#define CRTC_INTERLACE_EN (1 << 1)
+#define CRTC_BYPASS_LUT_EN (1 << 14)
+#define CRTC_EXT_DISP_EN (1 << 24)
+#define CRTC_EN (1 << 25)
+#define CRTC_DISP_REQ_EN_B (1 << 26)
+
+/* CRTC_STATUS bit constants */
+#define CRTC_VBLANK 0x00000001
+
+/* CRTC2_GEN_CNTL bit constants */
+#define CRT2_ON (1 << 7)
+#define CRTC2_DISPLAY_DIS (1 << 23)
+#define CRTC2_EN (1 << 25)
+#define CRTC2_DISP_REQ_EN_B (1 << 26)
+
+/* CUR_OFFSET, CUR_HORZ_VERT_POSN, CUR_HORZ_VERT_OFF bit constants */
+#define CUR_LOCK 0x80000000
+
+/* GPIO bit constants */
+#define GPIO_A_0 (1 << 0)
+#define GPIO_A_1 (1 << 1)
+#define GPIO_Y_0 (1 << 8)
+#define GPIO_Y_1 (1 << 9)
+#define GPIO_EN_0 (1 << 16)
+#define GPIO_EN_1 (1 << 17)
+#define GPIO_MASK_0 (1 << 24)
+#define GPIO_MASK_1 (1 << 25)
+#define VGA_DDC_DATA_OUTPUT GPIO_A_0
+#define VGA_DDC_CLK_OUTPUT GPIO_A_1
+#define VGA_DDC_DATA_INPUT GPIO_Y_0
+#define VGA_DDC_CLK_INPUT GPIO_Y_1
+#define VGA_DDC_DATA_OUT_EN GPIO_EN_0
+#define VGA_DDC_CLK_OUT_EN GPIO_EN_1
+
+
+/* FP bit constants */
+#define FP_CRTC_H_TOTAL_MASK 000003ff
+#define FP_CRTC_H_DISP_MASK 0x01ff0000
+#define FP_CRTC_V_TOTAL_MASK 0x00000fff
+#define FP_CRTC_V_DISP_MASK 0x0fff0000
+#define FP_H_SYNC_STRT_CHAR_MASK 0x00001ff8
+#define FP_H_SYNC_WID_MASK 0x003f0000
+#define FP_V_SYNC_STRT_MASK 0x00000fff
+#define FP_V_SYNC_WID_MASK 0x001f0000
+#define FP_CRTC_H_TOTAL_SHIFT 0x00000000
+#define FP_CRTC_H_DISP_SHIFT 0x00000010
+#define FP_CRTC_V_TOTAL_SHIFT 0x00000000
+#define FP_CRTC_V_DISP_SHIFT 0x00000010
+#define FP_H_SYNC_STRT_CHAR_SHIFT 0x00000003
+#define FP_H_SYNC_WID_SHIFT 0x00000010
+#define FP_V_SYNC_STRT_SHIFT 0x00000000
+#define FP_V_SYNC_WID_SHIFT 0x00000010
+
+/* FP_GEN_CNTL bit constants */
+#define FP_FPON (1 << 0)
+#define FP_TMDS_EN (1 << 2)
+#define FP_PANEL_FORMAT (1 << 3)
+#define FP_EN_TMDS (1 << 7)
+#define FP_DETECT_SENSE (1 << 8)
+#define R200_FP_SOURCE_SEL_MASK (3 << 10)
+#define R200_FP_SOURCE_SEL_CRTC1 (0 << 10)
+#define R200_FP_SOURCE_SEL_CRTC2 (1 << 10)
+#define R200_FP_SOURCE_SEL_RMX (2 << 10)
+#define R200_FP_SOURCE_SEL_TRANS (3 << 10)
+#define FP_SEL_CRTC1 (0 << 13)
+#define FP_SEL_CRTC2 (1 << 13)
+#define FP_USE_VGA_HSYNC (1 << 14)
+#define FP_CRTC_DONT_SHADOW_HPAR (1 << 15)
+#define FP_CRTC_DONT_SHADOW_VPAR (1 << 16)
+#define FP_CRTC_DONT_SHADOW_HEND (1 << 17)
+#define FP_CRTC_USE_SHADOW_VEND (1 << 18)
+#define FP_RMX_HVSYNC_CONTROL_EN (1 << 20)
+#define FP_DFP_SYNC_SEL (1 << 21)
+#define FP_CRTC_LOCK_8DOT (1 << 22)
+#define FP_CRT_SYNC_SEL (1 << 23)
+#define FP_USE_SHADOW_EN (1 << 24)
+#define FP_CRT_SYNC_ALT (1 << 26)
+
+/* FP2_GEN_CNTL bit constants */
+#define FP2_BLANK_EN (1 << 1)
+#define FP2_ON (1 << 2)
+#define FP2_PANEL_FORMAT (1 << 3)
+#define FP2_SOURCE_SEL_MASK (3 << 10)
+#define FP2_SOURCE_SEL_CRTC2 (1 << 10)
+#define FP2_SRC_SEL_MASK (3 << 13)
+#define FP2_SRC_SEL_CRTC2 (1 << 13)
+#define FP2_FP_POL (1 << 16)
+#define FP2_LP_POL (1 << 17)
+#define FP2_SCK_POL (1 << 18)
+#define FP2_LCD_CNTL_MASK (7 << 19)
+#define FP2_PAD_FLOP_EN (1 << 22)
+#define FP2_CRC_EN (1 << 23)
+#define FP2_CRC_READ_EN (1 << 24)
+#define FP2_DV0_EN (1 << 25)
+#define FP2_DV0_RATE_SEL_SDR (1 << 26)
+
+
+/* LVDS_GEN_CNTL bit constants */
+#define LVDS_ON (1 << 0)
+#define LVDS_DISPLAY_DIS (1 << 1)
+#define LVDS_PANEL_TYPE (1 << 2)
+#define LVDS_PANEL_FORMAT (1 << 3)
+#define LVDS_EN (1 << 7)
+#define LVDS_BL_MOD_LEVEL_MASK 0x0000ff00
+#define LVDS_BL_MOD_LEVEL_SHIFT 8
+#define LVDS_BL_MOD_EN (1 << 16)
+#define LVDS_DIGON (1 << 18)
+#define LVDS_BLON (1 << 19)
+#define LVDS_SEL_CRTC2 (1 << 23)
+#define LVDS_STATE_MASK \
+ (LVDS_ON | LVDS_DISPLAY_DIS | LVDS_BL_MOD_LEVEL_MASK | LVDS_BLON)
+
+/* LVDS_PLL_CNTL bit constatns */
+#define HSYNC_DELAY_SHIFT 0x1c
+#define HSYNC_DELAY_MASK (0xf << 0x1c)
+
+/* TMDS_TRANSMITTER_CNTL bit constants */
+#define TMDS_PLL_EN (1 << 0)
+#define TMDS_PLLRST (1 << 1)
+#define TMDS_RAN_PAT_RST (1 << 7)
+#define TMDS_ICHCSEL (1 << 28)
+
+/* FP_HORZ_STRETCH bit constants */
+#define HORZ_STRETCH_RATIO_MASK 0xffff
+#define HORZ_STRETCH_RATIO_MAX 4096
+#define HORZ_PANEL_SIZE (0x1ff << 16)
+#define HORZ_PANEL_SHIFT 16
+#define HORZ_STRETCH_PIXREP (0 << 25)
+#define HORZ_STRETCH_BLEND (1 << 26)
+#define HORZ_STRETCH_ENABLE (1 << 25)
+#define HORZ_AUTO_RATIO (1 << 27)
+#define HORZ_FP_LOOP_STRETCH (0x7 << 28)
+#define HORZ_AUTO_RATIO_INC (1 << 31)
+
+
+/* FP_VERT_STRETCH bit constants */
+#define VERT_STRETCH_RATIO_MASK 0xfff
+#define VERT_STRETCH_RATIO_MAX 4096
+#define VERT_PANEL_SIZE (0xfff << 12)
+#define VERT_PANEL_SHIFT 12
+#define VERT_STRETCH_LINREP (0 << 26)
+#define VERT_STRETCH_BLEND (1 << 26)
+#define VERT_STRETCH_ENABLE (1 << 25)
+#define VERT_AUTO_RATIO_EN (1 << 27)
+#define VERT_FP_LOOP_STRETCH (0x7 << 28)
+#define VERT_STRETCH_RESERVED 0xf1000000
+
+/* DAC_CNTL bit constants */
+#define DAC_8BIT_EN 0x00000100
+#define DAC_4BPP_PIX_ORDER 0x00000200
+#define DAC_CRC_EN 0x00080000
+#define DAC_MASK_ALL (0xff << 24)
+#define DAC_PDWN (1 << 15)
+#define DAC_EXPAND_MODE (1 << 14)
+#define DAC_VGA_ADR_EN (1 << 13)
+#define DAC_RANGE_CNTL (3 << 0)
+#define DAC_RANGE_CNTL_MASK 0x03
+#define DAC_BLANKING (1 << 2)
+#define DAC_CMP_EN (1 << 3)
+#define DAC_CMP_OUTPUT (1 << 7)
+
+/* DAC_CNTL2 bit constants */
+#define DAC2_EXPAND_MODE (1 << 14)
+#define DAC2_CMP_EN (1 << 7)
+#define DAC2_PALETTE_ACCESS_CNTL (1 << 5)
+
+/* DAC_EXT_CNTL bit constants */
+#define DAC_FORCE_BLANK_OFF_EN (1 << 4)
+#define DAC_FORCE_DATA_EN (1 << 5)
+#define DAC_FORCE_DATA_SEL_MASK (3 << 6)
+#define DAC_FORCE_DATA_MASK 0x0003ff00
+#define DAC_FORCE_DATA_SHIFT 8
+
+/* GEN_RESET_CNTL bit constants */
+#define SOFT_RESET_GUI 0x00000001
+#define SOFT_RESET_VCLK 0x00000100
+#define SOFT_RESET_PCLK 0x00000200
+#define SOFT_RESET_ECP 0x00000400
+#define SOFT_RESET_DISPENG_XCLK 0x00000800
+
+/* MEM_CNTL bit constants */
+#define MEM_CTLR_STATUS_IDLE 0x00000000
+#define MEM_CTLR_STATUS_BUSY 0x00100000
+#define MEM_SEQNCR_STATUS_IDLE 0x00000000
+#define MEM_SEQNCR_STATUS_BUSY 0x00200000
+#define MEM_ARBITER_STATUS_IDLE 0x00000000
+#define MEM_ARBITER_STATUS_BUSY 0x00400000
+#define MEM_REQ_UNLOCK 0x00000000
+#define MEM_REQ_LOCK 0x00800000
+#define MEM_NUM_CHANNELS_MASK 0x00000001
+#define MEM_USE_B_CH_ONLY 0x00000002
+#define RV100_MEM_HALF_MODE 0x00000008
+#define R300_MEM_NUM_CHANNELS_MASK 0x00000003
+#define R300_MEM_USE_CD_CH_ONLY 0x00000004
+
+
+/* RBBM_SOFT_RESET bit constants */
+#define SOFT_RESET_CP (1 << 0)
+#define SOFT_RESET_HI (1 << 1)
+#define SOFT_RESET_SE (1 << 2)
+#define SOFT_RESET_RE (1 << 3)
+#define SOFT_RESET_PP (1 << 4)
+#define SOFT_RESET_E2 (1 << 5)
+#define SOFT_RESET_RB (1 << 6)
+#define SOFT_RESET_HDP (1 << 7)
+
+/* SURFACE_CNTL bit consants */
+#define SURF_TRANSLATION_DIS (1 << 8)
+#define NONSURF_AP0_SWP_16BPP (1 << 20)
+#define NONSURF_AP0_SWP_32BPP (1 << 21)
+#define NONSURF_AP1_SWP_16BPP (1 << 22)
+#define NONSURF_AP1_SWP_32BPP (1 << 23)
+
+/* DEFAULT_SC_BOTTOM_RIGHT bit constants */
+#define DEFAULT_SC_RIGHT_MAX (0x1fff << 0)
+#define DEFAULT_SC_BOTTOM_MAX (0x1fff << 16)
+
+/* MM_INDEX bit constants */
+#define MM_APER 0x80000000
+
+/* CLR_CMP_CNTL bit constants */
+#define COMPARE_SRC_FALSE 0x00000000
+#define COMPARE_SRC_TRUE 0x00000001
+#define COMPARE_SRC_NOT_EQUAL 0x00000004
+#define COMPARE_SRC_EQUAL 0x00000005
+#define COMPARE_SRC_EQUAL_FLIP 0x00000007
+#define COMPARE_DST_FALSE 0x00000000
+#define COMPARE_DST_TRUE 0x00000100
+#define COMPARE_DST_NOT_EQUAL 0x00000400
+#define COMPARE_DST_EQUAL 0x00000500
+#define COMPARE_DESTINATION 0x00000000
+#define COMPARE_SOURCE 0x01000000
+#define COMPARE_SRC_AND_DST 0x02000000
+
+
+/* DP_CNTL bit constants */
+#define DST_X_RIGHT_TO_LEFT 0x00000000
+#define DST_X_LEFT_TO_RIGHT 0x00000001
+#define DST_Y_BOTTOM_TO_TOP 0x00000000
+#define DST_Y_TOP_TO_BOTTOM 0x00000002
+#define DST_X_MAJOR 0x00000000
+#define DST_Y_MAJOR 0x00000004
+#define DST_X_TILE 0x00000008
+#define DST_Y_TILE 0x00000010
+#define DST_LAST_PEL 0x00000020
+#define DST_TRAIL_X_RIGHT_TO_LEFT 0x00000000
+#define DST_TRAIL_X_LEFT_TO_RIGHT 0x00000040
+#define DST_TRAP_FILL_RIGHT_TO_LEFT 0x00000000
+#define DST_TRAP_FILL_LEFT_TO_RIGHT 0x00000080
+#define DST_BRES_SIGN 0x00000100
+#define DST_HOST_BIG_ENDIAN_EN 0x00000200
+#define DST_POLYLINE_NONLAST 0x00008000
+#define DST_RASTER_STALL 0x00010000
+#define DST_POLY_EDGE 0x00040000
+
+
+/* DP_CNTL_YDIR_XDIR_YMAJOR bit constants (short version of DP_CNTL) */
+#define DST_X_MAJOR_S 0x00000000
+#define DST_Y_MAJOR_S 0x00000001
+#define DST_Y_BOTTOM_TO_TOP_S 0x00000000
+#define DST_Y_TOP_TO_BOTTOM_S 0x00008000
+#define DST_X_RIGHT_TO_LEFT_S 0x00000000
+#define DST_X_LEFT_TO_RIGHT_S 0x80000000
+
+
+/* DP_DATATYPE bit constants */
+#define DST_8BPP 0x00000002
+#define DST_15BPP 0x00000003
+#define DST_16BPP 0x00000004
+#define DST_24BPP 0x00000005
+#define DST_32BPP 0x00000006
+#define DST_8BPP_RGB332 0x00000007
+#define DST_8BPP_Y8 0x00000008
+#define DST_8BPP_RGB8 0x00000009
+#define DST_16BPP_VYUY422 0x0000000b
+#define DST_16BPP_YVYU422 0x0000000c
+#define DST_32BPP_AYUV444 0x0000000e
+#define DST_16BPP_ARGB4444 0x0000000f
+#define BRUSH_SOLIDCOLOR 0x00000d00
+#define SRC_MONO 0x00000000
+#define SRC_MONO_LBKGD 0x00010000
+#define SRC_DSTCOLOR 0x00030000
+#define BYTE_ORDER_MSB_TO_LSB 0x00000000
+#define BYTE_ORDER_LSB_TO_MSB 0x40000000
+#define DP_CONVERSION_TEMP 0x80000000
+#define HOST_BIG_ENDIAN_EN (1 << 29)
+
+
+/* DP_GUI_MASTER_CNTL bit constants */
+#define GMC_SRC_PITCH_OFFSET_DEFAULT 0x00000000
+#define GMC_SRC_PITCH_OFFSET_LEAVE 0x00000001
+#define GMC_DST_PITCH_OFFSET_DEFAULT 0x00000000
+#define GMC_DST_PITCH_OFFSET_LEAVE 0x00000002
+#define GMC_SRC_CLIP_DEFAULT 0x00000000
+#define GMC_SRC_CLIP_LEAVE 0x00000004
+#define GMC_DST_CLIP_DEFAULT 0x00000000
+#define GMC_DST_CLIP_LEAVE 0x00000008
+#define GMC_BRUSH_8x8MONO 0x00000000
+#define GMC_BRUSH_8x8MONO_LBKGD 0x00000010
+#define GMC_BRUSH_8x1MONO 0x00000020
+#define GMC_BRUSH_8x1MONO_LBKGD 0x00000030
+#define GMC_BRUSH_1x8MONO 0x00000040
+#define GMC_BRUSH_1x8MONO_LBKGD 0x00000050
+#define GMC_BRUSH_32x1MONO 0x00000060
+#define GMC_BRUSH_32x1MONO_LBKGD 0x00000070
+#define GMC_BRUSH_32x32MONO 0x00000080
+#define GMC_BRUSH_32x32MONO_LBKGD 0x00000090
+#define GMC_BRUSH_8x8COLOR 0x000000a0
+#define GMC_BRUSH_8x1COLOR 0x000000b0
+#define GMC_BRUSH_1x8COLOR 0x000000c0
+#define GMC_BRUSH_SOLID_COLOR 0x000000d0
+#define GMC_DST_8BPP 0x00000200
+#define GMC_DST_15BPP 0x00000300
+#define GMC_DST_16BPP 0x00000400
+#define GMC_DST_24BPP 0x00000500
+#define GMC_DST_32BPP 0x00000600
+#define GMC_DST_8BPP_RGB332 0x00000700
+#define GMC_DST_8BPP_Y8 0x00000800
+#define GMC_DST_8BPP_RGB8 0x00000900
+#define GMC_DST_16BPP_VYUY422 0x00000b00
+#define GMC_DST_16BPP_YVYU422 0x00000c00
+#define GMC_DST_32BPP_AYUV444 0x00000e00
+#define GMC_DST_16BPP_ARGB4444 0x00000f00
+#define GMC_SRC_MONO 0x00000000
+#define GMC_SRC_MONO_LBKGD 0x00001000
+#define GMC_SRC_DSTCOLOR 0x00003000
+#define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000
+#define GMC_BYTE_ORDER_LSB_TO_MSB 0x00004000
+#define GMC_DP_CONVERSION_TEMP_9300 0x00008000
+#define GMC_DP_CONVERSION_TEMP_6500 0x00000000
+#define GMC_DP_SRC_RECT 0x02000000
+#define GMC_DP_SRC_HOST 0x03000000
+#define GMC_DP_SRC_HOST_BYTEALIGN 0x04000000
+#define GMC_3D_FCN_EN_CLR 0x00000000
+#define GMC_3D_FCN_EN_SET 0x08000000
+#define GMC_DST_CLR_CMP_FCN_LEAVE 0x00000000
+#define GMC_DST_CLR_CMP_FCN_CLEAR 0x10000000
+#define GMC_AUX_CLIP_LEAVE 0x00000000
+#define GMC_AUX_CLIP_CLEAR 0x20000000
+#define GMC_WRITE_MASK_LEAVE 0x00000000
+#define GMC_WRITE_MASK_SET 0x40000000
+#define GMC_CLR_CMP_CNTL_DIS (1 << 28)
+#define GMC_SRC_DATATYPE_COLOR (3 << 12)
+#define ROP3_S 0x00cc0000
+#define ROP3_SRCCOPY 0x00cc0000
+#define ROP3_P 0x00f00000
+#define ROP3_PATCOPY 0x00f00000
+#define DP_SRC_SOURCE_MASK (7 << 24)
+#define GMC_BRUSH_NONE (15 << 4)
+#define DP_SRC_SOURCE_MEMORY (2 << 24)
+#define GMC_BRUSH_SOLIDCOLOR 0x000000d0
+
+/* DP_MIX bit constants */
+#define DP_SRC_RECT 0x00000200
+#define DP_SRC_HOST 0x00000300
+#define DP_SRC_HOST_BYTEALIGN 0x00000400
+
+/* MPLL_CNTL bit constants */
+#define MPLL_RESET 0x00000001
+
+/* MDLL_CKO bit constants */
+#define MCKOA_SLEEP 0x00000001
+#define MCKOA_RESET 0x00000002
+#define MCKOA_REF_SKEW_MASK 0x00000700
+#define MCKOA_FB_SKEW_MASK 0x00007000
+
+/* MDLL_RDCKA bit constants */
+#define MRDCKA0_SLEEP 0x00000001
+#define MRDCKA0_RESET 0x00000002
+#define MRDCKA1_SLEEP 0x00010000
+#define MRDCKA1_RESET 0x00020000
+
+/* VCLK_ECP_CNTL constants */
+#define VCLK_SRC_SEL_MASK 0x03
+#define VCLK_SRC_SEL_CPUCLK 0x00
+#define VCLK_SRC_SEL_PSCANCLK 0x01
+#define VCLK_SRC_SEL_BYTECLK 0x02
+#define VCLK_SRC_SEL_PPLLCLK 0x03
+#define PIXCLK_ALWAYS_ONb 0x00000040
+#define PIXCLK_DAC_ALWAYS_ONb 0x00000080
+
+/* BUS_CNTL1 constants */
+#define BUS_CNTL1_MOBILE_PLATFORM_SEL_MASK 0x0c000000
+#define BUS_CNTL1_MOBILE_PLATFORM_SEL_SHIFT 26
+#define BUS_CNTL1_AGPCLK_VALID 0x80000000
+
+/* PLL_PWRMGT_CNTL constants */
+#define PLL_PWRMGT_CNTL_SPLL_TURNOFF 0x00000002
+#define PLL_PWRMGT_CNTL_PPLL_TURNOFF 0x00000004
+#define PLL_PWRMGT_CNTL_P2PLL_TURNOFF 0x00000008
+#define PLL_PWRMGT_CNTL_TVPLL_TURNOFF 0x00000010
+#define PLL_PWRMGT_CNTL_MOBILE_SU 0x00010000
+#define PLL_PWRMGT_CNTL_SU_SCLK_USE_BCLK 0x00020000
+#define PLL_PWRMGT_CNTL_SU_MCLK_USE_BCLK 0x00040000
+
+/* TV_DAC_CNTL constants */
+#define TV_DAC_CNTL_BGSLEEP 0x00000040
+#define TV_DAC_CNTL_DETECT 0x00000010
+#define TV_DAC_CNTL_BGADJ_MASK 0x000f0000
+#define TV_DAC_CNTL_DACADJ_MASK 0x00f00000
+#define TV_DAC_CNTL_BGADJ__SHIFT 16
+#define TV_DAC_CNTL_DACADJ__SHIFT 20
+#define TV_DAC_CNTL_RDACPD 0x01000000
+#define TV_DAC_CNTL_GDACPD 0x02000000
+#define TV_DAC_CNTL_BDACPD 0x04000000
+
+/* DISP_MISC_CNTL constants */
+#define DISP_MISC_CNTL_SOFT_RESET_GRPH_PP (1 << 0)
+#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_PP (1 << 1)
+#define DISP_MISC_CNTL_SOFT_RESET_OV0_PP (1 << 2)
+#define DISP_MISC_CNTL_SOFT_RESET_GRPH_SCLK (1 << 4)
+#define DISP_MISC_CNTL_SOFT_RESET_SUBPIC_SCLK (1 << 5)
+#define DISP_MISC_CNTL_SOFT_RESET_OV0_SCLK (1 << 6)
+#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_PP (1 << 12)
+#define DISP_MISC_CNTL_SOFT_RESET_GRPH2_SCLK (1 << 15)
+#define DISP_MISC_CNTL_SOFT_RESET_LVDS (1 << 16)
+#define DISP_MISC_CNTL_SOFT_RESET_TMDS (1 << 17)
+#define DISP_MISC_CNTL_SOFT_RESET_DIG_TMDS (1 << 18)
+#define DISP_MISC_CNTL_SOFT_RESET_TV (1 << 19)
+
+/* DISP_PWR_MAN constants */
+#define DISP_PWR_MAN_DISP_PWR_MAN_D3_CRTC_EN (1 << 0)
+#define DISP_PWR_MAN_DISP2_PWR_MAN_D3_CRTC2_EN (1 << 4)
+#define DISP_PWR_MAN_DISP_D3_RST (1 << 16)
+#define DISP_PWR_MAN_DISP_D3_REG_RST (1 << 17)
+#define DISP_PWR_MAN_DISP_D3_GRPH_RST (1 << 18)
+#define DISP_PWR_MAN_DISP_D3_SUBPIC_RST (1 << 19)
+#define DISP_PWR_MAN_DISP_D3_OV0_RST (1 << 20)
+#define DISP_PWR_MAN_DISP_D1D2_GRPH_RST (1 << 21)
+#define DISP_PWR_MAN_DISP_D1D2_SUBPIC_RST (1 << 22)
+#define DISP_PWR_MAN_DISP_D1D2_OV0_RST (1 << 23)
+#define DISP_PWR_MAN_DIG_TMDS_ENABLE_RST (1 << 24)
+#define DISP_PWR_MAN_TV_ENABLE_RST (1 << 25)
+#define DISP_PWR_MAN_AUTO_PWRUP_EN (1 << 26)
+
+/* masks */
+
+#define CONFIG_MEMSIZE_MASK 0x1f000000
+#define MEM_CFG_TYPE 0x40000000
+#define DST_OFFSET_MASK 0x003fffff
+#define DST_PITCH_MASK 0x3fc00000
+#define DEFAULT_TILE_MASK 0xc0000000
+#define PPLL_DIV_SEL_MASK 0x00000300
+#define PPLL_RESET 0x00000001
+#define PPLL_SLEEP 0x00000002
+#define PPLL_ATOMIC_UPDATE_EN 0x00010000
+#define PPLL_REF_DIV_MASK 0x000003ff
+#define PPLL_FB3_DIV_MASK 0x000007ff
+#define PPLL_POST3_DIV_MASK 0x00070000
+#define PPLL_ATOMIC_UPDATE_R 0x00008000
+#define PPLL_ATOMIC_UPDATE_W 0x00008000
+#define PPLL_VGA_ATOMIC_UPDATE_EN 0x00020000
+#define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18)
+#define R300_PPLL_REF_DIV_ACC_SHIFT 18
+
+#define GUI_ACTIVE 0x80000000
+
+
+#define MC_IND_INDEX 0x01F8
+#define MC_IND_DATA 0x01FC
+
+/* PAD_CTLR_STRENGTH */
+#define PAD_MANUAL_OVERRIDE 0x80000000
+
+/* pllCLK_PIN_CNTL */
+#define CLK_PIN_CNTL__OSC_EN_MASK 0x00000001L
+#define CLK_PIN_CNTL__OSC_EN 0x00000001L
+#define CLK_PIN_CNTL__XTL_LOW_GAIN_MASK 0x00000004L
+#define CLK_PIN_CNTL__XTL_LOW_GAIN 0x00000004L
+#define CLK_PIN_CNTL__DONT_USE_XTALIN_MASK 0x00000010L
+#define CLK_PIN_CNTL__DONT_USE_XTALIN 0x00000010L
+#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE_MASK 0x00000020L
+#define CLK_PIN_CNTL__SLOW_CLOCK_SOURCE 0x00000020L
+#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN_MASK 0x00000800L
+#define CLK_PIN_CNTL__CG_CLK_TO_OUTPIN 0x00000800L
+#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN_MASK 0x00001000L
+#define CLK_PIN_CNTL__CG_COUNT_UP_TO_OUTPIN 0x00001000L
+#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND_MASK 0x00002000L
+#define CLK_PIN_CNTL__ACCESS_REGS_IN_SUSPEND 0x00002000L
+#define CLK_PIN_CNTL__CG_SPARE_MASK 0x00004000L
+#define CLK_PIN_CNTL__CG_SPARE 0x00004000L
+#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL_MASK 0x00008000L
+#define CLK_PIN_CNTL__SCLK_DYN_START_CNTL 0x00008000L
+#define CLK_PIN_CNTL__CP_CLK_RUNNING_MASK 0x00010000L
+#define CLK_PIN_CNTL__CP_CLK_RUNNING 0x00010000L
+#define CLK_PIN_CNTL__CG_SPARE_RD_MASK 0x00060000L
+#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb_MASK 0x00080000L
+#define CLK_PIN_CNTL__XTALIN_ALWAYS_ONb 0x00080000L
+#define CLK_PIN_CNTL__PWRSEQ_DELAY_MASK 0xff000000L
+
+/* pllCLK_PWRMGT_CNTL */
+#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF__SHIFT 0x00000000
+#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF__SHIFT 0x00000001
+#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF__SHIFT 0x00000002
+#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF__SHIFT 0x00000003
+#define CLK_PWRMGT_CNTL__MCLK_TURNOFF__SHIFT 0x00000004
+#define CLK_PWRMGT_CNTL__SCLK_TURNOFF__SHIFT 0x00000005
+#define CLK_PWRMGT_CNTL__PCLK_TURNOFF__SHIFT 0x00000006
+#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF__SHIFT 0x00000007
+#define CLK_PWRMGT_CNTL__MC_CH_MODE__SHIFT 0x00000008
+#define CLK_PWRMGT_CNTL__TEST_MODE__SHIFT 0x00000009
+#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN__SHIFT 0x0000000a
+#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE__SHIFT 0x0000000c
+#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT__SHIFT 0x0000000d
+#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT__SHIFT 0x0000000f
+#define CLK_PWRMGT_CNTL__MC_BUSY__SHIFT 0x00000010
+#define CLK_PWRMGT_CNTL__MC_INT_CNTL__SHIFT 0x00000011
+#define CLK_PWRMGT_CNTL__MC_SWITCH__SHIFT 0x00000012
+#define CLK_PWRMGT_CNTL__DLL_READY__SHIFT 0x00000013
+#define CLK_PWRMGT_CNTL__DISP_PM__SHIFT 0x00000014
+#define CLK_PWRMGT_CNTL__DYN_STOP_MODE__SHIFT 0x00000015
+#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG__SHIFT 0x00000018
+#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF__SHIFT 0x0000001e
+#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF__SHIFT 0x0000001f
+
+/* pllP2PLL_CNTL */
+#define P2PLL_CNTL__P2PLL_RESET_MASK 0x00000001L
+#define P2PLL_CNTL__P2PLL_RESET 0x00000001L
+#define P2PLL_CNTL__P2PLL_SLEEP_MASK 0x00000002L
+#define P2PLL_CNTL__P2PLL_SLEEP 0x00000002L
+#define P2PLL_CNTL__P2PLL_TST_EN_MASK 0x00000004L
+#define P2PLL_CNTL__P2PLL_TST_EN 0x00000004L
+#define P2PLL_CNTL__P2PLL_REFCLK_SEL_MASK 0x00000010L
+#define P2PLL_CNTL__P2PLL_REFCLK_SEL 0x00000010L
+#define P2PLL_CNTL__P2PLL_FBCLK_SEL_MASK 0x00000020L
+#define P2PLL_CNTL__P2PLL_FBCLK_SEL 0x00000020L
+#define P2PLL_CNTL__P2PLL_TCPOFF_MASK 0x00000040L
+#define P2PLL_CNTL__P2PLL_TCPOFF 0x00000040L
+#define P2PLL_CNTL__P2PLL_TVCOMAX_MASK 0x00000080L
+#define P2PLL_CNTL__P2PLL_TVCOMAX 0x00000080L
+#define P2PLL_CNTL__P2PLL_PCP_MASK 0x00000700L
+#define P2PLL_CNTL__P2PLL_PVG_MASK 0x00003800L
+#define P2PLL_CNTL__P2PLL_PDC_MASK 0x0000c000L
+#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN_MASK 0x00010000L
+#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_EN 0x00010000L
+#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC_MASK 0x00040000L
+#define P2PLL_CNTL__P2PLL_ATOMIC_UPDATE_SYNC 0x00040000L
+#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET_MASK 0x00080000L
+#define P2PLL_CNTL__P2PLL_DISABLE_AUTO_RESET 0x00080000L
+
+/* pllPIXCLKS_CNTL */
+#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL__SHIFT 0x00000000
+#define PIXCLKS_CNTL__PIX2CLK_INVERT__SHIFT 0x00000004
+#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT__SHIFT 0x00000005
+#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb__SHIFT 0x00000006
+#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb__SHIFT 0x00000007
+#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL__SHIFT 0x00000008
+#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb__SHIFT 0x0000000b
+#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb__SHIFT 0x0000000c
+#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb__SHIFT 0x0000000d
+#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb__SHIFT 0x0000000e
+#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb__SHIFT 0x0000000f
+
+
+/* pllPIXCLKS_CNTL */
+#define PIXCLKS_CNTL__PIX2CLK_SRC_SEL_MASK 0x00000003L
+#define PIXCLKS_CNTL__PIX2CLK_INVERT 0x00000010L
+#define PIXCLKS_CNTL__PIX2CLK_SRC_INVERT 0x00000020L
+#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb 0x00000040L
+#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb 0x00000080L
+#define PIXCLKS_CNTL__PIXCLK_TV_SRC_SEL 0x00000100L
+#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb 0x00000800L
+#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb 0x00001000L
+#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb 0x00002000L
+#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb 0x00004000L
+#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb 0x00008000L
+#define PIXCLKS_CNTL__DISP_TVOUT_PIXCLK_TV_ALWAYS_ONb (1 << 9)
+#define PIXCLKS_CNTL__R300_DVOCLK_ALWAYS_ONb (1 << 10)
+#define PIXCLKS_CNTL__R300_PIXCLK_DVO_ALWAYS_ONb (1 << 13)
+#define PIXCLKS_CNTL__R300_PIXCLK_TRANS_ALWAYS_ONb (1 << 16)
+#define PIXCLKS_CNTL__R300_PIXCLK_TVO_ALWAYS_ONb (1 << 17)
+#define PIXCLKS_CNTL__R300_P2G2CLK_ALWAYS_ONb (1 << 18)
+#define PIXCLKS_CNTL__R300_P2G2CLK_DAC_ALWAYS_ONb (1 << 19)
+#define PIXCLKS_CNTL__R300_DISP_DAC_PIXCLK_DAC2_BLANK_OFF (1 << 23)
+
+
+/* pllP2PLL_DIV_0 */
+#define P2PLL_DIV_0__P2PLL_FB_DIV_MASK 0x000007ffL
+#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W_MASK 0x00008000L
+#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_W 0x00008000L
+#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R_MASK 0x00008000L
+#define P2PLL_DIV_0__P2PLL_ATOMIC_UPDATE_R 0x00008000L
+#define P2PLL_DIV_0__P2PLL_POST_DIV_MASK 0x00070000L
+
+/* pllSCLK_CNTL */
+#define SCLK_CNTL__SCLK_SRC_SEL_MASK 0x00000007L
+#define SCLK_CNTL__CP_MAX_DYN_STOP_LAT 0x00000008L
+#define SCLK_CNTL__HDP_MAX_DYN_STOP_LAT 0x00000010L
+#define SCLK_CNTL__TV_MAX_DYN_STOP_LAT 0x00000020L
+#define SCLK_CNTL__E2_MAX_DYN_STOP_LAT 0x00000040L
+#define SCLK_CNTL__SE_MAX_DYN_STOP_LAT 0x00000080L
+#define SCLK_CNTL__IDCT_MAX_DYN_STOP_LAT 0x00000100L
+#define SCLK_CNTL__VIP_MAX_DYN_STOP_LAT 0x00000200L
+#define SCLK_CNTL__RE_MAX_DYN_STOP_LAT 0x00000400L
+#define SCLK_CNTL__PB_MAX_DYN_STOP_LAT 0x00000800L
+#define SCLK_CNTL__TAM_MAX_DYN_STOP_LAT 0x00001000L
+#define SCLK_CNTL__TDM_MAX_DYN_STOP_LAT 0x00002000L
+#define SCLK_CNTL__RB_MAX_DYN_STOP_LAT 0x00004000L
+#define SCLK_CNTL__DYN_STOP_LAT_MASK 0x00007ff8
+#define SCLK_CNTL__FORCE_DISP2 0x00008000L
+#define SCLK_CNTL__FORCE_CP 0x00010000L
+#define SCLK_CNTL__FORCE_HDP 0x00020000L
+#define SCLK_CNTL__FORCE_DISP1 0x00040000L
+#define SCLK_CNTL__FORCE_TOP 0x00080000L
+#define SCLK_CNTL__FORCE_E2 0x00100000L
+#define SCLK_CNTL__FORCE_SE 0x00200000L
+#define SCLK_CNTL__FORCE_IDCT 0x00400000L
+#define SCLK_CNTL__FORCE_VIP 0x00800000L
+#define SCLK_CNTL__FORCE_RE 0x01000000L
+#define SCLK_CNTL__FORCE_PB 0x02000000L
+#define SCLK_CNTL__FORCE_TAM 0x04000000L
+#define SCLK_CNTL__FORCE_TDM 0x08000000L
+#define SCLK_CNTL__FORCE_RB 0x10000000L
+#define SCLK_CNTL__FORCE_TV_SCLK 0x20000000L
+#define SCLK_CNTL__FORCE_SUBPIC 0x40000000L
+#define SCLK_CNTL__FORCE_OV0 0x80000000L
+#define SCLK_CNTL__R300_FORCE_VAP (1<<21)
+#define SCLK_CNTL__R300_FORCE_SR (1<<25)
+#define SCLK_CNTL__R300_FORCE_PX (1<<26)
+#define SCLK_CNTL__R300_FORCE_TX (1<<27)
+#define SCLK_CNTL__R300_FORCE_US (1<<28)
+#define SCLK_CNTL__R300_FORCE_SU (1<<30)
+#define SCLK_CNTL__FORCEON_MASK 0xffff8000L
+
+/* pllSCLK_CNTL2 */
+#define SCLK_CNTL2__R300_TCL_MAX_DYN_STOP_LAT (1<<10)
+#define SCLK_CNTL2__R300_GA_MAX_DYN_STOP_LAT (1<<11)
+#define SCLK_CNTL2__R300_CBA_MAX_DYN_STOP_LAT (1<<12)
+#define SCLK_CNTL2__R300_FORCE_TCL (1<<13)
+#define SCLK_CNTL2__R300_FORCE_CBA (1<<14)
+#define SCLK_CNTL2__R300_FORCE_GA (1<<15)
+
+/* SCLK_MORE_CNTL */
+#define SCLK_MORE_CNTL__DISPREGS_MAX_DYN_STOP_LAT 0x00000001L
+#define SCLK_MORE_CNTL__MC_GUI_MAX_DYN_STOP_LAT 0x00000002L
+#define SCLK_MORE_CNTL__MC_HOST_MAX_DYN_STOP_LAT 0x00000004L
+#define SCLK_MORE_CNTL__FORCE_DISPREGS 0x00000100L
+#define SCLK_MORE_CNTL__FORCE_MC_GUI 0x00000200L
+#define SCLK_MORE_CNTL__FORCE_MC_HOST 0x00000400L
+#define SCLK_MORE_CNTL__STOP_SCLK_EN 0x00001000L
+#define SCLK_MORE_CNTL__STOP_SCLK_A 0x00002000L
+#define SCLK_MORE_CNTL__STOP_SCLK_B 0x00004000L
+#define SCLK_MORE_CNTL__STOP_SCLK_C 0x00008000L
+#define SCLK_MORE_CNTL__HALF_SPEED_SCLK 0x00010000L
+#define SCLK_MORE_CNTL__IO_CG_VOLTAGE_DROP 0x00020000L
+#define SCLK_MORE_CNTL__TVFB_SOFT_RESET 0x00040000L
+#define SCLK_MORE_CNTL__VOLTAGE_DROP_SYNC 0x00080000L
+#define SCLK_MORE_CNTL__IDLE_DELAY_HALF_SCLK 0x00400000L
+#define SCLK_MORE_CNTL__AGP_BUSY_HALF_SCLK 0x00800000L
+#define SCLK_MORE_CNTL__CG_SPARE_RD_C_MASK 0xff000000L
+#define SCLK_MORE_CNTL__FORCEON 0x00000700L
+
+/* MCLK_CNTL */
+#define MCLK_CNTL__MCLKA_SRC_SEL_MASK 0x00000007L
+#define MCLK_CNTL__YCLKA_SRC_SEL_MASK 0x00000070L
+#define MCLK_CNTL__MCLKB_SRC_SEL_MASK 0x00000700L
+#define MCLK_CNTL__YCLKB_SRC_SEL_MASK 0x00007000L
+#define MCLK_CNTL__FORCE_MCLKA_MASK 0x00010000L
+#define MCLK_CNTL__FORCE_MCLKA 0x00010000L
+#define MCLK_CNTL__FORCE_MCLKB_MASK 0x00020000L
+#define MCLK_CNTL__FORCE_MCLKB 0x00020000L
+#define MCLK_CNTL__FORCE_YCLKA_MASK 0x00040000L
+#define MCLK_CNTL__FORCE_YCLKA 0x00040000L
+#define MCLK_CNTL__FORCE_YCLKB_MASK 0x00080000L
+#define MCLK_CNTL__FORCE_YCLKB 0x00080000L
+#define MCLK_CNTL__FORCE_MC_MASK 0x00100000L
+#define MCLK_CNTL__FORCE_MC 0x00100000L
+#define MCLK_CNTL__FORCE_AIC_MASK 0x00200000L
+#define MCLK_CNTL__FORCE_AIC 0x00200000L
+#define MCLK_CNTL__MRDCKA0_SOUTSEL_MASK 0x03000000L
+#define MCLK_CNTL__MRDCKA1_SOUTSEL_MASK 0x0c000000L
+#define MCLK_CNTL__MRDCKB0_SOUTSEL_MASK 0x30000000L
+#define MCLK_CNTL__MRDCKB1_SOUTSEL_MASK 0xc0000000L
+#define MCLK_CNTL__R300_DISABLE_MC_MCLKA (1 << 21)
+#define MCLK_CNTL__R300_DISABLE_MC_MCLKB (1 << 21)
+
+/* MCLK_MISC */
+#define MCLK_MISC__SCLK_SOURCED_FROM_MPLL_SEL_MASK 0x00000003L
+#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL_MASK 0x00000004L
+#define MCLK_MISC__MCLK_FROM_SPLL_DIV_SEL 0x00000004L
+#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL_MASK 0x00000008L
+#define MCLK_MISC__ENABLE_SCLK_FROM_MPLL 0x00000008L
+#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN_MASK 0x00000010L
+#define MCLK_MISC__MPLL_MODEA_MODEC_HW_SEL_EN 0x00000010L
+#define MCLK_MISC__DLL_READY_LAT_MASK 0x00000100L
+#define MCLK_MISC__DLL_READY_LAT 0x00000100L
+#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT_MASK 0x00001000L
+#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT 0x00001000L
+#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT_MASK 0x00002000L
+#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT 0x00002000L
+#define MCLK_MISC__MC_MCLK_DYN_ENABLE_MASK 0x00004000L
+#define MCLK_MISC__MC_MCLK_DYN_ENABLE 0x00004000L
+#define MCLK_MISC__IO_MCLK_DYN_ENABLE_MASK 0x00008000L
+#define MCLK_MISC__IO_MCLK_DYN_ENABLE 0x00008000L
+#define MCLK_MISC__CGM_CLK_TO_OUTPIN_MASK 0x00010000L
+#define MCLK_MISC__CGM_CLK_TO_OUTPIN 0x00010000L
+#define MCLK_MISC__CLK_OR_COUNT_SEL_MASK 0x00020000L
+#define MCLK_MISC__CLK_OR_COUNT_SEL 0x00020000L
+#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND_MASK 0x00040000L
+#define MCLK_MISC__EN_MCLK_TRISTATE_IN_SUSPEND 0x00040000L
+#define MCLK_MISC__CGM_SPARE_RD_MASK 0x00300000L
+#define MCLK_MISC__CGM_SPARE_A_RD_MASK 0x00c00000L
+#define MCLK_MISC__TCLK_TO_YCLKB_EN_MASK 0x01000000L
+#define MCLK_MISC__TCLK_TO_YCLKB_EN 0x01000000L
+#define MCLK_MISC__CGM_SPARE_A_MASK 0x0e000000L
+
+/* VCLK_ECP_CNTL */
+#define VCLK_ECP_CNTL__VCLK_SRC_SEL_MASK 0x00000003L
+#define VCLK_ECP_CNTL__VCLK_INVERT 0x00000010L
+#define VCLK_ECP_CNTL__PIXCLK_SRC_INVERT 0x00000020L
+#define VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb 0x00000040L
+#define VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb 0x00000080L
+#define VCLK_ECP_CNTL__ECP_DIV_MASK 0x00000300L
+#define VCLK_ECP_CNTL__ECP_FORCE_ON 0x00040000L
+#define VCLK_ECP_CNTL__SUBCLK_FORCE_ON 0x00080000L
+#define VCLK_ECP_CNTL__R300_DISP_DAC_PIXCLK_DAC_BLANK_OFF (1<<23)
+
+/* PLL_PWRMGT_CNTL */
+#define PLL_PWRMGT_CNTL__MPLL_TURNOFF_MASK 0x00000001L
+#define PLL_PWRMGT_CNTL__MPLL_TURNOFF 0x00000001L
+#define PLL_PWRMGT_CNTL__SPLL_TURNOFF_MASK 0x00000002L
+#define PLL_PWRMGT_CNTL__SPLL_TURNOFF 0x00000002L
+#define PLL_PWRMGT_CNTL__PPLL_TURNOFF_MASK 0x00000004L
+#define PLL_PWRMGT_CNTL__PPLL_TURNOFF 0x00000004L
+#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF_MASK 0x00000008L
+#define PLL_PWRMGT_CNTL__P2PLL_TURNOFF 0x00000008L
+#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF_MASK 0x00000010L
+#define PLL_PWRMGT_CNTL__TVPLL_TURNOFF 0x00000010L
+#define PLL_PWRMGT_CNTL__AGPCLK_DYN_STOP_LAT_MASK 0x000001e0L
+#define PLL_PWRMGT_CNTL__APM_POWER_STATE_MASK 0x00000600L
+#define PLL_PWRMGT_CNTL__APM_PWRSTATE_RD_MASK 0x00001800L
+#define PLL_PWRMGT_CNTL__PM_MODE_SEL_MASK 0x00002000L
+#define PLL_PWRMGT_CNTL__PM_MODE_SEL 0x00002000L
+#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND_MASK 0x00004000L
+#define PLL_PWRMGT_CNTL__EN_PWRSEQ_DONE_COND 0x00004000L
+#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND_MASK 0x00008000L
+#define PLL_PWRMGT_CNTL__EN_DISP_PARKED_COND 0x00008000L
+#define PLL_PWRMGT_CNTL__MOBILE_SU_MASK 0x00010000L
+#define PLL_PWRMGT_CNTL__MOBILE_SU 0x00010000L
+#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK_MASK 0x00020000L
+#define PLL_PWRMGT_CNTL__SU_SCLK_USE_BCLK 0x00020000L
+#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK_MASK 0x00040000L
+#define PLL_PWRMGT_CNTL__SU_MCLK_USE_BCLK 0x00040000L
+#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE_MASK 0x00080000L
+#define PLL_PWRMGT_CNTL__SU_SUSTAIN_DISABLE 0x00080000L
+#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE_MASK 0x00100000L
+#define PLL_PWRMGT_CNTL__TCL_BYPASS_DISABLE 0x00100000L
+#define PLL_PWRMGT_CNTL__TCL_CLOCK_CTIVE_RD_MASK 0x00200000L
+#define PLL_PWRMGT_CNTL__TCL_CLOCK_ACTIVE_RD 0x00200000L
+#define PLL_PWRMGT_CNTL__CG_NO2_DEBUG_MASK 0xff000000L
+
+/* CLK_PWRMGT_CNTL */
+#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF_MASK 0x00000001L
+#define CLK_PWRMGT_CNTL__MPLL_PWRMGT_OFF 0x00000001L
+#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF_MASK 0x00000002L
+#define CLK_PWRMGT_CNTL__SPLL_PWRMGT_OFF 0x00000002L
+#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF_MASK 0x00000004L
+#define CLK_PWRMGT_CNTL__PPLL_PWRMGT_OFF 0x00000004L
+#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF_MASK 0x00000008L
+#define CLK_PWRMGT_CNTL__P2PLL_PWRMGT_OFF 0x00000008L
+#define CLK_PWRMGT_CNTL__MCLK_TURNOFF_MASK 0x00000010L
+#define CLK_PWRMGT_CNTL__MCLK_TURNOFF 0x00000010L
+#define CLK_PWRMGT_CNTL__SCLK_TURNOFF_MASK 0x00000020L
+#define CLK_PWRMGT_CNTL__SCLK_TURNOFF 0x00000020L
+#define CLK_PWRMGT_CNTL__PCLK_TURNOFF_MASK 0x00000040L
+#define CLK_PWRMGT_CNTL__PCLK_TURNOFF 0x00000040L
+#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF_MASK 0x00000080L
+#define CLK_PWRMGT_CNTL__P2CLK_TURNOFF 0x00000080L
+#define CLK_PWRMGT_CNTL__MC_CH_MODE_MASK 0x00000100L
+#define CLK_PWRMGT_CNTL__MC_CH_MODE 0x00000100L
+#define CLK_PWRMGT_CNTL__TEST_MODE_MASK 0x00000200L
+#define CLK_PWRMGT_CNTL__TEST_MODE 0x00000200L
+#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN_MASK 0x00000400L
+#define CLK_PWRMGT_CNTL__GLOBAL_PMAN_EN 0x00000400L
+#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE_MASK 0x00001000L
+#define CLK_PWRMGT_CNTL__ENGINE_DYNCLK_MODE 0x00001000L
+#define CLK_PWRMGT_CNTL__ACTIVE_HILO_LAT_MASK 0x00006000L
+#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT_MASK 0x00008000L
+#define CLK_PWRMGT_CNTL__DISP_DYN_STOP_LAT 0x00008000L
+#define CLK_PWRMGT_CNTL__MC_BUSY_MASK 0x00010000L
+#define CLK_PWRMGT_CNTL__MC_BUSY 0x00010000L
+#define CLK_PWRMGT_CNTL__MC_INT_CNTL_MASK 0x00020000L
+#define CLK_PWRMGT_CNTL__MC_INT_CNTL 0x00020000L
+#define CLK_PWRMGT_CNTL__MC_SWITCH_MASK 0x00040000L
+#define CLK_PWRMGT_CNTL__MC_SWITCH 0x00040000L
+#define CLK_PWRMGT_CNTL__DLL_READY_MASK 0x00080000L
+#define CLK_PWRMGT_CNTL__DLL_READY 0x00080000L
+#define CLK_PWRMGT_CNTL__DISP_PM_MASK 0x00100000L
+#define CLK_PWRMGT_CNTL__DISP_PM 0x00100000L
+#define CLK_PWRMGT_CNTL__DYN_STOP_MODE_MASK 0x00e00000L
+#define CLK_PWRMGT_CNTL__CG_NO1_DEBUG_MASK 0x3f000000L
+#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF_MASK 0x40000000L
+#define CLK_PWRMGT_CNTL__TVPLL_PWRMGT_OFF 0x40000000L
+#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF_MASK 0x80000000L
+#define CLK_PWRMGT_CNTL__TVCLK_TURNOFF 0x80000000L
+
+/* BUS_CNTL1 */
+#define BUS_CNTL1__PMI_IO_DISABLE_MASK 0x00000001L
+#define BUS_CNTL1__PMI_IO_DISABLE 0x00000001L
+#define BUS_CNTL1__PMI_MEM_DISABLE_MASK 0x00000002L
+#define BUS_CNTL1__PMI_MEM_DISABLE 0x00000002L
+#define BUS_CNTL1__PMI_BM_DISABLE_MASK 0x00000004L
+#define BUS_CNTL1__PMI_BM_DISABLE 0x00000004L
+#define BUS_CNTL1__PMI_INT_DISABLE_MASK 0x00000008L
+#define BUS_CNTL1__PMI_INT_DISABLE 0x00000008L
+#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE_MASK 0x00000020L
+#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE 0x00000020L
+#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS_MASK 0x00000100L
+#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS 0x00000100L
+#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS_MASK 0x00000200L
+#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS 0x00000200L
+#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS_MASK 0x00000400L
+#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS 0x00000400L
+#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS_MASK 0x00000800L
+#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS 0x00000800L
+#define BUS_CNTL1__MOBILE_PLATFORM_SEL_MASK 0x0c000000L
+#define BUS_CNTL1__SEND_SBA_LATENCY_MASK 0x70000000L
+#define BUS_CNTL1__AGPCLK_VALID_MASK 0x80000000L
+#define BUS_CNTL1__AGPCLK_VALID 0x80000000L
+
+/* BUS_CNTL1 */
+#define BUS_CNTL1__PMI_IO_DISABLE__SHIFT 0x00000000
+#define BUS_CNTL1__PMI_MEM_DISABLE__SHIFT 0x00000001
+#define BUS_CNTL1__PMI_BM_DISABLE__SHIFT 0x00000002
+#define BUS_CNTL1__PMI_INT_DISABLE__SHIFT 0x00000003
+#define BUS_CNTL1__BUS2_IMMEDIATE_PMI_DISABLE__SHIFT 0x00000005
+#define BUS_CNTL1__BUS2_VGA_REG_COHERENCY_DIS__SHIFT 0x00000008
+#define BUS_CNTL1__BUS2_VGA_MEM_COHERENCY_DIS__SHIFT 0x00000009
+#define BUS_CNTL1__BUS2_HDP_REG_COHERENCY_DIS__SHIFT 0x0000000a
+#define BUS_CNTL1__BUS2_GUI_INITIATOR_COHERENCY_DIS__SHIFT 0x0000000b
+#define BUS_CNTL1__MOBILE_PLATFORM_SEL__SHIFT 0x0000001a
+#define BUS_CNTL1__SEND_SBA_LATENCY__SHIFT 0x0000001c
+#define BUS_CNTL1__AGPCLK_VALID__SHIFT 0x0000001f
+
+/* CRTC_OFFSET_CNTL */
+#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_MASK 0x0000000fL
+#define CRTC_OFFSET_CNTL__CRTC_TILE_LINE_RIGHT_MASK 0x000000f0L
+#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT_MASK 0x00004000L
+#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_RIGHT 0x00004000L
+#define CRTC_OFFSET_CNTL__CRTC_TILE_EN_MASK 0x00008000L
+#define CRTC_OFFSET_CNTL__CRTC_TILE_EN 0x00008000L
+#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL_MASK 0x00010000L
+#define CRTC_OFFSET_CNTL__CRTC_OFFSET_FLIP_CNTL 0x00010000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN_MASK 0x00020000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_OFFSET_EN 0x00020000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_EN_MASK 0x000c0000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN_MASK 0x00100000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_OUT_EN 0x00100000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC_MASK 0x00200000L
+#define CRTC_OFFSET_CNTL__CRTC_STEREO_SYNC 0x00200000L
+#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN_MASK 0x10000000L
+#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_LEFT_EN 0x10000000L
+#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN_MASK 0x20000000L
+#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_RIGHT_EN 0x20000000L
+#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET_MASK 0x40000000L
+#define CRTC_OFFSET_CNTL__CRTC_GUI_TRIG_OFFSET 0x40000000L
+#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK_MASK 0x80000000L
+#define CRTC_OFFSET_CNTL__CRTC_OFFSET_LOCK 0x80000000L
+
+/* CRTC_GEN_CNTL */
+#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN_MASK 0x00000001L
+#define CRTC_GEN_CNTL__CRTC_DBL_SCAN_EN 0x00000001L
+#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN_MASK 0x00000002L
+#define CRTC_GEN_CNTL__CRTC_INTERLACE_EN 0x00000002L
+#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN_MASK 0x00000010L
+#define CRTC_GEN_CNTL__CRTC_C_SYNC_EN 0x00000010L
+#define CRTC_GEN_CNTL__CRTC_PIX_WIDTH_MASK 0x00000f00L
+#define CRTC_GEN_CNTL__CRTC_ICON_EN_MASK 0x00008000L
+#define CRTC_GEN_CNTL__CRTC_ICON_EN 0x00008000L
+#define CRTC_GEN_CNTL__CRTC_CUR_EN_MASK 0x00010000L
+#define CRTC_GEN_CNTL__CRTC_CUR_EN 0x00010000L
+#define CRTC_GEN_CNTL__CRTC_VSTAT_MODE_MASK 0x00060000L
+#define CRTC_GEN_CNTL__CRTC_CUR_MODE_MASK 0x00700000L
+#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN_MASK 0x01000000L
+#define CRTC_GEN_CNTL__CRTC_EXT_DISP_EN 0x01000000L
+#define CRTC_GEN_CNTL__CRTC_EN_MASK 0x02000000L
+#define CRTC_GEN_CNTL__CRTC_EN 0x02000000L
+#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B_MASK 0x04000000L
+#define CRTC_GEN_CNTL__CRTC_DISP_REQ_EN_B 0x04000000L
+
+/* CRTC2_GEN_CNTL */
+#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN_MASK 0x00000001L
+#define CRTC2_GEN_CNTL__CRTC2_DBL_SCAN_EN 0x00000001L
+#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN_MASK 0x00000002L
+#define CRTC2_GEN_CNTL__CRTC2_INTERLACE_EN 0x00000002L
+#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE_MASK 0x00000010L
+#define CRTC2_GEN_CNTL__CRTC2_SYNC_TRISTATE 0x00000010L
+#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE_MASK 0x00000020L
+#define CRTC2_GEN_CNTL__CRTC2_HSYNC_TRISTATE 0x00000020L
+#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE_MASK 0x00000040L
+#define CRTC2_GEN_CNTL__CRTC2_VSYNC_TRISTATE 0x00000040L
+#define CRTC2_GEN_CNTL__CRT2_ON_MASK 0x00000080L
+#define CRTC2_GEN_CNTL__CRT2_ON 0x00000080L
+#define CRTC2_GEN_CNTL__CRTC2_PIX_WIDTH_MASK 0x00000f00L
+#define CRTC2_GEN_CNTL__CRTC2_ICON_EN_MASK 0x00008000L
+#define CRTC2_GEN_CNTL__CRTC2_ICON_EN 0x00008000L
+#define CRTC2_GEN_CNTL__CRTC2_CUR_EN_MASK 0x00010000L
+#define CRTC2_GEN_CNTL__CRTC2_CUR_EN 0x00010000L
+#define CRTC2_GEN_CNTL__CRTC2_CUR_MODE_MASK 0x00700000L
+#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS_MASK 0x00800000L
+#define CRTC2_GEN_CNTL__CRTC2_DISPLAY_DIS 0x00800000L
+#define CRTC2_GEN_CNTL__CRTC2_EN_MASK 0x02000000L
+#define CRTC2_GEN_CNTL__CRTC2_EN 0x02000000L
+#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B_MASK 0x04000000L
+#define CRTC2_GEN_CNTL__CRTC2_DISP_REQ_EN_B 0x04000000L
+#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN_MASK 0x08000000L
+#define CRTC2_GEN_CNTL__CRTC2_C_SYNC_EN 0x08000000L
+#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS_MASK 0x10000000L
+#define CRTC2_GEN_CNTL__CRTC2_HSYNC_DIS 0x10000000L
+#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS_MASK 0x20000000L
+#define CRTC2_GEN_CNTL__CRTC2_VSYNC_DIS 0x20000000L
+
+/* AGP_CNTL */
+#define AGP_CNTL__MAX_IDLE_CLK_MASK 0x000000ffL
+#define AGP_CNTL__HOLD_RD_FIFO_MASK 0x00000100L
+#define AGP_CNTL__HOLD_RD_FIFO 0x00000100L
+#define AGP_CNTL__HOLD_RQ_FIFO_MASK 0x00000200L
+#define AGP_CNTL__HOLD_RQ_FIFO 0x00000200L
+#define AGP_CNTL__EN_2X_STBB_MASK 0x00000400L
+#define AGP_CNTL__EN_2X_STBB 0x00000400L
+#define AGP_CNTL__FORCE_FULL_SBA_MASK 0x00000800L
+#define AGP_CNTL__FORCE_FULL_SBA 0x00000800L
+#define AGP_CNTL__SBA_DIS_MASK 0x00001000L
+#define AGP_CNTL__SBA_DIS 0x00001000L
+#define AGP_CNTL__AGP_REV_ID_MASK 0x00002000L
+#define AGP_CNTL__AGP_REV_ID 0x00002000L
+#define AGP_CNTL__REG_CRIPPLE_AGP4X_MASK 0x00004000L
+#define AGP_CNTL__REG_CRIPPLE_AGP4X 0x00004000L
+#define AGP_CNTL__REG_CRIPPLE_AGP2X4X_MASK 0x00008000L
+#define AGP_CNTL__REG_CRIPPLE_AGP2X4X 0x00008000L
+#define AGP_CNTL__FORCE_INT_VREF_MASK 0x00010000L
+#define AGP_CNTL__FORCE_INT_VREF 0x00010000L
+#define AGP_CNTL__PENDING_SLOTS_VAL_MASK 0x00060000L
+#define AGP_CNTL__PENDING_SLOTS_SEL_MASK 0x00080000L
+#define AGP_CNTL__PENDING_SLOTS_SEL 0x00080000L
+#define AGP_CNTL__EN_EXTENDED_AD_STB_2X_MASK 0x00100000L
+#define AGP_CNTL__EN_EXTENDED_AD_STB_2X 0x00100000L
+#define AGP_CNTL__DIS_QUEUED_GNT_FIX_MASK 0x00200000L
+#define AGP_CNTL__DIS_QUEUED_GNT_FIX 0x00200000L
+#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET_MASK 0x00400000L
+#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET 0x00400000L
+#define AGP_CNTL__EN_RBFCALM_MASK 0x00800000L
+#define AGP_CNTL__EN_RBFCALM 0x00800000L
+#define AGP_CNTL__FORCE_EXT_VREF_MASK 0x01000000L
+#define AGP_CNTL__FORCE_EXT_VREF 0x01000000L
+#define AGP_CNTL__DIS_RBF_MASK 0x02000000L
+#define AGP_CNTL__DIS_RBF 0x02000000L
+#define AGP_CNTL__DELAY_FIRST_SBA_EN_MASK 0x04000000L
+#define AGP_CNTL__DELAY_FIRST_SBA_EN 0x04000000L
+#define AGP_CNTL__DELAY_FIRST_SBA_VAL_MASK 0x38000000L
+#define AGP_CNTL__AGP_MISC_MASK 0xc0000000L
+
+/* AGP_CNTL */
+#define AGP_CNTL__MAX_IDLE_CLK__SHIFT 0x00000000
+#define AGP_CNTL__HOLD_RD_FIFO__SHIFT 0x00000008
+#define AGP_CNTL__HOLD_RQ_FIFO__SHIFT 0x00000009
+#define AGP_CNTL__EN_2X_STBB__SHIFT 0x0000000a
+#define AGP_CNTL__FORCE_FULL_SBA__SHIFT 0x0000000b
+#define AGP_CNTL__SBA_DIS__SHIFT 0x0000000c
+#define AGP_CNTL__AGP_REV_ID__SHIFT 0x0000000d
+#define AGP_CNTL__REG_CRIPPLE_AGP4X__SHIFT 0x0000000e
+#define AGP_CNTL__REG_CRIPPLE_AGP2X4X__SHIFT 0x0000000f
+#define AGP_CNTL__FORCE_INT_VREF__SHIFT 0x00000010
+#define AGP_CNTL__PENDING_SLOTS_VAL__SHIFT 0x00000011
+#define AGP_CNTL__PENDING_SLOTS_SEL__SHIFT 0x00000013
+#define AGP_CNTL__EN_EXTENDED_AD_STB_2X__SHIFT 0x00000014
+#define AGP_CNTL__DIS_QUEUED_GNT_FIX__SHIFT 0x00000015
+#define AGP_CNTL__EN_RDATA2X4X_MULTIRESET__SHIFT 0x00000016
+#define AGP_CNTL__EN_RBFCALM__SHIFT 0x00000017
+#define AGP_CNTL__FORCE_EXT_VREF__SHIFT 0x00000018
+#define AGP_CNTL__DIS_RBF__SHIFT 0x00000019
+#define AGP_CNTL__DELAY_FIRST_SBA_EN__SHIFT 0x0000001a
+#define AGP_CNTL__DELAY_FIRST_SBA_VAL__SHIFT 0x0000001b
+#define AGP_CNTL__AGP_MISC__SHIFT 0x0000001e
+
+/* DISP_MISC_CNTL */
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP_MASK 0x00000001L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH_PP 0x00000001L
+#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP_MASK 0x00000002L
+#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_PP 0x00000002L
+#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP_MASK 0x00000004L
+#define DISP_MISC_CNTL__SOFT_RESET_OV0_PP 0x00000004L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK_MASK 0x00000010L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH_SCLK 0x00000010L
+#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK_MASK 0x00000020L
+#define DISP_MISC_CNTL__SOFT_RESET_SUBPIC_SCLK 0x00000020L
+#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK_MASK 0x00000040L
+#define DISP_MISC_CNTL__SOFT_RESET_OV0_SCLK 0x00000040L
+#define DISP_MISC_CNTL__SYNC_STRENGTH_MASK 0x00000300L
+#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN_MASK 0x00000400L
+#define DISP_MISC_CNTL__SYNC_PAD_FLOP_EN 0x00000400L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP_MASK 0x00001000L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_PP 0x00001000L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK_MASK 0x00008000L
+#define DISP_MISC_CNTL__SOFT_RESET_GRPH2_SCLK 0x00008000L
+#define DISP_MISC_CNTL__SOFT_RESET_LVDS_MASK 0x00010000L
+#define DISP_MISC_CNTL__SOFT_RESET_LVDS 0x00010000L
+#define DISP_MISC_CNTL__SOFT_RESET_TMDS_MASK 0x00020000L
+#define DISP_MISC_CNTL__SOFT_RESET_TMDS 0x00020000L
+#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS_MASK 0x00040000L
+#define DISP_MISC_CNTL__SOFT_RESET_DIG_TMDS 0x00040000L
+#define DISP_MISC_CNTL__SOFT_RESET_TV_MASK 0x00080000L
+#define DISP_MISC_CNTL__SOFT_RESET_TV 0x00080000L
+#define DISP_MISC_CNTL__PALETTE2_MEM_RD_MARGIN_MASK 0x00f00000L
+#define DISP_MISC_CNTL__PALETTE_MEM_RD_MARGIN_MASK 0x0f000000L
+#define DISP_MISC_CNTL__RMX_BUF_MEM_RD_MARGIN_MASK 0xf0000000L
+
+/* DISP_PWR_MAN */
+#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN_MASK 0x00000001L
+#define DISP_PWR_MAN__DISP_PWR_MAN_D3_CRTC_EN 0x00000001L
+#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN_MASK 0x00000010L
+#define DISP_PWR_MAN__DISP2_PWR_MAN_D3_CRTC2_EN 0x00000010L
+#define DISP_PWR_MAN__DISP_PWR_MAN_DPMS_MASK 0x00000300L
+#define DISP_PWR_MAN__DISP_D3_RST_MASK 0x00010000L
+#define DISP_PWR_MAN__DISP_D3_RST 0x00010000L
+#define DISP_PWR_MAN__DISP_D3_REG_RST_MASK 0x00020000L
+#define DISP_PWR_MAN__DISP_D3_REG_RST 0x00020000L
+#define DISP_PWR_MAN__DISP_D3_GRPH_RST_MASK 0x00040000L
+#define DISP_PWR_MAN__DISP_D3_GRPH_RST 0x00040000L
+#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST_MASK 0x00080000L
+#define DISP_PWR_MAN__DISP_D3_SUBPIC_RST 0x00080000L
+#define DISP_PWR_MAN__DISP_D3_OV0_RST_MASK 0x00100000L
+#define DISP_PWR_MAN__DISP_D3_OV0_RST 0x00100000L
+#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST_MASK 0x00200000L
+#define DISP_PWR_MAN__DISP_D1D2_GRPH_RST 0x00200000L
+#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST_MASK 0x00400000L
+#define DISP_PWR_MAN__DISP_D1D2_SUBPIC_RST 0x00400000L
+#define DISP_PWR_MAN__DISP_D1D2_OV0_RST_MASK 0x00800000L
+#define DISP_PWR_MAN__DISP_D1D2_OV0_RST 0x00800000L
+#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST_MASK 0x01000000L
+#define DISP_PWR_MAN__DIG_TMDS_ENABLE_RST 0x01000000L
+#define DISP_PWR_MAN__TV_ENABLE_RST_MASK 0x02000000L
+#define DISP_PWR_MAN__TV_ENABLE_RST 0x02000000L
+#define DISP_PWR_MAN__AUTO_PWRUP_EN_MASK 0x04000000L
+#define DISP_PWR_MAN__AUTO_PWRUP_EN 0x04000000L
+
+/* MC_IND_INDEX */
+#define MC_IND_INDEX__MC_IND_ADDR_MASK 0x0000001fL
+#define MC_IND_INDEX__MC_IND_WR_EN_MASK 0x00000100L
+#define MC_IND_INDEX__MC_IND_WR_EN 0x00000100L
+
+/* MC_IND_DATA */
+#define MC_IND_DATA__MC_IND_DATA_MASK 0xffffffffL
+
+/* MC_CHP_IO_CNTL_A1 */
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA__SHIFT 0x00000000
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA__SHIFT 0x00000001
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA__SHIFT 0x00000002
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA__SHIFT 0x00000003
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA__SHIFT 0x00000004
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA__SHIFT 0x00000005
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA__SHIFT 0x00000006
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA__SHIFT 0x00000007
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA__SHIFT 0x00000008
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA__SHIFT 0x00000009
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA__SHIFT 0x0000000a
+#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA__SHIFT 0x0000000c
+#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA__SHIFT 0x0000000e
+#define MC_CHP_IO_CNTL_A1__MEM_REC_AA__SHIFT 0x00000010
+#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA__SHIFT 0x00000012
+#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA__SHIFT 0x00000014
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA__SHIFT 0x00000016
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA__SHIFT 0x00000017
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA__SHIFT 0x00000018
+#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA__SHIFT 0x0000001a
+#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA__SHIFT 0x0000001c
+#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A__SHIFT 0x0000001e
+#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A__SHIFT 0x0000001f
+
+/* MC_CHP_IO_CNTL_B1 */
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB__SHIFT 0x00000000
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB__SHIFT 0x00000001
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB__SHIFT 0x00000002
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB__SHIFT 0x00000003
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB__SHIFT 0x00000004
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB__SHIFT 0x00000005
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB__SHIFT 0x00000006
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB__SHIFT 0x00000007
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB__SHIFT 0x00000008
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB__SHIFT 0x00000009
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB__SHIFT 0x0000000a
+#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB__SHIFT 0x0000000c
+#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB__SHIFT 0x0000000e
+#define MC_CHP_IO_CNTL_B1__MEM_REC_AB__SHIFT 0x00000010
+#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB__SHIFT 0x00000012
+#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB__SHIFT 0x00000014
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB__SHIFT 0x00000016
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB__SHIFT 0x00000017
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB__SHIFT 0x00000018
+#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB__SHIFT 0x0000001a
+#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB__SHIFT 0x0000001c
+#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B__SHIFT 0x0000001e
+#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B__SHIFT 0x0000001f
+
+/* MC_CHP_IO_CNTL_A1 */
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA_MASK 0x00000001L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_CKA 0x00000001L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA_MASK 0x00000002L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_AA 0x00000002L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA_MASK 0x00000004L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQMA 0x00000004L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA_MASK 0x00000008L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWN_DQSA 0x00000008L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA_MASK 0x00000010L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_CKA 0x00000010L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA_MASK 0x00000020L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_AA 0x00000020L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA_MASK 0x00000040L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQMA 0x00000040L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA_MASK 0x00000080L
+#define MC_CHP_IO_CNTL_A1__MEM_SLEWP_DQSA 0x00000080L
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA_MASK 0x00000100L
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_AA 0x00000100L
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA_MASK 0x00000200L
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQMA 0x00000200L
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA_MASK 0x00000400L
+#define MC_CHP_IO_CNTL_A1__MEM_PREAMP_DQSA 0x00000400L
+#define MC_CHP_IO_CNTL_A1__MEM_IO_MODEA_MASK 0x00003000L
+#define MC_CHP_IO_CNTL_A1__MEM_REC_CKA_MASK 0x0000c000L
+#define MC_CHP_IO_CNTL_A1__MEM_REC_AA_MASK 0x00030000L
+#define MC_CHP_IO_CNTL_A1__MEM_REC_DQMA_MASK 0x000c0000L
+#define MC_CHP_IO_CNTL_A1__MEM_REC_DQSA_MASK 0x00300000L
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA_MASK 0x00400000L
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_PHASEA 0x00400000L
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA_MASK 0x00800000L
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_CENTERA 0x00800000L
+#define MC_CHP_IO_CNTL_A1__MEM_SYNC_ENA_MASK 0x03000000L
+#define MC_CHP_IO_CNTL_A1__MEM_CLK_SELA_MASK 0x0c000000L
+#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA_MASK 0x10000000L
+#define MC_CHP_IO_CNTL_A1__MEM_CLK_INVA 0x10000000L
+#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A_MASK 0x40000000L
+#define MC_CHP_IO_CNTL_A1__MEM_DATA_ENIMP_A 0x40000000L
+#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A_MASK 0x80000000L
+#define MC_CHP_IO_CNTL_A1__MEM_CNTL_ENIMP_A 0x80000000L
+
+/* MC_CHP_IO_CNTL_B1 */
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB_MASK 0x00000001L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_CKB 0x00000001L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB_MASK 0x00000002L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_AB 0x00000002L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB_MASK 0x00000004L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQMB 0x00000004L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB_MASK 0x00000008L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWN_DQSB 0x00000008L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB_MASK 0x00000010L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_CKB 0x00000010L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB_MASK 0x00000020L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_AB 0x00000020L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB_MASK 0x00000040L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQMB 0x00000040L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB_MASK 0x00000080L
+#define MC_CHP_IO_CNTL_B1__MEM_SLEWP_DQSB 0x00000080L
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB_MASK 0x00000100L
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_AB 0x00000100L
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB_MASK 0x00000200L
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQMB 0x00000200L
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB_MASK 0x00000400L
+#define MC_CHP_IO_CNTL_B1__MEM_PREAMP_DQSB 0x00000400L
+#define MC_CHP_IO_CNTL_B1__MEM_IO_MODEB_MASK 0x00003000L
+#define MC_CHP_IO_CNTL_B1__MEM_REC_CKB_MASK 0x0000c000L
+#define MC_CHP_IO_CNTL_B1__MEM_REC_AB_MASK 0x00030000L
+#define MC_CHP_IO_CNTL_B1__MEM_REC_DQMB_MASK 0x000c0000L
+#define MC_CHP_IO_CNTL_B1__MEM_REC_DQSB_MASK 0x00300000L
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB_MASK 0x00400000L
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_PHASEB 0x00400000L
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB_MASK 0x00800000L
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_CENTERB 0x00800000L
+#define MC_CHP_IO_CNTL_B1__MEM_SYNC_ENB_MASK 0x03000000L
+#define MC_CHP_IO_CNTL_B1__MEM_CLK_SELB_MASK 0x0c000000L
+#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB_MASK 0x10000000L
+#define MC_CHP_IO_CNTL_B1__MEM_CLK_INVB 0x10000000L
+#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B_MASK 0x40000000L
+#define MC_CHP_IO_CNTL_B1__MEM_DATA_ENIMP_B 0x40000000L
+#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B_MASK 0x80000000L
+#define MC_CHP_IO_CNTL_B1__MEM_CNTL_ENIMP_B 0x80000000L
+
+/* MEM_SDRAM_MODE_REG */
+#define MEM_SDRAM_MODE_REG__MEM_MODE_REG_MASK 0x00007fffL
+#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY_MASK 0x000f0000L
+#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY_MASK 0x00700000L
+#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY_MASK 0x00800000L
+#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY 0x00800000L
+#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY_MASK 0x01000000L
+#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY 0x01000000L
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD_MASK 0x02000000L
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD 0x02000000L
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA_MASK 0x04000000L
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA 0x04000000L
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR_MASK 0x08000000L
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR 0x08000000L
+#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE_MASK 0x10000000L
+#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE 0x10000000L
+#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL_MASK 0x20000000L
+#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL 0x20000000L
+#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE_MASK 0x40000000L
+#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE 0x40000000L
+#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET_MASK 0x80000000L
+#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET 0x80000000L
+
+/* MEM_SDRAM_MODE_REG */
+#define MEM_SDRAM_MODE_REG__MEM_MODE_REG__SHIFT 0x00000000
+#define MEM_SDRAM_MODE_REG__MEM_WR_LATENCY__SHIFT 0x00000010
+#define MEM_SDRAM_MODE_REG__MEM_CAS_LATENCY__SHIFT 0x00000014
+#define MEM_SDRAM_MODE_REG__MEM_CMD_LATENCY__SHIFT 0x00000017
+#define MEM_SDRAM_MODE_REG__MEM_STR_LATENCY__SHIFT 0x00000018
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_CMD__SHIFT 0x00000019
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_DATA__SHIFT 0x0000001a
+#define MEM_SDRAM_MODE_REG__MEM_FALL_OUT_STR__SHIFT 0x0000001b
+#define MEM_SDRAM_MODE_REG__MC_INIT_COMPLETE__SHIFT 0x0000001c
+#define MEM_SDRAM_MODE_REG__MEM_DDR_DLL__SHIFT 0x0000001d
+#define MEM_SDRAM_MODE_REG__MEM_CFG_TYPE__SHIFT 0x0000001e
+#define MEM_SDRAM_MODE_REG__MEM_SDRAM_RESET__SHIFT 0x0000001f
+
+/* MEM_REFRESH_CNTL */
+#define MEM_REFRESH_CNTL__MEM_REFRESH_RATE_MASK 0x000000ffL
+#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS_MASK 0x00000100L
+#define MEM_REFRESH_CNTL__MEM_REFRESH_DIS 0x00000100L
+#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE_MASK 0x00000200L
+#define MEM_REFRESH_CNTL__MEM_DYNAMIC_CKE 0x00000200L
+#define MEM_REFRESH_CNTL__MEM_TRFC_MASK 0x0000f000L
+#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE_MASK 0x00010000L
+#define MEM_REFRESH_CNTL__MEM_CLKA0_ENABLE 0x00010000L
+#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE_MASK 0x00020000L
+#define MEM_REFRESH_CNTL__MEM_CLKA0b_ENABLE 0x00020000L
+#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE_MASK 0x00040000L
+#define MEM_REFRESH_CNTL__MEM_CLKA1_ENABLE 0x00040000L
+#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE_MASK 0x00080000L
+#define MEM_REFRESH_CNTL__MEM_CLKA1b_ENABLE 0x00080000L
+#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE_MASK 0x00100000L
+#define MEM_REFRESH_CNTL__MEM_CLKAFB_ENABLE 0x00100000L
+#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKA_MASK 0x00c00000L
+#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE_MASK 0x01000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB0_ENABLE 0x01000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE_MASK 0x02000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB0b_ENABLE 0x02000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE_MASK 0x04000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB1_ENABLE 0x04000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE_MASK 0x08000000L
+#define MEM_REFRESH_CNTL__MEM_CLKB1b_ENABLE 0x08000000L
+#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE_MASK 0x10000000L
+#define MEM_REFRESH_CNTL__MEM_CLKBFB_ENABLE 0x10000000L
+#define MEM_REFRESH_CNTL__DLL_FB_SLCT_CKB_MASK 0xc0000000L
+
+/* MC_STATUS */
+#define MC_STATUS__MEM_PWRUP_COMPL_A_MASK 0x00000001L
+#define MC_STATUS__MEM_PWRUP_COMPL_A 0x00000001L
+#define MC_STATUS__MEM_PWRUP_COMPL_B_MASK 0x00000002L
+#define MC_STATUS__MEM_PWRUP_COMPL_B 0x00000002L
+#define MC_STATUS__MC_IDLE_MASK 0x00000004L
+#define MC_STATUS__MC_IDLE 0x00000004L
+#define MC_STATUS__IMP_N_VALUE_R_BACK_MASK 0x00000078L
+#define MC_STATUS__IMP_P_VALUE_R_BACK_MASK 0x00000780L
+#define MC_STATUS__TEST_OUT_R_BACK_MASK 0x00000800L
+#define MC_STATUS__TEST_OUT_R_BACK 0x00000800L
+#define MC_STATUS__DUMMY_OUT_R_BACK_MASK 0x00001000L
+#define MC_STATUS__DUMMY_OUT_R_BACK 0x00001000L
+#define MC_STATUS__IMP_N_VALUE_A_R_BACK_MASK 0x0001e000L
+#define MC_STATUS__IMP_P_VALUE_A_R_BACK_MASK 0x001e0000L
+#define MC_STATUS__IMP_N_VALUE_CK_R_BACK_MASK 0x01e00000L
+#define MC_STATUS__IMP_P_VALUE_CK_R_BACK_MASK 0x1e000000L
+
+/* MDLL_CKO */
+#define MDLL_CKO__MCKOA_SLEEP_MASK 0x00000001L
+#define MDLL_CKO__MCKOA_SLEEP 0x00000001L
+#define MDLL_CKO__MCKOA_RESET_MASK 0x00000002L
+#define MDLL_CKO__MCKOA_RESET 0x00000002L
+#define MDLL_CKO__MCKOA_RANGE_MASK 0x0000000cL
+#define MDLL_CKO__ERSTA_SOUTSEL_MASK 0x00000030L
+#define MDLL_CKO__MCKOA_FB_SEL_MASK 0x000000c0L
+#define MDLL_CKO__MCKOA_REF_SKEW_MASK 0x00000700L
+#define MDLL_CKO__MCKOA_FB_SKEW_MASK 0x00007000L
+#define MDLL_CKO__MCKOA_BP_SEL_MASK 0x00008000L
+#define MDLL_CKO__MCKOA_BP_SEL 0x00008000L
+#define MDLL_CKO__MCKOB_SLEEP_MASK 0x00010000L
+#define MDLL_CKO__MCKOB_SLEEP 0x00010000L
+#define MDLL_CKO__MCKOB_RESET_MASK 0x00020000L
+#define MDLL_CKO__MCKOB_RESET 0x00020000L
+#define MDLL_CKO__MCKOB_RANGE_MASK 0x000c0000L
+#define MDLL_CKO__ERSTB_SOUTSEL_MASK 0x00300000L
+#define MDLL_CKO__MCKOB_FB_SEL_MASK 0x00c00000L
+#define MDLL_CKO__MCKOB_REF_SKEW_MASK 0x07000000L
+#define MDLL_CKO__MCKOB_FB_SKEW_MASK 0x70000000L
+#define MDLL_CKO__MCKOB_BP_SEL_MASK 0x80000000L
+#define MDLL_CKO__MCKOB_BP_SEL 0x80000000L
+
+/* MDLL_RDCKA */
+#define MDLL_RDCKA__MRDCKA0_SLEEP_MASK 0x00000001L
+#define MDLL_RDCKA__MRDCKA0_SLEEP 0x00000001L
+#define MDLL_RDCKA__MRDCKA0_RESET_MASK 0x00000002L
+#define MDLL_RDCKA__MRDCKA0_RESET 0x00000002L
+#define MDLL_RDCKA__MRDCKA0_RANGE_MASK 0x0000000cL
+#define MDLL_RDCKA__MRDCKA0_REF_SEL_MASK 0x00000030L
+#define MDLL_RDCKA__MRDCKA0_FB_SEL_MASK 0x000000c0L
+#define MDLL_RDCKA__MRDCKA0_REF_SKEW_MASK 0x00000700L
+#define MDLL_RDCKA__MRDCKA0_SINSEL_MASK 0x00000800L
+#define MDLL_RDCKA__MRDCKA0_SINSEL 0x00000800L
+#define MDLL_RDCKA__MRDCKA0_FB_SKEW_MASK 0x00007000L
+#define MDLL_RDCKA__MRDCKA0_BP_SEL_MASK 0x00008000L
+#define MDLL_RDCKA__MRDCKA0_BP_SEL 0x00008000L
+#define MDLL_RDCKA__MRDCKA1_SLEEP_MASK 0x00010000L
+#define MDLL_RDCKA__MRDCKA1_SLEEP 0x00010000L
+#define MDLL_RDCKA__MRDCKA1_RESET_MASK 0x00020000L
+#define MDLL_RDCKA__MRDCKA1_RESET 0x00020000L
+#define MDLL_RDCKA__MRDCKA1_RANGE_MASK 0x000c0000L
+#define MDLL_RDCKA__MRDCKA1_REF_SEL_MASK 0x00300000L
+#define MDLL_RDCKA__MRDCKA1_FB_SEL_MASK 0x00c00000L
+#define MDLL_RDCKA__MRDCKA1_REF_SKEW_MASK 0x07000000L
+#define MDLL_RDCKA__MRDCKA1_SINSEL_MASK 0x08000000L
+#define MDLL_RDCKA__MRDCKA1_SINSEL 0x08000000L
+#define MDLL_RDCKA__MRDCKA1_FB_SKEW_MASK 0x70000000L
+#define MDLL_RDCKA__MRDCKA1_BP_SEL_MASK 0x80000000L
+#define MDLL_RDCKA__MRDCKA1_BP_SEL 0x80000000L
+
+/* MDLL_RDCKB */
+#define MDLL_RDCKB__MRDCKB0_SLEEP_MASK 0x00000001L
+#define MDLL_RDCKB__MRDCKB0_SLEEP 0x00000001L
+#define MDLL_RDCKB__MRDCKB0_RESET_MASK 0x00000002L
+#define MDLL_RDCKB__MRDCKB0_RESET 0x00000002L
+#define MDLL_RDCKB__MRDCKB0_RANGE_MASK 0x0000000cL
+#define MDLL_RDCKB__MRDCKB0_REF_SEL_MASK 0x00000030L
+#define MDLL_RDCKB__MRDCKB0_FB_SEL_MASK 0x000000c0L
+#define MDLL_RDCKB__MRDCKB0_REF_SKEW_MASK 0x00000700L
+#define MDLL_RDCKB__MRDCKB0_SINSEL_MASK 0x00000800L
+#define MDLL_RDCKB__MRDCKB0_SINSEL 0x00000800L
+#define MDLL_RDCKB__MRDCKB0_FB_SKEW_MASK 0x00007000L
+#define MDLL_RDCKB__MRDCKB0_BP_SEL_MASK 0x00008000L
+#define MDLL_RDCKB__MRDCKB0_BP_SEL 0x00008000L
+#define MDLL_RDCKB__MRDCKB1_SLEEP_MASK 0x00010000L
+#define MDLL_RDCKB__MRDCKB1_SLEEP 0x00010000L
+#define MDLL_RDCKB__MRDCKB1_RESET_MASK 0x00020000L
+#define MDLL_RDCKB__MRDCKB1_RESET 0x00020000L
+#define MDLL_RDCKB__MRDCKB1_RANGE_MASK 0x000c0000L
+#define MDLL_RDCKB__MRDCKB1_REF_SEL_MASK 0x00300000L
+#define MDLL_RDCKB__MRDCKB1_FB_SEL_MASK 0x00c00000L
+#define MDLL_RDCKB__MRDCKB1_REF_SKEW_MASK 0x07000000L
+#define MDLL_RDCKB__MRDCKB1_SINSEL_MASK 0x08000000L
+#define MDLL_RDCKB__MRDCKB1_SINSEL 0x08000000L
+#define MDLL_RDCKB__MRDCKB1_FB_SKEW_MASK 0x70000000L
+#define MDLL_RDCKB__MRDCKB1_BP_SEL_MASK 0x80000000L
+#define MDLL_RDCKB__MRDCKB1_BP_SEL 0x80000000L
+
+#define MDLL_R300_RDCK__MRDCKA_SLEEP 0x00000001L
+#define MDLL_R300_RDCK__MRDCKA_RESET 0x00000002L
+#define MDLL_R300_RDCK__MRDCKB_SLEEP 0x00000004L
+#define MDLL_R300_RDCK__MRDCKB_RESET 0x00000008L
+#define MDLL_R300_RDCK__MRDCKC_SLEEP 0x00000010L
+#define MDLL_R300_RDCK__MRDCKC_RESET 0x00000020L
+#define MDLL_R300_RDCK__MRDCKD_SLEEP 0x00000040L
+#define MDLL_R300_RDCK__MRDCKD_RESET 0x00000080L
+
+#define pllCLK_PIN_CNTL 0x0001
+#define pllPPLL_CNTL 0x0002
+#define pllPPLL_REF_DIV 0x0003
+#define pllPPLL_DIV_0 0x0004
+#define pllPPLL_DIV_1 0x0005
+#define pllPPLL_DIV_2 0x0006
+#define pllPPLL_DIV_3 0x0007
+#define pllVCLK_ECP_CNTL 0x0008
+#define pllHTOTAL_CNTL 0x0009
+#define pllM_SPLL_REF_FB_DIV 0x000A
+#define pllAGP_PLL_CNTL 0x000B
+#define pllSPLL_CNTL 0x000C
+#define pllSCLK_CNTL 0x000D
+#define pllMPLL_CNTL 0x000E
+#define pllMDLL_CKO 0x000F
+#define pllMDLL_RDCKA 0x0010
+#define pllMDLL_RDCKB 0x0011
+#define pllMCLK_CNTL 0x0012
+#define pllPLL_TEST_CNTL 0x0013
+#define pllCLK_PWRMGT_CNTL 0x0014
+#define pllPLL_PWRMGT_CNTL 0x0015
+#define pllCG_TEST_MACRO_RW_WRITE 0x0016
+#define pllCG_TEST_MACRO_RW_READ 0x0017
+#define pllCG_TEST_MACRO_RW_DATA 0x0018
+#define pllCG_TEST_MACRO_RW_CNTL 0x0019
+#define pllDISP_TEST_MACRO_RW_WRITE 0x001A
+#define pllDISP_TEST_MACRO_RW_READ 0x001B
+#define pllDISP_TEST_MACRO_RW_DATA 0x001C
+#define pllDISP_TEST_MACRO_RW_CNTL 0x001D
+#define pllSCLK_CNTL2 0x001E
+#define pllMCLK_MISC 0x001F
+#define pllTV_PLL_FINE_CNTL 0x0020
+#define pllTV_PLL_CNTL 0x0021
+#define pllTV_PLL_CNTL1 0x0022
+#define pllTV_DTO_INCREMENTS 0x0023
+#define pllSPLL_AUX_CNTL 0x0024
+#define pllMPLL_AUX_CNTL 0x0025
+#define pllP2PLL_CNTL 0x002A
+#define pllP2PLL_REF_DIV 0x002B
+#define pllP2PLL_DIV_0 0x002C
+#define pllPIXCLKS_CNTL 0x002D
+#define pllHTOTAL2_CNTL 0x002E
+#define pllSSPLL_CNTL 0x0030
+#define pllSSPLL_REF_DIV 0x0031
+#define pllSSPLL_DIV_0 0x0032
+#define pllSS_INT_CNTL 0x0033
+#define pllSS_TST_CNTL 0x0034
+#define pllSCLK_MORE_CNTL 0x0035
+
+#define ixMC_PERF_CNTL 0x0000
+#define ixMC_PERF_SEL 0x0001
+#define ixMC_PERF_REGION_0 0x0002
+#define ixMC_PERF_REGION_1 0x0003
+#define ixMC_PERF_COUNT_0 0x0004
+#define ixMC_PERF_COUNT_1 0x0005
+#define ixMC_PERF_COUNT_2 0x0006
+#define ixMC_PERF_COUNT_3 0x0007
+#define ixMC_PERF_COUNT_MEMCH_A 0x0008
+#define ixMC_PERF_COUNT_MEMCH_B 0x0009
+#define ixMC_IMP_CNTL 0x000A
+#define ixMC_CHP_IO_CNTL_A0 0x000B
+#define ixMC_CHP_IO_CNTL_A1 0x000C
+#define ixMC_CHP_IO_CNTL_B0 0x000D
+#define ixMC_CHP_IO_CNTL_B1 0x000E
+#define ixMC_IMP_CNTL_0 0x000F
+#define ixTC_MISMATCH_1 0x0010
+#define ixTC_MISMATCH_2 0x0011
+#define ixMC_BIST_CTRL 0x0012
+#define ixREG_COLLAR_WRITE 0x0013
+#define ixREG_COLLAR_READ 0x0014
+#define ixR300_MC_IMP_CNTL 0x0018
+#define ixR300_MC_CHP_IO_CNTL_A0 0x0019
+#define ixR300_MC_CHP_IO_CNTL_A1 0x001a
+#define ixR300_MC_CHP_IO_CNTL_B0 0x001b
+#define ixR300_MC_CHP_IO_CNTL_B1 0x001c
+#define ixR300_MC_CHP_IO_CNTL_C0 0x001d
+#define ixR300_MC_CHP_IO_CNTL_C1 0x001e
+#define ixR300_MC_CHP_IO_CNTL_D0 0x001f
+#define ixR300_MC_CHP_IO_CNTL_D1 0x0020
+#define ixR300_MC_IMP_CNTL_0 0x0021
+#define ixR300_MC_ELPIDA_CNTL 0x0022
+#define ixR300_MC_CHP_IO_OE_CNTL_CD 0x0023
+#define ixR300_MC_READ_CNTL_CD 0x0024
+#define ixR300_MC_MC_INIT_WR_LAT_TIMER 0x0025
+#define ixR300_MC_DEBUG_CNTL 0x0026
+#define ixR300_MC_BIST_CNTL_0 0x0028
+#define ixR300_MC_BIST_CNTL_1 0x0029
+#define ixR300_MC_BIST_CNTL_2 0x002a
+#define ixR300_MC_BIST_CNTL_3 0x002b
+#define ixR300_MC_BIST_CNTL_4 0x002c
+#define ixR300_MC_BIST_CNTL_5 0x002d
+#define ixR300_MC_IMP_STATUS 0x002e
+#define ixR300_MC_DLL_CNTL 0x002f
+#define NB_TOM 0x15C
+
+#endif /* _RADEON_H */
diff --git a/include/s3c2410.h b/include/s3c2410.h
index 86495f6..87135b4 100644
--- a/include/s3c2410.h
+++ b/include/s3c2410.h
@@ -69,75 +69,75 @@
#include <s3c24x0.h>
-static inline S3C24X0_MEMCTL * const S3C24X0_GetBase_MEMCTL(void)
+static inline S3C24X0_MEMCTL * S3C24X0_GetBase_MEMCTL(void)
{
return (S3C24X0_MEMCTL * const)S3C24X0_MEMCTL_BASE;
}
-static inline S3C24X0_USB_HOST * const S3C24X0_GetBase_USB_HOST(void)
+static inline S3C24X0_USB_HOST * S3C24X0_GetBase_USB_HOST(void)
{
return (S3C24X0_USB_HOST * const)S3C24X0_USB_HOST_BASE;
}
-static inline S3C24X0_INTERRUPT * const S3C24X0_GetBase_INTERRUPT(void)
+static inline S3C24X0_INTERRUPT * S3C24X0_GetBase_INTERRUPT(void)
{
return (S3C24X0_INTERRUPT * const)S3C24X0_INTERRUPT_BASE;
}
-static inline S3C24X0_DMAS * const S3C24X0_GetBase_DMAS(void)
+static inline S3C24X0_DMAS * S3C24X0_GetBase_DMAS(void)
{
return (S3C24X0_DMAS * const)S3C24X0_DMA_BASE;
}
-static inline S3C24X0_CLOCK_POWER * const S3C24X0_GetBase_CLOCK_POWER(void)
+static inline S3C24X0_CLOCK_POWER * S3C24X0_GetBase_CLOCK_POWER(void)
{
return (S3C24X0_CLOCK_POWER * const)S3C24X0_CLOCK_POWER_BASE;
}
-static inline S3C24X0_LCD * const S3C24X0_GetBase_LCD(void)
+static inline S3C24X0_LCD * S3C24X0_GetBase_LCD(void)
{
return (S3C24X0_LCD * const)S3C24X0_LCD_BASE;
}
-static inline S3C2410_NAND * const S3C2410_GetBase_NAND(void)
+static inline S3C2410_NAND * S3C2410_GetBase_NAND(void)
{
return (S3C2410_NAND * const)S3C2410_NAND_BASE;
}
-static inline S3C24X0_UART * const S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
+static inline S3C24X0_UART * S3C24X0_GetBase_UART(S3C24X0_UARTS_NR nr)
{
return (S3C24X0_UART * const)(S3C24X0_UART_BASE + (nr * 0x4000));
}
-static inline S3C24X0_TIMERS * const S3C24X0_GetBase_TIMERS(void)
+static inline S3C24X0_TIMERS * S3C24X0_GetBase_TIMERS(void)
{
return (S3C24X0_TIMERS * const)S3C24X0_TIMER_BASE;
}
-static inline S3C24X0_USB_DEVICE * const S3C24X0_GetBase_USB_DEVICE(void)
+static inline S3C24X0_USB_DEVICE * S3C24X0_GetBase_USB_DEVICE(void)
{
return (S3C24X0_USB_DEVICE * const)S3C24X0_USB_DEVICE_BASE;
}
-static inline S3C24X0_WATCHDOG * const S3C24X0_GetBase_WATCHDOG(void)
+static inline S3C24X0_WATCHDOG * S3C24X0_GetBase_WATCHDOG(void)
{
return (S3C24X0_WATCHDOG * const)S3C24X0_WATCHDOG_BASE;
}
-static inline S3C24X0_I2C * const S3C24X0_GetBase_I2C(void)
+static inline S3C24X0_I2C * S3C24X0_GetBase_I2C(void)
{
return (S3C24X0_I2C * const)S3C24X0_I2C_BASE;
}
-static inline S3C24X0_I2S * const S3C24X0_GetBase_I2S(void)
+static inline S3C24X0_I2S * S3C24X0_GetBase_I2S(void)
{
return (S3C24X0_I2S * const)S3C24X0_I2S_BASE;
}
-static inline S3C24X0_GPIO * const S3C24X0_GetBase_GPIO(void)
+static inline S3C24X0_GPIO * S3C24X0_GetBase_GPIO(void)
{
return (S3C24X0_GPIO * const)S3C24X0_GPIO_BASE;
}
-static inline S3C24X0_RTC * const S3C24X0_GetBase_RTC(void)
+static inline S3C24X0_RTC * S3C24X0_GetBase_RTC(void)
{
return (S3C24X0_RTC * const)S3C24X0_RTC_BASE;
}
-static inline S3C2410_ADC * const S3C2410_GetBase_ADC(void)
+static inline S3C2410_ADC * S3C2410_GetBase_ADC(void)
{
return (S3C2410_ADC * const)S3C2410_ADC_BASE;
}
-static inline S3C24X0_SPI * const S3C24X0_GetBase_SPI(void)
+static inline S3C24X0_SPI * S3C24X0_GetBase_SPI(void)
{
return (S3C24X0_SPI * const)S3C24X0_SPI_BASE;
}
-static inline S3C2410_SDI * const S3C2410_GetBase_SDI(void)
+static inline S3C2410_SDI * S3C2410_GetBase_SDI(void)
{
return (S3C2410_SDI * const)S3C2410_SDI_BASE;
}
diff --git a/include/sata.h b/include/sata.h
new file mode 100644
index 0000000..165b471
--- /dev/null
+++ b/include/sata.h
@@ -0,0 +1,108 @@
+
+#if (DEBUG_SATA)
+#define PRINTF(fmt,args...) printf (fmt ,##args)
+#else
+#define PRINTF(fmt,args...)
+#endif
+
+struct sata_ioports {
+ unsigned long cmd_addr;
+ unsigned long data_addr;
+ unsigned long error_addr;
+ unsigned long feature_addr;
+ unsigned long nsect_addr;
+ unsigned long lbal_addr;
+ unsigned long lbam_addr;
+ unsigned long lbah_addr;
+ unsigned long device_addr;
+ unsigned long status_addr;
+ unsigned long command_addr;
+ unsigned long altstatus_addr;
+ unsigned long ctl_addr;
+ unsigned long bmdma_addr;
+ unsigned long scr_addr;
+};
+
+struct sata_port {
+ unsigned char port_no; /* primary=0, secondary=1 */
+ struct sata_ioports ioaddr; /* ATA cmd/ctl/dma reg blks */
+ unsigned char ctl_reg;
+ unsigned char last_ctl;
+ unsigned char port_state; /* 1-port is available and */
+ /* 0-port is not available */
+ unsigned char dev_mask;
+};
+
+/***********SATA LIBRARY SPECIFIC DEFINITIONS AND DECLARATIONS**************/
+#ifdef SATA_DECL /*SATA library specific declarations */
+#define ata_id_has_lba48(id) ((id)[83] & (1 << 10))
+#define ata_id_has_lba(id) ((id)[49] & (1 << 9))
+#define ata_id_has_dma(id) ((id)[49] & (1 << 8))
+#define ata_id_u32(id,n) \
+ (((u32) (id)[(n) + 1] << 16) | ((u32) (id)[(n)]))
+#define ata_id_u64(id,n) \
+ (((u64) (id)[(n) + 3] << 48) | \
+ ((u64) (id)[(n) + 2] << 32) | \
+ ((u64) (id)[(n) + 1] << 16) | \
+ ((u64) (id)[(n) + 0]) )
+#endif
+
+#ifdef SATA_DECL /*SATA library specific declarations */
+static inline void
+ata_dump_id (u16 * id)
+{
+ PRINTF ("49==0x%04x "
+ "53==0x%04x "
+ "63==0x%04x "
+ "64==0x%04x "
+ "75==0x%04x \n", id[49], id[53], id[63], id[64], id[75]);
+ PRINTF ("80==0x%04x "
+ "81==0x%04x "
+ "82==0x%04x "
+ "83==0x%04x "
+ "84==0x%04x \n", id[80], id[81], id[82], id[83], id[84]);
+ PRINTF ("88==0x%04x " "93==0x%04x\n", id[88], id[93]);
+}
+#endif
+
+#ifdef SATA_DECL /*SATA library specific declarations */
+int sata_bus_softreset (int num);
+void sata_identify (int num, int dev);
+void sata_port (struct sata_ioports *ioport);
+void set_Feature_cmd (int num, int dev);
+int sata_devchk (struct sata_ioports *ioaddr, int dev);
+void dev_select (struct sata_ioports *ioaddr, int dev);
+u8 sata_busy_wait (struct sata_ioports *ioaddr, int bits, unsigned int max);
+u8 sata_chk_status (struct sata_ioports *ioaddr);
+ulong sata_read (int device, ulong blknr,lbaint_t blkcnt, void * buffer);
+ulong sata_write (int device,ulong blknr, lbaint_t blkcnt, void * buffer);
+void msleep (int count);
+#else
+extern int sata_bus_softreset (int num);
+extern void sata_identify (int num, int dev);
+extern void sata_port (struct sata_ioports *ioport);
+extern void set_Feature_cmd (int num, int dev);
+extern ulong sata_read (int device, ulong blknr,
+ lbaint_t blkcnt, void * buffer);
+extern ulong sata_write (int device, ulong blknr,
+ lbaint_t blkcnt, void * buffer);
+extern void msleep (int count);
+#endif
+
+/************DRIVER SPECIFIC DEFINITIONS AND DECLARATIONS**************/
+
+#ifdef DRV_DECL /*Driver specific declaration */
+int init_sata (void);
+#else
+extern int init_sata (void);
+#endif
+
+#ifdef DRV_DECL /*Defines Driver Specific variables */
+struct sata_port port[CFG_SATA_MAXBUS];
+block_dev_desc_t sata_dev_desc[CFG_SATA_MAXDEVICES];
+int curr_dev = -1;
+#else
+extern struct sata_port port[CFG_SATA_MAXBUS];
+extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAXDEVICES];
+extern int curr_dev;
+#endif
diff --git a/include/serial.h b/include/serial.h
index f7412fd..30bfde3 100644
--- a/include/serial.h
+++ b/include/serial.h
@@ -36,6 +36,10 @@
#endif
+extern struct serial_device serial_ffuart_device;
+extern struct serial_device serial_btuart_device;
+extern struct serial_device serial_stuart_device;
+
extern void serial_initialize(void);
extern void serial_devices_init(void);
extern int serial_assign(char * name);
diff --git a/include/sha1.h b/include/sha1.h
new file mode 100644
index 0000000..15ea13c
--- /dev/null
+++ b/include/sha1.h
@@ -0,0 +1,115 @@
+/**
+ * \file sha1.h
+ * based from http://xyssl.org/code/source/sha1/
+ * FIPS-180-1 compliant SHA-1 implementation
+ *
+ * Copyright (C) 2003-2006 Christophe Devine
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License, version 2.1 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+/*
+ * The SHA-1 standard was published by NIST in 1993.
+ *
+ * http://www.itl.nist.gov/fipspubs/fip180-1.htm
+ */
+#ifndef _SHA1_H
+#define _SHA1_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define SHA1_SUM_POS -0x20
+#define SHA1_SUM_LEN 20
+
+/**
+ * \brief SHA-1 context structure
+ */
+typedef struct
+{
+ unsigned long total[2]; /*!< number of bytes processed */
+ unsigned long state[5]; /*!< intermediate digest state */
+ unsigned char buffer[64]; /*!< data block being processed */
+}
+sha1_context;
+
+/**
+ * \brief SHA-1 context setup
+ *
+ * \param ctx SHA-1 context to be initialized
+ */
+void sha1_starts( sha1_context *ctx );
+
+/**
+ * \brief SHA-1 process buffer
+ *
+ * \param ctx SHA-1 context
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ */
+void sha1_update( sha1_context *ctx, unsigned char *input, int ilen );
+
+/**
+ * \brief SHA-1 final digest
+ *
+ * \param ctx SHA-1 context
+ * \param output SHA-1 checksum result
+ */
+void sha1_finish( sha1_context *ctx, unsigned char output[20] );
+
+/**
+ * \brief Output = SHA-1( input buffer )
+ *
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output SHA-1 checksum result
+ */
+void sha1_csum( unsigned char *input, int ilen,
+ unsigned char output[20] );
+
+/**
+ * \brief Output = SHA-1( file contents )
+ *
+ * \param path input file name
+ * \param output SHA-1 checksum result
+ * \return 0 if successful, or 1 if fopen failed
+ */
+int sha1_file( char *path, unsigned char output[20] );
+
+/**
+ * \brief Output = HMAC-SHA-1( input buffer, hmac key )
+ *
+ * \param key HMAC secret key
+ * \param keylen length of the HMAC key
+ * \param input buffer holding the data
+ * \param ilen length of the input data
+ * \param output HMAC-SHA-1 result
+ */
+void sha1_hmac( unsigned char *key, int keylen,
+ unsigned char *input, int ilen,
+ unsigned char output[20] );
+
+/**
+ * \brief Checkup routine
+ *
+ * \return 0 if successful, or 1 if the test failed
+ */
+int sha1_self_test( void );
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* sha1.h */
diff --git a/include/spartan3.h b/include/spartan3.h
index b14db03..65a3f5a 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -73,6 +73,13 @@
#define XILINX_XC3S4000_SIZE 11316864/8
#define XILINX_XC3S5000_SIZE 13271936/8
+/* Spartan-3E (v3.4) */
+#define XILINX_XC3S100E_SIZE 581344/8
+#define XILINX_XC3S250E_SIZE 1353728/8
+#define XILINX_XC3S500E_SIZE 2270208/8
+#define XILINX_XC3S1200E_SIZE 3841184/8
+#define XILINX_XC3S1600E_SIZE 5969696/8
+
/* Descriptor Macros
*********************************************************************/
/* Spartan-II devices */
@@ -100,4 +107,21 @@
#define XILINX_XC3S5000_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S5000E_SIZE, fn_table, cookie }
+
+/* Spartan-3E devices */
+#define XILINX_XC3S100E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S100E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S250E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S250E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S500E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S500E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+
+#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
#endif /* _SPARTAN3_H_ */
diff --git a/include/status_led.h b/include/status_led.h
index db4c60f..a646814 100644
--- a/include/status_led.h
+++ b/include/status_led.h
@@ -355,6 +355,25 @@
# define STATUS_LED_ACTIVE 0 /* LED on for bit == 0 */
# define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
+#elif defined(CONFIG_MOTIONPRO)
+
+#define STATUS_LED_BIT ((vu_long *) MPC5XXX_GPT6_ENABLE)
+#define STATUS_LED_PERIOD (CFG_HZ / 10)
+#define STATUS_LED_STATE STATUS_LED_BLINKING
+
+#define STATUS_LED_BIT1 ((vu_long *) MPC5XXX_GPT7_ENABLE)
+#define STATUS_LED_PERIOD1 (CFG_HZ / 10)
+#define STATUS_LED_STATE1 STATUS_LED_OFF
+
+#define STATUS_LED_BOOT 0 /* LED 0 used for boot status */
+
+#elif defined(CONFIG_BOARD_SPECIFIC_LED)
+/* led_id_t is unsigned long mask */
+typedef unsigned long led_id_t;
+
+extern void __led_toggle (led_id_t mask);
+extern void __led_init (led_id_t mask, int state);
+extern void __led_set (led_id_t mask, int state);
#else
# error Status LED configuration missing
#endif
diff --git a/include/usb.h b/include/usb.h
index bf71554..4e1539f 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -169,7 +169,10 @@
* this is how the lowlevel part communicate with the outer world
*/
-#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || defined (CONFIG_USB_SL811HS)
+#if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \
+ defined(CONFIG_USB_OHCI_NEW) || defined (CONFIG_USB_SL811HS) || \
+ defined(CONFIG_USB_ISP116X_HCD)
+
int usb_lowlevel_init(void);
int usb_lowlevel_stop(void);
int submit_bulk_msg(struct usb_device *dev, unsigned long pipe, void *buffer,int transfer_len);
@@ -177,6 +180,7 @@
int transfer_len,struct devrequest *setup);
int submit_int_msg(struct usb_device *dev, unsigned long pipe, void *buffer,
int transfer_len, int interval);
+void usb_event_poll(void);
/* Defines */
#define USB_UHCI_VEND_ID 0x8086
@@ -230,16 +234,12 @@
/* big endian -> little endian conversion */
/* some CPUs are already little endian e.g. the ARM920T */
-#ifdef LITTLEENDIAN
-#define swap_16(x) ((unsigned short)(x))
-#define swap_32(x) ((unsigned long)(x))
-#else
-#define swap_16(x) \
+#define __swap_16(x) \
({ unsigned short x_ = (unsigned short)x; \
(unsigned short)( \
((x_ & 0x00FFU) << 8) | ((x_ & 0xFF00U) >> 8) ); \
})
-#define swap_32(x) \
+#define __swap_32(x) \
({ unsigned long x_ = (unsigned long)x; \
(unsigned long)( \
((x_ & 0x000000FFUL) << 24) | \
@@ -247,6 +247,13 @@
((x_ & 0x00FF0000UL) >> 8) | \
((x_ & 0xFF000000UL) >> 24) ); \
})
+
+#ifdef LITTLEENDIAN
+# define swap_16(x) (x)
+# define swap_32(x) (x)
+#else
+# define swap_16(x) __swap_16(x)
+# define swap_32(x) __swap_32(x)
#endif /* LITTLEENDIAN */
/*
diff --git a/include/usb_cdc_acm.h b/include/usb_cdc_acm.h
new file mode 100644
index 0000000..87bf50c
--- /dev/null
+++ b/include/usb_cdc_acm.h
@@ -0,0 +1,43 @@
+/*
+ * (C) Copyright 2006
+ * Bryan O'Donoghue, deckard@codehermit.ie, CodeHermit
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ */
+
+/* ACM Control Requests */
+#define ACM_SEND_ENCAPSULATED_COMMAND 0x00
+#define ACM_GET_ENCAPSULATED_RESPONSE 0x01
+#define ACM_SET_COMM_FEATURE 0x02
+#define ACM_GET_COMM_FEATRUE 0x03
+#define ACM_CLEAR_COMM_FEATURE 0x04
+#define ACM_SET_LINE_ENCODING 0x20
+#define ACM_GET_LINE_ENCODING 0x21
+#define ACM_SET_CONTROL_LINE_STATE 0x22
+#define ACM_SEND_BREAK 0x23
+
+/* ACM Notification Codes */
+#define ACM_NETWORK_CONNECTION 0x00
+#define ACM_RESPONSE_AVAILABLE 0x01
+#define ACM_SERIAL_STATE 0x20
+
+/* Format of response expected by a ACM_GET_LINE_ENCODING request */
+struct rs232_emu{
+ unsigned long dter;
+ unsigned char stop_bits;
+ unsigned char parity;
+ unsigned char data_bits;
+}__attribute__((packed));
diff --git a/include/usbdcore.h b/include/usbdcore.h
index 6e92df1..cb2be72 100644
--- a/include/usbdcore.h
+++ b/include/usbdcore.h
@@ -576,6 +576,9 @@
void (*event) (struct usb_device_instance *device, usb_device_event_t event, int data);
+ /* Do cdc device specific control requests */
+ int (*cdc_recv_setup)(struct usb_device_request *request, struct urb *urb);
+
/* bus interface */
struct usb_bus_instance *bus; /* which bus interface driver */
diff --git a/include/usbdcore_mpc8xx.h b/include/usbdcore_mpc8xx.h
new file mode 100644
index 0000000..9df62f4
--- /dev/null
+++ b/include/usbdcore_mpc8xx.h
@@ -0,0 +1,210 @@
+/*
+ * Copyright (C) 2006 Bryan O'Donoghue, CodeHermit
+ * bodonoghue@codehermit.ie
+ *
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the
+ * Free Software Foundation, Inc.,
+ * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+
+#include <commproc.h>
+
+/* Mode Register */
+#define USMOD_EN 0x01
+#define USMOD_HOST 0x02
+#define USMOD_TEST 0x04
+#define USMOD_SFTE 0x08
+#define USMOD_RESUME 0x40
+#define USMOD_LSS 0x80
+
+/* Endpoint Registers */
+#define USEP_RHS_NORM 0x00
+#define USEP_RHS_IGNORE 0x01
+#define USEP_RHS_NAK 0x02
+#define USEP_RHS_STALL 0x03
+
+#define USEP_THS_NORM 0x00
+#define USEP_THS_IGNORE 0x04
+#define USEP_THS_NAK 0x08
+#define USEP_THS_STALL 0x0C
+
+#define USEP_RTE 0x10
+#define USEP_MF 0x20
+
+#define USEP_TM_CONTROL 0x00
+#define USEP_TM_INT 0x100
+#define USEP_TM_BULK 0x200
+#define USEP_TM_ISO 0x300
+
+/* Command Register */
+#define USCOM_EP0 0x00
+#define USCOM_EP1 0x01
+#define USCOM_EP2 0x02
+#define USCOM_EP3 0x03
+
+#define USCOM_FLUSH 0x40
+#define USCOM_STR 0x80
+
+/* Event Register */
+#define USB_E_RXB 0x0001
+#define USB_E_TXB 0x0002
+#define USB_E_BSY 0x0004
+#define USB_E_SOF 0x0008
+#define USB_E_TXE1 0x0010
+#define USB_E_TXE2 0x0020
+#define USB_E_TXE3 0x0040
+#define USB_E_TXE4 0x0080
+#define USB_TX_ERRMASK (USB_E_TXE1|USB_E_TXE2|USB_E_TXE3|USB_E_TXE4)
+#define USB_E_IDLE 0x0100
+#define USB_E_RESET 0x0200
+
+/* Mask Register */
+#define USBS_IDLE 0x01
+
+/* RX Buffer Descriptor */
+#define RX_BD_OV 0x02
+#define RX_BD_CR 0x04
+#define RX_BD_AB 0x08
+#define RX_BD_NO 0x10
+#define RX_BD_PID_DATA0 0x00
+#define RX_BD_PID_DATA1 0x40
+#define RX_BD_PID_SETUP 0x80
+#define RX_BD_F 0x400
+#define RX_BD_L 0x800
+#define RX_BD_I 0x1000
+#define RX_BD_W 0x2000
+#define RX_BD_E 0x8000
+
+/* Useful masks */
+#define RX_BD_PID_BITMASK (RX_BD_PID_DATA1 | RX_BD_PID_SETUP)
+#define STALL_BITMASK (USEP_THS_STALL | USEP_RHS_STALL)
+#define NAK_BITMASK (USEP_THS_NAK | USEP_RHS_NAK)
+#define CBD_TX_BITMASK (TX_BD_R | TX_BD_L | TX_BD_TC | TX_BD_I | TX_BD_CNF)
+
+/* TX Buffer Descriptor */
+#define TX_BD_UN 0x02
+#define TX_BD_TO 0x04
+#define TX_BD_NO_PID 0x00
+#define TX_BD_PID_DATA0 0x80
+#define TX_BD_PID_DATA1 0xC0
+#define TX_BD_CNF 0x200
+#define TX_BD_TC 0x400
+#define TX_BD_L 0x800
+#define TX_BD_I 0x1000
+#define TX_BD_W 0x2000
+#define TX_BD_R 0x8000
+
+/* Implementation specific defines */
+
+#define EP_MIN_PACKET_SIZE 0x08
+#define MAX_ENDPOINTS 0x04
+#define FIFO_SIZE 0x10
+#define EP_MAX_PKT FIFO_SIZE
+#define TX_RING_SIZE 0x04
+#define RX_RING_SIZE 0x06
+#define USB_MAX_PKT 0x40
+#define TOGGLE_TX_PID(x) x= ((~x)&0x40)|0x80
+#define TOGGLE_RX_PID(x) x^= 0x40
+#define EP_ATTACHED 0x01 /* Endpoint has a urb attached or not */
+#define EP_SEND_ZLP 0x02 /* Send ZLP y/n ? */
+
+#define PROFF_USB 0x00000000
+#define CPM_USB_BASE 0x00000A00
+
+/* UDC device defines */
+#define EP0_MAX_PACKET_SIZE EP_MAX_PKT
+#define UDC_OUT_ENDPOINT 0x02
+#define UDC_OUT_PACKET_SIZE EP_MIN_PACKET_SIZE
+#define UDC_IN_ENDPOINT 0x03
+#define UDC_IN_PACKET_SIZE EP_MIN_PACKET_SIZE
+#define UDC_INT_ENDPOINT 0x01
+#define UDC_INT_PACKET_SIZE UDC_IN_PACKET_SIZE
+#define UDC_BULK_PACKET_SIZE EP_MIN_PACKET_SIZE
+
+struct mpc8xx_ep {
+ struct urb * urb;
+ unsigned char pid;
+ unsigned char sc;
+ volatile cbd_t * prx;
+};
+
+typedef struct mpc8xx_usb{
+ char usmod; /* Mode Register */
+ char usaddr; /* Slave Address Register */
+ char uscom; /* Command Register */
+ char res1; /* Reserved */
+ ushort usep[4];
+ ulong res2; /* Reserved */
+ ushort usber; /* Event Register */
+ ushort res3; /* Reserved */
+ ushort usbmr; /* Mask Register */
+ char res4; /* Reserved */
+ char usbs; /* Status Register */
+ char res5[8]; /* Reserved */
+}usb_t;
+
+typedef struct mpc8xx_parameter_ram{
+ ushort ep0ptr; /* Endpoint Pointer Register 0 */
+ ushort ep1ptr; /* Endpoint Pointer Register 1 */
+ ushort ep2ptr; /* Endpoint Pointer Register 2 */
+ ushort ep3ptr; /* Endpoint Pointer Register 3 */
+ uint rstate; /* Receive state */
+ uint rptr; /* Receive internal data pointer */
+ ushort frame_n; /* Frame number */
+ ushort rbcnt; /* Receive byte count */
+ uint rtemp; /* Receive temp cp use only */
+ uint rxusb; /* Rx Data Temp */
+ ushort rxuptr; /* Rx microcode return address temp */
+}usb_pram_t;
+
+typedef struct endpoint_parameter_block_pointer{
+ ushort rbase; /* RxBD base address */
+ ushort tbase; /* TxBD base address */
+ char rfcr; /* Rx Function code */
+ char tfcr; /* Tx Function code */
+ ushort mrblr; /* Maximum Receive Buffer Length */
+ ushort rbptr; /* RxBD pointer Next Buffer Descriptor */
+ ushort tbptr; /* TxBD pointer Next Buffer Descriptor */
+ ulong tstate; /* Transmit internal state */
+ ulong tptr; /* Transmit internal data pointer */
+ ushort tcrc; /* Transmit temp CRC */
+ ushort tbcnt; /* Transmit internal bye count */
+ ulong ttemp; /* Tx temp */
+ ushort txuptr; /* Tx microcode return address */
+ ushort res1; /* Reserved */
+}usb_epb_t;
+
+typedef enum mpc8xx_udc_state{
+ STATE_NOT_READY,
+ STATE_ERROR,
+ STATE_READY,
+}mpc8xx_udc_state_t;
+
+/* Declarations */
+int udc_init(void);
+void udc_irq(void);
+int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
+void udc_setup_ep(struct usb_device_instance *device, unsigned int ep,
+ struct usb_endpoint_instance *endpoint);
+void udc_connect(void);
+void udc_disconnect(void);
+void udc_enable(struct usb_device_instance *device);
+void udc_disable(void);
+void udc_startup_events(struct usb_device_instance *device);
+
+/* Flow control */
+void udc_set_nak(int epid);
+void udc_unset_nak (int epid);
diff --git a/include/usbdcore_omap1510.h b/include/usbdcore_omap1510.h
index 6ea3331..526fcd9 100644
--- a/include/usbdcore_omap1510.h
+++ b/include/usbdcore_omap1510.h
@@ -161,10 +161,20 @@
#define UDC_VBUS_CTRL (1 << 19)
#define UDC_VBUS_MODE (1 << 18)
+/* OMAP Endpoint parameters */
+#define EP0_MAX_PACKET_SIZE 64
+#define UDC_OUT_ENDPOINT 2
+#define UDC_OUT_PACKET_SIZE 64
+#define UDC_IN_ENDPOINT 1
+#define UDC_IN_PACKET_SIZE 64
+#define UDC_INT_ENDPOINT 5
+#define UDC_INT_PKTSIZE 16
+#define UDC_BULK_PKTSIZE 16
-void omap1510_udc_irq(void);
-void omap1510_udc_noniso_irq(void);
-
+void udc_irq (void);
+/* Flow control */
+void udc_set_nak(int epid);
+void udc_unset_nak (int epid);
/* Higher level functions for abstracting away from specific device */
void udc_endpoint_write(struct usb_endpoint_instance *endpoint);
diff --git a/include/usbdescriptors.h b/include/usbdescriptors.h
index 2d9f739..a752097 100644
--- a/include/usbdescriptors.h
+++ b/include/usbdescriptors.h
@@ -92,33 +92,42 @@
#define COMMUNICATIONS_DEVICE_CLASS 0x02
/* c.f. CDC 4.2 Table 15 */
-#define COMMUNICATIONS_INTERFACE_CLASS 0x02
+#define COMMUNICATIONS_INTERFACE_CLASS_CONTROL 0x02
+#define COMMUNICATIONS_INTERFACE_CLASS_DATA 0x0A
+#define COMMUNICATIONS_INTERFACE_CLASS_VENDOR 0x0FF
/* c.f. CDC 4.3 Table 16 */
-#define COMMUNICATIONS_NO_SUBCLASS 0x00
+#define COMMUNICATIONS_NO_SUBCLASS 0x00
#define COMMUNICATIONS_DLCM_SUBCLASS 0x01
-#define COMMUNICATIONS_ACM_SUBCLASS 0x02
-#define COMMUNICATIONS_TCM_SUBCLASS 0x03
+#define COMMUNICATIONS_ACM_SUBCLASS 0x02
+#define COMMUNICATIONS_TCM_SUBCLASS 0x03
#define COMMUNICATIONS_MCCM_SUBCLASS 0x04
-#define COMMUNICATIONS_CCM_SUBCLASS 0x05
+#define COMMUNICATIONS_CCM_SUBCLASS 0x05
#define COMMUNICATIONS_ENCM_SUBCLASS 0x06
#define COMMUNICATIONS_ANCM_SUBCLASS 0x07
/* c.f. WMCD 5.1 */
#define COMMUNICATIONS_WHCM_SUBCLASS 0x08
-#define COMMUNICATIONS_DMM_SUBCLASS 0x09
+#define COMMUNICATIONS_DMM_SUBCLASS 0x09
#define COMMUNICATIONS_MDLM_SUBCLASS 0x0a
#define COMMUNICATIONS_OBEX_SUBCLASS 0x0b
-/* c.f. CDC 4.6 Table 18 */
+/* c.f. CDC 4.4 Table 17 */
+#define COMMUNICATIONS_NO_PROTOCOL 0x00
+#define COMMUNICATIONS_V25TER_PROTOCOL 0x01 /*Common AT Hayes compatible*/
+
+/* c.f. CDC 4.5 Table 18 */
#define DATA_INTERFACE_CLASS 0x0a
+/* c.f. CDC 4.6 No Table */
+#define DATA_INTERFACE_SUBCLASS_NONE 0x00 /* No subclass pertinent */
+
/* c.f. CDC 4.7 Table 19 */
-#define COMMUNICATIONS_NO_PROTOCOL 0x00
+#define DATA_INTERFACE_PROTOCOL_NONE 0x00 /* No class protcol required */
/* c.f. CDC 5.2.3 Table 24 */
-#define CS_INTERFACE 0x24
+#define CS_INTERFACE 0x24
#define CS_ENDPOINT 0x25
/*
@@ -128,7 +137,7 @@
* c.f. WMCD 5.3 Table 5.3
*/
-#define USB_ST_HEADER 0x00
+#define USB_ST_HEADER 0x00
#define USB_ST_CMF 0x01
#define USB_ST_ACMF 0x02
#define USB_ST_DLMF 0x03
@@ -137,18 +146,18 @@
#define USB_ST_UF 0x06
#define USB_ST_CSF 0x07
#define USB_ST_TOMF 0x08
-#define USB_ST_USBTF 0x09
+#define USB_ST_USBTF 0x09
#define USB_ST_NCT 0x0a
#define USB_ST_PUF 0x0b
#define USB_ST_EUF 0x0c
#define USB_ST_MCMF 0x0d
#define USB_ST_CCMF 0x0e
#define USB_ST_ENF 0x0f
-#define USB_ST_ATMNF 0x10
+#define USB_ST_ATMNF 0x10
#define USB_ST_WHCM 0x11
#define USB_ST_MDLM 0x12
-#define USB_ST_MDLMD 0x13
+#define USB_ST_MDLMD 0x13
#define USB_ST_DMM 0x14
#define USB_ST_OBEX 0x15
#define USB_ST_CS 0x16
@@ -312,7 +321,8 @@
u8 bDescriptorType;
u8 bDescriptorSubtype; /* 0x06 */
u8 bMasterInterface;
- u8 bSlaveInterface0[0];
+ /* u8 bSlaveInterface0[0]; */
+ u8 bSlaveInterface0;
} __attribute__ ((packed));
struct usb_class_country_selection_descriptor {
diff --git a/lib_arm/armlinux.c b/lib_arm/armlinux.c
index 56b7fca..6d32a41 100644
--- a/lib_arm/armlinux.c
+++ b/lib_arm/armlinux.c
@@ -66,13 +66,6 @@
static struct tag *params;
#endif /* CONFIG_SETUP_MEMORY_TAGS || CONFIG_CMDLINE_TAG || CONFIG_INITRD_TAG */
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
extern image_header_t header; /* from cmd_bootm.c */
@@ -96,7 +89,7 @@
* Check if there is an initrd image
*/
if (argc >= 3) {
- SHOW_BOOT_PROGRESS (9);
+ show_boot_progress (9);
addr = simple_strtoul (argv[2], NULL, 16);
@@ -114,7 +107,7 @@
if (ntohl (hdr->ih_magic) != IH_MAGIC) {
printf ("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS (-10);
+ show_boot_progress (-10);
do_reset (cmdtp, flag, argc, argv);
}
@@ -126,11 +119,11 @@
if (crc32 (0, (unsigned char *) data, len) != checksum) {
printf ("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS (-11);
+ show_boot_progress (-11);
do_reset (cmdtp, flag, argc, argv);
}
- SHOW_BOOT_PROGRESS (10);
+ show_boot_progress (10);
print_image_hdr (hdr);
@@ -151,19 +144,19 @@
csum = crc32 (0, (unsigned char *) data, len);
if (csum != ntohl (hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS (-12);
+ show_boot_progress (-12);
do_reset (cmdtp, flag, argc, argv);
}
printf ("OK\n");
}
- SHOW_BOOT_PROGRESS (11);
+ show_boot_progress (11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_ARM) ||
(hdr->ih_type != IH_TYPE_RAMDISK)) {
printf ("No Linux ARM Ramdisk Image\n");
- SHOW_BOOT_PROGRESS (-13);
+ show_boot_progress (-13);
do_reset (cmdtp, flag, argc, argv);
}
@@ -182,7 +175,7 @@
ulong tail = ntohl (len_ptr[0]) % 4;
int i;
- SHOW_BOOT_PROGRESS (13);
+ show_boot_progress (13);
/* skip kernel length and terminator */
data = (ulong) (&len_ptr[2]);
@@ -201,7 +194,7 @@
/*
* no initrd image
*/
- SHOW_BOOT_PROGRESS (14);
+ show_boot_progress (14);
len = data = 0;
}
@@ -220,7 +213,7 @@
initrd_end = 0;
}
- SHOW_BOOT_PROGRESS (15);
+ show_boot_progress (15);
debug ("## Transferring control to Linux (at address %08lx) ...\n",
(ulong) theKernel);
diff --git a/lib_arm/board.c b/lib_arm/board.c
index babc254..d28afc5 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -54,7 +54,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
void nand_init (void);
#endif
@@ -296,7 +296,7 @@
/* armboot_start is defined in the board-specific linker script */
mem_malloc_init (_armboot_start - CFG_MALLOC_LEN);
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
puts ("NAND: ");
nand_init(); /* go init the NAND */
#endif
@@ -314,6 +314,10 @@
drv_vfd_init();
#endif /* CONFIG_VFD */
+#ifdef CONFIG_SERIAL_MULTI
+ serial_initialize();
+#endif
+
/* IP Address */
gd->bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
@@ -364,6 +368,13 @@
enable_interrupts ();
/* Perform network card initialisation if necessary */
+#ifdef CONFIG_DRIVER_TI_EMAC
+extern void dm644x_eth_set_mac_addr (const u_int8_t *addr);
+ if (getenv ("ethaddr")) {
+ dm644x_eth_set_mac_addr(gd->bd->bi_enetaddr);
+ }
+#endif
+
#ifdef CONFIG_DRIVER_CS8900
cs8900_get_enetaddr (gd->bd->bi_enetaddr);
#endif
@@ -378,16 +389,16 @@
if ((s = getenv ("loadaddr")) != NULL) {
load_addr = simple_strtoul (s, NULL, 16);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if ((s = getenv ("bootfile")) != NULL) {
copy_filename (BootFile, s, sizeof (BootFile));
}
-#endif /* CFG_CMD_NET */
+#endif
#ifdef BOARD_LATE_INIT
board_late_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
puts ("Net: ");
#endif
diff --git a/lib_avr32/Makefile b/lib_avr32/Makefile
index cf20836..bb2938f 100644
--- a/lib_avr32/Makefile
+++ b/lib_avr32/Makefile
@@ -29,7 +29,7 @@
SOBJS = memset.o
-COBJS = board.o interrupts.o avr32_linux.o div64.o
+COBJS = board.o interrupts.o avr32_linux.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/lib_avr32/avr32_linux.c b/lib_avr32/avr32_linux.c
index 6095e2f..62afbd2 100644
--- a/lib_avr32/avr32_linux.c
+++ b/lib_avr32/avr32_linux.c
@@ -36,13 +36,6 @@
/* CPU-specific hook to allow flushing of caches, etc. */
extern void prepare_to_boot(void);
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
extern image_header_t header; /* from cmd_bootm.c */
static struct tag *setup_start_tag(struct tag *params)
@@ -204,7 +197,7 @@
* Check if there is an initrd image
*/
if (argc >= 3) {
- SHOW_BOOT_PROGRESS(9);
+ show_boot_progress (9);
addr = simple_strtoul(argv[2], NULL, 16);
@@ -215,7 +208,7 @@
if (ntohl(hdr->ih_magic) != IH_MAGIC) {
puts("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS(-10);
+ show_boot_progress (-10);
do_reset(cmdtp, flag, argc, argv);
}
@@ -226,11 +219,11 @@
if (crc32(0, (unsigned char *)data, len) != checksum) {
puts("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS(-11);
+ show_boot_progress (-11);
do_reset(cmdtp, flag, argc, argv);
}
- SHOW_BOOT_PROGRESS(10);
+ show_boot_progress (10);
print_image_hdr(hdr);
@@ -244,26 +237,26 @@
csum = crc32(0, (unsigned char *)data, len);
if (csum != ntohl(hdr->ih_dcrc)) {
puts("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS(-12);
+ show_boot_progress (-12);
do_reset(cmdtp, flag, argc, argv);
}
puts("OK\n");
}
- SHOW_BOOT_PROGRESS(11);
+ show_boot_progress (11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_AVR32) ||
(hdr->ih_type != IH_TYPE_RAMDISK)) {
puts("Not a Linux/AVR32 RAMDISK image\n");
- SHOW_BOOT_PROGRESS(-13);
+ show_boot_progress (-13);
do_reset(cmdtp, flag, argc, argv);
}
} else if ((hdr->ih_type == IH_TYPE_MULTI) && (len_ptr[1])) {
ulong tail = ntohl (len_ptr[0]) % 4;
int i;
- SHOW_BOOT_PROGRESS (13);
+ show_boot_progress (13);
/* skip kernel length and terminator */
data = (ulong) (&len_ptr[2]);
@@ -279,7 +272,7 @@
len = ntohl (len_ptr[1]);
} else {
/* no initrd image */
- SHOW_BOOT_PROGRESS(14);
+ show_boot_progress (14);
len = data = 0;
}
@@ -291,7 +284,7 @@
initrd_end = 0;
}
- SHOW_BOOT_PROGRESS(15);
+ show_boot_progress (15);
params = params_start = (struct tag *)gd->bd->bi_boot_params;
params = setup_start_tag(params);
diff --git a/lib_avr32/board.c b/lib_avr32/board.c
index 265328a..8b9ca38 100644
--- a/lib_avr32/board.c
+++ b/lib_avr32/board.c
@@ -328,7 +328,7 @@
jumptable_init();
console_init_r();
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
puts("Net: ");
#endif
diff --git a/lib_avr32/div64.c b/lib_avr32/div64.c
deleted file mode 100644
index 99726e3..0000000
--- a/lib_avr32/div64.c
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * Copyright (C) 2003 Bernardo Innocenti <bernie@develer.com>
- *
- * Based on former do_div() implementation from asm-parisc/div64.h:
- * Copyright (C) 1999 Hewlett-Packard Co
- * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
- *
- *
- * Generic C version of 64bit/32bit division and modulo, with
- * 64bit result and 32bit remainder.
- *
- * The fast case for (n>>32 == 0) is handled inline by do_div().
- *
- * Code generated for this function might be very inefficient
- * for some CPUs. __div64_32() can be overridden by linking arch-specific
- * assembly versions such as arch/ppc/lib/div64.S and arch/sh/lib/div64.S.
- */
-
-#include <linux/types.h>
-
-#include <asm/div64.h>
-
-uint32_t __div64_32(uint64_t *n, uint32_t base)
-{
- uint64_t rem = *n;
- uint64_t b = base;
- uint64_t res, d = 1;
- uint32_t high = rem >> 32;
-
- /* Reduce the thing a bit first */
- res = 0;
- if (high >= base) {
- high /= base;
- res = (uint64_t) high << 32;
- rem -= (uint64_t) (high*base) << 32;
- }
-
- while ((int64_t)b > 0 && b < rem) {
- b = b+b;
- d = d+d;
- }
-
- do {
- if (rem >= b) {
- rem -= b;
- res += d;
- }
- b >>= 1;
- d >>= 1;
- } while (d);
-
- *n = res;
- return rem;
-}
diff --git a/lib_blackfin/bf533_linux.c b/lib_blackfin/bf533_linux.c
index 3b9c4df..80a3dc7 100644
--- a/lib_blackfin/bf533_linux.c
+++ b/lib_blackfin/bf533_linux.c
@@ -36,13 +36,6 @@
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-#include <status_led.h>
-#define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-#define SHOW_BOOT_PROGRESS(arg)
-#endif
-
#define CMD_LINE_ADDR 0xFF900000 /* L1 scratchpad */
#ifdef SHARED_RESOURCES
diff --git a/lib_blackfin/board.c b/lib_blackfin/board.c
index 1538da3..7c9990f 100644
--- a/lib_blackfin/board.c
+++ b/lib_blackfin/board.c
@@ -42,6 +42,8 @@
int post_flag;
#endif
+DECLARE_GLOBAL_DATA_PTR;
+
#ifndef CFG_NO_FLASH
extern flash_info_t flash_info[];
#endif
@@ -126,8 +128,6 @@
static int init_baudrate(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
char tmp[64];
int i = getenv_r("baudrate", tmp, sizeof(tmp));
gd->bd->bi_baudrate = gd->baudrate = (i > 0)
@@ -139,7 +139,6 @@
#ifdef DEBUG
static void display_global_data(void)
{
- DECLARE_GLOBAL_DATA_PTR;
bd_t *bd;
bd = gd->bd;
printf("--flags:%x\n", gd->flags);
@@ -256,7 +255,6 @@
void board_init_f(ulong bootflag)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong addr;
bd_t *bd;
int i;
@@ -297,7 +295,7 @@
}
checkboard();
-#if defined(CONFIG_RTC_BF533) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_BF533) && defined(CONFIG_CMD_DATE)
rtc_init();
#endif
timer_init();
@@ -325,7 +323,6 @@
void board_init_r(gd_t * id, ulong dest_addr)
{
- DECLARE_GLOBAL_DATA_PTR;
ulong size;
extern void malloc_bin_reloc(void);
char *s, *e;
@@ -391,13 +388,13 @@
if ((s = getenv("loadaddr")) != NULL) {
load_addr = simple_strtoul(s, NULL, 16);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if ((s = getenv("bootfile")) != NULL) {
copy_filename(BootFile, s, sizeof(BootFile));
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
puts("NAND: ");
nand_init(); /* go init the NAND */
#endif
diff --git a/lib_blackfin/post.c b/lib_blackfin/post.c
index 0e76026..3c4d5c5 100644
--- a/lib_blackfin/post.c
+++ b/lib_blackfin/post.c
@@ -32,14 +32,14 @@
#ifdef CONFIG_POST
+DECLARE_GLOBAL_DATA_PTR;
+
#define POST_MAX_NUMBER 32
#define BOOTMODE_MAGIC 0xDEAD0000
int post_init_f(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
int res = 0;
unsigned int i;
@@ -62,7 +62,6 @@
void post_bootmode_init(void)
{
- DECLARE_GLOBAL_DATA_PTR;
int bootmode = post_bootmode_get(0);
int newword;
@@ -109,20 +108,17 @@
/* POST tests run before relocation only mark status bits .... */
static void post_log_mark_start(unsigned long testid)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->post_log_word |= (testid) << 16;
}
static void post_log_mark_succ(unsigned long testid)
{
- DECLARE_GLOBAL_DATA_PTR;
gd->post_log_word |= testid;
}
/* ... and the messages are output once we are relocated */
void post_output_backlog(void)
{
- DECLARE_GLOBAL_DATA_PTR;
int j;
for (j = 0; j < post_list_size; j++) {
@@ -132,9 +128,7 @@
post_log("PASSED\n");
else {
post_log("FAILED\n");
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
- show_boot_progress(-31);
-#endif
+ show_boot_progress (-31);
}
}
}
@@ -245,9 +239,7 @@
} else {
if ((*test->test) (flags) != 0) {
post_log("FAILED\n");
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
- show_boot_progress(-32);
-#endif
+ show_boot_progress (-32);
} else
post_log("PASSED\n");
}
@@ -376,8 +368,6 @@
void post_reloc(void)
{
- DECLARE_GLOBAL_DATA_PTR;
-
unsigned int i;
/*
diff --git a/lib_generic/Makefile b/lib_generic/Makefile
index f012cab..bf37752 100644
--- a/lib_generic/Makefile
+++ b/lib_generic/Makefile
@@ -27,7 +27,7 @@
COBJS = bzlib.o bzlib_crctable.o bzlib_decompress.o \
bzlib_randtable.o bzlib_huffman.o \
- crc32.o ctype.o display_options.o ldiv.o \
+ crc32.o ctype.o display_options.o div64.o ldiv.o sha1.o \
string.o vsprintf.o zlib.o
SRCS := $(COBJS:.o=.c)
diff --git a/lib_generic/crc32.c b/lib_generic/crc32.c
index 3d99b69..df0dbca 100644
--- a/lib_generic/crc32.c
+++ b/lib_generic/crc32.c
@@ -9,7 +9,7 @@
*/
#ifndef USE_HOSTCC /* Shut down "ANSI does not permit..." warnings */
-#include <common.h> /* to get command definitions like CFG_CMD_JFFS2 */
+#include <common.h>
#endif
#include "zlib.h"
@@ -171,8 +171,9 @@
return crc ^ 0xffffffffL;
}
-#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) || \
- ((CONFIG_COMMANDS & CFG_CMD_NAND) && !defined(CFG_NAND_LEGACY))
+#if defined(CONFIG_CMD_JFFS2) || \
+ (defined(CONFIG_CMD_NAND) \
+ && !defined(CFG_NAND_LEGACY))
/* No ones complement version. JFFS2 (and other things ?)
* don't use ones compliment in their CRC calculations.
@@ -195,4 +196,4 @@
return crc;
}
-#endif /* CFG_CMD_JFFS2 */
+#endif
diff --git a/lib_generic/div64.c b/lib_generic/div64.c
new file mode 100644
index 0000000..d9951b5
--- /dev/null
+++ b/lib_generic/div64.c
@@ -0,0 +1,52 @@
+/*
+ * Copyright (C) 2003 Bernardo Innocenti <bernie@develer.com>
+ *
+ * Based on former do_div() implementation from asm-parisc/div64.h:
+ * Copyright (C) 1999 Hewlett-Packard Co
+ * Copyright (C) 1999 David Mosberger-Tang <davidm@hpl.hp.com>
+ *
+ *
+ * Generic C version of 64bit/32bit division and modulo, with
+ * 64bit result and 32bit remainder.
+ *
+ * The fast case for (n>>32 == 0) is handled inline by do_div().
+ *
+ * Code generated for this function might be very inefficient
+ * for some CPUs. __div64_32() can be overridden by linking arch-specific
+ * assembly versions such as arch/ppc/lib/div64.S and arch/sh/lib/div64.S.
+ */
+
+#include <linux/types.h>
+
+uint32_t __div64_32(uint64_t *n, uint32_t base)
+{
+ uint64_t rem = *n;
+ uint64_t b = base;
+ uint64_t res, d = 1;
+ uint32_t high = rem >> 32;
+
+ /* Reduce the thing a bit first */
+ res = 0;
+ if (high >= base) {
+ high /= base;
+ res = (uint64_t) high << 32;
+ rem -= (uint64_t) (high*base) << 32;
+ }
+
+ while ((int64_t)b > 0 && b < rem) {
+ b = b+b;
+ d = d+d;
+ }
+
+ do {
+ if (rem >= b) {
+ rem -= b;
+ res += d;
+ }
+ b >>= 1;
+ d >>= 1;
+ } while (d);
+
+ *n = res;
+ return rem;
+}
diff --git a/lib_generic/sha1.c b/lib_generic/sha1.c
new file mode 100644
index 0000000..08ffa6b
--- /dev/null
+++ b/lib_generic/sha1.c
@@ -0,0 +1,413 @@
+/*
+ * Heiko Schocher, DENX Software Engineering, hs@denx.de.
+ * based on:
+ * FIPS-180-1 compliant SHA-1 implementation
+ *
+ * Copyright (C) 2003-2006 Christophe Devine
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Lesser General Public
+ * License, version 2.1 as published by the Free Software Foundation.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ * Lesser General Public License for more details.
+ *
+ * You should have received a copy of the GNU Lesser General Public
+ * License along with this library; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
+ * MA 02110-1301 USA
+ */
+/*
+ * The SHA-1 standard was published by NIST in 1993.
+ *
+ * http://www.itl.nist.gov/fipspubs/fip180-1.htm
+ */
+
+#ifndef _CRT_SECURE_NO_DEPRECATE
+#define _CRT_SECURE_NO_DEPRECATE 1
+#endif
+
+#include <linux/string.h>
+#include "sha1.h"
+
+/*
+ * 32-bit integer manipulation macros (big endian)
+ */
+#ifndef GET_UINT32_BE
+#define GET_UINT32_BE(n,b,i) { \
+ (n) = ( (unsigned long) (b)[(i) ] << 24 ) \
+ | ( (unsigned long) (b)[(i) + 1] << 16 ) \
+ | ( (unsigned long) (b)[(i) + 2] << 8 ) \
+ | ( (unsigned long) (b)[(i) + 3] ); \
+}
+#endif
+#ifndef PUT_UINT32_BE
+#define PUT_UINT32_BE(n,b,i) { \
+ (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \
+ (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \
+ (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \
+ (b)[(i) + 3] = (unsigned char) ( (n) ); \
+}
+#endif
+
+/*
+ * SHA-1 context setup
+ */
+void sha1_starts (sha1_context * ctx)
+{
+ ctx->total[0] = 0;
+ ctx->total[1] = 0;
+
+ ctx->state[0] = 0x67452301;
+ ctx->state[1] = 0xEFCDAB89;
+ ctx->state[2] = 0x98BADCFE;
+ ctx->state[3] = 0x10325476;
+ ctx->state[4] = 0xC3D2E1F0;
+}
+
+static void sha1_process (sha1_context * ctx, unsigned char data[64])
+{
+ unsigned long temp, W[16], A, B, C, D, E;
+
+ GET_UINT32_BE (W[0], data, 0);
+ GET_UINT32_BE (W[1], data, 4);
+ GET_UINT32_BE (W[2], data, 8);
+ GET_UINT32_BE (W[3], data, 12);
+ GET_UINT32_BE (W[4], data, 16);
+ GET_UINT32_BE (W[5], data, 20);
+ GET_UINT32_BE (W[6], data, 24);
+ GET_UINT32_BE (W[7], data, 28);
+ GET_UINT32_BE (W[8], data, 32);
+ GET_UINT32_BE (W[9], data, 36);
+ GET_UINT32_BE (W[10], data, 40);
+ GET_UINT32_BE (W[11], data, 44);
+ GET_UINT32_BE (W[12], data, 48);
+ GET_UINT32_BE (W[13], data, 52);
+ GET_UINT32_BE (W[14], data, 56);
+ GET_UINT32_BE (W[15], data, 60);
+
+#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n)))
+
+#define R(t) ( \
+ temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \
+ W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \
+ ( W[t & 0x0F] = S(temp,1) ) \
+)
+
+#define P(a,b,c,d,e,x) { \
+ e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \
+}
+
+ A = ctx->state[0];
+ B = ctx->state[1];
+ C = ctx->state[2];
+ D = ctx->state[3];
+ E = ctx->state[4];
+
+#define F(x,y,z) (z ^ (x & (y ^ z)))
+#define K 0x5A827999
+
+ P (A, B, C, D, E, W[0]);
+ P (E, A, B, C, D, W[1]);
+ P (D, E, A, B, C, W[2]);
+ P (C, D, E, A, B, W[3]);
+ P (B, C, D, E, A, W[4]);
+ P (A, B, C, D, E, W[5]);
+ P (E, A, B, C, D, W[6]);
+ P (D, E, A, B, C, W[7]);
+ P (C, D, E, A, B, W[8]);
+ P (B, C, D, E, A, W[9]);
+ P (A, B, C, D, E, W[10]);
+ P (E, A, B, C, D, W[11]);
+ P (D, E, A, B, C, W[12]);
+ P (C, D, E, A, B, W[13]);
+ P (B, C, D, E, A, W[14]);
+ P (A, B, C, D, E, W[15]);
+ P (E, A, B, C, D, R (16));
+ P (D, E, A, B, C, R (17));
+ P (C, D, E, A, B, R (18));
+ P (B, C, D, E, A, R (19));
+
+#undef K
+#undef F
+
+#define F(x,y,z) (x ^ y ^ z)
+#define K 0x6ED9EBA1
+
+ P (A, B, C, D, E, R (20));
+ P (E, A, B, C, D, R (21));
+ P (D, E, A, B, C, R (22));
+ P (C, D, E, A, B, R (23));
+ P (B, C, D, E, A, R (24));
+ P (A, B, C, D, E, R (25));
+ P (E, A, B, C, D, R (26));
+ P (D, E, A, B, C, R (27));
+ P (C, D, E, A, B, R (28));
+ P (B, C, D, E, A, R (29));
+ P (A, B, C, D, E, R (30));
+ P (E, A, B, C, D, R (31));
+ P (D, E, A, B, C, R (32));
+ P (C, D, E, A, B, R (33));
+ P (B, C, D, E, A, R (34));
+ P (A, B, C, D, E, R (35));
+ P (E, A, B, C, D, R (36));
+ P (D, E, A, B, C, R (37));
+ P (C, D, E, A, B, R (38));
+ P (B, C, D, E, A, R (39));
+
+#undef K
+#undef F
+
+#define F(x,y,z) ((x & y) | (z & (x | y)))
+#define K 0x8F1BBCDC
+
+ P (A, B, C, D, E, R (40));
+ P (E, A, B, C, D, R (41));
+ P (D, E, A, B, C, R (42));
+ P (C, D, E, A, B, R (43));
+ P (B, C, D, E, A, R (44));
+ P (A, B, C, D, E, R (45));
+ P (E, A, B, C, D, R (46));
+ P (D, E, A, B, C, R (47));
+ P (C, D, E, A, B, R (48));
+ P (B, C, D, E, A, R (49));
+ P (A, B, C, D, E, R (50));
+ P (E, A, B, C, D, R (51));
+ P (D, E, A, B, C, R (52));
+ P (C, D, E, A, B, R (53));
+ P (B, C, D, E, A, R (54));
+ P (A, B, C, D, E, R (55));
+ P (E, A, B, C, D, R (56));
+ P (D, E, A, B, C, R (57));
+ P (C, D, E, A, B, R (58));
+ P (B, C, D, E, A, R (59));
+
+#undef K
+#undef F
+
+#define F(x,y,z) (x ^ y ^ z)
+#define K 0xCA62C1D6
+
+ P (A, B, C, D, E, R (60));
+ P (E, A, B, C, D, R (61));
+ P (D, E, A, B, C, R (62));
+ P (C, D, E, A, B, R (63));
+ P (B, C, D, E, A, R (64));
+ P (A, B, C, D, E, R (65));
+ P (E, A, B, C, D, R (66));
+ P (D, E, A, B, C, R (67));
+ P (C, D, E, A, B, R (68));
+ P (B, C, D, E, A, R (69));
+ P (A, B, C, D, E, R (70));
+ P (E, A, B, C, D, R (71));
+ P (D, E, A, B, C, R (72));
+ P (C, D, E, A, B, R (73));
+ P (B, C, D, E, A, R (74));
+ P (A, B, C, D, E, R (75));
+ P (E, A, B, C, D, R (76));
+ P (D, E, A, B, C, R (77));
+ P (C, D, E, A, B, R (78));
+ P (B, C, D, E, A, R (79));
+
+#undef K
+#undef F
+
+ ctx->state[0] += A;
+ ctx->state[1] += B;
+ ctx->state[2] += C;
+ ctx->state[3] += D;
+ ctx->state[4] += E;
+}
+
+/*
+ * SHA-1 process buffer
+ */
+void sha1_update (sha1_context * ctx, unsigned char *input, int ilen)
+{
+ int fill;
+ unsigned long left;
+
+ if (ilen <= 0)
+ return;
+
+ left = ctx->total[0] & 0x3F;
+ fill = 64 - left;
+
+ ctx->total[0] += ilen;
+ ctx->total[0] &= 0xFFFFFFFF;
+
+ if (ctx->total[0] < (unsigned long) ilen)
+ ctx->total[1]++;
+
+ if (left && ilen >= fill) {
+ memcpy ((void *) (ctx->buffer + left), (void *) input, fill);
+ sha1_process (ctx, ctx->buffer);
+ input += fill;
+ ilen -= fill;
+ left = 0;
+ }
+
+ while (ilen >= 64) {
+ sha1_process (ctx, input);
+ input += 64;
+ ilen -= 64;
+ }
+
+ if (ilen > 0) {
+ memcpy ((void *) (ctx->buffer + left), (void *) input, ilen);
+ }
+}
+
+static const unsigned char sha1_padding[64] = {
+ 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
+ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
+};
+
+/*
+ * SHA-1 final digest
+ */
+void sha1_finish (sha1_context * ctx, unsigned char output[20])
+{
+ unsigned long last, padn;
+ unsigned long high, low;
+ unsigned char msglen[8];
+
+ high = (ctx->total[0] >> 29)
+ | (ctx->total[1] << 3);
+ low = (ctx->total[0] << 3);
+
+ PUT_UINT32_BE (high, msglen, 0);
+ PUT_UINT32_BE (low, msglen, 4);
+
+ last = ctx->total[0] & 0x3F;
+ padn = (last < 56) ? (56 - last) : (120 - last);
+
+ sha1_update (ctx, (unsigned char *) sha1_padding, padn);
+ sha1_update (ctx, msglen, 8);
+
+ PUT_UINT32_BE (ctx->state[0], output, 0);
+ PUT_UINT32_BE (ctx->state[1], output, 4);
+ PUT_UINT32_BE (ctx->state[2], output, 8);
+ PUT_UINT32_BE (ctx->state[3], output, 12);
+ PUT_UINT32_BE (ctx->state[4], output, 16);
+}
+
+/*
+ * Output = SHA-1( input buffer )
+ */
+void sha1_csum (unsigned char *input, int ilen, unsigned char output[20])
+{
+ sha1_context ctx;
+
+ sha1_starts (&ctx);
+ sha1_update (&ctx, input, ilen);
+ sha1_finish (&ctx, output);
+}
+
+/*
+ * Output = HMAC-SHA-1( input buffer, hmac key )
+ */
+void sha1_hmac (unsigned char *key, int keylen,
+ unsigned char *input, int ilen, unsigned char output[20])
+{
+ int i;
+ sha1_context ctx;
+ unsigned char k_ipad[64];
+ unsigned char k_opad[64];
+ unsigned char tmpbuf[20];
+
+ memset (k_ipad, 0x36, 64);
+ memset (k_opad, 0x5C, 64);
+
+ for (i = 0; i < keylen; i++) {
+ if (i >= 64)
+ break;
+
+ k_ipad[i] ^= key[i];
+ k_opad[i] ^= key[i];
+ }
+
+ sha1_starts (&ctx);
+ sha1_update (&ctx, k_ipad, 64);
+ sha1_update (&ctx, input, ilen);
+ sha1_finish (&ctx, tmpbuf);
+
+ sha1_starts (&ctx);
+ sha1_update (&ctx, k_opad, 64);
+ sha1_update (&ctx, tmpbuf, 20);
+ sha1_finish (&ctx, output);
+
+ memset (k_ipad, 0, 64);
+ memset (k_opad, 0, 64);
+ memset (tmpbuf, 0, 20);
+ memset (&ctx, 0, sizeof (sha1_context));
+}
+
+static const char _sha1_src[] = "_sha1_src";
+
+#ifdef SELF_TEST
+/*
+ * FIPS-180-1 test vectors
+ */
+static const char sha1_test_str[3][57] = {
+ {"abc"},
+ {"abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq"},
+ {""}
+};
+
+static const unsigned char sha1_test_sum[3][20] = {
+ {0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E,
+ 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D},
+ {0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE,
+ 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1},
+ {0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E,
+ 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F}
+};
+
+/*
+ * Checkup routine
+ */
+int sha1_self_test (void)
+{
+ int i, j;
+ unsigned char buf[1000];
+ unsigned char sha1sum[20];
+ sha1_context ctx;
+
+ for (i = 0; i < 3; i++) {
+ printf (" SHA-1 test #%d: ", i + 1);
+
+ sha1_starts (&ctx);
+
+ if (i < 2)
+ sha1_update (&ctx, (unsigned char *) sha1_test_str[i],
+ strlen (sha1_test_str[i]));
+ else {
+ memset (buf, 'a', 1000);
+ for (j = 0; j < 1000; j++)
+ sha1_update (&ctx, buf, 1000);
+ }
+
+ sha1_finish (&ctx, sha1sum);
+
+ if (memcmp (sha1sum, sha1_test_sum[i], 20) != 0) {
+ printf ("failed\n");
+ return (1);
+ }
+
+ printf ("passed\n");
+ }
+
+ printf ("\n");
+ return (0);
+}
+#else
+int sha1_self_test (void)
+{
+ return (0);
+}
+#endif
diff --git a/lib_i386/board.c b/lib_i386/board.c
index 4175fdb1c..47fbab4 100644
--- a/lib_i386/board.c
+++ b/lib_i386/board.c
@@ -313,13 +313,13 @@
misc_init_r();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_PCMCIA) && !defined(CONFIG_CMD_IDE)
WATCHDOG_RESET();
puts ("PCMCIA:");
pcmcia_init();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
WATCHDOG_RESET();
puts("KGDB: ");
kgdb_init();
@@ -348,33 +348,33 @@
if ((s = getenv ("loadaddr")) != NULL) {
load_addr = simple_strtoul (s, NULL, 16);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if ((s = getenv ("bootfile")) != NULL) {
copy_filename (BootFile, s, sizeof (BootFile));
}
-#endif /* CFG_CMD_NET */
+#endif
WATCHDOG_RESET();
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
WATCHDOG_RESET();
puts("IDE: ");
ide_init();
-#endif /* CFG_CMD_IDE */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#if defined(CONFIG_CMD_SCSI)
WATCHDOG_RESET();
puts("SCSI: ");
scsi_init();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
WATCHDOG_RESET();
puts("DOC: ");
doc_init();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
WATCHDOG_RESET();
puts("Net: ");
@@ -382,7 +382,7 @@
eth_initialize(gd->bd);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && (0)
+#if ( defined(CONFIG_CMD_NET)) && (0)
WATCHDOG_RESET();
# ifdef DEBUG
puts ("Reset Ethernet PHY\n");
diff --git a/lib_m68k/Makefile b/lib_m68k/Makefile
index 82165f0..03784fd 100644
--- a/lib_m68k/Makefile
+++ b/lib_m68k/Makefile
@@ -27,7 +27,7 @@
SOBJS =
-COBJS = cache.o traps.o time.o board.o m68k_linux.o
+COBJS = cache.o traps.o time.o interrupts.o board.o m68k_linux.o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
diff --git a/lib_m68k/board.c b/lib_m68k/board.c
index 6aaf609..43f97c4 100644
--- a/lib_m68k/board.c
+++ b/lib_m68k/board.c
@@ -30,24 +30,22 @@
#include <malloc.h>
#include <devices.h>
-#ifdef CONFIG_M5272
-#include <asm/immap_5272.h>
-#endif
+#include <asm/immap.h>
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
#include <ide.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#if defined(CONFIG_CMD_SCSI)
#include <scsi.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#include <kgdb.h>
#endif
#ifdef CONFIG_STATUS_LED
#include <status_led.h>
#endif
#include <net.h>
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
#include <cmd_bedbug.h>
#endif
#ifdef CFG_ALLOC_DPRAM
@@ -139,19 +137,19 @@
char *strmhz(char *buf, long hz)
{
- long l, n;
- long m;
+ long l, n;
+ long m;
- n = hz / 1000000L;
+ n = hz / 1000000L;
- l = sprintf (buf, "%ld", n);
+ l = sprintf (buf, "%ld", n);
- m = (hz % 1000000L) / 1000L;
+ m = (hz % 1000000L) / 1000L;
- if (m != 0)
- sprintf (buf+l, ".%03ld", m);
+ if (m != 0)
+ sprintf (buf+l, ".%03ld", m);
- return (buf);
+ return (buf);
}
/*
@@ -169,7 +167,7 @@
typedef int (init_fnc_t) (void);
/************************************************************************
- * Init Utilities *
+ * Init Utilities
************************************************************************
* Some of this code should be moved into the core functions,
* but let's get it working (again) first...
@@ -221,6 +219,7 @@
*/
init_fnc_t *init_sequence[] = {
+ get_clocks,
env_init,
init_baudrate,
serial_init,
@@ -371,6 +370,10 @@
*/
bd->bi_memstart = CFG_SDRAM_BASE; /* start of DRAM memory */
bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
+#ifdef CFG_INIT_RAM_ADDR
+ bd->bi_sramstart = CFG_INIT_RAM_ADDR; /* start of SRAM memory */
+ bd->bi_sramsize = CFG_INIT_RAM_END; /* size of SRAM memory */
+#endif
bd->bi_mbar_base = CFG_MBAR; /* base of internal registers */
bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
@@ -378,6 +381,14 @@
WATCHDOG_RESET ();
bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
+#ifdef CONFIG_PCI
+ bd->bi_pcifreq = gd->pci_clk; /* PCI Freq in Hz */
+#endif
+#ifdef CONFIG_EXTRA_CLOCK
+ bd->bi_inpfreq = gd->inp_clk; /* input Freq in Hz */
+ bd->bi_vcofreq = gd->vco_clk; /* vco Freq in Hz */
+ bd->bi_flbfreq = gd->flb_clk; /* flexbus Freq in Hz */
+#endif
bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
#ifdef CFG_EXTBDINFO
@@ -430,6 +441,10 @@
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
+#ifdef CONFIG_SERIAL_MULTI
+ serial_initialize();
+#endif
+
debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
WATCHDOG_RESET ();
@@ -489,7 +504,7 @@
/*
* Setup trap handlers
*/
- trap_init (0);
+ trap_init (CFG_SDRAM_BASE);
#if !defined(CFG_NO_FLASH)
puts ("FLASH: ");
@@ -562,12 +577,48 @@
if (s)
s = (*e) ? e + 1 : e;
}
+#ifdef CONFIG_HAS_ETH1
+ /* handle the 2nd ethernet address */
+
+ s = getenv ("eth1addr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enet1addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
+#ifdef CONFIG_HAS_ETH2
+ /* handle the 3rd ethernet address */
+
+ s = getenv ("eth2addr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enet2addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
+
+#ifdef CONFIG_HAS_ETH3
+ /* handle 4th ethernet address */
+ s = getenv("eth3addr");
+ for (i = 0; i < 6; ++i) {
+ bd->bi_enet3addr[i] = s ? simple_strtoul (s, &e, 16) : 0;
+ if (s)
+ s = (*e) ? e + 1 : e;
+ }
+#endif
/* IP Address */
bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
WATCHDOG_RESET ();
+#if defined(CONFIG_PCI)
+ /*
+ * Do pci configuration
+ */
+ pci_init ();
+#endif
/** leave this here (after malloc(), environment and PCI are working) **/
/* Initialize devices */
@@ -584,7 +635,7 @@
misc_init_r ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
WATCHDOG_RESET ();
puts ("KGDB: ");
kgdb_init ();
@@ -620,35 +671,54 @@
if ((s = getenv ("loadaddr")) != NULL) {
load_addr = simple_strtoul (s, NULL, 16);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if ((s = getenv ("bootfile")) != NULL) {
copy_filename (BootFile, s, sizeof (BootFile));
}
-#endif /* CFG_CMD_NET */
+#endif
WATCHDOG_RESET ();
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
WATCHDOG_RESET ();
puts ("DOC: ");
doc_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
WATCHDOG_RESET ();
puts ("NAND: ");
nand_init(); /* go init the NAND */
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(FEC_ENET)
+#if defined(CONFIG_CMD_NET)
WATCHDOG_RESET();
+#if defined(FEC_ENET)
eth_init(bd);
#endif
+#if defined(CONFIG_NET_MULTI)
+ puts ("Net: ");
+ eth_initialize (bd);
+#endif
+#endif
#ifdef CONFIG_POST
post_run (NULL, POST_RAM | post_bootmode_get(0));
#endif
+#if defined(CONFIG_CMD_PCMCIA) \
+ && !defined(CONFIG_CMD_IDE)
+ WATCHDOG_RESET ();
+ puts ("PCMCIA:");
+ pcmcia_init ();
+#endif
+
+#if defined(CONFIG_CMD_IDE)
+ WATCHDOG_RESET ();
+ puts ("IDE: ");
+ ide_init ();
+#endif
+
#ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET ();
/*
@@ -659,7 +729,7 @@
last_stage_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
WATCHDOG_RESET ();
bedbug_init ();
#endif
diff --git a/lib_m68k/interrupts.c b/lib_m68k/interrupts.c
new file mode 100644
index 0000000..1635d6f
--- /dev/null
+++ b/lib_m68k/interrupts.c
@@ -0,0 +1,115 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * (C) Copyright 2007 Freescale Semiconductor Inc
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <watchdog.h>
+#include <asm/processor.h>
+#include <asm/immap.h>
+
+#define NR_IRQS (CFG_NUM_IRQS)
+
+/*
+ * Interrupt vector functions.
+ */
+struct interrupt_action {
+ interrupt_handler_t *handler;
+ void *arg;
+};
+
+static struct interrupt_action irq_vecs[NR_IRQS];
+
+static __inline__ unsigned short get_sr (void)
+{
+ unsigned short sr;
+
+ asm volatile ("move.w %%sr,%0":"=r" (sr):);
+
+ return sr;
+}
+
+static __inline__ void set_sr (unsigned short sr)
+{
+ asm volatile ("move.w %0,%%sr"::"r" (sr));
+}
+
+/************************************************************************/
+/*
+ * Install and free an interrupt handler
+ */
+void irq_install_handler (int vec, interrupt_handler_t * handler, void *arg)
+{
+ if ((vec < 0) || (vec > NR_IRQS)) {
+ printf ("irq_install_handler: wrong interrupt vector %d\n",
+ vec);
+ return;
+ }
+
+ irq_vecs[vec].handler = handler;
+ irq_vecs[vec].arg = arg;
+}
+
+void irq_free_handler (int vec)
+{
+ if ((vec < 0) || (vec > NR_IRQS)) {
+ return;
+ }
+
+ irq_vecs[vec].handler = NULL;
+ irq_vecs[vec].arg = NULL;
+}
+
+void enable_interrupts (void)
+{
+ unsigned short sr;
+
+ sr = get_sr ();
+ set_sr (sr & ~0x0700);
+}
+
+int disable_interrupts (void)
+{
+ unsigned short sr;
+
+ sr = get_sr ();
+ set_sr (sr | 0x0700);
+
+ return ((sr & 0x0700) == 0); /* return TRUE, if interrupts were enabled before */
+}
+
+void int_handler (struct pt_regs *fp)
+{
+ int vec;
+
+ vec = (fp->vector >> 2) & 0xff;
+ if (vec > 0x40)
+ vec -= 0x40;
+
+ if (irq_vecs[vec].handler != NULL) {
+ irq_vecs[vec].handler (irq_vecs[vec].arg);
+ } else {
+ printf ("\nBogus External Interrupt Vector %d\n", vec);
+ }
+}
diff --git a/lib_m68k/m68k_linux.c b/lib_m68k/m68k_linux.c
index f87f56e..bea9744 100644
--- a/lib_m68k/m68k_linux.c
+++ b/lib_m68k/m68k_linux.c
@@ -25,6 +25,8 @@
#include <command.h>
#include <image.h>
#include <zlib.h>
+#include <bzlib.h>
+#include <environment.h>
#include <asm/byteorder.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -41,103 +43,183 @@
# define SHOW_BOOT_PROGRESS(arg)
#endif
-extern image_header_t header; /* from cmd_bootm.c */
+extern image_header_t header;
-extern int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
-
-static int linux_argc;
-static char **linux_argv;
-
-static char **linux_env;
-static char *linux_env_p;
-static int linux_env_idx;
-
-static void linux_params_init (ulong start, char *commandline);
-static void linux_env_set (char *env_name, char *env_val);
-
-void do_bootm_linux (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[],
- ulong addr, ulong * len_ptr, int verify)
+void do_bootm_linux(cmd_tbl_t * cmdtp, int flag,
+ int argc, char *argv[],
+ ulong addr, ulong * len_ptr, int verify)
{
- ulong len = 0, checksum;
+ ulong sp;
+ ulong len, checksum;
ulong initrd_start, initrd_end;
+ ulong cmd_start, cmd_end;
+ ulong initrd_high;
ulong data;
- void (*theKernel) (int, char **, char **, int *);
+ int initrd_copy_to_ram = 1;
+ char *cmdline;
+ char *s;
+ bd_t *kbd;
+ void (*kernel) (bd_t *, ulong, ulong, ulong, ulong);
image_header_t *hdr = &header;
- char *commandline = getenv ("bootargs");
- char env_buf[12];
- theKernel =
- (void (*)(int, char **, char **, int *)) ntohl (hdr->ih_ep);
+ if ((s = getenv("initrd_high")) != NULL) {
+ /* a value of "no" or a similar string will act like 0,
+ * turning the "load high" feature off. This is intentional.
+ */
+ initrd_high = simple_strtoul(s, NULL, 16);
+ if (initrd_high == ~0)
+ initrd_copy_to_ram = 0;
+ } else { /* not set, no restrictions to load high */
+ initrd_high = ~0;
+ }
+
+#ifdef CONFIG_LOGBUFFER
+ kbd = gd->bd;
+ /* Prevent initrd from overwriting logbuffer */
+ if (initrd_high < (kbd->bi_memsize - LOGBUFF_LEN - LOGBUFF_OVERHEAD))
+ initrd_high = kbd->bi_memsize - LOGBUFF_LEN - LOGBUFF_OVERHEAD;
+ debug("## Logbuffer at 0x%08lX ", kbd->bi_memsize - LOGBUFF_LEN);
+#endif
+
+ /*
+ * Booting a (Linux) kernel image
+ *
+ * Allocate space for command line and board info - the
+ * address should be as high as possible within the reach of
+ * the kernel (see CFG_BOOTMAPSZ settings), but in unused
+ * memory, which means far enough below the current stack
+ * pointer.
+ */
+ asm("movel %%a7, %%d0\n"
+ "movel %%d0, %0\n": "=d"(sp): :"%d0");
+
+ debug("## Current stack ends at 0x%08lX ", sp);
+
+ sp -= 2048; /* just to be sure */
+ if (sp > CFG_BOOTMAPSZ)
+ sp = CFG_BOOTMAPSZ;
+ sp &= ~0xF;
+
+ debug("=> set upper limit to 0x%08lX\n", sp);
+
+ cmdline = (char *)((sp - CFG_BARGSIZE) & ~0xF);
+ kbd = (bd_t *) (((ulong) cmdline - sizeof(bd_t)) & ~0xF);
+
+ if ((s = getenv("bootargs")) == NULL)
+ s = "";
+
+ strcpy(cmdline, s);
+
+ cmd_start = (ulong) & cmdline[0];
+ cmd_end = cmd_start + strlen(cmdline);
+
+ *kbd = *(gd->bd);
+
+#ifdef DEBUG
+ printf("## cmdline at 0x%08lX ... 0x%08lX\n", cmd_start, cmd_end);
+
+ do_bdinfo(NULL, 0, 0, NULL);
+#endif
+
+ if ((s = getenv("clocks_in_mhz")) != NULL) {
+ /* convert all clock information to MHz */
+ kbd->bi_intfreq /= 1000000L;
+ kbd->bi_busfreq /= 1000000L;
+ }
+
+ kernel =
+ (void (*)(bd_t *, ulong, ulong, ulong, ulong))ntohl(hdr->ih_ep);
/*
* Check if there is an initrd image
*/
+
if (argc >= 3) {
- SHOW_BOOT_PROGRESS (9);
+ debug("Not skipping initrd\n");
+ SHOW_BOOT_PROGRESS(9);
- addr = simple_strtoul (argv[2], NULL, 16);
+ addr = simple_strtoul(argv[2], NULL, 16);
- printf ("## Loading Ramdisk Image at %08lx ...\n", addr);
+ printf("## Loading RAMDisk Image at %08lx ...\n", addr);
/* Copy header so we can blank CRC field for re-calculation */
- memcpy (&header, (char *) addr, sizeof (image_header_t));
+ memmove(&header, (char *)addr, sizeof(image_header_t));
- if (ntohl (hdr->ih_magic) != IH_MAGIC) {
- printf ("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS (-10);
- do_reset (cmdtp, flag, argc, argv);
+ if (ntohl(hdr->ih_magic) != IH_MAGIC) {
+ puts("Bad Magic Number\n");
+ SHOW_BOOT_PROGRESS(-10);
+ do_reset(cmdtp, flag, argc, argv);
}
data = (ulong) & header;
- len = sizeof (image_header_t);
+ len = sizeof(image_header_t);
- checksum = ntohl (hdr->ih_hcrc);
+ checksum = ntohl(hdr->ih_hcrc);
hdr->ih_hcrc = 0;
- if (crc32 (0, (char *) data, len) != checksum) {
- printf ("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS (-11);
- do_reset (cmdtp, flag, argc, argv);
+ if (crc32(0, (uchar *) data, len) != checksum) {
+ puts("Bad Header Checksum\n");
+ SHOW_BOOT_PROGRESS(-11);
+ do_reset(cmdtp, flag, argc, argv);
}
- SHOW_BOOT_PROGRESS (10);
+ SHOW_BOOT_PROGRESS(10);
- print_image_hdr (hdr);
+ print_image_hdr(hdr);
- data = addr + sizeof (image_header_t);
- len = ntohl (hdr->ih_size);
+ data = addr + sizeof(image_header_t);
+ len = ntohl(hdr->ih_size);
if (verify) {
ulong csum = 0;
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+ ulong cdata = data, edata = cdata + len;
+#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
- printf (" Verifying Checksum ... ");
- csum = crc32 (0, (char *) data, len);
- if (csum != ntohl (hdr->ih_dcrc)) {
- printf ("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS (-12);
- do_reset (cmdtp, flag, argc, argv);
+ puts(" Verifying Checksum ... ");
+
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+
+ while (cdata < edata) {
+ ulong chunk = edata - cdata;
+
+ if (chunk > CHUNKSZ)
+ chunk = CHUNKSZ;
+ csum = crc32(csum, (uchar *) cdata, chunk);
+ cdata += chunk;
+
+ WATCHDOG_RESET();
}
- printf ("OK\n");
+#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
+ csum = crc32(0, (uchar *) data, len);
+#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
+
+ if (csum != ntohl(hdr->ih_dcrc)) {
+ puts("Bad Data CRC\n");
+ SHOW_BOOT_PROGRESS(-12);
+ do_reset(cmdtp, flag, argc, argv);
+ }
+ puts("OK\n");
}
- SHOW_BOOT_PROGRESS (11);
+ SHOW_BOOT_PROGRESS(11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_M68K) ||
(hdr->ih_type != IH_TYPE_RAMDISK)) {
- printf ("No Linux M68K Ramdisk Image\n");
- SHOW_BOOT_PROGRESS (-13);
- do_reset (cmdtp, flag, argc, argv);
+ puts("No Linux ColdFire Ramdisk Image\n");
+ SHOW_BOOT_PROGRESS(-13);
+ do_reset(cmdtp, flag, argc, argv);
}
/*
* Now check if we have a multifile image
*/
} else if ((hdr->ih_type == IH_TYPE_MULTI) && (len_ptr[1])) {
- ulong tail = ntohl (len_ptr[0]) % 4;
+ u_long tail = ntohl(len_ptr[0]) % 4;
int i;
- SHOW_BOOT_PROGRESS (13);
+ SHOW_BOOT_PROGRESS(13);
/* skip kernel length and terminator */
data = (ulong) (&len_ptr[2]);
@@ -145,130 +227,111 @@
for (i = 1; len_ptr[i]; ++i)
data += 4;
/* add kernel length, and align */
- data += ntohl (len_ptr[0]);
+ data += ntohl(len_ptr[0]);
if (tail) {
data += 4 - tail;
}
- len = ntohl (len_ptr[1]);
+ len = ntohl(len_ptr[1]);
} else {
/*
* no initrd image
*/
- SHOW_BOOT_PROGRESS (14);
+ SHOW_BOOT_PROGRESS(14);
- data = 0;
+ len = data = 0;
}
-#ifdef DEBUG
if (!data) {
- printf ("No initrd\n");
+ debug("No initrd\n");
}
-#endif
if (data) {
- initrd_start = data;
- initrd_end = initrd_start + len;
+ if (!initrd_copy_to_ram) { /* zero-copy ramdisk support */
+ initrd_start = data;
+ initrd_end = initrd_start + len;
+ } else {
+ initrd_start = (ulong) kbd - len;
+ initrd_start &= ~(4096 - 1); /* align on page */
+
+ if (initrd_high) {
+ ulong nsp;
+
+ /*
+ * the inital ramdisk does not need to be within
+ * CFG_BOOTMAPSZ as it is not accessed until after
+ * the mm system is initialised.
+ *
+ * do the stack bottom calculation again and see if
+ * the initrd will fit just below the monitor stack
+ * bottom without overwriting the area allocated
+ * above for command line args and board info.
+ */
+ asm("movel %%a7, %%d0\n"
+ "movel %%d0, %0\n": "=d"(nsp): :"%d0");
+
+ nsp -= 2048; /* just to be sure */
+ nsp &= ~0xF;
+
+ if (nsp > initrd_high) /* limit as specified */
+ nsp = initrd_high;
+
+ nsp -= len;
+ nsp &= ~(4096 - 1); /* align on page */
+
+ if (nsp >= sp)
+ initrd_start = nsp;
+ }
+
+ SHOW_BOOT_PROGRESS(12);
+
+ debug
+ ("## initrd at 0x%08lX ... 0x%08lX (len=%ld=0x%lX)\n",
+ data, data + len - 1, len, len);
+
+ initrd_end = initrd_start + len;
+ printf(" Loading Ramdisk to %08lx, end %08lx ... ",
+ initrd_start, initrd_end);
+#if defined(CONFIG_HW_WATCHDOG) || defined(CONFIG_WATCHDOG)
+ {
+ size_t l = len;
+ void *to = (void *)initrd_start;
+ void *from = (void *)data;
+
+ while (l > 0) {
+ size_t tail =
+ (l > CHUNKSZ) ? CHUNKSZ : l;
+ WATCHDOG_RESET();
+ memmove(to, from, tail);
+ to += tail;
+ from += tail;
+ l -= tail;
+ }
+ }
+#else /* !(CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG) */
+ memmove((void *)initrd_start, (void *)data, len);
+#endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */
+ puts("OK\n");
+ }
} else {
initrd_start = 0;
initrd_end = 0;
}
- SHOW_BOOT_PROGRESS (15);
+ debug("## Transferring control to Linux (at address %08lx) ...\n",
+ (ulong) kernel);
-#ifdef DEBUG
- printf ("## Transferring control to Linux (at address %08lx) ...\n",
- (ulong) theKernel);
-#endif
+ SHOW_BOOT_PROGRESS(15);
- linux_params_init (PHYSADDR (gd->bd->bi_boot_params), commandline);
-
- sprintf (env_buf, "%lu", gd->ram_size >> 20);
- linux_env_set ("memsize", env_buf);
-
- sprintf (env_buf, "0x%08X", (uint) PHYSADDR (initrd_start));
- linux_env_set ("initrd_start", env_buf);
-
- sprintf (env_buf, "0x%X", (uint) (initrd_end - initrd_start));
- linux_env_set ("initrd_size", env_buf);
-
- sprintf (env_buf, "0x%08X", (uint) (gd->bd->bi_flashstart));
- linux_env_set ("flash_start", env_buf);
-
- sprintf (env_buf, "0x%X", (uint) (gd->bd->bi_flashsize));
- linux_env_set ("flash_size", env_buf);
-
- /* we assume that the kernel is in place */
- printf ("\nStarting kernel ...\n\n");
-
- theKernel (linux_argc, linux_argv, linux_env, 0);
-}
-
-static void linux_params_init (ulong start, char *line)
-{
- char *next, *quote, *argp;
-
- linux_argc = 1;
- linux_argv = (char **) start;
- linux_argv[0] = 0;
- argp = (char *) (linux_argv + LINUX_MAX_ARGS);
-
- next = line;
-
- while (line && *line && linux_argc < LINUX_MAX_ARGS) {
- quote = strchr (line, '"');
- next = strchr (line, ' ');
-
- while (next != NULL && quote != NULL && quote < next) {
- /* we found a left quote before the next blank
- * now we have to find the matching right quote
- */
- next = strchr (quote + 1, '"');
- if (next != NULL) {
- quote = strchr (next + 1, '"');
- next = strchr (next + 1, ' ');
- }
- }
-
- if (next == NULL) {
- next = line + strlen (line);
- }
-
- linux_argv[linux_argc] = argp;
- memcpy (argp, line, next - line);
- argp[next - line] = 0;
-
- argp += next - line + 1;
- linux_argc++;
-
- if (*next)
- next++;
-
- line = next;
- }
-
- linux_env = (char **) (((ulong) argp + 15) & ~15);
- linux_env[0] = 0;
- linux_env_p = (char *) (linux_env + LINUX_MAX_ENVS);
- linux_env_idx = 0;
-}
-
-static void linux_env_set (char *env_name, char *env_val)
-{
- if (linux_env_idx < LINUX_MAX_ENVS - 1) {
- linux_env[linux_env_idx] = linux_env_p;
-
- strcpy (linux_env_p, env_name);
- linux_env_p += strlen (env_name);
-
- strcpy (linux_env_p, "=");
- linux_env_p += 1;
-
- strcpy (linux_env_p, env_val);
- linux_env_p += strlen (env_val);
-
- linux_env_p++;
- linux_env[++linux_env_idx] = 0;
- }
+ /*
+ * Linux Kernel Parameters (passing board info data):
+ * r3: ptr to board info data
+ * r4: initrd_start or 0 if no initrd
+ * r5: initrd_end - unused if r4 is 0
+ * r6: Start of command line string
+ * r7: End of command line string
+ */
+ (*kernel) (kbd, initrd_start, initrd_end, cmd_start, cmd_end);
+ /* does not return */
}
diff --git a/lib_m68k/time.c b/lib_m68k/time.c
index 12e38f0..28d371d 100644
--- a/lib_m68k/time.c
+++ b/lib_m68k/time.c
@@ -25,41 +25,26 @@
#include <common.h>
-#include <asm/mcftimer.h>
+#include <asm/timer.h>
+#include <asm/immap.h>
-#ifdef CONFIG_M5271
-#include <asm/m5271.h>
-#include <asm/immap_5271.h>
-#endif
-
-#ifdef CONFIG_M5272
-#include <asm/m5272.h>
-#include <asm/immap_5272.h>
-#endif
-
-#ifdef CONFIG_M5282
-#include <asm/m5282.h>
-#endif
-
-#ifdef CONFIG_M5249
-#include <asm/m5249.h>
-#include <asm/immap_5249.h>
-#endif
-
+DECLARE_GLOBAL_DATA_PTR;
static ulong timestamp;
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
-static unsigned short lastinc;
+
+#if defined(CONFIG_MCFTMR)
+#ifndef CFG_UDELAY_BASE
+# error "uDelay base not defined!"
#endif
+#if !defined(CFG_TMR_BASE) || !defined(CFG_INTR_BASE) || !defined(CFG_TMRINTR_NO) || !defined(CFG_TMRINTR_MASK)
+# error "TMR_BASE, INTR_BASE, TMRINTR_NO or TMRINTR_MASk not defined!"
+#endif
+extern void dtimer_intr_setup(void);
-#if defined(CONFIG_M5272)
-/*
- * We use timer 3 which is running with a period of 1 us
- */
void udelay(unsigned long usec)
{
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE3);
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_UDELAY_BASE);
uint start, now, tmp;
while (usec > 0) {
@@ -70,77 +55,84 @@
usec = usec - tmp;
/* Set up TIMER 3 as timebase clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
- timerp->timer_tcn = 0;
+ timerp->tmr = DTIM_DTMR_RST_RST;
+ timerp->tcn = 0;
/* set period to 1 us */
- timerp->timer_tmr = (((CFG_CLK / 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
+ timerp->tmr =
+ CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 | DTIM_DTMR_FRR |
+ DTIM_DTMR_RST_EN;
- start = now = timerp->timer_tcn;
+ start = now = timerp->tcn;
while (now < start + tmp)
- now = timerp->timer_tcn;
+ now = timerp->tcn;
}
}
-void mcf_timer_interrupt (void * not_used){
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE4);
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
+void dtimer_interrupt(void *not_used)
+{
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
- /* check for timer 4 interrupts */
- if ((intp->int_isr & 0x01000000) != 0) {
+ /* check for timer interrupt asserted */
+ if ((CFG_TMRPND_REG & CFG_TMRINTR_MASK) == CFG_TMRINTR_PEND) {
+ timerp->ter = (DTIM_DTER_CAP | DTIM_DTER_REF);
+ timestamp++;
return;
}
-
- /* reset timer */
- timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
- timestamp ++;
}
-void timer_init (void) {
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE4);
- volatile intctrl_t *intp = (intctrl_t *) (CFG_MBAR + MCFSIM_ICR1);
+void timer_init(void)
+{
+ volatile dtmr_t *timerp = (dtmr_t *) (CFG_TMR_BASE);
timestamp = 0;
+ timerp->tcn = 0;
+ timerp->trr = 0;
+
/* Set up TIMER 4 as clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
+ timerp->tmr = DTIM_DTMR_RST_RST;
- /* initialize and enable timer 4 interrupt */
- irq_install_handler (72, mcf_timer_interrupt, 0);
- intp->int_icr1 |= 0x0000000d;
+ /* initialize and enable timer interrupt */
+ irq_install_handler(CFG_TMRINTR_NO, dtimer_interrupt, 0);
- timerp->timer_tcn = 0;
- timerp->timer_trr = 1000; /* Interrupt every ms */
+ timerp->tcn = 0;
+ timerp->trr = 1000; /* Interrupt every ms */
+
+ dtimer_intr_setup();
+
/* set a period of 1us, set timer mode to restart and enable timer and interrupt */
- timerp->timer_tmr = (((CFG_CLK / 1000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
+ timerp->tmr = CFG_TIMER_PRESCALER | DTIM_DTMR_CLK_DIV1 |
+ DTIM_DTMR_FRR | DTIM_DTMR_ORRI | DTIM_DTMR_RST_EN;
}
-void reset_timer (void)
+void reset_timer(void)
{
timestamp = 0;
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
return (timestamp - base);
}
-void set_timer (ulong t)
+void set_timer(ulong t)
{
timestamp = t;
}
+#endif /* CONFIG_MCFTMR */
+
+#if defined(CONFIG_MCFPIT)
+#if !defined(CFG_PIT_BASE)
+# error "CFG_PIT_BASE not defined!"
#endif
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
+static unsigned short lastinc;
void udelay(unsigned long usec)
{
- volatile unsigned short *timerp;
+ volatile pit_t *timerp = (pit_t *) (CFG_UDELAY_BASE);
uint tmp;
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE3);
-
while (usec > 0) {
if (usec > 65000)
tmp = 65000;
@@ -149,55 +141,41 @@
usec = usec - tmp;
/* Set up TIMER 3 as timebase clock */
- timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
- timerp[MCFTIMER_PMR] = 0;
+ timerp->pcsr = PIT_PCSR_OVW;
+ timerp->pmr = 0;
/* set period to 1 us */
- timerp[MCFTIMER_PCSR] =
-#ifdef CONFIG_M5271
- (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#else /* !CONFIG_M5271 */
- (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#endif /* CONFIG_M5271 */
+ timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN;
- timerp[MCFTIMER_PMR] = tmp;
- while (timerp[MCFTIMER_PCNTR] > 0);
+ timerp->pmr = tmp;
+ while (timerp->pcntr > 0) ;
}
}
-void timer_init (void)
+void timer_init(void)
{
- volatile unsigned short *timerp;
-
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
+ volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
timestamp = 0;
/* Set up TIMER 4 as poll clock */
- timerp[MCFTIMER_PCSR] = MCFTIMER_PCSR_OVW;
- timerp[MCFTIMER_PMR] = lastinc = 0;
- timerp[MCFTIMER_PCSR] =
-#ifdef CONFIG_M5271
- (6 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#else /* !CONFIG_M5271 */
- (5 << 8) | MCFTIMER_PCSR_EN | MCFTIMER_PCSR_OVW;
-#endif /* CONFIG_M5271 */
+ timerp->pcsr = PIT_PCSR_OVW;
+ timerp->pmr = lastinc = 0;
+ timerp->pcsr |= PIT_PCSR_PRE(CFG_PIT_PRESCALE) | PIT_PCSR_EN;
}
-void set_timer (ulong t)
+void set_timer(ulong t)
{
- volatile unsigned short *timerp;
+ volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
timestamp = 0;
- timerp[MCFTIMER_PMR] = lastinc = 0;
+ timerp->pmr = lastinc = 0;
}
-ulong get_timer (ulong base)
+ulong get_timer(ulong base)
{
unsigned short now, diff;
- volatile unsigned short *timerp;
+ volatile pit_t *timerp = (pit_t *) (CFG_PIT_BASE);
- timerp = (volatile unsigned short *) (CFG_MBAR + MCFTIMER_BASE4);
- now = timerp[MCFTIMER_PCNTR];
+ now = timerp->pcntr;
diff = -(now - lastinc);
timestamp += diff;
@@ -205,94 +183,12 @@
return timestamp - base;
}
-void wait_ticks (unsigned long ticks)
+void wait_ticks(unsigned long ticks)
{
- set_timer (0);
- while (get_timer (0) < ticks);
+ set_timer(0);
+ while (get_timer(0) < ticks) ;
}
-#endif
-
-
-#if defined(CONFIG_M5249)
-/*
- * We use timer 1 which is running with a period of 1 us
- */
-void udelay(unsigned long usec)
-{
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE1);
- uint start, now, tmp;
-
- while (usec > 0) {
- if (usec > 65000)
- tmp = 65000;
- else
- tmp = usec;
- usec = usec - tmp;
-
- /* Set up TIMER 1 as timebase clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
- timerp->timer_tcn = 0;
- /* set period to 1 us */
- /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
- timerp->timer_tmr = (((CFG_CLK / 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_FREERUN | MCFTIMER_TMR_ENABLE;
-
- start = now = timerp->timer_tcn;
- while (now < start + tmp)
- now = timerp->timer_tcn;
- }
-}
-
-void mcf_timer_interrupt (void * not_used){
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
-
- /* check for timer 2 interrupts */
- if ((mbar_readLong(MCFSIM_IPR) & 0x00000400) == 0) {
- return;
- }
-
- /* reset timer */
- timerp->timer_ter = MCFTIMER_TER_CAP | MCFTIMER_TER_REF;
- timestamp ++;
-}
-
-void timer_init (void) {
- volatile timer_t *timerp = (timer_t *) (CFG_MBAR + MCFTIMER_BASE2);
-
- timestamp = 0;
-
- /* Set up TIMER 2 as clock */
- timerp->timer_tmr = MCFTIMER_TMR_DISABLE;
-
- /* initialize and enable timer 2 interrupt */
- irq_install_handler (31, mcf_timer_interrupt, 0);
- mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
- mbar_writeByte(MCFSIM_TIMER2ICR, MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3);
-
- timerp->timer_tcn = 0;
- timerp->timer_trr = 1000; /* Interrupt every ms */
- /* set a period of 1us, set timer mode to restart and enable timer and interrupt */
- /* on m5249 the system clock is (cpu_clk / 2) -> divide by 2000000 */
- timerp->timer_tmr = (((CFG_CLK / 2000000) - 1) << 8) | MCFTIMER_TMR_CLK1 |
- MCFTIMER_TMR_RESTART | MCFTIMER_TMR_ENORI | MCFTIMER_TMR_ENABLE;
-}
-
-void reset_timer (void)
-{
- timestamp = 0;
-}
-
-ulong get_timer (ulong base)
-{
- return (timestamp - base);
-}
-
-void set_timer (ulong t)
-{
- timestamp = t;
-}
-#endif
-
+#endif /* CONFIG_MCFPIT */
/*
* This function is derived from PowerPC code (read timebase as long long).
@@ -307,7 +203,7 @@
* This function is derived from PowerPC code (timebase clock frequency).
* On M68K it returns the number of timer ticks per second.
*/
-ulong get_tbclk (void)
+ulong get_tbclk(void)
{
ulong tbclk;
tbclk = CFG_HZ;
diff --git a/lib_microblaze/board.c b/lib_microblaze/board.c
index c95125a..09d4d94 100644
--- a/lib_microblaze/board.c
+++ b/lib_microblaze/board.c
@@ -40,7 +40,7 @@
#ifdef CFG_INTC_0
extern int interrupts_init (void);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
extern int eth_init (bd_t * bis);
extern int getenv_IPaddr (char *);
#endif
@@ -108,7 +108,7 @@
bd_t *bd;
init_fnc_t **init_fnc_ptr;
gd = (gd_t *) CFG_GBL_DATA_OFFSET;
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
ulong flash_size = 0;
#endif
asm ("nop"); /* FIXME gd is not initialize - wait */
@@ -130,7 +130,7 @@
}
}
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
bd->bi_flashstart = CFG_FLASH_BASE;
if (0 < (flash_size = flash_init ())) {
bd->bi_flashsize = flash_size;
@@ -143,7 +143,7 @@
}
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
char *s, *e;
int i;
/* board MAC address */
diff --git a/lib_microblaze/microblaze_linux.c b/lib_microblaze/microblaze_linux.c
index 2c7885c..68b58d4 100644
--- a/lib_microblaze/microblaze_linux.c
+++ b/lib_microblaze/microblaze_linux.c
@@ -32,13 +32,6 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
extern image_header_t header; /* from cmd_bootm.c */
/*cmd_boot.c*/
extern int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]);
@@ -59,7 +52,7 @@
/* Check if there is an initrd image */
if (argc >= 3) {
- SHOW_BOOT_PROGRESS (9);
+ show_boot_progress (9);
addr = simple_strtoul (argv[2], NULL, 16);
@@ -70,7 +63,7 @@
if (ntohl (hdr->ih_magic) != IH_MAGIC) {
printf ("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS (-10);
+ show_boot_progress (-10);
do_reset (cmdtp, flag, argc, argv);
}
@@ -82,11 +75,11 @@
if (crc32 (0, (char *)data, len) != checksum) {
printf ("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS (-11);
+ show_boot_progress (-11);
do_reset (cmdtp, flag, argc, argv);
}
- SHOW_BOOT_PROGRESS (10);
+ show_boot_progress (10);
print_image_hdr (hdr);
@@ -100,19 +93,19 @@
csum = crc32 (0, (char *)data, len);
if (csum != ntohl (hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS (-12);
+ show_boot_progress (-12);
do_reset (cmdtp, flag, argc, argv);
}
printf ("OK\n");
}
- SHOW_BOOT_PROGRESS (11);
+ show_boot_progress (11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_MICROBLAZE) ||
(hdr->ih_type != IH_TYPE_RAMDISK)) {
printf ("No Linux Microblaze Ramdisk Image\n");
- SHOW_BOOT_PROGRESS (-13);
+ show_boot_progress (-13);
do_reset (cmdtp, flag, argc, argv);
}
@@ -122,7 +115,7 @@
} else if ((hdr->ih_type == IH_TYPE_MULTI) && (len_ptr[1])) {
ulong tail = ntohl (len_ptr[0]) % 4;
- SHOW_BOOT_PROGRESS (13);
+ show_boot_progress (13);
/* skip kernel length and terminator */
data = (ulong) (&len_ptr[2]);
@@ -141,7 +134,7 @@
/*
* no initrd image
*/
- SHOW_BOOT_PROGRESS (14);
+ show_boot_progress (14);
data = 0;
}
@@ -160,7 +153,7 @@
initrd_end = 0;
}
- SHOW_BOOT_PROGRESS (15);
+ show_boot_progress (15);
#ifdef DEBUG
printf ("## Transferring control to Linux (at address %08lx) ...\n",
diff --git a/lib_mips/board.c b/lib_mips/board.c
index b7d3356..91ccec0 100644
--- a/lib_mips/board.c
+++ b/lib_mips/board.c
@@ -399,18 +399,18 @@
if ((s = getenv ("loadaddr")) != NULL) {
load_addr = simple_strtoul (s, NULL, 16);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if ((s = getenv ("bootfile")) != NULL) {
copy_filename (BootFile, s, sizeof (BootFile));
}
-#endif /* CFG_CMD_NET */
+#endif
#if defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
misc_init_r ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
puts ("Net: ");
#endif
diff --git a/lib_mips/mips_linux.c b/lib_mips/mips_linux.c
index 952d5a9..556b180 100644
--- a/lib_mips/mips_linux.c
+++ b/lib_mips/mips_linux.c
@@ -33,13 +33,6 @@
#define LINUX_MAX_ENVS 256
#define LINUX_MAX_ARGS 256
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
-# include <status_led.h>
-# define SHOW_BOOT_PROGRESS(arg) show_boot_progress(arg)
-#else
-# define SHOW_BOOT_PROGRESS(arg)
-#endif
-
extern image_header_t header; /* from cmd_bootm.c */
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);
@@ -73,7 +66,7 @@
* Check if there is an initrd image
*/
if (argc >= 3) {
- SHOW_BOOT_PROGRESS (9);
+ show_boot_progress (9);
addr = simple_strtoul (argv[2], NULL, 16);
@@ -84,7 +77,7 @@
if (ntohl (hdr->ih_magic) != IH_MAGIC) {
printf ("Bad Magic Number\n");
- SHOW_BOOT_PROGRESS (-10);
+ show_boot_progress (-10);
do_reset (cmdtp, flag, argc, argv);
}
@@ -96,11 +89,11 @@
if (crc32 (0, (uchar *) data, len) != checksum) {
printf ("Bad Header Checksum\n");
- SHOW_BOOT_PROGRESS (-11);
+ show_boot_progress (-11);
do_reset (cmdtp, flag, argc, argv);
}
- SHOW_BOOT_PROGRESS (10);
+ show_boot_progress (10);
print_image_hdr (hdr);
@@ -114,19 +107,19 @@
csum = crc32 (0, (uchar *) data, len);
if (csum != ntohl (hdr->ih_dcrc)) {
printf ("Bad Data CRC\n");
- SHOW_BOOT_PROGRESS (-12);
+ show_boot_progress (-12);
do_reset (cmdtp, flag, argc, argv);
}
printf ("OK\n");
}
- SHOW_BOOT_PROGRESS (11);
+ show_boot_progress (11);
if ((hdr->ih_os != IH_OS_LINUX) ||
(hdr->ih_arch != IH_CPU_MIPS) ||
(hdr->ih_type != IH_TYPE_RAMDISK)) {
printf ("No Linux MIPS Ramdisk Image\n");
- SHOW_BOOT_PROGRESS (-13);
+ show_boot_progress (-13);
do_reset (cmdtp, flag, argc, argv);
}
@@ -137,7 +130,7 @@
ulong tail = ntohl (len_ptr[0]) % 4;
int i;
- SHOW_BOOT_PROGRESS (13);
+ show_boot_progress (13);
/* skip kernel length and terminator */
data = (ulong) (&len_ptr[2]);
@@ -156,7 +149,7 @@
/*
* no initrd image
*/
- SHOW_BOOT_PROGRESS (14);
+ show_boot_progress (14);
data = 0;
}
@@ -175,7 +168,7 @@
initrd_end = 0;
}
- SHOW_BOOT_PROGRESS (15);
+ show_boot_progress (15);
#ifdef DEBUG
printf ("## Transferring control to Linux (at address %08lx) ...\n",
diff --git a/lib_ppc/board.c b/lib_ppc/board.c
index 24e8e97..9aa67f9 100644
--- a/lib_ppc/board.c
+++ b/lib_ppc/board.c
@@ -35,13 +35,13 @@
#ifdef CONFIG_MPC5xxx
#include <mpc5xxx.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
#include <ide.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#if defined(CONFIG_CMD_SCSI)
#include <scsi.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#include <kgdb.h>
#endif
#ifdef CONFIG_STATUS_LED
@@ -76,18 +76,18 @@
extern int update_flash_size (int flash_size);
#endif
-#if defined(CONFIG_SOLIDCARD3)
+#if defined(CONFIG_SC3)
extern void sc3_read_eeprom(void);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
void doc_init (void);
#endif
#if defined(CONFIG_HARD_I2C) || \
defined(CONFIG_SOFT_I2C)
#include <i2c.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
void nand_init (void);
#endif
@@ -118,7 +118,7 @@
extern ulong _end;
ulong monitor_flash_len;
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
#include <bedbug/type.h>
#endif
@@ -139,10 +139,10 @@
*/
static void mem_malloc_init (void)
{
- ulong dest_addr = CFG_MONITOR_BASE + gd->reloc_off;
-
- mem_malloc_end = dest_addr;
- mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN;
+#if !defined(CONFIG_RELOC_FIXUP_WORKS)
+ mem_malloc_end = CFG_MONITOR_BASE + gd->reloc_off;
+#endif
+ mem_malloc_start = mem_malloc_end - TOTAL_MALLOC_LEN;
mem_malloc_brk = mem_malloc_start;
memset ((void *) mem_malloc_start,
@@ -209,9 +209,12 @@
/***********************************************************************/
-#ifdef CONFIG_ADD_RAM_INFO
-void board_add_ram_info(int);
-#endif
+void __board_add_ram_info(int use_default)
+{
+ /* please define platform specific board_add_ram_info() */
+}
+void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));
+
static int init_func_ram (void)
{
@@ -224,9 +227,7 @@
if ((gd->ram_size = initdram (board_type)) > 0) {
print_size (gd->ram_size, "");
-#ifdef CONFIG_ADD_RAM_INFO
board_add_ram_info(0);
-#endif
putc('\n');
return (0);
}
@@ -309,11 +310,9 @@
prt_8260_rsr,
prt_8260_clks,
#endif /* CONFIG_8260 */
-
#if defined(CONFIG_MPC83XX)
- print_clock_conf,
+ prt_83xx_rsr,
#endif
-
checkcpu,
#if defined(CONFIG_MPC5xxx)
prt_mpc5xxx_clks,
@@ -380,7 +379,7 @@
/* compiler optimization barrier needed for GCC >= 3.4 */
__asm__ __volatile__("": : :"memory");
-#if !defined(CONFIG_CPM2)
+#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC83XX)
/* Clear initial global data */
memset ((void *) gd, 0, sizeof (gd_t));
#endif
@@ -568,7 +567,9 @@
bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
bd->bi_plb_busfreq = gd->bus_clk;
-#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
+ defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
bd->bi_pci_busfreq = get_PCI_freq ();
bd->bi_opbfreq = get_OPB_freq ();
#elif defined(CONFIG_XILINX_ML300)
@@ -622,7 +623,13 @@
bd = gd->bd;
gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
+
+#if defined(CONFIG_RELOC_FIXUP_WORKS)
+ gd->reloc_off = 0;
+ mem_malloc_end = dest_addr;
+#else
gd->reloc_off = dest_addr - CFG_MONITOR_BASE;
+#endif
#ifdef CONFIG_SERIAL_MULTI
serial_initialize();
@@ -781,7 +788,7 @@
spi_init_r ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NAND)
+#if defined(CONFIG_CMD_NAND)
WATCHDOG_RESET ();
puts ("NAND: ");
nand_init(); /* go init the NAND */
@@ -822,7 +829,7 @@
#endif /* CONFIG_405GP, CONFIG_405EP */
#endif /* CFG_EXTBDINFO */
-#if defined(CONFIG_SOLIDCARD3)
+#if defined(CONFIG_SC3)
sc3_read_eeprom();
#endif
s = getenv ("ethaddr");
@@ -898,7 +905,8 @@
#if defined(CONFIG_TQM8xxL) || defined(CONFIG_TQM8260) || \
defined(CONFIG_TQM8272) || \
- defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || defined(CONFIG_KUP4X)
+ defined(CONFIG_CCM) || defined(CONFIG_KUP4K) || \
+ defined(CONFIG_KUP4X) || defined(CONFIG_PCS440EP)
load_sernum_ethaddr ();
#endif
/* IP Address */
@@ -931,7 +939,7 @@
defined(CONFIG_KUP4X) || \
defined(CONFIG_LWMON) || \
defined(CONFIG_PCU_E) || \
- defined(CONFIG_SOLIDCARD3) || \
+ defined(CONFIG_SC3) || \
defined(CONFIG_W7O) || \
defined(CONFIG_MISC_INIT_R)
/* miscellaneous platform dependent initialisations */
@@ -943,7 +951,7 @@
hermes_start_lxt980 ((int) bd->bi_ethspeed);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
WATCHDOG_RESET ();
puts ("KGDB: ");
kgdb_init ();
@@ -963,7 +971,7 @@
serial_buffered_init();
#endif
-#ifdef CONFIG_STATUS_LED
+#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
#endif
@@ -975,27 +983,27 @@
if ((s = getenv ("loadaddr")) != NULL) {
load_addr = simple_strtoul (s, NULL, 16);
}
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
if ((s = getenv ("bootfile")) != NULL) {
copy_filename (BootFile, s, sizeof (BootFile));
}
-#endif /* CFG_CMD_NET */
+#endif
WATCHDOG_RESET ();
-#if (CONFIG_COMMANDS & CFG_CMD_SCSI)
+#if defined(CONFIG_CMD_SCSI)
WATCHDOG_RESET ();
puts ("SCSI: ");
scsi_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DOC)
+#if defined(CONFIG_CMD_DOC)
WATCHDOG_RESET ();
puts ("DOC: ");
doc_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#if defined(CONFIG_NET_MULTI)
WATCHDOG_RESET ();
puts ("Net: ");
@@ -1003,7 +1011,7 @@
eth_initialize (bd);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && ( \
+#if defined(CONFIG_CMD_NET) && ( \
defined(CONFIG_CCM) || \
defined(CONFIG_ELPT860) || \
defined(CONFIG_EP8260) || \
@@ -1028,13 +1036,14 @@
post_run (NULL, POST_RAM | post_bootmode_get(0));
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && !(CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_PCMCIA) \
+ && !defined(CONFIG_CMD_IDE)
WATCHDOG_RESET ();
puts ("PCMCIA:");
pcmcia_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_IDE)
+#if defined(CONFIG_CMD_IDE)
WATCHDOG_RESET ();
# ifdef CONFIG_IDE_8xx_PCCARD
puts ("PCMCIA:");
@@ -1047,7 +1056,7 @@
#else
ide_init ();
#endif
-#endif /* CFG_CMD_IDE */
+#endif
#ifdef CONFIG_LAST_STAGE_INIT
WATCHDOG_RESET ();
@@ -1059,7 +1068,7 @@
last_stage_init ();
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG)
+#if defined(CONFIG_CMD_BEDBUG)
WATCHDOG_RESET ();
bedbug_init ();
#endif
@@ -1118,9 +1127,7 @@
void hang (void)
{
puts ("### ERROR ### Please RESET the board ###\n");
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
show_boot_progress(-30);
-#endif
for (;;);
}
diff --git a/lib_ppc/extable.c b/lib_ppc/extable.c
index b14d661..2d995fa 100644
--- a/lib_ppc/extable.c
+++ b/lib_ppc/extable.c
@@ -52,30 +52,27 @@
const struct exception_table_entry *last,
unsigned long value)
{
- while (first <= last) {
- const struct exception_table_entry *mid;
- long diff;
-
- mid = (last - first) / 2 + first;
- if ((ulong) mid > CFG_MONITOR_BASE) {
- /* exception occurs in FLASH, before u-boot relocation.
- * No relocation offset is needed.
- */
- diff = mid->insn - value;
+ long diff;
+ if ((ulong) first > CFG_MONITOR_BASE) {
+ /* exception occurs in FLASH, before u-boot relocation.
+ * No relocation offset is needed.
+ */
+ while (first <= last) {
+ diff = first->insn - value;
if (diff == 0)
- return mid->fixup;
- } else {
- /* exception occurs in RAM, after u-boot relocation.
- * A relocation offset should be added.
- */
- diff = (mid->insn + gd->reloc_off) - value;
- if (diff == 0)
- return (mid->fixup + gd->reloc_off);
+ return first->fixup;
+ first++;
}
- if (diff < 0)
- first = mid + 1;
- else
- last = mid - 1;
+ } else {
+ /* exception occurs in RAM, after u-boot relocation.
+ * A relocation offset should be added.
+ */
+ while (first <= last) {
+ diff = (first->insn + gd->reloc_off) - value;
+ if (diff == 0)
+ return (first->fixup + gd->reloc_off);
+ first++;
+ }
}
return 0;
}
@@ -92,7 +89,7 @@
/* if the serial port does not hang in exception, printf can be used */
#if !defined(CFG_SERIAL_HANG_IN_EXCEPTION)
if (ex_tab_message)
- printf("Bus Fault @ 0x%08lx, fixup 0x%08lx\n", addr, ret);
+ debug("Bus Fault @ 0x%08lx, fixup 0x%08lx\n", addr, ret);
#endif
if (ret) return ret;
diff --git a/lib_ppc/kgdb.c b/lib_ppc/kgdb.c
index 4c5d79a..78c2f0c 100644
--- a/lib_ppc/kgdb.c
+++ b/lib_ppc/kgdb.c
@@ -1,7 +1,7 @@
#include <common.h>
#include <command.h>
-#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB)
#include <kgdb.h>
#include <asm/signal.h>
@@ -323,4 +323,4 @@
");
}
-#endif /* CFG_CMD_KGDB */
+#endif
diff --git a/libfdt/fdt.c b/libfdt/fdt.c
index 212b838..1ee67ad 100644
--- a/libfdt/fdt.c
+++ b/libfdt/fdt.c
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "config.h"
+#if CONFIG_OF_LIBFDT
+
#include "libfdt_env.h"
#include <fdt.h>
@@ -83,3 +86,5 @@
memmove(buf, fdt, fdt_totalsize(fdt));
return 0;
}
+
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/libfdt/fdt_ro.c b/libfdt/fdt_ro.c
index 4e2c325..46d525d 100644
--- a/libfdt/fdt_ro.c
+++ b/libfdt/fdt_ro.c
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "config.h"
+#if CONFIG_OF_LIBFDT
+
#include "libfdt_env.h"
#include <fdt.h>
@@ -48,6 +51,33 @@
}
/*
+ * Checks if the property name matches.
+ */
+static int prop_name_eq(const void *fdt, int offset, const char *name,
+ struct fdt_property **prop, int *lenp)
+{
+ int namestroff, len;
+
+ *prop = fdt_offset_ptr_typed(fdt, offset, *prop);
+ if (! *prop)
+ return -FDT_ERR_BADSTRUCTURE;
+
+ namestroff = fdt32_to_cpu((*prop)->nameoff);
+ if (streq(fdt_string(fdt, namestroff), name)) {
+ len = fdt32_to_cpu((*prop)->len);
+ *prop = fdt_offset_ptr(fdt, offset,
+ sizeof(**prop) + len);
+ if (*prop) {
+ if (lenp)
+ *lenp = len;
+ return 1;
+ } else
+ return -FDT_ERR_BADSTRUCTURE;
+ }
+ return 0;
+}
+
+/*
* Return a pointer to the string at the given string offset.
*/
char *fdt_string(const void *fdt, int stroffset)
@@ -56,6 +86,118 @@
}
/*
+ * Check if the specified node is compatible by comparing the tokens
+ * in its "compatible" property with the specified string:
+ *
+ * nodeoffset - starting place of the node
+ * compat - the string to match to one of the tokens in the
+ * "compatible" list.
+ */
+int fdt_node_is_compatible(const void *fdt, int nodeoffset,
+ const char *compat)
+{
+ const char* cp;
+ int cplen, len;
+
+ cp = fdt_getprop(fdt, nodeoffset, "compatible", &cplen);
+ if (cp == NULL)
+ return 0;
+ while (cplen > 0) {
+ if (strncmp(cp, compat, strlen(compat)) == 0)
+ return 1;
+ len = strlen(cp) + 1;
+ cp += len;
+ cplen -= len;
+ }
+
+ return 0;
+}
+
+/*
+ * Find a node by its device type property. On success, the offset of that
+ * node is returned or an error code otherwise:
+ *
+ * nodeoffset - the node to start searching from or 0, the node you pass
+ * will not be searched, only the next one will; typically,
+ * you pass 0 to start the search and then what the previous
+ * call returned.
+ * type - the device type string to match against.
+ */
+int fdt_find_node_by_type(const void *fdt, int nodeoffset, const char *type)
+{
+ int offset, nextoffset;
+ struct fdt_property *prop;
+ uint32_t tag;
+ int len, ret;
+
+ CHECK_HEADER(fdt);
+
+ tag = fdt_next_tag(fdt, nodeoffset, &nextoffset, NULL);
+ if (tag != FDT_BEGIN_NODE)
+ return -FDT_ERR_BADOFFSET;
+ if (nodeoffset)
+ nodeoffset = 0; /* start searching with next node */
+
+ while (1) {
+ offset = nextoffset;
+ tag = fdt_next_tag(fdt, offset, &nextoffset, NULL);
+
+ switch (tag) {
+ case FDT_BEGIN_NODE:
+ nodeoffset = offset;
+ break;
+
+ case FDT_PROP:
+ if (nodeoffset == 0)
+ break;
+ ret = prop_name_eq(fdt, offset, "device_type",
+ &prop, &len);
+ if (ret < 0)
+ return ret;
+ else if (ret > 0 &&
+ strncmp(prop->data, type, len - 1) == 0)
+ return nodeoffset;
+ break;
+
+ case FDT_END_NODE:
+ case FDT_NOP:
+ break;
+
+ case FDT_END:
+ return -FDT_ERR_NOTFOUND;
+
+ default:
+ return -FDT_ERR_BADSTRUCTURE;
+ }
+ }
+}
+
+/*
+ * Find a node based on its device type and one of the tokens in its its
+ * "compatible" property. On success, the offset of that node is returned
+ * or an error code otherwise:
+ *
+ * nodeoffset - the node to start searching from or 0, the node you pass
+ * will not be searched, only the next one will; typically,
+ * you pass 0 to start the search and then what the previous
+ * call returned.
+ * type - the device type string to match against.
+ * compat - the string to match to one of the tokens in the
+ * "compatible" list.
+ */
+int fdt_find_compatible_node(const void *fdt, int nodeoffset,
+ const char *type, const char *compat)
+{
+ int offset;
+
+ offset = fdt_find_node_by_type(fdt, nodeoffset, type);
+ if (offset < 0 || fdt_node_is_compatible(fdt, offset, compat))
+ return offset;
+
+ return -FDT_ERR_NOTFOUND;
+}
+
+/*
* Return the node offset of the node specified by:
* parentoffset - starting place (0 to start at the root)
* name - name being searched for
@@ -129,7 +271,7 @@
* Searches for the node corresponding to the given path and returns the
* offset of that node.
*/
-int fdt_path_offset(const void *fdt, const char *path)
+int fdt_find_node_by_path(const void *fdt, const char *path)
{
const char *end = path + strlen(path);
const char *p = path;
@@ -141,6 +283,10 @@
if (*path != '/')
return -FDT_ERR_BADPATH;
+ /* Handle the root path: root offset is 0 */
+ if (strcmp(path, "/") == 0)
+ return 0;
+
while (*p) {
const char *q;
@@ -184,7 +330,6 @@
int level = 0;
uint32_t tag;
struct fdt_property *prop;
- int namestroff;
int offset, nextoffset;
int err;
@@ -224,24 +369,11 @@
if (level != 0)
continue;
- err = -FDT_ERR_BADSTRUCTURE;
- prop = fdt_offset_ptr_typed(fdt, offset, prop);
- if (! prop)
- goto fail;
- namestroff = fdt32_to_cpu(prop->nameoff);
- if (streq(fdt_string(fdt, namestroff), name)) {
- /* Found it! */
- int len = fdt32_to_cpu(prop->len);
- prop = fdt_offset_ptr(fdt, offset,
- sizeof(*prop)+len);
- if (! prop)
- goto fail;
-
- if (lenp)
- *lenp = len;
-
+ err = prop_name_eq(fdt, offset, name, &prop, lenp);
+ if (err > 0)
return prop;
- }
+ else if (err < 0)
+ goto fail;
break;
case FDT_NOP:
@@ -400,3 +532,5 @@
}
return 0;
}
+
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/libfdt/fdt_rw.c b/libfdt/fdt_rw.c
index aaafc53..55fcc41 100644
--- a/libfdt/fdt_rw.c
+++ b/libfdt/fdt_rw.c
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "config.h"
+#if CONFIG_OF_LIBFDT
+
#include "libfdt_env.h"
#include <fdt.h>
@@ -185,6 +188,32 @@
return 0;
}
+/**
+ * fdt_find_and_setprop: Find a node and set it's property
+ *
+ * @fdt: ptr to device tree
+ * @node: path of node
+ * @prop: property name
+ * @val: ptr to new value
+ * @len: length of new property value
+ * @create: flag to create the property if it doesn't exist
+ *
+ * Convenience function to directly set a property given the path to the node.
+ */
+int fdt_find_and_setprop(void *fdt, const char *node, const char *prop,
+ const void *val, int len, int create)
+{
+ int nodeoff = fdt_find_node_by_path(fdt, node);
+
+ if (nodeoff < 0)
+ return nodeoff;
+
+ if ((!create) && (fdt_get_property(fdt, nodeoff, prop, 0) == NULL))
+ return 0; /* create flag not set; so exit quietly */
+
+ return fdt_setprop(fdt, nodeoff, prop, val, len);
+}
+
int fdt_delprop(void *fdt, int nodeoffset, const char *name)
{
struct fdt_property *prop;
@@ -291,3 +320,5 @@
fdt_set_header(fdt, totalsize, _blob_data_size(fdt));
return 0;
}
+
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/libfdt/fdt_strerror.c b/libfdt/fdt_strerror.c
index 7f231ce..b49c952 100644
--- a/libfdt/fdt_strerror.c
+++ b/libfdt/fdt_strerror.c
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "config.h"
+#if CONFIG_OF_LIBFDT
+
#include "libfdt_env.h"
#include <fdt.h>
@@ -62,3 +65,5 @@
return "<unknown error>";
}
+
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/libfdt/fdt_sw.c b/libfdt/fdt_sw.c
index 672f4dd..c7eea8f 100644
--- a/libfdt/fdt_sw.c
+++ b/libfdt/fdt_sw.c
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "config.h"
+#if CONFIG_OF_LIBFDT
+
#include "libfdt_env.h"
#include <fdt.h>
@@ -224,3 +227,5 @@
fdt_set_header(fdt, magic, FDT_MAGIC);
return 0;
}
+
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/libfdt/fdt_wip.c b/libfdt/fdt_wip.c
index 2d2ed37..2d39aab 100644
--- a/libfdt/fdt_wip.c
+++ b/libfdt/fdt_wip.c
@@ -16,6 +16,9 @@
* License along with this library; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
+#include "config.h"
+#if CONFIG_OF_LIBFDT
+
#include "libfdt_env.h"
#include <fdt.h>
@@ -135,3 +138,5 @@
return 0;
}
+
+#endif /* CONFIG_OF_LIBFDT */
diff --git a/nand_spl/board/amcc/acadia/Makefile b/nand_spl/board/amcc/acadia/Makefile
new file mode 100644
index 0000000..926476f
--- /dev/null
+++ b/nand_spl/board/amcc/acadia/Makefile
@@ -0,0 +1,114 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL
+
+SOBJS = start.o resetvec.o
+COBJS = gpio.o nand_boot.o nand_ecc.o memory.o ndfc.o pll.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj := $(OBJTREE)/nand_spl/
+
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin \
+ $(nandobj)System.map
+
+all: $(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl: $(OBJS)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+$(nandobj)System.map: $(nandobj)u-boot-spl
+ @$(NM) $< | \
+ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \
+ sort > $(nandobj)System.map
+
+# create symbolic links for common files
+
+# from cpu directory
+$(obj)gpio.c:
+ @rm -f $(obj)gpio.c
+ ln -s $(SRCTREE)/cpu/ppc4xx/gpio.c $(obj)gpio.c
+
+$(obj)ndfc.c:
+ @rm -f $(obj)ndfc.c
+ ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+
+$(obj)resetvec.S:
+ @rm -f $(obj)resetvec.S
+ ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+
+$(obj)start.S:
+ @rm -f $(obj)start.S
+ ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+
+# from board directory
+$(obj)memory.c:
+ @rm -f $(obj)memory.c
+ ln -s $(SRCTREE)/board/amcc/acadia/memory.c $(obj)memory.c
+
+$(obj)pll.c:
+ @rm -f $(obj)pll.c
+ ln -s $(SRCTREE)/board/amcc/acadia/pll.c $(obj)pll.c
+
+# from nand_spl directory
+$(obj)nand_boot.c:
+ @rm -f $(obj)nand_boot.c
+ ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c
+
+# from drivers/nand directory
+$(obj)nand_ecc.c:
+ @rm -f $(obj)nand_ecc.c
+ ln -s $(SRCTREE)/drivers/nand/nand_ecc.c $(obj)nand_ecc.c
+
+#########################################################################
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/amcc/acadia/config.mk b/nand_spl/board/amcc/acadia/config.mk
new file mode 100644
index 0000000..3b140fa
--- /dev/null
+++ b/nand_spl/board/amcc/acadia/config.mk
@@ -0,0 +1,47 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# AMCC 405EZ Reference Platform (Acadia) board
+#
+
+#
+# TEXT_BASE for SPL:
+#
+# On 4xx platforms the SPL is located at 0xfffff000...0xffffffff,
+# in the last 4kBytes of memory space in cache.
+# We will copy this SPL into internal SRAM in start.S. So we set
+# TEXT_BASE to starting address in internal SRAM here.
+#
+TEXT_BASE = 0xf8004000
+
+# PAD_TO used to generate a 16kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 0x4000
+PAD_TO = 0xf8008000
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
+endif
diff --git a/nand_spl/board/amcc/acadia/u-boot.lds b/nand_spl/board/amcc/acadia/u-boot.lds
new file mode 100644
index 0000000..a07a773
--- /dev/null
+++ b/nand_spl/board/amcc/acadia/u-boot.lds
@@ -0,0 +1,63 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc:common)
+SECTIONS
+{
+ .resetvec 0xf8004ffc :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ .text :
+ {
+ start.o (.text)
+ nand_boot.o (.text)
+ ndfc.o (.text)
+
+ *(.text)
+ *(.fixup)
+ }
+ _etext = .;
+
+ .data :
+ {
+ *(.rodata*)
+ *(.data*)
+ *(.sdata*)
+ __got2_start = .;
+ *(.got2)
+ __got2_end = .;
+ }
+
+ _edata = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss)
+ *(.bss)
+ }
+
+ _end = . ;
+}
diff --git a/nand_spl/board/amcc/bamboo/Makefile b/nand_spl/board/amcc/bamboo/Makefile
new file mode 100644
index 0000000..8b5461d
--- /dev/null
+++ b/nand_spl/board/amcc/bamboo/Makefile
@@ -0,0 +1,106 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+include $(TOPDIR)/nand_spl/board/$(BOARDDIR)/config.mk
+
+LDSCRIPT= $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDFLAGS = -Bstatic -T $(LDSCRIPT) -Ttext $(TEXT_BASE) $(PLATFORM_LDFLAGS)
+AFLAGS += -DCONFIG_NAND_SPL
+CFLAGS += -DCONFIG_NAND_SPL
+
+SOBJS = start.o init.o resetvec.o
+COBJS = nand_boot.o nand_ecc.o ndfc.o sdram.o
+
+SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
+OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
+__OBJS := $(SOBJS) $(COBJS)
+LNDIR := $(OBJTREE)/nand_spl/board/$(BOARDDIR)
+
+nandobj := $(OBJTREE)/nand_spl/
+
+ALL = $(nandobj)u-boot-spl $(nandobj)u-boot-spl.bin $(nandobj)u-boot-spl-16k.bin
+
+all: $(obj).depend $(ALL)
+
+$(nandobj)u-boot-spl-16k.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(nandobj)u-boot-spl.bin: $(nandobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(nandobj)u-boot-spl: $(OBJS)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \
+ -Map $(nandobj)u-boot-spl.map \
+ -o $(nandobj)u-boot-spl
+
+# create symbolic links for common files
+
+# from cpu directory
+$(obj)ndfc.c:
+ @rm -f $(obj)ndfc.c
+ ln -s $(SRCTREE)/cpu/ppc4xx/ndfc.c $(obj)ndfc.c
+
+$(obj)resetvec.S:
+ @rm -f $(obj)resetvec.S
+ ln -s $(SRCTREE)/cpu/ppc4xx/resetvec.S $(obj)resetvec.S
+
+$(obj)start.S:
+ @rm -f $(obj)start.S
+ ln -s $(SRCTREE)/cpu/ppc4xx/start.S $(obj)start.S
+
+# from board directory
+$(obj)init.S:
+ @rm -f $(obj)init.S
+ ln -s $(SRCTREE)/board/amcc/bamboo/init.S $(obj)init.S
+
+# from nand_spl directory
+$(obj)nand_boot.c:
+ @rm -f $(obj)nand_boot.c
+ ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c
+
+# from drivers/nand directory
+$(obj)nand_ecc.c:
+ @rm -f $(obj)nand_ecc.c
+ ln -s $(SRCTREE)/drivers/nand/nand_ecc.c $(obj)nand_ecc.c
+
+ifneq ($(OBJTREE), $(SRCTREE))
+$(obj)sdram.c:
+ @rm -f $(obj)sdram.c
+ ln -s $(SRCTREE)/nand_spl/board/$(BOARDDIR)/sdram.c $(obj)sdram.c
+endif
+
+#########################################################################
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/amcc/bamboo/config.mk b/nand_spl/board/amcc/bamboo/config.mk
new file mode 100644
index 0000000..f7ec751
--- /dev/null
+++ b/nand_spl/board/amcc/bamboo/config.mk
@@ -0,0 +1,49 @@
+#
+# (C) Copyright 2007
+# Stefan Roese, DENX Software Engineering, sr@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+#
+# AMCC 440EP Reference Platform (Bamboo) board
+#
+
+#
+# TEXT_BASE for SPL:
+#
+# On 440EP(x) platforms the SPL is located at 0xfffff000...0xffffffff,
+# in the last 4kBytes of memory space in cache.
+# We will copy this SPL into instruction-cache in start.S. So we set
+# TEXT_BASE to starting address in i-cache here.
+#
+TEXT_BASE = 0x00800000
+
+# PAD_TO used to generate a 16kByte binary needed for the combined image
+# -> PAD_TO = TEXT_BASE + 0x4000
+PAD_TO = 0x00804000
+
+PLATFORM_CPPFLAGS += -DCONFIG_440=1
+
+ifeq ($(debug),1)
+PLATFORM_CPPFLAGS += -DDEBUG
+endif
+
+ifeq ($(dbcr),1)
+PLATFORM_CPPFLAGS += -DCFG_INIT_DBCR=0x8cff0000
+endif
diff --git a/nand_spl/board/amcc/bamboo/sdram.c b/nand_spl/board/amcc/bamboo/sdram.c
new file mode 100644
index 0000000..4f09072
--- /dev/null
+++ b/nand_spl/board/amcc/bamboo/sdram.c
@@ -0,0 +1,92 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+#include <asm/io.h>
+
+static void wait_init_complete(void)
+{
+ u32 val;
+
+ do {
+ mfsdram(mem_mcsts, val);
+ } while (!(val & 0x80000000));
+}
+
+/*
+ * early_sdram_init()
+ *
+ * As the name already indicates, this function is called very early
+ * from start.S and configures the SDRAM with fixed values. This is needed,
+ * since the 440EP has no internal SRAM and the 4kB NAND_SPL loader has
+ * not enough free space to implement the complete I2C SPD DDR autodetection
+ * routines. Therefore the Bamboo only supports the onboard 64MBytes of SDRAM
+ * when booting from NAND flash.
+ */
+void early_sdram_init(void)
+{
+ /*
+ * Soft-reset SDRAM controller.
+ */
+ mtsdr(sdr_srst, SDR0_SRST_DMC);
+ mtsdr(sdr_srst, 0x00000000);
+
+ /*
+ * Disable memory controller.
+ */
+ mtsdram(mem_cfg0, 0x00000000);
+
+ /*
+ * Setup some default
+ */
+ mtsdram(mem_uabba, 0x00000000); /* ubba=0 (default) */
+ mtsdram(mem_slio, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
+ mtsdram(mem_devopt, 0x00000000); /* dll=0 ds=0 (normal) */
+ mtsdram(mem_wddctr, 0x00000000); /* wrcp=0 dcd=0 */
+ mtsdram(mem_clktr, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
+
+ /*
+ * Following for CAS Latency = 2.5 @ 133 MHz PLB
+ */
+ mtsdram(mem_b0cr, 0x00082001);
+ mtsdram(mem_tr0, 0x41094012);
+ mtsdram(mem_tr1, 0x8080083d); /* SS=T2 SL=STAGE 3 CD=1 CT=0x00*/
+ mtsdram(mem_rtr, 0x04100000); /* Interval 7.8µs @ 133MHz PLB */
+ mtsdram(mem_cfg1, 0x00000000); /* Self-refresh exit, disable PM*/
+
+ /*
+ * Enable the controller, then wait for DCEN to complete
+ */
+ mtsdram(mem_cfg0, 0x80000000); /* DCEN=1, PMUD=0*/
+ wait_init_complete();
+}
+
+long int initdram(int board_type)
+{
+ /*
+ * Nothing to do here, just return size of fixed SDRAM setup
+ */
+ return CFG_MBYTES_SDRAM << 20;
+}
diff --git a/nand_spl/board/amcc/bamboo/u-boot.lds b/nand_spl/board/amcc/bamboo/u-boot.lds
new file mode 100644
index 0000000..28228f8
--- /dev/null
+++ b/nand_spl/board/amcc/bamboo/u-boot.lds
@@ -0,0 +1,65 @@
+/*
+ * (C) Copyright 2007
+ * Stefan Roese, DENX Software Engineering, sr@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc:common)
+SECTIONS
+{
+ .resetvec 0x00800FFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ .text :
+ {
+ start.o (.text)
+ init.o (.text)
+ nand_boot.o (.text)
+ sdram.o (.text)
+ ndfc.o (.text)
+
+ *(.text)
+ *(.fixup)
+ }
+ _etext = .;
+
+ .data :
+ {
+ *(.rodata*)
+ *(.data*)
+ *(.sdata*)
+ __got2_start = .;
+ *(.got2)
+ __got2_end = .;
+ }
+
+ _edata = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss)
+ *(.bss)
+ }
+
+ _end = . ;
+}
diff --git a/nand_spl/board/amcc/sequoia/Makefile b/nand_spl/board/amcc/sequoia/Makefile
index b42da8c..ec1be5a 100644
--- a/nand_spl/board/amcc/sequoia/Makefile
+++ b/nand_spl/board/amcc/sequoia/Makefile
@@ -1,5 +1,5 @@
#
-# (C) Copyright 2006
+# (C) Copyright 2006-2007
# Stefan Roese, DENX Software Engineering, sr@denx.de.
#
# See file CREDITS for list of people who contributed to this
@@ -30,7 +30,7 @@
CFLAGS += -DCONFIG_NAND_SPL
SOBJS = start.o init.o resetvec.o
-COBJS = nand_boot.o ndfc.o sdram.o
+COBJS = nand_boot.o nand_ecc.o ndfc.o sdram.o
SRCS := $(addprefix $(obj),$(SOBJS:.o=.S) $(COBJS:.o=.c))
OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
@@ -85,6 +85,11 @@
@rm -f $(obj)nand_boot.c
ln -s $(SRCTREE)/nand_spl/nand_boot.c $(obj)nand_boot.c
+# from drivers/nand directory
+$(obj)nand_ecc.c:
+ @rm -f $(obj)nand_ecc.c
+ ln -s $(SRCTREE)/drivers/nand/nand_ecc.c $(obj)nand_ecc.c
+
#########################################################################
$(obj)%.o: $(obj)%.S
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index a136fb7..840a596 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2006
+ * (C) Copyright 2006-2007
* Stefan Roese, DENX Software Engineering, sr@denx.de.
*
* This program is free software; you can redistribute it and/or
@@ -24,27 +24,28 @@
#define CFG_NAND_READ_DELAY \
{ volatile int dummy; int i; for (i=0; i<10000; i++) dummy = i; }
-extern void board_nand_init(struct nand_chip *nand);
-extern void ndfc_hwcontrol(struct mtd_info *mtdinfo, int cmd);
-extern void ndfc_write_byte(struct mtd_info *mtdinfo, u_char byte);
-extern u_char ndfc_read_byte(struct mtd_info *mtdinfo);
-extern int ndfc_dev_ready(struct mtd_info *mtdinfo);
-extern int jump_to_ram(ulong delta);
-extern int jump_to_uboot(ulong addr);
+static int nand_ecc_pos[] = CFG_NAND_ECCPOS;
-static int nand_is_bad_block(struct mtd_info *mtd, int block)
+extern void board_nand_init(struct nand_chip *nand);
+
+static int nand_command(struct mtd_info *mtd, int block, int page, int offs, u8 cmd)
{
struct nand_chip *this = mtd->priv;
- int page_addr = block * CFG_NAND_PAGE_COUNT;
+ int page_addr = page + block * CFG_NAND_PAGE_COUNT;
+
+ if (this->dev_ready)
+ this->dev_ready(mtd);
+ else
+ CFG_NAND_READ_DELAY;
/* Begin command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
- this->write_byte(mtd, NAND_CMD_READOOB);
+ this->write_byte(mtd, cmd);
/* Set ALE and clear CLE to start address cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
this->hwcontrol(mtd, NAND_CTL_SETALE);
/* Column address */
- this->write_byte(mtd, CFG_NAND_BAD_BLOCK_POS); /* A[7:0] */
+ this->write_byte(mtd, offs); /* A[7:0] */
this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
#ifdef CFG_NAND_4_ADDR_CYCLE
@@ -62,6 +63,15 @@
else
CFG_NAND_READ_DELAY;
+ return 0;
+}
+
+static int nand_is_bad_block(struct mtd_info *mtd, int block)
+{
+ struct nand_chip *this = mtd->priv;
+
+ nand_command(mtd, block, 0, CFG_NAND_BAD_BLOCK_POS, NAND_CMD_READOOB);
+
/*
* Read on byte
*/
@@ -74,39 +84,46 @@
static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
{
struct nand_chip *this = mtd->priv;
- int page_addr = page + block * CFG_NAND_PAGE_COUNT;
+ u_char *ecc_calc;
+ u_char *ecc_code;
+ u_char *oob_data;
int i;
+ int eccsize = CFG_NAND_ECCSIZE;
+ int eccbytes = CFG_NAND_ECCBYTES;
+ int eccsteps = CFG_NAND_ECCSTEPS;
+ uint8_t *p = dst;
+ int stat;
- /* Begin command latch cycle */
- this->hwcontrol(mtd, NAND_CTL_SETCLE);
- this->write_byte(mtd, NAND_CMD_READ0);
- /* Set ALE and clear CLE to start address cycle */
- this->hwcontrol(mtd, NAND_CTL_CLRCLE);
- this->hwcontrol(mtd, NAND_CTL_SETALE);
- /* Column address */
- this->write_byte(mtd, 0); /* A[7:0] */
- this->write_byte(mtd, (uchar)(page_addr & 0xff)); /* A[16:9] */
- this->write_byte(mtd, (uchar)((page_addr >> 8) & 0xff)); /* A[24:17] */
-#ifdef CFG_NAND_4_ADDR_CYCLE
- /* One more address cycle for devices > 32MiB */
- this->write_byte(mtd, (uchar)((page_addr >> 16) & 0x0f)); /* A[xx:25] */
-#endif
- /* Latch in address */
- this->hwcontrol(mtd, NAND_CTL_CLRALE);
+ nand_command(mtd, block, page, 0, NAND_CMD_READ0);
- /*
- * Wait a while for the data to be ready
+ /* No malloc available for now, just use some temporary locations
+ * in SDRAM
*/
- if (this->dev_ready)
- this->dev_ready(mtd);
- else
- CFG_NAND_READ_DELAY;
+ ecc_calc = (u_char *)(CFG_SDRAM_BASE + 0x10000);
+ ecc_code = ecc_calc + 0x100;
+ oob_data = ecc_calc + 0x200;
- /*
- * Read page into buffer
- */
- for (i=0; i<CFG_NAND_PAGE_SIZE; i++)
- *dst++ = this->read_byte(mtd);
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ this->enable_hwecc(mtd, NAND_ECC_READ);
+ this->read_buf(mtd, p, eccsize);
+ this->calculate_ecc(mtd, p, &ecc_calc[i]);
+ }
+ this->read_buf(mtd, oob_data, CFG_NAND_OOBSIZE);
+
+ /* Pick the ECC bytes out of the oob data */
+ for (i = 0; i < CFG_NAND_ECCTOTAL; i++)
+ ecc_code[i] = oob_data[nand_ecc_pos[i]];
+
+ eccsteps = CFG_NAND_ECCSTEPS;
+ p = dst;
+
+ for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ /* No chance to do something with the possible error message
+ * from correct_data(). We just hope that all possible errors
+ * are corrected by this routine.
+ */
+ stat = this->correct_data(mtd, p, &ecc_code[i], &ecc_calc[i]);
+ }
return 0;
}
diff --git a/net/bootp.c b/net/bootp.c
index 1de9a8f..749d3e5 100644
--- a/net/bootp.c
+++ b/net/bootp.c
@@ -31,7 +31,7 @@
#define BOOTP_VENDOR_MAGIC 0x63825363 /* RFC1048 Magic Cookie */
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#define TIMEOUT 5 /* Seconds before trying BOOTP again */
#ifndef CONFIG_NET_RETRY_COUNT
@@ -53,7 +53,7 @@
ulong seed1, seed2;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
dhcp_state_t dhcp_state = INIT;
unsigned long dhcp_leasetime = 0;
IPaddr_t NetDHCPServerIP = 0;
@@ -76,12 +76,12 @@
}
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX)
+#if defined(CONFIG_BOOTP_VENDOREX)
extern u8 *dhcp_vendorex_prep (u8 *e); /*rtn new e after add own opts. */
extern u8 *dhcp_vendorex_proc (u8 *e); /*rtn next e if mine,else NULL */
#endif
-#endif /* CFG_CMD_DHCP */
+#endif
static int BootpCheckPkt(uchar *pkt, unsigned dest, unsigned src, unsigned len)
{
@@ -120,10 +120,12 @@
IPaddr_t tmp_ip;
NetCopyIP(&NetOurIP, &bp->bp_yiaddr);
+#if !defined(CONFIG_BOOTP_SERVERIP)
NetCopyIP(&tmp_ip, &bp->bp_siaddr);
if (tmp_ip != 0)
NetCopyIP(&NetServerIP, &bp->bp_siaddr);
memcpy (NetServerEther, ((Ethernet_t *)NetRxPkt)->et_src, 6);
+#endif
if (strlen(bp->bp_file) > 0)
copy_filename (BootFile, bp->bp_file, sizeof(BootFile));
@@ -148,7 +150,7 @@
return (curlen);
}
-#if !(CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if !defined(CONFIG_CMD_DHCP)
static void BootpVendorFieldProcess (u8 * ext)
{
@@ -181,7 +183,7 @@
if (NetOurDNSIP == 0) {
NetCopyIP (&NetOurDNSIP, (IPaddr_t *) (ext + 2));
}
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS2)
+#if defined(CONFIG_BOOTP_DNS2)
if ((NetOurDNS2IP == 0) && (size > 4)) {
NetCopyIP (&NetOurDNS2IP, (IPaddr_t *) (ext + 2 + 4));
}
@@ -344,7 +346,7 @@
*/
NetState = NETLOOP_SUCCESS;
return;
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
} else if (strcmp(s, "NFS") == 0) {
/*
* Use NFS to load the bootfile.
@@ -357,7 +359,7 @@
TftpStart();
}
-#endif /* !CFG_CMD_DHCP */
+#endif
/*
* Timeout on BOOTP/DHCP request.
@@ -377,16 +379,16 @@
/*
* Initialize BOOTP extension fields in the request.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
static int DhcpExtended (u8 * e, int message_type, IPaddr_t ServerID, IPaddr_t RequestedIP)
{
u8 *start = e;
u8 *cnt;
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX)
+#if defined(CONFIG_BOOTP_VENDOREX)
u8 *x;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_SEND_HOSTNAME)
+#if defined(CONFIG_BOOTP_SEND_HOSTNAME)
char *hostname;
#endif
@@ -425,7 +427,7 @@
*e++ = tmp >> 8;
*e++ = tmp & 0xff;
}
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_SEND_HOSTNAME)
+#if defined(CONFIG_BOOTP_SEND_HOSTNAME)
if ((hostname = getenv ("hostname"))) {
int hostnamelen = strlen (hostname);
@@ -436,7 +438,7 @@
}
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX)
+#if defined(CONFIG_BOOTP_VENDOREX)
if ((x = dhcp_vendorex_prep (e)))
return x - start;
#endif
@@ -444,39 +446,39 @@
*e++ = 55; /* Parameter Request List */
cnt = e++; /* Pointer to count of requested items */
*cnt = 0;
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_SUBNETMASK)
+#if defined(CONFIG_BOOTP_SUBNETMASK)
*e++ = 1; /* Subnet Mask */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_TIMEOFFSET)
+#if defined(CONFIG_BOOTP_TIMEOFFSET)
*e++ = 2;
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_GATEWAY)
+#if defined(CONFIG_BOOTP_GATEWAY)
*e++ = 3; /* Router Option */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS)
+#if defined(CONFIG_BOOTP_DNS)
*e++ = 6; /* DNS Server(s) */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_HOSTNAME)
+#if defined(CONFIG_BOOTP_HOSTNAME)
*e++ = 12; /* Hostname */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTFILESIZE)
+#if defined(CONFIG_BOOTP_BOOTFILESIZE)
*e++ = 13; /* Boot File Size */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTPATH)
+#if defined(CONFIG_BOOTP_BOOTPATH)
*e++ = 17; /* Boot path */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NISDOMAIN)
+#if defined(CONFIG_BOOTP_NISDOMAIN)
*e++ = 40; /* NIS Domain name request */
*cnt += 1;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NTPSERVER)
+#if defined(CONFIG_BOOTP_NTPSERVER)
*e++ = 42;
*cnt += 1;
#endif
@@ -491,9 +493,9 @@
return e - start;
}
-#else /* CFG_CMD_DHCP */
+#else
/*
- * Warning: no field size check - change CONFIG_BOOTP_MASK at your own risk!
+ * Warning: no field size check - change CONFIG_BOOTP_* at your own risk!
*/
static int BootpExtended (u8 * e)
{
@@ -504,7 +506,7 @@
*e++ = 83;
*e++ = 99;
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
*e++ = 53; /* DHCP Message Type */
*e++ = 1;
*e++ = DHCP_DISCOVER;
@@ -513,45 +515,45 @@
*e++ = 2;
*e++ = (576 - 312 + OPT_SIZE) >> 16;
*e++ = (576 - 312 + OPT_SIZE) & 0xff;
-#endif /* CFG_CMD_DHCP */
+#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_SUBNETMASK)
+#if defined(CONFIG_BOOTP_SUBNETMASK)
*e++ = 1; /* Subnet mask request */
*e++ = 4;
e += 4;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_GATEWAY)
+#if defined(CONFIG_BOOTP_GATEWAY)
*e++ = 3; /* Default gateway request */
*e++ = 4;
e += 4;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS)
+#if defined(CONFIG_BOOTP_DNS)
*e++ = 6; /* Domain Name Server */
*e++ = 4;
e += 4;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_HOSTNAME)
+#if defined(CONFIG_BOOTP_HOSTNAME)
*e++ = 12; /* Host name request */
*e++ = 32;
e += 32;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTFILESIZE)
+#if defined(CONFIG_BOOTP_BOOTFILESIZE)
*e++ = 13; /* Boot file size */
*e++ = 2;
e += 2;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_BOOTPATH)
+#if defined(CONFIG_BOOTP_BOOTPATH)
*e++ = 17; /* Boot path */
*e++ = 32;
e += 32;
#endif
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NISDOMAIN)
+#if defined(CONFIG_BOOTP_NISDOMAIN)
*e++ = 40; /* NIS Domain name request */
*e++ = 32;
e += 32;
@@ -561,7 +563,7 @@
return e - start;
}
-#endif /* CFG_CMD_DHCP */
+#endif
void
BootpRequest (void)
@@ -570,7 +572,7 @@
Bootp_t *bp;
int ext_len, pktlen, iplen;
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
dhcp_state = INIT;
#endif
@@ -678,11 +680,11 @@
copy_filename (bp->bp_file, BootFile, sizeof(bp->bp_file));
/* Request additional information from the BOOTP/DHCP server */
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
ext_len = DhcpExtended((u8 *)bp->bp_vend, DHCP_DISCOVER, 0, 0);
#else
ext_len = BootpExtended((u8 *)bp->bp_vend);
-#endif /* CFG_CMD_DHCP */
+#endif
/*
* Bootp ID is the lower 4 bytes of our ethernet address
@@ -705,16 +707,16 @@
NetSetIP(iphdr, 0xFFFFFFFFL, PORT_BOOTPS, PORT_BOOTPC, iplen);
NetSetTimeout(SELECT_TIMEOUT * CFG_HZ, BootpTimeout);
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
dhcp_state = SELECTING;
NetSetHandler(DhcpHandler);
#else
NetSetHandler(BootpHandler);
-#endif /* CFG_CMD_DHCP */
+#endif
NetSendPacket(NetTxPacket, pktlen);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
static void DhcpOptionsProcess (uchar * popt, Bootp_t *bp)
{
uchar *end = popt + BOOTP_HDR_SIZE;
@@ -726,9 +728,9 @@
case 1:
NetCopyIP (&NetOurSubnetMask, (popt + 2));
break;
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP) && (CONFIG_BOOTP_MASK & CONFIG_BOOTP_TIMEOFFSET)
+#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_TIMEOFFSET)
case 2: /* Time offset */
- NetCopyLong (&NetTimeOffset, (ulong *) (popt + 2));
+ NetCopyLong ((ulong *)&NetTimeOffset, (ulong *) (popt + 2));
NetTimeOffset = ntohl (NetTimeOffset);
break;
#endif
@@ -737,7 +739,7 @@
break;
case 6:
NetCopyIP (&NetOurDNSIP, (popt + 2));
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS2)
+#if defined(CONFIG_BOOTP_DNS2)
if (*(popt + 1) > 4) {
NetCopyIP (&NetOurDNS2IP, (popt + 2 + 4));
}
@@ -755,7 +757,7 @@
memcpy (&NetOurRootPath, popt + 2, size);
NetOurRootPath[size] = 0;
break;
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP) && (CONFIG_BOOTP_MASK & CONFIG_BOOTP_NTPSERVER)
+#if defined(CONFIG_CMD_SNTP) && defined(CONFIG_BOOTP_NTPSERVER)
case 42: /* NTP server IP */
NetCopyIP (&NetNtpServerIP, (popt + 2));
break;
@@ -801,7 +803,7 @@
}
break;
default:
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX)
+#if defined(CONFIG_BOOTP_VENDOREX)
if (dhcp_vendorex_proc (popt))
break;
#endif
@@ -950,7 +952,7 @@
*/
NetState = NETLOOP_SUCCESS;
return;
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
} else if (strcmp(s, "NFS") == 0) {
/*
* Use NFS to load the bootfile.
@@ -975,6 +977,6 @@
{
BootpRequest();
}
-#endif /* CFG_CMD_DHCP */
+#endif
-#endif /* CFG_CMD_NET */
+#endif
diff --git a/net/bootp.h b/net/bootp.h
index 0b31639..ba9826e 100644
--- a/net/bootp.h
+++ b/net/bootp.h
@@ -18,7 +18,7 @@
/*
* BOOTP header.
*/
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
#define OPT_SIZE 312 /* Minimum DHCP Options size per RFC2131 - results in 576 byte pkt */
#else
#define OPT_SIZE 64
diff --git a/net/eth.c b/net/eth.c
index 0fc2211..e7f1220 100644
--- a/net/eth.c
+++ b/net/eth.c
@@ -26,7 +26,7 @@
#include <net.h>
#include <miiphy.h>
-#if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI)
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_NET_MULTI)
#ifdef CFG_GT_6426x
extern int gt6426x_eth_initialize(bd_t *bis);
@@ -40,6 +40,7 @@
extern int fec_initialize(bd_t*);
extern int inca_switch_initialize(bd_t*);
extern int mpc5xxx_fec_initialize(bd_t*);
+extern int mpc512x_fec_initialize(bd_t*);
extern int mpc8220_fec_initialize(bd_t*);
extern int mv6436x_eth_initialize(bd_t *);
extern int mv6446x_eth_initialize(bd_t *);
@@ -58,6 +59,7 @@
extern int uec_initialize(int);
extern int bfin_EMAC_initialize(bd_t *);
extern int atstk1000_eth_initialize(bd_t *);
+extern int mcffec_initialize(bd_t*);
static struct eth_device *eth_devices, *eth_current;
@@ -142,7 +144,8 @@
eth_devices = NULL;
eth_current = NULL;
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+ show_boot_progress (64);
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_init();
#endif
@@ -167,34 +170,29 @@
#if defined(CONFIG_MPC5xxx_FEC)
mpc5xxx_fec_initialize(bis);
#endif
+#if defined(CONFIG_MPC512x_FEC)
+ mpc512x_fec_initialize (bis);
+#endif
#if defined(CONFIG_MPC8220_FEC)
mpc8220_fec_initialize(bis);
#endif
#if defined(CONFIG_SK98)
skge_initialize(bis);
#endif
-#if defined(CONFIG_MPC85XX_TSEC1)
- tsec_initialize(bis, 0, CONFIG_MPC85XX_TSEC1_NAME);
-#elif defined(CONFIG_MPC83XX_TSEC1)
- tsec_initialize(bis, 0, CONFIG_MPC83XX_TSEC1_NAME);
+#if defined(CONFIG_TSEC1)
+ tsec_initialize(bis, 0, CONFIG_TSEC1_NAME);
#endif
-#if defined(CONFIG_MPC85XX_TSEC2)
- tsec_initialize(bis, 1, CONFIG_MPC85XX_TSEC2_NAME);
-#elif defined(CONFIG_MPC83XX_TSEC2)
- tsec_initialize(bis, 1, CONFIG_MPC83XX_TSEC2_NAME);
+#if defined(CONFIG_TSEC2)
+ tsec_initialize(bis, 1, CONFIG_TSEC2_NAME);
#endif
#if defined(CONFIG_MPC85XX_FEC)
tsec_initialize(bis, 2, CONFIG_MPC85XX_FEC_NAME);
#else
-# if defined(CONFIG_MPC85XX_TSEC3)
- tsec_initialize(bis, 2, CONFIG_MPC85XX_TSEC3_NAME);
-# elif defined(CONFIG_MPC83XX_TSEC3)
- tsec_initialize(bis, 2, CONFIG_MPC83XX_TSEC3_NAME);
+# if defined(CONFIG_TSEC3)
+ tsec_initialize(bis, 2, CONFIG_TSEC3_NAME);
# endif
-# if defined(CONFIG_MPC85XX_TSEC4)
- tsec_initialize(bis, 3, CONFIG_MPC85XX_TSEC4_NAME);
-# elif defined(CONFIG_MPC83XX_TSEC4)
- tsec_initialize(bis, 3, CONFIG_MPC83XX_TSEC4_NAME);
+# if defined(CONFIG_TSEC4)
+ tsec_initialize(bis, 3, CONFIG_TSEC4_NAME);
# endif
#endif
#if defined(CONFIG_UEC_ETH1)
@@ -203,21 +201,6 @@
#if defined(CONFIG_UEC_ETH2)
uec_initialize(1);
#endif
-#if defined(CONFIG_MPC86XX_TSEC1)
- tsec_initialize(bis, 0, CONFIG_MPC86XX_TSEC1_NAME);
-#endif
-
-#if defined(CONFIG_MPC86XX_TSEC2)
- tsec_initialize(bis, 1, CONFIG_MPC86XX_TSEC2_NAME);
-#endif
-
-#if defined(CONFIG_MPC86XX_TSEC3)
- tsec_initialize(bis, 2, CONFIG_MPC86XX_TSEC3_NAME);
-#endif
-
-#if defined(CONFIG_MPC86XX_TSEC4)
- tsec_initialize(bis, 3, CONFIG_MPC86XX_TSEC4_NAME);
-#endif
#if defined(FEC_ENET) || defined(CONFIG_ETHER_ON_FCC)
fec_initialize(bis);
@@ -267,13 +250,18 @@
#if defined(CONFIG_ATSTK1000)
atstk1000_eth_initialize(bis);
#endif
+#if defined(CONFIG_MCFFEC)
+ mcffec_initialize(bis);
+#endif
if (!eth_devices) {
puts ("No ethernet found.\n");
+ show_boot_progress (-64);
} else {
struct eth_device *dev = eth_devices;
char *ethprime = getenv ("ethprime");
+ show_boot_progress (65);
do {
if (eth_number)
puts (", ");
@@ -369,6 +357,51 @@
memcpy(dev->enetaddr, enetaddr, 6);
}
+#ifdef CONFIG_MCAST_TFTP
+/* Multicast.
+ * mcast_addr: multicast ipaddr from which multicast Mac is made
+ * join: 1=join, 0=leave.
+ */
+int eth_mcast_join( IPaddr_t mcast_ip, u8 join)
+{
+ u8 mcast_mac[6];
+ if (!eth_current || !eth_current->mcast)
+ return -1;
+ mcast_mac[5] = htonl(mcast_ip) & 0xff;
+ mcast_mac[4] = (htonl(mcast_ip)>>8) & 0xff;
+ mcast_mac[3] = (htonl(mcast_ip)>>16) & 0x7f;
+ mcast_mac[2] = 0x5e;
+ mcast_mac[1] = 0x0;
+ mcast_mac[0] = 0x1;
+ return eth_current->mcast(eth_current, mcast_mac, join);
+}
+
+/* the 'way' for ethernet-CRC-32. Spliced in from Linux lib/crc32.c
+ * and this is the ethernet-crc method needed for TSEC -- and perhaps
+ * some other adapter -- hash tables
+ */
+#define CRCPOLY_LE 0xedb88320
+u32 ether_crc (size_t len, unsigned char const *p)
+{
+ int i;
+ u32 crc;
+ crc = ~0;
+ while (len--) {
+ crc ^= *p++;
+ for (i = 0; i < 8; i++)
+ crc = (crc >> 1) ^ ((crc & 1) ? CRCPOLY_LE : 0);
+ }
+ /* an reverse the bits, cuz of way they arrive -- last-first */
+ crc = (crc >> 16) | (crc << 16);
+ crc = (crc >> 8 & 0x00ff00ff) | (crc << 8 & 0xff00ff00);
+ crc = (crc >> 4 & 0x0f0f0f0f) | (crc << 4 & 0xf0f0f0f0);
+ crc = (crc >> 2 & 0x33333333) | (crc << 2 & 0xcccccccc);
+ crc = (crc >> 1 & 0x55555555) | (crc << 1 & 0xaaaaaaaa);
+ return crc;
+}
+
+#endif
+
int eth_init(bd_t *bis)
{
@@ -474,16 +507,18 @@
{
return (eth_current ? eth_current->name : "unknown");
}
-#elif (CONFIG_COMMANDS & CFG_CMD_NET) && !defined(CONFIG_NET_MULTI)
+#elif defined(CONFIG_CMD_NET) && !defined(CONFIG_NET_MULTI)
extern int at91rm9200_miiphy_initialize(bd_t *bis);
extern int emac4xx_miiphy_initialize(bd_t *bis);
extern int mcf52x2_miiphy_initialize(bd_t *bis);
extern int ns7520_miiphy_initialize(bd_t *bis);
+extern int dm644x_eth_miiphy_initialize(bd_t *bis);
+
int eth_initialize(bd_t *bis)
{
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
miiphy_init();
#endif
@@ -500,6 +535,9 @@
#if defined(CONFIG_NETARM)
ns7520_miiphy_initialize(bis);
#endif
+#if defined(CONFIG_DRIVER_TI_EMAC)
+ dm644x_eth_miiphy_initialize(bis);
+#endif
return 0;
}
#endif
diff --git a/net/net.c b/net/net.c
index 2ff7bfc..cde2680 100644
--- a/net/net.c
+++ b/net/net.c
@@ -86,11 +86,11 @@
#include <status_led.h>
#include <miiphy.h>
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
#include "sntp.h"
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
DECLARE_GLOBAL_DATA_PTR;
@@ -110,7 +110,7 @@
IPaddr_t NetOurSubnetMask=0; /* Our subnet mask (0=unknown) */
IPaddr_t NetOurGatewayIP=0; /* Our gateways IP address */
IPaddr_t NetOurDNSIP=0; /* Our DNS IP address */
-#if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_DNS2)
+#if defined(CONFIG_BOOTP_DNS2)
IPaddr_t NetOurDNS2IP=0; /* Our 2nd DNS IP address */
#endif
char NetOurNISDomain[32]={0,}; /* Our NIS domain */
@@ -118,6 +118,10 @@
char NetOurRootPath[64]={0,}; /* Our bootpath */
ushort NetBootFileSize=0; /* Our bootfile size in blocks */
+#ifdef CONFIG_MCAST_TFTP /* Multicast TFTP */
+IPaddr_t Mcast_addr;
+#endif
+
/** END OF BOOTP EXTENTIONS **/
ulong NetBootFileXferSize; /* The actual transferred size of the bootfile (in bytes) */
@@ -133,7 +137,7 @@
{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
uchar NetEtherNullAddr[6] =
{ 0, 0, 0, 0, 0, 0 };
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
uchar NetCDPAddr[6] = /* Ethernet bcast address */
{ 0x01, 0x00, 0x0c, 0xcc, 0xcc, 0xcc };
#endif
@@ -150,17 +154,17 @@
char BootFile[128]; /* Boot File name */
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
IPaddr_t NetPingIP; /* the ip address to ping */
static void PingStart(void);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
static void CDPStart(void);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
IPaddr_t NetNtpServerIP; /* NTP server IP address */
int NetTimeOffset=0; /* offset time from UTC */
#endif
@@ -326,13 +330,13 @@
*/
switch (protocol) {
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
case NFS:
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
case PING:
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
case SNTP:
#endif
case NETCONS:
@@ -344,19 +348,19 @@
NetOurNativeVLAN = getenv_VLAN("nvlan");
switch (protocol) {
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
case NFS:
#endif
case NETCONS:
case TFTP:
NetServerIP = getenv_IPaddr ("serverip");
break;
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
case PING:
/* nothing */
break;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
case SNTP:
/* nothing */
break;
@@ -406,7 +410,7 @@
TftpStart();
break;
-#if (CONFIG_COMMANDS & CFG_CMD_DHCP)
+#if defined(CONFIG_CMD_DHCP)
case DHCP:
/* Start with a clean slate... */
BootpTry = 0;
@@ -414,7 +418,7 @@
NetServerIP = getenv_IPaddr ("serverip");
DhcpRequest(); /* Basically same as BOOTP */
break;
-#endif /* CFG_CMD_DHCP */
+#endif
case BOOTP:
BootpTry = 0;
@@ -425,17 +429,17 @@
RarpTry = 0;
RarpRequest ();
break;
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
case PING:
PingStart();
break;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
case NFS:
NfsStart();
break;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
case CDP:
CDPStart();
break;
@@ -445,7 +449,7 @@
NcStart();
break;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
case SNTP:
SntpStart();
break;
@@ -458,7 +462,7 @@
break;
}
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
#if defined(CFG_FAULT_ECHO_LINK_DOWN) && defined(CONFIG_STATUS_LED) && defined(STATUS_LED_RED)
/*
* Echo the inverted link state to the fault LED.
@@ -507,7 +511,7 @@
if (timeHandler && ((get_timer(0) - timeStart) > timeDelta)) {
thand_f *x;
-#if defined(CONFIG_MII) || (CONFIG_COMMANDS & CFG_CMD_MII)
+#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
# if defined(CFG_FAULT_ECHO_LINK_DOWN) && \
defined(CONFIG_STATUS_LED) && \
defined(STATUS_LED_RED)
@@ -537,11 +541,11 @@
case NETLOOP_SUCCESS:
if (NetBootFileXferSize > 0) {
- char buf[10];
+ char buf[20];
printf("Bytes transferred = %ld (%lx hex)\n",
NetBootFileXferSize,
NetBootFileXferSize);
- sprintf(buf, "%lx", NetBootFileXferSize);
+ sprintf(buf, "%lX", NetBootFileXferSize);
setenv("filesize", buf);
sprintf(buf, "%lX", (unsigned long)load_addr);
@@ -687,7 +691,7 @@
return 0; /* transmitted */
}
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
static ushort PingSeqNo;
int PingSend(void)
@@ -775,9 +779,9 @@
PingSend();
}
-#endif /* CFG_CMD_PING */
+#endif
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
#define CDP_DEVICE_ID_TLV 0x0001
#define CDP_ADDRESS_TLV 0x0002
@@ -1128,7 +1132,7 @@
CDPSendTrigger();
}
-#endif /* CFG_CMD_CDP */
+#endif
void
@@ -1140,7 +1144,7 @@
IPaddr_t tmp;
int x;
uchar *pkt;
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
int iscdp;
#endif
ushort cti = 0, vlanid = VLAN_NONE, myvlanid, mynvlanid;
@@ -1157,7 +1161,7 @@
if (len < ETHER_HDR_SIZE)
return;
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
/* keep track if packet is CDP */
iscdp = memcmp(et->et_dest, NetCDPAddr, 6) == 0;
#endif
@@ -1200,7 +1204,7 @@
/* if no VLAN active */
if ((ntohs(NetOurVLAN) & VLAN_IDMASK) == VLAN_NONE
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
&& iscdp == 0
#endif
)
@@ -1218,7 +1222,7 @@
printf("Receive from protocol 0x%x\n", x);
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_CDP)
+#if defined(CONFIG_CMD_CDP)
if (iscdp) {
CDPHandler((uchar *)ip, len);
return;
@@ -1386,6 +1390,9 @@
}
tmp = NetReadIP(&ip->ip_dst);
if (NetOurIP && tmp != NetOurIP && tmp != 0xFFFFFFFF) {
+#ifdef CONFIG_MCAST_TFTP
+ if (Mcast_addr != tmp)
+#endif
return;
}
/*
@@ -1416,7 +1423,7 @@
print_IPaddr(icmph->un.gateway);
putc(' ');
return;
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
case ICMP_ECHO_REPLY:
/*
* IP header OK. Pass the packet to the current handler.
@@ -1492,6 +1499,7 @@
}
#endif
+
#ifdef CONFIG_NETCONSOLE
nc_input_packet((uchar *)ip +IP_HDR_SIZE,
ntohs(ip->udp_dst),
@@ -1516,7 +1524,7 @@
{
switch (protocol) {
/* Fall through */
-#if (CONFIG_COMMANDS & CFG_CMD_PING)
+#if defined(CONFIG_CMD_PING)
case PING:
if (NetPingIP == 0) {
puts ("*** ERROR: ping address not given\n");
@@ -1524,7 +1532,7 @@
}
goto common;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_SNTP)
+#if defined(CONFIG_CMD_SNTP)
case SNTP:
if (NetNtpServerIP == 0) {
puts ("*** ERROR: NTP server address not given\n");
@@ -1532,7 +1540,7 @@
}
goto common;
#endif
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
case NFS:
#endif
case NETCONS:
@@ -1541,7 +1549,7 @@
puts ("*** ERROR: `serverip' not set\n");
return (1);
}
-#if (CONFIG_COMMANDS & (CFG_CMD_PING | CFG_CMD_SNTP))
+#if defined(CONFIG_CMD_PING) || defined(CONFIG_CMD_SNTP)
common:
#endif
@@ -1693,7 +1701,7 @@
*dst = '\0';
}
-#endif /* CFG_CMD_NET */
+#endif
void ip_to_string (IPaddr_t x, char *s)
{
diff --git a/net/nfs.c b/net/nfs.c
index de789e1..df2caac 100644
--- a/net/nfs.c
+++ b/net/nfs.c
@@ -31,7 +31,7 @@
/*#define NFS_DEBUG*/
-#if ((CONFIG_COMMANDS & CFG_CMD_NET) && (CONFIG_COMMANDS & CFG_CMD_NFS))
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_CMD_NFS)
#define HASHES_PER_LINE 65 /* Number of "loading" hashes per line */
#define NFS_TIMEOUT 60
@@ -775,4 +775,4 @@
NfsSend ();
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_NFS */
+#endif
diff --git a/net/rarp.c b/net/rarp.c
index 1ba60e8..21dfa52 100644
--- a/net/rarp.c
+++ b/net/rarp.c
@@ -29,7 +29,7 @@
#include "rarp.h"
#include "tftp.h"
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#define TIMEOUT 5 /* Seconds before trying BOOTP again */
#ifndef CONFIG_NET_RETRY_COUNT
@@ -59,7 +59,7 @@
*/
NetState = NETLOOP_SUCCESS;
return;
-#if (CONFIG_COMMANDS & CFG_CMD_NFS)
+#if defined(CONFIG_CMD_NFS)
} else if ((s != NULL) && !strcmp(s, "NFS")) {
NfsStart();
return;
@@ -119,4 +119,4 @@
NetSetHandler(RarpHandler);
}
-#endif /* CFG_CMD_NET */
+#endif
diff --git a/net/sntp.c b/net/sntp.c
index db8c2c2..95e7542 100644
--- a/net/sntp.c
+++ b/net/sntp.c
@@ -12,7 +12,7 @@
#include "sntp.h"
-#if ((CONFIG_COMMANDS & CFG_CMD_NET) && (CONFIG_COMMANDS & CFG_CMD_SNTP))
+#if defined(CONFIG_CMD_NET) && defined(CONFIG_CMD_SNTP)
#define SNTP_TIMEOUT 10
@@ -67,7 +67,7 @@
memcpy (&seconds, &rpktp->transmit_timestamp, sizeof(ulong));
to_tm(ntohl(seconds) - 2208988800UL + NetTimeOffset, &tm);
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
rtc_set (&tm);
#endif
printf ("Date: %4d-%02d-%02d Time: %2d:%02d:%02d\n",
@@ -89,4 +89,4 @@
SntpSend ();
}
-#endif /* CONFIG_COMMANDS & CFG_CMD_SNTP */
+#endif
diff --git a/net/tftp.c b/net/tftp.c
index f3a5471..5ee7676 100644
--- a/net/tftp.c
+++ b/net/tftp.c
@@ -12,7 +12,7 @@
#undef ET_DEBUG
-#if (CONFIG_COMMANDS & CFG_CMD_NET)
+#if defined(CONFIG_CMD_NET)
#define WELL_KNOWN_PORT 69 /* Well known TFTP port # */
#define TIMEOUT 5 /* Seconds to timeout for a lost pkt */
@@ -61,10 +61,43 @@
extern flash_info_t flash_info[];
#endif
+/* 512 is poor choice for ethernet, MTU is typically 1500.
+ * Minus eth.hdrs thats 1468. Can get 2x better throughput with
+ * almost-MTU block sizes. At least try... fall back to 512 if need be.
+ */
+#define TFTP_MTU_BLOCKSIZE 1468
+static unsigned short TftpBlkSize=TFTP_BLOCK_SIZE;
+static unsigned short TftpBlkSizeOption=TFTP_MTU_BLOCKSIZE;
+
+#ifdef CONFIG_MCAST_TFTP
+#include <malloc.h>
+#define MTFTP_BITMAPSIZE 0x1000
+static unsigned *Bitmap;
+static int PrevBitmapHole,Mapsize=MTFTP_BITMAPSIZE;
+static uchar ProhibitMcast=0, MasterClient=0;
+static uchar Multicast=0;
+extern IPaddr_t Mcast_addr;
+static int Mcast_port;
+static ulong TftpEndingBlock; /* can get 'last' block before done..*/
+
+static void parse_multicast_oack(char *pkt,int len);
+
+static void
+mcast_cleanup(void)
+{
+ if (Mcast_addr) eth_mcast_join(Mcast_addr, 0);
+ if (Bitmap) free(Bitmap);
+ Bitmap=NULL;
+ Mcast_addr = Multicast = Mcast_port = 0;
+ TftpEndingBlock = -1;
+}
+
+#endif /* CONFIG_MCAST_TFTP */
+
static __inline__ void
store_block (unsigned block, uchar * src, unsigned len)
{
- ulong offset = block * TFTP_BLOCK_SIZE + TftpBlockWrapOffset;
+ ulong offset = block * TftpBlkSize + TftpBlockWrapOffset;
ulong newsize = offset + len;
#ifdef CFG_DIRECT_FLASH_TFTP
int i, rc = 0;
@@ -90,6 +123,10 @@
{
(void)memcpy((void *)(load_addr + offset), src, len);
}
+#ifdef CONFIG_MCAST_TFTP
+ if (Multicast)
+ ext2_set_bit(block, Bitmap);
+#endif
if (NetBootFileXferSize < newsize)
NetBootFileXferSize = newsize;
@@ -108,6 +145,13 @@
int len = 0;
volatile ushort *s;
+#ifdef CONFIG_MCAST_TFTP
+ /* Multicast TFTP.. non-MasterClients do not ACK data. */
+ if (Multicast
+ && (TftpState == STATE_DATA)
+ && (MasterClient == 0))
+ return;
+#endif
/*
* We will always be sending some sort of packet, so
* cobble together the packet headers now.
@@ -132,11 +176,30 @@
printf("send option \"timeout %s\"\n", (char *)pkt);
#endif
pkt += strlen((char *)pkt) + 1;
+ /* try for more effic. blk size */
+ pkt += sprintf((char *)pkt,"blksize%c%d%c",
+ 0,TftpBlkSizeOption,0);
+#ifdef CONFIG_MCAST_TFTP
+ /* Check all preconditions before even trying the option */
+ if (!ProhibitMcast
+ && (Bitmap=malloc(Mapsize))
+ && eth_get_dev()->mcast) {
+ free(Bitmap);
+ Bitmap=NULL;
+ pkt += sprintf((char *)pkt,"multicast%c%c",0,0);
+ }
+#endif /* CONFIG_MCAST_TFTP */
len = pkt - xp;
break;
- case STATE_DATA:
case STATE_OACK:
+#ifdef CONFIG_MCAST_TFTP
+ /* My turn! Start at where I need blocks I missed.*/
+ if (Multicast)
+ TftpBlock=ext2_find_next_zero_bit(Bitmap,(Mapsize*8),0);
+ /*..falling..*/
+#endif
+ case STATE_DATA:
xp = pkt;
s = (ushort *)pkt;
*s++ = htons(TFTP_ACK);
@@ -177,8 +240,13 @@
{
ushort proto;
ushort *s;
+ int i;
if (dest != TftpOurPort) {
+#ifdef CONFIG_MCAST_TFTP
+ if (Multicast
+ && (!Mcast_port || (dest != Mcast_port)))
+#endif
return;
}
if (TftpState != STATE_RRQ && src != TftpServerPort) {
@@ -208,6 +276,28 @@
#endif
TftpState = STATE_OACK;
TftpServerPort = src;
+ /*
+ * Check for 'blksize' option.
+ * Careful: "i" is signed, "len" is unsigned, thus
+ * something like "len-8" may give a *huge* number
+ */
+ for (i=0; i+8<len; i++) {
+ if (strcmp ((char*)pkt+i,"blksize") == 0) {
+ TftpBlkSize = (unsigned short)
+ simple_strtoul((char*)pkt+i+8,NULL,10);
+#ifdef ET_DEBUG
+ printf ("Blocksize ack: %s, %d\n",
+ (char*)pkt+i+8,TftpBlkSize);
+#endif
+ break;
+ }
+ }
+#ifdef CONFIG_MCAST_TFTP
+ parse_multicast_oack((char *)pkt,len-1);
+ if ((Multicast) && (!MasterClient))
+ TftpState = STATE_DATA; /* passive.. */
+ else
+#endif
TftpSend (); /* Send ACK */
break;
case TFTP_DATA:
@@ -224,7 +314,7 @@
*/
if (TftpBlock == 0) {
TftpBlockWrap++;
- TftpBlockWrapOffset += TFTP_BLOCK_SIZE * TFTP_SEQUENCE_SIZE;
+ TftpBlockWrapOffset += TftpBlkSize * TFTP_SEQUENCE_SIZE;
printf ("\n\t %lu MB received\n\t ", TftpBlockWrapOffset>>20);
} else {
if (((TftpBlock - 1) % 10) == 0) {
@@ -248,6 +338,11 @@
TftpBlockWrap = 0;
TftpBlockWrapOffset = 0;
+#ifdef CONFIG_MCAST_TFTP
+ if (Multicast) { /* start!=1 common if mcast */
+ TftpLastBlock = TftpBlock - 1;
+ } else
+#endif
if (TftpBlock != 1) { /* Assertion */
printf ("\nTFTP error: "
"First block is not block 1 (%ld)\n"
@@ -274,9 +369,44 @@
* Acknoledge the block just received, which will prompt
* the server for the next one.
*/
+#ifdef CONFIG_MCAST_TFTP
+ /* if I am the MasterClient, actively calculate what my next
+ * needed block is; else I'm passive; not ACKING
+ */
+ if (Multicast) {
+ if (len < TftpBlkSize) {
+ TftpEndingBlock = TftpBlock;
+ } else if (MasterClient) {
+ TftpBlock = PrevBitmapHole =
+ ext2_find_next_zero_bit(
+ Bitmap,
+ (Mapsize*8),
+ PrevBitmapHole);
+ if (TftpBlock > ((Mapsize*8) - 1)) {
+ printf ("tftpfile too big\n");
+ /* try to double it and retry */
+ Mapsize<<=1;
+ mcast_cleanup();
+ NetStartAgain ();
+ return;
+ }
+ TftpLastBlock = TftpBlock;
+ }
+ }
+#endif
TftpSend ();
- if (len < TFTP_BLOCK_SIZE) {
+#ifdef CONFIG_MCAST_TFTP
+ if (Multicast) {
+ if (MasterClient && (TftpBlock >= TftpEndingBlock)) {
+ puts ("\nMulticast tftp done\n");
+ mcast_cleanup();
+ NetState = NETLOOP_SUCCESS;
+ }
+ }
+ else
+#endif
+ if (len < TftpBlkSize) {
/*
* We received the whole thing. Try to
* run it.
@@ -290,6 +420,9 @@
printf ("\nTFTP error: '%s' (%d)\n",
pkt + 2, ntohs(*(ushort *)pkt));
puts ("Starting again\n\n");
+#ifdef CONFIG_MCAST_TFTP
+ mcast_cleanup();
+#endif
NetStartAgain ();
break;
}
@@ -301,6 +434,9 @@
{
if (++TftpTimeoutCount > TIMEOUT_COUNT) {
puts ("\nRetry count exceeded; starting again\n");
+#ifdef CONFIG_MCAST_TFTP
+ mcast_cleanup();
+#endif
NetStartAgain ();
} else {
puts ("T ");
@@ -370,6 +506,7 @@
TftpState = STATE_RRQ;
/* Use a pseudo-random port unless a specific port is set */
TftpOurPort = 1024 + (get_timer(0) % 3072);
+
#ifdef CONFIG_TFTP_PORT
if ((ep = getenv("tftpdstp")) != NULL) {
TftpServerPort = simple_strtol(ep, NULL, 10);
@@ -382,8 +519,103 @@
/* zero out server ether in case the server ip has changed */
memset(NetServerEther, 0, 6);
+ /* Revert TftpBlkSize to dflt */
+ TftpBlkSize = TFTP_BLOCK_SIZE;
+#ifdef CONFIG_MCAST_TFTP
+ mcast_cleanup();
+#endif
TftpSend ();
}
-#endif /* CFG_CMD_NET */
+#ifdef CONFIG_MCAST_TFTP
+/* Credits: atftp project.
+ */
+
+/* pick up BcastAddr, Port, and whether I am [now] the master-client. *
+ * Frame:
+ * +-------+-----------+---+-------~~-------+---+
+ * | opc | multicast | 0 | addr, port, mc | 0 |
+ * +-------+-----------+---+-------~~-------+---+
+ * The multicast addr/port becomes what I listen to, and if 'mc' is '1' then
+ * I am the new master-client so must send ACKs to DataBlocks. If I am not
+ * master-client, I'm a passive client, gathering what DataBlocks I may and
+ * making note of which ones I got in my bitmask.
+ * In theory, I never go from master->passive..
+ * .. this comes in with pkt already pointing just past opc
+ */
+static void parse_multicast_oack(char *pkt, int len)
+{
+ int i;
+ IPaddr_t addr;
+ char *mc_adr, *port, *mc;
+
+ mc_adr=port=mc=NULL;
+ /* march along looking for 'multicast\0', which has to start at least
+ * 14 bytes back from the end.
+ */
+ for (i=0;i<len-14;i++)
+ if (strcmp (pkt+i,"multicast") == 0)
+ break;
+ if (i >= (len-14)) /* non-Multicast OACK, ign. */
+ return;
+
+ i+=10; /* strlen multicast */
+ mc_adr = pkt+i;
+ for (;i<len;i++) {
+ if (*(pkt+i) == ',') {
+ *(pkt+i) = '\0';
+ if (port) {
+ mc = pkt+i+1;
+ break;
+ } else {
+ port = pkt+i+1;
+ }
+ }
+ }
+ if (!port || !mc_adr || !mc ) return;
+ if (Multicast && MasterClient) {
+ printf ("I got a OACK as master Client, WRONG!\n");
+ return;
+ }
+ /* ..I now accept packets destined for this MCAST addr, port */
+ if (!Multicast) {
+ if (Bitmap) {
+ printf ("Internal failure! no mcast.\n");
+ free(Bitmap);
+ Bitmap=NULL;
+ ProhibitMcast=1;
+ return ;
+ }
+ /* I malloc instead of pre-declare; so that if the file ends
+ * up being too big for this bitmap I can retry
+ */
+ if (!(Bitmap = malloc (Mapsize))) {
+ printf ("No Bitmap, no multicast. Sorry.\n");
+ ProhibitMcast=1;
+ return;
+ }
+ memset (Bitmap,0,Mapsize);
+ PrevBitmapHole = 0;
+ Multicast = 1;
+ }
+ addr = string_to_ip(mc_adr);
+ if (Mcast_addr != addr) {
+ if (Mcast_addr)
+ eth_mcast_join(Mcast_addr, 0);
+ if (eth_mcast_join(Mcast_addr=addr, 1)) {
+ printf ("Fail to set mcast, revert to TFTP\n");
+ ProhibitMcast=1;
+ mcast_cleanup();
+ NetStartAgain();
+ }
+ }
+ MasterClient = (unsigned char)simple_strtoul((char *)mc,NULL,10);
+ Mcast_port = (unsigned short)simple_strtoul(port,NULL,10);
+ printf ("Multicast: %s:%d [%d]\n", mc_adr, Mcast_port, MasterClient);
+ return;
+}
+
+#endif /* Multicast TFTP */
+
+#endif
diff --git a/post/board/lwmon5/Makefile b/post/board/lwmon5/Makefile
new file mode 100644
index 0000000..c3f54e3
--- /dev/null
+++ b/post/board/lwmon5/Makefile
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2002-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+
+LIB = libpostlwmon5.a
+
+COBJS = ecc.o
+
+include $(TOPDIR)/post/rules.mk
diff --git a/post/board/lwmon5/ecc.c b/post/board/lwmon5/ecc.c
new file mode 100644
index 0000000..3fa3ba6
--- /dev/null
+++ b/post/board/lwmon5/ecc.c
@@ -0,0 +1,267 @@
+/*
+ * (C) Copyright 2007
+ * Developed for DENX Software Engineering GmbH.
+ *
+ * Author: Pavel Kolesnikov <concord@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* define DEBUG for debugging output (obviously ;-)) */
+#if 0
+#define DEBUG
+#endif
+
+#include <common.h>
+#include <watchdog.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_ECC
+
+/*
+ * MEMORY ECC test
+ *
+ * This test performs the checks ECC facility of memory.
+ */
+#include <asm/processor.h>
+#include <asm/mmu.h>
+#include <asm/io.h>
+#include <ppc440.h>
+
+#include "../../../board/lwmon5/sdram.h"
+
+DECLARE_GLOBAL_DATA_PTR;
+
+const static unsigned char syndrome_codes[] = {
+ 0xF4, 0XF1, 0XEC ,0XEA, 0XE9, 0XE6, 0XE5, 0XE3,
+ 0XDC, 0XDA, 0XD9, 0XD6, 0XD5, 0XD3, 0XCE, 0XCB,
+ 0xB5, 0XB0, 0XAD, 0XAB, 0XA8, 0XA7, 0XA4, 0XA2,
+ 0X9D, 0X9B, 0X98, 0X97, 0X94, 0X92, 0X8F, 0X8A,
+ 0x75, 0x70, 0X6D, 0X6B, 0X68, 0X67, 0X64, 0X62,
+ 0X5E, 0X5B, 0X58, 0X57, 0X54, 0X52, 0X4F, 0X4A,
+ 0x34, 0x31, 0X2C, 0X2A, 0X29, 0X26, 0X25, 0X23,
+ 0X1C, 0X1A, 0X19, 0X16, 0X15, 0X13, 0X0E, 0X0B,
+ 0x80, 0x40, 0x20, 0x10, 0x08, 0x04, 0x02, 0x01
+};
+
+#define ECC_START_ADDR 0x10
+#define ECC_STOP_ADDR 0x2000
+#define ECC_PATTERN 0x0101010101010101ull
+#define ECC_PATTERN_CORR 0x0101010101010100ull
+#define ECC_PATTERN_UNCORR 0x010101010101010Full
+
+static int test_ecc_error(void)
+{
+ unsigned long value;
+ unsigned long hdata, ldata, haddr, laddr;
+ unsigned int bit;
+
+ int ret = 0;
+
+ mfsdram(DDR0_23, value);
+
+ for (bit = 0; bit < sizeof(syndrome_codes); bit++)
+ if (syndrome_codes[bit] == ((value >> 16) & 0xff))
+ break;
+
+ mfsdram(DDR0_00, value);
+
+ if (value & DDR0_00_INT_STATUS_BIT0) {
+ debug("Bit0. A single access outside the defined PHYSICAL"
+ " memory space detected\n");
+ mfsdram(DDR0_32, laddr);
+ mfsdram(DDR0_33, haddr);
+ debug(" addr = 0x%08x%08x\n", haddr, laddr);
+ ret = 1;
+ }
+ if (value & DDR0_00_INT_STATUS_BIT1) {
+ debug("Bit1. Multiple accesses outside the defined PHYSICAL"
+ " memory space detected\n");
+ ret = 2;
+ }
+ if (value & DDR0_00_INT_STATUS_BIT2) {
+ debug("Bit2. Single correctable ECC event detected\n");
+ mfsdram(DDR0_38, laddr);
+ mfsdram(DDR0_39, haddr);
+ mfsdram(DDR0_40, ldata);
+ mfsdram(DDR0_41, hdata);
+ debug(" 0x%08x - 0x%08x%08x, bit - %d\n",
+ laddr, hdata, ldata, bit);
+ ret = 3;
+ }
+ if (value & DDR0_00_INT_STATUS_BIT3) {
+ debug("Bit3. Multiple correctable ECC events detected\n");
+ mfsdram(DDR0_38, laddr);
+ mfsdram(DDR0_39, haddr);
+ mfsdram(DDR0_40, ldata);
+ mfsdram(DDR0_41, hdata);
+ debug(" 0x%08x - 0x%08x%08x, bit - %d\n",
+ laddr, hdata, ldata, bit);
+ ret = 4;
+ }
+ if (value & DDR0_00_INT_STATUS_BIT4) {
+ debug("Bit4. Single uncorrectable ECC event detected\n");
+ mfsdram(DDR0_34, laddr);
+ mfsdram(DDR0_35, haddr);
+ mfsdram(DDR0_36, ldata);
+ mfsdram(DDR0_37, hdata);
+ debug(" 0x%08x - 0x%08x%08x, bit - %d\n",
+ laddr, hdata, ldata, bit);
+ ret = 5;
+ }
+ if (value & DDR0_00_INT_STATUS_BIT5) {
+ debug("Bit5. Multiple uncorrectable ECC events detected\n");
+ mfsdram(DDR0_34, laddr);
+ mfsdram(DDR0_35, haddr);
+ mfsdram(DDR0_36, ldata);
+ mfsdram(DDR0_37, hdata);
+ debug(" 0x%08x - 0x%08x%08x, bit - %d\n",
+ laddr, hdata, ldata, bit);
+ ret = 6;
+ }
+ if (value & DDR0_00_INT_STATUS_BIT6) {
+ debug("Bit6. DRAM initialization complete\n");
+ ret = 7;
+ }
+
+ /* error status cleared */
+ mfsdram(DDR0_00, value);
+ mtsdram(DDR0_00, value | DDR0_00_INT_ACK_ALL);
+
+ return ret;
+}
+
+static int test_ecc(unsigned long ecc_addr)
+{
+ volatile unsigned long long *ecc_mem;
+ unsigned long value;
+ unsigned long ecc_data;
+ volatile unsigned long *lecc_mem;
+ int pret, ret = 0;
+
+ sync();
+ eieio();
+ WATCHDOG_RESET();
+
+ ecc_mem = (unsigned long long *)ecc_addr;
+ lecc_mem = (ulong *)ecc_addr;
+ *ecc_mem = ECC_PATTERN;
+ pret = test_ecc_error();
+ if (pret != 0)
+ ret = 1;
+
+ /* disconnect ecc */
+ mfsdram(DDR0_22, value);
+ mtsdram(DDR0_22, (value &~ DDR0_22_CTRL_RAW_MASK)
+ | DDR0_22_CTRL_RAW_ECC_DISABLE);
+
+ /* injecting error */
+ *ecc_mem = ECC_PATTERN_CORR;
+
+ /* enable ecc */
+ mfsdram(DDR0_22, value);
+ mtsdram(DDR0_22, (value &~ DDR0_22_CTRL_RAW_MASK)
+ | DDR0_22_CTRL_RAW_ECC_ENABLE);
+
+ ecc_data = *lecc_mem;
+ pret = test_ecc_error();
+ /* if read data ok, 1 correctable error must be fixed */
+ if (pret != 3)
+ ret = 1;
+
+ /* test for uncorrectable error */
+ /* disconnect from ecc storage */
+ mfsdram(DDR0_22, value);
+ mtsdram(DDR0_22, (value &~ DDR0_22_CTRL_RAW_MASK)
+ | DDR0_22_CTRL_RAW_NO_ECC_RAM);
+
+ /* injecting multiply bit error */
+
+ *ecc_mem = ECC_PATTERN_UNCORR;
+
+ /* enable ecc */
+ mfsdram(DDR0_22, value);
+ mtsdram(DDR0_22, (value &~ DDR0_22_CTRL_RAW_MASK)
+ | DDR0_22_CTRL_RAW_ECC_ENABLE);
+
+ ecc_data = *lecc_mem;
+ /* what the data should be read? */
+
+ pret = test_ecc_error();
+ /* info about uncorrectable error must appear */
+ if (pret != 5)
+ ret = 1;
+
+ sync();
+ eieio();
+
+ return ret;
+}
+
+int ecc_post_test (int flags)
+{
+ int ret = 0;
+ unsigned long value;
+ unsigned long iaddr;
+
+#if CONFIG_DDR_ECC
+ sync();
+ eieio();
+
+ /* mask all int */
+ mfsdram(DDR0_01, value);
+ mtsdram(DDR0_01, (value &~ DDR0_01_INT_MASK_MASK)
+ | DDR0_01_INT_MASK_ALL_OFF);
+
+ /* clear error status */
+ mfsdram(DDR0_00, value);
+ mtsdram(DDR0_00, value | DDR0_00_INT_ACK_ALL);
+
+ /* enable full support of ECC */
+ mfsdram(DDR0_22, value);
+ mtsdram(DDR0_22, (value &~ DDR0_22_CTRL_RAW_MASK)
+ | DDR0_22_CTRL_RAW_ECC_ENABLE);
+
+ for (iaddr = ECC_START_ADDR; iaddr < ECC_STOP_ADDR; iaddr += iaddr) {
+ ret = test_ecc(iaddr);
+ if (ret)
+ break;
+ }
+
+ /* clear error status */
+ mfsdram(DDR0_00, value);
+ mtsdram(DDR0_00, value | DDR0_00_INT_ACK_ALL);
+
+ /*
+ * Clear possible errors resulting from ECC testing.
+ * If not done, then we could get an interrupt later on when
+ * exceptions are enabled.
+ */
+ set_mcsr(get_mcsr());
+#endif
+
+ return ret;
+
+}
+
+#endif /* CONFIG_POST & CFG_POST_ECC */
+#endif /* CONFIG_POST */
diff --git a/post/cpu/mpc8xx/Makefile b/post/cpu/mpc8xx/Makefile
index 9dd3f0f..f871cba 100644
--- a/post/cpu/mpc8xx/Makefile
+++ b/post/cpu/mpc8xx/Makefile
@@ -24,6 +24,6 @@
LIB = libpostmpc8xx.a
AOBJS = cache_8xx.o
-COBJS = ether.o spr.o uart.o usb.o watchdog.o
+COBJS = cache.o ether.o spr.o uart.o usb.o watchdog.o
include $(TOPDIR)/post/rules.mk
diff --git a/post/drivers/cache.c b/post/cpu/mpc8xx/cache.c
similarity index 100%
rename from post/drivers/cache.c
rename to post/cpu/mpc8xx/cache.c
diff --git a/post/cpu/ppc4xx/Makefile b/post/cpu/ppc4xx/Makefile
new file mode 100644
index 0000000..f1034da
--- /dev/null
+++ b/post/cpu/ppc4xx/Makefile
@@ -0,0 +1,29 @@
+#
+# (C) Copyright 2002-2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+LIB = libpostppc4xx.a
+
+AOBJS = cache_4xx.o
+COBJS = cache.o ether.o fpu.o spr.o uart.o watchdog.o
+
+include $(TOPDIR)/post/rules.mk
diff --git a/post/cpu/ppc4xx/cache.c b/post/cpu/ppc4xx/cache.c
new file mode 100644
index 0000000..109ca1f
--- /dev/null
+++ b/post/cpu/ppc4xx/cache.c
@@ -0,0 +1,126 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Igor Lisitsin <igor@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/* Cache test
+ *
+ * This test verifies the CPU data and instruction cache using
+ * several test scenarios.
+ */
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_CACHE
+
+#include <asm/mmu.h>
+#include <watchdog.h>
+
+#define CACHE_POST_SIZE 1024
+
+void program_tlb(u32 phys_addr, u32 virt_addr, u32 size, u32 tlb_word2_i_value);
+
+int cache_post_test1 (int tlb, void *p, int size);
+int cache_post_test2 (int tlb, void *p, int size);
+int cache_post_test3 (int tlb, void *p, int size);
+int cache_post_test4 (int tlb, void *p, int size);
+int cache_post_test5 (int tlb, void *p, int size);
+int cache_post_test6 (int tlb, void *p, int size);
+
+static int tlb = -1; /* index to the victim TLB entry */
+
+#ifdef CONFIG_440
+static unsigned char testarea[CACHE_POST_SIZE]
+__attribute__((__aligned__(CACHE_POST_SIZE)));
+#endif
+
+int cache_post_test (int flags)
+{
+ void* virt = (void*)CFG_POST_CACHE_ADDR;
+ int ints;
+ int res = 0;
+
+ /*
+ * All 44x variants deal with cache management differently
+ * because they have the address translation always enabled.
+ * The 40x ppc's don't use address translation in U-Boot at all,
+ * so we have to distinguish here between 40x and 44x.
+ */
+#ifdef CONFIG_440
+ int word0, i;
+
+ if (tlb < 0) {
+ /*
+ * Allocate a new TLB entry, since we are going to modify
+ * the write-through and caching inhibited storage attributes.
+ */
+ program_tlb((u32)testarea, (u32)virt,
+ CACHE_POST_SIZE, TLB_WORD2_I_ENABLE);
+
+ /* Find the TLB entry */
+ for (i = 0;; i++) {
+ if (i >= PPC4XX_TLB_SIZE) {
+ printf ("Failed to program tlb entry\n");
+ return -1;
+ }
+ word0 = mftlb1(i);
+ if (TLB_WORD0_EPN_DECODE(word0) == (u32)virt) {
+ tlb = i;
+ break;
+ }
+ }
+ }
+#endif
+ ints = disable_interrupts ();
+
+ WATCHDOG_RESET ();
+ if (res == 0)
+ res = cache_post_test1 (tlb, virt, CACHE_POST_SIZE);
+ WATCHDOG_RESET ();
+ if (res == 0)
+ res = cache_post_test2 (tlb, virt, CACHE_POST_SIZE);
+ WATCHDOG_RESET ();
+ if (res == 0)
+ res = cache_post_test3 (tlb, virt, CACHE_POST_SIZE);
+ WATCHDOG_RESET ();
+ if (res == 0)
+ res = cache_post_test4 (tlb, virt, CACHE_POST_SIZE);
+ WATCHDOG_RESET ();
+ if (res == 0)
+ res = cache_post_test5 (tlb, virt, CACHE_POST_SIZE);
+ WATCHDOG_RESET ();
+ if (res == 0)
+ res = cache_post_test6 (tlb, virt, CACHE_POST_SIZE);
+
+ if (ints)
+ enable_interrupts ();
+
+ return res;
+}
+
+#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/cache_4xx.S b/post/cpu/ppc4xx/cache_4xx.S
new file mode 100644
index 0000000..d5cb075
--- /dev/null
+++ b/post/cpu/ppc4xx/cache_4xx.S
@@ -0,0 +1,492 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Igor Lisitsin <igor@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+#include <asm/cache.h>
+#include <asm/mmu.h>
+
+#if CONFIG_POST & CFG_POST_CACHE
+
+ .text
+
+ /*
+ * All 44x variants deal with cache management differently
+ * because they have the address translation always enabled.
+ * The 40x ppc's don't use address translation in U-Boot at all,
+ * so we have to distinguish here between 40x and 44x.
+ */
+#ifdef CONFIG_440
+/* void cache_post_disable (int tlb)
+ */
+cache_post_disable:
+ tlbre r0, r3, 0x0002
+ ori r0, r0, TLB_WORD2_I_ENABLE@l
+ tlbwe r0, r3, 0x0002
+ sync
+ isync
+ blr
+
+/* void cache_post_wt (int tlb)
+ */
+cache_post_wt:
+ tlbre r0, r3, 0x0002
+ ori r0, r0, TLB_WORD2_W_ENABLE@l
+ andi. r0, r0, ~TLB_WORD2_I_ENABLE@l
+ tlbwe r0, r3, 0x0002
+ sync
+ isync
+ blr
+
+/* void cache_post_wb (int tlb)
+ */
+cache_post_wb:
+ tlbre r0, r3, 0x0002
+ andi. r0, r0, ~TLB_WORD2_W_ENABLE@l
+ andi. r0, r0, ~TLB_WORD2_I_ENABLE@l
+ tlbwe r0, r3, 0x0002
+ sync
+ isync
+ blr
+#else
+/* void cache_post_disable (int tlb)
+ */
+cache_post_disable:
+ lis r0, 0x0000
+ ori r0, r0, 0x0000
+ mtdccr r0
+ sync
+ isync
+ blr
+
+/* void cache_post_wt (int tlb)
+ */
+cache_post_wt:
+ lis r0, 0x8000
+ ori r0, r0, 0x0000
+ mtdccr r0
+ lis r0, 0x8000
+ ori r0, r0, 0x0000
+ mtdcwr r0
+ sync
+ isync
+ blr
+
+/* void cache_post_wb (int tlb)
+ */
+cache_post_wb:
+ lis r0, 0x8000
+ ori r0, r0, 0x0000
+ mtdccr r0
+ lis r0, 0x0000
+ ori r0, r0, 0x0000
+ mtdcwr r0
+ sync
+ isync
+ blr
+#endif
+
+/* void cache_post_dinvalidate (void *p, int size)
+ */
+cache_post_dinvalidate:
+ dcbi r0, r3
+ addi r3, r3, CFG_CACHELINE_SIZE
+ subic. r4, r4, CFG_CACHELINE_SIZE
+ bgt cache_post_dinvalidate
+ sync
+ blr
+
+/* void cache_post_dstore (void *p, int size)
+ */
+cache_post_dstore:
+ dcbst r0, r3
+ addi r3, r3, CFG_CACHELINE_SIZE
+ subic. r4, r4, CFG_CACHELINE_SIZE
+ bgt cache_post_dstore
+ sync
+ blr
+
+/* void cache_post_dtouch (void *p, int size)
+ */
+cache_post_dtouch:
+ dcbt r0, r3
+ addi r3, r3, CFG_CACHELINE_SIZE
+ subic. r4, r4, CFG_CACHELINE_SIZE
+ bgt cache_post_dtouch
+ sync
+ blr
+
+/* void cache_post_iinvalidate (void)
+ */
+cache_post_iinvalidate:
+ iccci r0, r0
+ sync
+ blr
+
+/* void cache_post_memset (void *p, int val, int size)
+ */
+cache_post_memset:
+ mtctr r5
+1:
+ stb r4, 0(r3)
+ addi r3, r3, 1
+ bdnz 1b
+ blr
+
+/* int cache_post_check (void *p, int size)
+ */
+cache_post_check:
+ mtctr r4
+1:
+ lbz r0, 0(r3)
+ addi r3, r3, 1
+ cmpwi r0, 0xff
+ bne 2f
+ bdnz 1b
+ li r3, 0
+ blr
+2:
+ li r3, -1
+ blr
+
+#define CACHE_POST_DISABLE() \
+ mr r3, r10; \
+ bl cache_post_disable
+
+#define CACHE_POST_WT() \
+ mr r3, r10; \
+ bl cache_post_wt
+
+#define CACHE_POST_WB() \
+ mr r3, r10; \
+ bl cache_post_wb
+
+#define CACHE_POST_DINVALIDATE() \
+ mr r3, r11; \
+ mr r4, r12; \
+ bl cache_post_dinvalidate
+
+#define CACHE_POST_DFLUSH() \
+ mr r3, r11; \
+ mr r4, r12; \
+ bl cache_post_dflush
+
+#define CACHE_POST_DSTORE() \
+ mr r3, r11; \
+ mr r4, r12; \
+ bl cache_post_dstore
+
+#define CACHE_POST_DTOUCH() \
+ mr r3, r11; \
+ mr r4, r12; \
+ bl cache_post_dtouch
+
+#define CACHE_POST_IINVALIDATE() \
+ bl cache_post_iinvalidate
+
+#define CACHE_POST_MEMSET(val) \
+ mr r3, r11; \
+ li r4, val; \
+ mr r5, r12; \
+ bl cache_post_memset
+
+#define CACHE_POST_CHECK() \
+ mr r3, r11; \
+ mr r4, r12; \
+ bl cache_post_check; \
+ mr r13, r3
+
+/*
+ * Write and read 0xff pattern with caching enabled.
+ */
+ .global cache_post_test1
+cache_post_test1:
+ mflr r9
+ mr r10, r3 /* tlb */
+ mr r11, r4 /* p */
+ mr r12, r5 /* size */
+
+ CACHE_POST_WB()
+ CACHE_POST_DINVALIDATE()
+
+ /* Write the negative pattern to the test area */
+ CACHE_POST_MEMSET(0xff)
+
+ /* Read the test area */
+ CACHE_POST_CHECK()
+
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ mr r3, r13
+ mtlr r9
+ blr
+
+/*
+ * Write zeroes with caching enabled.
+ * Write 0xff pattern with caching disabled.
+ * Read 0xff pattern with caching enabled.
+ */
+ .global cache_post_test2
+cache_post_test2:
+ mflr r9
+ mr r10, r3 /* tlb */
+ mr r11, r4 /* p */
+ mr r12, r5 /* size */
+
+ CACHE_POST_WB()
+ CACHE_POST_DINVALIDATE()
+
+ /* Write the zero pattern to the test area */
+ CACHE_POST_MEMSET(0)
+
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ /* Write the negative pattern to the test area */
+ CACHE_POST_MEMSET(0xff)
+
+ CACHE_POST_WB()
+
+ /* Read the test area */
+ CACHE_POST_CHECK()
+
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ mr r3, r13
+ mtlr r9
+ blr
+
+/*
+ * Write-through mode test.
+ * Write zeroes, store the cache, write 0xff pattern.
+ * Invalidate the cache.
+ * Check that 0xff pattern is read.
+ */
+ .global cache_post_test3
+cache_post_test3:
+ mflr r9
+ mr r10, r3 /* tlb */
+ mr r11, r4 /* p */
+ mr r12, r5 /* size */
+
+ CACHE_POST_WT()
+ CACHE_POST_DINVALIDATE()
+
+ /* Cache the test area */
+ CACHE_POST_DTOUCH()
+
+ /* Write the zero pattern to the test area */
+ CACHE_POST_MEMSET(0)
+
+ CACHE_POST_DSTORE()
+
+ /* Write the negative pattern to the test area */
+ CACHE_POST_MEMSET(0xff)
+
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ /* Read the test area */
+ CACHE_POST_CHECK()
+
+ mr r3, r13
+ mtlr r9
+ blr
+
+/*
+ * Write-back mode test.
+ * Write 0xff pattern, store the cache, write zeroes.
+ * Invalidate the cache.
+ * Check that 0xff pattern is read.
+ */
+ .global cache_post_test4
+cache_post_test4:
+ mflr r9
+ mr r10, r3 /* tlb */
+ mr r11, r4 /* p */
+ mr r12, r5 /* size */
+
+ CACHE_POST_WB()
+ CACHE_POST_DINVALIDATE()
+
+ /* Cache the test area */
+ CACHE_POST_DTOUCH()
+
+ /* Write the negative pattern to the test area */
+ CACHE_POST_MEMSET(0xff)
+
+ CACHE_POST_DSTORE()
+
+ /* Write the zero pattern to the test area */
+ CACHE_POST_MEMSET(0)
+
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ /* Read the test area */
+ CACHE_POST_CHECK()
+
+ mr r3, r13
+ mtlr r9
+ blr
+
+/*
+ * Load the test instructions into the instruction cache.
+ * Replace the test instructions.
+ * Check that the original instructions are executed.
+ */
+ .global cache_post_test5
+cache_post_test5:
+ mflr r9
+ mr r10, r3 /* tlb */
+ mr r11, r4 /* p */
+ mr r12, r5 /* size */
+
+ CACHE_POST_WT()
+ CACHE_POST_IINVALIDATE()
+
+ /* Compute r13 = cache_post_test_inst */
+ bl cache_post_test5_reloc
+cache_post_test5_reloc:
+ mflr r13
+ lis r0, (cache_post_test_inst - cache_post_test5_reloc)@h
+ ori r0, r0, (cache_post_test_inst - cache_post_test5_reloc)@l
+ add r13, r13, r0
+
+ /* Copy the test instructions to the test area */
+ lwz r0, 0(r13)
+ stw r0, 0(r11)
+ lwz r0, 8(r13)
+ stw r0, 4(r11)
+ sync
+
+ /* Invalidate the cache line */
+ icbi r0, r11
+ sync
+ isync
+
+ /* Execute the test instructions */
+ mtlr r11
+ blrl
+
+ /* Replace the test instruction */
+ lwz r0, 4(r13)
+ stw r0, 0(r11)
+ sync
+
+ /* Do not invalidate the cache line */
+ isync
+
+ /* Execute the test instructions */
+ mtlr r11
+ blrl
+ mr r13, r3
+
+ CACHE_POST_IINVALIDATE()
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ mr r3, r13
+ mtlr r9
+ blr
+
+/*
+ * Load the test instructions into the instruction cache.
+ * Replace the test instructions and invalidate the cache.
+ * Check that the replaced instructions are executed.
+ */
+ .global cache_post_test6
+cache_post_test6:
+ mflr r9
+ mr r10, r3 /* tlb */
+ mr r11, r4 /* p */
+ mr r12, r5 /* size */
+
+ CACHE_POST_WT()
+ CACHE_POST_IINVALIDATE()
+
+ /* Compute r13 = cache_post_test_inst */
+ bl cache_post_test6_reloc
+cache_post_test6_reloc:
+ mflr r13
+ lis r0, (cache_post_test_inst - cache_post_test6_reloc)@h
+ ori r0, r0, (cache_post_test_inst - cache_post_test6_reloc)@l
+ add r13, r13, r0
+
+ /* Copy the test instructions to the test area */
+ lwz r0, 4(r13)
+ stw r0, 0(r11)
+ lwz r0, 8(r13)
+ stw r0, 4(r11)
+ sync
+
+ /* Invalidate the cache line */
+ icbi r0, r11
+ sync
+ isync
+
+ /* Execute the test instructions */
+ mtlr r11
+ blrl
+
+ /* Replace the test instruction */
+ lwz r0, 0(r13)
+ stw r0, 0(r11)
+ sync
+
+ /* Invalidate the cache line */
+ icbi r0, r11
+ sync
+ isync
+
+ /* Execute the test instructions */
+ mtlr r11
+ blrl
+ mr r13, r3
+
+ CACHE_POST_IINVALIDATE()
+ CACHE_POST_DINVALIDATE()
+ CACHE_POST_DISABLE()
+
+ mr r3, r13
+ mtlr r9
+ blr
+
+/* Test instructions.
+ */
+cache_post_test_inst:
+ li r3, 0
+ li r3, -1
+ blr
+
+#endif /* CONFIG_POST & CFG_POST_CACHE */
+#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/ether.c b/post/cpu/ppc4xx/ether.c
new file mode 100644
index 0000000..ab23ca5
--- /dev/null
+++ b/post/cpu/ppc4xx/ether.c
@@ -0,0 +1,402 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Igor Lisitsin <igor@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*
+ * Ethernet test
+ *
+ * The Ethernet Media Access Controllers (EMAC) are tested in the
+ * internal loopback mode.
+ * The controllers are configured accordingly and several packets
+ * are transmitted. The configurable test parameters are:
+ * MIN_PACKET_LENGTH - minimum size of packet to transmit
+ * MAX_PACKET_LENGTH - maximum size of packet to transmit
+ * TEST_NUM - number of tests
+ */
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_ETHER
+
+#include <asm/cache.h>
+#include <asm/io.h>
+#include <asm/processor.h>
+#include <405_mal.h>
+#include <ppc4xx_enet.h>
+#include <malloc.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#define SDR0_MFR_ETH_CLK_SEL_V(n) ((0x01<<27) / (n+1))
+#endif
+
+#define MIN_PACKET_LENGTH 64
+#define MAX_PACKET_LENGTH 256
+#define TEST_NUM 1
+
+static volatile mal_desc_t tx __cacheline_aligned;
+static volatile mal_desc_t rx __cacheline_aligned;
+static char *tx_buf;
+static char *rx_buf;
+
+static void ether_post_init (int devnum, int hw_addr)
+{
+ int i;
+#if defined(CONFIG_440GX) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+ unsigned mode_reg;
+ sys_info_t sysinfo;
+#endif
+#if defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || defined(CONFIG_440SPE)
+ unsigned long mfr;
+#endif
+
+#if defined(CONFIG_440GX) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+ /* Need to get the OPB frequency so we can access the PHY */
+ get_sys_info (&sysinfo);
+#endif
+
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+ /* provide clocks for EMAC internal loopback */
+ mfsdr (sdr_mfr, mfr);
+ mfr |= SDR0_MFR_ETH_CLK_SEL_V(devnum);
+ mtsdr (sdr_mfr, mfr);
+ sync ();
+#endif
+ /* reset emac */
+ out32 (EMAC_M0 + hw_addr, EMAC_M0_SRST);
+ sync ();
+
+ for (i = 0;; i++) {
+ if (!(in32 (EMAC_M0 + hw_addr) & EMAC_M0_SRST))
+ break;
+ if (i >= 1000) {
+ printf ("Timeout resetting EMAC\n");
+ break;
+ }
+ udelay (1000);
+ }
+#if defined(CONFIG_440GX) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+ /* Whack the M1 register */
+ mode_reg = 0x0;
+ if (sysinfo.freqOPB <= 50000000);
+ else if (sysinfo.freqOPB <= 66666667)
+ mode_reg |= EMAC_M1_OBCI_66;
+ else if (sysinfo.freqOPB <= 83333333)
+ mode_reg |= EMAC_M1_OBCI_83;
+ else if (sysinfo.freqOPB <= 100000000)
+ mode_reg |= EMAC_M1_OBCI_100;
+ else
+ mode_reg |= EMAC_M1_OBCI_GT100;
+
+ out32 (EMAC_M1 + hw_addr, mode_reg);
+
+#endif /* defined(CONFIG_440GX) || defined(CONFIG_440SP) */
+
+ /* set the Mal configuration reg */
+#if defined(CONFIG_440GX) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+ mtdcr (malmcr, MAL_CR_PLBB | MAL_CR_OPBBL | MAL_CR_LEA |
+ MAL_CR_PLBLT_DEFAULT | 0x00330000);
+#else
+ mtdcr (malmcr, MAL_CR_PLBB | MAL_CR_OPBBL | MAL_CR_LEA | MAL_CR_PLBLT_DEFAULT);
+ /* Errata 1.12: MAL_1 -- Disable MAL bursting */
+ if (get_pvr() == PVR_440GP_RB) {
+ mtdcr (malmcr, mfdcr(malmcr) & ~MAL_CR_PLBB);
+ }
+#endif
+ /* setup buffer descriptors */
+ tx.ctrl = MAL_TX_CTRL_WRAP;
+ tx.data_len = 0;
+ tx.data_ptr = (char*)L1_CACHE_ALIGN((u32)tx_buf);
+
+ rx.ctrl = MAL_TX_CTRL_WRAP | MAL_RX_CTRL_EMPTY;
+ rx.data_len = 0;
+ rx.data_ptr = (char*)L1_CACHE_ALIGN((u32)rx_buf);
+
+ switch (devnum) {
+ case 1:
+ /* setup MAL tx & rx channel pointers */
+#if defined (CONFIG_405EP) || defined (CONFIG_440EP) || defined (CONFIG_440GR)
+ mtdcr (maltxctp2r, &tx);
+#else
+ mtdcr (maltxctp1r, &tx);
+#endif
+#if defined(CONFIG_440)
+ mtdcr (maltxbattr, 0x0);
+ mtdcr (malrxbattr, 0x0);
+#endif
+ mtdcr (malrxctp1r, &rx);
+ /* set RX buffer size */
+ mtdcr (malrcbs1, PKTSIZE_ALIGN / 16);
+ break;
+ case 0:
+ default:
+ /* setup MAL tx & rx channel pointers */
+#if defined(CONFIG_440)
+ mtdcr (maltxbattr, 0x0);
+ mtdcr (malrxbattr, 0x0);
+#endif
+ mtdcr (maltxctp0r, &tx);
+ mtdcr (malrxctp0r, &rx);
+ /* set RX buffer size */
+ mtdcr (malrcbs0, PKTSIZE_ALIGN / 16);
+ break;
+ }
+
+ /* Enable MAL transmit and receive channels */
+#if defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+ mtdcr (maltxcasr, (MAL_TXRX_CASR >> (devnum*2)));
+#else
+ mtdcr (maltxcasr, (MAL_TXRX_CASR >> devnum));
+#endif
+ mtdcr (malrxcasr, (MAL_TXRX_CASR >> devnum));
+
+ /* set internal loopback mode */
+#ifdef CFG_POST_ETHER_EXT_LOOPBACK
+ out32 (EMAC_M1 + hw_addr, EMAC_M1_FDE | 0 |
+ EMAC_M1_RFS_4K | EMAC_M1_TX_FIFO_2K |
+ EMAC_M1_MF_100MBPS | EMAC_M1_IST |
+ in32 (EMAC_M1));
+#else
+ out32 (EMAC_M1 + hw_addr, EMAC_M1_FDE | EMAC_M1_ILE |
+ EMAC_M1_RFS_4K | EMAC_M1_TX_FIFO_2K |
+ EMAC_M1_MF_100MBPS | EMAC_M1_IST |
+ in32 (EMAC_M1));
+#endif
+
+ /* set transmit enable & receive enable */
+ out32 (EMAC_M0 + hw_addr, EMAC_M0_TXE | EMAC_M0_RXE);
+
+ /* enable broadcast address */
+ out32 (EMAC_RXM + hw_addr, EMAC_RMR_BAE);
+
+ /* set transmit request threshold register */
+ out32 (EMAC_TRTR + hw_addr, 0x18000000); /* 256 byte threshold */
+
+ /* set receive low/high water mark register */
+#if defined(CONFIG_440)
+ /* 440s has a 64 byte burst length */
+ out32 (EMAC_RX_HI_LO_WMARK + hw_addr, 0x80009000);
+#else
+ /* 405s have a 16 byte burst length */
+ out32 (EMAC_RX_HI_LO_WMARK + hw_addr, 0x0f002000);
+#endif /* defined(CONFIG_440) */
+ out32 (EMAC_TXM1 + hw_addr, 0xf8640000);
+
+ /* Set fifo limit entry in tx mode 0 */
+ out32 (EMAC_TXM0 + hw_addr, 0x00000003);
+ /* Frame gap set */
+ out32 (EMAC_I_FRAME_GAP_REG + hw_addr, 0x00000008);
+ sync ();
+}
+
+static void ether_post_halt (int devnum, int hw_addr)
+{
+ int i = 0;
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+ unsigned long mfr;
+#endif
+
+ /* 1st reset MAL channel */
+ /* Note: writing a 0 to a channel has no effect */
+#if defined(CONFIG_405EP) || defined(CONFIG_440EP) || defined(CONFIG_440GR)
+ mtdcr (maltxcarr, MAL_TXRX_CASR >> (devnum * 2));
+#else
+ mtdcr (maltxcarr, MAL_TXRX_CASR >> devnum);
+#endif
+ mtdcr (malrxcarr, MAL_TXRX_CASR >> devnum);
+
+ /* wait for reset */
+ while (mfdcr (malrxcasr) & (MAL_TXRX_CASR >> devnum)) {
+ if (i++ >= 1000)
+ break;
+ udelay (1000);
+ }
+ /* emac reset */
+ out32 (EMAC_M0 + hw_addr, EMAC_M0_SRST);
+
+#if defined(CONFIG_440SPE) || defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+ /* remove clocks for EMAC internal loopback */
+ mfsdr (sdr_mfr, mfr);
+ mfr &= ~SDR0_MFR_ETH_CLK_SEL_V(devnum);
+ mtsdr (sdr_mfr, mfr);
+#endif
+}
+
+static void ether_post_send (int devnum, int hw_addr, void *packet, int length)
+{
+ int i = 0;
+
+ while (tx.ctrl & MAL_TX_CTRL_READY) {
+ if (i++ > 100) {
+ printf ("TX timeout\n");
+ return;
+ }
+ udelay (1000);
+ }
+ tx.ctrl = MAL_TX_CTRL_READY | MAL_TX_CTRL_WRAP | MAL_TX_CTRL_LAST |
+ EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP;
+ tx.data_len = length;
+ memcpy (tx.data_ptr, packet, length);
+ sync ();
+
+ out32 (EMAC_TXM0 + hw_addr, in32 (EMAC_TXM0 + hw_addr) | EMAC_TXM0_GNP0);
+ sync ();
+}
+
+static int ether_post_recv (int devnum, int hw_addr, void *packet, int max_length)
+{
+ int length;
+ int i = 0;
+
+ while (rx.ctrl & MAL_RX_CTRL_EMPTY) {
+ if (i++ > 100) {
+ printf ("RX timeout\n");
+ return 0;
+ }
+ udelay (1000);
+ }
+ length = rx.data_len - 4;
+ if (length <= max_length)
+ memcpy(packet, rx.data_ptr, length);
+ sync ();
+
+ rx.ctrl |= MAL_RX_CTRL_EMPTY;
+ sync ();
+
+ return length;
+}
+
+ /*
+ * Test routines
+ */
+
+static void packet_fill (char *packet, int length)
+{
+ char c = (char) length;
+ int i;
+
+ /* set up ethernet header */
+ memset (packet, 0xff, 14);
+
+ for (i = 14; i < length; i++) {
+ packet[i] = c++;
+ }
+}
+
+static int packet_check (char *packet, int length)
+{
+ char c = (char) length;
+ int i;
+
+ for (i = 14; i < length; i++) {
+ if (packet[i] != c++)
+ return -1;
+ }
+
+ return 0;
+}
+
+static int test_ctlr (int devnum, int hw_addr)
+{
+ int res = -1;
+ char packet_send[MAX_PACKET_LENGTH];
+ char packet_recv[MAX_PACKET_LENGTH];
+ int length;
+ int i;
+ int l;
+
+ ether_post_init (devnum, hw_addr);
+
+ for (i = 0; i < TEST_NUM; i++) {
+ for (l = MIN_PACKET_LENGTH; l <= MAX_PACKET_LENGTH; l++) {
+ packet_fill (packet_send, l);
+
+ ether_post_send (devnum, hw_addr, packet_send, l);
+
+ length = ether_post_recv (devnum, hw_addr, packet_recv,
+ sizeof (packet_recv));
+
+ if (length != l || packet_check (packet_recv, length) < 0) {
+ goto Done;
+ }
+ }
+ }
+
+ res = 0;
+
+Done:
+
+ ether_post_halt (devnum, hw_addr);
+
+ if (res != 0) {
+ post_log ("EMAC%d test failed\n", devnum);
+ }
+
+ return res;
+}
+
+int ether_post_test (int flags)
+{
+ int res = 0;
+
+ /* Allocate tx & rx packet buffers */
+ tx_buf = malloc (PKTSIZE_ALIGN + CFG_CACHELINE_SIZE);
+ rx_buf = malloc (PKTSIZE_ALIGN + CFG_CACHELINE_SIZE);
+
+ if (!tx_buf || !rx_buf) {
+ printf ("Failed to allocate packet buffers\n");
+ res = -1;
+ goto out_free;
+ }
+
+ /* EMAC0 */
+ if (test_ctlr (0, 0))
+ res = -1;
+
+ /* EMAC1 */
+ if (test_ctlr (1, 0x100))
+ res = -1;
+
+out_free:
+ free (tx_buf);
+ free (rx_buf);
+
+ return res;
+}
+
+#endif /* CONFIG_POST & CFG_POST_ETHER */
+#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/fpu.c b/post/cpu/ppc4xx/fpu.c
new file mode 100644
index 0000000..0c26fe0
--- /dev/null
+++ b/post/cpu/ppc4xx/fpu.c
@@ -0,0 +1,59 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Sergei Poselenov <sposelenov@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+
+#ifdef CONFIG_POST
+#if defined(CONFIG_440EP) || \
+ defined(CONFIG_440EPX)
+
+#include <asm/processor.h>
+#include <ppc4xx.h>
+
+
+int fpu_status(void)
+{
+ if (mfspr(ccr0) & CCR0_DAPUIB)
+ return 0; /* Disabled */
+ else
+ return 1; /* Enabled */
+}
+
+
+void fpu_disable(void)
+{
+ mtspr(ccr0, mfspr(ccr0) | CCR0_DAPUIB);
+ mtmsr(mfmsr() & ~MSR_FP);
+}
+
+
+void fpu_enable(void)
+{
+ mtspr(ccr0, mfspr(ccr0) & ~CCR0_DAPUIB);
+ mtmsr(mfmsr() | MSR_FP);
+}
+
+#endif
+#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/spr.c b/post/cpu/ppc4xx/spr.c
new file mode 100644
index 0000000..3e74634
--- /dev/null
+++ b/post/cpu/ppc4xx/spr.c
@@ -0,0 +1,182 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Igor Lisitsin <igor@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*
+ * SPR test
+ *
+ * The test checks the contents of Special Purpose Registers (SPR) listed
+ * in the spr_test_list array below.
+ * Each SPR value is read using mfspr instruction, some bits are masked
+ * according to the table and the resulting value is compared to the
+ * corresponding table value.
+ */
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_SPR
+
+#include <asm/processor.h>
+
+static struct {
+ int number;
+ char * name;
+ unsigned long mask;
+ unsigned long value;
+} spr_test_list [] = {
+ /* Standard Special-Purpose Registers */
+
+ {0x001, "XER", 0x00000000, 0x00000000},
+ {0x008, "LR", 0x00000000, 0x00000000},
+ {0x009, "CTR", 0x00000000, 0x00000000},
+ {0x016, "DEC", 0x00000000, 0x00000000},
+ {0x01a, "SRR0", 0x00000000, 0x00000000},
+ {0x01b, "SRR1", 0x00000000, 0x00000000},
+ {0x110, "SPRG0", 0x00000000, 0x00000000},
+ {0x111, "SPRG1", 0x00000000, 0x00000000},
+ {0x112, "SPRG2", 0x00000000, 0x00000000},
+ {0x113, "SPRG3", 0x00000000, 0x00000000},
+ {0x11f, "PVR", 0x00000000, 0x00000000},
+
+ /* Additional Special-Purpose Registers.
+ * The values must match the initialization
+ * values from cpu/ppc4xx/start.S
+ */
+ {0x30, "PID", 0x00000000, 0x00000000},
+ {0x3a, "CSRR0", 0x00000000, 0x00000000},
+ {0x3b, "CSRR1", 0x00000000, 0x00000000},
+ {0x3d, "DEAR", 0x00000000, 0x00000000},
+ {0x3e, "ESR", 0x00000000, 0x00000000},
+ {0x3f, "IVPR", 0xffff0000, 0x00000000},
+ {0x100, "USPRG0", 0x00000000, 0x00000000},
+ {0x104, "SPRG4", 0x00000000, 0x00000000},
+ {0x105, "SPRG5", 0x00000000, 0x00000000},
+ {0x106, "SPRG6", 0x00000000, 0x00000000},
+ {0x107, "SPRG7", 0x00000000, 0x00000000},
+ {0x10c, "TBL", 0x00000000, 0x00000000},
+ {0x10d, "TBU", 0x00000000, 0x00000000},
+ {0x11e, "PIR", 0x0000000f, 0x00000000},
+ {0x130, "DBSR", 0x00000000, 0x00000000},
+ {0x134, "DBCR0", 0x00000000, 0x00000000},
+ {0x135, "DBCR1", 0x00000000, 0x00000000},
+ {0x136, "DBCR2", 0x00000000, 0x00000000},
+ {0x138, "IAC1", 0x00000000, 0x00000000},
+ {0x139, "IAC2", 0x00000000, 0x00000000},
+ {0x13a, "IAC3", 0x00000000, 0x00000000},
+ {0x13b, "IAC4", 0x00000000, 0x00000000},
+ {0x13c, "DAC1", 0x00000000, 0x00000000},
+ {0x13d, "DAC2", 0x00000000, 0x00000000},
+ {0x13e, "DVC1", 0x00000000, 0x00000000},
+ {0x13f, "DVC2", 0x00000000, 0x00000000},
+ {0x150, "TSR", 0x00000000, 0x00000000},
+ {0x154, "TCR", 0x00000000, 0x00000000},
+ {0x190, "IVOR0", 0x0000fff0, 0x00000100},
+ {0x191, "IVOR1", 0x0000fff0, 0x00000200},
+ {0x192, "IVOR2", 0x0000fff0, 0x00000300},
+ {0x193, "IVOR3", 0x0000fff0, 0x00000400},
+ {0x194, "IVOR4", 0x0000fff0, 0x00000500},
+ {0x195, "IVOR5", 0x0000fff0, 0x00000600},
+ {0x196, "IVOR6", 0x0000fff0, 0x00000700},
+ {0x197, "IVOR7", 0x0000fff0, 0x00000800},
+ {0x198, "IVOR8", 0x0000fff0, 0x00000c00},
+ {0x199, "IVOR9", 0x00000000, 0x00000000},
+ {0x19a, "IVOR10", 0x0000fff0, 0x00000900},
+ {0x19b, "IVOR11", 0x00000000, 0x00000000},
+ {0x19c, "IVOR12", 0x00000000, 0x00000000},
+ {0x19d, "IVOR13", 0x0000fff0, 0x00001300},
+ {0x19e, "IVOR14", 0x0000fff0, 0x00001400},
+ {0x19f, "IVOR15", 0x0000fff0, 0x00002000},
+ {0x23a, "MCSRR0", 0x00000000, 0x00000000},
+ {0x23b, "MCSRR1", 0x00000000, 0x00000000},
+ {0x23c, "MCSR", 0x00000000, 0x00000000},
+ {0x370, "INV0", 0x00000000, 0x00000000},
+ {0x371, "INV1", 0x00000000, 0x00000000},
+ {0x372, "INV2", 0x00000000, 0x00000000},
+ {0x373, "INV3", 0x00000000, 0x00000000},
+ {0x374, "ITV0", 0x00000000, 0x00000000},
+ {0x375, "ITV1", 0x00000000, 0x00000000},
+ {0x376, "ITV2", 0x00000000, 0x00000000},
+ {0x377, "ITV3", 0x00000000, 0x00000000},
+ {0x378, "CCR1", 0x00000000, 0x00000000},
+ {0x390, "DNV0", 0x00000000, 0x00000000},
+ {0x391, "DNV1", 0x00000000, 0x00000000},
+ {0x392, "DNV2", 0x00000000, 0x00000000},
+ {0x393, "DNV3", 0x00000000, 0x00000000},
+ {0x394, "DTV0", 0x00000000, 0x00000000},
+ {0x395, "DTV1", 0x00000000, 0x00000000},
+ {0x396, "DTV2", 0x00000000, 0x00000000},
+ {0x397, "DTV3", 0x00000000, 0x00000000},
+ {0x398, "DVLIM", 0x0fc1f83f, 0x0001f800},
+ {0x399, "IVLIM", 0x0fc1f83f, 0x0001f800},
+ {0x39b, "RSTCFG", 0x00000000, 0x00000000},
+ {0x39c, "DCDBTRL", 0x00000000, 0x00000000},
+ {0x39d, "DCDBTRH", 0x00000000, 0x00000000},
+ {0x39e, "ICDBTRL", 0x00000000, 0x00000000},
+ {0x39f, "ICDBTRH", 0x00000000, 0x00000000},
+ {0x3b2, "MMUCR", 0x00000000, 0x00000000},
+ {0x3b3, "CCR0", 0x00000000, 0x00000000},
+ {0x3d3, "ICDBDR", 0x00000000, 0x00000000},
+ {0x3f3, "DBDR", 0x00000000, 0x00000000},
+};
+
+static int spr_test_list_size =
+ sizeof (spr_test_list) / sizeof (spr_test_list[0]);
+
+int spr_post_test (int flags)
+{
+ int ret = 0;
+ int i;
+
+ unsigned long code[] = {
+ 0x7c6002a6, /* mfspr r3,SPR */
+ 0x4e800020 /* blr */
+ };
+ unsigned long (*get_spr) (void) = (void *) code;
+
+ for (i = 0; i < spr_test_list_size; i++) {
+ int num = spr_test_list[i].number;
+
+ /* mfspr r3,num */
+ code[0] = 0x7c6002a6 | ((num & 0x1F) << 16) | ((num & 0x3E0) << 6);
+
+ asm volatile ("isync");
+
+ if ((get_spr () & spr_test_list[i].mask) !=
+ (spr_test_list[i].value & spr_test_list[i].mask)) {
+ post_log ("The value of %s special register "
+ "is incorrect: 0x%08X\n",
+ spr_test_list[i].name, get_spr ());
+ ret = -1;
+ }
+ }
+
+ return ret;
+}
+
+#endif /* CONFIG_POST & CFG_POST_SPR */
+#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/uart.c b/post/cpu/ppc4xx/uart.c
new file mode 100644
index 0000000..7c3ed40
--- /dev/null
+++ b/post/cpu/ppc4xx/uart.c
@@ -0,0 +1,381 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Igor Lisitsin <igor@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*
+ * UART test
+ *
+ * The controllers are configured to loopback mode and several
+ * characters are transmitted.
+ */
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_UART
+
+/*
+ * This table defines the UART's that should be tested and can
+ * be overridden in the board config file
+ */
+#ifndef CFG_POST_UART_TABLE
+#define CFG_POST_UART_TABLE {UART0_BASE, UART1_BASE, UART2_BASE, UART3_BASE}
+#endif
+
+#include <asm/processor.h>
+#include <serial.h>
+
+#if defined(CONFIG_440)
+#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
+ defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
+#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000300
+#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000400
+#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000500
+#define UART3_BASE CFG_PERIPHERAL_BASE + 0x00000600
+#else
+#define UART0_BASE CFG_PERIPHERAL_BASE + 0x00000200
+#define UART1_BASE CFG_PERIPHERAL_BASE + 0x00000300
+#endif
+
+#if defined(CONFIG_440SP) || defined(CONFIG_440SPE)
+#define UART2_BASE CFG_PERIPHERAL_BASE + 0x00000600
+#endif
+
+#if defined(CONFIG_440GP)
+#define CR0_MASK 0x3fff0000
+#define CR0_EXTCLK_ENA 0x00600000
+#define CR0_UDIV_POS 16
+#define UDIV_SUBTRACT 1
+#define UART0_SDR cntrl0
+#define MFREG(a, d) d = mfdcr(a)
+#define MTREG(a, d) mtdcr(a, d)
+#else /* #if defined(CONFIG_440GP) */
+/* all other 440 PPC's access clock divider via sdr register */
+#define CR0_MASK 0xdfffffff
+#define CR0_EXTCLK_ENA 0x00800000
+#define CR0_UDIV_POS 0
+#define UDIV_SUBTRACT 0
+#define UART0_SDR sdr_uart0
+#define UART1_SDR sdr_uart1
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440GRx) || \
+ defined(CONFIG_440SP) || defined(CONFIG_440SPe)
+#define UART2_SDR sdr_uart2
+#endif
+#if defined(CONFIG_440EP) || defined(CONFIG_440EPx) || \
+ defined(CONFIG_440GR) || defined(CONFIG_440GRx)
+#define UART3_SDR sdr_uart3
+#endif
+#define MFREG(a, d) mfsdr(a, d)
+#define MTREG(a, d) mtsdr(a, d)
+#endif /* #if defined(CONFIG_440GP) */
+#elif defined(CONFIG_405EP) || defined(CONFIG_405EZ)
+#define UART0_BASE 0xef600300
+#define UART1_BASE 0xef600400
+#define UCR0_MASK 0x0000007f
+#define UCR1_MASK 0x00007f00
+#define UCR0_UDIV_POS 0
+#define UCR1_UDIV_POS 8
+#define UDIV_MAX 127
+#else /* CONFIG_405GP || CONFIG_405CR */
+#define UART0_BASE 0xef600300
+#define UART1_BASE 0xef600400
+#define CR0_MASK 0x00001fff
+#define CR0_EXTCLK_ENA 0x000000c0
+#define CR0_UDIV_POS 1
+#define UDIV_MAX 32
+#endif
+
+#define UART_RBR 0x00
+#define UART_THR 0x00
+#define UART_IER 0x01
+#define UART_IIR 0x02
+#define UART_FCR 0x02
+#define UART_LCR 0x03
+#define UART_MCR 0x04
+#define UART_LSR 0x05
+#define UART_MSR 0x06
+#define UART_SCR 0x07
+#define UART_DLL 0x00
+#define UART_DLM 0x01
+
+/*
+ * Line Status Register.
+ */
+#define asyncLSRDataReady1 0x01
+#define asyncLSROverrunError1 0x02
+#define asyncLSRParityError1 0x04
+#define asyncLSRFramingError1 0x08
+#define asyncLSRBreakInterrupt1 0x10
+#define asyncLSRTxHoldEmpty1 0x20
+#define asyncLSRTxShiftEmpty1 0x40
+#define asyncLSRRxFifoError1 0x80
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#if defined(CONFIG_440)
+#if !defined(CFG_EXT_SERIAL_CLOCK)
+static void serial_divs (int baudrate, unsigned long *pudiv,
+ unsigned short *pbdiv)
+{
+ sys_info_t sysinfo;
+ unsigned long div; /* total divisor udiv * bdiv */
+ unsigned long umin; /* minimum udiv */
+ unsigned short diff; /* smallest diff */
+ unsigned long udiv; /* best udiv */
+ unsigned short idiff; /* current diff */
+ unsigned short ibdiv; /* current bdiv */
+ unsigned long i;
+ unsigned long est; /* current estimate */
+
+ get_sys_info(&sysinfo);
+
+ udiv = 32; /* Assume lowest possible serial clk */
+ div = sysinfo.freqPLB / (16 * baudrate); /* total divisor */
+ umin = sysinfo.pllOpbDiv << 1; /* 2 x OPB divisor */
+ diff = 32; /* highest possible */
+
+ /* i is the test udiv value -- start with the largest
+ * possible (32) to minimize serial clock and constrain
+ * search to umin.
+ */
+ for (i = 32; i > umin; i--) {
+ ibdiv = div / i;
+ est = i * ibdiv;
+ idiff = (est > div) ? (est-div) : (div-est);
+ if (idiff == 0) {
+ udiv = i;
+ break; /* can't do better */
+ } else if (idiff < diff) {
+ udiv = i; /* best so far */
+ diff = idiff; /* update lowest diff*/
+ }
+ }
+
+ *pudiv = udiv;
+ *pbdiv = div / udiv;
+}
+#endif
+
+static int uart_post_init (unsigned long dev_base)
+{
+ unsigned long reg;
+ unsigned long udiv;
+ unsigned short bdiv;
+ volatile char val;
+#ifdef CFG_EXT_SERIAL_CLOCK
+ unsigned long tmp;
+#endif
+ int i;
+
+ for (i = 0; i < 3500; i++) {
+ if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1)
+ break;
+ udelay (100);
+ }
+ MFREG(UART0_SDR, reg);
+ reg &= ~CR0_MASK;
+
+#ifdef CFG_EXT_SERIAL_CLOCK
+ reg |= CR0_EXTCLK_ENA;
+ udiv = 1;
+ tmp = gd->baudrate * 16;
+ bdiv = (CFG_EXT_SERIAL_CLOCK + tmp / 2) / tmp;
+#else
+ /* For 440, the cpu clock is on divider chain A, UART on divider
+ * chain B ... so cpu clock is irrelevant. Get the "optimized"
+ * values that are subject to the 1/2 opb clock constraint
+ */
+ serial_divs (gd->baudrate, &udiv, &bdiv);
+#endif
+
+ reg |= (udiv - UDIV_SUBTRACT) << CR0_UDIV_POS; /* set the UART divisor */
+
+ /*
+ * Configure input clock to baudrate generator for all
+ * available serial ports here
+ */
+ MTREG(UART0_SDR, reg);
+#if defined(UART1_SDR)
+ MTREG(UART1_SDR, reg);
+#endif
+#if defined(UART2_SDR)
+ MTREG(UART2_SDR, reg);
+#endif
+#if defined(UART3_SDR)
+ MTREG(UART3_SDR, reg);
+#endif
+
+ out8(dev_base + UART_LCR, 0x80); /* set DLAB bit */
+ out8(dev_base + UART_DLL, bdiv); /* set baudrate divisor */
+ out8(dev_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
+ out8(dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
+ out8(dev_base + UART_FCR, 0x00); /* disable FIFO */
+ out8(dev_base + UART_MCR, 0x10); /* enable loopback mode */
+ val = in8(dev_base + UART_LSR); /* clear line status */
+ val = in8(dev_base + UART_RBR); /* read receive buffer */
+ out8(dev_base + UART_SCR, 0x00); /* set scratchpad */
+ out8(dev_base + UART_IER, 0x00); /* set interrupt enable reg */
+
+ return 0;
+}
+
+#else /* CONFIG_440 */
+
+static int uart_post_init (unsigned long dev_base)
+{
+ unsigned long reg;
+ unsigned long tmp;
+ unsigned long clk;
+ unsigned long udiv;
+ unsigned short bdiv;
+ volatile char val;
+ int i;
+
+ for (i = 0; i < 3500; i++) {
+ if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1)
+ break;
+ udelay (100);
+ }
+
+#if defined(CONFIG_405EZ)
+ serial_divs(gd->baudrate, &udiv, &bdiv);
+ clk = tmp = reg = 0;
+#else
+#ifdef CONFIG_405EP
+ reg = mfdcr(cpc0_ucr) & ~(UCR0_MASK | UCR1_MASK);
+ clk = gd->cpu_clk;
+ tmp = CFG_BASE_BAUD * 16;
+ udiv = (clk + tmp / 2) / tmp;
+ if (udiv > UDIV_MAX) /* max. n bits for udiv */
+ udiv = UDIV_MAX;
+ reg |= (udiv) << UCR0_UDIV_POS; /* set the UART divisor */
+ reg |= (udiv) << UCR1_UDIV_POS; /* set the UART divisor */
+ mtdcr (cpc0_ucr, reg);
+#else /* CONFIG_405EP */
+ reg = mfdcr(cntrl0) & ~CR0_MASK;
+#ifdef CFG_EXT_SERIAL_CLOCK
+ clk = CFG_EXT_SERIAL_CLOCK;
+ udiv = 1;
+ reg |= CR0_EXTCLK_ENA;
+#else
+ clk = gd->cpu_clk;
+#ifdef CFG_405_UART_ERRATA_59
+ udiv = 31; /* Errata 59: stuck at 31 */
+#else
+ tmp = CFG_BASE_BAUD * 16;
+ udiv = (clk + tmp / 2) / tmp;
+ if (udiv > UDIV_MAX) /* max. n bits for udiv */
+ udiv = UDIV_MAX;
+#endif
+#endif
+ reg |= (udiv - 1) << CR0_UDIV_POS; /* set the UART divisor */
+ mtdcr (cntrl0, reg);
+#endif /* CONFIG_405EP */
+ tmp = gd->baudrate * udiv * 16;
+ bdiv = (clk + tmp / 2) / tmp;
+#endif /* CONFIG_405EZ */
+
+ out8(dev_base + UART_LCR, 0x80); /* set DLAB bit */
+ out8(dev_base + UART_DLL, bdiv); /* set baudrate divisor */
+ out8(dev_base + UART_DLM, bdiv >> 8); /* set baudrate divisor */
+ out8(dev_base + UART_LCR, 0x03); /* clear DLAB; set 8 bits, no parity */
+ out8(dev_base + UART_FCR, 0x00); /* disable FIFO */
+ out8(dev_base + UART_MCR, 0x10); /* enable loopback mode */
+ val = in8(dev_base + UART_LSR); /* clear line status */
+ val = in8(dev_base + UART_RBR); /* read receive buffer */
+ out8(dev_base + UART_SCR, 0x00); /* set scratchpad */
+ out8(dev_base + UART_IER, 0x00); /* set interrupt enable reg */
+
+ return (0);
+}
+#endif /* CONFIG_440 */
+
+static void uart_post_putc (unsigned long dev_base, char c)
+{
+ int i;
+
+ out8 (dev_base + UART_THR, c); /* put character out */
+
+ /* Wait for transfer completion */
+ for (i = 0; i < 3500; i++) {
+ if (in8 (dev_base + UART_LSR) & asyncLSRTxHoldEmpty1)
+ break;
+ udelay (100);
+ }
+}
+
+static int uart_post_getc (unsigned long dev_base)
+{
+ int i;
+
+ /* Wait for character available */
+ for (i = 0; i < 3500; i++) {
+ if (in8 (dev_base + UART_LSR) & asyncLSRDataReady1)
+ break;
+ udelay (100);
+ }
+ return 0xff & in8 (dev_base + UART_RBR);
+}
+
+static int test_ctlr (unsigned long dev_base, int index)
+{
+ int res = -1;
+ char test_str[] = "*** UART Test String ***\r\n";
+ int i;
+
+ uart_post_init (dev_base);
+
+ for (i = 0; i < sizeof (test_str) - 1; i++) {
+ uart_post_putc (dev_base, test_str[i]);
+ if (uart_post_getc (dev_base) != test_str[i])
+ goto done;
+ }
+ res = 0;
+done:
+ if (res)
+ post_log ("uart%d test failed\n", index);
+
+ return res;
+}
+
+int uart_post_test (int flags)
+{
+ int i, res = 0;
+ static unsigned long base[] = CFG_POST_UART_TABLE;
+
+ for (i = 0; i < sizeof (base) / sizeof (base[0]); i++) {
+ if (test_ctlr (base[i], i))
+ res = -1;
+ }
+ serial_reinit_all ();
+
+ return res;
+}
+
+#endif /* CONFIG_POST & CFG_POST_UART */
+#endif /* CONFIG_POST */
diff --git a/post/cpu/ppc4xx/watchdog.c b/post/cpu/ppc4xx/watchdog.c
new file mode 100644
index 0000000..bd4f4c9
--- /dev/null
+++ b/post/cpu/ppc4xx/watchdog.c
@@ -0,0 +1,71 @@
+/*
+ * (C) Copyright 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Igor Lisitsin <igor@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*
+ * Watchdog test
+ *
+ * The test verifies the watchdog timer operation.
+ * On the first iteration, the test routine disables interrupts and
+ * makes a 10-second delay. If the system does not reboot during this delay,
+ * the watchdog timer is not operational and the test fails. If the system
+ * reboots, on the second iteration the test routine reports a success.
+ */
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_WATCHDOG
+
+#include <watchdog.h>
+
+int watchdog_post_test (int flags)
+{
+ if (flags & POST_REBOOT) {
+ /* Test passed */
+ return 0;
+ }
+ else {
+ /* 10-second delay */
+ int ints = disable_interrupts ();
+ ulong base = post_time_ms (0);
+
+ while (post_time_ms (base) < 10000)
+ ;
+ if (ints)
+ enable_interrupts ();
+
+ /*
+ * If we have reached this point, the watchdog timer
+ * does not work
+ */
+ return -1;
+ }
+}
+
+#endif /* CONFIG_POST & CFG_POST_WATCHDOG */
+#endif /* CONFIG_POST */
diff --git a/post/drivers/Makefile b/post/drivers/Makefile
index 068fa98..cb2f1de 100644
--- a/post/drivers/Makefile
+++ b/post/drivers/Makefile
@@ -26,6 +26,6 @@
LIB = libpostdrivers.a
-COBJS = cache.o i2c.o memory.o rtc.o
+COBJS = i2c.o memory.o rtc.o
include $(TOPDIR)/post/rules.mk
diff --git a/post/drivers/memory.c b/post/drivers/memory.c
index a2c088b..fbc349a 100644
--- a/post/drivers/memory.c
+++ b/post/drivers/memory.c
@@ -461,6 +461,9 @@
unsigned long memsize = (bd->bi_memsize >= 256 << 20 ?
256 << 20 : bd->bi_memsize) - (1 << 20);
+ /* Limit area to be tested with the board info struct */
+ if (CFG_SDRAM_BASE + memsize > (ulong)bd)
+ memsize = (ulong)bd - CFG_SDRAM_BASE;
if (flags & POST_SLOWTEST) {
ret = memory_post_tests (CFG_SDRAM_BASE, memsize);
diff --git a/post/lib_ppc/Makefile b/post/lib_ppc/Makefile
index 14354a0..9f1b329 100644
--- a/post/lib_ppc/Makefile
+++ b/post/lib_ppc/Makefile
@@ -21,6 +21,7 @@
# MA 02111-1307 USA
#
+SUBDIRS = fpu
LIB = libpostppc.a
diff --git a/post/lib_ppc/asm.S b/post/lib_ppc/asm.S
index a0815a4..5e72b34 100644
--- a/post/lib_ppc/asm.S
+++ b/post/lib_ppc/asm.S
@@ -34,6 +34,7 @@
/* void cpu_post_exec_02 (ulong *code, ulong op1, ulong op2); */
.global cpu_post_exec_02
cpu_post_exec_02:
+ isync
mflr r0
stwu r0, -4(r1)
@@ -56,6 +57,7 @@
/* void cpu_post_exec_04 (ulong *code, ulong op1, ulong op2, ulong op3, ulong op4); */
.global cpu_post_exec_04
cpu_post_exec_04:
+ isync
mflr r0
stwu r0, -4(r1)
@@ -80,6 +82,7 @@
/* void cpu_post_exec_12 (ulong *code, ulong *res, ulong op1, ulong op2); */
.global cpu_post_exec_12
cpu_post_exec_12:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -100,6 +103,7 @@
/* void cpu_post_exec_11 (ulong *code, ulong *res, ulong op1); */
.global cpu_post_exec_11
cpu_post_exec_11:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -119,6 +123,7 @@
/* void cpu_post_exec_21 (ulong *code, ulong *cr, ulong *res, ulong op1); */
.global cpu_post_exec_21
cpu_post_exec_21:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -148,6 +153,7 @@
ulong op2); */
.global cpu_post_exec_22
cpu_post_exec_22:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -177,6 +183,7 @@
/* void cpu_post_exec_12w (ulong *code, ulong *op1, ulong op2, ulong op3); */
.global cpu_post_exec_12w
cpu_post_exec_12w:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -198,6 +205,7 @@
/* void cpu_post_exec_11w (ulong *code, ulong *op1, ulong op2); */
.global cpu_post_exec_11w
cpu_post_exec_11w:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -218,6 +226,7 @@
/* void cpu_post_exec_22w (ulong *code, ulong *op1, ulong op2, ulong *op3); */
.global cpu_post_exec_22w
cpu_post_exec_22w:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -241,6 +250,7 @@
/* void cpu_post_exec_21w (ulong *code, ulong *op1, ulong *op2); */
.global cpu_post_exec_21w
cpu_post_exec_21w:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -263,6 +273,7 @@
/* void cpu_post_exec_21x (ulong *code, ulong *op1, ulong *op2, ulong op3); */
.global cpu_post_exec_21x
cpu_post_exec_21x:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
@@ -286,6 +297,7 @@
ulong cr); */
.global cpu_post_exec_31
cpu_post_exec_31:
+ isync
mflr r0
stwu r0, -4(r1)
stwu r4, -4(r1)
diff --git a/post/lib_ppc/b.c b/post/lib_ppc/b.c
index b4b17c8..6e276c4 100644
--- a/post/lib_ppc/b.c
+++ b/post/lib_ppc/b.c
@@ -49,7 +49,7 @@
ulong cr);
static int cpu_post_test_bc (ulong cmd, ulong bo, ulong bi,
- int pjump, int dec, int link, ulong pctr, ulong cr)
+ int pjump, int decr, int link, ulong pctr, ulong cr)
{
int ret = 0;
ulong lr = 0;
@@ -77,7 +77,7 @@
ret = pjump == jump ? 0 : -1;
if (ret == 0)
{
- if (dec)
+ if (decr)
ret = pctr == ctr + 1 ? 0 : -1;
else
ret = pctr == ctr ? 0 : -1;
@@ -163,7 +163,7 @@
{
for (ctr = 1; ctr <= 2 && ret == 0; ctr++)
{
- int dec = cd < 2;
+ int decr = cd < 2;
int cr = cond ? 0x80000000 : 0x00000000;
int jumpc = cc >= 2 ||
(cc == 0 && !cond) ||
@@ -174,7 +174,7 @@
int jump = jumpc && jumpd;
ret = cpu_post_test_bc (link ? OP_BCL : OP_BC,
- (cc << 3) + (cd << 1), 0, jump, dec, link,
+ (cc << 3) + (cd << 1), 0, jump, decr, link,
ctr, cr);
if (ret != 0)
diff --git a/post/lib_ppc/fpu/20001122-1.c b/post/lib_ppc/fpu/20001122-1.c
new file mode 100644
index 0000000..f689b82
--- /dev/null
+++ b/post/lib_ppc/fpu/20001122-1.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * This file is originally a part of the GCC testsuite.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+int fpu_post_test_math1 (void)
+{
+ volatile double a, *p;
+ double c, d;
+ volatile double b;
+
+ d = 1.0;
+ p = &b;
+
+ do
+ {
+ c = d;
+ d = c * 0.5;
+ b = 1 + d;
+ } while (b != 1.0);
+
+ a = 1.0 + c;
+
+ if (a == 1.0) {
+ post_log ("Error in FPU math1 test\n");
+ return -1;
+ }
+
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/20010114-2.c b/post/lib_ppc/fpu/20010114-2.c
new file mode 100644
index 0000000..6e60507
--- /dev/null
+++ b/post/lib_ppc/fpu/20010114-2.c
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * This file is originally a part of the GCC testsuite.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+static float rintf (float x)
+{
+ volatile float TWO23 = 8388608.0;
+
+ if (__builtin_fabs (x) < TWO23)
+ {
+ if (x > 0.0)
+ {
+ x += TWO23;
+ x -= TWO23;
+ }
+ else if (x < 0.0)
+ {
+ x = TWO23 - x;
+ x = -(x - TWO23);
+ }
+ }
+
+ return x;
+}
+
+int fpu_post_test_math2 (void)
+{
+ if (rintf (-1.5) != -2.0) {
+ post_log ("Error in FPU math2 test\n");
+ return -1;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/20010226-1.c b/post/lib_ppc/fpu/20010226-1.c
new file mode 100644
index 0000000..b2c47e3
--- /dev/null
+++ b/post/lib_ppc/fpu/20010226-1.c
@@ -0,0 +1,54 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * This file is originally a part of the GCC testsuite.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+int fpu_post_test_math3 (void)
+{
+ volatile long double dfrom = 1.1;
+ volatile long double m1;
+ volatile long double m2;
+ volatile unsigned long mant_long;
+
+ m1 = dfrom / 2.0;
+ m2 = m1 * 4294967296.0;
+ mant_long = ((unsigned long) m2) & 0xffffffff;
+
+ if (mant_long != 0x8ccccccc) {
+ post_log ("Error in FPU math3 test\n");
+ return -1;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/980619-1.c b/post/lib_ppc/fpu/980619-1.c
new file mode 100644
index 0000000..990aa0c
--- /dev/null
+++ b/post/lib_ppc/fpu/980619-1.c
@@ -0,0 +1,60 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * This file is originally a part of the GCC testsuite.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+int fpu_post_test_math4 (void)
+{
+ volatile float reale = 1.0f;
+ volatile float oneplus;
+ int i;
+
+ if (sizeof (float) != 4)
+ return 0;
+
+ for (i = 0; ; i++)
+ {
+ oneplus = 1.0f + reale;
+ if (oneplus == 1.0f)
+ break;
+ reale = reale / 2.0f;
+ }
+ /* Assumes ieee754 accurate arithmetic above. */
+ if (i != 24) {
+ post_log ("Error in FPU math4 test\n");
+ return -1;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/Makefile b/post/lib_ppc/fpu/Makefile
new file mode 100644
index 0000000..82646c8
--- /dev/null
+++ b/post/lib_ppc/fpu/Makefile
@@ -0,0 +1,32 @@
+#
+# (C) Copyright 2007
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+
+LIB = libpostppcfpu.a
+
+COBJS += fpu.o 20001122-1.o 20010114-2.o 20010226-1.o 980619-1.o
+COBJS += acc1.o compare-fp-1.o mul-subnormal-single-1.o
+
+include $(TOPDIR)/post/rules.mk
+
+CFLAGS += -mhard-float -fkeep-inline-functions
diff --git a/post/lib_ppc/fpu/acc1.c b/post/lib_ppc/fpu/acc1.c
new file mode 100644
index 0000000..4cecbf6
--- /dev/null
+++ b/post/lib_ppc/fpu/acc1.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * This file is originally a part of the GCC testsuite.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+static double func (const double *array)
+{
+ double d = *array;
+
+ if (d == 0.0)
+ return d;
+ else
+ return d + func (array + 1);
+}
+
+int fpu_post_test_math5 (void)
+{
+ double values[] = { 0.1e-100, 1.0, -1.0, 0.0 };
+
+ if (func (values) != 0.1e-100) {
+ post_log ("Error in FPU math5 test\n");
+ return -1;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/compare-fp-1.c b/post/lib_ppc/fpu/compare-fp-1.c
new file mode 100644
index 0000000..d866ad5
--- /dev/null
+++ b/post/lib_ppc/fpu/compare-fp-1.c
@@ -0,0 +1,225 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * Test for correctness of composite floating-point comparisons.
+ * Written by Paolo Bonzini, 26th May 2004.
+ * This file is originally a part of the GCC testsuite.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+static int failed;
+
+#define TEST(c) if ((c) != ok) failed++
+#define ORD(a, b) (!__builtin_isunordered ((a), (b)))
+#define UNORD(a, b) (__builtin_isunordered ((a), (b)))
+#define UNEQ(a, b) (__builtin_isunordered ((a), (b)) || ((a) == (b)))
+#define UNLT(a, b) (__builtin_isunordered ((a), (b)) || ((a) < (b)))
+#define UNLE(a, b) (__builtin_isunordered ((a), (b)) || ((a) <= (b)))
+#define UNGT(a, b) (__builtin_isunordered ((a), (b)) || ((a) > (b)))
+#define UNGE(a, b) (__builtin_isunordered ((a), (b)) || ((a) >= (b)))
+#define LTGT(a, b) (__builtin_islessgreater ((a), (b)))
+
+static float pinf;
+static float ninf;
+static float NaN;
+
+static void iuneq (float x, float y, int ok)
+{
+ TEST (UNEQ (x, y));
+ TEST (!LTGT (x, y));
+ TEST (UNLE (x, y) && UNGE (x,y));
+}
+
+static void ieq (float x, float y, int ok)
+{
+ TEST (ORD (x, y) && UNEQ (x, y));
+}
+
+static void iltgt (float x, float y, int ok)
+{
+ TEST (!UNEQ (x, y)); /* Not optimizable. */
+ TEST (LTGT (x, y)); /* Same, __builtin_islessgreater does not trap. */
+ TEST (ORD (x, y) && (UNLT (x, y) || UNGT (x,y)));
+}
+
+static void ine (float x, float y, int ok)
+{
+ TEST (UNLT (x, y) || UNGT (x, y));
+}
+
+static void iunlt (float x, float y, int ok)
+{
+ TEST (UNLT (x, y));
+ TEST (UNORD (x, y) || (x < y));
+}
+
+static void ilt (float x, float y, int ok)
+{
+ TEST (ORD (x, y) && UNLT (x, y)); /* Not optimized */
+ TEST ((x <= y) && (x != y));
+ TEST ((x <= y) && (y != x));
+ TEST ((x != y) && (x <= y)); /* Not optimized */
+ TEST ((y != x) && (x <= y)); /* Not optimized */
+}
+
+static void iunle (float x, float y, int ok)
+{
+ TEST (UNLE (x, y));
+ TEST (UNORD (x, y) || (x <= y));
+}
+
+static void ile (float x, float y, int ok)
+{
+ TEST (ORD (x, y) && UNLE (x, y)); /* Not optimized */
+ TEST ((x < y) || (x == y));
+ TEST ((y > x) || (x == y));
+ TEST ((x == y) || (x < y)); /* Not optimized */
+ TEST ((y == x) || (x < y)); /* Not optimized */
+}
+
+static void iungt (float x, float y, int ok)
+{
+ TEST (UNGT (x, y));
+ TEST (UNORD (x, y) || (x > y));
+}
+
+static void igt (float x, float y, int ok)
+{
+ TEST (ORD (x, y) && UNGT (x, y)); /* Not optimized */
+ TEST ((x >= y) && (x != y));
+ TEST ((x >= y) && (y != x));
+ TEST ((x != y) && (x >= y)); /* Not optimized */
+ TEST ((y != x) && (x >= y)); /* Not optimized */
+}
+
+static void iunge (float x, float y, int ok)
+{
+ TEST (UNGE (x, y));
+ TEST (UNORD (x, y) || (x >= y));
+}
+
+static void ige (float x, float y, int ok)
+{
+ TEST (ORD (x, y) && UNGE (x, y)); /* Not optimized */
+ TEST ((x > y) || (x == y));
+ TEST ((y < x) || (x == y));
+ TEST ((x == y) || (x > y)); /* Not optimized */
+ TEST ((y == x) || (x > y)); /* Not optimized */
+}
+
+int fpu_post_test_math6 (void)
+{
+ pinf = __builtin_inf ();
+ ninf = -__builtin_inf ();
+ NaN = __builtin_nan ("");
+
+ iuneq (ninf, pinf, 0);
+ iuneq (NaN, NaN, 1);
+ iuneq (pinf, ninf, 0);
+ iuneq (1, 4, 0);
+ iuneq (3, 3, 1);
+ iuneq (5, 2, 0);
+
+ ieq (1, 4, 0);
+ ieq (3, 3, 1);
+ ieq (5, 2, 0);
+
+ iltgt (ninf, pinf, 1);
+ iltgt (NaN, NaN, 0);
+ iltgt (pinf, ninf, 1);
+ iltgt (1, 4, 1);
+ iltgt (3, 3, 0);
+ iltgt (5, 2, 1);
+
+ ine (1, 4, 1);
+ ine (3, 3, 0);
+ ine (5, 2, 1);
+
+ iunlt (NaN, ninf, 1);
+ iunlt (pinf, NaN, 1);
+ iunlt (pinf, ninf, 0);
+ iunlt (pinf, pinf, 0);
+ iunlt (ninf, ninf, 0);
+ iunlt (1, 4, 1);
+ iunlt (3, 3, 0);
+ iunlt (5, 2, 0);
+
+ ilt (1, 4, 1);
+ ilt (3, 3, 0);
+ ilt (5, 2, 0);
+
+ iunle (NaN, ninf, 1);
+ iunle (pinf, NaN, 1);
+ iunle (pinf, ninf, 0);
+ iunle (pinf, pinf, 1);
+ iunle (ninf, ninf, 1);
+ iunle (1, 4, 1);
+ iunle (3, 3, 1);
+ iunle (5, 2, 0);
+
+ ile (1, 4, 1);
+ ile (3, 3, 1);
+ ile (5, 2, 0);
+
+ iungt (NaN, ninf, 1);
+ iungt (pinf, NaN, 1);
+ iungt (pinf, ninf, 1);
+ iungt (pinf, pinf, 0);
+ iungt (ninf, ninf, 0);
+ iungt (1, 4, 0);
+ iungt (3, 3, 0);
+ iungt (5, 2, 1);
+
+ igt (1, 4, 0);
+ igt (3, 3, 0);
+ igt (5, 2, 1);
+
+ iunge (NaN, ninf, 1);
+ iunge (pinf, NaN, 1);
+ iunge (ninf, pinf, 0);
+ iunge (pinf, pinf, 1);
+ iunge (ninf, ninf, 1);
+ iunge (1, 4, 0);
+ iunge (3, 3, 1);
+ iunge (5, 2, 1);
+
+ ige (1, 4, 0);
+ ige (3, 3, 1);
+ ige (5, 2, 1);
+
+ if (failed) {
+ post_log ("Error in FPU math6 test\n");
+ return -1;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/fpu.c b/post/lib_ppc/fpu/fpu.c
new file mode 100644
index 0000000..07dcba8
--- /dev/null
+++ b/post/lib_ppc/fpu/fpu.c
@@ -0,0 +1,92 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * Author: Sergei Poselenov <sposelenov@emcraft.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+/*
+ * FPU test
+ *
+ * This test checks the arithmetic logic unit (ALU) of CPU.
+ * It tests independently various groups of instructions using
+ * run-time modification of the code to reduce the memory footprint.
+ * For more details refer to post/cpu/ *.c files.
+ */
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+#include <watchdog.h>
+
+extern int fpu_status (void);
+extern void fpu_enable (void);
+extern void fpu_disable (void);
+
+extern int fpu_post_test_math1 (void);
+extern int fpu_post_test_math2 (void);
+extern int fpu_post_test_math3 (void);
+extern int fpu_post_test_math4 (void);
+extern int fpu_post_test_math5 (void);
+extern int fpu_post_test_math6 (void);
+extern int fpu_post_test_math7 (void);
+
+int fpu_post_test (int flags)
+{
+ int fpu = fpu_status ();
+
+ int ret = 0;
+
+ WATCHDOG_RESET ();
+
+ if (!fpu)
+ fpu_enable ();
+
+ if (ret == 0)
+ ret = fpu_post_test_math1 ();
+ if (ret == 0)
+ ret = fpu_post_test_math2 ();
+ if (ret == 0)
+ ret = fpu_post_test_math3 ();
+ if (ret == 0)
+ ret = fpu_post_test_math4 ();
+ if (ret == 0)
+ ret = fpu_post_test_math5 ();
+ if (ret == 0)
+ ret = fpu_post_test_math6 ();
+ if (ret == 0)
+ ret = fpu_post_test_math7 ();
+
+ if (!fpu)
+ fpu_disable ();
+
+ WATCHDOG_RESET ();
+
+ return ret;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/lib_ppc/fpu/mul-subnormal-single-1.c b/post/lib_ppc/fpu/mul-subnormal-single-1.c
new file mode 100644
index 0000000..67f48da
--- /dev/null
+++ b/post/lib_ppc/fpu/mul-subnormal-single-1.c
@@ -0,0 +1,103 @@
+/*
+ * Copyright (C) 2007
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+/*
+ * This file is originally a part of the GCC testsuite.
+ * Check that certain subnormal numbers (formerly known as denormalized
+ * numbers) are rounded to within 0.5 ulp. PR other/14354.
+ */
+
+#include <common.h>
+
+#ifdef CONFIG_POST
+
+#include <post.h>
+
+#if CONFIG_POST & CFG_POST_FPU
+
+union uf
+{
+ unsigned int u;
+ float f;
+};
+
+static float
+u2f (unsigned int v)
+{
+ union uf u;
+ u.u = v;
+ return u.f;
+}
+
+static unsigned int
+f2u (float v)
+{
+ union uf u;
+ u.f = v;
+ return u.u;
+}
+
+static int ok = 1;
+
+static void
+tstmul (unsigned int ux, unsigned int uy, unsigned int ur)
+{
+ float x = u2f (ux);
+ float y = u2f (uy);
+
+ if (f2u (x * y) != ur)
+ /* Set a variable rather than aborting here, to simplify tracing when
+ several computations are wrong. */
+ ok = 0;
+}
+
+/* We don't want to make this const and static, or else we risk inlining
+ causing the test to fold as constants at compile-time. */
+struct
+{
+ unsigned int p1, p2, res;
+} static volatile expected[] =
+{
+ {0xfff, 0x3f800400, 0xfff},
+ {0xf, 0x3fc88888, 0x17},
+ {0xf, 0x3f844444, 0xf}
+};
+
+int fpu_post_test_math7 (void)
+{
+ unsigned int i;
+
+ for (i = 0; i < sizeof (expected) / sizeof (expected[0]); i++)
+ {
+ tstmul (expected[i].p1, expected[i].p2, expected[i].res);
+ tstmul (expected[i].p2, expected[i].p1, expected[i].res);
+ }
+
+ if (!ok) {
+ post_log ("Error in FPU math7 test\n");
+ return -1;
+ }
+ return 0;
+}
+
+#endif /* CONFIG_POST & CFG_POST_FPU */
+#endif /* CONFIG_POST */
diff --git a/post/post.c b/post/post.c
index ac41990..4ff75ee 100644
--- a/post/post.c
+++ b/post/post.c
@@ -129,9 +129,7 @@
post_log ("PASSED\n");
else {
post_log ("FAILED\n");
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
- show_boot_progress(-31);
-#endif
+ show_boot_progress (-31);
}
}
}
@@ -241,9 +239,7 @@
} else {
if ((*test->test) (flags) != 0) {
post_log ("FAILED\n");
-#ifdef CONFIG_SHOW_BOOT_PROGRESS
- show_boot_progress(-32);
-#endif
+ show_boot_progress (-32);
}
else
post_log ("PASSED\n");
@@ -428,7 +424,7 @@
unsigned long post_time_ms (unsigned long base)
{
#ifdef CONFIG_PPC
- return (unsigned long)get_ticks () / (get_tbclk () / CFG_HZ) - base;
+ return (unsigned long)(get_ticks () / (get_tbclk () / CFG_HZ)) - base;
#else
#warning "Not implemented yet"
return 0; /* Not implemented yet */
diff --git a/post/tests.c b/post/tests.c
index 3bccd1a..e1c3d28 100644
--- a/post/tests.c
+++ b/post/tests.c
@@ -37,6 +37,7 @@
extern int rtc_post_test (int flags);
extern int memory_post_test (int flags);
extern int cpu_post_test (int flags);
+extern int fpu_post_test (int flags);
extern int uart_post_test (int flags);
extern int ether_post_test (int flags);
extern int spi_post_test (int flags);
@@ -45,6 +46,7 @@
extern int sysmon_post_test (int flags);
extern int dsp_post_test (int flags);
extern int codec_post_test (int flags);
+extern int ecc_post_test (int flags);
extern int sysmon_init_f (void);
@@ -126,6 +128,19 @@
CFG_POST_CPU
},
#endif
+#if CONFIG_POST & CFG_POST_FPU
+ {
+ "FPU test",
+ "fpu",
+ "This test verifies the arithmetic logic unit of"
+ " FPU.",
+ POST_RAM | POST_ALWAYS,
+ &fpu_post_test,
+ NULL,
+ NULL,
+ CFG_POST_FPU
+ },
+#endif
#if CONFIG_POST & CFG_POST_UART
{
"UART test",
@@ -222,6 +237,18 @@
CFG_POST_CODEC
},
#endif
+#if CONFIG_POST & CFG_POST_ECC
+ {
+ "ECC test",
+ "ecc",
+ "This test checks ECC facility of memory.",
+ POST_ROM | POST_ALWAYS,
+ &ecc_post_test,
+ NULL,
+ NULL,
+ CFG_POST_ECC
+ },
+#endif
};
unsigned int post_list_size = sizeof (post_list) / sizeof (struct post_test);
diff --git a/rtc/Makefile b/rtc/Makefile
index 96c68c0..2e6f3bd 100644
--- a/rtc/Makefile
+++ b/rtc/Makefile
@@ -31,7 +31,8 @@
bf5xx_rtc.o ds12887.o ds1302.o ds1306.o ds1307.o \
ds1337.o ds1374.o ds1556.o ds164x.o ds174x.o ds3231.o \
m41t11.o max6900.o m48t35ax.o mc146818.o mk48t59.o \
- mpc5xxx.o mpc8xx.o pcf8563.o s3c24x0_rtc.o rs5c372.o
+ mpc5xxx.o mpc8xx.o pcf8563.o s3c24x0_rtc.o rs5c372.o \
+ mcfrtc.o
SRCS := $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
diff --git a/rtc/bf5xx_rtc.c b/rtc/bf5xx_rtc.c
index 85bbb56..8856bb9 100644
--- a/rtc/bf5xx_rtc.c
+++ b/rtc/bf5xx_rtc.c
@@ -49,7 +49,7 @@
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_BFIN) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_BFIN) && defined(CONFIG_CMD_DATE)
#include <asm/blackfin.h>
#include <asm/arch/bf5xx_rtc.h>
@@ -140,4 +140,4 @@
MIN_TO_SECS(tm_min) + HRS_TO_SECS(tm_hour) + DAYS_TO_SECS(tm_day);
to_tm(time_in_sec, tmp);
}
-#endif /* CONFIG_RTC_BFIN && CFG_CMD_DATE */
+#endif
diff --git a/rtc/date.c b/rtc/date.c
index b5f8c48..a83a723 100644
--- a/rtc/date.c
+++ b/rtc/date.c
@@ -29,7 +29,7 @@
#include <command.h>
#include <rtc.h>
-#if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
+#if defined(CONFIG_CMD_DATE) || defined(CONFIG_TIMESTAMP)
#define FEBRUARY 2
#define STARTOFTIME 1970
@@ -153,4 +153,4 @@
)*60 + sec; /* finally seconds */
}
-#endif /* CFG_CMD_DATE */
+#endif
diff --git a/rtc/ds12887.c b/rtc/ds12887.c
index 8b12893..84fecf0 100644
--- a/rtc/ds12887.c
+++ b/rtc/ds12887.c
@@ -28,7 +28,7 @@
#include <config.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_DS12887) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS12887) && defined(CONFIG_CMD_DATE)
#define RTC_SECONDS 0x00
#define RTC_SECONDS_ALARM 0x01
@@ -235,4 +235,4 @@
rtc_write(RTC_CONTROL_B,ctrl_rg);
}
-#endif /* (CONFIG_RTC_DS12887) && (CONFIG_COMMANDS & CFG_CMD_DATE) */
+#endif
diff --git a/rtc/ds1302.c b/rtc/ds1302.c
index 98dce89..55af130 100644
--- a/rtc/ds1302.c
+++ b/rtc/ds1302.c
@@ -9,7 +9,7 @@
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_DS1302) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS1302) && defined(CONFIG_CMD_DATE)
/* GPP Pins */
#define DATA 0x200
diff --git a/rtc/ds1306.c b/rtc/ds1306.c
index e01e1ce..89e433d 100644
--- a/rtc/ds1306.c
+++ b/rtc/ds1306.c
@@ -36,7 +36,7 @@
#include <rtc.h>
#include <spi.h>
-#if defined(CONFIG_RTC_DS1306) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS1306) && defined(CONFIG_CMD_DATE)
#define RTC_SECONDS 0x00
#define RTC_MINUTES 0x01
diff --git a/rtc/ds1307.c b/rtc/ds1307.c
index 3b26a0a..c882d79 100644
--- a/rtc/ds1307.c
+++ b/rtc/ds1307.c
@@ -36,7 +36,7 @@
#include <i2c.h>
#if (defined(CONFIG_RTC_DS1307) || defined(CONFIG_RTC_DS1338) ) && \
- (CONFIG_COMMANDS & CFG_CMD_DATE)
+ defined(CONFIG_CMD_DATE)
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
@@ -201,4 +201,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* (CONFIG_RTC_DS1307 || CONFIG_RTC_DS1338) && (CFG_COMMANDS & CFG_CMD_DATE) */
+#endif
diff --git a/rtc/ds1337.c b/rtc/ds1337.c
index 9f0c8c0..c636ac5 100644
--- a/rtc/ds1337.c
+++ b/rtc/ds1337.c
@@ -32,7 +32,7 @@
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_RTC_DS1337) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS1337) && defined(CONFIG_CMD_DATE)
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
@@ -188,4 +188,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_DS1337 && (CFG_COMMANDS & CFG_CMD_DATE) */
+#endif
diff --git a/rtc/ds1374.c b/rtc/ds1374.c
index 50a996c..e773dd9 100644
--- a/rtc/ds1374.c
+++ b/rtc/ds1374.c
@@ -35,7 +35,7 @@
#include <rtc.h>
#include <i2c.h>
-#if (defined(CONFIG_RTC_DS1374)) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if (defined(CONFIG_RTC_DS1374)) && defined(CONFIG_CMD_DATE)
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
@@ -250,4 +250,4 @@
{
i2c_reg_write (CFG_I2C_RTC_ADDR, reg, val);
}
-#endif /* (CONFIG_RTC_DS1374) && (CFG_COMMANDS & CFG_CMD_DATE) */
+#endif
diff --git a/rtc/ds1556.c b/rtc/ds1556.c
index dd9ea5e..4365cfb 100644
--- a/rtc/ds1556.c
+++ b/rtc/ds1556.c
@@ -37,7 +37,7 @@
#include <rtc.h>
-#if defined(CONFIG_RTC_DS1556) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS1556) && defined(CONFIG_CMD_DATE)
static uchar rtc_read( unsigned int addr );
static void rtc_write( unsigned int addr, uchar val);
@@ -203,4 +203,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_DS1556 && CFG_CMD_DATE */
+#endif
diff --git a/rtc/ds164x.c b/rtc/ds164x.c
index 3cc76ab..bff22b9a 100644
--- a/rtc/ds164x.c
+++ b/rtc/ds164x.c
@@ -37,7 +37,7 @@
#include <rtc.h>
-#if defined(CONFIG_RTC_DS164x) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS164x) && defined(CONFIG_CMD_DATE)
static uchar rtc_read(unsigned int addr );
static void rtc_write(unsigned int addr, uchar val);
@@ -197,4 +197,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_DS164x && CFG_CMD_DATE */
+#endif
diff --git a/rtc/ds174x.c b/rtc/ds174x.c
index 58b13e9..5f85a68 100644
--- a/rtc/ds174x.c
+++ b/rtc/ds174x.c
@@ -33,7 +33,7 @@
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_DS174x) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS174x) && defined(CONFIG_CMD_DATE)
static uchar rtc_read( unsigned int addr );
static void rtc_write( unsigned int addr, uchar val);
@@ -199,4 +199,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_MC146818 && CFG_CMD_DATE */
+#endif
diff --git a/rtc/ds3231.c b/rtc/ds3231.c
index 50aeeb5..fe11b86 100644
--- a/rtc/ds3231.c
+++ b/rtc/ds3231.c
@@ -33,7 +33,7 @@
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_RTC_DS3231) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_DS3231) && defined(CONFIG_CMD_DATE)
/*---------------------------------------------------------------------*/
#undef DEBUG_RTC
@@ -190,4 +190,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* (CONFIG_RTC_DS3231) && (CONFIG_COMMANDS & CFG_CMD_DATE) */
+#endif
diff --git a/rtc/m41t11.c b/rtc/m41t11.c
index c725cc9..81da33a 100644
--- a/rtc/m41t11.c
+++ b/rtc/m41t11.c
@@ -43,7 +43,7 @@
#endif
*/
-#if defined(CONFIG_RTC_M41T11) && defined(CFG_I2C_RTC_ADDR) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_M41T11) && defined(CFG_I2C_RTC_ADDR) && defined(CONFIG_CMD_DATE)
static unsigned bcd2bin (uchar n)
{
@@ -199,4 +199,4 @@
return i2c_read( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size );
}
-#endif /* CONFIG_RTC_M41T11 && CFG_I2C_RTC_ADDR && CFG_CMD_DATE */
+#endif
diff --git a/rtc/m48t35ax.c b/rtc/m48t35ax.c
index 6c38a53..0a0ffa8 100644
--- a/rtc/m48t35ax.c
+++ b/rtc/m48t35ax.c
@@ -33,7 +33,7 @@
#include <rtc.h>
#include <config.h>
-#if defined(CONFIG_RTC_M48T35A) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_M48T35A) && defined(CONFIG_CMD_DATE)
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
@@ -163,4 +163,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_M48T35A && CFG_CMD_DATE */
+#endif
diff --git a/rtc/max6900.c b/rtc/max6900.c
index 73919cd..c75a8e0 100644
--- a/rtc/max6900.c
+++ b/rtc/max6900.c
@@ -32,7 +32,7 @@
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_RTC_MAX6900) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_MAX6900) && defined(CONFIG_CMD_DATE)
#ifndef CFG_I2C_RTC_ADDR
#define CFG_I2C_RTC_ADDR 0x50
@@ -128,4 +128,4 @@
{
}
-#endif /* CONFIG_RTC_MAX6900 && CFG_CMD_DATE */
+#endif
diff --git a/rtc/mc146818.c b/rtc/mc146818.c
index 20b1b3e..ab377ed 100644
--- a/rtc/mc146818.c
+++ b/rtc/mc146818.c
@@ -31,7 +31,7 @@
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_MC146818) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_MC146818) && defined(CONFIG_CMD_DATE)
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
@@ -175,4 +175,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_MC146818 && CFG_CMD_DATE */
+#endif
diff --git a/rtc/mcfrtc.c b/rtc/mcfrtc.c
new file mode 100644
index 0000000..27386e5
--- /dev/null
+++ b/rtc/mcfrtc.c
@@ -0,0 +1,121 @@
+/*
+ * Copyright (C) 2004-2007 Freescale Semiconductor, Inc.
+ * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+
+#if defined(CONFIG_MCFRTC) && defined(CONFIG_CMD_DATE)
+
+#include <command.h>
+#include <rtc.h>
+#include <asm/immap.h>
+#include <asm/rtc.h>
+
+#undef RTC_DEBUG
+
+#ifndef CFG_MCFRTC_BASE
+#error RTC_BASE is not defined!
+#endif
+
+#define isleap(y) ((((y) % 4) == 0 && ((y) % 100) != 0) || ((y) % 400) == 0)
+#define STARTOFTIME 1970
+
+void rtc_get(struct rtc_time *tmp)
+{
+ volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE);
+
+ int rtc_days, rtc_hrs, rtc_mins;
+ int tim;
+
+ rtc_days = rtc->days;
+ rtc_hrs = rtc->hourmin >> 8;
+ rtc_mins = RTC_HOURMIN_MINUTES(rtc->hourmin);
+
+ tim = (rtc_days * 24) + rtc_hrs;
+ tim = (tim * 60) + rtc_mins;
+ tim = (tim * 60) + rtc->seconds;
+
+ to_tm(tim, tmp);
+
+ tmp->tm_yday = 0;
+ tmp->tm_isdst = 0;
+
+#ifdef RTC_DEBUG
+ printf("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+#endif
+}
+
+void rtc_set(struct rtc_time *tmp)
+{
+ volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE);
+
+ static int month_days[12] = {
+ 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
+ };
+ int days, i, months;
+
+ if (tmp->tm_year > 2037) {
+ printf("Unable to handle. Exceeding integer limitation!\n");
+ tmp->tm_year = 2027;
+ }
+#ifdef RTC_DEBUG
+ printf("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
+ tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+ tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+#endif
+
+ /* calculate days by years */
+ for (i = STARTOFTIME, days = 0; i < tmp->tm_year; i++) {
+ days += 365 + isleap(i);
+ }
+
+ /* calculate days by months */
+ months = tmp->tm_mon - 1;
+ for (i = 0; i < months; i++) {
+ days += month_days[i];
+
+ if (i == 1)
+ days += isleap(i);
+ }
+
+ days += tmp->tm_mday - 1;
+
+ rtc->days = days;
+ rtc->hourmin = (tmp->tm_hour << 8) | tmp->tm_min;
+ rtc->seconds = tmp->tm_sec;
+}
+
+void rtc_reset(void)
+{
+ volatile rtc_t *rtc = (rtc_t *) (CFG_MCFRTC_BASE);
+
+ if ((rtc->cr & RTC_CR_EN) == 0) {
+ printf("real-time-clock was stopped. Now starting...\n");
+ rtc->cr |= RTC_CR_EN;
+ }
+
+ rtc->cr |= RTC_CR_SWR;
+}
+
+#endif /* CONFIG_MCFRTC && CONFIG_CMD_DATE */
diff --git a/rtc/mk48t59.c b/rtc/mk48t59.c
index 64f751f..bacdb5b 100644
--- a/rtc/mk48t59.c
+++ b/rtc/mk48t59.c
@@ -131,7 +131,7 @@
rtc_write(d++, *s++);
}
-#if (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_CMD_DATE)
/* ------------------------------------------------------------------------- */
@@ -233,5 +233,5 @@
rtc_write(RTC_WATCHDOG, wd_value);
}
-#endif /* (CONFIG_COMMANDS & CFG_CMD_DATE) */
+#endif
#endif /* CONFIG_RTC_MK48T59 */
diff --git a/rtc/mpc5xxx.c b/rtc/mpc5xxx.c
index 2053df1..216386a 100644
--- a/rtc/mpc5xxx.c
+++ b/rtc/mpc5xxx.c
@@ -32,7 +32,7 @@
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_MPC5200) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_MPC5200) && defined(CONFIG_CMD_DATE)
/*****************************************************************************
* this structure should be defined in mpc5200.h ...
@@ -137,4 +137,4 @@
return; /* nothing to do */
}
-#endif /* CONFIG_RTC_MPC5200 && CFG_CMD_DATE */
+#endif
diff --git a/rtc/mpc8xx.c b/rtc/mpc8xx.c
index 830e56e..8d10c0e 100644
--- a/rtc/mpc8xx.c
+++ b/rtc/mpc8xx.c
@@ -31,7 +31,7 @@
#include <command.h>
#include <rtc.h>
-#if defined(CONFIG_RTC_MPC8xx) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_MPC8xx) && defined(CONFIG_CMD_DATE)
/* ------------------------------------------------------------------------- */
@@ -70,6 +70,4 @@
return; /* nothing to do */
}
-/* ------------------------------------------------------------------------- */
-
-#endif /* CONFIG_RTC_MPC8xx && CFG_CMD_DATE */
+#endif
diff --git a/rtc/pcf8563.c b/rtc/pcf8563.c
index 05ae97e..2d73d5d 100644
--- a/rtc/pcf8563.c
+++ b/rtc/pcf8563.c
@@ -32,7 +32,7 @@
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_RTC_PCF8563) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_PCF8563) && defined(CONFIG_CMD_DATE)
static uchar rtc_read (uchar reg);
static void rtc_write (uchar reg, uchar val);
@@ -141,4 +141,4 @@
return (((n / 10) << 4) | (n % 10));
}
-#endif /* CONFIG_RTC_PCF8563 && CFG_CMD_DATE */
+#endif
diff --git a/rtc/rs5c372.c b/rtc/rs5c372.c
index b56808b..3d1346e 100644
--- a/rtc/rs5c372.c
+++ b/rtc/rs5c372.c
@@ -34,7 +34,7 @@
#include <rtc.h>
#include <i2c.h>
-#if defined(CONFIG_RTC_RS5C372A) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_RS5C372A) && defined(CONFIG_CMD_DATE)
/*
* Reads are always done starting with register 15, which requires some
* jumping-through-hoops to access the data correctly.
@@ -299,4 +299,4 @@
{
return (((n / 10) << 4) | (n % 10));
}
-#endif /* defined(CONFIG_RTC_RS5C372A) && (CONFIG_COMMANDS & CFG_CMD_DATE) */
+#endif
diff --git a/rtc/s3c24x0_rtc.c b/rtc/s3c24x0_rtc.c
index 9e2191e..7f8b4fa 100644
--- a/rtc/s3c24x0_rtc.c
+++ b/rtc/s3c24x0_rtc.c
@@ -28,7 +28,7 @@
#include <common.h>
#include <command.h>
-#if defined(CONFIG_RTC_S3C24X0) && (CONFIG_COMMANDS & CFG_CMD_DATE)
+#if defined(CONFIG_RTC_S3C24X0) && (defined(CONFIG_CMD_DATE))
#if defined(CONFIG_S3C2400)
#include <s3c2400.h>
@@ -175,6 +175,4 @@
rtc->RTCCON &= ~(0x08|0x01);
}
-/* ------------------------------------------------------------------------- */
-
-#endif /* CONFIG_RTC_S3C24X0 && CFG_CMD_DATE */
+#endif
diff --git a/tools/Makefile b/tools/Makefile
index 6177f90..e8e0280 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -21,10 +21,10 @@
# MA 02111-1307 USA
#
-BIN_FILES = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX)
+BIN_FILES = img2srec$(SFX) mkimage$(SFX) envcrc$(SFX) ubsha1$(SFX) gen_eth_addr$(SFX) bmp_logo$(SFX)
-OBJ_LINKS = environment.o crc32.o
-OBJ_FILES = img2srec.o mkimage.o envcrc.o gen_eth_addr.o bmp_logo.o
+OBJ_LINKS = environment.o crc32.o sha1.o
+OBJ_FILES = img2srec.o mkimage.o envcrc.o ubsha1.o gen_eth_addr.o bmp_logo.o
ifeq ($(ARCH),mips)
BIN_FILES += inca-swap-bytes$(SFX)
@@ -74,7 +74,7 @@
ifeq ($(HOSTOS)-$(HOSTARCH),darwin-ppc)
HOST_CFLAGS = -traditional-cpp -Wall
HOST_LDFLAGS =-multiply_defined suppress
-HOST_ENVIRO_CFLAGS = -traditional-cpp
+HOST_ENVIRO_CFLAGS =
else
ifeq ($(HOSTOS)-$(HOSTARCH),netbsd-ppc)
@@ -126,14 +126,17 @@
all: $(obj).depend $(BINS) $(LOGO_H) subdirs
-$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)environment.o
+$(obj)envcrc$(SFX): $(obj)envcrc.o $(obj)crc32.o $(obj)environment.o $(obj)sha1.o
+ $(CC) $(CFLAGS) -o $@ $^
+
+$(obj)ubsha1$(SFX): $(obj)ubsha1.o $(obj)sha1.o
$(CC) $(CFLAGS) -o $@ $^
$(obj)img2srec$(SFX): $(obj)img2srec.o
$(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
$(STRIP) $@
-$(obj)mkimage$(SFX): $(obj)mkimage.o $(obj)crc32.o
+$(obj)mkimage$(SFX): $(obj)mkimage.o $(obj)crc32.o $(obj)sha1.o
$(CC) $(CFLAGS) $(HOST_LDFLAGS) -o $@ $^
$(STRIP) $@
@@ -160,9 +163,15 @@
$(obj)envcrc.o: $(src)envcrc.c
$(CC) -g $(CFLAGS) -c -o $@ $<
+$(obj)ubsha1.o: $(src)ubsha1.c
+ $(CC) -g $(CFLAGS) -c -o $@ $<
+
$(obj)crc32.o: $(obj)crc32.c
$(CC) -g $(CFLAGS) -c -o $@ $<
+$(obj)sha1.o: $(obj)sha1.c
+ $(CC) -g $(CFLAGS) -c -o $@ $<
+
$(obj)mkimage.o: $(src)mkimage.c
$(CC) -g $(CFLAGS) -c -o $@ $<
@@ -203,6 +212,10 @@
@rm -f $(obj)crc32.c
ln -s $(src)../lib_generic/crc32.c $(obj)crc32.c
+$(obj)sha1.c:
+ @rm -f $(obj)sha1.c
+ ln -s $(src)../lib_generic/sha1.c $(obj)sha1.c
+
$(LOGO_H): $(obj)bmp_logo $(LOGO_BMP)
$(obj)./bmp_logo $(LOGO_BMP) >$@
diff --git a/tools/mkimage.c b/tools/mkimage.c
index 416e658..2125130 100644
--- a/tools/mkimage.c
+++ b/tools/mkimage.c
@@ -446,7 +446,7 @@
}
/* We're a bit of paranoid */
-#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__)
+#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__) && !defined(__APPLE__)
(void) fdatasync (ifd);
#else
(void) fsync (ifd);
@@ -496,7 +496,7 @@
(void) munmap((void *)ptr, sbuf.st_size);
/* We're a bit of paranoid */
-#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__)
+#if defined(_POSIX_SYNCHRONIZED_IO) && !defined(__sun__) && !defined(__FreeBSD__) && !defined(__APPLE__)
(void) fdatasync (ifd);
#else
(void) fsync (ifd);
diff --git a/tools/ubsha1.c b/tools/ubsha1.c
new file mode 100644
index 0000000..b37b2b7
--- /dev/null
+++ b/tools/ubsha1.c
@@ -0,0 +1,118 @@
+/*
+ * (C) Copyright 2007
+ * Heiko Schocher, DENX Software Engineering, <hs@denx.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <stdio.h>
+#include <stdlib.h>
+#include <unistd.h>
+#include <fcntl.h>
+#include <errno.h>
+#include <string.h>
+#include <sys/mman.h>
+#include <sys/stat.h>
+#include "sha1.h"
+
+#ifndef __ASSEMBLY__
+#define __ASSEMBLY__ /* Dirty trick to get only #defines */
+#endif
+#include <config.h>
+#undef __ASSEMBLY__
+
+#ifndef O_BINARY /* should be define'd on __WIN32__ */
+#define O_BINARY 0
+#endif
+
+#ifndef MAP_FAILED
+#define MAP_FAILED (-1)
+#endif
+
+extern int errno;
+
+extern void sha1_csum (unsigned char *input, int ilen, unsigned char output[20]);
+
+int main (int argc, char **argv)
+{
+ unsigned char output[20];
+ int i, len;
+
+ char *imagefile;
+ char *cmdname = *argv;
+ unsigned char *ptr;
+ unsigned char *data;
+ struct stat sbuf;
+ unsigned char *ptroff;
+ int ifd;
+ int off;
+
+ if (argc > 1) {
+ imagefile = argv[1];
+ ifd = open (imagefile, O_RDWR|O_BINARY);
+ if (ifd < 0) {
+ fprintf (stderr, "%s: Can't open %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+ if (fstat (ifd, &sbuf) < 0) {
+ fprintf (stderr, "%s: Can't stat %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+ len = sbuf.st_size;
+ ptr = (unsigned char *)mmap(0, len,
+ PROT_READ, MAP_SHARED, ifd, 0);
+ if (ptr == (unsigned char *)MAP_FAILED) {
+ fprintf (stderr, "%s: Can't read %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+
+ /* create a copy, so we can blank out the sha1 sum */
+ data = malloc (len);
+ memcpy (data, ptr, len);
+ off = SHA1_SUM_POS;
+ ptroff = &data[len + off];
+ for (i = 0; i < SHA1_SUM_LEN; i++) {
+ ptroff[i] = 0;
+ }
+
+ sha1_csum ((unsigned char *) data, len, (unsigned char *)output);
+
+ printf ("U-Boot sum:\n");
+ for (i = 0; i < 20 ; i++) {
+ printf ("%02X ", output[i]);
+ }
+ printf ("\n");
+ /* overwrite the sum in the bin file, with the actual */
+ lseek (ifd, SHA1_SUM_POS, SEEK_END);
+ if (write (ifd, output, SHA1_SUM_LEN) != SHA1_SUM_LEN) {
+ fprintf (stderr, "%s: Can't write %s: %s\n",
+ cmdname, imagefile, strerror(errno));
+ exit (EXIT_FAILURE);
+ }
+
+ free (data);
+ (void) munmap((void *)ptr, len);
+ (void) close (ifd);
+ }
+
+ return EXIT_SUCCESS;
+}
diff --git a/tools/updater/cmd_flash.c b/tools/updater/cmd_flash.c
index c0e5772..a976e0d 100644
--- a/tools/updater/cmd_flash.c
+++ b/tools/updater/cmd_flash.c
@@ -28,7 +28,7 @@
#include <command.h>
#include <flash.h>
-#if (CONFIG_COMMANDS & CFG_CMD_FLASH)
+#if defined(CONFIG_CMD_FLASH)
extern flash_info_t flash_info[]; /* info for FLASH chips */
@@ -427,4 +427,4 @@
return rcode;
}
-#endif /* CFG_CMD_FLASH */
+#endif