Merge tag 'efi-2022-01-rc2-2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request for efi-2022-01-rc2-2
UEFI:
* fix measurement of BootOrder variable for TCG2 protocol
TPM:
* TIS mmio driver. This driver supports QEMU's emulated TPM.
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index b3794a9..41b34ea 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -1,5 +1,5 @@
variables:
- windows_vm: vs2017-win2016
+ windows_vm: windows-2019
ubuntu_vm: ubuntu-18.04
macos_vm: macOS-10.15
ci_runner_image: trini/u-boot-gitlab-ci-runner:focal-20210921-05Oct2021
diff --git a/.get_maintainer.conf b/.get_maintainer.conf
new file mode 100644
index 0000000..df595f5
--- /dev/null
+++ b/.get_maintainer.conf
@@ -0,0 +1 @@
+--find-maintainer-files --maintainer-path=.
diff --git a/Kconfig b/Kconfig
index 931a228..c46f4fc 100644
--- a/Kconfig
+++ b/Kconfig
@@ -466,6 +466,8 @@
source "api/Kconfig"
+source "boot/Kconfig"
+
source "common/Kconfig"
source "cmd/Kconfig"
diff --git a/Makefile b/Makefile
index ea884fe..299cd3f 100644
--- a/Makefile
+++ b/Makefile
@@ -808,6 +808,7 @@
libs-$(CONFIG_API) += api/
libs-$(HAVE_VENDOR_COMMON_LIB) += board/$(VENDOR)/common/
+libs-y += boot/
libs-y += cmd/
libs-y += common/
libs-$(CONFIG_OF_EMBED) += dts/
@@ -2104,7 +2105,7 @@
$(filter-out include, $(shell ls -1 $d 2>/dev/null))))
CLEAN_FILES += include/bmp_logo.h include/bmp_logo_data.h tools/version.h \
- boot* u-boot* MLO* SPL System.map fit-dtb.blob* \
+ u-boot* MLO* SPL System.map fit-dtb.blob* \
u-boot-ivt.img.log u-boot-dtb.imx.log SPL.log u-boot.imx.log \
lpc32xx-* bl31.c bl31.elf bl31_*.bin image.map tispl.bin* \
idbloader.img flash.bin flash.log defconfig keep-syms-lto.c
diff --git a/README b/README
index 0f52888..9606a8b 100644
--- a/README
+++ b/README
@@ -144,6 +144,7 @@
/xtensa Files generic to Xtensa architecture
/api Machine/arch-independent API for external apps
/board Board-dependent files
+/boot Support for images and booting
/cmd U-Boot commands functions
/common Misc architecture-independent functions
/configs Board default configuration files
@@ -605,10 +606,6 @@
controller register space
- Serial Ports:
- CONFIG_PL011_SERIAL
-
- Define this if you want support for Amba PrimeCell PL011 UARTs.
-
CONFIG_PL011_CLOCK
If you have Amba PrimeCell PL011 UARTs, set this variable to
@@ -824,18 +821,11 @@
SCSI devices found during the last scan.
- NETWORK Support (PCI):
- CONFIG_E1000
- Support for Intel 8254x/8257x gigabit chips.
-
CONFIG_E1000_SPI
Utility code for direct access to the SPI bus on Intel 8257x.
This does not do anything useful unless you set at least one
of CONFIG_CMD_E1000 or CONFIG_E1000_SPI_GENERIC.
- CONFIG_E1000_SPI_GENERIC
- Allow generic access to the SPI bus on the Intel 8257x, for
- example with the "sspi" command.
-
CONFIG_NATSEMI
Support for National dp83815 chips.
@@ -984,10 +974,6 @@
whether the enumeration has succeded at high speed or full
speed.
- CONFIG_SYS_CONSOLE_IS_IN_ENV
- Define this if you want stdin, stdout &/or stderr to
- be set to usbtty.
-
If you have a USB-IF assigned VendorID then you may wish to
define your own vendor specific values either in BoardName.h
or directly in usbd_vendor_info.h. If you don't define
@@ -1199,11 +1185,6 @@
Support drawing of RLE8-compressed bitmaps on the LCD.
- CONFIG_I2C_EDID
-
- Enables an 'i2c edid' command which can read EDID
- information over I2C from an attached LCD display.
-
- MII/PHY support:
CONFIG_PHY_CLOCK_FREQ (ppc4xx)
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index ae911d6..f7f0383 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1813,7 +1813,6 @@
select CPU_V7M
select DM
select DM_SERIAL
- select GPIO_EXTRA_HEADER
imply CMD_DM
config ARCH_STI
@@ -1839,7 +1838,6 @@
select DM_GPIO
select DM_RESET
select DM_SERIAL
- select GPIO_EXTRA_HEADER
select MISC
select OF_CONTROL
select OF_LIBFDT
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
index 1e166c7..1a057f7 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
+++ b/arch/arm/cpu/armv8/fsl-layerscape/Kconfig
@@ -10,7 +10,7 @@
select SYS_HAS_SERDES
select SYS_FSL_DDR_BE
select SYS_FSL_MMDC
- select SYS_FSL_ERRATUM_A010315
+ select SYS_FSL_ERRATUM_A010315 if PCIE_LAYERSCAPE
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A008997
select SYS_FSL_ERRATUM_A009007
@@ -77,7 +77,7 @@
select SYS_FSL_ERRATUM_A009663 if !TFABOOT
select SYS_FSL_ERRATUM_A009798
select SYS_FSL_ERRATUM_A009942 if !TFABOOT
- select SYS_FSL_ERRATUM_A010315
+ select SYS_FSL_ERRATUM_A010315 if PCIE_LAYERSCAPE
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_HAS_DDR3
select SYS_FSL_HAS_DDR4
@@ -233,6 +233,7 @@
config ARCH_LX2162A
bool
select ARMV8_SET_SMPEN
+ select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select NXP_LSCH3_2
@@ -266,6 +267,7 @@
config ARCH_LX2160A
bool
select ARMV8_SET_SMPEN
+ select FSL_LAYERSCAPE
select FSL_LSCH3
select GICV3
select HAS_FSL_XHCI_USB if USB_HOST
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
index 6eb7f9c..4ec0dbf 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/fdt.c
@@ -427,7 +427,7 @@
fdt_status_disabled(blob, off);
/* Disable GPU node */
- off = fdt_node_offset_by_compatible(blob, -1, "fsl,ls1028a-gpu");
+ off = fdt_node_offset_by_compatible(blob, -1, "vivante,gc");
if (off != -FDT_ERR_NOTFOUND)
fdt_status_disabled(blob, off);
}
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
index 49df8b3..86a49b1 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls1028_ids.c
@@ -18,7 +18,7 @@
SET_SATA_ICID(1, "fsl,ls1028a-ahci", FSL_SATA1_STREAM_ID),
SET_EDMA_ICID(FSL_EDMA_STREAM_ID),
SET_QDMA_ICID("fsl,ls1028a-qdma", FSL_DMA_STREAM_ID),
- SET_GPU_ICID("fsl,ls1028a-gpu", FSL_GPU_STREAM_ID),
+ SET_GPU_ICID("vivante,gc", FSL_GPU_STREAM_ID),
SET_DISPLAY_ICID(FSL_DISPLAY_STREAM_ID),
#ifdef CONFIG_FSL_CAAM
SET_SEC_JR_ICID_ENTRY(0, FSL_SEC_JR1_STREAM_ID),
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/mp.c b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
index 730d766..d28ab26 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/mp.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/mp.c
@@ -14,11 +14,12 @@
#include <asm/system.h>
#include <asm/arch/mp.h>
#include <asm/arch/soc.h>
+#include <linux/compat.h>
#include <linux/delay.h>
#include <linux/psci.h>
+#include <malloc.h>
#include "cpu.h"
#include <asm/arch-fsl-layerscape/soc.h>
-#include <efi_loader.h>
DECLARE_GLOBAL_DATA_PTR;
@@ -83,8 +84,7 @@
int i, timeout = 10;
u64 *table;
#ifdef CONFIG_EFI_LOADER
- u64 reloc_addr = U32_MAX;
- efi_status_t ret;
+ void *reloc_addr;
#endif
#ifdef COUNTER_FREQUENCY_REAL
@@ -102,27 +102,26 @@
* Keep this after the __real_cntfrq update, so we have it when we
* copy the complete section here.
*/
- ret = efi_allocate_pages(EFI_ALLOCATE_MAX_ADDRESS,
- EFI_RESERVED_MEMORY_TYPE,
- efi_size_in_pages(secondary_boot_code_size),
- &reloc_addr);
- if (ret == EFI_SUCCESS) {
- debug("Relocating spin table from %llx to %llx (size %lx)\n",
- (u64)secondary_boot_code_start, reloc_addr,
+ reloc_addr = memalign(PAGE_SIZE,
+ round_up(secondary_boot_code_size, PAGE_SIZE));
+ if (reloc_addr) {
+ debug("Relocating spin table from %p to %p (size %lx)\n",
+ secondary_boot_code_start, reloc_addr,
secondary_boot_code_size);
- memcpy((void *)reloc_addr, secondary_boot_code_start,
+ memcpy(reloc_addr, secondary_boot_code_start,
secondary_boot_code_size);
- flush_dcache_range(reloc_addr,
- reloc_addr + secondary_boot_code_size);
+ flush_dcache_range((unsigned long)reloc_addr,
+ (unsigned long)reloc_addr +
+ secondary_boot_code_size);
/* set new entry point for secondary cores */
- secondary_boot_addr += (void *)reloc_addr -
+ secondary_boot_addr += reloc_addr -
secondary_boot_code_start;
flush_dcache_range((unsigned long)&secondary_boot_addr,
(unsigned long)&secondary_boot_addr + 8);
/* this will be used to reserve the memory */
- secondary_boot_code_start = (void *)reloc_addr;
+ secondary_boot_code_start = reloc_addr;
}
#endif
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
index a08ed3f..d3a5cfa 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c
@@ -929,25 +929,23 @@
#define DWC3_GSBUSCFG0_CACHETYPE(n) (((n) & 0xffff) \
<< DWC3_GSBUSCFG0_CACHETYPE_SHIFT)
-void enable_dwc3_snooping(void)
+static void enable_dwc3_snooping(void)
{
- int ret;
- u32 val;
- struct udevice *bus;
- struct uclass *uc;
+ static const char * const compatibles[] = {
+ "fsl,layerscape-dwc3",
+ "fsl,ls1028a-dwc3",
+ };
fdt_addr_t dwc3_base;
+ ofnode node;
+ u32 val;
+ int i;
- ret = uclass_get(UCLASS_USB, &uc);
- if (ret)
- return;
-
- uclass_foreach_dev(bus, uc) {
- if (!strcmp(bus->driver->of_match->compatible, "fsl,layerscape-dwc3")) {
- dwc3_base = devfdt_get_addr(bus);
- if (dwc3_base == FDT_ADDR_T_NONE) {
- dev_err(bus, "dwc3 regs missing\n");
+ for (i = 0; i < ARRAY_SIZE(compatibles); i++) {
+ ofnode_for_each_compatible_node(node, compatibles[i]) {
+ dwc3_base = ofnode_get_addr(node);
+ if (dwc3_base == FDT_ADDR_T_NONE)
continue;
- }
+
val = in_le32(dwc3_base + DWC3_GSBUSCFG0);
val &= ~DWC3_GSBUSCFG0_CACHETYPE(~0);
val |= DWC3_GSBUSCFG0_CACHETYPE(0x2222);
diff --git a/arch/arm/dts/am335x-chiliboard-u-boot.dtsi b/arch/arm/dts/am335x-chiliboard-u-boot.dtsi
index 06a1387..17333d6 100644
--- a/arch/arm/dts/am335x-chiliboard-u-boot.dtsi
+++ b/arch/arm/dts/am335x-chiliboard-u-boot.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ or X11
/*
- * Copyright (C) 2018 Grinn Sp. z o.o. -- http://www.grinn-global.com/
+ * Copyright (C) 2018-2021 Grinn Sp. z o.o. -- http://www.grinn-global.com/
* Author: Marcin Niestroj <m.niestroj@grinn-global.com>
*/
@@ -9,5 +9,6 @@
/ {
chosen {
stdout-path = &uart0;
+ tick-timer = &timer2;
};
};
diff --git a/arch/arm/dts/fsl-ls1012a.dtsi b/arch/arm/dts/fsl-ls1012a.dtsi
index 2894842..0ea899c 100644
--- a/arch/arm/dts/fsl-ls1012a.dtsi
+++ b/arch/arm/dts/fsl-ls1012a.dtsi
@@ -49,7 +49,7 @@
interrupts = <0 64 0x4>;
clock-names = "dspi";
clocks = <&clockgen 4 0>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -157,7 +157,7 @@
compatible = "fsl,ls1012a-ahci";
reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
0x0 0x20140520 0x0 0x4>; /* ecc sata addr */
- reg-names = "sata-base", "ecc-addr";
+ reg-names = "ahci", "sata-ecc";
interrupts = <0 69 4>;
clocks = <&clockgen 4 0>;
status = "disabled";
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
index b3861ed..d4b8332 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-u-boot.dtsi
@@ -4,17 +4,20 @@
/ {
aliases {
- mmc0 = &esdhc1;
- mmc1 = &esdhc0;
i2c0 = &i2c0;
i2c1 = &i2c3;
i2c2 = &i2c4;
- rtc0 = &rtc;
- ethernet2 = &enetc2;
- ethernet3 = &enetc6;
+ ethernet2 = &enetc_port2;
+ ethernet3 = &enetc_port3;
};
binman: binman {
+ multiple-images;
+ };
+};
+
+&binman {
+ u_boot_rom: u-boot-rom {
filename = "u-boot.rom";
pad-byte = <0xff>;
@@ -133,6 +136,31 @@
};
};
+&binman {
+ u-boot-update {
+ filename = "u-boot.update";
+
+ fit {
+ description = "FIT update image";
+
+ images {
+ u-boot-bin {
+ description = "U-Boot";
+ type = "firmware";
+ os = "u-boot";
+ arch = "arm";
+ compression = "none";
+ load = <0>; /* unused */
+
+ blob {
+ filename = "u-boot.rom";
+ };
+ };
+ };
+ };
+ };
+};
+
#ifdef CONFIG_SL28_ENABLE_SER0_CONSOLE
/ {
chosen {
@@ -142,7 +170,7 @@
#endif
#ifdef CONFIG_SL28_SPL_LOADS_ATF_BL31
-&binman {
+&u_boot_rom {
fit {
images {
bl31 {
@@ -191,7 +219,7 @@
#endif
#ifdef CONFIG_SL28_SPL_LOADS_OPTEE_BL32
-&binman {
+&u_boot_rom {
fit {
images {
bl32 {
@@ -234,11 +262,6 @@
};
#endif
-&i2c0 {
- rtc: rtc@32 {
- };
-};
-
&fspi {
u-boot,dm-pre-reloc;
flash@0 {
@@ -250,7 +273,7 @@
u-boot,dm-pre-reloc;
};
-&esdhc0 {
+&esdhc {
u-boot,dm-pre-reloc;
};
@@ -262,7 +285,28 @@
u-boot,dm-pre-reloc;
};
-&serial0 {
+&duart0 {
+ u-boot,dm-pre-reloc;
+};
+
+/*
+ * u-boot will enable the device in the linux device tree in place. Because
+ * we are using the linux device tree, we have to enable the PCI controller
+ * ourselves.
+ */
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
+&sata {
+ status = "okay";
+};
+
+&soc {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi
index 98e8939..a46e07d 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1-u-boot.dtsi
@@ -3,6 +3,6 @@
/ {
aliases {
- ethernet0 = &enetc1;
+ ethernet0 = &enetc_port1;
};
};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts
index 33d85ed..7cd29ab 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var1.dts
@@ -8,7 +8,7 @@
* None of the four SerDes lanes are used by the module, instead they are
* all led out to the carrier for customer use.
*
- * Copyright (C) 2020 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
@@ -21,28 +21,17 @@
compatible = "kontron,sl28-var1", "kontron,sl28", "fsl,ls1028a";
};
-&enetc0 {
- status = "disabled";
- /delete-property/ phy-handle;
-};
+&enetc_mdio_pf3 {
+ /* Delete unused phy node */
+ /delete-node/ ethernet-phy@5;
-&enetc1 {
- phy-handle = <&phy0>;
- phy-mode = "rgmii-id";
- status = "okay";
-};
-
-/delete-node/ &phy0;
-&mdio0 {
phy0: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
-
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
-
vddio-supply = <&vddio>;
vddio: vddio-regulator {
@@ -56,3 +45,15 @@
};
};
};
+
+&enetc_port0 {
+ status = "disabled";
+ /* Delete the phy-handle to the old phy0 label */
+ /delete-property/ phy-handle;
+};
+
+&enetc_port1 {
+ phy-handle = <&phy0>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi
index 4e0ce3f..c010ea0 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2-u-boot.dtsi
@@ -7,3 +7,11 @@
ethernet1 = &mscc_felix_port1;
};
};
+
+&mscc_felix_port0 {
+ label = "gbe0";
+};
+
+&mscc_felix_port1 {
+ label = "gbe1";
+};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts
index 7a3aa21..330e34f93 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var2.dts
@@ -2,10 +2,10 @@
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
- * This is for the network variant 2 which has no ethernet support in the
- * bootloader.
+ * This is for the network variant 2 which has two ethernet ports. These
+ * ports are connected to the internal switch.
*
- * Copyright (C) 2020 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
@@ -17,12 +17,25 @@
compatible = "kontron,sl28-var2", "kontron,sl28", "fsl,ls1028a";
};
-&enetc0 {
+&enetc_mdio_pf3 {
+ phy1: ethernet-phy@4 {
+ reg = <0x4>;
+ eee-broken-1000t;
+ eee-broken-100tx;
+ };
+};
+
+&enetc_port0 {
status = "disabled";
+ /*
+ * In the base device tree the PHY at address 5 was assigned for
+ * this port. On this module this PHY is connected to a switch
+ * port instead. Therefore, delete the phy-handle property here.
+ */
/delete-property/ phy-handle;
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -31,35 +44,22 @@
};
&mscc_felix_port0 {
- label = "gbe0";
+ label = "swp0";
+ managed = "in-band-status";
phy-handle = <&phy0>;
phy-mode = "sgmii";
status = "okay";
};
&mscc_felix_port1 {
- label = "gbe1";
+ label = "swp1";
+ managed = "in-band-status";
phy-handle = <&phy1>;
phy-mode = "sgmii";
status = "okay";
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
-
-/delete-node/ &phy0;
-&mdio0 {
- phy0: ethernet-phy@5 {
- reg = <0x5>;
- eee-broken-1000t;
- eee-broken-100tx;
- };
-
- phy1: ethernet-phy@4 {
- reg = <0x4>;
- eee-broken-1000t;
- eee-broken-100tx;
- };
-};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3-u-boot.dtsi
index 879a764..3d6bf5a 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var3-u-boot.dtsi
@@ -3,6 +3,6 @@
/ {
aliases {
- ethernet0 = &enetc0;
+ ethernet0 = &enetc_port0;
};
};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4-u-boot.dtsi b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4-u-boot.dtsi
index fce4694..5d82973 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4-u-boot.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4-u-boot.dtsi
@@ -3,7 +3,7 @@
/ {
aliases {
- ethernet0 = &enetc0;
- ethernet1 = &enetc1;
+ ethernet0 = &enetc_port0;
+ ethernet1 = &enetc_port1;
};
};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts
index b95e082..9b5e92f 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28-var4.dts
@@ -5,7 +5,7 @@
* This is for the network variant 4 which has two ethernet ports. It
* extends the base and provides one more port connected via RGMII.
*
- * Copyright (C) 2019 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
@@ -18,22 +18,14 @@
compatible = "kontron,sl28-var4", "kontron,sl28", "fsl,ls1028a";
};
-&enetc1 {
- phy-handle = <&phy1>;
- phy-mode = "rgmii-id";
- status = "okay";
-};
-
-&mdio0 {
+&enetc_mdio_pf3 {
phy1: ethernet-phy@4 {
reg = <0x4>;
eee-broken-1000t;
eee-broken-100tx;
-
qca,clk-out-frequency = <125000000>;
qca,clk-out-strength = <AR803X_STRENGTH_FULL>;
qca,keep-pll-enabled;
-
vddio-supply = <&vddio>;
vddio: vddio-regulator {
@@ -47,3 +39,9 @@
};
};
};
+
+&enetc_port1 {
+ phy-handle = <&phy1>;
+ phy-mode = "rgmii-id";
+ status = "okay";
+};
diff --git a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts
index 7f237c3..ab713b4 100644
--- a/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts
+++ b/arch/arm/dts/fsl-ls1028a-kontron-sl28.dts
@@ -2,23 +2,61 @@
/*
* Device Tree file for the Kontron SMARC-sAL28 board.
*
- * Copyright (C) 2019 Michael Walle <michael@walle.cc>
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
*
*/
/dts-v1/;
#include "fsl-ls1028a.dtsi"
+#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
/ {
model = "Kontron SMARC-sAL28";
compatible = "kontron,sl28", "fsl,ls1028a";
aliases {
- serial0 = &serial0;
- serial1 = &serial1;
+ crypto = &crypto;
+ serial0 = &duart0;
+ serial1 = &duart1;
serial2 = &lpuart1;
spi0 = &fspi;
spi1 = &dspi2;
+ mmc0 = &esdhc1;
+ mmc1 = &esdhc;
+ rtc0 = &rtc;
+ rtc1 = &ftm_alarm0;
+ };
+
+ buttons0 {
+ compatible = "gpio-keys";
+
+ power-button {
+ interrupts-extended = <&sl28cpld_intc
+ 4 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = <KEY_POWER>;
+ label = "Power";
+ };
+
+ sleep-button {
+ interrupts-extended = <&sl28cpld_intc
+ 5 IRQ_TYPE_EDGE_BOTH>;
+ linux,code = <KEY_SLEEP>;
+ label = "Sleep";
+ };
+ };
+
+ buttons1 {
+ compatible = "gpio-keys-polled";
+ poll-interval = <200>;
+
+ lid-switch {
+ linux,input-type = <EV_SW>;
+ linux,code = <SW_LID>;
+ gpios = <&sl28cpld_gpio3 4 GPIO_ACTIVE_LOW>;
+ label = "Lid";
+ };
};
chosen {
@@ -26,25 +64,38 @@
};
};
+&can0 {
+ status = "okay";
+};
+
&dspi2 {
status = "okay";
};
-&enetc0 {
- phy-handle = <&phy0>;
- phy-mode = "sgmii";
+&duart0 {
status = "okay";
};
-&enetc2 {
- status = "disabled";
+&duart1 {
+ status = "okay";
};
-&enetc6 {
- status = "disabled";
+&enetc_mdio_pf3 {
+ phy0: ethernet-phy@5 {
+ reg = <0x5>;
+ eee-broken-1000t;
+ eee-broken-100tx;
+ };
};
-&esdhc0 {
+&enetc_port0 {
+ phy-handle = <&phy0>;
+ phy-mode = "sgmii";
+ managed = "in-band-status";
+ status = "okay";
+};
+
+&esdhc {
sd-uhs-sdr104;
sd-uhs-sdr50;
sd-uhs-sdr25;
@@ -63,8 +114,6 @@
status = "okay";
flash@0 {
- #address-cells = <1>;
- #size-cells = <1>;
compatible = "jedec,spi-nor";
m25p,fast-read;
spi-max-frequency = <133000000>;
@@ -72,17 +121,167 @@
/* The following setting enables 1-1-2 (CMD-ADDR-DATA) mode */
spi-rx-bus-width = <2>; /* 2 SPI Rx lines */
spi-tx-bus-width = <1>; /* 1 SPI Tx line */
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partition@0 {
+ reg = <0x000000 0x010000>;
+ label = "rcw";
+ read-only;
+ };
+
+ partition@10000 {
+ reg = <0x010000 0x1d0000>;
+ label = "failsafe bootloader";
+ read-only;
+ };
+
+ partition@200000 {
+ reg = <0x200000 0x010000>;
+ label = "configuration store";
+ };
+
+ partition@210000 {
+ reg = <0x210000 0x1d0000>;
+ label = "bootloader";
+ };
+
+ partition@3e0000 {
+ reg = <0x3e0000 0x020000>;
+ label = "bootloader environment";
+ };
+ };
};
};
+&gpio1 {
+ gpio-line-names =
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "TDO", "TCK",
+ "", "", "", "", "", "", "", "";
+};
+
+&gpio2 {
+ gpio-line-names =
+ "", "", "", "", "", "", "TMS", "TDI",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "",
+ "", "", "", "", "", "", "", "";
+};
+
&i2c0 {
status = "okay";
- rtc@32 {
+ rtc: rtc@32 {
compatible = "microcrystal,rv8803";
reg = <0x32>;
};
+ sl28cpld@4a {
+ compatible = "kontron,sl28cpld";
+ reg = <0x4a>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ watchdog@4 {
+ compatible = "kontron,sl28cpld-wdt";
+ reg = <0x4>;
+ kontron,assert-wdt-timeout-pin;
+ };
+
+ hwmon@b {
+ compatible = "kontron,sl28cpld-fan";
+ reg = <0xb>;
+ };
+
+ sl28cpld_pwm0: pwm@c {
+ compatible = "kontron,sl28cpld-pwm";
+ reg = <0xc>;
+ #pwm-cells = <2>;
+ };
+
+ sl28cpld_pwm1: pwm@e {
+ compatible = "kontron,sl28cpld-pwm";
+ reg = <0xe>;
+ #pwm-cells = <2>;
+ };
+
+ sl28cpld_gpio0: gpio@10 {
+ compatible = "kontron,sl28cpld-gpio";
+ reg = <0x10>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "GPIO0_CAM0_PWR_N", "GPIO1_CAM1_PWR_N",
+ "GPIO2_CAM0_RST_N", "GPIO3_CAM1_RST_N",
+ "GPIO4_HDA_RST_N", "GPIO5_PWM_OUT",
+ "GPIO6_TACHIN", "GPIO7";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ sl28cpld_gpio1: gpio@15 {
+ compatible = "kontron,sl28cpld-gpio";
+ reg = <0x15>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "GPIO8", "GPIO9", "GPIO10", "GPIO11",
+ "", "", "", "";
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+
+ sl28cpld_gpio2: gpio@1a {
+ compatible = "kontron,sl28cpld-gpo";
+ reg = <0x1a>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "LCD0 voltage enable",
+ "LCD0 backlight enable",
+ "eMMC reset", "LVDS bridge reset",
+ "LVDS bridge power-down",
+ "SDIO power enable",
+ "", "";
+ };
+
+ sl28cpld_gpio3: gpio@1b {
+ compatible = "kontron,sl28cpld-gpi";
+ reg = <0x1b>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names =
+ "Power button", "Force recovery", "Sleep",
+ "Battery low", "Lid state", "Charging",
+ "Charger present", "";
+ };
+
+ sl28cpld_intc: interrupt-controller@1c {
+ compatible = "kontron,sl28cpld-intc";
+ reg = <0x1c>;
+ interrupts-extended = <&gpio2 6
+ IRQ_TYPE_EDGE_FALLING>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ };
+ };
+
eeprom@50 {
compatible = "atmel,24c32";
reg = <0x50>;
@@ -107,32 +306,3 @@
&lpuart1 {
status = "okay";
};
-
-&mdio0 {
- status = "okay";
- phy0: ethernet-phy@5 {
- reg = <0x5>;
- eee-broken-1000t;
- eee-broken-100tx;
- };
-};
-
-&sata {
- status = "okay";
-};
-
-&serial0 {
- status = "okay";
-};
-
-&serial1 {
- status = "okay";
-};
-
-&usb1 {
- status = "okay";
-};
-
-&usb2 {
- status = "okay";
-};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
index 4063d9a..f4c557e 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-1xxx-sch-30842.dtsi
@@ -13,8 +13,8 @@
#include "fsl-sch-30842.dtsi"
};
-&enetc0 {
+&enetc_port0 {
status = "okay";
phy-mode = "usxgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
index 548ab2b..69274ee 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-6xxx-sch-30842.dtsi
@@ -12,8 +12,8 @@
#include "fsl-sch-30842.dtsi"
};
-&enetc0 {
+&enetc_port0 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
index 3991fb7..90da665 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7777-sch-30841.dtsi
@@ -20,7 +20,7 @@
#include "fsl-sch-30841.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -31,28 +31,28 @@
&mscc_felix_port0 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@00}>;
};
&mscc_felix_port1 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@01}>;
};
&mscc_felix_port2 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
};
&mscc_felix_port3 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
index d68c8c2..27c3d65 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-7xx7-sch-30841R.dtsi
@@ -9,7 +9,7 @@
#include "fsl-sch-30841.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -20,16 +20,16 @@
&mscc_felix_port0 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@02}>;
};
&mscc_felix_port3 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@03}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
index 94b5081..7d197c3 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-8xxx-sch-24801.dtsi
@@ -12,8 +12,8 @@
#include "fsl-sch-24801.dtsi"
};
-&enetc0 {
+&enetc_port0 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
index 3b85026..992092e 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801-LBRW.dtsi
@@ -34,7 +34,7 @@
#include "fsl-sch-24801.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -45,28 +45,28 @@
&mscc_felix_port0 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
};
&mscc_felix_port1 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@1c}>;
};
&mscc_felix_port2 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
};
&mscc_felix_port3 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
index eb63214..a905d77 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-9999-sch-24801.dtsi
@@ -19,7 +19,7 @@
#include "fsl-sch-24801.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -30,28 +30,28 @@
&mscc_felix_port0 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1c}>;
};
&mscc_felix_port1 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1d}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1d}>;
};
&mscc_felix_port2 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1e}>;
};
&mscc_felix_port3 {
status = "okay";
phy-mode = "sgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@40/phy@1f}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-duart.dts b/arch/arm/dts/fsl-ls1028a-qds-duart.dts
index 83264e0..81db21a 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-duart.dts
+++ b/arch/arm/dts/fsl-ls1028a-qds-duart.dts
@@ -10,6 +10,6 @@
/ {
chosen {
- stdout-path = &serial0;
+ stdout-path = &duart0;
};
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
index ed86da6..62e818f 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x3xx-sch-30841-LBRW.dtsi
@@ -19,7 +19,7 @@
#include "fsl-sch-30841.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -30,28 +30,28 @@
&mscc_felix_port0 {
status = "okay";
phy-mode = "usxgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@00}>;
};
&mscc_felix_port1 {
status = "okay";
phy-mode = "usxgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@01}>;
};
&mscc_felix_port2 {
status = "okay";
phy-mode = "usxgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
};
&mscc_felix_port3 {
status = "okay";
phy-mode = "usxgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@03}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
index c9de4ec..6f1f6cb 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x5xx-sch-28021-LBRW.dtsi
@@ -13,7 +13,7 @@
#include "fsl-sch-28021.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -24,28 +24,28 @@
&mscc_felix_port0 {
status = "okay";
phy-mode = "qsgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@08}>;
};
&mscc_felix_port1 {
status = "okay";
phy-mode = "qsgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@09}>;
};
&mscc_felix_port2 {
status = "okay";
phy-mode = "qsgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0a}>;
};
&mscc_felix_port3 {
status = "okay";
phy-mode = "qsgmii";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@0b}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
index 7f78550..6c0d8b2 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-x7xx-sch-30842.dtsi
@@ -9,7 +9,7 @@
#include "fsl-sch-30842.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -20,10 +20,10 @@
&mscc_felix_port1 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@50/phy@02}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
index 0fbe772..9af6a5a 100644
--- a/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds-xx7x-sch-30842.dtsi
@@ -9,7 +9,7 @@
#include "fsl-sch-30842.dtsi"
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -20,10 +20,10 @@
&mscc_felix_port2 {
status = "okay";
phy-mode = "2500base-x";
- phy-handle = <&{/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
+ phy-handle = <&{/soc/i2c@2000000/fpga@66/mux-mdio@54/mdio@60/phy@02}>;
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-qds.dtsi b/arch/arm/dts/fsl-ls1028a-qds.dtsi
index 69632fa..0da0a7b 100644
--- a/arch/arm/dts/fsl-ls1028a-qds.dtsi
+++ b/arch/arm/dts/fsl-ls1028a-qds.dtsi
@@ -105,7 +105,7 @@
};
};
-&esdhc0 {
+&esdhc {
status = "okay";
};
@@ -130,7 +130,6 @@
&i2c0 {
status = "okay";
- u-boot,dm-pre-reloc;
fpga@66 {
#address-cells = <1>;
@@ -145,7 +144,7 @@
reg = <0x54>;
#mux-control-cells = <1>;
mux-reg-masks = <0x54 0xf0>;
- mdio-parent-bus = <&mdio0>;
+ mdio-parent-bus = <&enetc_mdio_pf3>;
/* on-board MDIO with a single RGMII PHY */
mdio@00 {
@@ -233,11 +232,23 @@
status = "okay";
};
-&serial0 {
+&duart0 {
status = "okay";
};
-&serial1 {
+&duart1 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
+&usb0 {
status = "okay";
};
@@ -245,17 +256,13 @@
status = "okay";
};
-&usb2 {
- status = "okay";
-};
-
-&enetc1 {
+&enetc_port1 {
status = "okay";
phy-mode = "rgmii-id";
phy-handle = <&qds_phy0>;
};
-&mdio0 {
+&enetc_mdio_pf3 {
status = "okay";
};
diff --git a/arch/arm/dts/fsl-ls1028a-rdb.dts b/arch/arm/dts/fsl-ls1028a-rdb.dts
index 82a8c0a..537ebbc 100644
--- a/arch/arm/dts/fsl-ls1028a-rdb.dts
+++ b/arch/arm/dts/fsl-ls1028a-rdb.dts
@@ -15,8 +15,8 @@
compatible = "fsl,ls1028a-rdb", "fsl,ls1028a";
aliases {
spi0 = &fspi;
- ethernet0 = &enetc0;
- ethernet1 = &enetc2;
+ ethernet0 = &enetc_port0;
+ ethernet1 = &enetc_port2;
ethernet2 = &mscc_felix_port0;
ethernet3 = &mscc_felix_port1;
ethernet4 = &mscc_felix_port2;
@@ -36,7 +36,7 @@
status = "okay";
};
-&esdhc0 {
+&esdhc {
status = "okay";
};
@@ -61,7 +61,6 @@
&i2c0 {
status = "okay";
- u-boot,dm-pre-reloc;
i2c-mux@77 {
@@ -115,11 +114,23 @@
status = "okay";
};
-&serial0 {
+&duart0 {
status = "okay";
};
-&serial1 {
+&duart1 {
+ status = "okay";
+};
+
+&pcie1 {
+ status = "okay";
+};
+
+&pcie2 {
+ status = "okay";
+};
+
+&usb0 {
status = "okay";
};
@@ -127,17 +138,13 @@
status = "okay";
};
-&usb2 {
- status = "okay";
-};
-
-&enetc0 {
+&enetc_port0 {
status = "okay";
phy-mode = "sgmii";
phy-handle = <&rdb_phy0>;
};
-&enetc2 {
+&enetc_port2 {
status = "okay";
};
@@ -174,11 +181,11 @@
};
&mscc_felix_port4 {
- ethernet = <&enetc2>;
+ ethernet = <&enetc_port2>;
status = "okay";
};
-&mdio0 {
+&enetc_mdio_pf3 {
status = "okay";
rdb_phy0: phy@2 {
reg = <2>;
diff --git a/arch/arm/dts/fsl-ls1028a.dtsi b/arch/arm/dts/fsl-ls1028a.dtsi
index 53b052e..06b36cc 100644
--- a/arch/arm/dts/fsl-ls1028a.dtsi
+++ b/arch/arm/dts/fsl-ls1028a.dtsi
@@ -1,12 +1,16 @@
-// SPDX-License-Identifier: GPL-2.0+ OR X11
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
- * NXP ls1028a SOC common device tree source
+ * Device Tree Include file for NXP Layerscape-1028A family SoC.
*
- * Copyright 2019-2020 NXP
+ * Copyright 2018-2020 NXP
+ *
+ * Harninder Rai <harninder.rai@nxp.com>
*
*/
+#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
/ {
compatible = "fsl,ls1028a";
@@ -14,6 +18,54 @@
#address-cells = <2>;
#size-cells = <2>;
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu0: cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x0>;
+ enable-method = "psci";
+ clocks = <&clockgen QORIQ_CLK_CMUX 0>;
+ next-level-cache = <&l2>;
+ cpu-idle-states = <&CPU_PW20>;
+ #cooling-cells = <2>;
+ };
+
+ cpu1: cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a72";
+ reg = <0x1>;
+ enable-method = "psci";
+ clocks = <&clockgen QORIQ_CLK_CMUX 0>;
+ next-level-cache = <&l2>;
+ cpu-idle-states = <&CPU_PW20>;
+ #cooling-cells = <2>;
+ };
+
+ l2: l2-cache {
+ compatible = "cache";
+ };
+ };
+
+ idle-states {
+ /*
+ * PSCI node is not added default, U-boot will add missing
+ * parts if it determines to use PSCI.
+ */
+ entry-method = "psci";
+
+ CPU_PW20: cpu-pw20 {
+ compatible = "arm,idle-state";
+ idle-state-name = "PW20";
+ arm,psci-suspend-param = <0x0>;
+ entry-latency-us = <2000>;
+ exit-latency-us = <2000>;
+ min-residency-us = <6000>;
+ };
+ };
+
sysclk: sysclk {
compatible = "fixed-clock";
#clock-cells = <0>;
@@ -21,27 +73,33 @@
clock-output-names = "sysclk";
};
- clockgen: clocking@1300000 {
- compatible = "fsl,ls1028a-clockgen";
- reg = <0x0 0x1300000 0x0 0xa0000>;
- #clock-cells = <2>;
- clocks = <&sysclk>;
+ osc_27m: clock-osc-27m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <27000000>;
+ clock-output-names = "phy_27m";
};
- memory@01080000 {
- device_type = "memory";
- reg = <0x00000000 0x01080000 0 0x80000000>;
- /* DRAM space - 1, size : 2 GB DRAM */
+ dpclk: clock-controller@f1f0000 {
+ compatible = "fsl,ls1028a-plldig";
+ reg = <0x0 0xf1f0000 0x0 0xffff>;
+ #clock-cells = <0>;
+ clocks = <&osc_27m>;
};
- gic: interrupt-controller@6000000 {
- compatible = "arm,gic-v3";
- reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
- <0x0 0x06040000 0 0x40000>;
- #interrupt-cells = <3>;
- interrupt-controller;
- interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
- IRQ_TYPE_LEVEL_LOW)>;
+ firmware {
+ optee: optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ status = "disabled";
+ };
+ };
+
+ reboot {
+ compatible ="syscon-reboot";
+ regmap = <&rst>;
+ offset = <0>;
+ mask = <0x02>;
};
timer {
@@ -56,432 +114,1049 @@
IRQ_TYPE_LEVEL_LOW)>;
};
- fspi: flexspi@20c0000 {
- compatible = "nxp,lx2160a-fspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x20c0000 0x0 0x10000>,
- <0x0 0x20000000 0x0 0x10000000>;
- reg-names = "fspi_base", "fspi_mmap";
- clocks = <&clockgen 4 3>, <&clockgen 4 3>;
- clock-names = "fspi_en", "fspi";
- interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
+ pmu {
+ compatible = "arm,cortex-a72-pmu";
+ interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
};
- serial0: serial@21c0500 {
- device_type = "serial";
- compatible = "fsl,ns16550", "ns16550a";
- reg = <0x0 0x21c0500 0x0 0x100>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- serial1: serial@21c0600 {
- device_type = "serial";
- compatible = "fsl,ns16550", "ns16550a";
- reg = <0x0 0x21c0600 0x0 0x100>;
- interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- pcie1: pcie@3400000 {
- compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
- reg = <0x00 0x03400000 0x0 0x80000
- 0x00 0x03480000 0x0 0x40000 /* lut registers */
- 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
- 0x80 0x00000000 0x0 0x20000>; /* configuration space */
- reg-names = "dbi", "lut", "ctrl", "config";
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- num-lanes = <4>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x80 0x00020000 0x0 0x00010000 /* downstream I/O */
- 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
- };
-
- pcie2: pcie@3500000 {
- compatible = "fsl,ls-pcie", "fsl,ls1028-pcie", "snps,dw-pcie";
- reg = <0x00 0x03500000 0x0 0x80000
- 0x00 0x03580000 0x0 0x40000 /* lut registers */
- 0x00 0x035c0000 0x0 0x40000 /* pf controls registers */
- 0x88 0x00000000 0x0 0x20000>; /* configuration space */
- reg-names = "dbi", "lut", "ctrl", "config";
- #address-cells = <3>;
- #size-cells = <2>;
- device_type = "pci";
- num-lanes = <4>;
- bus-range = <0x0 0xff>;
- ranges = <0x81000000 0x0 0x00000000 0x88 0x00020000 0x0 0x00010000 /* downstream I/O */
- 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
- };
-
- pcie@1f0000000 {
- compatible = "pci-host-ecam-generic";
- /* ECAM bus 0, HW has more space reserved but not populated */
- bus-range = <0x0 0x0>;
- reg = <0x01 0xf0000000 0x0 0x100000>;
- #address-cells = <3>;
+ gic: interrupt-controller@6000000 {
+ compatible= "arm,gic-v3";
+ #address-cells = <2>;
#size-cells = <2>;
- device_type = "pci";
- ranges= <0x82000000 0x0 0x00000000 0x1 0xf8000000 0x0 0x160000>;
- enetc0: pci@0,0 {
- reg = <0x000000 0 0 0 0>;
- status = "disabled";
+ ranges;
+ reg= <0x0 0x06000000 0 0x10000>, /* GIC Dist */
+ <0x0 0x06040000 0 0x40000>; /* GIC Redistributor */
+ #interrupt-cells= <3>;
+ interrupt-controller;
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
+ IRQ_TYPE_LEVEL_LOW)>;
+ its: gic-its@6020000 {
+ compatible = "arm,gic-v3-its";
+ msi-controller;
+ reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */
};
- enetc1: pci@0,1 {
- reg = <0x000100 0 0 0 0>;
- status = "disabled";
- };
- enetc2: pci@0,2 {
- reg = <0x000200 0 0 0 0>;
- status = "disabled";
- phy-mode = "internal";
+ };
- fixed-link {
- speed = <2500>;
- full-duplex;
- };
- };
- mdio0: pci@0,3 {
- #address-cells=<0>;
- #size-cells=<1>;
- reg = <0x000300 0 0 0 0>;
- status = "disabled";
+ thermal-zones {
+ ddr-controller {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&tmu 0>;
- fixed-link {
- speed = <1000>;
- full-duplex;
+ trips {
+ ddr-ctrler-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ ddr-ctrler-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
};
};
- mscc_felix: pci@0,5 {
- reg = <0x000500 0 0 0 0>;
- status = "disabled";
+ core-cluster {
+ polling-delay-passive = <1000>;
+ polling-delay = <5000>;
+ thermal-sensors = <&tmu 1>;
- ports {
+ trips {
+ core_cluster_alert: core-cluster-alert {
+ temperature = <85000>;
+ hysteresis = <2000>;
+ type = "passive";
+ };
+
+ core_cluster_crit: core-cluster-crit {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "critical";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ trip = <&core_cluster_alert>;
+ cooling-device =
+ <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
+ <&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
+ };
+ };
+ };
+ };
+
+ soc: soc {
+ compatible = "simple-bus";
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ddr: memory-controller@1080000 {
+ compatible = "fsl,qoriq-memory-controller";
+ reg = <0x0 0x1080000 0x0 0x1000>;
+ interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
+ little-endian;
+ };
+
+ dcfg: syscon@1e00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "fsl,ls1028a-dcfg", "syscon", "simple-mfd";
+ reg = <0x0 0x1e00000 0x0 0x10000>;
+ ranges = <0x0 0x0 0x1e00000 0x10000>;
+ little-endian;
+
+ fspi_clk: clock-controller@900 {
+ compatible = "fsl,ls1028a-flexspi-clk";
+ reg = <0x900 0x4>;
+ #clock-cells = <0>;
+ clocks = <&clockgen QORIQ_CLK_HWACCEL 0>;
+ clock-output-names = "fspi_clk";
+ };
+ };
+
+ rst: syscon@1e60000 {
+ compatible = "syscon";
+ reg = <0x0 0x1e60000 0x0 0x10000>;
+ little-endian;
+ };
+
+ scfg: syscon@1fc0000 {
+ compatible = "fsl,ls1028a-scfg", "syscon";
+ reg = <0x0 0x1fc0000 0x0 0x10000>;
+ big-endian;
+ };
+
+ clockgen: clock-controller@1300000 {
+ compatible = "fsl,ls1028a-clockgen";
+ reg = <0x0 0x1300000 0x0 0xa0000>;
+ #clock-cells = <2>;
+ clocks = <&sysclk>;
+ };
+
+ i2c0: i2c@2000000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2000000 0x0 0x10000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c1: i2c@2010000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2010000 0x0 0x10000>;
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c2: i2c@2020000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2020000 0x0 0x10000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c3: i2c@2030000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2030000 0x0 0x10000>;
+ interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c4: i2c@2040000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2040000 0x0 0x10000>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c5: i2c@2050000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2050000 0x0 0x10000>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c6: i2c@2060000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2060000 0x0 0x10000>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ i2c7: i2c@2070000 {
+ compatible = "fsl,vf610-i2c";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2070000 0x0 0x10000>;
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(4)>;
+ status = "disabled";
+ };
+
+ fspi: spi@20c0000 {
+ compatible = "nxp,lx2160a-fspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x20c0000 0x0 0x10000>,
+ <0x0 0x20000000 0x0 0x10000000>;
+ reg-names = "fspi_base", "fspi_mmap";
+ interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&fspi_clk>, <&fspi_clk>;
+ clock-names = "fspi_en", "fspi";
+ status = "disabled";
+ };
+
+ dspi0: spi@2100000 {
+ compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2100000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "dspi";
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ dmas = <&edma0 0 62>, <&edma0 0 60>;
+ dma-names = "tx", "rx";
+ spi-num-chipselects = <4>;
+ little-endian;
+ status = "disabled";
+ };
+
+ dspi1: spi@2110000 {
+ compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2110000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "dspi";
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ dmas = <&edma0 0 58>, <&edma0 0 56>;
+ dma-names = "tx", "rx";
+ spi-num-chipselects = <4>;
+ little-endian;
+ status = "disabled";
+ };
+
+ dspi2: spi@2120000 {
+ compatible = "fsl,ls1028a-dspi", "fsl,ls1021a-v1.0-dspi";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x0 0x2120000 0x0 0x10000>;
+ interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+ clock-names = "dspi";
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ dmas = <&edma0 0 54>, <&edma0 0 2>;
+ dma-names = "tx", "rx";
+ spi-num-chipselects = <3>;
+ little-endian;
+ status = "disabled";
+ };
+
+ esdhc: mmc@2140000 {
+ compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x2140000 0x0 0x10000>;
+ interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <0>; /* fixed up by bootloader */
+ clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
+ voltage-ranges = <1800 1800 3300 3300>;
+ sdhci,auto-cmd12;
+ little-endian;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
+ esdhc1: mmc@2150000 {
+ compatible = "fsl,ls1028a-esdhc", "fsl,esdhc";
+ reg = <0x0 0x2150000 0x0 0x10000>;
+ interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
+ clock-frequency = <0>; /* fixed up by bootloader */
+ clocks = <&clockgen QORIQ_CLK_HWACCEL 1>;
+ voltage-ranges = <1800 1800>;
+ sdhci,auto-cmd12;
+ non-removable;
+ little-endian;
+ bus-width = <4>;
+ status = "disabled";
+ };
+
+ can0: can@2180000 {
+ compatible = "fsl,lx2160ar1-flexcan";
+ reg = <0x0 0x2180000 0x0 0x10000>;
+ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ can1: can@2190000 {
+ compatible = "fsl,lx2160ar1-flexcan";
+ reg = <0x0 0x2190000 0x0 0x10000>;
+ interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg", "per";
+ status = "disabled";
+ };
+
+ duart0: serial@21c0500 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0500 0x0 0x100>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ status = "disabled";
+ };
+
+ duart1: serial@21c0600 {
+ compatible = "fsl,ns16550", "ns16550a";
+ reg = <0x00 0x21c0600 0x0 0x100>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ status = "disabled";
+ };
+
+
+ lpuart0: serial@2260000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2260000 0x0 0x1000>;
+ interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg";
+ dma-names = "rx","tx";
+ dmas = <&edma0 1 32>,
+ <&edma0 1 33>;
+ status = "disabled";
+ };
+
+ lpuart1: serial@2270000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2270000 0x0 0x1000>;
+ interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg";
+ dma-names = "rx","tx";
+ dmas = <&edma0 1 30>,
+ <&edma0 1 31>;
+ status = "disabled";
+ };
+
+ lpuart2: serial@2280000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2280000 0x0 0x1000>;
+ interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg";
+ dma-names = "rx","tx";
+ dmas = <&edma0 1 28>,
+ <&edma0 1 29>;
+ status = "disabled";
+ };
+
+ lpuart3: serial@2290000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x2290000 0x0 0x1000>;
+ interrupts = <GIC_SPI 235 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg";
+ dma-names = "rx","tx";
+ dmas = <&edma0 1 26>,
+ <&edma0 1 27>;
+ status = "disabled";
+ };
+
+ lpuart4: serial@22a0000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x22a0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 236 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg";
+ dma-names = "rx","tx";
+ dmas = <&edma0 1 24>,
+ <&edma0 1 25>;
+ status = "disabled";
+ };
+
+ lpuart5: serial@22b0000 {
+ compatible = "fsl,ls1028a-lpuart";
+ reg = <0x0 0x22b0000 0x0 0x1000>;
+ interrupts = <GIC_SPI 237 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "ipg";
+ dma-names = "rx","tx";
+ dmas = <&edma0 1 22>,
+ <&edma0 1 23>;
+ status = "disabled";
+ };
+
+ edma0: dma-controller@22c0000 {
+ #dma-cells = <2>;
+ compatible = "fsl,ls1028a-edma", "fsl,vf610-edma";
+ reg = <0x0 0x22c0000 0x0 0x10000>,
+ <0x0 0x22d0000 0x0 0x10000>,
+ <0x0 0x22e0000 0x0 0x10000>;
+ interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "edma-tx", "edma-err";
+ dma-channels = <32>;
+ clock-names = "dmamux0", "dmamux1";
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ };
+
+ gpio1: gpio@2300000 {
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+ reg = <0x0 0x2300000 0x0 0x10000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ little-endian;
+ };
+
+ gpio2: gpio@2310000 {
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+ reg = <0x0 0x2310000 0x0 0x10000>;
+ interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ little-endian;
+ };
+
+ gpio3: gpio@2320000 {
+ compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
+ reg = <0x0 0x2320000 0x0 0x10000>;
+ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
+ little-endian;
+ };
+
+ usb0: usb@3100000 {
+ compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
+ reg = <0x0 0x3100000 0x0 0x10000>;
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ snps,dis_rxdet_inp3_quirk;
+ snps,quirk-frame-length-adjustment = <0x20>;
+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
+ };
+
+ usb1: usb@3110000 {
+ compatible = "fsl,ls1028a-dwc3", "snps,dwc3";
+ reg = <0x0 0x3110000 0x0 0x10000>;
+ interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
+ dr_mode = "host";
+ snps,dis_rxdet_inp3_quirk;
+ snps,quirk-frame-length-adjustment = <0x20>;
+ snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>;
+ };
+
+ sata: sata@3200000 {
+ compatible = "fsl,ls1028a-ahci";
+ reg = <0x0 0x3200000 0x0 0x10000>,
+ <0x7 0x100520 0x0 0x4>;
+ reg-names = "ahci", "sata-ecc";
+ interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ status = "disabled";
+ };
+
+ pcie1: pcie@3400000 {
+ compatible = "fsl,ls1028a-pcie";
+ reg = <0x00 0x03400000 0x0 0x00100000>, /* controller registers */
+ <0x80 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, /* PME interrupt */
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; /* aer interrupt */
+ interrupt-names = "pme", "aer";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ dma-coherent;
+ num-viewport = <8>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x80 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x80 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&its>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 0 GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 0 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 0 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
+ iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
+ status = "disabled";
+ };
+
+ pcie2: pcie@3500000 {
+ compatible = "fsl,ls1028a-pcie";
+ reg = <0x00 0x03500000 0x0 0x00100000>, /* controller registers */
+ <0x88 0x00000000 0x0 0x00002000>; /* configuration space */
+ reg-names = "regs", "config";
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "pme", "aer";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ dma-coherent;
+ num-viewport = <8>;
+ bus-range = <0x0 0xff>;
+ ranges = <0x81000000 0x0 0x00000000 0x88 0x00010000 0x0 0x00010000 /* downstream I/O */
+ 0x82000000 0x0 0x40000000 0x88 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
+ msi-parent = <&its>;
+ #interrupt-cells = <1>;
+ interrupt-map-mask = <0 0 0 7>;
+ interrupt-map = <0000 0 0 1 &gic 0 0 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 2 &gic 0 0 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 3 &gic 0 0 GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
+ <0000 0 0 4 &gic 0 0 GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ iommu-map = <0 &smmu 0 1>; /* Fixed-up by bootloader */
+ status = "disabled";
+ };
+
+ smmu: iommu@5000000 {
+ compatible = "arm,mmu-500";
+ reg = <0 0x5000000 0 0x800000>;
+ #global-interrupts = <8>;
+ #iommu-cells = <1>;
+ stream-match-mask = <0x7c00>;
+ /* global secure fault */
+ interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
+ /* combined secure interrupt */
+ <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
+ /* global non-secure fault */
+ <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
+ /* combined non-secure interrupt */
+ <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
+ /* performance counter interrupts 0-7 */
+ <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>,
+ /* per context interrupt, 64 interrupts */
+ <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 194 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 198 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ crypto: crypto@8000000 {
+ compatible = "fsl,sec-v5.0", "fsl,sec-v4.0";
+ fsl,sec-era = <10>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0x0 0x00 0x8000000 0x100000>;
+ reg = <0x00 0x8000000 0x0 0x100000>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ dma-coherent;
+
+ sec_jr0: jr@10000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x10000 0x10000>;
+ interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr1: jr@20000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x20000 0x10000>;
+ interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr2: jr@30000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x30000 0x10000>;
+ interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
+ sec_jr3: jr@40000 {
+ compatible = "fsl,sec-v5.0-job-ring",
+ "fsl,sec-v4.0-job-ring";
+ reg = <0x40000 0x10000>;
+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
+ };
+ };
+
+ qdma: dma-controller@8380000 {
+ compatible = "fsl,ls1028a-qdma", "fsl,ls1021a-qdma";
+ reg = <0x0 0x8380000 0x0 0x1000>, /* Controller regs */
+ <0x0 0x8390000 0x0 0x10000>, /* Status regs */
+ <0x0 0x83a0000 0x0 0x40000>; /* Block regs */
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 251 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 252 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 253 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 254 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "qdma-error", "qdma-queue0",
+ "qdma-queue1", "qdma-queue2", "qdma-queue3";
+ dma-channels = <8>;
+ block-number = <1>;
+ block-offset = <0x10000>;
+ fsl,dma-queues = <2>;
+ status-sizes = <64>;
+ queue-sizes = <64 64>;
+ };
+
+ cluster1_core0_watchdog: watchdog@c000000 {
+ compatible = "arm,sp805", "arm,primecell";
+ reg = <0x0 0xc000000 0x0 0x1000>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(16)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(16)>;
+ clock-names = "wdog_clk", "apb_pclk";
+ };
+
+ cluster1_core1_watchdog: watchdog@c010000 {
+ compatible = "arm,sp805", "arm,primecell";
+ reg = <0x0 0xc010000 0x0 0x1000>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(16)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(16)>;
+ clock-names = "wdog_clk", "apb_pclk";
+ };
+
+ sai1: audio-controller@f100000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0xf100000 0x0 0x10000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 4>,
+ <&edma0 1 3>;
+ fsl,sai-asynchronous;
+ status = "disabled";
+ };
+
+ sai2: audio-controller@f110000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0xf110000 0x0 0x10000>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 6>,
+ <&edma0 1 5>;
+ fsl,sai-asynchronous;
+ status = "disabled";
+ };
+
+ sai3: audio-controller@f120000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0xf120000 0x0 0x10000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 8>,
+ <&edma0 1 7>;
+ fsl,sai-asynchronous;
+ status = "disabled";
+ };
+
+ sai4: audio-controller@f130000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0xf130000 0x0 0x10000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 10>,
+ <&edma0 1 9>;
+ fsl,sai-asynchronous;
+ status = "disabled";
+ };
+
+ sai5: audio-controller@f140000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0xf140000 0x0 0x10000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 12>,
+ <&edma0 1 11>;
+ fsl,sai-asynchronous;
+ status = "disabled";
+ };
+
+ sai6: audio-controller@f150000 {
+ #sound-dai-cells = <0>;
+ compatible = "fsl,vf610-sai";
+ reg = <0x0 0xf150000 0x0 0x10000>;
+ interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>,
+ <&clockgen QORIQ_CLK_PLATFORM_PLL
+ QORIQ_CLK_PLL_DIV(2)>;
+ clock-names = "bus", "mclk1", "mclk2", "mclk3";
+ dma-names = "tx", "rx";
+ dmas = <&edma0 1 14>,
+ <&edma0 1 13>;
+ fsl,sai-asynchronous;
+ status = "disabled";
+ };
+
+ tmu: tmu@1f80000 {
+ compatible = "fsl,qoriq-tmu";
+ reg = <0x0 0x1f80000 0x0 0x10000>;
+ interrupts = <0 23 0x4>;
+ fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x70061>;
+ fsl,tmu-calibration = <0x00000000 0x00000024
+ 0x00000001 0x0000002b
+ 0x00000002 0x00000031
+ 0x00000003 0x00000038
+ 0x00000004 0x0000003f
+ 0x00000005 0x00000045
+ 0x00000006 0x0000004c
+ 0x00000007 0x00000053
+ 0x00000008 0x00000059
+ 0x00000009 0x00000060
+ 0x0000000a 0x00000066
+ 0x0000000b 0x0000006d
+
+ 0x00010000 0x0000001c
+ 0x00010001 0x00000024
+ 0x00010002 0x0000002c
+ 0x00010003 0x00000035
+ 0x00010004 0x0000003d
+ 0x00010005 0x00000045
+ 0x00010006 0x0000004d
+ 0x00010007 0x00000055
+ 0x00010008 0x0000005e
+ 0x00010009 0x00000066
+ 0x0001000a 0x0000006e
+
+ 0x00020000 0x00000018
+ 0x00020001 0x00000022
+ 0x00020002 0x0000002d
+ 0x00020003 0x00000038
+ 0x00020004 0x00000043
+ 0x00020005 0x0000004d
+ 0x00020006 0x00000058
+ 0x00020007 0x00000063
+ 0x00020008 0x0000006e
+
+ 0x00030000 0x00000010
+ 0x00030001 0x0000001c
+ 0x00030002 0x00000029
+ 0x00030003 0x00000036
+ 0x00030004 0x00000042
+ 0x00030005 0x0000004f
+ 0x00030006 0x0000005b
+ 0x00030007 0x00000068>;
+ little-endian;
+ #thermal-sensor-cells = <1>;
+ };
+
+ pcie@1f0000000 { /* Integrated Endpoint Root Complex */
+ compatible = "pci-host-ecam-generic";
+ reg = <0x01 0xf0000000 0x0 0x100000>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ msi-parent = <&its>;
+ device_type = "pci";
+ bus-range = <0x0 0x0>;
+ dma-coherent;
+ msi-map = <0 &its 0x17 0xe>;
+ iommu-map = <0 &smmu 0x17 0xe>;
+ /* PF0-6 BAR0 - non-prefetchable memory */
+ ranges = <0x82000000 0x1 0xf8000000 0x1 0xf8000000 0x0 0x160000
+ /* PF0-6 BAR2 - prefetchable memory */
+ 0xc2000000 0x1 0xf8160000 0x1 0xf8160000 0x0 0x070000
+ /* PF0: VF0-1 BAR0 - non-prefetchable memory */
+ 0x82000000 0x1 0xf81d0000 0x1 0xf81d0000 0x0 0x020000
+ /* PF0: VF0-1 BAR2 - prefetchable memory */
+ 0xc2000000 0x1 0xf81f0000 0x1 0xf81f0000 0x0 0x020000
+ /* PF1: VF0-1 BAR0 - non-prefetchable memory */
+ 0x82000000 0x1 0xf8210000 0x1 0xf8210000 0x0 0x020000
+ /* PF1: VF0-1 BAR2 - prefetchable memory */
+ 0xc2000000 0x1 0xf8230000 0x1 0xf8230000 0x0 0x020000
+ /* BAR4 (PF5) - non-prefetchable memory */
+ 0x82000000 0x1 0xfc000000 0x1 0xfc000000 0x0 0x400000>;
+
+ enetc_port0: ethernet@0,0 {
+ compatible = "fsl,enetc";
+ reg = <0x000000 0 0 0 0>;
+ status = "disabled";
+ };
+
+ enetc_port1: ethernet@0,1 {
+ compatible = "fsl,enetc";
+ reg = <0x000100 0 0 0 0>;
+ status = "disabled";
+ };
+
+ enetc_port2: ethernet@0,2 {
+ compatible = "fsl,enetc";
+ reg = <0x000200 0 0 0 0>;
+ phy-mode = "internal";
+ status = "disabled";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ };
+ };
+
+ enetc_mdio_pf3: mdio@0,3 {
+ compatible = "fsl,enetc-mdio";
+ reg = <0x000300 0 0 0 0>;
#address-cells = <1>;
#size-cells = <0>;
+ };
- mscc_felix_port0: port@0 {
- reg = <0>;
- status = "disabled";
- };
+ ethernet@0,4 {
+ compatible = "fsl,enetc-ptp";
+ reg = <0x000400 0 0 0 0>;
+ clocks = <&clockgen QORIQ_CLK_HWACCEL 3>;
+ little-endian;
+ fsl,extts-fifo;
+ };
- mscc_felix_port1: port@1 {
- reg = <1>;
- status = "disabled";
- };
+ mscc_felix: ethernet-switch@0,5 {
+ reg = <0x000500 0 0 0 0>;
+ /* IEP INT_B */
+ interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
+ status = "disabled";
- mscc_felix_port2: port@2 {
- reg = <2>;
- status = "disabled";
- };
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
- mscc_felix_port3: port@3 {
- reg = <3>;
- status = "disabled";
- };
-
- mscc_felix_port4: port@4 {
- reg = <4>;
- phy-mode = "internal";
- status = "disabled";
-
- fixed-link {
- speed = <2500>;
- full-duplex;
- };
- };
-
- mscc_felix_port5: port@5 {
- reg = <5>;
- phy-mode = "internal";
- status = "disabled";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
+ /* External ports */
+ mscc_felix_port0: port@0 {
+ reg = <0>;
+ status = "disabled";
};
+ mscc_felix_port1: port@1 {
+ reg = <1>;
+ status = "disabled";
+ };
+
+ mscc_felix_port2: port@2 {
+ reg = <2>;
+ status = "disabled";
+ };
+
+ mscc_felix_port3: port@3 {
+ reg = <3>;
+ status = "disabled";
+ };
+
+ /* Internal ports */
+ mscc_felix_port4: port@4 {
+ reg = <4>;
+ phy-mode = "internal";
+ status = "disabled";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ };
+ };
+
+ mscc_felix_port5: port@5 {
+ reg = <5>;
+ phy-mode = "internal";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
};
};
+
+ enetc_port3: ethernet@0,6 {
+ compatible = "fsl,enetc";
+ reg = <0x000600 0 0 0 0>;
+ phy-mode = "internal";
+ status = "disabled";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+
+ rcec@1f,0 {
+ reg = <0x00f800 0 0 0 0>;
+ /* IEP INT_A */
+ interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
+ };
};
- enetc6: pci@0,6 {
- reg = <0x000600 0 0 0 0>;
- status = "disabled";
- phy-mode = "internal";
+ /* Integrated Endpoint Register Block */
+ ierb@1f0800000 {
+ compatible = "fsl,ls1028a-enetc-ierb";
+ reg = <0x01 0xf0800000 0x0 0x10000>;
+ };
+
+ rcpm: power-controller@1e34040 {
+ compatible = "fsl,ls1028a-rcpm", "fsl,qoriq-rcpm-2.1+";
+ reg = <0x0 0x1e34040 0x0 0x1c>;
+ #fsl,rcpm-wakeup-cells = <7>;
+ little-endian;
+ };
+
+ ftm_alarm0: timer@2800000 {
+ compatible = "fsl,ls1028a-ftm-alarm";
+ reg = <0x0 0x2800000 0x0 0x10000>;
+ fsl,rcpm-wakeup = <&rcpm 0x0 0x0 0x0 0x0 0x4000 0x0 0x0>;
+ interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
};
};
- i2c0: i2c@2000000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2000000 0x0 0x10000>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
+ malidp0: display@f080000 {
+ compatible = "arm,mali-dp500";
+ reg = <0x0 0xf080000 0x0 0x10000>;
+ interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
+ <0 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "DE", "SE";
+ clocks = <&dpclk>,
+ <&clockgen QORIQ_CLK_HWACCEL 2>,
+ <&clockgen QORIQ_CLK_HWACCEL 2>,
+ <&clockgen QORIQ_CLK_HWACCEL 2>;
+ clock-names = "pxlclk", "mclk", "aclk", "pclk";
+ arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
+ arm,malidp-arqos-value = <0xd000d000>;
- i2c1: i2c@2010000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2010000 0x0 0x10000>;
- interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
+ port {
+ dp0_out: endpoint {
- i2c2: i2c@2020000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2020000 0x0 0x10000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
-
- i2c3: i2c@2030000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2030000 0x0 0x10000>;
- interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
-
- i2c4: i2c@2040000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2040000 0x0 0x10000>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
-
- i2c5: i2c@2050000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2050000 0x0 0x10000>;
- interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
-
- i2c6: i2c@2060000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2060000 0x0 0x10000>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
-
- i2c7: i2c@2070000 {
- compatible = "fsl,vf610-i2c";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2070000 0x0 0x10000>;
- interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "i2c";
- clocks = <&clockgen 4 0>;
- status = "disabled";
- };
-
- lpuart0: serial@2260000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2260000 0x0 0x1000>;
- interrupts = <0 232 0x4>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- little-endian;
- status = "disabled";
- };
-
- lpuart1: serial@2270000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2270000 0x0 0x1000>;
- interrupts = <0 233 0x4>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- little-endian;
- status = "disabled";
- };
-
- lpuart2: serial@2280000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2280000 0x0 0x1000>;
- interrupts = <0 234 0x4>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- little-endian;
- status = "disabled";
- };
-
- lpuart3: serial@2290000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x2290000 0x0 0x1000>;
- interrupts = <0 235 0x4>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- little-endian;
- status = "disabled";
- };
-
- lpuart4: serial@22a0000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x22a0000 0x0 0x1000>;
- interrupts = <0 236 0x4>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- little-endian;
- status = "disabled";
- };
-
- lpuart5: serial@22b0000 {
- compatible = "fsl,ls1021a-lpuart";
- reg = <0x0 0x22b0000 0x0 0x1000>;
- interrupts = <0 237 0x4>;
- clocks = <&sysclk>;
- clock-names = "ipg";
- little-endian;
- status = "disabled";
- };
-
- usb1: usb3@3100000 {
- compatible = "fsl,layerscape-dwc3";
- reg = <0x0 0x3100000 0x0 0x10000>;
- interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- status = "disabled";
- };
-
- usb2: usb3@3110000 {
- compatible = "fsl,layerscape-dwc3";
- reg = <0x0 0x3110000 0x0 0x10000>;
- interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
- dr_mode = "host";
- status = "disabled";
- };
-
- dspi0: dspi@2100000 {
- compatible = "fsl,vf610-dspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2100000 0x0 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "dspi";
- clocks = <&clockgen 4 0>;
- num-cs = <5>;
- litte-endian;
- status = "disabled";
- };
-
- dspi1: dspi@2110000 {
- compatible = "fsl,vf610-dspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2110000 0x0 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "dspi";
- clocks = <&clockgen 4 0>;
- num-cs = <5>;
- little-endian;
- status = "disabled";
- };
-
- dspi2: dspi@2120000 {
- compatible = "fsl,vf610-dspi";
- #address-cells = <1>;
- #size-cells = <0>;
- reg = <0x0 0x2120000 0x0 0x10000>;
- interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
- clock-names = "dspi";
- clocks = <&clockgen 4 0>;
- num-cs = <5>;
- little-endian;
- status = "disabled";
- };
-
- esdhc0: esdhc@2140000 {
- compatible = "fsl,esdhc";
- reg = <0x0 0x2140000 0x0 0x10000>;
- interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
- big-endian;
- bus-width = <4>;
- status = "disabled";
- };
-
- esdhc1: esdhc@2150000 {
- compatible = "fsl,esdhc";
- reg = <0x0 0x2150000 0x0 0x10000>;
- interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
- big-endian;
- non-removable;
- bus-width = <4>;
- status = "disabled";
- };
-
- gpio0: gpio@2300000 {
- compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
- reg = <0x0 0x2300000 0x0 0x10000>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- little-endian;
- };
-
- gpio1: gpio@2310000 {
- compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
- reg = <0x0 0x2310000 0x0 0x10000>;
- interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- little-endian;
- };
-
- gpio2: gpio@2320000 {
- compatible = "fsl,ls1028a-gpio","fsl,qoriq-gpio";
- reg = <0x0 0x2320000 0x0 0x10000>;
- interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
- gpio-controller;
- #gpio-cells = <2>;
- interrupt-controller;
- #interrupt-cells = <2>;
- little-endian;
- };
-
- sata: sata@3200000 {
- compatible = "fsl,ls1028a-ahci";
- reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
- 0x7 0x100520 0x0 0x4>; /* ecc sata addr*/
- reg-names = "sata-base", "ecc-addr";
- interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
- status = "disabled";
- };
-
- cluster1_core0_watchdog: wdt@c000000 {
- compatible = "arm,sp805-wdt";
- reg = <0x0 0xc000000 0x0 0x1000>;
+ };
+ };
};
};
diff --git a/arch/arm/dts/fsl-ls1043a.dtsi b/arch/arm/dts/fsl-ls1043a.dtsi
index d8171bd..52dc5a9 100644
--- a/arch/arm/dts/fsl-ls1043a.dtsi
+++ b/arch/arm/dts/fsl-ls1043a.dtsi
@@ -53,7 +53,7 @@
interrupts = <0 64 0x4>;
clock-names = "dspi";
clocks = <&clockgen 4 0>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -66,7 +66,7 @@
interrupts = <0 65 0x4>;
clock-names = "dspi";
clocks = <&clockgen 4 0>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -331,7 +331,7 @@
compatible = "fsl,ls1043a-ahci";
reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
0x0 0x20140520 0x0 0x4>; /* ecc sata addr*/
- reg-names = "sata-base", "ecc-addr";
+ reg-names = "ahci", "sata-ecc";
interrupts = <0 69 4>;
clocks = <&clockgen 4 0>;
status = "disabled";
diff --git a/arch/arm/dts/fsl-ls1046a.dtsi b/arch/arm/dts/fsl-ls1046a.dtsi
index 9df419a..a60cbf1 100644
--- a/arch/arm/dts/fsl-ls1046a.dtsi
+++ b/arch/arm/dts/fsl-ls1046a.dtsi
@@ -52,7 +52,7 @@
interrupts = <0 64 0x4>;
clock-names = "dspi";
clocks = <&clockgen 4 0>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -65,7 +65,7 @@
interrupts = <0 65 0x4>;
clock-names = "dspi";
clocks = <&clockgen 4 0>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -367,7 +367,7 @@
compatible = "fsl,ls1046a-ahci";
reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
0x0 0x20140520 0x0 0x4>; /* ecc sata addr*/
- reg-names = "sata-base", "ecc-addr";
+ reg-names = "ahci", "sata-ecc";
interrupts = <0 69 4>;
clocks = <&clockgen 4 1>;
status = "disabled";
diff --git a/arch/arm/dts/fsl-ls1088a.dtsi b/arch/arm/dts/fsl-ls1088a.dtsi
index 3a5a50f..f73fdfd 100644
--- a/arch/arm/dts/fsl-ls1088a.dtsi
+++ b/arch/arm/dts/fsl-ls1088a.dtsi
@@ -89,7 +89,7 @@
#size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */
- num-cs = <6>;
+ spi-num-chipselects = <6>;
};
qspi: quadspi@1550000 {
@@ -99,7 +99,7 @@
reg = <0x0 0x20c0000 0x0 0x10000>,
<0x0 0x20000000 0x0 0x10000000>;
reg-names = "QuadSPI", "QuadSPI-memory";
- num-cs = <4>;
+ status = "disabled";
};
esdhc: esdhc@2140000 {
@@ -226,7 +226,7 @@
compatible = "fsl,ls1088a-ahci";
reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
0x7 0x100520 0x0 0x4>; /* ecc sata addr*/
- reg-names = "sata-base", "ecc-addr";
+ reg-names = "ahci", "sata-ecc";
interrupts = <0 133 4>;
status = "disabled";
};
diff --git a/arch/arm/dts/fsl-ls2080a.dtsi b/arch/arm/dts/fsl-ls2080a.dtsi
index 278daee..72ba525 100644
--- a/arch/arm/dts/fsl-ls2080a.dtsi
+++ b/arch/arm/dts/fsl-ls2080a.dtsi
@@ -93,7 +93,7 @@
#size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */
- num-cs = <6>;
+ spi-num-chipselects = <6>;
};
qspi: quadspi@1550000 {
diff --git a/arch/arm/dts/fsl-lx2160a.dtsi b/arch/arm/dts/fsl-lx2160a.dtsi
index 3b5f0d1..52e4d72 100644
--- a/arch/arm/dts/fsl-lx2160a.dtsi
+++ b/arch/arm/dts/fsl-lx2160a.dtsi
@@ -172,7 +172,7 @@
#size-cells = <0>;
reg = <0x0 0x2100000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */
- num-cs = <6>;
+ spi-num-chipselects = <6>;
};
dspi1: dspi@2110000 {
@@ -181,7 +181,7 @@
#size-cells = <0>;
reg = <0x0 0x2110000 0x0 0x10000>;
interrupts = <0 26 0x4>; /* Level high type */
- num-cs = <6>;
+ spi-num-chipselects = <6>;
};
dspi2: dspi@2120000 {
@@ -190,7 +190,7 @@
#size-cells = <0>;
reg = <0x0 0x2120000 0x0 0x10000>;
interrupts = <0 241 0x4>; /* Level high type */
- num-cs = <6>;
+ spi-num-chipselects = <6>;
};
gpio0: gpio@2300000 {
diff --git a/arch/arm/dts/hi3660.dtsi b/arch/arm/dts/hi3660.dtsi
index 65a45b0..028f4db 100644
--- a/arch/arm/dts/hi3660.dtsi
+++ b/arch/arm/dts/hi3660.dtsi
@@ -1087,7 +1087,7 @@
};
watchdog0: watchdog@e8a06000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
+ compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a06000 0x0 0x1000>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>;
@@ -1095,7 +1095,7 @@
};
watchdog1: watchdog@e8a07000 {
- compatible = "arm,sp805-wdt", "arm,primecell";
+ compatible = "arm,sp805", "arm,primecell";
reg = <0x0 0xe8a07000 0x0 0x1000>;
interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&crg_ctrl HI3660_OSC32K>;
diff --git a/arch/arm/dts/ls1021a.dtsi b/arch/arm/dts/ls1021a.dtsi
index 7ba2dd2..86192cb 100644
--- a/arch/arm/dts/ls1021a.dtsi
+++ b/arch/arm/dts/ls1021a.dtsi
@@ -190,7 +190,7 @@
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&platform_clk 1>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -203,7 +203,7 @@
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "dspi";
clocks = <&platform_clk 1>;
- num-cs = <6>;
+ spi-num-chipselects = <6>;
big-endian;
status = "disabled";
};
@@ -469,7 +469,7 @@
sata: sata@3200000 {
compatible = "fsl,ls1021a-ahci";
reg = <0x3200000 0x10000 0x20220520 0x4>;
- reg-names = "sata-base", "ecc-addr";
+ reg-names = "ahci", "sata-ecc";
interrupts = <0 101 4>;
status = "disabled";
};
diff --git a/arch/arm/dts/stm32mp15-u-boot.dtsi b/arch/arm/dts/stm32mp15-u-boot.dtsi
index 43a7909..db23d80 100644
--- a/arch/arm/dts/stm32mp15-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15-u-boot.dtsi
@@ -21,6 +21,10 @@
pinctrl1 = &pinctrl_z;
};
+ binman: binman {
+ multiple-images;
+ };
+
clocks {
u-boot,dm-pre-reloc;
};
@@ -228,3 +232,28 @@
resets = <&rcc UART8_R>;
};
+#if defined(CONFIG_STM32MP15x_STM32IMAGE)
+&binman {
+ u-boot-stm32 {
+ filename = "u-boot.stm32";
+ mkimage {
+ args = "-T stm32image -a 0xC0100000 -e 0xC0100000";
+ u-boot {
+ };
+ };
+ };
+};
+#endif
+
+#if defined(CONFIG_SPL)
+&binman {
+ spl-stm32 {
+ filename = "u-boot-spl.stm32";
+ mkimage {
+ args = "-T stm32image -a 0x2FFC2500 -e 0x2FFC2500";
+ u-boot-spl {
+ };
+ };
+ };
+};
+#endif
diff --git a/arch/arm/dts/stm32mp157c-ed1.dts b/arch/arm/dts/stm32mp157c-ed1.dts
index 6e89f88..f62b46b 100644
--- a/arch/arm/dts/stm32mp157c-ed1.dts
+++ b/arch/arm/dts/stm32mp157c-ed1.dts
@@ -321,8 +321,8 @@
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
- mbox-names = "vq0", "vq1", "shutdown";
+ mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
+ mbox-names = "vq0", "vq1", "shutdown", "detach";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
diff --git a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
index 11bc247..71b0486 100644
--- a/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcom-u-boot.dtsi
@@ -50,15 +50,6 @@
};
};
-&gpiof {
- snor-nwp {
- gpio-hog;
- gpios = <7 0>;
- output-high;
- line-name = "spi-nor-nwp";
- };
-};
-
&i2c4 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
index 9d3db20..502cd95 100644
--- a/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dhcor-u-boot.dtsi
@@ -25,15 +25,6 @@
u-boot,dm-spl;
};
-&gpiof {
- snor-nwp {
- gpio-hog;
- gpios = <7 0>;
- output-high;
- line-name = "spi-nor-nwp";
- };
-};
-
&i2c4 {
u-boot,dm-pre-reloc;
};
diff --git a/arch/arm/dts/stm32mp15xx-dkx.dtsi b/arch/arm/dts/stm32mp15xx-dkx.dtsi
index 68987f6..8fc93b0 100644
--- a/arch/arm/dts/stm32mp15xx-dkx.dtsi
+++ b/arch/arm/dts/stm32mp15xx-dkx.dtsi
@@ -228,15 +228,15 @@
cs42l51_tx_endpoint: endpoint@0 {
reg = <0>;
remote-endpoint = <&sai2a_endpoint>;
- frame-master;
- bitclock-master;
+ frame-master = <&cs42l51_tx_endpoint>;
+ bitclock-master = <&cs42l51_tx_endpoint>;
};
cs42l51_rx_endpoint: endpoint@1 {
reg = <1>;
remote-endpoint = <&sai2b_endpoint>;
- frame-master;
- bitclock-master;
+ frame-master = <&cs42l51_rx_endpoint>;
+ bitclock-master = <&cs42l51_rx_endpoint>;
};
};
};
@@ -478,8 +478,8 @@
&m4_rproc {
memory-region = <&retram>, <&mcuram>, <&mcuram2>, <&vdev0vring0>,
<&vdev0vring1>, <&vdev0buffer>;
- mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
- mbox-names = "vq0", "vq1", "shutdown";
+ mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>, <&ipcc 3>;
+ mbox-names = "vq0", "vq1", "shutdown", "detach";
interrupt-parent = <&exti>;
interrupts = <68 1>;
status = "okay";
diff --git a/arch/arm/dts/vf.dtsi b/arch/arm/dts/vf.dtsi
index 5ba13dc..1bdaf3d 100644
--- a/arch/arm/dts/vf.dtsi
+++ b/arch/arm/dts/vf.dtsi
@@ -70,7 +70,7 @@
#size-cells = <0>;
compatible = "fsl,vf610-dspi";
reg = <0x4002c000 0x1000>;
- num-cs = <5>;
+ spi-num-chipselects = <5>;
status = "disabled";
};
@@ -79,7 +79,7 @@
#size-cells = <0>;
compatible = "fsl,vf610-dspi";
reg = <0x4002d000 0x1000>;
- num-cs = <5>;
+ spi-num-chipselects = <5>;
status = "disabled";
};
diff --git a/arch/arm/include/asm/arch-bcmcygnus/configs.h b/arch/arm/include/asm/arch-bcmcygnus/configs.h
index bf05cb3..27f30d1 100644
--- a/arch/arm/include/asm/arch-bcmcygnus/configs.h
+++ b/arch/arm/include/asm/arch-bcmcygnus/configs.h
@@ -17,7 +17,6 @@
#define CONFIG_SYS_NS16550_CLK 100000000
#define CONFIG_SYS_NS16550_CLK_DIV 54
-#define CONFIG_SERIAL_MULTI
#define CONFIG_SYS_NS16550_COM3 0x18023000
/* Ethernet */
diff --git a/arch/arm/include/asm/arch-stm32f4/gpio.h b/arch/arm/include/asm/arch-stm32f4/gpio.h
deleted file mode 100644
index 490f686..0000000
--- a/arch/arm/include/asm/arch-stm32f4/gpio.h
+++ /dev/null
@@ -1,15 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2011
- * Yuri Tikhonov, Emcraft Systems, yur@emcraft.com
- *
- * (C) Copyright 2015
- * Kamil Lulko, <kamil.lulko@gmail.com>
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-
-#include <asm/arch-stm32/gpio.h>
-
-#endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32f7/gpio.h b/arch/arm/include/asm/arch-stm32f7/gpio.h
deleted file mode 100644
index 21f4e0f..0000000
--- a/arch/arm/include/asm/arch-stm32f7/gpio.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
- * Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-
-#include <asm/arch-stm32/gpio.h>
-
-#endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/include/asm/arch-stm32h7/gpio.h b/arch/arm/include/asm/arch-stm32h7/gpio.h
deleted file mode 100644
index 4f57f17..0000000
--- a/arch/arm/include/asm/arch-stm32h7/gpio.h
+++ /dev/null
@@ -1,12 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
- * Author(s): Patrice Chotard, <patrice.chotard@foss.st.com> for STMicroelectronics.
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-
-#include <asm/arch-stm32/gpio.h>
-
-#endif /* _STM32_GPIO_H_ */
diff --git a/arch/arm/mach-stm32mp/Kconfig b/arch/arm/mach-stm32mp/Kconfig
index 69d56c2..a6c7fc5 100644
--- a/arch/arm/mach-stm32mp/Kconfig
+++ b/arch/arm/mach-stm32mp/Kconfig
@@ -35,10 +35,10 @@
config STM32MP15x
bool "Support STMicroelectronics STM32MP15x Soc"
- select ARCH_SUPPORT_PSCI if !TFABOOT
- select ARM_SMCCC if TFABOOT
+ select ARCH_SUPPORT_PSCI
+ select BINMAN
select CPU_V7A
- select CPU_V7_HAS_NONSEC if !TFABOOT
+ select CPU_V7_HAS_NONSEC
select CPU_V7_HAS_VIRT
select OF_BOARD_SETUP
select PINCTRL_STM32
@@ -47,8 +47,6 @@
select STM32_SERIAL
select SYS_ARCH_TIMER
imply CMD_NVEDIT_INFO
- imply SYSRESET_PSCI if TFABOOT
- imply SYSRESET_SYSCON if !TFABOOT
help
support of STMicroelectronics SOC STM32MP15x family
STM32MP157, STM32MP153 or STM32MP151
@@ -153,7 +151,6 @@
config DDR_CACHEABLE_SIZE
hex "Size of the DDR marked cacheable in pre-reloc stage"
- default 0x10000000 if TFABOOT
default 0x40000000
help
Define the size of the DDR marked as cacheable in U-Boot
diff --git a/arch/arm/mach-stm32mp/bsec.c b/arch/arm/mach-stm32mp/bsec.c
index fe39bd8..27d1829 100644
--- a/arch/arm/mach-stm32mp/bsec.c
+++ b/arch/arm/mach-stm32mp/bsec.c
@@ -295,7 +295,7 @@
u32 tmp_data = 0;
int ret;
- if (IS_ENABLED(CONFIG_TFABOOT))
+ if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc(STM32_SMC_BSEC,
STM32_SMC_READ_OTP,
otp, 0, val);
@@ -326,7 +326,7 @@
{
struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT))
+ if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc(STM32_SMC_BSEC,
STM32_SMC_READ_SHADOW,
otp, 0, val);
@@ -350,7 +350,7 @@
{
struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT))
+ if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_PROG_OTP,
otp, val);
@@ -365,7 +365,7 @@
{
struct stm32mp_bsec_plat *plat;
- if (IS_ENABLED(CONFIG_TFABOOT))
+ if (IS_ENABLED(CONFIG_ARM_SMCCC) && !IS_ENABLED(CONFIG_SPL_BUILD))
return stm32_smc_exec(STM32_SMC_BSEC,
STM32_SMC_WRITE_SHADOW,
otp, val);
@@ -377,7 +377,7 @@
static int stm32mp_bsec_write_lock(struct udevice *dev, u32 val, u32 otp)
{
- if (!IS_ENABLED(CONFIG_TFABOOT))
+ if (!IS_ENABLED(CONFIG_ARM_SMCCC) || IS_ENABLED(CONFIG_SPL_BUILD))
return -ENOTSUPP;
if (val == 1)
@@ -503,10 +503,9 @@
/*
* update unlocked shadow for OTP cleared by the rom code
- * only executed in U-Boot proper when TF-A is not used
+ * only executed in SPL, it is done in TF-A for TFABOOT
*/
-
- if (!IS_ENABLED(CONFIG_TFABOOT) && !IS_ENABLED(CONFIG_SPL_BUILD)) {
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
plat = dev_get_plat(dev);
for (otp = 57; otp <= BSEC_OTP_MAX_VALUE; otp++)
diff --git a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig
index f4c0d18..dd166a1 100644
--- a/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig
+++ b/arch/arm/mach-stm32mp/cmd_stm32prog/Kconfig
@@ -1,4 +1,3 @@
-
config CMD_STM32PROG
bool "command stm32prog for STM32CudeProgrammer"
select DFU
@@ -31,4 +30,4 @@
help
activate the command "stm32prog serial" for STM32MP soc family
with the tools STM32CubeProgrammer using U-Boot serial device
- and UART protocol.
\ No newline at end of file
+ and UART protocol.
diff --git a/arch/arm/mach-stm32mp/config.mk b/arch/arm/mach-stm32mp/config.mk
deleted file mode 100644
index f7f5b77..0000000
--- a/arch/arm/mach-stm32mp/config.mk
+++ /dev/null
@@ -1,29 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
-#
-# Copyright (C) 2018, STMicroelectronics - All Rights Reserved
-#
-
-ifndef CONFIG_SPL
-INPUTS-$(CONFIG_STM32MP15x_STM32IMAGE) += u-boot.stm32
-else
-ifdef CONFIG_SPL_BUILD
-INPUTS-y += u-boot-spl.stm32
-endif
-endif
-
-MKIMAGEFLAGS_u-boot.stm32 = -T stm32image -a $(CONFIG_SYS_TEXT_BASE) -e $(CONFIG_SYS_TEXT_BASE)
-
-u-boot.stm32: MKIMAGEOUTPUT = u-boot.stm32.log
-
-u-boot.stm32: u-boot.bin FORCE
- $(call if_changed,mkimage)
-
-MKIMAGEFLAGS_u-boot-spl.stm32 = -T stm32image -a $(CONFIG_SPL_TEXT_BASE) -e $(CONFIG_SPL_TEXT_BASE)
-
-spl/u-boot-spl.stm32: MKIMAGEOUTPUT = spl/u-boot-spl.stm32.log
-
-spl/u-boot-spl.stm32: spl/u-boot-spl.bin FORCE
- $(call if_changed,mkimage)
-
-u-boot-spl.stm32 : spl/u-boot-spl.stm32
- $(call if_changed,copy)
diff --git a/arch/arm/mach-stm32mp/cpu.c b/arch/arm/mach-stm32mp/cpu.c
index eb79f3f..325d710 100644
--- a/arch/arm/mach-stm32mp/cpu.c
+++ b/arch/arm/mach-stm32mp/cpu.c
@@ -93,8 +93,6 @@
struct lmb lmb;
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
-#ifndef CONFIG_TFABOOT
static void security_init(void)
{
/* Disable the backup domain write protection */
@@ -154,7 +152,6 @@
writel(BIT(0), RCC_MP_AHB5ENSETR);
writel(0x0, GPIOZ_SECCFGR);
}
-#endif /* CONFIG_TFABOOT */
/*
* Debug init
@@ -166,7 +163,7 @@
* done in TF-A for TRUSTED boot and
* DBGMCU access is controlled by BSEC_DENABLE.DBGSWENABLE
*/
- if (!IS_ENABLED(CONFIG_TFABOOT) && bsec_dbgswenable()) {
+ if (bsec_dbgswenable()) {
setbits_le32(RCC_DBGCFGR, RCC_DBGCFGR_DBGCKEN);
setbits_le32(DBGMCU_APB4FZ1, DBGMCU_APB4FZ1_IWDG2);
}
@@ -174,12 +171,17 @@
void spl_board_init(void)
{
- dbgmcu_init();
-}
-#endif /* !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD) */
+ struct udevice *dev;
+ int ret;
-#if !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
+ dbgmcu_init();
+
+ /* force probe of BSEC driver to shadow the upper OTP */
+ ret = uclass_get_device_by_driver(UCLASS_MISC, DM_DRIVER_GET(stm32mp_bsec), &dev);
+ if (ret)
+ log_warning("BSEC probe failed: %d\n", ret);
+}
+
/* get bootmode from ROM code boot context: saved in TAMP register */
static void update_bootmode(void)
{
@@ -205,7 +207,6 @@
TAMP_BOOT_MODE_MASK,
boot_mode << TAMP_BOOT_MODE_SHIFT);
}
-#endif
u32 get_bootmode(void)
{
@@ -283,29 +284,26 @@
/* early armv7 timer init: needed for polling */
timer_init();
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
-#ifndef CONFIG_TFABOOT
- security_init();
- update_bootmode();
-#endif
- /* Reset Coprocessor state unless it wakes up from Standby power mode */
- if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) {
- writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE);
- writel(0, TAMP_COPRO_RSC_TBL_ADDRESS);
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ security_init();
+ update_bootmode();
}
-#endif
+/* reset copro state in SPL, when used, or in U-Boot */
+ if (!IS_ENABLED(CONFIG_SPL) || IS_ENABLED(CONFIG_SPL_BUILD)) {
+ /* Reset Coprocessor state unless it wakes up from Standby power mode */
+ if (!(readl(PWR_MCUCR) & PWR_MCUCR_SBF)) {
+ writel(TAMP_COPRO_STATE_OFF, TAMP_COPRO_STATE);
+ writel(0, TAMP_COPRO_RSC_TBL_ADDRESS);
+ }
+ }
boot_mode = get_bootmode();
if (IS_ENABLED(CONFIG_CMD_STM32PROG_SERIAL) &&
(boot_mode & TAMP_BOOT_DEVICE_MASK) == BOOT_SERIAL_UART)
gd->flags |= GD_FLG_SILENT | GD_FLG_DISABLE_CONSOLE;
-#if defined(CONFIG_DEBUG_UART) && \
- !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
- else
+ else if (IS_ENABLED(CONFIG_DEBUG_UART) && IS_ENABLED(CONFIG_SPL_BUILD))
debug_uart_init();
-#endif
return 0;
}
@@ -459,7 +457,7 @@
soc_type[type], soc_pkg[pkg], soc_rev[rev]);
}
-#if defined(CONFIG_DISPLAY_CPUINFO)
+/* used when CONFIG_DISPLAY_CPUINFO is activated */
int print_cpuinfo(void)
{
char name[SOC_NAME_SIZE];
@@ -469,7 +467,6 @@
return 0;
}
-#endif /* CONFIG_DISPLAY_CPUINFO */
static void setup_boot_mode(void)
{
@@ -599,13 +596,15 @@
*/
__weak int setup_mac_address(void)
{
-#if defined(CONFIG_NET)
int ret;
int i;
u32 otp[2];
uchar enetaddr[6];
struct udevice *dev;
+ if (!IS_ENABLED(CONFIG_NET))
+ return 0;
+
/* MAC already in environment */
if (eth_env_get_enetaddr("ethaddr", enetaddr))
return 0;
@@ -632,7 +631,6 @@
ret = eth_env_set_enetaddr("ethaddr", enetaddr);
if (ret)
log_err("Failed to set mac address %pM from OTP: %d\n", enetaddr, ret);
-#endif
return 0;
}
diff --git a/arch/arm/mach-stm32mp/include/mach/gpio.h b/arch/arm/mach-stm32mp/include/mach/gpio.h
deleted file mode 100644
index 7a0f293..0000000
--- a/arch/arm/mach-stm32mp/include/mach/gpio.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2016
- * Vikas Manocha, <vikas.manocha@st.com>
- */
-
-#ifndef _STM32_GPIO_H_
-#define _STM32_GPIO_H_
-#include <asm/gpio.h>
-
-enum stm32_gpio_mode {
- STM32_GPIO_MODE_IN = 0,
- STM32_GPIO_MODE_OUT,
- STM32_GPIO_MODE_AF,
- STM32_GPIO_MODE_AN
-};
-
-enum stm32_gpio_otype {
- STM32_GPIO_OTYPE_PP = 0,
- STM32_GPIO_OTYPE_OD
-};
-
-enum stm32_gpio_speed {
- STM32_GPIO_SPEED_2M = 0,
- STM32_GPIO_SPEED_25M,
- STM32_GPIO_SPEED_50M,
- STM32_GPIO_SPEED_100M
-};
-
-enum stm32_gpio_pupd {
- STM32_GPIO_PUPD_NO = 0,
- STM32_GPIO_PUPD_UP,
- STM32_GPIO_PUPD_DOWN
-};
-
-enum stm32_gpio_af {
- STM32_GPIO_AF0 = 0,
- STM32_GPIO_AF1,
- STM32_GPIO_AF2,
- STM32_GPIO_AF3,
- STM32_GPIO_AF4,
- STM32_GPIO_AF5,
- STM32_GPIO_AF6,
- STM32_GPIO_AF7,
- STM32_GPIO_AF8,
- STM32_GPIO_AF9,
- STM32_GPIO_AF10,
- STM32_GPIO_AF11,
- STM32_GPIO_AF12,
- STM32_GPIO_AF13,
- STM32_GPIO_AF14,
- STM32_GPIO_AF15
-};
-
-struct stm32_gpio_dsc {
- u8 port;
- u8 pin;
-};
-
-struct stm32_gpio_ctl {
- enum stm32_gpio_mode mode;
- enum stm32_gpio_otype otype;
- enum stm32_gpio_speed speed;
- enum stm32_gpio_pupd pupd;
- enum stm32_gpio_af af;
-};
-
-struct stm32_gpio_regs {
- u32 moder; /* GPIO port mode */
- u32 otyper; /* GPIO port output type */
- u32 ospeedr; /* GPIO port output speed */
- u32 pupdr; /* GPIO port pull-up/pull-down */
- u32 idr; /* GPIO port input data */
- u32 odr; /* GPIO port output data */
- u32 bsrr; /* GPIO port bit set/reset */
- u32 lckr; /* GPIO port configuration lock */
- u32 afr[2]; /* GPIO alternate function */
-};
-
-struct stm32_gpio_priv {
- struct stm32_gpio_regs *regs;
- unsigned int gpio_range;
-};
-
-int stm32_offset_to_index(struct udevice *dev, unsigned int offset);
-
-#endif /* _STM32_GPIO_H_ */
diff --git a/arch/powerpc/cpu/mpc8xx/config.mk b/arch/powerpc/cpu/mpc8xx/config.mk
index 00b7ed5..5a64665 100644
--- a/arch/powerpc/cpu/mpc8xx/config.mk
+++ b/arch/powerpc/cpu/mpc8xx/config.mk
@@ -3,4 +3,4 @@
# (C) Copyright 2000-2010
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
-PLATFORM_CPPFLAGS += -mstring -mcpu=860 -msoft-float
+PLATFORM_CPPFLAGS += -mcpu=860 -msoft-float
diff --git a/board/dhelectronics/dh_stm32mp1/Kconfig b/board/dhelectronics/dh_stm32mp1/Kconfig
index 1fc792c..dc707c2 100644
--- a/board/dhelectronics/dh_stm32mp1/Kconfig
+++ b/board/dhelectronics/dh_stm32mp1/Kconfig
@@ -7,7 +7,7 @@
default "dhelectronics"
config SYS_CONFIG_NAME
- default "dh_stm32mp1"
+ default "stm32mp15_dh_dhsom"
config ENV_SECT_SIZE
default 0x10000 if ENV_IS_IN_SPI_FLASH
diff --git a/board/dhelectronics/dh_stm32mp1/MAINTAINERS b/board/dhelectronics/dh_stm32mp1/MAINTAINERS
index 9ce21c3..865588f 100644
--- a/board/dhelectronics/dh_stm32mp1/MAINTAINERS
+++ b/board/dhelectronics/dh_stm32mp1/MAINTAINERS
@@ -6,4 +6,4 @@
F: board/dhelectronics/dh_stm32mp1/
F: configs/stm32mp15_dhcom_basic_defconfig
F: configs/stm32mp15_dhcor_basic_defconfig
-F: include/configs/stm32mp1.h
+F: include/configs/stm32mp15_dh_dhsom.h
diff --git a/board/dhelectronics/dh_stm32mp1/Makefile b/board/dhelectronics/dh_stm32mp1/Makefile
index b368b39..30db1de 100644
--- a/board/dhelectronics/dh_stm32mp1/Makefile
+++ b/board/dhelectronics/dh_stm32mp1/Makefile
@@ -5,5 +5,4 @@
obj-y += ../../st/common/stpmic1.o board.o
-obj-$(CONFIG_SYS_MTDPARTS_RUNTIME) += ../../st/common/stm32mp_mtdparts.o
obj-$(CONFIG_SET_DFU_ALT_INFO) += ../../st/common/stm32mp_dfu.o
diff --git a/board/engicam/stm32mp1/Kconfig b/board/engicam/stm32mp1/Kconfig
index c800fd4..3802d44 100644
--- a/board/engicam/stm32mp1/Kconfig
+++ b/board/engicam/stm32mp1/Kconfig
@@ -7,6 +7,6 @@
default "engicam"
config SYS_CONFIG_NAME
- default "stm32mp1"
+ default "stm32mp15_common"
endif
diff --git a/board/freescale/common/fsl_validate.c b/board/freescale/common/fsl_validate.c
index c90afe2..34875d0 100644
--- a/board/freescale/common/fsl_validate.c
+++ b/board/freescale/common/fsl_validate.c
@@ -499,12 +499,8 @@
return ret;
ret = algo->hash_init(algo, &ctx);
- if (ret) {
- if (ctx)
- free(ctx);
+ if (ret)
return ret;
- }
-
/* Update hash for ESBC key */
#ifdef CONFIG_KEY_REVOCATION
if (check_srk(img)) {
@@ -519,15 +515,12 @@
img->img_key, img->key_len, 1);
if (ret)
return ret;
-
/* Copy hash at destination buffer */
ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size);
if (ret) {
- if (ctx)
- free(ctx);
+ free(ctx);
return ret;
}
-
for (i = 0; i < SHA256_BYTES; i++)
img->img_key_hash[i] = hash_val[i];
@@ -554,18 +547,14 @@
ret = algo->hash_init(algo, &ctx);
/* Copy hash at destination buffer */
- if (ret) {
- free(ctx);
+ if (ret)
return ret;
- }
/* Update hash for CSF Header */
ret = algo->hash_update(algo, ctx,
(u8 *)&img->hdr, sizeof(struct fsl_secboot_img_hdr), 0);
- if (ret) {
- free(ctx);
+ if (ret)
return ret;
- }
/* Update the hash with that of srk table if srk flag is 1
* If IE Table is selected, key is not added in the hash
@@ -592,22 +581,17 @@
key_hash = 1;
}
#endif
- if (ret) {
- free(ctx);
+ if (ret)
return ret;
- }
if (!key_hash) {
free(ctx);
return ERROR_KEY_TABLE_NOT_FOUND;
}
-
/* Update hash for actual Image */
ret = algo->hash_update(algo, ctx,
(u8 *)(*(img->img_addr_ptr)), img->img_size, 1);
- if (ret) {
- free(ctx);
+ if (ret)
return ret;
- }
/* Copy hash at destination buffer */
ret = algo->hash_finish(algo, ctx, hash_val, algo->digest_size);
diff --git a/board/freescale/lx2160a/lx2160a.c b/board/freescale/lx2160a/lx2160a.c
index bd5abb6..bda6656 100644
--- a/board/freescale/lx2160a/lx2160a.c
+++ b/board/freescale/lx2160a/lx2160a.c
@@ -825,10 +825,18 @@
u64 mc_memory_base = 0;
u64 mc_memory_size = 0;
u16 total_memory_banks;
+ int err;
#if CONFIG_IS_ENABLED(TARGET_LX2160ARDB)
u8 board_rev;
#endif
+ err = fdt_increase_size(blob, 512);
+ if (err) {
+ printf("%s fdt_increase_size: err=%s\n", __func__,
+ fdt_strerror(err));
+ return err;
+ }
+
ft_cpu_setup(blob, bd);
fdt_fixup_mc_ddr(&mc_memory_base, &mc_memory_size);
diff --git a/board/freescale/t104xrdb/ddr.c b/board/freescale/t104xrdb/ddr.c
index 8351f7c..539a36d 100644
--- a/board/freescale/t104xrdb/ddr.c
+++ b/board/freescale/t104xrdb/ddr.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2013 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
*/
#include <common.h>
@@ -83,6 +84,7 @@
/* optimize cpo for erratum A-009942 */
popts->cpo_sample = 0x59;
#else
+ popts->cpo_sample = 0x54;
popts->half_strength_driver_enable = 0;
#endif
/*
diff --git a/board/kontron/sl28/MAINTAINERS b/board/kontron/sl28/MAINTAINERS
index a7b0fbb..6b24cba 100644
--- a/board/kontron/sl28/MAINTAINERS
+++ b/board/kontron/sl28/MAINTAINERS
@@ -1,6 +1,7 @@
Kontron SMARC-sAL28 board
M: Michael Walle <michael@walle.cc>
S: Maintained
+F: arch/arm/dts/fsl-ls1028a.dtsi
F: arch/arm/dts/fsl-ls1028a-kontron-sl28-*
F: board/kontron/sl28/
F: configs/kontron_sl28_defconfig
diff --git a/board/siemens/iot2050/board.c b/board/siemens/iot2050/board.c
index 16ae2ff..b965ae9 100644
--- a/board/siemens/iot2050/board.c
+++ b/board/siemens/iot2050/board.c
@@ -259,7 +259,8 @@
struct udevice *dev;
int ret;
- if (progress < 0 || progress == BOOTSTAGE_ID_ENTER_CLI_LOOP) {
+ if ((progress < 0 && progress != -BOOTSTAGE_ID_NET_ETH_START) ||
+ progress == BOOTSTAGE_ID_ENTER_CLI_LOOP) {
ret = led_get_by_label("status-led-green", &dev);
if (ret == 0)
led_set_state(dev, LEDST_OFF);
diff --git a/board/st/stm32f746-disco/stm32f746-disco.c b/board/st/stm32f746-disco/stm32f746-disco.c
index 08c2102..95d83e7 100644
--- a/board/st/stm32f746-disco/stm32f746-disco.c
+++ b/board/st/stm32f746-disco/stm32f746-disco.c
@@ -21,7 +21,6 @@
#include <asm/io.h>
#include <asm/armv7m.h>
#include <asm/arch/stm32.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/syscfg.h>
#include <asm/gpio.h>
#include <linux/delay.h>
diff --git a/board/st/stm32mp1/Kconfig b/board/st/stm32mp1/Kconfig
index c5ab755..89e97ae 100644
--- a/board/st/stm32mp1/Kconfig
+++ b/board/st/stm32mp1/Kconfig
@@ -7,7 +7,7 @@
default "st"
config SYS_CONFIG_NAME
- default "stm32mp1"
+ default "stm32mp15_st_common"
source "board/st/common/Kconfig"
endif
diff --git a/board/st/stm32mp1/MAINTAINERS b/board/st/stm32mp1/MAINTAINERS
index 0e6d80f..6451195 100644
--- a/board/st/stm32mp1/MAINTAINERS
+++ b/board/st/stm32mp1/MAINTAINERS
@@ -8,4 +8,5 @@
F: configs/stm32mp15_defconfig
F: configs/stm32mp15_basic_defconfig
F: configs/stm32mp15_trusted_defconfig
-F: include/configs/stm32mp1.h
+F: include/configs/stm32mp15_common.h
+F: include/configs/stm32mp15_st_common.h
diff --git a/board/st/stm32mp1/stm32mp1.c b/board/st/stm32mp1/stm32mp1.c
index 2c2faad..8459267 100644
--- a/board/st/stm32mp1/stm32mp1.c
+++ b/board/st/stm32mp1/stm32mp1.c
@@ -658,7 +658,11 @@
if (IS_ENABLED(CONFIG_DM_REGULATOR))
regulators_enable_boot_on(_DEBUG);
- if (!IS_ENABLED(CONFIG_TFABOOT))
+ /*
+ * sysconf initialisation done only when U-Boot is running in secure
+ * done in TF-A for TFABOOT.
+ */
+ if (IS_ENABLED(CONFIG_ARMV7_NONSEC))
sysconf_init();
if (CONFIG_IS_ENABLED(LED))
diff --git a/common/Kconfig.boot b/boot/Kconfig
similarity index 100%
rename from common/Kconfig.boot
rename to boot/Kconfig
diff --git a/boot/Makefile b/boot/Makefile
new file mode 100644
index 0000000..2938c3f
--- /dev/null
+++ b/boot/Makefile
@@ -0,0 +1,37 @@
+# SPDX-License-Identifier: GPL-2.0+
+#
+# (C) Copyright 2004-2006
+# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+
+ifndef CONFIG_SPL_BUILD
+
+# This option is not just y/n - it can have a numeric value
+ifdef CONFIG_BOOT_RETRY_TIME
+obj-y += bootretry.o
+endif
+
+obj-$(CONFIG_CMD_BOOTM) += bootm.o bootm_os.o
+obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o
+obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o
+
+obj-$(CONFIG_CMD_PXE) += pxe_utils.o
+obj-$(CONFIG_CMD_SYSBOOT) += pxe_utils.o
+
+endif
+
+obj-y += image.o image-board.o
+obj-$(CONFIG_ANDROID_AB) += android_ab.o
+obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o image-android-dt.o
+obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
+obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += fdt_region.o
+obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
+obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
+obj-$(CONFIG_$(SPL_TPL_)IMAGE_SIGN_INFO) += image-sig.o
+obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-fit-sig.o
+obj-$(CONFIG_$(SPL_TPL_)FIT_CIPHER) += image-cipher.o
+
+obj-$(CONFIG_CMD_ADTIMG) += image-android-dt.o
+
+ifdef CONFIG_SPL_BUILD
+obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
+endif
diff --git a/common/android_ab.c b/boot/android_ab.c
similarity index 100%
rename from common/android_ab.c
rename to boot/android_ab.c
diff --git a/common/boot_fit.c b/boot/boot_fit.c
similarity index 100%
rename from common/boot_fit.c
rename to boot/boot_fit.c
diff --git a/common/bootm.c b/boot/bootm.c
similarity index 100%
rename from common/bootm.c
rename to boot/bootm.c
diff --git a/common/bootm_os.c b/boot/bootm_os.c
similarity index 96%
rename from common/bootm_os.c
rename to boot/bootm_os.c
index 39623f9..e635c72 100644
--- a/common/bootm_os.c
+++ b/boot/bootm_os.c
@@ -138,28 +138,6 @@
}
#endif /* CONFIG_BOOTM_NETBSD*/
-#ifdef CONFIG_LYNXKDI
-static int do_bootm_lynxkdi(int flag, int argc, char *const argv[],
- bootm_headers_t *images)
-{
- image_header_t *hdr = &images->legacy_hdr_os_copy;
-
- if (flag != BOOTM_STATE_OS_GO)
- return 0;
-
-#if defined(CONFIG_FIT)
- if (!images->legacy_hdr_valid) {
- fit_unsupported_reset("Lynx");
- return 1;
- }
-#endif
-
- lynxkdi_boot((image_header_t *)hdr);
-
- return 1;
-}
-#endif /* CONFIG_LYNXKDI */
-
#ifdef CONFIG_BOOTM_RTEMS
static int do_bootm_rtems(int flag, int argc, char *const argv[],
bootm_headers_t *images)
@@ -570,9 +548,6 @@
#ifdef CONFIG_BOOTM_NETBSD
[IH_OS_NETBSD] = do_bootm_netbsd,
#endif
-#ifdef CONFIG_LYNXKDI
- [IH_OS_LYNXOS] = do_bootm_lynxkdi,
-#endif
#ifdef CONFIG_BOOTM_RTEMS
[IH_OS_RTEMS] = do_bootm_rtems,
#endif
diff --git a/common/bootretry.c b/boot/bootretry.c
similarity index 100%
rename from common/bootretry.c
rename to boot/bootretry.c
diff --git a/common/common_fit.c b/boot/common_fit.c
similarity index 100%
rename from common/common_fit.c
rename to boot/common_fit.c
diff --git a/common/fdt_region.c b/boot/fdt_region.c
similarity index 100%
rename from common/fdt_region.c
rename to boot/fdt_region.c
diff --git a/common/image-android-dt.c b/boot/image-android-dt.c
similarity index 100%
rename from common/image-android-dt.c
rename to boot/image-android-dt.c
diff --git a/common/image-android.c b/boot/image-android.c
similarity index 100%
rename from common/image-android.c
rename to boot/image-android.c
diff --git a/common/image-board.c b/boot/image-board.c
similarity index 100%
rename from common/image-board.c
rename to boot/image-board.c
diff --git a/common/image-cipher.c b/boot/image-cipher.c
similarity index 100%
rename from common/image-cipher.c
rename to boot/image-cipher.c
diff --git a/common/image-fdt.c b/boot/image-fdt.c
similarity index 100%
rename from common/image-fdt.c
rename to boot/image-fdt.c
diff --git a/common/image-fit-sig.c b/boot/image-fit-sig.c
similarity index 100%
rename from common/image-fit-sig.c
rename to boot/image-fit-sig.c
diff --git a/common/image-fit.c b/boot/image-fit.c
similarity index 100%
rename from common/image-fit.c
rename to boot/image-fit.c
diff --git a/common/image-host.c b/boot/image-host.c
similarity index 100%
rename from common/image-host.c
rename to boot/image-host.c
diff --git a/common/image-sig.c b/boot/image-sig.c
similarity index 100%
rename from common/image-sig.c
rename to boot/image-sig.c
diff --git a/common/image.c b/boot/image.c
similarity index 99%
rename from common/image.c
rename to boot/image.c
index 3fa60b5..992e729 100644
--- a/common/image.c
+++ b/boot/image.c
@@ -106,7 +106,7 @@
{ IH_OS_INVALID, "invalid", "Invalid OS", },
{ IH_OS_ARM_TRUSTED_FIRMWARE, "arm-trusted-firmware", "ARM Trusted Firmware" },
{ IH_OS_LINUX, "linux", "Linux", },
-#if defined(CONFIG_LYNXKDI) || defined(USE_HOSTCC)
+#if defined(USE_HOSTCC)
{ IH_OS_LYNXOS, "lynxos", "LynxOS", },
#endif
{ IH_OS_NETBSD, "netbsd", "NetBSD", },
diff --git a/cmd/pxe_utils.c b/boot/pxe_utils.c
similarity index 74%
rename from cmd/pxe_utils.c
rename to boot/pxe_utils.c
index b79fcb6..a7a84f2 100644
--- a/cmd/pxe_utils.c
+++ b/boot/pxe_utils.c
@@ -30,17 +30,34 @@
#define MAX_TFTP_PATH_LEN 512
-bool is_pxe;
+int pxe_get_file_size(ulong *sizep)
+{
+ const char *val;
-/*
- * Convert an ethaddr from the environment to the format used by pxelinux
- * filenames based on mac addresses. Convert's ':' to '-', and adds "01-" to
- * the beginning of the ethernet address to indicate a hardware type of
- * Ethernet. Also converts uppercase hex characters into lowercase, to match
- * pxelinux's behavior.
+ val = from_env("filesize");
+ if (!val)
+ return -ENOENT;
+
+ if (strict_strtoul(val, 16, sizep) < 0)
+ return -EINVAL;
+
+ return 0;
+}
+
+/**
+ * format_mac_pxe() - obtain a MAC address in the PXE format
*
- * Returns 1 for success, -ENOENT if 'ethaddr' is undefined in the
- * environment, or some other value < 0 on error.
+ * This produces a MAC-address string in the format for the current ethernet
+ * device:
+ *
+ * 01-aa-bb-cc-dd-ee-ff
+ *
+ * where aa-ff is the MAC address in hex
+ *
+ * @outbuf: Buffer to write string to
+ * @outbuf_len: length of buffer
+ * @return 1 if OK, -ENOSPC if buffer is too small, -ENOENT is there is no
+ * current ethernet device
*/
int format_mac_pxe(char *outbuf, size_t outbuf_len)
{
@@ -48,8 +65,7 @@
if (outbuf_len < 21) {
printf("outbuf is too small (%zd < 21)\n", outbuf_len);
-
- return -EINVAL;
+ return -ENOSPC;
}
if (!eth_env_get_enetaddr_by_index("eth", eth_get_dev_index(), ethaddr))
@@ -62,74 +78,35 @@
return 1;
}
-/*
- * Returns the directory the file specified in the bootfile env variable is
- * in. If bootfile isn't defined in the environment, return NULL, which should
- * be interpreted as "don't prepend anything to paths".
- */
-static int get_bootfile_path(const char *file_path, char *bootfile_path,
- size_t bootfile_path_size)
-{
- char *bootfile, *last_slash;
- size_t path_len = 0;
-
- /* Only syslinux allows absolute paths */
- if (file_path[0] == '/' && !is_pxe)
- goto ret;
-
- bootfile = from_env("bootfile");
-
- if (!bootfile)
- goto ret;
-
- last_slash = strrchr(bootfile, '/');
-
- if (!last_slash)
- goto ret;
-
- path_len = (last_slash - bootfile) + 1;
-
- if (bootfile_path_size < path_len) {
- printf("bootfile_path too small. (%zd < %zd)\n",
- bootfile_path_size, path_len);
-
- return -1;
- }
-
- strncpy(bootfile_path, bootfile, path_len);
-
- ret:
- bootfile_path[path_len] = '\0';
-
- return 1;
-}
-
-int (*do_getfile)(struct cmd_tbl *cmdtp, const char *file_path,
- char *file_addr);
-
-/*
+/**
+ * get_relfile() - read a file relative to the PXE file
+ *
* As in pxelinux, paths to files referenced from files we retrieve are
* relative to the location of bootfile. get_relfile takes such a path and
* joins it with the bootfile path to get the full path to the target file. If
* the bootfile path is NULL, we use file_path as is.
*
- * Returns 1 for success, or < 0 on error.
+ * @ctx: PXE context
+ * @file_path: File path to read (relative to the PXE file)
+ * @file_addr: Address to load file to
+ * @filesizep: If not NULL, returns the file size in bytes
+ * Returns 1 for success, or < 0 on error
*/
-static int get_relfile(struct cmd_tbl *cmdtp, const char *file_path,
- unsigned long file_addr)
+static int get_relfile(struct pxe_context *ctx, const char *file_path,
+ unsigned long file_addr, ulong *filesizep)
{
size_t path_len;
char relfile[MAX_TFTP_PATH_LEN + 1];
char addr_buf[18];
- int err;
+ ulong size;
+ int ret;
- err = get_bootfile_path(file_path, relfile, sizeof(relfile));
+ if (file_path[0] == '/' && ctx->allow_abs_path)
+ *relfile = '\0';
+ else
+ strncpy(relfile, ctx->bootdir, MAX_TFTP_PATH_LEN);
- if (err < 0)
- return err;
-
- path_len = strlen(file_path);
- path_len += strlen(relfile);
+ path_len = strlen(file_path) + strlen(relfile);
if (path_len > MAX_TFTP_PATH_LEN) {
printf("Base path too long (%s%s)\n", relfile, file_path);
@@ -143,42 +120,37 @@
sprintf(addr_buf, "%lx", file_addr);
- return do_getfile(cmdtp, relfile, addr_buf);
+ ret = ctx->getfile(ctx, relfile, addr_buf, &size);
+ if (ret < 0)
+ return log_msg_ret("get", ret);
+ if (filesizep)
+ *filesizep = size;
+
+ return 1;
}
-/*
- * Retrieve the file at 'file_path' to the locate given by 'file_addr'. If
- * 'bootfile' was specified in the environment, the path to bootfile will be
- * prepended to 'file_path' and the resulting path will be used.
+/**
+ * get_pxe_file() - read a file
*
- * Returns 1 on success, or < 0 for error.
+ * The file is read and nul-terminated
+ *
+ * @ctx: PXE context
+ * @file_path: File path to read (relative to the PXE file)
+ * @file_addr: Address to load file to
+ * Returns 1 for success, or < 0 on error
*/
-int get_pxe_file(struct cmd_tbl *cmdtp, const char *file_path,
- unsigned long file_addr)
+int get_pxe_file(struct pxe_context *ctx, const char *file_path,
+ ulong file_addr)
{
- unsigned long config_file_size;
- char *tftp_filesize;
+ ulong size;
int err;
char *buf;
- err = get_relfile(cmdtp, file_path, file_addr);
-
+ err = get_relfile(ctx, file_path, file_addr, &size);
if (err < 0)
return err;
- /*
- * the file comes without a NUL byte at the end, so find out its size
- * and add the NUL byte.
- */
- tftp_filesize = from_env("filesize");
-
- if (!tftp_filesize)
- return -ENOENT;
-
- if (strict_strtoul(tftp_filesize, 16, &config_file_size) < 0)
- return -EINVAL;
-
- buf = map_sysmem(file_addr + config_file_size, 1);
+ buf = map_sysmem(file_addr + size, 1);
*buf = '\0';
unmap_sysmem(buf);
@@ -187,14 +159,15 @@
#define PXELINUX_DIR "pxelinux.cfg/"
-/*
- * Retrieves a file in the 'pxelinux.cfg' folder. Since this uses get_pxe_file
- * to do the hard work, the location of the 'pxelinux.cfg' folder is generated
- * from the bootfile path, as described above.
+/**
+ * get_pxelinux_path() - Get a file in the pxelinux.cfg/ directory
*
- * Returns 1 on success or < 0 on error.
+ * @ctx: PXE context
+ * @file: Filename to process (relative to pxelinux.cfg/)
+ * Returns 1 for success, -ENAMETOOLONG if the resulting path is too long.
+ * or other value < 0 on other error
*/
-int get_pxelinux_path(struct cmd_tbl *cmdtp, const char *file,
+int get_pxelinux_path(struct pxe_context *ctx, const char *file,
unsigned long pxefile_addr_r)
{
size_t base_len = strlen(PXELINUX_DIR);
@@ -208,45 +181,54 @@
sprintf(path, PXELINUX_DIR "%s", file);
- return get_pxe_file(cmdtp, path, pxefile_addr_r);
+ return get_pxe_file(ctx, path, pxefile_addr_r);
}
-/*
+/**
+ * get_relfile_envaddr() - read a file to an address in an env var
+ *
* Wrapper to make it easier to store the file at file_path in the location
* specified by envaddr_name. file_path will be joined to the bootfile path,
* if any is specified.
*
- * Returns 1 on success or < 0 on error.
+ * @ctx: PXE context
+ * @file_path: File path to read (relative to the PXE file)
+ * @envaddr_name: Name of environment variable which contains the address to
+ * load to
+ * @filesizep: Returns the file size in bytes
+ * Returns 1 on success, -ENOENT if @envaddr_name does not exist as an
+ * environment variable, -EINVAL if its format is not valid hex, or other
+ * value < 0 on other error
*/
-static int get_relfile_envaddr(struct cmd_tbl *cmdtp, const char *file_path,
- const char *envaddr_name)
+static int get_relfile_envaddr(struct pxe_context *ctx, const char *file_path,
+ const char *envaddr_name, ulong *filesizep)
{
unsigned long file_addr;
char *envaddr;
envaddr = from_env(envaddr_name);
-
if (!envaddr)
return -ENOENT;
if (strict_strtoul(envaddr, 16, &file_addr) < 0)
return -EINVAL;
- return get_relfile(cmdtp, file_path, file_addr);
+ return get_relfile(ctx, file_path, file_addr, filesizep);
}
-/*
+/**
+ * label_create() - crate a new PXE label
+ *
* Allocates memory for and initializes a pxe_label. This uses malloc, so the
* result must be free()'d to reclaim the memory.
*
- * Returns NULL if malloc fails.
+ * Returns a pointer to the label, or NULL if out of memory
*/
static struct pxe_label *label_create(void)
{
struct pxe_label *label;
label = malloc(sizeof(struct pxe_label));
-
if (!label)
return NULL;
@@ -255,48 +237,39 @@
return label;
}
-/*
- * Free the memory used by a pxe_label, including that used by its name,
- * kernel, append and initrd members, if they're non NULL.
+/**
+ * label_destroy() - free the memory used by a pxe_label
+ *
+ * This frees @label itself as well as memory used by its name,
+ * kernel, config, append, initrd, fdt, fdtdir and fdtoverlay members, if
+ * they're non-NULL.
*
* So - be sure to only use dynamically allocated memory for the members of
* the pxe_label struct, unless you want to clean it up first. These are
* currently only created by the pxe file parsing code.
+ *
+ * @label: Label to free
*/
static void label_destroy(struct pxe_label *label)
{
- if (label->name)
- free(label->name);
-
- if (label->kernel)
- free(label->kernel);
-
- if (label->config)
- free(label->config);
-
- if (label->append)
- free(label->append);
-
- if (label->initrd)
- free(label->initrd);
-
- if (label->fdt)
- free(label->fdt);
-
- if (label->fdtdir)
- free(label->fdtdir);
-
- if (label->fdtoverlays)
- free(label->fdtoverlays);
-
+ free(label->name);
+ free(label->kernel);
+ free(label->config);
+ free(label->append);
+ free(label->initrd);
+ free(label->fdt);
+ free(label->fdtdir);
+ free(label->fdtoverlays);
free(label);
}
-/*
- * Print a label and its string members if they're defined.
+/**
+ * label_print() - Print a label and its string members if they're defined
*
* This is passed as a callback to the menu code for displaying each
* menu entry.
+ *
+ * @data: Label to print (is cast to struct pxe_label *)
*/
static void label_print(void *data)
{
@@ -306,21 +279,22 @@
printf("%s:\t%s\n", label->num, c);
}
-/*
- * Boot a label that specified 'localboot'. This requires that the 'localcmd'
- * environment variable is defined. Its contents will be executed as U-Boot
- * command. If the label specified an 'append' line, its contents will be
- * used to overwrite the contents of the 'bootargs' environment variable prior
- * to running 'localcmd'.
+/**
+ * label_localboot() - Boot a label that specified 'localboot'
*
- * Returns 1 on success or < 0 on error.
+ * This requires that the 'localcmd' environment variable is defined. Its
+ * contents will be executed as U-Boot commands. If the label specified an
+ * 'append' line, its contents will be used to overwrite the contents of the
+ * 'bootargs' environment variable prior to running 'localcmd'.
+ *
+ * @label: Label to process
+ * Returns 1 on success or < 0 on error
*/
static int label_localboot(struct pxe_label *label)
{
char *localcmd;
localcmd = from_env("localcmd");
-
if (!localcmd)
return -ENOENT;
@@ -337,11 +311,15 @@
return run_command_list(localcmd, strlen(localcmd), 0);
}
-/*
- * Loads fdt overlays specified in 'fdtoverlays'.
+/**
+ * label_boot_fdtoverlay() - Loads fdt overlays specified in 'fdtoverlays'
+ *
+ * @ctx: PXE context
+ * @label: Label to process
*/
#ifdef CONFIG_OF_LIBFDT_OVERLAY
-static void label_boot_fdtoverlay(struct cmd_tbl *cmdtp, struct pxe_label *label)
+static void label_boot_fdtoverlay(struct pxe_context *ctx,
+ struct pxe_label *label)
{
char *fdtoverlay = label->fdtoverlays;
struct fdt_header *working_fdt;
@@ -391,8 +369,8 @@
goto skip_overlay;
/* Load overlay file */
- err = get_relfile_envaddr(cmdtp, overlayfile,
- "fdtoverlay_addr_r");
+ err = get_relfile_envaddr(ctx, overlayfile, "fdtoverlay_addr_r",
+ NULL);
if (err < 0) {
printf("Failed loading overlay %s\n", overlayfile);
goto skip_overlay;
@@ -423,8 +401,8 @@
}
#endif
-/*
- * Boot according to the contents of a pxe_label.
+/**
+ * label_boot() - Boot according to the contents of a pxe_label
*
* If we can't boot for any reason, we return. A successful boot never
* returns.
@@ -437,8 +415,13 @@
*
* If the label specifies an 'append' line, its contents will overwrite that
* of the 'bootargs' environment variable.
+ *
+ * @ctx: PXE context
+ * @label: Label to process
+ * Returns does not return on success, otherwise returns 0 if a localboot
+ * label was processed, or 1 on error
*/
-static int label_boot(struct cmd_tbl *cmdtp, struct pxe_label *label)
+static int label_boot(struct pxe_context *ctx, struct pxe_label *label)
{
char *bootm_argv[] = { "bootm", NULL, NULL, NULL, NULL };
char *zboot_argv[] = { "zboot", NULL, "0", NULL, NULL };
@@ -472,21 +455,25 @@
}
if (label->initrd) {
- if (get_relfile_envaddr(cmdtp, label->initrd, "ramdisk_addr_r") < 0) {
+ ulong size;
+
+ if (get_relfile_envaddr(ctx, label->initrd, "ramdisk_addr_r",
+ &size) < 0) {
printf("Skipping %s for failure retrieving initrd\n",
label->name);
return 1;
}
initrd_addr_str = env_get("ramdisk_addr_r");
- strncpy(initrd_filesize, env_get("filesize"), 9);
+ strcpy(initrd_filesize, simple_xtoa(size));
strncpy(initrd_str, initrd_addr_str, 18);
strcat(initrd_str, ":");
strncat(initrd_str, initrd_filesize, 9);
}
- if (get_relfile_envaddr(cmdtp, label->kernel, "kernel_addr_r") < 0) {
+ if (get_relfile_envaddr(ctx, label->kernel, "kernel_addr_r",
+ NULL) < 0) {
printf("Skipping %s for failure retrieving kernel\n",
label->name);
return 1;
@@ -627,8 +614,8 @@
}
if (fdtfile) {
- int err = get_relfile_envaddr(cmdtp, fdtfile,
- "fdt_addr_r");
+ int err = get_relfile_envaddr(ctx, fdtfile,
+ "fdt_addr_r", NULL);
free(fdtfilefree);
if (err < 0) {
@@ -643,7 +630,7 @@
#ifdef CONFIG_OF_LIBFDT_OVERLAY
if (label->fdtoverlays)
- label_boot_fdtoverlay(cmdtp, label);
+ label_boot_fdtoverlay(ctx, label);
#endif
} else {
bootm_argv[3] = NULL;
@@ -675,28 +662,26 @@
buf = map_sysmem(kernel_addr_r, 0);
/* Try bootm for legacy and FIT format image */
if (genimg_get_format(buf) != IMAGE_FORMAT_INVALID)
- do_bootm(cmdtp, 0, bootm_argc, bootm_argv);
+ do_bootm(ctx->cmdtp, 0, bootm_argc, bootm_argv);
/* Try booting an AArch64 Linux kernel image */
else if (IS_ENABLED(CONFIG_CMD_BOOTI))
- do_booti(cmdtp, 0, bootm_argc, bootm_argv);
+ do_booti(ctx->cmdtp, 0, bootm_argc, bootm_argv);
/* Try booting a Image */
else if (IS_ENABLED(CONFIG_CMD_BOOTZ))
- do_bootz(cmdtp, 0, bootm_argc, bootm_argv);
+ do_bootz(ctx->cmdtp, 0, bootm_argc, bootm_argv);
/* Try booting an x86_64 Linux kernel image */
else if (IS_ENABLED(CONFIG_CMD_ZBOOT))
- do_zboot_parent(cmdtp, 0, zboot_argc, zboot_argv, NULL);
+ do_zboot_parent(ctx->cmdtp, 0, zboot_argc, zboot_argv, NULL);
unmap_sysmem(buf);
cleanup:
- if (fit_addr)
- free(fit_addr);
+ free(fit_addr);
+
return 1;
}
-/*
- * Tokens for the pxe file parser.
- */
+/** enum token_type - Tokens for the pxe file parser */
enum token_type {
T_EOL,
T_STRING,
@@ -722,17 +707,13 @@
T_INVALID
};
-/*
- * A token - given by a value and a type.
- */
+/** struct token - token - given by a value and a type */
struct token {
char *val;
enum token_type type;
};
-/*
- * Keywords recognized.
- */
+/* Keywords recognized */
static const struct token keywords[] = {
{"menu", T_MENU},
{"title", T_TITLE},
@@ -757,7 +738,9 @@
{NULL, T_INVALID}
};
-/*
+/**
+ * enum lex_state - lexer state
+ *
* Since pxe(linux) files don't have a token to identify the start of a
* literal, we have to keep track of when we're in a state where a literal is
* expected vs when we're in a state a keyword is expected.
@@ -768,11 +751,10 @@
L_SLITERAL
};
-/*
- * get_string retrieves a string from *p and stores it as a token in
- * *t.
+/**
+ * get_string() - retrieves a string from *p and stores it as a token in *t.
*
- * get_string used for scanning both string literals and keywords.
+ * This is used for scanning both string literals and keywords.
*
* Characters from *p are copied into t-val until a character equal to
* delim is found, or a NUL byte is reached. If delim has the special value of
@@ -785,9 +767,15 @@
* The location of *p is updated to point to the first character after the end
* of the token - the ending delimiter.
*
- * On success, the new value of t->val is returned. Memory for t->val is
- * allocated using malloc and must be free()'d to reclaim it. If insufficient
- * memory is available, NULL is returned.
+ * Memory for t->val is allocated using malloc and must be free()'d to reclaim
+ * it.
+ *
+ * @p: Points to a pointer to the current position in the input being processed.
+ * Updated to point at the first character after the current token
+ * @t: Pointers to a token to fill in
+ * @delim: Delimiter character to look for, either newline or space
+ * @lower: true to convert the string to lower case when storing
+ * Returns the new value of t->val, on success, NULL if out of memory
*/
static char *get_string(char **p, struct token *t, char delim, int lower)
{
@@ -802,7 +790,6 @@
*/
b = *p;
e = *p;
-
while (*e) {
if ((delim == ' ' && isspace(*e)) || delim == *e)
break;
@@ -828,18 +815,18 @@
t->val[len] = '\0';
- /*
- * Update *p so the caller knows where to continue scanning.
- */
+ /* Update *p so the caller knows where to continue scanning */
*p = e;
-
t->type = T_STRING;
return t->val;
}
-/*
- * Populate a keyword token with a type and value.
+/**
+ * get_keyword() - Populate a keyword token with a type and value
+ *
+ * Updates the ->type field based on the keyword string in @val
+ * @t: Token to populate
*/
static void get_keyword(struct token *t)
{
@@ -853,11 +840,14 @@
}
}
-/*
- * Get the next token. We have to keep track of which state we're in to know
- * if we're looking to get a string literal or a keyword.
+/**
+ * get_token() - Get the next token
*
- * *p is updated to point at the first character after the current token.
+ * We have to keep track of which state we're in to know if we're looking to get
+ * a string literal or a keyword.
+ *
+ * @p: Points to a pointer to the current position in the input being processed.
+ * Updated to point at the first character after the current token
*/
static void get_token(char **p, struct token *t, enum lex_state state)
{
@@ -901,8 +891,13 @@
*p = c;
}
-/*
- * Increment *c until we get to the end of the current line, or EOF.
+/**
+ * eol_or_eof() - Find end of line
+ *
+ * Increment *c until we get to the end of the current line, or EOF
+ *
+ * @c: Points to a pointer to the current position in the input being processed.
+ * Updated to point at the first character after the current token
*/
static void eol_or_eof(char **c)
{
@@ -947,7 +942,6 @@
char *s = *c;
get_token(c, &t, L_SLITERAL);
-
if (t.type != T_STRING) {
printf("Expected string: %.*s\n", (int)(*c - s), s);
return -EINVAL;
@@ -960,7 +954,7 @@
return 1;
}
-static int parse_pxefile_top(struct cmd_tbl *cmdtp, char *p, unsigned long base,
+static int parse_pxefile_top(struct pxe_context *ctx, char *p, ulong base,
struct pxe_menu *cfg, int nest_level);
/*
@@ -971,7 +965,7 @@
* include, nest_level has already been incremented and doesn't need to be
* incremented here.
*/
-static int handle_include(struct cmd_tbl *cmdtp, char **c, unsigned long base,
+static int handle_include(struct pxe_context *ctx, char **c, unsigned long base,
struct pxe_menu *cfg, int nest_level)
{
char *include_path;
@@ -981,21 +975,19 @@
int ret;
err = parse_sliteral(c, &include_path);
-
if (err < 0) {
printf("Expected include path: %.*s\n", (int)(*c - s), s);
return err;
}
- err = get_pxe_file(cmdtp, include_path, base);
-
+ err = get_pxe_file(ctx, include_path, base);
if (err < 0) {
printf("Couldn't retrieve %s\n", include_path);
return err;
}
buf = map_sysmem(base, 0);
- ret = parse_pxefile_top(cmdtp, buf, base, cfg, nest_level);
+ ret = parse_pxefile_top(ctx, buf, base, cfg, nest_level);
unmap_sysmem(buf);
return ret;
@@ -1011,7 +1003,7 @@
* nest_level should be 1 when parsing the top level pxe file, 2 when parsing
* a file it includes, 3 when parsing a file included by that file, and so on.
*/
-static int parse_menu(struct cmd_tbl *cmdtp, char **c, struct pxe_menu *cfg,
+static int parse_menu(struct pxe_context *ctx, char **c, struct pxe_menu *cfg,
unsigned long base, int nest_level)
{
struct token t;
@@ -1027,7 +1019,7 @@
break;
case T_INCLUDE:
- err = handle_include(cmdtp, c, base, cfg, nest_level + 1);
+ err = handle_include(ctx, c, base, cfg, nest_level + 1);
break;
case T_BACKGROUND:
@@ -1038,7 +1030,6 @@
printf("Ignoring malformed menu command: %.*s\n",
(int)(*c - s), s);
}
-
if (err < 0)
return err;
@@ -1229,7 +1220,7 @@
*
* Returns 1 on success, < 0 on error.
*/
-static int parse_pxefile_top(struct cmd_tbl *cmdtp, char *p, unsigned long base,
+static int parse_pxefile_top(struct pxe_context *ctx, char *p, unsigned long base,
struct pxe_menu *cfg, int nest_level)
{
struct token t;
@@ -1252,7 +1243,7 @@
switch (t.type) {
case T_MENU:
cfg->prompt = 1;
- err = parse_menu(cmdtp, &p, cfg,
+ err = parse_menu(ctx, &p, cfg,
base + ALIGN(strlen(b) + 1, 4),
nest_level);
break;
@@ -1279,7 +1270,7 @@
break;
case T_INCLUDE:
- err = handle_include(cmdtp, &p,
+ err = handle_include(ctx, &p,
base + ALIGN(strlen(b), 4), cfg,
nest_level + 1);
break;
@@ -1306,18 +1297,14 @@
}
/*
- * Free the memory used by a pxe_menu and its labels.
*/
void destroy_pxe_menu(struct pxe_menu *cfg)
{
struct list_head *pos, *n;
struct pxe_label *label;
- if (cfg->title)
- free(cfg->title);
-
- if (cfg->default_label)
- free(cfg->default_label);
+ free(cfg->title);
+ free(cfg->default_label);
list_for_each_safe(pos, n, &cfg->labels) {
label = list_entry(pos, struct pxe_label, list);
@@ -1328,23 +1315,13 @@
free(cfg);
}
-/*
- * Entry point for parsing a pxe file. This is only used for the top level
- * file.
- *
- * Returns NULL if there is an error, otherwise, returns a pointer to a
- * pxe_menu struct populated with the results of parsing the pxe file (and any
- * files it includes). The resulting pxe_menu struct can be free()'d by using
- * the destroy_pxe_menu() function.
- */
-struct pxe_menu *parse_pxefile(struct cmd_tbl *cmdtp, unsigned long menucfg)
+struct pxe_menu *parse_pxefile(struct pxe_context *ctx, unsigned long menucfg)
{
struct pxe_menu *cfg;
char *buf;
int r;
cfg = malloc(sizeof(struct pxe_menu));
-
if (!cfg)
return NULL;
@@ -1353,9 +1330,8 @@
INIT_LIST_HEAD(&cfg->labels);
buf = map_sysmem(menucfg, 0);
- r = parse_pxefile_top(cmdtp, buf, menucfg, cfg, 1);
+ r = parse_pxefile_top(ctx, buf, menucfg, cfg, 1);
unmap_sysmem(buf);
-
if (r < 0) {
destroy_pxe_menu(cfg);
return NULL;
@@ -1382,7 +1358,6 @@
*/
m = menu_create(cfg->title, DIV_ROUND_UP(cfg->timeout, 10),
cfg->prompt, NULL, label_print, NULL, NULL);
-
if (!m)
return NULL;
@@ -1421,7 +1396,8 @@
/*
* Try to boot any labels we have yet to attempt to boot.
*/
-static void boot_unattempted_labels(struct cmd_tbl *cmdtp, struct pxe_menu *cfg)
+static void boot_unattempted_labels(struct pxe_context *ctx,
+ struct pxe_menu *cfg)
{
struct list_head *pos;
struct pxe_label *label;
@@ -1430,23 +1406,11 @@
label = list_entry(pos, struct pxe_label, list);
if (!label->attempted)
- label_boot(cmdtp, label);
+ label_boot(ctx, label);
}
}
-/*
- * Boot the system as prescribed by a pxe_menu.
- *
- * Use the menu system to either get the user's choice or the default, based
- * on config or user input. If there is no default or user's choice,
- * attempted to boot labels in the order they were given in pxe files.
- * If the default or user's choice fails to boot, attempt to boot other
- * labels in the order they were given in pxe files.
- *
- * If this function returns, there weren't any labels that successfully
- * booted, or the user interrupted the menu selection via ctrl+c.
- */
-void handle_pxe_menu(struct cmd_tbl *cmdtp, struct pxe_menu *cfg)
+void handle_pxe_menu(struct pxe_context *ctx, struct pxe_menu *cfg)
{
void *choice;
struct menu *m;
@@ -1455,7 +1419,7 @@
if (IS_ENABLED(CONFIG_CMD_BMP)) {
/* display BMP if available */
if (cfg->bmp) {
- if (get_relfile(cmdtp, cfg->bmp, image_load_addr)) {
+ if (get_relfile(ctx, cfg->bmp, image_load_addr, NULL)) {
if (CONFIG_IS_ENABLED(CMD_CLS))
run_command("cls", 0);
bmp_display(image_load_addr,
@@ -1472,7 +1436,6 @@
return;
err = menu_get_choice(m, &choice);
-
menu_destroy(m);
/*
@@ -1487,12 +1450,67 @@
*/
if (err == 1) {
- err = label_boot(cmdtp, choice);
+ err = label_boot(ctx, choice);
if (!err)
return;
} else if (err != -ENOENT) {
return;
}
- boot_unattempted_labels(cmdtp, cfg);
+ boot_unattempted_labels(ctx, cfg);
+}
+
+int pxe_setup_ctx(struct pxe_context *ctx, struct cmd_tbl *cmdtp,
+ pxe_getfile_func getfile, void *userdata,
+ bool allow_abs_path, const char *bootfile)
+{
+ const char *last_slash;
+ size_t path_len = 0;
+
+ memset(ctx, '\0', sizeof(*ctx));
+ ctx->cmdtp = cmdtp;
+ ctx->getfile = getfile;
+ ctx->userdata = userdata;
+ ctx->allow_abs_path = allow_abs_path;
+
+ /* figure out the boot directory, if there is one */
+ if (bootfile && strlen(bootfile) >= MAX_TFTP_PATH_LEN)
+ return -ENOSPC;
+ ctx->bootdir = strdup(bootfile ? bootfile : "");
+ if (!ctx->bootdir)
+ return -ENOMEM;
+
+ if (bootfile) {
+ last_slash = strrchr(bootfile, '/');
+ if (last_slash)
+ path_len = (last_slash - bootfile) + 1;
+ }
+ ctx->bootdir[path_len] = '\0';
+
+ return 0;
+}
+
+void pxe_destroy_ctx(struct pxe_context *ctx)
+{
+ free(ctx->bootdir);
+}
+
+int pxe_process(struct pxe_context *ctx, ulong pxefile_addr_r, bool prompt)
+{
+ struct pxe_menu *cfg;
+
+ cfg = parse_pxefile(ctx, pxefile_addr_r);
+ if (!cfg) {
+ printf("Error parsing config file\n");
+ return 1;
+ }
+
+ if (prompt)
+ cfg->prompt = 1;
+
+ handle_pxe_menu(ctx, cfg);
+
+ destroy_pxe_menu(cfg);
+
+ return 0;
}
diff --git a/cmd/Makefile b/cmd/Makefile
index ed36694..891819a 100644
--- a/cmd/Makefile
+++ b/cmd/Makefile
@@ -123,7 +123,7 @@
obj-$(CONFIG_CMD_PMC) += pmc.o
obj-$(CONFIG_CMD_PSTORE) += pstore.o
obj-$(CONFIG_CMD_PWM) += pwm.o
-obj-$(CONFIG_CMD_PXE) += pxe.o pxe_utils.o
+obj-$(CONFIG_CMD_PXE) += pxe.o
obj-$(CONFIG_CMD_WOL) += wol.o
obj-$(CONFIG_CMD_QFW) += qfw.o
obj-$(CONFIG_CMD_READ) += read.o
@@ -145,7 +145,7 @@
obj-$(CONFIG_CMD_SPI) += spi.o
obj-$(CONFIG_CMD_STRINGS) += strings.o
obj-$(CONFIG_CMD_SMC) += smccc.o
-obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o pxe_utils.o
+obj-$(CONFIG_CMD_SYSBOOT) += sysboot.o
obj-$(CONFIG_CMD_STACKPROTECTOR_TEST) += stackprot_test.o
obj-$(CONFIG_CMD_TERMINAL) += terminal.o
obj-$(CONFIG_CMD_TIME) += time.o
diff --git a/cmd/pxe.c b/cmd/pxe.c
index 46ac08f..db8e469 100644
--- a/cmd/pxe.c
+++ b/cmd/pxe.c
@@ -24,16 +24,21 @@
NULL
};
-static int do_get_tftp(struct cmd_tbl *cmdtp, const char *file_path,
- char *file_addr)
+static int do_get_tftp(struct pxe_context *ctx, const char *file_path,
+ char *file_addr, ulong *sizep)
{
char *tftp_argv[] = {"tftp", NULL, NULL, NULL};
+ int ret;
tftp_argv[1] = file_addr;
tftp_argv[2] = (void *)file_path;
- if (do_tftpb(cmdtp, 0, 3, tftp_argv))
+ if (do_tftpb(ctx->cmdtp, 0, 3, tftp_argv))
return -ENOENT;
+ ret = pxe_get_file_size(sizep);
+ if (ret)
+ return log_msg_ret("tftp", ret);
+ ctx->pxe_file_size = *sizep;
return 1;
}
@@ -43,7 +48,7 @@
*
* Returns 1 on success or < 0 on error.
*/
-static int pxe_uuid_path(struct cmd_tbl *cmdtp, unsigned long pxefile_addr_r)
+static int pxe_uuid_path(struct pxe_context *ctx, unsigned long pxefile_addr_r)
{
char *uuid_str;
@@ -52,7 +57,7 @@
if (!uuid_str)
return -ENOENT;
- return get_pxelinux_path(cmdtp, uuid_str, pxefile_addr_r);
+ return get_pxelinux_path(ctx, uuid_str, pxefile_addr_r);
}
/*
@@ -61,7 +66,7 @@
*
* Returns 1 on success or < 0 on error.
*/
-static int pxe_mac_path(struct cmd_tbl *cmdtp, unsigned long pxefile_addr_r)
+static int pxe_mac_path(struct pxe_context *ctx, unsigned long pxefile_addr_r)
{
char mac_str[21];
int err;
@@ -71,7 +76,7 @@
if (err < 0)
return err;
- return get_pxelinux_path(cmdtp, mac_str, pxefile_addr_r);
+ return get_pxelinux_path(ctx, mac_str, pxefile_addr_r);
}
/*
@@ -81,7 +86,7 @@
*
* Returns 1 on success or < 0 on error.
*/
-static int pxe_ipaddr_paths(struct cmd_tbl *cmdtp, unsigned long pxefile_addr_r)
+static int pxe_ipaddr_paths(struct pxe_context *ctx, unsigned long pxefile_addr_r)
{
char ip_addr[9];
int mask_pos, err;
@@ -89,7 +94,7 @@
sprintf(ip_addr, "%08X", ntohl(net_ip.s_addr));
for (mask_pos = 7; mask_pos >= 0; mask_pos--) {
- err = get_pxelinux_path(cmdtp, ip_addr, pxefile_addr_r);
+ err = get_pxelinux_path(ctx, ip_addr, pxefile_addr_r);
if (err > 0)
return err;
@@ -99,6 +104,49 @@
return -ENOENT;
}
+
+int pxe_get(ulong pxefile_addr_r, char **bootdirp, ulong *sizep)
+{
+ struct cmd_tbl cmdtp[] = {}; /* dummy */
+ struct pxe_context ctx;
+ int i;
+
+ if (pxe_setup_ctx(&ctx, cmdtp, do_get_tftp, NULL, false,
+ env_get("bootfile")))
+ return -ENOMEM;
+ /*
+ * Keep trying paths until we successfully get a file we're looking
+ * for.
+ */
+ if (pxe_uuid_path(&ctx, pxefile_addr_r) > 0 ||
+ pxe_mac_path(&ctx, pxefile_addr_r) > 0 ||
+ pxe_ipaddr_paths(&ctx, pxefile_addr_r) > 0)
+ goto done;
+
+ i = 0;
+ while (pxe_default_paths[i]) {
+ if (get_pxelinux_path(&ctx, pxe_default_paths[i],
+ pxefile_addr_r) > 0)
+ goto done;
+ i++;
+ }
+
+ pxe_destroy_ctx(&ctx);
+
+ return -ENOENT;
+done:
+ *bootdirp = env_get("bootfile");
+
+ /*
+ * The PXE file size is returned but not the name. It is probably not
+ * that useful.
+ */
+ *sizep = ctx.pxe_file_size;
+ pxe_destroy_ctx(&ctx);
+
+ return 0;
+}
+
/*
* Entry point for the 'pxe get' command.
* This Follows pxelinux's rules to download a config file from a tftp server.
@@ -117,10 +165,10 @@
do_pxe_get(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
char *pxefile_addr_str;
- unsigned long pxefile_addr_r;
- int err, i = 0;
-
- do_getfile = do_get_tftp;
+ ulong pxefile_addr_r;
+ char *fname;
+ ulong size;
+ int ret;
if (argc != 1)
return CMD_RET_USAGE;
@@ -130,35 +178,25 @@
if (!pxefile_addr_str)
return 1;
- err = strict_strtoul(pxefile_addr_str, 16,
+ ret = strict_strtoul(pxefile_addr_str, 16,
(unsigned long *)&pxefile_addr_r);
- if (err < 0)
+ if (ret < 0)
return 1;
- /*
- * Keep trying paths until we successfully get a file we're looking
- * for.
- */
- if (pxe_uuid_path(cmdtp, pxefile_addr_r) > 0 ||
- pxe_mac_path(cmdtp, pxefile_addr_r) > 0 ||
- pxe_ipaddr_paths(cmdtp, pxefile_addr_r) > 0) {
- printf("Config file found\n");
-
- return 0;
+ ret = pxe_get(pxefile_addr_r, &fname, &size);
+ switch (ret) {
+ case 0:
+ printf("Config file '%s' found\n", fname);
+ break;
+ case -ENOMEM:
+ printf("Out of memory\n");
+ return CMD_RET_FAILURE;
+ default:
+ printf("Config file not found\n");
+ return CMD_RET_FAILURE;
}
- while (pxe_default_paths[i]) {
- if (get_pxelinux_path(cmdtp, pxe_default_paths[i],
- pxefile_addr_r) > 0) {
- printf("Config file found\n");
- return 0;
- }
- i++;
- }
-
- printf("Config file not found\n");
-
- return 1;
+ return 0;
}
/*
@@ -170,10 +208,9 @@
do_pxe_boot(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
unsigned long pxefile_addr_r;
- struct pxe_menu *cfg;
char *pxefile_addr_str;
-
- do_getfile = do_get_tftp;
+ struct pxe_context ctx;
+ int ret;
if (argc == 1) {
pxefile_addr_str = from_env("pxefile_addr_r");
@@ -191,16 +228,15 @@
return 1;
}
- cfg = parse_pxefile(cmdtp, pxefile_addr_r);
-
- if (!cfg) {
- printf("Error parsing config file\n");
- return 1;
+ if (pxe_setup_ctx(&ctx, cmdtp, do_get_tftp, NULL, false,
+ env_get("bootfile"))) {
+ printf("Out of memory\n");
+ return CMD_RET_FAILURE;
}
-
- handle_pxe_menu(cmdtp, cfg);
-
- destroy_pxe_menu(cfg);
+ ret = pxe_process(&ctx, pxefile_addr_r, false);
+ pxe_destroy_ctx(&ctx);
+ if (ret)
+ return CMD_RET_FAILURE;
copy_filename(net_boot_file_name, "", sizeof(net_boot_file_name));
@@ -233,8 +269,6 @@
if (argc < 2)
return CMD_RET_USAGE;
- is_pxe = true;
-
/* drop initial "pxe" arg */
argc--;
argv++;
diff --git a/cmd/pxe_utils.h b/cmd/pxe_utils.h
deleted file mode 100644
index bf58e15..0000000
--- a/cmd/pxe_utils.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-
-#ifndef __PXE_UTILS_H
-#define __PXE_UTILS_H
-
-#include <linux/list.h>
-
-/*
- * A note on the pxe file parser.
- *
- * We're parsing files that use syslinux grammar, which has a few quirks.
- * String literals must be recognized based on context - there is no
- * quoting or escaping support. There's also nothing to explicitly indicate
- * when a label section completes. We deal with that by ending a label
- * section whenever we see a line that doesn't include.
- *
- * As with the syslinux family, this same file format could be reused in the
- * future for non pxe purposes. The only action it takes during parsing that
- * would throw this off is handling of include files. It assumes we're using
- * pxe, and does a tftp download of a file listed as an include file in the
- * middle of the parsing operation. That could be handled by refactoring it to
- * take a 'include file getter' function.
- */
-
-/*
- * Describes a single label given in a pxe file.
- *
- * Create these with the 'label_create' function given below.
- *
- * name - the name of the menu as given on the 'menu label' line.
- * kernel - the path to the kernel file to use for this label.
- * append - kernel command line to use when booting this label
- * initrd - path to the initrd to use for this label.
- * attempted - 0 if we haven't tried to boot this label, 1 if we have.
- * localboot - 1 if this label specified 'localboot', 0 otherwise.
- * list - lets these form a list, which a pxe_menu struct will hold.
- */
-struct pxe_label {
- char num[4];
- char *name;
- char *menu;
- char *kernel;
- char *config;
- char *append;
- char *initrd;
- char *fdt;
- char *fdtdir;
- char *fdtoverlays;
- int ipappend;
- int attempted;
- int localboot;
- int localboot_val;
- struct list_head list;
-};
-
-/*
- * Describes a pxe menu as given via pxe files.
- *
- * title - the name of the menu as given by a 'menu title' line.
- * default_label - the name of the default label, if any.
- * bmp - the bmp file name which is displayed in background
- * timeout - time in tenths of a second to wait for a user key-press before
- * booting the default label.
- * prompt - if 0, don't prompt for a choice unless the timeout period is
- * interrupted. If 1, always prompt for a choice regardless of
- * timeout.
- * labels - a list of labels defined for the menu.
- */
-struct pxe_menu {
- char *title;
- char *default_label;
- char *bmp;
- int timeout;
- int prompt;
- struct list_head labels;
-};
-
-extern bool is_pxe;
-
-extern int (*do_getfile)(struct cmd_tbl *cmdtp, const char *file_path,
- char *file_addr);
-void destroy_pxe_menu(struct pxe_menu *cfg);
-int get_pxe_file(struct cmd_tbl *cmdtp, const char *file_path,
- unsigned long file_addr);
-int get_pxelinux_path(struct cmd_tbl *cmdtp, const char *file,
- unsigned long pxefile_addr_r);
-void handle_pxe_menu(struct cmd_tbl *cmdtp, struct pxe_menu *cfg);
-struct pxe_menu *parse_pxefile(struct cmd_tbl *cmdtp, unsigned long menucfg);
-int format_mac_pxe(char *outbuf, size_t outbuf_len);
-
-#endif /* __PXE_UTILS_H */
diff --git a/cmd/sysboot.c b/cmd/sysboot.c
index af6a2f1..04c0702 100644
--- a/cmd/sysboot.c
+++ b/cmd/sysboot.c
@@ -4,50 +4,42 @@
#include <command.h>
#include <env.h>
#include <fs.h>
-#include "pxe_utils.h"
+#include <pxe_utils.h>
-static char *fs_argv[5];
+/**
+ * struct sysboot_info - useful information for sysboot helpers
+ *
+ * @fstype: Filesystem type (FS_TYPE_...)
+ * @ifname: Interface name (e.g. "ide", "scsi")
+ * @dev_part_str is in the format:
+ * <dev>.<hw_part>:<part> where <dev> is the device number,
+ * <hw_part> is the optional hardware partition number and
+ * <part> is the partition number
+ */
+struct sysboot_info {
+ int fstype;
+ const char *ifname;
+ const char *dev_part_str;
+};
-static int do_get_ext2(struct cmd_tbl *cmdtp, const char *file_path,
- char *file_addr)
+static int sysboot_read_file(struct pxe_context *ctx, const char *file_path,
+ char *file_addr, ulong *sizep)
{
-#ifdef CONFIG_CMD_EXT2
- fs_argv[0] = "ext2load";
- fs_argv[3] = file_addr;
- fs_argv[4] = (void *)file_path;
+ struct sysboot_info *info = ctx->userdata;
+ loff_t len_read;
+ ulong addr;
+ int ret;
- if (!do_ext2load(cmdtp, 0, 5, fs_argv))
- return 1;
-#endif
- return -ENOENT;
-}
+ addr = simple_strtoul(file_addr, NULL, 16);
+ ret = fs_set_blk_dev(info->ifname, info->dev_part_str, info->fstype);
+ if (ret)
+ return ret;
+ ret = fs_read(file_path, addr, 0, 0, &len_read);
+ if (ret)
+ return ret;
+ *sizep = len_read;
-static int do_get_fat(struct cmd_tbl *cmdtp, const char *file_path,
- char *file_addr)
-{
-#ifdef CONFIG_CMD_FAT
- fs_argv[0] = "fatload";
- fs_argv[3] = file_addr;
- fs_argv[4] = (void *)file_path;
-
- if (!do_fat_fsload(cmdtp, 0, 5, fs_argv))
- return 1;
-#endif
- return -ENOENT;
-}
-
-static int do_get_any(struct cmd_tbl *cmdtp, const char *file_path,
- char *file_addr)
-{
-#ifdef CONFIG_CMD_FS_GENERIC
- fs_argv[0] = "load";
- fs_argv[3] = file_addr;
- fs_argv[4] = (void *)file_path;
-
- if (!do_load(cmdtp, 0, 5, fs_argv, FS_TYPE_ANY))
- return 1;
-#endif
- return -ENOENT;
+ return 0;
}
/*
@@ -59,12 +51,12 @@
char *const argv[])
{
unsigned long pxefile_addr_r;
- struct pxe_menu *cfg;
+ struct pxe_context ctx;
char *pxefile_addr_str;
+ struct sysboot_info info;
char *filename;
int prompt = 0;
-
- is_pxe = false;
+ int ret;
if (argc > 1 && strstr(argv[1], "-p")) {
prompt = 1;
@@ -91,41 +83,39 @@
}
if (strstr(argv[3], "ext2")) {
- do_getfile = do_get_ext2;
+ info.fstype = FS_TYPE_EXT;
} else if (strstr(argv[3], "fat")) {
- do_getfile = do_get_fat;
+ info.fstype = FS_TYPE_FAT;
} else if (strstr(argv[3], "any")) {
- do_getfile = do_get_any;
+ info.fstype = FS_TYPE_ANY;
} else {
printf("Invalid filesystem: %s\n", argv[3]);
return 1;
}
- fs_argv[1] = argv[1];
- fs_argv[2] = argv[2];
+ info.ifname = argv[1];
+ info.dev_part_str = argv[2];
if (strict_strtoul(pxefile_addr_str, 16, &pxefile_addr_r) < 0) {
printf("Invalid pxefile address: %s\n", pxefile_addr_str);
return 1;
}
- if (get_pxe_file(cmdtp, filename, pxefile_addr_r) < 0) {
+ if (pxe_setup_ctx(&ctx, cmdtp, sysboot_read_file, &info, true,
+ filename)) {
+ printf("Out of memory\n");
+ return CMD_RET_FAILURE;
+ }
+
+ if (get_pxe_file(&ctx, filename, pxefile_addr_r) < 0) {
printf("Error reading config file\n");
+ pxe_destroy_ctx(&ctx);
return 1;
}
- cfg = parse_pxefile(cmdtp, pxefile_addr_r);
-
- if (!cfg) {
- printf("Error parsing config file\n");
- return 1;
- }
-
- if (prompt)
- cfg->prompt = 1;
-
- handle_pxe_menu(cmdtp, cfg);
-
- destroy_pxe_menu(cfg);
+ ret = pxe_process(&ctx, pxefile_addr_r, prompt);
+ pxe_destroy_ctx(&ctx);
+ if (ret)
+ return CMD_RET_FAILURE;
return 0;
}
diff --git a/common/Kconfig b/common/Kconfig
index d6f77ab..fdcf453 100644
--- a/common/Kconfig
+++ b/common/Kconfig
@@ -1,5 +1,3 @@
-source "common/Kconfig.boot"
-
menu "Console"
config MENU
diff --git a/common/Makefile b/common/Makefile
index e783902..c500bcd 100644
--- a/common/Makefile
+++ b/common/Makefile
@@ -11,21 +11,12 @@
obj-$(CONFIG_HUSH_PARSER) += cli_hush.o
obj-$(CONFIG_AUTOBOOT) += autoboot.o
-# This option is not just y/n - it can have a numeric value
-ifdef CONFIG_BOOT_RETRY_TIME
-obj-y += bootretry.o
-endif
-
# # boards
obj-y += board_f.o
obj-y += board_r.o
obj-$(CONFIG_DISPLAY_BOARDINFO) += board_info.o
obj-$(CONFIG_DISPLAY_BOARDINFO_LATE) += board_info.o
-obj-$(CONFIG_CMD_BOOTM) += bootm.o bootm_os.o
-obj-$(CONFIG_CMD_BOOTZ) += bootm.o bootm_os.o
-obj-$(CONFIG_CMD_BOOTI) += bootm.o bootm_os.o
-
obj-$(CONFIG_CMD_BEDBUG) += bedbug.o
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
obj-$(CONFIG_MII) += miiphyutil.o
@@ -50,7 +41,6 @@
endif
obj-$(CONFIG_LCD_ROTATION) += lcd_console_rotation.o
obj-$(CONFIG_LCD_DT_SIMPLEFB) += lcd_simplefb.o
-obj-$(CONFIG_LYNXKDI) += lynxkdi.o
obj-$(CONFIG_MENU) += menu.o
obj-$(CONFIG_UPDATE_COMMON) += update.o
obj-$(CONFIG_USB_KEYBOARD) += usb_kbd.o
@@ -65,7 +55,6 @@
ifdef CONFIG_SPL_DFU
obj-$(CONFIG_DFU_OVER_USB) += dfu.o
endif
-obj-$(CONFIG_SPL_LOAD_FIT) += common_fit.o
obj-$(CONFIG_SPL_NET) += miiphyutil.o
obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += fdt_support.o
@@ -101,23 +90,11 @@
endif
endif
-obj-y += image.o image-board.o
obj-$(CONFIG_$(SPL_TPL_)HASH) += hash.o
-obj-$(CONFIG_ANDROID_AB) += android_ab.o
-obj-$(CONFIG_ANDROID_BOOT_IMAGE) += image-android.o image-android-dt.o
-obj-$(CONFIG_$(SPL_TPL_)OF_LIBFDT) += image-fdt.o
-obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += fdt_region.o
-obj-$(CONFIG_$(SPL_TPL_)FIT) += image-fit.o
-obj-$(CONFIG_$(SPL_)MULTI_DTB_FIT) += boot_fit.o common_fit.o
-obj-$(CONFIG_$(SPL_TPL_)IMAGE_SIGN_INFO) += image-sig.o
-obj-$(CONFIG_$(SPL_TPL_)FIT_SIGNATURE) += image-fit-sig.o
-obj-$(CONFIG_$(SPL_TPL_)FIT_CIPHER) += image-cipher.o
obj-$(CONFIG_IO_TRACE) += iotrace.o
obj-y += memsize.o
obj-y += stdio.o
-obj-$(CONFIG_CMD_ADTIMG) += image-android-dt.o
-
ifdef CONFIG_CMD_EEPROM_LAYOUT
obj-y += eeprom/eeprom_field.o eeprom/eeprom_layout.o
endif
diff --git a/common/lynxkdi.c b/common/lynxkdi.c
deleted file mode 100644
index 1c8e122..0000000
--- a/common/lynxkdi.c
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * Copyright (c) Orbacom Systems, Inc <www.orbacom.com>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms are freely
- * permitted provided that the above copyright notice and this
- * paragraph and the following disclaimer are duplicated in all
- * such forms.
- *
- * This software is provided "AS IS" and without any express or
- * implied warranties, including, without limitation, the implied
- * warranties of merchantability and fitness for a particular
- * purpose.
- */
-
-#include <common.h>
-#include <asm/processor.h>
-#include <image.h>
-#include <net.h>
-
-#include <lynxkdi.h>
-
-#error "Lynx KDI support not implemented for configured CPU"
diff --git a/configs/P2041RDB_NAND_defconfig b/configs/P2041RDB_NAND_defconfig
index 3f0e512..63a15ce 100644
--- a/configs/P2041RDB_NAND_defconfig
+++ b/configs/P2041RDB_NAND_defconfig
@@ -62,6 +62,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x100000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
diff --git a/configs/P2041RDB_SDCARD_defconfig b/configs/P2041RDB_SDCARD_defconfig
index 6ef758d..eb97360 100644
--- a/configs/P2041RDB_SDCARD_defconfig
+++ b/configs/P2041RDB_SDCARD_defconfig
@@ -61,6 +61,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xD2000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
diff --git a/configs/P2041RDB_SPIFLASH_defconfig b/configs/P2041RDB_SPIFLASH_defconfig
index e9b9983..1937110 100644
--- a/configs/P2041RDB_SPIFLASH_defconfig
+++ b/configs/P2041RDB_SPIFLASH_defconfig
@@ -62,6 +62,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
diff --git a/configs/P2041RDB_defconfig b/configs/P2041RDB_defconfig
index f8ce5ee..7b430f6 100644
--- a/configs/P2041RDB_defconfig
+++ b/configs/P2041RDB_defconfig
@@ -57,6 +57,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
diff --git a/configs/P3041DS_NAND_defconfig b/configs/P3041DS_NAND_defconfig
index 129ba3d..96a6161 100644
--- a/configs/P3041DS_NAND_defconfig
+++ b/configs/P3041DS_NAND_defconfig
@@ -60,6 +60,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x100000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P3041DS_SDCARD_defconfig b/configs/P3041DS_SDCARD_defconfig
index 059df80..49a30dd 100644
--- a/configs/P3041DS_SDCARD_defconfig
+++ b/configs/P3041DS_SDCARD_defconfig
@@ -59,6 +59,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xD2000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P3041DS_SPIFLASH_defconfig b/configs/P3041DS_SPIFLASH_defconfig
index 592eb87..047d65b 100644
--- a/configs/P3041DS_SPIFLASH_defconfig
+++ b/configs/P3041DS_SPIFLASH_defconfig
@@ -60,6 +60,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P3041DS_defconfig b/configs/P3041DS_defconfig
index 7b030eb..821a7c3 100644
--- a/configs/P3041DS_defconfig
+++ b/configs/P3041DS_defconfig
@@ -55,6 +55,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
index 11b807b..9186ed1 100644
--- a/configs/P4080DS_SDCARD_defconfig
+++ b/configs/P4080DS_SDCARD_defconfig
@@ -58,6 +58,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xD2000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
index cbd8301..2a4dc5d 100644
--- a/configs/P4080DS_SPIFLASH_defconfig
+++ b/configs/P4080DS_SPIFLASH_defconfig
@@ -59,6 +59,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P4080DS_defconfig b/configs/P4080DS_defconfig
index d4c3e65..564f28c 100644
--- a/configs/P4080DS_defconfig
+++ b/configs/P4080DS_defconfig
@@ -54,6 +54,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P5040DS_NAND_defconfig b/configs/P5040DS_NAND_defconfig
index 025293a..370eb23 100644
--- a/configs/P5040DS_NAND_defconfig
+++ b/configs/P5040DS_NAND_defconfig
@@ -61,6 +61,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x100000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P5040DS_SDCARD_defconfig b/configs/P5040DS_SDCARD_defconfig
index a67ba41..8e0d332 100644
--- a/configs/P5040DS_SDCARD_defconfig
+++ b/configs/P5040DS_SDCARD_defconfig
@@ -59,6 +59,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xD2000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P5040DS_SPIFLASH_defconfig b/configs/P5040DS_SPIFLASH_defconfig
index 4e1565b..172f5ed 100644
--- a/configs/P5040DS_SPIFLASH_defconfig
+++ b/configs/P5040DS_SPIFLASH_defconfig
@@ -60,6 +60,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/P5040DS_defconfig b/configs/P5040DS_defconfig
index 27fc797..79c6e46 100644
--- a/configs/P5040DS_defconfig
+++ b/configs/P5040DS_defconfig
@@ -55,6 +55,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/SBx81LIFKW_defconfig b/configs/SBx81LIFKW_defconfig
index b0903d6..8988ed9 100644
--- a/configs/SBx81LIFKW_defconfig
+++ b/configs/SBx81LIFKW_defconfig
@@ -26,6 +26,7 @@
CONFIG_CMD_MII=y
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
+CONFIG_DOS_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -57,3 +58,4 @@
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
+CONFIG_MD5=y
diff --git a/configs/SBx81LIFXCAT_defconfig b/configs/SBx81LIFXCAT_defconfig
index c6629bc..cd491c4 100644
--- a/configs/SBx81LIFXCAT_defconfig
+++ b/configs/SBx81LIFXCAT_defconfig
@@ -28,6 +28,7 @@
CONFIG_CMD_PING=y
CONFIG_CMD_SNTP=y
# CONFIG_CMD_LED is not set
+CONFIG_DOS_PARTITION=y
CONFIG_OF_CONTROL=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -59,3 +60,4 @@
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_KIRKWOOD_SPI=y
+CONFIG_MD5=y
diff --git a/configs/T1024RDB_NAND_defconfig b/configs/T1024RDB_NAND_defconfig
index f1d7b6b..5e7116e 100644
--- a/configs/T1024RDB_NAND_defconfig
+++ b/configs/T1024RDB_NAND_defconfig
@@ -94,6 +94,7 @@
CONFIG_FMAN_ENET=y
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0x200000
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T1024RDB_SDCARD_defconfig b/configs/T1024RDB_SDCARD_defconfig
index ddb52dd..e5b129e 100644
--- a/configs/T1024RDB_SDCARD_defconfig
+++ b/configs/T1024RDB_SDCARD_defconfig
@@ -88,8 +88,10 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x104000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0x124000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T1024RDB_SPIFLASH_defconfig b/configs/T1024RDB_SPIFLASH_defconfig
index da0a9d5..bea7159 100644
--- a/configs/T1024RDB_SPIFLASH_defconfig
+++ b/configs/T1024RDB_SPIFLASH_defconfig
@@ -90,8 +90,10 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0x130000
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T1024RDB_defconfig b/configs/T1024RDB_defconfig
index c9cf187..3ed1c6d 100644
--- a/configs/T1024RDB_defconfig
+++ b/configs/T1024RDB_defconfig
@@ -73,8 +73,10 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0xEFE00000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T1042D4RDB_NAND_defconfig b/configs/T1042D4RDB_NAND_defconfig
index 962a3f4..c447fef 100644
--- a/configs/T1042D4RDB_NAND_defconfig
+++ b/configs/T1042D4RDB_NAND_defconfig
@@ -87,8 +87,10 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x280000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0x380000
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T1042D4RDB_SDCARD_defconfig b/configs/T1042D4RDB_SDCARD_defconfig
index 7b0289f..92037c5 100644
--- a/configs/T1042D4RDB_SDCARD_defconfig
+++ b/configs/T1042D4RDB_SDCARD_defconfig
@@ -83,6 +83,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x10400
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
diff --git a/configs/T1042D4RDB_SPIFLASH_defconfig b/configs/T1042D4RDB_SPIFLASH_defconfig
index 71a39c2..37b5fae 100644
--- a/configs/T1042D4RDB_SPIFLASH_defconfig
+++ b/configs/T1042D4RDB_SPIFLASH_defconfig
@@ -85,8 +85,10 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0x130000
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T1042D4RDB_defconfig b/configs/T1042D4RDB_defconfig
index 12f1349..f1ec400 100644
--- a/configs/T1042D4RDB_defconfig
+++ b/configs/T1042D4RDB_defconfig
@@ -68,8 +68,10 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
+CONFIG_SYS_QE_FW_ADDR=0xEFF10000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_RTC=y
CONFIG_SYS_NS16550=y
diff --git a/configs/T2080QDS_NAND_defconfig b/configs/T2080QDS_NAND_defconfig
index 695b047..c39329b 100644
--- a/configs/T2080QDS_NAND_defconfig
+++ b/configs/T2080QDS_NAND_defconfig
@@ -86,6 +86,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x160000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080QDS_SDCARD_defconfig b/configs/T2080QDS_SDCARD_defconfig
index 6fc5f01..1075acf 100644
--- a/configs/T2080QDS_SDCARD_defconfig
+++ b/configs/T2080QDS_SDCARD_defconfig
@@ -82,6 +82,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x104000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080QDS_SECURE_BOOT_defconfig b/configs/T2080QDS_SECURE_BOOT_defconfig
index c303433..b761a1f 100644
--- a/configs/T2080QDS_SECURE_BOOT_defconfig
+++ b/configs/T2080QDS_SECURE_BOOT_defconfig
@@ -66,6 +66,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080QDS_SPIFLASH_defconfig b/configs/T2080QDS_SPIFLASH_defconfig
index cb459ec..11a0ed4 100644
--- a/configs/T2080QDS_SPIFLASH_defconfig
+++ b/configs/T2080QDS_SPIFLASH_defconfig
@@ -84,6 +84,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
index 1dc5cf8..e3ff926 100644
--- a/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
+++ b/configs/T2080QDS_SRIO_PCIE_BOOT_defconfig
@@ -59,6 +59,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xFFE00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080QDS_defconfig b/configs/T2080QDS_defconfig
index 00cd009..d76547a 100644
--- a/configs/T2080QDS_defconfig
+++ b/configs/T2080QDS_defconfig
@@ -67,6 +67,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080RDB_NAND_defconfig b/configs/T2080RDB_NAND_defconfig
index f19df03..88f29f4 100644
--- a/configs/T2080RDB_NAND_defconfig
+++ b/configs/T2080RDB_NAND_defconfig
@@ -93,6 +93,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x180000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_NAND=y
diff --git a/configs/T2080RDB_SDCARD_defconfig b/configs/T2080RDB_SDCARD_defconfig
index b8656ef..07de4bc 100644
--- a/configs/T2080RDB_SDCARD_defconfig
+++ b/configs/T2080RDB_SDCARD_defconfig
@@ -89,6 +89,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x104000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
diff --git a/configs/T2080RDB_SPIFLASH_defconfig b/configs/T2080RDB_SPIFLASH_defconfig
index b0d5e25..ea43361 100644
--- a/configs/T2080RDB_SPIFLASH_defconfig
+++ b/configs/T2080RDB_SPIFLASH_defconfig
@@ -91,6 +91,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_PCIE_FSL=y
CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH=y
diff --git a/configs/T2080RDB_revD_NAND_defconfig b/configs/T2080RDB_revD_NAND_defconfig
index ae1b4ed..ed7cf4f 100644
--- a/configs/T2080RDB_revD_NAND_defconfig
+++ b/configs/T2080RDB_revD_NAND_defconfig
@@ -94,6 +94,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x180000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080RDB_revD_SDCARD_defconfig b/configs/T2080RDB_revD_SDCARD_defconfig
index 1c42f54..0e80031 100644
--- a/configs/T2080RDB_revD_SDCARD_defconfig
+++ b/configs/T2080RDB_revD_SDCARD_defconfig
@@ -90,6 +90,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x104000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080RDB_revD_SPIFLASH_defconfig b/configs/T2080RDB_revD_SPIFLASH_defconfig
index a03b211..00b19f5 100644
--- a/configs/T2080RDB_revD_SPIFLASH_defconfig
+++ b/configs/T2080RDB_revD_SPIFLASH_defconfig
@@ -92,6 +92,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x110000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T2080RDB_revD_defconfig b/configs/T2080RDB_revD_defconfig
index 569efe9..f8f459f 100644
--- a/configs/T2080RDB_revD_defconfig
+++ b/configs/T2080RDB_revD_defconfig
@@ -74,6 +74,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T4240RDB_SDCARD_defconfig b/configs/T4240RDB_SDCARD_defconfig
index ea71242..bfd913a 100644
--- a/configs/T4240RDB_SDCARD_defconfig
+++ b/configs/T4240RDB_SDCARD_defconfig
@@ -76,6 +76,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x104000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/T4240RDB_defconfig b/configs/T4240RDB_defconfig
index 3a28c2a..c66b152 100644
--- a/configs/T4240RDB_defconfig
+++ b/configs/T4240RDB_defconfig
@@ -61,6 +61,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xEFF00000
CONFIG_MII=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_FSL=y
diff --git a/configs/axm_defconfig b/configs/axm_defconfig
index 78449a5..518e6d4 100644
--- a/configs/axm_defconfig
+++ b/configs/axm_defconfig
@@ -81,7 +81,7 @@
CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
+CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig
index 39a83fa..257d810 100644
--- a/configs/bcm7260_defconfig
+++ b/configs/bcm7260_defconfig
@@ -25,6 +25,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_DOS_PARTITION=y
CONFIG_OF_BOARD=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig
index 9e24005..9ffa436 100644
--- a/configs/bcm7445_defconfig
+++ b/configs/bcm7445_defconfig
@@ -26,6 +26,7 @@
CONFIG_CMD_EXT2=y
CONFIG_CMD_EXT4=y
CONFIG_CMD_FS_GENERIC=y
+CONFIG_DOS_PARTITION=y
CONFIG_OF_BOARD=y
CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
diff --git a/configs/brppt2_defconfig b/configs/brppt2_defconfig
index 3f5467c..ddcf8ee 100644
--- a/configs/brppt2_defconfig
+++ b/configs/brppt2_defconfig
@@ -85,6 +85,7 @@
CONFIG_PHYLIB=y
CONFIG_PHY_FIXED=y
CONFIG_FEC_MXC=y
+CONFIG_MII=y
CONFIG_DM_REGULATOR=y
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
diff --git a/configs/cgtqmx8_defconfig b/configs/cgtqmx8_defconfig
index 3d1c438..f69b566 100644
--- a/configs/cgtqmx8_defconfig
+++ b/configs/cgtqmx8_defconfig
@@ -45,6 +45,7 @@
CONFIG_CMD_CACHE=y
CONFIG_CMD_FAT=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_MMC_ENV_DEV=1
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
diff --git a/configs/ci20_mmc_defconfig b/configs/ci20_mmc_defconfig
index aa2d087..3c45520 100644
--- a/configs/ci20_mmc_defconfig
+++ b/configs/ci20_mmc_defconfig
@@ -19,6 +19,7 @@
CONFIG_BOOTARGS="console=ttyS4,115200 rw rootwait root=/dev/mmcblk0p1"
CONFIG_USE_BOOTCOMMAND=y
CONFIG_BOOTCOMMAND="ext4load mmc 0:1 0x88000000 /boot/uImage; bootm 0x88000000"
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
CONFIG_DISPLAY_CPUINFO=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_MISC_INIT_R=y
diff --git a/configs/clearfog_gt_8k_defconfig b/configs/clearfog_gt_8k_defconfig
index 082ced9..6e344c9 100644
--- a/configs/clearfog_gt_8k_defconfig
+++ b/configs/clearfog_gt_8k_defconfig
@@ -54,6 +54,7 @@
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
CONFIG_MVPP2=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/cortina_presidio-asic-base_defconfig b/configs/cortina_presidio-asic-base_defconfig
index 947cfa2..426c338 100644
--- a/configs/cortina_presidio-asic-base_defconfig
+++ b/configs/cortina_presidio-asic-base_defconfig
@@ -14,6 +14,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
CONFIG_SYS_PROMPT="G3#"
CONFIG_CMD_WDT=y
CONFIG_CMD_CACHE=y
diff --git a/configs/cortina_presidio-asic-emmc_defconfig b/configs/cortina_presidio-asic-emmc_defconfig
index 9d5921a..a96e251 100644
--- a/configs/cortina_presidio-asic-emmc_defconfig
+++ b/configs/cortina_presidio-asic-emmc_defconfig
@@ -12,6 +12,7 @@
CONFIG_SHOW_BOOT_PROGRESS=y
CONFIG_BOOTDELAY=3
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
CONFIG_SYS_PROMPT="G3#"
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
diff --git a/configs/cortina_presidio-asic-pnand_defconfig b/configs/cortina_presidio-asic-pnand_defconfig
index eb15b379..8694750 100644
--- a/configs/cortina_presidio-asic-pnand_defconfig
+++ b/configs/cortina_presidio-asic-pnand_defconfig
@@ -14,6 +14,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="earlycon=serial,0xf4329148 console=ttyS0,115200 root=/dev/ram0"
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
CONFIG_SYS_PROMPT="G3#"
CONFIG_CMD_MTD=y
CONFIG_CMD_WDT=y
diff --git a/configs/corvus_defconfig b/configs/corvus_defconfig
index a3f144d..2f3803a 100644
--- a/configs/corvus_defconfig
+++ b/configs/corvus_defconfig
@@ -67,7 +67,7 @@
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
-CONFIG_PHYLIB=y
+CONFIG_MACB=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/configs/ethernut5_defconfig b/configs/ethernut5_defconfig
index 0faeb63..1cf38b8 100644
--- a/configs/ethernut5_defconfig
+++ b/configs/ethernut5_defconfig
@@ -34,6 +34,7 @@
CONFIG_CMD_DHCP=y
CONFIG_CMD_RARP=y
CONFIG_CMD_MII=y
+# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_CDP=y
CONFIG_CMD_SNTP=y
@@ -69,6 +70,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_RTC_PCF8563=y
diff --git a/configs/gurnard_defconfig b/configs/gurnard_defconfig
index 35a2d2e..7c7974c 100644
--- a/configs/gurnard_defconfig
+++ b/configs/gurnard_defconfig
@@ -43,7 +43,7 @@
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
CONFIG_ATMEL_NAND_HWECC=y
-CONFIG_PHYLIB=y
+CONFIG_MACB=y
CONFIG_ATMEL_USART=y
CONFIG_TIMER=y
CONFIG_ATMEL_PIT_TIMER=y
diff --git a/configs/gwventana_emmc_defconfig b/configs/gwventana_emmc_defconfig
index 8d67d3f..3c94c0a 100644
--- a/configs/gwventana_emmc_defconfig
+++ b/configs/gwventana_emmc_defconfig
@@ -145,6 +145,7 @@
# CONFIG_VIDEO_ANSI is not set
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_PANEL is not set
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/gwventana_gw5904_defconfig b/configs/gwventana_gw5904_defconfig
index b1f8c9e..3309c65 100644
--- a/configs/gwventana_gw5904_defconfig
+++ b/configs/gwventana_gw5904_defconfig
@@ -149,6 +149,7 @@
# CONFIG_VIDEO_ANSI is not set
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_PANEL is not set
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/gwventana_nand_defconfig b/configs/gwventana_nand_defconfig
index 9e388b4..b64d4ae 100644
--- a/configs/gwventana_nand_defconfig
+++ b/configs/gwventana_nand_defconfig
@@ -153,6 +153,7 @@
# CONFIG_VIDEO_ANSI is not set
CONFIG_SYS_WHITE_ON_BLACK=y
# CONFIG_PANEL is not set
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/imx6q_logic_defconfig b/configs/imx6q_logic_defconfig
index 91394a5..96736f9 100644
--- a/configs/imx6q_logic_defconfig
+++ b/configs/imx6q_logic_defconfig
@@ -74,6 +74,10 @@
CONFIG_PCF8575_GPIO=y
CONFIG_LED=y
CONFIG_LED_GPIO=y
+CONFIG_MISC=y
+CONFIG_I2C_EEPROM=y
+CONFIG_SYS_I2C_EEPROM_ADDR=0x0
+CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW=0x0
CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
diff --git a/configs/imx8mm-cl-iot-gate-optee_defconfig b/configs/imx8mm-cl-iot-gate-optee_defconfig
index 79d4821..29d0601 100644
--- a/configs/imx8mm-cl-iot-gate-optee_defconfig
+++ b/configs/imx8mm-cl-iot-gate-optee_defconfig
@@ -81,7 +81,7 @@
CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8mm-cl-iot-gate_defconfig b/configs/imx8mm-cl-iot-gate_defconfig
index f6c647b..7284891 100644
--- a/configs/imx8mm-cl-iot-gate_defconfig
+++ b/configs/imx8mm-cl-iot-gate_defconfig
@@ -84,7 +84,7 @@
CONFIG_DM_KEYBOARD=y
CONFIG_SUPPORT_EMMC_RPMB=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_DM_SPI_FLASH=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8mm_evk_defconfig b/configs/imx8mm_evk_defconfig
index d23d3d5..d03bba7 100644
--- a/configs/imx8mm_evk_defconfig
+++ b/configs/imx8mm_evk_defconfig
@@ -60,7 +60,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
diff --git a/configs/imx8mn_beacon_2g_defconfig b/configs/imx8mn_beacon_2g_defconfig
index 61ab07e..5f116b7 100644
--- a/configs/imx8mn_beacon_2g_defconfig
+++ b/configs/imx8mn_beacon_2g_defconfig
@@ -61,6 +61,7 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent interrupts"
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
diff --git a/configs/imx8mn_beacon_defconfig b/configs/imx8mn_beacon_defconfig
index 3f5e23f..52c7a7e 100644
--- a/configs/imx8mn_beacon_defconfig
+++ b/configs/imx8mn_beacon_defconfig
@@ -61,6 +61,7 @@
CONFIG_OF_CONTROL=y
CONFIG_SPL_OF_CONTROL=y
CONFIG_OF_SPL_REMOVE_PROPS="interrupt-parent interrupts"
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SYS_MMC_ENV_DEV=2
diff --git a/configs/imx8mn_ddr4_evk_defconfig b/configs/imx8mn_ddr4_evk_defconfig
index 740d4e8..8a0b85a 100644
--- a/configs/imx8mn_ddr4_evk_defconfig
+++ b/configs/imx8mn_ddr4_evk_defconfig
@@ -63,7 +63,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
diff --git a/configs/imx8mn_evk_defconfig b/configs/imx8mn_evk_defconfig
index 37ce46e..3ee15d3 100644
--- a/configs/imx8mn_evk_defconfig
+++ b/configs/imx8mn_evk_defconfig
@@ -65,7 +65,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
CONFIG_PINCTRL=y
diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig
index 3bbadc3..a448734 100644
--- a/configs/imx8mp_evk_defconfig
+++ b/configs/imx8mp_evk_defconfig
@@ -71,7 +71,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHY_REALTEK=y
CONFIG_DM_ETH=y
CONFIG_DM_ETH_PHY=y
diff --git a/configs/imx8mq_cm_defconfig b/configs/imx8mq_cm_defconfig
index cf01e8d..907b1d2 100644
--- a/configs/imx8mq_cm_defconfig
+++ b/configs/imx8mq_cm_defconfig
@@ -17,6 +17,7 @@
CONFIG_SPL_MMC=y
CONFIG_SPL_SERIAL=y
CONFIG_SPL=y
+CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
diff --git a/configs/imx8mq_evk_defconfig b/configs/imx8mq_evk_defconfig
index b0af412..92aae70 100644
--- a/configs/imx8mq_evk_defconfig
+++ b/configs/imx8mq_evk_defconfig
@@ -18,6 +18,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_IMX_BOOTAUX=y
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
@@ -30,6 +31,7 @@
CONFIG_SPL_I2C=y
CONFIG_SPL_POWER=y
CONFIG_SPL_WATCHDOG=y
+CONFIG_SYS_PROMPT="u-boot=> "
# CONFIG_BOOTM_NETBSD is not set
# CONFIG_CMD_EXPORTENV is not set
# CONFIG_CMD_IMPORTENV is not set
@@ -56,7 +58,9 @@
CONFIG_PHYLIB=y
CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
+CONFIG_MII=y
CONFIG_PHY=y
CONFIG_PHY_IMX8MQ_USB=y
CONFIG_PINCTRL=y
diff --git a/configs/imx8mq_phanbell_defconfig b/configs/imx8mq_phanbell_defconfig
index 3de517c..72ff17f 100644
--- a/configs/imx8mq_phanbell_defconfig
+++ b/configs/imx8mq_phanbell_defconfig
@@ -19,6 +19,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
@@ -58,8 +59,11 @@
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
+CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y
diff --git a/configs/imx8qm_rom7720_a1_4G_defconfig b/configs/imx8qm_rom7720_a1_4G_defconfig
index e944e69..fb43fa1 100644
--- a/configs/imx8qm_rom7720_a1_4G_defconfig
+++ b/configs/imx8qm_rom7720_a1_4G_defconfig
@@ -60,7 +60,7 @@
CONFIG_I2C_MUX_PCA954x=y
CONFIG_MISC=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_ATHEROS=y
diff --git a/configs/imx8ulp_evk_defconfig b/configs/imx8ulp_evk_defconfig
index b8f18c0..129931f 100644
--- a/configs/imx8ulp_evk_defconfig
+++ b/configs/imx8ulp_evk_defconfig
@@ -41,6 +41,7 @@
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_SPL_OF_CONTROL=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_MMC=y
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
CONFIG_NET_RANDOM_ETHADDR=y
diff --git a/configs/iot2050_defconfig b/configs/iot2050_defconfig
index 9a68708..4a87a33 100644
--- a/configs/iot2050_defconfig
+++ b/configs/iot2050_defconfig
@@ -27,6 +27,8 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_OF_BOARD_SETUP=y
CONFIG_BOOTSTAGE=y
+CONFIG_SHOW_BOOT_PROGRESS=y
+CONFIG_SPL_SHOW_BOOT_PROGRESS=y
CONFIG_CONSOLE_MUX=y
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_SPL_BOARD_INIT=y
diff --git a/configs/kmcent2_defconfig b/configs/kmcent2_defconfig
index 66262d5..9361e81 100644
--- a/configs/kmcent2_defconfig
+++ b/configs/kmcent2_defconfig
@@ -17,6 +17,7 @@
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_BOARD_EARLY_INIT_R=y
CONFIG_LAST_STAGE_INIT=y
+CONFIG_MISC_INIT_F=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_DM=y
CONFIG_CMD_I2C=y
@@ -69,11 +70,13 @@
CONFIG_DM_MDIO=y
CONFIG_PHY_GIGE=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0xE8020000
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_PCI_REGION_MULTI_ENTRY=y
CONFIG_PCIE_FSL=y
CONFIG_U_QE=y
+CONFIG_SYS_QE_FW_ADDR=0xE8040000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
diff --git a/configs/kmtegr1_defconfig b/configs/kmtegr1_defconfig
index 315ba86..b683d37 100644
--- a/configs/kmtegr1_defconfig
+++ b/configs/kmtegr1_defconfig
@@ -178,6 +178,7 @@
# CONFIG_PCI is not set
# CONFIG_PINCTRL_FULL is not set
CONFIG_QE=y
+CONFIG_SYS_QE_FW_ADDR=0xF00C0000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_BCH=y
diff --git a/configs/kontron-sl-mx8mm_defconfig b/configs/kontron-sl-mx8mm_defconfig
index 5baf5bb..d856703 100644
--- a/configs/kontron-sl-mx8mm_defconfig
+++ b/configs/kontron-sl-mx8mm_defconfig
@@ -79,7 +79,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/kontron_sl28_defconfig b/configs/kontron_sl28_defconfig
index 90e595f..31a1083 100644
--- a/configs/kontron_sl28_defconfig
+++ b/configs/kontron_sl28_defconfig
@@ -39,12 +39,14 @@
CONFIG_CMD_ASKENV=y
CONFIG_CMD_GREPENV=y
CONFIG_CMD_NVEDIT_EFI=y
+CONFIG_CMD_DFU=y
CONFIG_CMD_DM=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_EFIDEBUG=y
CONFIG_CMD_RNG=y
@@ -64,6 +66,8 @@
CONFIG_SYS_FSL_DDR3=y
CONFIG_DDR_ECC=y
CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y
+CONFIG_DFU_MMC=y
+CONFIG_DFU_SF=y
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
CONFIG_I2C_MUX=y
CONFIG_MMC_HS400_SUPPORT=y
@@ -90,7 +94,17 @@
CONFIG_NXP_FSPI=y
CONFIG_USB=y
# CONFIG_SPL_DM_USB is not set
+CONFIG_DM_USB_GADGET=y
CONFIG_USB_XHCI_HCD=y
-CONFIG_USB_XHCI_DWC3=y
+# CONFIG_USB_XHCI_FSL is not set
+CONFIG_USB_DWC3=y
+CONFIG_USB_DWC3_LAYERSCAPE=y
+CONFIG_USB_GADGET=y
+CONFIG_USB_GADGET_DOWNLOAD=y
CONFIG_OF_LIBFDT_ASSUME_MASK=0x0
CONFIG_OF_LIBFDT_OVERLAY=y
+CONFIG_EFI_SET_TIME=y
+CONFIG_EFI_RUNTIME_UPDATE_CAPSULE=y
+CONFIG_EFI_CAPSULE_ON_DISK=y
+CONFIG_EFI_IGNORE_OSINDICATIONS=y
+CONFIG_EFI_CAPSULE_FIRMWARE_FIT=y
diff --git a/configs/ls1021aiot_sdcard_defconfig b/configs/ls1021aiot_sdcard_defconfig
index 8456e98..f25c9c7 100644
--- a/configs/ls1021aiot_sdcard_defconfig
+++ b/configs/ls1021aiot_sdcard_defconfig
@@ -70,6 +70,7 @@
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0xf40000
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1021aqds_ddr4_nor_defconfig b/configs/ls1021aqds_ddr4_nor_defconfig
index 7d4cdb8..8571ca3 100644
--- a/configs/ls1021aqds_ddr4_nor_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_defconfig
@@ -76,6 +76,7 @@
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
diff --git a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
index b8c5997..ff27477 100644
--- a/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_ddr4_nor_lpuart_defconfig
@@ -77,6 +77,7 @@
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
index 5168dfe..725e2f4 100644
--- a/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021aqds_nor_SECURE_BOOT_defconfig
@@ -75,6 +75,7 @@
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/ls1021aqds_nor_defconfig b/configs/ls1021aqds_nor_defconfig
index acd01cc..3a2fe03 100644
--- a/configs/ls1021aqds_nor_defconfig
+++ b/configs/ls1021aqds_nor_defconfig
@@ -77,6 +77,7 @@
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
diff --git a/configs/ls1021aqds_nor_lpuart_defconfig b/configs/ls1021aqds_nor_lpuart_defconfig
index 0b54804..6a0523b 100644
--- a/configs/ls1021aqds_nor_lpuart_defconfig
+++ b/configs/ls1021aqds_nor_lpuart_defconfig
@@ -78,6 +78,7 @@
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
index db27f3b..3bd0e1d 100644
--- a/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_nor_SECURE_BOOT_defconfig
@@ -63,6 +63,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_USB=y
diff --git a/configs/ls1021atwr_nor_defconfig b/configs/ls1021atwr_nor_defconfig
index 8f55d67..548ec89 100644
--- a/configs/ls1021atwr_nor_defconfig
+++ b/configs/ls1021atwr_nor_defconfig
@@ -65,6 +65,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
diff --git a/configs/ls1021atwr_nor_lpuart_defconfig b/configs/ls1021atwr_nor_lpuart_defconfig
index 73174ea..f7ccb4b 100644
--- a/configs/ls1021atwr_nor_lpuart_defconfig
+++ b/configs/ls1021atwr_nor_lpuart_defconfig
@@ -67,6 +67,7 @@
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
CONFIG_FSL_LPUART=y
diff --git a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
index 7ef099d..404b33f 100644
--- a/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
+++ b/configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig
@@ -83,6 +83,7 @@
CONFIG_TSEC_ENET=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_NS16550=y
CONFIG_USB=y
CONFIG_USB_XHCI_HCD=y
diff --git a/configs/ls1028aqds_tfa_lpuart_defconfig b/configs/ls1028aqds_tfa_lpuart_defconfig
index d3a69c7..0a76166 100644
--- a/configs/ls1028aqds_tfa_lpuart_defconfig
+++ b/configs/ls1028aqds_tfa_lpuart_defconfig
@@ -67,6 +67,7 @@
CONFIG_PHY_AQUANTIA=y
CONFIG_PHY_ATHEROS=y
CONFIG_PHY_VITESSE=y
+CONFIG_PHY_FIXED=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
diff --git a/configs/ls1043aqds_defconfig b/configs/ls1043aqds_defconfig
index 051edb0..d6d64de 100644
--- a/configs/ls1043aqds_defconfig
+++ b/configs/ls1043aqds_defconfig
@@ -69,10 +69,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1043aqds_lpuart_defconfig b/configs/ls1043aqds_lpuart_defconfig
index e254fdd..ba3a382 100644
--- a/configs/ls1043aqds_lpuart_defconfig
+++ b/configs/ls1043aqds_lpuart_defconfig
@@ -70,10 +70,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
diff --git a/configs/ls1043aqds_nand_defconfig b/configs/ls1043aqds_nand_defconfig
index 54174f3..e2dd6e6 100644
--- a/configs/ls1043aqds_nand_defconfig
+++ b/configs/ls1043aqds_nand_defconfig
@@ -90,6 +90,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1043aqds_nor_ddr3_defconfig b/configs/ls1043aqds_nor_ddr3_defconfig
index 8a40481..8dd5faf 100644
--- a/configs/ls1043aqds_nor_ddr3_defconfig
+++ b/configs/ls1043aqds_nor_ddr3_defconfig
@@ -70,10 +70,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1043aqds_qspi_defconfig b/configs/ls1043aqds_qspi_defconfig
index 1c61e79..6b13c49 100644
--- a/configs/ls1043aqds_qspi_defconfig
+++ b/configs/ls1043aqds_qspi_defconfig
@@ -64,6 +64,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1043aqds_sdcard_ifc_defconfig b/configs/ls1043aqds_sdcard_ifc_defconfig
index 385c2ad..31aa2be 100644
--- a/configs/ls1043aqds_sdcard_ifc_defconfig
+++ b/configs/ls1043aqds_sdcard_ifc_defconfig
@@ -89,10 +89,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1043aqds_sdcard_qspi_defconfig b/configs/ls1043aqds_sdcard_qspi_defconfig
index f58d95a..8c6a3df 100644
--- a/configs/ls1043aqds_sdcard_qspi_defconfig
+++ b/configs/ls1043aqds_sdcard_qspi_defconfig
@@ -81,10 +81,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
diff --git a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
index ff2ffcb..a680590 100644
--- a/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043aqds_tfa_SECURE_BOOT_defconfig
@@ -71,10 +71,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043aqds_tfa_defconfig b/configs/ls1043aqds_tfa_defconfig
index 8946526..cce59cd 100644
--- a/configs/ls1043aqds_tfa_defconfig
+++ b/configs/ls1043aqds_tfa_defconfig
@@ -81,10 +81,12 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_DM_SCSI=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043ardb_SECURE_BOOT_defconfig b/configs/ls1043ardb_SECURE_BOOT_defconfig
index 4e92ce4..8d6d401 100644
--- a/configs/ls1043ardb_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_SECURE_BOOT_defconfig
@@ -58,9 +58,11 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043ardb_defconfig b/configs/ls1043ardb_defconfig
index e90c3f7..331d5e1 100644
--- a/configs/ls1043ardb_defconfig
+++ b/configs/ls1043ardb_defconfig
@@ -61,9 +61,11 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x60940000
CONFIG_SYS_QE_FMAN_FW_IN_NOR=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
index 8624e7e..94b4f13e 100644
--- a/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_nand_SECURE_BOOT_defconfig
@@ -74,6 +74,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1043ardb_nand_defconfig b/configs/ls1043ardb_nand_defconfig
index 3c875fe..a188dd0 100644
--- a/configs/ls1043ardb_nand_defconfig
+++ b/configs/ls1043ardb_nand_defconfig
@@ -82,6 +82,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
index 35a5da4..762f349 100644
--- a/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_sdcard_SECURE_BOOT_defconfig
@@ -75,8 +75,10 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index ae1aff9..ba0b2cd 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -80,9 +80,11 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_QE_FMAN_FW_IN_MMC=y
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
diff --git a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
index b3a742e..966a3ff 100644
--- a/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1043ardb_tfa_SECURE_BOOT_defconfig
@@ -60,9 +60,11 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1043ardb_tfa_defconfig b/configs/ls1043ardb_tfa_defconfig
index 295fb0b..7e741c7 100644
--- a/configs/ls1043ardb_tfa_defconfig
+++ b/configs/ls1043ardb_tfa_defconfig
@@ -66,9 +66,11 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
+CONFIG_SYS_QE_FW_ADDR=0x940000
CONFIG_SYS_NS16550=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
diff --git a/configs/ls1046aqds_SECURE_BOOT_defconfig b/configs/ls1046aqds_SECURE_BOOT_defconfig
index e72c24c..eb32965 100644
--- a/configs/ls1046aqds_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_SECURE_BOOT_defconfig
@@ -60,12 +60,16 @@
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_defconfig b/configs/ls1046aqds_defconfig
index a8d03d9..a8d9441 100644
--- a/configs/ls1046aqds_defconfig
+++ b/configs/ls1046aqds_defconfig
@@ -63,12 +63,16 @@
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_lpuart_defconfig b/configs/ls1046aqds_lpuart_defconfig
index be81f39..e41c916 100644
--- a/configs/ls1046aqds_lpuart_defconfig
+++ b/configs/ls1046aqds_lpuart_defconfig
@@ -64,12 +64,16 @@
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x60900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_nand_defconfig b/configs/ls1046aqds_nand_defconfig
index 58a8a91..25a178f 100644
--- a/configs/ls1046aqds_nand_defconfig
+++ b/configs/ls1046aqds_nand_defconfig
@@ -83,12 +83,16 @@
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x40000
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_qspi_defconfig b/configs/ls1046aqds_qspi_defconfig
index 6002601..dad335a 100644
--- a/configs/ls1046aqds_qspi_defconfig
+++ b/configs/ls1046aqds_qspi_defconfig
@@ -57,7 +57,10 @@
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
@@ -65,6 +68,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_sdcard_ifc_defconfig b/configs/ls1046aqds_sdcard_ifc_defconfig
index d4b3929..d9d4bf2 100644
--- a/configs/ls1046aqds_sdcard_ifc_defconfig
+++ b/configs/ls1046aqds_sdcard_ifc_defconfig
@@ -83,12 +83,16 @@
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_sdcard_qspi_defconfig b/configs/ls1046aqds_sdcard_qspi_defconfig
index 90c3651..10b3b66 100644
--- a/configs/ls1046aqds_sdcard_qspi_defconfig
+++ b/configs/ls1046aqds_sdcard_qspi_defconfig
@@ -75,7 +75,10 @@
CONFIG_SYS_I2C_EEPROM_ADDR=0x57
CONFIG_FSL_ESDHC=y
# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
@@ -83,6 +86,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
index 0247728..a73ced2 100644
--- a/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046aqds_tfa_SECURE_BOOT_defconfig
@@ -63,13 +63,17 @@
CONFIG_NAND_FSL_IFC=y
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SF_DEFAULT_BUS=1
+CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046aqds_tfa_defconfig b/configs/ls1046aqds_tfa_defconfig
index 5bf74cd..4bf413c 100644
--- a/configs/ls1046aqds_tfa_defconfig
+++ b/configs/ls1046aqds_tfa_defconfig
@@ -8,7 +8,7 @@
CONFIG_SYS_MEMTEST_END=0x9fffffff
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0x500000
-CONFIG_ENV_SECT_SIZE=0x10000
+CONFIG_ENV_SECT_SIZE=0x20000
CONFIG_SYS_I2C_MXC_I2C1=y
CONFIG_SYS_I2C_MXC_I2C2=y
CONFIG_SYS_I2C_MXC_I2C3=y
@@ -51,7 +51,8 @@
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
-CONFIG_ENV_ADDR=0x40500000
+CONFIG_ENV_ADDR=0x60500000
+CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_DM=y
CONFIG_SATA_CEVA=y
CONFIG_FSL_CAAM=y
@@ -73,13 +74,17 @@
CONFIG_SYS_NAND_ONFI_DETECTION=y
CONFIG_SF_DEFAULT_BUS=1
# CONFIG_SPI_FLASH_BAR is not set
+CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_SST=y
CONFIG_PHYLIB=y
CONFIG_PHYLIB_10G=y
CONFIG_PHY_REALTEK=y
CONFIG_PHY_VITESSE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_DM_PCI_COMPAT=y
diff --git a/configs/ls1046ardb_emmc_defconfig b/configs/ls1046ardb_emmc_defconfig
index 6a3823b..0fb5998 100644
--- a/configs/ls1046ardb_emmc_defconfig
+++ b/configs/ls1046ardb_emmc_defconfig
@@ -81,6 +81,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
index 099bb61..a50f381 100644
--- a/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_qspi_SECURE_BOOT_defconfig
@@ -63,6 +63,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1046ardb_qspi_defconfig b/configs/ls1046ardb_qspi_defconfig
index 71f4b85..eeb0b8a 100644
--- a/configs/ls1046ardb_qspi_defconfig
+++ b/configs/ls1046ardb_qspi_defconfig
@@ -67,6 +67,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1046ardb_qspi_spl_defconfig b/configs/ls1046ardb_qspi_spl_defconfig
index 55b5058..4556713 100644
--- a/configs/ls1046ardb_qspi_spl_defconfig
+++ b/configs/ls1046ardb_qspi_spl_defconfig
@@ -85,6 +85,7 @@
CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x40900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1046ardb_sdcard_defconfig b/configs/ls1046ardb_sdcard_defconfig
index 28dde01..0ea465c 100644
--- a/configs/ls1046ardb_sdcard_defconfig
+++ b/configs/ls1046ardb_sdcard_defconfig
@@ -79,6 +79,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
index 5953bb8..995daae 100644
--- a/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1046ardb_tfa_SECURE_BOOT_defconfig
@@ -60,6 +60,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1046ardb_tfa_defconfig b/configs/ls1046ardb_tfa_defconfig
index f793492..3501764 100644
--- a/configs/ls1046ardb_tfa_defconfig
+++ b/configs/ls1046ardb_tfa_defconfig
@@ -66,6 +66,7 @@
CONFIG_DM_MDIO=y
CONFIG_E1000=y
CONFIG_FMAN_ENET=y
+CONFIG_SYS_FMAN_FW_ADDR=0x900000
CONFIG_NVME=y
CONFIG_PCI=y
CONFIG_PCIE_LAYERSCAPE_RC=y
diff --git a/configs/ls1088aqds_defconfig b/configs/ls1088aqds_defconfig
index c389888..51e5622 100644
--- a/configs/ls1088aqds_defconfig
+++ b/configs/ls1088aqds_defconfig
@@ -66,6 +66,7 @@
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y
diff --git a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
index 99e6032..f108c38 100644
--- a/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088aqds_qspi_SECURE_BOOT_defconfig
@@ -62,6 +62,7 @@
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y
diff --git a/configs/ls1088aqds_qspi_defconfig b/configs/ls1088aqds_qspi_defconfig
index db454fc..37d42f3 100644
--- a/configs/ls1088aqds_qspi_defconfig
+++ b/configs/ls1088aqds_qspi_defconfig
@@ -65,6 +65,7 @@
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y
diff --git a/configs/ls1088aqds_sdcard_ifc_defconfig b/configs/ls1088aqds_sdcard_ifc_defconfig
index dac7a5d..5a85ac4 100644
--- a/configs/ls1088aqds_sdcard_ifc_defconfig
+++ b/configs/ls1088aqds_sdcard_ifc_defconfig
@@ -76,6 +76,7 @@
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y
diff --git a/configs/ls1088aqds_sdcard_qspi_defconfig b/configs/ls1088aqds_sdcard_qspi_defconfig
index d24a02c..bd43c85 100644
--- a/configs/ls1088aqds_sdcard_qspi_defconfig
+++ b/configs/ls1088aqds_sdcard_qspi_defconfig
@@ -75,6 +75,7 @@
CONFIG_PHY_REALTEK=y
CONFIG_PHY_TERANETICS=y
CONFIG_PHY_VITESSE=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_NVME=y
diff --git a/configs/ls1088aqds_tfa_defconfig b/configs/ls1088aqds_tfa_defconfig
index 4f0bfa6..eeb4313 100644
--- a/configs/ls1088aqds_tfa_defconfig
+++ b/configs/ls1088aqds_tfa_defconfig
@@ -27,6 +27,7 @@
# CONFIG_USE_BOOTCOMMAND is not set
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
CONFIG_CMD_GREPENV=y
CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS=5
CONFIG_CMD_MEMINFO=y
@@ -84,6 +85,7 @@
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
diff --git a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
index 62dbed8..668ec3d 100644
--- a/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_qspi_SECURE_BOOT_defconfig
@@ -65,6 +65,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
diff --git a/configs/ls1088ardb_qspi_defconfig b/configs/ls1088ardb_qspi_defconfig
index d06901d..7953d9b 100644
--- a/configs/ls1088ardb_qspi_defconfig
+++ b/configs/ls1088ardb_qspi_defconfig
@@ -68,6 +68,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
diff --git a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
index b9b3f4e..8dea978 100644
--- a/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_SECURE_BOOT_defconfig
@@ -78,6 +78,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
diff --git a/configs/ls1088ardb_sdcard_qspi_defconfig b/configs/ls1088ardb_sdcard_qspi_defconfig
index 866c625..580f6a2 100644
--- a/configs/ls1088ardb_sdcard_qspi_defconfig
+++ b/configs/ls1088ardb_sdcard_qspi_defconfig
@@ -78,6 +78,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
diff --git a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
index 99afe96..1f9a15b 100644
--- a/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/ls1088ardb_tfa_SECURE_BOOT_defconfig
@@ -66,6 +66,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
diff --git a/configs/ls1088ardb_tfa_defconfig b/configs/ls1088ardb_tfa_defconfig
index 1df850a..c354225 100644
--- a/configs/ls1088ardb_tfa_defconfig
+++ b/configs/ls1088ardb_tfa_defconfig
@@ -72,6 +72,7 @@
CONFIG_PHY_VITESSE=y
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
+CONFIG_PHY_GIGE=y
CONFIG_E1000=y
CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
diff --git a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
index aebeaff..261154b 100644
--- a/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160aqds_tfa_SECURE_BOOT_defconfig
@@ -71,6 +71,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
@@ -81,6 +82,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
diff --git a/configs/lx2160aqds_tfa_defconfig b/configs/lx2160aqds_tfa_defconfig
index 0f721e5..ddcf681 100644
--- a/configs/lx2160aqds_tfa_defconfig
+++ b/configs/lx2160aqds_tfa_defconfig
@@ -78,6 +78,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
@@ -88,6 +89,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
diff --git a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
index 0c00c39..a8af790 100644
--- a/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2160ardb_tfa_SECURE_BOOT_defconfig
@@ -64,6 +64,7 @@
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
CONFIG_PCI=y
@@ -73,6 +74,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
diff --git a/configs/lx2160ardb_tfa_defconfig b/configs/lx2160ardb_tfa_defconfig
index 5560dcd..d81a4b1 100644
--- a/configs/lx2160ardb_tfa_defconfig
+++ b/configs/lx2160ardb_tfa_defconfig
@@ -73,6 +73,7 @@
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
CONFIG_PCI=y
@@ -82,6 +83,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
diff --git a/configs/lx2160ardb_tfa_stmm_defconfig b/configs/lx2160ardb_tfa_stmm_defconfig
index 4e2ed18..1d6ed44 100644
--- a/configs/lx2160ardb_tfa_stmm_defconfig
+++ b/configs/lx2160ardb_tfa_stmm_defconfig
@@ -73,6 +73,7 @@
CONFIG_DM_ETH=y
CONFIG_DM_MDIO=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_FSL_LS_MDIO=y
CONFIG_NVME=y
CONFIG_PCI=y
@@ -82,6 +83,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_NXP_FSPI=y
diff --git a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
index 3d5182a..38e2307 100644
--- a/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
+++ b/configs/lx2162aqds_tfa_SECURE_BOOT_defconfig
@@ -62,6 +62,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
@@ -74,6 +75,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y
@@ -82,6 +84,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
diff --git a/configs/lx2162aqds_tfa_defconfig b/configs/lx2162aqds_tfa_defconfig
index 377f4f5..2028bfc 100644
--- a/configs/lx2162aqds_tfa_defconfig
+++ b/configs/lx2162aqds_tfa_defconfig
@@ -70,6 +70,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
@@ -82,6 +83,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y
@@ -90,6 +92,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
diff --git a/configs/lx2162aqds_tfa_verified_boot_defconfig b/configs/lx2162aqds_tfa_verified_boot_defconfig
index 7d7a955..0b08589 100644
--- a/configs/lx2162aqds_tfa_verified_boot_defconfig
+++ b/configs/lx2162aqds_tfa_verified_boot_defconfig
@@ -71,6 +71,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_MT35XU=y
CONFIG_SPI_FLASH_SST=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
CONFIG_PHYLIB=y
@@ -83,6 +84,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_MDIO_MUX=y
CONFIG_E1000=y
+CONFIG_MII=y
CONFIG_MDIO_MUX_I2CREG=y
CONFIG_FSL_LS_MDIO=y
CONFIG_PCI=y
@@ -91,6 +93,7 @@
CONFIG_RTC_PCF2127=y
CONFIG_DM_SCSI=y
CONFIG_DM_SERIAL=y
+CONFIG_PL01X_SERIAL=y
CONFIG_SPI=y
CONFIG_DM_SPI=y
CONFIG_FSL_DSPI=y
diff --git a/configs/m53menlo_defconfig b/configs/m53menlo_defconfig
index 193c63e..48d7566 100644
--- a/configs/m53menlo_defconfig
+++ b/configs/m53menlo_defconfig
@@ -91,6 +91,7 @@
CONFIG_DM_MDIO=y
CONFIG_DM_ETH_PHY=y
CONFIG_FEC_MXC=y
+CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX5=y
CONFIG_DM_REGULATOR=y
diff --git a/configs/meesc_dataflash_defconfig b/configs/meesc_dataflash_defconfig
index e36be6e..6fda013 100644
--- a/configs/meesc_dataflash_defconfig
+++ b/configs/meesc_dataflash_defconfig
@@ -40,6 +40,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
diff --git a/configs/meesc_defconfig b/configs/meesc_defconfig
index 887f481..cc7697b 100644
--- a/configs/meesc_defconfig
+++ b/configs/meesc_defconfig
@@ -40,6 +40,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
diff --git a/configs/mvebu_crb_cn9130_defconfig b/configs/mvebu_crb_cn9130_defconfig
index 334d7f2..039fd8b 100644
--- a/configs/mvebu_crb_cn9130_defconfig
+++ b/configs/mvebu_crb_cn9130_defconfig
@@ -60,6 +60,7 @@
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
CONFIG_MVPP2=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/mvebu_db_armada8k_defconfig b/configs/mvebu_db_armada8k_defconfig
index d9a5759..e6168a7 100644
--- a/configs/mvebu_db_armada8k_defconfig
+++ b/configs/mvebu_db_armada8k_defconfig
@@ -49,6 +49,7 @@
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
CONFIG_MVPP2=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/mvebu_db_cn9130_defconfig b/configs/mvebu_db_cn9130_defconfig
index c8dffe0..42d7038 100644
--- a/configs/mvebu_db_cn9130_defconfig
+++ b/configs/mvebu_db_cn9130_defconfig
@@ -65,6 +65,7 @@
CONFIG_SPI_FLASH_MTD=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
CONFIG_MVPP2=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/mvebu_mcbin-88f8040_defconfig b/configs/mvebu_mcbin-88f8040_defconfig
index 61cc260..2aa06f8 100644
--- a/configs/mvebu_mcbin-88f8040_defconfig
+++ b/configs/mvebu_mcbin-88f8040_defconfig
@@ -54,6 +54,7 @@
CONFIG_SPI_FLASH_WINBOND=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
CONFIG_MVPP2=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/mvebu_puzzle-m801-88f8040_defconfig b/configs/mvebu_puzzle-m801-88f8040_defconfig
index da73dd1..053b2f4 100644
--- a/configs/mvebu_puzzle-m801-88f8040_defconfig
+++ b/configs/mvebu_puzzle-m801-88f8040_defconfig
@@ -58,6 +58,7 @@
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_PHY_MARVELL=y
CONFIG_PHY_GIGE=y
+CONFIG_E1000=y
CONFIG_MVPP2=y
CONFIG_NVME=y
CONFIG_PCI=y
diff --git a/configs/mx6qsabrelite_defconfig b/configs/mx6qsabrelite_defconfig
index 141ea3b..8625189 100644
--- a/configs/mx6qsabrelite_defconfig
+++ b/configs/mx6qsabrelite_defconfig
@@ -84,6 +84,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/nitrogen6dl2g_defconfig b/configs/nitrogen6dl2g_defconfig
index 3c32edc..593a43e 100644
--- a/configs/nitrogen6dl2g_defconfig
+++ b/configs/nitrogen6dl2g_defconfig
@@ -85,6 +85,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/nitrogen6dl_defconfig b/configs/nitrogen6dl_defconfig
index f02f6f8..4bcc675 100644
--- a/configs/nitrogen6dl_defconfig
+++ b/configs/nitrogen6dl_defconfig
@@ -85,6 +85,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/nitrogen6q2g_defconfig b/configs/nitrogen6q2g_defconfig
index db71f6a..76fc53d 100644
--- a/configs/nitrogen6q2g_defconfig
+++ b/configs/nitrogen6q2g_defconfig
@@ -87,6 +87,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/nitrogen6q_defconfig b/configs/nitrogen6q_defconfig
index 3e77e67..fca3e5f 100644
--- a/configs/nitrogen6q_defconfig
+++ b/configs/nitrogen6q_defconfig
@@ -87,6 +87,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/nitrogen6s1g_defconfig b/configs/nitrogen6s1g_defconfig
index 98413f2..8b720b0 100644
--- a/configs/nitrogen6s1g_defconfig
+++ b/configs/nitrogen6s1g_defconfig
@@ -85,6 +85,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/nitrogen6s_defconfig b/configs/nitrogen6s_defconfig
index 66db493..a9d239e 100644
--- a/configs/nitrogen6s_defconfig
+++ b/configs/nitrogen6s_defconfig
@@ -85,6 +85,7 @@
CONFIG_USB_ETH_CDC=y
CONFIG_DM_VIDEO=y
CONFIG_SYS_WHITE_ON_BLACK=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_IPUV3=y
CONFIG_SPLASH_SCREEN=y
CONFIG_SPLASH_SCREEN_ALIGN=y
diff --git a/configs/octeontx2_95xx_defconfig b/configs/octeontx2_95xx_defconfig
index 7bbf07b..e1b86a5 100644
--- a/configs/octeontx2_95xx_defconfig
+++ b/configs/octeontx2_95xx_defconfig
@@ -24,6 +24,7 @@
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=6 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
@@ -63,6 +64,7 @@
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
diff --git a/configs/octeontx2_96xx_defconfig b/configs/octeontx2_96xx_defconfig
index 4ab2395..ec03d95 100644
--- a/configs/octeontx2_96xx_defconfig
+++ b/configs/octeontx2_96xx_defconfig
@@ -24,6 +24,7 @@
CONFIG_BOOTARGS="console=ttyAMA0,115200n8 earlycon=pl011,0x87e028000000 maxcpus=24 rootwait rw root=/dev/mmcblk0p2 coherent_pool=16M"
# CONFIG_DISPLAY_CPUINFO is not set
CONFIG_BOARD_EARLY_INIT_R=y
+CONFIG_LAST_STAGE_INIT=y
CONFIG_HUSH_PARSER=y
CONFIG_SYS_PROMPT="Marvell> "
# CONFIG_CMD_BOOTEFI_HELLO_COMPILE is not set
@@ -64,6 +65,7 @@
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
diff --git a/configs/octeontx_81xx_defconfig b/configs/octeontx_81xx_defconfig
index 706cc41..d0728ac 100644
--- a/configs/octeontx_81xx_defconfig
+++ b/configs/octeontx_81xx_defconfig
@@ -66,6 +66,7 @@
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
diff --git a/configs/octeontx_83xx_defconfig b/configs/octeontx_83xx_defconfig
index 2073375..6c9609b 100644
--- a/configs/octeontx_83xx_defconfig
+++ b/configs/octeontx_83xx_defconfig
@@ -63,6 +63,7 @@
CONFIG_EFI_PARTITION=y
CONFIG_PARTITION_TYPE_GUID=y
CONFIG_OF_BOARD=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
diff --git a/configs/pg_wcom_expu1_defconfig b/configs/pg_wcom_expu1_defconfig
index 7f56c44..267864f 100644
--- a/configs/pg_wcom_expu1_defconfig
+++ b/configs/pg_wcom_expu1_defconfig
@@ -71,6 +71,7 @@
CONFIG_PHY_GIGE=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
+CONFIG_SYS_QE_FW_ADDR=0x60020000
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/pg_wcom_seli8_defconfig b/configs/pg_wcom_seli8_defconfig
index d4079aa..5b1aa8f 100644
--- a/configs/pg_wcom_seli8_defconfig
+++ b/configs/pg_wcom_seli8_defconfig
@@ -71,6 +71,7 @@
CONFIG_PHY_GIGE=y
CONFIG_MII=y
CONFIG_TSEC_ENET=y
+CONFIG_SYS_QE_FW_ADDR=0x60020000
CONFIG_SPECIFY_CONSOLE_INDEX=y
CONFIG_DM_SERIAL=y
CONFIG_SYS_NS16550=y
diff --git a/configs/phycore-imx8mm_defconfig b/configs/phycore-imx8mm_defconfig
index e54b2d1..89a4f28 100644
--- a/configs/phycore-imx8mm_defconfig
+++ b/configs/phycore-imx8mm_defconfig
@@ -80,7 +80,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_MTD=y
CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
diff --git a/configs/phycore-imx8mp_defconfig b/configs/phycore-imx8mp_defconfig
index fdc136c..758c288 100644
--- a/configs/phycore-imx8mp_defconfig
+++ b/configs/phycore-imx8mp_defconfig
@@ -81,7 +81,7 @@
CONFIG_MMC_UHS_SUPPORT=y
CONFIG_MMC_HS400_ES_SUPPORT=y
CONFIG_MMC_HS400_SUPPORT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_TI_DP83867=y
CONFIG_DM_ETH=y
diff --git a/configs/pico-imx6_defconfig b/configs/pico-imx6_defconfig
index 5390746..20c7d45 100644
--- a/configs/pico-imx6_defconfig
+++ b/configs/pico-imx6_defconfig
@@ -71,6 +71,7 @@
CONFIG_DM_ETH=y
CONFIG_FEC_MXC=y
CONFIG_RGMII=y
+CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX6=y
CONFIG_MXC_UART=y
diff --git a/configs/pico-imx8mq_defconfig b/configs/pico-imx8mq_defconfig
index 0e89836..4195370 100644
--- a/configs/pico-imx8mq_defconfig
+++ b/configs/pico-imx8mq_defconfig
@@ -18,6 +18,7 @@
CONFIG_SPL_SERIAL=y
CONFIG_SPL_DRIVERS_MISC=y
CONFIG_SPL=y
+CONFIG_IMX_BOOTAUX=y
CONFIG_SYS_LOAD_ADDR=0x40480000
CONFIG_FIT=y
CONFIG_FIT_EXTERNAL_OFFSET=0x3000
@@ -57,8 +58,12 @@
CONFIG_SPL_SYS_I2C_LEGACY=y
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_FSL_USDHC=y
+CONFIG_PHYLIB=y
+CONFIG_PHY_ATHEROS=y
CONFIG_DM_ETH=y
+CONFIG_PHY_GIGE=y
CONFIG_FEC_MXC=y
+CONFIG_MII=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_IMX8M=y
CONFIG_SPL_POWER_LEGACY=y
diff --git a/configs/r8a779a0_falcon_defconfig b/configs/r8a779a0_falcon_defconfig
index cb21d3a..bad5585 100644
--- a/configs/r8a779a0_falcon_defconfig
+++ b/configs/r8a779a0_falcon_defconfig
@@ -52,6 +52,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_SPANSION=y
# CONFIG_SPI_FLASH_USE_4K_SECTORS is not set
+CONFIG_BITBANGMII=y
CONFIG_PHY_MICREL=y
CONFIG_PHY_MICREL_KSZ90X1=y
CONFIG_DM_ETH=y
diff --git a/configs/s5p4418_nanopi2_defconfig b/configs/s5p4418_nanopi2_defconfig
index 0601743..fa59cfd 100644
--- a/configs/s5p4418_nanopi2_defconfig
+++ b/configs/s5p4418_nanopi2_defconfig
@@ -1,5 +1,6 @@
CONFIG_ARM=y
CONFIG_SYS_DCACHE_OFF=y
+CONFIG_ARCH_CPU_INIT=y
CONFIG_ARCH_NEXELL=y
CONFIG_SYS_TEXT_BASE=0x74C00000
CONFIG_SYS_MALLOC_LEN=0x2000000
@@ -24,6 +25,7 @@
CONFIG_ARCH_MISC_INIT=y
CONFIG_BOARD_LATE_INIT=y
CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="nanopi2# "
CONFIG_CMD_BOOTZ=y
CONFIG_CMD_MEMTEST=y
CONFIG_CMD_GPIO=y
diff --git a/configs/sama5d2_icp_mmc_defconfig b/configs/sama5d2_icp_mmc_defconfig
index f821dcd..2e699a7 100644
--- a/configs/sama5d2_icp_mmc_defconfig
+++ b/configs/sama5d2_icp_mmc_defconfig
@@ -30,6 +30,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlyprintk root=/dev/mmcblk0p2 rw rootwait"
# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_DISPLAY_PRINT=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
CONFIG_SPL_RAM_SUPPORT=y
diff --git a/configs/sama5d2_icp_qspiflash_defconfig b/configs/sama5d2_icp_qspiflash_defconfig
index 153c9e4..7722a5e 100644
--- a/configs/sama5d2_icp_qspiflash_defconfig
+++ b/configs/sama5d2_icp_qspiflash_defconfig
@@ -25,6 +25,7 @@
CONFIG_USE_BOOTARGS=y
CONFIG_BOOTARGS="console=ttyS0,115200 earlycon earlyprintk=serial,ttyS0, ignore_loglevel root=/dev/mmcblk0p2 memtest=0 rootfstype=ext4 rw rootwait"
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
CONFIG_HUSH_PARSER=y
CONFIG_CMD_CONFIG=y
CONFIG_CMD_BOOTZ=y
diff --git a/configs/sandbox64_defconfig b/configs/sandbox64_defconfig
index f8c021e..d849989 100644
--- a/configs/sandbox64_defconfig
+++ b/configs/sandbox64_defconfig
@@ -220,6 +220,7 @@
CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_OSD=y
CONFIG_SANDBOX_OSD=y
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index c787b54..c390afe 100644
--- a/configs/sandbox_defconfig
+++ b/configs/sandbox_defconfig
@@ -278,6 +278,7 @@
CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_VIDEO_DSI_HOST_SANDBOX=y
CONFIG_OSD=y
diff --git a/configs/sandbox_flattree_defconfig b/configs/sandbox_flattree_defconfig
index deced18..7cc76bf 100644
--- a/configs/sandbox_flattree_defconfig
+++ b/configs/sandbox_flattree_defconfig
@@ -193,6 +193,7 @@
CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_OSD=y
CONFIG_SANDBOX_OSD=y
diff --git a/configs/sandbox_noinst_defconfig b/configs/sandbox_noinst_defconfig
index 043c2fb..490368e 100644
--- a/configs/sandbox_noinst_defconfig
+++ b/configs/sandbox_noinst_defconfig
@@ -213,6 +213,7 @@
CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_OSD=y
CONFIG_SANDBOX_OSD=y
diff --git a/configs/sandbox_spl_defconfig b/configs/sandbox_spl_defconfig
index 1e3ccbb..f1a54ac 100644
--- a/configs/sandbox_spl_defconfig
+++ b/configs/sandbox_spl_defconfig
@@ -215,6 +215,7 @@
CONFIG_CONSOLE_ROTATION=y
CONFIG_CONSOLE_TRUETYPE=y
CONFIG_CONSOLE_TRUETYPE_CANTORAONE=y
+CONFIG_I2C_EDID=y
CONFIG_VIDEO_SANDBOX_SDL=y
CONFIG_OSD=y
CONFIG_SANDBOX_OSD=y
diff --git a/configs/seeed_npi_imx6ull_defconfig b/configs/seeed_npi_imx6ull_defconfig
index f08542a..6489e8b 100644
--- a/configs/seeed_npi_imx6ull_defconfig
+++ b/configs/seeed_npi_imx6ull_defconfig
@@ -66,5 +66,6 @@
CONFIG_DM_REGULATOR_FIXED=y
CONFIG_DM_REGULATOR_GPIO=y
CONFIG_MXC_UART=y
+CONFIG_IMX_THERMAL=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/smartweb_defconfig b/configs/smartweb_defconfig
index 712e517..af6e925 100644
--- a/configs/smartweb_defconfig
+++ b/configs/smartweb_defconfig
@@ -69,7 +69,7 @@
CONFIG_SYS_NAND_OOBSIZE=0x40
CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y
CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
-CONFIG_PHYLIB=y
+CONFIG_MACB=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_GADGET=y
diff --git a/configs/snapper9260_defconfig b/configs/snapper9260_defconfig
index 4a2527c..4b3267e 100644
--- a/configs/snapper9260_defconfig
+++ b/configs/snapper9260_defconfig
@@ -28,6 +28,7 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_OVERWRITE=y
@@ -44,4 +45,5 @@
CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
+CONFIG_MACB=y
CONFIG_ATMEL_USART=y
diff --git a/configs/snapper9g20_defconfig b/configs/snapper9g20_defconfig
index a905359..3674c8f 100644
--- a/configs/snapper9g20_defconfig
+++ b/configs/snapper9g20_defconfig
@@ -27,6 +27,7 @@
# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_DHCP=y
CONFIG_CMD_MII=y
+# CONFIG_CMD_MDIO is not set
CONFIG_CMD_PING=y
CONFIG_CMD_FAT=y
CONFIG_ENV_OVERWRITE=y
@@ -43,4 +44,5 @@
CONFIG_MTD_RAW_NAND=y
# CONFIG_SYS_NAND_USE_FLASH_BBT is not set
CONFIG_NAND_ATMEL=y
+CONFIG_MACB=y
CONFIG_ATMEL_USART=y
diff --git a/configs/socfpga_secu1_defconfig b/configs/socfpga_secu1_defconfig
index 7bcc889..db48006 100644
--- a/configs/socfpga_secu1_defconfig
+++ b/configs/socfpga_secu1_defconfig
@@ -26,6 +26,7 @@
CONFIG_SYS_CONSOLE_ENV_OVERWRITE=y
# CONFIG_DISPLAY_BOARDINFO is not set
CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_MISC_INIT_R=y
CONFIG_SPL_LEGACY_IMAGE_CRC_CHECK=y
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION is not set
diff --git a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
index 14bf6d1..adb8f10 100644
--- a/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-ctouch2_defconfig
@@ -73,7 +73,9 @@
CONFIG_DM_RTC=y
CONFIG_RTC_STM32=y
CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
diff --git a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
index 648ecbf..dca35db 100644
--- a/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
+++ b/configs/stm32mp15-icore-stm32mp1-edimm2.2_defconfig
@@ -73,7 +73,9 @@
CONFIG_DM_RTC=y
CONFIG_RTC_STM32=y
CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
index f422ffb..aa6a28e 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2-of7_defconfig
@@ -73,7 +73,9 @@
CONFIG_DM_RTC=y
CONFIG_RTC_STM32=y
CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
diff --git a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
index 244d9cc..9abd1a1 100644
--- a/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
+++ b/configs/stm32mp15-microgea-stm32mp1-microdev2_defconfig
@@ -73,7 +73,9 @@
CONFIG_DM_RTC=y
CONFIG_RTC_STM32=y
CONFIG_SERIAL_RX_BUFFER=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_LZO=y
CONFIG_ERRNO_STR=y
diff --git a/configs/stm32mp15_basic_defconfig b/configs/stm32mp15_basic_defconfig
index 77ed82c..2cc26d4 100644
--- a/configs/stm32mp15_basic_defconfig
+++ b/configs/stm32mp15_basic_defconfig
@@ -147,6 +147,7 @@
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_STM32_SPI=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
@@ -170,6 +171,7 @@
CONFIG_BMP_32BPP=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_ERRNO_STR=y
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_LMB_USE_MAX_REGIONS is not set
diff --git a/configs/stm32mp15_defconfig b/configs/stm32mp15_defconfig
index 701b151..4c6a52f 100644
--- a/configs/stm32mp15_defconfig
+++ b/configs/stm32mp15_defconfig
@@ -8,10 +8,12 @@
CONFIG_ENV_SECT_SIZE=0x40000
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_DDR_CACHEABLE_SIZE=0x10000000
CONFIG_CMD_STM32KEY=y
CONFIG_CMD_STM32PROG=y
CONFIG_ENV_OFFSET_REDUND=0x4C0000
CONFIG_TYPEC_STUSB160X=y
+# CONFIG_ARMV7_NONSEC is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
@@ -126,6 +128,7 @@
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_STM32_SPI=y
+CONFIG_SYSRESET_PSCI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
# CONFIG_OPTEE_TA_AVB is not set
@@ -152,6 +155,7 @@
CONFIG_BMP_32BPP=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_ERRNO_STR=y
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_LMB_USE_MAX_REGIONS is not set
diff --git a/configs/stm32mp15_dhcom_basic_defconfig b/configs/stm32mp15_dhcom_basic_defconfig
index 5b85f6a..8437558 100644
--- a/configs/stm32mp15_dhcom_basic_defconfig
+++ b/configs/stm32mp15_dhcom_basic_defconfig
@@ -22,6 +22,7 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_CONSOLE_MUX=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
@@ -53,7 +54,6 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -61,7 +61,11 @@
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=nor0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k(env1),64k(env2)"
# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_OF_LIST="stm32mp15xx-dhcom-pdk2 stm32mp15xx-dhcom-drc02 stm32mp15xx-dhcom-picoitx"
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
CONFIG_ENV_IS_IN_SPI_FLASH=y
@@ -70,7 +74,7 @@
CONFIG_USE_ENV_SPI_CS=y
CONFIG_ENV_SPI_CS=0
CONFIG_USE_ENV_SPI_MAX_HZ=y
-CONFIG_ENV_SPI_MAX_HZ=10000000
+CONFIG_ENV_SPI_MAX_HZ=50000000
CONFIG_USE_ENV_SPI_MODE=y
CONFIG_ENV_SPI_MODE=0x0
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
@@ -81,6 +85,7 @@
CONFIG_STM32_ADC=y
CONFIG_SPL_BLOCK_CACHE=y
CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y
CONFIG_DFU_VIRT=y
CONFIG_SET_DFU_ALT_INFO=y
@@ -98,8 +103,10 @@
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
-CONFIG_SYS_MTDPARTS_RUNTIME=y
+CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -129,6 +136,7 @@
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_STM32_SPI=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
@@ -141,17 +149,8 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_DM_VIDEO=y
-CONFIG_BACKLIGHT_GPIO=y
-CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
-CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
-CONFIG_VIDEO_STM32=y
-CONFIG_VIDEO_STM32_DSI=y
-CONFIG_VIDEO_STM32_MAX_XRES=1280
-CONFIG_VIDEO_STM32_MAX_YRES=800
-CONFIG_VIDEO_BMP_RLE8=y
-CONFIG_BMP_16BPP=y
-CONFIG_BMP_24BPP=y
-CONFIG_BMP_32BPP=y
+CONFIG_FAT_WRITE=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_LZO=y
CONFIG_FDT_FIXUP_PARTITIONS=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/stm32mp15_dhcor_basic_defconfig b/configs/stm32mp15_dhcor_basic_defconfig
index 37dd275..aa000ef 100644
--- a/configs/stm32mp15_dhcor_basic_defconfig
+++ b/configs/stm32mp15_dhcor_basic_defconfig
@@ -20,6 +20,7 @@
# CONFIG_USE_SPL_FIT_GENERATOR is not set
CONFIG_BOOTDELAY=1
CONFIG_BOOTCOMMAND="run bootcmd_stm32mp"
+CONFIG_CONSOLE_MUX=y
CONFIG_BOARD_EARLY_INIT_F=y
CONFIG_SPL_LEGACY_IMAGE_SUPPORT=y
CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION=y
@@ -51,7 +52,6 @@
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
CONFIG_CMD_USB_MASS_STORAGE=y
-CONFIG_CMD_BMP=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y
CONFIG_CMD_TIMER=y
@@ -59,7 +59,11 @@
CONFIG_CMD_REGULATOR=y
CONFIG_CMD_EXT4_WRITE=y
CONFIG_CMD_MTDPARTS=y
+CONFIG_MTDIDS_DEFAULT="nor0=nor0"
+CONFIG_MTDPARTS_DEFAULT="mtdparts=nor0:256k(fsbl1),256k(fsbl2),1408k(uboot),64k(env1),64k(env2)"
# CONFIG_SPL_DOS_PARTITION is not set
+# CONFIG_ISO_PARTITION is not set
+# CONFIG_SPL_PARTITION_UUIDS is not set
CONFIG_OF_SPL_REMOVE_PROPS="interrupts interrupt-names interrupts-extended interrupt-controller \\\#interrupt-cells interrupt-parent dmas dma-names assigned-clocks assigned-clock-rates assigned-clock-parents hwlocks"
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
@@ -67,7 +71,7 @@
CONFIG_USE_ENV_SPI_CS=y
CONFIG_ENV_SPI_CS=0
CONFIG_USE_ENV_SPI_MAX_HZ=y
-CONFIG_ENV_SPI_MAX_HZ=10000000
+CONFIG_ENV_SPI_MAX_HZ=50000000
CONFIG_USE_ENV_SPI_MODE=y
CONFIG_ENV_SPI_MODE=0x0
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
@@ -78,6 +82,7 @@
CONFIG_STM32_ADC=y
CONFIG_SPL_BLOCK_CACHE=y
CONFIG_DFU_MMC=y
+CONFIG_DFU_MTD=y
CONFIG_DFU_RAM=y
CONFIG_DFU_VIRT=y
CONFIG_GPIO_HOG=y
@@ -94,7 +99,10 @@
CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_STM32_SDMMC2=y
CONFIG_MTD=y
+CONFIG_DM_MTD=y
CONFIG_DM_SPI_FLASH=y
+CONFIG_SF_DEFAULT_SPEED=50000000
+CONFIG_SPI_FLASH_SFDP_SUPPORT=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_STMICRO=y
@@ -123,6 +131,7 @@
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_STM32_SPI=y
+CONFIG_SYSRESET_SYSCON=y
CONFIG_USB=y
CONFIG_DM_USB_GADGET=y
CONFIG_USB_EHCI_HCD=y
@@ -135,17 +144,8 @@
CONFIG_USB_GADGET_PRODUCT_NUM=0x5720
CONFIG_USB_GADGET_DWC2_OTG=y
CONFIG_USB_GADGET_DOWNLOAD=y
-CONFIG_DM_VIDEO=y
-CONFIG_BACKLIGHT_GPIO=y
-CONFIG_VIDEO_LCD_ORISETECH_OTM8009A=y
-CONFIG_VIDEO_LCD_RAYDIUM_RM68200=y
-CONFIG_VIDEO_STM32=y
-CONFIG_VIDEO_STM32_DSI=y
-CONFIG_VIDEO_STM32_MAX_XRES=1280
-CONFIG_VIDEO_STM32_MAX_YRES=800
-CONFIG_VIDEO_BMP_RLE8=y
-CONFIG_BMP_16BPP=y
-CONFIG_BMP_24BPP=y
-CONFIG_BMP_32BPP=y
+CONFIG_FAT_WRITE=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_LZO=y
CONFIG_FDT_FIXUP_PARTITIONS=y
+# CONFIG_EFI_LOADER is not set
diff --git a/configs/stm32mp15_trusted_defconfig b/configs/stm32mp15_trusted_defconfig
index b4ed090..feca26e 100644
--- a/configs/stm32mp15_trusted_defconfig
+++ b/configs/stm32mp15_trusted_defconfig
@@ -9,10 +9,12 @@
CONFIG_DEFAULT_DEVICE_TREE="stm32mp157c-ev1"
CONFIG_STM32MP15x_STM32IMAGE=y
CONFIG_TARGET_ST_STM32MP15x=y
+CONFIG_DDR_CACHEABLE_SIZE=0x10000000
CONFIG_CMD_STM32KEY=y
CONFIG_CMD_STM32PROG=y
CONFIG_ENV_OFFSET_REDUND=0x2C0000
CONFIG_TYPEC_STUSB160X=y
+# CONFIG_ARMV7_NONSEC is not set
CONFIG_DISTRO_DEFAULTS=y
CONFIG_SYS_LOAD_ADDR=0xc2000000
CONFIG_FIT=y
@@ -127,6 +129,7 @@
CONFIG_DM_SPI=y
CONFIG_STM32_QSPI=y
CONFIG_STM32_SPI=y
+CONFIG_SYSRESET_PSCI=y
CONFIG_TEE=y
CONFIG_OPTEE=y
# CONFIG_OPTEE_TA_AVB is not set
@@ -153,6 +156,7 @@
CONFIG_BMP_32BPP=y
CONFIG_WDT=y
CONFIG_WDT_STM32MP=y
+# CONFIG_BINMAN_FDT is not set
CONFIG_ERRNO_STR=y
CONFIG_FDT_FIXUP_PARTITIONS=y
# CONFIG_LMB_USE_MAX_REGIONS is not set
diff --git a/configs/synquacer_developerbox_defconfig b/configs/synquacer_developerbox_defconfig
index c458bdd..4fb0fba 100644
--- a/configs/synquacer_developerbox_defconfig
+++ b/configs/synquacer_developerbox_defconfig
@@ -38,6 +38,7 @@
CONFIG_CMD_MTDPARTS=y
CONFIG_CMD_LOG=y
CONFIG_PARTITION_TYPE_GUID=y
+CONFIG_ENV_OVERWRITE=y
CONFIG_ENV_IS_IN_SPI_FLASH=y
CONFIG_USE_ENV_SPI_BUS=y
CONFIG_ENV_SPI_BUS=0
diff --git a/configs/taurus_defconfig b/configs/taurus_defconfig
index 1720e1d..eaede09 100644
--- a/configs/taurus_defconfig
+++ b/configs/taurus_defconfig
@@ -87,7 +87,7 @@
CONFIG_SYS_NAND_U_BOOT_OFFS=0x20000
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_STMICRO=y
-CONFIG_PHYLIB=y
+CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_SPECIFY_CONSOLE_INDEX=y
diff --git a/configs/tools-only_defconfig b/configs/tools-only_defconfig
index 44783fd..f482c9a 100644
--- a/configs/tools-only_defconfig
+++ b/configs/tools-only_defconfig
@@ -27,6 +27,7 @@
CONFIG_DM_RTC=y
CONFIG_SOUND=y
CONFIG_SYSRESET=y
+CONFIG_I2C_EDID=y
# CONFIG_VIRTIO_MMIO is not set
# CONFIG_VIRTIO_PCI is not set
# CONFIG_VIRTIO_SANDBOX is not set
diff --git a/configs/usb_a9263_dataflash_defconfig b/configs/usb_a9263_dataflash_defconfig
index 5bf0e75..f138514 100644
--- a/configs/usb_a9263_dataflash_defconfig
+++ b/configs/usb_a9263_dataflash_defconfig
@@ -47,6 +47,7 @@
CONFIG_DM_SPI_FLASH=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_DATAFLASH=y
+CONFIG_MACB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_AT91=y
CONFIG_DM_SERIAL=y
diff --git a/configs/verdin-imx8mm_defconfig b/configs/verdin-imx8mm_defconfig
index 791bdf4..6312d8a 100644
--- a/configs/verdin-imx8mm_defconfig
+++ b/configs/verdin-imx8mm_defconfig
@@ -76,7 +76,7 @@
CONFIG_MISC=y
CONFIG_I2C_EEPROM=y
CONFIG_SUPPORT_EMMC_BOOT=y
-CONFIG_FSL_ESDHC_IMX=y
+CONFIG_FSL_USDHC=y
CONFIG_PHYLIB=y
CONFIG_PHY_ADDR_ENABLE=y
CONFIG_PHY_MICREL=y
diff --git a/configs/vinco_defconfig b/configs/vinco_defconfig
index e90e362..fbc2176 100644
--- a/configs/vinco_defconfig
+++ b/configs/vinco_defconfig
@@ -38,6 +38,7 @@
CONFIG_SF_DEFAULT_SPEED=50000000
CONFIG_PHY_SMSC=y
CONFIG_ETH_DESIGNWARE=y
+CONFIG_MACB=y
CONFIG_ATMEL_USART=y
CONFIG_USB=y
CONFIG_USB_EHCI_HCD=y
diff --git a/doc/README.lynxkdi b/doc/README.lynxkdi
deleted file mode 100644
index 076f018..0000000
--- a/doc/README.lynxkdi
+++ /dev/null
@@ -1,57 +0,0 @@
- LYNX KDI SUPPORT
-
- Last Update: July 20, 2003
-=======================================================================
-
-This file describes support for LynuxWorks KDI within U-Boot. Support
-is enabled by defining CONFIG_LYNXKDI.
-
-
-LYNXOS AND BLUECAT SUPPORTED
-============================
-Both LynxOS and BlueCat linux KDIs are supported. The implementation
-automatically detects which is being booted. When you use mkimage
-you should specify "lynxos" for both (see target-specific notes).
-
-
-SUPPORTED ARCHITECTURE/TARGETS
-==============================
-The following targets have been tested:
-
--PowerPC MPC8260ADS
-
-
-FILES TO LOOK AT
-================
-include/lynxkdi.h -defines a simple struct passed to a kdi.
-common/lynxkdi.c -implements the call to the kdi.
-common/cmd_bootm.c -top-level command implementation ("bootm").
-
-
-====================================================================
-TARGET SPECIFIC NOTES
-====================================================================
-
-MPC8260ADS
-===========
-The default LynxOS and BlueCat implementations require some
-modifications to the config file.
-
-Edit include/configs/MPC8260ADS.h to use the following:
-
-#define CONFIG_SYS_IMMR 0xFA200000
-#define CONFIG_SYS_BCSR 0xFA100000
-#define CONFIG_SYS_BR1_PRELIM 0xFA101801
-
-When creating a LynxOS or BlueCat u-boot image using mkimage,
-you must specify the following:
-
-Both: -A ppc -O lynxos -T kernel -C none
-LynxOS: -a 0x00004000 -e 0x00004020
-BlueCat: -a 0x00500000 -e 0x00507000
-
-To pass the MAC address to BlueCat you should define the
-"fcc2_ether_addr" parameter in the "bootargs" environment
-variable. E.g.:
-
-==> setenv bootargs fcc2_ether_addr=00:11:22:33:44:55:66
diff --git a/doc/android/boot-image.rst b/doc/android/boot-image.rst
index fa8f2a4..71db025 100644
--- a/doc/android/boot-image.rst
+++ b/doc/android/boot-image.rst
@@ -139,7 +139,7 @@
C API for working with Android Boot Image format
------------------------------------------------
-.. kernel-doc:: common/image-android.c
+.. kernel-doc:: boot/image-android.c
:internal:
References
diff --git a/doc/board/kontron/sl28.rst b/doc/board/kontron/sl28.rst
index e458fbc..c7b18be 100644
--- a/doc/board/kontron/sl28.rst
+++ b/doc/board/kontron/sl28.rst
@@ -1,17 +1,17 @@
.. SPDX-License-Identifier: GPL-2.0+
-Summary
-=======
+Kontron SMARC-sAL28
+===================
The Kontron SMARC-sAL28 board is a TSN-enabled dual-core ARM A72
processor module with an on-chip 6-port TSN switch and a 3D GPU.
Quickstart
-==========
+----------
Compile U-Boot
---------------
+^^^^^^^^^^^^^^
Configure and compile the binary::
@@ -21,7 +21,7 @@
Copy u-boot.rom to a TFTP server.
Install the bootloader on the board
------------------------------------
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
Please note, this bootloader doesn't support the builtin watchdog (yet),
therefore you have to disable it, see below. Otherwise you'll end up in
@@ -36,7 +36,7 @@
mode by asserting the ``FORCE_RECOV#`` line during board reset.
Disable the builtin watchdog
-----------------------------
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^
- boot into the failsafe bootloader, either by asserting the
``FORCE_RECOV#`` line or if you still have the original bootloader
@@ -52,8 +52,23 @@
- power-cycle the board
+Update image
+------------
+
+After the build finished, there will be an update image called
+u-boot.update. This can either be used in the DFU mode (which isn't
+supported yet) or encapsulated in an EFI UpdateCapsule.
+
+To build the capsule use the following command
+
+ $ tools/mkeficapsule -f u-boot.update -i 1 UpdateUboot
+
+Afterward you can copy this file to your ESP into the /EFI/UpdateCapsule/
+folder. On the next EFI boot this will automatically update your
+bootloader.
+
Useful I2C tricks
-=================
+-----------------
The board has a board management controller which is not supported in
u-boot (yet). But you can use the i2c command to access it.
@@ -68,7 +83,7 @@
Non-volatile Board Configuration Bits
-=====================================
+-------------------------------------
The board has 16 configuration bits which are stored in the CPLD and are
non-volatile. These can be changed by the `sl28 nvm` command.
@@ -98,21 +113,21 @@
factory defaults, ie. all bits are off.
Power-On Inhibit
-----------------
+^^^^^^^^^^^^^^^^
If this is set, the board doesn't automatically turn on when power is
applied. Instead, the user has to either toggle the ``PWR_BTN#`` line or
use any other wake-up source such as RTC alarm or Wake-on-LAN.
eMMC Boot
----------
+^^^^^^^^^
If this is set, the RCW will be fetched from the on-board eMMC at offset
1MiB. For further details, have a look at the `Reset Configuration Word
Documentation`_.
Watchdog
---------
+^^^^^^^^
By default, the CPLD watchdog is enabled in failsafe mode. Using bits 2 and
3, the user can change its mode or disable it altogether.
@@ -127,21 +142,21 @@
===== ===== ===============================
Clock Generator Select
-----------------------
+^^^^^^^^^^^^^^^^^^^^^^
The board is prepared to supply different SerDes clock speeds. But for now,
only setting 0 is supported, otherwise the CPU will hang because the PLL
will not lock.
Clock Output Disable And Keep Devices In Reset
-----------------------------------------------
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
To safe power, the user might disable different devices and clock output of
the board. It is not supported to disable the "CPU SerDes clock #2" for
now, otherwise the CPU will hang because the PLL will not lock.
Automatic reset of the onboard PHYs
------------------------------------
+^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
By default, there is no hardware reset of the onboard PHY. This is because
for Wake-on-LAN, some registers have to retain their values. If you don't
@@ -151,7 +166,7 @@
Further documentation
-=====================
+---------------------
- `Vendor Documentation`_
- `Reset Configuration Word Documentation`_
diff --git a/doc/README.distro b/doc/develop/distro.rst
similarity index 76%
rename from doc/README.distro
rename to doc/develop/distro.rst
index fa8cec1..c522be6 100644
--- a/doc/README.distro
+++ b/doc/develop/distro.rst
@@ -1,9 +1,4 @@
-SPDX-License-Identifier: GPL-2.0+
-/*
- * (C) Copyright 2014 Red Hat Inc.
- * Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
- * Copyright (C) 2015 K. Merker <merker@debian.org>
- */
+.. SPDX-License-Identifier: GPL-2.0+
Generic Distro Configuration Concept
====================================
@@ -73,9 +68,8 @@
The standard format for boot configuration files is that of extlinux.conf, as
handled by U-Boot's "syslinux" (disk) or "pxe boot" (network). This is roughly
-as specified at:
+as specified at BootLoaderSpec_:
-http://www.freedesktop.org/wiki/Specifications/BootLoaderSpec/
... with the exceptions that the BootLoaderSpec document:
@@ -87,73 +81,70 @@
* Does not document the fdtdir option, which automatically selects the DTB to
pass to the kernel.
-One example extlinux.conf generated by the Fedora installer is:
+One example extlinux.conf generated by the Fedora installer is::
-------------------------------------------------------------
-# extlinux.conf generated by anaconda
+ # extlinux.conf generated by anaconda
-ui menu.c32
+ ui menu.c32
-menu autoboot Welcome to Fedora. Automatic boot in # second{,s}. Press a key for options.
-menu title Fedora Boot Options.
-menu hidden
+ menu autoboot Welcome to Fedora. Automatic boot in # second{,s}. Press a key for options.
+ menu title Fedora Boot Options.
+ menu hidden
-timeout 50
-#totaltimeout 9000
+ timeout 50
+ #totaltimeout 9000
-default Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae) 22 (Rawhide)
+ default Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae) 22 (Rawhide)
-label Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl) 22 (Rawhide)
- kernel /boot/vmlinuz-3.17.0-0.rc4.git2.1.fc22.armv7hl
- append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8 LANG=en_US.UTF-8 drm.debug=0xf
- fdtdir /boot/dtb-3.17.0-0.rc4.git2.1.fc22.armv7hl
- initrd /boot/initramfs-3.17.0-0.rc4.git2.1.fc22.armv7hl.img
+ label Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl) 22 (Rawhide)
+ kernel /boot/vmlinuz-3.17.0-0.rc4.git2.1.fc22.armv7hl
+ append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8 LANG=en_US.UTF-8 drm.debug=0xf
+ fdtdir /boot/dtb-3.17.0-0.rc4.git2.1.fc22.armv7hl
+ initrd /boot/initramfs-3.17.0-0.rc4.git2.1.fc22.armv7hl.img
-label Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae) 22 (Rawhide)
- kernel /boot/vmlinuz-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae
- append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8 LANG=en_US.UTF-8 drm.debug=0xf
- fdtdir /boot/dtb-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae
- initrd /boot/initramfs-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae.img
+ label Fedora (3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae) 22 (Rawhide)
+ kernel /boot/vmlinuz-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae
+ append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8 LANG=en_US.UTF-8 drm.debug=0xf
+ fdtdir /boot/dtb-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae
+ initrd /boot/initramfs-3.17.0-0.rc4.git2.1.fc22.armv7hl+lpae.img
-label Fedora-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc (0-rescue-8f6ba7b039524e0eb957d2c9203f04bc)
- kernel /boot/vmlinuz-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc
- initrd /boot/initramfs-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc.img
- append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8
- fdtdir /boot/dtb-3.16.0-0.rc6.git1.1.fc22.armv7hl+lpae
-------------------------------------------------------------
+ label Fedora-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc (0-rescue-8f6ba7b039524e0eb957d2c9203f04bc)
+ kernel /boot/vmlinuz-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc
+ initrd /boot/initramfs-0-rescue-8f6ba7b039524e0eb957d2c9203f04bc.img
+ append ro root=UUID=8eac677f-8ea8-4270-8479-d5ddbb797450 console=ttyS0,115200n8
+ fdtdir /boot/dtb-3.16.0-0.rc6.git1.1.fc22.armv7hl+lpae
-Another hand-crafted network boot configuration file is:
-------------------------------------------------------------
-TIMEOUT 100
+Another hand-crafted network boot configuration file is::
-MENU TITLE TFTP boot options
+ TIMEOUT 100
-LABEL jetson-tk1-emmc
- MENU LABEL ../zImage root on Jetson TK1 eMMC
- LINUX ../zImage
- FDTDIR ../
- APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=80a5a8e9-c744-491a-93c1-4f4194fd690b
+ MENU TITLE TFTP boot options
-LABEL venice2-emmc
- MENU LABEL ../zImage root on Venice2 eMMC
- LINUX ../zImage
- FDTDIR ../
- APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=5f71e06f-be08-48ed-b1ef-ee4800cc860f
+ LABEL jetson-tk1-emmc
+ MENU LABEL ../zImage root on Jetson TK1 eMMC
+ LINUX ../zImage
+ FDTDIR ../
+ APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=80a5a8e9-c744-491a-93c1-4f4194fd690b
-LABEL sdcard
- MENU LABEL ../zImage, root on 2GB sdcard
- LINUX ../zImage
- FDTDIR ../
- APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=b2f82cda-2535-4779-b467-094a210fbae7
+ LABEL venice2-emmc
+ MENU LABEL ../zImage root on Venice2 eMMC
+ LINUX ../zImage
+ FDTDIR ../
+ APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=5f71e06f-be08-48ed-b1ef-ee4800cc860f
-LABEL fedora-installer-fk
- MENU LABEL Fedora installer w/ Fedora kernel
- LINUX fedora-installer/vmlinuz
- INITRD fedora-installer/initrd.img.orig
- FDTDIR fedora-installer/dtb
- APPEND loglevel=8 ip=dhcp inst.repo=http://10.0.0.2/mirrors/fedora/linux/development/rawhide/armhfp/os/ rd.shell cma=64M
-------------------------------------------------------------
+ LABEL sdcard
+ MENU LABEL ../zImage, root on 2GB sdcard
+ LINUX ../zImage
+ FDTDIR ../
+ APPEND console=ttyS0,115200n8 console=tty1 loglevel=8 rootwait rw earlyprintk root=PARTUUID=b2f82cda-2535-4779-b467-094a210fbae7
+
+ LABEL fedora-installer-fk
+ MENU LABEL Fedora installer w/ Fedora kernel
+ LINUX fedora-installer/vmlinuz
+ INITRD fedora-installer/initrd.img.orig
+ FDTDIR fedora-installer/dtb
+ APPEND loglevel=8 ip=dhcp inst.repo=http://10.0.0.2/mirrors/fedora/linux/development/rawhide/armhfp/os/ rd.shell cma=64M
U-Boot Implementation
=====================
@@ -166,13 +157,11 @@
from Kconfig itself, for e.g. all boards using a specific SoC then
add a "imply DISTRO_DEFAULTS" to your SoC CONFIG option.
-In your board configuration file, include the following:
+In your board configuration file, include the following::
-------------------------------------------------------------
-#ifndef CONFIG_SPL_BUILD
-#include <config_distro_bootcmd.h>
-#endif
-------------------------------------------------------------
+ #ifndef CONFIG_SPL_BUILD
+ #include <config_distro_bootcmd.h>
+ #endif
The first of those headers primarily enables a core set of U-Boot features,
such as support for MBR and GPT partitions, ext* and FAT filesystems, booting
@@ -205,7 +194,6 @@
the user doesn't have to configure them.
fdt_addr:
-
Mandatory for any system that provides the DTB in HW (e.g. ROM) and wishes
to pass that DTB to Linux, rather than loading a DTB from the boot
filesystem. Prohibited for any other system.
@@ -214,7 +202,6 @@
address.
fdt_addr_r:
-
Mandatory. The location in RAM where the DTB will be loaded or copied to when
processing the fdtdir/devicetreedir or fdt/devicetree options in
extlinux.conf.
@@ -225,7 +212,6 @@
A size of 1MB for the FDT/DTB seems reasonable.
fdtfile:
-
Mandatory. the name of the DTB file for the specific board for instance
the espressobin v5 board the value is "marvell/armada-3720-espressobin.dtb"
while on a clearfog pro it is "armada-388-clearfog-pro.dtb" in the case of
@@ -236,16 +222,14 @@
SoC vendor directories.
ramdisk_addr_r:
-
Mandatory. The location in RAM where the initial ramdisk will be loaded to
when processing the initrd option in extlinux.conf.
- It is recommended that this location be highest in RAM out of fdt_addr_,
+ It is recommended that this location be highest in RAM out of fdt_addr_r,
kernel_addr_r, and ramdisk_addr_r, so that the RAM disk can vary in size
and use any available RAM.
kernel_addr_r:
-
Mandatory. The location in RAM where the kernel will be loaded to when
processing the kernel option in the extlinux.conf.
@@ -270,14 +254,12 @@
size has to at least the size of loaded image for decompression to succeed.
pxefile_addr_r:
-
Mandatory. The location in RAM where extlinux.conf will be loaded to prior
to processing.
A size of 1MB for extlinux.conf is more than adequate.
scriptaddr:
-
Mandatory, if the boot script is boot.scr rather than extlinux.conf. The
location in RAM where boot.scr will be loaded to prior to execution.
@@ -292,24 +274,22 @@
Boot Target Configuration
-------------------------
-<config_distro_bootcmd.h> defines $bootcmd and many helper command variables
-that automatically search attached disks for boot configuration files and
-execute them. Boards must provide configure <config_distro_bootcmd.h> so that
-it supports the correct set of possible boot device types. To provide this
+The `config_distro_bootcmd.h` file defines $bootcmd and many helper command
+variables that automatically search attached disks for boot configuration files
+and execute them. Boards must provide configure <config_distro_bootcmd.h> so
+that it supports the correct set of possible boot device types. To provide this
configuration, simply define macro BOOT_TARGET_DEVICES prior to including
-<config_distro_bootcmd.h>. For example:
+<config_distro_bootcmd.h>. For example::
-------------------------------------------------------------
-#ifndef CONFIG_SPL_BUILD
-#define BOOT_TARGET_DEVICES(func) \
- func(MMC, mmc, 1) \
- func(MMC, mmc, 0) \
- func(USB, usb, 0) \
- func(PXE, pxe, na) \
- func(DHCP, dhcp, na)
-#include <config_distro_bootcmd.h>
-#endif
-------------------------------------------------------------
+ #ifndef CONFIG_SPL_BUILD
+ #define BOOT_TARGET_DEVICES(func) \
+ func(MMC, mmc, 1) \
+ func(MMC, mmc, 0) \
+ func(USB, usb, 0) \
+ func(PXE, pxe, na) \
+ func(DHCP, dhcp, na)
+ #include <config_distro_bootcmd.h>
+ #endif
Each entry in the macro defines a single boot device (e.g. a specific eMMC
device or SD card) or type of boot device (e.g. USB disk). The parameters to
@@ -328,7 +308,6 @@
be altered to influence the boot process:
boot_targets:
-
The list of boot locations searched.
Example: mmc0, mmc1, usb, pxe
@@ -336,7 +315,6 @@
Entries may be removed or re-ordered in this list to affect the boot order.
boot_prefixes:
-
For disk-based booting, the list of directories within a partition that are
searched for boot configuration files (extlinux.conf, boot.scr).
@@ -346,7 +324,6 @@
directories which are searched.
boot_scripts:
-
The name of U-Boot style boot.scr files that $bootcmd searches for.
Example: boot.scr.uimg boot.scr
@@ -358,17 +335,14 @@
filenames which are supported.
scan_dev_for_extlinux:
-
If you want to disable extlinux.conf on all disks, set the value to something
innocuous, e.g. setenv scan_dev_for_extlinux true.
scan_dev_for_scripts:
-
If you want to disable boot.scr on all disks, set the value to something
innocuous, e.g. setenv scan_dev_for_scripts true.
boot_net_usb_start:
-
If you want to prevent USB enumeration by distro boot commands which execute
network operations, set the value to something innocuous, e.g. setenv
boot_net_usb_start true. This would be useful if you know your Ethernet
@@ -376,7 +350,6 @@
avoiding unnecessary actions.
boot_net_pci_enum:
-
If you want to prevent PCI enumeration by distro boot commands which execute
network operations, set the value to something innocuous, e.g. setenv
boot_net_pci_enum true. This would be useful if you know your Ethernet
@@ -412,10 +385,12 @@
The list of possible targets consists of:
- network targets
+
* dhcp
* pxe
- storage targets (to which a device number must be appended)
+
* mmc
* sata
* scsi
@@ -428,3 +403,9 @@
way in future u-boot versions. In particular the <device type>_boot
variables (e.g. mmc_boot, usb_boot) are a strictly internal implementation
detail and must not be used as a public interface.
+
+.. _BootLoaderSpec: http://www.freedesktop.org/wiki/Specifications/BootLoaderSpec/
+
+.. sectionauthor:: (C) Copyright 2014 Red Hat Inc.
+.. sectionauthor:: Copyright (c) 2014-2015, NVIDIA CORPORATION. All rights reserved.
+.. sectionauthor:: Copyright (C) 2015 K. Merker <merker@debian.org>
diff --git a/doc/develop/index.rst b/doc/develop/index.rst
index 5e064a4..b3871b1 100644
--- a/doc/develop/index.rst
+++ b/doc/develop/index.rst
@@ -14,6 +14,7 @@
commands
config_binding
devicetree/index
+ distro
driver-model/index
global_data
logging
diff --git a/drivers/ata/sata_ceva.c b/drivers/ata/sata_ceva.c
index 87e6a90..b71f102 100644
--- a/drivers/ata/sata_ceva.c
+++ b/drivers/ata/sata_ceva.c
@@ -212,7 +212,7 @@
if (priv->base == FDT_ADDR_T_NONE)
return -EINVAL;
- ret = dev_read_resource_byname(dev, "ecc-addr", &res_regs);
+ ret = dev_read_resource_byname(dev, "sata-ecc", &res_regs);
if (ret)
priv->ecc_base = 0;
else
diff --git a/drivers/clk/clk_stm32mp1.c b/drivers/clk/clk_stm32mp1.c
index 114192b..83ab6b7 100644
--- a/drivers/clk/clk_stm32mp1.c
+++ b/drivers/clk/clk_stm32mp1.c
@@ -27,12 +27,10 @@
DECLARE_GLOBAL_DATA_PTR;
-#ifndef CONFIG_TFABOOT
-#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
+#if defined(CONFIG_SPL_BUILD)
/* activate clock tree initialization in the driver */
#define STM32MP1_CLOCK_TREE_INIT
#endif
-#endif
#define MAX_HSI_HZ 64000000
diff --git a/drivers/crypto/fsl/fsl_hash.c b/drivers/crypto/fsl/fsl_hash.c
index 8b5c26d..8039473 100644
--- a/drivers/crypto/fsl/fsl_hash.c
+++ b/drivers/crypto/fsl/fsl_hash.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- *
+ * Copyright 2021 NXP
*/
#include <common.h>
@@ -120,8 +120,8 @@
* Perform progressive hashing on the given buffer and copy hash at
* destination buffer
*
- * The context is freed after completion of hash operation.
- *
+ * The context is freed after successful completion of hash operation.
+ * In case of failure, context is not freed.
* @hash_ctx: Pointer to the context for hashing
* @dest_buf: Pointer to the destination buffer where hash is to be copied
* @size: Size of the buffer being hashed
@@ -136,7 +136,6 @@
int i = 0, ret = 0;
if (size < driver_hash[caam_algo].digestsize) {
- free(ctx);
return -EINVAL;
}
@@ -152,11 +151,12 @@
ret = run_descriptor_jr(ctx->sha_desc);
- if (ret)
+ if (ret) {
debug("Error %x\n", ret);
- else
+ return ret;
+ } else {
memcpy(dest_buf, ctx->hash, sizeof(ctx->hash));
-
+ }
free(ctx);
return ret;
}
diff --git a/drivers/ddr/fsl/fsl_ddr_gen4.c b/drivers/ddr/fsl/fsl_ddr_gen4.c
index e43c680..89cb4d3 100644
--- a/drivers/ddr/fsl/fsl_ddr_gen4.c
+++ b/drivers/ddr/fsl/fsl_ddr_gen4.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright 2014-2020 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
*/
#include <common.h>
@@ -57,7 +58,8 @@
struct ccsr_ddr __iomem *ddr;
u32 temp32;
u32 total_gb_size_per_controller;
- int timeout;
+ int timeout = 0;
+ int ddr_freq_for_timeout = 0;
int mod_bnds = 0;
#ifdef CONFIG_SYS_FSL_ERRATUM_A008511
@@ -511,8 +513,14 @@
*/
bus_width = 3 - ((ddr_in32(&ddr->sdram_cfg) & SDRAM_CFG_DBW_MASK)
>> SDRAM_CFG_DBW_SHIFT);
- timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 /
- (get_ddr_freq(ctrl_num) >> 20)) << 2;
+ ddr_freq_for_timeout = (get_ddr_freq(ctrl_num) >> 20) << 2;
+ if (ddr_freq_for_timeout) {
+ timeout = ((total_gb_size_per_controller <<
+ (6 - bus_width)) * 100 /
+ ddr_freq_for_timeout);
+ } else {
+ debug("Error in getting timeout.\n");
+ }
total_gb_size_per_controller >>= 4; /* shift down to gb size */
debug("total %d GB\n", total_gb_size_per_controller);
debug("Need to wait up to %d * 10ms\n", timeout);
diff --git a/drivers/ddr/fsl/lc_common_dimm_params.c b/drivers/ddr/fsl/lc_common_dimm_params.c
index d299d76..d738ae3 100644
--- a/drivers/ddr/fsl/lc_common_dimm_params.c
+++ b/drivers/ddr/fsl/lc_common_dimm_params.c
@@ -1,7 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2008-2016 Freescale Semiconductor, Inc.
- * Copyright 2017-2018 NXP Semiconductor
+ * Copyright 2017-2021 NXP Semiconductor
*/
#include <common.h>
@@ -23,7 +23,7 @@
unsigned int caslat_actual;
unsigned int retry = 16;
unsigned int tmp = ~0;
- const unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num);
+ unsigned int mclk_ps = get_memory_clk_period_ps(ctrl_num);
#ifdef CONFIG_SYS_FSL_DDR3
const unsigned int taamax = 20000;
#else
@@ -37,6 +37,12 @@
}
common_caslat = tmp;
+ if (!mclk_ps) {
+ printf("DDR clock (MCLK cycle was 0 ps), So setting it to slowest DIMM(s) (tCKmin %u ps).\n",
+ outpdimm->tckmin_x_ps);
+ mclk_ps = outpdimm->tckmin_x_ps;
+ }
+
/* validate if the memory clk is in the range of dimms */
if (mclk_ps < outpdimm->tckmin_x_ps) {
printf("DDR clock (MCLK cycle %u ps) is faster than "
diff --git a/drivers/ddr/fsl/main.c b/drivers/ddr/fsl/main.c
index 8e14716..f389e5e 100644
--- a/drivers/ddr/fsl/main.c
+++ b/drivers/ddr/fsl/main.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2008-2014 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
*/
/*
@@ -297,9 +298,13 @@
unsigned int s = __ilog2(step);
- if ((1 << s) != step)
- return step_string_tbl[7];
-
+ if (s <= 31) {
+ if ((1 << s) != step)
+ return step_string_tbl[7];
+ } else {
+ if ((1 << (s - 32)) != step)
+ return step_string_tbl[7];
+ }
if (s >= ARRAY_SIZE(step_string_tbl)) {
printf("Error for the step in %s\n", __func__);
s = 0;
diff --git a/drivers/ddr/fsl/util.c b/drivers/ddr/fsl/util.c
index ac4f8d2..43cb018 100644
--- a/drivers/ddr/fsl/util.c
+++ b/drivers/ddr/fsl/util.c
@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright 2008-2014 Freescale Semiconductor, Inc.
+ * Copyright 2021 NXP
*/
#include <common.h>
@@ -75,10 +76,13 @@
/* Round to nearest 10ps, being careful about 64-bit multiply/divide */
unsigned long long rem, mclk_ps = ULL_2E12;
-
- /* Now perform the big divide, the result fits in 32-bits */
- rem = do_div(mclk_ps, data_rate);
- result = (rem >= (data_rate >> 1)) ? mclk_ps + 1 : mclk_ps;
+ if (data_rate) {
+ /* Now perform the big divide, the result fits in 32-bits */
+ rem = do_div(mclk_ps, data_rate);
+ result = (rem >= (data_rate >> 1)) ? mclk_ps + 1 : mclk_ps;
+ } else {
+ result = 0;
+ }
return result;
}
diff --git a/drivers/gpio/stm32_gpio.c b/drivers/gpio/stm32_gpio.c
index 125c237..8667ed3 100644
--- a/drivers/gpio/stm32_gpio.c
+++ b/drivers/gpio/stm32_gpio.c
@@ -11,7 +11,6 @@
#include <dm.h>
#include <fdtdec.h>
#include <log.h>
-#include <asm/arch/gpio.h>
#include <asm/arch/stm32.h>
#include <asm/gpio.h>
#include <asm/io.h>
@@ -20,6 +19,8 @@
#include <linux/errno.h>
#include <linux/io.h>
+#include "stm32_gpio_priv.h"
+
#define STM32_GPIOS_PER_BANK 16
#define MODE_BITS(gpio_pin) ((gpio_pin) * 2)
diff --git a/arch/arm/include/asm/arch-stm32/gpio.h b/drivers/gpio/stm32_gpio_priv.h
similarity index 94%
rename from arch/arm/include/asm/arch-stm32/gpio.h
rename to drivers/gpio/stm32_gpio_priv.h
index 233ce27..d3d8f2e 100644
--- a/arch/arm/include/asm/arch-stm32/gpio.h
+++ b/drivers/gpio/stm32_gpio_priv.h
@@ -4,8 +4,8 @@
* Author(s): Vikas Manocha, <vikas.manocha@st.com> for STMicroelectronics.
*/
-#ifndef _GPIO_H_
-#define _GPIO_H_
+#ifndef _STM32_GPIO_PRIV_H_
+#define _STM32_GPIO_PRIV_H_
enum stm32_gpio_mode {
STM32_GPIO_MODE_IN = 0,
@@ -83,4 +83,4 @@
int stm32_offset_to_index(struct udevice *dev, unsigned int offset);
-#endif /* _GPIO_H_ */
+#endif /* _STM32_GPIO_PRIV_H_ */
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 6c12959..c1a4917 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -344,6 +344,16 @@
help
This driver support the Freescale FMan Ethernet controller
+config SYS_FMAN_FW_ADDR
+ hex "FMAN Firmware Address"
+ depends on FMAN_ENET
+ default 0x0
+
+config SYS_QE_FMAN_FW_LENGTH
+ hex "FMAN QE Firmware length"
+ depends on FMAN_ENET || QE || U_QE
+ default 0x10000
+
config FTMAC100
bool "Ftmac100 Ethernet Support"
help
@@ -440,7 +450,6 @@
config MACB
bool "Cadence MACB/GEM Ethernet Interface"
- depends on DM_ETH
select PHYLIB
help
The Cadence MACB ethernet interface is found on many Atmel
diff --git a/drivers/net/fsl-mc/mc.c b/drivers/net/fsl-mc/mc.c
index d52c986..bc1c31d 100644
--- a/drivers/net/fsl-mc/mc.c
+++ b/drivers/net/fsl-mc/mc.c
@@ -11,6 +11,7 @@
#include <image.h>
#include <log.h>
#include <malloc.h>
+#include <mapmem.h>
#include <asm/global_data.h>
#include <linux/bug.h>
#include <asm/io.h>
@@ -38,6 +39,16 @@
#define MC_BOOT_ENV_VAR "mcinitcmd"
#define MC_DRAM_BLOCK_DEFAULT_SIZE (512UL * 1024 * 1024)
+#define MC_BUFFER_SIZE (1024 * 1024 * 16)
+#define MAGIC_MC 0x4d430100
+#define MC_FW_ADDR_MASK_LOW 0xE0000000
+#define MC_FW_ADDR_MASK_HIGH 0X1FFFF
+#define MC_STRUCT_BUFFER_OFFSET 0x01000000
+#define MC_OFFSET_DELTA MC_STRUCT_BUFFER_OFFSET
+
+#define LOG_HEADER_FLAG_BUFFER_WRAPAROUND 0x80000000
+#define LAST_BYTE(a) ((a) & ~(LOG_HEADER_FLAG_BUFFER_WRAPAROUND))
+
DECLARE_GLOBAL_DATA_PTR;
static int mc_memset_resv_ram;
static struct mc_version mc_ver_info;
@@ -1773,11 +1784,78 @@
return err;
}
+static void print_k_bytes(const void *buf, ssize_t *size)
+{
+ while (*size > 0) {
+ int count = printf("%s", (char *)buf);
+
+ buf += count;
+ *size -= count;
+ }
+}
+
+static void mc_dump_log(void)
+{
+ struct mc_ccsr_registers __iomem *mc_ccsr_regs = MC_CCSR_BASE_ADDR;
+ u64 high = in_le64(&mc_ccsr_regs->reg_mcfbahr) & MC_FW_ADDR_MASK_HIGH;
+ u64 low = in_le64(&mc_ccsr_regs->reg_mcfbalr) & MC_FW_ADDR_MASK_LOW;
+ u32 buf_len, wrapped, last_byte, magic, buf_start;
+ u64 mc_addr = (high << 32) | low;
+ struct log_header *header;
+ ssize_t size, bytes_end;
+ const void *end_of_data;
+ const void *map_addr;
+ const void *end_addr;
+ const void *cur_ptr;
+ const void *buf;
+
+ map_addr = map_sysmem(mc_addr + MC_STRUCT_BUFFER_OFFSET,
+ MC_BUFFER_SIZE);
+ header = (struct log_header *)map_addr;
+ last_byte = in_le32(&header->last_byte);
+ buf_len = in_le32(&header->buf_length);
+ magic = in_le32(&header->magic_word);
+ buf_start = in_le32(&header->buf_start);
+ buf = map_addr + buf_start - MC_OFFSET_DELTA;
+ end_addr = buf + buf_len;
+ wrapped = last_byte & LOG_HEADER_FLAG_BUFFER_WRAPAROUND;
+ end_of_data = buf + LAST_BYTE(last_byte);
+
+ if (magic != MAGIC_MC) {
+ puts("Magic number is not valid\n");
+ printf("expected = %08x, received = %08x\n", MAGIC_MC, magic);
+ goto err_magic;
+ }
+
+ if (wrapped && end_of_data != end_addr)
+ cur_ptr = end_of_data + 1;
+ else
+ cur_ptr = buf;
+
+ if (cur_ptr <= end_of_data)
+ size = end_of_data - cur_ptr;
+ else
+ size = (end_addr - cur_ptr) + (end_of_data - buf);
+
+ bytes_end = end_addr - cur_ptr;
+ if (size > bytes_end) {
+ print_k_bytes(cur_ptr, &bytes_end);
+
+ cur_ptr = buf;
+ size -= bytes_end;
+ }
+
+ print_k_bytes(buf, &size);
+
+err_magic:
+ unmap_sysmem(map_addr);
+}
+
static int do_fsl_mc(struct cmd_tbl *cmdtp, int flag, int argc,
char *const argv[])
{
int err = 0;
- if (argc < 3)
+ if (argc < 2)
goto usage;
switch (argv[1][0]) {
@@ -1787,6 +1865,8 @@
#ifdef CONFIG_SYS_LS_MC_DRAM_AIOP_IMG_OFFSET
u64 aiop_fw_addr;
#endif
+ if (argc < 3)
+ goto usage;
sub_cmd = argv[2][0];
@@ -1918,6 +1998,12 @@
}
break;
}
+ case 'd':
+ if (argc > 2)
+ goto usage;
+
+ mc_dump_log();
+ break;
default:
printf("Invalid option: %s\n", argv[1]);
goto usage;
@@ -1936,6 +2022,7 @@
"fsl_mc lazyapply DPL [DPL_addr] - Apply DPL file on exit\n"
"fsl_mc apply spb [spb_addr] - Apply SPB Soft Parser Blob\n"
"fsl_mc start aiop [FW_addr] - Start AIOP\n"
+ "fsl_mc dump_log - Dump MC Log\n"
);
void mc_env_boot(void)
diff --git a/drivers/pci/pcie_layerscape_fixup.c b/drivers/pci/pcie_layerscape_fixup.c
index a58e7a3..8a2a0e1 100644
--- a/drivers/pci/pcie_layerscape_fixup.c
+++ b/drivers/pci/pcie_layerscape_fixup.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2017-2020 NXP
+ * Copyright 2017-2021 NXP
* Copyright 2014-2015 Freescale Semiconductor, Inc.
* Layerscape PCIe driver
*/
@@ -24,6 +24,8 @@
#include "pcie_layerscape.h"
#include "pcie_layerscape_fixup_common.h"
+int next_stream_id;
+
static int fdt_pcie_get_nodeoffset(void *blob, struct ls_pcie_rc *pcie_rc)
{
int nodeoffset;
@@ -607,6 +609,9 @@
{
ft_pcie_ep_fix(blob, pcie_rc);
ft_pcie_rc_fix(blob, pcie_rc);
+
+ pcie_rc->stream_id_cur = 0;
+ pcie_rc->next_lut_index = 0;
}
/* Fixup Kernel DT for PCIe */
@@ -618,6 +623,7 @@
ft_pcie_ls_setup(blob, pcie_rc);
#if defined(CONFIG_FSL_LSCH3) || defined(CONFIG_FSL_LSCH2)
+ next_stream_id = FSL_PEX_STREAM_ID_START;
fdt_fixup_pcie_ls(blob);
#endif
}
diff --git a/drivers/pci/pcie_layerscape_fixup_common.c b/drivers/pci/pcie_layerscape_fixup_common.c
index 3216a20..faccf6c 100644
--- a/drivers/pci/pcie_layerscape_fixup_common.c
+++ b/drivers/pci/pcie_layerscape_fixup_common.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2019-2020 NXP
+ * Copyright 2019-2021 NXP
*
* PCIe DT fixup for NXP Layerscape SoCs
* Author: Wasim Khan <wasim.khan@nxp.com>
@@ -15,6 +15,8 @@
#include <fdt_support.h>
#include "pcie_layerscape_fixup_common.h"
+extern int next_stream_id;
+
void ft_pci_setup(void *blob, struct bd_info *bd)
{
#if defined(CONFIG_PCIE_LAYERSCAPE_GEN4)
@@ -147,8 +149,6 @@
/* returns the next available streamid for pcie, -errno if failed */
int pcie_next_streamid(int currentid, int idx)
{
- static int next_stream_id = FSL_PEX_STREAM_ID_START;
-
if (next_stream_id > FSL_PEX_STREAM_ID_END)
return -EINVAL;
diff --git a/drivers/pci/pcie_layerscape_gen4.c b/drivers/pci/pcie_layerscape_gen4.c
index 255e731..6ecdd6a 100644
--- a/drivers/pci/pcie_layerscape_gen4.c
+++ b/drivers/pci/pcie_layerscape_gen4.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
*
* PCIe Gen4 driver for NXP Layerscape SoCs
* Author: Hou Zhiqiang <Minder.Hou@gmail.com>
@@ -305,8 +305,6 @@
ccsr_writel(pcie, PAB_AXI_PIO_CTRL(0), val);
ls_pcie_g4_setup_wins(pcie);
-
- pcie->stream_id_cur = 0;
}
static void ls_pcie_g4_ep_inbound_win_set(struct ls_pcie_g4 *pcie, int pf,
diff --git a/drivers/pci/pcie_layerscape_gen4_fixup.c b/drivers/pci/pcie_layerscape_gen4_fixup.c
index e9ee155..7d11234 100644
--- a/drivers/pci/pcie_layerscape_gen4_fixup.c
+++ b/drivers/pci/pcie_layerscape_gen4_fixup.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+ OR X11
/*
- * Copyright 2018-2020 NXP
+ * Copyright 2018-2021 NXP
*
* PCIe Gen4 driver for NXP Layerscape SoCs
* Author: Hou Zhiqiang <Minder.Hou@gmail.com>
@@ -223,6 +223,9 @@
{
ft_pcie_rc_layerscape_gen4_fix(blob, pcie);
ft_pcie_ep_layerscape_gen4_fix(blob, pcie);
+
+ pcie->stream_id_cur = 0;
+ pcie->next_lut_index = 0;
}
/* Fixup Kernel DT for PCIe */
diff --git a/drivers/pci/pcie_layerscape_rc.c b/drivers/pci/pcie_layerscape_rc.c
index f50d6ef..17969e2 100644
--- a/drivers/pci/pcie_layerscape_rc.c
+++ b/drivers/pci/pcie_layerscape_rc.c
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
/*
- * Copyright 2020 NXP
+ * Copyright 2020,2021 NXP
* Layerscape PCIe driver
*/
@@ -21,6 +21,12 @@
DECLARE_GLOBAL_DATA_PTR;
+struct ls_pcie_drvdata {
+ u32 lut_offset;
+ u32 ctrl_offset;
+ bool big_endian;
+};
+
static void ls_pcie_cfg0_set_busdev(struct ls_pcie_rc *pcie_rc, u32 busdev)
{
struct ls_pcie *pcie = pcie_rc->pcie;
@@ -238,11 +244,11 @@
ls_pcie_dbi_ro_wr_dis(pcie);
ls_pcie_disable_bars(pcie_rc);
- pcie_rc->stream_id_cur = 0;
}
static int ls_pcie_probe(struct udevice *dev)
{
+ const struct ls_pcie_drvdata *drvdata = (void *)dev_get_driver_data(dev);
struct ls_pcie_rc *pcie_rc = dev_get_priv(dev);
const void *fdt = gd->fdt_blob;
int node = dev_of_offset(dev);
@@ -260,8 +266,12 @@
pcie_rc->pcie = pcie;
+ /* try resource name of the official binding first */
ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
- "dbi", &pcie_rc->dbi_res);
+ "regs", &pcie_rc->dbi_res);
+ if (ret)
+ ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+ "dbi", &pcie_rc->dbi_res);
if (ret) {
printf("ls-pcie: resource \"dbi\" not found\n");
return ret;
@@ -287,21 +297,29 @@
if (pcie->mode == PCI_HEADER_TYPE_NORMAL)
return 0;
- ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
- "lut", &pcie_rc->lut_res);
- if (!ret)
- pcie->lut = map_physmem(pcie_rc->lut_res.start,
- fdt_resource_size(&pcie_rc->lut_res),
- MAP_NOCACHE);
+ if (drvdata) {
+ pcie->lut = pcie->dbi + drvdata->lut_offset;
+ } else {
+ ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+ "lut", &pcie_rc->lut_res);
+ if (!ret)
+ pcie->lut = map_physmem(pcie_rc->lut_res.start,
+ fdt_resource_size(&pcie_rc->lut_res),
+ MAP_NOCACHE);
+ }
- ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
- "ctrl", &pcie_rc->ctrl_res);
- if (!ret)
- pcie->ctrl = map_physmem(pcie_rc->ctrl_res.start,
- fdt_resource_size(&pcie_rc->ctrl_res),
- MAP_NOCACHE);
- if (!pcie->ctrl)
- pcie->ctrl = pcie->lut;
+ if (drvdata) {
+ pcie->ctrl = pcie->lut + drvdata->ctrl_offset;
+ } else {
+ ret = fdt_get_named_resource(fdt, node, "reg", "reg-names",
+ "ctrl", &pcie_rc->ctrl_res);
+ if (!ret)
+ pcie->ctrl = map_physmem(pcie_rc->ctrl_res.start,
+ fdt_resource_size(&pcie_rc->ctrl_res),
+ MAP_NOCACHE);
+ if (!pcie->ctrl)
+ pcie->ctrl = pcie->lut;
+ }
if (!pcie->ctrl) {
printf("%s: NOT find CTRL\n", dev->name);
@@ -343,7 +361,10 @@
pcie_rc->cfg1 = pcie_rc->cfg0 +
fdt_resource_size(&pcie_rc->cfg_res) / 2;
- pcie->big_endian = fdtdec_get_bool(fdt, node, "big-endian");
+ if (drvdata)
+ pcie->big_endian = drvdata->big_endian;
+ else
+ pcie->big_endian = fdtdec_get_bool(fdt, node, "big-endian");
debug("%s dbi:%lx lut:%lx ctrl:0x%lx cfg0:0x%lx, big-endian:%d\n",
dev->name, (unsigned long)pcie->dbi, (unsigned long)pcie->lut,
@@ -373,8 +394,15 @@
.write_config = ls_pcie_write_config,
};
+static const struct ls_pcie_drvdata ls1028a_drvdata = {
+ .lut_offset = 0x80000,
+ .ctrl_offset = 0x40000,
+ .big_endian = false,
+};
+
static const struct udevice_id ls_pcie_ids[] = {
{ .compatible = "fsl,ls-pcie" },
+ { .compatible = "fsl,ls1028a-pcie", .data = (ulong)&ls1028a_drvdata },
{ }
};
diff --git a/drivers/pinctrl/pinctrl_stm32.c b/drivers/pinctrl/pinctrl_stm32.c
index 6c98538..5729799 100644
--- a/drivers/pinctrl/pinctrl_stm32.c
+++ b/drivers/pinctrl/pinctrl_stm32.c
@@ -10,7 +10,6 @@
#include <hwspinlock.h>
#include <log.h>
#include <malloc.h>
-#include <asm/arch/gpio.h>
#include <asm/gpio.h>
#include <asm/io.h>
#include <dm/device_compat.h>
@@ -20,6 +19,8 @@
#include <linux/err.h>
#include <linux/libfdt.h>
+#include "../gpio/stm32_gpio_priv.h"
+
#define MAX_PINS_ONE_IP 70
#define MODE_BITS_MASK 3
#define OSPEED_MASK 3
diff --git a/drivers/qe/Kconfig b/drivers/qe/Kconfig
index 553ed57..c44a81f 100644
--- a/drivers/qe/Kconfig
+++ b/drivers/qe/Kconfig
@@ -18,6 +18,10 @@
help
Choose this option to add support for U QUICC Engine.
+config SYS_QE_FW_ADDR
+ hex "QE Firmware Address"
+ depends on FMAN_ENET || QE || U_QE
+ default 0x0
choice
prompt "QUICC Engine FMan ethernet firmware location"
depends on FMAN_ENET || QE
diff --git a/drivers/ram/stm32mp1/stm32mp1_ram.c b/drivers/ram/stm32mp1/stm32mp1_ram.c
index 26f0b4f..98fa1f4 100644
--- a/drivers/ram/stm32mp1/stm32mp1_ram.c
+++ b/drivers/ram/stm32mp1/stm32mp1_ram.c
@@ -202,17 +202,16 @@
priv->info.base = STM32_DDR_BASE;
-#if !defined(CONFIG_TFABOOT) && \
- (!defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD))
- priv->info.size = 0;
- ret = stm32mp1_ddr_setup(dev);
+ if (IS_ENABLED(CONFIG_SPL_BUILD)) {
+ priv->info.size = 0;
+ ret = stm32mp1_ddr_setup(dev);
- return log_ret(ret);
-#else
+ return log_ret(ret);
+ }
+
ofnode node = stm32mp1_ddr_get_ofnode(dev);
priv->info.size = ofnode_read_u32_default(node, "st,mem-size", 0);
return 0;
-#endif
}
static int stm32mp1_ddr_get_info(struct udevice *dev, struct ram_info *info)
diff --git a/drivers/rtc/ds1337.c b/drivers/rtc/ds1337.c
index 4986c96..486c01f 100644
--- a/drivers/rtc/ds1337.c
+++ b/drivers/rtc/ds1337.c
@@ -306,7 +306,7 @@
static const struct udevice_id ds1337_rtc_ids[] = {
{ .compatible = "ds1337" },
{ .compatible = "ds1338" },
- { .compatible = "ds1338" },
+ { .compatible = "ds1339" },
{ }
};
diff --git a/drivers/serial/serial_lpuart.c b/drivers/serial/serial_lpuart.c
index 2b473d7..3c9a695 100644
--- a/drivers/serial/serial_lpuart.c
+++ b/drivers/serial/serial_lpuart.c
@@ -553,6 +553,8 @@
static const struct udevice_id lpuart_serial_ids[] = {
{ .compatible = "fsl,ls1021a-lpuart", .data =
LPUART_FLAG_REGMAP_32BIT_REG | LPUART_FLAG_REGMAP_ENDIAN_BIG },
+ { .compatible = "fsl,ls1028a-lpuart",
+ .data = LPUART_FLAG_REGMAP_32BIT_REG },
{ .compatible = "fsl,imx7ulp-lpuart",
.data = LPUART_FLAG_REGMAP_32BIT_REG },
{ .compatible = "fsl,vf610-lpuart"},
diff --git a/drivers/spi/fsl_dspi.c b/drivers/spi/fsl_dspi.c
index 8fe3508..62444e4 100644
--- a/drivers/spi/fsl_dspi.c
+++ b/drivers/spi/fsl_dspi.c
@@ -586,8 +586,9 @@
if (fdtdec_get_bool(blob, node, "big-endian"))
plat->flags |= DSPI_FLAG_REGMAP_ENDIAN_BIG;
- plat->num_chipselect =
- fdtdec_get_int(blob, node, "num-cs", FSL_DSPI_MAX_CHIPSELECT);
+ plat->num_chipselect = fdtdec_get_int(blob, node,
+ "spi-num-chipselects",
+ FSL_DSPI_MAX_CHIPSELECT);
addr = dev_read_addr(bus);
if (addr == FDT_ADDR_T_NONE) {
@@ -654,6 +655,7 @@
static const struct udevice_id fsl_dspi_ids[] = {
{ .compatible = "fsl,vf610-dspi" },
+ { .compatible = "fsl,ls1021a-v1.0-dspi" },
{ }
};
diff --git a/drivers/usb/common/common.c b/drivers/usb/common/common.c
index 43564c9..ee0c064 100644
--- a/drivers/usb/common/common.c
+++ b/drivers/usb/common/common.c
@@ -29,7 +29,7 @@
dr_mode = ofnode_read_string(node, "dr_mode");
if (!dr_mode) {
- pr_err("usb dr_mode not found\n");
+ pr_debug("usb dr_mode not found\n");
return USB_DR_MODE_UNKNOWN;
}
@@ -64,7 +64,7 @@
max_speed = ofnode_read_string(node, "maximum-speed");
if (!max_speed) {
- pr_err("usb maximum-speed not found\n");
+ pr_debug("usb maximum-speed not found\n");
return USB_SPEED_UNKNOWN;
}
diff --git a/drivers/usb/dwc3/Kconfig b/drivers/usb/dwc3/Kconfig
index 93707e0..62aa65b 100644
--- a/drivers/usb/dwc3/Kconfig
+++ b/drivers/usb/dwc3/Kconfig
@@ -53,6 +53,16 @@
Support of USB2/3 functionality in Socionext UniPhier platforms.
Say 'Y' here if you have one such device.
+config USB_DWC3_LAYERSCAPE
+ bool "Freescale Layerscape platform support"
+ depends on DM_USB && USB_DWC3
+ depends on !USB_XHCI_FSL
+ help
+ Select this for Freescale Layerscape Platforms.
+
+ Host and Peripheral operation modes are supported. OTG is not
+ supported.
+
menu "PHY Subsystem"
config USB_DWC3_PHY_OMAP
diff --git a/drivers/usb/dwc3/Makefile b/drivers/usb/dwc3/Makefile
index 6e3e024..0dd1ba8 100644
--- a/drivers/usb/dwc3/Makefile
+++ b/drivers/usb/dwc3/Makefile
@@ -11,5 +11,6 @@
obj-$(CONFIG_USB_DWC3_MESON_GXL) += dwc3-meson-gxl.o
obj-$(CONFIG_USB_DWC3_GENERIC) += dwc3-generic.o
obj-$(CONFIG_USB_DWC3_UNIPHIER) += dwc3-uniphier.o
+obj-$(CONFIG_USB_DWC3_LAYERSCAPE) += dwc3-layerscape.o
obj-$(CONFIG_USB_DWC3_PHY_OMAP) += ti_usb_phy.o
obj-$(CONFIG_USB_DWC3_PHY_SAMSUNG) += samsung_usb_phy.o
diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
index dfd7cf6..ce1c0e8 100644
--- a/drivers/usb/dwc3/core.c
+++ b/drivers/usb/dwc3/core.c
@@ -93,6 +93,27 @@
return 0;
}
+/*
+ * dwc3_frame_length_adjustment - Adjusts frame length if required
+ * @dwc3: Pointer to our controller context structure
+ * @fladj: Value of GFLADJ_30MHZ to adjust frame length
+ */
+static void dwc3_frame_length_adjustment(struct dwc3 *dwc, u32 fladj)
+{
+ u32 reg;
+
+ if (dwc->revision < DWC3_REVISION_250A)
+ return;
+
+ if (fladj == 0)
+ return;
+
+ reg = dwc3_readl(dwc->regs, DWC3_GFLADJ);
+ reg &= ~DWC3_GFLADJ_30MHZ_MASK;
+ reg |= DWC3_GFLADJ_30MHZ_SDBND_SEL | fladj;
+ dwc3_writel(dwc->regs, DWC3_GFLADJ, reg);
+}
+
/**
* dwc3_free_one_event_buffer - Frees one event buffer
* @dwc: Pointer to our controller context structure
@@ -441,6 +462,53 @@
mdelay(100);
}
+/* set global incr burst type configuration registers */
+static void dwc3_set_incr_burst_type(struct dwc3 *dwc)
+{
+ struct udevice *dev = dwc->dev;
+ u32 cfg;
+
+ if (!dwc->incrx_size)
+ return;
+
+ cfg = dwc3_readl(dwc->regs, DWC3_GSBUSCFG0);
+
+ /* Enable Undefined Length INCR Burst and Enable INCRx Burst */
+ cfg &= ~DWC3_GSBUSCFG0_INCRBRST_MASK;
+ if (dwc->incrx_mode)
+ cfg |= DWC3_GSBUSCFG0_INCRBRSTENA;
+ switch (dwc->incrx_size) {
+ case 256:
+ cfg |= DWC3_GSBUSCFG0_INCR256BRSTENA;
+ break;
+ case 128:
+ cfg |= DWC3_GSBUSCFG0_INCR128BRSTENA;
+ break;
+ case 64:
+ cfg |= DWC3_GSBUSCFG0_INCR64BRSTENA;
+ break;
+ case 32:
+ cfg |= DWC3_GSBUSCFG0_INCR32BRSTENA;
+ break;
+ case 16:
+ cfg |= DWC3_GSBUSCFG0_INCR16BRSTENA;
+ break;
+ case 8:
+ cfg |= DWC3_GSBUSCFG0_INCR8BRSTENA;
+ break;
+ case 4:
+ cfg |= DWC3_GSBUSCFG0_INCR4BRSTENA;
+ break;
+ case 1:
+ break;
+ default:
+ dev_err(dev, "Invalid property\n");
+ break;
+ }
+
+ dwc3_writel(dwc->regs, DWC3_GSBUSCFG0, cfg);
+}
+
/**
* dwc3_core_init - Low-level initialization of DWC3 Core
* @dwc: Pointer to our controller context structure
@@ -569,6 +637,11 @@
if (ret)
goto err1;
+ /* Adjust Frame Length */
+ dwc3_frame_length_adjustment(dwc, dwc->fladj);
+
+ dwc3_set_incr_burst_type(dwc);
+
return 0;
err1:
@@ -892,6 +965,8 @@
u8 lpm_nyet_threshold;
u8 tx_de_emphasis;
u8 hird_threshold;
+ u32 val;
+ int i;
/* default to highest possible threshold */
lpm_nyet_threshold = 0xff;
@@ -958,6 +1033,26 @@
dwc->hird_threshold = hird_threshold
| (dwc->is_utmi_l1_suspend << 4);
+
+ dev_read_u32(dev, "snps,quirk-frame-length-adjustment", &dwc->fladj);
+
+ /*
+ * Handle property "snps,incr-burst-type-adjustment".
+ * Get the number of value from this property:
+ * result <= 0, means this property is not supported.
+ * result = 1, means INCRx burst mode supported.
+ * result > 1, means undefined length burst mode supported.
+ */
+ dwc->incrx_mode = INCRX_BURST_MODE;
+ dwc->incrx_size = 0;
+ for (i = 0; i < 8; i++) {
+ if (dev_read_u32_index(dev, "snps,incr-burst-type-adjustment",
+ i, &val))
+ break;
+
+ dwc->incrx_mode = INCRX_UNDEF_LENGTH_BURST_MODE;
+ dwc->incrx_size = max(dwc->incrx_size, val);
+ }
}
int dwc3_init(struct dwc3 *dwc)
diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
index 1502cb8..d7cce3a 100644
--- a/drivers/usb/dwc3/core.h
+++ b/drivers/usb/dwc3/core.h
@@ -115,6 +115,7 @@
#define DWC3_GEVNTCOUNT(n) (0xc40c + (n * 0x10))
#define DWC3_GHWPARAMS8 0xc600
+#define DWC3_GFLADJ 0xc630
/* Device Registers */
#define DWC3_DCFG 0xc700
@@ -138,6 +139,17 @@
/* Bit fields */
+/* Global SoC Bus Configuration INCRx Register 0 */
+#define DWC3_GSBUSCFG0_INCR256BRSTENA (1 << 7) /* INCR256 burst */
+#define DWC3_GSBUSCFG0_INCR128BRSTENA (1 << 6) /* INCR128 burst */
+#define DWC3_GSBUSCFG0_INCR64BRSTENA (1 << 5) /* INCR64 burst */
+#define DWC3_GSBUSCFG0_INCR32BRSTENA (1 << 4) /* INCR32 burst */
+#define DWC3_GSBUSCFG0_INCR16BRSTENA (1 << 3) /* INCR16 burst */
+#define DWC3_GSBUSCFG0_INCR8BRSTENA (1 << 2) /* INCR8 burst */
+#define DWC3_GSBUSCFG0_INCR4BRSTENA (1 << 1) /* INCR4 burst */
+#define DWC3_GSBUSCFG0_INCRBRSTENA (1 << 0) /* undefined length enable */
+#define DWC3_GSBUSCFG0_INCRBRST_MASK 0xff
+
/* Global Configuration Register */
#define DWC3_GCTL_PWRDNSCALE(n) ((n) << 19)
#define DWC3_GCTL_U2RSTECN (1 << 16)
@@ -233,6 +245,10 @@
/* Global HWPARAMS6 Register */
#define DWC3_GHWPARAMS6_EN_FPGA (1 << 7)
+/* Global Frame Length Adjustment Register */
+#define DWC3_GFLADJ_30MHZ_SDBND_SEL (1 << 7)
+#define DWC3_GFLADJ_30MHZ_MASK 0x3f
+
/* Device Configuration Register */
#define DWC3_DCFG_DEVADDR(addr) ((addr) << 3)
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
@@ -812,6 +828,9 @@
u8 test_mode_nr;
u8 lpm_nyet_threshold;
u8 hird_threshold;
+ u32 fladj;
+ u8 incrx_mode;
+ u32 incrx_size;
unsigned delayed_status:1;
unsigned ep0_bounced:1;
@@ -849,6 +868,9 @@
struct list_head list;
};
+#define INCRX_BURST_MODE 0
+#define INCRX_UNDEF_LENGTH_BURST_MODE 1
+
/* -------------------------------------------------------------------------- */
/* -------------------------------------------------------------------------- */
diff --git a/drivers/usb/dwc3/dwc3-layerscape.c b/drivers/usb/dwc3/dwc3-layerscape.c
new file mode 100644
index 0000000..79cf71f
--- /dev/null
+++ b/drivers/usb/dwc3/dwc3-layerscape.c
@@ -0,0 +1,222 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Layerscape DWC3 Glue layer
+ *
+ * Copyright (C) 2021 Michael Walle <michael@walle.cc>
+ *
+ * Based on dwc3-generic.c.
+ */
+
+#include <common.h>
+#include <dm.h>
+#include <dm/device_compat.h>
+#include <dm/device-internal.h>
+#include <dm/lists.h>
+#include <dwc3-uboot.h>
+#include <linux/usb/gadget.h>
+#include <usb.h>
+#include "core.h"
+#include "gadget.h"
+#include <usb/xhci.h>
+
+struct dwc3_layerscape_plat {
+ fdt_addr_t base;
+ u32 maximum_speed;
+ enum usb_dr_mode dr_mode;
+};
+
+struct dwc3_layerscape_priv {
+ void *base;
+ struct dwc3 dwc3;
+ struct phy_bulk phys;
+};
+
+struct dwc3_layerscape_host_priv {
+ struct xhci_ctrl xhci_ctrl;
+ struct dwc3_layerscape_priv gen_priv;
+};
+
+static int dwc3_layerscape_probe(struct udevice *dev,
+ struct dwc3_layerscape_priv *priv)
+{
+ int rc;
+ struct dwc3_layerscape_plat *plat = dev_get_plat(dev);
+ struct dwc3 *dwc3 = &priv->dwc3;
+
+ dwc3->dev = dev;
+ dwc3->maximum_speed = plat->maximum_speed;
+ dwc3->dr_mode = plat->dr_mode;
+ if (CONFIG_IS_ENABLED(OF_CONTROL))
+ dwc3_of_parse(dwc3);
+
+ rc = dwc3_setup_phy(dev, &priv->phys);
+ if (rc && rc != -ENOTSUPP)
+ return rc;
+
+ priv->base = map_physmem(plat->base, DWC3_OTG_REGS_END, MAP_NOCACHE);
+ dwc3->regs = priv->base + DWC3_GLOBALS_REGS_START;
+
+ rc = dwc3_init(dwc3);
+ if (rc) {
+ unmap_physmem(priv->base, MAP_NOCACHE);
+ return rc;
+ }
+
+ return 0;
+}
+
+static int dwc3_layerscape_remove(struct udevice *dev,
+ struct dwc3_layerscape_priv *priv)
+{
+ struct dwc3 *dwc3 = &priv->dwc3;
+
+ dwc3_remove(dwc3);
+ dwc3_shutdown_phy(dev, &priv->phys);
+ unmap_physmem(dwc3->regs, MAP_NOCACHE);
+
+ return 0;
+}
+
+static int dwc3_layerscape_of_to_plat(struct udevice *dev)
+{
+ struct dwc3_layerscape_plat *plat = dev_get_plat(dev);
+ ofnode node = dev_ofnode(dev);
+
+ plat->base = dev_read_addr(dev);
+
+ plat->maximum_speed = usb_get_maximum_speed(node);
+ if (plat->maximum_speed == USB_SPEED_UNKNOWN) {
+ dev_dbg(dev, "No USB maximum speed specified. Using super speed\n");
+ plat->maximum_speed = USB_SPEED_SUPER;
+ }
+
+ plat->dr_mode = usb_get_dr_mode(node);
+ if (plat->dr_mode == USB_DR_MODE_UNKNOWN) {
+ dev_err(dev, "Invalid usb mode setup\n");
+ return -ENODEV;
+ }
+
+ return 0;
+}
+
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+int dm_usb_gadget_handle_interrupts(struct udevice *dev)
+{
+ struct dwc3_layerscape_priv *priv = dev_get_priv(dev);
+
+ dwc3_gadget_uboot_handle_interrupt(&priv->dwc3);
+
+ return 0;
+}
+
+static int dwc3_layerscape_peripheral_probe(struct udevice *dev)
+{
+ struct dwc3_layerscape_priv *priv = dev_get_priv(dev);
+
+ return dwc3_layerscape_probe(dev, priv);
+}
+
+static int dwc3_layerscape_peripheral_remove(struct udevice *dev)
+{
+ struct dwc3_layerscape_priv *priv = dev_get_priv(dev);
+
+ return dwc3_layerscape_remove(dev, priv);
+}
+
+U_BOOT_DRIVER(dwc3_layerscape_peripheral) = {
+ .name = "dwc3-layerscape-peripheral",
+ .id = UCLASS_USB_GADGET_GENERIC,
+ .of_to_plat = dwc3_layerscape_of_to_plat,
+ .probe = dwc3_layerscape_peripheral_probe,
+ .remove = dwc3_layerscape_peripheral_remove,
+ .priv_auto = sizeof(struct dwc3_layerscape_priv),
+ .plat_auto = sizeof(struct dwc3_layerscape_plat),
+};
+#endif
+
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || \
+ !defined(CONFIG_SPL_BUILD) && defined(CONFIG_USB_HOST)
+static int dwc3_layerscape_host_probe(struct udevice *dev)
+{
+ struct xhci_hcor *hcor;
+ struct xhci_hccr *hccr;
+ struct dwc3_layerscape_host_priv *priv = dev_get_priv(dev);
+ int rc;
+
+ rc = dwc3_layerscape_probe(dev, &priv->gen_priv);
+ if (rc)
+ return rc;
+
+ hccr = priv->gen_priv.base;
+ hcor = priv->gen_priv.base + HC_LENGTH(xhci_readl(&hccr->cr_capbase));
+
+ return xhci_register(dev, hccr, hcor);
+}
+
+static int dwc3_layerscape_host_remove(struct udevice *dev)
+{
+ struct dwc3_layerscape_host_priv *priv = dev_get_priv(dev);
+ int rc;
+
+ rc = xhci_deregister(dev);
+ if (rc)
+ return rc;
+
+ return dwc3_layerscape_remove(dev, &priv->gen_priv);
+}
+
+U_BOOT_DRIVER(dwc3_layerscape_host) = {
+ .name = "dwc3-layerscape-host",
+ .id = UCLASS_USB,
+ .of_to_plat = dwc3_layerscape_of_to_plat,
+ .probe = dwc3_layerscape_host_probe,
+ .remove = dwc3_layerscape_host_remove,
+ .priv_auto = sizeof(struct dwc3_layerscape_host_priv),
+ .plat_auto = sizeof(struct dwc3_layerscape_plat),
+ .ops = &xhci_usb_ops,
+ .flags = DM_FLAG_ALLOC_PRIV_DMA,
+};
+#endif
+
+static int dwc3_layerscape_bind(struct udevice *dev)
+{
+ ofnode node = dev_ofnode(dev);
+ const char *name = ofnode_get_name(node);
+ enum usb_dr_mode dr_mode;
+ char *driver;
+
+ dr_mode = usb_get_dr_mode(node);
+
+ switch (dr_mode) {
+#if CONFIG_IS_ENABLED(DM_USB_GADGET)
+ case USB_DR_MODE_PERIPHERAL:
+ dev_dbg(dev, "Using peripheral mode\n");
+ driver = "dwc3-layerscape-peripheral";
+ break;
+#endif
+#if defined(CONFIG_SPL_USB_HOST_SUPPORT) || !defined(CONFIG_SPL_BUILD)
+ case USB_DR_MODE_HOST:
+ dev_dbg(dev, "Using host mode\n");
+ driver = "dwc3-layerscape-host";
+ break;
+#endif
+ default:
+ dev_dbg(dev, "Unsupported dr_mode\n");
+ return -ENODEV;
+ };
+
+ return device_bind_driver_to_node(dev, driver, name, node, NULL);
+}
+
+static const struct udevice_id dwc3_layerscape_ids[] = {
+ { .compatible = "fsl,layerscape-dwc3" },
+ { .compatible = "fsl,ls1028a-dwc3" },
+ { }
+};
+
+U_BOOT_DRIVER(dwc3_layerscape_wrapper) = {
+ .name = "dwc3-layerscape-wrapper",
+ .id = UCLASS_NOP,
+ .of_match = dwc3_layerscape_ids,
+ .bind = dwc3_layerscape_bind,
+};
diff --git a/drivers/usb/host/xhci-fsl.c b/drivers/usb/host/xhci-fsl.c
index f062f12..8087190 100644
--- a/drivers/usb/host/xhci-fsl.c
+++ b/drivers/usb/host/xhci-fsl.c
@@ -159,6 +159,7 @@
static const struct udevice_id xhci_usb_ids[] = {
{ .compatible = "fsl,layerscape-dwc3", },
+ { .compatible = "fsl,ls1028a-dwc3", },
{ }
};
diff --git a/drivers/video/dw_mipi_dsi.c b/drivers/video/dw_mipi_dsi.c
index 9ae09ee..a5b38ac 100644
--- a/drivers/video/dw_mipi_dsi.c
+++ b/drivers/video/dw_mipi_dsi.c
@@ -17,7 +17,6 @@
#include <panel.h>
#include <video.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/video/stm32/stm32_dsi.c b/drivers/video/stm32/stm32_dsi.c
index 4027e97..134abd9 100644
--- a/drivers/video/stm32/stm32_dsi.c
+++ b/drivers/video/stm32/stm32_dsi.c
@@ -21,7 +21,6 @@
#include <video.h>
#include <video_bridge.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <dm/lists.h>
diff --git a/drivers/video/stm32/stm32_ltdc.c b/drivers/video/stm32/stm32_ltdc.c
index f55a394..65c882d 100644
--- a/drivers/video/stm32/stm32_ltdc.c
+++ b/drivers/video/stm32/stm32_ltdc.c
@@ -17,7 +17,6 @@
#include <video.h>
#include <video_bridge.h>
#include <asm/io.h>
-#include <asm/arch/gpio.h>
#include <dm/device-internal.h>
#include <dm/device_compat.h>
#include <linux/bitops.h>
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
index bec8827..0d6fb12 100644
--- a/drivers/watchdog/sp805_wdt.c
+++ b/drivers/watchdog/sp805_wdt.c
@@ -134,7 +134,7 @@
};
static const struct udevice_id sp805_wdt_ids[] = {
- { .compatible = "arm,sp805-wdt" },
+ { .compatible = "arm,sp805" },
{}
};
diff --git a/include/bootm.h b/include/bootm.h
index 7f88ec7..48fc668 100644
--- a/include/bootm.h
+++ b/include/bootm.h
@@ -39,7 +39,6 @@
extern boot_os_fn do_bootm_vxworks;
int do_bootelf(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[]);
-void lynxkdi_boot(image_header_t *hdr);
boot_os_fn *bootm_os_get_boot_func(int os);
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 198b698..bf8a92c 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2011-2012 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
/*
@@ -361,35 +361,6 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
-/* Default address of microcode for the Linux Fman driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 825KB (1650 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR (8 * (128 * 1024))
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-/*
- * Slave has no ucode locally, it can fetch this from remote. When implementing
- * in two corenet boards, slave's ucode could be stored in master's memory
- * space, the address can be mapped from slave TLB->slave LAW->
- * slave SRIO or PCIE outbound window->master inbound window->
- * master LAW->the ucode address in master's memory space.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#ifdef CONFIG_PCI
diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h
index 462619f..bf9f26e 100644
--- a/include/configs/SBx81LIFKW.h
+++ b/include/configs/SBx81LIFKW.h
@@ -16,7 +16,6 @@
/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
@@ -39,7 +38,6 @@
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
-#define CONFIG_DOS_PARTITION
/*
* Environment variables configurations
diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h
index a271567..71394ae 100644
--- a/include/configs/SBx81LIFXCAT.h
+++ b/include/configs/SBx81LIFXCAT.h
@@ -16,7 +16,6 @@
/* additions for new ARM relocation support */
#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_MD5 /* get_random_hex on krikwood needs MD5 support */
#define CONFIG_KIRKWOOD_EGIGA_INIT /* Enable GbePort0/1 for kernel */
#define CONFIG_KIRKWOOD_PCIE_INIT /* Enable PCIE Port0 */
#define CONFIG_KIRKWOOD_RGMII_PAD_1V8 /* Set RGMII Pad voltage to 1.8V */
@@ -39,7 +38,6 @@
#define MTDPARTS_DEFAULT "mtdparts=spi0.0:768K(boot)ro,256K(boot-env),14M(user),1M(errlog)"
#define MTDPARTS_MTDOOPS "errlog"
-#define CONFIG_DOS_PARTITION
/*
* Environment variables configurations
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index ef79c1b..89bbeb7 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
/*
@@ -500,36 +500,6 @@
#define CONFIG_SYS_DPAA_FMAN
-/* Default address of microcode for the Linux FMan driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-#define CONFIG_SYS_QE_FW_ADDR 0x130000
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080(0x820).
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-/*
- * Slave has no ucode locally, it can fetch this from remote. When implementing
- * in two corenet boards, slave's ucode could be stored in master's memory
- * space, the address can be mapped from slave TLB->slave LAW->
- * slave SRIO or PCIE outbound window->master inbound window->
- * master LAW->the ucode address in master's memory space.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#define CONFIG_SYS_QE_FW_ADDR 0xEFE00000
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index 4485f40..48fc8a2 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2014 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
#ifndef __CONFIG_H
@@ -501,33 +501,6 @@
#define CONFIG_U_QE
-/* Default address of microcode for the Linux Fman driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#endif
-
-#if defined(CONFIG_SPIFLASH)
-#define CONFIG_SYS_QE_FW_ADDR 0x130000
-#elif defined(CONFIG_SDCARD)
-#define CONFIG_SYS_QE_FW_ADDR (512 * 0x920)
-#else
-#define CONFIG_SYS_QE_FW_ADDR 0xEFF10000
-#endif
-
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index e70d108..78562bc 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -482,33 +482,6 @@
#define CONFIG_SYS_DPAA_RMAN /* RMan */
#define CONFIG_SYS_INTERLAKEN
-/* Default address of microcode for the Linux Fman driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-/*
- * Slave has no ucode locally, it can fetch this from remote. When implementing
- * in two corenet boards, slave's ucode could be stored in master's memory
- * space, the address can be mapped from slave TLB->slave LAW->
- * slave SRIO or PCIE outbound window->master inbound window->
- * master LAW->the ucode address in master's memory space.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index fbe8852..471ed94 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -434,35 +434,6 @@
#define CONFIG_SYS_DPAA_RMAN /* RMan */
#define CONFIG_SYS_INTERLAKEN
-/* Default address of microcode for the Linux Fman driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-/*
- * Slave has no ucode locally, it can fetch this from remote. When implementing
- * in two corenet boards, slave's ucode could be stored in master's memory
- * space, the address can be mapped from slave TLB->slave LAW->
- * slave SRIO or PCIE outbound window->master inbound window->
- * master LAW->the ucode address in master's memory space.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 87e3e67..f6ccaf4 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -456,24 +456,6 @@
#define CONFIG_SYS_DPAA_RMAN
#define CONFIG_SYS_INTERLAKEN
-/* Default address of microcode for the Linux Fman driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 2080.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x820)
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif /* CONFIG_NOBQFMAN */
diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h
index 5b00a3c..50dae2d 100644
--- a/include/configs/apalis-imx8x.h
+++ b/include/configs/apalis-imx8x.h
@@ -113,7 +113,6 @@
#define PHYS_SDRAM_2_SIZE 0x00000000 /* 0 GB */
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
index c3c28ea..e7f380b 100644
--- a/include/configs/bcmstb.h
+++ b/include/configs/bcmstb.h
@@ -132,7 +132,6 @@
/*
* Filesystem configuration.
*/
-#define CONFIG_DOS_PARTITION
/*
* Environment configuration.
diff --git a/include/configs/brppt2.h b/include/configs/brppt2.h
index 3f54baf..7ab7f55 100644
--- a/include/configs/brppt2.h
+++ b/include/configs/brppt2.h
@@ -21,7 +21,6 @@
#define CONFIG_MXC_GPT_HCLK
/* MMC */
-#define CONFIG_FSL_USDHC
/* Boot */
@@ -89,7 +88,6 @@
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
/* Ethernet */
-#define CONFIG_MII
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_FIXED_SPEED _1000BASET
#define CONFIG_ARP_TIMEOUT 1500UL
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index d9b59b9..4523595 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -41,8 +41,6 @@
#define USDHC2_BASE_ADDR 0x5B020000
#define USDHC3_BASE_ADDR 0x5B030000
-#define CONFIG_ENV_OVERWRITE
-
/* Boot M4 */
#define M4_BOOT_ENV \
"m4_0_image=m4_0.bin\0" \
diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h
index 00760b8..4d44b3b 100644
--- a/include/configs/chromebook_coral.h
+++ b/include/configs/chromebook_coral.h
@@ -31,9 +31,6 @@
"stdout=vidconsole,serial\0" \
"stderr=vidconsole,serial\0"
-#define CONFIG_ENV_SECT_SIZE 0x1000
-#define CONFIG_ENV_OFFSET 0x003f8000
-
#define CONFIG_TPL_TEXT_BASE 0xffff8000
#define CONFIG_SYS_NS16550_MEM32
diff --git a/include/configs/ci20.h b/include/configs/ci20.h
index cefc815..0a7043a 100644
--- a/include/configs/ci20.h
+++ b/include/configs/ci20.h
@@ -24,7 +24,6 @@
/* NS16550-ish UARTs */
#define CONFIG_SYS_NS16550_CLK 48000000
-#define CONFIG_SYS_CONSOLE_IS_IN_ENV
/* Ethernet: davicom DM9000 */
#define CONFIG_DRIVER_DM9000 1
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 8819935..1e55d52 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -1,7 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright 2009-2012 Freescale Semiconductor, Inc.
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
/*
@@ -365,35 +365,6 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
-/* Default address of microcode for the Linux Fman driver */
-#if defined(CONFIG_SPIFLASH)
-/*
- * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
- * env, so we got 0x110000.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x110000
-#elif defined(CONFIG_SDCARD)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 825KB (1650 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 1650 + 16 = 1674, enlarge it to 1680.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 1680)
-#elif defined(CONFIG_MTD_RAW_NAND)
-#define CONFIG_SYS_FMAN_FW_ADDR (8 * (128 * 1024))
-#elif defined(CONFIG_SRIO_PCIE_BOOT_SLAVE)
-/*
- * Slave has no ucode locally, it can fetch this from remote. When implementing
- * in two corenet boards, slave's ucode could be stored in master's memory
- * space, the address can be mapped from slave TLB->slave LAW->
- * slave SRIO or PCIE outbound window->master inbound window->
- * master LAW->the ucode address in master's memory space.
- */
-#define CONFIG_SYS_FMAN_FW_ADDR 0xFFE00000
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0xEFF00000
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#ifdef CONFIG_PCI
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index f0e5bce..882cb48 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -70,7 +70,6 @@
#endif
/* Ethernet */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91_WANTS_COMMON_PHY
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index 80108fc..c0bdfd3 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -60,7 +60,6 @@
/* Ethernet */
#define CONFIG_NET_RETRY_COUNT 20
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_PHY_ID 0
#define CONFIG_MACB_SEARCH_PHY
diff --git a/include/configs/exynos5-common.h b/include/configs/exynos5-common.h
index e492396..90d095d 100644
--- a/include/configs/exynos5-common.h
+++ b/include/configs/exynos5-common.h
@@ -14,14 +14,6 @@
#define CONFIG_EXYNOS_SPL
-#ifdef FTRACE
-#define CONFIG_TRACE
-#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
-#define CONFIG_TRACE_EARLY_SIZE (8 << 20)
-#define CONFIG_TRACE_EARLY
-#define CONFIG_TRACE_EARLY_ADDR 0x50000000
-#endif
-
/* Enable ACE acceleration for SHA1 and SHA256 */
#define CONFIG_EXYNOS_ACE_SHA
diff --git a/include/configs/falcon.h b/include/configs/falcon.h
index 67931fe..d783faf 100644
--- a/include/configs/falcon.h
+++ b/include/configs/falcon.h
@@ -22,7 +22,6 @@
#define GICR_BASE 0xF1060000
/* Ethernet RAVB */
-#define CONFIG_BITBANGMII
#define CONFIG_BITBANGMII_MULTI
/* Board Clock */
diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h
index 170d6a7..abceffb 100644
--- a/include/configs/gw_ventana.h
+++ b/include/configs/gw_ventana.h
@@ -34,7 +34,6 @@
/* I2C Configs */
#define CONFIG_I2C_GSC 0
-#define CONFIG_I2C_EDID
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h
index f1b78c6..7665626 100644
--- a/include/configs/imx6_logic.h
+++ b/include/configs/imx6_logic.h
@@ -132,13 +132,6 @@
#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
#define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00500000
-/* MTD device */
-
-/* DMA stuff, needed for GPMI/MXS NAND support */
-
-/* EEPROM contains serial no, MAC addr and other Logic PD info */
-#define CONFIG_I2C_EEPROM
-
/* USB Configs */
#ifdef CONFIG_CMD_USB
#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h
index 553c7fe..01f8732 100644
--- a/include/configs/imx7-cm.h
+++ b/include/configs/imx7-cm.h
@@ -88,8 +88,6 @@
#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR
#define CONFIG_SYS_FSL_USDHC_NUM 2
-#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
-#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index 9b86e0a..6868b80 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -157,7 +157,6 @@
#define CONFIG_MXC_UART_BASE UART3_BASE_ADDR
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
@@ -165,7 +164,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 4c8f562..167ca19 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -81,7 +81,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index 63f02bf..f8d4142 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -96,7 +96,6 @@
#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE SZ_2K
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index cb85c35..f89836c 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -116,8 +116,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_ENV_OVERWRITE
-
#define CONFIG_SYS_SDRAM_BASE 0x40000000
#define PHYS_SDRAM 0x40000000
#if CONFIG_IS_ENABLED(IMX8MN_BEACON_2GB_LPDDR)
@@ -129,7 +127,6 @@
#define CONFIG_MXC_UART_BASE UART2_BASE_ADDR
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index 1e18a87..ab89321 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -80,7 +80,6 @@
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 1c636d9..30cce1a 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -97,8 +97,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_FSL_USDHC
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h
index 9b78662..7206c08 100644
--- a/include/configs/imx8mq_cm.h
+++ b/include/configs/imx8mq_cm.h
@@ -88,8 +88,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_IMX_BOOTAUX
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index 53fbeff..49a9526 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -42,14 +42,12 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
-#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000
#endif
@@ -95,16 +93,12 @@
#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
/* Monitor Command Prompt */
-#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT "u-boot=> "
#define CONFIG_SYS_CBSIZE 1024
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_IMX_BOOTAUX
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index d17f70f..0366c11 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -36,17 +36,13 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 0
#define FEC_QUIRK_ENET_MAC
-#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000
-
-#define CONFIG_PHYLIB
#endif
#define CONFIG_MFG_ENV_SETTINGS \
@@ -147,8 +143,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_IMX_BOOTAUX
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index b524ce3..2c80f26 100644
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -15,7 +15,6 @@
#define CONFIG_SPL_BSS_START_ADDR 0x00128000
#define CONFIG_SPL_BSS_MAX_SIZE 0x1000 /* 4 KB */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_BOOTMAPSZ (256 << 20)
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define USDHC1_BASE_ADDR 0x5B010000
diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h
index 3d506ba..501f465 100644
--- a/include/configs/imx8ulp_evk.h
+++ b/include/configs/imx8ulp_evk.h
@@ -74,7 +74,6 @@
#define CONFIG_SYS_INIT_SP_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-#define CONFIG_ENV_OVERWRITE
#define CONFIG_MMCROOT "/dev/mmcblk2p2"
#define CONFIG_SYS_SDRAM_BASE 0x80000000
@@ -82,7 +81,6 @@
#define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */
/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
#define CONFIG_SYS_CBSIZE 2048
#define CONFIG_SYS_MAXARGS 64
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h
index ff97c6c..869bd9b 100644
--- a/include/configs/km/km-mpc8309.h
+++ b/include/configs/km/km-mpc8309.h
@@ -13,9 +13,6 @@
/* QE microcode/firmware address */
/* between the u-boot partition and env */
-#ifndef CONFIG_SYS_QE_FW_ADDR
-#define CONFIG_SYS_QE_FW_ADDR 0xF00C0000
-#endif
/*
* System IO Config
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index a5bc689..743d09e 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -212,7 +212,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#define CONFIG_SYS_MONITOR_LEN 0x100000 /* 1Mbyte */
-#define CONFIG_SYS_QE_FW_ADDR 0x60020000
#define CONFIG_SYS_BOOTCOUNT_BE
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 91b50cb..4dbd53c 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -335,7 +335,6 @@
#define CONFIG_SYS_CS2_FTIM2 SYS_QRIO_FTIM2
#define CONFIG_SYS_CS2_FTIM3 SYS_QRIO_FTIM3
-#define CONFIG_MISC_INIT_F
#define CONFIG_HWCONFIG
/* define to use L1 as initial stack */
@@ -411,10 +410,6 @@
#define CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_DPAA_PME
-/* Default address of microcode for the Linux Fman driver */
-#define CONFIG_SYS_FMAN_FW_ADDR 0xE8020000
-#define CONFIG_SYS_QE_FW_ADDR 0xE8040000
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
/* Qman / Bman */
diff --git a/include/configs/kontron-sl-mx8mm.h b/include/configs/kontron-sl-mx8mm.h
index 52aa447..d1e87f9 100644
--- a/include/configs/kontron-sl-mx8mm.h
+++ b/include/configs/kontron-sl-mx8mm.h
@@ -54,7 +54,6 @@
#define CONFIG_SYS_BOOTM_LEN SZ_64M
#define CONFIG_SPL_MAX_SIZE (148 * SZ_1K)
-#define CONFIG_FSL_USDHC
#ifdef CONFIG_SPL_BUILD
#define CONFIG_SPL_STACK 0x91fff0
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 6769592..4152851 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -88,6 +88,8 @@
"envload=env import -d -b ${env_addr}\0" \
"install_rcw=source 20200000\0" \
"fdtfile=freescale/fsl-ls1028a-kontron-sl28.dtb\0" \
+ "dfu_alt_info=sf 0:0=u-boot-bin raw 0x210000 0x1d0000;" \
+ "u-boot-env raw 0x3e0000 0x20000\0" \
ENV_MEM_LAYOUT_SETTINGS \
BOOTENV
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index d072eaa..4e654ca 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -29,10 +29,6 @@
/* CSU */
#define CONFIG_LAYERSCAPE_NS_ACCESS
-/* PFE */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x400d0000
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x300000
-
/*SPI device */
#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index f73dafe..222caa1 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -174,8 +174,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
#endif
-#define CONFIG_SYS_QE_FW_ADDR 0x67f40000
-
#define CONFIG_OF_BOARD_SETUP
#define CONFIG_OF_STDOUT_VIA_ALIAS
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 748c04b..27b97ff 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -390,9 +390,6 @@
#define CONFIG_FSL_DEVICE_DISABLE
-
-#define CONFIG_SYS_QE_FW_ADDR 0x60940000
-
#ifdef CONFIG_LPUART
#define CONFIG_EXTRA_ENV_SETTINGS \
"bootargs=root=/dev/ram0 rw console=ttyLP0,115200\0" \
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index 067d4f7..c099629 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -408,8 +408,6 @@
#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE /* start of monitor */
#endif
-#define CONFIG_SYS_QE_FW_ADDR 0x60940000
-
/*
* Environment
*/
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 6e8eebf..bdf1b43 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -168,29 +168,6 @@
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
-#define CONFIG_SYS_QE_FW_ADDR 0x940000
-
-
-#else
-#if defined(CONFIG_SD_BOOT)
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2040 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2040 + 16 = 2064, enlarge it to 18432(0x4800).
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
-#define CONFIG_SYS_QE_FW_ADDR (512 * 0x4A00)
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
-#else
-/* FMan fireware Pre-load address */
-#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
-#define CONFIG_SYS_QE_FW_ADDR 0x60940000
-#endif
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif
#endif
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 7822e9d..515f420 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -145,26 +145,6 @@
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
#endif
-
-#ifdef CONFIG_TFABOOT
-#define CONFIG_SYS_FMAN_FW_ADDR 0x900000
-#else
-#ifdef CONFIG_SD_BOOT
-/*
- * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
- * about 1MB (2048 blocks), Env is stored after the image, and the env size is
- * 0x2000 (16 blocks), 8 + 2048 + 16 = 2072, enlarge it to 18432(0x4800).
- */
-#define CONFIG_SYS_FMAN_FW_ADDR (512 * 0x4800)
-#elif defined(CONFIG_QSPI_BOOT)
-#define CONFIG_SYS_FMAN_FW_ADDR 0x40900000
-#elif defined(CONFIG_NAND_BOOT)
-#define CONFIG_SYS_FMAN_FW_ADDR (36 * (256 * 1024))
-#else
-#define CONFIG_SYS_FMAN_FW_ADDR 0x60900000
-#endif
-#endif
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
#define CONFIG_SYS_FDT_PAD (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
#endif
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 987df5f..8bc09d0 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -27,13 +27,6 @@
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
-/* DSPI */
-#ifdef CONFIG_FSL_DSPI
-#define CONFIG_SPI_FLASH_STMICRO /* cs0 */
-#define CONFIG_SPI_FLASH_SST /* cs1 */
-#define CONFIG_SPI_FLASH_EON /* cs2 */
-#endif
-
#ifdef CONFIG_SYS_DPAA_FMAN
#define RGMII_PHY1_ADDR 0x1
#define RGMII_PHY2_ADDR 0x2
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index 8923e32..d001acf 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -13,10 +13,6 @@
unsigned long get_board_sys_clk(void);
#endif
-#ifdef CONFIG_TFABOOT
-#define CONFIG_MISC_INIT_R
-#endif
-
#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
#define CONFIG_QIXIS_I2C_ACCESS
#define SYS_NO_FLASH
@@ -539,7 +535,6 @@
#define XQSGMII_CARD_PHY4_PORT3_ADDR 0xf
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE /* Include GbE speed/duplex detection */
#endif
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index f82b618..6ad1fea 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -484,7 +484,6 @@
#define QSGMII2_PORT4_PHY_ADDR 0x1f
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
-#define CONFIG_PHY_GIGE
#endif
#endif
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index dddac7b..7173fe6 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -11,7 +11,6 @@
#include <asm/arch/soc.h>
#define CONFIG_REMAKE_ELF
-#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_FSL_TZPC_BP147
#define CONFIG_FSL_MEMAC
@@ -56,7 +55,6 @@
#define COUNTER_FREQUENCY 25000000 /* 25MHz */
/* Serial Port */
-#define CONFIG_PL01X_SERIAL
#define CONFIG_PL011_CLOCK (get_bus_freq(0) / 4)
#define CONFIG_SYS_SERIAL0 0x21c0000
#define CONFIG_SYS_SERIAL1 0x21d0000
diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h
index 30b044b..a04bbb6 100644
--- a/include/configs/lx2160aqds.h
+++ b/include/configs/lx2160aqds.h
@@ -29,7 +29,6 @@
/* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET)
-#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC17@rgmii-id"
#endif
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index ebe5004..4fd3e54 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -19,7 +19,6 @@
/* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET)
-#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC1@xgmii"
#endif
diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h
index 7fa3c25..67c469c 100644
--- a/include/configs/lx2162aqds.h
+++ b/include/configs/lx2162aqds.h
@@ -1,6 +1,6 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
- * Copyright 2020 NXP
+ * Copyright 2020-2021 NXP
*/
#ifndef __LX2162_QDS_H
@@ -33,7 +33,6 @@
/* MAC/PHY configuration */
#if defined(CONFIG_FSL_MC_ENET)
-#define CONFIG_MII
#define CONFIG_ETHPRIME "DPMAC17@rgmii-id"
#endif
@@ -60,7 +59,7 @@
"$kernelhdr_addr_sd $kernelhdr_size_sd " \
" && esbc_validate ${kernelheader_addr_r};" \
"bootm $load_addr#$BOARD\0" \
- "emmc_bootcmd=echo Trying load from emmc card..;" \
+ "sd2_bootcmd=echo Trying load from emmc card..;" \
"mmc dev 1; mmcinfo; mmc read $load_addr " \
"$kernel_addr_sd $kernel_size_sd ;" \
"env exists secureboot && mmc read $kernelheader_addr_r "\
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index 32f8e63..f94cf28 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -75,7 +75,6 @@
#ifdef CONFIG_CMD_NET
#define IMX_FEC_BASE FEC_BASE_ADDR
#define CONFIG_FEC_MXC_PHYADDR 0x0
-#define CONFIG_MII
#define CONFIG_DISCOVER_PHY
#define CONFIG_FEC_XCV_TYPE RMII
#define CONFIG_ETHPRIME "FEC0"
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index 3457c59..55f64b5 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -72,7 +72,6 @@
#endif
/* Ethernet */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#undef CONFIG_RESET_PHY_R
diff --git a/include/configs/mvebu_armada-8k.h b/include/configs/mvebu_armada-8k.h
index 886f44c..ac0fddd 100644
--- a/include/configs/mvebu_armada-8k.h
+++ b/include/configs/mvebu_armada-8k.h
@@ -58,9 +58,6 @@
/*
* PCI configuration
*/
-#ifdef CONFIG_PCIE_DW_MVEBU
-#define CONFIG_E1000
-#endif
#define BOOT_TARGET_DEVICES(func) \
func(MMC, mmc, 1) \
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 983402f..0ae8305 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -27,10 +27,6 @@
#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/gpio.h>
-#ifndef CONFIG_MX6
-#define CONFIG_MX6
-#endif
-
#define CONFIG_SYS_FSL_CLK
/* Miscellaneous configurable options */
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index 32b44fe..ffe8c75 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -13,10 +13,6 @@
#include <asm/arch/imx-regs.h>
#include <asm/mach-imx/gpio.h>
-#ifndef CONFIG_MX7
-#define CONFIG_MX7
-#endif
-
/* Timer settings */
#define CONFIG_MXC_GPT_HCLK
#define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index 6d7f09e..4046c3f 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -26,7 +26,6 @@
#define LPUART_BASE LPUART4_RBASE
/* Miscellaneous configurable options */
-#define CONFIG_SYS_PROMPT "=> "
#define CONFIG_SYS_CBSIZE 512
#define CONFIG_SYS_MAXARGS 256
diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h
index 6032996..1a1c08b 100644
--- a/include/configs/nitrogen6x.h
+++ b/include/configs/nitrogen6x.h
@@ -15,9 +15,6 @@
#define CONFIG_MXC_UART_BASE UART2_BASE
-/* I2C Configs */
-#define CONFIG_I2C_EDID
-
/* MMC Configs */
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_FSL_USDHC_NUM 2
diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h
index a10607f..eb32d83 100644
--- a/include/configs/npi_imx6ull.h
+++ b/include/configs/npi_imx6ull.h
@@ -35,15 +35,6 @@
#define CONFIG_SYS_INIT_SP_ADDR \
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
-/* environment settings */
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#elif defined(CONFIG_ENV_IS_IN_NAND)
-#undef CONFIG_ENV_SIZE
-#define CONFIG_ENV_SECT_SIZE (128 << 10)
-#define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
-#endif
-
/* NAND */
#define CONFIG_SYS_MAX_NAND_DEVICE 1
#define CONFIG_SYS_NAND_BASE 0x40000000
@@ -61,8 +52,6 @@
#define CONFIG_ETHPRIME "eth0"
#endif
-#define CONFIG_IMX_THERMAL
-
#define CONFIG_FEC_ENET_DEV 1
#define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h
index 6608b34..bc21b79 100644
--- a/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@ -18,11 +18,6 @@
/** Stack starting address */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0xffff0)
-#define CONFIG_LAST_STAGE_INIT
-
-/* Allow environment variable to be overwritten */
-#define CONFIG_ENV_OVERWRITE
-
/* Autoboot options */
#define CONFIG_RESET_TO_RETRY
#define CONFIG_BOOT_RETRY_TIME -1
@@ -37,11 +32,6 @@
"ethrotate=yes\0" \
"autoload=0\0"
-/** Environment defines */
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
@@ -50,9 +40,6 @@
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192
-#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT env_get("prompt")
-
#if defined(CONFIG_MMC_OCTEONTX)
#define MMC_SUPPORTS_TUNING
/** EMMC specific defines */
diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h
index 3a0f081..46908be 100644
--- a/include/configs/octeontx_common.h
+++ b/include/configs/octeontx_common.h
@@ -45,9 +45,6 @@
/** Heap size for U-Boot */
-/* Allow environment variable to be overwritten */
-#define CONFIG_ENV_OVERWRITE
-
/* Autoboot options */
#define CONFIG_RESET_TO_RETRY
#define CONFIG_BOOT_RETRY_TIME -1
@@ -70,11 +67,6 @@
# define CONFIG_SF_DEFAULT_CS 0
#endif
-/** Environment defines */
-#if defined(CONFIG_ENV_IS_IN_MMC)
-#define CONFIG_SYS_MMC_ENV_DEV 0
-#endif
-
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 1024 /** Console I/O Buffer Size */
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
@@ -83,9 +75,6 @@
#define CONFIG_SYS_MMC_MAX_BLK_COUNT 8192
-#undef CONFIG_SYS_PROMPT
-#define CONFIG_SYS_PROMPT env_get("prompt")
-
/** EMMC specific defines */
#if defined(CONFIG_MMC_OCTEONTX)
#define CONFIG_SUPPORT_EMMC_RPMB
diff --git a/include/configs/openpiton-riscv64.h b/include/configs/openpiton-riscv64.h
index a24b134..c9d966ff 100644
--- a/include/configs/openpiton-riscv64.h
+++ b/include/configs/openpiton-riscv64.h
@@ -32,12 +32,6 @@
#define CONFIG_SPL_GD_ADDR 0x85000000
#endif
-/* -------------------------------------------------
- * Environment
- */
-//Disable persistent environment variable storage
-#define CONFIG_ENV_IS_NOWHERE 1
-
/* ---------------------------------------------------------------------
* Board boot configuration
*/
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index d3ac057..6b4fc39 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -528,12 +528,6 @@
#define CONFIG_HAS_ETH2
#endif /* CONFIG_TSEC_ENET */
-#ifdef CONFIG_QE
-/* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FW_ADDR 0xefec0000
-#define CONFIG_SYS_QE_FMAN_FW_LENGTH 0x10000
-#endif /* CONFIG_QE */
-
/*
* Environment
*/
diff --git a/include/configs/p2571.h b/include/configs/p2571.h
index 0b3183a..5a89dc8 100644
--- a/include/configs/p2571.h
+++ b/include/configs/p2571.h
@@ -15,7 +15,6 @@
#define CONFIG_TEGRA_BOARD_STRING "NVIDIA P2571"
/* Board-specific serial config */
-#define CONFIG_SERIAL_MULTI
#define CONFIG_TEGRA_ENABLE_UARTA
/* Environment in eMMC, at the end of 2nd "boot sector" */
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index e74f2b2..38c8a83 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -103,7 +103,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 356544a..fcd5896 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -103,7 +103,6 @@
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h
index 817e714..2528d31 100644
--- a/include/configs/pico-imx6.h
+++ b/include/configs/pico-imx6.h
@@ -130,7 +130,6 @@
#define CONFIG_BOARD_SIZE_LIMIT 715776
/* Ethernet Configuration */
-#define CONFIG_MII
#define IMX_FEC_BASE ENET_BASE_ADDR
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_ETHPRIME "FEC"
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index 2afcf00..5c1b652 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -36,18 +36,13 @@
/* ENET Config */
/* ENET1 */
#if defined(CONFIG_CMD_NET)
-#define CONFIG_MII
#define CONFIG_ETHPRIME "FEC"
#define CONFIG_FEC_XCV_TYPE RGMII
#define CONFIG_FEC_MXC_PHYADDR 1
#define FEC_QUIRK_ENET_MAC
-#define CONFIG_PHY_GIGE
#define IMX_FEC_BASE 0x30BE0000
-
-#define CONFIG_PHYLIB
-#define CONFIG_PHY_ATHEROS
#endif
/* Initial environment variables */
@@ -127,8 +122,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
-#define CONFIG_IMX_BOOTAUX
-
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h
index 8d689d9..3df5143 100644
--- a/include/configs/presidio_asic.h
+++ b/include/configs/presidio_asic.h
@@ -43,9 +43,6 @@
/* BOOTP options */
#define CONFIG_BOOTP_BOOTFILESIZE
-/* Miscellaneous configurable options */
-#define CONFIG_LAST_STAGE_INIT
-
/* SDRAM Bank #1 */
#define DDR_BASE 0x00000000
#define PHYS_SDRAM_1 DDR_BASE
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index f49f5fa..2e94613 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -77,16 +77,6 @@
* System initialize options (board_init_f)
*/
/* board_init_f->init_sequence, call arch_cpu_init */
-#define CONFIG_ARCH_CPU_INIT
-
-/*-----------------------------------------------------------------------
- * Miscellaneous configurable options
- */
-#ifdef CONFIG_SYS_PROMPT
-#undef CONFIG_SYS_PROMPT
-/* Monitor Command Prompt */
-#define CONFIG_SYS_PROMPT "nanopi2# "
-#endif
/* Console I/O Buffer Size */
#define CONFIG_SYS_CBSIZE 1024
diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h
index e7ccfea..53113f0 100644
--- a/include/configs/sama5d2_icp.h
+++ b/include/configs/sama5d2_icp.h
@@ -14,8 +14,6 @@
#undef CONFIG_SYS_AT91_MAIN_CLOCK
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */
-#define CONFIG_MISC_INIT_R
-
/* SDRAM */
#define CONFIG_SYS_SDRAM_BASE 0x20000000
#define CONFIG_SYS_SDRAM_SIZE 0x20000000
diff --git a/include/configs/sandbox.h b/include/configs/sandbox.h
index 24c9a84..d614b70 100644
--- a/include/configs/sandbox.h
+++ b/include/configs/sandbox.h
@@ -6,14 +6,6 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#ifdef FTRACE
-#define CONFIG_TRACE
-#define CONFIG_TRACE_BUFFER_SIZE (16 << 20)
-#define CONFIG_TRACE_EARLY_SIZE (16 << 20)
-#define CONFIG_TRACE_EARLY
-#define CONFIG_TRACE_EARLY_ADDR 0x00100000
-#endif
-
#ifndef CONFIG_SPL_BUILD
#define CONFIG_IO_TRACE
#endif
@@ -32,8 +24,6 @@
/* SPI - enable all SPI flash types for testing purposes */
-#define CONFIG_I2C_EDID
-
#define CONFIG_SYS_FDT_LOAD_ADDR 0x100
#define CONFIG_PHYSMEM
diff --git a/include/configs/smartweb.h b/include/configs/smartweb.h
index f43304d..7ce3aea 100644
--- a/include/configs/smartweb.h
+++ b/include/configs/smartweb.h
@@ -85,7 +85,6 @@
* Ethernet configuration
*
*/
-#define CONFIG_MACB
#define CONFIG_RMII /* use reduced MII inteface */
#define CONFIG_NET_RETRY_COUNT 20 /* # of DHCP/BOOTP retries */
#define CONFIG_AT91_WANTS_COMMON_PHY
diff --git a/include/configs/snapper9260.h b/include/configs/snapper9260.h
index 32abeb0..10f8fde 100644
--- a/include/configs/snapper9260.h
+++ b/include/configs/snapper9260.h
@@ -38,7 +38,6 @@
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
/* Ethernet */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_RESET_PHY_R
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index b13584d..de918e7 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -39,7 +39,6 @@
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC8
/* Ethernet */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_RESET_PHY_R
diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h
index fc1d451..21e70c2 100644
--- a/include/configs/socfpga_arria5_secu1.h
+++ b/include/configs/socfpga_arria5_secu1.h
@@ -9,9 +9,6 @@
#include <asm/arch/base_addr_ac5.h>
#include <linux/stringify.h>
-/* Call misc_init_r */
-#define CONFIG_MISC_INIT_R
-
#define CONFIG_HUSH_INIT_VAR
/* Eternal oscillator */
#define CONFIG_SYS_TIMER_RATE 40000000
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 4a0235d..4d7072c 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -59,8 +59,6 @@
/* Flash device info */
-/*#define CONFIG_ENV_IS_IN_SPI_FLASH*/
-
#ifndef CONFIG_SPL_BUILD
#define CONFIG_MTD_PARTITIONS
#define MTDIDS_DEFAULT "nor0=ff705000.spi.0"
diff --git a/include/configs/stm32mp1.h b/include/configs/stm32mp15_common.h
similarity index 77%
rename from include/configs/stm32mp1.h
rename to include/configs/stm32mp15_common.h
index 30d4e8f..4e2cabf 100644
--- a/include/configs/stm32mp1.h
+++ b/include/configs/stm32mp15_common.h
@@ -5,12 +5,12 @@
* Configuration settings for the STM32MP15x CPU
*/
-#ifndef __CONFIG_H
-#define __CONFIG_H
+#ifndef __CONFIG_STM32MP15_COMMMON_H
+#define __CONFIG_STM32MP15_COMMMON_H
#include <linux/sizes.h>
#include <asm/arch/stm32.h>
-#ifndef CONFIG_TFABOOT
+#ifdef CONFIG_ARMV7_PSCI
/* PSCI support */
#define CONFIG_ARMV7_SECURE_BASE STM32_SYSRAM_BASE
#define CONFIG_ARMV7_SECURE_MAX_SIZE STM32_SYSRAM_SIZE
@@ -104,11 +104,11 @@
BOOT_TARGET_PXE(func)
/*
- * bootcmd for stm32mp1:
+ * default bootcmd for stm32mp1:
* for serial/usb: execute the stm32prog command
- * for mmc boot (eMMC, SD card), boot only on the same device
- * for nand or spi-nand boot, boot with on ubifs partition on UBI partition
- * for nor boot, use the default order
+ * for mmc boot (eMMC, SD card), distro boot on the same mmc device
+ * for nand or spi-nand boot, distro boot with ubifs on UBI partition
+ * for nor boot, use the default distro order in ${boot_targets}
*/
#define STM32MP_BOOTCMD "bootcmd_stm32mp=" \
"echo \"Boot over ${boot_device}${boot_instance}!\";" \
@@ -126,7 +126,7 @@
#ifdef CONFIG_FASTBOOT_CMD_OEM_FORMAT
/* eMMC default partitions for fastboot command: oem format */
-#define PARTS_DEFAULT \
+#define STM32MP_PARTS_DEFAULT \
"partitions=" \
"name=ssbl,size=2M;" \
"name=bootfs,size=64MB,bootable;" \
@@ -134,9 +134,14 @@
"name=rootfs,size=746M;" \
"name=userfs,size=-\0"
#else
-#define PARTS_DEFAULT
+#define STM32MP_PARTS_DEFAULT
#endif
+#define STM32MP_EXTRA \
+ "altbootcmd=run bootcmd\0" \
+ "env_check=if env info -p -d -q; then env save; fi\0" \
+ "boot_net_usb_start=true\0"
+
#include <config_distro_bootcmd.h>
/*
@@ -144,21 +149,29 @@
* 1M fdt, 1M script, 1M pxe and 1M for overlay
* and the ramdisk at the end.
*/
+#define __KERNEL_ADDR_R __stringify(0xc2000000)
+#define __FDT_ADDR_R __stringify(0xc4000000)
+#define __SCRIPT_ADDR_R __stringify(0xc4100000)
+#define __PXEFILE_ADDR_R __stringify(0xc4200000)
+#define __FDTOVERLAY_ADDR_R __stringify(0xc4300000)
+#define __RAMDISK_ADDR_R __stringify(0xc4400000)
+
+#define STM32MP_MEM_LAYOUT \
+ "kernel_addr_r=" __KERNEL_ADDR_R "\0" \
+ "fdt_addr_r=" __FDT_ADDR_R "\0" \
+ "scriptaddr=" __SCRIPT_ADDR_R "\0" \
+ "pxefile_addr_r=" __PXEFILE_ADDR_R "\0" \
+ "fdtoverlay_addr_r=" __FDTOVERLAY_ADDR_R "\0" \
+ "ramdisk_addr_r=" __RAMDISK_ADDR_R "\0"
+
#define CONFIG_EXTRA_ENV_SETTINGS \
- "kernel_addr_r=0xc2000000\0" \
- "fdt_addr_r=0xc4000000\0" \
- "scriptaddr=0xc4100000\0" \
- "pxefile_addr_r=0xc4200000\0" \
- "fdtoverlay_addr_r=0xc4300000\0" \
- "ramdisk_addr_r=0xc4400000\0" \
- "altbootcmd=run bootcmd\0" \
- "env_check=if env info -p -d -q; then env save; fi\0" \
+ STM32MP_MEM_LAYOUT \
STM32MP_BOOTCMD \
- PARTS_DEFAULT \
+ STM32MP_PARTS_DEFAULT \
BOOTENV \
- "boot_net_usb_start=true\0"
+ STM32MP_EXTRA
#endif /* ifndef CONFIG_SPL_BUILD */
#endif /* ifdef CONFIG_DISTRO_DEFAULTS*/
-#endif /* __CONFIG_H */
+#endif /* __CONFIG_STM32MP15_COMMMON_H */
diff --git a/include/configs/dh_stm32mp1.h b/include/configs/stm32mp15_dh_dhsom.h
similarity index 64%
rename from include/configs/dh_stm32mp1.h
rename to include/configs/stm32mp15_dh_dhsom.h
index 89d317b..c559cd7 100644
--- a/include/configs/dh_stm32mp1.h
+++ b/include/configs/stm32mp15_dh_dhsom.h
@@ -5,10 +5,10 @@
* Configuration settings for the DH STM32MP15x SoMs
*/
-#ifndef __CONFIG_DH_STM32MP1_H__
-#define __CONFIG_DH_STM32MP1_H__
+#ifndef __CONFIG_STM32MP15_DH_DHSOM_H__
+#define __CONFIG_STM32MP15_DH_DHSOM_H__
-#include <configs/stm32mp1.h>
+#include <configs/stm32mp15_common.h>
#define CONFIG_SPL_TARGET "u-boot.itb"
diff --git a/include/configs/stm32mp15_st_common.h b/include/configs/stm32mp15_st_common.h
new file mode 100644
index 0000000..10248bf
--- /dev/null
+++ b/include/configs/stm32mp15_st_common.h
@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */
+/*
+ * Copyright (C) 2021, STMicroelectronics - All Rights Reserved
+ *
+ * Configuration settings for the STMicroelectonics STM32MP15x boards
+ */
+
+#ifndef __CONFIG_STM32MP15_ST_COMMON_H__
+#define __CONFIG_STM32MP15_ST_COMMON_H__
+
+#include <configs/stm32mp15_common.h>
+
+#ifdef CONFIG_EXTRA_ENV_SETTINGS
+/*
+ * default bootcmd for stm32mp1 STMicroelectronics boards:
+ * for serial/usb: execute the stm32prog command
+ * for mmc boot (eMMC, SD card), distro boot on the same mmc device
+ * for nand or spi-nand boot, distro boot with ubifs on UBI partition
+ * for nor boot, distro boot on SD card = mmc0 ONLY !
+ */
+#define ST_STM32MP1_BOOTCMD "bootcmd_stm32mp=" \
+ "echo \"Boot over ${boot_device}${boot_instance}!\";" \
+ "if test ${boot_device} = serial || test ${boot_device} = usb;" \
+ "then stm32prog ${boot_device} ${boot_instance}; " \
+ "else " \
+ "run env_check;" \
+ "if test ${boot_device} = mmc;" \
+ "then env set boot_targets \"mmc${boot_instance}\"; fi;" \
+ "if test ${boot_device} = nand ||" \
+ " test ${boot_device} = spi-nand ;" \
+ "then env set boot_targets ubifs0; fi;" \
+ "if test ${boot_device} = nor;" \
+ "then env set boot_targets mmc0; fi;" \
+ "run distro_bootcmd;" \
+ "fi;\0"
+
+#undef CONFIG_EXTRA_ENV_SETTINGS
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ STM32MP_MEM_LAYOUT \
+ ST_STM32MP1_BOOTCMD \
+ STM32MP_PARTS_DEFAULT \
+ BOOTENV \
+ STM32MP_EXTRA
+
+#endif
+#endif
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 4573093..0a4cd84 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -122,10 +122,6 @@
* Environment is embedded in u-boot in the second sector of the flash
*/
-#if defined(CONFIG_CF_SBF)
-#define CONFIG_ENV_IS_IN_SPI_FLASH 1
-#endif
-
/* Cache Configuration */
#define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \
CONFIG_SYS_INIT_RAM_SIZE - 8)
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index aac7b5d..28f5463 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -33,13 +33,9 @@
/* Serial (pl011) */
#define UART_CLK (62500000)
-#define CONFIG_SERIAL_MULTI
-#define CONFIG_PL011_SERIAL
#define CONFIG_PL011_CLOCK UART_CLK
#define CONFIG_PL01x_PORTS {(void *)(0x2a400000)}
-#define CONFIG_ENV_OVERWRITE /* ethaddr can be reprogrammed */
-
/* Support MTD */
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_FLASH_BASE (0x08000000)
diff --git a/include/configs/taurus.h b/include/configs/taurus.h
index 1dd7823..e4609b5 100644
--- a/include/configs/taurus.h
+++ b/include/configs/taurus.h
@@ -68,7 +68,6 @@
#endif
/* Ethernet */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_AT91_WANTS_COMMON_PHY
diff --git a/include/configs/usb_a9263.h b/include/configs/usb_a9263.h
index c12e536..49895e7 100644
--- a/include/configs/usb_a9263.h
+++ b/include/configs/usb_a9263.h
@@ -48,7 +48,6 @@
#endif
/* Ethernet */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_AT91_WANTS_COMMON_PHY
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 693fd69..7fbec27 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -101,7 +101,6 @@
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
/* USDHC */
-#define CONFIG_FSL_USDHC
#define CONFIG_SYS_FSL_USDHC_NUM 2
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 7397d3e..b353c37 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -51,7 +51,6 @@
/* USB device */
/* Ethernet Hardware */
-#define CONFIG_MACB
#define CONFIG_RMII
#define CONFIG_NET_RETRY_COUNT 20
#define CONFIG_MACB_SEARCH_PHY
diff --git a/include/dm/ofnode.h b/include/dm/ofnode.h
index 6a714d0..0f680e5 100644
--- a/include/dm/ofnode.h
+++ b/include/dm/ofnode.h
@@ -1010,6 +1010,30 @@
node = ofnode_next_subnode(node))
/**
+ * ofnode_for_each_compatible_node() - iterate over all nodes with a given
+ * compatible string
+ *
+ * @node: child node (ofnode, lvalue)
+ * @compat: compatible string to match
+ *
+ * This is a wrapper around a for loop and is used like so:
+ *
+ * ofnode node;
+ *
+ * ofnode_for_each_compatible_node(node, parent, compatible) {
+ * Use node
+ * ...
+ * }
+ *
+ * Note that this is implemented as a macro and @node is used as
+ * iterator in the loop.
+ */
+#define ofnode_for_each_compatible_node(node, compat) \
+ for (node = ofnode_by_compatible(ofnode_null(), compat); \
+ ofnode_valid(node); \
+ node = ofnode_by_compatible(node, compat))
+
+/**
* ofnode_get_child_count() - get the child count of a ofnode
*
* @node: valid node to get its child count
diff --git a/include/dt-bindings/clock/fsl,qoriq-clockgen.h b/include/dt-bindings/clock/fsl,qoriq-clockgen.h
new file mode 100644
index 0000000..ddec7d0
--- /dev/null
+++ b/include/dt-bindings/clock/fsl,qoriq-clockgen.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef DT_CLOCK_FSL_QORIQ_CLOCKGEN_H
+#define DT_CLOCK_FSL_QORIQ_CLOCKGEN_H
+
+#define QORIQ_CLK_SYSCLK 0
+#define QORIQ_CLK_CMUX 1
+#define QORIQ_CLK_HWACCEL 2
+#define QORIQ_CLK_FMAN 3
+#define QORIQ_CLK_PLATFORM_PLL 4
+#define QORIQ_CLK_CORECLK 5
+
+#define QORIQ_CLK_PLL_DIV(x) ((x) - 1)
+
+#endif /* DT_CLOCK_FSL_QORIQ_CLOCKGEN_H */
diff --git a/include/env_internal.h b/include/env_internal.h
index f74927c..174c3b1 100644
--- a/include/env_internal.h
+++ b/include/env_internal.h
@@ -54,7 +54,6 @@
# error "is set"
# endif
extern unsigned long nand_env_oob_offset;
-# define CONFIG_ENV_OFFSET nand_env_oob_offset
# endif /* CONFIG_ENV_OFFSET_OOB */
#endif /* CONFIG_ENV_IS_IN_NAND */
diff --git a/include/fsl-mc/fsl_mc.h b/include/fsl-mc/fsl_mc.h
index a8b072a..07a46a4 100644
--- a/include/fsl-mc/fsl_mc.h
+++ b/include/fsl-mc/fsl_mc.h
@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2014 Freescale Semiconductor
+ * Copyright 2021 NXP
*/
#ifndef __FSL_MC_H__
@@ -52,6 +53,14 @@
u32 reg_error[];
};
+struct log_header {
+ u32 magic_word;
+ char reserved[4];
+ u32 buf_start;
+ u32 buf_length;
+ u32 last_byte;
+};
+
void fdt_fsl_mc_fixup_iommu_map_entry(void *blob);
int get_mc_boot_status(void);
int get_dpl_apply_status(void);
diff --git a/include/lynxkdi.h b/include/lynxkdi.h
deleted file mode 100644
index 3864027..0000000
--- a/include/lynxkdi.h
+++ /dev/null
@@ -1,24 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2003
- * Orbacom Systems, Inc.
- */
-
-#ifndef __LYNXKDI_H__
-#define __LYNXKDI_H__
-
-
-/* Boot parameter struct passed to kernel
- */
-typedef struct lynxos_bootparms_t {
- uint8_t rsvd1[2]; /* Reserved */
- uint8_t ethaddr[6]; /* Ethernet address */
- uint16_t flags; /* Boot flags */
- uint32_t rate; /* System frequency */
- uint32_t clock_ref; /* Time reference */
- uint32_t dramsz; /* DRAM size */
- uint32_t rsvd2; /* Reserved */
-} lynxos_bootparms_t;
-
-
-#endif /* __LYNXKDI_H__ */
diff --git a/include/pxe_utils.h b/include/pxe_utils.h
new file mode 100644
index 0000000..b7037f8
--- /dev/null
+++ b/include/pxe_utils.h
@@ -0,0 +1,253 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+
+#ifndef __PXE_UTILS_H
+#define __PXE_UTILS_H
+
+#include <linux/list.h>
+
+/*
+ * A note on the pxe file parser.
+ *
+ * We're parsing files that use syslinux grammar, which has a few quirks.
+ * String literals must be recognized based on context - there is no
+ * quoting or escaping support. There's also nothing to explicitly indicate
+ * when a label section completes. We deal with that by ending a label
+ * section whenever we see a line that doesn't include.
+ *
+ * As with the syslinux family, this same file format could be reused in the
+ * future for non pxe purposes. The only action it takes during parsing that
+ * would throw this off is handling of include files. It assumes we're using
+ * pxe, and does a tftp download of a file listed as an include file in the
+ * middle of the parsing operation. That could be handled by refactoring it to
+ * take a 'include file getter' function.
+ */
+
+/*
+ * Describes a single label given in a pxe file.
+ *
+ * Create these with the 'label_create' function given below.
+ *
+ * name - the name of the menu as given on the 'menu label' line.
+ * kernel - the path to the kernel file to use for this label.
+ * append - kernel command line to use when booting this label
+ * initrd - path to the initrd to use for this label.
+ * attempted - 0 if we haven't tried to boot this label, 1 if we have.
+ * localboot - 1 if this label specified 'localboot', 0 otherwise.
+ * list - lets these form a list, which a pxe_menu struct will hold.
+ */
+struct pxe_label {
+ char num[4];
+ char *name;
+ char *menu;
+ char *kernel;
+ char *config;
+ char *append;
+ char *initrd;
+ char *fdt;
+ char *fdtdir;
+ char *fdtoverlays;
+ int ipappend;
+ int attempted;
+ int localboot;
+ int localboot_val;
+ struct list_head list;
+};
+
+/*
+ * Describes a pxe menu as given via pxe files.
+ *
+ * title - the name of the menu as given by a 'menu title' line.
+ * default_label - the name of the default label, if any.
+ * bmp - the bmp file name which is displayed in background
+ * timeout - time in tenths of a second to wait for a user key-press before
+ * booting the default label.
+ * prompt - if 0, don't prompt for a choice unless the timeout period is
+ * interrupted. If 1, always prompt for a choice regardless of
+ * timeout.
+ * labels - a list of labels defined for the menu.
+ */
+struct pxe_menu {
+ char *title;
+ char *default_label;
+ char *bmp;
+ int timeout;
+ int prompt;
+ struct list_head labels;
+};
+
+struct pxe_context;
+typedef int (*pxe_getfile_func)(struct pxe_context *ctx, const char *file_path,
+ char *file_addr, ulong *filesizep);
+
+/**
+ * struct pxe_context - context information for PXE parsing
+ *
+ * @cmdtp: Pointer to command table to use when calling other commands
+ * @getfile: Function called by PXE to read a file
+ * @userdata: Data the caller requires for @getfile
+ * @allow_abs_path: true to allow absolute paths
+ * @bootdir: Directory that files are loaded from ("" if no directory). This is
+ * allocated
+ * @pxe_file_size: Size of the PXE file
+ */
+struct pxe_context {
+ struct cmd_tbl *cmdtp;
+ /**
+ * getfile() - read a file
+ *
+ * @ctx: PXE context
+ * @file_path: Path to the file
+ * @file_addr: String containing the hex address to put the file in
+ * memory
+ * @filesizep: Returns the file size in bytes
+ * Return 0 if OK, -ve on error
+ */
+ pxe_getfile_func getfile;
+
+ void *userdata;
+ bool allow_abs_path;
+ char *bootdir;
+ ulong pxe_file_size;
+};
+
+/**
+ * destroy_pxe_menu() - Destroy an allocated pxe structure
+ *
+ * Free the memory used by a pxe_menu and its labels
+ *
+ * @cfg: Config to destroy, previous returned from parse_pxefile()
+ */
+void destroy_pxe_menu(struct pxe_menu *cfg);
+
+/**
+ * get_pxe_file() - Read a file
+ *
+ * Retrieve the file at 'file_path' to the locate given by 'file_addr'. If
+ * 'bootfile' was specified in the environment, the path to bootfile will be
+ * prepended to 'file_path' and the resulting path will be used.
+ *
+ * @ctx: PXE context
+ * @file_path: Path to file
+ * @file_addr: Address to place file
+ * Returns 1 on success, or < 0 for error
+ */
+int get_pxe_file(struct pxe_context *ctx, const char *file_path,
+ ulong file_addr);
+
+/**
+ * get_pxelinux_path() - Read a file from the same place as pxelinux.cfg
+ *
+ * Retrieves a file in the 'pxelinux.cfg' folder. Since this uses get_pxe_file()
+ * to do the hard work, the location of the 'pxelinux.cfg' folder is generated
+ * from the bootfile path, as described in get_pxe_file().
+ *
+ * @ctx: PXE context
+ * @file: Relative path to file
+ * @pxefile_addr_r: Address to load file
+ * Returns 1 on success or < 0 on error.
+ */
+int get_pxelinux_path(struct pxe_context *ctx, const char *file,
+ ulong pxefile_addr_r);
+
+/**
+ * handle_pxe_menu() - Boot the system as prescribed by a pxe_menu.
+ *
+ * Use the menu system to either get the user's choice or the default, based
+ * on config or user input. If there is no default or user's choice,
+ * attempted to boot labels in the order they were given in pxe files.
+ * If the default or user's choice fails to boot, attempt to boot other
+ * labels in the order they were given in pxe files.
+ *
+ * If this function returns, there weren't any labels that successfully
+ * booted, or the user interrupted the menu selection via ctrl+c.
+ *
+ * @ctx: PXE context
+ * @cfg: PXE menu
+ */
+void handle_pxe_menu(struct pxe_context *ctx, struct pxe_menu *cfg);
+
+/**
+ * parse_pxefile() - Parsing a pxe file
+ *
+ * This is only used for the top-level file.
+ *
+ * @ctx: PXE context (provided by the caller)
+ * Returns NULL if there is an error, otherwise, returns a pointer to a
+ * pxe_menu struct populated with the results of parsing the pxe file (and any
+ * files it includes). The resulting pxe_menu struct can be free()'d by using
+ * the destroy_pxe_menu() function.
+ */
+struct pxe_menu *parse_pxefile(struct pxe_context *ctx, ulong menucfg);
+
+/**
+ * format_mac_pxe() - Convert a MAC address to PXE format
+ *
+ * Convert an ethaddr from the environment to the format used by pxelinux
+ * filenames based on mac addresses. Convert's ':' to '-', and adds "01-" to
+ * the beginning of the ethernet address to indicate a hardware type of
+ * Ethernet. Also converts uppercase hex characters into lowercase, to match
+ * pxelinux's behavior.
+ *
+ * @outbuf: Buffer to hold the output (must hold 22 bytes)
+ * @outbuf_len: Length of buffer
+ * Returns 1 for success, -ENOENT if 'ethaddr' is undefined in the
+ * environment, or some other value < 0 on error.
+ */
+int format_mac_pxe(char *outbuf, size_t outbuf_len);
+
+/**
+ * pxe_setup_ctx() - Setup a new PXE context
+ *
+ * @ctx: Context to set up
+ * @cmdtp: Command table entry which started this action
+ * @getfile: Function to call to read a file
+ * @userdata: Data the caller requires for @getfile - stored in ctx->userdata
+ * @allow_abs_path: true to allow absolute paths
+ * @bootfile: Bootfile whose directory loaded files are relative to, NULL if
+ * none
+ * @return 0 if OK, -ENOMEM if out of memory, -E2BIG if bootfile is larger than
+ * MAX_TFTP_PATH_LEN bytes
+ */
+int pxe_setup_ctx(struct pxe_context *ctx, struct cmd_tbl *cmdtp,
+ pxe_getfile_func getfile, void *userdata,
+ bool allow_abs_path, const char *bootfile);
+
+/**
+ * pxe_destroy_ctx() - Destroy a PXE context
+ *
+ * @ctx: Context to destroy
+ */
+void pxe_destroy_ctx(struct pxe_context *ctx);
+
+/**
+ * pxe_process() - Process a PXE file through to boot
+ *
+ * @ctx: PXE context created with pxe_setup_ctx()
+ * @pxefile_addr_r: Address to load file
+ * @prompt: Force a prompt for the user
+ */
+int pxe_process(struct pxe_context *ctx, ulong pxefile_addr_r, bool prompt);
+
+/**
+ * pxe_get_file_size() - Read the value of the 'filesize' environment variable
+ *
+ * @sizep: Place to put the value
+ * @return 0 if OK, -ENOENT if no such variable, -EINVAL if format is invalid
+ */
+int pxe_get_file_size(ulong *sizep);
+
+/**
+ * pxe_get() - Get the PXE file from the server
+ *
+ * This tries various filenames to obtain a PXE file
+ *
+ * @pxefile_addr_r: Address to put file
+ * @bootdirp: Returns the boot filename, or NULL if none. This is the 'bootfile'
+ * option provided by the DHCP server. If none, returns NULL. For example,
+ * "rpi/info", which indicates that all files should be fetched from the
+ * "rpi/" subdirectory
+ * @sizep: Size of the PXE file (not bootfile)
+ */
+int pxe_get(ulong pxefile_addr_r, char **bootdirp, ulong *sizep);
+
+#endif /* __PXE_UTILS_H */
diff --git a/include/vsprintf.h b/include/vsprintf.h
index 83d187e..b474630 100644
--- a/include/vsprintf.h
+++ b/include/vsprintf.h
@@ -172,7 +172,30 @@
* See the vsprintf() documentation for format string extensions over C99.
*/
int vsprintf(char *buf, const char *fmt, va_list args);
-char *simple_itoa(ulong i);
+
+/**
+ * simple_itoa() - convert an unsigned integer to a string
+ *
+ * This returns a static string containing the decimal representation of the
+ * given value. The returned value may be overwritten by other calls to other
+ * simple_... functions, so should be used immediately
+ *
+ * @val: Value to convert
+ * @return string containing the decimal representation of @val
+ */
+char *simple_itoa(ulong val);
+
+/**
+ * simple_xtoa() - convert an unsigned integer to a hex string
+ *
+ * This returns a static string containing the hexadecimal representation of the
+ * given value. The returned value may be overwritten by other calls to other
+ * simple_... functions, so should be used immediately
+ *
+ * @val: Value to convert
+ * @return string containing the hexecimal representation of @val
+ */
+char *simple_xtoa(ulong num);
/**
* Format a string and place it in a buffer
diff --git a/lib/vsprintf.c b/lib/vsprintf.c
index d7ee35b..e634bd7 100644
--- a/lib/vsprintf.c
+++ b/lib/vsprintf.c
@@ -816,11 +816,12 @@
}
#endif
+static char local_toa[22];
+
char *simple_itoa(ulong i)
{
/* 21 digits plus null terminator, good for 64-bit or smaller ints */
- static char local[22];
- char *p = &local[21];
+ char *p = &local_toa[21];
*p-- = '\0';
do {
@@ -830,6 +831,21 @@
return p + 1;
}
+char *simple_xtoa(ulong num)
+{
+ /* 16 digits plus nul terminator, good for 64-bit or smaller ints */
+ char *p = &local_toa[17];
+
+ *--p = '\0';
+ do {
+ p -= 2;
+ hex_byte_pack(p, num & 0xff);
+ num >>= 8;
+ } while (num > 0);
+
+ return p;
+}
+
/* We don't seem to have %'d in U-Boot */
void print_grouped_ull(unsigned long long int_val, int digits)
{
diff --git a/scripts/Makefile.spl b/scripts/Makefile.spl
index 1bb2844..83a95ee 100644
--- a/scripts/Makefile.spl
+++ b/scripts/Makefile.spl
@@ -92,10 +92,10 @@
# Special handling for a few options which support SPL/TPL
ifeq ($(CONFIG_TPL_BUILD),y)
-libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += common/ cmd/ env/
+libs-$(CONFIG_TPL_LIBCOMMON_SUPPORT) += boot/ common/ cmd/ env/
libs-$(CONFIG_TPL_LIBGENERIC_SUPPORT) += lib/
else
-libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += common/ cmd/ env/
+libs-$(CONFIG_SPL_LIBCOMMON_SUPPORT) += boot/ common/ cmd/ env/
libs-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/
ifdef CONFIG_SPL_FRAMEWORK
libs-$(CONFIG_PARTITIONS) += disk/
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 6792e28..b9c1c61 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -298,7 +298,6 @@
CONFIG_EXYNOS5250
CONFIG_EXYNOS5420
CONFIG_EXYNOS5_DT
-CONFIG_EXYNOS7420
CONFIG_EXYNOS_ACE_SHA
CONFIG_EXYNOS_DP
CONFIG_EXYNOS_FB
@@ -741,7 +740,6 @@
CONFIG_LS102XA_STREAM_ID
CONFIG_LSCHLV2
CONFIG_LSXHL
-CONFIG_LYNXKDI
CONFIG_M41T94_SPI_CS
CONFIG_M520x
CONFIG_M5301x
@@ -1076,7 +1074,6 @@
CONFIG_SERIAL_BOOT
CONFIG_SERIAL_FLASH
CONFIG_SERIAL_HW_FLOW_CONTROL
-CONFIG_SERIAL_MULTI
CONFIG_SERIAL_SOFTWARE_FIFO
CONFIG_SERIRQ_CONTINUOUS_MODE
CONFIG_SERVERIP
@@ -1685,7 +1682,6 @@
CONFIG_SYS_FM2_DTSEC4_PHY_ADDR
CONFIG_SYS_FM2_DTSEC_MDIO_ADDR
CONFIG_SYS_FM2_TGEC_MDIO_ADDR
-CONFIG_SYS_FMAN_FW_ADDR
CONFIG_SYS_FMAN_V3
CONFIG_SYS_FM_MURAM_SIZE
CONFIG_SYS_FORM_3U_CPCI
@@ -2629,8 +2625,6 @@
CONFIG_SYS_PTDPAR
CONFIG_SYS_PTV
CONFIG_SYS_PUAPAR
-CONFIG_SYS_QE_FMAN_FW_LENGTH
-CONFIG_SYS_QE_FW_ADDR
CONFIG_SYS_QMAN_CENA_BASE
CONFIG_SYS_QMAN_CENA_SIZE
CONFIG_SYS_QMAN_CINH_BASE
diff --git a/test/dm/ofnode.c b/test/dm/ofnode.c
index 49efabe..cea0746 100644
--- a/test/dm/ofnode.c
+++ b/test/dm/ofnode.c
@@ -333,3 +333,21 @@
return 0;
}
DM_TEST(dm_test_ofnode_conf, 0);
+
+static int dm_test_ofnode_for_each_compatible_node(struct unit_test_state *uts)
+{
+ const char compatible[] = "denx,u-boot-fdt-test";
+ bool found = false;
+ ofnode node;
+
+ ofnode_for_each_compatible_node(node, compatible) {
+ ut_assert(ofnode_device_is_compatible(node, compatible));
+ found = true;
+ }
+
+ /* There should be at least one matching node */
+ ut_assert(found);
+
+ return 0;
+}
+DM_TEST(dm_test_ofnode_for_each_compatible_node, UT_TESTF_SCAN_FDT);
diff --git a/test/print_ut.c b/test/print_ut.c
index 11d8580..152a8c3 100644
--- a/test/print_ut.c
+++ b/test/print_ut.c
@@ -10,6 +10,7 @@
#include <log.h>
#include <mapmem.h>
#include <version_string.h>
+#include <vsprintf.h>
#include <test/suites.h>
#include <test/test.h>
#include <test/ut.h>
@@ -328,6 +329,46 @@
}
PRINT_TEST(print_do_hex_dump, UT_TESTF_CONSOLE_REC);
+static int print_itoa(struct unit_test_state *uts)
+{
+ ut_asserteq_str("123", simple_itoa(123));
+ ut_asserteq_str("0", simple_itoa(0));
+ ut_asserteq_str("2147483647", simple_itoa(0x7fffffff));
+ ut_asserteq_str("4294967295", simple_itoa(0xffffffff));
+
+ /* Use #ifdef here to avoid a compiler warning on 32-bit machines */
+#ifdef CONFIG_PHYS_64BIT
+ if (sizeof(ulong) == 8) {
+ ut_asserteq_str("9223372036854775807",
+ simple_itoa((1UL << 63) - 1));
+ ut_asserteq_str("18446744073709551615", simple_itoa(-1));
+ }
+#endif /* CONFIG_PHYS_64BIT */
+
+ return 0;
+}
+PRINT_TEST(print_itoa, 0);
+
+static int print_xtoa(struct unit_test_state *uts)
+{
+ ut_asserteq_str("7f", simple_xtoa(127));
+ ut_asserteq_str("00", simple_xtoa(0));
+ ut_asserteq_str("7fffffff", simple_xtoa(0x7fffffff));
+ ut_asserteq_str("ffffffff", simple_xtoa(0xffffffff));
+
+ /* Use #ifdef here to avoid a compiler warning on 32-bit machines */
+#ifdef CONFIG_PHYS_64BIT
+ if (sizeof(ulong) == 8) {
+ ut_asserteq_str("7fffffffffffffff",
+ simple_xtoa((1UL << 63) - 1));
+ ut_asserteq_str("ffffffffffffffff", simple_xtoa(-1));
+ }
+#endif /* CONFIG_PHYS_64BIT */
+
+ return 0;
+}
+PRINT_TEST(print_xtoa, 0);
+
int do_ut_print(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
{
struct unit_test *tests = UNIT_TEST_SUITE_START(print_test);
diff --git a/tools/Makefile b/tools/Makefile
index b45219e..1763f44 100644
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -76,9 +76,9 @@
hostprogs-$(CONFIG_CMD_BOOTEFI_SELFTEST) += file2include
-FIT_OBJS-y := fit_common.o fit_image.o image-host.o common/image-fit.o
-FIT_SIG_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := image-sig-host.o common/image-fit-sig.o
-FIT_CIPHER_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := common/image-cipher.o
+FIT_OBJS-y := fit_common.o fit_image.o image-host.o boot/image-fit.o
+FIT_SIG_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := image-sig-host.o boot/image-fit-sig.o
+FIT_CIPHER_OBJS-$(CONFIG_TOOLS_LIBCRYPTO) := boot/image-cipher.o
# The following files are synced with upstream DTC.
# Use synced versions from scripts/dtc/libfdt/.
@@ -106,14 +106,14 @@
$(FIT_OBJS-y) \
$(FIT_SIG_OBJS-y) \
$(FIT_CIPHER_OBJS-y) \
- common/fdt_region.o \
- common/bootm.o \
+ boot/fdt_region.o \
+ boot/bootm.o \
lib/crc32.o \
default_image.o \
lib/fdtdec_common.o \
lib/fdtdec.o \
- common/image.o \
- common/image-host.o \
+ boot/image.o \
+ boot/image-host.o \
imagetool.o \
imximage.o \
imx8image.o \
@@ -227,7 +227,7 @@
update_octeon_header-objs := update_octeon_header.o lib/crc32.o
hostprogs-y += fdtgrep
-fdtgrep-objs += $(LIBFDT_OBJS) common/fdt_region.o fdtgrep.o
+fdtgrep-objs += $(LIBFDT_OBJS) boot/fdt_region.o fdtgrep.o
ifneq ($(TOOLS_ONLY),y)
hostprogs-y += spl_size_limit
@@ -254,7 +254,7 @@
quiet_cmd_wrap = WRAP $@
cmd_wrap = echo "\#include <../$(patsubst $(obj)/%,%,$@)>" >$@
-$(obj)/lib/%.c $(obj)/common/%.c $(obj)/env/%.c:
+$(obj)/boot/%.c $(obj)/common/%.c $(obj)/env/%.c $(obj)/lib/%.c:
$(call cmd,wrap)
clean-dirs := lib common