| commit | f28e5c946d6c88b1c8639896863c7ad7d8889bf4 | [log] [tgz] |
|---|---|---|
| author | Shiraz Hashim <shiraz.hashim@st.com> | Mon May 07 13:07:00 2012 +0530 |
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | Sat Jul 07 14:07:42 2012 +0200 |
| tree | 532ae86ae7cf78b9b60e73444e296c57b21ee59c | |
| parent | 7c885a0e5532abcd6bc802d21a7858420e5c127b [diff] |
SPEAr: Correct SoC ID offset in misc configuration space SoC Core ID offset is 0x30 in miscellaneous configuration address space. It was wrongly mentioned as periph2 clk enable. Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Amit Virdi <amit.virdi@st.com> Acked-by: Stefan Roese <sr@denx.de> Signed-off-by: Stefan Roese <sr@denx.de>