| commit | be3a73c0c42c548bb892faed5b4e8e4fe7cd3295 | [log] [tgz] |
|---|---|---|
| author | Michal Simek <michal.simek@amd.com> | Wed Aug 31 11:28:59 2022 +0200 |
| committer | Michal Simek <michal.simek@amd.com> | Tue Sep 13 11:32:48 2022 +0200 |
| tree | 8ad2eb6b64504d4cb396e5134778dc9a4ce45e05 | |
| parent | a27278f054309aa9192c858154869fa25bdff5ec [diff] [blame] |
ARM: zynq: Align bss and end of u-boot image to 64bits
The main reason is that DT memory reserved code is expecting DT to be 64bit
aligned. For more information take a look at commit 5bd5ee02b23b ("xilinx:
zynqmp: Check that DT is 64bit aligned").
Signed-off-by: Michal Simek <michal.simek@amd.com>
Link: https://lore.kernel.org/r/9f3688cda188d8ea0b462df2aa08a10ddcc9c149.1661938136.git.michal.simek@amd.com
diff --git a/arch/arm/mach-zynq/u-boot.lds b/arch/arm/mach-zynq/u-boot.lds index a5169fd..3b7c9d5 100644 --- a/arch/arm/mach-zynq/u-boot.lds +++ b/arch/arm/mach-zynq/u-boot.lds
@@ -75,7 +75,7 @@ *(.__efi_runtime_rel_stop) } - . = ALIGN(4); + . = ALIGN(8); .image_copy_end : { *(.__image_copy_end) @@ -114,7 +114,7 @@ .bss __bss_base (OVERLAY) : { *(.bss*) - . = ALIGN(4); + . = ALIGN(8); __bss_limit = .; }