| commit | c624d07f3ff7ae7d29672bab189d2aeb99c63a95 | [log] [tgz] |
|---|---|---|
| author | Dinh Nguyen <dinguyen@opensource.altera.com> | Mon Nov 02 17:11:21 2015 -0600 |
| committer | Marek Vasut <marex@denx.de> | Tue Nov 03 17:32:16 2015 +0100 |
| tree | d1ace21fa5e8986683e6fbb282a8af07575869c0 | |
| parent | 96d59e9d6aa74e35c63dc74da10e41f8ba0f6de4 [diff] |
arm: socfpga: reset: correct dma, qspi, and sdmmc reset bit defines The DMA, QSPI, and SD/MMC reset bits are located in the permodrst register, not the mpumodrst. So the bank for these reset bits should be 1, not 0. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>