commit | c14f3c31112653f5c5a34b748e9defbd3bc5a8ef | [log] [tgz] |
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author | Vignesh Raghavendra <vigneshr@ti.com> | Mon Apr 22 21:43:33 2019 +0530 |
committer | Tom Rini <trini@konsulko.com> | Sun May 05 08:48:50 2019 -0400 |
tree | 2ade670a2d803e0c6118764da7062fb7f9f02fc3 | |
parent | add4967124f6b212fef4fa8e1e68143b1400c994 [diff] |
board: ti: am654: select SYS_DISABLE_DCACHE_OPS for arm64 build AM654 SoC is IO coherent wrt A53 cores, therefore enable SYS_DISABLE_DCACHE_OPS to avoid cache operations in A53 SPL/U-Boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>