commit c27483fcb0b525df45f33160300dda1149a6c69a
author Alifer Moraes <alifer.wsdm@gmail.com> Tue Jan 14 15:54:59 2020 -0300
committer Stefano Babic <sbabic@denx.de> Mon Jan 20 15:38:16 2020 +0100
tree a5a0a5624f6b31b5bbe8da96a86e70664999910a
parent 7132d38cbe45015ac5a4b099b2b1f4b656a5d854

imx8m: clock_imx8mm: Staticize functions

Functions fracpll_configure(), decode_intpll(), decode_fracpll(),
get_root_src_clk() and get_root_clk() are used only in the scope of this
file, so make them static to fix the following sparse warnings:

arch/arm/mach-imx/imx8m/clock_imx8mm.c:50:5: warning: no previous
prototype for ‘fracpll_configure’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:271:5: warning: no previous
prototype for ‘decode_intpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:418:5: warning: no previous
prototype for ‘decode_fracpll’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:483:5: warning: no previous
prototype for ‘get_root_src_clk’ [-Wmissing-prototypes]
arch/arm/mach-imx/imx8m/clock_imx8mm.c:527:5: warning: no previous
prototype for ‘get_root_clk’ [-Wmissing-prototypes]

Signed-off-by: Alifer Moraes <alifer.wsdm@gmail.com>

arch/arm/mach-imx/imx8m/clock_imx8mm.c

diff --git a/arch/arm/mach-imx/imx8m/clock_imx8mm.c b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
index ca4b4c0..c423ac0 100644
--- a/arch/arm/mach-imx/imx8m/clock_imx8mm.c
+++ b/arch/arm/mach-imx/imx8m/clock_imx8mm.c
@@ -47,7 +47,7 @@
 	PLL_1443X_RATE(100000000U, 300, 9, 3, 0),
 };
 
-int fracpll_configure(enum pll_clocks pll, u32 freq)
+static int fracpll_configure(enum pll_clocks pll, u32 freq)
 {
 	int i;
 	u32 tmp, div_val;
@@ -268,7 +268,7 @@
 	return 24000000U;
 }
 
-u32 decode_intpll(enum clk_root_src intpll)
+static u32 decode_intpll(enum clk_root_src intpll)
 {
 	u32 pll_gnrl_ctl, pll_div_ctl, pll_clke_mask;
 	u32 main_div, pre_div, post_div, div;
@@ -415,7 +415,7 @@
 	return lldiv(freq, pre_div * (1 << post_div) * div);
 }
 
-u32 decode_fracpll(enum clk_root_src frac_pll)
+static u32 decode_fracpll(enum clk_root_src frac_pll)
 {
 	u32 pll_gnrl_ctl, pll_fdiv_ctl0, pll_fdiv_ctl1;
 	u32 main_div, pre_div, post_div, k;
@@ -480,7 +480,7 @@
 		     65536 * pre_div * (1 << post_div));
 }
 
-u32 get_root_src_clk(enum clk_root_src root_src)
+static u32 get_root_src_clk(enum clk_root_src root_src)
 {
 	switch (root_src) {
 	case OSC_24M_CLK:
@@ -524,7 +524,7 @@
 	return 0;
 }
 
-u32 get_root_clk(enum clk_root_index clock_id)
+static u32 get_root_clk(enum clk_root_index clock_id)
 {
 	enum clk_root_src root_src;
 	u32 post_podf, pre_podf, root_src_clk;