riscv: Fix detecting FPU support in standard extension
We should check the string until it hits underscore, in case it
searches multi-letter extensions. For example, "rv64imac_xandes"
will be treated as D extension support since there is a "d" in
"andes", resulting illegal instruction caused by initializing FCSR.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Rick Chen <rick@andestech.com>
Reviewed-by: Padmarao Begari <padmarao.begari@microchip.com>
Reviewed-by: Samuel Holland <samuel@sholland.org>
diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c
index 52ab025..d34c8ef 100644
--- a/arch/riscv/cpu/cpu.c
+++ b/arch/riscv/cpu/cpu.c
@@ -36,6 +36,7 @@
#ifdef CONFIG_CPU
struct udevice *dev;
char desc[32];
+ int i;
uclass_find_first_device(UCLASS_CPU, &dev);
if (!dev) {
@@ -43,9 +44,16 @@
return false;
}
if (!cpu_get_desc(dev, desc, sizeof(desc))) {
- /* skip the first 4 characters (rv32|rv64) */
- if (strchr(desc + 4, ext))
- return true;
+ /*
+ * skip the first 4 characters (rv32|rv64) and
+ * check until underscore
+ */
+ for (i = 4; i < sizeof(desc); i++) {
+ if (desc[i] == '_' || desc[i] == '\0')
+ break;
+ if (desc[i] == ext)
+ return true;
+ }
}
return false;