rockchip; rk3399: disable SRAM security region
Some host like SD and eMMC may use DMA to transter data to SRAM,
set memory to non-secure to make sure the address can be accessed.
The security of SRAM in OS suppose to initialized in ATF bl31, and
the SPL is before the bl31.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/mach-rockchip/rk3399-board-spl.c b/arch/arm/mach-rockchip/rk3399-board-spl.c
index 050f5e1..e050aff 100644
--- a/arch/arm/mach-rockchip/rk3399-board-spl.c
+++ b/arch/arm/mach-rockchip/rk3399-board-spl.c
@@ -156,8 +156,6 @@
writel(TIMER_EN | TIMER_FMODE, TIMER_CHN10_BASE + TIMER_CONTROL_REG);
}
-#define SGRF_DDR_RGN_CON16 0xff330040
-
void board_debug_uart_init(void)
{
#include <asm/arch/grf_rk3399.h>
@@ -188,6 +186,8 @@
}
#define GRF_EMMCCORE_CON11 0xff77f02c
+#define SGRF_DDR_RGN_CON16 0xff330040
+#define SGRF_SLV_SECURE_CON4 0xff33e3d0
void board_init_f(ulong dummy)
{
struct udevice *pinctrl;
@@ -207,6 +207,7 @@
debug_uart_init();
printascii("U-Boot SPL board init");
#endif
+
/* Emmc clock generator: disable the clock multipilier */
rk_clrreg(GRF_EMMCCORE_CON11, 0x0ff);
@@ -217,7 +218,7 @@
}
/*
- * Disable DDR security regions.
+ * Disable DDR and SRAM security regions.
*
* As we are entered from the BootROM, the region from
* 0x0 through 0xfffff (i.e. the first MB of memory) will
@@ -226,6 +227,7 @@
* located in this range.
*/
rk_clrsetreg(SGRF_DDR_RGN_CON16, 0x1FF, 0);
+ rk_clrreg(SGRF_SLV_SECURE_CON4, 0x2000);
secure_timer_init();