| commit | 1d9632a3ccca00638ace1ff6bbce7eba1e15aac7 | [log] [tgz] |
|---|---|---|
| author | T Karthik Reddy <t.karthik.reddy@xilinx.com> | Tue Mar 12 20:20:20 2019 +0530 |
| committer | Michal Simek <michal.simek@xilinx.com> | Wed Jun 24 13:07:58 2020 +0200 |
| tree | 80c8905ca178e44b698da0bb1bc3adb0befa558e | |
| parent | 3427f4d2045729c8995b19407daf91ea9a50e4f8 [diff] |
fpga: zynqpl: Check fpga config completion This patch checks fpga config completion when a bitstream is loaded into PL. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>