mach-stm32: Factorize MPU's region config for STM32 SoCs
MPU's region setup can be factorized between STM32F4/F7/H7 SoCs family
and used a common MPU's region config.
Only one exception for STM32H7 which doesn't have device area
located at 0xA000 0000.
For STM32F4, configure_clocks() need to be moved from arch_cpu_init()
to board_early_init_f().
Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Reviewed-by: Vikas Manocha <vikas.manocha@st.com>
diff --git a/arch/arm/mach-stm32/soc.c b/arch/arm/mach-stm32/soc.c
new file mode 100644
index 0000000..df20d54
--- /dev/null
+++ b/arch/arm/mach-stm32/soc.c
@@ -0,0 +1,56 @@
+/*
+ * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
+ * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/armv7m_mpu.h>
+
+int arch_cpu_init(void)
+{
+ int i;
+
+ struct mpu_region_config stm32_region_config[] = {
+ /*
+ * Make all 4GB cacheable & executable. We are overriding it
+ * with next region for any requirement. e.g. below region1,
+ * 2 etc.
+ * In other words, the area not coming in following
+ * regions configuration is the one configured here in region_0
+ * (cacheable & executable).
+ */
+ { 0x00000000, REGION_0, XN_DIS, PRIV_RW_USR_RW,
+ O_I_WB_RD_WR_ALLOC, REGION_4GB },
+
+ /* armv7m code area */
+ { 0x00000000, REGION_1, XN_DIS, PRIV_RW_USR_RW,
+ STRONG_ORDER, REGION_512MB },
+
+ /* Device area : Not executable */
+ { 0x40000000, REGION_2, XN_EN, PRIV_RW_USR_RW,
+ DEVICE_NON_SHARED, REGION_512MB },
+
+ /*
+ * Armv7m fixed configuration: strongly ordered & not
+ * executable, not cacheable
+ */
+ { 0xE0000000, REGION_3, XN_EN, PRIV_RW_USR_RW,
+ STRONG_ORDER, REGION_512MB },
+
+#if !defined(CONFIG_STM32H7)
+ /* Device area : Not executable */
+ { 0xA0000000, REGION_4, XN_EN, PRIV_RW_USR_RW,
+ DEVICE_NON_SHARED, REGION_512MB },
+#endif
+ };
+
+ disable_mpu();
+ for (i = 0; i < ARRAY_SIZE(stm32_region_config); i++)
+ mpu_config(&stm32_region_config[i]);
+ enable_mpu();
+
+ return 0;
+}