| commit | c8f9802a72030e783152040b07c3c7694f953dd3 | [log] [tgz] |
|---|---|---|
| author | Matthew McClintock <msm@freescale.com> | Mon Aug 13 08:10:38 2012 +0000 |
| committer | Andy Fleming <afleming@freescale.com> | Thu Aug 23 10:24:16 2012 -0500 |
| tree | 1aa8ed1fe0386075afcf9628b87415598b2d36cd | |
| parent | 9c6b47d53ed329b31c5f26e9ec710f67559c07f0 [diff] |
p1010rdb: fix ddr values for p1014rdb (setting bus width to 16bit) There was an extra 0 in front of the value we were using to mask, remove it to improve the code. Also fix the value written to ddr_sdram_cfg to set the bus width properly to 16 bits Signed-off-by: Matthew McClintock <msm@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>