| commit | 06183ac5f583d6a6279dd5479cd9b44b7edd9d4c | [log] [tgz] |
|---|---|---|
| author | Marek Vasut <marek.vasut+renesas@gmail.com> | Sat Jan 16 00:33:17 2021 +0100 |
| committer | Marek Vasut <marek.vasut+renesas@gmail.com> | Sat Feb 20 22:38:28 2021 +0100 |
| tree | cc0d2e5e1414a6237f246ab788c7f1e568b4da64 | |
| parent | b169ef17984ff73bee3b4e94844699893971bb8a [diff] |
pci: renesas: Fix BAR mapping on Gen3 Because the first PCIExAR(n) register is configured with the mapping, It is the second PCIExAR(n) register that must be written with 0, not the last one. Update the n from 4 to 1 to select the correct register. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Bin Meng <bmeng.cn@gmail.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>