| commit | c997da5c53586e0cb220d94179f922e865cffb62 | [log] [tgz] |
|---|---|---|
| author | Lokesh Vutla <lokeshvutla@ti.com> | Thu Jun 04 10:08:50 2015 +0530 |
| committer | Tom Rini <trini@konsulko.com> | Mon Jun 15 10:57:27 2015 -0400 |
| tree | fa43c37a6848a8b6067694d3d62f246ee15a72e1 | |
| parent | 2ce6ecaccaa0b1bea31cdbe05f5f5c54d2468db0 [diff] |
ARM: DRA7: emif: Fix DDR init sequence during warm reset Unlike OMAP5, EMIF PHY used in DRA7 will be left in unknown state after warm reset, emif needs to be configured to bring it back to a known state. So configure EMIF during warm reset. Reported-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>