| commit | ca0c0e07adf3c3baf3851fc17490a0160398c834 | [log] [tgz] |
|---|---|---|
| author | T Karthik Reddy <t.karthik.reddy@xilinx.com> | Tue Mar 12 20:20:23 2019 +0530 |
| committer | Michal Simek <michal.simek@xilinx.com> | Wed Jun 24 13:07:58 2020 +0200 |
| tree | 2814d566c027c0a829e1992d03c68452b626cbb5 | |
| parent | c64afba2fb483d416ad5da9dfe3f1f156ccf2366 [diff] |
fpga: zynqpl: Flush dcache only for non-bitstream data In case of aes decryption destination address range must be flushed before transferring decrypted data to destination. Signed-off-by: T Karthik Reddy <t.karthik.reddy@xilinx.com> Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>