commit cb0a6a1ecc8dfe4dbdad6f9376ef78879337b118
author Zhi-zhou Zhang <etou.zh@gmail.com> Tue Oct 16 15:02:08 2012 +0200
committer Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Tue Oct 16 15:02:08 2012 +0200
tree 6398daa7ee7188509950120a9377bfa91e9c478c
parent bd23b22badadcdc414a900828253961fc5ec6c39

MIPS: don't use camel-case style

Replace camel-case style with upper-case style globally.

Signed-off-by: Zhizhou Zhang <etou.zh@gmail.com>

arch/mips/cpu/mips32/cpu.c

diff --git a/arch/mips/cpu/mips32/cpu.c b/arch/mips/cpu/mips32/cpu.c
index 7b49e1b..50bb248 100644
--- a/arch/mips/cpu/mips32/cpu.c
+++ b/arch/mips/cpu/mips32/cpu.c
@@ -61,8 +61,8 @@
 		return;
 
 	while (1) {
-		cache_op(Hit_Writeback_Inv_D, addr);
-		cache_op(Hit_Invalidate_I, addr);
+		cache_op(HIT_WRITEBACK_INV_D, addr);
+		cache_op(HIT_INVALIDATE_I, addr);
 		if (addr == aend)
 			break;
 		addr += lsize;
@@ -76,7 +76,7 @@
 	unsigned long aend = (stop - 1) & ~(lsize - 1);
 
 	while (1) {
-		cache_op(Hit_Writeback_Inv_D, addr);
+		cache_op(HIT_WRITEBACK_INV_D, addr);
 		if (addr == aend)
 			break;
 		addr += lsize;
@@ -90,7 +90,7 @@
 	unsigned long aend = (stop - 1) & ~(lsize - 1);
 
 	while (1) {
-		cache_op(Hit_Invalidate_D, addr);
+		cache_op(HIT_INVALIDATE_D, addr);
 		if (addr == aend)
 			break;
 		addr += lsize;