ARM: AM43xx: GP-EVM: Correct GPIO used for VTT regulator control
Schematic indicates GPIO5_7 is to be used for VTT regulator control
rather than GPIO0_21 so modify enable_vtt_regulator to reflect this.
Without this some boards will experience DDR3 corruption and fail to
boot.
Signed-off-by: Dave Gerlach <d-gerlach@ti.com>
[trini: Rework patch against mainline]
Signed-off-by: Tom Rini <trini@ti.com>
diff --git a/board/ti/am43xx/board.c b/board/ti/am43xx/board.c
index 4e6846a..95fd137 100644
--- a/board/ti/am43xx/board.c
+++ b/board/ti/am43xx/board.c
@@ -346,14 +346,14 @@
u32 temp;
/* enable module */
- writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO0_BASE + OMAP_GPIO_CTRL);
+ writel(GPIO_CTRL_ENABLEMODULE, AM33XX_GPIO5_BASE + OMAP_GPIO_CTRL);
- /* enable output for GPIO0_22 */
- writel(GPIO_SETDATAOUT(GPIO_22),
- AM33XX_GPIO0_BASE + OMAP_GPIO_SETDATAOUT);
- temp = readl(AM33XX_GPIO0_BASE + OMAP_GPIO_OE);
- temp = temp & ~(GPIO_OE_ENABLE(GPIO_22));
- writel(temp, AM33XX_GPIO0_BASE + OMAP_GPIO_OE);
+ /* enable output for GPIO5_7 */
+ writel(GPIO_SETDATAOUT(7),
+ AM33XX_GPIO5_BASE + OMAP_GPIO_SETDATAOUT);
+ temp = readl(AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
+ temp = temp & ~(GPIO_OE_ENABLE(7));
+ writel(temp, AM33XX_GPIO5_BASE + OMAP_GPIO_OE);
}
void sdram_init(void)
diff --git a/board/ti/am43xx/mux.c b/board/ti/am43xx/mux.c
index 810b194..51f7fd6 100644
--- a/board/ti/am43xx/mux.c
+++ b/board/ti/am43xx/mux.c
@@ -33,8 +33,8 @@
{-1},
};
-static struct module_pin_mux gpio0_22_pin_mux[] = {
- {OFFSET(ddr_ba2), (MODE(9) | PULLUP_EN)}, /* GPIO0_22 */
+static struct module_pin_mux gpio5_7_pin_mux[] = {
+ {OFFSET(spi0_cs0), (MODE(7) | PULLUP_EN)}, /* GPIO5_7 */
{-1},
};
@@ -49,7 +49,7 @@
configure_module_pin_mux(i2c0_pin_mux);
if (board_is_gpevm())
- configure_module_pin_mux(gpio0_22_pin_mux);
+ configure_module_pin_mux(gpio5_7_pin_mux);
}
void enable_i2c0_pin_mux(void)