Some code cleanup
diff --git a/board/icecube/icecube.c b/board/icecube/icecube.c
index 4197a7c..4f056b2 100644
--- a/board/icecube/icecube.c
+++ b/board/icecube/icecube.c
@@ -187,17 +187,17 @@
#endif /* CFG_RAMBOOT */
/*
- * On MPC5200B we need to set the special configuration delay in the
- * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
+ * On MPC5200B we need to set the special configuration delay in the
+ * DDR controller. Please refer to Freescale's AN3221 "MPC5200B SDRAM
* Initialization and Configuration", 3.3.1 SDelay--MBAR + 0x0190:
*
- * "The SDelay should be written to a value of 0x00000004. It is
- * required to account for changes caused by normal wafer processing
+ * "The SDelay should be written to a value of 0x00000004. It is
+ * required to account for changes caused by normal wafer processing
* parameters."
- */
+ */
svr = get_svr();
pvr = get_pvr();
- if ((SVR_MJREV(svr) >= 2) &&
+ if ((SVR_MJREV(svr) >= 2) &&
(PVR_MAJ(pvr) == 1) && (PVR_MIN(pvr) == 4)) {
*(vu_long *)MPC5XXX_SDRAM_SDELAY = 0x04;