commit cf6eb6da433179674571f9370566b1ec8989a41a
author Stefan Roese <sr@denx.de> Wed Apr 14 13:57:18 2010 +0200
committer Stefan Roese <sr@denx.de> Mon Apr 19 15:29:03 2010 +0200
tree fc0ad7161d7146154026fa789a97dd2c047c61a7
parent 2a72e9ed18d2164eb7fe569119342eb631b568da

ppc4xx: TLB init file cleanup

This patch adds new macros, with frequently used combinations of the
4xx TLB access control and storage attibutes. Additionally the 4xx init.S
files are updated to make use of these new macros. Resulting in easier
to read TLB definitions.

Additionally some init.S files are updated to use the mmu header for the
TLB defines, instead of defining their own macros.

Signed-off-by: Stefan Roese <sr@denx.de>

board/gdsys/intip/init.S

diff --git a/board/gdsys/intip/init.S b/board/gdsys/intip/init.S
index a8e8b6c..5a819c2 100644
--- a/board/gdsys/intip/init.S
+++ b/board/gdsys/intip/init.S
@@ -51,7 +51,7 @@
 	 * enable SA_I
 	 */
 	tlbentry(CONFIG_SYS_BOOT_BASE_ADDR, SZ_16M, CONFIG_SYS_BOOT_BASE_ADDR,
-		4, AC_R|AC_W|AC_X|SA_G) /* TLB 0 */
+		4, AC_RWX | SA_G) /* TLB 0 */
 
 	/*
 	 * TLB entries for SDRAM are not needed on this platform.
@@ -62,36 +62,36 @@
 #ifdef CONFIG_SYS_INIT_RAM_DCACHE
 	/* TLB-entry for init-ram in dcache (SA_I must be turned off!) */
 	tlbentry(CONFIG_SYS_INIT_RAM_ADDR, SZ_4K, CONFIG_SYS_INIT_RAM_ADDR,
-		0, AC_R|AC_W|AC_X|SA_G)
+		0, AC_RWX | SA_G)
 #endif
 
 	tlbentry(CONFIG_SYS_PCI_BASE, SZ_256M, 0x00000000, 0xC,
-		AC_R|AC_W|SA_G|SA_I)
+		AC_RW | SA_IG)
 	tlbentry(CONFIG_SYS_PCI_MEMBASE, SZ_256M, 0x20000000, 0xC,
-		AC_R|AC_W|SA_G|SA_I)
+		AC_RW | SA_IG)
 
 	/* TLB-entry for NVRAM */
 	tlbentry(CONFIG_SYS_NVRAM_BASE, SZ_1M, CONFIG_SYS_NVRAM_BASE, 4,
-		AC_R|AC_W|SA_G|SA_I)
+		AC_RW | SA_IG)
 
 	/* TLB-entry for UART */
 	tlbentry(CONFIG_SYS_UART_BASE, SZ_16K, CONFIG_SYS_UART_BASE, 4,
-		AC_R|AC_W|SA_G|SA_I)
+		AC_RW | SA_IG)
 
 	/* TLB-entry for IO */
 	tlbentry(CONFIG_SYS_IO_BASE, SZ_16K, CONFIG_SYS_IO_BASE, 4,
-		AC_R|AC_W|SA_G|SA_I)
+		AC_RW | SA_IG)
 
 	/* TLB-entry for OCM */
 	tlbentry(CONFIG_SYS_OCM_BASE, SZ_1M, 0x00000000, 4,
-		AC_R|AC_W|AC_X|SA_I)
+		AC_RWX | SA_I)
 
 	/* TLB-entry for Local Configuration registers => peripherals */
 	tlbentry(CONFIG_SYS_LOCAL_CONF_REGS, SZ_16M, CONFIG_SYS_LOCAL_CONF_REGS,
-		4, AC_R|AC_W|AC_X|SA_G|SA_I)
+		4, AC_RWX | SA_IG)
 
 	/* AHB: Internal USB Peripherals (USB, SATA) */
 	tlbentry(CONFIG_SYS_AHB_BASE, SZ_1M, 0xbff00000, 4,
-		AC_R|AC_W|AC_X|SA_G|SA_I)
+		AC_RWX | SA_IG)
 
 	tlbtab_end