| /* |
| * Copyright (C) 2011 Freescale Semiconductor, Inc. |
| * Jason Liu <r64343@freescale.com> |
| * |
| * Configuration settings for Freescale MX53 low cost board. |
| * |
| * SPDX-License-Identifier: GPL-2.0+ |
| */ |
| |
| #ifndef __CONFIG_H |
| #define __CONFIG_H |
| |
| #define CONFIG_MX53 |
| |
| #define CONFIG_MACH_TYPE MACH_TYPE_MX53_LOCO |
| |
| #include <asm/arch/imx-regs.h> |
| |
| #define CONFIG_CMDLINE_TAG |
| #define CONFIG_SETUP_MEMORY_TAGS |
| #define CONFIG_INITRD_TAG |
| |
| #define CONFIG_SYS_FSL_CLK |
| |
| /* Size of malloc() pool */ |
| #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024) |
| |
| #define CONFIG_BOARD_EARLY_INIT_F |
| #define CONFIG_BOARD_LATE_INIT |
| #define CONFIG_MXC_GPIO |
| #define CONFIG_REVISION_TAG |
| |
| #define CONFIG_MXC_UART |
| #define CONFIG_MXC_UART_BASE UART1_BASE |
| |
| /* MMC Configs */ |
| #define CONFIG_FSL_ESDHC |
| #define CONFIG_SYS_FSL_ESDHC_ADDR 0 |
| #define CONFIG_SYS_FSL_ESDHC_NUM 2 |
| |
| #define CONFIG_MMC |
| #define CONFIG_GENERIC_MMC |
| #define CONFIG_DOS_PARTITION |
| |
| /* Eth Configs */ |
| #define CONFIG_MII |
| |
| #define CONFIG_FEC_MXC |
| #define IMX_FEC_BASE FEC_BASE_ADDR |
| #define CONFIG_FEC_MXC_PHYADDR 0x1F |
| |
| /* USB Configs */ |
| #define CONFIG_USB_EHCI |
| #define CONFIG_USB_EHCI_MX5 |
| #define CONFIG_USB_HOST_ETHER |
| #define CONFIG_USB_ETHER_ASIX |
| #define CONFIG_USB_ETHER_MCS7830 |
| #define CONFIG_USB_ETHER_SMSC95XX |
| #define CONFIG_MXC_USB_PORT 1 |
| #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) |
| #define CONFIG_MXC_USB_FLAGS 0 |
| |
| /* I2C Configs */ |
| #define CONFIG_SYS_I2C |
| #define CONFIG_SYS_I2C_MXC |
| #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ |
| #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ |
| #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ |
| |
| /* PMIC Controller */ |
| #define CONFIG_POWER |
| #define CONFIG_POWER_I2C |
| #define CONFIG_DIALOG_POWER |
| #define CONFIG_POWER_FSL |
| #define CONFIG_POWER_FSL_MC13892 |
| #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 |
| #define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 |
| |
| /* allow to overwrite serial and ethaddr */ |
| #define CONFIG_ENV_OVERWRITE |
| #define CONFIG_CONS_INDEX 1 |
| #define CONFIG_BAUDRATE 115200 |
| |
| /* Command definition */ |
| #define CONFIG_SUPPORT_RAW_INITRD |
| |
| |
| #define CONFIG_ETHPRIME "FEC0" |
| |
| #define CONFIG_LOADADDR 0x72000000 /* loadaddr env var */ |
| #define CONFIG_SYS_TEXT_BASE 0x77800000 |
| |
| #define CONFIG_EXTRA_ENV_SETTINGS \ |
| "script=boot.scr\0" \ |
| "image=zImage\0" \ |
| "fdt_addr=0x71000000\0" \ |
| "boot_fdt=try\0" \ |
| "ip_dyn=yes\0" \ |
| "mmcdev=0\0" \ |
| "mmcpart=1\0" \ |
| "mmcroot=/dev/mmcblk0p2 rw rootwait\0" \ |
| "mmcargs=setenv bootargs console=ttymxc0,${baudrate} root=${mmcroot}\0" \ |
| "loadbootscript=" \ |
| "load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \ |
| "bootscript=echo Running bootscript from mmc ...; " \ |
| "source\0" \ |
| "loadimage=load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \ |
| "loadfdt=load mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \ |
| "mmcboot=echo Booting from mmc ...; " \ |
| "run mmcargs; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if run loadfdt; then " \ |
| "bootz ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "if test ${boot_fdt} = try; then " \ |
| "bootz; " \ |
| "else " \ |
| "echo WARN: Cannot load the DT; " \ |
| "fi; " \ |
| "fi; " \ |
| "else " \ |
| "bootz; " \ |
| "fi;\0" \ |
| "netargs=setenv bootargs console=ttymxc0,${baudrate} " \ |
| "root=/dev/nfs " \ |
| "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ |
| "netboot=echo Booting from net ...; " \ |
| "run netargs; " \ |
| "if test ${ip_dyn} = yes; then " \ |
| "setenv get_cmd dhcp; " \ |
| "else " \ |
| "setenv get_cmd tftp; " \ |
| "fi; " \ |
| "${get_cmd} ${image}; " \ |
| "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ |
| "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ |
| "bootz ${loadaddr} - ${fdt_addr}; " \ |
| "else " \ |
| "if test ${boot_fdt} = try; then " \ |
| "bootz; " \ |
| "else " \ |
| "echo ERROR: Cannot load the DT; " \ |
| "exit; " \ |
| "fi; " \ |
| "fi; " \ |
| "else " \ |
| "bootz; " \ |
| "fi;\0" |
| |
| #define CONFIG_BOOTCOMMAND \ |
| "mmc dev ${mmcdev}; if mmc rescan; then " \ |
| "if run loadbootscript; then " \ |
| "run bootscript; " \ |
| "else " \ |
| "if run loadimage; then " \ |
| "run mmcboot; " \ |
| "else run netboot; " \ |
| "fi; " \ |
| "fi; " \ |
| "else run netboot; fi" |
| |
| #define CONFIG_ARP_TIMEOUT 200UL |
| |
| /* Miscellaneous configurable options */ |
| #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
| #define CONFIG_AUTO_COMPLETE |
| #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */ |
| |
| #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ |
| |
| #define CONFIG_SYS_MEMTEST_START 0x70000000 |
| #define CONFIG_SYS_MEMTEST_END 0x70010000 |
| |
| #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR |
| |
| #define CONFIG_CMDLINE_EDITING |
| |
| /* Physical Memory Map */ |
| #define CONFIG_NR_DRAM_BANKS 2 |
| #define PHYS_SDRAM_1 CSD0_BASE_ADDR |
| #define PHYS_SDRAM_1_SIZE (gd->bd->bi_dram[0].size) |
| #define PHYS_SDRAM_2 CSD1_BASE_ADDR |
| #define PHYS_SDRAM_2_SIZE (gd->bd->bi_dram[1].size) |
| #define PHYS_SDRAM_SIZE (gd->ram_size) |
| |
| #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1) |
| #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR) |
| #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE) |
| |
| #define CONFIG_SYS_INIT_SP_OFFSET \ |
| (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) |
| #define CONFIG_SYS_INIT_SP_ADDR \ |
| (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) |
| |
| /* FLASH and environment organization */ |
| #define CONFIG_SYS_NO_FLASH |
| |
| #define CONFIG_ENV_OFFSET (6 * 64 * 1024) |
| #define CONFIG_ENV_SIZE (8 * 1024) |
| #define CONFIG_ENV_IS_IN_MMC |
| #define CONFIG_SYS_MMC_ENV_DEV 0 |
| |
| #define CONFIG_CMD_SATA |
| #ifdef CONFIG_CMD_SATA |
| #define CONFIG_DWC_AHSATA |
| #define CONFIG_SYS_SATA_MAX_DEVICE 1 |
| #define CONFIG_DWC_AHSATA_PORT_ID 0 |
| #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_BASE_ADDR |
| #define CONFIG_LBA48 |
| #define CONFIG_LIBATA |
| #endif |
| |
| /* Framebuffer and LCD */ |
| #define CONFIG_PREBOOT |
| #define CONFIG_VIDEO_IPUV3 |
| #define CONFIG_VGA_AS_SINGLE_DEVICE |
| #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE |
| #define CONFIG_VIDEO_BMP_RLE8 |
| #define CONFIG_SPLASH_SCREEN |
| #define CONFIG_BMP_16BPP |
| #define CONFIG_VIDEO_LOGO |
| #define CONFIG_IPUV3_CLK 200000000 |
| |
| #endif /* __CONFIG_H */ |