Update MTD to that of Linux 2.6.22.1

A lot changed in the Linux MTD code, since it was last ported from
Linux to U-Boot. This patch takes U-Boot NAND support to the level
of Linux 2.6.22.1 and will enable support for very large NAND devices
(4KB pages) and ease the compatibility between U-Boot and Linux
filesystems.

This patch is tested on two custom boards with PPC and ARM
processors running YAFFS in U-Boot and Linux using gcc-4.1.2
cross compilers.

MAKEALL ppc/arm has some issues:
 * DOC/OneNand/nand_spl is not building (I have not tried porting
   these parts, and since I do not have any HW and I am not familiar
   with this code/HW I think its best left to someone else.)

Except for the issues mentioned above, I have ported all drivers
necessary to run MAKEALL ppc/arm without errors and warnings. Many
drivers were trivial to port, but some were not so trivial. The
following drivers must be examined carefully and maybe rewritten to
some degree:
 cpu/ppc4xx/ndfc.c
 cpu/arm926ejs/davinci/nand.c
 board/delta/nand.c
 board/zylonite/nand.c

Signed-off-by: William Juul <william.juul@tandberg.com>
Signed-off-by: Stig Olsen <stig.olsen@tandberg.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
diff --git a/board/zylonite/nand.c b/board/zylonite/nand.c
index ca16578..47d5d4b 100644
--- a/board/zylonite/nand.c
+++ b/board/zylonite/nand.c
@@ -69,7 +69,7 @@
 /*
  * not required for Monahans DFC
  */
-static void dfc_hwcontrol(struct mtd_info *mtdinfo, int cmd)
+static void dfc_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
 {
 	return;
 }
@@ -110,25 +110,6 @@
 }
 
 
-/*
- * These functions are quite problematic for the DFC. Luckily they are
- * not used in the current nand code, except for nand_command, which
- * we've defined our own anyway. The problem is, that we always need
- * to write 4 bytes to the DFC Data Buffer, but in these functions we
- * don't know if to buffer the bytes/half words until we've gathered 4
- * bytes or if to send them straight away.
- *
- * Solution: Don't use these with Mona's DFC and complain loudly.
- */
-static void dfc_write_word(struct mtd_info *mtd, u16 word)
-{
-	printf("dfc_write_word: WARNING, this function does not work with the Monahans DFC!\n");
-}
-static void dfc_write_byte(struct mtd_info *mtd, u_char byte)
-{
-	printf("dfc_write_byte: WARNING, this function does not work with the Monahans DFC!\n");
-}
-
 /* The original:
  * static void dfc_read_buf(struct mtd_info *mtd, const u_char *buf, int len)
  *
@@ -168,7 +149,7 @@
  */
 static u16 dfc_read_word(struct mtd_info *mtd)
 {
-	printf("dfc_write_byte: UNIMPLEMENTED.\n");
+	printf("dfc_read_word: UNIMPLEMENTED.\n");
 	return 0;
 }
 
@@ -289,9 +270,10 @@
 
 /* this function is called after Programm and Erase Operations to
  * check for success or failure */
-static int dfc_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
+static int dfc_wait(struct mtd_info *mtd, struct nand_chip *this)
 {
 	unsigned long ndsr=0, event=0;
+	int state = this->state;
 
 	if(state == FL_WRITING) {
 		event = NDSR_CS0_CMDD | NDSR_CS0_BBD;
@@ -435,11 +417,11 @@
  * argument are board-specific (per include/linux/mtd/nand_new.h):
  * - IO_ADDR_R?: address to read the 8 I/O lines of the flash device
  * - IO_ADDR_W?: address to write the 8 I/O lines of the flash device
- * - hwcontrol: hardwarespecific function for accesing control-lines
+ * - cmd_ctrl: hardwarespecific function for accesing control-lines
  * - dev_ready: hardwarespecific function for  accesing device ready/busy line
  * - enable_hwecc?: function to enable (reset)  hardware ecc generator. Must
  *   only be provided if a hardware ECC is available
- * - eccmode: mode of ecc, see defines
+ * - ecc.mode: mode of ecc, see defines
  * - chip_delay: chip dependent delay for transfering data from array to
  *   read regs (tR)
  * - options: various chip options. They can partly be set to inform
@@ -560,21 +542,18 @@
 	/* wait 10 us due to cmd buffer clear reset */
 	/*	wait(10); */
 
-
-	nand->hwcontrol = dfc_hwcontrol;
+	nand->cmd_ctrl = dfc_hwcontrol;
 /*	nand->dev_ready = dfc_device_ready; */
-	nand->eccmode = NAND_ECC_SOFT;
+	nand->ecc.mode = NAND_ECC_SOFT;
 	nand->options = NAND_BUSWIDTH_16;
 	nand->waitfunc = dfc_wait;
 	nand->read_byte = dfc_read_byte;
-	nand->write_byte = dfc_write_byte;
 	nand->read_word = dfc_read_word;
-	nand->write_word = dfc_write_word;
 	nand->read_buf = dfc_read_buf;
 	nand->write_buf = dfc_write_buf;
 
 	nand->cmdfunc = dfc_cmdfunc;
-	nand->autooob = &delta_oob;
+//	nand->autooob = &delta_oob;
 	nand->badblock_pattern = &delta_bbt_descr;
 	return 0;
 }