driver/ddr/freescale: Add support of accumulate ECC

If less than 8 ECC pins are used for DDR data bus width smaller than 64
bits, the 8-bit ECC code will be transmitted/received across several beats,
and it will be used to check 64-bits of data once 8-bits of ECC are
accumulated.

Signed-off-by: York Sun <yorksun@freescale.com>
1 file changed