at91: Update meesc board to new SoC access
* convert meesc board to use c stucture SoC access
* change gpio access to at91_gpio syntax
* moved CONFIG_SYS_HZ below board and cpu defines (purely cosmetic)
Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
diff --git a/include/configs/meesc.h b/include/configs/meesc.h
index dad0bef..eaea1cd 100644
--- a/include/configs/meesc.h
+++ b/include/configs/meesc.h
@@ -31,14 +31,12 @@
#ifndef __CONFIG_H
#define __CONFIG_H
-#define CONFIG_AT91_LEGACY
-
/* Common stuff */
-#define CONFIG_SYS_HZ 1000 /* decrementer freq */
#define CONFIG_MEESC 1 /* Board is esd MEESC */
#define CONFIG_ARM926EJS 1 /* This is an ARM926EJS Core */
#define CONFIG_AT91SAM9263 1 /* It's an AT91SAM9263 SoC */
#define CONFIG_SYS_AT91_MAIN_CLOCK 16000000/* 16.0 MHz crystal */
+#define CONFIG_SYS_HZ 1000 /* decrementer freq */
#define CONFIG_DISPLAY_BOARDINFO 1
#define CONFIG_DISPLAY_CPUINFO 1 /* display cpu info and speed */
#define CONFIG_PREBOOT /* enable preboot variable */
@@ -122,9 +120,9 @@
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
/* our CLE is AD22 */
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
-#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PD15
-#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PA22
-
+#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIO_PORTD, 15
+#define CONFIG_SYS_NAND_READY_PIN AT91_PIO_PORTA, 22
+#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
#endif
/* Ethernet */