AVR32: Make cacheflush cpu-dependent
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
diff --git a/cpu/at32ap/cache.c b/cpu/at32ap/cache.c
index 16a0565..28b9456 100644
--- a/cpu/at32ap/cache.c
+++ b/cpu/at32ap/cache.c
@@ -22,7 +22,7 @@
#include <common.h>
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
void dcache_clean_range(volatile void *start, size_t size)
{