AVR32: Make cacheflush cpu-dependent
The AT32UC3A series of processors doesn't contain any cache, and issuing
cache control instructions on those will cause an exception. This commit
makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support.
Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com>
Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com>
Signed-off-by: Olav Morken <olavmrk@gmail.com>
Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
diff --git a/lib_avr32/board.c b/lib_avr32/board.c
index 959375a..57115df 100644
--- a/lib_avr32/board.c
+++ b/lib_avr32/board.c
@@ -86,7 +86,7 @@
}
#ifdef CONFIG_SYS_DMA_ALLOC_LEN
-#include <asm/cacheflush.h>
+#include <asm/arch/cacheflush.h>
#include <asm/io.h>
static unsigned long dma_alloc_start;