* Fix ICU862 environment problem
* Fix RAM size detection for RMU board
* Implement "reset" for MGT5100/MPC5200 systems
diff --git a/include/configs/ICU862.h b/include/configs/ICU862.h
index a7a11a6..fea0fce 100644
--- a/include/configs/ICU862.h
+++ b/include/configs/ICU862.h
@@ -196,7 +196,7 @@
#define CFG_MONITOR_LEN (192 << 10) /* Reserve 192 kB for Monitor */
#endif
#else
-#define CFG_MONITOR_LEN (272 << 10) /* Reserve 272 kB for Monitor */
+#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#endif
#define CFG_MONITOR_BASE TEXT_BASE
#define CFG_MALLOC_LEN (256 << 10) /* Reserve 256 kB for malloc() */
diff --git a/include/configs/IceCube.h b/include/configs/IceCube.h
index 6a43441..352beae 100644
--- a/include/configs/IceCube.h
+++ b/include/configs/IceCube.h
@@ -131,9 +131,7 @@
*/
#define CFG_MBAR 0xf0000000
#define CFG_SDRAM_BASE 0x00000000
-#ifdef CONFIG_MPC5200
#define CFG_DEFAULT_MBAR 0x80000000
-#endif
/* Use SRAM until RAM will be available */
#define CFG_INIT_RAM_ADDR MPC5XXX_SRAM
diff --git a/include/configs/rmu.h b/include/configs/rmu.h
index 0a94714..7b33c7e 100644
--- a/include/configs/rmu.h
+++ b/include/configs/rmu.h
@@ -291,12 +291,12 @@
*
*/
#define SDRAM_BASE_PRELIM 0x00000000 /* SDRAM base */
-#define SDRAM_MAX_SIZE 0x01000000 /* max 16 MB */
+#define SDRAM_MAX_SIZE 0x08000000 /* max 128 MB */
/* SDRAM timing: Multiplexed addresses, GPL5 output to GPL5_A (don't care) */
#define CFG_OR_TIMING_SDRAM 0x00000E00
-#define CFG_OR1_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_SDRAM )
+#define CFG_OR1_PRELIM (0xF0000000 | CFG_OR_TIMING_SDRAM ) /* map 256 MB */
#define CFG_BR1_PRELIM ((SDRAM_BASE_PRELIM & BR_BA_MSK) | BR_MS_UPMA | BR_V )
/* RPXLITE mem setting */
@@ -321,8 +321,8 @@
* MAMR settings for SDRAM
*/
-/* 10 column SDRAM */
-#define CFG_MAMR_10COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
+/* 9 column SDRAM */
+#define CFG_MAMR_9COL ((CFG_MAMR_PTA << MAMR_PTA_SHIFT) | MAMR_PTAE | \
MAMR_AMA_TYPE_1 | MAMR_DSA_1_CYCL | MAMR_G0CLA_A10 | \
MAMR_RLFA_16X | MAMR_WLFA_16X | MAMR_TLFA_16X)