aspeed: Support for ast2500 Eval Board

ast2500 Eval Board device tree and board specific configuration.
Reviewed-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 6a7924e..9ac5862 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -334,6 +334,8 @@
 	bcm2836-rpi-2-b.dtb \
 	bcm2837-rpi-3-b.dtb
 
+dtb-$(CONFIG_ARCH_ASPEED) += ast2500-evb.dtb
+
 targets += $(dtb-y)
 
 # Add any required device tree compiler flags here
diff --git a/arch/arm/dts/ast2500-evb.dts b/arch/arm/dts/ast2500-evb.dts
new file mode 100644
index 0000000..dc13952
--- /dev/null
+++ b/arch/arm/dts/ast2500-evb.dts
@@ -0,0 +1,23 @@
+/dts-v1/;
+
+#include "ast2500-u-boot.dtsi"
+
+/ {
+	memory {
+		device_type = "memory";
+		reg = <0x80000000 0x20000000>;
+	};
+
+	chosen {
+		stdout-path = &uart5;
+	};
+};
+
+&uart5 {
+	u-boot,dm-pre-reloc;
+	status = "okay";
+};
+
+&sdrammc {
+	clock-frequency = <400000000>;
+};
diff --git a/arch/arm/mach-aspeed/ast2500/Kconfig b/arch/arm/mach-aspeed/ast2500/Kconfig
index 05cb27e..b815153 100644
--- a/arch/arm/mach-aspeed/ast2500/Kconfig
+++ b/arch/arm/mach-aspeed/ast2500/Kconfig
@@ -11,4 +11,6 @@
 	  4 Serial ports, 4 USB ports, VGA port, PCIe, SD card slot,
 	  20 pin JTAG, pinouts for 14 I2Cs, 3 SPIs and eSPI, 8 PWMs.
 
+source "board/aspeed/evb_ast2500/Kconfig"
+
 endif
diff --git a/board/aspeed/evb_ast2500/Kconfig b/board/aspeed/evb_ast2500/Kconfig
new file mode 100644
index 0000000..73a8ae8
--- /dev/null
+++ b/board/aspeed/evb_ast2500/Kconfig
@@ -0,0 +1,12 @@
+if TARGET_EVB_AST2500
+
+config SYS_BOARD
+	default "evb_ast2500"
+
+config SYS_VENDOR
+	default "aspeed"
+
+config SYS_CONFIG_NAME
+	default "evb_ast2500"
+
+endif
diff --git a/board/aspeed/evb_ast2500/Makefile b/board/aspeed/evb_ast2500/Makefile
new file mode 100644
index 0000000..4564098
--- /dev/null
+++ b/board/aspeed/evb_ast2500/Makefile
@@ -0,0 +1 @@
+obj-y += evb_ast2500.o
diff --git a/board/aspeed/evb_ast2500/evb_ast2500.c b/board/aspeed/evb_ast2500/evb_ast2500.c
new file mode 100644
index 0000000..649e3ba
--- /dev/null
+++ b/board/aspeed/evb_ast2500/evb_ast2500.c
@@ -0,0 +1,6 @@
+/*
+ * Copyright (c) 2016 Google, Inc
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+#include <common.h>
diff --git a/configs/evb-ast2500_defconfig b/configs/evb-ast2500_defconfig
new file mode 100644
index 0000000..4598f6f
--- /dev/null
+++ b/configs/evb-ast2500_defconfig
@@ -0,0 +1,21 @@
+CONFIG_ARM=y
+CONFIG_ARCH_ASPEED=y
+CONFIG_ASPEED_AST2500=y
+CONFIG_TARGET_EVB_AST2500=y
+CONFIG_DEFAULT_DEVICE_TREE="ast2500-evb"
+CONFIG_OF_CONTROL=y
+CONFIG_DM=y
+CONFIG_SYS_MALLOC_F_LEN=0x2000
+CONFIG_DISPLAY_CPUINFO=n
+CONFIG_SYS_NS16550=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYSRESET=y
+CONFIG_CLK=y
+CONFIG_TIMER=y
+CONFIG_RAM=y
+CONFIG_REGMAP=y
+CONFIG_PRE_CONSOLE_BUFFER=y
+CONFIG_PRE_CON_BUF_ADDR=0x1e720000
+CONFIG_PRE_CON_BUF_SZ=4096
+CONFIG_SYS_NO_FLASH=y
+CONFIG_CMD_IMLS=n
diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h
new file mode 100644
index 0000000..a571f2a
--- /dev/null
+++ b/include/configs/evb_ast2500.h
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012-2020  ASPEED Technology Inc.
+ * Ryan Chen <ryan_chen@aspeedtech.com>
+ *
+ * Copyright 2016 Google Inc
+ *
+ * SPDX-License-Identifier:     GPL-2.0+
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <configs/aspeed-common.h>
+
+#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + 0x300000)
+#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x5000000)
+
+#define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_TEXT_BASE
+
+/* Memory Info */
+#define CONFIG_SYS_LOAD_ADDR		0x83000000
+
+#define CONFIG_ENV_IS_NOWHERE
+
+#define CONFIG_ENV_SIZE			0x20000
+
+#endif	/* __CONFIG_H */