commit | da30b9fd97f031a6b6863359f3d4c6633e5c7035 | [log] [tgz] |
---|---|---|
author | Timur Tabi <timur@freescale.com> | Fri Apr 01 13:19:36 2011 -0500 |
committer | Kumar Gala <galak@kernel.crashing.org> | Thu Apr 28 22:09:23 2011 -0500 |
tree | 8193ca2746ebc44306440f5e203f954e95d88586 | |
parent | 82c9dfdc20b1bf86e732e61e7230cfa7c933247f [diff] |
powerpc/85xx: Implement work-around for P4080 erratum SERDES-A005 SerDes PLL bandwidth default setting is incorrect when no lanes are configured as PCI Express. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>