* Patch by Stephen Williams, 01 Apr 2004:
Add support for Picture Elements JSE board
* Patch by Christian Pell, 01 Apr 2004:
Add CompactFlash support for PXA systems.
diff --git a/CHANGELOG b/CHANGELOG
index b298a0c..82558b5 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -2,6 +2,12 @@
Changes for U-Boot 1.1.1:
======================================================================
+* Patch by Stephen Williams, 01 Apr 2004:
+ Add support for Picture Elements JSE board
+
+* Patch by Christian Pell, 01 Apr 2004:
+ Add CompactFlash support for PXA systems.
+
* Patches by Pantelis Antoniou, 30 Mar 2004:
- add auto-complete support to the U-Boot CLI
- add support for NETTA and NETPHONE boards; fix NETVIA board
diff --git a/MAKEALL b/MAKEALL
index caf52bb..d60ff16 100644
--- a/MAKEALL
+++ b/MAKEALL
@@ -60,11 +60,12 @@
CANBT CPCI405 CPCI4052 CPCI405AB \
CPCI440 CPCIISER4 CRAYL1 csb272 \
DASA_SIM DP405 DU405 EBONY \
- ERIC EXBITGEN HUB405 MIP405 \
- MIP405T ML2 ml300 OCOTEA \
- OCRTC ORSG PCI405 PIP405 \
- PLU405 PMC405 PPChameleonEVB VOH405 \
- W7OLMC W7OLMG WALNUT405 XPEDITE1K \
+ ERIC EXBITGEN HUB405 JSE \
+ MIP405 MIP405T ML2 ml300 \
+ OCOTEA OCRTC ORSG PCI405 \
+ PIP405 PLU405 PMC405 PPChameleonEVB \
+ VOH405 W7OLMC W7OLMG WALNUT405 \
+ XPEDITE1K \
"
#########################################################################
diff --git a/Makefile b/Makefile
index 4ee81e4..cad2d72 100644
--- a/Makefile
+++ b/Makefile
@@ -203,7 +203,7 @@
cmi_mpc5xx_config: unconfig
@./mkconfig $(@:_config=) ppc mpc5xx cmi
-PATI_config:unconfig
+PATI_config: unconfig
@./mkconfig $(@:_config=) ppc mpc5xx pati mpl
#########################################################################
@@ -569,7 +569,7 @@
ASH405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ash405 esd
-BUBINGA405EP_config:unconfig
+BUBINGA405EP_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx bubinga405ep
CANBT_config: unconfig
@@ -587,7 +587,7 @@
CPCIISER4_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx cpciiser4 esd
-CRAYL1_config:unconfig
+CRAYL1_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx L1 cray
csb272_config: unconfig
@@ -602,33 +602,36 @@
DU405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx du405 esd
-EBONY_config:unconfig
+EBONY_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ebony
-ERIC_config:unconfig
+ERIC_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx eric
-EXBITGEN_config:unconfig
+EXBITGEN_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx exbitgen
HUB405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx hub405 esd
-MIP405_config:unconfig
+JSE_config: unconfig
+ @./mkconfig $(@:_config=) ppc ppc4xx jse
+
+MIP405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx mip405 mpl
-MIP405T_config:unconfig
+MIP405T_config: unconfig
@echo "#define CONFIG_MIP405T" >include/config.h
@echo "Enable subset config for MIP405T"
@./mkconfig -a MIP405 ppc ppc4xx mip405 mpl
-ML2_config:unconfig
+ML2_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ml2
-ml300_config:unconfig
+ml300_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ml300 xilinx
-OCOTEA_config:unconfig
+OCOTEA_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx ocotea
OCRTC_config \
@@ -638,7 +641,7 @@
PCI405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pci405 esd
-PIP405_config:unconfig
+PIP405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx pip405 mpl
PLU405_config: unconfig
@@ -673,10 +676,10 @@
W7OLMG_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx w7o
-WALNUT405_config:unconfig
+WALNUT405_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx walnut405
-XPEDITE1K_config:unconfig
+XPEDITE1K_config: unconfig
@./mkconfig $(@:_config=) ppc ppc4xx xpedite1k
#########################################################################
diff --git a/README b/README
index d181626..051620e 100644
--- a/README
+++ b/README
@@ -246,52 +246,51 @@
PowerPC based boards:
---------------------
- CONFIG_ADCIOP, CONFIG_ICU862 CONFIG_RPXsuper,
- CONFIG_ADS860, CONFIG_IP860, CONFIG_SM850,
- CONFIG_AMX860, CONFIG_IPHASE4539, CONFIG_SPD823TS,
- CONFIG_AR405, CONFIG_IVML24, CONFIG_SXNI855T,
- CONFIG_BAB7xx, CONFIG_IVML24_128, CONFIG_Sandpoint8240,
- CONFIG_CANBT, CONFIG_IVML24_256, CONFIG_Sandpoint8245,
- CONFIG_CCM, CONFIG_IVMS8, CONFIG_TQM823L,
- CONFIG_CPCI405, CONFIG_IVMS8_128, CONFIG_TQM850L,
- CONFIG_CPCI4052, CONFIG_IVMS8_256, CONFIG_TQM855L,
- CONFIG_CPCIISER4, CONFIG_LANTEC, CONFIG_TQM860L,
- CONFIG_CPU86, CONFIG_MBX, CONFIG_TQM8260,
- CONFIG_CRAYL1, CONFIG_MBX860T, CONFIG_TTTech,
- CONFIG_CU824, CONFIG_MHPC, CONFIG_UTX8245,
- CONFIG_DASA_SIM, CONFIG_MIP405, CONFIG_W7OLMC,
- CONFIG_DU405, CONFIG_MOUSSE, CONFIG_W7OLMG,
- CONFIG_ELPPC, CONFIG_MPC8260ADS, CONFIG_WALNUT405,
- CONFIG_ERIC, CONFIG_MUSENKI, CONFIG_ZUMA,
- CONFIG_ESTEEM192E, CONFIG_MVS1, CONFIG_c2mon,
- CONFIG_ETX094, CONFIG_NX823, CONFIG_cogent_mpc8260,
- CONFIG_EVB64260, CONFIG_OCRTC, CONFIG_cogent_mpc8xx,
- CONFIG_FADS823, CONFIG_ORSG, CONFIG_ep8260,
- CONFIG_FADS850SAR, CONFIG_OXC, CONFIG_gw8260,
- CONFIG_FADS860T, CONFIG_PCI405, CONFIG_hermes,
- CONFIG_FLAGADM, CONFIG_PCIPPC2, CONFIG_hymod,
- CONFIG_FPS850L, CONFIG_PCIPPC6, CONFIG_lwmon,
- CONFIG_GEN860T, CONFIG_PIP405, CONFIG_pcu_e,
- CONFIG_GENIETV, CONFIG_PM826, CONFIG_ppmc8260,
- CONFIG_GTH, CONFIG_RPXClassic, CONFIG_rsdproto,
- CONFIG_IAD210, CONFIG_RPXlite, CONFIG_sbc8260,
- CONFIG_EBONY, CONFIG_sacsng, CONFIG_FPS860L,
- CONFIG_V37, CONFIG_ELPT860, CONFIG_CMI,
- CONFIG_NETVIA, CONFIG_RBC823, CONFIG_ZPC1900,
- CONFIG_MPC8540ADS, CONFIG_MPC8560ADS, CONFIG_QS850,
- CONFIG_QS823, CONFIG_QS860T, CONFIG_DB64360,
- CONFIG_DB64460, CONFIG_DUET_ADS CONFIG_NETTA
- CONFIG_NETPHONE
+ CONFIG_ADCIOP, CONFIG_ADS860, CONFIG_AMX860,
+ CONFIG_AR405, CONFIG_BAB7xx, CONFIG_c2mon,
+ CONFIG_CANBT, CONFIG_CCM, CONFIG_CMI,
+ CONFIG_cogent_mpc8260, CONFIG_cogent_mpc8xx, CONFIG_CPCI405,
+ CONFIG_CPCI4052, CONFIG_CPCIISER4, CONFIG_CPU86,
+ CONFIG_CRAYL1, CONFIG_CU824, CONFIG_DASA_SIM,
+ CONFIG_DB64360, CONFIG_DB64460, CONFIG_DU405,
+ CONFIG_DUET_ADS, CONFIG_EBONY, CONFIG_ELPPC,
+ CONFIG_ELPT860, CONFIG_ep8260, CONFIG_ERIC,
+ CONFIG_ESTEEM192E, CONFIG_ETX094, CONFIG_EVB64260,
+ CONFIG_FADS823, CONFIG_FADS850SAR, CONFIG_FADS860T,
+ CONFIG_FLAGADM, CONFIG_FPS850L, CONFIG_FPS860L,
+ CONFIG_GEN860T, CONFIG_GENIETV, CONFIG_GTH,
+ CONFIG_gw8260, CONFIG_hermes, CONFIG_hymod,
+ CONFIG_IAD210, CONFIG_ICU862, CONFIG_IP860,
+ CONFIG_IPHASE4539, CONFIG_IVML24, CONFIG_IVML24_128,
+ CONFIG_IVML24_256, CONFIG_IVMS8, CONFIG_IVMS8_128,
+ CONFIG_IVMS8_256, CONFIG_JSE, CONFIG_LANTEC,
+ CONFIG_lwmon, CONFIG_MBX, CONFIG_MBX860T,
+ CONFIG_MHPC, CONFIG_MIP405, CONFIG_MOUSSE,
+ CONFIG_MPC8260ADS, CONFIG_MPC8540ADS, CONFIG_MPC8560ADS,
+ CONFIG_MUSENKI, CONFIG_MVS1, CONFIG_NETPHONE,
+ CONFIG_NETTA, CONFIG_NETVIA, CONFIG_NX823,
+ CONFIG_OCRTC, CONFIG_ORSG, CONFIG_OXC,
+ CONFIG_PCI405, CONFIG_PCIPPC2, CONFIG_PCIPPC6,
+ CONFIG_pcu_e, CONFIG_PIP405, CONFIG_PM826,
+ CONFIG_ppmc8260, CONFIG_QS823, CONFIG_QS850,
+ CONFIG_QS860T, CONFIG_RBC823, CONFIG_RPXClassic,
+ CONFIG_RPXlite, CONFIG_RPXsuper, CONFIG_rsdproto,
+ CONFIG_sacsng, CONFIG_Sandpoint8240, CONFIG_Sandpoint8245,
+ CONFIG_sbc8260, CONFIG_SM850, CONFIG_SPD823TS,
+ CONFIG_SXNI855T, CONFIG_TQM823L, CONFIG_TQM8260,
+ CONFIG_TQM850L, CONFIG_TQM855L, CONFIG_TQM860L,
+ CONFIG_TTTech, CONFIG_UTX8245, CONFIG_V37,
+ CONFIG_W7OLMC, CONFIG_W7OLMG, CONFIG_WALNUT405,
+ CONFIG_ZPC1900, CONFIG_ZUMA,
ARM based boards:
-----------------
- CONFIG_HHP_CRADLE, CONFIG_DNP1110, CONFIG_EP7312,
- CONFIG_IMPA7, CONFIG_LART, CONFIG_LUBBOCK,
- CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610,
- CONFIG_H2_OMAP1610, CONFIG_SHANNON, CONFIG_SMDK2400,
- CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9,
- CONFIG_AT91RM9200DK
+ CONFIG_AT91RM9200DK, CONFIG_DNP1110, CONFIG_EP7312,
+ CONFIG_H2_OMAP1610, CONFIG_HHP_CRADLE, CONFIG_IMPA7,
+ CONFIG_INNOVATOROMAP1510, CONFIG_INNOVATOROMAP1610, CONFIG_LART,
+ CONFIG_LUBBOCK, CONFIG_SHANNON, CONFIG_SMDK2400,
+ CONFIG_SMDK2410, CONFIG_TRAB, CONFIG_VCMA9,
- CPU Module Type: (if CONFIG_COGENT is defined)
@@ -1971,1271 +1970,1272 @@
where "NAME_config" is the name of one of the existing
configurations; the following names are supported:
- ADCIOP_config GTH_config TQM850L_config
- ADS860_config IP860_config TQM855L_config
- AR405_config IVML24_config TQM860L_config
- CANBT_config IVMS8_config WALNUT405_config
- CPCI405_config LANTEC_config cogent_common_config
- CPCIISER4_config MBX_config cogent_mpc8260_config
- CU824_config MBX860T_config cogent_mpc8xx_config
- ESTEEM192E_config RPXlite_config hermes_config
- ETX094_config RPXsuper_config hymod_config
- FADS823_config SM850_config lwmon_config
- FADS850SAR_config SPD823TS_config pcu_e_config
- FADS860T_config SXNI855T_config rsdproto_config
- FPS850L_config Sandpoint8240_config sbc8260_config
- GENIETV_config TQM823L_config PIP405_config
- GEN860T_config EBONY_config FPS860L_config
- ELPT860_config cmi_mpc5xx_config NETVIA_config
- at91rm9200dk_config omap1510inn_config MPC8260ADS_config
- omap1610inn_config ZPC1900_config MPC8540ADS_config
- MPC8560ADS_config QS850_config QS823_config
- QS860T_config DUET_ADS_config omap1610h2_config
+ ADCIOP_config ADS860_config AR405_config
+ at91rm9200dk_config CANBT_config cmi_mpc5xx_config
+ cogent_common_config cogent_mpc8260_config cogent_mpc8xx_config
+ CPCI405_config CPCIISER4_config CU824_config
+ DUET_ADS_config EBONY_config ELPT860_config
+ ESTEEM192E_config ETX094_config FADS823_config
+ FADS850SAR_config FADS860T_config FPS850L_config
+ FPS860L_config GEN860T_config GENIETV_config
+ GTH_config hermes_config hymod_config
+ IP860_config IVML24_config IVMS8_config
+ JSE_config LANTEC_config lwmon_config
+ MBX860T_config MBX_config MPC8260ADS_config
+ MPC8540ADS_config MPC8560ADS_config NETVIA_config
+ omap1510inn_config omap1610h2_config omap1610inn_config
+ pcu_e_config PIP405_config QS823_config
+ QS850_config QS860T_config RPXlite_config
+ RPXsuper_config rsdproto_config Sandpoint8240_config
+ sbc8260_config SM850_config SPD823TS_config
+ SXNI855T_config TQM823L_config TQM850L_config
+ TQM855L_config TQM860L_config WALNUT405_config
+ ZPC1900_config
-Note: for some board special configuration names may exist; check if
- additional information is available from the board vendor; for
- instance, the TQM8xxL systems run normally at 50 MHz and use a
- SCC for 10baseT ethernet; there are also systems with 80 MHz
- CPU clock, and an optional Fast Ethernet module is available
- for CPU's with FEC. You can select such additional "features"
- when chosing the configuration, i. e.
+ Note: for some board special configuration names may exist; check if
+ additional information is available from the board vendor; for
+ instance, the TQM8xxL systems run normally at 50 MHz and use a
+ SCC for 10baseT ethernet; there are also systems with 80 MHz
+ CPU clock, and an optional Fast Ethernet module is available
+ for CPU's with FEC. You can select such additional "features"
+ when chosing the configuration, i. e.
- make TQM860L_config
- - will configure for a plain TQM860L, i. e. 50MHz, no FEC
+ make TQM860L_config
+ - will configure for a plain TQM860L, i. e. 50MHz, no FEC
- make TQM860L_FEC_config
- - will configure for a TQM860L at 50MHz with FEC for ethernet
+ make TQM860L_FEC_config
+ - will configure for a TQM860L at 50MHz with FEC for ethernet
- make TQM860L_80MHz_config
- - will configure for a TQM860L at 80 MHz, with normal 10baseT
- interface
+ make TQM860L_80MHz_config
+ - will configure for a TQM860L at 80 MHz, with normal 10baseT
+ interface
- make TQM860L_FEC_80MHz_config
- - will configure for a TQM860L at 80 MHz with FEC for ethernet
+ make TQM860L_FEC_80MHz_config
+ - will configure for a TQM860L at 80 MHz with FEC for ethernet
- make TQM823L_LCD_config
- - will configure for a TQM823L with U-Boot console on LCD
+ make TQM823L_LCD_config
+ - will configure for a TQM823L with U-Boot console on LCD
- make TQM823L_LCD_80MHz_config
- - will configure for a TQM823L at 80 MHz with U-Boot console on LCD
+ make TQM823L_LCD_80MHz_config
+ - will configure for a TQM823L at 80 MHz with U-Boot console on LCD
- etc.
+ etc.
-Finally, type "make all", and you should get some working U-Boot
-images ready for download to / installation on your system:
+ Finally, type "make all", and you should get some working U-Boot
+ images ready for download to / installation on your system:
-- "u-boot.bin" is a raw binary image
-- "u-boot" is an image in ELF binary format
-- "u-boot.srec" is in Motorola S-Record format
+ - "u-boot.bin" is a raw binary image
+ - "u-boot" is an image in ELF binary format
+ - "u-boot.srec" is in Motorola S-Record format
-Please be aware that the Makefiles assume you are using GNU make, so
-for instance on NetBSD you might need to use "gmake" instead of
-native "make".
+ Please be aware that the Makefiles assume you are using GNU make, so
+ for instance on NetBSD you might need to use "gmake" instead of
+ native "make".
-If the system board that you have is not listed, then you will need
-to port U-Boot to your hardware platform. To do this, follow these
-steps:
+ If the system board that you have is not listed, then you will need
+ to port U-Boot to your hardware platform. To do this, follow these
+ steps:
-1. Add a new configuration option for your board to the toplevel
- "Makefile" and to the "MAKEALL" script, using the existing
- entries as examples. Note that here and at many other places
- boards and other names are listed in alphabetical sort order. Please
- keep this order.
-2. Create a new directory to hold your board specific code. Add any
- files you need. In your board directory, you will need at least
- the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
-3. Create a new configuration file "include/configs/<board>.h" for
- your board
-3. If you're porting U-Boot to a new CPU, then also create a new
- directory to hold your CPU specific code. Add any files you need.
-4. Run "make <board>_config" with your new name.
-5. Type "make", and you should get a working "u-boot.srec" file
- to be installed on your target system.
-6. Debug and solve any problems that might arise.
- [Of course, this last step is much harder than it sounds.]
+ 1. Add a new configuration option for your board to the toplevel
+ "Makefile" and to the "MAKEALL" script, using the existing
+ entries as examples. Note that here and at many other places
+ boards and other names are listed in alphabetical sort order. Please
+ keep this order.
+ 2. Create a new directory to hold your board specific code. Add any
+ files you need. In your board directory, you will need at least
+ the "Makefile", a "<board>.c", "flash.c" and "u-boot.lds".
+ 3. Create a new configuration file "include/configs/<board>.h" for
+ your board
+ 3. If you're porting U-Boot to a new CPU, then also create a new
+ directory to hold your CPU specific code. Add any files you need.
+ 4. Run "make <board>_config" with your new name.
+ 5. Type "make", and you should get a working "u-boot.srec" file
+ to be installed on your target system.
+ 6. Debug and solve any problems that might arise.
+ [Of course, this last step is much harder than it sounds.]
-Testing of U-Boot Modifications, Ports to New Hardware, etc.:
-==============================================================
+ Testing of U-Boot Modifications, Ports to New Hardware, etc.:
+ ==============================================================
-If you have modified U-Boot sources (for instance added a new board
-or support for new devices, a new CPU, etc.) you are expected to
-provide feedback to the other developers. The feedback normally takes
-the form of a "patch", i. e. a context diff against a certain (latest
-official or latest in CVS) version of U-Boot sources.
+ If you have modified U-Boot sources (for instance added a new board
+ or support for new devices, a new CPU, etc.) you are expected to
+ provide feedback to the other developers. The feedback normally takes
+ the form of a "patch", i. e. a context diff against a certain (latest
+ official or latest in CVS) version of U-Boot sources.
-But before you submit such a patch, please verify that your modifi-
-cation did not break existing code. At least make sure that *ALL* of
-the supported boards compile WITHOUT ANY compiler warnings. To do so,
-just run the "MAKEALL" script, which will configure and build U-Boot
-for ALL supported system. Be warned, this will take a while. You can
-select which (cross) compiler to use by passing a `CROSS_COMPILE'
-environment variable to the script, i. e. to use the cross tools from
-MontaVista's Hard Hat Linux you can type
+ But before you submit such a patch, please verify that your modifi-
+ cation did not break existing code. At least make sure that *ALL* of
+ the supported boards compile WITHOUT ANY compiler warnings. To do so,
+ just run the "MAKEALL" script, which will configure and build U-Boot
+ for ALL supported system. Be warned, this will take a while. You can
+ select which (cross) compiler to use by passing a `CROSS_COMPILE'
+ environment variable to the script, i. e. to use the cross tools from
+ MontaVista's Hard Hat Linux you can type
- CROSS_COMPILE=ppc_8xx- MAKEALL
+ CROSS_COMPILE=ppc_8xx- MAKEALL
-or to build on a native PowerPC system you can type
+ or to build on a native PowerPC system you can type
- CROSS_COMPILE=' ' MAKEALL
+ CROSS_COMPILE=' ' MAKEALL
-See also "U-Boot Porting Guide" below.
+ See also "U-Boot Porting Guide" below.
-Monitor Commands - Overview:
-============================
+ Monitor Commands - Overview:
+ ============================
-go - start application at address 'addr'
-run - run commands in an environment variable
-bootm - boot application image from memory
-bootp - boot image via network using BootP/TFTP protocol
-tftpboot- boot image via network using TFTP protocol
- and env variables "ipaddr" and "serverip"
- (and eventually "gatewayip")
-rarpboot- boot image via network using RARP/TFTP protocol
-diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
-loads - load S-Record file over serial line
-loadb - load binary file over serial line (kermit mode)
-md - memory display
-mm - memory modify (auto-incrementing)
-nm - memory modify (constant address)
-mw - memory write (fill)
-cp - memory copy
-cmp - memory compare
-crc32 - checksum calculation
-imd - i2c memory display
-imm - i2c memory modify (auto-incrementing)
-inm - i2c memory modify (constant address)
-imw - i2c memory write (fill)
-icrc32 - i2c checksum calculation
-iprobe - probe to discover valid I2C chip addresses
-iloop - infinite loop on address range
-isdram - print SDRAM configuration information
-sspi - SPI utility commands
-base - print or set address offset
-printenv- print environment variables
-setenv - set environment variables
-saveenv - save environment variables to persistent storage
-protect - enable or disable FLASH write protection
-erase - erase FLASH memory
-flinfo - print FLASH memory information
-bdinfo - print Board Info structure
-iminfo - print header information for application image
-coninfo - print console devices and informations
-ide - IDE sub-system
-loop - infinite loop on address range
-mtest - simple RAM test
-icache - enable or disable instruction cache
-dcache - enable or disable data cache
-reset - Perform RESET of the CPU
-echo - echo args to console
-version - print monitor version
-help - print online help
-? - alias for 'help'
+ go - start application at address 'addr'
+ run - run commands in an environment variable
+ bootm - boot application image from memory
+ bootp - boot image via network using BootP/TFTP protocol
+ tftpboot- boot image via network using TFTP protocol
+ and env variables "ipaddr" and "serverip"
+ (and eventually "gatewayip")
+ rarpboot- boot image via network using RARP/TFTP protocol
+ diskboot- boot from IDE devicebootd - boot default, i.e., run 'bootcmd'
+ loads - load S-Record file over serial line
+ loadb - load binary file over serial line (kermit mode)
+ md - memory display
+ mm - memory modify (auto-incrementing)
+ nm - memory modify (constant address)
+ mw - memory write (fill)
+ cp - memory copy
+ cmp - memory compare
+ crc32 - checksum calculation
+ imd - i2c memory display
+ imm - i2c memory modify (auto-incrementing)
+ inm - i2c memory modify (constant address)
+ imw - i2c memory write (fill)
+ icrc32 - i2c checksum calculation
+ iprobe - probe to discover valid I2C chip addresses
+ iloop - infinite loop on address range
+ isdram - print SDRAM configuration information
+ sspi - SPI utility commands
+ base - print or set address offset
+ printenv- print environment variables
+ setenv - set environment variables
+ saveenv - save environment variables to persistent storage
+ protect - enable or disable FLASH write protection
+ erase - erase FLASH memory
+ flinfo - print FLASH memory information
+ bdinfo - print Board Info structure
+ iminfo - print header information for application image
+ coninfo - print console devices and informations
+ ide - IDE sub-system
+ loop - infinite loop on address range
+ mtest - simple RAM test
+ icache - enable or disable instruction cache
+ dcache - enable or disable data cache
+ reset - Perform RESET of the CPU
+ echo - echo args to console
+ version - print monitor version
+ help - print online help
+ ? - alias for 'help'
-Monitor Commands - Detailed Description:
-========================================
+ Monitor Commands - Detailed Description:
+ ========================================
-TODO.
+ TODO.
-For now: just type "help <command>".
+ For now: just type "help <command>".
-Environment Variables:
-======================
+ Environment Variables:
+ ======================
-U-Boot supports user configuration using Environment Variables which
-can be made persistent by saving to Flash memory.
+ U-Boot supports user configuration using Environment Variables which
+ can be made persistent by saving to Flash memory.
-Environment Variables are set using "setenv", printed using
-"printenv", and saved to Flash using "saveenv". Using "setenv"
-without a value can be used to delete a variable from the
-environment. As long as you don't save the environment you are
-working with an in-memory copy. In case the Flash area containing the
-environment is erased by accident, a default environment is provided.
+ Environment Variables are set using "setenv", printed using
+ "printenv", and saved to Flash using "saveenv". Using "setenv"
+ without a value can be used to delete a variable from the
+ environment. As long as you don't save the environment you are
+ working with an in-memory copy. In case the Flash area containing the
+ environment is erased by accident, a default environment is provided.
-Some configuration options can be set using Environment Variables:
+ Some configuration options can be set using Environment Variables:
- baudrate - see CONFIG_BAUDRATE
+ baudrate - see CONFIG_BAUDRATE
- bootdelay - see CONFIG_BOOTDELAY
+ bootdelay - see CONFIG_BOOTDELAY
- bootcmd - see CONFIG_BOOTCOMMAND
+ bootcmd - see CONFIG_BOOTCOMMAND
- bootargs - Boot arguments when booting an RTOS image
+ bootargs - Boot arguments when booting an RTOS image
- bootfile - Name of the image to load with TFTP
+ bootfile - Name of the image to load with TFTP
- autoload - if set to "no" (any string beginning with 'n'),
- "bootp" will just load perform a lookup of the
- configuration from the BOOTP server, but not try to
- load any image using TFTP
+ autoload - if set to "no" (any string beginning with 'n'),
+ "bootp" will just load perform a lookup of the
+ configuration from the BOOTP server, but not try to
+ load any image using TFTP
- autostart - if set to "yes", an image loaded using the "bootp",
- "rarpboot", "tftpboot" or "diskboot" commands will
- be automatically started (by internally calling
- "bootm")
+ autostart - if set to "yes", an image loaded using the "bootp",
+ "rarpboot", "tftpboot" or "diskboot" commands will
+ be automatically started (by internally calling
+ "bootm")
- If set to "no", a standalone image passed to the
- "bootm" command will be copied to the load address
- (and eventually uncompressed), but NOT be started.
- This can be used to load and uncompress arbitrary
- data.
+ If set to "no", a standalone image passed to the
+ "bootm" command will be copied to the load address
+ (and eventually uncompressed), but NOT be started.
+ This can be used to load and uncompress arbitrary
+ data.
- initrd_high - restrict positioning of initrd images:
- If this variable is not set, initrd images will be
- copied to the highest possible address in RAM; this
- is usually what you want since it allows for
- maximum initrd size. If for some reason you want to
- make sure that the initrd image is loaded below the
- CFG_BOOTMAPSZ limit, you can set this environment
- variable to a value of "no" or "off" or "0".
- Alternatively, you can set it to a maximum upper
- address to use (U-Boot will still check that it
- does not overwrite the U-Boot stack and data).
+ initrd_high - restrict positioning of initrd images:
+ If this variable is not set, initrd images will be
+ copied to the highest possible address in RAM; this
+ is usually what you want since it allows for
+ maximum initrd size. If for some reason you want to
+ make sure that the initrd image is loaded below the
+ CFG_BOOTMAPSZ limit, you can set this environment
+ variable to a value of "no" or "off" or "0".
+ Alternatively, you can set it to a maximum upper
+ address to use (U-Boot will still check that it
+ does not overwrite the U-Boot stack and data).
- For instance, when you have a system with 16 MB
- RAM, and want to reserve 4 MB from use by Linux,
- you can do this by adding "mem=12M" to the value of
- the "bootargs" variable. However, now you must make
- sure that the initrd image is placed in the first
- 12 MB as well - this can be done with
+ For instance, when you have a system with 16 MB
+ RAM, and want to reserve 4 MB from use by Linux,
+ you can do this by adding "mem=12M" to the value of
+ the "bootargs" variable. However, now you must make
+ sure that the initrd image is placed in the first
+ 12 MB as well - this can be done with
- setenv initrd_high 00c00000
+ setenv initrd_high 00c00000
- If you set initrd_high to 0xFFFFFFFF, this is an
- indication to U-Boot that all addresses are legal
- for the Linux kernel, including addresses in flash
- memory. In this case U-Boot will NOT COPY the
- ramdisk at all. This may be useful to reduce the
- boot time on your system, but requires that this
- feature is supported by your Linux kernel.
+ If you set initrd_high to 0xFFFFFFFF, this is an
+ indication to U-Boot that all addresses are legal
+ for the Linux kernel, including addresses in flash
+ memory. In this case U-Boot will NOT COPY the
+ ramdisk at all. This may be useful to reduce the
+ boot time on your system, but requires that this
+ feature is supported by your Linux kernel.
- ipaddr - IP address; needed for tftpboot command
+ ipaddr - IP address; needed for tftpboot command
- loadaddr - Default load address for commands like "bootp",
- "rarpboot", "tftpboot", "loadb" or "diskboot"
+ loadaddr - Default load address for commands like "bootp",
+ "rarpboot", "tftpboot", "loadb" or "diskboot"
- loads_echo - see CONFIG_LOADS_ECHO
+ loads_echo - see CONFIG_LOADS_ECHO
- serverip - TFTP server IP address; needed for tftpboot command
+ serverip - TFTP server IP address; needed for tftpboot command
- bootretry - see CONFIG_BOOT_RETRY_TIME
+ bootretry - see CONFIG_BOOT_RETRY_TIME
- bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR
+ bootdelaykey - see CONFIG_AUTOBOOT_DELAY_STR
- bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
+ bootstopkey - see CONFIG_AUTOBOOT_STOP_STR
- ethprime - When CONFIG_NET_MULTI is enabled controls which
- interface is used first.
+ ethprime - When CONFIG_NET_MULTI is enabled controls which
+ interface is used first.
- ethact - When CONFIG_NET_MULTI is enabled controls which
- interface is currently active. For example you
- can do the following
+ ethact - When CONFIG_NET_MULTI is enabled controls which
+ interface is currently active. For example you
+ can do the following
- => setenv ethact FEC ETHERNET
- => ping 192.168.0.1 # traffic sent on FEC ETHERNET
- => setenv ethact SCC ETHERNET
- => ping 10.0.0.1 # traffic sent on SCC ETHERNET
+ => setenv ethact FEC ETHERNET
+ => ping 192.168.0.1 # traffic sent on FEC ETHERNET
+ => setenv ethact SCC ETHERNET
+ => ping 10.0.0.1 # traffic sent on SCC ETHERNET
- netretry - When set to "no" each network operation will
- either succeed or fail without retrying.
- Useful on scripts which control the retry operation
- themselves.
+ netretry - When set to "no" each network operation will
+ either succeed or fail without retrying.
+ Useful on scripts which control the retry operation
+ themselves.
- vlan - When set to a value < 4095 the traffic over
- ethernet is encapsulated/received over 802.1q
- VLAN tagged frames.
+ vlan - When set to a value < 4095 the traffic over
+ ethernet is encapsulated/received over 802.1q
+ VLAN tagged frames.
-The following environment variables may be used and automatically
-updated by the network boot commands ("bootp" and "rarpboot"),
-depending the information provided by your boot server:
+ The following environment variables may be used and automatically
+ updated by the network boot commands ("bootp" and "rarpboot"),
+ depending the information provided by your boot server:
- bootfile - see above
- dnsip - IP address of your Domain Name Server
- dnsip2 - IP address of your secondary Domain Name Server
- gatewayip - IP address of the Gateway (Router) to use
- hostname - Target hostname
- ipaddr - see above
- netmask - Subnet Mask
- rootpath - Pathname of the root filesystem on the NFS server
- serverip - see above
+ bootfile - see above
+ dnsip - IP address of your Domain Name Server
+ dnsip2 - IP address of your secondary Domain Name Server
+ gatewayip - IP address of the Gateway (Router) to use
+ hostname - Target hostname
+ ipaddr - see above
+ netmask - Subnet Mask
+ rootpath - Pathname of the root filesystem on the NFS server
+ serverip - see above
-There are two special Environment Variables:
+ There are two special Environment Variables:
- serial# - contains hardware identification information such
- as type string and/or serial number
- ethaddr - Ethernet address
+ serial# - contains hardware identification information such
+ as type string and/or serial number
+ ethaddr - Ethernet address
-These variables can be set only once (usually during manufacturing of
-the board). U-Boot refuses to delete or overwrite these variables
-once they have been set once.
+ These variables can be set only once (usually during manufacturing of
+ the board). U-Boot refuses to delete or overwrite these variables
+ once they have been set once.
-Further special Environment Variables:
+ Further special Environment Variables:
- ver - Contains the U-Boot version string as printed
- with the "version" command. This variable is
- readonly (see CONFIG_VERSION_VARIABLE).
+ ver - Contains the U-Boot version string as printed
+ with the "version" command. This variable is
+ readonly (see CONFIG_VERSION_VARIABLE).
-Please note that changes to some configuration parameters may take
-only effect after the next boot (yes, that's just like Windoze :-).
+ Please note that changes to some configuration parameters may take
+ only effect after the next boot (yes, that's just like Windoze :-).
-Command Line Parsing:
-=====================
+ Command Line Parsing:
+ =====================
-There are two different command line parsers available with U-Boot:
-the old "simple" one, and the much more powerful "hush" shell:
+ There are two different command line parsers available with U-Boot:
+ the old "simple" one, and the much more powerful "hush" shell:
-Old, simple command line parser:
---------------------------------
+ Old, simple command line parser:
+ --------------------------------
-- supports environment variables (through setenv / saveenv commands)
-- several commands on one line, separated by ';'
-- variable substitution using "... $(name) ..." syntax
-- special characters ('$', ';') can be escaped by prefixing with '\',
- for example:
- setenv bootcmd bootm \$(address)
-- You can also escape text by enclosing in single apostrophes, for example:
- setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
+ - supports environment variables (through setenv / saveenv commands)
+ - several commands on one line, separated by ';'
+ - variable substitution using "... $(name) ..." syntax
+ - special characters ('$', ';') can be escaped by prefixing with '\',
+ for example:
+ setenv bootcmd bootm \$(address)
+ - You can also escape text by enclosing in single apostrophes, for example:
+ setenv addip 'setenv bootargs $bootargs ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off'
-Hush shell:
------------
+ Hush shell:
+ -----------
-- similar to Bourne shell, with control structures like
- if...then...else...fi, for...do...done; while...do...done,
- until...do...done, ...
-- supports environment ("global") variables (through setenv / saveenv
- commands) and local shell variables (through standard shell syntax
- "name=value"); only environment variables can be used with "run"
- command
+ - similar to Bourne shell, with control structures like
+ if...then...else...fi, for...do...done; while...do...done,
+ until...do...done, ...
+ - supports environment ("global") variables (through setenv / saveenv
+ commands) and local shell variables (through standard shell syntax
+ "name=value"); only environment variables can be used with "run"
+ command
-General rules:
---------------
+ General rules:
+ --------------
-(1) If a command line (or an environment variable executed by a "run"
- command) contains several commands separated by semicolon, and
- one of these commands fails, then the remaining commands will be
- executed anyway.
+ (1) If a command line (or an environment variable executed by a "run"
+ command) contains several commands separated by semicolon, and
+ one of these commands fails, then the remaining commands will be
+ executed anyway.
-(2) If you execute several variables with one call to run (i. e.
- calling run with a list af variables as arguments), any failing
- command will cause "run" to terminate, i. e. the remaining
- variables are not executed.
+ (2) If you execute several variables with one call to run (i. e.
+ calling run with a list af variables as arguments), any failing
+ command will cause "run" to terminate, i. e. the remaining
+ variables are not executed.
-Note for Redundant Ethernet Interfaces:
-=======================================
+ Note for Redundant Ethernet Interfaces:
+ =======================================
-Some boards come with redundant ethernet interfaces; U-Boot supports
-such configurations and is capable of automatic selection of a
-"working" interface when needed. MAC assignment works as follows:
+ Some boards come with redundant ethernet interfaces; U-Boot supports
+ such configurations and is capable of automatic selection of a
+ "working" interface when needed. MAC assignment works as follows:
-Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
-MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
-"eth1addr" (=>eth1), "eth2addr", ...
+ Network interfaces are numbered eth0, eth1, eth2, ... Corresponding
+ MAC addresses can be stored in the environment as "ethaddr" (=>eth0),
+ "eth1addr" (=>eth1), "eth2addr", ...
-If the network interface stores some valid MAC address (for instance
-in SROM), this is used as default address if there is NO correspon-
-ding setting in the environment; if the corresponding environment
-variable is set, this overrides the settings in the card; that means:
+ If the network interface stores some valid MAC address (for instance
+ in SROM), this is used as default address if there is NO correspon-
+ ding setting in the environment; if the corresponding environment
+ variable is set, this overrides the settings in the card; that means:
-o If the SROM has a valid MAC address, and there is no address in the
- environment, the SROM's address is used.
+ o If the SROM has a valid MAC address, and there is no address in the
+ environment, the SROM's address is used.
-o If there is no valid address in the SROM, and a definition in the
- environment exists, then the value from the environment variable is
- used.
+ o If there is no valid address in the SROM, and a definition in the
+ environment exists, then the value from the environment variable is
+ used.
-o If both the SROM and the environment contain a MAC address, and
- both addresses are the same, this MAC address is used.
+ o If both the SROM and the environment contain a MAC address, and
+ both addresses are the same, this MAC address is used.
-o If both the SROM and the environment contain a MAC address, and the
- addresses differ, the value from the environment is used and a
- warning is printed.
+ o If both the SROM and the environment contain a MAC address, and the
+ addresses differ, the value from the environment is used and a
+ warning is printed.
-o If neither SROM nor the environment contain a MAC address, an error
- is raised.
+ o If neither SROM nor the environment contain a MAC address, an error
+ is raised.
-Image Formats:
-==============
+ Image Formats:
+ ==============
-The "boot" commands of this monitor operate on "image" files which
-can be basicly anything, preceeded by a special header; see the
-definitions in include/image.h for details; basicly, the header
-defines the following image properties:
+ The "boot" commands of this monitor operate on "image" files which
+ can be basicly anything, preceeded by a special header; see the
+ definitions in include/image.h for details; basicly, the header
+ defines the following image properties:
-* Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
- 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
- LynxOS, pSOS, QNX, RTEMS, ARTOS;
- Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS, LynxOS).
-* Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
- IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
- Currently supported: ARM, Intel x86, MIPS, NIOS, PowerPC).
-* Compression Type (uncompressed, gzip, bzip2)
-* Load Address
-* Entry Point
-* Image Name
-* Image Timestamp
+ * Target Operating System (Provisions for OpenBSD, NetBSD, FreeBSD,
+ 4.4BSD, Linux, SVR4, Esix, Solaris, Irix, SCO, Dell, NCR, VxWorks,
+ LynxOS, pSOS, QNX, RTEMS, ARTOS;
+ Currently supported: Linux, NetBSD, VxWorks, QNX, RTEMS, ARTOS, LynxOS).
+ * Target CPU Architecture (Provisions for Alpha, ARM, Intel x86,
+ IA64, MIPS, NIOS, PowerPC, IBM S390, SuperH, Sparc, Sparc 64 Bit;
+ Currently supported: ARM, Intel x86, MIPS, NIOS, PowerPC).
+ * Compression Type (uncompressed, gzip, bzip2)
+ * Load Address
+ * Entry Point
+ * Image Name
+ * Image Timestamp
-The header is marked by a special Magic Number, and both the header
-and the data portions of the image are secured against corruption by
-CRC32 checksums.
+ The header is marked by a special Magic Number, and both the header
+ and the data portions of the image are secured against corruption by
+ CRC32 checksums.
-Linux Support:
-==============
+ Linux Support:
+ ==============
-Although U-Boot should support any OS or standalone application
-easily, the main focus has always been on Linux during the design of
-U-Boot.
+ Although U-Boot should support any OS or standalone application
+ easily, the main focus has always been on Linux during the design of
+ U-Boot.
-U-Boot includes many features that so far have been part of some
-special "boot loader" code within the Linux kernel. Also, any
-"initrd" images to be used are no longer part of one big Linux image;
-instead, kernel and "initrd" are separate images. This implementation
-serves several purposes:
+ U-Boot includes many features that so far have been part of some
+ special "boot loader" code within the Linux kernel. Also, any
+ "initrd" images to be used are no longer part of one big Linux image;
+ instead, kernel and "initrd" are separate images. This implementation
+ serves several purposes:
-- the same features can be used for other OS or standalone
- applications (for instance: using compressed images to reduce the
- Flash memory footprint)
+ - the same features can be used for other OS or standalone
+ applications (for instance: using compressed images to reduce the
+ Flash memory footprint)
-- it becomes much easier to port new Linux kernel versions because
- lots of low-level, hardware dependent stuff are done by U-Boot
+ - it becomes much easier to port new Linux kernel versions because
+ lots of low-level, hardware dependent stuff are done by U-Boot
-- the same Linux kernel image can now be used with different "initrd"
- images; of course this also means that different kernel images can
- be run with the same "initrd". This makes testing easier (you don't
- have to build a new "zImage.initrd" Linux image when you just
- change a file in your "initrd"). Also, a field-upgrade of the
- software is easier now.
+ - the same Linux kernel image can now be used with different "initrd"
+ images; of course this also means that different kernel images can
+ be run with the same "initrd". This makes testing easier (you don't
+ have to build a new "zImage.initrd" Linux image when you just
+ change a file in your "initrd"). Also, a field-upgrade of the
+ software is easier now.
-Linux HOWTO:
-============
+ Linux HOWTO:
+ ============
-Porting Linux to U-Boot based systems:
----------------------------------------
+ Porting Linux to U-Boot based systems:
+ ---------------------------------------
-U-Boot cannot save you from doing all the necessary modifications to
-configure the Linux device drivers for use with your target hardware
-(no, we don't intend to provide a full virtual machine interface to
-Linux :-).
+ U-Boot cannot save you from doing all the necessary modifications to
+ configure the Linux device drivers for use with your target hardware
+ (no, we don't intend to provide a full virtual machine interface to
+ Linux :-).
-But now you can ignore ALL boot loader code (in arch/ppc/mbxboot).
+ But now you can ignore ALL boot loader code (in arch/ppc/mbxboot).
-Just make sure your machine specific header file (for instance
-include/asm-ppc/tqm8xx.h) includes the same definition of the Board
-Information structure as we define in include/u-boot.h, and make
-sure that your definition of IMAP_ADDR uses the same value as your
-U-Boot configuration in CFG_IMMR.
+ Just make sure your machine specific header file (for instance
+ include/asm-ppc/tqm8xx.h) includes the same definition of the Board
+ Information structure as we define in include/u-boot.h, and make
+ sure that your definition of IMAP_ADDR uses the same value as your
+ U-Boot configuration in CFG_IMMR.
-Configuring the Linux kernel:
------------------------------
+ Configuring the Linux kernel:
+ -----------------------------
-No specific requirements for U-Boot. Make sure you have some root
-device (initial ramdisk, NFS) for your target system.
+ No specific requirements for U-Boot. Make sure you have some root
+ device (initial ramdisk, NFS) for your target system.
-Building a Linux Image:
------------------------
+ Building a Linux Image:
+ -----------------------
-With U-Boot, "normal" build targets like "zImage" or "bzImage" are
-not used. If you use recent kernel source, a new build target
-"uImage" will exist which automatically builds an image usable by
-U-Boot. Most older kernels also have support for a "pImage" target,
-which was introduced for our predecessor project PPCBoot and uses a
-100% compatible format.
+ With U-Boot, "normal" build targets like "zImage" or "bzImage" are
+ not used. If you use recent kernel source, a new build target
+ "uImage" will exist which automatically builds an image usable by
+ U-Boot. Most older kernels also have support for a "pImage" target,
+ which was introduced for our predecessor project PPCBoot and uses a
+ 100% compatible format.
-Example:
+ Example:
- make TQM850L_config
- make oldconfig
- make dep
- make uImage
+ make TQM850L_config
+ make oldconfig
+ make dep
+ make uImage
-The "uImage" build target uses a special tool (in 'tools/mkimage') to
-encapsulate a compressed Linux kernel image with header information,
-CRC32 checksum etc. for use with U-Boot. This is what we are doing:
+ The "uImage" build target uses a special tool (in 'tools/mkimage') to
+ encapsulate a compressed Linux kernel image with header information,
+ CRC32 checksum etc. for use with U-Boot. This is what we are doing:
-* build a standard "vmlinux" kernel image (in ELF binary format):
+ * build a standard "vmlinux" kernel image (in ELF binary format):
-* convert the kernel into a raw binary image:
+ * convert the kernel into a raw binary image:
- ${CROSS_COMPILE}-objcopy -O binary \
- -R .note -R .comment \
- -S vmlinux linux.bin
+ ${CROSS_COMPILE}-objcopy -O binary \
+ -R .note -R .comment \
+ -S vmlinux linux.bin
-* compress the binary image:
+ * compress the binary image:
- gzip -9 linux.bin
+ gzip -9 linux.bin
-* package compressed binary image for U-Boot:
+ * package compressed binary image for U-Boot:
- mkimage -A ppc -O linux -T kernel -C gzip \
- -a 0 -e 0 -n "Linux Kernel Image" \
- -d linux.bin.gz uImage
+ mkimage -A ppc -O linux -T kernel -C gzip \
+ -a 0 -e 0 -n "Linux Kernel Image" \
+ -d linux.bin.gz uImage
-The "mkimage" tool can also be used to create ramdisk images for use
-with U-Boot, either separated from the Linux kernel image, or
-combined into one file. "mkimage" encapsulates the images with a 64
-byte header containing information about target architecture,
-operating system, image type, compression method, entry points, time
-stamp, CRC32 checksums, etc.
+ The "mkimage" tool can also be used to create ramdisk images for use
+ with U-Boot, either separated from the Linux kernel image, or
+ combined into one file. "mkimage" encapsulates the images with a 64
+ byte header containing information about target architecture,
+ operating system, image type, compression method, entry points, time
+ stamp, CRC32 checksums, etc.
-"mkimage" can be called in two ways: to verify existing images and
-print the header information, or to build new images.
+ "mkimage" can be called in two ways: to verify existing images and
+ print the header information, or to build new images.
-In the first form (with "-l" option) mkimage lists the information
-contained in the header of an existing U-Boot image; this includes
-checksum verification:
+ In the first form (with "-l" option) mkimage lists the information
+ contained in the header of an existing U-Boot image; this includes
+ checksum verification:
- tools/mkimage -l image
- -l ==> list image header information
+ tools/mkimage -l image
+ -l ==> list image header information
-The second form (with "-d" option) is used to build a U-Boot image
-from a "data file" which is used as image payload:
+ The second form (with "-d" option) is used to build a U-Boot image
+ from a "data file" which is used as image payload:
- tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
- -n name -d data_file image
- -A ==> set architecture to 'arch'
- -O ==> set operating system to 'os'
- -T ==> set image type to 'type'
- -C ==> set compression type 'comp'
- -a ==> set load address to 'addr' (hex)
- -e ==> set entry point to 'ep' (hex)
- -n ==> set image name to 'name'
- -d ==> use image data from 'datafile'
+ tools/mkimage -A arch -O os -T type -C comp -a addr -e ep \
+ -n name -d data_file image
+ -A ==> set architecture to 'arch'
+ -O ==> set operating system to 'os'
+ -T ==> set image type to 'type'
+ -C ==> set compression type 'comp'
+ -a ==> set load address to 'addr' (hex)
+ -e ==> set entry point to 'ep' (hex)
+ -n ==> set image name to 'name'
+ -d ==> use image data from 'datafile'
-Right now, all Linux kernels use the same load address (0x00000000),
-but the entry point address depends on the kernel version:
+ Right now, all Linux kernels use the same load address (0x00000000),
+ but the entry point address depends on the kernel version:
-- 2.2.x kernels have the entry point at 0x0000000C,
-- 2.3.x and later kernels have the entry point at 0x00000000.
+ - 2.2.x kernels have the entry point at 0x0000000C,
+ - 2.3.x and later kernels have the entry point at 0x00000000.
-So a typical call to build a U-Boot image would read:
+ So a typical call to build a U-Boot image would read:
- -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
- > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
- > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz \
- > examples/uImage.TQM850L
- Image Name: 2.4.4 kernel for TQM850L
- Created: Wed Jul 19 02:34:59 2000
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
- Load Address: 0x00000000
- Entry Point: 0x00000000
+ -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
+ > -A ppc -O linux -T kernel -C gzip -a 0 -e 0 \
+ > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz \
+ > examples/uImage.TQM850L
+ Image Name: 2.4.4 kernel for TQM850L
+ Created: Wed Jul 19 02:34:59 2000
+ Image Type: PowerPC Linux Kernel Image (gzip compressed)
+ Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
+ Load Address: 0x00000000
+ Entry Point: 0x00000000
-To verify the contents of the image (or check for corruption):
+ To verify the contents of the image (or check for corruption):
- -> tools/mkimage -l examples/uImage.TQM850L
- Image Name: 2.4.4 kernel for TQM850L
- Created: Wed Jul 19 02:34:59 2000
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
- Load Address: 0x00000000
- Entry Point: 0x00000000
+ -> tools/mkimage -l examples/uImage.TQM850L
+ Image Name: 2.4.4 kernel for TQM850L
+ Created: Wed Jul 19 02:34:59 2000
+ Image Type: PowerPC Linux Kernel Image (gzip compressed)
+ Data Size: 335725 Bytes = 327.86 kB = 0.32 MB
+ Load Address: 0x00000000
+ Entry Point: 0x00000000
+
+ NOTE: for embedded systems where boot time is critical you can trade
+ speed for memory and install an UNCOMPRESSED image instead: this
+ needs more space in Flash, but boots much faster since it does not
+ need to be uncompressed:
+
+ -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz
+ -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
+ > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
+ > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux \
+ > examples/uImage.TQM850L-uncompressed
+ Image Name: 2.4.4 kernel for TQM850L
+ Created: Wed Jul 19 02:34:59 2000
+ Image Type: PowerPC Linux Kernel Image (uncompressed)
+ Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
+ Load Address: 0x00000000
+ Entry Point: 0x00000000
+
+
+ Similar you can build U-Boot images from a 'ramdisk.image.gz' file
+ when your kernel is intended to use an initial ramdisk:
+
+ -> tools/mkimage -n 'Simple Ramdisk Image' \
+ > -A ppc -O linux -T ramdisk -C gzip \
+ > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
+ Image Name: Simple Ramdisk Image
+ Created: Wed Jan 12 14:01:50 2000
+ Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
+ Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
+ Load Address: 0x00000000
+ Entry Point: 0x00000000
+
+
+ Installing a Linux Image:
+ -------------------------
+
+ To downloading a U-Boot image over the serial (console) interface,
+ you must convert the image to S-Record format:
+
+ objcopy -I binary -O srec examples/image examples/image.srec
-NOTE: for embedded systems where boot time is critical you can trade
-speed for memory and install an UNCOMPRESSED image instead: this
-needs more space in Flash, but boots much faster since it does not
-need to be uncompressed:
+ The 'objcopy' does not understand the information in the U-Boot
+ image header, so the resulting S-Record file will be relative to
+ address 0x00000000. To load it to a given address, you need to
+ specify the target address as 'offset' parameter with the 'loads'
+ command.
- -> gunzip /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux.gz
- -> tools/mkimage -n '2.4.4 kernel for TQM850L' \
- > -A ppc -O linux -T kernel -C none -a 0 -e 0 \
- > -d /opt/elsk/ppc_8xx/usr/src/linux-2.4.4/arch/ppc/coffboot/vmlinux \
- > examples/uImage.TQM850L-uncompressed
- Image Name: 2.4.4 kernel for TQM850L
- Created: Wed Jul 19 02:34:59 2000
- Image Type: PowerPC Linux Kernel Image (uncompressed)
- Data Size: 792160 Bytes = 773.59 kB = 0.76 MB
- Load Address: 0x00000000
- Entry Point: 0x00000000
+ Example: install the image to address 0x40100000 (which on the
+ TQM8xxL is in the first Flash bank):
+ => erase 40100000 401FFFFF
-Similar you can build U-Boot images from a 'ramdisk.image.gz' file
-when your kernel is intended to use an initial ramdisk:
+ .......... done
+ Erased 8 sectors
- -> tools/mkimage -n 'Simple Ramdisk Image' \
- > -A ppc -O linux -T ramdisk -C gzip \
- > -d /LinuxPPC/images/SIMPLE-ramdisk.image.gz examples/simple-initrd
- Image Name: Simple Ramdisk Image
- Created: Wed Jan 12 14:01:50 2000
- Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
- Data Size: 566530 Bytes = 553.25 kB = 0.54 MB
- Load Address: 0x00000000
- Entry Point: 0x00000000
+ => loads 40100000
+ ## Ready for S-Record download ...
+ ~>examples/image.srec
+ 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
+ ...
+ 15989 15990 15991 15992
+ [file transfer complete]
+ [connected]
+ ## Start Addr = 0x00000000
-Installing a Linux Image:
--------------------------
+ You can check the success of the download using the 'iminfo' command;
+ this includes a checksum verification so you can be sure no data
+ corruption happened:
-To downloading a U-Boot image over the serial (console) interface,
-you must convert the image to S-Record format:
+ => imi 40100000
- objcopy -I binary -O srec examples/image examples/image.srec
+ ## Checking Image at 40100000 ...
+ Image Name: 2.2.13 for initrd on TQM850L
+ Image Type: PowerPC Linux Kernel Image (gzip compressed)
+ Data Size: 335725 Bytes = 327 kB = 0 MB
+ Load Address: 00000000
+ Entry Point: 0000000c
+ Verifying Checksum ... OK
-The 'objcopy' does not understand the information in the U-Boot
-image header, so the resulting S-Record file will be relative to
-address 0x00000000. To load it to a given address, you need to
-specify the target address as 'offset' parameter with the 'loads'
-command.
-Example: install the image to address 0x40100000 (which on the
-TQM8xxL is in the first Flash bank):
+ Boot Linux:
+ -----------
- => erase 40100000 401FFFFF
+ The "bootm" command is used to boot an application that is stored in
+ memory (RAM or Flash). In case of a Linux kernel image, the contents
+ of the "bootargs" environment variable is passed to the kernel as
+ parameters. You can check and modify this variable using the
+ "printenv" and "setenv" commands:
- .......... done
- Erased 8 sectors
- => loads 40100000
- ## Ready for S-Record download ...
- ~>examples/image.srec
- 1 2 3 4 5 6 7 8 9 10 11 12 13 ...
- ...
- 15989 15990 15991 15992
- [file transfer complete]
- [connected]
- ## Start Addr = 0x00000000
+ => printenv bootargs
+ bootargs=root=/dev/ram
+ => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
-You can check the success of the download using the 'iminfo' command;
-this includes a checksum verification so you can be sure no data
-corruption happened:
+ => printenv bootargs
+ bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
- => imi 40100000
+ => bootm 40020000
+ ## Booting Linux kernel at 40020000 ...
+ Image Name: 2.2.13 for NFS on TQM850L
+ Image Type: PowerPC Linux Kernel Image (gzip compressed)
+ Data Size: 381681 Bytes = 372 kB = 0 MB
+ Load Address: 00000000
+ Entry Point: 0000000c
+ Verifying Checksum ... OK
+ Uncompressing Kernel Image ... OK
+ Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
+ Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
+ time_init: decrementer frequency = 187500000/60
+ Calibrating delay loop... 49.77 BogoMIPS
+ Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
+ ...
- ## Checking Image at 40100000 ...
- Image Name: 2.2.13 for initrd on TQM850L
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 335725 Bytes = 327 kB = 0 MB
- Load Address: 00000000
- Entry Point: 0000000c
- Verifying Checksum ... OK
+ If you want to boot a Linux kernel with initial ram disk, you pass
+ the memory addresses of both the kernel and the initrd image (PPBCOOT
+ format!) to the "bootm" command:
+ => imi 40100000 40200000
-Boot Linux:
------------
+ ## Checking Image at 40100000 ...
+ Image Name: 2.2.13 for initrd on TQM850L
+ Image Type: PowerPC Linux Kernel Image (gzip compressed)
+ Data Size: 335725 Bytes = 327 kB = 0 MB
+ Load Address: 00000000
+ Entry Point: 0000000c
+ Verifying Checksum ... OK
-The "bootm" command is used to boot an application that is stored in
-memory (RAM or Flash). In case of a Linux kernel image, the contents
-of the "bootargs" environment variable is passed to the kernel as
-parameters. You can check and modify this variable using the
-"printenv" and "setenv" commands:
+ ## Checking Image at 40200000 ...
+ Image Name: Simple Ramdisk Image
+ Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
+ Data Size: 566530 Bytes = 553 kB = 0 MB
+ Load Address: 00000000
+ Entry Point: 00000000
+ Verifying Checksum ... OK
+ => bootm 40100000 40200000
+ ## Booting Linux kernel at 40100000 ...
+ Image Name: 2.2.13 for initrd on TQM850L
+ Image Type: PowerPC Linux Kernel Image (gzip compressed)
+ Data Size: 335725 Bytes = 327 kB = 0 MB
+ Load Address: 00000000
+ Entry Point: 0000000c
+ Verifying Checksum ... OK
+ Uncompressing Kernel Image ... OK
+ ## Loading RAMDisk Image at 40200000 ...
+ Image Name: Simple Ramdisk Image
+ Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
+ Data Size: 566530 Bytes = 553 kB = 0 MB
+ Load Address: 00000000
+ Entry Point: 00000000
+ Verifying Checksum ... OK
+ Loading Ramdisk ... OK
+ Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
+ Boot arguments: root=/dev/ram
+ time_init: decrementer frequency = 187500000/60
+ Calibrating delay loop... 49.77 BogoMIPS
+ ...
+ RAMDISK: Compressed image found at block 0
+ VFS: Mounted root (ext2 filesystem).
- => printenv bootargs
- bootargs=root=/dev/ram
+ bash#
- => setenv bootargs root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
+ More About U-Boot Image Types:
+ ------------------------------
- => printenv bootargs
- bootargs=root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
+ U-Boot supports the following image types:
- => bootm 40020000
- ## Booting Linux kernel at 40020000 ...
- Image Name: 2.2.13 for NFS on TQM850L
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 381681 Bytes = 372 kB = 0 MB
- Load Address: 00000000
- Entry Point: 0000000c
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
- Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:35:17 MEST 2000
- Boot arguments: root=/dev/nfs rw nfsroot=10.0.0.2:/LinuxPPC nfsaddrs=10.0.0.99:10.0.0.2
- time_init: decrementer frequency = 187500000/60
- Calibrating delay loop... 49.77 BogoMIPS
- Memory: 15208k available (700k kernel code, 444k data, 32k init) [c0000000,c1000000]
- ...
+ "Standalone Programs" are directly runnable in the environment
+ provided by U-Boot; it is expected that (if they behave
+ well) you can continue to work in U-Boot after return from
+ the Standalone Program.
+ "OS Kernel Images" are usually images of some Embedded OS which
+ will take over control completely. Usually these programs
+ will install their own set of exception handlers, device
+ drivers, set up the MMU, etc. - this means, that you cannot
+ expect to re-enter U-Boot except by resetting the CPU.
+ "RAMDisk Images" are more or less just data blocks, and their
+ parameters (address, size) are passed to an OS kernel that is
+ being started.
+ "Multi-File Images" contain several images, typically an OS
+ (Linux) kernel image and one or more data images like
+ RAMDisks. This construct is useful for instance when you want
+ to boot over the network using BOOTP etc., where the boot
+ server provides just a single image file, but you want to get
+ for instance an OS kernel and a RAMDisk image.
-If you want to boot a Linux kernel with initial ram disk, you pass
-the memory addresses of both the kernel and the initrd image (PPBCOOT
-format!) to the "bootm" command:
+ "Multi-File Images" start with a list of image sizes, each
+ image size (in bytes) specified by an "uint32_t" in network
+ byte order. This list is terminated by an "(uint32_t)0".
+ Immediately after the terminating 0 follow the images, one by
+ one, all aligned on "uint32_t" boundaries (size rounded up to
+ a multiple of 4 bytes).
- => imi 40100000 40200000
+ "Firmware Images" are binary images containing firmware (like
+ U-Boot or FPGA images) which usually will be programmed to
+ flash memory.
- ## Checking Image at 40100000 ...
- Image Name: 2.2.13 for initrd on TQM850L
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 335725 Bytes = 327 kB = 0 MB
- Load Address: 00000000
- Entry Point: 0000000c
- Verifying Checksum ... OK
+ "Script files" are command sequences that will be executed by
+ U-Boot's command interpreter; this feature is especially
+ useful when you configure U-Boot to use a real shell (hush)
+ as command interpreter.
- ## Checking Image at 40200000 ...
- Image Name: Simple Ramdisk Image
- Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
- Data Size: 566530 Bytes = 553 kB = 0 MB
- Load Address: 00000000
- Entry Point: 00000000
- Verifying Checksum ... OK
- => bootm 40100000 40200000
- ## Booting Linux kernel at 40100000 ...
- Image Name: 2.2.13 for initrd on TQM850L
- Image Type: PowerPC Linux Kernel Image (gzip compressed)
- Data Size: 335725 Bytes = 327 kB = 0 MB
- Load Address: 00000000
- Entry Point: 0000000c
- Verifying Checksum ... OK
- Uncompressing Kernel Image ... OK
- ## Loading RAMDisk Image at 40200000 ...
- Image Name: Simple Ramdisk Image
- Image Type: PowerPC Linux RAMDisk Image (gzip compressed)
- Data Size: 566530 Bytes = 553 kB = 0 MB
- Load Address: 00000000
- Entry Point: 00000000
- Verifying Checksum ... OK
- Loading Ramdisk ... OK
- Linux version 2.2.13 (wd@denx.local.net) (gcc version 2.95.2 19991024 (release)) #1 Wed Jul 19 02:32:08 MEST 2000
- Boot arguments: root=/dev/ram
- time_init: decrementer frequency = 187500000/60
- Calibrating delay loop... 49.77 BogoMIPS
- ...
- RAMDISK: Compressed image found at block 0
- VFS: Mounted root (ext2 filesystem).
+ Standalone HOWTO:
+ =================
- bash#
+ One of the features of U-Boot is that you can dynamically load and
+ run "standalone" applications, which can use some resources of
+ U-Boot like console I/O functions or interrupt services.
-More About U-Boot Image Types:
-------------------------------
+ Two simple examples are included with the sources:
-U-Boot supports the following image types:
+ "Hello World" Demo:
+ -------------------
- "Standalone Programs" are directly runnable in the environment
- provided by U-Boot; it is expected that (if they behave
- well) you can continue to work in U-Boot after return from
- the Standalone Program.
- "OS Kernel Images" are usually images of some Embedded OS which
- will take over control completely. Usually these programs
- will install their own set of exception handlers, device
- drivers, set up the MMU, etc. - this means, that you cannot
- expect to re-enter U-Boot except by resetting the CPU.
- "RAMDisk Images" are more or less just data blocks, and their
- parameters (address, size) are passed to an OS kernel that is
- being started.
- "Multi-File Images" contain several images, typically an OS
- (Linux) kernel image and one or more data images like
- RAMDisks. This construct is useful for instance when you want
- to boot over the network using BOOTP etc., where the boot
- server provides just a single image file, but you want to get
- for instance an OS kernel and a RAMDisk image.
+ 'examples/hello_world.c' contains a small "Hello World" Demo
+ application; it is automatically compiled when you build U-Boot.
+ It's configured to run at address 0x00040004, so you can play with it
+ like that:
- "Multi-File Images" start with a list of image sizes, each
- image size (in bytes) specified by an "uint32_t" in network
- byte order. This list is terminated by an "(uint32_t)0".
- Immediately after the terminating 0 follow the images, one by
- one, all aligned on "uint32_t" boundaries (size rounded up to
- a multiple of 4 bytes).
+ => loads
+ ## Ready for S-Record download ...
+ ~>examples/hello_world.srec
+ 1 2 3 4 5 6 7 8 9 10 11 ...
+ [file transfer complete]
+ [connected]
+ ## Start Addr = 0x00040004
- "Firmware Images" are binary images containing firmware (like
- U-Boot or FPGA images) which usually will be programmed to
- flash memory.
+ => go 40004 Hello World! This is a test.
+ ## Starting application at 0x00040004 ...
+ Hello World
+ argc = 7
+ argv[0] = "40004"
+ argv[1] = "Hello"
+ argv[2] = "World!"
+ argv[3] = "This"
+ argv[4] = "is"
+ argv[5] = "a"
+ argv[6] = "test."
+ argv[7] = "<NULL>"
+ Hit any key to exit ...
- "Script files" are command sequences that will be executed by
- U-Boot's command interpreter; this feature is especially
- useful when you configure U-Boot to use a real shell (hush)
- as command interpreter.
+ ## Application terminated, rc = 0x0
+ Another example, which demonstrates how to register a CPM interrupt
+ handler with the U-Boot code, can be found in 'examples/timer.c'.
+ Here, a CPM timer is set up to generate an interrupt every second.
+ The interrupt service routine is trivial, just printing a '.'
+ character, but this is just a demo program. The application can be
+ controlled by the following keys:
-Standalone HOWTO:
-=================
+ ? - print current values og the CPM Timer registers
+ b - enable interrupts and start timer
+ e - stop timer and disable interrupts
+ q - quit application
-One of the features of U-Boot is that you can dynamically load and
-run "standalone" applications, which can use some resources of
-U-Boot like console I/O functions or interrupt services.
+ => loads
+ ## Ready for S-Record download ...
+ ~>examples/timer.srec
+ 1 2 3 4 5 6 7 8 9 10 11 ...
+ [file transfer complete]
+ [connected]
+ ## Start Addr = 0x00040004
-Two simple examples are included with the sources:
+ => go 40004
+ ## Starting application at 0x00040004 ...
+ TIMERS=0xfff00980
+ Using timer 1
+ tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
-"Hello World" Demo:
--------------------
+ Hit 'b':
+ [q, b, e, ?] Set interval 1000000 us
+ Enabling timer
+ Hit '?':
+ [q, b, e, ?] ........
+ tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
+ Hit '?':
+ [q, b, e, ?] .
+ tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
+ Hit '?':
+ [q, b, e, ?] .
+ tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
+ Hit '?':
+ [q, b, e, ?] .
+ tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
+ Hit 'e':
+ [q, b, e, ?] ...Stopping timer
+ Hit 'q':
+ [q, b, e, ?] ## Application terminated, rc = 0x0
-'examples/hello_world.c' contains a small "Hello World" Demo
-application; it is automatically compiled when you build U-Boot.
-It's configured to run at address 0x00040004, so you can play with it
-like that:
- => loads
- ## Ready for S-Record download ...
- ~>examples/hello_world.srec
- 1 2 3 4 5 6 7 8 9 10 11 ...
- [file transfer complete]
- [connected]
- ## Start Addr = 0x00040004
+ Minicom warning:
+ ================
- => go 40004 Hello World! This is a test.
- ## Starting application at 0x00040004 ...
- Hello World
- argc = 7
- argv[0] = "40004"
- argv[1] = "Hello"
- argv[2] = "World!"
- argv[3] = "This"
- argv[4] = "is"
- argv[5] = "a"
- argv[6] = "test."
- argv[7] = "<NULL>"
- Hit any key to exit ...
+ Over time, many people have reported problems when trying to use the
+ "minicom" terminal emulation program for serial download. I (wd)
+ consider minicom to be broken, and recommend not to use it. Under
+ Unix, I recommend to use C-Kermit for general purpose use (and
+ especially for kermit binary protocol download ("loadb" command), and
+ use "cu" for S-Record download ("loads" command).
- ## Application terminated, rc = 0x0
+ Nevertheless, if you absolutely want to use it try adding this
+ configuration to your "File transfer protocols" section:
-Another example, which demonstrates how to register a CPM interrupt
-handler with the U-Boot code, can be found in 'examples/timer.c'.
-Here, a CPM timer is set up to generate an interrupt every second.
-The interrupt service routine is trivial, just printing a '.'
-character, but this is just a demo program. The application can be
-controlled by the following keys:
+ Name Program Name U/D FullScr IO-Red. Multi
+ X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
+ Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
- ? - print current values og the CPM Timer registers
- b - enable interrupts and start timer
- e - stop timer and disable interrupts
- q - quit application
- => loads
- ## Ready for S-Record download ...
- ~>examples/timer.srec
- 1 2 3 4 5 6 7 8 9 10 11 ...
- [file transfer complete]
- [connected]
- ## Start Addr = 0x00040004
+ NetBSD Notes:
+ =============
- => go 40004
- ## Starting application at 0x00040004 ...
- TIMERS=0xfff00980
- Using timer 1
- tgcr @ 0xfff00980, tmr @ 0xfff00990, trr @ 0xfff00994, tcr @ 0xfff00998, tcn @ 0xfff0099c, ter @ 0xfff009b0
+ Starting at version 0.9.2, U-Boot supports NetBSD both as host
+ (build U-Boot) and target system (boots NetBSD/mpc8xx).
-Hit 'b':
- [q, b, e, ?] Set interval 1000000 us
- Enabling timer
-Hit '?':
- [q, b, e, ?] ........
- tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0xef6, ter=0x0
-Hit '?':
- [q, b, e, ?] .
- tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x2ad4, ter=0x0
-Hit '?':
- [q, b, e, ?] .
- tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x1efc, ter=0x0
-Hit '?':
- [q, b, e, ?] .
- tgcr=0x1, tmr=0xff1c, trr=0x3d09, tcr=0x0, tcn=0x169d, ter=0x0
-Hit 'e':
- [q, b, e, ?] ...Stopping timer
-Hit 'q':
- [q, b, e, ?] ## Application terminated, rc = 0x0
+ Building requires a cross environment; it is known to work on
+ NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
+ need gmake since the Makefiles are not compatible with BSD make).
+ Note that the cross-powerpc package does not install include files;
+ attempting to build U-Boot will fail because <machine/ansi.h> is
+ missing. This file has to be installed and patched manually:
+ # cd /usr/pkg/cross/powerpc-netbsd/include
+ # mkdir powerpc
+ # ln -s powerpc machine
+ # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
+ # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
-Minicom warning:
-================
+ Native builds *don't* work due to incompatibilities between native
+ and U-Boot include files.
-Over time, many people have reported problems when trying to use the
-"minicom" terminal emulation program for serial download. I (wd)
-consider minicom to be broken, and recommend not to use it. Under
-Unix, I recommend to use C-Kermit for general purpose use (and
-especially for kermit binary protocol download ("loadb" command), and
-use "cu" for S-Record download ("loads" command).
+ Booting assumes that (the first part of) the image booted is a
+ stage-2 loader which in turn loads and then invokes the kernel
+ proper. Loader sources will eventually appear in the NetBSD source
+ tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
+ meantime, send mail to bruno@exet-ag.de and/or wd@denx.de for
+ details.
-Nevertheless, if you absolutely want to use it try adding this
-configuration to your "File transfer protocols" section:
- Name Program Name U/D FullScr IO-Red. Multi
- X kermit /usr/bin/kermit -i -l %l -s Y U Y N N
- Y kermit /usr/bin/kermit -i -l %l -r N D Y N N
+ Implementation Internals:
+ =========================
+ The following is not intended to be a complete description of every
+ implementation detail. However, it should help to understand the
+ inner workings of U-Boot and make it easier to port it to custom
+ hardware.
-NetBSD Notes:
-=============
-Starting at version 0.9.2, U-Boot supports NetBSD both as host
-(build U-Boot) and target system (boots NetBSD/mpc8xx).
+ Initial Stack, Global Data:
+ ---------------------------
-Building requires a cross environment; it is known to work on
-NetBSD/i386 with the cross-powerpc-netbsd-1.3 package (you will also
-need gmake since the Makefiles are not compatible with BSD make).
-Note that the cross-powerpc package does not install include files;
-attempting to build U-Boot will fail because <machine/ansi.h> is
-missing. This file has to be installed and patched manually:
+ The implementation of U-Boot is complicated by the fact that U-Boot
+ starts running out of ROM (flash memory), usually without access to
+ system RAM (because the memory controller is not initialized yet).
+ This means that we don't have writable Data or BSS segments, and BSS
+ is not initialized as zero. To be able to get a C environment working
+ at all, we have to allocate at least a minimal stack. Implementation
+ options for this are defined and restricted by the CPU used: Some CPU
+ models provide on-chip memory (like the IMMR area on MPC8xx and
+ MPC826x processors), on others (parts of) the data cache can be
+ locked as (mis-) used as memory, etc.
- # cd /usr/pkg/cross/powerpc-netbsd/include
- # mkdir powerpc
- # ln -s powerpc machine
- # cp /usr/src/sys/arch/powerpc/include/ansi.h powerpc/ansi.h
- # ${EDIT} powerpc/ansi.h ## must remove __va_list, _BSD_VA_LIST
+ Chris Hallinan posted a good summary of these issues to the
+ u-boot-users mailing list:
-Native builds *don't* work due to incompatibilities between native
-and U-Boot include files.
+ Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
+ From: "Chris Hallinan" <clh@net1plus.com>
+ Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
+ ...
-Booting assumes that (the first part of) the image booted is a
-stage-2 loader which in turn loads and then invokes the kernel
-proper. Loader sources will eventually appear in the NetBSD source
-tree (probably in sys/arc/mpc8xx/stand/u-boot_stage2/); in the
-meantime, send mail to bruno@exet-ag.de and/or wd@denx.de for
-details.
+ Correct me if I'm wrong, folks, but the way I understand it
+ is this: Using DCACHE as initial RAM for Stack, etc, does not
+ require any physical RAM backing up the cache. The cleverness
+ is that the cache is being used as a temporary supply of
+ necessary storage before the SDRAM controller is setup. It's
+ beyond the scope of this list to expain the details, but you
+ can see how this works by studying the cache architecture and
+ operation in the architecture and processor-specific manuals.
+ OCM is On Chip Memory, which I believe the 405GP has 4K. It
+ is another option for the system designer to use as an
+ initial stack/ram area prior to SDRAM being available. Either
+ option should work for you. Using CS 4 should be fine if your
+ board designers haven't used it for something that would
+ cause you grief during the initial boot! It is frequently not
+ used.
-Implementation Internals:
-=========================
+ CFG_INIT_RAM_ADDR should be somewhere that won't interfere
+ with your processor/board/system design. The default value
+ you will find in any recent u-boot distribution in
+ Walnut405.h should work for you. I'd set it to a value larger
+ than your SDRAM module. If you have a 64MB SDRAM module, set
+ it above 400_0000. Just make sure your board has no resources
+ that are supposed to respond to that address! That code in
+ start.S has been around a while and should work as is when
+ you get the config right.
-The following is not intended to be a complete description of every
-implementation detail. However, it should help to understand the
-inner workings of U-Boot and make it easier to port it to custom
-hardware.
+ -Chris Hallinan
+ DS4.COM, Inc.
+ It is essential to remember this, since it has some impact on the C
+ code for the initialization procedures:
-Initial Stack, Global Data:
----------------------------
+ * Initialized global data (data segment) is read-only. Do not attempt
+ to write it.
-The implementation of U-Boot is complicated by the fact that U-Boot
-starts running out of ROM (flash memory), usually without access to
-system RAM (because the memory controller is not initialized yet).
-This means that we don't have writable Data or BSS segments, and BSS
-is not initialized as zero. To be able to get a C environment working
-at all, we have to allocate at least a minimal stack. Implementation
-options for this are defined and restricted by the CPU used: Some CPU
-models provide on-chip memory (like the IMMR area on MPC8xx and
-MPC826x processors), on others (parts of) the data cache can be
-locked as (mis-) used as memory, etc.
+ * Do not use any unitialized global data (or implicitely initialized
+ as zero data - BSS segment) at all - this is undefined, initiali-
+ zation is performed later (when relocating to RAM).
- Chris Hallinan posted a good summary of these issues to the
- u-boot-users mailing list:
+ * Stack space is very limited. Avoid big data buffers or things like
+ that.
- Subject: RE: [U-Boot-Users] RE: More On Memory Bank x (nothingness)?
- From: "Chris Hallinan" <clh@net1plus.com>
- Date: Mon, 10 Feb 2003 16:43:46 -0500 (22:43 MET)
- ...
+ Having only the stack as writable memory limits means we cannot use
+ normal global data to share information beween the code. But it
+ turned out that the implementation of U-Boot can be greatly
+ simplified by making a global data structure (gd_t) available to all
+ functions. We could pass a pointer to this data as argument to _all_
+ functions, but this would bloat the code. Instead we use a feature of
+ the GCC compiler (Global Register Variables) to share the data: we
+ place a pointer (gd) to the global data into a register which we
+ reserve for this purpose.
- Correct me if I'm wrong, folks, but the way I understand it
- is this: Using DCACHE as initial RAM for Stack, etc, does not
- require any physical RAM backing up the cache. The cleverness
- is that the cache is being used as a temporary supply of
- necessary storage before the SDRAM controller is setup. It's
- beyond the scope of this list to expain the details, but you
- can see how this works by studying the cache architecture and
- operation in the architecture and processor-specific manuals.
+ When choosing a register for such a purpose we are restricted by the
+ relevant (E)ABI specifications for the current architecture, and by
+ GCC's implementation.
- OCM is On Chip Memory, which I believe the 405GP has 4K. It
- is another option for the system designer to use as an
- initial stack/ram area prior to SDRAM being available. Either
- option should work for you. Using CS 4 should be fine if your
- board designers haven't used it for something that would
- cause you grief during the initial boot! It is frequently not
- used.
+ For PowerPC, the following registers have specific use:
+ R1: stack pointer
+ R2: TOC pointer
+ R3-R4: parameter passing and return values
+ R5-R10: parameter passing
+ R13: small data area pointer
+ R30: GOT pointer
+ R31: frame pointer
- CFG_INIT_RAM_ADDR should be somewhere that won't interfere
- with your processor/board/system design. The default value
- you will find in any recent u-boot distribution in
- Walnut405.h should work for you. I'd set it to a value larger
- than your SDRAM module. If you have a 64MB SDRAM module, set
- it above 400_0000. Just make sure your board has no resources
- that are supposed to respond to that address! That code in
- start.S has been around a while and should work as is when
- you get the config right.
+ (U-Boot also uses R14 as internal GOT pointer.)
- -Chris Hallinan
- DS4.COM, Inc.
+ ==> U-Boot will use R29 to hold a pointer to the global data
-It is essential to remember this, since it has some impact on the C
-code for the initialization procedures:
+ Note: on PPC, we could use a static initializer (since the
+ address of the global data structure is known at compile time),
+ but it turned out that reserving a register results in somewhat
+ smaller code - although the code savings are not that big (on
+ average for all boards 752 bytes for the whole U-Boot image,
+ 624 text + 127 data).
-* Initialized global data (data segment) is read-only. Do not attempt
- to write it.
+ On ARM, the following registers are used:
-* Do not use any unitialized global data (or implicitely initialized
- as zero data - BSS segment) at all - this is undefined, initiali-
- zation is performed later (when relocating to RAM).
+ R0: function argument word/integer result
+ R1-R3: function argument word
+ R9: GOT pointer
+ R10: stack limit (used only if stack checking if enabled)
+ R11: argument (frame) pointer
+ R12: temporary workspace
+ R13: stack pointer
+ R14: link register
+ R15: program counter
-* Stack space is very limited. Avoid big data buffers or things like
- that.
+ ==> U-Boot will use R8 to hold a pointer to the global data
-Having only the stack as writable memory limits means we cannot use
-normal global data to share information beween the code. But it
-turned out that the implementation of U-Boot can be greatly
-simplified by making a global data structure (gd_t) available to all
-functions. We could pass a pointer to this data as argument to _all_
-functions, but this would bloat the code. Instead we use a feature of
-the GCC compiler (Global Register Variables) to share the data: we
-place a pointer (gd) to the global data into a register which we
-reserve for this purpose.
-When choosing a register for such a purpose we are restricted by the
-relevant (E)ABI specifications for the current architecture, and by
-GCC's implementation.
+ Memory Management:
+ ------------------
-For PowerPC, the following registers have specific use:
- R1: stack pointer
- R2: TOC pointer
- R3-R4: parameter passing and return values
- R5-R10: parameter passing
- R13: small data area pointer
- R30: GOT pointer
- R31: frame pointer
+ U-Boot runs in system state and uses physical addresses, i.e. the
+ MMU is not used either for address mapping nor for memory protection.
- (U-Boot also uses R14 as internal GOT pointer.)
+ The available memory is mapped to fixed addresses using the memory
+ controller. In this process, a contiguous block is formed for each
+ memory type (Flash, SDRAM, SRAM), even when it consists of several
+ physical memory banks.
- ==> U-Boot will use R29 to hold a pointer to the global data
+ U-Boot is installed in the first 128 kB of the first Flash bank (on
+ TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
+ booting and sizing and initializing DRAM, the code relocates itself
+ to the upper end of DRAM. Immediately below the U-Boot code some
+ memory is reserved for use by malloc() [see CFG_MALLOC_LEN
+ configuration setting]. Below that, a structure with global Board
+ Info data is placed, followed by the stack (growing downward).
- Note: on PPC, we could use a static initializer (since the
- address of the global data structure is known at compile time),
- but it turned out that reserving a register results in somewhat
- smaller code - although the code savings are not that big (on
- average for all boards 752 bytes for the whole U-Boot image,
- 624 text + 127 data).
+ Additionally, some exception handler code is copied to the low 8 kB
+ of DRAM (0x00000000 ... 0x00001FFF).
-On ARM, the following registers are used:
+ So a typical memory configuration with 16 MB of DRAM could look like
+ this:
- R0: function argument word/integer result
- R1-R3: function argument word
- R9: GOT pointer
- R10: stack limit (used only if stack checking if enabled)
- R11: argument (frame) pointer
- R12: temporary workspace
- R13: stack pointer
- R14: link register
- R15: program counter
+ 0x0000 0000 Exception Vector code
+ :
+ 0x0000 1FFF
+ 0x0000 2000 Free for Application Use
+ :
+ :
- ==> U-Boot will use R8 to hold a pointer to the global data
+ :
+ :
+ 0x00FB FF20 Monitor Stack (Growing downward)
+ 0x00FB FFAC Board Info Data and permanent copy of global data
+ 0x00FC 0000 Malloc Arena
+ :
+ 0x00FD FFFF
+ 0x00FE 0000 RAM Copy of Monitor Code
+ ... eventually: LCD or video framebuffer
+ ... eventually: pRAM (Protected RAM - unchanged by reset)
+ 0x00FF FFFF [End of RAM]
-Memory Management:
-------------------
+ System Initialization:
+ ----------------------
-U-Boot runs in system state and uses physical addresses, i.e. the
-MMU is not used either for address mapping nor for memory protection.
+ In the reset configuration, U-Boot starts at the reset entry point
+ (on most PowerPC systens at address 0x00000100). Because of the reset
+ configuration for CS0# this is a mirror of the onboard Flash memory.
+ To be able to re-map memory U-Boot then jumps to its link address.
+ To be able to implement the initialization code in C, a (small!)
+ initial stack is set up in the internal Dual Ported RAM (in case CPUs
+ which provide such a feature like MPC8xx or MPC8260), or in a locked
+ part of the data cache. After that, U-Boot initializes the CPU core,
+ the caches and the SIU.
-The available memory is mapped to fixed addresses using the memory
-controller. In this process, a contiguous block is formed for each
-memory type (Flash, SDRAM, SRAM), even when it consists of several
-physical memory banks.
+ Next, all (potentially) available memory banks are mapped using a
+ preliminary mapping. For example, we put them on 512 MB boundaries
+ (multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
+ on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
+ programmed for SDRAM access. Using the temporary configuration, a
+ simple memory test is run that determines the size of the SDRAM
+ banks.
-U-Boot is installed in the first 128 kB of the first Flash bank (on
-TQM8xxL modules this is the range 0x40000000 ... 0x4001FFFF). After
-booting and sizing and initializing DRAM, the code relocates itself
-to the upper end of DRAM. Immediately below the U-Boot code some
-memory is reserved for use by malloc() [see CFG_MALLOC_LEN
-configuration setting]. Below that, a structure with global Board
-Info data is placed, followed by the stack (growing downward).
+ When there is more than one SDRAM bank, and the banks are of
+ different size, the largest is mapped first. For equal size, the first
+ bank (CS2#) is mapped first. The first mapping is always for address
+ 0x00000000, with any additional banks following immediately to create
+ contiguous memory starting from 0.
-Additionally, some exception handler code is copied to the low 8 kB
-of DRAM (0x00000000 ... 0x00001FFF).
+ Then, the monitor installs itself at the upper end of the SDRAM area
+ and allocates memory for use by malloc() and for the global Board
+ Info data; also, the exception vector code is copied to the low RAM
+ pages, and the final stack is set up.
-So a typical memory configuration with 16 MB of DRAM could look like
-this:
+ Only after this relocation will you have a "normal" C environment;
+ until that you are restricted in several ways, mostly because you are
+ running from ROM, and because the code will have to be relocated to a
+ new address in RAM.
- 0x0000 0000 Exception Vector code
- :
- 0x0000 1FFF
- 0x0000 2000 Free for Application Use
- :
- :
- :
- :
- 0x00FB FF20 Monitor Stack (Growing downward)
- 0x00FB FFAC Board Info Data and permanent copy of global data
- 0x00FC 0000 Malloc Arena
- :
- 0x00FD FFFF
- 0x00FE 0000 RAM Copy of Monitor Code
- ... eventually: LCD or video framebuffer
- ... eventually: pRAM (Protected RAM - unchanged by reset)
- 0x00FF FFFF [End of RAM]
+ U-Boot Porting Guide:
+ ----------------------
+ [Based on messages by Jerry Van Baren in the U-Boot-Users mailing
+ list, October 2002]
-System Initialization:
-----------------------
-In the reset configuration, U-Boot starts at the reset entry point
-(on most PowerPC systens at address 0x00000100). Because of the reset
-configuration for CS0# this is a mirror of the onboard Flash memory.
-To be able to re-map memory U-Boot then jumps to its link address.
-To be able to implement the initialization code in C, a (small!)
-initial stack is set up in the internal Dual Ported RAM (in case CPUs
-which provide such a feature like MPC8xx or MPC8260), or in a locked
-part of the data cache. After that, U-Boot initializes the CPU core,
-the caches and the SIU.
+ int main (int argc, char *argv[])
+ {
+ sighandler_t no_more_time;
-Next, all (potentially) available memory banks are mapped using a
-preliminary mapping. For example, we put them on 512 MB boundaries
-(multiples of 0x20000000: SDRAM on 0x00000000 and 0x20000000, Flash
-on 0x40000000 and 0x60000000, SRAM on 0x80000000). Then UPM A is
-programmed for SDRAM access. Using the temporary configuration, a
-simple memory test is run that determines the size of the SDRAM
-banks.
+ signal (SIGALRM, no_more_time);
+ alarm (PROJECT_DEADLINE - toSec (3 * WEEK));
-When there is more than one SDRAM bank, and the banks are of
-different size, the largest is mapped first. For equal size, the first
-bank (CS2#) is mapped first. The first mapping is always for address
-0x00000000, with any additional banks following immediately to create
-contiguous memory starting from 0.
+ if (available_money > available_manpower) {
+ pay consultant to port U-Boot;
+ return 0;
+ }
-Then, the monitor installs itself at the upper end of the SDRAM area
-and allocates memory for use by malloc() and for the global Board
-Info data; also, the exception vector code is copied to the low RAM
-pages, and the final stack is set up.
+ Download latest U-Boot source;
-Only after this relocation will you have a "normal" C environment;
-until that you are restricted in several ways, mostly because you are
-running from ROM, and because the code will have to be relocated to a
-new address in RAM.
+ Subscribe to u-boot-users mailing list;
+ if (clueless) {
+ email ("Hi, I am new to U-Boot, how do I get started?");
+ }
-U-Boot Porting Guide:
-----------------------
+ while (learning) {
+ Read the README file in the top level directory;
+ Read http://www.denx.de/twiki/bin/view/DULG/Manual ;
+ Read the source, Luke;
+ }
-[Based on messages by Jerry Van Baren in the U-Boot-Users mailing
-list, October 2002]
+ if (available_money > toLocalCurrency ($2500)) {
+ Buy a BDI2000;
+ } else {
+ Add a lot of aggravation and time;
+ }
+ Create your own board support subdirectory;
-int main (int argc, char *argv[])
-{
- sighandler_t no_more_time;
+ Create your own board config file;
- signal (SIGALRM, no_more_time);
- alarm (PROJECT_DEADLINE - toSec (3 * WEEK));
+ while (!running) {
+ do {
+ Add / modify source code;
+ } until (compiles);
+ Debug;
+ if (clueless)
+ email ("Hi, I am having problems...");
+ }
+ Send patch file to Wolfgang;
- if (available_money > available_manpower) {
- pay consultant to port U-Boot;
return 0;
}
- Download latest U-Boot source;
-
- Subscribe to u-boot-users mailing list;
-
- if (clueless) {
- email ("Hi, I am new to U-Boot, how do I get started?");
+ void no_more_time (int sig)
+ {
+ hire_a_guru();
}
- while (learning) {
- Read the README file in the top level directory;
- Read http://www.denx.de/twiki/bin/view/DULG/Manual ;
- Read the source, Luke;
- }
- if (available_money > toLocalCurrency ($2500)) {
- Buy a BDI2000;
- } else {
- Add a lot of aggravation and time;
- }
+ Coding Standards:
+ -----------------
- Create your own board support subdirectory;
+ All contributions to U-Boot should conform to the Linux kernel
+ coding style; see the file "Documentation/CodingStyle" in your Linux
+ kernel source directory.
- Create your own board config file;
+ Please note that U-Boot is implemented in C (and to some small parts
+ in Assembler); no C++ is used, so please do not use C++ style
+ comments (//) in your code.
- while (!running) {
- do {
- Add / modify source code;
- } until (compiles);
- Debug;
- if (clueless)
- email ("Hi, I am having problems...");
- }
- Send patch file to Wolfgang;
+ Please also stick to the following formatting rules:
+ - remove any trailing white space
+ - use TAB characters for indentation, not spaces
+ - make sure NOT to use DOS '\r\n' line feeds
+ - do not add more than 2 empty lines to source files
+ - do not add trailing empty lines to source files
- return 0;
-}
-
-void no_more_time (int sig)
-{
- hire_a_guru();
-}
+ Submissions which do not conform to the standards may be returned
+ with a request to reformat the changes.
-Coding Standards:
------------------
+ Submitting Patches:
+ -------------------
-All contributions to U-Boot should conform to the Linux kernel
-coding style; see the file "Documentation/CodingStyle" in your Linux
-kernel source directory.
-
-Please note that U-Boot is implemented in C (and to some small parts
-in Assembler); no C++ is used, so please do not use C++ style
-comments (//) in your code.
-
-Please also stick to the following formatting rules:
-- remove any trailing white space
-- use TAB characters for indentation, not spaces
-- make sure NOT to use DOS '\r\n' line feeds
-- do not add more than 2 empty lines to source files
-- do not add trailing empty lines to source files
-
-Submissions which do not conform to the standards may be returned
-with a request to reformat the changes.
+ Since the number of patches for U-Boot is growing, we need to
+ establish some rules. Submissions which do not conform to these rules
+ may be rejected, even when they contain important and valuable stuff.
-Submitting Patches:
--------------------
+ When you send a patch, please include the following information with
+ it:
-Since the number of patches for U-Boot is growing, we need to
-establish some rules. Submissions which do not conform to these rules
-may be rejected, even when they contain important and valuable stuff.
+ * For bug fixes: a description of the bug and how your patch fixes
+ this bug. Please try to include a way of demonstrating that the
+ patch actually fixes something.
+
+ * For new features: a description of the feature and your
+ implementation.
+
+ * A CHANGELOG entry as plaintext (separate from the patch)
+
+ * For major contributions, your entry to the CREDITS file
+
+ * When you add support for a new board, don't forget to add this
+ board to the MAKEALL script, too.
+
+ * If your patch adds new configuration options, don't forget to
+ document these in the README file.
+
+ * The patch itself. If you are accessing the CVS repository use "cvs
+ update; cvs diff -puRN"; else, use "diff -purN OLD NEW". If your
+ version of diff does not support these options, then get the latest
+ version of GNU diff.
+
+ The current directory when running this command shall be the top
+ level directory of the U-Boot source tree, or it's parent directory
+ (i. e. please make sure that your patch includes sufficient
+ directory information for the affected files).
+
+ We accept patches as plain text, MIME attachments or as uuencoded
+ gzipped text.
+
+ * If one logical set of modifications affects or creates several
+ files, all these changes shall be submitted in a SINGLE patch file.
+
+ * Changesets that contain different, unrelated modifications shall be
+ submitted as SEPARATE patches, one patch per changeset.
-When you send a patch, please include the following information with
-it:
+ Notes:
-* For bug fixes: a description of the bug and how your patch fixes
- this bug. Please try to include a way of demonstrating that the
- patch actually fixes something.
+ * Before sending the patch, run the MAKEALL script on your patched
+ source tree and make sure that no errors or warnings are reported
+ for any of the boards.
-* For new features: a description of the feature and your
- implementation.
+ * Keep your modifications to the necessary minimum: A patch
+ containing several unrelated changes or arbitrary reformats will be
+ returned with a request to re-formatting / split it.
-* A CHANGELOG entry as plaintext (separate from the patch)
-
-* For major contributions, your entry to the CREDITS file
-
-* When you add support for a new board, don't forget to add this
- board to the MAKEALL script, too.
-
-* If your patch adds new configuration options, don't forget to
- document these in the README file.
-
-* The patch itself. If you are accessing the CVS repository use "cvs
- update; cvs diff -puRN"; else, use "diff -purN OLD NEW". If your
- version of diff does not support these options, then get the latest
- version of GNU diff.
-
- The current directory when running this command shall be the top
- level directory of the U-Boot source tree, or it's parent directory
- (i. e. please make sure that your patch includes sufficient
- directory information for the affected files).
-
- We accept patches as plain text, MIME attachments or as uuencoded
- gzipped text.
-
-* If one logical set of modifications affects or creates several
- files, all these changes shall be submitted in a SINGLE patch file.
-
-* Changesets that contain different, unrelated modifications shall be
- submitted as SEPARATE patches, one patch per changeset.
-
-
-Notes:
-
-* Before sending the patch, run the MAKEALL script on your patched
- source tree and make sure that no errors or warnings are reported
- for any of the boards.
-
-* Keep your modifications to the necessary minimum: A patch
- containing several unrelated changes or arbitrary reformats will be
- returned with a request to re-formatting / split it.
-
-* If you modify existing code, make sure that your new code does not
- add to the memory footprint of the code ;-) Small is beautiful!
- When adding new features, these should compile conditionally only
- (using #ifdef), and the resulting code with the new feature
- disabled must not need more memory than the old code without your
- modification.
+ * If you modify existing code, make sure that your new code does not
+ add to the memory footprint of the code ;-) Small is beautiful!
+ When adding new features, these should compile conditionally only
+ (using #ifdef), and the resulting code with the new feature
+ disabled must not need more memory than the old code without your
+ modification.
diff --git a/board/jse/Makefile b/board/jse/Makefile
new file mode 100644
index 0000000..0da27b6
--- /dev/null
+++ b/board/jse/Makefile
@@ -0,0 +1,44 @@
+#
+# Copyright 2004 Picture Elements, Inc.
+# Stephen Williams <steve@icarus.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+LIB = lib$(BOARD).a
+
+OBJS = $(BOARD).o sdram.o flash.o host_bridge.o
+SOBJS = init.o
+
+$(LIB): $(OBJS) $(SOBJS)
+ $(AR) crv $@ $(OBJS)
+
+clean:
+ rm -f $(SOBJS) $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak .depend
+
+#########################################################################
+
+.depend: Makefile $(SOBJS:.o=.S) $(OBJS:.o=.c)
+ $(CC) -M $(CFLAGS) $(SOBJS:.o=.S) $(OBJS:.o=.c) > $@
+
+sinclude .depend
+
+#########################################################################
diff --git a/board/jse/README.txt b/board/jse/README.txt
new file mode 100644
index 0000000..84497db
--- /dev/null
+++ b/board/jse/README.txt
@@ -0,0 +1,48 @@
+JSE Configuration Details
+
+Memory Bank 0 -- Flash chip
+---------------------------
+
+0xfff00000 - 0xffffffff
+
+The flash chip is really only 512Kbytes, but the high address bit of
+the 1Meg region is ignored, so the flash is replicated through the
+region. Thus, this is consistent with a flash base address 0xfff80000.
+
+The placement at the end is to be consistent with reset behavior,
+where the processor itself initially uses this bus to load the branch
+vector and start running.
+
+On-Chip Memory
+--------------
+
+0xf4000000 - 0xf4000fff
+
+The 405GPr includes a 4K on-chip memory that can be placed however
+software chooses. I choose to place the memory at this address, to
+keep it out of the cachable areas.
+
+
+Memory Bank 1 -- SystemACE Controller
+-------------------------------------
+
+0xf0000000 - 0xf00fffff
+
+The SystemACE chip is along on peripheral bank CS#1. We don't need
+much space, but 1Meg is the smallest we can configure the chip to
+allocate. We need it far away from the flash region, because this
+region is set to be non-cached.
+
+
+Internal Peripherals
+--------------------
+
+0xef600300 - 0xef6008ff
+
+These are scattered various peripherals internal to the PPC405GPr
+chip.
+
+SDRAM
+-----
+
+0x00000000 - 0x07ffffff (128 MBytes)
diff --git a/board/jse/config.mk b/board/jse/config.mk
new file mode 100644
index 0000000..03ec085
--- /dev/null
+++ b/board/jse/config.mk
@@ -0,0 +1,24 @@
+#
+# (C) Copyright 2003 Picture Elements, Inc.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+#
+# Picture Elements, Inc. JSE boards
+#
+
+TEXT_BASE = 0xFFF80000
diff --git a/board/jse/flash.c b/board/jse/flash.c
new file mode 100644
index 0000000..a86ac1a
--- /dev/null
+++ b/board/jse/flash.c
@@ -0,0 +1,671 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * Modified 4/5/2001
+ * Wait for completion of each sector erase command issued
+ * 4/5/2001
+ * Chris Hallinan - DS4.COM, Inc. - clh@net1plus.com
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+#if CFG_MAX_FLASH_BANKS != 1
+#error "CFG_MAX_FLASH_BANKS must be 1"
+#endif
+flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */
+
+/*-----------------------------------------------------------------------
+ * Functions
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info);
+static int write_word (flash_info_t * info, ulong dest, ulong data);
+static void flash_get_offsets (ulong base, flash_info_t * info);
+
+#define ADDR0 0x5555
+#define ADDR1 0x2aaa
+#define FLASH_WORD_SIZE unsigned char
+
+/*-----------------------------------------------------------------------
+ */
+
+unsigned long flash_init (void)
+{
+ unsigned long size_b0;
+ unsigned long base_b0;
+
+ /* Init: no FLASHes known */
+ flash_info[0].flash_id = FLASH_UNKNOWN;
+
+ /* Static FLASH Bank configuration here - FIXME XXX */
+
+ size_b0 =
+ flash_get_size ((vu_long *) FLASH_BASE0_PRELIM,
+ &flash_info[0]);
+
+ if (flash_info[0].flash_id == FLASH_UNKNOWN) {
+ printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", size_b0, size_b0 << 20);
+ }
+
+ /* Only one bank */
+ /* Setup offsets */
+ flash_get_offsets (FLASH_BASE0_PRELIM, &flash_info[0]);
+
+ /* Monitor protection ON by default */
+ (void) flash_protect (FLAG_PROTECT_SET,
+ FLASH_BASE0_PRELIM,
+ FLASH_BASE0_PRELIM + monitor_flash_len - 1,
+ &flash_info[0]);
+ flash_info[0].size = size_b0;
+
+ return size_b0;
+}
+
+
+/*-----------------------------------------------------------------------
+ */
+static void flash_get_offsets (ulong base, flash_info_t * info)
+{
+ int i;
+
+ /* set up sector start address table */
+ if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+ (info->flash_id == FLASH_AM040)) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000);
+ } else {
+ if (info->flash_id & FLASH_BTYPE) {
+ /* set sector offsets for bottom boot block type */
+ info->start[0] = base + 0x00000000;
+ info->start[1] = base + 0x00004000;
+ info->start[2] = base + 0x00006000;
+ info->start[3] = base + 0x00008000;
+ for (i = 4; i < info->sector_count; i++) {
+ info->start[i] =
+ base + (i * 0x00010000) - 0x00030000;
+ }
+ } else {
+ /* set sector offsets for top boot block type */
+ i = info->sector_count - 1;
+ info->start[i--] = base + info->size - 0x00004000;
+ info->start[i--] = base + info->size - 0x00006000;
+ info->start[i--] = base + info->size - 0x00008000;
+ for (; i >= 0; i--) {
+ info->start[i] = base + i * 0x00010000;
+ }
+ }
+ }
+}
+
+/*-----------------------------------------------------------------------
+ */
+void flash_print_info (flash_info_t * info)
+{
+ int i;
+ int k;
+ int size;
+ int erased;
+ volatile unsigned long *flash;
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("missing or unknown FLASH type\n");
+ return;
+ }
+
+ switch (info->flash_id & FLASH_VENDMASK) {
+ case FLASH_MAN_AMD:
+ printf ("AMD ");
+ break;
+ case FLASH_MAN_FUJ:
+ printf ("FUJITSU ");
+ break;
+ case FLASH_MAN_SST:
+ printf ("SST ");
+ break;
+ default:
+ printf ("Unknown Vendor ");
+ break;
+ }
+
+ switch (info->flash_id & FLASH_TYPEMASK) {
+ case FLASH_AM040:
+ printf ("AM29F040 (512 Kbit, uniform sector size)\n");
+ break;
+ case FLASH_AM400B:
+ printf ("AM29LV400B (4 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM400T:
+ printf ("AM29LV400T (4 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AM800B:
+ printf ("AM29LV800B (8 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM800T:
+ printf ("AM29LV800T (8 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AM160B:
+ printf ("AM29LV160B (16 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM160T:
+ printf ("AM29LV160T (16 Mbit, top boot sector)\n");
+ break;
+ case FLASH_AM320B:
+ printf ("AM29LV320B (32 Mbit, bottom boot sect)\n");
+ break;
+ case FLASH_AM320T:
+ printf ("AM29LV320T (32 Mbit, top boot sector)\n");
+ break;
+ case FLASH_SST800A:
+ printf ("SST39LF/VF800 (8 Mbit, uniform sector size)\n");
+ break;
+ case FLASH_SST160A:
+ printf ("SST39LF/VF160 (16 Mbit, uniform sector size)\n");
+ break;
+ default:
+ printf ("Unknown Chip Type\n");
+ break;
+ }
+
+ printf (" Size: %ld KB in %d Sectors\n",
+ info->size >> 10, info->sector_count);
+
+ printf (" Sector Start Addresses:");
+ for (i = 0; i < info->sector_count; ++i) {
+ /*
+ * Check if whole sector is erased
+ */
+ if (i != (info->sector_count - 1))
+ size = info->start[i + 1] - info->start[i];
+ else
+ size = info->start[0] + info->size - info->start[i];
+ erased = 1;
+ flash = (volatile unsigned long *) info->start[i];
+ size = size >> 2; /* divide by 4 for longword access */
+ for (k = 0; k < size; k++) {
+ if (*flash++ != 0xffffffff) {
+ erased = 0;
+ break;
+ }
+ }
+
+ if ((i % 5) == 0)
+ printf ("\n ");
+#if 0 /* test-only */
+ printf (" %08lX%s",
+ info->start[i], info->protect[i] ? " (RO)" : " "
+#else
+ printf (" %08lX%s%s",
+ info->start[i],
+ erased ? " E" : " ", info->protect[i] ? "RO " : " "
+#endif
+ );
+ }
+ printf ("\n");
+ return;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+
+/*-----------------------------------------------------------------------
+ */
+
+/*
+ * The following code cannot be run from FLASH!
+ */
+static ulong flash_get_size (vu_long * addr, flash_info_t * info)
+{
+ short i;
+ FLASH_WORD_SIZE value;
+ ulong base = (ulong) addr;
+ volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *) addr;
+
+ /* Write auto select command: read Manufacturer ID */
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00900090;
+
+#ifdef CONFIG_ADCIOP
+ value = addr2[2];
+#else
+ value = addr2[0];
+#endif
+
+ switch (value) {
+ case (FLASH_WORD_SIZE) AMD_MANUFACT:
+ info->flash_id = FLASH_MAN_AMD;
+ break;
+ case (FLASH_WORD_SIZE) FUJ_MANUFACT:
+ info->flash_id = FLASH_MAN_FUJ;
+ break;
+ case (FLASH_WORD_SIZE) SST_MANUFACT:
+ info->flash_id = FLASH_MAN_SST;
+ break;
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ info->sector_count = 0;
+ info->size = 0;
+ return (0); /* no or unknown flash */
+ }
+
+#ifdef CONFIG_ADCIOP
+ value = addr2[0]; /* device ID */
+ /* printf("\ndev_code=%x\n", value); */
+#else
+ value = addr2[1]; /* device ID */
+#endif
+
+ switch (value) {
+ case (FLASH_WORD_SIZE) AMD_ID_F040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+ case (FLASH_WORD_SIZE) AMD_ID_LV040B:
+ info->flash_id += FLASH_AM040;
+ info->sector_count = 8;
+ info->size = 0x0080000; /* => 512 ko */
+ break;
+ case (FLASH_WORD_SIZE) AMD_ID_LV400T:
+ info->flash_id += FLASH_AM400T;
+ info->sector_count = 11;
+ info->size = 0x00080000;
+ break; /* => 0.5 MB */
+
+ case (FLASH_WORD_SIZE) AMD_ID_LV400B:
+ info->flash_id += FLASH_AM400B;
+ info->sector_count = 11;
+ info->size = 0x00080000;
+ break; /* => 0.5 MB */
+
+ case (FLASH_WORD_SIZE) AMD_ID_LV800T:
+ info->flash_id += FLASH_AM800T;
+ info->sector_count = 19;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (FLASH_WORD_SIZE) AMD_ID_LV800B:
+ info->flash_id += FLASH_AM800B;
+ info->sector_count = 19;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (FLASH_WORD_SIZE) AMD_ID_LV160T:
+ info->flash_id += FLASH_AM160T;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+
+ case (FLASH_WORD_SIZE) AMD_ID_LV160B:
+ info->flash_id += FLASH_AM160B;
+ info->sector_count = 35;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+#if 0 /* enable when device IDs are available */
+ case (FLASH_WORD_SIZE) AMD_ID_LV320T:
+ info->flash_id += FLASH_AM320T;
+ info->sector_count = 67;
+ info->size = 0x00400000;
+ break; /* => 4 MB */
+
+ case (FLASH_WORD_SIZE) AMD_ID_LV320B:
+ info->flash_id += FLASH_AM320B;
+ info->sector_count = 67;
+ info->size = 0x00400000;
+ break; /* => 4 MB */
+#endif
+ case (FLASH_WORD_SIZE) SST_ID_xF800A:
+ info->flash_id += FLASH_SST800A;
+ info->sector_count = 16;
+ info->size = 0x00100000;
+ break; /* => 1 MB */
+
+ case (FLASH_WORD_SIZE) SST_ID_xF160A:
+ info->flash_id += FLASH_SST160A;
+ info->sector_count = 32;
+ info->size = 0x00200000;
+ break; /* => 2 MB */
+
+ default:
+ info->flash_id = FLASH_UNKNOWN;
+ return (0); /* => no or unknown flash */
+
+ }
+
+ /* set up sector start address table */
+ if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) ||
+ (info->flash_id == FLASH_AM040)) {
+ for (i = 0; i < info->sector_count; i++)
+ info->start[i] = base + (i * 0x00010000);
+ } else {
+ if (info->flash_id & FLASH_BTYPE) {
+ /* set sector offsets for bottom boot block type */
+ info->start[0] = base + 0x00000000;
+ info->start[1] = base + 0x00004000;
+ info->start[2] = base + 0x00006000;
+ info->start[3] = base + 0x00008000;
+ for (i = 4; i < info->sector_count; i++) {
+ info->start[i] =
+ base + (i * 0x00010000) - 0x00030000;
+ }
+ } else {
+ /* set sector offsets for top boot block type */
+ i = info->sector_count - 1;
+ info->start[i--] = base + info->size - 0x00004000;
+ info->start[i--] = base + info->size - 0x00006000;
+ info->start[i--] = base + info->size - 0x00008000;
+ for (; i >= 0; i--) {
+ info->start[i] = base + i * 0x00010000;
+ }
+ }
+ }
+
+ /* check for protected sectors */
+ for (i = 0; i < info->sector_count; i++) {
+ /* read sector protection at sector address, (A7 .. A0) = 0x02 */
+ /* D0 = 1 if protected */
+#ifdef CONFIG_ADCIOP
+ addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
+ info->protect[i] = addr2[4] & 1;
+#else
+ addr2 = (volatile FLASH_WORD_SIZE *) (info->start[i]);
+ if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST)
+ info->protect[i] = 0;
+ else
+ info->protect[i] = addr2[2] & 1;
+#endif
+ }
+
+ /*
+ * Prevent writes to uninitialized FLASH.
+ */
+ if (info->flash_id != FLASH_UNKNOWN) {
+#if 0 /* test-only */
+#ifdef CONFIG_ADCIOP
+ addr2 = (volatile unsigned char *) info->start[0];
+ addr2[ADDR0] = 0xAA;
+ addr2[ADDR1] = 0x55;
+ addr2[ADDR0] = 0xF0; /* reset bank */
+#else
+ addr2 = (FLASH_WORD_SIZE *) info->start[0];
+ *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+#endif
+#else /* test-only */
+ addr2 = (FLASH_WORD_SIZE *) info->start[0];
+ *addr2 = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+#endif /* test-only */
+ }
+
+ return (info->size);
+}
+
+int wait_for_DQ7 (flash_info_t * info, int sect)
+{
+ ulong start, now, last;
+ volatile FLASH_WORD_SIZE *addr =
+ (FLASH_WORD_SIZE *) (info->start[sect]);
+
+ start = get_timer (0);
+ last = start;
+ while ((addr[0] & (FLASH_WORD_SIZE) 0x00800080) !=
+ (FLASH_WORD_SIZE) 0x00800080) {
+ if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) {
+ printf ("Timeout\n");
+ return -1;
+ }
+ /* show that we're waiting */
+ if ((now - last) > 1000) { /* every second */
+ putc ('.');
+ last = now;
+ }
+ }
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ */
+
+int flash_erase (flash_info_t * info, int s_first, int s_last)
+{
+ volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *) (info->start[0]);
+ volatile FLASH_WORD_SIZE *addr2;
+ int flag, prot, sect, l_sect;
+ int i;
+
+ if ((s_first < 0) || (s_first > s_last)) {
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("- missing\n");
+ } else {
+ printf ("- no sectors to erase\n");
+ }
+ return 1;
+ }
+
+ if (info->flash_id == FLASH_UNKNOWN) {
+ printf ("Can't erase unknown flash type - aborted\n");
+ return 1;
+ }
+
+ prot = 0;
+ for (sect = s_first; sect <= s_last; ++sect) {
+ if (info->protect[sect]) {
+ prot++;
+ }
+ }
+
+ if (prot) {
+ printf ("- Warning: %d protected sectors will not be erased!\n", prot);
+ } else {
+ printf ("\n");
+ }
+
+ l_sect = -1;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+
+ /* Start erase on unprotected sectors */
+ for (sect = s_first; sect <= s_last; sect++) {
+ if (info->protect[sect] == 0) { /* not protected */
+ addr2 = (FLASH_WORD_SIZE *) (info->start[sect]);
+ printf ("Erasing sector %p\n", addr2); /* CLH */
+
+ if ((info->flash_id & FLASH_VENDMASK) ==
+ FLASH_MAN_SST) {
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr2[0] = (FLASH_WORD_SIZE) 0x00500050; /* block erase */
+ for (i = 0; i < 50; i++)
+ udelay (1000); /* wait 1 ms */
+ } else {
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00800080;
+ addr[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr2[0] = (FLASH_WORD_SIZE) 0x00300030; /* sector erase */
+ }
+ l_sect = sect;
+ /*
+ * Wait for each sector to complete, it's more
+ * reliable. According to AMD Spec, you must
+ * issue all erase commands within a specified
+ * timeout. This has been seen to fail, especially
+ * if printf()s are included (for debug)!!
+ */
+ wait_for_DQ7 (info, sect);
+ }
+ }
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts ();
+
+ /* wait at least 80us - let's wait 1 ms */
+ udelay (1000);
+
+#if 0
+ /*
+ * We wait for the last triggered sector
+ */
+ if (l_sect < 0)
+ goto DONE;
+ wait_for_DQ7 (info, l_sect);
+
+ DONE:
+#endif
+ /* reset to read mode */
+ addr = (FLASH_WORD_SIZE *) info->start[0];
+ addr[0] = (FLASH_WORD_SIZE) 0x00F000F0; /* reset bank */
+
+ printf (" done\n");
+ return 0;
+}
+
+/*-----------------------------------------------------------------------
+ * Copy memory to flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+
+int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
+{
+ ulong cp, wp, data;
+ int i, l, rc;
+
+ wp = (addr & ~3); /* get lower word aligned address */
+
+ /*
+ * handle unaligned start bytes
+ */
+ if ((l = addr - wp) != 0) {
+ data = 0;
+ for (i = 0, cp = wp; i < l; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+ for (; i < 4 && cnt > 0; ++i) {
+ data = (data << 8) | *src++;
+ --cnt;
+ ++cp;
+ }
+ for (; cnt == 0 && i < 4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 4;
+ }
+
+ /*
+ * handle word aligned part
+ */
+ while (cnt >= 4) {
+ data = 0;
+ for (i = 0; i < 4; ++i) {
+ data = (data << 8) | *src++;
+ }
+ if ((rc = write_word (info, wp, data)) != 0) {
+ return (rc);
+ }
+ wp += 4;
+ cnt -= 4;
+ }
+
+ if (cnt == 0) {
+ return (0);
+ }
+
+ /*
+ * handle unaligned tail bytes
+ */
+ data = 0;
+ for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) {
+ data = (data << 8) | *src++;
+ --cnt;
+ }
+ for (; i < 4; ++i, ++cp) {
+ data = (data << 8) | (*(uchar *) cp);
+ }
+
+ return (write_word (info, wp, data));
+}
+
+/*-----------------------------------------------------------------------
+ * Write a word to Flash, returns:
+ * 0 - OK
+ * 1 - write timeout
+ * 2 - Flash not erased
+ */
+static int write_word (flash_info_t * info, ulong dest, ulong data)
+{
+ volatile FLASH_WORD_SIZE *addr2 =
+ (FLASH_WORD_SIZE *) (info->start[0]);
+ volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *) dest;
+ volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *) & data;
+ ulong start;
+ int i;
+
+ /* Check if Flash is (sufficiently) erased */
+ if ((*((volatile FLASH_WORD_SIZE *) dest) &
+ (FLASH_WORD_SIZE) data) != (FLASH_WORD_SIZE) data) {
+ return (2);
+ }
+
+ for (i = 0; i < 4 / sizeof (FLASH_WORD_SIZE); i++) {
+ int flag;
+
+ /* Disable interrupts which might cause a timeout here */
+ flag = disable_interrupts ();
+
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00AA00AA;
+ addr2[ADDR1] = (FLASH_WORD_SIZE) 0x00550055;
+ addr2[ADDR0] = (FLASH_WORD_SIZE) 0x00A000A0;
+
+ dest2[i] = data2[i];
+
+ /* re-enable interrupts if necessary */
+ if (flag)
+ enable_interrupts ();
+
+ /* data polling for D7 */
+ start = get_timer (0);
+ while ((dest2[i] & (FLASH_WORD_SIZE) 0x00800080) !=
+ (data2[i] & (FLASH_WORD_SIZE) 0x00800080)) {
+
+ if (get_timer (start) > CFG_FLASH_WRITE_TOUT) {
+ return (1);
+ }
+ }
+ }
+
+ return (0);
+}
diff --git a/board/jse/host_bridge.c b/board/jse/host_bridge.c
new file mode 100644
index 0000000..d687445
--- /dev/null
+++ b/board/jse/host_bridge.c
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 2004 Picture Elements, Inc.
+ * Stephen Williams (steve@icarus.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+#ident "$Id:$"
+
+# include <common.h>
+# include <pci.h>
+# include "jse_priv.h"
+
+/*
+ * The JSE board has an Intel 21555 non-transparent bridge for
+ * communication with the host. We need to render it harmless on the
+ * JSE side, but leave it alone on the host (primary) side. Normally,
+ * this will all be done before the host BIOS can gain access to the
+ * board, due to the Primary Access Lockout bit.
+ *
+ * The host_bridge_init function is called as a late initialization
+ * function, after most of the board is set up, including a PCI scan.
+ */
+
+void host_bridge_init (void)
+{
+ /* The bridge chip is at a fixed location. */
+ pci_dev_t dev = PCI_BDF (0, 10, 0);
+
+ int rc;
+ u32 val32;
+
+ rc = pci_read_config_dword (dev, 0, &val32);
+
+ /* Set subsystem ID --
+ The primary side sees this value at 0x2c. We set it here so
+ that the host can tell what sort of device this is:
+ We are a Picture Elements [0x12c5] JSE [0x008a]. */
+ pci_write_config_dword (dev, 0x6c, 0x008a12c5);
+
+ /* Downstream (Primary-to-Secondary) BARs are set up mostly
+ off. We need only the Memory-0 Bar so that the host can get
+ at the CSR region to set up tables and the lot. */
+
+ /* Downstream Memory 0 setup (4K for CSR) */
+ pci_write_config_dword (dev, 0xac, 0xfffff000);
+ /* Downstream Memory 1 setup (off) */
+ pci_write_config_dword (dev, 0xb0, 0x00000000);
+ /* Downstream Memory 2 setup (off) */
+ pci_write_config_dword (dev, 0xb4, 0x00000000);
+ /* Downstream Memory 3 setup (off) */
+ pci_write_config_dword (dev, 0xb8, 0x00000000);
+
+ /* Upstream (Secondary-to-Primary) BARs are used to get at
+ host memory from the JSE card. Create two regions: a small
+ one to manage individual word reads/writes, and a larger
+ one for doing bulk frame moves. */
+
+ /* Upstream Memory 0 Setup -- (BAR2) 4K non-prefetchable */
+ pci_write_config_dword (dev, 0xc4, 0xfffff000);
+ /* Upstream Memory 1 setup -- (BAR3) 4K non-prefetchable */
+ pci_write_config_dword (dev, 0xc8, 0xfffff000);
+
+ /* Upstream Memory 2 (BAR4) uses page translation, and is set
+ up in CCR1. Configure for 4K pages. */
+
+ /* Set CCR1,0 reigsters. This clears the Primary PCI Lockout
+ bit as well, so we are done configuring after this
+ point. Therefore, this must be the last step.
+
+ CC1[15:12]= 0 (disable I2O message unit)
+ CC1[11:8] = 0x5 (4K page size)
+ CC0[11] = 1 (Secondary Clock Disable: disable clock)
+ CC0[10] = 0 (Primary Access Lockout: allow primary access)
+ */
+ pci_write_config_dword (dev, 0xcc, 0x05000800);
+}
diff --git a/board/jse/init.S b/board/jse/init.S
new file mode 100644
index 0000000..231cd1c
--- /dev/null
+++ b/board/jse/init.S
@@ -0,0 +1,105 @@
+/*------------------------------------------------------------------------+ */
+/* */
+/* This source code has been made available to you by IBM on an AS-IS */
+/* basis. Anyone receiving this source is licensed under IBM */
+/* copyrights to use it in any way he or she deems fit, including */
+/* copying it, modifying it, compiling it, and redistributing it either */
+/* with or without modifications. No license under IBM patents or */
+/* patent applications is to be implied by the copyright license. */
+/* */
+/* Any user of this software should understand that IBM cannot provide */
+/* technical support for this software and will not be responsible for */
+/* any consequences resulting from the use of this software. */
+/* */
+/* Any person who transfers this source code or any derivative work */
+/* must include the IBM copyright notice, this paragraph, and the */
+/* preceding two paragraphs in the transferred software. */
+/* */
+/* COPYRIGHT I B M CORPORATION 1995 */
+/* LICENSED MATERIAL - PROGRAM PROPERTY OF I B M */
+/*------------------------------------------------------------------------- */
+
+/*------------------------------------------------------------------------- */
+/* Function: ext_bus_cntlr_init */
+/* Description: Initializes the External Bus Controller for the external */
+/* peripherals. IMPORTANT: For pass1 this code must run from */
+/* cache since you can not reliably change a peripheral banks */
+/* timing register (pbxap) while running code from that bank. */
+/* For ex., since we are running from ROM on bank 0, we can NOT */
+/* execute the code that modifies bank 0 timings from ROM, so */
+/* we run it from cache. */
+/* */
+/* */
+/* The layout for the PEI JSE board: */
+/* Bank 0 - Flash and SRAM */
+/* Bank 1 - SystemACE */
+/* Bank 2 - not used */
+/* Bank 3 - not used */
+/* Bank 4 - not used */
+/* Bank 5 - not used */
+/* Bank 6 - not used */
+/* Bank 7 - not used */
+/*------------------------------------------------------------------------- */
+#include <ppc4xx.h>
+
+#include <ppc_asm.tmpl>
+#include <ppc_defs.h>
+
+#include <asm/cache.h>
+#include <asm/mmu.h>
+
+#define cpc0_cr0 0xB1
+
+ .globl ext_bus_cntlr_init
+ext_bus_cntlr_init:
+ mflr r4 /* save link register */
+ bl ..getAddr
+..getAddr:
+ mflr r3 /* get address of ..getAddr */
+ mtlr r4 /* restore link register */
+ addi r4,0,14 /* set ctr to 10; used to prefetch */
+ mtctr r4 /* 10 cache lines to fit this function */
+ /* in cache (gives us 8x10=80 instrctns) */
+..ebcloop:
+ icbt r0,r3 /* prefetch cache line for addr in r3 */
+ addi r3,r3,32 /* move to next cache line */
+ bdnz ..ebcloop /* continue for 10 cache lines */
+
+ /*----------------------------------------------------------------- */
+ /* Delay to ensure all accesses to ROM are complete before changing */
+ /* bank 0 timings. 200usec should be enough. */
+ /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */
+ /*----------------------------------------------------------------- */
+ addis r3,0,0x0
+ ori r3,r3,0xA000 /* ensure 200usec have passed since reset */
+ mtctr r3
+..spinlp:
+ bdnz ..spinlp /* spin loop */
+
+ /*----------------------------------------------------------------- */
+ /* Memory Bank 0 (Flash) initialization */
+ /*----------------------------------------------------------------- */
+
+ addi r4,0,pb0ap
+ mtdcr ebccfga,r4
+ addis r4,0,0x9B01
+ ori r4,r4,0x5480
+ mtdcr ebccfgd,r4
+
+ addi r4,0,pb0cr
+ mtdcr ebccfga,r4
+ addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */
+ ori r4,r4,0x8000 /* BW=0x0( 8 bits) */
+ mtdcr ebccfgd,r4
+
+ blr
+
+
+/*----------------------------------------------------------------------- */
+/* Function: sdram_init */
+/* Description: This function is called by cpu/ppc4xx/start.S code */
+/* to get the SDRAM initialized. */
+/*----------------------------------------------------------------------- */
+ .globl sdram_init
+sdram_init:
+ blr
diff --git a/board/jse/jse.c b/board/jse/jse.c
new file mode 100644
index 0000000..9290814
--- /dev/null
+++ b/board/jse/jse.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright (c) 2004 Picture Elements, Inc.
+ * Stephen Williams (steve@icarus.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+# include <common.h>
+# include <ppc4xx.h>
+# include <asm/processor.h>
+# include <asm/io.h>
+# include "jse_priv.h"
+
+/*
+ * This function is run very early, out of flash, and before devices are
+ * initialized. It is called by lib_ppc/board.c:board_init_f by virtue
+ * of being in the init_sequence array.
+ *
+ * The SDRAM has been initialized already -- start.S:start called
+ * init.S:init_sdram early on -- but it is not yet being used for
+ * anything, not even stack. So be careful.
+ */
+int board_early_init_f (void)
+{
+ /*-------------------------------------------------------------------------+
+ | Interrupt controller setup for the JSE board.
+ | Note: IRQ 0-15 405GP internally generated; active high; level sensitive
+ | IRQ 16 405GP internally generated; active low; level sensitive
+ | IRQ 17-24 RESERVED/UNUSED
+ | IRQ 25 (EXT IRQ 0) PCI SLOT 0; active low; level sensitive
+ | IRQ 26 (EXT IRQ 1) PCI SLOT 1; active low; level sensitive
+ | IRQ 27 (EXT IRQ 2) JP2C CHIP ; active low; level sensitive
+ | IRQ 28 (EXT IRQ 3) PCI bridge; active low; level sensitive
+ | IRQ 29 (EXT IRQ 4) SystemACE IRQ; active high
+ | IRQ 30 (EXT IRQ 5) SystemACE BRdy (unused)
+ | IRQ 31 (EXT IRQ 6) (unused)
+ +-------------------------------------------------------------------------*/
+ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+ mtdcr (uicer, 0x00000000); /* disable all ints */
+ mtdcr (uiccr, 0x00000000); /* set all to be non-critical */
+ mtdcr (uicpr, 0xFFFFFF87); /* set int polarities */
+ mtdcr (uictr, 0x10000000); /* set int trigger levels */
+ mtdcr (uicsr, 0xFFFFFFFF); /* clear all ints */
+
+ /* Configure the interface to the SystemACE MCU port.
+ The SystemACE is fast, but there is no reason to have
+ excessivly tight timings. So the settings are slightly
+ generous. */
+
+ /* EBC0_B1AP: BME=1, TWT=2, CSN=0, OEN=1,
+ WBN=0, WBF=1, TH=0, RE=0, SOR=0, BEM=0, PEN=0 */
+ mtdcr (ebccfga, pb1ap);
+ mtdcr (ebccfgd, 0x01011000);
+
+ /* EBC0_B1CR: BAS=x, BS=0(1MB), BU=3(R/W), BW=0(8bits) */
+ mtdcr (ebccfga, pb1cr);
+ mtdcr (ebccfgd, CFG_SYSTEMACE_BASE | 0x00018000);
+
+ /* Enable the /PerWE output as /PerWE, instead of /PCIINT. */
+ /* CPC0_CR1 |= PCIPW */
+ mtdcr (0xb2, mfdcr (0xb2) | 0x00004000);
+
+ return 0;
+}
+
+#ifdef CONFIG_BOARD_PRE_INIT
+int board_pre_init (void)
+{
+ return board_early_init_f ();
+}
+
+#endif
+
+/*
+ * This function is also called by lib_ppc/board.c:board_init_f (it is
+ * also in the init_sequence array) but later. Many more things are
+ * configured, but we are still running from flash.
+ */
+int checkboard (void)
+{
+ unsigned vers, status;
+
+ /* check that the SystemACE chip is alive. */
+ printf ("ACE: ");
+ vers = readw (CFG_SYSTEMACE_BASE + 0x16);
+ printf ("SystemACE %u.%u (build %u)",
+ (vers >> 12) & 0x0f, (vers >> 8) & 0x0f, vers & 0xff);
+
+ status = readl (CFG_SYSTEMACE_BASE + 0x04);
+#ifdef DEBUG
+ printf (" STATUS=0x%08x", status);
+#endif
+ /* If the flash card is present and there is an initial error,
+ then force a restart of the program. */
+ if (status & 0x00000010) {
+ printf (" CFDETECT");
+
+ if (status & 0x04) {
+ /* CONTROLREG = CFGPROG */
+ writew (0x1000, CFG_SYSTEMACE_BASE + 0x18);
+ udelay (500);
+ /* CONTROLREG = CFGRESET */
+ writew (0x0080, CFG_SYSTEMACE_BASE + 0x18);
+ udelay (500);
+ writew (0x0000, CFG_SYSTEMACE_BASE + 0x18);
+ /* CONTROLREG = CFGSTART */
+ writew (0x0020, CFG_SYSTEMACE_BASE + 0x18);
+
+ status = readl (CFG_SYSTEMACE_BASE + 0x04);
+ }
+ }
+
+ /* Wait for the SystemACE to program its chain of devices. */
+ while ((status & 0x84) == 0x00) {
+ udelay (500);
+ status = readl (CFG_SYSTEMACE_BASE + 0x04);
+ }
+
+ if (status & 0x04)
+ printf (" CFG-ERROR");
+ if (status & 0x80)
+ printf (" CFGDONE");
+
+ printf ("\n");
+
+ /* Force /RTS to active. The board it not wired quite
+ correctly to use cts/rtc flow control, so just force the
+ /RST active and forget about it. */
+ writeb (readb (0xef600404) | 0x03, 0xef600404);
+
+ printf ("JSE: ready\n");
+
+ return 0;
+}
+
+/* **** No more functions called by board_init_f. **** */
+
+/*
+ * This function is called by lib_ppc/board.c:board_init_r. At this
+ * point, basic setup is done, U-Boot has been moved into SDRAM and
+ * PCI has been set up. From here we done late setup.
+ */
+int misc_init_r (void)
+{
+ host_bridge_init ();
+ return 0;
+}
diff --git a/board/jse/jse_priv.h b/board/jse/jse_priv.h
new file mode 100644
index 0000000..ed4894b
--- /dev/null
+++ b/board/jse/jse_priv.h
@@ -0,0 +1,25 @@
+#ifndef __jse_priv_H
+#define __jse_prov_H
+/*
+ * Copyright (c) 2004 Picture Elements, Inc.
+ * Stephen Williams (steve@icarus.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+extern void host_bridge_init(void);
+
+#endif
diff --git a/board/jse/sdram.c b/board/jse/sdram.c
new file mode 100644
index 0000000..9060d97
--- /dev/null
+++ b/board/jse/sdram.c
@@ -0,0 +1,182 @@
+/*
+ * Copyright (c) 2004 Picture Elements, Inc.
+ * Stephen Williams (steve@icarus.com)
+ *
+ * This source code is free software; you can redistribute it
+ * and/or modify it in source code form under the terms of the GNU
+ * General Public License as published by the Free Software
+ * Foundation; either version 2 of the License, or (at your option)
+ * any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA
+ */
+
+#include <common.h>
+#include <ppc4xx.h>
+#include <asm/processor.h>
+
+# define SDRAM_LEN 0x08000000
+
+/*
+ * this is even after checkboard. It returns the size of the SDRAM
+ * that we have installed. This function is called by board_init_f
+ * in lib_ppc/board.c to initialize the memory and return what I
+ * found.
+ */
+long int initdram (int board_type)
+{
+ /* Configure the SDRAMS */
+
+ /* disable memory controller */
+ mtdcr (memcfga, mem_mcopt1);
+ mtdcr (memcfgd, 0x00000000);
+
+ udelay (500);
+
+ /* Clear SDRAM0_BESR0 (Bus Error Syndrome Register) */
+ mtdcr (memcfga, mem_besra);
+ mtdcr (memcfgd, 0xffffffff);
+
+ /* Clear SDRAM0_BESR1 (Bus Error Syndrome Register) */
+ mtdcr (memcfga, mem_besrb);
+ mtdcr (memcfgd, 0xffffffff);
+
+ /* Clear SDRAM0_ECCCFG (disable ECC) */
+ mtdcr (memcfga, mem_ecccf);
+ mtdcr (memcfgd, 0x00000000);
+
+ /* Clear SDRAM0_ECCESR (ECC Error Syndrome Register) */
+ mtdcr (memcfga, mem_eccerr);
+ mtdcr (memcfgd, 0xffffffff);
+
+ /* Timing register: CASL=2, PTA=2, CTP=2, LDF=1, RFTA=5, RCD=2 */
+ mtdcr (memcfga, mem_sdtr1);
+ mtdcr (memcfgd, 0x010a4016);
+
+ /* Memory Bank 0 Config == BA=0x00000000, SZ=64M, AM=3, BE=1 */
+ mtdcr (memcfga, mem_mb0cf);
+ mtdcr (memcfgd, 0x00084001);
+
+ /* Memory Bank 1 Config == BA=0x04000000, SZ=64M, AM=3, BE=1 */
+ mtdcr (memcfga, mem_mb1cf);
+ mtdcr (memcfgd, 0x04084001);
+
+ /* Memory Bank 2 Config == BE=0 */
+ mtdcr (memcfga, mem_mb2cf);
+ mtdcr (memcfgd, 0x00000000);
+
+ /* Memory Bank 3 Config == BE=0 */
+ mtdcr (memcfga, mem_mb3cf);
+ mtdcr (memcfgd, 0x00000000);
+
+ /* refresh timer = 0x400 */
+ mtdcr (memcfga, mem_rtr);
+ mtdcr (memcfgd, 0x04000000);
+
+ /* Power management idle timer set to the default. */
+ mtdcr (memcfga, mem_pmit);
+ mtdcr (memcfgd, 0x07c00000);
+
+ udelay (500);
+
+ /* Enable banks (DCE=1, BPRF=1, ECCDD=1, EMDUL=1) */
+ mtdcr (memcfga, mem_mcopt1);
+ mtdcr (memcfgd, 0x80e00000);
+
+ return SDRAM_LEN;
+}
+
+/*
+ * The U-Boot core, as part of the initialization to prepare for
+ * loading the monitor into SDRAM, requests of this function that the
+ * memory be tested. Return 0 if the memory tests OK.
+ */
+int testdram (void)
+{
+ unsigned long idx;
+ unsigned val;
+ unsigned errors;
+ volatile unsigned long *sdram;
+
+#ifdef DEBUG
+ printf ("SDRAM Controller Registers --\n");
+
+ mtdcr (memcfga, mem_mcopt1);
+ val = mfdcr (memcfgd);
+ printf (" SDRAM0_CFG : 0x%08x\n", val);
+
+ mtdcr (memcfga, 0x24);
+ val = mfdcr (memcfgd);
+ printf (" SDRAM0_STATUS: 0x%08x\n", val);
+
+ mtdcr (memcfga, mem_mb0cf);
+ val = mfdcr (memcfgd);
+ printf (" SDRAM0_B0CR : 0x%08x\n", val);
+
+ mtdcr (memcfga, mem_mb1cf);
+ val = mfdcr (memcfgd);
+ printf (" SDRAM0_B1CR : 0x%08x\n", val);
+
+ mtdcr (memcfga, mem_sdtr1);
+ val = mfdcr (memcfgd);
+ printf (" SDRAM0_TR : 0x%08x\n", val);
+
+ mtdcr (memcfga, mem_rtr);
+ val = mfdcr (memcfgd);
+ printf (" SDRAM0_RTR : 0x%08x\n", val);
+#endif
+
+ /* Wait for memory to be ready by testing MRSCMPbit
+ bit. Really, there should already have been plenty of time,
+ given it was started long ago. But, best to check. */
+ for (idx = 0; idx < 1000000; idx += 1) {
+ mtdcr (memcfga, 0x24);
+ val = mfdcr (memcfgd);
+ if (val & 0x80000000)
+ break;
+ }
+
+ if (!(val & 0x80000000)) {
+ printf ("SDRAM ERROR: SDRAM0_STATUS never set!\n");
+ return 1;
+ }
+
+ /* Start memory test. */
+ printf ("test: %u MB - ", SDRAM_LEN / 1048576);
+
+ sdram = (unsigned long *) CFG_SDRAM_BASE;
+
+ printf ("write - ");
+ for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {
+ sdram[idx + 0] = idx;
+ sdram[idx + 1] = ~idx;
+ }
+
+ printf ("read - ");
+ errors = 0;
+ for (idx = 2; idx < SDRAM_LEN / 4; idx += 2) {
+ if (sdram[idx + 0] != idx)
+ errors += 1;
+ if (sdram[idx + 1] != ~idx)
+ errors += 1;
+ if (errors > 0)
+ break;
+ }
+
+ if (errors > 0) {
+ printf ("NOT OK\n");
+ printf ("FIRST ERROR at %p: 0x%08lx:0x%08lx != 0x%08lx:0x%08lx\n",
+ sdram + idx, sdram[idx + 0], sdram[idx + 1], idx, ~idx);
+ return 1;
+ }
+
+ printf ("ok\n");
+ return 0;
+}
diff --git a/board/jse/u-boot.lds b/board/jse/u-boot.lds
new file mode 100644
index 0000000..3e54af7
--- /dev/null
+++ b/board/jse/u-boot.lds
@@ -0,0 +1,140 @@
+/*
+ * (C) Copyright 2000-2004
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+OUTPUT_ARCH(powerpc)
+SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib);
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
+{
+ .resetvec 0xFFFFFFFC :
+ {
+ *(.resetvec)
+ } = 0xffff
+
+ /* Read-only sections, merged into text segment: */
+ . = + SIZEOF_HEADERS;
+ .interp : { *(.interp) }
+ .hash : { *(.hash) }
+ .dynsym : { *(.dynsym) }
+ .dynstr : { *(.dynstr) }
+ .rel.text : { *(.rel.text) }
+ .rela.text : { *(.rela.text) }
+ .rel.data : { *(.rel.data) }
+ .rela.data : { *(.rela.data) }
+ .rel.rodata : { *(.rel.rodata) }
+ .rela.rodata : { *(.rela.rodata) }
+ .rel.got : { *(.rel.got) }
+ .rela.got : { *(.rela.got) }
+ .rel.ctors : { *(.rel.ctors) }
+ .rela.ctors : { *(.rela.ctors) }
+ .rel.dtors : { *(.rel.dtors) }
+ .rela.dtors : { *(.rela.dtors) }
+ .rel.bss : { *(.rel.bss) }
+ .rela.bss : { *(.rela.bss) }
+ .rel.plt : { *(.rel.plt) }
+ .rela.plt : { *(.rela.plt) }
+ .init : { *(.init) }
+ .plt : { *(.plt) }
+ .text : {
+ /* The start.o file includes the initial jump vector that
+ must be located in the beginning. It is the basic run-
+ time function that calls all other functions. */
+ cpu/ppc4xx/start.o (.text)
+
+ board/jse/init.o (.text)
+ cpu/ppc4xx/kgdb.o (.text)
+
+/* . = env_offset;*/
+/* common/environment.o(.text)*/
+
+ *(.text)
+ *(.fixup)
+ *(.got1)
+ }
+ _etext = .;
+ PROVIDE (etext = .);
+ .rodata :
+ {
+ *(.rodata)
+ *(.rodata1)
+ *(.rodata.str1.4)
+ }
+ .fini : { *(.fini) } =0
+ .ctors : { *(.ctors) }
+ .dtors : { *(.dtors) }
+
+ /* Read-write section, merged into data segment: */
+ . = (. + 0x00FF) & 0xFFFFFF00;
+ _erotext = .;
+ PROVIDE (erotext = .);
+ .reloc :
+ {
+ *(.got)
+ _GOT2_TABLE_ = .;
+ *(.got2)
+ _FIXUP_TABLE_ = .;
+ *(.fixup)
+ }
+ __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
+ __fixup_entries = (. - _FIXUP_TABLE_)>>2;
+
+ .data :
+ {
+ *(.data)
+ *(.data1)
+ *(.sdata)
+ *(.sdata2)
+ *(.dynamic)
+ CONSTRUCTORS
+ }
+ _edata = .;
+ PROVIDE (edata = .);
+
+ __u_boot_cmd_start = .;
+ .u_boot_cmd : { *(.u_boot_cmd) }
+ __u_boot_cmd_end = .;
+
+
+ __start___ex_table = .;
+ __ex_table : { *(__ex_table) }
+ __stop___ex_table = .;
+
+ . = ALIGN(256);
+ __init_begin = .;
+ .text.init : { *(.text.init) }
+ .data.init : { *(.data.init) }
+ . = ALIGN(256);
+ __init_end = .;
+
+ __bss_start = .;
+ .bss :
+ {
+ *(.sbss) *(.scommon)
+ *(.dynbss)
+ *(.bss)
+ *(COMMON)
+ }
+ _end = . ;
+ PROVIDE (end = .);
+}
diff --git a/common/cmd_ide.c b/common/cmd_ide.c
index aad6127..baab871 100644
--- a/common/cmd_ide.c
+++ b/common/cmd_ide.c
@@ -782,15 +782,17 @@
/* ------------------------------------------------------------------------- */
-#ifdef __PPC__
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
static void __inline__
ide_outb(int dev, int port, unsigned char val)
{
- PRINTF ("ide_outb (dev= %d, port= %d, val= 0x%02x) : @ 0x%08lx\n",
+ PRINTF ("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
dev, port, val, (ATA_CURR_BASE(dev)+port));
/* Ensure I/O operations complete */
+#ifdef __PPC__
__asm__ volatile("eieio");
+#endif
*((uchar *)(ATA_CURR_BASE(dev)+port)) = val;
}
#else /* ! __PPC__ */
@@ -802,15 +804,17 @@
#endif /* __PPC__ */
-#ifdef __PPC__
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
static unsigned char __inline__
ide_inb(int dev, int port)
{
uchar val;
/* Ensure I/O operations complete */
+#ifdef __PPC__
__asm__ volatile("eieio");
+#endif
val = *((uchar *)(ATA_CURR_BASE(dev)+port));
- PRINTF ("ide_inb (dev= %d, port= %d) : @ 0x%08lx -> 0x%02x\n",
+ PRINTF ("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
dev, port, (ATA_CURR_BASE(dev)+port), val);
return (val);
}
@@ -856,6 +860,8 @@
volatile ushort *pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
ushort *dbuf = (ushort *)sect_buf;
+ PRINTF("in input swap data base for read is %lx\n", (unsigned long) pbuf);
+
while (words--) {
*dbuf++ = ld_le16(pbuf);
*dbuf++ = ld_le16(pbuf);
@@ -878,7 +884,7 @@
#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
-#ifdef __PPC__
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
static void
output_data(int dev, ulong *sect_buf, int words)
{
@@ -889,9 +895,13 @@
pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
dbuf = (ushort *)sect_buf;
while (words--) {
+#ifdef __PPC__
__asm__ volatile ("eieio");
+#endif
*pbuf = *dbuf++;
+#ifdef __PPC__
__asm__ volatile ("eieio");
+#endif
*pbuf = *dbuf++;
}
#else /* CONFIG_HMI10 */
@@ -922,7 +932,7 @@
}
#endif /* __PPC__ */
-#ifdef __PPC__
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
static void
input_data(int dev, ulong *sect_buf, int words)
{
@@ -932,10 +942,17 @@
pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
dbuf = (ushort *)sect_buf;
+
+ PRINTF("in input data base for read is %lx\n", (unsigned long) pbuf);
+
while (words--) {
+#ifdef __PPC__
__asm__ volatile ("eieio");
+#endif
*dbuf++ = *pbuf;
+#ifdef __PPC__
__asm__ volatile ("eieio");
+#endif
*dbuf++ = *pbuf;
}
#else /* CONFIG_HMI10 */
@@ -1576,7 +1593,7 @@
#define AT_PRINTF(fmt,args...)
#endif
-#ifdef __PPC__
+#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
/* since ATAPI may use commands with not 4 bytes alligned length
* we have our own transfer functions, 2 bytes alligned */
static void
@@ -1588,8 +1605,13 @@
pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
dbuf = (ushort *)sect_buf;
+
+ PRINTF("in output data shorts base for read is %lx\n", (unsigned long) pbuf);
+
while (shorts--) {
+#ifdef __PPC__
__asm__ volatile ("eieio");
+#endif
*pbuf = *dbuf++;
}
#else /* CONFIG_HMI10 */
@@ -1617,8 +1639,13 @@
pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG);
dbuf = (ushort *)sect_buf;
+
+ PRINTF("in input data shorts base for read is %lx\n", (unsigned long) pbuf);
+
while (shorts--) {
+#ifdef __PPC__
__asm__ volatile ("eieio");
+#endif
*dbuf++ = *pbuf;
}
#else /* CONFIG_HMI10 */
diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c
index b7e57bf..47632e7 100644
--- a/common/cmd_pcmcia.c
+++ b/common/cmd_pcmcia.c
@@ -63,6 +63,9 @@
#if defined(CONFIG_LWMON)
#include <i2c.h>
#endif
+#ifdef CONFIG_PXA_PCMCIA
+#include <asm/arch/pxa-regs.h>
+#endif
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) || \
((CONFIG_COMMANDS & CFG_CMD_IDE) && defined(CONFIG_IDE_8xx_PCCARD))
@@ -86,7 +89,7 @@
static int hardware_enable (int slot);
static int voltage_set(int slot, int vcc, int vpp);
-#ifndef CONFIG_I82365
+#if (! defined(CONFIG_I82365)) && (! defined(CONFIG_PXA_PCMCIA))
static u_int m8xx_get_graycode(u_int size);
#endif /* CONFIG_I82365 */
#if 0
@@ -95,6 +98,8 @@
/* -------------------------------------------------------------------- */
+#ifndef CONFIG_PXA_PCMCIA
+
/* look up table for pgcrx registers */
static u_int *pcmcia_pgcrx[2] = {
@@ -106,13 +111,15 @@
#endif /* CONFIG_I82365 */
-#ifdef CONFIG_IDE_8xx_PCCARD
+#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
static void print_funcid (int func);
static void print_fixed (volatile uchar *p);
static int identify (volatile uchar *p);
static int check_ide_device (int slot);
#endif /* CONFIG_IDE_8xx_PCCARD */
+#endif
+
const char *indent = "\t ";
/* -------------------------------------------------------------------- */
@@ -151,8 +158,7 @@
rc = i82365_init();
- if (rc == 0)
- {
+ if (rc == 0) {
rc = check_ide_device(0);
}
@@ -160,6 +166,8 @@
}
#else
+#ifndef CONFIG_PXA_PCMCIA
+
#ifdef CONFIG_HMI10
# define HMI10_FRAM_TIMING (PCMCIA_SHT(2) | PCMCIA_SST(2) | PCMCIA_SL(4))
#endif
@@ -280,8 +288,108 @@
}
return (rc);
}
+
+#endif / CONFIG_PXA_PCMCIA */
+
#endif /* CONFIG_I82365 */
+#ifdef CONFIG_PXA_PCMCIA
+
+static int hardware_enable (int slot)
+{
+ return 0; /* No hardware to enable */
+}
+
+static int hardware_disable(int slot)
+{
+ return 0; /* No hardware to disable */
+}
+
+static int voltage_set(int slot, int vcc, int vpp)
+{
+ return 0;
+}
+
+void msWait(unsigned msVal)
+{
+ udelay(msVal*1000);
+}
+
+int pcmcia_on (void)
+{
+ unsigned int reg_arr[] = {
+ 0x48000028, CFG_MCMEM0_VAL,
+ 0x4800002c, CFG_MCMEM1_VAL,
+ 0x48000030, CFG_MCATT0_VAL,
+ 0x48000034, CFG_MCATT1_VAL,
+ 0x48000038, CFG_MCIO0_VAL,
+ 0x4800003c, CFG_MCIO1_VAL,
+
+ 0, 0
+ };
+ int i, rc;
+
+#ifdef CONFIG_EXADRON1
+ int cardDetect;
+ volatile unsigned int *v_pBCRReg =
+ (volatile unsigned int *) 0x08000000;
+#endif
+
+ debug ("%s\n", __FUNCTION__);
+
+ i = 0;
+ while (reg_arr[i])
+ *((volatile unsigned int *) reg_arr[i++]) |= reg_arr[i++];
+ udelay (1000);
+
+ debug ("%s: programmed mem controller \n", __FUNCTION__);
+
+#ifdef CONFIG_EXADRON1
+
+/*define useful BCR masks */
+#define BCR_CF_INIT_VAL 0x00007230
+#define BCR_CF_PWRON_BUSOFF_RESETOFF_VAL 0x00007231
+#define BCR_CF_PWRON_BUSOFF_RESETON_VAL 0x00007233
+#define BCR_CF_PWRON_BUSON_RESETON_VAL 0x00007213
+#define BCR_CF_PWRON_BUSON_RESETOFF_VAL 0x00007211
+
+ /* we see from the GPIO bit if the card is present */
+ cardDetect = !(GPLR0 & GPIO_bit (14));
+
+ if (cardDetect) {
+ printf ("No PCMCIA card found!\n");
+ }
+
+ /* reset the card via the BCR line */
+ *v_pBCRReg = (unsigned) BCR_CF_INIT_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETOFF_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSOFF_RESETON_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETON_VAL;
+ msWait (500);
+
+ *v_pBCRReg = (unsigned) BCR_CF_PWRON_BUSON_RESETOFF_VAL;
+ msWait (1500);
+
+ /* enable address bus */
+ GPCR1 = 0x01;
+ /* and the first CF slot */
+ MECR = 0x00000002;
+
+#endif /* EXADRON 1 */
+
+ rc = check_ide_device (0); /* use just slot 0 */
+
+ return rc;
+}
+
+#endif /* CONFIG_PXA_PCMCIA */
+
/* -------------------------------------------------------------------- */
#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA)
@@ -296,6 +404,9 @@
return 0;
}
#else
+
+#ifndef CONFIG_PXA_PCMCIA
+
static int pcmcia_off (void)
{
int i;
@@ -327,13 +438,23 @@
hardware_disable(_slot_);
return 0;
}
+
+#endif /* CONFIG_PXA_PCMCIA */
+
#endif /* CONFIG_I82365 */
+#ifdef CONFIG_PXA_PCMCIA
+static int pcmcia_off (void)
+{
+ return 0;
+}
+#endif
+
#endif /* CFG_CMD_PCMCIA */
/* -------------------------------------------------------------------- */
-#ifdef CONFIG_IDE_8xx_PCCARD
+#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
#define MAX_TUPEL_SZ 512
#define MAX_FEATURES 4
@@ -2370,7 +2491,7 @@
/* -------------------------------------------------------------------- */
-#ifndef CONFIG_I82365
+#if ( ! defined(CONFIG_I82365) && ! defined(CONFIG_PXA_PCMCIA) )
static u_int m8xx_get_graycode(u_int size)
{
@@ -2444,7 +2565,7 @@
/* -------------------------------------------------------------------- */
-#ifdef CONFIG_IDE_8xx_PCCARD
+#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
static void print_funcid (int func)
{
puts (indent);
@@ -2486,7 +2607,7 @@
/* -------------------------------------------------------------------- */
-#ifdef CONFIG_IDE_8xx_PCCARD
+#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
static void print_fixed (volatile uchar *p)
{
if (p == NULL)
@@ -2544,7 +2665,7 @@
/* -------------------------------------------------------------------- */
-#ifdef CONFIG_IDE_8xx_PCCARD
+#if defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_PXA_PCMCIA)
#define MAX_IDENT_CHARS 64
#define MAX_IDENT_FIELDS 4
diff --git a/doc/README.PXA_CF b/doc/README.PXA_CF
new file mode 100644
index 0000000..186f775
--- /dev/null
+++ b/doc/README.PXA_CF
@@ -0,0 +1,50 @@
+
+These are brief instructions on how to add support for CF adapters to
+custom designed PXA boards. You need to set the parameters in the
+config file. This should work for most implementations especially if you
+follow the connections of the standard lubbock. Anyway just the block
+marked memory configuration should be touched since the other parameters
+are imposed by the PXA architecture.
+
+#define CONFIG_PXA_PCMCIA 1
+#define CONFIG_PXA_IDE 1
+
+#define CONFIG_PCMCIA_SLOT_A 1
+/* just to keep build system happy */
+
+#define CFG_PCMCIA_MEM_ADDR 0x28000000
+#define CFG_PCMCIA_MEM_SIZE 0x10000000
+
+#define CFG_MECR_VAL 0x00000000
+#define CFG_MCMEM0_VAL 0x00004204
+#define CFG_MCMEM1_VAL 0x00000000
+#define CFG_MCATT0_VAL 0x00010504
+#define CFG_MCATT1_VAL 0x00000000
+#define CFG_MCIO0_VAL 0x00008407
+#define CFG_MCIO1_VAL 0x00000000
+/* memory configuration */
+
+#define CFG_IDE_MAXBUS 1
+/* max. 1 IDE bus */
+#define CFG_IDE_MAXDEVICE 1
+/* max. 1 drive per IDE bus */
+
+#define CFG_ATA_IDE0_OFFSET 0x0000
+
+#define CFG_ATA_BASE_ADDR 0x20000000
+
+/* Offset for data I/O */
+#define CFG_ATA_DATA_OFFSET 0x1f0
+
+/* Offset for normal register accesses */
+#define CFG_ATA_REG_OFFSET 0x1f0
+
+/* Offset for alternate registers */
+#define CFG_ATA_ALT_OFFSET 0x3f0
+
+
+Another important point is that maybe you have to power the pcmcia
+subsystem. This is very board specific, for an example on how to
+do it please search for CONFIG_EXADRON1 in cmd_pcmcia.c
+
+
diff --git a/include/configs/JSE.h b/include/configs/JSE.h
new file mode 100644
index 0000000..4dd7d89
--- /dev/null
+++ b/include/configs/JSE.h
@@ -0,0 +1,304 @@
+/*
+ * (C) Copyright 2003 Picture Elements, Inc.
+ * Stephen Williams <steve@icarus.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * board/config.h - configuration options, board specific
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+/*
+ * High Level Configuration Options for the JSE board
+ * (Theoretically easy to change, but the board is fixed.)
+ */
+
+#define CONFIG_JSE 1
+ /* JSE has a PPC405GPr */
+#define CONFIG_405GP 1
+ /* ... which is a 4xxx series */
+#define CONFIG_4xx 1
+ /* ... with a 33MHz OSC. connected to the SysCLK input */
+#define CONFIG_SYS_CLK_FREQ 33333333
+ /* ... with on-chip memory here (4KBytes) */
+#define CFG_OCM_DATA_ADDR 0xF4000000
+#define CFG_OCM_DATA_SIZE 0x00001000
+ /* Do not set up locked dcache as init ram. */
+#undef CFG_INIT_DCACHE_CS
+
+ /* Map the SystemACE chip (CS#1) here. (Must be a multiple of 1Meg) */
+#define CONFIG_SYSTEMACE 1
+#define CFG_SYSTEMACE_BASE 0xf0000000
+#define CONFIG_DOS_PARTITION 1
+
+ /* Use the On-Chip-Memory (OCM) as a temporary stack for the startup code. */
+#define CFG_TEMP_STACK_OCM 1
+ /* ... place INIT RAM in the OCM address */
+# define CFG_INIT_RAM_ADDR CFG_OCM_DATA_ADDR
+ /* ... give it the whole init ram */
+# define CFG_INIT_RAM_END CFG_OCM_DATA_SIZE
+ /* ... Shave a bit off the end for global data */
+# define CFG_GBL_DATA_SIZE 128
+# define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE)
+ /* ... and place the stack pointer at the top of what's left. */
+# define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET
+
+ /* Enable board_pre_init function */
+#define CONFIG_BOARD_PRE_INIT 1
+#define CONFIG_BOARD_EARLY_INIT_F 1
+ /* Disable post-clk setup init function */
+#undef CONFIG_BOARD_POSTCLK_INIT
+ /* Disable call to post_init_f: late init function. */
+#undef CONFIG_POST
+ /* Enable DRAM test. */
+#define CFG_DRAM_TEST 1
+ /* Enable misc_init_r function. */
+#define CONFIG_MISC_INIT_R 1
+
+ /* JSE has EEPROM chips that are good for environment. */
+#undef CFG_ENV_IS_IN_NVRAM
+#undef CFG_ENV_IS_IN_FLASH
+#define CFG_ENV_IS_IN_EEPROM 1
+#undef CFG_ENV_IS_NOWHERE
+
+ /* This is the 7bit address of the device, not including P. */
+#define CFG_I2C_EEPROM_ADDR 0x50
+ /* After the device address, need one more address byte. */
+#define CFG_I2C_EEPROM_ADDR_LEN 1
+ /* The EEPROM is 512 bytes. */
+#define CFG_EEPROM_SIZE 512
+ /* The EEPROM can do 16byte ( 1 << 4 ) page writes. */
+#define CFG_EEPROM_PAGE_WRITE_BITS 4
+#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
+ /* Put the environment in the second half. */
+#define CFG_ENV_OFFSET 0x00
+#define CFG_ENV_SIZE 512
+
+
+ /* The JSE connects UART1 to the console tap connector. */
+#define CONFIG_UART1_CONSOLE 1
+ /* Set console baudrate to 9600 */
+#define CONFIG_BAUDRATE 9600
+
+/* Size (bytes) of interrupt driven serial port buffer.
+ * Set to 0 to use polling instead of interrupts.
+ * Setting to 0 will also disable RTS/CTS handshaking.
+ */
+#undef CONFIG_SERIAL_SOFTWARE_FIFO
+
+/*
+ * Configuration related to auto-boot.
+ *
+ * CONFIG_BOOTDELAY sets the delay (in seconds) that U-Boot will wait
+ * before resorting to autoboot. This value can be overridden by the
+ * bootdelay environment variable.
+ *
+ * CONFIG_AUTOBOOT_PROMPT is the string that U-Boot emits to warn the
+ * user that an autoboot will happen.
+ *
+ * CONFIG_BOOTCOMMAND is the sequence of commands that U-Boot will
+ * execute to boot the JSE. This loads the uimage and initrd.img files
+ * from CompactFlash into memory, then boots them from memory.
+ *
+ * CONFIG_BOOTARGS is the arguments passed to the Linux kernel to get
+ * it going on the JSE.
+ */
+#define CONFIG_BOOTDELAY 5
+#define CONFIG_BOOTARGS "root=/dev/ram0 init=/linuxrc rw"
+#define CONFIG_BOOTCOMMAND "fatload ace 0 2000000 uimage; fatload ace 0 2100000 initrd.img; bootm 2000000 2100000"
+
+
+#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
+#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */
+
+#define CONFIG_MII 1 /* MII PHY management */
+#define CONFIG_PHY_ADDR 1 /* PHY address */
+
+#define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
+ CFG_CMD_PCI | \
+ CFG_CMD_IRQ | \
+ CFG_CMD_FLASH | \
+ CFG_CMD_NET | \
+ CFG_CMD_DHCP | \
+ CFG_CMD_PING | \
+ CFG_CMD_MII | \
+ CFG_CMD_EEPROM | \
+ CFG_CMD_FAT | \
+ CFG_CMD_ELF )
+
+/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
+#include <cmd_confdefs.h>
+
+ /* watchdog disabled */
+#undef CONFIG_WATCHDOG
+ /* SPD EEPROM (sdram speed config) disabled */
+#undef CONFIG_SPD_EEPRO
+#undef SPD_EEPROM_ADDRESS
+
+/*
+ * Miscellaneous configurable options
+ */
+#define CFG_LONGHELP /* undef to save memory */
+#define CFG_PROMPT "=> " /* Monitor Command Prompt */
+
+#define CFG_HUSH_PARSER /* use "hush" command parser */
+#ifdef CFG_HUSH_PARSER
+#define CFG_PROMPT_HUSH_PS2 "> "
+#endif
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
+#else
+#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
+#endif
+#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
+#define CFG_MAXARGS 16 /* max number of command args */
+#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
+
+#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
+#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM */
+
+/*
+ * If CFG_EXT_SERIAL_CLOCK, then the UART divisor is 1.
+ * If CFG_405_UART_ERRATA_59, then UART divisor is 31.
+ * Otherwise, UART divisor is determined by CPU Clock and CFG_BASE_BAUD value.
+ * The Linux BASE_BAUD define should match this configuration.
+ * baseBaud = cpuClock/(uartDivisor*16)
+ * If CFG_405_UART_ERRATA_59 and 200MHz CPU clock,
+ * set Linux BASE_BAUD to 403200.
+ */
+#undef CFG_EXT_SERIAL_CLOCK /* external serial clock */
+#undef CFG_405_UART_ERRATA_59 /* 405GP/CR Rev. D silicon */
+#define CFG_BASE_BAUD 691200
+
+/* The following table includes the supported baudrates */
+#define CFG_BAUDRATE_TABLE \
+ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
+
+#define CFG_LOAD_ADDR 0x100000 /* default load address */
+#define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */
+
+#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
+
+#define CONFIG_HARD_I2C 1 /* I2C with hardware support */
+#undef CONFIG_SOFT_I2C /* I2C bit-banged */
+#define CFG_I2C_SPEED 400000 /* I2C speed and slave address */
+#define CFG_I2C_SLAVE 0x7F
+
+
+/*-----------------------------------------------------------------------
+ * PCI stuff
+ *-----------------------------------------------------------------------
+ */
+#define PCI_HOST_ADAPTER 0 /* configure ar pci adapter */
+#define PCI_HOST_FORCE 1 /* configure as pci host */
+#define PCI_HOST_AUTO 2 /* detected via arbiter enable */
+
+#define CONFIG_PCI /* include pci support */
+#define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */
+#undef CONFIG_PCI_PNP /* do pci plug-and-play */
+ /* resource configuration */
+
+#define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */
+#define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */
+#define CFG_PCI_PTM1LA 0x00000000 /* point to sdram */
+#define CFG_PCI_PTM1MS 0x80000001 /* 2GB, enable hard-wired to 1 */
+#define CFG_PCI_PTM1PCI 0x00000000 /* Host: use this pci address */
+#define CFG_PCI_PTM2LA 0x00000000 /* disabled */
+#define CFG_PCI_PTM2MS 0x00000000 /* disabled */
+#define CFG_PCI_PTM2PCI 0x04000000 /* Host: use this pci address */
+
+/*-----------------------------------------------------------------------
+ * External peripheral base address
+ *-----------------------------------------------------------------------
+ */
+#undef CONFIG_IDE_LED /* no led for ide supported */
+#undef CONFIG_IDE_RESET /* no reset for ide supported */
+
+#define CFG_KEY_REG_BASE_ADDR 0xF0100000
+#define CFG_IR_REG_BASE_ADDR 0xF0200000
+#define CFG_FPGA_REG_BASE_ADDR 0xF0300000
+
+/*-----------------------------------------------------------------------
+ * Start addresses for the final memory configuration
+ * (Set up by the startup code)
+ * Please note that CFG_SDRAM_BASE _must_ start at 0
+ */
+#define CFG_SDRAM_BASE 0x00000000
+#define CFG_FLASH_BASE 0xFFF80000
+#define CFG_MONITOR_BASE CFG_FLASH_BASE
+#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for Monitor */
+#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for malloc() */
+
+/*
+ * For booting Linux, the board info and command line data
+ * have to be in the first 8 MB of memory, since this is
+ * the maximum mapped by the Linux kernel during initialization.
+ */
+#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
+
+/*-----------------------------------------------------------------------
+ * FLASH organization
+ */
+#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
+#define CFG_MAX_FLASH_SECT 256 /* max number of sectors on one chip */
+
+#define CFG_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
+#define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
+
+/*-----------------------------------------------------------------------
+ * Cache Configuration
+ */
+#define CFG_DCACHE_SIZE 16384 /* For IBM 405GPr CPUs */
+#define CFG_CACHELINE_SIZE 32 /* ... */
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */
+#endif
+
+/*
+ * Init Memory Controller:
+ *
+ * BR0/1 and OR0/1 (FLASH)
+ */
+
+#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
+#define FLASH_BASE1_PRELIM 0 /* FLASH bank #1 */
+
+
+/* Configuration Port location */
+#define CONFIG_PORT_ADDR 0xF0000500
+
+
+/*
+ * Internal Definitions
+ *
+ * Boot Flags
+ */
+#define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */
+#define BOOTFLAG_WARM 0x02 /* Software reboot */
+
+#if (CONFIG_COMMANDS & CFG_CMD_KGDB)
+#define CONFIG_KGDB_BAUDRATE 230400 /* speed to run kgdb serial port */
+#define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
+#endif
+#endif /* __CONFIG_H */
diff --git a/include/fat.h b/include/fat.h
index 13910f9..3e7c91c 100644
--- a/include/fat.h
+++ b/include/fat.h
@@ -210,4 +210,11 @@
const char *file_getfsname(int idx);
int fat_register_device(block_dev_desc_t *dev_desc, int part_no);
+#ifdef CONFIG_PXA250
+#undef FAT2CPU16
+#define FAT2CPU16(x) x
+#undef FAT2CPU32
+#define FAT2CPU32(x) x
+#endif
+
#endif /* _FAT_H_ */