| commit | bb0fabe42d67ee39f7a874a0e142bc35ed6226a4 | [log] [tgz] |
|---|---|---|
| author | Peng Fan <peng.fan@nxp.com> | Wed Jan 10 13:20:22 2018 +0800 |
| committer | Stefano Babic <sbabic@denx.de> | Sun Feb 04 12:00:58 2018 +0100 |
| tree | dbc36687d503021b3773c097b0de59c7ed0beb70 | |
| parent | 80fd219ec7e99e29ef00420c23c4881152698027 [diff] |
imx: mx8m: add clock driver Add clock driver to support i.MX8M. There are two kind PLLs, FRAC pll and SSCG pll. ROM already configured SYS PLL1/2, we only need to configure the output. ocotp/i2c/pll decoding and configuration/usdhc/lcdif/dram pll/ enet clock are configured in the code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>