fsl_law: add SRIO2 target id and law_size_bits() macro
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
diff --git a/include/asm-ppc/fsl_law.h b/include/asm-ppc/fsl_law.h
index 31bb754..34c56a2 100644
--- a/include/asm-ppc/fsl_law.h
+++ b/include/asm-ppc/fsl_law.h
@@ -46,6 +46,8 @@
LAW_SIZE_32G,
};
+#define law_size_bits(sz) (__ilog2_u64(sz) - 1)
+
#ifdef CONFIG_FSL_CORENET
enum law_trgt_if {
LAW_TRGT_IF_PCIE_1 = 0x00,
@@ -78,6 +80,7 @@
LAW_TRGT_IF_CCSR = 0x08,
LAW_TRGT_IF_DDR_INTRLV = 0x0b,
LAW_TRGT_IF_RIO = 0x0c,
+ LAW_TRGT_IF_RIO_2 = 0x0d,
LAW_TRGT_IF_DDR = 0x0f,
LAW_TRGT_IF_DDR_2 = 0x16, /* 2nd controller */
};