clk: renesas: Add Gen2 clock core
Add common clock code for Renesas RCar Gen2 platforms.
Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index 2bd98bc..c19a466 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -23,9 +23,12 @@
unsigned int mstp_table_size;
const char *reset_node;
const char *extalr_node;
+ const char *extal_usb_node;
unsigned int mod_clk_base;
unsigned int clk_extal_id;
unsigned int clk_extalr_id;
+ unsigned int clk_extal_usb_id;
+ unsigned int pll0_div;
const void *(*get_pll_config)(const u32 cpg_mode);
};