| commit | df79e2b48baa2f3434645b0c74cda01d67a126e7 | [log] [tgz] |
|---|---|---|
| author | Sean Anderson <seanga2@gmail.com> | Fri Jun 11 00:16:12 2021 -0400 |
| committer | Leo Yu-Chi Liang <ycliang@andestech.com> | Thu Jun 17 09:40:57 2021 +0800 |
| tree | 56c92d27789945553b2b663491485dbc741824be | |
| parent | 29e3067d911b498c9676a695312fa3d3e83a7e4f [diff] |
clk: k210: Don't set PLL rates if we are already at the correct rate This speeds up boot by preventing multiple reconfigurations of the PLLs. Signed-off-by: Sean Anderson <seanga2@gmail.com> Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>