dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>
diff --git a/arch/x86/cpu/broadwell/cpu.c b/arch/x86/cpu/broadwell/cpu.c
index 6977e86..1b71d56 100644
--- a/arch/x86/cpu/broadwell/cpu.c
+++ b/arch/x86/cpu/broadwell/cpu.c
@@ -256,8 +256,8 @@
 	/* Set the slow ramp rate */
 	msr.hi &= ~(0x3 << (53 - 32));
 	/* Configure the C-state exit ramp rate */
-	ramp = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "intel,slow-ramp",
-			      -1);
+	ramp = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+			      "intel,slow-ramp", -1);
 	if (ramp != -1) {
 		/* Configured slow ramp rate */
 		msr.hi |= ((ramp & 0x3) << (53 - 32));
@@ -271,8 +271,8 @@
 	}
 	/* Set MIN_VID (31:24) to allow CPU to have full control */
 	msr.lo &= ~0xff000000;
-	min_vid = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "intel,min-vid",
-				 0);
+	min_vid = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+				 "intel,min-vid", 0);
 	msr.lo |= (min_vid & 0xff) << 24;
 	msr_write(MSR_VR_MISC_CONFIG, msr);
 
@@ -562,7 +562,7 @@
 	int tcc_offset;
 	msr_t msr;
 
-	tcc_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 				    "intel,tcc-offset", 0);
 
 	/* Set TCC activaiton offset if supported */
diff --git a/arch/x86/cpu/broadwell/pch.c b/arch/x86/cpu/broadwell/pch.c
index 317f57d..16eac3d 100644
--- a/arch/x86/cpu/broadwell/pch.c
+++ b/arch/x86/cpu/broadwell/pch.c
@@ -190,14 +190,14 @@
 	debug("Set power %s after power failure.\n", state);
 
 	/* GPE setup based on device tree configuration */
-	ret = fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
+	ret = fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
 				   "intel,gpe0-en", enable, ARRAY_SIZE(enable));
 	if (ret)
 		return -EINVAL;
 	enable_all_gpe(enable[0], enable[1], enable[2], enable[3]);
 
 	/* SMI setup based on device tree configuration */
-	enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	enable_alt_smi(dev, fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 					   "intel,alt-gp-smi-enable", 0));
 
 	return 0;
diff --git a/arch/x86/cpu/broadwell/pinctrl_broadwell.c b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
index 2a3fced..881413f 100644
--- a/arch/x86/cpu/broadwell/pinctrl_broadwell.c
+++ b/arch/x86/cpu/broadwell/pinctrl_broadwell.c
@@ -51,7 +51,7 @@
 	int node;
 
 	debug("%s: starting\n", __func__);
-	for (node = fdt_first_subnode(blob, dev->of_offset);
+	for (node = fdt_first_subnode(blob, dev_of_offset(dev));
 	     node > 0;
 	     node = fdt_next_subnode(blob, node)) {
 		int phandle = fdt_get_phandle(blob, node);
@@ -115,7 +115,7 @@
 	int count = 0;
 	int node;
 
-	for (node = fdt_first_subnode(blob, dev->of_offset);
+	for (node = fdt_first_subnode(blob, dev_of_offset(dev));
 	     node > 0;
 	     node = fdt_next_subnode(blob, node)) {
 		int len, i;
diff --git a/arch/x86/cpu/broadwell/sata.c b/arch/x86/cpu/broadwell/sata.c
index 2e47082..10461d9 100644
--- a/arch/x86/cpu/broadwell/sata.c
+++ b/arch/x86/cpu/broadwell/sata.c
@@ -235,7 +235,7 @@
 {
 	struct sata_platdata *plat = dev_get_platdata(dev);
 	const void *blob = gd->fdt_blob;
-	int node = dev->of_offset;
+	int node = dev_of_offset(dev);
 
 	plat->port_map = fdtdec_get_int(blob, node, "intel,sata-port-map", 0);
 	plat->port0_gen3_tx = fdtdec_get_int(blob, node,
diff --git a/arch/x86/cpu/cpu_x86.c b/arch/x86/cpu/cpu_x86.c
index 157f3de..8be14b5 100644
--- a/arch/x86/cpu/cpu_x86.c
+++ b/arch/x86/cpu/cpu_x86.c
@@ -17,7 +17,7 @@
 	struct cpu_platdata *plat = dev_get_parent_platdata(dev);
 	struct cpuid_result res;
 
-	plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
+	plat->cpu_id = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
 				      "intel,apic-id", -1);
 	plat->family = gd->arch.x86;
 	res = cpuid(1);
diff --git a/arch/x86/cpu/intel_common/lpc.c b/arch/x86/cpu/intel_common/lpc.c
index 03cb45b..696b630 100644
--- a/arch/x86/cpu/intel_common/lpc.c
+++ b/arch/x86/cpu/intel_common/lpc.c
@@ -50,7 +50,7 @@
 	int count;
 	int i;
 
-	count = fdtdec_get_int_array_count(gd->fdt_blob, dev->of_offset,
+	count = fdtdec_get_int_array_count(gd->fdt_blob, dev_of_offset(dev),
 			"intel,gen-dec", (u32 *)values,
 			sizeof(values) / sizeof(u32));
 	if (count < 0)
diff --git a/arch/x86/cpu/intel_common/mrc.c b/arch/x86/cpu/intel_common/mrc.c
index 01b6e86..f1a249a 100644
--- a/arch/x86/cpu/intel_common/mrc.c
+++ b/arch/x86/cpu/intel_common/mrc.c
@@ -149,7 +149,7 @@
 	spd_index = dm_gpio_get_values_as_int(desc, ret);
 	debug("spd index %d\n", spd_index);
 
-	node = fdt_first_subnode(blob, dev->of_offset);
+	node = fdt_first_subnode(blob, dev_of_offset(dev));
 	if (node < 0)
 		return -EINVAL;
 	for (spd_node = fdt_first_subnode(blob, node);
diff --git a/arch/x86/cpu/irq.c b/arch/x86/cpu/irq.c
index d2901de..f5654eb 100644
--- a/arch/x86/cpu/irq.c
+++ b/arch/x86/cpu/irq.c
@@ -96,7 +96,7 @@
 	int i;
 	int ret;
 
-	node = dev->of_offset;
+	node = dev_of_offset(dev);
 
 	/* extract the bdf from fdt_pci_addr */
 	priv->bdf = dm_pci_get_bdf(dev->parent);
diff --git a/arch/x86/cpu/ivybridge/lpc.c b/arch/x86/cpu/ivybridge/lpc.c
index aef1206..4e254b3 100644
--- a/arch/x86/cpu/ivybridge/lpc.c
+++ b/arch/x86/cpu/ivybridge/lpc.c
@@ -86,7 +86,7 @@
 {
 	uint8_t route[8], *ptr;
 
-	if (fdtdec_get_byte_array(gd->fdt_blob, pch->of_offset,
+	if (fdtdec_get_byte_array(gd->fdt_blob, dev_of_offset(pch),
 				  "intel,pirq-routing", route, sizeof(route)))
 		return -EINVAL;
 	ptr = route;
@@ -113,7 +113,7 @@
 	u32 reg;
 	int gpi;
 
-	if (fdtdec_get_byte_array(gd->fdt_blob, pch->of_offset,
+	if (fdtdec_get_byte_array(gd->fdt_blob, dev_of_offset(pch),
 				  "intel,gpi-routing", route, sizeof(route)))
 		return -EINVAL;
 
@@ -128,7 +128,7 @@
 static int pch_power_options(struct udevice *pch)
 {
 	const void *blob = gd->fdt_blob;
-	int node = pch->of_offset;
+	int node = dev_of_offset(pch);
 	u8 reg8;
 	u16 reg16, pmbase;
 	u32 reg32;
diff --git a/arch/x86/cpu/ivybridge/model_206ax.c b/arch/x86/cpu/ivybridge/model_206ax.c
index d5f3219..81dedee 100644
--- a/arch/x86/cpu/ivybridge/model_206ax.c
+++ b/arch/x86/cpu/ivybridge/model_206ax.c
@@ -288,8 +288,8 @@
 	int tcc_offset;
 	msr_t msr;
 
-	tcc_offset = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "tcc-offset",
-				    0);
+	tcc_offset = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
+				    "tcc-offset", 0);
 
 	/* Set TCC activaiton offset if supported */
 	msr = msr_read(MSR_PLATFORM_INFO);
diff --git a/arch/x86/cpu/ivybridge/sata.c b/arch/x86/cpu/ivybridge/sata.c
index c7ffbc1..0f5e190 100644
--- a/arch/x86/cpu/ivybridge/sata.c
+++ b/arch/x86/cpu/ivybridge/sata.c
@@ -39,7 +39,7 @@
 {
 	unsigned int port_map, speed_support, port_tx;
 	const void *blob = gd->fdt_blob;
-	int node = dev->of_offset;
+	int node = dev_of_offset(dev);
 	const char *mode;
 	u32 reg32;
 	u16 reg16;
@@ -190,7 +190,7 @@
 static void bd82x6x_sata_enable(struct udevice *dev)
 {
 	const void *blob = gd->fdt_blob;
-	int node = dev->of_offset;
+	int node = dev_of_offset(dev);
 	unsigned port_map;
 	const char *mode;
 	u16 map = 0;
diff --git a/arch/x86/cpu/mp_init.c b/arch/x86/cpu/mp_init.c
index 2b6b3bd..988073c 100644
--- a/arch/x86/cpu/mp_init.c
+++ b/arch/x86/cpu/mp_init.c
@@ -568,7 +568,8 @@
 	 * seq num in the uclass_resolve_seq() during device_probe(). To avoid
 	 * this, set req_seq to the reg number in the device tree in advance.
 	 */
-	cpu->req_seq = fdtdec_get_int(gd->fdt_blob, cpu->of_offset, "reg", -1);
+	cpu->req_seq = fdtdec_get_int(gd->fdt_blob, dev_of_offset(cpu), "reg",
+				      -1);
 	plat->ucode_version = microcode_read_rev();
 	plat->device_id = gd->arch.x86_device;