Merge branch 'master' of git://git.denx.de/u-boot-coldfire
diff --git a/.azure-pipelines.yml b/.azure-pipelines.yml
index 642a16f..76ffdee 100644
--- a/.azure-pipelines.yml
+++ b/.azure-pipelines.yml
@@ -297,6 +297,11 @@
qemu_arm64:
TEST_PY_BD: "qemu_arm64"
TEST_PY_TEST_SPEC: "not sleep"
+ qemu_m68k:
+ TEST_PY_BD: "M5208EVBE"
+ TEST_PY_ID: "--id qemu"
+ TEST_PY_TEST_SPEC: "not sleep and not efi"
+ OVERRIDE: "-a CONFIG_M68K_QEMU=y -a ~CONFIG_MCFTMR"
qemu_malta:
TEST_PY_BD: "malta"
TEST_PY_ID: "--id qemu"
diff --git a/.gitlab-ci.yml b/.gitlab-ci.yml
index 7509a7a..b193fee 100644
--- a/.gitlab-ci.yml
+++ b/.gitlab-ci.yml
@@ -355,6 +355,14 @@
TEST_PY_TEST_SPEC: "not sleep"
<<: *buildman_and_testpy_dfn
+qemu_m68k test.py:
+ variables:
+ TEST_PY_BD: "M5208EVBE"
+ TEST_PY_ID: "--id qemu"
+ TEST_PY_TEST_SPEC: "not sleep and not efi"
+ OVERRIDE: "-a CONFIG_M68K_QEMU=y -a ~CONFIG_MCFTMR"
+ <<: *buildman_and_testpy_dfn
+
qemu_malta test.py:
variables:
TEST_PY_BD: "malta"
diff --git a/arch/m68k/Kconfig b/arch/m68k/Kconfig
index 76233ef..1911563 100644
--- a/arch/m68k/Kconfig
+++ b/arch/m68k/Kconfig
@@ -198,7 +198,17 @@
source "board/sysam/amcore/Kconfig"
source "board/sysam/stmark2/Kconfig"
+config M68K_QEMU
+ bool "Build with workarounds for incomplete QEMU emulation"
+ default n
+ help
+ QEMU 8.x currently does not implement RAMBAR accesses and
+ DMA timers. Enable this option for U-Boot CI purposes only
+ to skip the RAMBAR accesses.
+
config MCFTMR
bool "Use DMA timer"
+ default y if !M68K_QEMU
+ default n if M68K_QEMU
endmenu
diff --git a/arch/m68k/cpu/mcf523x/interrupts.c b/arch/m68k/cpu/mcf523x/interrupts.c
index b02ea29..09c7f9e 100644
--- a/arch/m68k/cpu/mcf523x/interrupts.c
+++ b/arch/m68k/cpu/mcf523x/interrupts.c
@@ -22,7 +22,7 @@
return 0;
}
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
void dtimer_intr_setup(void)
{
int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
diff --git a/arch/m68k/cpu/mcf52x2/interrupts.c b/arch/m68k/cpu/mcf52x2/interrupts.c
index e787c76..c5ed060 100644
--- a/arch/m68k/cpu/mcf52x2/interrupts.c
+++ b/arch/m68k/cpu/mcf52x2/interrupts.c
@@ -34,7 +34,7 @@
return 0;
}
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
void dtimer_intr_setup(void)
{
intctrl_t *intp = (intctrl_t *) (CFG_SYS_INTR_BASE);
@@ -42,7 +42,7 @@
clrbits_be32(&intp->int_icr1, INT_ICR1_TMR3MASK);
setbits_be32(&intp->int_icr1, CFG_SYS_TMRINTR_PRI);
}
-#endif /* CFG_MCFTMR */
+#endif /* CONFIG_MCFTMR */
#endif /* CONFIG_M5272 */
#if defined(CONFIG_M5208) || defined(CONFIG_M5282) || \
@@ -63,7 +63,7 @@
return 0;
}
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
void dtimer_intr_setup(void)
{
int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
@@ -72,7 +72,7 @@
clrbits_be32(&intp->imrl0, 0x00000001);
clrbits_be32(&intp->imrl0, CFG_SYS_TMRINTR_MASK);
}
-#endif /* CFG_MCFTMR */
+#endif /* CONFIG_MCFTMR */
#endif /* CONFIG_M5282 | CONFIG_M5271 | CONFIG_M5275 */
#if defined(CONFIG_M5249) || defined(CONFIG_M5253)
@@ -83,11 +83,11 @@
return 0;
}
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
void dtimer_intr_setup(void)
{
mbar_writeLong(MCFSIM_IMR, mbar_readLong(MCFSIM_IMR) & ~0x00000400);
mbar_writeByte(MCFSIM_TIMER2ICR, CFG_SYS_TMRINTR_PRI);
}
-#endif /* CFG_MCFTMR */
+#endif /* CONFIG_MCFTMR */
#endif /* CONFIG_M5249 || CONFIG_M5253 */
diff --git a/arch/m68k/cpu/mcf52x2/start.S b/arch/m68k/cpu/mcf52x2/start.S
index d48d019..51d2e23 100644
--- a/arch/m68k/cpu/mcf52x2/start.S
+++ b/arch/m68k/cpu/mcf52x2/start.S
@@ -98,7 +98,7 @@
nop
move.w #0x2700,%sr
-#if defined(CONFIG_M5208)
+#if defined(CONFIG_M5208) && !defined(CONFIG_M68K_QEMU)
/* Initialize RAMBAR: locate SRAM and validate it */
move.l #(CFG_SYS_INIT_RAM_ADDR + CFG_SYS_INIT_RAM_CTRL), %d0
movec %d0, %RAMBAR1
@@ -120,7 +120,7 @@
movec %d0, %RAMBAR0
#endif /* CONFIG_M5272 || CONFIG_M5249 || CONFIG_M5253 */
-#if defined(CONFIG_M5282) || defined(CONFIG_M5271)
+#if (defined(CONFIG_M5282) || defined(CONFIG_M5271)) && !defined(CONFIG_M68K_QEMU)
/* set MBAR address + valid flag */
move.l #(CFG_SYS_MBAR + 1), %d0
move.l %d0, 0x40000000
diff --git a/arch/m68k/cpu/mcf532x/interrupts.c b/arch/m68k/cpu/mcf532x/interrupts.c
index bbe823c..4f72fa8 100644
--- a/arch/m68k/cpu/mcf532x/interrupts.c
+++ b/arch/m68k/cpu/mcf532x/interrupts.c
@@ -23,7 +23,7 @@
return 0;
}
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
void dtimer_intr_setup(void)
{
int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
diff --git a/arch/m68k/cpu/mcf5445x/interrupts.c b/arch/m68k/cpu/mcf5445x/interrupts.c
index fb80a87..400f3de 100644
--- a/arch/m68k/cpu/mcf5445x/interrupts.c
+++ b/arch/m68k/cpu/mcf5445x/interrupts.c
@@ -26,7 +26,7 @@
return 0;
}
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
void dtimer_intr_setup(void)
{
int0_t *intp = (int0_t *) (CFG_SYS_INTR_BASE);
diff --git a/arch/m68k/include/asm/immap.h b/arch/m68k/include/asm/immap.h
index 74516cc..aafa4f4 100644
--- a/arch/m68k/include/asm/immap.h
+++ b/arch/m68k/include/asm/immap.h
@@ -16,7 +16,7 @@
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -25,6 +25,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (6)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0)
@@ -38,7 +40,7 @@
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR3)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -47,6 +49,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0)
@@ -63,7 +67,7 @@
#define CFG_SYS_NUM_IRQS (64)
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR))
@@ -72,6 +76,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#endif /* CONFIG_M5249 */
@@ -86,7 +92,7 @@
#define CFG_SYS_NUM_IRQS (64)
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (mbar_readLong(MCFSIM_IPR))
@@ -95,6 +101,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | MCFSIM_ICR_LEVEL3 | MCFSIM_ICR_PRI3)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 2000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#endif /* CONFIG_M5253 */
@@ -105,7 +113,7 @@
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x40))
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR3)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -114,6 +122,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (0x1E) /* Interrupt level 3, priority 6 */
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0)
@@ -130,7 +140,7 @@
#define CFG_SYS_NUM_IRQS (64)
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_TMR0)
#define CFG_SYS_TMR_BASE (MMAP_TMR3)
#define CFG_SYS_TMRPND_REG (((volatile intctrl_t *)(CFG_SYS_INTR_BASE))->int_isr)
@@ -139,6 +149,8 @@
#define CFG_SYS_TMRINTR_PEND (0)
#define CFG_SYS_TMRINTR_PRI (INT_ICR1_TMR3PI | INT_ICR1_TMR3IPL(5))
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#endif /* CONFIG_M5272 */
@@ -152,7 +164,7 @@
#define CFG_SYS_NUM_IRQS (192)
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR3)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -161,6 +173,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (0x1E)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#endif /* CONFIG_M5275 */
@@ -174,7 +188,7 @@
#define CFG_SYS_NUM_IRQS (128)
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR3)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprl0)
@@ -183,6 +197,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (0x1E) /* Level must include inorder to work */
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#endif /* CONFIG_M5282 */
@@ -196,7 +212,7 @@
#define CFG_SYS_NUM_IRQS (64)
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (((volatile intctrl_t *) \
@@ -207,6 +223,8 @@
#define CFG_SYS_TMRINTR_PRI (MCFSIM_ICR_AUTOVEC | \
MCFSIM_ICR_LEVEL7 | MCFSIM_ICR_PRI3)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#endif /* CONFIG_M5307 */
@@ -217,7 +235,7 @@
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -226,6 +244,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (6)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0)
@@ -239,7 +259,7 @@
#define CFG_SYS_UART_BASE (MMAP_UART0 + (CFG_SYS_UART_PORT * 0x4000))
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (((volatile int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -248,6 +268,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (6)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0)
@@ -269,7 +291,7 @@
#define MMAP_DSPI MMAP_DSPI0
/* Timer */
-#ifdef CFG_MCFTMR
+#if CONFIG_IS_ENABLED(MCFTMR)
#define CFG_SYS_UDELAY_BASE (MMAP_DTMR0)
#define CFG_SYS_TMR_BASE (MMAP_DTMR1)
#define CFG_SYS_TMRPND_REG (((int0_t *)(CFG_SYS_INTR_BASE))->iprh0)
@@ -278,6 +300,8 @@
#define CFG_SYS_TMRINTR_PEND (CFG_SYS_TMRINTR_MASK)
#define CFG_SYS_TMRINTR_PRI (6)
#define CFG_SYS_TIMER_PRESCALER (((gd->bus_clk / 1000000) - 1) << 8)
+#else
+#define CFG_SYS_UDELAY_BASE (MMAP_PIT0)
#endif
#define CFG_SYS_INTR_BASE (MMAP_INTC0)
diff --git a/arch/m68k/lib/time.c b/arch/m68k/lib/time.c
index ca8c039..61db1e6 100644
--- a/arch/m68k/lib/time.c
+++ b/arch/m68k/lib/time.c
@@ -25,7 +25,7 @@
#define CFG_SYS_WATCHDOG_FREQ (CONFIG_SYS_HZ / 2)
#endif
-#if defined(CFG_MCFTMR)
+#if CONFIG_IS_ENABLED(MCFTMR)
#ifndef CFG_SYS_UDELAY_BASE
# error "uDelay base not defined!"
#endif
@@ -111,8 +111,6 @@
return (timestamp - base);
}
-#endif /* CFG_MCFTMR */
-
/*
* This function is derived from PowerPC code (read timebase as long long).
* On M68K it just returns the timer value.
@@ -121,6 +119,40 @@
{
return get_timer(0);
}
+#else
+static u64 timer64 __section(".data");
+static u16 timer16 __section(".data");
+
+uint64_t __weak get_ticks(void)
+{
+ volatile pit_t *timerp = (pit_t *) (CFG_SYS_UDELAY_BASE);
+ u16 val = ~timerp->pcntr;
+
+ if (timer16 > val)
+ timer64 += 0xffff - timer16 + val;
+ else
+ timer64 += val - timer16;
+
+ timer16 = val;
+
+ return timer64;
+}
+
+/* PIT timer */
+int timer_init(void)
+{
+ volatile pit_t *timerp = (pit_t *) (CFG_SYS_UDELAY_BASE);
+
+ timer16 = 0;
+ timer64 = 0;
+
+ /* Set up PIT as timebase clock */
+ timerp->pmr = 0xffff;
+ timerp->pcsr = PIT_PCSR_EN | PIT_PCSR_OVW;
+
+ return 0;
+}
+#endif /* CONFIG_MCFTMR */
unsigned long usec2ticks(unsigned long usec)
{
diff --git a/bin/travis-ci/conf.M5208EVBE_qemu b/bin/travis-ci/conf.M5208EVBE_qemu
new file mode 100644
index 0000000..947f13c
--- /dev/null
+++ b/bin/travis-ci/conf.M5208EVBE_qemu
@@ -0,0 +1,27 @@
+# Copyright (c) 2023 Marek Vasut <marek.vasut+renesas@mailbox.org>
+#
+# Permission is hereby granted, free of charge, to any person obtaining a
+# copy of this software and associated documentation files (the "Software"),
+# to deal in the Software without restriction, including without limitation
+# the rights to use, copy, modify, merge, publish, distribute, sublicense,
+# and/or sell copies of the Software, and to permit persons to whom the
+# Software is furnished to do so, subject to the following conditions:
+#
+# The above copyright notice and this permission notice shall be included in
+# all copies or substantial portions of the Software.
+#
+# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+# DEALINGS IN THE SOFTWARE.
+
+console_impl=qemu
+qemu_machine="mcf5208evb"
+qemu_binary="qemu-system-m68k"
+qemu_extra_args="-nographic -serial mon:stdio -net user,tftp=${UBOOT_TRAVIS_BUILD_DIR} -net nic,model=mcf-fec"
+qemu_kernel_args="-bios ${U_BOOT_BUILD_DIR}/u-boot.bin"
+reset_impl=none
+flash_impl=none
diff --git a/board/freescale/m53017evb/README b/board/freescale/m53017evb/README
index 5d5c5e7..34f05f3 100644
--- a/board/freescale/m53017evb/README
+++ b/board/freescale/m53017evb/README
@@ -87,7 +87,7 @@
CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CFG_MCFTMR -- define to use DMA timer
+CONFIG_MCFTMR -- define to use DMA timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
diff --git a/board/freescale/m5373evb/README b/board/freescale/m5373evb/README
index e8bf75f..7240648 100644
--- a/board/freescale/m5373evb/README
+++ b/board/freescale/m5373evb/README
@@ -86,7 +86,7 @@
CONFIG_SYS_FEC0_MIIBASE -- Set FEC0 MII base register
MCFFEC_TOUT_LOOP -- set FEC timeout loop
-CFG_MCFTMR -- define to use DMA timer
+CONFIG_MCFTMR -- define to use DMA timer
CONFIG_SYS_I2C_FSL -- define to use FSL common I2C driver
CONFIG_SYS_I2C_SOFT -- define for I2C bit-banged
diff --git a/common/board_f.c b/common/board_f.c
index f3c1ab5..1688e27 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -863,7 +863,7 @@
/* get CPU and bus clocks according to the environment variable */
get_clocks, /* get CPU and bus clocks (etc.) */
#endif
-#if !defined(CONFIG_M68K)
+#if !defined(CONFIG_M68K) || (defined(CONFIG_M68K) && !defined(CONFIG_MCFTMR))
timer_init, /* initialize timer */
#endif
#if defined(CONFIG_BOARD_POSTCLK_INIT)
diff --git a/configs/M5208EVBE_defconfig b/configs/M5208EVBE_defconfig
index 72c0560..7b46580 100644
--- a/configs/M5208EVBE_defconfig
+++ b/configs/M5208EVBE_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5208EVBE"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x2000
CONFIG_TARGET_M5208EVBE=y
diff --git a/configs/M5235EVB_defconfig b/configs/M5235EVB_defconfig
index 64f8a13..67991b5 100644
--- a/configs/M5235EVB_defconfig
+++ b/configs/M5235EVB_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5235EVB"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5235EVB=y
diff --git a/configs/M5272C3_defconfig b/configs/M5272C3_defconfig
index 1c51c4a..6b46c6f 100644
--- a/configs/M5272C3_defconfig
+++ b/configs/M5272C3_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5272C3"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5272C3=y
diff --git a/configs/M5275EVB_defconfig b/configs/M5275EVB_defconfig
index 5ce9b74..557e694 100644
--- a/configs/M5275EVB_defconfig
+++ b/configs/M5275EVB_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5275EVB"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x800000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5275EVB=y
diff --git a/configs/M5282EVB_defconfig b/configs/M5282EVB_defconfig
index 2b053e3..1997f38 100644
--- a/configs/M5282EVB_defconfig
+++ b/configs/M5282EVB_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5282EVB"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x20000
CONFIG_ENV_ADDR=0xFFE04000
CONFIG_TARGET_M5282EVB=y
diff --git a/configs/M53017EVB_defconfig b/configs/M53017EVB_defconfig
index 7c31a68..7014e2f 100644
--- a/configs/M53017EVB_defconfig
+++ b/configs/M53017EVB_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x1000
CONFIG_ENV_SECT_SIZE=0x8000
CONFIG_DEFAULT_DEVICE_TREE="M53017EVB"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x40000
CONFIG_TARGET_M53017EVB=y
diff --git a/configs/M5329AFEE_defconfig b/configs/M5329AFEE_defconfig
index a5ee082..1857cf7 100644
--- a/configs/M5329AFEE_defconfig
+++ b/configs/M5329AFEE_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5329AFEE"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5329EVB=y
diff --git a/configs/M5329BFEE_defconfig b/configs/M5329BFEE_defconfig
index c5abed9..449ad2a 100644
--- a/configs/M5329BFEE_defconfig
+++ b/configs/M5329BFEE_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5329BFEE"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5329EVB=y
diff --git a/configs/M5373EVB_defconfig b/configs/M5373EVB_defconfig
index cbc91a5..05c3b37 100644
--- a/configs/M5373EVB_defconfig
+++ b/configs/M5373EVB_defconfig
@@ -4,7 +4,6 @@
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_SECT_SIZE=0x2000
CONFIG_DEFAULT_DEVICE_TREE="M5373EVB"
-CONFIG_SYS_PROMPT="-> "
CONFIG_SYS_LOAD_ADDR=0x40010000
CONFIG_ENV_ADDR=0x4000
CONFIG_TARGET_M5373EVB=y
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 4b89f31..d4c1e06 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -111,6 +111,5 @@
#define CFG_SYS_CS0_MASK 0x007F0001
#define CFG_SYS_CS0_CTRL 0x00001FA0
-#define CFG_MCFTMR
#endif /* _M5208EVBE_H */
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 14d4617..e542818 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -130,6 +130,5 @@
# define CFG_SYS_CS0_CTRL 0x00001D80
#endif
-#define CFG_MCFTMR
#endif /* _M5329EVB_H */
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index b240423..2f4743c 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -120,6 +120,5 @@
#define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
#define CFG_SYS_GPIO1_LED 0x00400000 /* user led */
-#define CFG_MCFTMR
#endif /* M5249 */
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index 008c725..0ff0bfc 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -132,6 +132,5 @@
#define CFG_SYS_GPIO1_OUT 0x00c70000 /* Set outputs to default state */
#define CFG_SYS_GPIO1_LED 0x00400000 /* user led */
-#define CFG_MCFTMR
#endif /* _M5253DEMO_H */
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 49cf3e8..98a1718 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -107,6 +107,5 @@
#define CFG_SYS_PBDAT 0x0000
#define CFG_SYS_PDCNT 0x00000000
-#define CFG_MCFTMR
#endif /* _M5272C3_H */
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 965327d..77ddf71 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -116,6 +116,5 @@
#define CFG_SYS_CS1_CTRL 0x00001900
#define CFG_SYS_CS1_MASK 0x00070001
-#define CFG_MCFTMR
#endif /* _M5275EVB_H */
diff --git a/include/configs/M5282EVB.h b/include/configs/M5282EVB.h
index f04d9b1..e289a23 100644
--- a/include/configs/M5282EVB.h
+++ b/include/configs/M5282EVB.h
@@ -127,6 +127,5 @@
#define CFG_SYS_DDRUA 0x05
#define CFG_SYS_PJPAR 0xFF
-#define CFG_MCFTMR
#endif /* _CONFIG_M5282EVB_H */
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 04c456f..dcc5701 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -132,6 +132,5 @@
#define CFG_SYS_CS1_MASK 0x00070001
#define CFG_SYS_CS1_CTRL 0x00001FA0
-#define CFG_MCFTMR
#endif /* _M53017EVB_H */
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 0aa1ffd..dd5d4c9 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -138,6 +138,5 @@
#define CFG_SYS_CS2_CTRL 0x00001f60
#endif
-#define CFG_MCFTMR
#endif /* _M5329EVB_H */
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index 8b9e65d..4bb9948 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -136,6 +136,5 @@
#define CFG_SYS_CS2_MASK (16 << 20)
#define CFG_SYS_CS2_CTRL 0x00001f60
-#define CFG_MCFTMR
#endif /* _M5373EVB_H */
diff --git a/include/configs/amcore.h b/include/configs/amcore.h
index ca8d17b..4c695fb 100644
--- a/include/configs/amcore.h
+++ b/include/configs/amcore.h
@@ -10,7 +10,6 @@
#define CFG_SYS_UART_PORT 0
-#define CFG_MCFTMR
#define CFG_SYS_UART_PORT 0
#define CFG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 80f8c41..f3bfefa 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -184,6 +184,5 @@
#define CFG_SYS_CACHE_ICACR (CF_CACR_EC | CF_CACR_CINVA | \
CF_CACR_DCM_P)
-#define CFG_MCFTMR
#endif /* _CONFIG_ASTRO_MCF5373L_H */
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index 276ecc3..556705f 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -184,6 +184,5 @@
#define CFG_SYS_PBDAT 0x0000 /* PortB value reg. */
#define CFG_SYS_PDCNT 0x00000000 /* PortD control reg. */
-#define CFG_MCFTMR
#endif /* _CONFIG_COBRA5272_H */
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 9503ab6..e2c9d9c 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -138,7 +138,6 @@
#define CFG_SYS_DDRUA 0x05
#define CFG_SYS_PJPAR 0xFF
-#define CFG_MCFTMR
#endif /* _CONFIG_M5282EVB_H */
/*---------------------------------------------------------------------*/
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 6edaf73..af5da09 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -95,7 +95,6 @@
#define CACR_STATUS (CFG_SYS_INIT_RAM_ADDR + \
CFG_SYS_INIT_RAM_SIZE - 12)
-#define CFG_MCFTMR
#define CFG_SYS_I2C_0
diff --git a/py/travis-ci/u_boot_boardenv_M5208EVBE_qemu.py b/py/travis-ci/u_boot_boardenv_M5208EVBE_qemu.py
new file mode 100644
index 0000000..4e100cd
--- /dev/null
+++ b/py/travis-ci/u_boot_boardenv_M5208EVBE_qemu.py
@@ -0,0 +1,6 @@
+import os
+import travis_tftp
+
+env__net_uses_pci = False
+env__net_dhcp_server = True
+env__net_tftp_readable_file = travis_tftp.file2env('u-boot')