commit e4536f8e379130b1bf3c0497f49c4f5a4da48c83
author Masahiro Yamada <yamada.m@jp.panasonic.com> Tue Mar 11 11:05:16 2014 +0900
committer Tom Rini <trini@ti.com> Wed Mar 12 17:04:49 2014 -0400
tree 94153d66a6b5de5b0e675c0e1371fb27da6743d7
parent 323762e54ad3dbd933ecbda20e749487afd2a6fb

freescale: pblimage: refactor CONFIG_SYS_FSL_PBL_{PBI, RCW}

Pull out "$(SRCTREE)/" from CONFIG_SYS_FSL_PBL_PBI
and CONFIG_SYS_FSL_PBL_RCW and push it into the top Makefile.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com>
Cc: Valentin Longchamp <valentin.longchamp@keymile.com>

include/configs/P2041RDB.h

diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index 47c6384..b3880f1 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -18,9 +18,8 @@
 #ifdef CONFIG_RAMBOOT_PBL
 #define CONFIG_RAMBOOT_TEXT_BASE	CONFIG_SYS_TEXT_BASE
 #define CONFIG_RESET_VECTOR_ADDRESS	0xfffffffc
-#define CONFIG_SYS_FSL_PBL_PBI $(SRCTREE)/board/freescale/corenet_ds/pbi.cfg
-#define CONFIG_SYS_FSL_PBL_RCW \
-			$(SRCTREE)/board/freescale/corenet_ds/rcw_p2041rdb.cfg
+#define CONFIG_SYS_FSL_PBL_PBI board/freescale/corenet_ds/pbi.cfg
+#define CONFIG_SYS_FSL_PBL_RCW board/freescale/corenet_ds/rcw_p2041rdb.cfg
 #endif
 
 #ifdef CONFIG_SRIO_PCIE_BOOT_SLAVE