rockchip: spi: fix off-by-one in chunk size computation
The maximum transfer length (in a single transaction) for the Rockchip
SPI controller is 64Kframes (i.e. 0x10000 frames) of 8bit or 16bit
frames and is encoded as (num_frames - 1) in CTRLR1. The existing
code subtracted the "minus 1" twice for a maximum transfer length of
0xffff (64K - 1) frames.
While this is not strictly an error (the existing code is correct, but
leads to a bit of head-scrating), fix this off-by-one situation.
Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
diff --git a/drivers/spi/rk_spi.c b/drivers/spi/rk_spi.c
index 1df497d..e7b2df8 100644
--- a/drivers/spi/rk_spi.c
+++ b/drivers/spi/rk_spi.c
@@ -356,7 +356,7 @@
spi_cs_activate(dev, slave_plat->cs);
while (len > 0) {
- int todo = min(len, 0xffff);
+ int todo = min(len, 0x10000);
rkspi_enable_chip(regs, false);
writel(todo - 1, ®s->ctrlr1);